blob: c27294128e182d77d8f0b7e29ac35b4549069943 [file] [log] [blame]
Thomas Gleixner50acfb22019-05-29 07:18:00 -07001// SPDX-License-Identifier: GPL-2.0-only
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07002/*
3 * Copyright (C) 2012 Regents of the University of California
Anup Patel671f9a32019-06-28 13:36:21 -07004 * Copyright (C) 2019 Western Digital Corporation or its affiliates.
Nick Kossifidise53d2812021-04-19 03:55:38 +03005 * Copyright (C) 2020 FORTH-ICS/CARV
6 * Nick Kossifidis <mick@ics.forth.gr>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07007 */
8
9#include <linux/init.h>
10#include <linux/mm.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070011#include <linux/memblock.h>
Mike Rapoport57c8a662018-10-30 15:09:49 -070012#include <linux/initrd.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070013#include <linux/swap.h>
Kefeng Wangce3aca02021-06-02 16:55:16 +080014#include <linux/swiotlb.h>
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010015#include <linux/sizes.h>
Anup Patel0651c262019-02-21 11:25:49 +053016#include <linux/of_fdt.h>
Nick Kossifidis56409752021-04-19 03:55:39 +030017#include <linux/of_reserved_mem.h>
Albert Ou922b0372019-09-27 16:14:18 -070018#include <linux/libfdt.h>
Zong Lid27c3c92020-03-10 00:55:41 +080019#include <linux/set_memory.h>
Kefeng Wangda815582020-10-31 14:01:12 +080020#include <linux/dma-map-ops.h>
Nick Kossifidise53d2812021-04-19 03:55:38 +030021#include <linux/crash_dump.h>
Kefeng Wang8ba1a8b2021-07-30 20:48:41 +080022#include <linux/hugetlb.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070023
Anup Patelf2c17aa2019-01-07 20:57:01 +053024#include <asm/fixmap.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070025#include <asm/tlbflush.h>
26#include <asm/sections.h>
Palmer Dabbelt2d268252020-04-14 13:43:24 +090027#include <asm/soc.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070028#include <asm/io.h>
Zong Lib422d282020-06-03 16:03:55 -070029#include <asm/ptdump.h>
Atish Patra4f0e8ee2020-11-18 16:38:29 -080030#include <asm/numa.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070031
Paul Walmsleyffaee272019-10-17 15:00:17 -070032#include "../kernel/head.h"
33
Alexandre Ghiti658e2c52021-06-17 15:53:07 +020034struct kernel_mapping kernel_map __ro_after_init;
35EXPORT_SYMBOL(kernel_map);
Vitaly Wool44c92252021-04-13 02:35:14 -040036#ifdef CONFIG_XIP_KERNEL
Alexandre Ghiti658e2c52021-06-17 15:53:07 +020037#define kernel_map (*(struct kernel_mapping *)XIP_FIXUP(&kernel_map))
38#endif
39
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +010040#ifdef CONFIG_64BIT
41u64 satp_mode = !IS_ENABLED(CONFIG_XIP_KERNEL) ? SATP_MODE_48 : SATP_MODE_39;
42#else
43u64 satp_mode = SATP_MODE_32;
44#endif
45EXPORT_SYMBOL(satp_mode);
46
kernel test robot20aa4952022-01-19 11:38:36 +080047bool pgtable_l4_enabled = IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_XIP_KERNEL);
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +010048EXPORT_SYMBOL(pgtable_l4_enabled);
49
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +020050phys_addr_t phys_ram_base __ro_after_init;
51EXPORT_SYMBOL(phys_ram_base);
52
Anup Patel387181d2019-03-26 08:03:47 +000053unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
54 __page_aligned_bss;
55EXPORT_SYMBOL(empty_zero_page);
56
Anup Pateld90d45d2019-06-07 06:01:29 +000057extern char _start[];
Anup Patel8f3a2b42020-09-17 15:37:10 -070058#define DTB_EARLY_BASE_VA PGDIR_SIZE
Vitaly Wool44c92252021-04-13 02:35:14 -040059void *_dtb_early_va __initdata;
60uintptr_t _dtb_early_pa __initdata;
Anup Pateld90d45d2019-06-07 06:01:29 +000061
Jisheng Zhang01062352021-05-16 21:15:56 +080062static phys_addr_t dma32_phys_limit __initdata;
Kefeng Wangda815582020-10-31 14:01:12 +080063
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070064static void __init zone_sizes_init(void)
65{
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010066 unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070067
Zong Lid5fad482018-06-25 16:49:37 +080068#ifdef CONFIG_ZONE_DMA32
Kefeng Wangda815582020-10-31 14:01:12 +080069 max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit);
Zong Lid5fad482018-06-25 16:49:37 +080070#endif
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010071 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
72
Mike Rapoport9691a072020-06-03 15:57:10 -070073 free_area_init(max_zone_pfns);
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070074}
75
Kefeng Wang8fa3cdf2020-05-14 19:53:35 +080076#if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000077static inline void print_mlk(char *name, unsigned long b, unsigned long t)
78{
79 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t,
80 (((t) - (b)) >> 10));
81}
82
83static inline void print_mlm(char *name, unsigned long b, unsigned long t)
84{
85 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t,
86 (((t) - (b)) >> 20));
87}
88
Jisheng Zhang19875012021-03-30 02:22:21 +080089static void __init print_vm_layout(void)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000090{
91 pr_notice("Virtual kernel memory layout:\n");
92 print_mlk("fixmap", (unsigned long)FIXADDR_START,
93 (unsigned long)FIXADDR_TOP);
94 print_mlm("pci io", (unsigned long)PCI_IO_START,
95 (unsigned long)PCI_IO_END);
96 print_mlm("vmemmap", (unsigned long)VMEMMAP_START,
97 (unsigned long)VMEMMAP_END);
98 print_mlm("vmalloc", (unsigned long)VMALLOC_START,
99 (unsigned long)VMALLOC_END);
100 print_mlm("lowmem", (unsigned long)PAGE_OFFSET,
101 (unsigned long)high_memory);
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800102 if (IS_ENABLED(CONFIG_64BIT)) {
Alexandre Ghitif7ae0232021-12-06 11:46:45 +0100103#ifdef CONFIG_KASAN
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800104 print_mlm("kasan", KASAN_SHADOW_START, KASAN_SHADOW_END);
Alexandre Ghitif7ae0232021-12-06 11:46:45 +0100105#endif
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800106
Jisheng Zhang07aabe82021-12-06 23:03:50 +0800107 print_mlm("kernel", (unsigned long)KERNEL_LINK_ADDR,
108 (unsigned long)ADDRESS_SPACE_END);
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800109 }
Yash Shah2cc6c4a2019-11-18 05:58:34 +0000110}
111#else
112static void print_vm_layout(void) { }
113#endif /* CONFIG_DEBUG_VM */
114
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700115void __init mem_init(void)
116{
117#ifdef CONFIG_FLATMEM
118 BUG_ON(!mem_map);
119#endif /* CONFIG_FLATMEM */
120
Kefeng Wangce3aca02021-06-02 16:55:16 +0800121#ifdef CONFIG_SWIOTLB
122 if (swiotlb_force == SWIOTLB_FORCE ||
123 max_pfn > PFN_DOWN(dma32_phys_limit))
124 swiotlb_init(1);
125 else
126 swiotlb_force = SWIOTLB_NO_FORCE;
127#endif
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700128 high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
Mike Rapoportc6ffc5c2018-10-30 15:09:30 -0700129 memblock_free_all();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700130
Yash Shah2cc6c4a2019-11-18 05:58:34 +0000131 print_vm_layout();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700132}
133
Alexandre Ghitif7ae0232021-12-06 11:46:45 +0100134/* Limit the memory size via mem. */
135static phys_addr_t memory_limit;
Kefeng Wangc9811e32021-06-02 16:55:17 +0800136
137static int __init early_mem(char *p)
138{
139 u64 size;
140
141 if (!p)
142 return 1;
143
144 size = memparse(p, &p) & PAGE_MASK;
145 memory_limit = min_t(u64, size, memory_limit);
146
147 pr_notice("Memory limited to %lldMB\n", (u64)memory_limit >> 20);
148
149 return 0;
150}
151early_param("mem", early_mem);
152
Kefeng Wangf842f5f2021-05-10 19:42:22 +0800153static void __init setup_bootmem(void)
Anup Patel0651c262019-02-21 11:25:49 +0530154{
Zong Liac51e002020-01-02 11:12:40 +0800155 phys_addr_t vmlinux_end = __pa_symbol(&_end);
Jisheng Zhang07aabe82021-12-06 23:03:50 +0800156 phys_addr_t max_mapped_addr;
Jisheng Zhangfe036db2021-12-06 23:03:52 +0800157 phys_addr_t phys_ram_end, vmlinux_start;
Anup Patel0651c262019-02-21 11:25:49 +0530158
Jisheng Zhangfe036db2021-12-06 23:03:52 +0800159 if (IS_ENABLED(CONFIG_XIP_KERNEL))
160 vmlinux_start = __pa_symbol(&_sdata);
161 else
162 vmlinux_start = __pa_symbol(&_start);
Vitaly Wool44c92252021-04-13 02:35:14 -0400163
Kefeng Wangc9811e32021-06-02 16:55:17 +0800164 memblock_enforce_memory_limit(memory_limit);
Anup Patel0651c262019-02-21 11:25:49 +0530165
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400166 /*
Geert Uytterhoeven8db6f932021-04-29 17:05:00 +0200167 * Make sure we align the reservation on PMD_SIZE since we will
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400168 * map the kernel in the linear mapping as read-only: we do not want
169 * any allocation to happen between _end and the next pmd aligned page.
170 */
Jisheng Zhang07aabe82021-12-06 23:03:50 +0800171 if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_STRICT_KERNEL_RWX))
172 vmlinux_end = (vmlinux_end + PMD_SIZE - 1) & PMD_MASK;
173 /*
174 * Reserve from the start of the kernel to the end of the kernel
175 */
Geert Uytterhoeven8db6f932021-04-29 17:05:00 +0200176 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
Anup Pateld90d45d2019-06-07 06:01:29 +0000177
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +0200178 phys_ram_end = memblock_end_of_DRAM();
Jisheng Zhangfe036db2021-12-06 23:03:52 +0800179 if (!IS_ENABLED(CONFIG_XIP_KERNEL))
180 phys_ram_base = memblock_start_of_DRAM();
Atish Patraabb8e862021-01-11 15:45:02 -0800181 /*
182 * memblock allocator is not aware of the fact that last 4K bytes of
183 * the addressable memory can not be mapped because of IS_ERR_VALUE
184 * macro. Make sure that last 4k bytes are not usable by memblock
Alexandre Ghitidb6b84a2021-06-29 11:13:48 +0200185 * if end of dram is equal to maximum addressable memory. For 64-bit
186 * kernel, this problem can't happen here as the end of the virtual
187 * address space is occupied by the kernel mapping then this check must
Alexandre Ghitifdf3a7a2021-07-26 07:42:54 +0200188 * be done as soon as the kernel mapping base address is determined.
Atish Patraabb8e862021-01-11 15:45:02 -0800189 */
Jisheng Zhang07aabe82021-12-06 23:03:50 +0800190 if (!IS_ENABLED(CONFIG_64BIT)) {
191 max_mapped_addr = __pa(~(ulong)0);
192 if (max_mapped_addr == (phys_ram_end - 1))
193 memblock_set_current_limit(max_mapped_addr - 4096);
194 }
Atish Patraabb8e862021-01-11 15:45:02 -0800195
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +0200196 min_low_pfn = PFN_UP(phys_ram_base);
197 max_low_pfn = max_pfn = PFN_DOWN(phys_ram_end);
Kefeng Wangf6e5aed2021-02-25 14:54:17 +0800198
Kefeng Wangda815582020-10-31 14:01:12 +0800199 dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
Guo Ren336e8eb2021-01-21 14:31:17 +0800200 set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
Anup Patel0651c262019-02-21 11:25:49 +0530201
Kefeng Wangaec33b52021-01-15 13:46:06 +0800202 reserve_initrd_mem();
Albert Ou922b0372019-09-27 16:14:18 -0700203 /*
Vitaly Woolf105aa92021-01-16 01:49:48 +0200204 * If DTB is built in, no need to reserve its memblock.
205 * Otherwise, do reserve it but avoid using
206 * early_init_fdt_reserve_self() since __pa() does
Albert Ou922b0372019-09-27 16:14:18 -0700207 * not work for DTB pointers that are fixmap addresses
208 */
Vitaly Woolf105aa92021-01-16 01:49:48 +0200209 if (!IS_ENABLED(CONFIG_BUILTIN_DTB))
210 memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
Albert Ou922b0372019-09-27 16:14:18 -0700211
Anup Patel0651c262019-02-21 11:25:49 +0530212 early_init_fdt_scan_reserved_mem();
Kefeng Wangda815582020-10-31 14:01:12 +0800213 dma_contiguous_reserve(dma32_phys_limit);
Kefeng Wang8ba1a8b2021-07-30 20:48:41 +0800214 if (IS_ENABLED(CONFIG_64BIT))
215 hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
Anup Patel0651c262019-02-21 11:25:49 +0530216 memblock_allow_resize();
Anup Patel0651c262019-02-21 11:25:49 +0530217}
Anup Patel6f1e9e92019-02-13 16:38:36 +0530218
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100219#ifdef CONFIG_MMU
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800220struct pt_alloc_ops pt_ops __initdata;
Vitaly Wool44c92252021-04-13 02:35:14 -0400221
Kenneth Leefb31f0a2021-07-28 15:15:57 +0800222unsigned long riscv_pfn_base __ro_after_init;
223EXPORT_SYMBOL(riscv_pfn_base);
Anup Patel387181d2019-03-26 08:03:47 +0000224
Anup Patel6f1e9e92019-02-13 16:38:36 +0530225pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700226pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Jisheng Zhang01062352021-05-16 21:15:56 +0800227static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700228
Anup Patel671f9a32019-06-28 13:36:21 -0700229pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100230static pud_t __maybe_unused early_dtb_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200231static pmd_t __maybe_unused early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530232
Vitaly Wool44c92252021-04-13 02:35:14 -0400233#ifdef CONFIG_XIP_KERNEL
Jisheng Zhang805a3eb2021-12-06 23:03:53 +0800234#define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&pt_ops))
Palmer Dabbeltca0cb9a2022-02-04 13:14:08 -0800235#define riscv_pfn_base (*(unsigned long *)XIP_FIXUP(&riscv_pfn_base))
Vitaly Wool44c92252021-04-13 02:35:14 -0400236#define trampoline_pg_dir ((pgd_t *)XIP_FIXUP(trampoline_pg_dir))
237#define fixmap_pte ((pte_t *)XIP_FIXUP(fixmap_pte))
238#define early_pg_dir ((pgd_t *)XIP_FIXUP(early_pg_dir))
239#endif /* CONFIG_XIP_KERNEL */
240
Anup Patelf2c17aa2019-01-07 20:57:01 +0530241void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
242{
243 unsigned long addr = __fix_to_virt(idx);
244 pte_t *ptep;
245
246 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
247
248 ptep = &fixmap_pte[pte_index(addr)];
249
Greentime Hu21190b72020-08-04 11:02:05 +0800250 if (pgprot_val(prot))
Anup Patelf2c17aa2019-01-07 20:57:01 +0530251 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
Greentime Hu21190b72020-08-04 11:02:05 +0800252 else
Anup Patelf2c17aa2019-01-07 20:57:01 +0530253 pte_clear(&init_mm, addr, ptep);
Greentime Hu21190b72020-08-04 11:02:05 +0800254 local_flush_tlb_page(addr);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530255}
256
Atish Patrae8dcb612020-09-17 15:37:12 -0700257static inline pte_t *__init get_pte_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700258{
Atish Patrae8dcb612020-09-17 15:37:12 -0700259 return (pte_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700260}
261
Atish Patrae8dcb612020-09-17 15:37:12 -0700262static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa)
263{
264 clear_fixmap(FIX_PTE);
265 return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
266}
267
Jisheng Zhang01062352021-05-16 21:15:56 +0800268static inline pte_t *__init get_pte_virt_late(phys_addr_t pa)
Atish Patrae8dcb612020-09-17 15:37:12 -0700269{
270 return (pte_t *) __va(pa);
271}
272
273static inline phys_addr_t __init alloc_pte_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700274{
275 /*
276 * We only create PMD or PGD early mappings so we
277 * should never reach here with MMU disabled.
278 */
Atish Patrae8dcb612020-09-17 15:37:12 -0700279 BUG();
280}
Anup Patel671f9a32019-06-28 13:36:21 -0700281
Atish Patrae8dcb612020-09-17 15:37:12 -0700282static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va)
283{
Anup Patel671f9a32019-06-28 13:36:21 -0700284 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
285}
286
Jisheng Zhang01062352021-05-16 21:15:56 +0800287static phys_addr_t __init alloc_pte_late(uintptr_t va)
Atish Patrae8dcb612020-09-17 15:37:12 -0700288{
289 unsigned long vaddr;
290
291 vaddr = __get_free_page(GFP_KERNEL);
zhouchuangaoe75e6bf2021-03-30 06:56:26 -0700292 BUG_ON(!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr)));
293
Atish Patrae8dcb612020-09-17 15:37:12 -0700294 return __pa(vaddr);
295}
296
Anup Patel671f9a32019-06-28 13:36:21 -0700297static void __init create_pte_mapping(pte_t *ptep,
298 uintptr_t va, phys_addr_t pa,
299 phys_addr_t sz, pgprot_t prot)
300{
Mike Rapoport974b9b22020-06-08 21:33:10 -0700301 uintptr_t pte_idx = pte_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700302
303 BUG_ON(sz != PAGE_SIZE);
304
Mike Rapoport974b9b22020-06-08 21:33:10 -0700305 if (pte_none(ptep[pte_idx]))
306 ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700307}
308
309#ifndef __PAGETABLE_PMD_FOLDED
310
Jisheng Zhang01062352021-05-16 21:15:56 +0800311static pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
312static pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
313static pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
Anup Patel671f9a32019-06-28 13:36:21 -0700314
Vitaly Wool44c92252021-04-13 02:35:14 -0400315#ifdef CONFIG_XIP_KERNEL
316#define trampoline_pmd ((pmd_t *)XIP_FIXUP(trampoline_pmd))
317#define fixmap_pmd ((pmd_t *)XIP_FIXUP(fixmap_pmd))
318#define early_pmd ((pmd_t *)XIP_FIXUP(early_pmd))
319#endif /* CONFIG_XIP_KERNEL */
320
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100321static pud_t trampoline_pud[PTRS_PER_PUD] __page_aligned_bss;
322static pud_t fixmap_pud[PTRS_PER_PUD] __page_aligned_bss;
323static pud_t early_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
324
325#ifdef CONFIG_XIP_KERNEL
326#define trampoline_pud ((pud_t *)XIP_FIXUP(trampoline_pud))
327#define fixmap_pud ((pud_t *)XIP_FIXUP(fixmap_pud))
328#define early_pud ((pud_t *)XIP_FIXUP(early_pud))
329#endif /* CONFIG_XIP_KERNEL */
330
Atish Patrae8dcb612020-09-17 15:37:12 -0700331static pmd_t *__init get_pmd_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700332{
Atish Patrae8dcb612020-09-17 15:37:12 -0700333 /* Before MMU is enabled */
334 return (pmd_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700335}
336
Atish Patrae8dcb612020-09-17 15:37:12 -0700337static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa)
338{
339 clear_fixmap(FIX_PMD);
340 return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
341}
342
Jisheng Zhang01062352021-05-16 21:15:56 +0800343static pmd_t *__init get_pmd_virt_late(phys_addr_t pa)
Atish Patrae8dcb612020-09-17 15:37:12 -0700344{
345 return (pmd_t *) __va(pa);
346}
347
348static phys_addr_t __init alloc_pmd_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700349{
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100350 BUG_ON((va - kernel_map.virt_addr) >> PUD_SHIFT);
Anup Patel671f9a32019-06-28 13:36:21 -0700351
Alexandre Ghiti0f02de42021-02-21 09:22:33 -0500352 return (uintptr_t)early_pmd;
Anup Patel671f9a32019-06-28 13:36:21 -0700353}
354
Atish Patrae8dcb612020-09-17 15:37:12 -0700355static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va)
356{
357 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
358}
359
Jisheng Zhang01062352021-05-16 21:15:56 +0800360static phys_addr_t __init alloc_pmd_late(uintptr_t va)
Atish Patrae8dcb612020-09-17 15:37:12 -0700361{
362 unsigned long vaddr;
363
364 vaddr = __get_free_page(GFP_KERNEL);
Kefeng Wang5a7ac592021-09-27 11:03:25 +0800365 BUG_ON(!vaddr || !pgtable_pmd_page_ctor(virt_to_page(vaddr)));
366
Atish Patrae8dcb612020-09-17 15:37:12 -0700367 return __pa(vaddr);
368}
369
Anup Patel671f9a32019-06-28 13:36:21 -0700370static void __init create_pmd_mapping(pmd_t *pmdp,
371 uintptr_t va, phys_addr_t pa,
372 phys_addr_t sz, pgprot_t prot)
373{
374 pte_t *ptep;
375 phys_addr_t pte_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700376 uintptr_t pmd_idx = pmd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700377
378 if (sz == PMD_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700379 if (pmd_none(pmdp[pmd_idx]))
380 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700381 return;
382 }
383
Mike Rapoport974b9b22020-06-08 21:33:10 -0700384 if (pmd_none(pmdp[pmd_idx])) {
Atish Patrae8dcb612020-09-17 15:37:12 -0700385 pte_phys = pt_ops.alloc_pte(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700386 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
Atish Patrae8dcb612020-09-17 15:37:12 -0700387 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700388 memset(ptep, 0, PAGE_SIZE);
389 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700390 pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
Atish Patrae8dcb612020-09-17 15:37:12 -0700391 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700392 }
393
394 create_pte_mapping(ptep, va, pa, sz, prot);
395}
396
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100397static pud_t *__init get_pud_virt_early(phys_addr_t pa)
398{
399 return (pud_t *)((uintptr_t)pa);
400}
401
402static pud_t *__init get_pud_virt_fixmap(phys_addr_t pa)
403{
404 clear_fixmap(FIX_PUD);
405 return (pud_t *)set_fixmap_offset(FIX_PUD, pa);
406}
407
408static pud_t *__init get_pud_virt_late(phys_addr_t pa)
409{
410 return (pud_t *)__va(pa);
411}
412
413static phys_addr_t __init alloc_pud_early(uintptr_t va)
414{
415 /* Only one PUD is available for early mapping */
416 BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT);
417
418 return (uintptr_t)early_pud;
419}
420
421static phys_addr_t __init alloc_pud_fixmap(uintptr_t va)
422{
423 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
424}
425
426static phys_addr_t alloc_pud_late(uintptr_t va)
427{
428 unsigned long vaddr;
429
430 vaddr = __get_free_page(GFP_KERNEL);
431 BUG_ON(!vaddr);
432 return __pa(vaddr);
433}
434
435static void __init create_pud_mapping(pud_t *pudp,
436 uintptr_t va, phys_addr_t pa,
437 phys_addr_t sz, pgprot_t prot)
438{
439 pmd_t *nextp;
440 phys_addr_t next_phys;
441 uintptr_t pud_index = pud_index(va);
442
443 if (sz == PUD_SIZE) {
444 if (pud_val(pudp[pud_index]) == 0)
445 pudp[pud_index] = pfn_pud(PFN_DOWN(pa), prot);
446 return;
447 }
448
449 if (pud_val(pudp[pud_index]) == 0) {
450 next_phys = pt_ops.alloc_pmd(va);
451 pudp[pud_index] = pfn_pud(PFN_DOWN(next_phys), PAGE_TABLE);
452 nextp = pt_ops.get_pmd_virt(next_phys);
453 memset(nextp, 0, PAGE_SIZE);
454 } else {
455 next_phys = PFN_PHYS(_pud_pfn(pudp[pud_index]));
456 nextp = pt_ops.get_pmd_virt(next_phys);
457 }
458
459 create_pmd_mapping(nextp, va, pa, sz, prot);
460}
461
462#define pgd_next_t pud_t
463#define alloc_pgd_next(__va) (pgtable_l4_enabled ? \
464 pt_ops.alloc_pud(__va) : pt_ops.alloc_pmd(__va))
465#define get_pgd_next_virt(__pa) (pgtable_l4_enabled ? \
466 pt_ops.get_pud_virt(__pa) : (pgd_next_t *)pt_ops.get_pmd_virt(__pa))
Anup Patel671f9a32019-06-28 13:36:21 -0700467#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100468 (pgtable_l4_enabled ? \
469 create_pud_mapping(__nextp, __va, __pa, __sz, __prot) : \
470 create_pmd_mapping((pmd_t *)__nextp, __va, __pa, __sz, __prot))
471#define fixmap_pgd_next (pgtable_l4_enabled ? \
472 (uintptr_t)fixmap_pud : (uintptr_t)fixmap_pmd)
473#define trampoline_pgd_next (pgtable_l4_enabled ? \
474 (uintptr_t)trampoline_pud : (uintptr_t)trampoline_pmd)
475#define early_dtb_pgd_next (pgtable_l4_enabled ? \
476 (uintptr_t)early_dtb_pud : (uintptr_t)early_dtb_pmd)
Anup Patel671f9a32019-06-28 13:36:21 -0700477#else
478#define pgd_next_t pte_t
Atish Patrae8dcb612020-09-17 15:37:12 -0700479#define alloc_pgd_next(__va) pt_ops.alloc_pte(__va)
480#define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700481#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
482 create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100483#define fixmap_pgd_next ((uintptr_t)fixmap_pte)
484#define early_dtb_pgd_next ((uintptr_t)early_dtb_pmd)
485#define create_pud_mapping(__pmdp, __va, __pa, __sz, __prot)
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200486#define create_pmd_mapping(__pmdp, __va, __pa, __sz, __prot)
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100487#endif /* __PAGETABLE_PMD_FOLDED */
Anup Patel671f9a32019-06-28 13:36:21 -0700488
Atish Patrab91540d2020-09-17 15:37:15 -0700489void __init create_pgd_mapping(pgd_t *pgdp,
Anup Patel671f9a32019-06-28 13:36:21 -0700490 uintptr_t va, phys_addr_t pa,
491 phys_addr_t sz, pgprot_t prot)
492{
493 pgd_next_t *nextp;
494 phys_addr_t next_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700495 uintptr_t pgd_idx = pgd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700496
497 if (sz == PGDIR_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700498 if (pgd_val(pgdp[pgd_idx]) == 0)
499 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700500 return;
501 }
502
Mike Rapoport974b9b22020-06-08 21:33:10 -0700503 if (pgd_val(pgdp[pgd_idx]) == 0) {
Anup Patel671f9a32019-06-28 13:36:21 -0700504 next_phys = alloc_pgd_next(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700505 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700506 nextp = get_pgd_next_virt(next_phys);
507 memset(nextp, 0, PAGE_SIZE);
508 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700509 next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
Anup Patel671f9a32019-06-28 13:36:21 -0700510 nextp = get_pgd_next_virt(next_phys);
511 }
512
513 create_pgd_next_mapping(nextp, va, pa, sz, prot);
514}
515
516static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
517{
Zong Li0fdc6362019-11-08 01:00:40 -0800518 /* Upgrade to PMD_SIZE mappings whenever possible */
519 if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
520 return PAGE_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700521
Zong Li0fdc6362019-11-08 01:00:40 -0800522 return PMD_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700523}
524
Vitaly Wool44c92252021-04-13 02:35:14 -0400525#ifdef CONFIG_XIP_KERNEL
Palmer Dabbelt4b1c70a2022-02-04 13:13:37 -0800526#define phys_ram_base (*(phys_addr_t *)XIP_FIXUP(&phys_ram_base))
Jisheng Zhang805a3eb2021-12-06 23:03:53 +0800527extern char _xiprom[], _exiprom[], __data_loc;
528
Vitaly Wool44c92252021-04-13 02:35:14 -0400529/* called from head.S with MMU off */
530asmlinkage void __init __copy_data(void)
531{
Vitaly Woolf9ace4e2021-10-11 11:14:14 +0200532 void *from = (void *)(&__data_loc);
Vitaly Wool44c92252021-04-13 02:35:14 -0400533 void *to = (void *)CONFIG_PHYS_RAM_BASE;
Vitaly Woolf9ace4e2021-10-11 11:14:14 +0200534 size_t sz = (size_t)((uintptr_t)(&_end) - (uintptr_t)(&_sdata));
Vitaly Wool44c92252021-04-13 02:35:14 -0400535
536 memcpy(to, from, sz);
537}
538#endif
539
Alexandre Ghitie5c35fa02021-06-24 14:00:41 +0200540#ifdef CONFIG_STRICT_KERNEL_RWX
541static __init pgprot_t pgprot_from_va(uintptr_t va)
542{
543 if (is_va_kernel_text(va))
544 return PAGE_KERNEL_READ_EXEC;
545
546 /*
547 * In 64-bit kernel, the kernel mapping is outside the linear mapping so
548 * we must protect its linear mapping alias from being executed and
549 * written.
550 * And rodata section is marked readonly in mark_rodata_ro.
551 */
552 if (IS_ENABLED(CONFIG_64BIT) && is_va_kernel_lm_alias_text(va))
553 return PAGE_KERNEL_READ;
554
555 return PAGE_KERNEL;
556}
557
558void mark_rodata_ro(void)
559{
560 set_kernel_memory(__start_rodata, _data, set_memory_ro);
561 if (IS_ENABLED(CONFIG_64BIT))
562 set_kernel_memory(lm_alias(__start_rodata), lm_alias(_data),
563 set_memory_ro);
564
565 debug_checkwx();
566}
567#else
568static __init pgprot_t pgprot_from_va(uintptr_t va)
569{
570 if (IS_ENABLED(CONFIG_64BIT) && !is_kernel_mapping(va))
571 return PAGE_KERNEL;
572
573 return PAGE_KERNEL_EXEC;
574}
575#endif /* CONFIG_STRICT_KERNEL_RWX */
576
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100577#ifdef CONFIG_64BIT
578static void __init disable_pgtable_l4(void)
579{
580 pgtable_l4_enabled = false;
581 kernel_map.page_offset = PAGE_OFFSET_L3;
582 satp_mode = SATP_MODE_39;
583}
584
585/*
586 * There is a simple way to determine if 4-level is supported by the
587 * underlying hardware: establish 1:1 mapping in 4-level page table mode
588 * then read SATP to see if the configuration was taken into account
589 * meaning sv48 is supported.
590 */
591static __init void set_satp_mode(void)
592{
593 u64 identity_satp, hw_satp;
594 uintptr_t set_satp_mode_pmd;
595
596 set_satp_mode_pmd = ((unsigned long)set_satp_mode) & PMD_MASK;
597 create_pgd_mapping(early_pg_dir,
598 set_satp_mode_pmd, (uintptr_t)early_pud,
599 PGDIR_SIZE, PAGE_TABLE);
600 create_pud_mapping(early_pud,
601 set_satp_mode_pmd, (uintptr_t)early_pmd,
602 PUD_SIZE, PAGE_TABLE);
603 /* Handle the case where set_satp_mode straddles 2 PMDs */
604 create_pmd_mapping(early_pmd,
605 set_satp_mode_pmd, set_satp_mode_pmd,
606 PMD_SIZE, PAGE_KERNEL_EXEC);
607 create_pmd_mapping(early_pmd,
608 set_satp_mode_pmd + PMD_SIZE,
609 set_satp_mode_pmd + PMD_SIZE,
610 PMD_SIZE, PAGE_KERNEL_EXEC);
611
612 identity_satp = PFN_DOWN((uintptr_t)&early_pg_dir) | satp_mode;
613
614 local_flush_tlb_all();
615 csr_write(CSR_SATP, identity_satp);
616 hw_satp = csr_swap(CSR_SATP, 0ULL);
617 local_flush_tlb_all();
618
619 if (hw_satp != identity_satp)
620 disable_pgtable_l4();
621
622 memset(early_pg_dir, 0, PAGE_SIZE);
623 memset(early_pud, 0, PAGE_SIZE);
624 memset(early_pmd, 0, PAGE_SIZE);
625}
626#endif
627
Anup Patel387181d2019-03-26 08:03:47 +0000628/*
629 * setup_vm() is called from head.S with MMU-off.
630 *
631 * Following requirements should be honoured for setup_vm() to work
632 * correctly:
633 * 1) It should use PC-relative addressing for accessing kernel symbols.
634 * To achieve this we always use GCC cmodel=medany.
635 * 2) The compiler instrumentation for FTRACE will not work for setup_vm()
636 * so disable compiler instrumentation when FTRACE is enabled.
637 *
638 * Currently, the above requirements are honoured by using custom CFLAGS
639 * for init.o in mm/Makefile.
640 */
641
642#ifndef __riscv_cmodel_medany
Paul Walmsley6a527b62019-10-17 14:45:58 -0700643#error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
Anup Patel387181d2019-03-26 08:03:47 +0000644#endif
645
Vitaly Wool44c92252021-04-13 02:35:14 -0400646#ifdef CONFIG_XIP_KERNEL
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200647static void __init create_kernel_page_table(pgd_t *pgdir,
Alexandre Ghitie5c35fa02021-06-24 14:00:41 +0200648 __always_unused bool early)
Vitaly Wool44c92252021-04-13 02:35:14 -0400649{
650 uintptr_t va, end_va;
651
652 /* Map the flash resident part */
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200653 end_va = kernel_map.virt_addr + kernel_map.xiprom_sz;
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200654 for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE)
Vitaly Wool44c92252021-04-13 02:35:14 -0400655 create_pgd_mapping(pgdir, va,
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200656 kernel_map.xiprom + (va - kernel_map.virt_addr),
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200657 PMD_SIZE, PAGE_KERNEL_EXEC);
Vitaly Wool44c92252021-04-13 02:35:14 -0400658
659 /* Map the data in RAM */
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200660 end_va = kernel_map.virt_addr + XIP_OFFSET + kernel_map.size;
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200661 for (va = kernel_map.virt_addr + XIP_OFFSET; va < end_va; va += PMD_SIZE)
Vitaly Wool44c92252021-04-13 02:35:14 -0400662 create_pgd_mapping(pgdir, va,
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200663 kernel_map.phys_addr + (va - (kernel_map.virt_addr + XIP_OFFSET)),
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200664 PMD_SIZE, PAGE_KERNEL);
Vitaly Wool44c92252021-04-13 02:35:14 -0400665}
666#else
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200667static void __init create_kernel_page_table(pgd_t *pgdir, bool early)
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400668{
669 uintptr_t va, end_va;
670
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200671 end_va = kernel_map.virt_addr + kernel_map.size;
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200672 for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE)
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400673 create_pgd_mapping(pgdir, va,
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200674 kernel_map.phys_addr + (va - kernel_map.virt_addr),
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200675 PMD_SIZE,
Alexandre Ghitie5c35fa02021-06-24 14:00:41 +0200676 early ?
677 PAGE_KERNEL_EXEC : pgprot_from_va(va));
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400678}
Vitaly Wool44c92252021-04-13 02:35:14 -0400679#endif
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400680
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200681/*
682 * Setup a 4MB mapping that encompasses the device tree: for 64-bit kernel,
683 * this means 2 PMD entries whereas for 32-bit kernel, this is only 1 PGDIR
684 * entry.
685 */
686static void __init create_fdt_early_page_table(pgd_t *pgdir, uintptr_t dtb_pa)
687{
688#ifndef CONFIG_BUILTIN_DTB
689 uintptr_t pa = dtb_pa & ~(PMD_SIZE - 1);
690
691 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100692 IS_ENABLED(CONFIG_64BIT) ? early_dtb_pgd_next : pa,
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200693 PGDIR_SIZE,
694 IS_ENABLED(CONFIG_64BIT) ? PAGE_TABLE : PAGE_KERNEL);
695
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100696 if (pgtable_l4_enabled) {
697 create_pud_mapping(early_dtb_pud, DTB_EARLY_BASE_VA,
698 (uintptr_t)early_dtb_pmd, PUD_SIZE, PAGE_TABLE);
699 }
700
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200701 if (IS_ENABLED(CONFIG_64BIT)) {
702 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA,
703 pa, PMD_SIZE, PAGE_KERNEL);
704 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE,
705 pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
706 }
707
708 dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1));
709#else
710 /*
711 * For 64-bit kernel, __va can't be used since it would return a linear
712 * mapping address whereas dtb_early_va will be used before
713 * setup_vm_final installs the linear mapping. For 32-bit kernel, as the
714 * kernel is mapped in the linear mapping, that makes no difference.
715 */
716 dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa));
717#endif
718
719 dtb_early_pa = dtb_pa;
720}
721
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100722/*
723 * MMU is not enabled, the page tables are allocated directly using
724 * early_pmd/pud/p4d and the address returned is the physical one.
725 */
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800726void __init pt_ops_set_early(void)
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100727{
728 pt_ops.alloc_pte = alloc_pte_early;
729 pt_ops.get_pte_virt = get_pte_virt_early;
730#ifndef __PAGETABLE_PMD_FOLDED
731 pt_ops.alloc_pmd = alloc_pmd_early;
732 pt_ops.get_pmd_virt = get_pmd_virt_early;
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100733 pt_ops.alloc_pud = alloc_pud_early;
734 pt_ops.get_pud_virt = get_pud_virt_early;
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100735#endif
736}
737
738/*
739 * MMU is enabled but page table setup is not complete yet.
740 * fixmap page table alloc functions must be used as a means to temporarily
741 * map the allocated physical pages since the linear mapping does not exist yet.
742 *
743 * Note that this is called with MMU disabled, hence kernel_mapping_pa_to_va,
744 * but it will be used as described above.
745 */
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800746void __init pt_ops_set_fixmap(void)
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100747{
748 pt_ops.alloc_pte = kernel_mapping_pa_to_va((uintptr_t)alloc_pte_fixmap);
749 pt_ops.get_pte_virt = kernel_mapping_pa_to_va((uintptr_t)get_pte_virt_fixmap);
750#ifndef __PAGETABLE_PMD_FOLDED
751 pt_ops.alloc_pmd = kernel_mapping_pa_to_va((uintptr_t)alloc_pmd_fixmap);
752 pt_ops.get_pmd_virt = kernel_mapping_pa_to_va((uintptr_t)get_pmd_virt_fixmap);
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100753 pt_ops.alloc_pud = kernel_mapping_pa_to_va((uintptr_t)alloc_pud_fixmap);
754 pt_ops.get_pud_virt = kernel_mapping_pa_to_va((uintptr_t)get_pud_virt_fixmap);
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100755#endif
756}
757
758/*
759 * MMU is enabled and page table setup is complete, so from now, we can use
760 * generic page allocation functions to setup page table.
761 */
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800762void __init pt_ops_set_late(void)
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100763{
764 pt_ops.alloc_pte = alloc_pte_late;
765 pt_ops.get_pte_virt = get_pte_virt_late;
766#ifndef __PAGETABLE_PMD_FOLDED
767 pt_ops.alloc_pmd = alloc_pmd_late;
768 pt_ops.get_pmd_virt = get_pmd_virt_late;
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100769 pt_ops.alloc_pud = alloc_pud_late;
770 pt_ops.get_pud_virt = get_pud_virt_late;
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100771#endif
772}
773
Anup Patel671f9a32019-06-28 13:36:21 -0700774asmlinkage void __init setup_vm(uintptr_t dtb_pa)
Anup Patel6f1e9e92019-02-13 16:38:36 +0530775{
Alexandre Ghiti6f3e5fd2021-07-23 15:01:26 +0200776 pmd_t __maybe_unused fix_bmap_spmd, fix_bmap_epmd;
Anup Patel6f1e9e92019-02-13 16:38:36 +0530777
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200778 kernel_map.virt_addr = KERNEL_LINK_ADDR;
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100779 kernel_map.page_offset = _AC(CONFIG_PAGE_OFFSET, UL);
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200780
Vitaly Wool44c92252021-04-13 02:35:14 -0400781#ifdef CONFIG_XIP_KERNEL
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200782 kernel_map.xiprom = (uintptr_t)CONFIG_XIP_PHYS_ADDR;
783 kernel_map.xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom);
Vitaly Wool44c92252021-04-13 02:35:14 -0400784
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +0200785 phys_ram_base = CONFIG_PHYS_RAM_BASE;
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200786 kernel_map.phys_addr = (uintptr_t)CONFIG_PHYS_RAM_BASE;
787 kernel_map.size = (uintptr_t)(&_end) - (uintptr_t)(&_sdata);
Vitaly Wool44c92252021-04-13 02:35:14 -0400788
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200789 kernel_map.va_kernel_xip_pa_offset = kernel_map.virt_addr - kernel_map.xiprom;
Vitaly Wool44c92252021-04-13 02:35:14 -0400790#else
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200791 kernel_map.phys_addr = (uintptr_t)(&_start);
792 kernel_map.size = (uintptr_t)(&_end) - kernel_map.phys_addr;
Vitaly Wool44c92252021-04-13 02:35:14 -0400793#endif
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100794
795#if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
796 set_satp_mode();
797#endif
798
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200799 kernel_map.va_pa_offset = PAGE_OFFSET - kernel_map.phys_addr;
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200800 kernel_map.va_kernel_pa_offset = kernel_map.virt_addr - kernel_map.phys_addr;
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400801
Kenneth Leefb31f0a2021-07-28 15:15:57 +0800802 riscv_pfn_base = PFN_DOWN(kernel_map.phys_addr);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530803
Alexandre Ghitif7ae0232021-12-06 11:46:45 +0100804 /*
805 * The default maximal physical memory size is KERN_VIRT_SIZE for 32-bit
806 * kernel, whereas for 64-bit kernel, the end of the virtual address
807 * space is occupied by the modules/BPF/kernel mappings which reduces
808 * the available size of the linear mapping.
809 */
810 memory_limit = KERN_VIRT_SIZE - (IS_ENABLED(CONFIG_64BIT) ? SZ_4G : 0);
811
Anup Patel6f1e9e92019-02-13 16:38:36 +0530812 /* Sanity check alignment and size */
813 BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200814 BUG_ON((kernel_map.phys_addr % PMD_SIZE) != 0);
Anup Patel671f9a32019-06-28 13:36:21 -0700815
Alexandre Ghitidb6b84a2021-06-29 11:13:48 +0200816#ifdef CONFIG_64BIT
817 /*
818 * The last 4K bytes of the addressable memory can not be mapped because
819 * of IS_ERR_VALUE macro.
820 */
821 BUG_ON((kernel_map.virt_addr + kernel_map.size) > ADDRESS_SPACE_END - SZ_4K);
Atish Patrae8dcb612020-09-17 15:37:12 -0700822#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700823
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100824 pt_ops_set_early();
825
Anup Patel6f1e9e92019-02-13 16:38:36 +0530826 /* Setup early PGD for fixmap */
827 create_pgd_mapping(early_pg_dir, FIXADDR_START,
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100828 fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530829
830#ifndef __PAGETABLE_PMD_FOLDED
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100831 /* Setup fixmap PUD and PMD */
832 if (pgtable_l4_enabled)
833 create_pud_mapping(fixmap_pud, FIXADDR_START,
834 (uintptr_t)fixmap_pmd, PUD_SIZE, PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700835 create_pmd_mapping(fixmap_pmd, FIXADDR_START,
836 (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
837 /* Setup trampoline PGD and PMD */
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200838 create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr,
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100839 trampoline_pgd_next, PGDIR_SIZE, PAGE_TABLE);
840 if (pgtable_l4_enabled)
841 create_pud_mapping(trampoline_pud, kernel_map.virt_addr,
842 (uintptr_t)trampoline_pmd, PUD_SIZE, PAGE_TABLE);
Vitaly Wool44c92252021-04-13 02:35:14 -0400843#ifdef CONFIG_XIP_KERNEL
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200844 create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr,
845 kernel_map.xiprom, PMD_SIZE, PAGE_KERNEL_EXEC);
Vitaly Wool44c92252021-04-13 02:35:14 -0400846#else
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200847 create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr,
848 kernel_map.phys_addr, PMD_SIZE, PAGE_KERNEL_EXEC);
Vitaly Wool44c92252021-04-13 02:35:14 -0400849#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530850#else
Anup Patel671f9a32019-06-28 13:36:21 -0700851 /* Setup trampoline PGD */
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200852 create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr,
853 kernel_map.phys_addr, PGDIR_SIZE, PAGE_KERNEL_EXEC);
Anup Patel671f9a32019-06-28 13:36:21 -0700854#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530855
Anup Patel671f9a32019-06-28 13:36:21 -0700856 /*
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400857 * Setup early PGD covering entire kernel which will allow
Anup Patel671f9a32019-06-28 13:36:21 -0700858 * us to reach paging_init(). We map all memory banks later
859 * in setup_vm_final() below.
860 */
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200861 create_kernel_page_table(early_pg_dir, true);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530862
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200863 /* Setup early mapping for FDT early scan */
864 create_fdt_early_page_table(early_pg_dir, dtb_pa);
Atish Patra6262f662020-09-17 15:37:11 -0700865
866 /*
867 * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
868 * range can not span multiple pmds.
869 */
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100870 BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
Atish Patra6262f662020-09-17 15:37:11 -0700871 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
872
873#ifndef __PAGETABLE_PMD_FOLDED
874 /*
875 * Early ioremap fixmap is already created as it lies within first 2MB
876 * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END
877 * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn
878 * the user if not.
879 */
880 fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))];
881 fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))];
882 if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) {
883 WARN_ON(1);
884 pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n",
885 pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd));
886 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
887 fix_to_virt(FIX_BTMAP_BEGIN));
888 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
889 fix_to_virt(FIX_BTMAP_END));
890
891 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
892 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
893 }
894#endif
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100895
896 pt_ops_set_fixmap();
Anup Patel671f9a32019-06-28 13:36:21 -0700897}
898
899static void __init setup_vm_final(void)
900{
901 uintptr_t va, map_size;
902 phys_addr_t pa, start, end;
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700903 u64 i;
Anup Patel671f9a32019-06-28 13:36:21 -0700904
Anup Patel671f9a32019-06-28 13:36:21 -0700905 /* Setup swapper PGD for fixmap */
906 create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
Zong Liac51e002020-01-02 11:12:40 +0800907 __pa_symbol(fixmap_pgd_next),
Anup Patel671f9a32019-06-28 13:36:21 -0700908 PGDIR_SIZE, PAGE_TABLE);
909
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400910 /* Map all memory banks in the linear mapping */
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700911 for_each_mem_range(i, &start, &end) {
Anup Patel671f9a32019-06-28 13:36:21 -0700912 if (start >= end)
913 break;
Anup Patel671f9a32019-06-28 13:36:21 -0700914 if (start <= __pa(PAGE_OFFSET) &&
915 __pa(PAGE_OFFSET) < end)
916 start = __pa(PAGE_OFFSET);
Alexandre Ghitic99127c2021-06-29 11:13:47 +0200917 if (end >= __pa(PAGE_OFFSET) + memory_limit)
918 end = __pa(PAGE_OFFSET) + memory_limit;
Anup Patel671f9a32019-06-28 13:36:21 -0700919
920 map_size = best_map_size(start, end - start);
921 for (pa = start; pa < end; pa += map_size) {
922 va = (uintptr_t)__va(pa);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400923
Alexandre Ghitie5c35fa02021-06-24 14:00:41 +0200924 create_pgd_mapping(swapper_pg_dir, va, pa, map_size,
925 pgprot_from_va(va));
Anup Patel671f9a32019-06-28 13:36:21 -0700926 }
Anup Patel6f1e9e92019-02-13 16:38:36 +0530927 }
Anup Patelf2c17aa2019-01-07 20:57:01 +0530928
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400929 /* Map the kernel */
Jisheng Zhang07aabe82021-12-06 23:03:50 +0800930 if (IS_ENABLED(CONFIG_64BIT))
931 create_kernel_page_table(swapper_pg_dir, false);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400932
Alexandre Ghiti2efad172021-12-06 11:46:46 +0100933#ifdef CONFIG_KASAN
934 kasan_swapper_init();
935#endif
936
Anup Patel671f9a32019-06-28 13:36:21 -0700937 /* Clear fixmap PTE and PMD mappings */
938 clear_fixmap(FIX_PTE);
939 clear_fixmap(FIX_PMD);
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100940 clear_fixmap(FIX_PUD);
Anup Patel671f9a32019-06-28 13:36:21 -0700941
942 /* Move to swapper page table */
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100943 csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | satp_mode);
Anup Patel671f9a32019-06-28 13:36:21 -0700944 local_flush_tlb_all();
Atish Patrae8dcb612020-09-17 15:37:12 -0700945
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100946 pt_ops_set_late();
Anup Patel671f9a32019-06-28 13:36:21 -0700947}
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100948#else
949asmlinkage void __init setup_vm(uintptr_t dtb_pa)
950{
951 dtb_early_va = (void *)dtb_pa;
Atish Patraa78c6f52020-10-01 12:04:56 -0700952 dtb_early_pa = dtb_pa;
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100953}
954
955static inline void setup_vm_final(void)
956{
957}
958#endif /* CONFIG_MMU */
Anup Patel671f9a32019-06-28 13:36:21 -0700959
Nick Kossifidise53d2812021-04-19 03:55:38 +0300960#ifdef CONFIG_KEXEC_CORE
961/*
962 * reserve_crashkernel() - reserves memory for crash kernel
963 *
964 * This function reserves memory area given in "crashkernel=" kernel command
965 * line parameter. The memory reserved is used by dump capture kernel when
966 * primary kernel is crashing.
967 */
968static void __init reserve_crashkernel(void)
969{
970 unsigned long long crash_base = 0;
971 unsigned long long crash_size = 0;
972 unsigned long search_start = memblock_start_of_DRAM();
973 unsigned long search_end = memblock_end_of_DRAM();
974
975 int ret = 0;
976
Nick Kossifidis56409752021-04-19 03:55:39 +0300977 /*
978 * Don't reserve a region for a crash kernel on a crash kernel
979 * since it doesn't make much sense and we have limited memory
980 * resources.
981 */
Nick Kossifidis56409752021-04-19 03:55:39 +0300982 if (is_kdump_kernel()) {
983 pr_info("crashkernel: ignoring reservation request\n");
984 return;
985 }
Nick Kossifidis56409752021-04-19 03:55:39 +0300986
Nick Kossifidise53d2812021-04-19 03:55:38 +0300987 ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),
988 &crash_size, &crash_base);
989 if (ret || !crash_size)
990 return;
991
992 crash_size = PAGE_ALIGN(crash_size);
993
Mike Rapoporta7259df2021-09-02 15:00:26 -0700994 if (crash_base) {
995 search_start = crash_base;
996 search_end = crash_base + crash_size;
Nick Kossifidise53d2812021-04-19 03:55:38 +0300997 }
Mike Rapoporta7259df2021-09-02 15:00:26 -0700998
999 /*
1000 * Current riscv boot protocol requires 2MB alignment for
1001 * RV64 and 4MB alignment for RV32 (hugepage size)
Nick Kossifidisdecf89f2021-11-26 20:04:11 +02001002 *
1003 * Try to alloc from 32bit addressible physical memory so that
1004 * swiotlb can work on the crash kernel.
Mike Rapoporta7259df2021-09-02 15:00:26 -07001005 */
1006 crash_base = memblock_phys_alloc_range(crash_size, PMD_SIZE,
Nick Kossifidisdecf89f2021-11-26 20:04:11 +02001007 search_start,
1008 min(search_end, (unsigned long) SZ_4G));
Mike Rapoporta7259df2021-09-02 15:00:26 -07001009 if (crash_base == 0) {
Nick Kossifidisdecf89f2021-11-26 20:04:11 +02001010 /* Try again without restricting region to 32bit addressible memory */
1011 crash_base = memblock_phys_alloc_range(crash_size, PMD_SIZE,
1012 search_start, search_end);
1013 if (crash_base == 0) {
1014 pr_warn("crashkernel: couldn't allocate %lldKB\n",
1015 crash_size >> 10);
1016 return;
1017 }
Mike Rapoporta7259df2021-09-02 15:00:26 -07001018 }
Nick Kossifidise53d2812021-04-19 03:55:38 +03001019
1020 pr_info("crashkernel: reserved 0x%016llx - 0x%016llx (%lld MB)\n",
1021 crash_base, crash_base + crash_size, crash_size >> 20);
1022
1023 crashk_res.start = crash_base;
1024 crashk_res.end = crash_base + crash_size - 1;
1025}
1026#endif /* CONFIG_KEXEC_CORE */
1027
Anup Patel671f9a32019-06-28 13:36:21 -07001028void __init paging_init(void)
1029{
Kefeng Wangf842f5f2021-05-10 19:42:22 +08001030 setup_bootmem();
Anup Patel671f9a32019-06-28 13:36:21 -07001031 setup_vm_final();
Atish Patracbd34f42020-11-18 16:38:27 -08001032}
1033
1034void __init misc_mem_init(void)
1035{
Kefeng Wangf6e5aed2021-02-25 14:54:17 +08001036 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
Atish Patra4f0e8ee2020-11-18 16:38:29 -08001037 arch_numa_init();
Atish Patracbd34f42020-11-18 16:38:27 -08001038 sparse_init();
Anup Patel671f9a32019-06-28 13:36:21 -07001039 zone_sizes_init();
Nick Kossifidise53d2812021-04-19 03:55:38 +03001040#ifdef CONFIG_KEXEC_CORE
1041 reserve_crashkernel();
1042#endif
Atish Patra4f0e8ee2020-11-18 16:38:29 -08001043 memblock_dump_all();
Anup Patel6f1e9e92019-02-13 16:38:36 +05301044}
Logan Gunthorped95f1a52019-08-28 15:40:54 -06001045
Kefeng Wang9fe57d82019-10-23 11:23:02 +08001046#ifdef CONFIG_SPARSEMEM_VMEMMAP
Logan Gunthorped95f1a52019-08-28 15:40:54 -06001047int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
1048 struct vmem_altmap *altmap)
1049{
Anshuman Khandual1d9cfee2020-08-06 23:23:19 -07001050 return vmemmap_populate_basepages(start, end, node, NULL);
Logan Gunthorped95f1a52019-08-28 15:40:54 -06001051}
1052#endif