Thomas Gleixner | 50acfb2 | 2019-05-29 07:18:00 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2012 Regents of the University of California |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 4 | * Copyright (C) 2019 Western Digital Corporation or its affiliates. |
Nick Kossifidis | e53d281 | 2021-04-19 03:55:38 +0300 | [diff] [blame] | 5 | * Copyright (C) 2020 FORTH-ICS/CARV |
| 6 | * Nick Kossifidis <mick@ics.forth.gr> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <linux/init.h> |
| 10 | #include <linux/mm.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 11 | #include <linux/memblock.h> |
Mike Rapoport | 57c8a66 | 2018-10-30 15:09:49 -0700 | [diff] [blame] | 12 | #include <linux/initrd.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 13 | #include <linux/swap.h> |
Kefeng Wang | ce3aca0 | 2021-06-02 16:55:16 +0800 | [diff] [blame] | 14 | #include <linux/swiotlb.h> |
Christoph Hellwig | 5ec9c4f | 2018-01-16 09:37:50 +0100 | [diff] [blame] | 15 | #include <linux/sizes.h> |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 16 | #include <linux/of_fdt.h> |
Nick Kossifidis | 5640975 | 2021-04-19 03:55:39 +0300 | [diff] [blame] | 17 | #include <linux/of_reserved_mem.h> |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 18 | #include <linux/libfdt.h> |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 19 | #include <linux/set_memory.h> |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 20 | #include <linux/dma-map-ops.h> |
Nick Kossifidis | e53d281 | 2021-04-19 03:55:38 +0300 | [diff] [blame] | 21 | #include <linux/crash_dump.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 22 | |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 23 | #include <asm/fixmap.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 24 | #include <asm/tlbflush.h> |
| 25 | #include <asm/sections.h> |
Palmer Dabbelt | 2d26825 | 2020-04-14 13:43:24 +0900 | [diff] [blame] | 26 | #include <asm/soc.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 27 | #include <asm/io.h> |
Zong Li | b422d28 | 2020-06-03 16:03:55 -0700 | [diff] [blame] | 28 | #include <asm/ptdump.h> |
Atish Patra | 4f0e8ee | 2020-11-18 16:38:29 -0800 | [diff] [blame] | 29 | #include <asm/numa.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 30 | |
Paul Walmsley | ffaee27 | 2019-10-17 15:00:17 -0700 | [diff] [blame] | 31 | #include "../kernel/head.h" |
| 32 | |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 33 | struct kernel_mapping kernel_map __ro_after_init; |
| 34 | EXPORT_SYMBOL(kernel_map); |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 35 | #ifdef CONFIG_XIP_KERNEL |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 36 | #define kernel_map (*(struct kernel_mapping *)XIP_FIXUP(&kernel_map)) |
| 37 | #endif |
| 38 | |
| 39 | #ifdef CONFIG_XIP_KERNEL |
Kefeng Wang | 50bae95 | 2021-05-14 17:49:08 +0800 | [diff] [blame] | 40 | extern char _xiprom[], _exiprom[]; |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 41 | #endif |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 42 | |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 43 | unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] |
| 44 | __page_aligned_bss; |
| 45 | EXPORT_SYMBOL(empty_zero_page); |
| 46 | |
Anup Patel | d90d45d | 2019-06-07 06:01:29 +0000 | [diff] [blame] | 47 | extern char _start[]; |
Anup Patel | 8f3a2b4 | 2020-09-17 15:37:10 -0700 | [diff] [blame] | 48 | #define DTB_EARLY_BASE_VA PGDIR_SIZE |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 49 | void *_dtb_early_va __initdata; |
| 50 | uintptr_t _dtb_early_pa __initdata; |
Anup Patel | d90d45d | 2019-06-07 06:01:29 +0000 | [diff] [blame] | 51 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 52 | struct pt_alloc_ops { |
| 53 | pte_t *(*get_pte_virt)(phys_addr_t pa); |
| 54 | phys_addr_t (*alloc_pte)(uintptr_t va); |
| 55 | #ifndef __PAGETABLE_PMD_FOLDED |
| 56 | pmd_t *(*get_pmd_virt)(phys_addr_t pa); |
| 57 | phys_addr_t (*alloc_pmd)(uintptr_t va); |
| 58 | #endif |
| 59 | }; |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 60 | |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 61 | static phys_addr_t dma32_phys_limit __initdata; |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 62 | |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 63 | static void __init zone_sizes_init(void) |
| 64 | { |
Christoph Hellwig | 5ec9c4f | 2018-01-16 09:37:50 +0100 | [diff] [blame] | 65 | unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, }; |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 66 | |
Zong Li | d5fad48 | 2018-06-25 16:49:37 +0800 | [diff] [blame] | 67 | #ifdef CONFIG_ZONE_DMA32 |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 68 | max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit); |
Zong Li | d5fad48 | 2018-06-25 16:49:37 +0800 | [diff] [blame] | 69 | #endif |
Christoph Hellwig | 5ec9c4f | 2018-01-16 09:37:50 +0100 | [diff] [blame] | 70 | max_zone_pfns[ZONE_NORMAL] = max_low_pfn; |
| 71 | |
Mike Rapoport | 9691a07 | 2020-06-03 15:57:10 -0700 | [diff] [blame] | 72 | free_area_init(max_zone_pfns); |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 73 | } |
| 74 | |
Kefeng Wang | 8fa3cdf | 2020-05-14 19:53:35 +0800 | [diff] [blame] | 75 | #if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM) |
Yash Shah | 2cc6c4a | 2019-11-18 05:58:34 +0000 | [diff] [blame] | 76 | static inline void print_mlk(char *name, unsigned long b, unsigned long t) |
| 77 | { |
| 78 | pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t, |
| 79 | (((t) - (b)) >> 10)); |
| 80 | } |
| 81 | |
| 82 | static inline void print_mlm(char *name, unsigned long b, unsigned long t) |
| 83 | { |
| 84 | pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t, |
| 85 | (((t) - (b)) >> 20)); |
| 86 | } |
| 87 | |
Jisheng Zhang | 1987501 | 2021-03-30 02:22:21 +0800 | [diff] [blame] | 88 | static void __init print_vm_layout(void) |
Yash Shah | 2cc6c4a | 2019-11-18 05:58:34 +0000 | [diff] [blame] | 89 | { |
| 90 | pr_notice("Virtual kernel memory layout:\n"); |
| 91 | print_mlk("fixmap", (unsigned long)FIXADDR_START, |
| 92 | (unsigned long)FIXADDR_TOP); |
| 93 | print_mlm("pci io", (unsigned long)PCI_IO_START, |
| 94 | (unsigned long)PCI_IO_END); |
| 95 | print_mlm("vmemmap", (unsigned long)VMEMMAP_START, |
| 96 | (unsigned long)VMEMMAP_END); |
| 97 | print_mlm("vmalloc", (unsigned long)VMALLOC_START, |
| 98 | (unsigned long)VMALLOC_END); |
| 99 | print_mlm("lowmem", (unsigned long)PAGE_OFFSET, |
| 100 | (unsigned long)high_memory); |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 101 | #ifdef CONFIG_64BIT |
| 102 | print_mlm("kernel", (unsigned long)KERNEL_LINK_ADDR, |
| 103 | (unsigned long)ADDRESS_SPACE_END); |
| 104 | #endif |
Yash Shah | 2cc6c4a | 2019-11-18 05:58:34 +0000 | [diff] [blame] | 105 | } |
| 106 | #else |
| 107 | static void print_vm_layout(void) { } |
| 108 | #endif /* CONFIG_DEBUG_VM */ |
| 109 | |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 110 | void __init mem_init(void) |
| 111 | { |
| 112 | #ifdef CONFIG_FLATMEM |
| 113 | BUG_ON(!mem_map); |
| 114 | #endif /* CONFIG_FLATMEM */ |
| 115 | |
Kefeng Wang | ce3aca0 | 2021-06-02 16:55:16 +0800 | [diff] [blame] | 116 | #ifdef CONFIG_SWIOTLB |
| 117 | if (swiotlb_force == SWIOTLB_FORCE || |
| 118 | max_pfn > PFN_DOWN(dma32_phys_limit)) |
| 119 | swiotlb_init(1); |
| 120 | else |
| 121 | swiotlb_force = SWIOTLB_NO_FORCE; |
| 122 | #endif |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 123 | high_memory = (void *)(__va(PFN_PHYS(max_low_pfn))); |
Mike Rapoport | c6ffc5c | 2018-10-30 15:09:30 -0700 | [diff] [blame] | 124 | memblock_free_all(); |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 125 | |
Yash Shah | 2cc6c4a | 2019-11-18 05:58:34 +0000 | [diff] [blame] | 126 | print_vm_layout(); |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 127 | } |
| 128 | |
Kefeng Wang | c9811e3 | 2021-06-02 16:55:17 +0800 | [diff] [blame] | 129 | /* |
| 130 | * The default maximal physical memory size is -PAGE_OFFSET, |
| 131 | * limit the memory size via mem. |
| 132 | */ |
| 133 | static phys_addr_t memory_limit = -PAGE_OFFSET; |
| 134 | |
| 135 | static int __init early_mem(char *p) |
| 136 | { |
| 137 | u64 size; |
| 138 | |
| 139 | if (!p) |
| 140 | return 1; |
| 141 | |
| 142 | size = memparse(p, &p) & PAGE_MASK; |
| 143 | memory_limit = min_t(u64, size, memory_limit); |
| 144 | |
| 145 | pr_notice("Memory limited to %lldMB\n", (u64)memory_limit >> 20); |
| 146 | |
| 147 | return 0; |
| 148 | } |
| 149 | early_param("mem", early_mem); |
| 150 | |
Kefeng Wang | f842f5f | 2021-05-10 19:42:22 +0800 | [diff] [blame] | 151 | static void __init setup_bootmem(void) |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 152 | { |
Zong Li | ac51e00 | 2020-01-02 11:12:40 +0800 | [diff] [blame] | 153 | phys_addr_t vmlinux_end = __pa_symbol(&_end); |
| 154 | phys_addr_t vmlinux_start = __pa_symbol(&_start); |
Atish Patra | abb8e86 | 2021-01-11 15:45:02 -0800 | [diff] [blame] | 155 | phys_addr_t max_mapped_addr = __pa(~(ulong)0); |
Kefeng Wang | c9811e3 | 2021-06-02 16:55:17 +0800 | [diff] [blame] | 156 | phys_addr_t dram_end; |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 157 | |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 158 | #ifdef CONFIG_XIP_KERNEL |
| 159 | vmlinux_start = __pa_symbol(&_sdata); |
| 160 | #endif |
| 161 | |
Kefeng Wang | c9811e3 | 2021-06-02 16:55:17 +0800 | [diff] [blame] | 162 | memblock_enforce_memory_limit(memory_limit); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 163 | |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 164 | /* |
| 165 | * Reserve from the start of the kernel to the end of the kernel |
Geert Uytterhoeven | 8db6f93 | 2021-04-29 17:05:00 +0200 | [diff] [blame] | 166 | */ |
| 167 | #if defined(CONFIG_64BIT) && defined(CONFIG_STRICT_KERNEL_RWX) |
| 168 | /* |
| 169 | * Make sure we align the reservation on PMD_SIZE since we will |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 170 | * map the kernel in the linear mapping as read-only: we do not want |
| 171 | * any allocation to happen between _end and the next pmd aligned page. |
| 172 | */ |
Geert Uytterhoeven | 8db6f93 | 2021-04-29 17:05:00 +0200 | [diff] [blame] | 173 | vmlinux_end = (vmlinux_end + PMD_SIZE - 1) & PMD_MASK; |
| 174 | #endif |
| 175 | memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start); |
Anup Patel | d90d45d | 2019-06-07 06:01:29 +0000 | [diff] [blame] | 176 | |
Kefeng Wang | c9811e3 | 2021-06-02 16:55:17 +0800 | [diff] [blame] | 177 | dram_end = memblock_end_of_DRAM(); |
Atish Patra | abb8e86 | 2021-01-11 15:45:02 -0800 | [diff] [blame] | 178 | /* |
| 179 | * memblock allocator is not aware of the fact that last 4K bytes of |
| 180 | * the addressable memory can not be mapped because of IS_ERR_VALUE |
| 181 | * macro. Make sure that last 4k bytes are not usable by memblock |
| 182 | * if end of dram is equal to maximum addressable memory. |
| 183 | */ |
| 184 | if (max_mapped_addr == (dram_end - 1)) |
| 185 | memblock_set_current_limit(max_mapped_addr - 4096); |
| 186 | |
Kefeng Wang | f6e5aed | 2021-02-25 14:54:17 +0800 | [diff] [blame] | 187 | min_low_pfn = PFN_UP(memblock_start_of_DRAM()); |
| 188 | max_low_pfn = max_pfn = PFN_DOWN(dram_end); |
| 189 | |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 190 | dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn)); |
Guo Ren | 336e8eb | 2021-01-21 14:31:17 +0800 | [diff] [blame] | 191 | set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 192 | |
Kefeng Wang | aec33b5 | 2021-01-15 13:46:06 +0800 | [diff] [blame] | 193 | reserve_initrd_mem(); |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 194 | /* |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 195 | * If DTB is built in, no need to reserve its memblock. |
| 196 | * Otherwise, do reserve it but avoid using |
| 197 | * early_init_fdt_reserve_self() since __pa() does |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 198 | * not work for DTB pointers that are fixmap addresses |
| 199 | */ |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 200 | if (!IS_ENABLED(CONFIG_BUILTIN_DTB)) |
| 201 | memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va)); |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 202 | |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 203 | early_init_fdt_scan_reserved_mem(); |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 204 | dma_contiguous_reserve(dma32_phys_limit); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 205 | memblock_allow_resize(); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 206 | } |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 207 | |
Christoph Hellwig | 6bd33e1 | 2019-10-28 13:10:41 +0100 | [diff] [blame] | 208 | #ifdef CONFIG_MMU |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 209 | static struct pt_alloc_ops _pt_ops __initdata; |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 210 | |
| 211 | #ifdef CONFIG_XIP_KERNEL |
| 212 | #define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&_pt_ops)) |
| 213 | #else |
| 214 | #define pt_ops _pt_ops |
| 215 | #endif |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 216 | |
Jisheng Zhang | de31ea4 | 2021-03-30 02:22:51 +0800 | [diff] [blame] | 217 | unsigned long pfn_base __ro_after_init; |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 218 | EXPORT_SYMBOL(pfn_base); |
| 219 | |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 220 | pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 221 | pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss; |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 222 | static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 223 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 224 | pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE); |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 225 | |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 226 | #ifdef CONFIG_XIP_KERNEL |
| 227 | #define trampoline_pg_dir ((pgd_t *)XIP_FIXUP(trampoline_pg_dir)) |
| 228 | #define fixmap_pte ((pte_t *)XIP_FIXUP(fixmap_pte)) |
| 229 | #define early_pg_dir ((pgd_t *)XIP_FIXUP(early_pg_dir)) |
| 230 | #endif /* CONFIG_XIP_KERNEL */ |
| 231 | |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 232 | void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot) |
| 233 | { |
| 234 | unsigned long addr = __fix_to_virt(idx); |
| 235 | pte_t *ptep; |
| 236 | |
| 237 | BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); |
| 238 | |
| 239 | ptep = &fixmap_pte[pte_index(addr)]; |
| 240 | |
Greentime Hu | 21190b7 | 2020-08-04 11:02:05 +0800 | [diff] [blame] | 241 | if (pgprot_val(prot)) |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 242 | set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot)); |
Greentime Hu | 21190b7 | 2020-08-04 11:02:05 +0800 | [diff] [blame] | 243 | else |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 244 | pte_clear(&init_mm, addr, ptep); |
Greentime Hu | 21190b7 | 2020-08-04 11:02:05 +0800 | [diff] [blame] | 245 | local_flush_tlb_page(addr); |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 246 | } |
| 247 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 248 | static inline pte_t *__init get_pte_virt_early(phys_addr_t pa) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 249 | { |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 250 | return (pte_t *)((uintptr_t)pa); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 251 | } |
| 252 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 253 | static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa) |
| 254 | { |
| 255 | clear_fixmap(FIX_PTE); |
| 256 | return (pte_t *)set_fixmap_offset(FIX_PTE, pa); |
| 257 | } |
| 258 | |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 259 | static inline pte_t *__init get_pte_virt_late(phys_addr_t pa) |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 260 | { |
| 261 | return (pte_t *) __va(pa); |
| 262 | } |
| 263 | |
| 264 | static inline phys_addr_t __init alloc_pte_early(uintptr_t va) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 265 | { |
| 266 | /* |
| 267 | * We only create PMD or PGD early mappings so we |
| 268 | * should never reach here with MMU disabled. |
| 269 | */ |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 270 | BUG(); |
| 271 | } |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 272 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 273 | static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va) |
| 274 | { |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 275 | return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); |
| 276 | } |
| 277 | |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 278 | static phys_addr_t __init alloc_pte_late(uintptr_t va) |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 279 | { |
| 280 | unsigned long vaddr; |
| 281 | |
| 282 | vaddr = __get_free_page(GFP_KERNEL); |
zhouchuangao | e75e6bf | 2021-03-30 06:56:26 -0700 | [diff] [blame] | 283 | BUG_ON(!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr))); |
| 284 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 285 | return __pa(vaddr); |
| 286 | } |
| 287 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 288 | static void __init create_pte_mapping(pte_t *ptep, |
| 289 | uintptr_t va, phys_addr_t pa, |
| 290 | phys_addr_t sz, pgprot_t prot) |
| 291 | { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 292 | uintptr_t pte_idx = pte_index(va); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 293 | |
| 294 | BUG_ON(sz != PAGE_SIZE); |
| 295 | |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 296 | if (pte_none(ptep[pte_idx])) |
| 297 | ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 298 | } |
| 299 | |
| 300 | #ifndef __PAGETABLE_PMD_FOLDED |
| 301 | |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 302 | static pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss; |
| 303 | static pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss; |
| 304 | static pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE); |
| 305 | static pmd_t early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 306 | |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 307 | #ifdef CONFIG_XIP_KERNEL |
| 308 | #define trampoline_pmd ((pmd_t *)XIP_FIXUP(trampoline_pmd)) |
| 309 | #define fixmap_pmd ((pmd_t *)XIP_FIXUP(fixmap_pmd)) |
| 310 | #define early_pmd ((pmd_t *)XIP_FIXUP(early_pmd)) |
| 311 | #endif /* CONFIG_XIP_KERNEL */ |
| 312 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 313 | static pmd_t *__init get_pmd_virt_early(phys_addr_t pa) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 314 | { |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 315 | /* Before MMU is enabled */ |
| 316 | return (pmd_t *)((uintptr_t)pa); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 317 | } |
| 318 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 319 | static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa) |
| 320 | { |
| 321 | clear_fixmap(FIX_PMD); |
| 322 | return (pmd_t *)set_fixmap_offset(FIX_PMD, pa); |
| 323 | } |
| 324 | |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 325 | static pmd_t *__init get_pmd_virt_late(phys_addr_t pa) |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 326 | { |
| 327 | return (pmd_t *) __va(pa); |
| 328 | } |
| 329 | |
| 330 | static phys_addr_t __init alloc_pmd_early(uintptr_t va) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 331 | { |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 332 | BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 333 | |
Alexandre Ghiti | 0f02de4 | 2021-02-21 09:22:33 -0500 | [diff] [blame] | 334 | return (uintptr_t)early_pmd; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 335 | } |
| 336 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 337 | static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va) |
| 338 | { |
| 339 | return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); |
| 340 | } |
| 341 | |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 342 | static phys_addr_t __init alloc_pmd_late(uintptr_t va) |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 343 | { |
| 344 | unsigned long vaddr; |
| 345 | |
| 346 | vaddr = __get_free_page(GFP_KERNEL); |
| 347 | BUG_ON(!vaddr); |
| 348 | return __pa(vaddr); |
| 349 | } |
| 350 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 351 | static void __init create_pmd_mapping(pmd_t *pmdp, |
| 352 | uintptr_t va, phys_addr_t pa, |
| 353 | phys_addr_t sz, pgprot_t prot) |
| 354 | { |
| 355 | pte_t *ptep; |
| 356 | phys_addr_t pte_phys; |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 357 | uintptr_t pmd_idx = pmd_index(va); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 358 | |
| 359 | if (sz == PMD_SIZE) { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 360 | if (pmd_none(pmdp[pmd_idx])) |
| 361 | pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 362 | return; |
| 363 | } |
| 364 | |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 365 | if (pmd_none(pmdp[pmd_idx])) { |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 366 | pte_phys = pt_ops.alloc_pte(va); |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 367 | pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE); |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 368 | ptep = pt_ops.get_pte_virt(pte_phys); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 369 | memset(ptep, 0, PAGE_SIZE); |
| 370 | } else { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 371 | pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx])); |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 372 | ptep = pt_ops.get_pte_virt(pte_phys); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 373 | } |
| 374 | |
| 375 | create_pte_mapping(ptep, va, pa, sz, prot); |
| 376 | } |
| 377 | |
| 378 | #define pgd_next_t pmd_t |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 379 | #define alloc_pgd_next(__va) pt_ops.alloc_pmd(__va) |
| 380 | #define get_pgd_next_virt(__pa) pt_ops.get_pmd_virt(__pa) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 381 | #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \ |
| 382 | create_pmd_mapping(__nextp, __va, __pa, __sz, __prot) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 383 | #define fixmap_pgd_next fixmap_pmd |
| 384 | #else |
| 385 | #define pgd_next_t pte_t |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 386 | #define alloc_pgd_next(__va) pt_ops.alloc_pte(__va) |
| 387 | #define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 388 | #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \ |
| 389 | create_pte_mapping(__nextp, __va, __pa, __sz, __prot) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 390 | #define fixmap_pgd_next fixmap_pte |
| 391 | #endif |
| 392 | |
Atish Patra | b91540d | 2020-09-17 15:37:15 -0700 | [diff] [blame] | 393 | void __init create_pgd_mapping(pgd_t *pgdp, |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 394 | uintptr_t va, phys_addr_t pa, |
| 395 | phys_addr_t sz, pgprot_t prot) |
| 396 | { |
| 397 | pgd_next_t *nextp; |
| 398 | phys_addr_t next_phys; |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 399 | uintptr_t pgd_idx = pgd_index(va); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 400 | |
| 401 | if (sz == PGDIR_SIZE) { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 402 | if (pgd_val(pgdp[pgd_idx]) == 0) |
| 403 | pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 404 | return; |
| 405 | } |
| 406 | |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 407 | if (pgd_val(pgdp[pgd_idx]) == 0) { |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 408 | next_phys = alloc_pgd_next(va); |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 409 | pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 410 | nextp = get_pgd_next_virt(next_phys); |
| 411 | memset(nextp, 0, PAGE_SIZE); |
| 412 | } else { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 413 | next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx])); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 414 | nextp = get_pgd_next_virt(next_phys); |
| 415 | } |
| 416 | |
| 417 | create_pgd_next_mapping(nextp, va, pa, sz, prot); |
| 418 | } |
| 419 | |
| 420 | static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size) |
| 421 | { |
Zong Li | 0fdc636 | 2019-11-08 01:00:40 -0800 | [diff] [blame] | 422 | /* Upgrade to PMD_SIZE mappings whenever possible */ |
| 423 | if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1))) |
| 424 | return PAGE_SIZE; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 425 | |
Zong Li | 0fdc636 | 2019-11-08 01:00:40 -0800 | [diff] [blame] | 426 | return PMD_SIZE; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 427 | } |
| 428 | |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 429 | #ifdef CONFIG_XIP_KERNEL |
| 430 | /* called from head.S with MMU off */ |
| 431 | asmlinkage void __init __copy_data(void) |
| 432 | { |
| 433 | void *from = (void *)(&_sdata); |
| 434 | void *end = (void *)(&_end); |
| 435 | void *to = (void *)CONFIG_PHYS_RAM_BASE; |
| 436 | size_t sz = (size_t)(end - from + 1); |
| 437 | |
| 438 | memcpy(to, from, sz); |
| 439 | } |
| 440 | #endif |
| 441 | |
Alexandre Ghiti | e5c35fa0 | 2021-06-24 14:00:41 +0200 | [diff] [blame] | 442 | #ifdef CONFIG_STRICT_KERNEL_RWX |
| 443 | static __init pgprot_t pgprot_from_va(uintptr_t va) |
| 444 | { |
| 445 | if (is_va_kernel_text(va)) |
| 446 | return PAGE_KERNEL_READ_EXEC; |
| 447 | |
| 448 | /* |
| 449 | * In 64-bit kernel, the kernel mapping is outside the linear mapping so |
| 450 | * we must protect its linear mapping alias from being executed and |
| 451 | * written. |
| 452 | * And rodata section is marked readonly in mark_rodata_ro. |
| 453 | */ |
| 454 | if (IS_ENABLED(CONFIG_64BIT) && is_va_kernel_lm_alias_text(va)) |
| 455 | return PAGE_KERNEL_READ; |
| 456 | |
| 457 | return PAGE_KERNEL; |
| 458 | } |
| 459 | |
| 460 | void mark_rodata_ro(void) |
| 461 | { |
| 462 | set_kernel_memory(__start_rodata, _data, set_memory_ro); |
| 463 | if (IS_ENABLED(CONFIG_64BIT)) |
| 464 | set_kernel_memory(lm_alias(__start_rodata), lm_alias(_data), |
| 465 | set_memory_ro); |
| 466 | |
| 467 | debug_checkwx(); |
| 468 | } |
| 469 | #else |
| 470 | static __init pgprot_t pgprot_from_va(uintptr_t va) |
| 471 | { |
| 472 | if (IS_ENABLED(CONFIG_64BIT) && !is_kernel_mapping(va)) |
| 473 | return PAGE_KERNEL; |
| 474 | |
| 475 | return PAGE_KERNEL_EXEC; |
| 476 | } |
| 477 | #endif /* CONFIG_STRICT_KERNEL_RWX */ |
| 478 | |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 479 | /* |
| 480 | * setup_vm() is called from head.S with MMU-off. |
| 481 | * |
| 482 | * Following requirements should be honoured for setup_vm() to work |
| 483 | * correctly: |
| 484 | * 1) It should use PC-relative addressing for accessing kernel symbols. |
| 485 | * To achieve this we always use GCC cmodel=medany. |
| 486 | * 2) The compiler instrumentation for FTRACE will not work for setup_vm() |
| 487 | * so disable compiler instrumentation when FTRACE is enabled. |
| 488 | * |
| 489 | * Currently, the above requirements are honoured by using custom CFLAGS |
| 490 | * for init.o in mm/Makefile. |
| 491 | */ |
| 492 | |
| 493 | #ifndef __riscv_cmodel_medany |
Paul Walmsley | 6a527b6 | 2019-10-17 14:45:58 -0700 | [diff] [blame] | 494 | #error "setup_vm() is called from head.S before relocate so it should not use absolute addressing." |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 495 | #endif |
| 496 | |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 497 | #ifdef CONFIG_XIP_KERNEL |
Alexandre Ghiti | 526f83d | 2021-07-23 15:01:25 +0200 | [diff] [blame] | 498 | static void __init create_kernel_page_table(pgd_t *pgdir, |
Alexandre Ghiti | e5c35fa0 | 2021-06-24 14:00:41 +0200 | [diff] [blame] | 499 | __always_unused bool early) |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 500 | { |
| 501 | uintptr_t va, end_va; |
| 502 | |
| 503 | /* Map the flash resident part */ |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 504 | end_va = kernel_map.virt_addr + kernel_map.xiprom_sz; |
Alexandre Ghiti | 526f83d | 2021-07-23 15:01:25 +0200 | [diff] [blame] | 505 | for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE) |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 506 | create_pgd_mapping(pgdir, va, |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 507 | kernel_map.xiprom + (va - kernel_map.virt_addr), |
Alexandre Ghiti | 526f83d | 2021-07-23 15:01:25 +0200 | [diff] [blame] | 508 | PMD_SIZE, PAGE_KERNEL_EXEC); |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 509 | |
| 510 | /* Map the data in RAM */ |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 511 | end_va = kernel_map.virt_addr + XIP_OFFSET + kernel_map.size; |
Alexandre Ghiti | 526f83d | 2021-07-23 15:01:25 +0200 | [diff] [blame] | 512 | for (va = kernel_map.virt_addr + XIP_OFFSET; va < end_va; va += PMD_SIZE) |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 513 | create_pgd_mapping(pgdir, va, |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 514 | kernel_map.phys_addr + (va - (kernel_map.virt_addr + XIP_OFFSET)), |
Alexandre Ghiti | 526f83d | 2021-07-23 15:01:25 +0200 | [diff] [blame] | 515 | PMD_SIZE, PAGE_KERNEL); |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 516 | } |
| 517 | #else |
Alexandre Ghiti | 526f83d | 2021-07-23 15:01:25 +0200 | [diff] [blame] | 518 | static void __init create_kernel_page_table(pgd_t *pgdir, bool early) |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 519 | { |
| 520 | uintptr_t va, end_va; |
| 521 | |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 522 | end_va = kernel_map.virt_addr + kernel_map.size; |
Alexandre Ghiti | 526f83d | 2021-07-23 15:01:25 +0200 | [diff] [blame] | 523 | for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE) |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 524 | create_pgd_mapping(pgdir, va, |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 525 | kernel_map.phys_addr + (va - kernel_map.virt_addr), |
Alexandre Ghiti | 526f83d | 2021-07-23 15:01:25 +0200 | [diff] [blame] | 526 | PMD_SIZE, |
Alexandre Ghiti | e5c35fa0 | 2021-06-24 14:00:41 +0200 | [diff] [blame] | 527 | early ? |
| 528 | PAGE_KERNEL_EXEC : pgprot_from_va(va)); |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 529 | } |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 530 | #endif |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 531 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 532 | asmlinkage void __init setup_vm(uintptr_t dtb_pa) |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 533 | { |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 534 | uintptr_t __maybe_unused pa; |
Alexandre Ghiti | 6f3e5fd | 2021-07-23 15:01:26 +0200 | [diff] [blame^] | 535 | pmd_t __maybe_unused fix_bmap_spmd, fix_bmap_epmd; |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 536 | |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 537 | kernel_map.virt_addr = KERNEL_LINK_ADDR; |
| 538 | |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 539 | #ifdef CONFIG_XIP_KERNEL |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 540 | kernel_map.xiprom = (uintptr_t)CONFIG_XIP_PHYS_ADDR; |
| 541 | kernel_map.xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom); |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 542 | |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 543 | kernel_map.phys_addr = (uintptr_t)CONFIG_PHYS_RAM_BASE; |
| 544 | kernel_map.size = (uintptr_t)(&_end) - (uintptr_t)(&_sdata); |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 545 | |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 546 | kernel_map.va_kernel_xip_pa_offset = kernel_map.virt_addr - kernel_map.xiprom; |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 547 | #else |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 548 | kernel_map.phys_addr = (uintptr_t)(&_start); |
| 549 | kernel_map.size = (uintptr_t)(&_end) - kernel_map.phys_addr; |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 550 | #endif |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 551 | kernel_map.va_pa_offset = PAGE_OFFSET - kernel_map.phys_addr; |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 552 | kernel_map.va_kernel_pa_offset = kernel_map.virt_addr - kernel_map.phys_addr; |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 553 | |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 554 | pfn_base = PFN_DOWN(kernel_map.phys_addr); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 555 | |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 556 | /* Sanity check alignment and size */ |
| 557 | BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0); |
Alexandre Ghiti | 526f83d | 2021-07-23 15:01:25 +0200 | [diff] [blame] | 558 | BUG_ON((kernel_map.phys_addr % PMD_SIZE) != 0); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 559 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 560 | pt_ops.alloc_pte = alloc_pte_early; |
| 561 | pt_ops.get_pte_virt = get_pte_virt_early; |
| 562 | #ifndef __PAGETABLE_PMD_FOLDED |
| 563 | pt_ops.alloc_pmd = alloc_pmd_early; |
| 564 | pt_ops.get_pmd_virt = get_pmd_virt_early; |
| 565 | #endif |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 566 | /* Setup early PGD for fixmap */ |
| 567 | create_pgd_mapping(early_pg_dir, FIXADDR_START, |
| 568 | (uintptr_t)fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE); |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 569 | |
| 570 | #ifndef __PAGETABLE_PMD_FOLDED |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 571 | /* Setup fixmap PMD */ |
| 572 | create_pmd_mapping(fixmap_pmd, FIXADDR_START, |
| 573 | (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE); |
| 574 | /* Setup trampoline PGD and PMD */ |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 575 | create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr, |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 576 | (uintptr_t)trampoline_pmd, PGDIR_SIZE, PAGE_TABLE); |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 577 | #ifdef CONFIG_XIP_KERNEL |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 578 | create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr, |
| 579 | kernel_map.xiprom, PMD_SIZE, PAGE_KERNEL_EXEC); |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 580 | #else |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 581 | create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr, |
| 582 | kernel_map.phys_addr, PMD_SIZE, PAGE_KERNEL_EXEC); |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 583 | #endif |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 584 | #else |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 585 | /* Setup trampoline PGD */ |
Alexandre Ghiti | 658e2c5 | 2021-06-17 15:53:07 +0200 | [diff] [blame] | 586 | create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr, |
| 587 | kernel_map.phys_addr, PGDIR_SIZE, PAGE_KERNEL_EXEC); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 588 | #endif |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 589 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 590 | /* |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 591 | * Setup early PGD covering entire kernel which will allow |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 592 | * us to reach paging_init(). We map all memory banks later |
| 593 | * in setup_vm_final() below. |
| 594 | */ |
Alexandre Ghiti | 526f83d | 2021-07-23 15:01:25 +0200 | [diff] [blame] | 595 | create_kernel_page_table(early_pg_dir, true); |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 596 | |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 597 | #ifndef __PAGETABLE_PMD_FOLDED |
| 598 | /* Setup early PMD for DTB */ |
| 599 | create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA, |
| 600 | (uintptr_t)early_dtb_pmd, PGDIR_SIZE, PAGE_TABLE); |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 601 | #ifndef CONFIG_BUILTIN_DTB |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 602 | /* Create two consecutive PMD mappings for FDT early scan */ |
| 603 | pa = dtb_pa & ~(PMD_SIZE - 1); |
| 604 | create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA, |
| 605 | pa, PMD_SIZE, PAGE_KERNEL); |
| 606 | create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE, |
| 607 | pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL); |
| 608 | dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1)); |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 609 | #else /* CONFIG_BUILTIN_DTB */ |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 610 | #ifdef CONFIG_64BIT |
| 611 | /* |
| 612 | * __va can't be used since it would return a linear mapping address |
| 613 | * whereas dtb_early_va will be used before setup_vm_final installs |
| 614 | * the linear mapping. |
| 615 | */ |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 616 | dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa)); |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 617 | #else |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 618 | dtb_early_va = __va(dtb_pa); |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 619 | #endif /* CONFIG_64BIT */ |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 620 | #endif /* CONFIG_BUILTIN_DTB */ |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 621 | #else |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 622 | #ifndef CONFIG_BUILTIN_DTB |
Anup Patel | 8f3a2b4 | 2020-09-17 15:37:10 -0700 | [diff] [blame] | 623 | /* Create two consecutive PGD mappings for FDT early scan */ |
| 624 | pa = dtb_pa & ~(PGDIR_SIZE - 1); |
| 625 | create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA, |
| 626 | pa, PGDIR_SIZE, PAGE_KERNEL); |
| 627 | create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA + PGDIR_SIZE, |
| 628 | pa + PGDIR_SIZE, PGDIR_SIZE, PAGE_KERNEL); |
| 629 | dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PGDIR_SIZE - 1)); |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 630 | #else /* CONFIG_BUILTIN_DTB */ |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 631 | #ifdef CONFIG_64BIT |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 632 | dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa)); |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 633 | #else |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 634 | dtb_early_va = __va(dtb_pa); |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 635 | #endif /* CONFIG_64BIT */ |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 636 | #endif /* CONFIG_BUILTIN_DTB */ |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 637 | #endif |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 638 | dtb_early_pa = dtb_pa; |
Atish Patra | 6262f66 | 2020-09-17 15:37:11 -0700 | [diff] [blame] | 639 | |
| 640 | /* |
| 641 | * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap |
| 642 | * range can not span multiple pmds. |
| 643 | */ |
| 644 | BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) |
| 645 | != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); |
| 646 | |
| 647 | #ifndef __PAGETABLE_PMD_FOLDED |
| 648 | /* |
| 649 | * Early ioremap fixmap is already created as it lies within first 2MB |
| 650 | * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END |
| 651 | * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn |
| 652 | * the user if not. |
| 653 | */ |
| 654 | fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))]; |
| 655 | fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))]; |
| 656 | if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) { |
| 657 | WARN_ON(1); |
| 658 | pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n", |
| 659 | pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd)); |
| 660 | pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", |
| 661 | fix_to_virt(FIX_BTMAP_BEGIN)); |
| 662 | pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", |
| 663 | fix_to_virt(FIX_BTMAP_END)); |
| 664 | |
| 665 | pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); |
| 666 | pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); |
| 667 | } |
| 668 | #endif |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 669 | } |
| 670 | |
| 671 | static void __init setup_vm_final(void) |
| 672 | { |
| 673 | uintptr_t va, map_size; |
| 674 | phys_addr_t pa, start, end; |
Mike Rapoport | b10d6bc | 2020-10-13 16:58:08 -0700 | [diff] [blame] | 675 | u64 i; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 676 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 677 | /** |
| 678 | * MMU is enabled at this point. But page table setup is not complete yet. |
| 679 | * fixmap page table alloc functions should be used at this point |
| 680 | */ |
| 681 | pt_ops.alloc_pte = alloc_pte_fixmap; |
| 682 | pt_ops.get_pte_virt = get_pte_virt_fixmap; |
| 683 | #ifndef __PAGETABLE_PMD_FOLDED |
| 684 | pt_ops.alloc_pmd = alloc_pmd_fixmap; |
| 685 | pt_ops.get_pmd_virt = get_pmd_virt_fixmap; |
| 686 | #endif |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 687 | /* Setup swapper PGD for fixmap */ |
| 688 | create_pgd_mapping(swapper_pg_dir, FIXADDR_START, |
Zong Li | ac51e00 | 2020-01-02 11:12:40 +0800 | [diff] [blame] | 689 | __pa_symbol(fixmap_pgd_next), |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 690 | PGDIR_SIZE, PAGE_TABLE); |
| 691 | |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 692 | /* Map all memory banks in the linear mapping */ |
Mike Rapoport | b10d6bc | 2020-10-13 16:58:08 -0700 | [diff] [blame] | 693 | for_each_mem_range(i, &start, &end) { |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 694 | if (start >= end) |
| 695 | break; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 696 | if (start <= __pa(PAGE_OFFSET) && |
| 697 | __pa(PAGE_OFFSET) < end) |
| 698 | start = __pa(PAGE_OFFSET); |
| 699 | |
| 700 | map_size = best_map_size(start, end - start); |
| 701 | for (pa = start; pa < end; pa += map_size) { |
| 702 | va = (uintptr_t)__va(pa); |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 703 | |
Alexandre Ghiti | e5c35fa0 | 2021-06-24 14:00:41 +0200 | [diff] [blame] | 704 | create_pgd_mapping(swapper_pg_dir, va, pa, map_size, |
| 705 | pgprot_from_va(va)); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 706 | } |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 707 | } |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 708 | |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 709 | #ifdef CONFIG_64BIT |
| 710 | /* Map the kernel */ |
Alexandre Ghiti | 526f83d | 2021-07-23 15:01:25 +0200 | [diff] [blame] | 711 | create_kernel_page_table(swapper_pg_dir, false); |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 712 | #endif |
| 713 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 714 | /* Clear fixmap PTE and PMD mappings */ |
| 715 | clear_fixmap(FIX_PTE); |
| 716 | clear_fixmap(FIX_PMD); |
| 717 | |
| 718 | /* Move to swapper page table */ |
Zong Li | ac51e00 | 2020-01-02 11:12:40 +0800 | [diff] [blame] | 719 | csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | SATP_MODE); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 720 | local_flush_tlb_all(); |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 721 | |
| 722 | /* generic page allocation functions must be used to setup page table */ |
| 723 | pt_ops.alloc_pte = alloc_pte_late; |
| 724 | pt_ops.get_pte_virt = get_pte_virt_late; |
| 725 | #ifndef __PAGETABLE_PMD_FOLDED |
| 726 | pt_ops.alloc_pmd = alloc_pmd_late; |
| 727 | pt_ops.get_pmd_virt = get_pmd_virt_late; |
| 728 | #endif |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 729 | } |
Christoph Hellwig | 6bd33e1 | 2019-10-28 13:10:41 +0100 | [diff] [blame] | 730 | #else |
| 731 | asmlinkage void __init setup_vm(uintptr_t dtb_pa) |
| 732 | { |
| 733 | dtb_early_va = (void *)dtb_pa; |
Atish Patra | a78c6f5 | 2020-10-01 12:04:56 -0700 | [diff] [blame] | 734 | dtb_early_pa = dtb_pa; |
Christoph Hellwig | 6bd33e1 | 2019-10-28 13:10:41 +0100 | [diff] [blame] | 735 | } |
| 736 | |
| 737 | static inline void setup_vm_final(void) |
| 738 | { |
| 739 | } |
| 740 | #endif /* CONFIG_MMU */ |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 741 | |
Nick Kossifidis | e53d281 | 2021-04-19 03:55:38 +0300 | [diff] [blame] | 742 | #ifdef CONFIG_KEXEC_CORE |
| 743 | /* |
| 744 | * reserve_crashkernel() - reserves memory for crash kernel |
| 745 | * |
| 746 | * This function reserves memory area given in "crashkernel=" kernel command |
| 747 | * line parameter. The memory reserved is used by dump capture kernel when |
| 748 | * primary kernel is crashing. |
| 749 | */ |
| 750 | static void __init reserve_crashkernel(void) |
| 751 | { |
| 752 | unsigned long long crash_base = 0; |
| 753 | unsigned long long crash_size = 0; |
| 754 | unsigned long search_start = memblock_start_of_DRAM(); |
| 755 | unsigned long search_end = memblock_end_of_DRAM(); |
| 756 | |
| 757 | int ret = 0; |
| 758 | |
Nick Kossifidis | 5640975 | 2021-04-19 03:55:39 +0300 | [diff] [blame] | 759 | /* |
| 760 | * Don't reserve a region for a crash kernel on a crash kernel |
| 761 | * since it doesn't make much sense and we have limited memory |
| 762 | * resources. |
| 763 | */ |
| 764 | #ifdef CONFIG_CRASH_DUMP |
| 765 | if (is_kdump_kernel()) { |
| 766 | pr_info("crashkernel: ignoring reservation request\n"); |
| 767 | return; |
| 768 | } |
| 769 | #endif |
| 770 | |
Nick Kossifidis | e53d281 | 2021-04-19 03:55:38 +0300 | [diff] [blame] | 771 | ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(), |
| 772 | &crash_size, &crash_base); |
| 773 | if (ret || !crash_size) |
| 774 | return; |
| 775 | |
| 776 | crash_size = PAGE_ALIGN(crash_size); |
| 777 | |
| 778 | if (crash_base == 0) { |
| 779 | /* |
| 780 | * Current riscv boot protocol requires 2MB alignment for |
| 781 | * RV64 and 4MB alignment for RV32 (hugepage size) |
| 782 | */ |
| 783 | crash_base = memblock_find_in_range(search_start, search_end, |
| 784 | crash_size, PMD_SIZE); |
| 785 | |
| 786 | if (crash_base == 0) { |
| 787 | pr_warn("crashkernel: couldn't allocate %lldKB\n", |
| 788 | crash_size >> 10); |
| 789 | return; |
| 790 | } |
| 791 | } else { |
| 792 | /* User specifies base address explicitly. */ |
| 793 | if (!memblock_is_region_memory(crash_base, crash_size)) { |
| 794 | pr_warn("crashkernel: requested region is not memory\n"); |
| 795 | return; |
| 796 | } |
| 797 | |
| 798 | if (memblock_is_region_reserved(crash_base, crash_size)) { |
| 799 | pr_warn("crashkernel: requested region is reserved\n"); |
| 800 | return; |
| 801 | } |
| 802 | |
| 803 | |
| 804 | if (!IS_ALIGNED(crash_base, PMD_SIZE)) { |
| 805 | pr_warn("crashkernel: requested region is misaligned\n"); |
| 806 | return; |
| 807 | } |
| 808 | } |
| 809 | memblock_reserve(crash_base, crash_size); |
| 810 | |
| 811 | pr_info("crashkernel: reserved 0x%016llx - 0x%016llx (%lld MB)\n", |
| 812 | crash_base, crash_base + crash_size, crash_size >> 20); |
| 813 | |
| 814 | crashk_res.start = crash_base; |
| 815 | crashk_res.end = crash_base + crash_size - 1; |
| 816 | } |
| 817 | #endif /* CONFIG_KEXEC_CORE */ |
| 818 | |
Nick Kossifidis | 5640975 | 2021-04-19 03:55:39 +0300 | [diff] [blame] | 819 | #ifdef CONFIG_CRASH_DUMP |
| 820 | /* |
| 821 | * We keep track of the ELF core header of the crashed |
| 822 | * kernel with a reserved-memory region with compatible |
| 823 | * string "linux,elfcorehdr". Here we register a callback |
| 824 | * to populate elfcorehdr_addr/size when this region is |
| 825 | * present. Note that this region will be marked as |
| 826 | * reserved once we call early_init_fdt_scan_reserved_mem() |
| 827 | * later on. |
| 828 | */ |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 829 | static int __init elfcore_hdr_setup(struct reserved_mem *rmem) |
Nick Kossifidis | 5640975 | 2021-04-19 03:55:39 +0300 | [diff] [blame] | 830 | { |
| 831 | elfcorehdr_addr = rmem->base; |
| 832 | elfcorehdr_size = rmem->size; |
| 833 | return 0; |
| 834 | } |
| 835 | |
| 836 | RESERVEDMEM_OF_DECLARE(elfcorehdr, "linux,elfcorehdr", elfcore_hdr_setup); |
| 837 | #endif |
| 838 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 839 | void __init paging_init(void) |
| 840 | { |
Kefeng Wang | f842f5f | 2021-05-10 19:42:22 +0800 | [diff] [blame] | 841 | setup_bootmem(); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 842 | setup_vm_final(); |
Atish Patra | cbd34f4 | 2020-11-18 16:38:27 -0800 | [diff] [blame] | 843 | } |
| 844 | |
| 845 | void __init misc_mem_init(void) |
| 846 | { |
Kefeng Wang | f6e5aed | 2021-02-25 14:54:17 +0800 | [diff] [blame] | 847 | early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT); |
Atish Patra | 4f0e8ee | 2020-11-18 16:38:29 -0800 | [diff] [blame] | 848 | arch_numa_init(); |
Atish Patra | cbd34f4 | 2020-11-18 16:38:27 -0800 | [diff] [blame] | 849 | sparse_init(); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 850 | zone_sizes_init(); |
Nick Kossifidis | e53d281 | 2021-04-19 03:55:38 +0300 | [diff] [blame] | 851 | #ifdef CONFIG_KEXEC_CORE |
| 852 | reserve_crashkernel(); |
| 853 | #endif |
Atish Patra | 4f0e8ee | 2020-11-18 16:38:29 -0800 | [diff] [blame] | 854 | memblock_dump_all(); |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 855 | } |
Logan Gunthorpe | d95f1a5 | 2019-08-28 15:40:54 -0600 | [diff] [blame] | 856 | |
Kefeng Wang | 9fe57d8 | 2019-10-23 11:23:02 +0800 | [diff] [blame] | 857 | #ifdef CONFIG_SPARSEMEM_VMEMMAP |
Logan Gunthorpe | d95f1a5 | 2019-08-28 15:40:54 -0600 | [diff] [blame] | 858 | int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, |
| 859 | struct vmem_altmap *altmap) |
| 860 | { |
Anshuman Khandual | 1d9cfee | 2020-08-06 23:23:19 -0700 | [diff] [blame] | 861 | return vmemmap_populate_basepages(start, end, node, NULL); |
Logan Gunthorpe | d95f1a5 | 2019-08-28 15:40:54 -0600 | [diff] [blame] | 862 | } |
| 863 | #endif |