blob: 63acc8185bfa7567a76723230ec386b5f54fad8e [file] [log] [blame]
Thomas Gleixner50acfb22019-05-29 07:18:00 -07001// SPDX-License-Identifier: GPL-2.0-only
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07002/*
3 * Copyright (C) 2012 Regents of the University of California
Anup Patel671f9a32019-06-28 13:36:21 -07004 * Copyright (C) 2019 Western Digital Corporation or its affiliates.
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07005 */
6
7#include <linux/init.h>
8#include <linux/mm.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07009#include <linux/memblock.h>
Mike Rapoport57c8a662018-10-30 15:09:49 -070010#include <linux/initrd.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070011#include <linux/swap.h>
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010012#include <linux/sizes.h>
Anup Patel0651c262019-02-21 11:25:49 +053013#include <linux/of_fdt.h>
Albert Ou922b0372019-09-27 16:14:18 -070014#include <linux/libfdt.h>
Zong Lid27c3c92020-03-10 00:55:41 +080015#include <linux/set_memory.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070016
Anup Patelf2c17aa2019-01-07 20:57:01 +053017#include <asm/fixmap.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070018#include <asm/tlbflush.h>
19#include <asm/sections.h>
Palmer Dabbelt2d268252020-04-14 13:43:24 +090020#include <asm/soc.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070021#include <asm/io.h>
Zong Lib422d282020-06-03 16:03:55 -070022#include <asm/ptdump.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070023
Paul Walmsleyffaee272019-10-17 15:00:17 -070024#include "../kernel/head.h"
25
Anup Patel387181d2019-03-26 08:03:47 +000026unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
27 __page_aligned_bss;
28EXPORT_SYMBOL(empty_zero_page);
29
Anup Pateld90d45d2019-06-07 06:01:29 +000030extern char _start[];
Anup Patel8f3a2b42020-09-17 15:37:10 -070031#define DTB_EARLY_BASE_VA PGDIR_SIZE
32void *dtb_early_va __initdata;
33uintptr_t dtb_early_pa __initdata;
Anup Pateld90d45d2019-06-07 06:01:29 +000034
Atish Patrae8dcb612020-09-17 15:37:12 -070035struct pt_alloc_ops {
36 pte_t *(*get_pte_virt)(phys_addr_t pa);
37 phys_addr_t (*alloc_pte)(uintptr_t va);
38#ifndef __PAGETABLE_PMD_FOLDED
39 pmd_t *(*get_pmd_virt)(phys_addr_t pa);
40 phys_addr_t (*alloc_pmd)(uintptr_t va);
41#endif
42};
43
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070044static void __init zone_sizes_init(void)
45{
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010046 unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070047
Zong Lid5fad482018-06-25 16:49:37 +080048#ifdef CONFIG_ZONE_DMA32
Guo Ren28198c42019-01-12 16:16:27 +080049 max_zone_pfns[ZONE_DMA32] = PFN_DOWN(min(4UL * SZ_1G,
50 (unsigned long) PFN_PHYS(max_low_pfn)));
Zong Lid5fad482018-06-25 16:49:37 +080051#endif
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010052 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
53
Mike Rapoport9691a072020-06-03 15:57:10 -070054 free_area_init(max_zone_pfns);
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070055}
56
Christoph Hellwig6bd33e12019-10-28 13:10:41 +010057static void setup_zero_page(void)
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070058{
59 memset((void *)empty_zero_page, 0, PAGE_SIZE);
60}
61
Kefeng Wang8fa3cdf2020-05-14 19:53:35 +080062#if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000063static inline void print_mlk(char *name, unsigned long b, unsigned long t)
64{
65 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t,
66 (((t) - (b)) >> 10));
67}
68
69static inline void print_mlm(char *name, unsigned long b, unsigned long t)
70{
71 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t,
72 (((t) - (b)) >> 20));
73}
74
75static void print_vm_layout(void)
76{
77 pr_notice("Virtual kernel memory layout:\n");
78 print_mlk("fixmap", (unsigned long)FIXADDR_START,
79 (unsigned long)FIXADDR_TOP);
80 print_mlm("pci io", (unsigned long)PCI_IO_START,
81 (unsigned long)PCI_IO_END);
82 print_mlm("vmemmap", (unsigned long)VMEMMAP_START,
83 (unsigned long)VMEMMAP_END);
84 print_mlm("vmalloc", (unsigned long)VMALLOC_START,
85 (unsigned long)VMALLOC_END);
86 print_mlm("lowmem", (unsigned long)PAGE_OFFSET,
87 (unsigned long)high_memory);
88}
89#else
90static void print_vm_layout(void) { }
91#endif /* CONFIG_DEBUG_VM */
92
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070093void __init mem_init(void)
94{
95#ifdef CONFIG_FLATMEM
96 BUG_ON(!mem_map);
97#endif /* CONFIG_FLATMEM */
98
99 high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
Mike Rapoportc6ffc5c2018-10-30 15:09:30 -0700100 memblock_free_all();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700101
102 mem_init_print_info(NULL);
Yash Shah2cc6c4a2019-11-18 05:58:34 +0000103 print_vm_layout();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700104}
105
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700106#ifdef CONFIG_BLK_DEV_INITRD
Anup Patel0651c262019-02-21 11:25:49 +0530107static void __init setup_initrd(void)
108{
Atish Patra44002312020-07-15 16:30:08 -0700109 phys_addr_t start;
Anup Patel0651c262019-02-21 11:25:49 +0530110 unsigned long size;
111
Atish Patra44002312020-07-15 16:30:08 -0700112 /* Ignore the virtul address computed during device tree parsing */
113 initrd_start = initrd_end = 0;
114
115 if (!phys_initrd_size)
116 return;
117 /*
118 * Round the memory region to page boundaries as per free_initrd_mem()
119 * This allows us to detect whether the pages overlapping the initrd
120 * are in use, but more importantly, reserves the entire set of pages
121 * as we don't want these pages allocated for other purposes.
122 */
123 start = round_down(phys_initrd_start, PAGE_SIZE);
124 size = phys_initrd_size + (phys_initrd_start - start);
125 size = round_up(size, PAGE_SIZE);
126
127 if (!memblock_is_region_memory(start, size)) {
128 pr_err("INITRD: 0x%08llx+0x%08lx is not a memory region",
129 (u64)start, size);
Anup Patel0651c262019-02-21 11:25:49 +0530130 goto disable;
131 }
132
Atish Patra44002312020-07-15 16:30:08 -0700133 if (memblock_is_region_reserved(start, size)) {
134 pr_err("INITRD: 0x%08llx+0x%08lx overlaps in-use memory region\n",
135 (u64)start, size);
136 goto disable;
137 }
138
139 memblock_reserve(start, size);
140 /* Now convert initrd to virtual addresses */
141 initrd_start = (unsigned long)__va(phys_initrd_start);
142 initrd_end = initrd_start + phys_initrd_size;
Anup Patel0651c262019-02-21 11:25:49 +0530143 initrd_below_start_ok = 1;
144
145 pr_info("Initial ramdisk at: 0x%p (%lu bytes)\n",
146 (void *)(initrd_start), size);
147 return;
148disable:
149 pr_cont(" - disabling initrd\n");
150 initrd_start = 0;
151 initrd_end = 0;
152}
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700153#endif /* CONFIG_BLK_DEV_INITRD */
Anup Patel0651c262019-02-21 11:25:49 +0530154
155void __init setup_bootmem(void)
156{
157 struct memblock_region *reg;
158 phys_addr_t mem_size = 0;
Atish Patrafa5a1982020-07-15 16:30:09 -0700159 phys_addr_t total_mem = 0;
160 phys_addr_t mem_start, end = 0;
Zong Liac51e002020-01-02 11:12:40 +0800161 phys_addr_t vmlinux_end = __pa_symbol(&_end);
162 phys_addr_t vmlinux_start = __pa_symbol(&_start);
Anup Patel0651c262019-02-21 11:25:49 +0530163
164 /* Find the memory region containing the kernel */
165 for_each_memblock(memory, reg) {
Atish Patrafa5a1982020-07-15 16:30:09 -0700166 end = reg->base + reg->size;
167 if (!total_mem)
168 mem_start = reg->base;
169 if (reg->base <= vmlinux_start && vmlinux_end <= end)
170 BUG_ON(reg->size == 0);
171 total_mem = total_mem + reg->size;
Anup Patel0651c262019-02-21 11:25:49 +0530172 }
Atish Patrafa5a1982020-07-15 16:30:09 -0700173
174 /*
175 * Remove memblock from the end of usable area to the
176 * end of region
177 */
178 mem_size = min(total_mem, (phys_addr_t)-PAGE_OFFSET);
179 if (mem_start + mem_size < end)
180 memblock_remove(mem_start + mem_size,
181 end - mem_start - mem_size);
Anup Patel0651c262019-02-21 11:25:49 +0530182
Anup Pateld90d45d2019-06-07 06:01:29 +0000183 /* Reserve from the start of the kernel to the end of the kernel */
184 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
185
Vincent Chenc749bb22020-04-27 14:59:24 +0800186 max_pfn = PFN_DOWN(memblock_end_of_DRAM());
187 max_low_pfn = max_pfn;
Atish Patrad0d8aae2020-07-15 16:30:07 -0700188 set_max_mapnr(max_low_pfn);
Anup Patel0651c262019-02-21 11:25:49 +0530189
190#ifdef CONFIG_BLK_DEV_INITRD
191 setup_initrd();
192#endif /* CONFIG_BLK_DEV_INITRD */
193
Albert Ou922b0372019-09-27 16:14:18 -0700194 /*
195 * Avoid using early_init_fdt_reserve_self() since __pa() does
196 * not work for DTB pointers that are fixmap addresses
197 */
198 memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
199
Anup Patel0651c262019-02-21 11:25:49 +0530200 early_init_fdt_scan_reserved_mem();
201 memblock_allow_resize();
202 memblock_dump_all();
203
204 for_each_memblock(memory, reg) {
205 unsigned long start_pfn = memblock_region_memory_base_pfn(reg);
206 unsigned long end_pfn = memblock_region_memory_end_pfn(reg);
207
208 memblock_set_node(PFN_PHYS(start_pfn),
209 PFN_PHYS(end_pfn - start_pfn),
210 &memblock.memory, 0);
211 }
212}
Anup Patel6f1e9e92019-02-13 16:38:36 +0530213
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100214#ifdef CONFIG_MMU
Atish Patrae8dcb612020-09-17 15:37:12 -0700215static struct pt_alloc_ops pt_ops;
216
Anup Patel387181d2019-03-26 08:03:47 +0000217unsigned long va_pa_offset;
218EXPORT_SYMBOL(va_pa_offset);
219unsigned long pfn_base;
220EXPORT_SYMBOL(pfn_base);
221
Anup Patel6f1e9e92019-02-13 16:38:36 +0530222pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700223pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patelf2c17aa2019-01-07 20:57:01 +0530224pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700225
226#define MAX_EARLY_MAPPING_SIZE SZ_128M
227
228pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530229
230void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
231{
232 unsigned long addr = __fix_to_virt(idx);
233 pte_t *ptep;
234
235 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
236
237 ptep = &fixmap_pte[pte_index(addr)];
238
239 if (pgprot_val(prot)) {
240 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
241 } else {
242 pte_clear(&init_mm, addr, ptep);
243 local_flush_tlb_page(addr);
244 }
245}
246
Atish Patrae8dcb612020-09-17 15:37:12 -0700247static inline pte_t *__init get_pte_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700248{
Atish Patrae8dcb612020-09-17 15:37:12 -0700249 return (pte_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700250}
251
Atish Patrae8dcb612020-09-17 15:37:12 -0700252static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa)
253{
254 clear_fixmap(FIX_PTE);
255 return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
256}
257
258static inline pte_t *get_pte_virt_late(phys_addr_t pa)
259{
260 return (pte_t *) __va(pa);
261}
262
263static inline phys_addr_t __init alloc_pte_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700264{
265 /*
266 * We only create PMD or PGD early mappings so we
267 * should never reach here with MMU disabled.
268 */
Atish Patrae8dcb612020-09-17 15:37:12 -0700269 BUG();
270}
Anup Patel671f9a32019-06-28 13:36:21 -0700271
Atish Patrae8dcb612020-09-17 15:37:12 -0700272static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va)
273{
Anup Patel671f9a32019-06-28 13:36:21 -0700274 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
275}
276
Atish Patrae8dcb612020-09-17 15:37:12 -0700277static phys_addr_t alloc_pte_late(uintptr_t va)
278{
279 unsigned long vaddr;
280
281 vaddr = __get_free_page(GFP_KERNEL);
282 if (!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr)))
283 BUG();
284 return __pa(vaddr);
285}
286
Anup Patel671f9a32019-06-28 13:36:21 -0700287static void __init create_pte_mapping(pte_t *ptep,
288 uintptr_t va, phys_addr_t pa,
289 phys_addr_t sz, pgprot_t prot)
290{
Mike Rapoport974b9b22020-06-08 21:33:10 -0700291 uintptr_t pte_idx = pte_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700292
293 BUG_ON(sz != PAGE_SIZE);
294
Mike Rapoport974b9b22020-06-08 21:33:10 -0700295 if (pte_none(ptep[pte_idx]))
296 ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700297}
298
299#ifndef __PAGETABLE_PMD_FOLDED
300
301pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
302pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
303
304#if MAX_EARLY_MAPPING_SIZE < PGDIR_SIZE
305#define NUM_EARLY_PMDS 1UL
306#else
307#define NUM_EARLY_PMDS (1UL + MAX_EARLY_MAPPING_SIZE / PGDIR_SIZE)
308#endif
309pmd_t early_pmd[PTRS_PER_PMD * NUM_EARLY_PMDS] __initdata __aligned(PAGE_SIZE);
310
Atish Patrae8dcb612020-09-17 15:37:12 -0700311static pmd_t *__init get_pmd_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700312{
Atish Patrae8dcb612020-09-17 15:37:12 -0700313 /* Before MMU is enabled */
314 return (pmd_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700315}
316
Atish Patrae8dcb612020-09-17 15:37:12 -0700317static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa)
318{
319 clear_fixmap(FIX_PMD);
320 return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
321}
322
323static pmd_t *get_pmd_virt_late(phys_addr_t pa)
324{
325 return (pmd_t *) __va(pa);
326}
327
328static phys_addr_t __init alloc_pmd_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700329{
330 uintptr_t pmd_num;
331
Anup Patel671f9a32019-06-28 13:36:21 -0700332 pmd_num = (va - PAGE_OFFSET) >> PGDIR_SHIFT;
333 BUG_ON(pmd_num >= NUM_EARLY_PMDS);
334 return (uintptr_t)&early_pmd[pmd_num * PTRS_PER_PMD];
335}
336
Atish Patrae8dcb612020-09-17 15:37:12 -0700337static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va)
338{
339 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
340}
341
342static phys_addr_t alloc_pmd_late(uintptr_t va)
343{
344 unsigned long vaddr;
345
346 vaddr = __get_free_page(GFP_KERNEL);
347 BUG_ON(!vaddr);
348 return __pa(vaddr);
349}
350
Anup Patel671f9a32019-06-28 13:36:21 -0700351static void __init create_pmd_mapping(pmd_t *pmdp,
352 uintptr_t va, phys_addr_t pa,
353 phys_addr_t sz, pgprot_t prot)
354{
355 pte_t *ptep;
356 phys_addr_t pte_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700357 uintptr_t pmd_idx = pmd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700358
359 if (sz == PMD_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700360 if (pmd_none(pmdp[pmd_idx]))
361 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700362 return;
363 }
364
Mike Rapoport974b9b22020-06-08 21:33:10 -0700365 if (pmd_none(pmdp[pmd_idx])) {
Atish Patrae8dcb612020-09-17 15:37:12 -0700366 pte_phys = pt_ops.alloc_pte(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700367 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
Atish Patrae8dcb612020-09-17 15:37:12 -0700368 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700369 memset(ptep, 0, PAGE_SIZE);
370 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700371 pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
Atish Patrae8dcb612020-09-17 15:37:12 -0700372 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700373 }
374
375 create_pte_mapping(ptep, va, pa, sz, prot);
376}
377
378#define pgd_next_t pmd_t
Atish Patrae8dcb612020-09-17 15:37:12 -0700379#define alloc_pgd_next(__va) pt_ops.alloc_pmd(__va)
380#define get_pgd_next_virt(__pa) pt_ops.get_pmd_virt(__pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700381#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
382 create_pmd_mapping(__nextp, __va, __pa, __sz, __prot)
Anup Patel671f9a32019-06-28 13:36:21 -0700383#define fixmap_pgd_next fixmap_pmd
384#else
385#define pgd_next_t pte_t
Atish Patrae8dcb612020-09-17 15:37:12 -0700386#define alloc_pgd_next(__va) pt_ops.alloc_pte(__va)
387#define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700388#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
389 create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
Anup Patel671f9a32019-06-28 13:36:21 -0700390#define fixmap_pgd_next fixmap_pte
391#endif
392
393static void __init create_pgd_mapping(pgd_t *pgdp,
394 uintptr_t va, phys_addr_t pa,
395 phys_addr_t sz, pgprot_t prot)
396{
397 pgd_next_t *nextp;
398 phys_addr_t next_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700399 uintptr_t pgd_idx = pgd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700400
401 if (sz == PGDIR_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700402 if (pgd_val(pgdp[pgd_idx]) == 0)
403 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700404 return;
405 }
406
Mike Rapoport974b9b22020-06-08 21:33:10 -0700407 if (pgd_val(pgdp[pgd_idx]) == 0) {
Anup Patel671f9a32019-06-28 13:36:21 -0700408 next_phys = alloc_pgd_next(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700409 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700410 nextp = get_pgd_next_virt(next_phys);
411 memset(nextp, 0, PAGE_SIZE);
412 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700413 next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
Anup Patel671f9a32019-06-28 13:36:21 -0700414 nextp = get_pgd_next_virt(next_phys);
415 }
416
417 create_pgd_next_mapping(nextp, va, pa, sz, prot);
418}
419
420static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
421{
Zong Li0fdc6362019-11-08 01:00:40 -0800422 /* Upgrade to PMD_SIZE mappings whenever possible */
423 if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
424 return PAGE_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700425
Zong Li0fdc6362019-11-08 01:00:40 -0800426 return PMD_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700427}
428
Anup Patel387181d2019-03-26 08:03:47 +0000429/*
430 * setup_vm() is called from head.S with MMU-off.
431 *
432 * Following requirements should be honoured for setup_vm() to work
433 * correctly:
434 * 1) It should use PC-relative addressing for accessing kernel symbols.
435 * To achieve this we always use GCC cmodel=medany.
436 * 2) The compiler instrumentation for FTRACE will not work for setup_vm()
437 * so disable compiler instrumentation when FTRACE is enabled.
438 *
439 * Currently, the above requirements are honoured by using custom CFLAGS
440 * for init.o in mm/Makefile.
441 */
442
443#ifndef __riscv_cmodel_medany
Paul Walmsley6a527b62019-10-17 14:45:58 -0700444#error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
Anup Patel387181d2019-03-26 08:03:47 +0000445#endif
446
Anup Patel671f9a32019-06-28 13:36:21 -0700447asmlinkage void __init setup_vm(uintptr_t dtb_pa)
Anup Patel6f1e9e92019-02-13 16:38:36 +0530448{
Anup Patel8f3a2b42020-09-17 15:37:10 -0700449 uintptr_t va, pa, end_va;
Anup Patel671f9a32019-06-28 13:36:21 -0700450 uintptr_t load_pa = (uintptr_t)(&_start);
451 uintptr_t load_sz = (uintptr_t)(&_end) - load_pa;
452 uintptr_t map_size = best_map_size(load_pa, MAX_EARLY_MAPPING_SIZE);
Atish Patra6262f662020-09-17 15:37:11 -0700453#ifndef __PAGETABLE_PMD_FOLDED
454 pmd_t fix_bmap_spmd, fix_bmap_epmd;
455#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530456
Anup Patel671f9a32019-06-28 13:36:21 -0700457 va_pa_offset = PAGE_OFFSET - load_pa;
458 pfn_base = PFN_DOWN(load_pa);
459
460 /*
461 * Enforce boot alignment requirements of RV32 and
462 * RV64 by only allowing PMD or PGD mappings.
463 */
464 BUG_ON(map_size == PAGE_SIZE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530465
466 /* Sanity check alignment and size */
467 BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
Anup Patel671f9a32019-06-28 13:36:21 -0700468 BUG_ON((load_pa % map_size) != 0);
469 BUG_ON(load_sz > MAX_EARLY_MAPPING_SIZE);
470
Atish Patrae8dcb612020-09-17 15:37:12 -0700471 pt_ops.alloc_pte = alloc_pte_early;
472 pt_ops.get_pte_virt = get_pte_virt_early;
473#ifndef __PAGETABLE_PMD_FOLDED
474 pt_ops.alloc_pmd = alloc_pmd_early;
475 pt_ops.get_pmd_virt = get_pmd_virt_early;
476#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700477 /* Setup early PGD for fixmap */
478 create_pgd_mapping(early_pg_dir, FIXADDR_START,
479 (uintptr_t)fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530480
481#ifndef __PAGETABLE_PMD_FOLDED
Anup Patel671f9a32019-06-28 13:36:21 -0700482 /* Setup fixmap PMD */
483 create_pmd_mapping(fixmap_pmd, FIXADDR_START,
484 (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
485 /* Setup trampoline PGD and PMD */
486 create_pgd_mapping(trampoline_pg_dir, PAGE_OFFSET,
487 (uintptr_t)trampoline_pmd, PGDIR_SIZE, PAGE_TABLE);
488 create_pmd_mapping(trampoline_pmd, PAGE_OFFSET,
489 load_pa, PMD_SIZE, PAGE_KERNEL_EXEC);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530490#else
Anup Patel671f9a32019-06-28 13:36:21 -0700491 /* Setup trampoline PGD */
492 create_pgd_mapping(trampoline_pg_dir, PAGE_OFFSET,
493 load_pa, PGDIR_SIZE, PAGE_KERNEL_EXEC);
494#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530495
Anup Patel671f9a32019-06-28 13:36:21 -0700496 /*
497 * Setup early PGD covering entire kernel which will allows
498 * us to reach paging_init(). We map all memory banks later
499 * in setup_vm_final() below.
500 */
501 end_va = PAGE_OFFSET + load_sz;
502 for (va = PAGE_OFFSET; va < end_va; va += map_size)
503 create_pgd_mapping(early_pg_dir, va,
504 load_pa + (va - PAGE_OFFSET),
505 map_size, PAGE_KERNEL_EXEC);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530506
Anup Patel8f3a2b42020-09-17 15:37:10 -0700507 /* Create two consecutive PGD mappings for FDT early scan */
508 pa = dtb_pa & ~(PGDIR_SIZE - 1);
509 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
510 pa, PGDIR_SIZE, PAGE_KERNEL);
511 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA + PGDIR_SIZE,
512 pa + PGDIR_SIZE, PGDIR_SIZE, PAGE_KERNEL);
513 dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PGDIR_SIZE - 1));
Albert Ou922b0372019-09-27 16:14:18 -0700514 dtb_early_pa = dtb_pa;
Atish Patra6262f662020-09-17 15:37:11 -0700515
516 /*
517 * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
518 * range can not span multiple pmds.
519 */
520 BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
521 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
522
523#ifndef __PAGETABLE_PMD_FOLDED
524 /*
525 * Early ioremap fixmap is already created as it lies within first 2MB
526 * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END
527 * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn
528 * the user if not.
529 */
530 fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))];
531 fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))];
532 if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) {
533 WARN_ON(1);
534 pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n",
535 pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd));
536 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
537 fix_to_virt(FIX_BTMAP_BEGIN));
538 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
539 fix_to_virt(FIX_BTMAP_END));
540
541 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
542 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
543 }
544#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700545}
546
547static void __init setup_vm_final(void)
548{
549 uintptr_t va, map_size;
550 phys_addr_t pa, start, end;
551 struct memblock_region *reg;
552
Atish Patrae8dcb612020-09-17 15:37:12 -0700553 /**
554 * MMU is enabled at this point. But page table setup is not complete yet.
555 * fixmap page table alloc functions should be used at this point
556 */
557 pt_ops.alloc_pte = alloc_pte_fixmap;
558 pt_ops.get_pte_virt = get_pte_virt_fixmap;
559#ifndef __PAGETABLE_PMD_FOLDED
560 pt_ops.alloc_pmd = alloc_pmd_fixmap;
561 pt_ops.get_pmd_virt = get_pmd_virt_fixmap;
562#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700563 /* Setup swapper PGD for fixmap */
564 create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
Zong Liac51e002020-01-02 11:12:40 +0800565 __pa_symbol(fixmap_pgd_next),
Anup Patel671f9a32019-06-28 13:36:21 -0700566 PGDIR_SIZE, PAGE_TABLE);
567
568 /* Map all memory banks */
569 for_each_memblock(memory, reg) {
570 start = reg->base;
571 end = start + reg->size;
572
573 if (start >= end)
574 break;
575 if (memblock_is_nomap(reg))
576 continue;
577 if (start <= __pa(PAGE_OFFSET) &&
578 __pa(PAGE_OFFSET) < end)
579 start = __pa(PAGE_OFFSET);
580
581 map_size = best_map_size(start, end - start);
582 for (pa = start; pa < end; pa += map_size) {
583 va = (uintptr_t)__va(pa);
584 create_pgd_mapping(swapper_pg_dir, va, pa,
585 map_size, PAGE_KERNEL_EXEC);
586 }
Anup Patel6f1e9e92019-02-13 16:38:36 +0530587 }
Anup Patelf2c17aa2019-01-07 20:57:01 +0530588
Anup Patel671f9a32019-06-28 13:36:21 -0700589 /* Clear fixmap PTE and PMD mappings */
590 clear_fixmap(FIX_PTE);
591 clear_fixmap(FIX_PMD);
592
593 /* Move to swapper page table */
Zong Liac51e002020-01-02 11:12:40 +0800594 csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | SATP_MODE);
Anup Patel671f9a32019-06-28 13:36:21 -0700595 local_flush_tlb_all();
Atish Patrae8dcb612020-09-17 15:37:12 -0700596
597 /* generic page allocation functions must be used to setup page table */
598 pt_ops.alloc_pte = alloc_pte_late;
599 pt_ops.get_pte_virt = get_pte_virt_late;
600#ifndef __PAGETABLE_PMD_FOLDED
601 pt_ops.alloc_pmd = alloc_pmd_late;
602 pt_ops.get_pmd_virt = get_pmd_virt_late;
603#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700604}
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100605#else
606asmlinkage void __init setup_vm(uintptr_t dtb_pa)
607{
Palmer Dabbelt2d268252020-04-14 13:43:24 +0900608#ifdef CONFIG_BUILTIN_DTB
609 dtb_early_va = soc_lookup_builtin_dtb();
610 if (!dtb_early_va) {
611 /* Fallback to first available DTS */
612 dtb_early_va = (void *) __dtb_start;
613 }
614#else
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100615 dtb_early_va = (void *)dtb_pa;
Palmer Dabbelt2d268252020-04-14 13:43:24 +0900616#endif
Anup Patel8f3a2b42020-09-17 15:37:10 -0700617 dtb_early_pa = dtb_pa;
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100618}
619
620static inline void setup_vm_final(void)
621{
622}
623#endif /* CONFIG_MMU */
Anup Patel671f9a32019-06-28 13:36:21 -0700624
Zong Lid27c3c92020-03-10 00:55:41 +0800625#ifdef CONFIG_STRICT_KERNEL_RWX
Zong Lid27c3c92020-03-10 00:55:41 +0800626void mark_rodata_ro(void)
627{
628 unsigned long text_start = (unsigned long)_text;
629 unsigned long text_end = (unsigned long)_etext;
630 unsigned long rodata_start = (unsigned long)__start_rodata;
631 unsigned long data_start = (unsigned long)_data;
632 unsigned long max_low = (unsigned long)(__va(PFN_PHYS(max_low_pfn)));
633
634 set_memory_ro(text_start, (text_end - text_start) >> PAGE_SHIFT);
635 set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
636 set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
637 set_memory_nx(data_start, (max_low - data_start) >> PAGE_SHIFT);
Zong Lib422d282020-06-03 16:03:55 -0700638
639 debug_checkwx();
Zong Lid27c3c92020-03-10 00:55:41 +0800640}
641#endif
642
Zong Lie3ef4d62020-07-16 14:15:26 +0800643static void __init resource_init(void)
Zong Li526fbae2020-06-16 15:45:46 +0800644{
645 struct memblock_region *region;
646
647 for_each_memblock(memory, region) {
648 struct resource *res;
649
650 res = memblock_alloc(sizeof(struct resource), SMP_CACHE_BYTES);
651 if (!res)
652 panic("%s: Failed to allocate %zu bytes\n", __func__,
653 sizeof(struct resource));
654
655 if (memblock_is_nomap(region)) {
656 res->name = "reserved";
657 res->flags = IORESOURCE_MEM;
658 } else {
659 res->name = "System RAM";
660 res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY;
661 }
662 res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
663 res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
664
665 request_resource(&iomem_resource, res);
666 }
667}
668
Anup Patel671f9a32019-06-28 13:36:21 -0700669void __init paging_init(void)
670{
671 setup_vm_final();
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600672 sparse_init();
Anup Patel671f9a32019-06-28 13:36:21 -0700673 setup_zero_page();
674 zone_sizes_init();
Zong Li526fbae2020-06-16 15:45:46 +0800675 resource_init();
Anup Patel6f1e9e92019-02-13 16:38:36 +0530676}
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600677
Kefeng Wang9fe57d82019-10-23 11:23:02 +0800678#ifdef CONFIG_SPARSEMEM_VMEMMAP
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600679int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
680 struct vmem_altmap *altmap)
681{
Anshuman Khandual1d9cfee2020-08-06 23:23:19 -0700682 return vmemmap_populate_basepages(start, end, node, NULL);
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600683}
684#endif