blob: 3de7ec0303421dd0c60f3bfbbe164239c0238c2a [file] [log] [blame]
Thomas Gleixner50acfb22019-05-29 07:18:00 -07001// SPDX-License-Identifier: GPL-2.0-only
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07002/*
3 * Copyright (C) 2012 Regents of the University of California
Anup Patel671f9a32019-06-28 13:36:21 -07004 * Copyright (C) 2019 Western Digital Corporation or its affiliates.
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07005 */
6
7#include <linux/init.h>
8#include <linux/mm.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07009#include <linux/memblock.h>
Mike Rapoport57c8a662018-10-30 15:09:49 -070010#include <linux/initrd.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070011#include <linux/swap.h>
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010012#include <linux/sizes.h>
Anup Patel0651c262019-02-21 11:25:49 +053013#include <linux/of_fdt.h>
Albert Ou922b0372019-09-27 16:14:18 -070014#include <linux/libfdt.h>
Zong Lid27c3c92020-03-10 00:55:41 +080015#include <linux/set_memory.h>
Kefeng Wangda815582020-10-31 14:01:12 +080016#include <linux/dma-map-ops.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070017
Anup Patelf2c17aa2019-01-07 20:57:01 +053018#include <asm/fixmap.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070019#include <asm/tlbflush.h>
20#include <asm/sections.h>
Palmer Dabbelt2d268252020-04-14 13:43:24 +090021#include <asm/soc.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070022#include <asm/io.h>
Zong Lib422d282020-06-03 16:03:55 -070023#include <asm/ptdump.h>
Atish Patra4f0e8ee2020-11-18 16:38:29 -080024#include <asm/numa.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070025
Paul Walmsleyffaee272019-10-17 15:00:17 -070026#include "../kernel/head.h"
27
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -040028unsigned long kernel_virt_addr = KERNEL_LINK_ADDR;
29EXPORT_SYMBOL(kernel_virt_addr);
30
Anup Patel387181d2019-03-26 08:03:47 +000031unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
32 __page_aligned_bss;
33EXPORT_SYMBOL(empty_zero_page);
34
Anup Pateld90d45d2019-06-07 06:01:29 +000035extern char _start[];
Anup Patel8f3a2b42020-09-17 15:37:10 -070036#define DTB_EARLY_BASE_VA PGDIR_SIZE
37void *dtb_early_va __initdata;
38uintptr_t dtb_early_pa __initdata;
Anup Pateld90d45d2019-06-07 06:01:29 +000039
Atish Patrae8dcb612020-09-17 15:37:12 -070040struct pt_alloc_ops {
41 pte_t *(*get_pte_virt)(phys_addr_t pa);
42 phys_addr_t (*alloc_pte)(uintptr_t va);
43#ifndef __PAGETABLE_PMD_FOLDED
44 pmd_t *(*get_pmd_virt)(phys_addr_t pa);
45 phys_addr_t (*alloc_pmd)(uintptr_t va);
46#endif
47};
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070048
Kefeng Wangda815582020-10-31 14:01:12 +080049static phys_addr_t dma32_phys_limit __ro_after_init;
50
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070051static void __init zone_sizes_init(void)
52{
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010053 unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070054
Zong Lid5fad482018-06-25 16:49:37 +080055#ifdef CONFIG_ZONE_DMA32
Kefeng Wangda815582020-10-31 14:01:12 +080056 max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit);
Zong Lid5fad482018-06-25 16:49:37 +080057#endif
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010058 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
59
Mike Rapoport9691a072020-06-03 15:57:10 -070060 free_area_init(max_zone_pfns);
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070061}
62
Jisheng Zhang19875012021-03-30 02:22:21 +080063static void __init setup_zero_page(void)
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070064{
65 memset((void *)empty_zero_page, 0, PAGE_SIZE);
66}
67
Kefeng Wang8fa3cdf2020-05-14 19:53:35 +080068#if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000069static inline void print_mlk(char *name, unsigned long b, unsigned long t)
70{
71 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t,
72 (((t) - (b)) >> 10));
73}
74
75static inline void print_mlm(char *name, unsigned long b, unsigned long t)
76{
77 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t,
78 (((t) - (b)) >> 20));
79}
80
Jisheng Zhang19875012021-03-30 02:22:21 +080081static void __init print_vm_layout(void)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000082{
83 pr_notice("Virtual kernel memory layout:\n");
84 print_mlk("fixmap", (unsigned long)FIXADDR_START,
85 (unsigned long)FIXADDR_TOP);
86 print_mlm("pci io", (unsigned long)PCI_IO_START,
87 (unsigned long)PCI_IO_END);
88 print_mlm("vmemmap", (unsigned long)VMEMMAP_START,
89 (unsigned long)VMEMMAP_END);
90 print_mlm("vmalloc", (unsigned long)VMALLOC_START,
91 (unsigned long)VMALLOC_END);
92 print_mlm("lowmem", (unsigned long)PAGE_OFFSET,
93 (unsigned long)high_memory);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -040094#ifdef CONFIG_64BIT
95 print_mlm("kernel", (unsigned long)KERNEL_LINK_ADDR,
96 (unsigned long)ADDRESS_SPACE_END);
97#endif
Yash Shah2cc6c4a2019-11-18 05:58:34 +000098}
99#else
100static void print_vm_layout(void) { }
101#endif /* CONFIG_DEBUG_VM */
102
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700103void __init mem_init(void)
104{
105#ifdef CONFIG_FLATMEM
106 BUG_ON(!mem_map);
107#endif /* CONFIG_FLATMEM */
108
109 high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
Mike Rapoportc6ffc5c2018-10-30 15:09:30 -0700110 memblock_free_all();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700111
112 mem_init_print_info(NULL);
Yash Shah2cc6c4a2019-11-18 05:58:34 +0000113 print_vm_layout();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700114}
115
Anup Patel0651c262019-02-21 11:25:49 +0530116void __init setup_bootmem(void)
117{
Zong Liac51e002020-01-02 11:12:40 +0800118 phys_addr_t vmlinux_end = __pa_symbol(&_end);
119 phys_addr_t vmlinux_start = __pa_symbol(&_start);
Kefeng Wangdd2d0822021-02-09 09:01:51 +0800120 phys_addr_t dram_end = memblock_end_of_DRAM();
Atish Patraabb8e862021-01-11 15:45:02 -0800121 phys_addr_t max_mapped_addr = __pa(~(ulong)0);
Anup Patel0651c262019-02-21 11:25:49 +0530122
Kefeng Wangdd2d0822021-02-09 09:01:51 +0800123 /* The maximal physical memory size is -PAGE_OFFSET. */
Atish Patrade043da2020-12-18 16:13:56 -0800124 memblock_enforce_memory_limit(-PAGE_OFFSET);
Anup Patel0651c262019-02-21 11:25:49 +0530125
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400126 /*
127 * Reserve from the start of the kernel to the end of the kernel
128 * and make sure we align the reservation on PMD_SIZE since we will
129 * map the kernel in the linear mapping as read-only: we do not want
130 * any allocation to happen between _end and the next pmd aligned page.
131 */
132 memblock_reserve(vmlinux_start, (vmlinux_end - vmlinux_start + PMD_SIZE - 1) & PMD_MASK);
Anup Pateld90d45d2019-06-07 06:01:29 +0000133
Atish Patraabb8e862021-01-11 15:45:02 -0800134 /*
135 * memblock allocator is not aware of the fact that last 4K bytes of
136 * the addressable memory can not be mapped because of IS_ERR_VALUE
137 * macro. Make sure that last 4k bytes are not usable by memblock
138 * if end of dram is equal to maximum addressable memory.
139 */
140 if (max_mapped_addr == (dram_end - 1))
141 memblock_set_current_limit(max_mapped_addr - 4096);
142
Kefeng Wangf6e5aed2021-02-25 14:54:17 +0800143 min_low_pfn = PFN_UP(memblock_start_of_DRAM());
144 max_low_pfn = max_pfn = PFN_DOWN(dram_end);
145
Kefeng Wangda815582020-10-31 14:01:12 +0800146 dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
Guo Ren336e8eb2021-01-21 14:31:17 +0800147 set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
Anup Patel0651c262019-02-21 11:25:49 +0530148
Kefeng Wangaec33b52021-01-15 13:46:06 +0800149 reserve_initrd_mem();
Albert Ou922b0372019-09-27 16:14:18 -0700150 /*
Vitaly Woolf105aa92021-01-16 01:49:48 +0200151 * If DTB is built in, no need to reserve its memblock.
152 * Otherwise, do reserve it but avoid using
153 * early_init_fdt_reserve_self() since __pa() does
Albert Ou922b0372019-09-27 16:14:18 -0700154 * not work for DTB pointers that are fixmap addresses
155 */
Vitaly Woolf105aa92021-01-16 01:49:48 +0200156 if (!IS_ENABLED(CONFIG_BUILTIN_DTB))
157 memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
Albert Ou922b0372019-09-27 16:14:18 -0700158
Anup Patel0651c262019-02-21 11:25:49 +0530159 early_init_fdt_scan_reserved_mem();
Kefeng Wangda815582020-10-31 14:01:12 +0800160 dma_contiguous_reserve(dma32_phys_limit);
Anup Patel0651c262019-02-21 11:25:49 +0530161 memblock_allow_resize();
Anup Patel0651c262019-02-21 11:25:49 +0530162}
Anup Patel6f1e9e92019-02-13 16:38:36 +0530163
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100164#ifdef CONFIG_MMU
Atish Patrae8dcb612020-09-17 15:37:12 -0700165static struct pt_alloc_ops pt_ops;
166
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400167/* Offset between linear mapping virtual address and kernel load address */
Anup Patel387181d2019-03-26 08:03:47 +0000168unsigned long va_pa_offset;
169EXPORT_SYMBOL(va_pa_offset);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400170#ifdef CONFIG_64BIT
171/* Offset between kernel mapping virtual address and kernel load address */
172unsigned long va_kernel_pa_offset;
173EXPORT_SYMBOL(va_kernel_pa_offset);
174#endif
Anup Patel387181d2019-03-26 08:03:47 +0000175unsigned long pfn_base;
176EXPORT_SYMBOL(pfn_base);
177
Anup Patel6f1e9e92019-02-13 16:38:36 +0530178pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700179pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patelf2c17aa2019-01-07 20:57:01 +0530180pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700181
Anup Patel671f9a32019-06-28 13:36:21 -0700182pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530183
184void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
185{
186 unsigned long addr = __fix_to_virt(idx);
187 pte_t *ptep;
188
189 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
190
191 ptep = &fixmap_pte[pte_index(addr)];
192
Greentime Hu21190b72020-08-04 11:02:05 +0800193 if (pgprot_val(prot))
Anup Patelf2c17aa2019-01-07 20:57:01 +0530194 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
Greentime Hu21190b72020-08-04 11:02:05 +0800195 else
Anup Patelf2c17aa2019-01-07 20:57:01 +0530196 pte_clear(&init_mm, addr, ptep);
Greentime Hu21190b72020-08-04 11:02:05 +0800197 local_flush_tlb_page(addr);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530198}
199
Atish Patrae8dcb612020-09-17 15:37:12 -0700200static inline pte_t *__init get_pte_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700201{
Atish Patrae8dcb612020-09-17 15:37:12 -0700202 return (pte_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700203}
204
Atish Patrae8dcb612020-09-17 15:37:12 -0700205static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa)
206{
207 clear_fixmap(FIX_PTE);
208 return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
209}
210
211static inline pte_t *get_pte_virt_late(phys_addr_t pa)
212{
213 return (pte_t *) __va(pa);
214}
215
216static inline phys_addr_t __init alloc_pte_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700217{
218 /*
219 * We only create PMD or PGD early mappings so we
220 * should never reach here with MMU disabled.
221 */
Atish Patrae8dcb612020-09-17 15:37:12 -0700222 BUG();
223}
Anup Patel671f9a32019-06-28 13:36:21 -0700224
Atish Patrae8dcb612020-09-17 15:37:12 -0700225static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va)
226{
Anup Patel671f9a32019-06-28 13:36:21 -0700227 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
228}
229
Atish Patrae8dcb612020-09-17 15:37:12 -0700230static phys_addr_t alloc_pte_late(uintptr_t va)
231{
232 unsigned long vaddr;
233
234 vaddr = __get_free_page(GFP_KERNEL);
235 if (!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr)))
236 BUG();
237 return __pa(vaddr);
238}
239
Anup Patel671f9a32019-06-28 13:36:21 -0700240static void __init create_pte_mapping(pte_t *ptep,
241 uintptr_t va, phys_addr_t pa,
242 phys_addr_t sz, pgprot_t prot)
243{
Mike Rapoport974b9b22020-06-08 21:33:10 -0700244 uintptr_t pte_idx = pte_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700245
246 BUG_ON(sz != PAGE_SIZE);
247
Mike Rapoport974b9b22020-06-08 21:33:10 -0700248 if (pte_none(ptep[pte_idx]))
249 ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700250}
251
252#ifndef __PAGETABLE_PMD_FOLDED
253
254pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
255pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
Alexandre Ghiti0f02de42021-02-21 09:22:33 -0500256pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
Anup Patel1074dd42020-11-04 12:07:13 +0530257pmd_t early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
Anup Patel671f9a32019-06-28 13:36:21 -0700258
Atish Patrae8dcb612020-09-17 15:37:12 -0700259static pmd_t *__init get_pmd_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700260{
Atish Patrae8dcb612020-09-17 15:37:12 -0700261 /* Before MMU is enabled */
262 return (pmd_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700263}
264
Atish Patrae8dcb612020-09-17 15:37:12 -0700265static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa)
266{
267 clear_fixmap(FIX_PMD);
268 return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
269}
270
271static pmd_t *get_pmd_virt_late(phys_addr_t pa)
272{
273 return (pmd_t *) __va(pa);
274}
275
276static phys_addr_t __init alloc_pmd_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700277{
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400278 BUG_ON((va - kernel_virt_addr) >> PGDIR_SHIFT);
Anup Patel671f9a32019-06-28 13:36:21 -0700279
Alexandre Ghiti0f02de42021-02-21 09:22:33 -0500280 return (uintptr_t)early_pmd;
Anup Patel671f9a32019-06-28 13:36:21 -0700281}
282
Atish Patrae8dcb612020-09-17 15:37:12 -0700283static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va)
284{
285 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
286}
287
288static phys_addr_t alloc_pmd_late(uintptr_t va)
289{
290 unsigned long vaddr;
291
292 vaddr = __get_free_page(GFP_KERNEL);
293 BUG_ON(!vaddr);
294 return __pa(vaddr);
295}
296
Anup Patel671f9a32019-06-28 13:36:21 -0700297static void __init create_pmd_mapping(pmd_t *pmdp,
298 uintptr_t va, phys_addr_t pa,
299 phys_addr_t sz, pgprot_t prot)
300{
301 pte_t *ptep;
302 phys_addr_t pte_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700303 uintptr_t pmd_idx = pmd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700304
305 if (sz == PMD_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700306 if (pmd_none(pmdp[pmd_idx]))
307 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700308 return;
309 }
310
Mike Rapoport974b9b22020-06-08 21:33:10 -0700311 if (pmd_none(pmdp[pmd_idx])) {
Atish Patrae8dcb612020-09-17 15:37:12 -0700312 pte_phys = pt_ops.alloc_pte(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700313 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
Atish Patrae8dcb612020-09-17 15:37:12 -0700314 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700315 memset(ptep, 0, PAGE_SIZE);
316 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700317 pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
Atish Patrae8dcb612020-09-17 15:37:12 -0700318 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700319 }
320
321 create_pte_mapping(ptep, va, pa, sz, prot);
322}
323
324#define pgd_next_t pmd_t
Atish Patrae8dcb612020-09-17 15:37:12 -0700325#define alloc_pgd_next(__va) pt_ops.alloc_pmd(__va)
326#define get_pgd_next_virt(__pa) pt_ops.get_pmd_virt(__pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700327#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
328 create_pmd_mapping(__nextp, __va, __pa, __sz, __prot)
Anup Patel671f9a32019-06-28 13:36:21 -0700329#define fixmap_pgd_next fixmap_pmd
330#else
331#define pgd_next_t pte_t
Atish Patrae8dcb612020-09-17 15:37:12 -0700332#define alloc_pgd_next(__va) pt_ops.alloc_pte(__va)
333#define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700334#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
335 create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
Anup Patel671f9a32019-06-28 13:36:21 -0700336#define fixmap_pgd_next fixmap_pte
337#endif
338
Atish Patrab91540d2020-09-17 15:37:15 -0700339void __init create_pgd_mapping(pgd_t *pgdp,
Anup Patel671f9a32019-06-28 13:36:21 -0700340 uintptr_t va, phys_addr_t pa,
341 phys_addr_t sz, pgprot_t prot)
342{
343 pgd_next_t *nextp;
344 phys_addr_t next_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700345 uintptr_t pgd_idx = pgd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700346
347 if (sz == PGDIR_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700348 if (pgd_val(pgdp[pgd_idx]) == 0)
349 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700350 return;
351 }
352
Mike Rapoport974b9b22020-06-08 21:33:10 -0700353 if (pgd_val(pgdp[pgd_idx]) == 0) {
Anup Patel671f9a32019-06-28 13:36:21 -0700354 next_phys = alloc_pgd_next(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700355 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700356 nextp = get_pgd_next_virt(next_phys);
357 memset(nextp, 0, PAGE_SIZE);
358 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700359 next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
Anup Patel671f9a32019-06-28 13:36:21 -0700360 nextp = get_pgd_next_virt(next_phys);
361 }
362
363 create_pgd_next_mapping(nextp, va, pa, sz, prot);
364}
365
366static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
367{
Zong Li0fdc6362019-11-08 01:00:40 -0800368 /* Upgrade to PMD_SIZE mappings whenever possible */
369 if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
370 return PAGE_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700371
Zong Li0fdc6362019-11-08 01:00:40 -0800372 return PMD_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700373}
374
Anup Patel387181d2019-03-26 08:03:47 +0000375/*
376 * setup_vm() is called from head.S with MMU-off.
377 *
378 * Following requirements should be honoured for setup_vm() to work
379 * correctly:
380 * 1) It should use PC-relative addressing for accessing kernel symbols.
381 * To achieve this we always use GCC cmodel=medany.
382 * 2) The compiler instrumentation for FTRACE will not work for setup_vm()
383 * so disable compiler instrumentation when FTRACE is enabled.
384 *
385 * Currently, the above requirements are honoured by using custom CFLAGS
386 * for init.o in mm/Makefile.
387 */
388
389#ifndef __riscv_cmodel_medany
Paul Walmsley6a527b62019-10-17 14:45:58 -0700390#error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
Anup Patel387181d2019-03-26 08:03:47 +0000391#endif
392
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400393uintptr_t load_pa, load_sz;
394
395static void __init create_kernel_page_table(pgd_t *pgdir, uintptr_t map_size)
396{
397 uintptr_t va, end_va;
398
399 end_va = kernel_virt_addr + load_sz;
400 for (va = kernel_virt_addr; va < end_va; va += map_size)
401 create_pgd_mapping(pgdir, va,
402 load_pa + (va - kernel_virt_addr),
403 map_size, PAGE_KERNEL_EXEC);
404}
405
Anup Patel671f9a32019-06-28 13:36:21 -0700406asmlinkage void __init setup_vm(uintptr_t dtb_pa)
Anup Patel6f1e9e92019-02-13 16:38:36 +0530407{
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400408 uintptr_t pa;
Alexandre Ghiti0f02de42021-02-21 09:22:33 -0500409 uintptr_t map_size;
Atish Patra6262f662020-09-17 15:37:11 -0700410#ifndef __PAGETABLE_PMD_FOLDED
411 pmd_t fix_bmap_spmd, fix_bmap_epmd;
412#endif
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400413 load_pa = (uintptr_t)(&_start);
414 load_sz = (uintptr_t)(&_end) - load_pa;
Anup Patel6f1e9e92019-02-13 16:38:36 +0530415
Anup Patel671f9a32019-06-28 13:36:21 -0700416 va_pa_offset = PAGE_OFFSET - load_pa;
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400417#ifdef CONFIG_64BIT
418 va_kernel_pa_offset = kernel_virt_addr - load_pa;
419#endif
420
Anup Patel671f9a32019-06-28 13:36:21 -0700421 pfn_base = PFN_DOWN(load_pa);
422
423 /*
424 * Enforce boot alignment requirements of RV32 and
425 * RV64 by only allowing PMD or PGD mappings.
426 */
Alexandre Ghiti0f02de42021-02-21 09:22:33 -0500427 map_size = PMD_SIZE;
Anup Patel6f1e9e92019-02-13 16:38:36 +0530428
429 /* Sanity check alignment and size */
430 BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
Anup Patel671f9a32019-06-28 13:36:21 -0700431 BUG_ON((load_pa % map_size) != 0);
Anup Patel671f9a32019-06-28 13:36:21 -0700432
Atish Patrae8dcb612020-09-17 15:37:12 -0700433 pt_ops.alloc_pte = alloc_pte_early;
434 pt_ops.get_pte_virt = get_pte_virt_early;
435#ifndef __PAGETABLE_PMD_FOLDED
436 pt_ops.alloc_pmd = alloc_pmd_early;
437 pt_ops.get_pmd_virt = get_pmd_virt_early;
438#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700439 /* Setup early PGD for fixmap */
440 create_pgd_mapping(early_pg_dir, FIXADDR_START,
441 (uintptr_t)fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530442
443#ifndef __PAGETABLE_PMD_FOLDED
Anup Patel671f9a32019-06-28 13:36:21 -0700444 /* Setup fixmap PMD */
445 create_pmd_mapping(fixmap_pmd, FIXADDR_START,
446 (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
447 /* Setup trampoline PGD and PMD */
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400448 create_pgd_mapping(trampoline_pg_dir, kernel_virt_addr,
Anup Patel671f9a32019-06-28 13:36:21 -0700449 (uintptr_t)trampoline_pmd, PGDIR_SIZE, PAGE_TABLE);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400450 create_pmd_mapping(trampoline_pmd, kernel_virt_addr,
Anup Patel671f9a32019-06-28 13:36:21 -0700451 load_pa, PMD_SIZE, PAGE_KERNEL_EXEC);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530452#else
Anup Patel671f9a32019-06-28 13:36:21 -0700453 /* Setup trampoline PGD */
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400454 create_pgd_mapping(trampoline_pg_dir, kernel_virt_addr,
Anup Patel671f9a32019-06-28 13:36:21 -0700455 load_pa, PGDIR_SIZE, PAGE_KERNEL_EXEC);
456#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530457
Anup Patel671f9a32019-06-28 13:36:21 -0700458 /*
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400459 * Setup early PGD covering entire kernel which will allow
Anup Patel671f9a32019-06-28 13:36:21 -0700460 * us to reach paging_init(). We map all memory banks later
461 * in setup_vm_final() below.
462 */
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400463 create_kernel_page_table(early_pg_dir, map_size);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530464
Anup Patel1074dd42020-11-04 12:07:13 +0530465#ifndef __PAGETABLE_PMD_FOLDED
466 /* Setup early PMD for DTB */
467 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
468 (uintptr_t)early_dtb_pmd, PGDIR_SIZE, PAGE_TABLE);
Vitaly Woolf105aa92021-01-16 01:49:48 +0200469#ifndef CONFIG_BUILTIN_DTB
Anup Patel1074dd42020-11-04 12:07:13 +0530470 /* Create two consecutive PMD mappings for FDT early scan */
471 pa = dtb_pa & ~(PMD_SIZE - 1);
472 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA,
473 pa, PMD_SIZE, PAGE_KERNEL);
474 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE,
475 pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
476 dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1));
Vitaly Woolf105aa92021-01-16 01:49:48 +0200477#else /* CONFIG_BUILTIN_DTB */
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400478#ifdef CONFIG_64BIT
479 /*
480 * __va can't be used since it would return a linear mapping address
481 * whereas dtb_early_va will be used before setup_vm_final installs
482 * the linear mapping.
483 */
484 dtb_early_va = kernel_mapping_pa_to_va(dtb_pa);
485#else
Vitaly Woolf105aa92021-01-16 01:49:48 +0200486 dtb_early_va = __va(dtb_pa);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400487#endif /* CONFIG_64BIT */
Vitaly Woolf105aa92021-01-16 01:49:48 +0200488#endif /* CONFIG_BUILTIN_DTB */
Anup Patel1074dd42020-11-04 12:07:13 +0530489#else
Vitaly Woolf105aa92021-01-16 01:49:48 +0200490#ifndef CONFIG_BUILTIN_DTB
Anup Patel8f3a2b42020-09-17 15:37:10 -0700491 /* Create two consecutive PGD mappings for FDT early scan */
492 pa = dtb_pa & ~(PGDIR_SIZE - 1);
493 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
494 pa, PGDIR_SIZE, PAGE_KERNEL);
495 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA + PGDIR_SIZE,
496 pa + PGDIR_SIZE, PGDIR_SIZE, PAGE_KERNEL);
497 dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PGDIR_SIZE - 1));
Vitaly Woolf105aa92021-01-16 01:49:48 +0200498#else /* CONFIG_BUILTIN_DTB */
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400499#ifdef CONFIG_64BIT
500 dtb_early_va = kernel_mapping_pa_to_va(dtb_pa);
501#else
Vitaly Woolf105aa92021-01-16 01:49:48 +0200502 dtb_early_va = __va(dtb_pa);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400503#endif /* CONFIG_64BIT */
Vitaly Woolf105aa92021-01-16 01:49:48 +0200504#endif /* CONFIG_BUILTIN_DTB */
Anup Patel1074dd42020-11-04 12:07:13 +0530505#endif
Albert Ou922b0372019-09-27 16:14:18 -0700506 dtb_early_pa = dtb_pa;
Atish Patra6262f662020-09-17 15:37:11 -0700507
508 /*
509 * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
510 * range can not span multiple pmds.
511 */
512 BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
513 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
514
515#ifndef __PAGETABLE_PMD_FOLDED
516 /*
517 * Early ioremap fixmap is already created as it lies within first 2MB
518 * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END
519 * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn
520 * the user if not.
521 */
522 fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))];
523 fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))];
524 if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) {
525 WARN_ON(1);
526 pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n",
527 pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd));
528 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
529 fix_to_virt(FIX_BTMAP_BEGIN));
530 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
531 fix_to_virt(FIX_BTMAP_END));
532
533 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
534 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
535 }
536#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700537}
538
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400539#ifdef CONFIG_64BIT
540void protect_kernel_linear_mapping_text_rodata(void)
541{
542 unsigned long text_start = (unsigned long)lm_alias(_start);
543 unsigned long init_text_start = (unsigned long)lm_alias(__init_text_begin);
544 unsigned long rodata_start = (unsigned long)lm_alias(__start_rodata);
545 unsigned long data_start = (unsigned long)lm_alias(_data);
546
547 set_memory_ro(text_start, (init_text_start - text_start) >> PAGE_SHIFT);
548 set_memory_nx(text_start, (init_text_start - text_start) >> PAGE_SHIFT);
549
550 set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
551 set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
552}
553#endif
554
Anup Patel671f9a32019-06-28 13:36:21 -0700555static void __init setup_vm_final(void)
556{
557 uintptr_t va, map_size;
558 phys_addr_t pa, start, end;
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700559 u64 i;
Anup Patel671f9a32019-06-28 13:36:21 -0700560
Atish Patrae8dcb612020-09-17 15:37:12 -0700561 /**
562 * MMU is enabled at this point. But page table setup is not complete yet.
563 * fixmap page table alloc functions should be used at this point
564 */
565 pt_ops.alloc_pte = alloc_pte_fixmap;
566 pt_ops.get_pte_virt = get_pte_virt_fixmap;
567#ifndef __PAGETABLE_PMD_FOLDED
568 pt_ops.alloc_pmd = alloc_pmd_fixmap;
569 pt_ops.get_pmd_virt = get_pmd_virt_fixmap;
570#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700571 /* Setup swapper PGD for fixmap */
572 create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
Zong Liac51e002020-01-02 11:12:40 +0800573 __pa_symbol(fixmap_pgd_next),
Anup Patel671f9a32019-06-28 13:36:21 -0700574 PGDIR_SIZE, PAGE_TABLE);
575
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400576 /* Map all memory banks in the linear mapping */
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700577 for_each_mem_range(i, &start, &end) {
Anup Patel671f9a32019-06-28 13:36:21 -0700578 if (start >= end)
579 break;
Anup Patel671f9a32019-06-28 13:36:21 -0700580 if (start <= __pa(PAGE_OFFSET) &&
581 __pa(PAGE_OFFSET) < end)
582 start = __pa(PAGE_OFFSET);
583
584 map_size = best_map_size(start, end - start);
585 for (pa = start; pa < end; pa += map_size) {
586 va = (uintptr_t)__va(pa);
587 create_pgd_mapping(swapper_pg_dir, va, pa,
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400588 map_size,
589#ifdef CONFIG_64BIT
590 PAGE_KERNEL
591#else
592 PAGE_KERNEL_EXEC
593#endif
594 );
595
Anup Patel671f9a32019-06-28 13:36:21 -0700596 }
Anup Patel6f1e9e92019-02-13 16:38:36 +0530597 }
Anup Patelf2c17aa2019-01-07 20:57:01 +0530598
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400599#ifdef CONFIG_64BIT
600 /* Map the kernel */
601 create_kernel_page_table(swapper_pg_dir, PMD_SIZE);
602#endif
603
Anup Patel671f9a32019-06-28 13:36:21 -0700604 /* Clear fixmap PTE and PMD mappings */
605 clear_fixmap(FIX_PTE);
606 clear_fixmap(FIX_PMD);
607
608 /* Move to swapper page table */
Zong Liac51e002020-01-02 11:12:40 +0800609 csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | SATP_MODE);
Anup Patel671f9a32019-06-28 13:36:21 -0700610 local_flush_tlb_all();
Atish Patrae8dcb612020-09-17 15:37:12 -0700611
612 /* generic page allocation functions must be used to setup page table */
613 pt_ops.alloc_pte = alloc_pte_late;
614 pt_ops.get_pte_virt = get_pte_virt_late;
615#ifndef __PAGETABLE_PMD_FOLDED
616 pt_ops.alloc_pmd = alloc_pmd_late;
617 pt_ops.get_pmd_virt = get_pmd_virt_late;
618#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700619}
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100620#else
621asmlinkage void __init setup_vm(uintptr_t dtb_pa)
622{
623 dtb_early_va = (void *)dtb_pa;
Atish Patraa78c6f52020-10-01 12:04:56 -0700624 dtb_early_pa = dtb_pa;
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100625}
626
627static inline void setup_vm_final(void)
628{
629}
630#endif /* CONFIG_MMU */
Anup Patel671f9a32019-06-28 13:36:21 -0700631
Zong Lid27c3c92020-03-10 00:55:41 +0800632#ifdef CONFIG_STRICT_KERNEL_RWX
Jisheng Zhang19875012021-03-30 02:22:21 +0800633void __init protect_kernel_text_data(void)
Zong Lid27c3c92020-03-10 00:55:41 +0800634{
Atish Patra19a00862020-11-04 16:04:38 -0800635 unsigned long text_start = (unsigned long)_start;
636 unsigned long init_text_start = (unsigned long)__init_text_begin;
637 unsigned long init_data_start = (unsigned long)__init_data_begin;
Zong Lid27c3c92020-03-10 00:55:41 +0800638 unsigned long rodata_start = (unsigned long)__start_rodata;
639 unsigned long data_start = (unsigned long)_data;
640 unsigned long max_low = (unsigned long)(__va(PFN_PHYS(max_low_pfn)));
641
Atish Patra19a00862020-11-04 16:04:38 -0800642 set_memory_ro(text_start, (init_text_start - text_start) >> PAGE_SHIFT);
643 set_memory_ro(init_text_start, (init_data_start - init_text_start) >> PAGE_SHIFT);
644 set_memory_nx(init_data_start, (rodata_start - init_data_start) >> PAGE_SHIFT);
645 /* rodata section is marked readonly in mark_rodata_ro */
Zong Lid27c3c92020-03-10 00:55:41 +0800646 set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
647 set_memory_nx(data_start, (max_low - data_start) >> PAGE_SHIFT);
Atish Patra19a00862020-11-04 16:04:38 -0800648}
649
650void mark_rodata_ro(void)
651{
652 unsigned long rodata_start = (unsigned long)__start_rodata;
653 unsigned long data_start = (unsigned long)_data;
654
655 set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
Zong Lib422d282020-06-03 16:03:55 -0700656
657 debug_checkwx();
Zong Lid27c3c92020-03-10 00:55:41 +0800658}
659#endif
660
Anup Patel671f9a32019-06-28 13:36:21 -0700661void __init paging_init(void)
662{
663 setup_vm_final();
664 setup_zero_page();
Atish Patracbd34f42020-11-18 16:38:27 -0800665}
666
667void __init misc_mem_init(void)
668{
Kefeng Wangf6e5aed2021-02-25 14:54:17 +0800669 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
Atish Patra4f0e8ee2020-11-18 16:38:29 -0800670 arch_numa_init();
Atish Patracbd34f42020-11-18 16:38:27 -0800671 sparse_init();
Anup Patel671f9a32019-06-28 13:36:21 -0700672 zone_sizes_init();
Atish Patra4f0e8ee2020-11-18 16:38:29 -0800673 memblock_dump_all();
Anup Patel6f1e9e92019-02-13 16:38:36 +0530674}
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600675
Kefeng Wang9fe57d82019-10-23 11:23:02 +0800676#ifdef CONFIG_SPARSEMEM_VMEMMAP
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600677int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
678 struct vmem_altmap *altmap)
679{
Anshuman Khandual1d9cfee2020-08-06 23:23:19 -0700680 return vmemmap_populate_basepages(start, end, node, NULL);
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600681}
682#endif