Thomas Gleixner | 50acfb2 | 2019-05-29 07:18:00 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2012 Regents of the University of California |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 4 | * Copyright (C) 2019 Western Digital Corporation or its affiliates. |
Nick Kossifidis | e53d281 | 2021-04-19 03:55:38 +0300 | [diff] [blame] | 5 | * Copyright (C) 2020 FORTH-ICS/CARV |
| 6 | * Nick Kossifidis <mick@ics.forth.gr> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <linux/init.h> |
| 10 | #include <linux/mm.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 11 | #include <linux/memblock.h> |
Mike Rapoport | 57c8a66 | 2018-10-30 15:09:49 -0700 | [diff] [blame] | 12 | #include <linux/initrd.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 13 | #include <linux/swap.h> |
Kefeng Wang | ce3aca0 | 2021-06-02 16:55:16 +0800 | [diff] [blame] | 14 | #include <linux/swiotlb.h> |
Christoph Hellwig | 5ec9c4f | 2018-01-16 09:37:50 +0100 | [diff] [blame] | 15 | #include <linux/sizes.h> |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 16 | #include <linux/of_fdt.h> |
Nick Kossifidis | 5640975 | 2021-04-19 03:55:39 +0300 | [diff] [blame] | 17 | #include <linux/of_reserved_mem.h> |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 18 | #include <linux/libfdt.h> |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 19 | #include <linux/set_memory.h> |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 20 | #include <linux/dma-map-ops.h> |
Nick Kossifidis | e53d281 | 2021-04-19 03:55:38 +0300 | [diff] [blame] | 21 | #include <linux/crash_dump.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 22 | |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 23 | #include <asm/fixmap.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 24 | #include <asm/tlbflush.h> |
| 25 | #include <asm/sections.h> |
Palmer Dabbelt | 2d26825 | 2020-04-14 13:43:24 +0900 | [diff] [blame] | 26 | #include <asm/soc.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 27 | #include <asm/io.h> |
Zong Li | b422d28 | 2020-06-03 16:03:55 -0700 | [diff] [blame] | 28 | #include <asm/ptdump.h> |
Atish Patra | 4f0e8ee | 2020-11-18 16:38:29 -0800 | [diff] [blame] | 29 | #include <asm/numa.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 30 | |
Paul Walmsley | ffaee27 | 2019-10-17 15:00:17 -0700 | [diff] [blame] | 31 | #include "../kernel/head.h" |
| 32 | |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 33 | unsigned long kernel_virt_addr = KERNEL_LINK_ADDR; |
| 34 | EXPORT_SYMBOL(kernel_virt_addr); |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 35 | #ifdef CONFIG_XIP_KERNEL |
| 36 | #define kernel_virt_addr (*((unsigned long *)XIP_FIXUP(&kernel_virt_addr))) |
Kefeng Wang | 50bae95 | 2021-05-14 17:49:08 +0800 | [diff] [blame] | 37 | extern char _xiprom[], _exiprom[]; |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 38 | #endif |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 39 | |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 40 | unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] |
| 41 | __page_aligned_bss; |
| 42 | EXPORT_SYMBOL(empty_zero_page); |
| 43 | |
Anup Patel | d90d45d | 2019-06-07 06:01:29 +0000 | [diff] [blame] | 44 | extern char _start[]; |
Anup Patel | 8f3a2b4 | 2020-09-17 15:37:10 -0700 | [diff] [blame] | 45 | #define DTB_EARLY_BASE_VA PGDIR_SIZE |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 46 | void *_dtb_early_va __initdata; |
| 47 | uintptr_t _dtb_early_pa __initdata; |
Anup Patel | d90d45d | 2019-06-07 06:01:29 +0000 | [diff] [blame] | 48 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 49 | struct pt_alloc_ops { |
| 50 | pte_t *(*get_pte_virt)(phys_addr_t pa); |
| 51 | phys_addr_t (*alloc_pte)(uintptr_t va); |
| 52 | #ifndef __PAGETABLE_PMD_FOLDED |
| 53 | pmd_t *(*get_pmd_virt)(phys_addr_t pa); |
| 54 | phys_addr_t (*alloc_pmd)(uintptr_t va); |
| 55 | #endif |
| 56 | }; |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 57 | |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 58 | static phys_addr_t dma32_phys_limit __initdata; |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 59 | |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 60 | static void __init zone_sizes_init(void) |
| 61 | { |
Christoph Hellwig | 5ec9c4f | 2018-01-16 09:37:50 +0100 | [diff] [blame] | 62 | unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, }; |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 63 | |
Zong Li | d5fad48 | 2018-06-25 16:49:37 +0800 | [diff] [blame] | 64 | #ifdef CONFIG_ZONE_DMA32 |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 65 | max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit); |
Zong Li | d5fad48 | 2018-06-25 16:49:37 +0800 | [diff] [blame] | 66 | #endif |
Christoph Hellwig | 5ec9c4f | 2018-01-16 09:37:50 +0100 | [diff] [blame] | 67 | max_zone_pfns[ZONE_NORMAL] = max_low_pfn; |
| 68 | |
Mike Rapoport | 9691a07 | 2020-06-03 15:57:10 -0700 | [diff] [blame] | 69 | free_area_init(max_zone_pfns); |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 70 | } |
| 71 | |
Kefeng Wang | 8fa3cdf | 2020-05-14 19:53:35 +0800 | [diff] [blame] | 72 | #if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM) |
Yash Shah | 2cc6c4a | 2019-11-18 05:58:34 +0000 | [diff] [blame] | 73 | static inline void print_mlk(char *name, unsigned long b, unsigned long t) |
| 74 | { |
| 75 | pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t, |
| 76 | (((t) - (b)) >> 10)); |
| 77 | } |
| 78 | |
| 79 | static inline void print_mlm(char *name, unsigned long b, unsigned long t) |
| 80 | { |
| 81 | pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t, |
| 82 | (((t) - (b)) >> 20)); |
| 83 | } |
| 84 | |
Jisheng Zhang | 1987501 | 2021-03-30 02:22:21 +0800 | [diff] [blame] | 85 | static void __init print_vm_layout(void) |
Yash Shah | 2cc6c4a | 2019-11-18 05:58:34 +0000 | [diff] [blame] | 86 | { |
| 87 | pr_notice("Virtual kernel memory layout:\n"); |
| 88 | print_mlk("fixmap", (unsigned long)FIXADDR_START, |
| 89 | (unsigned long)FIXADDR_TOP); |
| 90 | print_mlm("pci io", (unsigned long)PCI_IO_START, |
| 91 | (unsigned long)PCI_IO_END); |
| 92 | print_mlm("vmemmap", (unsigned long)VMEMMAP_START, |
| 93 | (unsigned long)VMEMMAP_END); |
| 94 | print_mlm("vmalloc", (unsigned long)VMALLOC_START, |
| 95 | (unsigned long)VMALLOC_END); |
| 96 | print_mlm("lowmem", (unsigned long)PAGE_OFFSET, |
| 97 | (unsigned long)high_memory); |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 98 | #ifdef CONFIG_64BIT |
| 99 | print_mlm("kernel", (unsigned long)KERNEL_LINK_ADDR, |
| 100 | (unsigned long)ADDRESS_SPACE_END); |
| 101 | #endif |
Yash Shah | 2cc6c4a | 2019-11-18 05:58:34 +0000 | [diff] [blame] | 102 | } |
| 103 | #else |
| 104 | static void print_vm_layout(void) { } |
| 105 | #endif /* CONFIG_DEBUG_VM */ |
| 106 | |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 107 | void __init mem_init(void) |
| 108 | { |
| 109 | #ifdef CONFIG_FLATMEM |
| 110 | BUG_ON(!mem_map); |
| 111 | #endif /* CONFIG_FLATMEM */ |
| 112 | |
Kefeng Wang | ce3aca0 | 2021-06-02 16:55:16 +0800 | [diff] [blame] | 113 | #ifdef CONFIG_SWIOTLB |
| 114 | if (swiotlb_force == SWIOTLB_FORCE || |
| 115 | max_pfn > PFN_DOWN(dma32_phys_limit)) |
| 116 | swiotlb_init(1); |
| 117 | else |
| 118 | swiotlb_force = SWIOTLB_NO_FORCE; |
| 119 | #endif |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 120 | high_memory = (void *)(__va(PFN_PHYS(max_low_pfn))); |
Mike Rapoport | c6ffc5c | 2018-10-30 15:09:30 -0700 | [diff] [blame] | 121 | memblock_free_all(); |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 122 | |
Yash Shah | 2cc6c4a | 2019-11-18 05:58:34 +0000 | [diff] [blame] | 123 | print_vm_layout(); |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 124 | } |
| 125 | |
Kefeng Wang | c9811e3 | 2021-06-02 16:55:17 +0800 | [diff] [blame^] | 126 | /* |
| 127 | * The default maximal physical memory size is -PAGE_OFFSET, |
| 128 | * limit the memory size via mem. |
| 129 | */ |
| 130 | static phys_addr_t memory_limit = -PAGE_OFFSET; |
| 131 | |
| 132 | static int __init early_mem(char *p) |
| 133 | { |
| 134 | u64 size; |
| 135 | |
| 136 | if (!p) |
| 137 | return 1; |
| 138 | |
| 139 | size = memparse(p, &p) & PAGE_MASK; |
| 140 | memory_limit = min_t(u64, size, memory_limit); |
| 141 | |
| 142 | pr_notice("Memory limited to %lldMB\n", (u64)memory_limit >> 20); |
| 143 | |
| 144 | return 0; |
| 145 | } |
| 146 | early_param("mem", early_mem); |
| 147 | |
Kefeng Wang | f842f5f | 2021-05-10 19:42:22 +0800 | [diff] [blame] | 148 | static void __init setup_bootmem(void) |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 149 | { |
Zong Li | ac51e00 | 2020-01-02 11:12:40 +0800 | [diff] [blame] | 150 | phys_addr_t vmlinux_end = __pa_symbol(&_end); |
| 151 | phys_addr_t vmlinux_start = __pa_symbol(&_start); |
Atish Patra | abb8e86 | 2021-01-11 15:45:02 -0800 | [diff] [blame] | 152 | phys_addr_t max_mapped_addr = __pa(~(ulong)0); |
Kefeng Wang | c9811e3 | 2021-06-02 16:55:17 +0800 | [diff] [blame^] | 153 | phys_addr_t dram_end; |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 154 | |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 155 | #ifdef CONFIG_XIP_KERNEL |
| 156 | vmlinux_start = __pa_symbol(&_sdata); |
| 157 | #endif |
| 158 | |
Kefeng Wang | c9811e3 | 2021-06-02 16:55:17 +0800 | [diff] [blame^] | 159 | memblock_enforce_memory_limit(memory_limit); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 160 | |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 161 | /* |
| 162 | * Reserve from the start of the kernel to the end of the kernel |
Geert Uytterhoeven | 8db6f93 | 2021-04-29 17:05:00 +0200 | [diff] [blame] | 163 | */ |
| 164 | #if defined(CONFIG_64BIT) && defined(CONFIG_STRICT_KERNEL_RWX) |
| 165 | /* |
| 166 | * Make sure we align the reservation on PMD_SIZE since we will |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 167 | * map the kernel in the linear mapping as read-only: we do not want |
| 168 | * any allocation to happen between _end and the next pmd aligned page. |
| 169 | */ |
Geert Uytterhoeven | 8db6f93 | 2021-04-29 17:05:00 +0200 | [diff] [blame] | 170 | vmlinux_end = (vmlinux_end + PMD_SIZE - 1) & PMD_MASK; |
| 171 | #endif |
| 172 | memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start); |
Anup Patel | d90d45d | 2019-06-07 06:01:29 +0000 | [diff] [blame] | 173 | |
Kefeng Wang | c9811e3 | 2021-06-02 16:55:17 +0800 | [diff] [blame^] | 174 | dram_end = memblock_end_of_DRAM(); |
Atish Patra | abb8e86 | 2021-01-11 15:45:02 -0800 | [diff] [blame] | 175 | /* |
| 176 | * memblock allocator is not aware of the fact that last 4K bytes of |
| 177 | * the addressable memory can not be mapped because of IS_ERR_VALUE |
| 178 | * macro. Make sure that last 4k bytes are not usable by memblock |
| 179 | * if end of dram is equal to maximum addressable memory. |
| 180 | */ |
| 181 | if (max_mapped_addr == (dram_end - 1)) |
| 182 | memblock_set_current_limit(max_mapped_addr - 4096); |
| 183 | |
Kefeng Wang | f6e5aed | 2021-02-25 14:54:17 +0800 | [diff] [blame] | 184 | min_low_pfn = PFN_UP(memblock_start_of_DRAM()); |
| 185 | max_low_pfn = max_pfn = PFN_DOWN(dram_end); |
| 186 | |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 187 | dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn)); |
Guo Ren | 336e8eb | 2021-01-21 14:31:17 +0800 | [diff] [blame] | 188 | set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 189 | |
Kefeng Wang | aec33b5 | 2021-01-15 13:46:06 +0800 | [diff] [blame] | 190 | reserve_initrd_mem(); |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 191 | /* |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 192 | * If DTB is built in, no need to reserve its memblock. |
| 193 | * Otherwise, do reserve it but avoid using |
| 194 | * early_init_fdt_reserve_self() since __pa() does |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 195 | * not work for DTB pointers that are fixmap addresses |
| 196 | */ |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 197 | if (!IS_ENABLED(CONFIG_BUILTIN_DTB)) |
| 198 | memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va)); |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 199 | |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 200 | early_init_fdt_scan_reserved_mem(); |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 201 | dma_contiguous_reserve(dma32_phys_limit); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 202 | memblock_allow_resize(); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 203 | } |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 204 | |
Christoph Hellwig | 6bd33e1 | 2019-10-28 13:10:41 +0100 | [diff] [blame] | 205 | #ifdef CONFIG_MMU |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 206 | static struct pt_alloc_ops _pt_ops __initdata; |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 207 | |
| 208 | #ifdef CONFIG_XIP_KERNEL |
| 209 | #define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&_pt_ops)) |
| 210 | #else |
| 211 | #define pt_ops _pt_ops |
| 212 | #endif |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 213 | |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 214 | /* Offset between linear mapping virtual address and kernel load address */ |
Jisheng Zhang | de31ea4 | 2021-03-30 02:22:51 +0800 | [diff] [blame] | 215 | unsigned long va_pa_offset __ro_after_init; |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 216 | EXPORT_SYMBOL(va_pa_offset); |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 217 | #ifdef CONFIG_XIP_KERNEL |
| 218 | #define va_pa_offset (*((unsigned long *)XIP_FIXUP(&va_pa_offset))) |
| 219 | #endif |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 220 | /* Offset between kernel mapping virtual address and kernel load address */ |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 221 | #ifdef CONFIG_64BIT |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 222 | unsigned long va_kernel_pa_offset __ro_after_init; |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 223 | EXPORT_SYMBOL(va_kernel_pa_offset); |
| 224 | #endif |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 225 | #ifdef CONFIG_XIP_KERNEL |
| 226 | #define va_kernel_pa_offset (*((unsigned long *)XIP_FIXUP(&va_kernel_pa_offset))) |
| 227 | #endif |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 228 | unsigned long va_kernel_xip_pa_offset __ro_after_init; |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 229 | EXPORT_SYMBOL(va_kernel_xip_pa_offset); |
| 230 | #ifdef CONFIG_XIP_KERNEL |
| 231 | #define va_kernel_xip_pa_offset (*((unsigned long *)XIP_FIXUP(&va_kernel_xip_pa_offset))) |
| 232 | #endif |
Jisheng Zhang | de31ea4 | 2021-03-30 02:22:51 +0800 | [diff] [blame] | 233 | unsigned long pfn_base __ro_after_init; |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 234 | EXPORT_SYMBOL(pfn_base); |
| 235 | |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 236 | pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 237 | pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss; |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 238 | static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 239 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 240 | pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE); |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 241 | |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 242 | #ifdef CONFIG_XIP_KERNEL |
| 243 | #define trampoline_pg_dir ((pgd_t *)XIP_FIXUP(trampoline_pg_dir)) |
| 244 | #define fixmap_pte ((pte_t *)XIP_FIXUP(fixmap_pte)) |
| 245 | #define early_pg_dir ((pgd_t *)XIP_FIXUP(early_pg_dir)) |
| 246 | #endif /* CONFIG_XIP_KERNEL */ |
| 247 | |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 248 | void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot) |
| 249 | { |
| 250 | unsigned long addr = __fix_to_virt(idx); |
| 251 | pte_t *ptep; |
| 252 | |
| 253 | BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); |
| 254 | |
| 255 | ptep = &fixmap_pte[pte_index(addr)]; |
| 256 | |
Greentime Hu | 21190b7 | 2020-08-04 11:02:05 +0800 | [diff] [blame] | 257 | if (pgprot_val(prot)) |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 258 | set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot)); |
Greentime Hu | 21190b7 | 2020-08-04 11:02:05 +0800 | [diff] [blame] | 259 | else |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 260 | pte_clear(&init_mm, addr, ptep); |
Greentime Hu | 21190b7 | 2020-08-04 11:02:05 +0800 | [diff] [blame] | 261 | local_flush_tlb_page(addr); |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 262 | } |
| 263 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 264 | static inline pte_t *__init get_pte_virt_early(phys_addr_t pa) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 265 | { |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 266 | return (pte_t *)((uintptr_t)pa); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 267 | } |
| 268 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 269 | static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa) |
| 270 | { |
| 271 | clear_fixmap(FIX_PTE); |
| 272 | return (pte_t *)set_fixmap_offset(FIX_PTE, pa); |
| 273 | } |
| 274 | |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 275 | static inline pte_t *__init get_pte_virt_late(phys_addr_t pa) |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 276 | { |
| 277 | return (pte_t *) __va(pa); |
| 278 | } |
| 279 | |
| 280 | static inline phys_addr_t __init alloc_pte_early(uintptr_t va) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 281 | { |
| 282 | /* |
| 283 | * We only create PMD or PGD early mappings so we |
| 284 | * should never reach here with MMU disabled. |
| 285 | */ |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 286 | BUG(); |
| 287 | } |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 288 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 289 | static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va) |
| 290 | { |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 291 | return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); |
| 292 | } |
| 293 | |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 294 | static phys_addr_t __init alloc_pte_late(uintptr_t va) |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 295 | { |
| 296 | unsigned long vaddr; |
| 297 | |
| 298 | vaddr = __get_free_page(GFP_KERNEL); |
zhouchuangao | e75e6bf | 2021-03-30 06:56:26 -0700 | [diff] [blame] | 299 | BUG_ON(!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr))); |
| 300 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 301 | return __pa(vaddr); |
| 302 | } |
| 303 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 304 | static void __init create_pte_mapping(pte_t *ptep, |
| 305 | uintptr_t va, phys_addr_t pa, |
| 306 | phys_addr_t sz, pgprot_t prot) |
| 307 | { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 308 | uintptr_t pte_idx = pte_index(va); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 309 | |
| 310 | BUG_ON(sz != PAGE_SIZE); |
| 311 | |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 312 | if (pte_none(ptep[pte_idx])) |
| 313 | ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 314 | } |
| 315 | |
| 316 | #ifndef __PAGETABLE_PMD_FOLDED |
| 317 | |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 318 | static pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss; |
| 319 | static pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss; |
| 320 | static pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE); |
| 321 | static pmd_t early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 322 | |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 323 | #ifdef CONFIG_XIP_KERNEL |
| 324 | #define trampoline_pmd ((pmd_t *)XIP_FIXUP(trampoline_pmd)) |
| 325 | #define fixmap_pmd ((pmd_t *)XIP_FIXUP(fixmap_pmd)) |
| 326 | #define early_pmd ((pmd_t *)XIP_FIXUP(early_pmd)) |
| 327 | #endif /* CONFIG_XIP_KERNEL */ |
| 328 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 329 | static pmd_t *__init get_pmd_virt_early(phys_addr_t pa) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 330 | { |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 331 | /* Before MMU is enabled */ |
| 332 | return (pmd_t *)((uintptr_t)pa); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 333 | } |
| 334 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 335 | static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa) |
| 336 | { |
| 337 | clear_fixmap(FIX_PMD); |
| 338 | return (pmd_t *)set_fixmap_offset(FIX_PMD, pa); |
| 339 | } |
| 340 | |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 341 | static pmd_t *__init get_pmd_virt_late(phys_addr_t pa) |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 342 | { |
| 343 | return (pmd_t *) __va(pa); |
| 344 | } |
| 345 | |
| 346 | static phys_addr_t __init alloc_pmd_early(uintptr_t va) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 347 | { |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 348 | BUG_ON((va - kernel_virt_addr) >> PGDIR_SHIFT); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 349 | |
Alexandre Ghiti | 0f02de4 | 2021-02-21 09:22:33 -0500 | [diff] [blame] | 350 | return (uintptr_t)early_pmd; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 351 | } |
| 352 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 353 | static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va) |
| 354 | { |
| 355 | return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); |
| 356 | } |
| 357 | |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 358 | static phys_addr_t __init alloc_pmd_late(uintptr_t va) |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 359 | { |
| 360 | unsigned long vaddr; |
| 361 | |
| 362 | vaddr = __get_free_page(GFP_KERNEL); |
| 363 | BUG_ON(!vaddr); |
| 364 | return __pa(vaddr); |
| 365 | } |
| 366 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 367 | static void __init create_pmd_mapping(pmd_t *pmdp, |
| 368 | uintptr_t va, phys_addr_t pa, |
| 369 | phys_addr_t sz, pgprot_t prot) |
| 370 | { |
| 371 | pte_t *ptep; |
| 372 | phys_addr_t pte_phys; |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 373 | uintptr_t pmd_idx = pmd_index(va); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 374 | |
| 375 | if (sz == PMD_SIZE) { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 376 | if (pmd_none(pmdp[pmd_idx])) |
| 377 | pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 378 | return; |
| 379 | } |
| 380 | |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 381 | if (pmd_none(pmdp[pmd_idx])) { |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 382 | pte_phys = pt_ops.alloc_pte(va); |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 383 | pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE); |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 384 | ptep = pt_ops.get_pte_virt(pte_phys); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 385 | memset(ptep, 0, PAGE_SIZE); |
| 386 | } else { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 387 | pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx])); |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 388 | ptep = pt_ops.get_pte_virt(pte_phys); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 389 | } |
| 390 | |
| 391 | create_pte_mapping(ptep, va, pa, sz, prot); |
| 392 | } |
| 393 | |
| 394 | #define pgd_next_t pmd_t |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 395 | #define alloc_pgd_next(__va) pt_ops.alloc_pmd(__va) |
| 396 | #define get_pgd_next_virt(__pa) pt_ops.get_pmd_virt(__pa) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 397 | #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \ |
| 398 | create_pmd_mapping(__nextp, __va, __pa, __sz, __prot) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 399 | #define fixmap_pgd_next fixmap_pmd |
| 400 | #else |
| 401 | #define pgd_next_t pte_t |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 402 | #define alloc_pgd_next(__va) pt_ops.alloc_pte(__va) |
| 403 | #define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 404 | #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \ |
| 405 | create_pte_mapping(__nextp, __va, __pa, __sz, __prot) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 406 | #define fixmap_pgd_next fixmap_pte |
| 407 | #endif |
| 408 | |
Atish Patra | b91540d | 2020-09-17 15:37:15 -0700 | [diff] [blame] | 409 | void __init create_pgd_mapping(pgd_t *pgdp, |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 410 | uintptr_t va, phys_addr_t pa, |
| 411 | phys_addr_t sz, pgprot_t prot) |
| 412 | { |
| 413 | pgd_next_t *nextp; |
| 414 | phys_addr_t next_phys; |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 415 | uintptr_t pgd_idx = pgd_index(va); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 416 | |
| 417 | if (sz == PGDIR_SIZE) { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 418 | if (pgd_val(pgdp[pgd_idx]) == 0) |
| 419 | pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 420 | return; |
| 421 | } |
| 422 | |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 423 | if (pgd_val(pgdp[pgd_idx]) == 0) { |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 424 | next_phys = alloc_pgd_next(va); |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 425 | pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 426 | nextp = get_pgd_next_virt(next_phys); |
| 427 | memset(nextp, 0, PAGE_SIZE); |
| 428 | } else { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 429 | next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx])); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 430 | nextp = get_pgd_next_virt(next_phys); |
| 431 | } |
| 432 | |
| 433 | create_pgd_next_mapping(nextp, va, pa, sz, prot); |
| 434 | } |
| 435 | |
| 436 | static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size) |
| 437 | { |
Zong Li | 0fdc636 | 2019-11-08 01:00:40 -0800 | [diff] [blame] | 438 | /* Upgrade to PMD_SIZE mappings whenever possible */ |
| 439 | if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1))) |
| 440 | return PAGE_SIZE; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 441 | |
Zong Li | 0fdc636 | 2019-11-08 01:00:40 -0800 | [diff] [blame] | 442 | return PMD_SIZE; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 443 | } |
| 444 | |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 445 | #ifdef CONFIG_XIP_KERNEL |
| 446 | /* called from head.S with MMU off */ |
| 447 | asmlinkage void __init __copy_data(void) |
| 448 | { |
| 449 | void *from = (void *)(&_sdata); |
| 450 | void *end = (void *)(&_end); |
| 451 | void *to = (void *)CONFIG_PHYS_RAM_BASE; |
| 452 | size_t sz = (size_t)(end - from + 1); |
| 453 | |
| 454 | memcpy(to, from, sz); |
| 455 | } |
| 456 | #endif |
| 457 | |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 458 | /* |
| 459 | * setup_vm() is called from head.S with MMU-off. |
| 460 | * |
| 461 | * Following requirements should be honoured for setup_vm() to work |
| 462 | * correctly: |
| 463 | * 1) It should use PC-relative addressing for accessing kernel symbols. |
| 464 | * To achieve this we always use GCC cmodel=medany. |
| 465 | * 2) The compiler instrumentation for FTRACE will not work for setup_vm() |
| 466 | * so disable compiler instrumentation when FTRACE is enabled. |
| 467 | * |
| 468 | * Currently, the above requirements are honoured by using custom CFLAGS |
| 469 | * for init.o in mm/Makefile. |
| 470 | */ |
| 471 | |
| 472 | #ifndef __riscv_cmodel_medany |
Paul Walmsley | 6a527b6 | 2019-10-17 14:45:58 -0700 | [diff] [blame] | 473 | #error "setup_vm() is called from head.S before relocate so it should not use absolute addressing." |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 474 | #endif |
| 475 | |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 476 | static uintptr_t load_pa __initdata; |
| 477 | static uintptr_t load_sz __initdata; |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 478 | #ifdef CONFIG_XIP_KERNEL |
| 479 | #define load_pa (*((uintptr_t *)XIP_FIXUP(&load_pa))) |
| 480 | #define load_sz (*((uintptr_t *)XIP_FIXUP(&load_sz))) |
| 481 | #endif |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 482 | |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 483 | #ifdef CONFIG_XIP_KERNEL |
Vitaly Wool | ae3d69b | 2021-06-08 10:21:27 +0200 | [diff] [blame] | 484 | static uintptr_t xiprom __initdata; |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 485 | static uintptr_t xiprom_sz __initdata; |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 486 | #define xiprom_sz (*((uintptr_t *)XIP_FIXUP(&xiprom_sz))) |
| 487 | #define xiprom (*((uintptr_t *)XIP_FIXUP(&xiprom))) |
| 488 | |
| 489 | static void __init create_kernel_page_table(pgd_t *pgdir, uintptr_t map_size) |
| 490 | { |
| 491 | uintptr_t va, end_va; |
| 492 | |
| 493 | /* Map the flash resident part */ |
| 494 | end_va = kernel_virt_addr + xiprom_sz; |
| 495 | for (va = kernel_virt_addr; va < end_va; va += map_size) |
| 496 | create_pgd_mapping(pgdir, va, |
| 497 | xiprom + (va - kernel_virt_addr), |
| 498 | map_size, PAGE_KERNEL_EXEC); |
| 499 | |
| 500 | /* Map the data in RAM */ |
| 501 | end_va = kernel_virt_addr + XIP_OFFSET + load_sz; |
| 502 | for (va = kernel_virt_addr + XIP_OFFSET; va < end_va; va += map_size) |
| 503 | create_pgd_mapping(pgdir, va, |
| 504 | load_pa + (va - (kernel_virt_addr + XIP_OFFSET)), |
| 505 | map_size, PAGE_KERNEL); |
| 506 | } |
| 507 | #else |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 508 | static void __init create_kernel_page_table(pgd_t *pgdir, uintptr_t map_size) |
| 509 | { |
| 510 | uintptr_t va, end_va; |
| 511 | |
| 512 | end_va = kernel_virt_addr + load_sz; |
| 513 | for (va = kernel_virt_addr; va < end_va; va += map_size) |
| 514 | create_pgd_mapping(pgdir, va, |
| 515 | load_pa + (va - kernel_virt_addr), |
| 516 | map_size, PAGE_KERNEL_EXEC); |
| 517 | } |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 518 | #endif |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 519 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 520 | asmlinkage void __init setup_vm(uintptr_t dtb_pa) |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 521 | { |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 522 | uintptr_t __maybe_unused pa; |
Alexandre Ghiti | 0f02de4 | 2021-02-21 09:22:33 -0500 | [diff] [blame] | 523 | uintptr_t map_size; |
Atish Patra | 6262f66 | 2020-09-17 15:37:11 -0700 | [diff] [blame] | 524 | #ifndef __PAGETABLE_PMD_FOLDED |
| 525 | pmd_t fix_bmap_spmd, fix_bmap_epmd; |
| 526 | #endif |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 527 | |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 528 | #ifdef CONFIG_XIP_KERNEL |
| 529 | xiprom = (uintptr_t)CONFIG_XIP_PHYS_ADDR; |
| 530 | xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom); |
| 531 | |
| 532 | load_pa = (uintptr_t)CONFIG_PHYS_RAM_BASE; |
| 533 | load_sz = (uintptr_t)(&_end) - (uintptr_t)(&_sdata); |
| 534 | |
| 535 | va_kernel_xip_pa_offset = kernel_virt_addr - xiprom; |
| 536 | #else |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 537 | load_pa = (uintptr_t)(&_start); |
| 538 | load_sz = (uintptr_t)(&_end) - load_pa; |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 539 | #endif |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 540 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 541 | va_pa_offset = PAGE_OFFSET - load_pa; |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 542 | #ifdef CONFIG_64BIT |
| 543 | va_kernel_pa_offset = kernel_virt_addr - load_pa; |
| 544 | #endif |
| 545 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 546 | pfn_base = PFN_DOWN(load_pa); |
| 547 | |
| 548 | /* |
| 549 | * Enforce boot alignment requirements of RV32 and |
| 550 | * RV64 by only allowing PMD or PGD mappings. |
| 551 | */ |
Alexandre Ghiti | 0f02de4 | 2021-02-21 09:22:33 -0500 | [diff] [blame] | 552 | map_size = PMD_SIZE; |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 553 | |
| 554 | /* Sanity check alignment and size */ |
| 555 | BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 556 | BUG_ON((load_pa % map_size) != 0); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 557 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 558 | pt_ops.alloc_pte = alloc_pte_early; |
| 559 | pt_ops.get_pte_virt = get_pte_virt_early; |
| 560 | #ifndef __PAGETABLE_PMD_FOLDED |
| 561 | pt_ops.alloc_pmd = alloc_pmd_early; |
| 562 | pt_ops.get_pmd_virt = get_pmd_virt_early; |
| 563 | #endif |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 564 | /* Setup early PGD for fixmap */ |
| 565 | create_pgd_mapping(early_pg_dir, FIXADDR_START, |
| 566 | (uintptr_t)fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE); |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 567 | |
| 568 | #ifndef __PAGETABLE_PMD_FOLDED |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 569 | /* Setup fixmap PMD */ |
| 570 | create_pmd_mapping(fixmap_pmd, FIXADDR_START, |
| 571 | (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE); |
| 572 | /* Setup trampoline PGD and PMD */ |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 573 | create_pgd_mapping(trampoline_pg_dir, kernel_virt_addr, |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 574 | (uintptr_t)trampoline_pmd, PGDIR_SIZE, PAGE_TABLE); |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 575 | #ifdef CONFIG_XIP_KERNEL |
| 576 | create_pmd_mapping(trampoline_pmd, kernel_virt_addr, |
| 577 | xiprom, PMD_SIZE, PAGE_KERNEL_EXEC); |
| 578 | #else |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 579 | create_pmd_mapping(trampoline_pmd, kernel_virt_addr, |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 580 | load_pa, PMD_SIZE, PAGE_KERNEL_EXEC); |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 581 | #endif |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 582 | #else |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 583 | /* Setup trampoline PGD */ |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 584 | create_pgd_mapping(trampoline_pg_dir, kernel_virt_addr, |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 585 | load_pa, PGDIR_SIZE, PAGE_KERNEL_EXEC); |
| 586 | #endif |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 587 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 588 | /* |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 589 | * Setup early PGD covering entire kernel which will allow |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 590 | * us to reach paging_init(). We map all memory banks later |
| 591 | * in setup_vm_final() below. |
| 592 | */ |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 593 | create_kernel_page_table(early_pg_dir, map_size); |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 594 | |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 595 | #ifndef __PAGETABLE_PMD_FOLDED |
| 596 | /* Setup early PMD for DTB */ |
| 597 | create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA, |
| 598 | (uintptr_t)early_dtb_pmd, PGDIR_SIZE, PAGE_TABLE); |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 599 | #ifndef CONFIG_BUILTIN_DTB |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 600 | /* Create two consecutive PMD mappings for FDT early scan */ |
| 601 | pa = dtb_pa & ~(PMD_SIZE - 1); |
| 602 | create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA, |
| 603 | pa, PMD_SIZE, PAGE_KERNEL); |
| 604 | create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE, |
| 605 | pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL); |
| 606 | dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1)); |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 607 | #else /* CONFIG_BUILTIN_DTB */ |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 608 | #ifdef CONFIG_64BIT |
| 609 | /* |
| 610 | * __va can't be used since it would return a linear mapping address |
| 611 | * whereas dtb_early_va will be used before setup_vm_final installs |
| 612 | * the linear mapping. |
| 613 | */ |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 614 | dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa)); |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 615 | #else |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 616 | dtb_early_va = __va(dtb_pa); |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 617 | #endif /* CONFIG_64BIT */ |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 618 | #endif /* CONFIG_BUILTIN_DTB */ |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 619 | #else |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 620 | #ifndef CONFIG_BUILTIN_DTB |
Anup Patel | 8f3a2b4 | 2020-09-17 15:37:10 -0700 | [diff] [blame] | 621 | /* Create two consecutive PGD mappings for FDT early scan */ |
| 622 | pa = dtb_pa & ~(PGDIR_SIZE - 1); |
| 623 | create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA, |
| 624 | pa, PGDIR_SIZE, PAGE_KERNEL); |
| 625 | create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA + PGDIR_SIZE, |
| 626 | pa + PGDIR_SIZE, PGDIR_SIZE, PAGE_KERNEL); |
| 627 | dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PGDIR_SIZE - 1)); |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 628 | #else /* CONFIG_BUILTIN_DTB */ |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 629 | #ifdef CONFIG_64BIT |
Vitaly Wool | 44c9225 | 2021-04-13 02:35:14 -0400 | [diff] [blame] | 630 | dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa)); |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 631 | #else |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 632 | dtb_early_va = __va(dtb_pa); |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 633 | #endif /* CONFIG_64BIT */ |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 634 | #endif /* CONFIG_BUILTIN_DTB */ |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 635 | #endif |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 636 | dtb_early_pa = dtb_pa; |
Atish Patra | 6262f66 | 2020-09-17 15:37:11 -0700 | [diff] [blame] | 637 | |
| 638 | /* |
| 639 | * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap |
| 640 | * range can not span multiple pmds. |
| 641 | */ |
| 642 | BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) |
| 643 | != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); |
| 644 | |
| 645 | #ifndef __PAGETABLE_PMD_FOLDED |
| 646 | /* |
| 647 | * Early ioremap fixmap is already created as it lies within first 2MB |
| 648 | * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END |
| 649 | * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn |
| 650 | * the user if not. |
| 651 | */ |
| 652 | fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))]; |
| 653 | fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))]; |
| 654 | if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) { |
| 655 | WARN_ON(1); |
| 656 | pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n", |
| 657 | pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd)); |
| 658 | pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", |
| 659 | fix_to_virt(FIX_BTMAP_BEGIN)); |
| 660 | pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", |
| 661 | fix_to_virt(FIX_BTMAP_END)); |
| 662 | |
| 663 | pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); |
| 664 | pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); |
| 665 | } |
| 666 | #endif |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 667 | } |
| 668 | |
Geert Uytterhoeven | 8d91b09 | 2021-04-29 17:10:04 +0200 | [diff] [blame] | 669 | #if defined(CONFIG_64BIT) && defined(CONFIG_STRICT_KERNEL_RWX) |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 670 | void __init protect_kernel_linear_mapping_text_rodata(void) |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 671 | { |
| 672 | unsigned long text_start = (unsigned long)lm_alias(_start); |
| 673 | unsigned long init_text_start = (unsigned long)lm_alias(__init_text_begin); |
| 674 | unsigned long rodata_start = (unsigned long)lm_alias(__start_rodata); |
| 675 | unsigned long data_start = (unsigned long)lm_alias(_data); |
| 676 | |
| 677 | set_memory_ro(text_start, (init_text_start - text_start) >> PAGE_SHIFT); |
| 678 | set_memory_nx(text_start, (init_text_start - text_start) >> PAGE_SHIFT); |
| 679 | |
| 680 | set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT); |
| 681 | set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT); |
| 682 | } |
| 683 | #endif |
| 684 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 685 | static void __init setup_vm_final(void) |
| 686 | { |
| 687 | uintptr_t va, map_size; |
| 688 | phys_addr_t pa, start, end; |
Mike Rapoport | b10d6bc | 2020-10-13 16:58:08 -0700 | [diff] [blame] | 689 | u64 i; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 690 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 691 | /** |
| 692 | * MMU is enabled at this point. But page table setup is not complete yet. |
| 693 | * fixmap page table alloc functions should be used at this point |
| 694 | */ |
| 695 | pt_ops.alloc_pte = alloc_pte_fixmap; |
| 696 | pt_ops.get_pte_virt = get_pte_virt_fixmap; |
| 697 | #ifndef __PAGETABLE_PMD_FOLDED |
| 698 | pt_ops.alloc_pmd = alloc_pmd_fixmap; |
| 699 | pt_ops.get_pmd_virt = get_pmd_virt_fixmap; |
| 700 | #endif |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 701 | /* Setup swapper PGD for fixmap */ |
| 702 | create_pgd_mapping(swapper_pg_dir, FIXADDR_START, |
Zong Li | ac51e00 | 2020-01-02 11:12:40 +0800 | [diff] [blame] | 703 | __pa_symbol(fixmap_pgd_next), |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 704 | PGDIR_SIZE, PAGE_TABLE); |
| 705 | |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 706 | /* Map all memory banks in the linear mapping */ |
Mike Rapoport | b10d6bc | 2020-10-13 16:58:08 -0700 | [diff] [blame] | 707 | for_each_mem_range(i, &start, &end) { |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 708 | if (start >= end) |
| 709 | break; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 710 | if (start <= __pa(PAGE_OFFSET) && |
| 711 | __pa(PAGE_OFFSET) < end) |
| 712 | start = __pa(PAGE_OFFSET); |
| 713 | |
| 714 | map_size = best_map_size(start, end - start); |
| 715 | for (pa = start; pa < end; pa += map_size) { |
| 716 | va = (uintptr_t)__va(pa); |
| 717 | create_pgd_mapping(swapper_pg_dir, va, pa, |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 718 | map_size, |
| 719 | #ifdef CONFIG_64BIT |
| 720 | PAGE_KERNEL |
| 721 | #else |
| 722 | PAGE_KERNEL_EXEC |
| 723 | #endif |
| 724 | ); |
| 725 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 726 | } |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 727 | } |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 728 | |
Alexandre Ghiti | 2bfc6cd | 2021-04-11 12:41:44 -0400 | [diff] [blame] | 729 | #ifdef CONFIG_64BIT |
| 730 | /* Map the kernel */ |
| 731 | create_kernel_page_table(swapper_pg_dir, PMD_SIZE); |
| 732 | #endif |
| 733 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 734 | /* Clear fixmap PTE and PMD mappings */ |
| 735 | clear_fixmap(FIX_PTE); |
| 736 | clear_fixmap(FIX_PMD); |
| 737 | |
| 738 | /* Move to swapper page table */ |
Zong Li | ac51e00 | 2020-01-02 11:12:40 +0800 | [diff] [blame] | 739 | csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | SATP_MODE); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 740 | local_flush_tlb_all(); |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 741 | |
| 742 | /* generic page allocation functions must be used to setup page table */ |
| 743 | pt_ops.alloc_pte = alloc_pte_late; |
| 744 | pt_ops.get_pte_virt = get_pte_virt_late; |
| 745 | #ifndef __PAGETABLE_PMD_FOLDED |
| 746 | pt_ops.alloc_pmd = alloc_pmd_late; |
| 747 | pt_ops.get_pmd_virt = get_pmd_virt_late; |
| 748 | #endif |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 749 | } |
Christoph Hellwig | 6bd33e1 | 2019-10-28 13:10:41 +0100 | [diff] [blame] | 750 | #else |
| 751 | asmlinkage void __init setup_vm(uintptr_t dtb_pa) |
| 752 | { |
| 753 | dtb_early_va = (void *)dtb_pa; |
Atish Patra | a78c6f5 | 2020-10-01 12:04:56 -0700 | [diff] [blame] | 754 | dtb_early_pa = dtb_pa; |
Christoph Hellwig | 6bd33e1 | 2019-10-28 13:10:41 +0100 | [diff] [blame] | 755 | } |
| 756 | |
| 757 | static inline void setup_vm_final(void) |
| 758 | { |
| 759 | } |
| 760 | #endif /* CONFIG_MMU */ |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 761 | |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 762 | #ifdef CONFIG_STRICT_KERNEL_RWX |
Jisheng Zhang | 1987501 | 2021-03-30 02:22:21 +0800 | [diff] [blame] | 763 | void __init protect_kernel_text_data(void) |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 764 | { |
Atish Patra | 19a0086 | 2020-11-04 16:04:38 -0800 | [diff] [blame] | 765 | unsigned long text_start = (unsigned long)_start; |
| 766 | unsigned long init_text_start = (unsigned long)__init_text_begin; |
| 767 | unsigned long init_data_start = (unsigned long)__init_data_begin; |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 768 | unsigned long rodata_start = (unsigned long)__start_rodata; |
| 769 | unsigned long data_start = (unsigned long)_data; |
| 770 | unsigned long max_low = (unsigned long)(__va(PFN_PHYS(max_low_pfn))); |
| 771 | |
Atish Patra | 19a0086 | 2020-11-04 16:04:38 -0800 | [diff] [blame] | 772 | set_memory_ro(text_start, (init_text_start - text_start) >> PAGE_SHIFT); |
| 773 | set_memory_ro(init_text_start, (init_data_start - init_text_start) >> PAGE_SHIFT); |
| 774 | set_memory_nx(init_data_start, (rodata_start - init_data_start) >> PAGE_SHIFT); |
| 775 | /* rodata section is marked readonly in mark_rodata_ro */ |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 776 | set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT); |
| 777 | set_memory_nx(data_start, (max_low - data_start) >> PAGE_SHIFT); |
Atish Patra | 19a0086 | 2020-11-04 16:04:38 -0800 | [diff] [blame] | 778 | } |
| 779 | |
| 780 | void mark_rodata_ro(void) |
| 781 | { |
| 782 | unsigned long rodata_start = (unsigned long)__start_rodata; |
| 783 | unsigned long data_start = (unsigned long)_data; |
| 784 | |
| 785 | set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT); |
Zong Li | b422d28 | 2020-06-03 16:03:55 -0700 | [diff] [blame] | 786 | |
| 787 | debug_checkwx(); |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 788 | } |
| 789 | #endif |
| 790 | |
Nick Kossifidis | e53d281 | 2021-04-19 03:55:38 +0300 | [diff] [blame] | 791 | #ifdef CONFIG_KEXEC_CORE |
| 792 | /* |
| 793 | * reserve_crashkernel() - reserves memory for crash kernel |
| 794 | * |
| 795 | * This function reserves memory area given in "crashkernel=" kernel command |
| 796 | * line parameter. The memory reserved is used by dump capture kernel when |
| 797 | * primary kernel is crashing. |
| 798 | */ |
| 799 | static void __init reserve_crashkernel(void) |
| 800 | { |
| 801 | unsigned long long crash_base = 0; |
| 802 | unsigned long long crash_size = 0; |
| 803 | unsigned long search_start = memblock_start_of_DRAM(); |
| 804 | unsigned long search_end = memblock_end_of_DRAM(); |
| 805 | |
| 806 | int ret = 0; |
| 807 | |
Nick Kossifidis | 5640975 | 2021-04-19 03:55:39 +0300 | [diff] [blame] | 808 | /* |
| 809 | * Don't reserve a region for a crash kernel on a crash kernel |
| 810 | * since it doesn't make much sense and we have limited memory |
| 811 | * resources. |
| 812 | */ |
| 813 | #ifdef CONFIG_CRASH_DUMP |
| 814 | if (is_kdump_kernel()) { |
| 815 | pr_info("crashkernel: ignoring reservation request\n"); |
| 816 | return; |
| 817 | } |
| 818 | #endif |
| 819 | |
Nick Kossifidis | e53d281 | 2021-04-19 03:55:38 +0300 | [diff] [blame] | 820 | ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(), |
| 821 | &crash_size, &crash_base); |
| 822 | if (ret || !crash_size) |
| 823 | return; |
| 824 | |
| 825 | crash_size = PAGE_ALIGN(crash_size); |
| 826 | |
| 827 | if (crash_base == 0) { |
| 828 | /* |
| 829 | * Current riscv boot protocol requires 2MB alignment for |
| 830 | * RV64 and 4MB alignment for RV32 (hugepage size) |
| 831 | */ |
| 832 | crash_base = memblock_find_in_range(search_start, search_end, |
| 833 | crash_size, PMD_SIZE); |
| 834 | |
| 835 | if (crash_base == 0) { |
| 836 | pr_warn("crashkernel: couldn't allocate %lldKB\n", |
| 837 | crash_size >> 10); |
| 838 | return; |
| 839 | } |
| 840 | } else { |
| 841 | /* User specifies base address explicitly. */ |
| 842 | if (!memblock_is_region_memory(crash_base, crash_size)) { |
| 843 | pr_warn("crashkernel: requested region is not memory\n"); |
| 844 | return; |
| 845 | } |
| 846 | |
| 847 | if (memblock_is_region_reserved(crash_base, crash_size)) { |
| 848 | pr_warn("crashkernel: requested region is reserved\n"); |
| 849 | return; |
| 850 | } |
| 851 | |
| 852 | |
| 853 | if (!IS_ALIGNED(crash_base, PMD_SIZE)) { |
| 854 | pr_warn("crashkernel: requested region is misaligned\n"); |
| 855 | return; |
| 856 | } |
| 857 | } |
| 858 | memblock_reserve(crash_base, crash_size); |
| 859 | |
| 860 | pr_info("crashkernel: reserved 0x%016llx - 0x%016llx (%lld MB)\n", |
| 861 | crash_base, crash_base + crash_size, crash_size >> 20); |
| 862 | |
| 863 | crashk_res.start = crash_base; |
| 864 | crashk_res.end = crash_base + crash_size - 1; |
| 865 | } |
| 866 | #endif /* CONFIG_KEXEC_CORE */ |
| 867 | |
Nick Kossifidis | 5640975 | 2021-04-19 03:55:39 +0300 | [diff] [blame] | 868 | #ifdef CONFIG_CRASH_DUMP |
| 869 | /* |
| 870 | * We keep track of the ELF core header of the crashed |
| 871 | * kernel with a reserved-memory region with compatible |
| 872 | * string "linux,elfcorehdr". Here we register a callback |
| 873 | * to populate elfcorehdr_addr/size when this region is |
| 874 | * present. Note that this region will be marked as |
| 875 | * reserved once we call early_init_fdt_scan_reserved_mem() |
| 876 | * later on. |
| 877 | */ |
Jisheng Zhang | 0106235 | 2021-05-16 21:15:56 +0800 | [diff] [blame] | 878 | static int __init elfcore_hdr_setup(struct reserved_mem *rmem) |
Nick Kossifidis | 5640975 | 2021-04-19 03:55:39 +0300 | [diff] [blame] | 879 | { |
| 880 | elfcorehdr_addr = rmem->base; |
| 881 | elfcorehdr_size = rmem->size; |
| 882 | return 0; |
| 883 | } |
| 884 | |
| 885 | RESERVEDMEM_OF_DECLARE(elfcorehdr, "linux,elfcorehdr", elfcore_hdr_setup); |
| 886 | #endif |
| 887 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 888 | void __init paging_init(void) |
| 889 | { |
Kefeng Wang | f842f5f | 2021-05-10 19:42:22 +0800 | [diff] [blame] | 890 | setup_bootmem(); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 891 | setup_vm_final(); |
Atish Patra | cbd34f4 | 2020-11-18 16:38:27 -0800 | [diff] [blame] | 892 | } |
| 893 | |
| 894 | void __init misc_mem_init(void) |
| 895 | { |
Kefeng Wang | f6e5aed | 2021-02-25 14:54:17 +0800 | [diff] [blame] | 896 | early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT); |
Atish Patra | 4f0e8ee | 2020-11-18 16:38:29 -0800 | [diff] [blame] | 897 | arch_numa_init(); |
Atish Patra | cbd34f4 | 2020-11-18 16:38:27 -0800 | [diff] [blame] | 898 | sparse_init(); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 899 | zone_sizes_init(); |
Nick Kossifidis | e53d281 | 2021-04-19 03:55:38 +0300 | [diff] [blame] | 900 | #ifdef CONFIG_KEXEC_CORE |
| 901 | reserve_crashkernel(); |
| 902 | #endif |
Atish Patra | 4f0e8ee | 2020-11-18 16:38:29 -0800 | [diff] [blame] | 903 | memblock_dump_all(); |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 904 | } |
Logan Gunthorpe | d95f1a5 | 2019-08-28 15:40:54 -0600 | [diff] [blame] | 905 | |
Kefeng Wang | 9fe57d8 | 2019-10-23 11:23:02 +0800 | [diff] [blame] | 906 | #ifdef CONFIG_SPARSEMEM_VMEMMAP |
Logan Gunthorpe | d95f1a5 | 2019-08-28 15:40:54 -0600 | [diff] [blame] | 907 | int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, |
| 908 | struct vmem_altmap *altmap) |
| 909 | { |
Anshuman Khandual | 1d9cfee | 2020-08-06 23:23:19 -0700 | [diff] [blame] | 910 | return vmemmap_populate_basepages(start, end, node, NULL); |
Logan Gunthorpe | d95f1a5 | 2019-08-28 15:40:54 -0600 | [diff] [blame] | 911 | } |
| 912 | #endif |