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Thomas Gleixner50acfb22019-05-29 07:18:00 -07001// SPDX-License-Identifier: GPL-2.0-only
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07002/*
3 * Copyright (C) 2012 Regents of the University of California
Anup Patel671f9a32019-06-28 13:36:21 -07004 * Copyright (C) 2019 Western Digital Corporation or its affiliates.
Nick Kossifidise53d2812021-04-19 03:55:38 +03005 * Copyright (C) 2020 FORTH-ICS/CARV
6 * Nick Kossifidis <mick@ics.forth.gr>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07007 */
8
9#include <linux/init.h>
10#include <linux/mm.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070011#include <linux/memblock.h>
Mike Rapoport57c8a662018-10-30 15:09:49 -070012#include <linux/initrd.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070013#include <linux/swap.h>
Kefeng Wangce3aca02021-06-02 16:55:16 +080014#include <linux/swiotlb.h>
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010015#include <linux/sizes.h>
Anup Patel0651c262019-02-21 11:25:49 +053016#include <linux/of_fdt.h>
Nick Kossifidis56409752021-04-19 03:55:39 +030017#include <linux/of_reserved_mem.h>
Albert Ou922b0372019-09-27 16:14:18 -070018#include <linux/libfdt.h>
Zong Lid27c3c92020-03-10 00:55:41 +080019#include <linux/set_memory.h>
Kefeng Wangda815582020-10-31 14:01:12 +080020#include <linux/dma-map-ops.h>
Nick Kossifidise53d2812021-04-19 03:55:38 +030021#include <linux/crash_dump.h>
Kefeng Wang8ba1a8b2021-07-30 20:48:41 +080022#include <linux/hugetlb.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070023
Anup Patelf2c17aa2019-01-07 20:57:01 +053024#include <asm/fixmap.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070025#include <asm/tlbflush.h>
26#include <asm/sections.h>
Palmer Dabbelt2d268252020-04-14 13:43:24 +090027#include <asm/soc.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070028#include <asm/io.h>
Zong Lib422d282020-06-03 16:03:55 -070029#include <asm/ptdump.h>
Atish Patra4f0e8ee2020-11-18 16:38:29 -080030#include <asm/numa.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070031
Paul Walmsleyffaee272019-10-17 15:00:17 -070032#include "../kernel/head.h"
33
Alexandre Ghiti658e2c52021-06-17 15:53:07 +020034struct kernel_mapping kernel_map __ro_after_init;
35EXPORT_SYMBOL(kernel_map);
Vitaly Wool44c92252021-04-13 02:35:14 -040036#ifdef CONFIG_XIP_KERNEL
Alexandre Ghiti658e2c52021-06-17 15:53:07 +020037#define kernel_map (*(struct kernel_mapping *)XIP_FIXUP(&kernel_map))
38#endif
39
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +010040#ifdef CONFIG_64BIT
41u64 satp_mode = !IS_ENABLED(CONFIG_XIP_KERNEL) ? SATP_MODE_48 : SATP_MODE_39;
42#else
43u64 satp_mode = SATP_MODE_32;
44#endif
45EXPORT_SYMBOL(satp_mode);
46
47bool pgtable_l4_enabled = IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_XIP_KERNEL) ?
48 true : false;
49EXPORT_SYMBOL(pgtable_l4_enabled);
50
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +020051phys_addr_t phys_ram_base __ro_after_init;
52EXPORT_SYMBOL(phys_ram_base);
53
Anup Patel387181d2019-03-26 08:03:47 +000054unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
55 __page_aligned_bss;
56EXPORT_SYMBOL(empty_zero_page);
57
Anup Pateld90d45d2019-06-07 06:01:29 +000058extern char _start[];
Anup Patel8f3a2b42020-09-17 15:37:10 -070059#define DTB_EARLY_BASE_VA PGDIR_SIZE
Vitaly Wool44c92252021-04-13 02:35:14 -040060void *_dtb_early_va __initdata;
61uintptr_t _dtb_early_pa __initdata;
Anup Pateld90d45d2019-06-07 06:01:29 +000062
Jisheng Zhang01062352021-05-16 21:15:56 +080063static phys_addr_t dma32_phys_limit __initdata;
Kefeng Wangda815582020-10-31 14:01:12 +080064
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070065static void __init zone_sizes_init(void)
66{
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010067 unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070068
Zong Lid5fad482018-06-25 16:49:37 +080069#ifdef CONFIG_ZONE_DMA32
Kefeng Wangda815582020-10-31 14:01:12 +080070 max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit);
Zong Lid5fad482018-06-25 16:49:37 +080071#endif
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010072 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
73
Mike Rapoport9691a072020-06-03 15:57:10 -070074 free_area_init(max_zone_pfns);
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070075}
76
Kefeng Wang8fa3cdf2020-05-14 19:53:35 +080077#if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000078static inline void print_mlk(char *name, unsigned long b, unsigned long t)
79{
80 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t,
81 (((t) - (b)) >> 10));
82}
83
84static inline void print_mlm(char *name, unsigned long b, unsigned long t)
85{
86 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t,
87 (((t) - (b)) >> 20));
88}
89
Jisheng Zhang19875012021-03-30 02:22:21 +080090static void __init print_vm_layout(void)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000091{
92 pr_notice("Virtual kernel memory layout:\n");
93 print_mlk("fixmap", (unsigned long)FIXADDR_START,
94 (unsigned long)FIXADDR_TOP);
95 print_mlm("pci io", (unsigned long)PCI_IO_START,
96 (unsigned long)PCI_IO_END);
97 print_mlm("vmemmap", (unsigned long)VMEMMAP_START,
98 (unsigned long)VMEMMAP_END);
99 print_mlm("vmalloc", (unsigned long)VMALLOC_START,
100 (unsigned long)VMALLOC_END);
101 print_mlm("lowmem", (unsigned long)PAGE_OFFSET,
102 (unsigned long)high_memory);
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800103 if (IS_ENABLED(CONFIG_64BIT)) {
Alexandre Ghitif7ae0232021-12-06 11:46:45 +0100104#ifdef CONFIG_KASAN
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800105 print_mlm("kasan", KASAN_SHADOW_START, KASAN_SHADOW_END);
Alexandre Ghitif7ae0232021-12-06 11:46:45 +0100106#endif
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800107
Jisheng Zhang07aabe82021-12-06 23:03:50 +0800108 print_mlm("kernel", (unsigned long)KERNEL_LINK_ADDR,
109 (unsigned long)ADDRESS_SPACE_END);
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800110 }
Yash Shah2cc6c4a2019-11-18 05:58:34 +0000111}
112#else
113static void print_vm_layout(void) { }
114#endif /* CONFIG_DEBUG_VM */
115
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700116void __init mem_init(void)
117{
118#ifdef CONFIG_FLATMEM
119 BUG_ON(!mem_map);
120#endif /* CONFIG_FLATMEM */
121
Kefeng Wangce3aca02021-06-02 16:55:16 +0800122#ifdef CONFIG_SWIOTLB
123 if (swiotlb_force == SWIOTLB_FORCE ||
124 max_pfn > PFN_DOWN(dma32_phys_limit))
125 swiotlb_init(1);
126 else
127 swiotlb_force = SWIOTLB_NO_FORCE;
128#endif
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700129 high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
Mike Rapoportc6ffc5c2018-10-30 15:09:30 -0700130 memblock_free_all();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700131
Yash Shah2cc6c4a2019-11-18 05:58:34 +0000132 print_vm_layout();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700133}
134
Alexandre Ghitif7ae0232021-12-06 11:46:45 +0100135/* Limit the memory size via mem. */
136static phys_addr_t memory_limit;
Kefeng Wangc9811e32021-06-02 16:55:17 +0800137
138static int __init early_mem(char *p)
139{
140 u64 size;
141
142 if (!p)
143 return 1;
144
145 size = memparse(p, &p) & PAGE_MASK;
146 memory_limit = min_t(u64, size, memory_limit);
147
148 pr_notice("Memory limited to %lldMB\n", (u64)memory_limit >> 20);
149
150 return 0;
151}
152early_param("mem", early_mem);
153
Kefeng Wangf842f5f2021-05-10 19:42:22 +0800154static void __init setup_bootmem(void)
Anup Patel0651c262019-02-21 11:25:49 +0530155{
Zong Liac51e002020-01-02 11:12:40 +0800156 phys_addr_t vmlinux_end = __pa_symbol(&_end);
Jisheng Zhang07aabe82021-12-06 23:03:50 +0800157 phys_addr_t max_mapped_addr;
Jisheng Zhangfe036db2021-12-06 23:03:52 +0800158 phys_addr_t phys_ram_end, vmlinux_start;
Anup Patel0651c262019-02-21 11:25:49 +0530159
Jisheng Zhangfe036db2021-12-06 23:03:52 +0800160 if (IS_ENABLED(CONFIG_XIP_KERNEL))
161 vmlinux_start = __pa_symbol(&_sdata);
162 else
163 vmlinux_start = __pa_symbol(&_start);
Vitaly Wool44c92252021-04-13 02:35:14 -0400164
Kefeng Wangc9811e32021-06-02 16:55:17 +0800165 memblock_enforce_memory_limit(memory_limit);
Anup Patel0651c262019-02-21 11:25:49 +0530166
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400167 /*
Geert Uytterhoeven8db6f932021-04-29 17:05:00 +0200168 * Make sure we align the reservation on PMD_SIZE since we will
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400169 * map the kernel in the linear mapping as read-only: we do not want
170 * any allocation to happen between _end and the next pmd aligned page.
171 */
Jisheng Zhang07aabe82021-12-06 23:03:50 +0800172 if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_STRICT_KERNEL_RWX))
173 vmlinux_end = (vmlinux_end + PMD_SIZE - 1) & PMD_MASK;
174 /*
175 * Reserve from the start of the kernel to the end of the kernel
176 */
Geert Uytterhoeven8db6f932021-04-29 17:05:00 +0200177 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
Anup Pateld90d45d2019-06-07 06:01:29 +0000178
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +0200179 phys_ram_end = memblock_end_of_DRAM();
Jisheng Zhangfe036db2021-12-06 23:03:52 +0800180 if (!IS_ENABLED(CONFIG_XIP_KERNEL))
181 phys_ram_base = memblock_start_of_DRAM();
Atish Patraabb8e862021-01-11 15:45:02 -0800182 /*
183 * memblock allocator is not aware of the fact that last 4K bytes of
184 * the addressable memory can not be mapped because of IS_ERR_VALUE
185 * macro. Make sure that last 4k bytes are not usable by memblock
Alexandre Ghitidb6b84a2021-06-29 11:13:48 +0200186 * if end of dram is equal to maximum addressable memory. For 64-bit
187 * kernel, this problem can't happen here as the end of the virtual
188 * address space is occupied by the kernel mapping then this check must
Alexandre Ghitifdf3a7a2021-07-26 07:42:54 +0200189 * be done as soon as the kernel mapping base address is determined.
Atish Patraabb8e862021-01-11 15:45:02 -0800190 */
Jisheng Zhang07aabe82021-12-06 23:03:50 +0800191 if (!IS_ENABLED(CONFIG_64BIT)) {
192 max_mapped_addr = __pa(~(ulong)0);
193 if (max_mapped_addr == (phys_ram_end - 1))
194 memblock_set_current_limit(max_mapped_addr - 4096);
195 }
Atish Patraabb8e862021-01-11 15:45:02 -0800196
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +0200197 min_low_pfn = PFN_UP(phys_ram_base);
198 max_low_pfn = max_pfn = PFN_DOWN(phys_ram_end);
Kefeng Wangf6e5aed2021-02-25 14:54:17 +0800199
Kefeng Wangda815582020-10-31 14:01:12 +0800200 dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
Guo Ren336e8eb2021-01-21 14:31:17 +0800201 set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
Anup Patel0651c262019-02-21 11:25:49 +0530202
Kefeng Wangaec33b52021-01-15 13:46:06 +0800203 reserve_initrd_mem();
Albert Ou922b0372019-09-27 16:14:18 -0700204 /*
Vitaly Woolf105aa92021-01-16 01:49:48 +0200205 * If DTB is built in, no need to reserve its memblock.
206 * Otherwise, do reserve it but avoid using
207 * early_init_fdt_reserve_self() since __pa() does
Albert Ou922b0372019-09-27 16:14:18 -0700208 * not work for DTB pointers that are fixmap addresses
209 */
Vitaly Woolf105aa92021-01-16 01:49:48 +0200210 if (!IS_ENABLED(CONFIG_BUILTIN_DTB))
211 memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
Albert Ou922b0372019-09-27 16:14:18 -0700212
Anup Patel0651c262019-02-21 11:25:49 +0530213 early_init_fdt_scan_reserved_mem();
Kefeng Wangda815582020-10-31 14:01:12 +0800214 dma_contiguous_reserve(dma32_phys_limit);
Kefeng Wang8ba1a8b2021-07-30 20:48:41 +0800215 if (IS_ENABLED(CONFIG_64BIT))
216 hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
Anup Patel0651c262019-02-21 11:25:49 +0530217 memblock_allow_resize();
Anup Patel0651c262019-02-21 11:25:49 +0530218}
Anup Patel6f1e9e92019-02-13 16:38:36 +0530219
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100220#ifdef CONFIG_MMU
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800221struct pt_alloc_ops pt_ops __initdata;
Vitaly Wool44c92252021-04-13 02:35:14 -0400222
Kenneth Leefb31f0a2021-07-28 15:15:57 +0800223unsigned long riscv_pfn_base __ro_after_init;
224EXPORT_SYMBOL(riscv_pfn_base);
Anup Patel387181d2019-03-26 08:03:47 +0000225
Anup Patel6f1e9e92019-02-13 16:38:36 +0530226pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700227pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Jisheng Zhang01062352021-05-16 21:15:56 +0800228static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700229
Anup Patel671f9a32019-06-28 13:36:21 -0700230pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100231static pud_t __maybe_unused early_dtb_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200232static pmd_t __maybe_unused early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530233
Vitaly Wool44c92252021-04-13 02:35:14 -0400234#ifdef CONFIG_XIP_KERNEL
Jisheng Zhang805a3eb2021-12-06 23:03:53 +0800235#define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&pt_ops))
Vitaly Wool44c92252021-04-13 02:35:14 -0400236#define trampoline_pg_dir ((pgd_t *)XIP_FIXUP(trampoline_pg_dir))
237#define fixmap_pte ((pte_t *)XIP_FIXUP(fixmap_pte))
238#define early_pg_dir ((pgd_t *)XIP_FIXUP(early_pg_dir))
239#endif /* CONFIG_XIP_KERNEL */
240
Anup Patelf2c17aa2019-01-07 20:57:01 +0530241void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
242{
243 unsigned long addr = __fix_to_virt(idx);
244 pte_t *ptep;
245
246 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
247
248 ptep = &fixmap_pte[pte_index(addr)];
249
Greentime Hu21190b72020-08-04 11:02:05 +0800250 if (pgprot_val(prot))
Anup Patelf2c17aa2019-01-07 20:57:01 +0530251 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
Greentime Hu21190b72020-08-04 11:02:05 +0800252 else
Anup Patelf2c17aa2019-01-07 20:57:01 +0530253 pte_clear(&init_mm, addr, ptep);
Greentime Hu21190b72020-08-04 11:02:05 +0800254 local_flush_tlb_page(addr);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530255}
256
Atish Patrae8dcb612020-09-17 15:37:12 -0700257static inline pte_t *__init get_pte_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700258{
Atish Patrae8dcb612020-09-17 15:37:12 -0700259 return (pte_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700260}
261
Atish Patrae8dcb612020-09-17 15:37:12 -0700262static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa)
263{
264 clear_fixmap(FIX_PTE);
265 return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
266}
267
Jisheng Zhang01062352021-05-16 21:15:56 +0800268static inline pte_t *__init get_pte_virt_late(phys_addr_t pa)
Atish Patrae8dcb612020-09-17 15:37:12 -0700269{
270 return (pte_t *) __va(pa);
271}
272
273static inline phys_addr_t __init alloc_pte_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700274{
275 /*
276 * We only create PMD or PGD early mappings so we
277 * should never reach here with MMU disabled.
278 */
Atish Patrae8dcb612020-09-17 15:37:12 -0700279 BUG();
280}
Anup Patel671f9a32019-06-28 13:36:21 -0700281
Atish Patrae8dcb612020-09-17 15:37:12 -0700282static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va)
283{
Anup Patel671f9a32019-06-28 13:36:21 -0700284 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
285}
286
Jisheng Zhang01062352021-05-16 21:15:56 +0800287static phys_addr_t __init alloc_pte_late(uintptr_t va)
Atish Patrae8dcb612020-09-17 15:37:12 -0700288{
289 unsigned long vaddr;
290
291 vaddr = __get_free_page(GFP_KERNEL);
zhouchuangaoe75e6bf2021-03-30 06:56:26 -0700292 BUG_ON(!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr)));
293
Atish Patrae8dcb612020-09-17 15:37:12 -0700294 return __pa(vaddr);
295}
296
Anup Patel671f9a32019-06-28 13:36:21 -0700297static void __init create_pte_mapping(pte_t *ptep,
298 uintptr_t va, phys_addr_t pa,
299 phys_addr_t sz, pgprot_t prot)
300{
Mike Rapoport974b9b22020-06-08 21:33:10 -0700301 uintptr_t pte_idx = pte_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700302
303 BUG_ON(sz != PAGE_SIZE);
304
Mike Rapoport974b9b22020-06-08 21:33:10 -0700305 if (pte_none(ptep[pte_idx]))
306 ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700307}
308
309#ifndef __PAGETABLE_PMD_FOLDED
310
Jisheng Zhang01062352021-05-16 21:15:56 +0800311static pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
312static pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
313static pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
Anup Patel671f9a32019-06-28 13:36:21 -0700314
Vitaly Wool44c92252021-04-13 02:35:14 -0400315#ifdef CONFIG_XIP_KERNEL
316#define trampoline_pmd ((pmd_t *)XIP_FIXUP(trampoline_pmd))
317#define fixmap_pmd ((pmd_t *)XIP_FIXUP(fixmap_pmd))
318#define early_pmd ((pmd_t *)XIP_FIXUP(early_pmd))
319#endif /* CONFIG_XIP_KERNEL */
320
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100321static pud_t trampoline_pud[PTRS_PER_PUD] __page_aligned_bss;
322static pud_t fixmap_pud[PTRS_PER_PUD] __page_aligned_bss;
323static pud_t early_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
324
325#ifdef CONFIG_XIP_KERNEL
326#define trampoline_pud ((pud_t *)XIP_FIXUP(trampoline_pud))
327#define fixmap_pud ((pud_t *)XIP_FIXUP(fixmap_pud))
328#define early_pud ((pud_t *)XIP_FIXUP(early_pud))
329#endif /* CONFIG_XIP_KERNEL */
330
Atish Patrae8dcb612020-09-17 15:37:12 -0700331static pmd_t *__init get_pmd_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700332{
Atish Patrae8dcb612020-09-17 15:37:12 -0700333 /* Before MMU is enabled */
334 return (pmd_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700335}
336
Atish Patrae8dcb612020-09-17 15:37:12 -0700337static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa)
338{
339 clear_fixmap(FIX_PMD);
340 return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
341}
342
Jisheng Zhang01062352021-05-16 21:15:56 +0800343static pmd_t *__init get_pmd_virt_late(phys_addr_t pa)
Atish Patrae8dcb612020-09-17 15:37:12 -0700344{
345 return (pmd_t *) __va(pa);
346}
347
348static phys_addr_t __init alloc_pmd_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700349{
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100350 BUG_ON((va - kernel_map.virt_addr) >> PUD_SHIFT);
Anup Patel671f9a32019-06-28 13:36:21 -0700351
Alexandre Ghiti0f02de42021-02-21 09:22:33 -0500352 return (uintptr_t)early_pmd;
Anup Patel671f9a32019-06-28 13:36:21 -0700353}
354
Atish Patrae8dcb612020-09-17 15:37:12 -0700355static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va)
356{
357 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
358}
359
Jisheng Zhang01062352021-05-16 21:15:56 +0800360static phys_addr_t __init alloc_pmd_late(uintptr_t va)
Atish Patrae8dcb612020-09-17 15:37:12 -0700361{
362 unsigned long vaddr;
363
364 vaddr = __get_free_page(GFP_KERNEL);
Kefeng Wang5a7ac592021-09-27 11:03:25 +0800365 BUG_ON(!vaddr || !pgtable_pmd_page_ctor(virt_to_page(vaddr)));
366
Atish Patrae8dcb612020-09-17 15:37:12 -0700367 return __pa(vaddr);
368}
369
Anup Patel671f9a32019-06-28 13:36:21 -0700370static void __init create_pmd_mapping(pmd_t *pmdp,
371 uintptr_t va, phys_addr_t pa,
372 phys_addr_t sz, pgprot_t prot)
373{
374 pte_t *ptep;
375 phys_addr_t pte_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700376 uintptr_t pmd_idx = pmd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700377
378 if (sz == PMD_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700379 if (pmd_none(pmdp[pmd_idx]))
380 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700381 return;
382 }
383
Mike Rapoport974b9b22020-06-08 21:33:10 -0700384 if (pmd_none(pmdp[pmd_idx])) {
Atish Patrae8dcb612020-09-17 15:37:12 -0700385 pte_phys = pt_ops.alloc_pte(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700386 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
Atish Patrae8dcb612020-09-17 15:37:12 -0700387 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700388 memset(ptep, 0, PAGE_SIZE);
389 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700390 pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
Atish Patrae8dcb612020-09-17 15:37:12 -0700391 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700392 }
393
394 create_pte_mapping(ptep, va, pa, sz, prot);
395}
396
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100397static pud_t *__init get_pud_virt_early(phys_addr_t pa)
398{
399 return (pud_t *)((uintptr_t)pa);
400}
401
402static pud_t *__init get_pud_virt_fixmap(phys_addr_t pa)
403{
404 clear_fixmap(FIX_PUD);
405 return (pud_t *)set_fixmap_offset(FIX_PUD, pa);
406}
407
408static pud_t *__init get_pud_virt_late(phys_addr_t pa)
409{
410 return (pud_t *)__va(pa);
411}
412
413static phys_addr_t __init alloc_pud_early(uintptr_t va)
414{
415 /* Only one PUD is available for early mapping */
416 BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT);
417
418 return (uintptr_t)early_pud;
419}
420
421static phys_addr_t __init alloc_pud_fixmap(uintptr_t va)
422{
423 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
424}
425
426static phys_addr_t alloc_pud_late(uintptr_t va)
427{
428 unsigned long vaddr;
429
430 vaddr = __get_free_page(GFP_KERNEL);
431 BUG_ON(!vaddr);
432 return __pa(vaddr);
433}
434
435static void __init create_pud_mapping(pud_t *pudp,
436 uintptr_t va, phys_addr_t pa,
437 phys_addr_t sz, pgprot_t prot)
438{
439 pmd_t *nextp;
440 phys_addr_t next_phys;
441 uintptr_t pud_index = pud_index(va);
442
443 if (sz == PUD_SIZE) {
444 if (pud_val(pudp[pud_index]) == 0)
445 pudp[pud_index] = pfn_pud(PFN_DOWN(pa), prot);
446 return;
447 }
448
449 if (pud_val(pudp[pud_index]) == 0) {
450 next_phys = pt_ops.alloc_pmd(va);
451 pudp[pud_index] = pfn_pud(PFN_DOWN(next_phys), PAGE_TABLE);
452 nextp = pt_ops.get_pmd_virt(next_phys);
453 memset(nextp, 0, PAGE_SIZE);
454 } else {
455 next_phys = PFN_PHYS(_pud_pfn(pudp[pud_index]));
456 nextp = pt_ops.get_pmd_virt(next_phys);
457 }
458
459 create_pmd_mapping(nextp, va, pa, sz, prot);
460}
461
462#define pgd_next_t pud_t
463#define alloc_pgd_next(__va) (pgtable_l4_enabled ? \
464 pt_ops.alloc_pud(__va) : pt_ops.alloc_pmd(__va))
465#define get_pgd_next_virt(__pa) (pgtable_l4_enabled ? \
466 pt_ops.get_pud_virt(__pa) : (pgd_next_t *)pt_ops.get_pmd_virt(__pa))
Anup Patel671f9a32019-06-28 13:36:21 -0700467#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100468 (pgtable_l4_enabled ? \
469 create_pud_mapping(__nextp, __va, __pa, __sz, __prot) : \
470 create_pmd_mapping((pmd_t *)__nextp, __va, __pa, __sz, __prot))
471#define fixmap_pgd_next (pgtable_l4_enabled ? \
472 (uintptr_t)fixmap_pud : (uintptr_t)fixmap_pmd)
473#define trampoline_pgd_next (pgtable_l4_enabled ? \
474 (uintptr_t)trampoline_pud : (uintptr_t)trampoline_pmd)
475#define early_dtb_pgd_next (pgtable_l4_enabled ? \
476 (uintptr_t)early_dtb_pud : (uintptr_t)early_dtb_pmd)
Anup Patel671f9a32019-06-28 13:36:21 -0700477#else
478#define pgd_next_t pte_t
Atish Patrae8dcb612020-09-17 15:37:12 -0700479#define alloc_pgd_next(__va) pt_ops.alloc_pte(__va)
480#define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700481#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
482 create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100483#define fixmap_pgd_next ((uintptr_t)fixmap_pte)
484#define early_dtb_pgd_next ((uintptr_t)early_dtb_pmd)
485#define create_pud_mapping(__pmdp, __va, __pa, __sz, __prot)
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200486#define create_pmd_mapping(__pmdp, __va, __pa, __sz, __prot)
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100487#endif /* __PAGETABLE_PMD_FOLDED */
Anup Patel671f9a32019-06-28 13:36:21 -0700488
Atish Patrab91540d2020-09-17 15:37:15 -0700489void __init create_pgd_mapping(pgd_t *pgdp,
Anup Patel671f9a32019-06-28 13:36:21 -0700490 uintptr_t va, phys_addr_t pa,
491 phys_addr_t sz, pgprot_t prot)
492{
493 pgd_next_t *nextp;
494 phys_addr_t next_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700495 uintptr_t pgd_idx = pgd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700496
497 if (sz == PGDIR_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700498 if (pgd_val(pgdp[pgd_idx]) == 0)
499 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700500 return;
501 }
502
Mike Rapoport974b9b22020-06-08 21:33:10 -0700503 if (pgd_val(pgdp[pgd_idx]) == 0) {
Anup Patel671f9a32019-06-28 13:36:21 -0700504 next_phys = alloc_pgd_next(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700505 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700506 nextp = get_pgd_next_virt(next_phys);
507 memset(nextp, 0, PAGE_SIZE);
508 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700509 next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
Anup Patel671f9a32019-06-28 13:36:21 -0700510 nextp = get_pgd_next_virt(next_phys);
511 }
512
513 create_pgd_next_mapping(nextp, va, pa, sz, prot);
514}
515
516static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
517{
Zong Li0fdc6362019-11-08 01:00:40 -0800518 /* Upgrade to PMD_SIZE mappings whenever possible */
519 if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
520 return PAGE_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700521
Zong Li0fdc6362019-11-08 01:00:40 -0800522 return PMD_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700523}
524
Vitaly Wool44c92252021-04-13 02:35:14 -0400525#ifdef CONFIG_XIP_KERNEL
Jisheng Zhang805a3eb2021-12-06 23:03:53 +0800526extern char _xiprom[], _exiprom[], __data_loc;
527
Vitaly Wool44c92252021-04-13 02:35:14 -0400528/* called from head.S with MMU off */
529asmlinkage void __init __copy_data(void)
530{
Vitaly Woolf9ace4e2021-10-11 11:14:14 +0200531 void *from = (void *)(&__data_loc);
Vitaly Wool44c92252021-04-13 02:35:14 -0400532 void *to = (void *)CONFIG_PHYS_RAM_BASE;
Vitaly Woolf9ace4e2021-10-11 11:14:14 +0200533 size_t sz = (size_t)((uintptr_t)(&_end) - (uintptr_t)(&_sdata));
Vitaly Wool44c92252021-04-13 02:35:14 -0400534
535 memcpy(to, from, sz);
536}
537#endif
538
Alexandre Ghitie5c35fa02021-06-24 14:00:41 +0200539#ifdef CONFIG_STRICT_KERNEL_RWX
540static __init pgprot_t pgprot_from_va(uintptr_t va)
541{
542 if (is_va_kernel_text(va))
543 return PAGE_KERNEL_READ_EXEC;
544
545 /*
546 * In 64-bit kernel, the kernel mapping is outside the linear mapping so
547 * we must protect its linear mapping alias from being executed and
548 * written.
549 * And rodata section is marked readonly in mark_rodata_ro.
550 */
551 if (IS_ENABLED(CONFIG_64BIT) && is_va_kernel_lm_alias_text(va))
552 return PAGE_KERNEL_READ;
553
554 return PAGE_KERNEL;
555}
556
557void mark_rodata_ro(void)
558{
559 set_kernel_memory(__start_rodata, _data, set_memory_ro);
560 if (IS_ENABLED(CONFIG_64BIT))
561 set_kernel_memory(lm_alias(__start_rodata), lm_alias(_data),
562 set_memory_ro);
563
564 debug_checkwx();
565}
566#else
567static __init pgprot_t pgprot_from_va(uintptr_t va)
568{
569 if (IS_ENABLED(CONFIG_64BIT) && !is_kernel_mapping(va))
570 return PAGE_KERNEL;
571
572 return PAGE_KERNEL_EXEC;
573}
574#endif /* CONFIG_STRICT_KERNEL_RWX */
575
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100576#ifdef CONFIG_64BIT
577static void __init disable_pgtable_l4(void)
578{
579 pgtable_l4_enabled = false;
580 kernel_map.page_offset = PAGE_OFFSET_L3;
581 satp_mode = SATP_MODE_39;
582}
583
584/*
585 * There is a simple way to determine if 4-level is supported by the
586 * underlying hardware: establish 1:1 mapping in 4-level page table mode
587 * then read SATP to see if the configuration was taken into account
588 * meaning sv48 is supported.
589 */
590static __init void set_satp_mode(void)
591{
592 u64 identity_satp, hw_satp;
593 uintptr_t set_satp_mode_pmd;
594
595 set_satp_mode_pmd = ((unsigned long)set_satp_mode) & PMD_MASK;
596 create_pgd_mapping(early_pg_dir,
597 set_satp_mode_pmd, (uintptr_t)early_pud,
598 PGDIR_SIZE, PAGE_TABLE);
599 create_pud_mapping(early_pud,
600 set_satp_mode_pmd, (uintptr_t)early_pmd,
601 PUD_SIZE, PAGE_TABLE);
602 /* Handle the case where set_satp_mode straddles 2 PMDs */
603 create_pmd_mapping(early_pmd,
604 set_satp_mode_pmd, set_satp_mode_pmd,
605 PMD_SIZE, PAGE_KERNEL_EXEC);
606 create_pmd_mapping(early_pmd,
607 set_satp_mode_pmd + PMD_SIZE,
608 set_satp_mode_pmd + PMD_SIZE,
609 PMD_SIZE, PAGE_KERNEL_EXEC);
610
611 identity_satp = PFN_DOWN((uintptr_t)&early_pg_dir) | satp_mode;
612
613 local_flush_tlb_all();
614 csr_write(CSR_SATP, identity_satp);
615 hw_satp = csr_swap(CSR_SATP, 0ULL);
616 local_flush_tlb_all();
617
618 if (hw_satp != identity_satp)
619 disable_pgtable_l4();
620
621 memset(early_pg_dir, 0, PAGE_SIZE);
622 memset(early_pud, 0, PAGE_SIZE);
623 memset(early_pmd, 0, PAGE_SIZE);
624}
625#endif
626
Anup Patel387181d2019-03-26 08:03:47 +0000627/*
628 * setup_vm() is called from head.S with MMU-off.
629 *
630 * Following requirements should be honoured for setup_vm() to work
631 * correctly:
632 * 1) It should use PC-relative addressing for accessing kernel symbols.
633 * To achieve this we always use GCC cmodel=medany.
634 * 2) The compiler instrumentation for FTRACE will not work for setup_vm()
635 * so disable compiler instrumentation when FTRACE is enabled.
636 *
637 * Currently, the above requirements are honoured by using custom CFLAGS
638 * for init.o in mm/Makefile.
639 */
640
641#ifndef __riscv_cmodel_medany
Paul Walmsley6a527b62019-10-17 14:45:58 -0700642#error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
Anup Patel387181d2019-03-26 08:03:47 +0000643#endif
644
Vitaly Wool44c92252021-04-13 02:35:14 -0400645#ifdef CONFIG_XIP_KERNEL
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200646static void __init create_kernel_page_table(pgd_t *pgdir,
Alexandre Ghitie5c35fa02021-06-24 14:00:41 +0200647 __always_unused bool early)
Vitaly Wool44c92252021-04-13 02:35:14 -0400648{
649 uintptr_t va, end_va;
650
651 /* Map the flash resident part */
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200652 end_va = kernel_map.virt_addr + kernel_map.xiprom_sz;
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200653 for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE)
Vitaly Wool44c92252021-04-13 02:35:14 -0400654 create_pgd_mapping(pgdir, va,
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200655 kernel_map.xiprom + (va - kernel_map.virt_addr),
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200656 PMD_SIZE, PAGE_KERNEL_EXEC);
Vitaly Wool44c92252021-04-13 02:35:14 -0400657
658 /* Map the data in RAM */
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200659 end_va = kernel_map.virt_addr + XIP_OFFSET + kernel_map.size;
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200660 for (va = kernel_map.virt_addr + XIP_OFFSET; va < end_va; va += PMD_SIZE)
Vitaly Wool44c92252021-04-13 02:35:14 -0400661 create_pgd_mapping(pgdir, va,
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200662 kernel_map.phys_addr + (va - (kernel_map.virt_addr + XIP_OFFSET)),
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200663 PMD_SIZE, PAGE_KERNEL);
Vitaly Wool44c92252021-04-13 02:35:14 -0400664}
665#else
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200666static void __init create_kernel_page_table(pgd_t *pgdir, bool early)
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400667{
668 uintptr_t va, end_va;
669
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200670 end_va = kernel_map.virt_addr + kernel_map.size;
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200671 for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE)
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400672 create_pgd_mapping(pgdir, va,
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200673 kernel_map.phys_addr + (va - kernel_map.virt_addr),
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200674 PMD_SIZE,
Alexandre Ghitie5c35fa02021-06-24 14:00:41 +0200675 early ?
676 PAGE_KERNEL_EXEC : pgprot_from_va(va));
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400677}
Vitaly Wool44c92252021-04-13 02:35:14 -0400678#endif
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400679
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200680/*
681 * Setup a 4MB mapping that encompasses the device tree: for 64-bit kernel,
682 * this means 2 PMD entries whereas for 32-bit kernel, this is only 1 PGDIR
683 * entry.
684 */
685static void __init create_fdt_early_page_table(pgd_t *pgdir, uintptr_t dtb_pa)
686{
687#ifndef CONFIG_BUILTIN_DTB
688 uintptr_t pa = dtb_pa & ~(PMD_SIZE - 1);
689
690 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100691 IS_ENABLED(CONFIG_64BIT) ? early_dtb_pgd_next : pa,
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200692 PGDIR_SIZE,
693 IS_ENABLED(CONFIG_64BIT) ? PAGE_TABLE : PAGE_KERNEL);
694
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100695 if (pgtable_l4_enabled) {
696 create_pud_mapping(early_dtb_pud, DTB_EARLY_BASE_VA,
697 (uintptr_t)early_dtb_pmd, PUD_SIZE, PAGE_TABLE);
698 }
699
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200700 if (IS_ENABLED(CONFIG_64BIT)) {
701 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA,
702 pa, PMD_SIZE, PAGE_KERNEL);
703 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE,
704 pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
705 }
706
707 dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1));
708#else
709 /*
710 * For 64-bit kernel, __va can't be used since it would return a linear
711 * mapping address whereas dtb_early_va will be used before
712 * setup_vm_final installs the linear mapping. For 32-bit kernel, as the
713 * kernel is mapped in the linear mapping, that makes no difference.
714 */
715 dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa));
716#endif
717
718 dtb_early_pa = dtb_pa;
719}
720
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100721/*
722 * MMU is not enabled, the page tables are allocated directly using
723 * early_pmd/pud/p4d and the address returned is the physical one.
724 */
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800725void __init pt_ops_set_early(void)
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100726{
727 pt_ops.alloc_pte = alloc_pte_early;
728 pt_ops.get_pte_virt = get_pte_virt_early;
729#ifndef __PAGETABLE_PMD_FOLDED
730 pt_ops.alloc_pmd = alloc_pmd_early;
731 pt_ops.get_pmd_virt = get_pmd_virt_early;
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100732 pt_ops.alloc_pud = alloc_pud_early;
733 pt_ops.get_pud_virt = get_pud_virt_early;
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100734#endif
735}
736
737/*
738 * MMU is enabled but page table setup is not complete yet.
739 * fixmap page table alloc functions must be used as a means to temporarily
740 * map the allocated physical pages since the linear mapping does not exist yet.
741 *
742 * Note that this is called with MMU disabled, hence kernel_mapping_pa_to_va,
743 * but it will be used as described above.
744 */
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800745void __init pt_ops_set_fixmap(void)
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100746{
747 pt_ops.alloc_pte = kernel_mapping_pa_to_va((uintptr_t)alloc_pte_fixmap);
748 pt_ops.get_pte_virt = kernel_mapping_pa_to_va((uintptr_t)get_pte_virt_fixmap);
749#ifndef __PAGETABLE_PMD_FOLDED
750 pt_ops.alloc_pmd = kernel_mapping_pa_to_va((uintptr_t)alloc_pmd_fixmap);
751 pt_ops.get_pmd_virt = kernel_mapping_pa_to_va((uintptr_t)get_pmd_virt_fixmap);
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100752 pt_ops.alloc_pud = kernel_mapping_pa_to_va((uintptr_t)alloc_pud_fixmap);
753 pt_ops.get_pud_virt = kernel_mapping_pa_to_va((uintptr_t)get_pud_virt_fixmap);
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100754#endif
755}
756
757/*
758 * MMU is enabled and page table setup is complete, so from now, we can use
759 * generic page allocation functions to setup page table.
760 */
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800761void __init pt_ops_set_late(void)
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100762{
763 pt_ops.alloc_pte = alloc_pte_late;
764 pt_ops.get_pte_virt = get_pte_virt_late;
765#ifndef __PAGETABLE_PMD_FOLDED
766 pt_ops.alloc_pmd = alloc_pmd_late;
767 pt_ops.get_pmd_virt = get_pmd_virt_late;
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100768 pt_ops.alloc_pud = alloc_pud_late;
769 pt_ops.get_pud_virt = get_pud_virt_late;
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100770#endif
771}
772
Anup Patel671f9a32019-06-28 13:36:21 -0700773asmlinkage void __init setup_vm(uintptr_t dtb_pa)
Anup Patel6f1e9e92019-02-13 16:38:36 +0530774{
Alexandre Ghiti6f3e5fd2021-07-23 15:01:26 +0200775 pmd_t __maybe_unused fix_bmap_spmd, fix_bmap_epmd;
Anup Patel6f1e9e92019-02-13 16:38:36 +0530776
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200777 kernel_map.virt_addr = KERNEL_LINK_ADDR;
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100778 kernel_map.page_offset = _AC(CONFIG_PAGE_OFFSET, UL);
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200779
Vitaly Wool44c92252021-04-13 02:35:14 -0400780#ifdef CONFIG_XIP_KERNEL
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200781 kernel_map.xiprom = (uintptr_t)CONFIG_XIP_PHYS_ADDR;
782 kernel_map.xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom);
Vitaly Wool44c92252021-04-13 02:35:14 -0400783
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +0200784 phys_ram_base = CONFIG_PHYS_RAM_BASE;
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200785 kernel_map.phys_addr = (uintptr_t)CONFIG_PHYS_RAM_BASE;
786 kernel_map.size = (uintptr_t)(&_end) - (uintptr_t)(&_sdata);
Vitaly Wool44c92252021-04-13 02:35:14 -0400787
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200788 kernel_map.va_kernel_xip_pa_offset = kernel_map.virt_addr - kernel_map.xiprom;
Vitaly Wool44c92252021-04-13 02:35:14 -0400789#else
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200790 kernel_map.phys_addr = (uintptr_t)(&_start);
791 kernel_map.size = (uintptr_t)(&_end) - kernel_map.phys_addr;
Vitaly Wool44c92252021-04-13 02:35:14 -0400792#endif
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100793
794#if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
795 set_satp_mode();
796#endif
797
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200798 kernel_map.va_pa_offset = PAGE_OFFSET - kernel_map.phys_addr;
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200799 kernel_map.va_kernel_pa_offset = kernel_map.virt_addr - kernel_map.phys_addr;
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400800
Kenneth Leefb31f0a2021-07-28 15:15:57 +0800801 riscv_pfn_base = PFN_DOWN(kernel_map.phys_addr);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530802
Alexandre Ghitif7ae0232021-12-06 11:46:45 +0100803 /*
804 * The default maximal physical memory size is KERN_VIRT_SIZE for 32-bit
805 * kernel, whereas for 64-bit kernel, the end of the virtual address
806 * space is occupied by the modules/BPF/kernel mappings which reduces
807 * the available size of the linear mapping.
808 */
809 memory_limit = KERN_VIRT_SIZE - (IS_ENABLED(CONFIG_64BIT) ? SZ_4G : 0);
810
Anup Patel6f1e9e92019-02-13 16:38:36 +0530811 /* Sanity check alignment and size */
812 BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200813 BUG_ON((kernel_map.phys_addr % PMD_SIZE) != 0);
Anup Patel671f9a32019-06-28 13:36:21 -0700814
Alexandre Ghitidb6b84a2021-06-29 11:13:48 +0200815#ifdef CONFIG_64BIT
816 /*
817 * The last 4K bytes of the addressable memory can not be mapped because
818 * of IS_ERR_VALUE macro.
819 */
820 BUG_ON((kernel_map.virt_addr + kernel_map.size) > ADDRESS_SPACE_END - SZ_4K);
Atish Patrae8dcb612020-09-17 15:37:12 -0700821#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700822
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100823 pt_ops_set_early();
824
Anup Patel6f1e9e92019-02-13 16:38:36 +0530825 /* Setup early PGD for fixmap */
826 create_pgd_mapping(early_pg_dir, FIXADDR_START,
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100827 fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530828
829#ifndef __PAGETABLE_PMD_FOLDED
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100830 /* Setup fixmap PUD and PMD */
831 if (pgtable_l4_enabled)
832 create_pud_mapping(fixmap_pud, FIXADDR_START,
833 (uintptr_t)fixmap_pmd, PUD_SIZE, PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700834 create_pmd_mapping(fixmap_pmd, FIXADDR_START,
835 (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
836 /* Setup trampoline PGD and PMD */
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200837 create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr,
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100838 trampoline_pgd_next, PGDIR_SIZE, PAGE_TABLE);
839 if (pgtable_l4_enabled)
840 create_pud_mapping(trampoline_pud, kernel_map.virt_addr,
841 (uintptr_t)trampoline_pmd, PUD_SIZE, PAGE_TABLE);
Vitaly Wool44c92252021-04-13 02:35:14 -0400842#ifdef CONFIG_XIP_KERNEL
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200843 create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr,
844 kernel_map.xiprom, PMD_SIZE, PAGE_KERNEL_EXEC);
Vitaly Wool44c92252021-04-13 02:35:14 -0400845#else
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200846 create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr,
847 kernel_map.phys_addr, PMD_SIZE, PAGE_KERNEL_EXEC);
Vitaly Wool44c92252021-04-13 02:35:14 -0400848#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530849#else
Anup Patel671f9a32019-06-28 13:36:21 -0700850 /* Setup trampoline PGD */
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200851 create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr,
852 kernel_map.phys_addr, PGDIR_SIZE, PAGE_KERNEL_EXEC);
Anup Patel671f9a32019-06-28 13:36:21 -0700853#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530854
Anup Patel671f9a32019-06-28 13:36:21 -0700855 /*
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400856 * Setup early PGD covering entire kernel which will allow
Anup Patel671f9a32019-06-28 13:36:21 -0700857 * us to reach paging_init(). We map all memory banks later
858 * in setup_vm_final() below.
859 */
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200860 create_kernel_page_table(early_pg_dir, true);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530861
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200862 /* Setup early mapping for FDT early scan */
863 create_fdt_early_page_table(early_pg_dir, dtb_pa);
Atish Patra6262f662020-09-17 15:37:11 -0700864
865 /*
866 * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
867 * range can not span multiple pmds.
868 */
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100869 BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
Atish Patra6262f662020-09-17 15:37:11 -0700870 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
871
872#ifndef __PAGETABLE_PMD_FOLDED
873 /*
874 * Early ioremap fixmap is already created as it lies within first 2MB
875 * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END
876 * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn
877 * the user if not.
878 */
879 fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))];
880 fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))];
881 if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) {
882 WARN_ON(1);
883 pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n",
884 pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd));
885 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
886 fix_to_virt(FIX_BTMAP_BEGIN));
887 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
888 fix_to_virt(FIX_BTMAP_END));
889
890 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
891 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
892 }
893#endif
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100894
895 pt_ops_set_fixmap();
Anup Patel671f9a32019-06-28 13:36:21 -0700896}
897
898static void __init setup_vm_final(void)
899{
900 uintptr_t va, map_size;
901 phys_addr_t pa, start, end;
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700902 u64 i;
Anup Patel671f9a32019-06-28 13:36:21 -0700903
Anup Patel671f9a32019-06-28 13:36:21 -0700904 /* Setup swapper PGD for fixmap */
905 create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
Zong Liac51e002020-01-02 11:12:40 +0800906 __pa_symbol(fixmap_pgd_next),
Anup Patel671f9a32019-06-28 13:36:21 -0700907 PGDIR_SIZE, PAGE_TABLE);
908
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400909 /* Map all memory banks in the linear mapping */
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700910 for_each_mem_range(i, &start, &end) {
Anup Patel671f9a32019-06-28 13:36:21 -0700911 if (start >= end)
912 break;
Anup Patel671f9a32019-06-28 13:36:21 -0700913 if (start <= __pa(PAGE_OFFSET) &&
914 __pa(PAGE_OFFSET) < end)
915 start = __pa(PAGE_OFFSET);
Alexandre Ghitic99127c2021-06-29 11:13:47 +0200916 if (end >= __pa(PAGE_OFFSET) + memory_limit)
917 end = __pa(PAGE_OFFSET) + memory_limit;
Anup Patel671f9a32019-06-28 13:36:21 -0700918
919 map_size = best_map_size(start, end - start);
920 for (pa = start; pa < end; pa += map_size) {
921 va = (uintptr_t)__va(pa);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400922
Alexandre Ghitie5c35fa02021-06-24 14:00:41 +0200923 create_pgd_mapping(swapper_pg_dir, va, pa, map_size,
924 pgprot_from_va(va));
Anup Patel671f9a32019-06-28 13:36:21 -0700925 }
Anup Patel6f1e9e92019-02-13 16:38:36 +0530926 }
Anup Patelf2c17aa2019-01-07 20:57:01 +0530927
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400928 /* Map the kernel */
Jisheng Zhang07aabe82021-12-06 23:03:50 +0800929 if (IS_ENABLED(CONFIG_64BIT))
930 create_kernel_page_table(swapper_pg_dir, false);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400931
Alexandre Ghiti2efad172021-12-06 11:46:46 +0100932#ifdef CONFIG_KASAN
933 kasan_swapper_init();
934#endif
935
Anup Patel671f9a32019-06-28 13:36:21 -0700936 /* Clear fixmap PTE and PMD mappings */
937 clear_fixmap(FIX_PTE);
938 clear_fixmap(FIX_PMD);
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100939 clear_fixmap(FIX_PUD);
Anup Patel671f9a32019-06-28 13:36:21 -0700940
941 /* Move to swapper page table */
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100942 csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | satp_mode);
Anup Patel671f9a32019-06-28 13:36:21 -0700943 local_flush_tlb_all();
Atish Patrae8dcb612020-09-17 15:37:12 -0700944
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100945 pt_ops_set_late();
Anup Patel671f9a32019-06-28 13:36:21 -0700946}
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100947#else
948asmlinkage void __init setup_vm(uintptr_t dtb_pa)
949{
950 dtb_early_va = (void *)dtb_pa;
Atish Patraa78c6f52020-10-01 12:04:56 -0700951 dtb_early_pa = dtb_pa;
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100952}
953
954static inline void setup_vm_final(void)
955{
956}
957#endif /* CONFIG_MMU */
Anup Patel671f9a32019-06-28 13:36:21 -0700958
Nick Kossifidise53d2812021-04-19 03:55:38 +0300959#ifdef CONFIG_KEXEC_CORE
960/*
961 * reserve_crashkernel() - reserves memory for crash kernel
962 *
963 * This function reserves memory area given in "crashkernel=" kernel command
964 * line parameter. The memory reserved is used by dump capture kernel when
965 * primary kernel is crashing.
966 */
967static void __init reserve_crashkernel(void)
968{
969 unsigned long long crash_base = 0;
970 unsigned long long crash_size = 0;
971 unsigned long search_start = memblock_start_of_DRAM();
972 unsigned long search_end = memblock_end_of_DRAM();
973
974 int ret = 0;
975
Nick Kossifidis56409752021-04-19 03:55:39 +0300976 /*
977 * Don't reserve a region for a crash kernel on a crash kernel
978 * since it doesn't make much sense and we have limited memory
979 * resources.
980 */
Nick Kossifidis56409752021-04-19 03:55:39 +0300981 if (is_kdump_kernel()) {
982 pr_info("crashkernel: ignoring reservation request\n");
983 return;
984 }
Nick Kossifidis56409752021-04-19 03:55:39 +0300985
Nick Kossifidise53d2812021-04-19 03:55:38 +0300986 ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),
987 &crash_size, &crash_base);
988 if (ret || !crash_size)
989 return;
990
991 crash_size = PAGE_ALIGN(crash_size);
992
Mike Rapoporta7259df2021-09-02 15:00:26 -0700993 if (crash_base) {
994 search_start = crash_base;
995 search_end = crash_base + crash_size;
Nick Kossifidise53d2812021-04-19 03:55:38 +0300996 }
Mike Rapoporta7259df2021-09-02 15:00:26 -0700997
998 /*
999 * Current riscv boot protocol requires 2MB alignment for
1000 * RV64 and 4MB alignment for RV32 (hugepage size)
Nick Kossifidisdecf89f2021-11-26 20:04:11 +02001001 *
1002 * Try to alloc from 32bit addressible physical memory so that
1003 * swiotlb can work on the crash kernel.
Mike Rapoporta7259df2021-09-02 15:00:26 -07001004 */
1005 crash_base = memblock_phys_alloc_range(crash_size, PMD_SIZE,
Nick Kossifidisdecf89f2021-11-26 20:04:11 +02001006 search_start,
1007 min(search_end, (unsigned long) SZ_4G));
Mike Rapoporta7259df2021-09-02 15:00:26 -07001008 if (crash_base == 0) {
Nick Kossifidisdecf89f2021-11-26 20:04:11 +02001009 /* Try again without restricting region to 32bit addressible memory */
1010 crash_base = memblock_phys_alloc_range(crash_size, PMD_SIZE,
1011 search_start, search_end);
1012 if (crash_base == 0) {
1013 pr_warn("crashkernel: couldn't allocate %lldKB\n",
1014 crash_size >> 10);
1015 return;
1016 }
Mike Rapoporta7259df2021-09-02 15:00:26 -07001017 }
Nick Kossifidise53d2812021-04-19 03:55:38 +03001018
1019 pr_info("crashkernel: reserved 0x%016llx - 0x%016llx (%lld MB)\n",
1020 crash_base, crash_base + crash_size, crash_size >> 20);
1021
1022 crashk_res.start = crash_base;
1023 crashk_res.end = crash_base + crash_size - 1;
1024}
1025#endif /* CONFIG_KEXEC_CORE */
1026
Anup Patel671f9a32019-06-28 13:36:21 -07001027void __init paging_init(void)
1028{
Kefeng Wangf842f5f2021-05-10 19:42:22 +08001029 setup_bootmem();
Anup Patel671f9a32019-06-28 13:36:21 -07001030 setup_vm_final();
Atish Patracbd34f42020-11-18 16:38:27 -08001031}
1032
1033void __init misc_mem_init(void)
1034{
Kefeng Wangf6e5aed2021-02-25 14:54:17 +08001035 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
Atish Patra4f0e8ee2020-11-18 16:38:29 -08001036 arch_numa_init();
Atish Patracbd34f42020-11-18 16:38:27 -08001037 sparse_init();
Anup Patel671f9a32019-06-28 13:36:21 -07001038 zone_sizes_init();
Nick Kossifidise53d2812021-04-19 03:55:38 +03001039#ifdef CONFIG_KEXEC_CORE
1040 reserve_crashkernel();
1041#endif
Atish Patra4f0e8ee2020-11-18 16:38:29 -08001042 memblock_dump_all();
Anup Patel6f1e9e92019-02-13 16:38:36 +05301043}
Logan Gunthorped95f1a52019-08-28 15:40:54 -06001044
Kefeng Wang9fe57d82019-10-23 11:23:02 +08001045#ifdef CONFIG_SPARSEMEM_VMEMMAP
Logan Gunthorped95f1a52019-08-28 15:40:54 -06001046int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
1047 struct vmem_altmap *altmap)
1048{
Anshuman Khandual1d9cfee2020-08-06 23:23:19 -07001049 return vmemmap_populate_basepages(start, end, node, NULL);
Logan Gunthorped95f1a52019-08-28 15:40:54 -06001050}
1051#endif