blob: 62716b43660bcc6e1c901aee18b2bf3f173f3699 [file] [log] [blame]
Thomas Gleixner50acfb22019-05-29 07:18:00 -07001// SPDX-License-Identifier: GPL-2.0-only
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07002/*
3 * Copyright (C) 2012 Regents of the University of California
Anup Patel671f9a32019-06-28 13:36:21 -07004 * Copyright (C) 2019 Western Digital Corporation or its affiliates.
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07005 */
6
7#include <linux/init.h>
8#include <linux/mm.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07009#include <linux/memblock.h>
Mike Rapoport57c8a662018-10-30 15:09:49 -070010#include <linux/initrd.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070011#include <linux/swap.h>
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010012#include <linux/sizes.h>
Anup Patel0651c262019-02-21 11:25:49 +053013#include <linux/of_fdt.h>
Albert Ou922b0372019-09-27 16:14:18 -070014#include <linux/libfdt.h>
Zong Lid27c3c92020-03-10 00:55:41 +080015#include <linux/set_memory.h>
Kefeng Wangda815582020-10-31 14:01:12 +080016#include <linux/dma-map-ops.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070017
Anup Patelf2c17aa2019-01-07 20:57:01 +053018#include <asm/fixmap.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070019#include <asm/tlbflush.h>
20#include <asm/sections.h>
Palmer Dabbelt2d268252020-04-14 13:43:24 +090021#include <asm/soc.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070022#include <asm/io.h>
Zong Lib422d282020-06-03 16:03:55 -070023#include <asm/ptdump.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070024
Paul Walmsleyffaee272019-10-17 15:00:17 -070025#include "../kernel/head.h"
26
Anup Patel387181d2019-03-26 08:03:47 +000027unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
28 __page_aligned_bss;
29EXPORT_SYMBOL(empty_zero_page);
30
Anup Pateld90d45d2019-06-07 06:01:29 +000031extern char _start[];
Anup Patel8f3a2b42020-09-17 15:37:10 -070032#define DTB_EARLY_BASE_VA PGDIR_SIZE
33void *dtb_early_va __initdata;
34uintptr_t dtb_early_pa __initdata;
Anup Pateld90d45d2019-06-07 06:01:29 +000035
Atish Patrae8dcb612020-09-17 15:37:12 -070036struct pt_alloc_ops {
37 pte_t *(*get_pte_virt)(phys_addr_t pa);
38 phys_addr_t (*alloc_pte)(uintptr_t va);
39#ifndef __PAGETABLE_PMD_FOLDED
40 pmd_t *(*get_pmd_virt)(phys_addr_t pa);
41 phys_addr_t (*alloc_pmd)(uintptr_t va);
42#endif
43};
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070044
Kefeng Wangda815582020-10-31 14:01:12 +080045static phys_addr_t dma32_phys_limit __ro_after_init;
46
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070047static void __init zone_sizes_init(void)
48{
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010049 unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070050
Zong Lid5fad482018-06-25 16:49:37 +080051#ifdef CONFIG_ZONE_DMA32
Kefeng Wangda815582020-10-31 14:01:12 +080052 max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit);
Zong Lid5fad482018-06-25 16:49:37 +080053#endif
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010054 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
55
Mike Rapoport9691a072020-06-03 15:57:10 -070056 free_area_init(max_zone_pfns);
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070057}
58
Christoph Hellwig6bd33e12019-10-28 13:10:41 +010059static void setup_zero_page(void)
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070060{
61 memset((void *)empty_zero_page, 0, PAGE_SIZE);
62}
63
Kefeng Wang8fa3cdf2020-05-14 19:53:35 +080064#if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000065static inline void print_mlk(char *name, unsigned long b, unsigned long t)
66{
67 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t,
68 (((t) - (b)) >> 10));
69}
70
71static inline void print_mlm(char *name, unsigned long b, unsigned long t)
72{
73 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t,
74 (((t) - (b)) >> 20));
75}
76
77static void print_vm_layout(void)
78{
79 pr_notice("Virtual kernel memory layout:\n");
80 print_mlk("fixmap", (unsigned long)FIXADDR_START,
81 (unsigned long)FIXADDR_TOP);
82 print_mlm("pci io", (unsigned long)PCI_IO_START,
83 (unsigned long)PCI_IO_END);
84 print_mlm("vmemmap", (unsigned long)VMEMMAP_START,
85 (unsigned long)VMEMMAP_END);
86 print_mlm("vmalloc", (unsigned long)VMALLOC_START,
87 (unsigned long)VMALLOC_END);
88 print_mlm("lowmem", (unsigned long)PAGE_OFFSET,
89 (unsigned long)high_memory);
90}
91#else
92static void print_vm_layout(void) { }
93#endif /* CONFIG_DEBUG_VM */
94
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070095void __init mem_init(void)
96{
97#ifdef CONFIG_FLATMEM
98 BUG_ON(!mem_map);
99#endif /* CONFIG_FLATMEM */
100
101 high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
Mike Rapoportc6ffc5c2018-10-30 15:09:30 -0700102 memblock_free_all();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700103
104 mem_init_print_info(NULL);
Yash Shah2cc6c4a2019-11-18 05:58:34 +0000105 print_vm_layout();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700106}
107
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700108#ifdef CONFIG_BLK_DEV_INITRD
Anup Patel0651c262019-02-21 11:25:49 +0530109static void __init setup_initrd(void)
110{
Atish Patra44002312020-07-15 16:30:08 -0700111 phys_addr_t start;
Anup Patel0651c262019-02-21 11:25:49 +0530112 unsigned long size;
113
Atish Patra44002312020-07-15 16:30:08 -0700114 /* Ignore the virtul address computed during device tree parsing */
115 initrd_start = initrd_end = 0;
116
117 if (!phys_initrd_size)
118 return;
119 /*
120 * Round the memory region to page boundaries as per free_initrd_mem()
121 * This allows us to detect whether the pages overlapping the initrd
122 * are in use, but more importantly, reserves the entire set of pages
123 * as we don't want these pages allocated for other purposes.
124 */
125 start = round_down(phys_initrd_start, PAGE_SIZE);
126 size = phys_initrd_size + (phys_initrd_start - start);
127 size = round_up(size, PAGE_SIZE);
128
129 if (!memblock_is_region_memory(start, size)) {
130 pr_err("INITRD: 0x%08llx+0x%08lx is not a memory region",
131 (u64)start, size);
Anup Patel0651c262019-02-21 11:25:49 +0530132 goto disable;
133 }
134
Atish Patra44002312020-07-15 16:30:08 -0700135 if (memblock_is_region_reserved(start, size)) {
136 pr_err("INITRD: 0x%08llx+0x%08lx overlaps in-use memory region\n",
137 (u64)start, size);
138 goto disable;
139 }
140
141 memblock_reserve(start, size);
142 /* Now convert initrd to virtual addresses */
143 initrd_start = (unsigned long)__va(phys_initrd_start);
144 initrd_end = initrd_start + phys_initrd_size;
Anup Patel0651c262019-02-21 11:25:49 +0530145 initrd_below_start_ok = 1;
146
147 pr_info("Initial ramdisk at: 0x%p (%lu bytes)\n",
148 (void *)(initrd_start), size);
149 return;
150disable:
151 pr_cont(" - disabling initrd\n");
152 initrd_start = 0;
153 initrd_end = 0;
154}
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700155#endif /* CONFIG_BLK_DEV_INITRD */
Anup Patel0651c262019-02-21 11:25:49 +0530156
157void __init setup_bootmem(void)
158{
Atish Patra1bd14a62020-10-07 14:51:59 -0700159 phys_addr_t mem_start = 0;
160 phys_addr_t start, end = 0;
Zong Liac51e002020-01-02 11:12:40 +0800161 phys_addr_t vmlinux_end = __pa_symbol(&_end);
162 phys_addr_t vmlinux_start = __pa_symbol(&_start);
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700163 u64 i;
Anup Patel0651c262019-02-21 11:25:49 +0530164
165 /* Find the memory region containing the kernel */
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700166 for_each_mem_range(i, &start, &end) {
167 phys_addr_t size = end - start;
Atish Patra1bd14a62020-10-07 14:51:59 -0700168 if (!mem_start)
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700169 mem_start = start;
170 if (start <= vmlinux_start && vmlinux_end <= end)
171 BUG_ON(size == 0);
Anup Patel0651c262019-02-21 11:25:49 +0530172 }
Atish Patrafa5a1982020-07-15 16:30:09 -0700173
174 /*
Atish Patra1bd14a62020-10-07 14:51:59 -0700175 * The maximal physical memory size is -PAGE_OFFSET.
176 * Make sure that any memory beyond mem_start + (-PAGE_OFFSET) is removed
177 * as it is unusable by kernel.
Atish Patrafa5a1982020-07-15 16:30:09 -0700178 */
Atish Patrade043da2020-12-18 16:13:56 -0800179 memblock_enforce_memory_limit(-PAGE_OFFSET);
Anup Patel0651c262019-02-21 11:25:49 +0530180
Anup Pateld90d45d2019-06-07 06:01:29 +0000181 /* Reserve from the start of the kernel to the end of the kernel */
182 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
183
Vincent Chenc749bb22020-04-27 14:59:24 +0800184 max_pfn = PFN_DOWN(memblock_end_of_DRAM());
185 max_low_pfn = max_pfn;
Kefeng Wangda815582020-10-31 14:01:12 +0800186 dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
Atish Patrad0d8aae2020-07-15 16:30:07 -0700187 set_max_mapnr(max_low_pfn);
Anup Patel0651c262019-02-21 11:25:49 +0530188
189#ifdef CONFIG_BLK_DEV_INITRD
190 setup_initrd();
191#endif /* CONFIG_BLK_DEV_INITRD */
192
Albert Ou922b0372019-09-27 16:14:18 -0700193 /*
194 * Avoid using early_init_fdt_reserve_self() since __pa() does
195 * not work for DTB pointers that are fixmap addresses
196 */
197 memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
198
Anup Patel0651c262019-02-21 11:25:49 +0530199 early_init_fdt_scan_reserved_mem();
Kefeng Wangda815582020-10-31 14:01:12 +0800200 dma_contiguous_reserve(dma32_phys_limit);
Anup Patel0651c262019-02-21 11:25:49 +0530201 memblock_allow_resize();
202 memblock_dump_all();
Anup Patel0651c262019-02-21 11:25:49 +0530203}
Anup Patel6f1e9e92019-02-13 16:38:36 +0530204
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100205#ifdef CONFIG_MMU
Atish Patrae8dcb612020-09-17 15:37:12 -0700206static struct pt_alloc_ops pt_ops;
207
Anup Patel387181d2019-03-26 08:03:47 +0000208unsigned long va_pa_offset;
209EXPORT_SYMBOL(va_pa_offset);
210unsigned long pfn_base;
211EXPORT_SYMBOL(pfn_base);
212
Anup Patel6f1e9e92019-02-13 16:38:36 +0530213pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700214pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patelf2c17aa2019-01-07 20:57:01 +0530215pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700216
217#define MAX_EARLY_MAPPING_SIZE SZ_128M
218
219pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530220
221void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
222{
223 unsigned long addr = __fix_to_virt(idx);
224 pte_t *ptep;
225
226 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
227
228 ptep = &fixmap_pte[pte_index(addr)];
229
Greentime Hu21190b72020-08-04 11:02:05 +0800230 if (pgprot_val(prot))
Anup Patelf2c17aa2019-01-07 20:57:01 +0530231 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
Greentime Hu21190b72020-08-04 11:02:05 +0800232 else
Anup Patelf2c17aa2019-01-07 20:57:01 +0530233 pte_clear(&init_mm, addr, ptep);
Greentime Hu21190b72020-08-04 11:02:05 +0800234 local_flush_tlb_page(addr);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530235}
236
Atish Patrae8dcb612020-09-17 15:37:12 -0700237static inline pte_t *__init get_pte_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700238{
Atish Patrae8dcb612020-09-17 15:37:12 -0700239 return (pte_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700240}
241
Atish Patrae8dcb612020-09-17 15:37:12 -0700242static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa)
243{
244 clear_fixmap(FIX_PTE);
245 return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
246}
247
248static inline pte_t *get_pte_virt_late(phys_addr_t pa)
249{
250 return (pte_t *) __va(pa);
251}
252
253static inline phys_addr_t __init alloc_pte_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700254{
255 /*
256 * We only create PMD or PGD early mappings so we
257 * should never reach here with MMU disabled.
258 */
Atish Patrae8dcb612020-09-17 15:37:12 -0700259 BUG();
260}
Anup Patel671f9a32019-06-28 13:36:21 -0700261
Atish Patrae8dcb612020-09-17 15:37:12 -0700262static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va)
263{
Anup Patel671f9a32019-06-28 13:36:21 -0700264 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
265}
266
Atish Patrae8dcb612020-09-17 15:37:12 -0700267static phys_addr_t alloc_pte_late(uintptr_t va)
268{
269 unsigned long vaddr;
270
271 vaddr = __get_free_page(GFP_KERNEL);
272 if (!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr)))
273 BUG();
274 return __pa(vaddr);
275}
276
Anup Patel671f9a32019-06-28 13:36:21 -0700277static void __init create_pte_mapping(pte_t *ptep,
278 uintptr_t va, phys_addr_t pa,
279 phys_addr_t sz, pgprot_t prot)
280{
Mike Rapoport974b9b22020-06-08 21:33:10 -0700281 uintptr_t pte_idx = pte_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700282
283 BUG_ON(sz != PAGE_SIZE);
284
Mike Rapoport974b9b22020-06-08 21:33:10 -0700285 if (pte_none(ptep[pte_idx]))
286 ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700287}
288
289#ifndef __PAGETABLE_PMD_FOLDED
290
291pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
292pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
293
294#if MAX_EARLY_MAPPING_SIZE < PGDIR_SIZE
295#define NUM_EARLY_PMDS 1UL
296#else
297#define NUM_EARLY_PMDS (1UL + MAX_EARLY_MAPPING_SIZE / PGDIR_SIZE)
298#endif
299pmd_t early_pmd[PTRS_PER_PMD * NUM_EARLY_PMDS] __initdata __aligned(PAGE_SIZE);
Anup Patel1074dd42020-11-04 12:07:13 +0530300pmd_t early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
Anup Patel671f9a32019-06-28 13:36:21 -0700301
Atish Patrae8dcb612020-09-17 15:37:12 -0700302static pmd_t *__init get_pmd_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700303{
Atish Patrae8dcb612020-09-17 15:37:12 -0700304 /* Before MMU is enabled */
305 return (pmd_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700306}
307
Atish Patrae8dcb612020-09-17 15:37:12 -0700308static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa)
309{
310 clear_fixmap(FIX_PMD);
311 return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
312}
313
314static pmd_t *get_pmd_virt_late(phys_addr_t pa)
315{
316 return (pmd_t *) __va(pa);
317}
318
319static phys_addr_t __init alloc_pmd_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700320{
321 uintptr_t pmd_num;
322
Anup Patel671f9a32019-06-28 13:36:21 -0700323 pmd_num = (va - PAGE_OFFSET) >> PGDIR_SHIFT;
324 BUG_ON(pmd_num >= NUM_EARLY_PMDS);
325 return (uintptr_t)&early_pmd[pmd_num * PTRS_PER_PMD];
326}
327
Atish Patrae8dcb612020-09-17 15:37:12 -0700328static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va)
329{
330 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
331}
332
333static phys_addr_t alloc_pmd_late(uintptr_t va)
334{
335 unsigned long vaddr;
336
337 vaddr = __get_free_page(GFP_KERNEL);
338 BUG_ON(!vaddr);
339 return __pa(vaddr);
340}
341
Anup Patel671f9a32019-06-28 13:36:21 -0700342static void __init create_pmd_mapping(pmd_t *pmdp,
343 uintptr_t va, phys_addr_t pa,
344 phys_addr_t sz, pgprot_t prot)
345{
346 pte_t *ptep;
347 phys_addr_t pte_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700348 uintptr_t pmd_idx = pmd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700349
350 if (sz == PMD_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700351 if (pmd_none(pmdp[pmd_idx]))
352 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700353 return;
354 }
355
Mike Rapoport974b9b22020-06-08 21:33:10 -0700356 if (pmd_none(pmdp[pmd_idx])) {
Atish Patrae8dcb612020-09-17 15:37:12 -0700357 pte_phys = pt_ops.alloc_pte(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700358 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
Atish Patrae8dcb612020-09-17 15:37:12 -0700359 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700360 memset(ptep, 0, PAGE_SIZE);
361 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700362 pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
Atish Patrae8dcb612020-09-17 15:37:12 -0700363 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700364 }
365
366 create_pte_mapping(ptep, va, pa, sz, prot);
367}
368
369#define pgd_next_t pmd_t
Atish Patrae8dcb612020-09-17 15:37:12 -0700370#define alloc_pgd_next(__va) pt_ops.alloc_pmd(__va)
371#define get_pgd_next_virt(__pa) pt_ops.get_pmd_virt(__pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700372#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
373 create_pmd_mapping(__nextp, __va, __pa, __sz, __prot)
Anup Patel671f9a32019-06-28 13:36:21 -0700374#define fixmap_pgd_next fixmap_pmd
375#else
376#define pgd_next_t pte_t
Atish Patrae8dcb612020-09-17 15:37:12 -0700377#define alloc_pgd_next(__va) pt_ops.alloc_pte(__va)
378#define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700379#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
380 create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
Anup Patel671f9a32019-06-28 13:36:21 -0700381#define fixmap_pgd_next fixmap_pte
382#endif
383
Atish Patrab91540d2020-09-17 15:37:15 -0700384void __init create_pgd_mapping(pgd_t *pgdp,
Anup Patel671f9a32019-06-28 13:36:21 -0700385 uintptr_t va, phys_addr_t pa,
386 phys_addr_t sz, pgprot_t prot)
387{
388 pgd_next_t *nextp;
389 phys_addr_t next_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700390 uintptr_t pgd_idx = pgd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700391
392 if (sz == PGDIR_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700393 if (pgd_val(pgdp[pgd_idx]) == 0)
394 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700395 return;
396 }
397
Mike Rapoport974b9b22020-06-08 21:33:10 -0700398 if (pgd_val(pgdp[pgd_idx]) == 0) {
Anup Patel671f9a32019-06-28 13:36:21 -0700399 next_phys = alloc_pgd_next(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700400 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700401 nextp = get_pgd_next_virt(next_phys);
402 memset(nextp, 0, PAGE_SIZE);
403 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700404 next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
Anup Patel671f9a32019-06-28 13:36:21 -0700405 nextp = get_pgd_next_virt(next_phys);
406 }
407
408 create_pgd_next_mapping(nextp, va, pa, sz, prot);
409}
410
411static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
412{
Zong Li0fdc6362019-11-08 01:00:40 -0800413 /* Upgrade to PMD_SIZE mappings whenever possible */
414 if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
415 return PAGE_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700416
Zong Li0fdc6362019-11-08 01:00:40 -0800417 return PMD_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700418}
419
Anup Patel387181d2019-03-26 08:03:47 +0000420/*
421 * setup_vm() is called from head.S with MMU-off.
422 *
423 * Following requirements should be honoured for setup_vm() to work
424 * correctly:
425 * 1) It should use PC-relative addressing for accessing kernel symbols.
426 * To achieve this we always use GCC cmodel=medany.
427 * 2) The compiler instrumentation for FTRACE will not work for setup_vm()
428 * so disable compiler instrumentation when FTRACE is enabled.
429 *
430 * Currently, the above requirements are honoured by using custom CFLAGS
431 * for init.o in mm/Makefile.
432 */
433
434#ifndef __riscv_cmodel_medany
Paul Walmsley6a527b62019-10-17 14:45:58 -0700435#error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
Anup Patel387181d2019-03-26 08:03:47 +0000436#endif
437
Anup Patel671f9a32019-06-28 13:36:21 -0700438asmlinkage void __init setup_vm(uintptr_t dtb_pa)
Anup Patel6f1e9e92019-02-13 16:38:36 +0530439{
Anup Patel8f3a2b42020-09-17 15:37:10 -0700440 uintptr_t va, pa, end_va;
Anup Patel671f9a32019-06-28 13:36:21 -0700441 uintptr_t load_pa = (uintptr_t)(&_start);
442 uintptr_t load_sz = (uintptr_t)(&_end) - load_pa;
443 uintptr_t map_size = best_map_size(load_pa, MAX_EARLY_MAPPING_SIZE);
Atish Patra6262f662020-09-17 15:37:11 -0700444#ifndef __PAGETABLE_PMD_FOLDED
445 pmd_t fix_bmap_spmd, fix_bmap_epmd;
446#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530447
Anup Patel671f9a32019-06-28 13:36:21 -0700448 va_pa_offset = PAGE_OFFSET - load_pa;
449 pfn_base = PFN_DOWN(load_pa);
450
451 /*
452 * Enforce boot alignment requirements of RV32 and
453 * RV64 by only allowing PMD or PGD mappings.
454 */
455 BUG_ON(map_size == PAGE_SIZE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530456
457 /* Sanity check alignment and size */
458 BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
Anup Patel671f9a32019-06-28 13:36:21 -0700459 BUG_ON((load_pa % map_size) != 0);
460 BUG_ON(load_sz > MAX_EARLY_MAPPING_SIZE);
461
Atish Patrae8dcb612020-09-17 15:37:12 -0700462 pt_ops.alloc_pte = alloc_pte_early;
463 pt_ops.get_pte_virt = get_pte_virt_early;
464#ifndef __PAGETABLE_PMD_FOLDED
465 pt_ops.alloc_pmd = alloc_pmd_early;
466 pt_ops.get_pmd_virt = get_pmd_virt_early;
467#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700468 /* Setup early PGD for fixmap */
469 create_pgd_mapping(early_pg_dir, FIXADDR_START,
470 (uintptr_t)fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530471
472#ifndef __PAGETABLE_PMD_FOLDED
Anup Patel671f9a32019-06-28 13:36:21 -0700473 /* Setup fixmap PMD */
474 create_pmd_mapping(fixmap_pmd, FIXADDR_START,
475 (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
476 /* Setup trampoline PGD and PMD */
477 create_pgd_mapping(trampoline_pg_dir, PAGE_OFFSET,
478 (uintptr_t)trampoline_pmd, PGDIR_SIZE, PAGE_TABLE);
479 create_pmd_mapping(trampoline_pmd, PAGE_OFFSET,
480 load_pa, PMD_SIZE, PAGE_KERNEL_EXEC);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530481#else
Anup Patel671f9a32019-06-28 13:36:21 -0700482 /* Setup trampoline PGD */
483 create_pgd_mapping(trampoline_pg_dir, PAGE_OFFSET,
484 load_pa, PGDIR_SIZE, PAGE_KERNEL_EXEC);
485#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530486
Anup Patel671f9a32019-06-28 13:36:21 -0700487 /*
488 * Setup early PGD covering entire kernel which will allows
489 * us to reach paging_init(). We map all memory banks later
490 * in setup_vm_final() below.
491 */
492 end_va = PAGE_OFFSET + load_sz;
493 for (va = PAGE_OFFSET; va < end_va; va += map_size)
494 create_pgd_mapping(early_pg_dir, va,
495 load_pa + (va - PAGE_OFFSET),
496 map_size, PAGE_KERNEL_EXEC);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530497
Anup Patel1074dd42020-11-04 12:07:13 +0530498#ifndef __PAGETABLE_PMD_FOLDED
499 /* Setup early PMD for DTB */
500 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
501 (uintptr_t)early_dtb_pmd, PGDIR_SIZE, PAGE_TABLE);
502 /* Create two consecutive PMD mappings for FDT early scan */
503 pa = dtb_pa & ~(PMD_SIZE - 1);
504 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA,
505 pa, PMD_SIZE, PAGE_KERNEL);
506 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE,
507 pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
508 dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1));
509#else
Anup Patel8f3a2b42020-09-17 15:37:10 -0700510 /* Create two consecutive PGD mappings for FDT early scan */
511 pa = dtb_pa & ~(PGDIR_SIZE - 1);
512 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
513 pa, PGDIR_SIZE, PAGE_KERNEL);
514 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA + PGDIR_SIZE,
515 pa + PGDIR_SIZE, PGDIR_SIZE, PAGE_KERNEL);
516 dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PGDIR_SIZE - 1));
Anup Patel1074dd42020-11-04 12:07:13 +0530517#endif
Albert Ou922b0372019-09-27 16:14:18 -0700518 dtb_early_pa = dtb_pa;
Atish Patra6262f662020-09-17 15:37:11 -0700519
520 /*
521 * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
522 * range can not span multiple pmds.
523 */
524 BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
525 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
526
527#ifndef __PAGETABLE_PMD_FOLDED
528 /*
529 * Early ioremap fixmap is already created as it lies within first 2MB
530 * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END
531 * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn
532 * the user if not.
533 */
534 fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))];
535 fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))];
536 if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) {
537 WARN_ON(1);
538 pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n",
539 pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd));
540 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
541 fix_to_virt(FIX_BTMAP_BEGIN));
542 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
543 fix_to_virt(FIX_BTMAP_END));
544
545 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
546 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
547 }
548#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700549}
550
551static void __init setup_vm_final(void)
552{
553 uintptr_t va, map_size;
554 phys_addr_t pa, start, end;
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700555 u64 i;
Anup Patel671f9a32019-06-28 13:36:21 -0700556
Atish Patrae8dcb612020-09-17 15:37:12 -0700557 /**
558 * MMU is enabled at this point. But page table setup is not complete yet.
559 * fixmap page table alloc functions should be used at this point
560 */
561 pt_ops.alloc_pte = alloc_pte_fixmap;
562 pt_ops.get_pte_virt = get_pte_virt_fixmap;
563#ifndef __PAGETABLE_PMD_FOLDED
564 pt_ops.alloc_pmd = alloc_pmd_fixmap;
565 pt_ops.get_pmd_virt = get_pmd_virt_fixmap;
566#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700567 /* Setup swapper PGD for fixmap */
568 create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
Zong Liac51e002020-01-02 11:12:40 +0800569 __pa_symbol(fixmap_pgd_next),
Anup Patel671f9a32019-06-28 13:36:21 -0700570 PGDIR_SIZE, PAGE_TABLE);
571
572 /* Map all memory banks */
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700573 for_each_mem_range(i, &start, &end) {
Anup Patel671f9a32019-06-28 13:36:21 -0700574 if (start >= end)
575 break;
Anup Patel671f9a32019-06-28 13:36:21 -0700576 if (start <= __pa(PAGE_OFFSET) &&
577 __pa(PAGE_OFFSET) < end)
578 start = __pa(PAGE_OFFSET);
579
580 map_size = best_map_size(start, end - start);
581 for (pa = start; pa < end; pa += map_size) {
582 va = (uintptr_t)__va(pa);
583 create_pgd_mapping(swapper_pg_dir, va, pa,
584 map_size, PAGE_KERNEL_EXEC);
585 }
Anup Patel6f1e9e92019-02-13 16:38:36 +0530586 }
Anup Patelf2c17aa2019-01-07 20:57:01 +0530587
Anup Patel671f9a32019-06-28 13:36:21 -0700588 /* Clear fixmap PTE and PMD mappings */
589 clear_fixmap(FIX_PTE);
590 clear_fixmap(FIX_PMD);
591
592 /* Move to swapper page table */
Zong Liac51e002020-01-02 11:12:40 +0800593 csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | SATP_MODE);
Anup Patel671f9a32019-06-28 13:36:21 -0700594 local_flush_tlb_all();
Atish Patrae8dcb612020-09-17 15:37:12 -0700595
596 /* generic page allocation functions must be used to setup page table */
597 pt_ops.alloc_pte = alloc_pte_late;
598 pt_ops.get_pte_virt = get_pte_virt_late;
599#ifndef __PAGETABLE_PMD_FOLDED
600 pt_ops.alloc_pmd = alloc_pmd_late;
601 pt_ops.get_pmd_virt = get_pmd_virt_late;
602#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700603}
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100604#else
605asmlinkage void __init setup_vm(uintptr_t dtb_pa)
606{
Palmer Dabbelt2d268252020-04-14 13:43:24 +0900607#ifdef CONFIG_BUILTIN_DTB
Damien Le Moald5805af2020-12-13 22:50:37 +0900608 dtb_early_va = (void *) __dtb_start;
Palmer Dabbelt2d268252020-04-14 13:43:24 +0900609#else
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100610 dtb_early_va = (void *)dtb_pa;
Palmer Dabbelt2d268252020-04-14 13:43:24 +0900611#endif
Atish Patraa78c6f52020-10-01 12:04:56 -0700612 dtb_early_pa = dtb_pa;
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100613}
614
615static inline void setup_vm_final(void)
616{
617}
618#endif /* CONFIG_MMU */
Anup Patel671f9a32019-06-28 13:36:21 -0700619
Zong Lid27c3c92020-03-10 00:55:41 +0800620#ifdef CONFIG_STRICT_KERNEL_RWX
Atish Patra19a00862020-11-04 16:04:38 -0800621void protect_kernel_text_data(void)
Zong Lid27c3c92020-03-10 00:55:41 +0800622{
Atish Patra19a00862020-11-04 16:04:38 -0800623 unsigned long text_start = (unsigned long)_start;
624 unsigned long init_text_start = (unsigned long)__init_text_begin;
625 unsigned long init_data_start = (unsigned long)__init_data_begin;
Zong Lid27c3c92020-03-10 00:55:41 +0800626 unsigned long rodata_start = (unsigned long)__start_rodata;
627 unsigned long data_start = (unsigned long)_data;
628 unsigned long max_low = (unsigned long)(__va(PFN_PHYS(max_low_pfn)));
629
Atish Patra19a00862020-11-04 16:04:38 -0800630 set_memory_ro(text_start, (init_text_start - text_start) >> PAGE_SHIFT);
631 set_memory_ro(init_text_start, (init_data_start - init_text_start) >> PAGE_SHIFT);
632 set_memory_nx(init_data_start, (rodata_start - init_data_start) >> PAGE_SHIFT);
633 /* rodata section is marked readonly in mark_rodata_ro */
Zong Lid27c3c92020-03-10 00:55:41 +0800634 set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
635 set_memory_nx(data_start, (max_low - data_start) >> PAGE_SHIFT);
Atish Patra19a00862020-11-04 16:04:38 -0800636}
637
638void mark_rodata_ro(void)
639{
640 unsigned long rodata_start = (unsigned long)__start_rodata;
641 unsigned long data_start = (unsigned long)_data;
642
643 set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
Zong Lib422d282020-06-03 16:03:55 -0700644
645 debug_checkwx();
Zong Lid27c3c92020-03-10 00:55:41 +0800646}
647#endif
648
Anup Patel671f9a32019-06-28 13:36:21 -0700649void __init paging_init(void)
650{
651 setup_vm_final();
652 setup_zero_page();
Atish Patracbd34f42020-11-18 16:38:27 -0800653}
654
655void __init misc_mem_init(void)
656{
657 sparse_init();
Anup Patel671f9a32019-06-28 13:36:21 -0700658 zone_sizes_init();
Anup Patel6f1e9e92019-02-13 16:38:36 +0530659}
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600660
Kefeng Wang9fe57d82019-10-23 11:23:02 +0800661#ifdef CONFIG_SPARSEMEM_VMEMMAP
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600662int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
663 struct vmem_altmap *altmap)
664{
Anshuman Khandual1d9cfee2020-08-06 23:23:19 -0700665 return vmemmap_populate_basepages(start, end, node, NULL);
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600666}
667#endif