blob: f9f9568d689ef53e215c44de8b4468ae3033cfa9 [file] [log] [blame]
Thomas Gleixner50acfb22019-05-29 07:18:00 -07001// SPDX-License-Identifier: GPL-2.0-only
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07002/*
3 * Copyright (C) 2012 Regents of the University of California
Anup Patel671f9a32019-06-28 13:36:21 -07004 * Copyright (C) 2019 Western Digital Corporation or its affiliates.
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07005 */
6
7#include <linux/init.h>
8#include <linux/mm.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07009#include <linux/memblock.h>
Mike Rapoport57c8a662018-10-30 15:09:49 -070010#include <linux/initrd.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070011#include <linux/swap.h>
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010012#include <linux/sizes.h>
Anup Patel0651c262019-02-21 11:25:49 +053013#include <linux/of_fdt.h>
Albert Ou922b0372019-09-27 16:14:18 -070014#include <linux/libfdt.h>
Zong Lid27c3c92020-03-10 00:55:41 +080015#include <linux/set_memory.h>
Kefeng Wangda815582020-10-31 14:01:12 +080016#include <linux/dma-map-ops.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070017
Anup Patelf2c17aa2019-01-07 20:57:01 +053018#include <asm/fixmap.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070019#include <asm/tlbflush.h>
20#include <asm/sections.h>
Palmer Dabbelt2d268252020-04-14 13:43:24 +090021#include <asm/soc.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070022#include <asm/io.h>
Zong Lib422d282020-06-03 16:03:55 -070023#include <asm/ptdump.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070024
Paul Walmsleyffaee272019-10-17 15:00:17 -070025#include "../kernel/head.h"
26
Anup Patel387181d2019-03-26 08:03:47 +000027unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
28 __page_aligned_bss;
29EXPORT_SYMBOL(empty_zero_page);
30
Anup Pateld90d45d2019-06-07 06:01:29 +000031extern char _start[];
Anup Patel8f3a2b42020-09-17 15:37:10 -070032#define DTB_EARLY_BASE_VA PGDIR_SIZE
33void *dtb_early_va __initdata;
34uintptr_t dtb_early_pa __initdata;
Anup Pateld90d45d2019-06-07 06:01:29 +000035
Atish Patrae8dcb612020-09-17 15:37:12 -070036struct pt_alloc_ops {
37 pte_t *(*get_pte_virt)(phys_addr_t pa);
38 phys_addr_t (*alloc_pte)(uintptr_t va);
39#ifndef __PAGETABLE_PMD_FOLDED
40 pmd_t *(*get_pmd_virt)(phys_addr_t pa);
41 phys_addr_t (*alloc_pmd)(uintptr_t va);
42#endif
43};
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070044
Kefeng Wangda815582020-10-31 14:01:12 +080045static phys_addr_t dma32_phys_limit __ro_after_init;
46
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070047static void __init zone_sizes_init(void)
48{
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010049 unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070050
Zong Lid5fad482018-06-25 16:49:37 +080051#ifdef CONFIG_ZONE_DMA32
Kefeng Wangda815582020-10-31 14:01:12 +080052 max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit);
Zong Lid5fad482018-06-25 16:49:37 +080053#endif
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010054 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
55
Mike Rapoport9691a072020-06-03 15:57:10 -070056 free_area_init(max_zone_pfns);
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070057}
58
Christoph Hellwig6bd33e12019-10-28 13:10:41 +010059static void setup_zero_page(void)
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070060{
61 memset((void *)empty_zero_page, 0, PAGE_SIZE);
62}
63
Kefeng Wang8fa3cdf2020-05-14 19:53:35 +080064#if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000065static inline void print_mlk(char *name, unsigned long b, unsigned long t)
66{
67 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t,
68 (((t) - (b)) >> 10));
69}
70
71static inline void print_mlm(char *name, unsigned long b, unsigned long t)
72{
73 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t,
74 (((t) - (b)) >> 20));
75}
76
77static void print_vm_layout(void)
78{
79 pr_notice("Virtual kernel memory layout:\n");
80 print_mlk("fixmap", (unsigned long)FIXADDR_START,
81 (unsigned long)FIXADDR_TOP);
82 print_mlm("pci io", (unsigned long)PCI_IO_START,
83 (unsigned long)PCI_IO_END);
84 print_mlm("vmemmap", (unsigned long)VMEMMAP_START,
85 (unsigned long)VMEMMAP_END);
86 print_mlm("vmalloc", (unsigned long)VMALLOC_START,
87 (unsigned long)VMALLOC_END);
88 print_mlm("lowmem", (unsigned long)PAGE_OFFSET,
89 (unsigned long)high_memory);
90}
91#else
92static void print_vm_layout(void) { }
93#endif /* CONFIG_DEBUG_VM */
94
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070095void __init mem_init(void)
96{
97#ifdef CONFIG_FLATMEM
98 BUG_ON(!mem_map);
99#endif /* CONFIG_FLATMEM */
100
101 high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
Mike Rapoportc6ffc5c2018-10-30 15:09:30 -0700102 memblock_free_all();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700103
104 mem_init_print_info(NULL);
Yash Shah2cc6c4a2019-11-18 05:58:34 +0000105 print_vm_layout();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700106}
107
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700108#ifdef CONFIG_BLK_DEV_INITRD
Anup Patel0651c262019-02-21 11:25:49 +0530109static void __init setup_initrd(void)
110{
Atish Patra44002312020-07-15 16:30:08 -0700111 phys_addr_t start;
Anup Patel0651c262019-02-21 11:25:49 +0530112 unsigned long size;
113
Atish Patra44002312020-07-15 16:30:08 -0700114 /* Ignore the virtul address computed during device tree parsing */
115 initrd_start = initrd_end = 0;
116
117 if (!phys_initrd_size)
118 return;
119 /*
120 * Round the memory region to page boundaries as per free_initrd_mem()
121 * This allows us to detect whether the pages overlapping the initrd
122 * are in use, but more importantly, reserves the entire set of pages
123 * as we don't want these pages allocated for other purposes.
124 */
125 start = round_down(phys_initrd_start, PAGE_SIZE);
126 size = phys_initrd_size + (phys_initrd_start - start);
127 size = round_up(size, PAGE_SIZE);
128
129 if (!memblock_is_region_memory(start, size)) {
130 pr_err("INITRD: 0x%08llx+0x%08lx is not a memory region",
131 (u64)start, size);
Anup Patel0651c262019-02-21 11:25:49 +0530132 goto disable;
133 }
134
Atish Patra44002312020-07-15 16:30:08 -0700135 if (memblock_is_region_reserved(start, size)) {
136 pr_err("INITRD: 0x%08llx+0x%08lx overlaps in-use memory region\n",
137 (u64)start, size);
138 goto disable;
139 }
140
141 memblock_reserve(start, size);
142 /* Now convert initrd to virtual addresses */
143 initrd_start = (unsigned long)__va(phys_initrd_start);
144 initrd_end = initrd_start + phys_initrd_size;
Anup Patel0651c262019-02-21 11:25:49 +0530145 initrd_below_start_ok = 1;
146
147 pr_info("Initial ramdisk at: 0x%p (%lu bytes)\n",
148 (void *)(initrd_start), size);
149 return;
150disable:
151 pr_cont(" - disabling initrd\n");
152 initrd_start = 0;
153 initrd_end = 0;
154}
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700155#endif /* CONFIG_BLK_DEV_INITRD */
Anup Patel0651c262019-02-21 11:25:49 +0530156
157void __init setup_bootmem(void)
158{
Atish Patra1bd14a62020-10-07 14:51:59 -0700159 phys_addr_t mem_start = 0;
Atish Patraabb8e862021-01-11 15:45:02 -0800160 phys_addr_t start, dram_end, end = 0;
Zong Liac51e002020-01-02 11:12:40 +0800161 phys_addr_t vmlinux_end = __pa_symbol(&_end);
162 phys_addr_t vmlinux_start = __pa_symbol(&_start);
Atish Patraabb8e862021-01-11 15:45:02 -0800163 phys_addr_t max_mapped_addr = __pa(~(ulong)0);
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700164 u64 i;
Anup Patel0651c262019-02-21 11:25:49 +0530165
166 /* Find the memory region containing the kernel */
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700167 for_each_mem_range(i, &start, &end) {
168 phys_addr_t size = end - start;
Atish Patra1bd14a62020-10-07 14:51:59 -0700169 if (!mem_start)
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700170 mem_start = start;
171 if (start <= vmlinux_start && vmlinux_end <= end)
172 BUG_ON(size == 0);
Anup Patel0651c262019-02-21 11:25:49 +0530173 }
Atish Patrafa5a1982020-07-15 16:30:09 -0700174
175 /*
Atish Patra1bd14a62020-10-07 14:51:59 -0700176 * The maximal physical memory size is -PAGE_OFFSET.
177 * Make sure that any memory beyond mem_start + (-PAGE_OFFSET) is removed
178 * as it is unusable by kernel.
Atish Patrafa5a1982020-07-15 16:30:09 -0700179 */
Atish Patrade043da2020-12-18 16:13:56 -0800180 memblock_enforce_memory_limit(-PAGE_OFFSET);
Anup Patel0651c262019-02-21 11:25:49 +0530181
Anup Pateld90d45d2019-06-07 06:01:29 +0000182 /* Reserve from the start of the kernel to the end of the kernel */
183 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
184
Atish Patraabb8e862021-01-11 15:45:02 -0800185 dram_end = memblock_end_of_DRAM();
186
187 /*
188 * memblock allocator is not aware of the fact that last 4K bytes of
189 * the addressable memory can not be mapped because of IS_ERR_VALUE
190 * macro. Make sure that last 4k bytes are not usable by memblock
191 * if end of dram is equal to maximum addressable memory.
192 */
193 if (max_mapped_addr == (dram_end - 1))
194 memblock_set_current_limit(max_mapped_addr - 4096);
195
196 max_pfn = PFN_DOWN(dram_end);
Vincent Chenc749bb22020-04-27 14:59:24 +0800197 max_low_pfn = max_pfn;
Kefeng Wangda815582020-10-31 14:01:12 +0800198 dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
Guo Ren336e8eb2021-01-21 14:31:17 +0800199 set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
Anup Patel0651c262019-02-21 11:25:49 +0530200
201#ifdef CONFIG_BLK_DEV_INITRD
202 setup_initrd();
203#endif /* CONFIG_BLK_DEV_INITRD */
204
Albert Ou922b0372019-09-27 16:14:18 -0700205 /*
206 * Avoid using early_init_fdt_reserve_self() since __pa() does
207 * not work for DTB pointers that are fixmap addresses
208 */
209 memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
210
Anup Patel0651c262019-02-21 11:25:49 +0530211 early_init_fdt_scan_reserved_mem();
Kefeng Wangda815582020-10-31 14:01:12 +0800212 dma_contiguous_reserve(dma32_phys_limit);
Anup Patel0651c262019-02-21 11:25:49 +0530213 memblock_allow_resize();
214 memblock_dump_all();
Anup Patel0651c262019-02-21 11:25:49 +0530215}
Anup Patel6f1e9e92019-02-13 16:38:36 +0530216
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100217#ifdef CONFIG_MMU
Atish Patrae8dcb612020-09-17 15:37:12 -0700218static struct pt_alloc_ops pt_ops;
219
Anup Patel387181d2019-03-26 08:03:47 +0000220unsigned long va_pa_offset;
221EXPORT_SYMBOL(va_pa_offset);
222unsigned long pfn_base;
223EXPORT_SYMBOL(pfn_base);
224
Anup Patel6f1e9e92019-02-13 16:38:36 +0530225pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700226pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patelf2c17aa2019-01-07 20:57:01 +0530227pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700228
229#define MAX_EARLY_MAPPING_SIZE SZ_128M
230
231pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530232
233void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
234{
235 unsigned long addr = __fix_to_virt(idx);
236 pte_t *ptep;
237
238 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
239
240 ptep = &fixmap_pte[pte_index(addr)];
241
Greentime Hu21190b72020-08-04 11:02:05 +0800242 if (pgprot_val(prot))
Anup Patelf2c17aa2019-01-07 20:57:01 +0530243 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
Greentime Hu21190b72020-08-04 11:02:05 +0800244 else
Anup Patelf2c17aa2019-01-07 20:57:01 +0530245 pte_clear(&init_mm, addr, ptep);
Greentime Hu21190b72020-08-04 11:02:05 +0800246 local_flush_tlb_page(addr);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530247}
248
Atish Patrae8dcb612020-09-17 15:37:12 -0700249static inline pte_t *__init get_pte_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700250{
Atish Patrae8dcb612020-09-17 15:37:12 -0700251 return (pte_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700252}
253
Atish Patrae8dcb612020-09-17 15:37:12 -0700254static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa)
255{
256 clear_fixmap(FIX_PTE);
257 return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
258}
259
260static inline pte_t *get_pte_virt_late(phys_addr_t pa)
261{
262 return (pte_t *) __va(pa);
263}
264
265static inline phys_addr_t __init alloc_pte_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700266{
267 /*
268 * We only create PMD or PGD early mappings so we
269 * should never reach here with MMU disabled.
270 */
Atish Patrae8dcb612020-09-17 15:37:12 -0700271 BUG();
272}
Anup Patel671f9a32019-06-28 13:36:21 -0700273
Atish Patrae8dcb612020-09-17 15:37:12 -0700274static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va)
275{
Anup Patel671f9a32019-06-28 13:36:21 -0700276 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
277}
278
Atish Patrae8dcb612020-09-17 15:37:12 -0700279static phys_addr_t alloc_pte_late(uintptr_t va)
280{
281 unsigned long vaddr;
282
283 vaddr = __get_free_page(GFP_KERNEL);
284 if (!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr)))
285 BUG();
286 return __pa(vaddr);
287}
288
Anup Patel671f9a32019-06-28 13:36:21 -0700289static void __init create_pte_mapping(pte_t *ptep,
290 uintptr_t va, phys_addr_t pa,
291 phys_addr_t sz, pgprot_t prot)
292{
Mike Rapoport974b9b22020-06-08 21:33:10 -0700293 uintptr_t pte_idx = pte_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700294
295 BUG_ON(sz != PAGE_SIZE);
296
Mike Rapoport974b9b22020-06-08 21:33:10 -0700297 if (pte_none(ptep[pte_idx]))
298 ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700299}
300
301#ifndef __PAGETABLE_PMD_FOLDED
302
303pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
304pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
305
306#if MAX_EARLY_MAPPING_SIZE < PGDIR_SIZE
307#define NUM_EARLY_PMDS 1UL
308#else
309#define NUM_EARLY_PMDS (1UL + MAX_EARLY_MAPPING_SIZE / PGDIR_SIZE)
310#endif
311pmd_t early_pmd[PTRS_PER_PMD * NUM_EARLY_PMDS] __initdata __aligned(PAGE_SIZE);
Anup Patel1074dd42020-11-04 12:07:13 +0530312pmd_t early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
Anup Patel671f9a32019-06-28 13:36:21 -0700313
Atish Patrae8dcb612020-09-17 15:37:12 -0700314static pmd_t *__init get_pmd_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700315{
Atish Patrae8dcb612020-09-17 15:37:12 -0700316 /* Before MMU is enabled */
317 return (pmd_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700318}
319
Atish Patrae8dcb612020-09-17 15:37:12 -0700320static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa)
321{
322 clear_fixmap(FIX_PMD);
323 return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
324}
325
326static pmd_t *get_pmd_virt_late(phys_addr_t pa)
327{
328 return (pmd_t *) __va(pa);
329}
330
331static phys_addr_t __init alloc_pmd_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700332{
333 uintptr_t pmd_num;
334
Anup Patel671f9a32019-06-28 13:36:21 -0700335 pmd_num = (va - PAGE_OFFSET) >> PGDIR_SHIFT;
336 BUG_ON(pmd_num >= NUM_EARLY_PMDS);
337 return (uintptr_t)&early_pmd[pmd_num * PTRS_PER_PMD];
338}
339
Atish Patrae8dcb612020-09-17 15:37:12 -0700340static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va)
341{
342 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
343}
344
345static phys_addr_t alloc_pmd_late(uintptr_t va)
346{
347 unsigned long vaddr;
348
349 vaddr = __get_free_page(GFP_KERNEL);
350 BUG_ON(!vaddr);
351 return __pa(vaddr);
352}
353
Anup Patel671f9a32019-06-28 13:36:21 -0700354static void __init create_pmd_mapping(pmd_t *pmdp,
355 uintptr_t va, phys_addr_t pa,
356 phys_addr_t sz, pgprot_t prot)
357{
358 pte_t *ptep;
359 phys_addr_t pte_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700360 uintptr_t pmd_idx = pmd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700361
362 if (sz == PMD_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700363 if (pmd_none(pmdp[pmd_idx]))
364 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700365 return;
366 }
367
Mike Rapoport974b9b22020-06-08 21:33:10 -0700368 if (pmd_none(pmdp[pmd_idx])) {
Atish Patrae8dcb612020-09-17 15:37:12 -0700369 pte_phys = pt_ops.alloc_pte(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700370 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
Atish Patrae8dcb612020-09-17 15:37:12 -0700371 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700372 memset(ptep, 0, PAGE_SIZE);
373 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700374 pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
Atish Patrae8dcb612020-09-17 15:37:12 -0700375 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700376 }
377
378 create_pte_mapping(ptep, va, pa, sz, prot);
379}
380
381#define pgd_next_t pmd_t
Atish Patrae8dcb612020-09-17 15:37:12 -0700382#define alloc_pgd_next(__va) pt_ops.alloc_pmd(__va)
383#define get_pgd_next_virt(__pa) pt_ops.get_pmd_virt(__pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700384#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
385 create_pmd_mapping(__nextp, __va, __pa, __sz, __prot)
Anup Patel671f9a32019-06-28 13:36:21 -0700386#define fixmap_pgd_next fixmap_pmd
387#else
388#define pgd_next_t pte_t
Atish Patrae8dcb612020-09-17 15:37:12 -0700389#define alloc_pgd_next(__va) pt_ops.alloc_pte(__va)
390#define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700391#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
392 create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
Anup Patel671f9a32019-06-28 13:36:21 -0700393#define fixmap_pgd_next fixmap_pte
394#endif
395
Atish Patrab91540d2020-09-17 15:37:15 -0700396void __init create_pgd_mapping(pgd_t *pgdp,
Anup Patel671f9a32019-06-28 13:36:21 -0700397 uintptr_t va, phys_addr_t pa,
398 phys_addr_t sz, pgprot_t prot)
399{
400 pgd_next_t *nextp;
401 phys_addr_t next_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700402 uintptr_t pgd_idx = pgd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700403
404 if (sz == PGDIR_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700405 if (pgd_val(pgdp[pgd_idx]) == 0)
406 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700407 return;
408 }
409
Mike Rapoport974b9b22020-06-08 21:33:10 -0700410 if (pgd_val(pgdp[pgd_idx]) == 0) {
Anup Patel671f9a32019-06-28 13:36:21 -0700411 next_phys = alloc_pgd_next(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700412 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700413 nextp = get_pgd_next_virt(next_phys);
414 memset(nextp, 0, PAGE_SIZE);
415 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700416 next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
Anup Patel671f9a32019-06-28 13:36:21 -0700417 nextp = get_pgd_next_virt(next_phys);
418 }
419
420 create_pgd_next_mapping(nextp, va, pa, sz, prot);
421}
422
423static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
424{
Zong Li0fdc6362019-11-08 01:00:40 -0800425 /* Upgrade to PMD_SIZE mappings whenever possible */
426 if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
427 return PAGE_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700428
Zong Li0fdc6362019-11-08 01:00:40 -0800429 return PMD_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700430}
431
Anup Patel387181d2019-03-26 08:03:47 +0000432/*
433 * setup_vm() is called from head.S with MMU-off.
434 *
435 * Following requirements should be honoured for setup_vm() to work
436 * correctly:
437 * 1) It should use PC-relative addressing for accessing kernel symbols.
438 * To achieve this we always use GCC cmodel=medany.
439 * 2) The compiler instrumentation for FTRACE will not work for setup_vm()
440 * so disable compiler instrumentation when FTRACE is enabled.
441 *
442 * Currently, the above requirements are honoured by using custom CFLAGS
443 * for init.o in mm/Makefile.
444 */
445
446#ifndef __riscv_cmodel_medany
Paul Walmsley6a527b62019-10-17 14:45:58 -0700447#error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
Anup Patel387181d2019-03-26 08:03:47 +0000448#endif
449
Anup Patel671f9a32019-06-28 13:36:21 -0700450asmlinkage void __init setup_vm(uintptr_t dtb_pa)
Anup Patel6f1e9e92019-02-13 16:38:36 +0530451{
Anup Patel8f3a2b42020-09-17 15:37:10 -0700452 uintptr_t va, pa, end_va;
Anup Patel671f9a32019-06-28 13:36:21 -0700453 uintptr_t load_pa = (uintptr_t)(&_start);
454 uintptr_t load_sz = (uintptr_t)(&_end) - load_pa;
455 uintptr_t map_size = best_map_size(load_pa, MAX_EARLY_MAPPING_SIZE);
Atish Patra6262f662020-09-17 15:37:11 -0700456#ifndef __PAGETABLE_PMD_FOLDED
457 pmd_t fix_bmap_spmd, fix_bmap_epmd;
458#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530459
Anup Patel671f9a32019-06-28 13:36:21 -0700460 va_pa_offset = PAGE_OFFSET - load_pa;
461 pfn_base = PFN_DOWN(load_pa);
462
463 /*
464 * Enforce boot alignment requirements of RV32 and
465 * RV64 by only allowing PMD or PGD mappings.
466 */
467 BUG_ON(map_size == PAGE_SIZE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530468
469 /* Sanity check alignment and size */
470 BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
Anup Patel671f9a32019-06-28 13:36:21 -0700471 BUG_ON((load_pa % map_size) != 0);
472 BUG_ON(load_sz > MAX_EARLY_MAPPING_SIZE);
473
Atish Patrae8dcb612020-09-17 15:37:12 -0700474 pt_ops.alloc_pte = alloc_pte_early;
475 pt_ops.get_pte_virt = get_pte_virt_early;
476#ifndef __PAGETABLE_PMD_FOLDED
477 pt_ops.alloc_pmd = alloc_pmd_early;
478 pt_ops.get_pmd_virt = get_pmd_virt_early;
479#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700480 /* Setup early PGD for fixmap */
481 create_pgd_mapping(early_pg_dir, FIXADDR_START,
482 (uintptr_t)fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530483
484#ifndef __PAGETABLE_PMD_FOLDED
Anup Patel671f9a32019-06-28 13:36:21 -0700485 /* Setup fixmap PMD */
486 create_pmd_mapping(fixmap_pmd, FIXADDR_START,
487 (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
488 /* Setup trampoline PGD and PMD */
489 create_pgd_mapping(trampoline_pg_dir, PAGE_OFFSET,
490 (uintptr_t)trampoline_pmd, PGDIR_SIZE, PAGE_TABLE);
491 create_pmd_mapping(trampoline_pmd, PAGE_OFFSET,
492 load_pa, PMD_SIZE, PAGE_KERNEL_EXEC);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530493#else
Anup Patel671f9a32019-06-28 13:36:21 -0700494 /* Setup trampoline PGD */
495 create_pgd_mapping(trampoline_pg_dir, PAGE_OFFSET,
496 load_pa, PGDIR_SIZE, PAGE_KERNEL_EXEC);
497#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530498
Anup Patel671f9a32019-06-28 13:36:21 -0700499 /*
500 * Setup early PGD covering entire kernel which will allows
501 * us to reach paging_init(). We map all memory banks later
502 * in setup_vm_final() below.
503 */
504 end_va = PAGE_OFFSET + load_sz;
505 for (va = PAGE_OFFSET; va < end_va; va += map_size)
506 create_pgd_mapping(early_pg_dir, va,
507 load_pa + (va - PAGE_OFFSET),
508 map_size, PAGE_KERNEL_EXEC);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530509
Anup Patel1074dd42020-11-04 12:07:13 +0530510#ifndef __PAGETABLE_PMD_FOLDED
511 /* Setup early PMD for DTB */
512 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
513 (uintptr_t)early_dtb_pmd, PGDIR_SIZE, PAGE_TABLE);
514 /* Create two consecutive PMD mappings for FDT early scan */
515 pa = dtb_pa & ~(PMD_SIZE - 1);
516 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA,
517 pa, PMD_SIZE, PAGE_KERNEL);
518 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE,
519 pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
520 dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1));
521#else
Anup Patel8f3a2b42020-09-17 15:37:10 -0700522 /* Create two consecutive PGD mappings for FDT early scan */
523 pa = dtb_pa & ~(PGDIR_SIZE - 1);
524 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
525 pa, PGDIR_SIZE, PAGE_KERNEL);
526 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA + PGDIR_SIZE,
527 pa + PGDIR_SIZE, PGDIR_SIZE, PAGE_KERNEL);
528 dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PGDIR_SIZE - 1));
Anup Patel1074dd42020-11-04 12:07:13 +0530529#endif
Albert Ou922b0372019-09-27 16:14:18 -0700530 dtb_early_pa = dtb_pa;
Atish Patra6262f662020-09-17 15:37:11 -0700531
532 /*
533 * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
534 * range can not span multiple pmds.
535 */
536 BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
537 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
538
539#ifndef __PAGETABLE_PMD_FOLDED
540 /*
541 * Early ioremap fixmap is already created as it lies within first 2MB
542 * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END
543 * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn
544 * the user if not.
545 */
546 fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))];
547 fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))];
548 if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) {
549 WARN_ON(1);
550 pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n",
551 pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd));
552 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
553 fix_to_virt(FIX_BTMAP_BEGIN));
554 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
555 fix_to_virt(FIX_BTMAP_END));
556
557 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
558 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
559 }
560#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700561}
562
563static void __init setup_vm_final(void)
564{
565 uintptr_t va, map_size;
566 phys_addr_t pa, start, end;
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700567 u64 i;
Anup Patel671f9a32019-06-28 13:36:21 -0700568
Atish Patrae8dcb612020-09-17 15:37:12 -0700569 /**
570 * MMU is enabled at this point. But page table setup is not complete yet.
571 * fixmap page table alloc functions should be used at this point
572 */
573 pt_ops.alloc_pte = alloc_pte_fixmap;
574 pt_ops.get_pte_virt = get_pte_virt_fixmap;
575#ifndef __PAGETABLE_PMD_FOLDED
576 pt_ops.alloc_pmd = alloc_pmd_fixmap;
577 pt_ops.get_pmd_virt = get_pmd_virt_fixmap;
578#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700579 /* Setup swapper PGD for fixmap */
580 create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
Zong Liac51e002020-01-02 11:12:40 +0800581 __pa_symbol(fixmap_pgd_next),
Anup Patel671f9a32019-06-28 13:36:21 -0700582 PGDIR_SIZE, PAGE_TABLE);
583
584 /* Map all memory banks */
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700585 for_each_mem_range(i, &start, &end) {
Anup Patel671f9a32019-06-28 13:36:21 -0700586 if (start >= end)
587 break;
Anup Patel671f9a32019-06-28 13:36:21 -0700588 if (start <= __pa(PAGE_OFFSET) &&
589 __pa(PAGE_OFFSET) < end)
590 start = __pa(PAGE_OFFSET);
591
592 map_size = best_map_size(start, end - start);
593 for (pa = start; pa < end; pa += map_size) {
594 va = (uintptr_t)__va(pa);
595 create_pgd_mapping(swapper_pg_dir, va, pa,
596 map_size, PAGE_KERNEL_EXEC);
597 }
Anup Patel6f1e9e92019-02-13 16:38:36 +0530598 }
Anup Patelf2c17aa2019-01-07 20:57:01 +0530599
Anup Patel671f9a32019-06-28 13:36:21 -0700600 /* Clear fixmap PTE and PMD mappings */
601 clear_fixmap(FIX_PTE);
602 clear_fixmap(FIX_PMD);
603
604 /* Move to swapper page table */
Zong Liac51e002020-01-02 11:12:40 +0800605 csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | SATP_MODE);
Anup Patel671f9a32019-06-28 13:36:21 -0700606 local_flush_tlb_all();
Atish Patrae8dcb612020-09-17 15:37:12 -0700607
608 /* generic page allocation functions must be used to setup page table */
609 pt_ops.alloc_pte = alloc_pte_late;
610 pt_ops.get_pte_virt = get_pte_virt_late;
611#ifndef __PAGETABLE_PMD_FOLDED
612 pt_ops.alloc_pmd = alloc_pmd_late;
613 pt_ops.get_pmd_virt = get_pmd_virt_late;
614#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700615}
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100616#else
617asmlinkage void __init setup_vm(uintptr_t dtb_pa)
618{
Palmer Dabbelt2d268252020-04-14 13:43:24 +0900619#ifdef CONFIG_BUILTIN_DTB
620 dtb_early_va = soc_lookup_builtin_dtb();
621 if (!dtb_early_va) {
622 /* Fallback to first available DTS */
623 dtb_early_va = (void *) __dtb_start;
624 }
625#else
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100626 dtb_early_va = (void *)dtb_pa;
Palmer Dabbelt2d268252020-04-14 13:43:24 +0900627#endif
Atish Patraa78c6f52020-10-01 12:04:56 -0700628 dtb_early_pa = dtb_pa;
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100629}
630
631static inline void setup_vm_final(void)
632{
633}
634#endif /* CONFIG_MMU */
Anup Patel671f9a32019-06-28 13:36:21 -0700635
Zong Lid27c3c92020-03-10 00:55:41 +0800636#ifdef CONFIG_STRICT_KERNEL_RWX
Atish Patra19a00862020-11-04 16:04:38 -0800637void protect_kernel_text_data(void)
Zong Lid27c3c92020-03-10 00:55:41 +0800638{
Atish Patra19a00862020-11-04 16:04:38 -0800639 unsigned long text_start = (unsigned long)_start;
640 unsigned long init_text_start = (unsigned long)__init_text_begin;
641 unsigned long init_data_start = (unsigned long)__init_data_begin;
Zong Lid27c3c92020-03-10 00:55:41 +0800642 unsigned long rodata_start = (unsigned long)__start_rodata;
643 unsigned long data_start = (unsigned long)_data;
644 unsigned long max_low = (unsigned long)(__va(PFN_PHYS(max_low_pfn)));
645
Atish Patra19a00862020-11-04 16:04:38 -0800646 set_memory_ro(text_start, (init_text_start - text_start) >> PAGE_SHIFT);
647 set_memory_ro(init_text_start, (init_data_start - init_text_start) >> PAGE_SHIFT);
648 set_memory_nx(init_data_start, (rodata_start - init_data_start) >> PAGE_SHIFT);
649 /* rodata section is marked readonly in mark_rodata_ro */
Zong Lid27c3c92020-03-10 00:55:41 +0800650 set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
651 set_memory_nx(data_start, (max_low - data_start) >> PAGE_SHIFT);
Atish Patra19a00862020-11-04 16:04:38 -0800652}
653
654void mark_rodata_ro(void)
655{
656 unsigned long rodata_start = (unsigned long)__start_rodata;
657 unsigned long data_start = (unsigned long)_data;
658
659 set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
Zong Lib422d282020-06-03 16:03:55 -0700660
661 debug_checkwx();
Zong Lid27c3c92020-03-10 00:55:41 +0800662}
663#endif
664
Anup Patel671f9a32019-06-28 13:36:21 -0700665void __init paging_init(void)
666{
667 setup_vm_final();
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600668 sparse_init();
Anup Patel671f9a32019-06-28 13:36:21 -0700669 setup_zero_page();
670 zone_sizes_init();
Anup Patel6f1e9e92019-02-13 16:38:36 +0530671}
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600672
Kefeng Wang9fe57d82019-10-23 11:23:02 +0800673#ifdef CONFIG_SPARSEMEM_VMEMMAP
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600674int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
675 struct vmem_altmap *altmap)
676{
Anshuman Khandual1d9cfee2020-08-06 23:23:19 -0700677 return vmemmap_populate_basepages(start, end, node, NULL);
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600678}
679#endif