blob: 1e8c3e24e0c4873640f067fd3247db8bdf69ac9b [file] [log] [blame]
Thomas Gleixner50acfb22019-05-29 07:18:00 -07001// SPDX-License-Identifier: GPL-2.0-only
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07002/*
3 * Copyright (C) 2012 Regents of the University of California
Anup Patel671f9a32019-06-28 13:36:21 -07004 * Copyright (C) 2019 Western Digital Corporation or its affiliates.
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07005 */
6
7#include <linux/init.h>
8#include <linux/mm.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07009#include <linux/memblock.h>
Mike Rapoport57c8a662018-10-30 15:09:49 -070010#include <linux/initrd.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070011#include <linux/swap.h>
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010012#include <linux/sizes.h>
Anup Patel0651c262019-02-21 11:25:49 +053013#include <linux/of_fdt.h>
Albert Ou922b0372019-09-27 16:14:18 -070014#include <linux/libfdt.h>
Zong Lid27c3c92020-03-10 00:55:41 +080015#include <linux/set_memory.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070016
Anup Patelf2c17aa2019-01-07 20:57:01 +053017#include <asm/fixmap.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070018#include <asm/tlbflush.h>
19#include <asm/sections.h>
Palmer Dabbelt2d268252020-04-14 13:43:24 +090020#include <asm/soc.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070021#include <asm/io.h>
Zong Lib422d282020-06-03 16:03:55 -070022#include <asm/ptdump.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070023
Paul Walmsleyffaee272019-10-17 15:00:17 -070024#include "../kernel/head.h"
25
Anup Patel387181d2019-03-26 08:03:47 +000026unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
27 __page_aligned_bss;
28EXPORT_SYMBOL(empty_zero_page);
29
Anup Pateld90d45d2019-06-07 06:01:29 +000030extern char _start[];
Christoph Hellwig6bd33e12019-10-28 13:10:41 +010031void *dtb_early_va;
Anup Pateld90d45d2019-06-07 06:01:29 +000032
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070033static void __init zone_sizes_init(void)
34{
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010035 unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070036
Zong Lid5fad482018-06-25 16:49:37 +080037#ifdef CONFIG_ZONE_DMA32
Guo Ren28198c42019-01-12 16:16:27 +080038 max_zone_pfns[ZONE_DMA32] = PFN_DOWN(min(4UL * SZ_1G,
39 (unsigned long) PFN_PHYS(max_low_pfn)));
Zong Lid5fad482018-06-25 16:49:37 +080040#endif
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010041 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
42
Mike Rapoport9691a072020-06-03 15:57:10 -070043 free_area_init(max_zone_pfns);
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070044}
45
Christoph Hellwig6bd33e12019-10-28 13:10:41 +010046static void setup_zero_page(void)
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070047{
48 memset((void *)empty_zero_page, 0, PAGE_SIZE);
49}
50
Kefeng Wang8fa3cdf2020-05-14 19:53:35 +080051#if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000052static inline void print_mlk(char *name, unsigned long b, unsigned long t)
53{
54 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t,
55 (((t) - (b)) >> 10));
56}
57
58static inline void print_mlm(char *name, unsigned long b, unsigned long t)
59{
60 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t,
61 (((t) - (b)) >> 20));
62}
63
64static void print_vm_layout(void)
65{
66 pr_notice("Virtual kernel memory layout:\n");
67 print_mlk("fixmap", (unsigned long)FIXADDR_START,
68 (unsigned long)FIXADDR_TOP);
69 print_mlm("pci io", (unsigned long)PCI_IO_START,
70 (unsigned long)PCI_IO_END);
71 print_mlm("vmemmap", (unsigned long)VMEMMAP_START,
72 (unsigned long)VMEMMAP_END);
73 print_mlm("vmalloc", (unsigned long)VMALLOC_START,
74 (unsigned long)VMALLOC_END);
75 print_mlm("lowmem", (unsigned long)PAGE_OFFSET,
76 (unsigned long)high_memory);
77}
78#else
79static void print_vm_layout(void) { }
80#endif /* CONFIG_DEBUG_VM */
81
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070082void __init mem_init(void)
83{
84#ifdef CONFIG_FLATMEM
85 BUG_ON(!mem_map);
86#endif /* CONFIG_FLATMEM */
87
88 high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
Mike Rapoportc6ffc5c2018-10-30 15:09:30 -070089 memblock_free_all();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070090
91 mem_init_print_info(NULL);
Yash Shah2cc6c4a2019-11-18 05:58:34 +000092 print_vm_layout();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070093}
94
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070095#ifdef CONFIG_BLK_DEV_INITRD
Anup Patel0651c262019-02-21 11:25:49 +053096static void __init setup_initrd(void)
97{
Atish Patra44002312020-07-15 16:30:08 -070098 phys_addr_t start;
Anup Patel0651c262019-02-21 11:25:49 +053099 unsigned long size;
100
Atish Patra44002312020-07-15 16:30:08 -0700101 /* Ignore the virtul address computed during device tree parsing */
102 initrd_start = initrd_end = 0;
103
104 if (!phys_initrd_size)
105 return;
106 /*
107 * Round the memory region to page boundaries as per free_initrd_mem()
108 * This allows us to detect whether the pages overlapping the initrd
109 * are in use, but more importantly, reserves the entire set of pages
110 * as we don't want these pages allocated for other purposes.
111 */
112 start = round_down(phys_initrd_start, PAGE_SIZE);
113 size = phys_initrd_size + (phys_initrd_start - start);
114 size = round_up(size, PAGE_SIZE);
115
116 if (!memblock_is_region_memory(start, size)) {
117 pr_err("INITRD: 0x%08llx+0x%08lx is not a memory region",
118 (u64)start, size);
Anup Patel0651c262019-02-21 11:25:49 +0530119 goto disable;
120 }
121
Atish Patra44002312020-07-15 16:30:08 -0700122 if (memblock_is_region_reserved(start, size)) {
123 pr_err("INITRD: 0x%08llx+0x%08lx overlaps in-use memory region\n",
124 (u64)start, size);
125 goto disable;
126 }
127
128 memblock_reserve(start, size);
129 /* Now convert initrd to virtual addresses */
130 initrd_start = (unsigned long)__va(phys_initrd_start);
131 initrd_end = initrd_start + phys_initrd_size;
Anup Patel0651c262019-02-21 11:25:49 +0530132 initrd_below_start_ok = 1;
133
134 pr_info("Initial ramdisk at: 0x%p (%lu bytes)\n",
135 (void *)(initrd_start), size);
136 return;
137disable:
138 pr_cont(" - disabling initrd\n");
139 initrd_start = 0;
140 initrd_end = 0;
141}
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700142#endif /* CONFIG_BLK_DEV_INITRD */
Anup Patel0651c262019-02-21 11:25:49 +0530143
Albert Ou922b0372019-09-27 16:14:18 -0700144static phys_addr_t dtb_early_pa __initdata;
145
Anup Patel0651c262019-02-21 11:25:49 +0530146void __init setup_bootmem(void)
147{
Anup Patel0651c262019-02-21 11:25:49 +0530148 phys_addr_t mem_size = 0;
Atish Patrafa5a1982020-07-15 16:30:09 -0700149 phys_addr_t total_mem = 0;
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700150 phys_addr_t mem_start, start, end = 0;
Zong Liac51e002020-01-02 11:12:40 +0800151 phys_addr_t vmlinux_end = __pa_symbol(&_end);
152 phys_addr_t vmlinux_start = __pa_symbol(&_start);
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700153 u64 i;
Anup Patel0651c262019-02-21 11:25:49 +0530154
155 /* Find the memory region containing the kernel */
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700156 for_each_mem_range(i, &start, &end) {
157 phys_addr_t size = end - start;
Atish Patrafa5a1982020-07-15 16:30:09 -0700158 if (!total_mem)
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700159 mem_start = start;
160 if (start <= vmlinux_start && vmlinux_end <= end)
161 BUG_ON(size == 0);
162 total_mem = total_mem + size;
Anup Patel0651c262019-02-21 11:25:49 +0530163 }
Atish Patrafa5a1982020-07-15 16:30:09 -0700164
165 /*
166 * Remove memblock from the end of usable area to the
167 * end of region
168 */
169 mem_size = min(total_mem, (phys_addr_t)-PAGE_OFFSET);
170 if (mem_start + mem_size < end)
171 memblock_remove(mem_start + mem_size,
172 end - mem_start - mem_size);
Anup Patel0651c262019-02-21 11:25:49 +0530173
Anup Pateld90d45d2019-06-07 06:01:29 +0000174 /* Reserve from the start of the kernel to the end of the kernel */
175 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
176
Vincent Chenc749bb22020-04-27 14:59:24 +0800177 max_pfn = PFN_DOWN(memblock_end_of_DRAM());
178 max_low_pfn = max_pfn;
Atish Patrad0d8aae2020-07-15 16:30:07 -0700179 set_max_mapnr(max_low_pfn);
Anup Patel0651c262019-02-21 11:25:49 +0530180
181#ifdef CONFIG_BLK_DEV_INITRD
182 setup_initrd();
183#endif /* CONFIG_BLK_DEV_INITRD */
184
Albert Ou922b0372019-09-27 16:14:18 -0700185 /*
186 * Avoid using early_init_fdt_reserve_self() since __pa() does
187 * not work for DTB pointers that are fixmap addresses
188 */
189 memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
190
Anup Patel0651c262019-02-21 11:25:49 +0530191 early_init_fdt_scan_reserved_mem();
192 memblock_allow_resize();
193 memblock_dump_all();
Anup Patel0651c262019-02-21 11:25:49 +0530194}
Anup Patel6f1e9e92019-02-13 16:38:36 +0530195
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100196#ifdef CONFIG_MMU
Anup Patel387181d2019-03-26 08:03:47 +0000197unsigned long va_pa_offset;
198EXPORT_SYMBOL(va_pa_offset);
199unsigned long pfn_base;
200EXPORT_SYMBOL(pfn_base);
201
Anup Patel6f1e9e92019-02-13 16:38:36 +0530202pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700203pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patelf2c17aa2019-01-07 20:57:01 +0530204pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700205static bool mmu_enabled;
206
207#define MAX_EARLY_MAPPING_SIZE SZ_128M
208
209pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530210
211void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
212{
213 unsigned long addr = __fix_to_virt(idx);
214 pte_t *ptep;
215
216 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
217
218 ptep = &fixmap_pte[pte_index(addr)];
219
Greentime Hu21190b72020-08-04 11:02:05 +0800220 if (pgprot_val(prot))
Anup Patelf2c17aa2019-01-07 20:57:01 +0530221 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
Greentime Hu21190b72020-08-04 11:02:05 +0800222 else
Anup Patelf2c17aa2019-01-07 20:57:01 +0530223 pte_clear(&init_mm, addr, ptep);
Greentime Hu21190b72020-08-04 11:02:05 +0800224 local_flush_tlb_page(addr);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530225}
226
Anup Patel671f9a32019-06-28 13:36:21 -0700227static pte_t *__init get_pte_virt(phys_addr_t pa)
228{
229 if (mmu_enabled) {
230 clear_fixmap(FIX_PTE);
231 return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
232 } else {
233 return (pte_t *)((uintptr_t)pa);
234 }
235}
236
237static phys_addr_t __init alloc_pte(uintptr_t va)
238{
239 /*
240 * We only create PMD or PGD early mappings so we
241 * should never reach here with MMU disabled.
242 */
243 BUG_ON(!mmu_enabled);
244
245 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
246}
247
248static void __init create_pte_mapping(pte_t *ptep,
249 uintptr_t va, phys_addr_t pa,
250 phys_addr_t sz, pgprot_t prot)
251{
Mike Rapoport974b9b22020-06-08 21:33:10 -0700252 uintptr_t pte_idx = pte_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700253
254 BUG_ON(sz != PAGE_SIZE);
255
Mike Rapoport974b9b22020-06-08 21:33:10 -0700256 if (pte_none(ptep[pte_idx]))
257 ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700258}
259
260#ifndef __PAGETABLE_PMD_FOLDED
261
262pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
263pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
264
265#if MAX_EARLY_MAPPING_SIZE < PGDIR_SIZE
266#define NUM_EARLY_PMDS 1UL
267#else
268#define NUM_EARLY_PMDS (1UL + MAX_EARLY_MAPPING_SIZE / PGDIR_SIZE)
269#endif
270pmd_t early_pmd[PTRS_PER_PMD * NUM_EARLY_PMDS] __initdata __aligned(PAGE_SIZE);
271
272static pmd_t *__init get_pmd_virt(phys_addr_t pa)
273{
274 if (mmu_enabled) {
275 clear_fixmap(FIX_PMD);
276 return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
277 } else {
278 return (pmd_t *)((uintptr_t)pa);
279 }
280}
281
282static phys_addr_t __init alloc_pmd(uintptr_t va)
283{
284 uintptr_t pmd_num;
285
286 if (mmu_enabled)
287 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
288
289 pmd_num = (va - PAGE_OFFSET) >> PGDIR_SHIFT;
290 BUG_ON(pmd_num >= NUM_EARLY_PMDS);
291 return (uintptr_t)&early_pmd[pmd_num * PTRS_PER_PMD];
292}
293
294static void __init create_pmd_mapping(pmd_t *pmdp,
295 uintptr_t va, phys_addr_t pa,
296 phys_addr_t sz, pgprot_t prot)
297{
298 pte_t *ptep;
299 phys_addr_t pte_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700300 uintptr_t pmd_idx = pmd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700301
302 if (sz == PMD_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700303 if (pmd_none(pmdp[pmd_idx]))
304 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700305 return;
306 }
307
Mike Rapoport974b9b22020-06-08 21:33:10 -0700308 if (pmd_none(pmdp[pmd_idx])) {
Anup Patel671f9a32019-06-28 13:36:21 -0700309 pte_phys = alloc_pte(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700310 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700311 ptep = get_pte_virt(pte_phys);
312 memset(ptep, 0, PAGE_SIZE);
313 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700314 pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
Anup Patel671f9a32019-06-28 13:36:21 -0700315 ptep = get_pte_virt(pte_phys);
316 }
317
318 create_pte_mapping(ptep, va, pa, sz, prot);
319}
320
321#define pgd_next_t pmd_t
322#define alloc_pgd_next(__va) alloc_pmd(__va)
323#define get_pgd_next_virt(__pa) get_pmd_virt(__pa)
324#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
325 create_pmd_mapping(__nextp, __va, __pa, __sz, __prot)
Anup Patel671f9a32019-06-28 13:36:21 -0700326#define fixmap_pgd_next fixmap_pmd
327#else
328#define pgd_next_t pte_t
329#define alloc_pgd_next(__va) alloc_pte(__va)
330#define get_pgd_next_virt(__pa) get_pte_virt(__pa)
331#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
332 create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
Anup Patel671f9a32019-06-28 13:36:21 -0700333#define fixmap_pgd_next fixmap_pte
334#endif
335
336static void __init create_pgd_mapping(pgd_t *pgdp,
337 uintptr_t va, phys_addr_t pa,
338 phys_addr_t sz, pgprot_t prot)
339{
340 pgd_next_t *nextp;
341 phys_addr_t next_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700342 uintptr_t pgd_idx = pgd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700343
344 if (sz == PGDIR_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700345 if (pgd_val(pgdp[pgd_idx]) == 0)
346 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700347 return;
348 }
349
Mike Rapoport974b9b22020-06-08 21:33:10 -0700350 if (pgd_val(pgdp[pgd_idx]) == 0) {
Anup Patel671f9a32019-06-28 13:36:21 -0700351 next_phys = alloc_pgd_next(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700352 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700353 nextp = get_pgd_next_virt(next_phys);
354 memset(nextp, 0, PAGE_SIZE);
355 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700356 next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
Anup Patel671f9a32019-06-28 13:36:21 -0700357 nextp = get_pgd_next_virt(next_phys);
358 }
359
360 create_pgd_next_mapping(nextp, va, pa, sz, prot);
361}
362
363static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
364{
Zong Li0fdc6362019-11-08 01:00:40 -0800365 /* Upgrade to PMD_SIZE mappings whenever possible */
366 if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
367 return PAGE_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700368
Zong Li0fdc6362019-11-08 01:00:40 -0800369 return PMD_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700370}
371
Anup Patel387181d2019-03-26 08:03:47 +0000372/*
373 * setup_vm() is called from head.S with MMU-off.
374 *
375 * Following requirements should be honoured for setup_vm() to work
376 * correctly:
377 * 1) It should use PC-relative addressing for accessing kernel symbols.
378 * To achieve this we always use GCC cmodel=medany.
379 * 2) The compiler instrumentation for FTRACE will not work for setup_vm()
380 * so disable compiler instrumentation when FTRACE is enabled.
381 *
382 * Currently, the above requirements are honoured by using custom CFLAGS
383 * for init.o in mm/Makefile.
384 */
385
386#ifndef __riscv_cmodel_medany
Paul Walmsley6a527b62019-10-17 14:45:58 -0700387#error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
Anup Patel387181d2019-03-26 08:03:47 +0000388#endif
389
Anup Patel671f9a32019-06-28 13:36:21 -0700390asmlinkage void __init setup_vm(uintptr_t dtb_pa)
Anup Patel6f1e9e92019-02-13 16:38:36 +0530391{
Anup Patel671f9a32019-06-28 13:36:21 -0700392 uintptr_t va, end_va;
393 uintptr_t load_pa = (uintptr_t)(&_start);
394 uintptr_t load_sz = (uintptr_t)(&_end) - load_pa;
395 uintptr_t map_size = best_map_size(load_pa, MAX_EARLY_MAPPING_SIZE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530396
Anup Patel671f9a32019-06-28 13:36:21 -0700397 va_pa_offset = PAGE_OFFSET - load_pa;
398 pfn_base = PFN_DOWN(load_pa);
399
400 /*
401 * Enforce boot alignment requirements of RV32 and
402 * RV64 by only allowing PMD or PGD mappings.
403 */
404 BUG_ON(map_size == PAGE_SIZE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530405
406 /* Sanity check alignment and size */
407 BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
Anup Patel671f9a32019-06-28 13:36:21 -0700408 BUG_ON((load_pa % map_size) != 0);
409 BUG_ON(load_sz > MAX_EARLY_MAPPING_SIZE);
410
411 /* Setup early PGD for fixmap */
412 create_pgd_mapping(early_pg_dir, FIXADDR_START,
413 (uintptr_t)fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530414
415#ifndef __PAGETABLE_PMD_FOLDED
Anup Patel671f9a32019-06-28 13:36:21 -0700416 /* Setup fixmap PMD */
417 create_pmd_mapping(fixmap_pmd, FIXADDR_START,
418 (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
419 /* Setup trampoline PGD and PMD */
420 create_pgd_mapping(trampoline_pg_dir, PAGE_OFFSET,
421 (uintptr_t)trampoline_pmd, PGDIR_SIZE, PAGE_TABLE);
422 create_pmd_mapping(trampoline_pmd, PAGE_OFFSET,
423 load_pa, PMD_SIZE, PAGE_KERNEL_EXEC);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530424#else
Anup Patel671f9a32019-06-28 13:36:21 -0700425 /* Setup trampoline PGD */
426 create_pgd_mapping(trampoline_pg_dir, PAGE_OFFSET,
427 load_pa, PGDIR_SIZE, PAGE_KERNEL_EXEC);
428#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530429
Anup Patel671f9a32019-06-28 13:36:21 -0700430 /*
431 * Setup early PGD covering entire kernel which will allows
432 * us to reach paging_init(). We map all memory banks later
433 * in setup_vm_final() below.
434 */
435 end_va = PAGE_OFFSET + load_sz;
436 for (va = PAGE_OFFSET; va < end_va; va += map_size)
437 create_pgd_mapping(early_pg_dir, va,
438 load_pa + (va - PAGE_OFFSET),
439 map_size, PAGE_KERNEL_EXEC);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530440
Anup Patel671f9a32019-06-28 13:36:21 -0700441 /* Create fixed mapping for early FDT parsing */
442 end_va = __fix_to_virt(FIX_FDT) + FIX_FDT_SIZE;
443 for (va = __fix_to_virt(FIX_FDT); va < end_va; va += PAGE_SIZE)
444 create_pte_mapping(fixmap_pte, va,
445 dtb_pa + (va - __fix_to_virt(FIX_FDT)),
446 PAGE_SIZE, PAGE_KERNEL);
447
448 /* Save pointer to DTB for early FDT parsing */
449 dtb_early_va = (void *)fix_to_virt(FIX_FDT) + (dtb_pa & ~PAGE_MASK);
Albert Ou922b0372019-09-27 16:14:18 -0700450 /* Save physical address for memblock reservation */
451 dtb_early_pa = dtb_pa;
Anup Patel671f9a32019-06-28 13:36:21 -0700452}
453
454static void __init setup_vm_final(void)
455{
456 uintptr_t va, map_size;
457 phys_addr_t pa, start, end;
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700458 u64 i;
Anup Patel671f9a32019-06-28 13:36:21 -0700459
460 /* Set mmu_enabled flag */
461 mmu_enabled = true;
462
463 /* Setup swapper PGD for fixmap */
464 create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
Zong Liac51e002020-01-02 11:12:40 +0800465 __pa_symbol(fixmap_pgd_next),
Anup Patel671f9a32019-06-28 13:36:21 -0700466 PGDIR_SIZE, PAGE_TABLE);
467
468 /* Map all memory banks */
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700469 for_each_mem_range(i, &start, &end) {
Anup Patel671f9a32019-06-28 13:36:21 -0700470 if (start >= end)
471 break;
Anup Patel671f9a32019-06-28 13:36:21 -0700472 if (start <= __pa(PAGE_OFFSET) &&
473 __pa(PAGE_OFFSET) < end)
474 start = __pa(PAGE_OFFSET);
475
476 map_size = best_map_size(start, end - start);
477 for (pa = start; pa < end; pa += map_size) {
478 va = (uintptr_t)__va(pa);
479 create_pgd_mapping(swapper_pg_dir, va, pa,
480 map_size, PAGE_KERNEL_EXEC);
481 }
Anup Patel6f1e9e92019-02-13 16:38:36 +0530482 }
Anup Patelf2c17aa2019-01-07 20:57:01 +0530483
Anup Patel671f9a32019-06-28 13:36:21 -0700484 /* Clear fixmap PTE and PMD mappings */
485 clear_fixmap(FIX_PTE);
486 clear_fixmap(FIX_PMD);
487
488 /* Move to swapper page table */
Zong Liac51e002020-01-02 11:12:40 +0800489 csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | SATP_MODE);
Anup Patel671f9a32019-06-28 13:36:21 -0700490 local_flush_tlb_all();
491}
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100492#else
493asmlinkage void __init setup_vm(uintptr_t dtb_pa)
494{
Palmer Dabbelt2d268252020-04-14 13:43:24 +0900495#ifdef CONFIG_BUILTIN_DTB
496 dtb_early_va = soc_lookup_builtin_dtb();
497 if (!dtb_early_va) {
498 /* Fallback to first available DTS */
499 dtb_early_va = (void *) __dtb_start;
500 }
501#else
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100502 dtb_early_va = (void *)dtb_pa;
Palmer Dabbelt2d268252020-04-14 13:43:24 +0900503#endif
Atish Patraa78c6f52020-10-01 12:04:56 -0700504 dtb_early_pa = dtb_pa;
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100505}
506
507static inline void setup_vm_final(void)
508{
509}
510#endif /* CONFIG_MMU */
Anup Patel671f9a32019-06-28 13:36:21 -0700511
Zong Lid27c3c92020-03-10 00:55:41 +0800512#ifdef CONFIG_STRICT_KERNEL_RWX
Zong Lid27c3c92020-03-10 00:55:41 +0800513void mark_rodata_ro(void)
514{
515 unsigned long text_start = (unsigned long)_text;
516 unsigned long text_end = (unsigned long)_etext;
517 unsigned long rodata_start = (unsigned long)__start_rodata;
518 unsigned long data_start = (unsigned long)_data;
519 unsigned long max_low = (unsigned long)(__va(PFN_PHYS(max_low_pfn)));
520
521 set_memory_ro(text_start, (text_end - text_start) >> PAGE_SHIFT);
522 set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
523 set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
524 set_memory_nx(data_start, (max_low - data_start) >> PAGE_SHIFT);
Zong Lib422d282020-06-03 16:03:55 -0700525
526 debug_checkwx();
Zong Lid27c3c92020-03-10 00:55:41 +0800527}
528#endif
529
Zong Lie3ef4d62020-07-16 14:15:26 +0800530static void __init resource_init(void)
Zong Li526fbae2020-06-16 15:45:46 +0800531{
532 struct memblock_region *region;
533
534 for_each_memblock(memory, region) {
535 struct resource *res;
536
537 res = memblock_alloc(sizeof(struct resource), SMP_CACHE_BYTES);
538 if (!res)
539 panic("%s: Failed to allocate %zu bytes\n", __func__,
540 sizeof(struct resource));
541
542 if (memblock_is_nomap(region)) {
543 res->name = "reserved";
544 res->flags = IORESOURCE_MEM;
545 } else {
546 res->name = "System RAM";
547 res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY;
548 }
549 res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
550 res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
551
552 request_resource(&iomem_resource, res);
553 }
554}
555
Anup Patel671f9a32019-06-28 13:36:21 -0700556void __init paging_init(void)
557{
558 setup_vm_final();
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600559 sparse_init();
Anup Patel671f9a32019-06-28 13:36:21 -0700560 setup_zero_page();
561 zone_sizes_init();
Zong Li526fbae2020-06-16 15:45:46 +0800562 resource_init();
Anup Patel6f1e9e92019-02-13 16:38:36 +0530563}
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600564
Kefeng Wang9fe57d82019-10-23 11:23:02 +0800565#ifdef CONFIG_SPARSEMEM_VMEMMAP
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600566int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
567 struct vmem_altmap *altmap)
568{
Anshuman Khandual1d9cfee2020-08-06 23:23:19 -0700569 return vmemmap_populate_basepages(start, end, node, NULL);
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600570}
571#endif