blob: 30b204546cebdf40745494b0c4172c6b3c192aa6 [file] [log] [blame]
Thomas Gleixner50acfb22019-05-29 07:18:00 -07001// SPDX-License-Identifier: GPL-2.0-only
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07002/*
3 * Copyright (C) 2012 Regents of the University of California
Anup Patel671f9a32019-06-28 13:36:21 -07004 * Copyright (C) 2019 Western Digital Corporation or its affiliates.
Nick Kossifidise53d2812021-04-19 03:55:38 +03005 * Copyright (C) 2020 FORTH-ICS/CARV
6 * Nick Kossifidis <mick@ics.forth.gr>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07007 */
8
9#include <linux/init.h>
10#include <linux/mm.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070011#include <linux/memblock.h>
Mike Rapoport57c8a662018-10-30 15:09:49 -070012#include <linux/initrd.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070013#include <linux/swap.h>
Kefeng Wangce3aca02021-06-02 16:55:16 +080014#include <linux/swiotlb.h>
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010015#include <linux/sizes.h>
Anup Patel0651c262019-02-21 11:25:49 +053016#include <linux/of_fdt.h>
Nick Kossifidis56409752021-04-19 03:55:39 +030017#include <linux/of_reserved_mem.h>
Albert Ou922b0372019-09-27 16:14:18 -070018#include <linux/libfdt.h>
Zong Lid27c3c92020-03-10 00:55:41 +080019#include <linux/set_memory.h>
Kefeng Wangda815582020-10-31 14:01:12 +080020#include <linux/dma-map-ops.h>
Nick Kossifidise53d2812021-04-19 03:55:38 +030021#include <linux/crash_dump.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070022
Anup Patelf2c17aa2019-01-07 20:57:01 +053023#include <asm/fixmap.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070024#include <asm/tlbflush.h>
25#include <asm/sections.h>
Palmer Dabbelt2d268252020-04-14 13:43:24 +090026#include <asm/soc.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070027#include <asm/io.h>
Zong Lib422d282020-06-03 16:03:55 -070028#include <asm/ptdump.h>
Atish Patra4f0e8ee2020-11-18 16:38:29 -080029#include <asm/numa.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070030
Paul Walmsleyffaee272019-10-17 15:00:17 -070031#include "../kernel/head.h"
32
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -040033unsigned long kernel_virt_addr = KERNEL_LINK_ADDR;
34EXPORT_SYMBOL(kernel_virt_addr);
Vitaly Wool44c92252021-04-13 02:35:14 -040035#ifdef CONFIG_XIP_KERNEL
36#define kernel_virt_addr (*((unsigned long *)XIP_FIXUP(&kernel_virt_addr)))
Kefeng Wang50bae952021-05-14 17:49:08 +080037extern char _xiprom[], _exiprom[];
Vitaly Wool44c92252021-04-13 02:35:14 -040038#endif
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -040039
Anup Patel387181d2019-03-26 08:03:47 +000040unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
41 __page_aligned_bss;
42EXPORT_SYMBOL(empty_zero_page);
43
Anup Pateld90d45d2019-06-07 06:01:29 +000044extern char _start[];
Anup Patel8f3a2b42020-09-17 15:37:10 -070045#define DTB_EARLY_BASE_VA PGDIR_SIZE
Vitaly Wool44c92252021-04-13 02:35:14 -040046void *_dtb_early_va __initdata;
47uintptr_t _dtb_early_pa __initdata;
Anup Pateld90d45d2019-06-07 06:01:29 +000048
Atish Patrae8dcb612020-09-17 15:37:12 -070049struct pt_alloc_ops {
50 pte_t *(*get_pte_virt)(phys_addr_t pa);
51 phys_addr_t (*alloc_pte)(uintptr_t va);
52#ifndef __PAGETABLE_PMD_FOLDED
53 pmd_t *(*get_pmd_virt)(phys_addr_t pa);
54 phys_addr_t (*alloc_pmd)(uintptr_t va);
55#endif
56};
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070057
Jisheng Zhang01062352021-05-16 21:15:56 +080058static phys_addr_t dma32_phys_limit __initdata;
Kefeng Wangda815582020-10-31 14:01:12 +080059
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070060static void __init zone_sizes_init(void)
61{
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010062 unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070063
Zong Lid5fad482018-06-25 16:49:37 +080064#ifdef CONFIG_ZONE_DMA32
Kefeng Wangda815582020-10-31 14:01:12 +080065 max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit);
Zong Lid5fad482018-06-25 16:49:37 +080066#endif
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010067 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
68
Mike Rapoport9691a072020-06-03 15:57:10 -070069 free_area_init(max_zone_pfns);
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070070}
71
Kefeng Wang8fa3cdf2020-05-14 19:53:35 +080072#if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000073static inline void print_mlk(char *name, unsigned long b, unsigned long t)
74{
75 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t,
76 (((t) - (b)) >> 10));
77}
78
79static inline void print_mlm(char *name, unsigned long b, unsigned long t)
80{
81 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t,
82 (((t) - (b)) >> 20));
83}
84
Jisheng Zhang19875012021-03-30 02:22:21 +080085static void __init print_vm_layout(void)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000086{
87 pr_notice("Virtual kernel memory layout:\n");
88 print_mlk("fixmap", (unsigned long)FIXADDR_START,
89 (unsigned long)FIXADDR_TOP);
90 print_mlm("pci io", (unsigned long)PCI_IO_START,
91 (unsigned long)PCI_IO_END);
92 print_mlm("vmemmap", (unsigned long)VMEMMAP_START,
93 (unsigned long)VMEMMAP_END);
94 print_mlm("vmalloc", (unsigned long)VMALLOC_START,
95 (unsigned long)VMALLOC_END);
96 print_mlm("lowmem", (unsigned long)PAGE_OFFSET,
97 (unsigned long)high_memory);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -040098#ifdef CONFIG_64BIT
99 print_mlm("kernel", (unsigned long)KERNEL_LINK_ADDR,
100 (unsigned long)ADDRESS_SPACE_END);
101#endif
Yash Shah2cc6c4a2019-11-18 05:58:34 +0000102}
103#else
104static void print_vm_layout(void) { }
105#endif /* CONFIG_DEBUG_VM */
106
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700107void __init mem_init(void)
108{
109#ifdef CONFIG_FLATMEM
110 BUG_ON(!mem_map);
111#endif /* CONFIG_FLATMEM */
112
Kefeng Wangce3aca02021-06-02 16:55:16 +0800113#ifdef CONFIG_SWIOTLB
114 if (swiotlb_force == SWIOTLB_FORCE ||
115 max_pfn > PFN_DOWN(dma32_phys_limit))
116 swiotlb_init(1);
117 else
118 swiotlb_force = SWIOTLB_NO_FORCE;
119#endif
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700120 high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
Mike Rapoportc6ffc5c2018-10-30 15:09:30 -0700121 memblock_free_all();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700122
Yash Shah2cc6c4a2019-11-18 05:58:34 +0000123 print_vm_layout();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700124}
125
Kefeng Wangf842f5f2021-05-10 19:42:22 +0800126static void __init setup_bootmem(void)
Anup Patel0651c262019-02-21 11:25:49 +0530127{
Zong Liac51e002020-01-02 11:12:40 +0800128 phys_addr_t vmlinux_end = __pa_symbol(&_end);
129 phys_addr_t vmlinux_start = __pa_symbol(&_start);
Kefeng Wangdd2d0822021-02-09 09:01:51 +0800130 phys_addr_t dram_end = memblock_end_of_DRAM();
Atish Patraabb8e862021-01-11 15:45:02 -0800131 phys_addr_t max_mapped_addr = __pa(~(ulong)0);
Anup Patel0651c262019-02-21 11:25:49 +0530132
Vitaly Wool44c92252021-04-13 02:35:14 -0400133#ifdef CONFIG_XIP_KERNEL
134 vmlinux_start = __pa_symbol(&_sdata);
135#endif
136
Kefeng Wangdd2d0822021-02-09 09:01:51 +0800137 /* The maximal physical memory size is -PAGE_OFFSET. */
Atish Patrade043da2020-12-18 16:13:56 -0800138 memblock_enforce_memory_limit(-PAGE_OFFSET);
Anup Patel0651c262019-02-21 11:25:49 +0530139
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400140 /*
141 * Reserve from the start of the kernel to the end of the kernel
Geert Uytterhoeven8db6f932021-04-29 17:05:00 +0200142 */
143#if defined(CONFIG_64BIT) && defined(CONFIG_STRICT_KERNEL_RWX)
144 /*
145 * Make sure we align the reservation on PMD_SIZE since we will
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400146 * map the kernel in the linear mapping as read-only: we do not want
147 * any allocation to happen between _end and the next pmd aligned page.
148 */
Geert Uytterhoeven8db6f932021-04-29 17:05:00 +0200149 vmlinux_end = (vmlinux_end + PMD_SIZE - 1) & PMD_MASK;
150#endif
151 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
Anup Pateld90d45d2019-06-07 06:01:29 +0000152
Atish Patraabb8e862021-01-11 15:45:02 -0800153 /*
154 * memblock allocator is not aware of the fact that last 4K bytes of
155 * the addressable memory can not be mapped because of IS_ERR_VALUE
156 * macro. Make sure that last 4k bytes are not usable by memblock
157 * if end of dram is equal to maximum addressable memory.
158 */
159 if (max_mapped_addr == (dram_end - 1))
160 memblock_set_current_limit(max_mapped_addr - 4096);
161
Kefeng Wangf6e5aed2021-02-25 14:54:17 +0800162 min_low_pfn = PFN_UP(memblock_start_of_DRAM());
163 max_low_pfn = max_pfn = PFN_DOWN(dram_end);
164
Kefeng Wangda815582020-10-31 14:01:12 +0800165 dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
Guo Ren336e8eb2021-01-21 14:31:17 +0800166 set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
Anup Patel0651c262019-02-21 11:25:49 +0530167
Kefeng Wangaec33b52021-01-15 13:46:06 +0800168 reserve_initrd_mem();
Albert Ou922b0372019-09-27 16:14:18 -0700169 /*
Vitaly Woolf105aa92021-01-16 01:49:48 +0200170 * If DTB is built in, no need to reserve its memblock.
171 * Otherwise, do reserve it but avoid using
172 * early_init_fdt_reserve_self() since __pa() does
Albert Ou922b0372019-09-27 16:14:18 -0700173 * not work for DTB pointers that are fixmap addresses
174 */
Vitaly Woolf105aa92021-01-16 01:49:48 +0200175 if (!IS_ENABLED(CONFIG_BUILTIN_DTB))
176 memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
Albert Ou922b0372019-09-27 16:14:18 -0700177
Anup Patel0651c262019-02-21 11:25:49 +0530178 early_init_fdt_scan_reserved_mem();
Kefeng Wangda815582020-10-31 14:01:12 +0800179 dma_contiguous_reserve(dma32_phys_limit);
Anup Patel0651c262019-02-21 11:25:49 +0530180 memblock_allow_resize();
Anup Patel0651c262019-02-21 11:25:49 +0530181}
Anup Patel6f1e9e92019-02-13 16:38:36 +0530182
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100183#ifdef CONFIG_MMU
Jisheng Zhang01062352021-05-16 21:15:56 +0800184static struct pt_alloc_ops _pt_ops __initdata;
Vitaly Wool44c92252021-04-13 02:35:14 -0400185
186#ifdef CONFIG_XIP_KERNEL
187#define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&_pt_ops))
188#else
189#define pt_ops _pt_ops
190#endif
Atish Patrae8dcb612020-09-17 15:37:12 -0700191
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400192/* Offset between linear mapping virtual address and kernel load address */
Jisheng Zhangde31ea42021-03-30 02:22:51 +0800193unsigned long va_pa_offset __ro_after_init;
Anup Patel387181d2019-03-26 08:03:47 +0000194EXPORT_SYMBOL(va_pa_offset);
Vitaly Wool44c92252021-04-13 02:35:14 -0400195#ifdef CONFIG_XIP_KERNEL
196#define va_pa_offset (*((unsigned long *)XIP_FIXUP(&va_pa_offset)))
197#endif
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400198/* Offset between kernel mapping virtual address and kernel load address */
Vitaly Wool44c92252021-04-13 02:35:14 -0400199#ifdef CONFIG_64BIT
Jisheng Zhang01062352021-05-16 21:15:56 +0800200unsigned long va_kernel_pa_offset __ro_after_init;
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400201EXPORT_SYMBOL(va_kernel_pa_offset);
202#endif
Vitaly Wool44c92252021-04-13 02:35:14 -0400203#ifdef CONFIG_XIP_KERNEL
204#define va_kernel_pa_offset (*((unsigned long *)XIP_FIXUP(&va_kernel_pa_offset)))
205#endif
Jisheng Zhang01062352021-05-16 21:15:56 +0800206unsigned long va_kernel_xip_pa_offset __ro_after_init;
Vitaly Wool44c92252021-04-13 02:35:14 -0400207EXPORT_SYMBOL(va_kernel_xip_pa_offset);
208#ifdef CONFIG_XIP_KERNEL
209#define va_kernel_xip_pa_offset (*((unsigned long *)XIP_FIXUP(&va_kernel_xip_pa_offset)))
210#endif
Jisheng Zhangde31ea42021-03-30 02:22:51 +0800211unsigned long pfn_base __ro_after_init;
Anup Patel387181d2019-03-26 08:03:47 +0000212EXPORT_SYMBOL(pfn_base);
213
Anup Patel6f1e9e92019-02-13 16:38:36 +0530214pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700215pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Jisheng Zhang01062352021-05-16 21:15:56 +0800216static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700217
Anup Patel671f9a32019-06-28 13:36:21 -0700218pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530219
Vitaly Wool44c92252021-04-13 02:35:14 -0400220#ifdef CONFIG_XIP_KERNEL
221#define trampoline_pg_dir ((pgd_t *)XIP_FIXUP(trampoline_pg_dir))
222#define fixmap_pte ((pte_t *)XIP_FIXUP(fixmap_pte))
223#define early_pg_dir ((pgd_t *)XIP_FIXUP(early_pg_dir))
224#endif /* CONFIG_XIP_KERNEL */
225
Anup Patelf2c17aa2019-01-07 20:57:01 +0530226void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
227{
228 unsigned long addr = __fix_to_virt(idx);
229 pte_t *ptep;
230
231 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
232
233 ptep = &fixmap_pte[pte_index(addr)];
234
Greentime Hu21190b72020-08-04 11:02:05 +0800235 if (pgprot_val(prot))
Anup Patelf2c17aa2019-01-07 20:57:01 +0530236 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
Greentime Hu21190b72020-08-04 11:02:05 +0800237 else
Anup Patelf2c17aa2019-01-07 20:57:01 +0530238 pte_clear(&init_mm, addr, ptep);
Greentime Hu21190b72020-08-04 11:02:05 +0800239 local_flush_tlb_page(addr);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530240}
241
Atish Patrae8dcb612020-09-17 15:37:12 -0700242static inline pte_t *__init get_pte_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700243{
Atish Patrae8dcb612020-09-17 15:37:12 -0700244 return (pte_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700245}
246
Atish Patrae8dcb612020-09-17 15:37:12 -0700247static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa)
248{
249 clear_fixmap(FIX_PTE);
250 return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
251}
252
Jisheng Zhang01062352021-05-16 21:15:56 +0800253static inline pte_t *__init get_pte_virt_late(phys_addr_t pa)
Atish Patrae8dcb612020-09-17 15:37:12 -0700254{
255 return (pte_t *) __va(pa);
256}
257
258static inline phys_addr_t __init alloc_pte_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700259{
260 /*
261 * We only create PMD or PGD early mappings so we
262 * should never reach here with MMU disabled.
263 */
Atish Patrae8dcb612020-09-17 15:37:12 -0700264 BUG();
265}
Anup Patel671f9a32019-06-28 13:36:21 -0700266
Atish Patrae8dcb612020-09-17 15:37:12 -0700267static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va)
268{
Anup Patel671f9a32019-06-28 13:36:21 -0700269 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
270}
271
Jisheng Zhang01062352021-05-16 21:15:56 +0800272static phys_addr_t __init alloc_pte_late(uintptr_t va)
Atish Patrae8dcb612020-09-17 15:37:12 -0700273{
274 unsigned long vaddr;
275
276 vaddr = __get_free_page(GFP_KERNEL);
zhouchuangaoe75e6bf2021-03-30 06:56:26 -0700277 BUG_ON(!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr)));
278
Atish Patrae8dcb612020-09-17 15:37:12 -0700279 return __pa(vaddr);
280}
281
Anup Patel671f9a32019-06-28 13:36:21 -0700282static void __init create_pte_mapping(pte_t *ptep,
283 uintptr_t va, phys_addr_t pa,
284 phys_addr_t sz, pgprot_t prot)
285{
Mike Rapoport974b9b22020-06-08 21:33:10 -0700286 uintptr_t pte_idx = pte_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700287
288 BUG_ON(sz != PAGE_SIZE);
289
Mike Rapoport974b9b22020-06-08 21:33:10 -0700290 if (pte_none(ptep[pte_idx]))
291 ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700292}
293
294#ifndef __PAGETABLE_PMD_FOLDED
295
Jisheng Zhang01062352021-05-16 21:15:56 +0800296static pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
297static pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
298static pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
299static pmd_t early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
Anup Patel671f9a32019-06-28 13:36:21 -0700300
Vitaly Wool44c92252021-04-13 02:35:14 -0400301#ifdef CONFIG_XIP_KERNEL
302#define trampoline_pmd ((pmd_t *)XIP_FIXUP(trampoline_pmd))
303#define fixmap_pmd ((pmd_t *)XIP_FIXUP(fixmap_pmd))
304#define early_pmd ((pmd_t *)XIP_FIXUP(early_pmd))
305#endif /* CONFIG_XIP_KERNEL */
306
Atish Patrae8dcb612020-09-17 15:37:12 -0700307static pmd_t *__init get_pmd_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700308{
Atish Patrae8dcb612020-09-17 15:37:12 -0700309 /* Before MMU is enabled */
310 return (pmd_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700311}
312
Atish Patrae8dcb612020-09-17 15:37:12 -0700313static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa)
314{
315 clear_fixmap(FIX_PMD);
316 return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
317}
318
Jisheng Zhang01062352021-05-16 21:15:56 +0800319static pmd_t *__init get_pmd_virt_late(phys_addr_t pa)
Atish Patrae8dcb612020-09-17 15:37:12 -0700320{
321 return (pmd_t *) __va(pa);
322}
323
324static phys_addr_t __init alloc_pmd_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700325{
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400326 BUG_ON((va - kernel_virt_addr) >> PGDIR_SHIFT);
Anup Patel671f9a32019-06-28 13:36:21 -0700327
Alexandre Ghiti0f02de42021-02-21 09:22:33 -0500328 return (uintptr_t)early_pmd;
Anup Patel671f9a32019-06-28 13:36:21 -0700329}
330
Atish Patrae8dcb612020-09-17 15:37:12 -0700331static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va)
332{
333 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
334}
335
Jisheng Zhang01062352021-05-16 21:15:56 +0800336static phys_addr_t __init alloc_pmd_late(uintptr_t va)
Atish Patrae8dcb612020-09-17 15:37:12 -0700337{
338 unsigned long vaddr;
339
340 vaddr = __get_free_page(GFP_KERNEL);
341 BUG_ON(!vaddr);
342 return __pa(vaddr);
343}
344
Anup Patel671f9a32019-06-28 13:36:21 -0700345static void __init create_pmd_mapping(pmd_t *pmdp,
346 uintptr_t va, phys_addr_t pa,
347 phys_addr_t sz, pgprot_t prot)
348{
349 pte_t *ptep;
350 phys_addr_t pte_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700351 uintptr_t pmd_idx = pmd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700352
353 if (sz == PMD_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700354 if (pmd_none(pmdp[pmd_idx]))
355 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700356 return;
357 }
358
Mike Rapoport974b9b22020-06-08 21:33:10 -0700359 if (pmd_none(pmdp[pmd_idx])) {
Atish Patrae8dcb612020-09-17 15:37:12 -0700360 pte_phys = pt_ops.alloc_pte(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700361 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
Atish Patrae8dcb612020-09-17 15:37:12 -0700362 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700363 memset(ptep, 0, PAGE_SIZE);
364 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700365 pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
Atish Patrae8dcb612020-09-17 15:37:12 -0700366 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700367 }
368
369 create_pte_mapping(ptep, va, pa, sz, prot);
370}
371
372#define pgd_next_t pmd_t
Atish Patrae8dcb612020-09-17 15:37:12 -0700373#define alloc_pgd_next(__va) pt_ops.alloc_pmd(__va)
374#define get_pgd_next_virt(__pa) pt_ops.get_pmd_virt(__pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700375#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
376 create_pmd_mapping(__nextp, __va, __pa, __sz, __prot)
Anup Patel671f9a32019-06-28 13:36:21 -0700377#define fixmap_pgd_next fixmap_pmd
378#else
379#define pgd_next_t pte_t
Atish Patrae8dcb612020-09-17 15:37:12 -0700380#define alloc_pgd_next(__va) pt_ops.alloc_pte(__va)
381#define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700382#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
383 create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
Anup Patel671f9a32019-06-28 13:36:21 -0700384#define fixmap_pgd_next fixmap_pte
385#endif
386
Atish Patrab91540d2020-09-17 15:37:15 -0700387void __init create_pgd_mapping(pgd_t *pgdp,
Anup Patel671f9a32019-06-28 13:36:21 -0700388 uintptr_t va, phys_addr_t pa,
389 phys_addr_t sz, pgprot_t prot)
390{
391 pgd_next_t *nextp;
392 phys_addr_t next_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700393 uintptr_t pgd_idx = pgd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700394
395 if (sz == PGDIR_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700396 if (pgd_val(pgdp[pgd_idx]) == 0)
397 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700398 return;
399 }
400
Mike Rapoport974b9b22020-06-08 21:33:10 -0700401 if (pgd_val(pgdp[pgd_idx]) == 0) {
Anup Patel671f9a32019-06-28 13:36:21 -0700402 next_phys = alloc_pgd_next(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700403 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700404 nextp = get_pgd_next_virt(next_phys);
405 memset(nextp, 0, PAGE_SIZE);
406 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700407 next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
Anup Patel671f9a32019-06-28 13:36:21 -0700408 nextp = get_pgd_next_virt(next_phys);
409 }
410
411 create_pgd_next_mapping(nextp, va, pa, sz, prot);
412}
413
414static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
415{
Zong Li0fdc6362019-11-08 01:00:40 -0800416 /* Upgrade to PMD_SIZE mappings whenever possible */
417 if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
418 return PAGE_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700419
Zong Li0fdc6362019-11-08 01:00:40 -0800420 return PMD_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700421}
422
Vitaly Wool44c92252021-04-13 02:35:14 -0400423#ifdef CONFIG_XIP_KERNEL
424/* called from head.S with MMU off */
425asmlinkage void __init __copy_data(void)
426{
427 void *from = (void *)(&_sdata);
428 void *end = (void *)(&_end);
429 void *to = (void *)CONFIG_PHYS_RAM_BASE;
430 size_t sz = (size_t)(end - from + 1);
431
432 memcpy(to, from, sz);
433}
434#endif
435
Anup Patel387181d2019-03-26 08:03:47 +0000436/*
437 * setup_vm() is called from head.S with MMU-off.
438 *
439 * Following requirements should be honoured for setup_vm() to work
440 * correctly:
441 * 1) It should use PC-relative addressing for accessing kernel symbols.
442 * To achieve this we always use GCC cmodel=medany.
443 * 2) The compiler instrumentation for FTRACE will not work for setup_vm()
444 * so disable compiler instrumentation when FTRACE is enabled.
445 *
446 * Currently, the above requirements are honoured by using custom CFLAGS
447 * for init.o in mm/Makefile.
448 */
449
450#ifndef __riscv_cmodel_medany
Paul Walmsley6a527b62019-10-17 14:45:58 -0700451#error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
Anup Patel387181d2019-03-26 08:03:47 +0000452#endif
453
Jisheng Zhang01062352021-05-16 21:15:56 +0800454static uintptr_t load_pa __initdata;
455static uintptr_t load_sz __initdata;
Vitaly Wool44c92252021-04-13 02:35:14 -0400456#ifdef CONFIG_XIP_KERNEL
457#define load_pa (*((uintptr_t *)XIP_FIXUP(&load_pa)))
458#define load_sz (*((uintptr_t *)XIP_FIXUP(&load_sz)))
459#endif
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400460
Vitaly Wool44c92252021-04-13 02:35:14 -0400461#ifdef CONFIG_XIP_KERNEL
Vitaly Woolae3d69b2021-06-08 10:21:27 +0200462static uintptr_t xiprom __initdata;
Jisheng Zhang01062352021-05-16 21:15:56 +0800463static uintptr_t xiprom_sz __initdata;
Vitaly Wool44c92252021-04-13 02:35:14 -0400464#define xiprom_sz (*((uintptr_t *)XIP_FIXUP(&xiprom_sz)))
465#define xiprom (*((uintptr_t *)XIP_FIXUP(&xiprom)))
466
467static void __init create_kernel_page_table(pgd_t *pgdir, uintptr_t map_size)
468{
469 uintptr_t va, end_va;
470
471 /* Map the flash resident part */
472 end_va = kernel_virt_addr + xiprom_sz;
473 for (va = kernel_virt_addr; va < end_va; va += map_size)
474 create_pgd_mapping(pgdir, va,
475 xiprom + (va - kernel_virt_addr),
476 map_size, PAGE_KERNEL_EXEC);
477
478 /* Map the data in RAM */
479 end_va = kernel_virt_addr + XIP_OFFSET + load_sz;
480 for (va = kernel_virt_addr + XIP_OFFSET; va < end_va; va += map_size)
481 create_pgd_mapping(pgdir, va,
482 load_pa + (va - (kernel_virt_addr + XIP_OFFSET)),
483 map_size, PAGE_KERNEL);
484}
485#else
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400486static void __init create_kernel_page_table(pgd_t *pgdir, uintptr_t map_size)
487{
488 uintptr_t va, end_va;
489
490 end_va = kernel_virt_addr + load_sz;
491 for (va = kernel_virt_addr; va < end_va; va += map_size)
492 create_pgd_mapping(pgdir, va,
493 load_pa + (va - kernel_virt_addr),
494 map_size, PAGE_KERNEL_EXEC);
495}
Vitaly Wool44c92252021-04-13 02:35:14 -0400496#endif
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400497
Anup Patel671f9a32019-06-28 13:36:21 -0700498asmlinkage void __init setup_vm(uintptr_t dtb_pa)
Anup Patel6f1e9e92019-02-13 16:38:36 +0530499{
Vitaly Wool44c92252021-04-13 02:35:14 -0400500 uintptr_t __maybe_unused pa;
Alexandre Ghiti0f02de42021-02-21 09:22:33 -0500501 uintptr_t map_size;
Atish Patra6262f662020-09-17 15:37:11 -0700502#ifndef __PAGETABLE_PMD_FOLDED
503 pmd_t fix_bmap_spmd, fix_bmap_epmd;
504#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530505
Vitaly Wool44c92252021-04-13 02:35:14 -0400506#ifdef CONFIG_XIP_KERNEL
507 xiprom = (uintptr_t)CONFIG_XIP_PHYS_ADDR;
508 xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom);
509
510 load_pa = (uintptr_t)CONFIG_PHYS_RAM_BASE;
511 load_sz = (uintptr_t)(&_end) - (uintptr_t)(&_sdata);
512
513 va_kernel_xip_pa_offset = kernel_virt_addr - xiprom;
514#else
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400515 load_pa = (uintptr_t)(&_start);
516 load_sz = (uintptr_t)(&_end) - load_pa;
Vitaly Wool44c92252021-04-13 02:35:14 -0400517#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530518
Anup Patel671f9a32019-06-28 13:36:21 -0700519 va_pa_offset = PAGE_OFFSET - load_pa;
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400520#ifdef CONFIG_64BIT
521 va_kernel_pa_offset = kernel_virt_addr - load_pa;
522#endif
523
Anup Patel671f9a32019-06-28 13:36:21 -0700524 pfn_base = PFN_DOWN(load_pa);
525
526 /*
527 * Enforce boot alignment requirements of RV32 and
528 * RV64 by only allowing PMD or PGD mappings.
529 */
Alexandre Ghiti0f02de42021-02-21 09:22:33 -0500530 map_size = PMD_SIZE;
Anup Patel6f1e9e92019-02-13 16:38:36 +0530531
532 /* Sanity check alignment and size */
533 BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
Anup Patel671f9a32019-06-28 13:36:21 -0700534 BUG_ON((load_pa % map_size) != 0);
Anup Patel671f9a32019-06-28 13:36:21 -0700535
Atish Patrae8dcb612020-09-17 15:37:12 -0700536 pt_ops.alloc_pte = alloc_pte_early;
537 pt_ops.get_pte_virt = get_pte_virt_early;
538#ifndef __PAGETABLE_PMD_FOLDED
539 pt_ops.alloc_pmd = alloc_pmd_early;
540 pt_ops.get_pmd_virt = get_pmd_virt_early;
541#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700542 /* Setup early PGD for fixmap */
543 create_pgd_mapping(early_pg_dir, FIXADDR_START,
544 (uintptr_t)fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530545
546#ifndef __PAGETABLE_PMD_FOLDED
Anup Patel671f9a32019-06-28 13:36:21 -0700547 /* Setup fixmap PMD */
548 create_pmd_mapping(fixmap_pmd, FIXADDR_START,
549 (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
550 /* Setup trampoline PGD and PMD */
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400551 create_pgd_mapping(trampoline_pg_dir, kernel_virt_addr,
Anup Patel671f9a32019-06-28 13:36:21 -0700552 (uintptr_t)trampoline_pmd, PGDIR_SIZE, PAGE_TABLE);
Vitaly Wool44c92252021-04-13 02:35:14 -0400553#ifdef CONFIG_XIP_KERNEL
554 create_pmd_mapping(trampoline_pmd, kernel_virt_addr,
555 xiprom, PMD_SIZE, PAGE_KERNEL_EXEC);
556#else
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400557 create_pmd_mapping(trampoline_pmd, kernel_virt_addr,
Anup Patel671f9a32019-06-28 13:36:21 -0700558 load_pa, PMD_SIZE, PAGE_KERNEL_EXEC);
Vitaly Wool44c92252021-04-13 02:35:14 -0400559#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530560#else
Anup Patel671f9a32019-06-28 13:36:21 -0700561 /* Setup trampoline PGD */
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400562 create_pgd_mapping(trampoline_pg_dir, kernel_virt_addr,
Anup Patel671f9a32019-06-28 13:36:21 -0700563 load_pa, PGDIR_SIZE, PAGE_KERNEL_EXEC);
564#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530565
Anup Patel671f9a32019-06-28 13:36:21 -0700566 /*
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400567 * Setup early PGD covering entire kernel which will allow
Anup Patel671f9a32019-06-28 13:36:21 -0700568 * us to reach paging_init(). We map all memory banks later
569 * in setup_vm_final() below.
570 */
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400571 create_kernel_page_table(early_pg_dir, map_size);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530572
Anup Patel1074dd42020-11-04 12:07:13 +0530573#ifndef __PAGETABLE_PMD_FOLDED
574 /* Setup early PMD for DTB */
575 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
576 (uintptr_t)early_dtb_pmd, PGDIR_SIZE, PAGE_TABLE);
Vitaly Woolf105aa92021-01-16 01:49:48 +0200577#ifndef CONFIG_BUILTIN_DTB
Anup Patel1074dd42020-11-04 12:07:13 +0530578 /* Create two consecutive PMD mappings for FDT early scan */
579 pa = dtb_pa & ~(PMD_SIZE - 1);
580 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA,
581 pa, PMD_SIZE, PAGE_KERNEL);
582 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE,
583 pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
584 dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1));
Vitaly Woolf105aa92021-01-16 01:49:48 +0200585#else /* CONFIG_BUILTIN_DTB */
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400586#ifdef CONFIG_64BIT
587 /*
588 * __va can't be used since it would return a linear mapping address
589 * whereas dtb_early_va will be used before setup_vm_final installs
590 * the linear mapping.
591 */
Vitaly Wool44c92252021-04-13 02:35:14 -0400592 dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa));
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400593#else
Vitaly Woolf105aa92021-01-16 01:49:48 +0200594 dtb_early_va = __va(dtb_pa);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400595#endif /* CONFIG_64BIT */
Vitaly Woolf105aa92021-01-16 01:49:48 +0200596#endif /* CONFIG_BUILTIN_DTB */
Anup Patel1074dd42020-11-04 12:07:13 +0530597#else
Vitaly Woolf105aa92021-01-16 01:49:48 +0200598#ifndef CONFIG_BUILTIN_DTB
Anup Patel8f3a2b42020-09-17 15:37:10 -0700599 /* Create two consecutive PGD mappings for FDT early scan */
600 pa = dtb_pa & ~(PGDIR_SIZE - 1);
601 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
602 pa, PGDIR_SIZE, PAGE_KERNEL);
603 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA + PGDIR_SIZE,
604 pa + PGDIR_SIZE, PGDIR_SIZE, PAGE_KERNEL);
605 dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PGDIR_SIZE - 1));
Vitaly Woolf105aa92021-01-16 01:49:48 +0200606#else /* CONFIG_BUILTIN_DTB */
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400607#ifdef CONFIG_64BIT
Vitaly Wool44c92252021-04-13 02:35:14 -0400608 dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa));
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400609#else
Vitaly Woolf105aa92021-01-16 01:49:48 +0200610 dtb_early_va = __va(dtb_pa);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400611#endif /* CONFIG_64BIT */
Vitaly Woolf105aa92021-01-16 01:49:48 +0200612#endif /* CONFIG_BUILTIN_DTB */
Anup Patel1074dd42020-11-04 12:07:13 +0530613#endif
Albert Ou922b0372019-09-27 16:14:18 -0700614 dtb_early_pa = dtb_pa;
Atish Patra6262f662020-09-17 15:37:11 -0700615
616 /*
617 * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
618 * range can not span multiple pmds.
619 */
620 BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
621 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
622
623#ifndef __PAGETABLE_PMD_FOLDED
624 /*
625 * Early ioremap fixmap is already created as it lies within first 2MB
626 * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END
627 * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn
628 * the user if not.
629 */
630 fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))];
631 fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))];
632 if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) {
633 WARN_ON(1);
634 pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n",
635 pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd));
636 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
637 fix_to_virt(FIX_BTMAP_BEGIN));
638 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
639 fix_to_virt(FIX_BTMAP_END));
640
641 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
642 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
643 }
644#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700645}
646
Geert Uytterhoeven8d91b092021-04-29 17:10:04 +0200647#if defined(CONFIG_64BIT) && defined(CONFIG_STRICT_KERNEL_RWX)
Jisheng Zhang01062352021-05-16 21:15:56 +0800648void __init protect_kernel_linear_mapping_text_rodata(void)
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400649{
650 unsigned long text_start = (unsigned long)lm_alias(_start);
651 unsigned long init_text_start = (unsigned long)lm_alias(__init_text_begin);
652 unsigned long rodata_start = (unsigned long)lm_alias(__start_rodata);
653 unsigned long data_start = (unsigned long)lm_alias(_data);
654
655 set_memory_ro(text_start, (init_text_start - text_start) >> PAGE_SHIFT);
656 set_memory_nx(text_start, (init_text_start - text_start) >> PAGE_SHIFT);
657
658 set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
659 set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
660}
661#endif
662
Anup Patel671f9a32019-06-28 13:36:21 -0700663static void __init setup_vm_final(void)
664{
665 uintptr_t va, map_size;
666 phys_addr_t pa, start, end;
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700667 u64 i;
Anup Patel671f9a32019-06-28 13:36:21 -0700668
Atish Patrae8dcb612020-09-17 15:37:12 -0700669 /**
670 * MMU is enabled at this point. But page table setup is not complete yet.
671 * fixmap page table alloc functions should be used at this point
672 */
673 pt_ops.alloc_pte = alloc_pte_fixmap;
674 pt_ops.get_pte_virt = get_pte_virt_fixmap;
675#ifndef __PAGETABLE_PMD_FOLDED
676 pt_ops.alloc_pmd = alloc_pmd_fixmap;
677 pt_ops.get_pmd_virt = get_pmd_virt_fixmap;
678#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700679 /* Setup swapper PGD for fixmap */
680 create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
Zong Liac51e002020-01-02 11:12:40 +0800681 __pa_symbol(fixmap_pgd_next),
Anup Patel671f9a32019-06-28 13:36:21 -0700682 PGDIR_SIZE, PAGE_TABLE);
683
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400684 /* Map all memory banks in the linear mapping */
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700685 for_each_mem_range(i, &start, &end) {
Anup Patel671f9a32019-06-28 13:36:21 -0700686 if (start >= end)
687 break;
Anup Patel671f9a32019-06-28 13:36:21 -0700688 if (start <= __pa(PAGE_OFFSET) &&
689 __pa(PAGE_OFFSET) < end)
690 start = __pa(PAGE_OFFSET);
691
692 map_size = best_map_size(start, end - start);
693 for (pa = start; pa < end; pa += map_size) {
694 va = (uintptr_t)__va(pa);
695 create_pgd_mapping(swapper_pg_dir, va, pa,
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400696 map_size,
697#ifdef CONFIG_64BIT
698 PAGE_KERNEL
699#else
700 PAGE_KERNEL_EXEC
701#endif
702 );
703
Anup Patel671f9a32019-06-28 13:36:21 -0700704 }
Anup Patel6f1e9e92019-02-13 16:38:36 +0530705 }
Anup Patelf2c17aa2019-01-07 20:57:01 +0530706
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400707#ifdef CONFIG_64BIT
708 /* Map the kernel */
709 create_kernel_page_table(swapper_pg_dir, PMD_SIZE);
710#endif
711
Anup Patel671f9a32019-06-28 13:36:21 -0700712 /* Clear fixmap PTE and PMD mappings */
713 clear_fixmap(FIX_PTE);
714 clear_fixmap(FIX_PMD);
715
716 /* Move to swapper page table */
Zong Liac51e002020-01-02 11:12:40 +0800717 csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | SATP_MODE);
Anup Patel671f9a32019-06-28 13:36:21 -0700718 local_flush_tlb_all();
Atish Patrae8dcb612020-09-17 15:37:12 -0700719
720 /* generic page allocation functions must be used to setup page table */
721 pt_ops.alloc_pte = alloc_pte_late;
722 pt_ops.get_pte_virt = get_pte_virt_late;
723#ifndef __PAGETABLE_PMD_FOLDED
724 pt_ops.alloc_pmd = alloc_pmd_late;
725 pt_ops.get_pmd_virt = get_pmd_virt_late;
726#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700727}
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100728#else
729asmlinkage void __init setup_vm(uintptr_t dtb_pa)
730{
731 dtb_early_va = (void *)dtb_pa;
Atish Patraa78c6f52020-10-01 12:04:56 -0700732 dtb_early_pa = dtb_pa;
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100733}
734
735static inline void setup_vm_final(void)
736{
737}
738#endif /* CONFIG_MMU */
Anup Patel671f9a32019-06-28 13:36:21 -0700739
Zong Lid27c3c92020-03-10 00:55:41 +0800740#ifdef CONFIG_STRICT_KERNEL_RWX
Jisheng Zhang19875012021-03-30 02:22:21 +0800741void __init protect_kernel_text_data(void)
Zong Lid27c3c92020-03-10 00:55:41 +0800742{
Atish Patra19a00862020-11-04 16:04:38 -0800743 unsigned long text_start = (unsigned long)_start;
744 unsigned long init_text_start = (unsigned long)__init_text_begin;
745 unsigned long init_data_start = (unsigned long)__init_data_begin;
Zong Lid27c3c92020-03-10 00:55:41 +0800746 unsigned long rodata_start = (unsigned long)__start_rodata;
747 unsigned long data_start = (unsigned long)_data;
748 unsigned long max_low = (unsigned long)(__va(PFN_PHYS(max_low_pfn)));
749
Atish Patra19a00862020-11-04 16:04:38 -0800750 set_memory_ro(text_start, (init_text_start - text_start) >> PAGE_SHIFT);
751 set_memory_ro(init_text_start, (init_data_start - init_text_start) >> PAGE_SHIFT);
752 set_memory_nx(init_data_start, (rodata_start - init_data_start) >> PAGE_SHIFT);
753 /* rodata section is marked readonly in mark_rodata_ro */
Zong Lid27c3c92020-03-10 00:55:41 +0800754 set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
755 set_memory_nx(data_start, (max_low - data_start) >> PAGE_SHIFT);
Atish Patra19a00862020-11-04 16:04:38 -0800756}
757
758void mark_rodata_ro(void)
759{
760 unsigned long rodata_start = (unsigned long)__start_rodata;
761 unsigned long data_start = (unsigned long)_data;
762
763 set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
Zong Lib422d282020-06-03 16:03:55 -0700764
765 debug_checkwx();
Zong Lid27c3c92020-03-10 00:55:41 +0800766}
767#endif
768
Nick Kossifidise53d2812021-04-19 03:55:38 +0300769#ifdef CONFIG_KEXEC_CORE
770/*
771 * reserve_crashkernel() - reserves memory for crash kernel
772 *
773 * This function reserves memory area given in "crashkernel=" kernel command
774 * line parameter. The memory reserved is used by dump capture kernel when
775 * primary kernel is crashing.
776 */
777static void __init reserve_crashkernel(void)
778{
779 unsigned long long crash_base = 0;
780 unsigned long long crash_size = 0;
781 unsigned long search_start = memblock_start_of_DRAM();
782 unsigned long search_end = memblock_end_of_DRAM();
783
784 int ret = 0;
785
Nick Kossifidis56409752021-04-19 03:55:39 +0300786 /*
787 * Don't reserve a region for a crash kernel on a crash kernel
788 * since it doesn't make much sense and we have limited memory
789 * resources.
790 */
791#ifdef CONFIG_CRASH_DUMP
792 if (is_kdump_kernel()) {
793 pr_info("crashkernel: ignoring reservation request\n");
794 return;
795 }
796#endif
797
Nick Kossifidise53d2812021-04-19 03:55:38 +0300798 ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),
799 &crash_size, &crash_base);
800 if (ret || !crash_size)
801 return;
802
803 crash_size = PAGE_ALIGN(crash_size);
804
805 if (crash_base == 0) {
806 /*
807 * Current riscv boot protocol requires 2MB alignment for
808 * RV64 and 4MB alignment for RV32 (hugepage size)
809 */
810 crash_base = memblock_find_in_range(search_start, search_end,
811 crash_size, PMD_SIZE);
812
813 if (crash_base == 0) {
814 pr_warn("crashkernel: couldn't allocate %lldKB\n",
815 crash_size >> 10);
816 return;
817 }
818 } else {
819 /* User specifies base address explicitly. */
820 if (!memblock_is_region_memory(crash_base, crash_size)) {
821 pr_warn("crashkernel: requested region is not memory\n");
822 return;
823 }
824
825 if (memblock_is_region_reserved(crash_base, crash_size)) {
826 pr_warn("crashkernel: requested region is reserved\n");
827 return;
828 }
829
830
831 if (!IS_ALIGNED(crash_base, PMD_SIZE)) {
832 pr_warn("crashkernel: requested region is misaligned\n");
833 return;
834 }
835 }
836 memblock_reserve(crash_base, crash_size);
837
838 pr_info("crashkernel: reserved 0x%016llx - 0x%016llx (%lld MB)\n",
839 crash_base, crash_base + crash_size, crash_size >> 20);
840
841 crashk_res.start = crash_base;
842 crashk_res.end = crash_base + crash_size - 1;
843}
844#endif /* CONFIG_KEXEC_CORE */
845
Nick Kossifidis56409752021-04-19 03:55:39 +0300846#ifdef CONFIG_CRASH_DUMP
847/*
848 * We keep track of the ELF core header of the crashed
849 * kernel with a reserved-memory region with compatible
850 * string "linux,elfcorehdr". Here we register a callback
851 * to populate elfcorehdr_addr/size when this region is
852 * present. Note that this region will be marked as
853 * reserved once we call early_init_fdt_scan_reserved_mem()
854 * later on.
855 */
Jisheng Zhang01062352021-05-16 21:15:56 +0800856static int __init elfcore_hdr_setup(struct reserved_mem *rmem)
Nick Kossifidis56409752021-04-19 03:55:39 +0300857{
858 elfcorehdr_addr = rmem->base;
859 elfcorehdr_size = rmem->size;
860 return 0;
861}
862
863RESERVEDMEM_OF_DECLARE(elfcorehdr, "linux,elfcorehdr", elfcore_hdr_setup);
864#endif
865
Anup Patel671f9a32019-06-28 13:36:21 -0700866void __init paging_init(void)
867{
Kefeng Wangf842f5f2021-05-10 19:42:22 +0800868 setup_bootmem();
Anup Patel671f9a32019-06-28 13:36:21 -0700869 setup_vm_final();
Atish Patracbd34f42020-11-18 16:38:27 -0800870}
871
872void __init misc_mem_init(void)
873{
Kefeng Wangf6e5aed2021-02-25 14:54:17 +0800874 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
Atish Patra4f0e8ee2020-11-18 16:38:29 -0800875 arch_numa_init();
Atish Patracbd34f42020-11-18 16:38:27 -0800876 sparse_init();
Anup Patel671f9a32019-06-28 13:36:21 -0700877 zone_sizes_init();
Nick Kossifidise53d2812021-04-19 03:55:38 +0300878#ifdef CONFIG_KEXEC_CORE
879 reserve_crashkernel();
880#endif
Atish Patra4f0e8ee2020-11-18 16:38:29 -0800881 memblock_dump_all();
Anup Patel6f1e9e92019-02-13 16:38:36 +0530882}
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600883
Kefeng Wang9fe57d82019-10-23 11:23:02 +0800884#ifdef CONFIG_SPARSEMEM_VMEMMAP
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600885int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
886 struct vmem_altmap *altmap)
887{
Anshuman Khandual1d9cfee2020-08-06 23:23:19 -0700888 return vmemmap_populate_basepages(start, end, node, NULL);
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600889}
890#endif