blob: 7ba9158498179da7ba624b7710fc3c7944522f19 [file] [log] [blame]
Thomas Gleixner50acfb22019-05-29 07:18:00 -07001// SPDX-License-Identifier: GPL-2.0-only
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07002/*
3 * Copyright (C) 2012 Regents of the University of California
Anup Patel671f9a32019-06-28 13:36:21 -07004 * Copyright (C) 2019 Western Digital Corporation or its affiliates.
Nick Kossifidise53d2812021-04-19 03:55:38 +03005 * Copyright (C) 2020 FORTH-ICS/CARV
6 * Nick Kossifidis <mick@ics.forth.gr>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07007 */
8
9#include <linux/init.h>
10#include <linux/mm.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070011#include <linux/memblock.h>
Mike Rapoport57c8a662018-10-30 15:09:49 -070012#include <linux/initrd.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070013#include <linux/swap.h>
Kefeng Wangce3aca02021-06-02 16:55:16 +080014#include <linux/swiotlb.h>
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010015#include <linux/sizes.h>
Anup Patel0651c262019-02-21 11:25:49 +053016#include <linux/of_fdt.h>
Nick Kossifidis56409752021-04-19 03:55:39 +030017#include <linux/of_reserved_mem.h>
Albert Ou922b0372019-09-27 16:14:18 -070018#include <linux/libfdt.h>
Zong Lid27c3c92020-03-10 00:55:41 +080019#include <linux/set_memory.h>
Kefeng Wangda815582020-10-31 14:01:12 +080020#include <linux/dma-map-ops.h>
Nick Kossifidise53d2812021-04-19 03:55:38 +030021#include <linux/crash_dump.h>
Kefeng Wang8ba1a8b2021-07-30 20:48:41 +080022#include <linux/hugetlb.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070023
Anup Patelf2c17aa2019-01-07 20:57:01 +053024#include <asm/fixmap.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070025#include <asm/tlbflush.h>
26#include <asm/sections.h>
Palmer Dabbelt2d268252020-04-14 13:43:24 +090027#include <asm/soc.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070028#include <asm/io.h>
Zong Lib422d282020-06-03 16:03:55 -070029#include <asm/ptdump.h>
Atish Patra4f0e8ee2020-11-18 16:38:29 -080030#include <asm/numa.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070031
Paul Walmsleyffaee272019-10-17 15:00:17 -070032#include "../kernel/head.h"
33
Alexandre Ghiti658e2c52021-06-17 15:53:07 +020034struct kernel_mapping kernel_map __ro_after_init;
35EXPORT_SYMBOL(kernel_map);
Vitaly Wool44c92252021-04-13 02:35:14 -040036#ifdef CONFIG_XIP_KERNEL
Alexandre Ghiti658e2c52021-06-17 15:53:07 +020037#define kernel_map (*(struct kernel_mapping *)XIP_FIXUP(&kernel_map))
38#endif
39
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +010040#ifdef CONFIG_64BIT
41u64 satp_mode = !IS_ENABLED(CONFIG_XIP_KERNEL) ? SATP_MODE_48 : SATP_MODE_39;
42#else
43u64 satp_mode = SATP_MODE_32;
44#endif
45EXPORT_SYMBOL(satp_mode);
46
47bool pgtable_l4_enabled = IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_XIP_KERNEL) ?
48 true : false;
49EXPORT_SYMBOL(pgtable_l4_enabled);
50
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +020051phys_addr_t phys_ram_base __ro_after_init;
52EXPORT_SYMBOL(phys_ram_base);
53
Alexandre Ghiti658e2c52021-06-17 15:53:07 +020054#ifdef CONFIG_XIP_KERNEL
Vitaly Woolf9ace4e2021-10-11 11:14:14 +020055extern char _xiprom[], _exiprom[], __data_loc;
Vitaly Wool44c92252021-04-13 02:35:14 -040056#endif
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -040057
Anup Patel387181d2019-03-26 08:03:47 +000058unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
59 __page_aligned_bss;
60EXPORT_SYMBOL(empty_zero_page);
61
Anup Pateld90d45d2019-06-07 06:01:29 +000062extern char _start[];
Anup Patel8f3a2b42020-09-17 15:37:10 -070063#define DTB_EARLY_BASE_VA PGDIR_SIZE
Vitaly Wool44c92252021-04-13 02:35:14 -040064void *_dtb_early_va __initdata;
65uintptr_t _dtb_early_pa __initdata;
Anup Pateld90d45d2019-06-07 06:01:29 +000066
Jisheng Zhang01062352021-05-16 21:15:56 +080067static phys_addr_t dma32_phys_limit __initdata;
Kefeng Wangda815582020-10-31 14:01:12 +080068
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070069static void __init zone_sizes_init(void)
70{
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010071 unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070072
Zong Lid5fad482018-06-25 16:49:37 +080073#ifdef CONFIG_ZONE_DMA32
Kefeng Wangda815582020-10-31 14:01:12 +080074 max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit);
Zong Lid5fad482018-06-25 16:49:37 +080075#endif
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010076 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
77
Mike Rapoport9691a072020-06-03 15:57:10 -070078 free_area_init(max_zone_pfns);
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070079}
80
Kefeng Wang8fa3cdf2020-05-14 19:53:35 +080081#if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000082static inline void print_mlk(char *name, unsigned long b, unsigned long t)
83{
84 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t,
85 (((t) - (b)) >> 10));
86}
87
88static inline void print_mlm(char *name, unsigned long b, unsigned long t)
89{
90 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t,
91 (((t) - (b)) >> 20));
92}
93
Jisheng Zhang19875012021-03-30 02:22:21 +080094static void __init print_vm_layout(void)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000095{
96 pr_notice("Virtual kernel memory layout:\n");
97 print_mlk("fixmap", (unsigned long)FIXADDR_START,
98 (unsigned long)FIXADDR_TOP);
99 print_mlm("pci io", (unsigned long)PCI_IO_START,
100 (unsigned long)PCI_IO_END);
101 print_mlm("vmemmap", (unsigned long)VMEMMAP_START,
102 (unsigned long)VMEMMAP_END);
103 print_mlm("vmalloc", (unsigned long)VMALLOC_START,
104 (unsigned long)VMALLOC_END);
105 print_mlm("lowmem", (unsigned long)PAGE_OFFSET,
106 (unsigned long)high_memory);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400107#ifdef CONFIG_64BIT
Alexandre Ghitif7ae0232021-12-06 11:46:45 +0100108#ifdef CONFIG_KASAN
109 print_mlm("kasan", KASAN_SHADOW_START, KASAN_SHADOW_END);
110#endif
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400111 print_mlm("kernel", (unsigned long)KERNEL_LINK_ADDR,
112 (unsigned long)ADDRESS_SPACE_END);
113#endif
Yash Shah2cc6c4a2019-11-18 05:58:34 +0000114}
115#else
116static void print_vm_layout(void) { }
117#endif /* CONFIG_DEBUG_VM */
118
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700119void __init mem_init(void)
120{
121#ifdef CONFIG_FLATMEM
122 BUG_ON(!mem_map);
123#endif /* CONFIG_FLATMEM */
124
Kefeng Wangce3aca02021-06-02 16:55:16 +0800125#ifdef CONFIG_SWIOTLB
126 if (swiotlb_force == SWIOTLB_FORCE ||
127 max_pfn > PFN_DOWN(dma32_phys_limit))
128 swiotlb_init(1);
129 else
130 swiotlb_force = SWIOTLB_NO_FORCE;
131#endif
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700132 high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
Mike Rapoportc6ffc5c2018-10-30 15:09:30 -0700133 memblock_free_all();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700134
Yash Shah2cc6c4a2019-11-18 05:58:34 +0000135 print_vm_layout();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700136}
137
Alexandre Ghitif7ae0232021-12-06 11:46:45 +0100138/* Limit the memory size via mem. */
139static phys_addr_t memory_limit;
Kefeng Wangc9811e32021-06-02 16:55:17 +0800140
141static int __init early_mem(char *p)
142{
143 u64 size;
144
145 if (!p)
146 return 1;
147
148 size = memparse(p, &p) & PAGE_MASK;
149 memory_limit = min_t(u64, size, memory_limit);
150
151 pr_notice("Memory limited to %lldMB\n", (u64)memory_limit >> 20);
152
153 return 0;
154}
155early_param("mem", early_mem);
156
Kefeng Wangf842f5f2021-05-10 19:42:22 +0800157static void __init setup_bootmem(void)
Anup Patel0651c262019-02-21 11:25:49 +0530158{
Zong Liac51e002020-01-02 11:12:40 +0800159 phys_addr_t vmlinux_end = __pa_symbol(&_end);
160 phys_addr_t vmlinux_start = __pa_symbol(&_start);
Alexandre Ghitidb6b84a2021-06-29 11:13:48 +0200161 phys_addr_t __maybe_unused max_mapped_addr;
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +0200162 phys_addr_t phys_ram_end;
Anup Patel0651c262019-02-21 11:25:49 +0530163
Vitaly Wool44c92252021-04-13 02:35:14 -0400164#ifdef CONFIG_XIP_KERNEL
165 vmlinux_start = __pa_symbol(&_sdata);
166#endif
167
Kefeng Wangc9811e32021-06-02 16:55:17 +0800168 memblock_enforce_memory_limit(memory_limit);
Anup Patel0651c262019-02-21 11:25:49 +0530169
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400170 /*
171 * Reserve from the start of the kernel to the end of the kernel
Geert Uytterhoeven8db6f932021-04-29 17:05:00 +0200172 */
173#if defined(CONFIG_64BIT) && defined(CONFIG_STRICT_KERNEL_RWX)
174 /*
175 * Make sure we align the reservation on PMD_SIZE since we will
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400176 * map the kernel in the linear mapping as read-only: we do not want
177 * any allocation to happen between _end and the next pmd aligned page.
178 */
Geert Uytterhoeven8db6f932021-04-29 17:05:00 +0200179 vmlinux_end = (vmlinux_end + PMD_SIZE - 1) & PMD_MASK;
180#endif
181 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
Anup Pateld90d45d2019-06-07 06:01:29 +0000182
Bin Mengd0e4dae2021-06-27 21:51:17 +0800183
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +0200184 phys_ram_end = memblock_end_of_DRAM();
Alexandre Ghitidb6b84a2021-06-29 11:13:48 +0200185#ifndef CONFIG_64BIT
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +0200186#ifndef CONFIG_XIP_KERNEL
187 phys_ram_base = memblock_start_of_DRAM();
188#endif
Atish Patraabb8e862021-01-11 15:45:02 -0800189 /*
190 * memblock allocator is not aware of the fact that last 4K bytes of
191 * the addressable memory can not be mapped because of IS_ERR_VALUE
192 * macro. Make sure that last 4k bytes are not usable by memblock
Alexandre Ghitidb6b84a2021-06-29 11:13:48 +0200193 * if end of dram is equal to maximum addressable memory. For 64-bit
194 * kernel, this problem can't happen here as the end of the virtual
195 * address space is occupied by the kernel mapping then this check must
Alexandre Ghitifdf3a7a2021-07-26 07:42:54 +0200196 * be done as soon as the kernel mapping base address is determined.
Atish Patraabb8e862021-01-11 15:45:02 -0800197 */
Alexandre Ghitidb6b84a2021-06-29 11:13:48 +0200198 max_mapped_addr = __pa(~(ulong)0);
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +0200199 if (max_mapped_addr == (phys_ram_end - 1))
Atish Patraabb8e862021-01-11 15:45:02 -0800200 memblock_set_current_limit(max_mapped_addr - 4096);
Alexandre Ghitidb6b84a2021-06-29 11:13:48 +0200201#endif
Atish Patraabb8e862021-01-11 15:45:02 -0800202
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +0200203 min_low_pfn = PFN_UP(phys_ram_base);
204 max_low_pfn = max_pfn = PFN_DOWN(phys_ram_end);
Kefeng Wangf6e5aed2021-02-25 14:54:17 +0800205
Kefeng Wangda815582020-10-31 14:01:12 +0800206 dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
Guo Ren336e8eb2021-01-21 14:31:17 +0800207 set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
Anup Patel0651c262019-02-21 11:25:49 +0530208
Kefeng Wangaec33b52021-01-15 13:46:06 +0800209 reserve_initrd_mem();
Albert Ou922b0372019-09-27 16:14:18 -0700210 /*
Vitaly Woolf105aa92021-01-16 01:49:48 +0200211 * If DTB is built in, no need to reserve its memblock.
212 * Otherwise, do reserve it but avoid using
213 * early_init_fdt_reserve_self() since __pa() does
Albert Ou922b0372019-09-27 16:14:18 -0700214 * not work for DTB pointers that are fixmap addresses
215 */
Vitaly Woolf105aa92021-01-16 01:49:48 +0200216 if (!IS_ENABLED(CONFIG_BUILTIN_DTB))
217 memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
Albert Ou922b0372019-09-27 16:14:18 -0700218
Anup Patel0651c262019-02-21 11:25:49 +0530219 early_init_fdt_scan_reserved_mem();
Kefeng Wangda815582020-10-31 14:01:12 +0800220 dma_contiguous_reserve(dma32_phys_limit);
Kefeng Wang8ba1a8b2021-07-30 20:48:41 +0800221 if (IS_ENABLED(CONFIG_64BIT))
222 hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
Anup Patel0651c262019-02-21 11:25:49 +0530223 memblock_allow_resize();
Anup Patel0651c262019-02-21 11:25:49 +0530224}
Anup Patel6f1e9e92019-02-13 16:38:36 +0530225
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100226#ifdef CONFIG_MMU
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100227struct pt_alloc_ops _pt_ops __initdata;
Vitaly Wool44c92252021-04-13 02:35:14 -0400228
229#ifdef CONFIG_XIP_KERNEL
230#define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&_pt_ops))
231#else
232#define pt_ops _pt_ops
233#endif
Atish Patrae8dcb612020-09-17 15:37:12 -0700234
Kenneth Leefb31f0a2021-07-28 15:15:57 +0800235unsigned long riscv_pfn_base __ro_after_init;
236EXPORT_SYMBOL(riscv_pfn_base);
Anup Patel387181d2019-03-26 08:03:47 +0000237
Anup Patel6f1e9e92019-02-13 16:38:36 +0530238pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700239pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Jisheng Zhang01062352021-05-16 21:15:56 +0800240static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700241
Anup Patel671f9a32019-06-28 13:36:21 -0700242pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100243static pud_t __maybe_unused early_dtb_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200244static pmd_t __maybe_unused early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530245
Vitaly Wool44c92252021-04-13 02:35:14 -0400246#ifdef CONFIG_XIP_KERNEL
247#define trampoline_pg_dir ((pgd_t *)XIP_FIXUP(trampoline_pg_dir))
248#define fixmap_pte ((pte_t *)XIP_FIXUP(fixmap_pte))
249#define early_pg_dir ((pgd_t *)XIP_FIXUP(early_pg_dir))
250#endif /* CONFIG_XIP_KERNEL */
251
Anup Patelf2c17aa2019-01-07 20:57:01 +0530252void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
253{
254 unsigned long addr = __fix_to_virt(idx);
255 pte_t *ptep;
256
257 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
258
259 ptep = &fixmap_pte[pte_index(addr)];
260
Greentime Hu21190b72020-08-04 11:02:05 +0800261 if (pgprot_val(prot))
Anup Patelf2c17aa2019-01-07 20:57:01 +0530262 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
Greentime Hu21190b72020-08-04 11:02:05 +0800263 else
Anup Patelf2c17aa2019-01-07 20:57:01 +0530264 pte_clear(&init_mm, addr, ptep);
Greentime Hu21190b72020-08-04 11:02:05 +0800265 local_flush_tlb_page(addr);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530266}
267
Atish Patrae8dcb612020-09-17 15:37:12 -0700268static inline pte_t *__init get_pte_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700269{
Atish Patrae8dcb612020-09-17 15:37:12 -0700270 return (pte_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700271}
272
Atish Patrae8dcb612020-09-17 15:37:12 -0700273static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa)
274{
275 clear_fixmap(FIX_PTE);
276 return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
277}
278
Jisheng Zhang01062352021-05-16 21:15:56 +0800279static inline pte_t *__init get_pte_virt_late(phys_addr_t pa)
Atish Patrae8dcb612020-09-17 15:37:12 -0700280{
281 return (pte_t *) __va(pa);
282}
283
284static inline phys_addr_t __init alloc_pte_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700285{
286 /*
287 * We only create PMD or PGD early mappings so we
288 * should never reach here with MMU disabled.
289 */
Atish Patrae8dcb612020-09-17 15:37:12 -0700290 BUG();
291}
Anup Patel671f9a32019-06-28 13:36:21 -0700292
Atish Patrae8dcb612020-09-17 15:37:12 -0700293static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va)
294{
Anup Patel671f9a32019-06-28 13:36:21 -0700295 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
296}
297
Jisheng Zhang01062352021-05-16 21:15:56 +0800298static phys_addr_t __init alloc_pte_late(uintptr_t va)
Atish Patrae8dcb612020-09-17 15:37:12 -0700299{
300 unsigned long vaddr;
301
302 vaddr = __get_free_page(GFP_KERNEL);
zhouchuangaoe75e6bf2021-03-30 06:56:26 -0700303 BUG_ON(!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr)));
304
Atish Patrae8dcb612020-09-17 15:37:12 -0700305 return __pa(vaddr);
306}
307
Anup Patel671f9a32019-06-28 13:36:21 -0700308static void __init create_pte_mapping(pte_t *ptep,
309 uintptr_t va, phys_addr_t pa,
310 phys_addr_t sz, pgprot_t prot)
311{
Mike Rapoport974b9b22020-06-08 21:33:10 -0700312 uintptr_t pte_idx = pte_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700313
314 BUG_ON(sz != PAGE_SIZE);
315
Mike Rapoport974b9b22020-06-08 21:33:10 -0700316 if (pte_none(ptep[pte_idx]))
317 ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700318}
319
320#ifndef __PAGETABLE_PMD_FOLDED
321
Jisheng Zhang01062352021-05-16 21:15:56 +0800322static pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
323static pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
324static pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
Anup Patel671f9a32019-06-28 13:36:21 -0700325
Vitaly Wool44c92252021-04-13 02:35:14 -0400326#ifdef CONFIG_XIP_KERNEL
327#define trampoline_pmd ((pmd_t *)XIP_FIXUP(trampoline_pmd))
328#define fixmap_pmd ((pmd_t *)XIP_FIXUP(fixmap_pmd))
329#define early_pmd ((pmd_t *)XIP_FIXUP(early_pmd))
330#endif /* CONFIG_XIP_KERNEL */
331
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100332static pud_t trampoline_pud[PTRS_PER_PUD] __page_aligned_bss;
333static pud_t fixmap_pud[PTRS_PER_PUD] __page_aligned_bss;
334static pud_t early_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
335
336#ifdef CONFIG_XIP_KERNEL
337#define trampoline_pud ((pud_t *)XIP_FIXUP(trampoline_pud))
338#define fixmap_pud ((pud_t *)XIP_FIXUP(fixmap_pud))
339#define early_pud ((pud_t *)XIP_FIXUP(early_pud))
340#endif /* CONFIG_XIP_KERNEL */
341
Atish Patrae8dcb612020-09-17 15:37:12 -0700342static pmd_t *__init get_pmd_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700343{
Atish Patrae8dcb612020-09-17 15:37:12 -0700344 /* Before MMU is enabled */
345 return (pmd_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700346}
347
Atish Patrae8dcb612020-09-17 15:37:12 -0700348static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa)
349{
350 clear_fixmap(FIX_PMD);
351 return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
352}
353
Jisheng Zhang01062352021-05-16 21:15:56 +0800354static pmd_t *__init get_pmd_virt_late(phys_addr_t pa)
Atish Patrae8dcb612020-09-17 15:37:12 -0700355{
356 return (pmd_t *) __va(pa);
357}
358
359static phys_addr_t __init alloc_pmd_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700360{
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100361 BUG_ON((va - kernel_map.virt_addr) >> PUD_SHIFT);
Anup Patel671f9a32019-06-28 13:36:21 -0700362
Alexandre Ghiti0f02de42021-02-21 09:22:33 -0500363 return (uintptr_t)early_pmd;
Anup Patel671f9a32019-06-28 13:36:21 -0700364}
365
Atish Patrae8dcb612020-09-17 15:37:12 -0700366static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va)
367{
368 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
369}
370
Jisheng Zhang01062352021-05-16 21:15:56 +0800371static phys_addr_t __init alloc_pmd_late(uintptr_t va)
Atish Patrae8dcb612020-09-17 15:37:12 -0700372{
373 unsigned long vaddr;
374
375 vaddr = __get_free_page(GFP_KERNEL);
376 BUG_ON(!vaddr);
377 return __pa(vaddr);
378}
379
Anup Patel671f9a32019-06-28 13:36:21 -0700380static void __init create_pmd_mapping(pmd_t *pmdp,
381 uintptr_t va, phys_addr_t pa,
382 phys_addr_t sz, pgprot_t prot)
383{
384 pte_t *ptep;
385 phys_addr_t pte_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700386 uintptr_t pmd_idx = pmd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700387
388 if (sz == PMD_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700389 if (pmd_none(pmdp[pmd_idx]))
390 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700391 return;
392 }
393
Mike Rapoport974b9b22020-06-08 21:33:10 -0700394 if (pmd_none(pmdp[pmd_idx])) {
Atish Patrae8dcb612020-09-17 15:37:12 -0700395 pte_phys = pt_ops.alloc_pte(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700396 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
Atish Patrae8dcb612020-09-17 15:37:12 -0700397 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700398 memset(ptep, 0, PAGE_SIZE);
399 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700400 pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
Atish Patrae8dcb612020-09-17 15:37:12 -0700401 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700402 }
403
404 create_pte_mapping(ptep, va, pa, sz, prot);
405}
406
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100407static pud_t *__init get_pud_virt_early(phys_addr_t pa)
408{
409 return (pud_t *)((uintptr_t)pa);
410}
411
412static pud_t *__init get_pud_virt_fixmap(phys_addr_t pa)
413{
414 clear_fixmap(FIX_PUD);
415 return (pud_t *)set_fixmap_offset(FIX_PUD, pa);
416}
417
418static pud_t *__init get_pud_virt_late(phys_addr_t pa)
419{
420 return (pud_t *)__va(pa);
421}
422
423static phys_addr_t __init alloc_pud_early(uintptr_t va)
424{
425 /* Only one PUD is available for early mapping */
426 BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT);
427
428 return (uintptr_t)early_pud;
429}
430
431static phys_addr_t __init alloc_pud_fixmap(uintptr_t va)
432{
433 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
434}
435
436static phys_addr_t alloc_pud_late(uintptr_t va)
437{
438 unsigned long vaddr;
439
440 vaddr = __get_free_page(GFP_KERNEL);
441 BUG_ON(!vaddr);
442 return __pa(vaddr);
443}
444
445static void __init create_pud_mapping(pud_t *pudp,
446 uintptr_t va, phys_addr_t pa,
447 phys_addr_t sz, pgprot_t prot)
448{
449 pmd_t *nextp;
450 phys_addr_t next_phys;
451 uintptr_t pud_index = pud_index(va);
452
453 if (sz == PUD_SIZE) {
454 if (pud_val(pudp[pud_index]) == 0)
455 pudp[pud_index] = pfn_pud(PFN_DOWN(pa), prot);
456 return;
457 }
458
459 if (pud_val(pudp[pud_index]) == 0) {
460 next_phys = pt_ops.alloc_pmd(va);
461 pudp[pud_index] = pfn_pud(PFN_DOWN(next_phys), PAGE_TABLE);
462 nextp = pt_ops.get_pmd_virt(next_phys);
463 memset(nextp, 0, PAGE_SIZE);
464 } else {
465 next_phys = PFN_PHYS(_pud_pfn(pudp[pud_index]));
466 nextp = pt_ops.get_pmd_virt(next_phys);
467 }
468
469 create_pmd_mapping(nextp, va, pa, sz, prot);
470}
471
472#define pgd_next_t pud_t
473#define alloc_pgd_next(__va) (pgtable_l4_enabled ? \
474 pt_ops.alloc_pud(__va) : pt_ops.alloc_pmd(__va))
475#define get_pgd_next_virt(__pa) (pgtable_l4_enabled ? \
476 pt_ops.get_pud_virt(__pa) : (pgd_next_t *)pt_ops.get_pmd_virt(__pa))
Anup Patel671f9a32019-06-28 13:36:21 -0700477#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100478 (pgtable_l4_enabled ? \
479 create_pud_mapping(__nextp, __va, __pa, __sz, __prot) : \
480 create_pmd_mapping((pmd_t *)__nextp, __va, __pa, __sz, __prot))
481#define fixmap_pgd_next (pgtable_l4_enabled ? \
482 (uintptr_t)fixmap_pud : (uintptr_t)fixmap_pmd)
483#define trampoline_pgd_next (pgtable_l4_enabled ? \
484 (uintptr_t)trampoline_pud : (uintptr_t)trampoline_pmd)
485#define early_dtb_pgd_next (pgtable_l4_enabled ? \
486 (uintptr_t)early_dtb_pud : (uintptr_t)early_dtb_pmd)
Anup Patel671f9a32019-06-28 13:36:21 -0700487#else
488#define pgd_next_t pte_t
Atish Patrae8dcb612020-09-17 15:37:12 -0700489#define alloc_pgd_next(__va) pt_ops.alloc_pte(__va)
490#define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700491#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
492 create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100493#define fixmap_pgd_next ((uintptr_t)fixmap_pte)
494#define early_dtb_pgd_next ((uintptr_t)early_dtb_pmd)
495#define create_pud_mapping(__pmdp, __va, __pa, __sz, __prot)
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200496#define create_pmd_mapping(__pmdp, __va, __pa, __sz, __prot)
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100497#endif /* __PAGETABLE_PMD_FOLDED */
Anup Patel671f9a32019-06-28 13:36:21 -0700498
Atish Patrab91540d2020-09-17 15:37:15 -0700499void __init create_pgd_mapping(pgd_t *pgdp,
Anup Patel671f9a32019-06-28 13:36:21 -0700500 uintptr_t va, phys_addr_t pa,
501 phys_addr_t sz, pgprot_t prot)
502{
503 pgd_next_t *nextp;
504 phys_addr_t next_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700505 uintptr_t pgd_idx = pgd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700506
507 if (sz == PGDIR_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700508 if (pgd_val(pgdp[pgd_idx]) == 0)
509 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700510 return;
511 }
512
Mike Rapoport974b9b22020-06-08 21:33:10 -0700513 if (pgd_val(pgdp[pgd_idx]) == 0) {
Anup Patel671f9a32019-06-28 13:36:21 -0700514 next_phys = alloc_pgd_next(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700515 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700516 nextp = get_pgd_next_virt(next_phys);
517 memset(nextp, 0, PAGE_SIZE);
518 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700519 next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
Anup Patel671f9a32019-06-28 13:36:21 -0700520 nextp = get_pgd_next_virt(next_phys);
521 }
522
523 create_pgd_next_mapping(nextp, va, pa, sz, prot);
524}
525
526static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
527{
Zong Li0fdc6362019-11-08 01:00:40 -0800528 /* Upgrade to PMD_SIZE mappings whenever possible */
529 if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
530 return PAGE_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700531
Zong Li0fdc6362019-11-08 01:00:40 -0800532 return PMD_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700533}
534
Vitaly Wool44c92252021-04-13 02:35:14 -0400535#ifdef CONFIG_XIP_KERNEL
536/* called from head.S with MMU off */
537asmlinkage void __init __copy_data(void)
538{
Vitaly Woolf9ace4e2021-10-11 11:14:14 +0200539 void *from = (void *)(&__data_loc);
Vitaly Wool44c92252021-04-13 02:35:14 -0400540 void *to = (void *)CONFIG_PHYS_RAM_BASE;
Vitaly Woolf9ace4e2021-10-11 11:14:14 +0200541 size_t sz = (size_t)((uintptr_t)(&_end) - (uintptr_t)(&_sdata));
Vitaly Wool44c92252021-04-13 02:35:14 -0400542
543 memcpy(to, from, sz);
544}
545#endif
546
Alexandre Ghitie5c35fa02021-06-24 14:00:41 +0200547#ifdef CONFIG_STRICT_KERNEL_RWX
548static __init pgprot_t pgprot_from_va(uintptr_t va)
549{
550 if (is_va_kernel_text(va))
551 return PAGE_KERNEL_READ_EXEC;
552
553 /*
554 * In 64-bit kernel, the kernel mapping is outside the linear mapping so
555 * we must protect its linear mapping alias from being executed and
556 * written.
557 * And rodata section is marked readonly in mark_rodata_ro.
558 */
559 if (IS_ENABLED(CONFIG_64BIT) && is_va_kernel_lm_alias_text(va))
560 return PAGE_KERNEL_READ;
561
562 return PAGE_KERNEL;
563}
564
565void mark_rodata_ro(void)
566{
567 set_kernel_memory(__start_rodata, _data, set_memory_ro);
568 if (IS_ENABLED(CONFIG_64BIT))
569 set_kernel_memory(lm_alias(__start_rodata), lm_alias(_data),
570 set_memory_ro);
571
572 debug_checkwx();
573}
574#else
575static __init pgprot_t pgprot_from_va(uintptr_t va)
576{
577 if (IS_ENABLED(CONFIG_64BIT) && !is_kernel_mapping(va))
578 return PAGE_KERNEL;
579
580 return PAGE_KERNEL_EXEC;
581}
582#endif /* CONFIG_STRICT_KERNEL_RWX */
583
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100584#ifdef CONFIG_64BIT
585static void __init disable_pgtable_l4(void)
586{
587 pgtable_l4_enabled = false;
588 kernel_map.page_offset = PAGE_OFFSET_L3;
589 satp_mode = SATP_MODE_39;
590}
591
592/*
593 * There is a simple way to determine if 4-level is supported by the
594 * underlying hardware: establish 1:1 mapping in 4-level page table mode
595 * then read SATP to see if the configuration was taken into account
596 * meaning sv48 is supported.
597 */
598static __init void set_satp_mode(void)
599{
600 u64 identity_satp, hw_satp;
601 uintptr_t set_satp_mode_pmd;
602
603 set_satp_mode_pmd = ((unsigned long)set_satp_mode) & PMD_MASK;
604 create_pgd_mapping(early_pg_dir,
605 set_satp_mode_pmd, (uintptr_t)early_pud,
606 PGDIR_SIZE, PAGE_TABLE);
607 create_pud_mapping(early_pud,
608 set_satp_mode_pmd, (uintptr_t)early_pmd,
609 PUD_SIZE, PAGE_TABLE);
610 /* Handle the case where set_satp_mode straddles 2 PMDs */
611 create_pmd_mapping(early_pmd,
612 set_satp_mode_pmd, set_satp_mode_pmd,
613 PMD_SIZE, PAGE_KERNEL_EXEC);
614 create_pmd_mapping(early_pmd,
615 set_satp_mode_pmd + PMD_SIZE,
616 set_satp_mode_pmd + PMD_SIZE,
617 PMD_SIZE, PAGE_KERNEL_EXEC);
618
619 identity_satp = PFN_DOWN((uintptr_t)&early_pg_dir) | satp_mode;
620
621 local_flush_tlb_all();
622 csr_write(CSR_SATP, identity_satp);
623 hw_satp = csr_swap(CSR_SATP, 0ULL);
624 local_flush_tlb_all();
625
626 if (hw_satp != identity_satp)
627 disable_pgtable_l4();
628
629 memset(early_pg_dir, 0, PAGE_SIZE);
630 memset(early_pud, 0, PAGE_SIZE);
631 memset(early_pmd, 0, PAGE_SIZE);
632}
633#endif
634
Anup Patel387181d2019-03-26 08:03:47 +0000635/*
636 * setup_vm() is called from head.S with MMU-off.
637 *
638 * Following requirements should be honoured for setup_vm() to work
639 * correctly:
640 * 1) It should use PC-relative addressing for accessing kernel symbols.
641 * To achieve this we always use GCC cmodel=medany.
642 * 2) The compiler instrumentation for FTRACE will not work for setup_vm()
643 * so disable compiler instrumentation when FTRACE is enabled.
644 *
645 * Currently, the above requirements are honoured by using custom CFLAGS
646 * for init.o in mm/Makefile.
647 */
648
649#ifndef __riscv_cmodel_medany
Paul Walmsley6a527b62019-10-17 14:45:58 -0700650#error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
Anup Patel387181d2019-03-26 08:03:47 +0000651#endif
652
Vitaly Wool44c92252021-04-13 02:35:14 -0400653#ifdef CONFIG_XIP_KERNEL
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200654static void __init create_kernel_page_table(pgd_t *pgdir,
Alexandre Ghitie5c35fa02021-06-24 14:00:41 +0200655 __always_unused bool early)
Vitaly Wool44c92252021-04-13 02:35:14 -0400656{
657 uintptr_t va, end_va;
658
659 /* Map the flash resident part */
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200660 end_va = kernel_map.virt_addr + kernel_map.xiprom_sz;
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200661 for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE)
Vitaly Wool44c92252021-04-13 02:35:14 -0400662 create_pgd_mapping(pgdir, va,
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200663 kernel_map.xiprom + (va - kernel_map.virt_addr),
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200664 PMD_SIZE, PAGE_KERNEL_EXEC);
Vitaly Wool44c92252021-04-13 02:35:14 -0400665
666 /* Map the data in RAM */
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200667 end_va = kernel_map.virt_addr + XIP_OFFSET + kernel_map.size;
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200668 for (va = kernel_map.virt_addr + XIP_OFFSET; va < end_va; va += PMD_SIZE)
Vitaly Wool44c92252021-04-13 02:35:14 -0400669 create_pgd_mapping(pgdir, va,
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200670 kernel_map.phys_addr + (va - (kernel_map.virt_addr + XIP_OFFSET)),
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200671 PMD_SIZE, PAGE_KERNEL);
Vitaly Wool44c92252021-04-13 02:35:14 -0400672}
673#else
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200674static void __init create_kernel_page_table(pgd_t *pgdir, bool early)
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400675{
676 uintptr_t va, end_va;
677
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200678 end_va = kernel_map.virt_addr + kernel_map.size;
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200679 for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE)
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400680 create_pgd_mapping(pgdir, va,
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200681 kernel_map.phys_addr + (va - kernel_map.virt_addr),
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200682 PMD_SIZE,
Alexandre Ghitie5c35fa02021-06-24 14:00:41 +0200683 early ?
684 PAGE_KERNEL_EXEC : pgprot_from_va(va));
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400685}
Vitaly Wool44c92252021-04-13 02:35:14 -0400686#endif
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400687
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200688/*
689 * Setup a 4MB mapping that encompasses the device tree: for 64-bit kernel,
690 * this means 2 PMD entries whereas for 32-bit kernel, this is only 1 PGDIR
691 * entry.
692 */
693static void __init create_fdt_early_page_table(pgd_t *pgdir, uintptr_t dtb_pa)
694{
695#ifndef CONFIG_BUILTIN_DTB
696 uintptr_t pa = dtb_pa & ~(PMD_SIZE - 1);
697
698 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100699 IS_ENABLED(CONFIG_64BIT) ? early_dtb_pgd_next : pa,
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200700 PGDIR_SIZE,
701 IS_ENABLED(CONFIG_64BIT) ? PAGE_TABLE : PAGE_KERNEL);
702
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100703 if (pgtable_l4_enabled) {
704 create_pud_mapping(early_dtb_pud, DTB_EARLY_BASE_VA,
705 (uintptr_t)early_dtb_pmd, PUD_SIZE, PAGE_TABLE);
706 }
707
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200708 if (IS_ENABLED(CONFIG_64BIT)) {
709 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA,
710 pa, PMD_SIZE, PAGE_KERNEL);
711 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE,
712 pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
713 }
714
715 dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1));
716#else
717 /*
718 * For 64-bit kernel, __va can't be used since it would return a linear
719 * mapping address whereas dtb_early_va will be used before
720 * setup_vm_final installs the linear mapping. For 32-bit kernel, as the
721 * kernel is mapped in the linear mapping, that makes no difference.
722 */
723 dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa));
724#endif
725
726 dtb_early_pa = dtb_pa;
727}
728
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100729/*
730 * MMU is not enabled, the page tables are allocated directly using
731 * early_pmd/pud/p4d and the address returned is the physical one.
732 */
733void pt_ops_set_early(void)
734{
735 pt_ops.alloc_pte = alloc_pte_early;
736 pt_ops.get_pte_virt = get_pte_virt_early;
737#ifndef __PAGETABLE_PMD_FOLDED
738 pt_ops.alloc_pmd = alloc_pmd_early;
739 pt_ops.get_pmd_virt = get_pmd_virt_early;
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100740 pt_ops.alloc_pud = alloc_pud_early;
741 pt_ops.get_pud_virt = get_pud_virt_early;
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100742#endif
743}
744
745/*
746 * MMU is enabled but page table setup is not complete yet.
747 * fixmap page table alloc functions must be used as a means to temporarily
748 * map the allocated physical pages since the linear mapping does not exist yet.
749 *
750 * Note that this is called with MMU disabled, hence kernel_mapping_pa_to_va,
751 * but it will be used as described above.
752 */
753void pt_ops_set_fixmap(void)
754{
755 pt_ops.alloc_pte = kernel_mapping_pa_to_va((uintptr_t)alloc_pte_fixmap);
756 pt_ops.get_pte_virt = kernel_mapping_pa_to_va((uintptr_t)get_pte_virt_fixmap);
757#ifndef __PAGETABLE_PMD_FOLDED
758 pt_ops.alloc_pmd = kernel_mapping_pa_to_va((uintptr_t)alloc_pmd_fixmap);
759 pt_ops.get_pmd_virt = kernel_mapping_pa_to_va((uintptr_t)get_pmd_virt_fixmap);
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100760 pt_ops.alloc_pud = kernel_mapping_pa_to_va((uintptr_t)alloc_pud_fixmap);
761 pt_ops.get_pud_virt = kernel_mapping_pa_to_va((uintptr_t)get_pud_virt_fixmap);
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100762#endif
763}
764
765/*
766 * MMU is enabled and page table setup is complete, so from now, we can use
767 * generic page allocation functions to setup page table.
768 */
769void pt_ops_set_late(void)
770{
771 pt_ops.alloc_pte = alloc_pte_late;
772 pt_ops.get_pte_virt = get_pte_virt_late;
773#ifndef __PAGETABLE_PMD_FOLDED
774 pt_ops.alloc_pmd = alloc_pmd_late;
775 pt_ops.get_pmd_virt = get_pmd_virt_late;
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100776 pt_ops.alloc_pud = alloc_pud_late;
777 pt_ops.get_pud_virt = get_pud_virt_late;
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100778#endif
779}
780
Anup Patel671f9a32019-06-28 13:36:21 -0700781asmlinkage void __init setup_vm(uintptr_t dtb_pa)
Anup Patel6f1e9e92019-02-13 16:38:36 +0530782{
Alexandre Ghiti6f3e5fd2021-07-23 15:01:26 +0200783 pmd_t __maybe_unused fix_bmap_spmd, fix_bmap_epmd;
Anup Patel6f1e9e92019-02-13 16:38:36 +0530784
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200785 kernel_map.virt_addr = KERNEL_LINK_ADDR;
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100786 kernel_map.page_offset = _AC(CONFIG_PAGE_OFFSET, UL);
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200787
Vitaly Wool44c92252021-04-13 02:35:14 -0400788#ifdef CONFIG_XIP_KERNEL
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200789 kernel_map.xiprom = (uintptr_t)CONFIG_XIP_PHYS_ADDR;
790 kernel_map.xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom);
Vitaly Wool44c92252021-04-13 02:35:14 -0400791
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +0200792 phys_ram_base = CONFIG_PHYS_RAM_BASE;
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200793 kernel_map.phys_addr = (uintptr_t)CONFIG_PHYS_RAM_BASE;
794 kernel_map.size = (uintptr_t)(&_end) - (uintptr_t)(&_sdata);
Vitaly Wool44c92252021-04-13 02:35:14 -0400795
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200796 kernel_map.va_kernel_xip_pa_offset = kernel_map.virt_addr - kernel_map.xiprom;
Vitaly Wool44c92252021-04-13 02:35:14 -0400797#else
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200798 kernel_map.phys_addr = (uintptr_t)(&_start);
799 kernel_map.size = (uintptr_t)(&_end) - kernel_map.phys_addr;
Vitaly Wool44c92252021-04-13 02:35:14 -0400800#endif
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100801
802#if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
803 set_satp_mode();
804#endif
805
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200806 kernel_map.va_pa_offset = PAGE_OFFSET - kernel_map.phys_addr;
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200807 kernel_map.va_kernel_pa_offset = kernel_map.virt_addr - kernel_map.phys_addr;
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400808
Kenneth Leefb31f0a2021-07-28 15:15:57 +0800809 riscv_pfn_base = PFN_DOWN(kernel_map.phys_addr);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530810
Alexandre Ghitif7ae0232021-12-06 11:46:45 +0100811 /*
812 * The default maximal physical memory size is KERN_VIRT_SIZE for 32-bit
813 * kernel, whereas for 64-bit kernel, the end of the virtual address
814 * space is occupied by the modules/BPF/kernel mappings which reduces
815 * the available size of the linear mapping.
816 */
817 memory_limit = KERN_VIRT_SIZE - (IS_ENABLED(CONFIG_64BIT) ? SZ_4G : 0);
818
Anup Patel6f1e9e92019-02-13 16:38:36 +0530819 /* Sanity check alignment and size */
820 BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200821 BUG_ON((kernel_map.phys_addr % PMD_SIZE) != 0);
Anup Patel671f9a32019-06-28 13:36:21 -0700822
Alexandre Ghitidb6b84a2021-06-29 11:13:48 +0200823#ifdef CONFIG_64BIT
824 /*
825 * The last 4K bytes of the addressable memory can not be mapped because
826 * of IS_ERR_VALUE macro.
827 */
828 BUG_ON((kernel_map.virt_addr + kernel_map.size) > ADDRESS_SPACE_END - SZ_4K);
829#endif
830
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100831 pt_ops_set_early();
832
Anup Patel671f9a32019-06-28 13:36:21 -0700833 /* Setup early PGD for fixmap */
834 create_pgd_mapping(early_pg_dir, FIXADDR_START,
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100835 fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530836
837#ifndef __PAGETABLE_PMD_FOLDED
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100838 /* Setup fixmap PUD and PMD */
839 if (pgtable_l4_enabled)
840 create_pud_mapping(fixmap_pud, FIXADDR_START,
841 (uintptr_t)fixmap_pmd, PUD_SIZE, PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700842 create_pmd_mapping(fixmap_pmd, FIXADDR_START,
843 (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
844 /* Setup trampoline PGD and PMD */
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200845 create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr,
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100846 trampoline_pgd_next, PGDIR_SIZE, PAGE_TABLE);
847 if (pgtable_l4_enabled)
848 create_pud_mapping(trampoline_pud, kernel_map.virt_addr,
849 (uintptr_t)trampoline_pmd, PUD_SIZE, PAGE_TABLE);
Vitaly Wool44c92252021-04-13 02:35:14 -0400850#ifdef CONFIG_XIP_KERNEL
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200851 create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr,
852 kernel_map.xiprom, PMD_SIZE, PAGE_KERNEL_EXEC);
Vitaly Wool44c92252021-04-13 02:35:14 -0400853#else
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200854 create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr,
855 kernel_map.phys_addr, PMD_SIZE, PAGE_KERNEL_EXEC);
Vitaly Wool44c92252021-04-13 02:35:14 -0400856#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530857#else
Anup Patel671f9a32019-06-28 13:36:21 -0700858 /* Setup trampoline PGD */
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200859 create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr,
860 kernel_map.phys_addr, PGDIR_SIZE, PAGE_KERNEL_EXEC);
Anup Patel671f9a32019-06-28 13:36:21 -0700861#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530862
Anup Patel671f9a32019-06-28 13:36:21 -0700863 /*
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400864 * Setup early PGD covering entire kernel which will allow
Anup Patel671f9a32019-06-28 13:36:21 -0700865 * us to reach paging_init(). We map all memory banks later
866 * in setup_vm_final() below.
867 */
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200868 create_kernel_page_table(early_pg_dir, true);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530869
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200870 /* Setup early mapping for FDT early scan */
871 create_fdt_early_page_table(early_pg_dir, dtb_pa);
Atish Patra6262f662020-09-17 15:37:11 -0700872
873 /*
874 * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
875 * range can not span multiple pmds.
876 */
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100877 BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
Atish Patra6262f662020-09-17 15:37:11 -0700878 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
879
880#ifndef __PAGETABLE_PMD_FOLDED
881 /*
882 * Early ioremap fixmap is already created as it lies within first 2MB
883 * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END
884 * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn
885 * the user if not.
886 */
887 fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))];
888 fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))];
889 if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) {
890 WARN_ON(1);
891 pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n",
892 pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd));
893 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
894 fix_to_virt(FIX_BTMAP_BEGIN));
895 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
896 fix_to_virt(FIX_BTMAP_END));
897
898 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
899 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
900 }
901#endif
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100902
903 pt_ops_set_fixmap();
Anup Patel671f9a32019-06-28 13:36:21 -0700904}
905
906static void __init setup_vm_final(void)
907{
908 uintptr_t va, map_size;
909 phys_addr_t pa, start, end;
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700910 u64 i;
Anup Patel671f9a32019-06-28 13:36:21 -0700911
Anup Patel671f9a32019-06-28 13:36:21 -0700912 /* Setup swapper PGD for fixmap */
913 create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
Zong Liac51e002020-01-02 11:12:40 +0800914 __pa_symbol(fixmap_pgd_next),
Anup Patel671f9a32019-06-28 13:36:21 -0700915 PGDIR_SIZE, PAGE_TABLE);
916
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400917 /* Map all memory banks in the linear mapping */
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700918 for_each_mem_range(i, &start, &end) {
Anup Patel671f9a32019-06-28 13:36:21 -0700919 if (start >= end)
920 break;
Anup Patel671f9a32019-06-28 13:36:21 -0700921 if (start <= __pa(PAGE_OFFSET) &&
922 __pa(PAGE_OFFSET) < end)
923 start = __pa(PAGE_OFFSET);
Alexandre Ghitic99127c2021-06-29 11:13:47 +0200924 if (end >= __pa(PAGE_OFFSET) + memory_limit)
925 end = __pa(PAGE_OFFSET) + memory_limit;
Anup Patel671f9a32019-06-28 13:36:21 -0700926
927 map_size = best_map_size(start, end - start);
928 for (pa = start; pa < end; pa += map_size) {
929 va = (uintptr_t)__va(pa);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400930
Alexandre Ghitie5c35fa02021-06-24 14:00:41 +0200931 create_pgd_mapping(swapper_pg_dir, va, pa, map_size,
932 pgprot_from_va(va));
Anup Patel671f9a32019-06-28 13:36:21 -0700933 }
Anup Patel6f1e9e92019-02-13 16:38:36 +0530934 }
Anup Patelf2c17aa2019-01-07 20:57:01 +0530935
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400936#ifdef CONFIG_64BIT
937 /* Map the kernel */
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200938 create_kernel_page_table(swapper_pg_dir, false);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400939#endif
940
Alexandre Ghiti2efad172021-12-06 11:46:46 +0100941#ifdef CONFIG_KASAN
942 kasan_swapper_init();
943#endif
944
Anup Patel671f9a32019-06-28 13:36:21 -0700945 /* Clear fixmap PTE and PMD mappings */
946 clear_fixmap(FIX_PTE);
947 clear_fixmap(FIX_PMD);
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100948 clear_fixmap(FIX_PUD);
Anup Patel671f9a32019-06-28 13:36:21 -0700949
950 /* Move to swapper page table */
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100951 csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | satp_mode);
Anup Patel671f9a32019-06-28 13:36:21 -0700952 local_flush_tlb_all();
Atish Patrae8dcb612020-09-17 15:37:12 -0700953
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100954 pt_ops_set_late();
Anup Patel671f9a32019-06-28 13:36:21 -0700955}
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100956#else
957asmlinkage void __init setup_vm(uintptr_t dtb_pa)
958{
959 dtb_early_va = (void *)dtb_pa;
Atish Patraa78c6f52020-10-01 12:04:56 -0700960 dtb_early_pa = dtb_pa;
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100961}
962
963static inline void setup_vm_final(void)
964{
965}
966#endif /* CONFIG_MMU */
Anup Patel671f9a32019-06-28 13:36:21 -0700967
Nick Kossifidise53d2812021-04-19 03:55:38 +0300968#ifdef CONFIG_KEXEC_CORE
969/*
970 * reserve_crashkernel() - reserves memory for crash kernel
971 *
972 * This function reserves memory area given in "crashkernel=" kernel command
973 * line parameter. The memory reserved is used by dump capture kernel when
974 * primary kernel is crashing.
975 */
976static void __init reserve_crashkernel(void)
977{
978 unsigned long long crash_base = 0;
979 unsigned long long crash_size = 0;
980 unsigned long search_start = memblock_start_of_DRAM();
981 unsigned long search_end = memblock_end_of_DRAM();
982
983 int ret = 0;
984
Nick Kossifidis56409752021-04-19 03:55:39 +0300985 /*
986 * Don't reserve a region for a crash kernel on a crash kernel
987 * since it doesn't make much sense and we have limited memory
988 * resources.
989 */
990#ifdef CONFIG_CRASH_DUMP
991 if (is_kdump_kernel()) {
992 pr_info("crashkernel: ignoring reservation request\n");
993 return;
994 }
995#endif
996
Nick Kossifidise53d2812021-04-19 03:55:38 +0300997 ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),
998 &crash_size, &crash_base);
999 if (ret || !crash_size)
1000 return;
1001
1002 crash_size = PAGE_ALIGN(crash_size);
1003
Mike Rapoporta7259df2021-09-02 15:00:26 -07001004 if (crash_base) {
1005 search_start = crash_base;
1006 search_end = crash_base + crash_size;
Nick Kossifidise53d2812021-04-19 03:55:38 +03001007 }
Mike Rapoporta7259df2021-09-02 15:00:26 -07001008
1009 /*
1010 * Current riscv boot protocol requires 2MB alignment for
1011 * RV64 and 4MB alignment for RV32 (hugepage size)
1012 */
1013 crash_base = memblock_phys_alloc_range(crash_size, PMD_SIZE,
1014 search_start, search_end);
1015 if (crash_base == 0) {
1016 pr_warn("crashkernel: couldn't allocate %lldKB\n",
1017 crash_size >> 10);
1018 return;
1019 }
Nick Kossifidise53d2812021-04-19 03:55:38 +03001020
1021 pr_info("crashkernel: reserved 0x%016llx - 0x%016llx (%lld MB)\n",
1022 crash_base, crash_base + crash_size, crash_size >> 20);
1023
1024 crashk_res.start = crash_base;
1025 crashk_res.end = crash_base + crash_size - 1;
1026}
1027#endif /* CONFIG_KEXEC_CORE */
1028
Anup Patel671f9a32019-06-28 13:36:21 -07001029void __init paging_init(void)
1030{
Kefeng Wangf842f5f2021-05-10 19:42:22 +08001031 setup_bootmem();
Anup Patel671f9a32019-06-28 13:36:21 -07001032 setup_vm_final();
Atish Patracbd34f42020-11-18 16:38:27 -08001033}
1034
1035void __init misc_mem_init(void)
1036{
Kefeng Wangf6e5aed2021-02-25 14:54:17 +08001037 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
Atish Patra4f0e8ee2020-11-18 16:38:29 -08001038 arch_numa_init();
Atish Patracbd34f42020-11-18 16:38:27 -08001039 sparse_init();
Anup Patel671f9a32019-06-28 13:36:21 -07001040 zone_sizes_init();
Nick Kossifidise53d2812021-04-19 03:55:38 +03001041#ifdef CONFIG_KEXEC_CORE
1042 reserve_crashkernel();
1043#endif
Atish Patra4f0e8ee2020-11-18 16:38:29 -08001044 memblock_dump_all();
Anup Patel6f1e9e92019-02-13 16:38:36 +05301045}
Logan Gunthorped95f1a52019-08-28 15:40:54 -06001046
Kefeng Wang9fe57d82019-10-23 11:23:02 +08001047#ifdef CONFIG_SPARSEMEM_VMEMMAP
Logan Gunthorped95f1a52019-08-28 15:40:54 -06001048int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
1049 struct vmem_altmap *altmap)
1050{
Anshuman Khandual1d9cfee2020-08-06 23:23:19 -07001051 return vmemmap_populate_basepages(start, end, node, NULL);
Logan Gunthorped95f1a52019-08-28 15:40:54 -06001052}
1053#endif