Thomas Gleixner | 50acfb2 | 2019-05-29 07:18:00 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2012 Regents of the University of California |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 4 | * Copyright (C) 2019 Western Digital Corporation or its affiliates. |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <linux/init.h> |
| 8 | #include <linux/mm.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 9 | #include <linux/memblock.h> |
Mike Rapoport | 57c8a66 | 2018-10-30 15:09:49 -0700 | [diff] [blame] | 10 | #include <linux/initrd.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 11 | #include <linux/swap.h> |
Christoph Hellwig | 5ec9c4f | 2018-01-16 09:37:50 +0100 | [diff] [blame] | 12 | #include <linux/sizes.h> |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 13 | #include <linux/of_fdt.h> |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 14 | #include <linux/libfdt.h> |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 15 | #include <linux/set_memory.h> |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 16 | #include <linux/dma-map-ops.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 17 | |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 18 | #include <asm/fixmap.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 19 | #include <asm/tlbflush.h> |
| 20 | #include <asm/sections.h> |
Palmer Dabbelt | 2d26825 | 2020-04-14 13:43:24 +0900 | [diff] [blame] | 21 | #include <asm/soc.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 22 | #include <asm/io.h> |
Zong Li | b422d28 | 2020-06-03 16:03:55 -0700 | [diff] [blame] | 23 | #include <asm/ptdump.h> |
Atish Patra | 4f0e8ee | 2020-11-18 16:38:29 -0800 | [diff] [blame] | 24 | #include <asm/numa.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 25 | |
Paul Walmsley | ffaee27 | 2019-10-17 15:00:17 -0700 | [diff] [blame] | 26 | #include "../kernel/head.h" |
| 27 | |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 28 | unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] |
| 29 | __page_aligned_bss; |
| 30 | EXPORT_SYMBOL(empty_zero_page); |
| 31 | |
Anup Patel | d90d45d | 2019-06-07 06:01:29 +0000 | [diff] [blame] | 32 | extern char _start[]; |
Anup Patel | 8f3a2b4 | 2020-09-17 15:37:10 -0700 | [diff] [blame] | 33 | #define DTB_EARLY_BASE_VA PGDIR_SIZE |
| 34 | void *dtb_early_va __initdata; |
| 35 | uintptr_t dtb_early_pa __initdata; |
Anup Patel | d90d45d | 2019-06-07 06:01:29 +0000 | [diff] [blame] | 36 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 37 | struct pt_alloc_ops { |
| 38 | pte_t *(*get_pte_virt)(phys_addr_t pa); |
| 39 | phys_addr_t (*alloc_pte)(uintptr_t va); |
| 40 | #ifndef __PAGETABLE_PMD_FOLDED |
| 41 | pmd_t *(*get_pmd_virt)(phys_addr_t pa); |
| 42 | phys_addr_t (*alloc_pmd)(uintptr_t va); |
| 43 | #endif |
| 44 | }; |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 45 | |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 46 | static phys_addr_t dma32_phys_limit __ro_after_init; |
| 47 | |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 48 | static void __init zone_sizes_init(void) |
| 49 | { |
Christoph Hellwig | 5ec9c4f | 2018-01-16 09:37:50 +0100 | [diff] [blame] | 50 | unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, }; |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 51 | |
Zong Li | d5fad48 | 2018-06-25 16:49:37 +0800 | [diff] [blame] | 52 | #ifdef CONFIG_ZONE_DMA32 |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 53 | max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit); |
Zong Li | d5fad48 | 2018-06-25 16:49:37 +0800 | [diff] [blame] | 54 | #endif |
Christoph Hellwig | 5ec9c4f | 2018-01-16 09:37:50 +0100 | [diff] [blame] | 55 | max_zone_pfns[ZONE_NORMAL] = max_low_pfn; |
| 56 | |
Mike Rapoport | 9691a07 | 2020-06-03 15:57:10 -0700 | [diff] [blame] | 57 | free_area_init(max_zone_pfns); |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 58 | } |
| 59 | |
Christoph Hellwig | 6bd33e1 | 2019-10-28 13:10:41 +0100 | [diff] [blame] | 60 | static void setup_zero_page(void) |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 61 | { |
| 62 | memset((void *)empty_zero_page, 0, PAGE_SIZE); |
| 63 | } |
| 64 | |
Kefeng Wang | 8fa3cdf | 2020-05-14 19:53:35 +0800 | [diff] [blame] | 65 | #if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM) |
Yash Shah | 2cc6c4a | 2019-11-18 05:58:34 +0000 | [diff] [blame] | 66 | static inline void print_mlk(char *name, unsigned long b, unsigned long t) |
| 67 | { |
| 68 | pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t, |
| 69 | (((t) - (b)) >> 10)); |
| 70 | } |
| 71 | |
| 72 | static inline void print_mlm(char *name, unsigned long b, unsigned long t) |
| 73 | { |
| 74 | pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t, |
| 75 | (((t) - (b)) >> 20)); |
| 76 | } |
| 77 | |
| 78 | static void print_vm_layout(void) |
| 79 | { |
| 80 | pr_notice("Virtual kernel memory layout:\n"); |
| 81 | print_mlk("fixmap", (unsigned long)FIXADDR_START, |
| 82 | (unsigned long)FIXADDR_TOP); |
| 83 | print_mlm("pci io", (unsigned long)PCI_IO_START, |
| 84 | (unsigned long)PCI_IO_END); |
| 85 | print_mlm("vmemmap", (unsigned long)VMEMMAP_START, |
| 86 | (unsigned long)VMEMMAP_END); |
| 87 | print_mlm("vmalloc", (unsigned long)VMALLOC_START, |
| 88 | (unsigned long)VMALLOC_END); |
| 89 | print_mlm("lowmem", (unsigned long)PAGE_OFFSET, |
| 90 | (unsigned long)high_memory); |
| 91 | } |
| 92 | #else |
| 93 | static void print_vm_layout(void) { } |
| 94 | #endif /* CONFIG_DEBUG_VM */ |
| 95 | |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 96 | void __init mem_init(void) |
| 97 | { |
| 98 | #ifdef CONFIG_FLATMEM |
| 99 | BUG_ON(!mem_map); |
| 100 | #endif /* CONFIG_FLATMEM */ |
| 101 | |
| 102 | high_memory = (void *)(__va(PFN_PHYS(max_low_pfn))); |
Mike Rapoport | c6ffc5c | 2018-10-30 15:09:30 -0700 | [diff] [blame] | 103 | memblock_free_all(); |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 104 | |
| 105 | mem_init_print_info(NULL); |
Yash Shah | 2cc6c4a | 2019-11-18 05:58:34 +0000 | [diff] [blame] | 106 | print_vm_layout(); |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 107 | } |
| 108 | |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 109 | void __init setup_bootmem(void) |
| 110 | { |
Atish Patra | 1bd14a6 | 2020-10-07 14:51:59 -0700 | [diff] [blame] | 111 | phys_addr_t mem_start = 0; |
| 112 | phys_addr_t start, end = 0; |
Zong Li | ac51e00 | 2020-01-02 11:12:40 +0800 | [diff] [blame] | 113 | phys_addr_t vmlinux_end = __pa_symbol(&_end); |
| 114 | phys_addr_t vmlinux_start = __pa_symbol(&_start); |
Mike Rapoport | b10d6bc | 2020-10-13 16:58:08 -0700 | [diff] [blame] | 115 | u64 i; |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 116 | |
| 117 | /* Find the memory region containing the kernel */ |
Mike Rapoport | b10d6bc | 2020-10-13 16:58:08 -0700 | [diff] [blame] | 118 | for_each_mem_range(i, &start, &end) { |
| 119 | phys_addr_t size = end - start; |
Atish Patra | 1bd14a6 | 2020-10-07 14:51:59 -0700 | [diff] [blame] | 120 | if (!mem_start) |
Mike Rapoport | b10d6bc | 2020-10-13 16:58:08 -0700 | [diff] [blame] | 121 | mem_start = start; |
| 122 | if (start <= vmlinux_start && vmlinux_end <= end) |
| 123 | BUG_ON(size == 0); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 124 | } |
Atish Patra | fa5a198 | 2020-07-15 16:30:09 -0700 | [diff] [blame] | 125 | |
| 126 | /* |
Atish Patra | 1bd14a6 | 2020-10-07 14:51:59 -0700 | [diff] [blame] | 127 | * The maximal physical memory size is -PAGE_OFFSET. |
| 128 | * Make sure that any memory beyond mem_start + (-PAGE_OFFSET) is removed |
| 129 | * as it is unusable by kernel. |
Atish Patra | fa5a198 | 2020-07-15 16:30:09 -0700 | [diff] [blame] | 130 | */ |
Atish Patra | de043da | 2020-12-18 16:13:56 -0800 | [diff] [blame] | 131 | memblock_enforce_memory_limit(-PAGE_OFFSET); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 132 | |
Anup Patel | d90d45d | 2019-06-07 06:01:29 +0000 | [diff] [blame] | 133 | /* Reserve from the start of the kernel to the end of the kernel */ |
| 134 | memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start); |
| 135 | |
Vincent Chen | c749bb2 | 2020-04-27 14:59:24 +0800 | [diff] [blame] | 136 | max_pfn = PFN_DOWN(memblock_end_of_DRAM()); |
| 137 | max_low_pfn = max_pfn; |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 138 | dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn)); |
Atish Patra | d0d8aae | 2020-07-15 16:30:07 -0700 | [diff] [blame] | 139 | set_max_mapnr(max_low_pfn); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 140 | |
Kefeng Wang | aec33b5 | 2021-01-15 13:46:06 +0800 | [diff] [blame] | 141 | reserve_initrd_mem(); |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 142 | /* |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 143 | * If DTB is built in, no need to reserve its memblock. |
| 144 | * Otherwise, do reserve it but avoid using |
| 145 | * early_init_fdt_reserve_self() since __pa() does |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 146 | * not work for DTB pointers that are fixmap addresses |
| 147 | */ |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 148 | if (!IS_ENABLED(CONFIG_BUILTIN_DTB)) |
| 149 | memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va)); |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 150 | |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 151 | early_init_fdt_scan_reserved_mem(); |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 152 | dma_contiguous_reserve(dma32_phys_limit); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 153 | memblock_allow_resize(); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 154 | } |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 155 | |
Christoph Hellwig | 6bd33e1 | 2019-10-28 13:10:41 +0100 | [diff] [blame] | 156 | #ifdef CONFIG_MMU |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 157 | static struct pt_alloc_ops pt_ops; |
| 158 | |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 159 | unsigned long va_pa_offset; |
| 160 | EXPORT_SYMBOL(va_pa_offset); |
| 161 | unsigned long pfn_base; |
| 162 | EXPORT_SYMBOL(pfn_base); |
| 163 | |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 164 | pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 165 | pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss; |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 166 | pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 167 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 168 | pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE); |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 169 | |
| 170 | void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot) |
| 171 | { |
| 172 | unsigned long addr = __fix_to_virt(idx); |
| 173 | pte_t *ptep; |
| 174 | |
| 175 | BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); |
| 176 | |
| 177 | ptep = &fixmap_pte[pte_index(addr)]; |
| 178 | |
Greentime Hu | 21190b7 | 2020-08-04 11:02:05 +0800 | [diff] [blame] | 179 | if (pgprot_val(prot)) |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 180 | set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot)); |
Greentime Hu | 21190b7 | 2020-08-04 11:02:05 +0800 | [diff] [blame] | 181 | else |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 182 | pte_clear(&init_mm, addr, ptep); |
Greentime Hu | 21190b7 | 2020-08-04 11:02:05 +0800 | [diff] [blame] | 183 | local_flush_tlb_page(addr); |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 184 | } |
| 185 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 186 | static inline pte_t *__init get_pte_virt_early(phys_addr_t pa) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 187 | { |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 188 | return (pte_t *)((uintptr_t)pa); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 189 | } |
| 190 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 191 | static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa) |
| 192 | { |
| 193 | clear_fixmap(FIX_PTE); |
| 194 | return (pte_t *)set_fixmap_offset(FIX_PTE, pa); |
| 195 | } |
| 196 | |
| 197 | static inline pte_t *get_pte_virt_late(phys_addr_t pa) |
| 198 | { |
| 199 | return (pte_t *) __va(pa); |
| 200 | } |
| 201 | |
| 202 | static inline phys_addr_t __init alloc_pte_early(uintptr_t va) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 203 | { |
| 204 | /* |
| 205 | * We only create PMD or PGD early mappings so we |
| 206 | * should never reach here with MMU disabled. |
| 207 | */ |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 208 | BUG(); |
| 209 | } |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 210 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 211 | static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va) |
| 212 | { |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 213 | return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); |
| 214 | } |
| 215 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 216 | static phys_addr_t alloc_pte_late(uintptr_t va) |
| 217 | { |
| 218 | unsigned long vaddr; |
| 219 | |
| 220 | vaddr = __get_free_page(GFP_KERNEL); |
| 221 | if (!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr))) |
| 222 | BUG(); |
| 223 | return __pa(vaddr); |
| 224 | } |
| 225 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 226 | static void __init create_pte_mapping(pte_t *ptep, |
| 227 | uintptr_t va, phys_addr_t pa, |
| 228 | phys_addr_t sz, pgprot_t prot) |
| 229 | { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 230 | uintptr_t pte_idx = pte_index(va); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 231 | |
| 232 | BUG_ON(sz != PAGE_SIZE); |
| 233 | |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 234 | if (pte_none(ptep[pte_idx])) |
| 235 | ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 236 | } |
| 237 | |
| 238 | #ifndef __PAGETABLE_PMD_FOLDED |
| 239 | |
| 240 | pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss; |
| 241 | pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss; |
Alexandre Ghiti | 0f02de4 | 2021-02-21 09:22:33 -0500 | [diff] [blame^] | 242 | pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE); |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 243 | pmd_t early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 244 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 245 | static pmd_t *__init get_pmd_virt_early(phys_addr_t pa) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 246 | { |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 247 | /* Before MMU is enabled */ |
| 248 | return (pmd_t *)((uintptr_t)pa); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 249 | } |
| 250 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 251 | static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa) |
| 252 | { |
| 253 | clear_fixmap(FIX_PMD); |
| 254 | return (pmd_t *)set_fixmap_offset(FIX_PMD, pa); |
| 255 | } |
| 256 | |
| 257 | static pmd_t *get_pmd_virt_late(phys_addr_t pa) |
| 258 | { |
| 259 | return (pmd_t *) __va(pa); |
| 260 | } |
| 261 | |
| 262 | static phys_addr_t __init alloc_pmd_early(uintptr_t va) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 263 | { |
Alexandre Ghiti | 0f02de4 | 2021-02-21 09:22:33 -0500 | [diff] [blame^] | 264 | BUG_ON((va - PAGE_OFFSET) >> PGDIR_SHIFT); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 265 | |
Alexandre Ghiti | 0f02de4 | 2021-02-21 09:22:33 -0500 | [diff] [blame^] | 266 | return (uintptr_t)early_pmd; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 267 | } |
| 268 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 269 | static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va) |
| 270 | { |
| 271 | return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); |
| 272 | } |
| 273 | |
| 274 | static phys_addr_t alloc_pmd_late(uintptr_t va) |
| 275 | { |
| 276 | unsigned long vaddr; |
| 277 | |
| 278 | vaddr = __get_free_page(GFP_KERNEL); |
| 279 | BUG_ON(!vaddr); |
| 280 | return __pa(vaddr); |
| 281 | } |
| 282 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 283 | static void __init create_pmd_mapping(pmd_t *pmdp, |
| 284 | uintptr_t va, phys_addr_t pa, |
| 285 | phys_addr_t sz, pgprot_t prot) |
| 286 | { |
| 287 | pte_t *ptep; |
| 288 | phys_addr_t pte_phys; |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 289 | uintptr_t pmd_idx = pmd_index(va); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 290 | |
| 291 | if (sz == PMD_SIZE) { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 292 | if (pmd_none(pmdp[pmd_idx])) |
| 293 | pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 294 | return; |
| 295 | } |
| 296 | |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 297 | if (pmd_none(pmdp[pmd_idx])) { |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 298 | pte_phys = pt_ops.alloc_pte(va); |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 299 | pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE); |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 300 | ptep = pt_ops.get_pte_virt(pte_phys); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 301 | memset(ptep, 0, PAGE_SIZE); |
| 302 | } else { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 303 | pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx])); |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 304 | ptep = pt_ops.get_pte_virt(pte_phys); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 305 | } |
| 306 | |
| 307 | create_pte_mapping(ptep, va, pa, sz, prot); |
| 308 | } |
| 309 | |
| 310 | #define pgd_next_t pmd_t |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 311 | #define alloc_pgd_next(__va) pt_ops.alloc_pmd(__va) |
| 312 | #define get_pgd_next_virt(__pa) pt_ops.get_pmd_virt(__pa) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 313 | #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \ |
| 314 | create_pmd_mapping(__nextp, __va, __pa, __sz, __prot) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 315 | #define fixmap_pgd_next fixmap_pmd |
| 316 | #else |
| 317 | #define pgd_next_t pte_t |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 318 | #define alloc_pgd_next(__va) pt_ops.alloc_pte(__va) |
| 319 | #define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 320 | #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \ |
| 321 | create_pte_mapping(__nextp, __va, __pa, __sz, __prot) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 322 | #define fixmap_pgd_next fixmap_pte |
| 323 | #endif |
| 324 | |
Atish Patra | b91540d | 2020-09-17 15:37:15 -0700 | [diff] [blame] | 325 | void __init create_pgd_mapping(pgd_t *pgdp, |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 326 | uintptr_t va, phys_addr_t pa, |
| 327 | phys_addr_t sz, pgprot_t prot) |
| 328 | { |
| 329 | pgd_next_t *nextp; |
| 330 | phys_addr_t next_phys; |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 331 | uintptr_t pgd_idx = pgd_index(va); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 332 | |
| 333 | if (sz == PGDIR_SIZE) { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 334 | if (pgd_val(pgdp[pgd_idx]) == 0) |
| 335 | pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 336 | return; |
| 337 | } |
| 338 | |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 339 | if (pgd_val(pgdp[pgd_idx]) == 0) { |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 340 | next_phys = alloc_pgd_next(va); |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 341 | pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 342 | nextp = get_pgd_next_virt(next_phys); |
| 343 | memset(nextp, 0, PAGE_SIZE); |
| 344 | } else { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 345 | next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx])); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 346 | nextp = get_pgd_next_virt(next_phys); |
| 347 | } |
| 348 | |
| 349 | create_pgd_next_mapping(nextp, va, pa, sz, prot); |
| 350 | } |
| 351 | |
| 352 | static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size) |
| 353 | { |
Zong Li | 0fdc636 | 2019-11-08 01:00:40 -0800 | [diff] [blame] | 354 | /* Upgrade to PMD_SIZE mappings whenever possible */ |
| 355 | if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1))) |
| 356 | return PAGE_SIZE; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 357 | |
Zong Li | 0fdc636 | 2019-11-08 01:00:40 -0800 | [diff] [blame] | 358 | return PMD_SIZE; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 359 | } |
| 360 | |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 361 | /* |
| 362 | * setup_vm() is called from head.S with MMU-off. |
| 363 | * |
| 364 | * Following requirements should be honoured for setup_vm() to work |
| 365 | * correctly: |
| 366 | * 1) It should use PC-relative addressing for accessing kernel symbols. |
| 367 | * To achieve this we always use GCC cmodel=medany. |
| 368 | * 2) The compiler instrumentation for FTRACE will not work for setup_vm() |
| 369 | * so disable compiler instrumentation when FTRACE is enabled. |
| 370 | * |
| 371 | * Currently, the above requirements are honoured by using custom CFLAGS |
| 372 | * for init.o in mm/Makefile. |
| 373 | */ |
| 374 | |
| 375 | #ifndef __riscv_cmodel_medany |
Paul Walmsley | 6a527b6 | 2019-10-17 14:45:58 -0700 | [diff] [blame] | 376 | #error "setup_vm() is called from head.S before relocate so it should not use absolute addressing." |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 377 | #endif |
| 378 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 379 | asmlinkage void __init setup_vm(uintptr_t dtb_pa) |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 380 | { |
Anup Patel | 8f3a2b4 | 2020-09-17 15:37:10 -0700 | [diff] [blame] | 381 | uintptr_t va, pa, end_va; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 382 | uintptr_t load_pa = (uintptr_t)(&_start); |
| 383 | uintptr_t load_sz = (uintptr_t)(&_end) - load_pa; |
Alexandre Ghiti | 0f02de4 | 2021-02-21 09:22:33 -0500 | [diff] [blame^] | 384 | uintptr_t map_size; |
Atish Patra | 6262f66 | 2020-09-17 15:37:11 -0700 | [diff] [blame] | 385 | #ifndef __PAGETABLE_PMD_FOLDED |
| 386 | pmd_t fix_bmap_spmd, fix_bmap_epmd; |
| 387 | #endif |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 388 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 389 | va_pa_offset = PAGE_OFFSET - load_pa; |
| 390 | pfn_base = PFN_DOWN(load_pa); |
| 391 | |
| 392 | /* |
| 393 | * Enforce boot alignment requirements of RV32 and |
| 394 | * RV64 by only allowing PMD or PGD mappings. |
| 395 | */ |
Alexandre Ghiti | 0f02de4 | 2021-02-21 09:22:33 -0500 | [diff] [blame^] | 396 | map_size = PMD_SIZE; |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 397 | |
| 398 | /* Sanity check alignment and size */ |
| 399 | BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 400 | BUG_ON((load_pa % map_size) != 0); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 401 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 402 | pt_ops.alloc_pte = alloc_pte_early; |
| 403 | pt_ops.get_pte_virt = get_pte_virt_early; |
| 404 | #ifndef __PAGETABLE_PMD_FOLDED |
| 405 | pt_ops.alloc_pmd = alloc_pmd_early; |
| 406 | pt_ops.get_pmd_virt = get_pmd_virt_early; |
| 407 | #endif |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 408 | /* Setup early PGD for fixmap */ |
| 409 | create_pgd_mapping(early_pg_dir, FIXADDR_START, |
| 410 | (uintptr_t)fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE); |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 411 | |
| 412 | #ifndef __PAGETABLE_PMD_FOLDED |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 413 | /* Setup fixmap PMD */ |
| 414 | create_pmd_mapping(fixmap_pmd, FIXADDR_START, |
| 415 | (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE); |
| 416 | /* Setup trampoline PGD and PMD */ |
| 417 | create_pgd_mapping(trampoline_pg_dir, PAGE_OFFSET, |
| 418 | (uintptr_t)trampoline_pmd, PGDIR_SIZE, PAGE_TABLE); |
| 419 | create_pmd_mapping(trampoline_pmd, PAGE_OFFSET, |
| 420 | load_pa, PMD_SIZE, PAGE_KERNEL_EXEC); |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 421 | #else |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 422 | /* Setup trampoline PGD */ |
| 423 | create_pgd_mapping(trampoline_pg_dir, PAGE_OFFSET, |
| 424 | load_pa, PGDIR_SIZE, PAGE_KERNEL_EXEC); |
| 425 | #endif |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 426 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 427 | /* |
| 428 | * Setup early PGD covering entire kernel which will allows |
| 429 | * us to reach paging_init(). We map all memory banks later |
| 430 | * in setup_vm_final() below. |
| 431 | */ |
| 432 | end_va = PAGE_OFFSET + load_sz; |
| 433 | for (va = PAGE_OFFSET; va < end_va; va += map_size) |
| 434 | create_pgd_mapping(early_pg_dir, va, |
| 435 | load_pa + (va - PAGE_OFFSET), |
| 436 | map_size, PAGE_KERNEL_EXEC); |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 437 | |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 438 | #ifndef __PAGETABLE_PMD_FOLDED |
| 439 | /* Setup early PMD for DTB */ |
| 440 | create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA, |
| 441 | (uintptr_t)early_dtb_pmd, PGDIR_SIZE, PAGE_TABLE); |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 442 | #ifndef CONFIG_BUILTIN_DTB |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 443 | /* Create two consecutive PMD mappings for FDT early scan */ |
| 444 | pa = dtb_pa & ~(PMD_SIZE - 1); |
| 445 | create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA, |
| 446 | pa, PMD_SIZE, PAGE_KERNEL); |
| 447 | create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE, |
| 448 | pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL); |
| 449 | dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1)); |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 450 | #else /* CONFIG_BUILTIN_DTB */ |
| 451 | dtb_early_va = __va(dtb_pa); |
| 452 | #endif /* CONFIG_BUILTIN_DTB */ |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 453 | #else |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 454 | #ifndef CONFIG_BUILTIN_DTB |
Anup Patel | 8f3a2b4 | 2020-09-17 15:37:10 -0700 | [diff] [blame] | 455 | /* Create two consecutive PGD mappings for FDT early scan */ |
| 456 | pa = dtb_pa & ~(PGDIR_SIZE - 1); |
| 457 | create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA, |
| 458 | pa, PGDIR_SIZE, PAGE_KERNEL); |
| 459 | create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA + PGDIR_SIZE, |
| 460 | pa + PGDIR_SIZE, PGDIR_SIZE, PAGE_KERNEL); |
| 461 | dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PGDIR_SIZE - 1)); |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 462 | #else /* CONFIG_BUILTIN_DTB */ |
| 463 | dtb_early_va = __va(dtb_pa); |
| 464 | #endif /* CONFIG_BUILTIN_DTB */ |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 465 | #endif |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 466 | dtb_early_pa = dtb_pa; |
Atish Patra | 6262f66 | 2020-09-17 15:37:11 -0700 | [diff] [blame] | 467 | |
| 468 | /* |
| 469 | * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap |
| 470 | * range can not span multiple pmds. |
| 471 | */ |
| 472 | BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) |
| 473 | != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); |
| 474 | |
| 475 | #ifndef __PAGETABLE_PMD_FOLDED |
| 476 | /* |
| 477 | * Early ioremap fixmap is already created as it lies within first 2MB |
| 478 | * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END |
| 479 | * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn |
| 480 | * the user if not. |
| 481 | */ |
| 482 | fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))]; |
| 483 | fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))]; |
| 484 | if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) { |
| 485 | WARN_ON(1); |
| 486 | pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n", |
| 487 | pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd)); |
| 488 | pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", |
| 489 | fix_to_virt(FIX_BTMAP_BEGIN)); |
| 490 | pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", |
| 491 | fix_to_virt(FIX_BTMAP_END)); |
| 492 | |
| 493 | pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); |
| 494 | pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); |
| 495 | } |
| 496 | #endif |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 497 | } |
| 498 | |
| 499 | static void __init setup_vm_final(void) |
| 500 | { |
| 501 | uintptr_t va, map_size; |
| 502 | phys_addr_t pa, start, end; |
Mike Rapoport | b10d6bc | 2020-10-13 16:58:08 -0700 | [diff] [blame] | 503 | u64 i; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 504 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 505 | /** |
| 506 | * MMU is enabled at this point. But page table setup is not complete yet. |
| 507 | * fixmap page table alloc functions should be used at this point |
| 508 | */ |
| 509 | pt_ops.alloc_pte = alloc_pte_fixmap; |
| 510 | pt_ops.get_pte_virt = get_pte_virt_fixmap; |
| 511 | #ifndef __PAGETABLE_PMD_FOLDED |
| 512 | pt_ops.alloc_pmd = alloc_pmd_fixmap; |
| 513 | pt_ops.get_pmd_virt = get_pmd_virt_fixmap; |
| 514 | #endif |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 515 | /* Setup swapper PGD for fixmap */ |
| 516 | create_pgd_mapping(swapper_pg_dir, FIXADDR_START, |
Zong Li | ac51e00 | 2020-01-02 11:12:40 +0800 | [diff] [blame] | 517 | __pa_symbol(fixmap_pgd_next), |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 518 | PGDIR_SIZE, PAGE_TABLE); |
| 519 | |
| 520 | /* Map all memory banks */ |
Mike Rapoport | b10d6bc | 2020-10-13 16:58:08 -0700 | [diff] [blame] | 521 | for_each_mem_range(i, &start, &end) { |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 522 | if (start >= end) |
| 523 | break; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 524 | if (start <= __pa(PAGE_OFFSET) && |
| 525 | __pa(PAGE_OFFSET) < end) |
| 526 | start = __pa(PAGE_OFFSET); |
| 527 | |
| 528 | map_size = best_map_size(start, end - start); |
| 529 | for (pa = start; pa < end; pa += map_size) { |
| 530 | va = (uintptr_t)__va(pa); |
| 531 | create_pgd_mapping(swapper_pg_dir, va, pa, |
| 532 | map_size, PAGE_KERNEL_EXEC); |
| 533 | } |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 534 | } |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 535 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 536 | /* Clear fixmap PTE and PMD mappings */ |
| 537 | clear_fixmap(FIX_PTE); |
| 538 | clear_fixmap(FIX_PMD); |
| 539 | |
| 540 | /* Move to swapper page table */ |
Zong Li | ac51e00 | 2020-01-02 11:12:40 +0800 | [diff] [blame] | 541 | csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | SATP_MODE); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 542 | local_flush_tlb_all(); |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 543 | |
| 544 | /* generic page allocation functions must be used to setup page table */ |
| 545 | pt_ops.alloc_pte = alloc_pte_late; |
| 546 | pt_ops.get_pte_virt = get_pte_virt_late; |
| 547 | #ifndef __PAGETABLE_PMD_FOLDED |
| 548 | pt_ops.alloc_pmd = alloc_pmd_late; |
| 549 | pt_ops.get_pmd_virt = get_pmd_virt_late; |
| 550 | #endif |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 551 | } |
Christoph Hellwig | 6bd33e1 | 2019-10-28 13:10:41 +0100 | [diff] [blame] | 552 | #else |
| 553 | asmlinkage void __init setup_vm(uintptr_t dtb_pa) |
| 554 | { |
| 555 | dtb_early_va = (void *)dtb_pa; |
Atish Patra | a78c6f5 | 2020-10-01 12:04:56 -0700 | [diff] [blame] | 556 | dtb_early_pa = dtb_pa; |
Christoph Hellwig | 6bd33e1 | 2019-10-28 13:10:41 +0100 | [diff] [blame] | 557 | } |
| 558 | |
| 559 | static inline void setup_vm_final(void) |
| 560 | { |
| 561 | } |
| 562 | #endif /* CONFIG_MMU */ |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 563 | |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 564 | #ifdef CONFIG_STRICT_KERNEL_RWX |
Atish Patra | 19a0086 | 2020-11-04 16:04:38 -0800 | [diff] [blame] | 565 | void protect_kernel_text_data(void) |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 566 | { |
Atish Patra | 19a0086 | 2020-11-04 16:04:38 -0800 | [diff] [blame] | 567 | unsigned long text_start = (unsigned long)_start; |
| 568 | unsigned long init_text_start = (unsigned long)__init_text_begin; |
| 569 | unsigned long init_data_start = (unsigned long)__init_data_begin; |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 570 | unsigned long rodata_start = (unsigned long)__start_rodata; |
| 571 | unsigned long data_start = (unsigned long)_data; |
| 572 | unsigned long max_low = (unsigned long)(__va(PFN_PHYS(max_low_pfn))); |
| 573 | |
Atish Patra | 19a0086 | 2020-11-04 16:04:38 -0800 | [diff] [blame] | 574 | set_memory_ro(text_start, (init_text_start - text_start) >> PAGE_SHIFT); |
| 575 | set_memory_ro(init_text_start, (init_data_start - init_text_start) >> PAGE_SHIFT); |
| 576 | set_memory_nx(init_data_start, (rodata_start - init_data_start) >> PAGE_SHIFT); |
| 577 | /* rodata section is marked readonly in mark_rodata_ro */ |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 578 | set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT); |
| 579 | set_memory_nx(data_start, (max_low - data_start) >> PAGE_SHIFT); |
Atish Patra | 19a0086 | 2020-11-04 16:04:38 -0800 | [diff] [blame] | 580 | } |
| 581 | |
| 582 | void mark_rodata_ro(void) |
| 583 | { |
| 584 | unsigned long rodata_start = (unsigned long)__start_rodata; |
| 585 | unsigned long data_start = (unsigned long)_data; |
| 586 | |
| 587 | set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT); |
Zong Li | b422d28 | 2020-06-03 16:03:55 -0700 | [diff] [blame] | 588 | |
| 589 | debug_checkwx(); |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 590 | } |
| 591 | #endif |
| 592 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 593 | void __init paging_init(void) |
| 594 | { |
| 595 | setup_vm_final(); |
| 596 | setup_zero_page(); |
Atish Patra | cbd34f4 | 2020-11-18 16:38:27 -0800 | [diff] [blame] | 597 | } |
| 598 | |
| 599 | void __init misc_mem_init(void) |
| 600 | { |
Atish Patra | 4f0e8ee | 2020-11-18 16:38:29 -0800 | [diff] [blame] | 601 | arch_numa_init(); |
Atish Patra | cbd34f4 | 2020-11-18 16:38:27 -0800 | [diff] [blame] | 602 | sparse_init(); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 603 | zone_sizes_init(); |
Atish Patra | 4f0e8ee | 2020-11-18 16:38:29 -0800 | [diff] [blame] | 604 | memblock_dump_all(); |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 605 | } |
Logan Gunthorpe | d95f1a5 | 2019-08-28 15:40:54 -0600 | [diff] [blame] | 606 | |
Kefeng Wang | 9fe57d8 | 2019-10-23 11:23:02 +0800 | [diff] [blame] | 607 | #ifdef CONFIG_SPARSEMEM_VMEMMAP |
Logan Gunthorpe | d95f1a5 | 2019-08-28 15:40:54 -0600 | [diff] [blame] | 608 | int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, |
| 609 | struct vmem_altmap *altmap) |
| 610 | { |
Anshuman Khandual | 1d9cfee | 2020-08-06 23:23:19 -0700 | [diff] [blame] | 611 | return vmemmap_populate_basepages(start, end, node, NULL); |
Logan Gunthorpe | d95f1a5 | 2019-08-28 15:40:54 -0600 | [diff] [blame] | 612 | } |
| 613 | #endif |