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Thomas Gleixner50acfb22019-05-29 07:18:00 -07001// SPDX-License-Identifier: GPL-2.0-only
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07002/*
3 * Copyright (C) 2012 Regents of the University of California
Anup Patel671f9a32019-06-28 13:36:21 -07004 * Copyright (C) 2019 Western Digital Corporation or its affiliates.
Nick Kossifidise53d2812021-04-19 03:55:38 +03005 * Copyright (C) 2020 FORTH-ICS/CARV
6 * Nick Kossifidis <mick@ics.forth.gr>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07007 */
8
9#include <linux/init.h>
10#include <linux/mm.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070011#include <linux/memblock.h>
Mike Rapoport57c8a662018-10-30 15:09:49 -070012#include <linux/initrd.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070013#include <linux/swap.h>
Kefeng Wangce3aca02021-06-02 16:55:16 +080014#include <linux/swiotlb.h>
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010015#include <linux/sizes.h>
Anup Patel0651c262019-02-21 11:25:49 +053016#include <linux/of_fdt.h>
Nick Kossifidis56409752021-04-19 03:55:39 +030017#include <linux/of_reserved_mem.h>
Albert Ou922b0372019-09-27 16:14:18 -070018#include <linux/libfdt.h>
Zong Lid27c3c92020-03-10 00:55:41 +080019#include <linux/set_memory.h>
Kefeng Wangda815582020-10-31 14:01:12 +080020#include <linux/dma-map-ops.h>
Nick Kossifidise53d2812021-04-19 03:55:38 +030021#include <linux/crash_dump.h>
Kefeng Wang8ba1a8b2021-07-30 20:48:41 +080022#include <linux/hugetlb.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070023
Anup Patelf2c17aa2019-01-07 20:57:01 +053024#include <asm/fixmap.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070025#include <asm/tlbflush.h>
26#include <asm/sections.h>
Palmer Dabbelt2d268252020-04-14 13:43:24 +090027#include <asm/soc.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070028#include <asm/io.h>
Zong Lib422d282020-06-03 16:03:55 -070029#include <asm/ptdump.h>
Atish Patra4f0e8ee2020-11-18 16:38:29 -080030#include <asm/numa.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070031
Paul Walmsleyffaee272019-10-17 15:00:17 -070032#include "../kernel/head.h"
33
Alexandre Ghiti658e2c52021-06-17 15:53:07 +020034struct kernel_mapping kernel_map __ro_after_init;
35EXPORT_SYMBOL(kernel_map);
Vitaly Wool44c92252021-04-13 02:35:14 -040036#ifdef CONFIG_XIP_KERNEL
Alexandre Ghiti658e2c52021-06-17 15:53:07 +020037#define kernel_map (*(struct kernel_mapping *)XIP_FIXUP(&kernel_map))
38#endif
39
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +010040#ifdef CONFIG_64BIT
41u64 satp_mode = !IS_ENABLED(CONFIG_XIP_KERNEL) ? SATP_MODE_48 : SATP_MODE_39;
42#else
43u64 satp_mode = SATP_MODE_32;
44#endif
45EXPORT_SYMBOL(satp_mode);
46
kernel test robot20aa4952022-01-19 11:38:36 +080047bool pgtable_l4_enabled = IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_XIP_KERNEL);
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +010048EXPORT_SYMBOL(pgtable_l4_enabled);
49
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +020050phys_addr_t phys_ram_base __ro_after_init;
51EXPORT_SYMBOL(phys_ram_base);
52
Anup Patel387181d2019-03-26 08:03:47 +000053unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
54 __page_aligned_bss;
55EXPORT_SYMBOL(empty_zero_page);
56
Anup Pateld90d45d2019-06-07 06:01:29 +000057extern char _start[];
Anup Patel8f3a2b42020-09-17 15:37:10 -070058#define DTB_EARLY_BASE_VA PGDIR_SIZE
Vitaly Wool44c92252021-04-13 02:35:14 -040059void *_dtb_early_va __initdata;
60uintptr_t _dtb_early_pa __initdata;
Anup Pateld90d45d2019-06-07 06:01:29 +000061
Jisheng Zhang01062352021-05-16 21:15:56 +080062static phys_addr_t dma32_phys_limit __initdata;
Kefeng Wangda815582020-10-31 14:01:12 +080063
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070064static void __init zone_sizes_init(void)
65{
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010066 unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070067
Zong Lid5fad482018-06-25 16:49:37 +080068#ifdef CONFIG_ZONE_DMA32
Kefeng Wangda815582020-10-31 14:01:12 +080069 max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit);
Zong Lid5fad482018-06-25 16:49:37 +080070#endif
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010071 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
72
Mike Rapoport9691a072020-06-03 15:57:10 -070073 free_area_init(max_zone_pfns);
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070074}
75
Kefeng Wang8fa3cdf2020-05-14 19:53:35 +080076#if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000077static inline void print_mlk(char *name, unsigned long b, unsigned long t)
78{
79 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t,
80 (((t) - (b)) >> 10));
81}
82
83static inline void print_mlm(char *name, unsigned long b, unsigned long t)
84{
85 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t,
86 (((t) - (b)) >> 20));
87}
88
Jisheng Zhang19875012021-03-30 02:22:21 +080089static void __init print_vm_layout(void)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000090{
91 pr_notice("Virtual kernel memory layout:\n");
92 print_mlk("fixmap", (unsigned long)FIXADDR_START,
93 (unsigned long)FIXADDR_TOP);
94 print_mlm("pci io", (unsigned long)PCI_IO_START,
95 (unsigned long)PCI_IO_END);
96 print_mlm("vmemmap", (unsigned long)VMEMMAP_START,
97 (unsigned long)VMEMMAP_END);
98 print_mlm("vmalloc", (unsigned long)VMALLOC_START,
99 (unsigned long)VMALLOC_END);
100 print_mlm("lowmem", (unsigned long)PAGE_OFFSET,
101 (unsigned long)high_memory);
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800102 if (IS_ENABLED(CONFIG_64BIT)) {
Alexandre Ghitif7ae0232021-12-06 11:46:45 +0100103#ifdef CONFIG_KASAN
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800104 print_mlm("kasan", KASAN_SHADOW_START, KASAN_SHADOW_END);
Alexandre Ghitif7ae0232021-12-06 11:46:45 +0100105#endif
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800106
Jisheng Zhang07aabe82021-12-06 23:03:50 +0800107 print_mlm("kernel", (unsigned long)KERNEL_LINK_ADDR,
108 (unsigned long)ADDRESS_SPACE_END);
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800109 }
Yash Shah2cc6c4a2019-11-18 05:58:34 +0000110}
111#else
112static void print_vm_layout(void) { }
113#endif /* CONFIG_DEBUG_VM */
114
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700115void __init mem_init(void)
116{
117#ifdef CONFIG_FLATMEM
118 BUG_ON(!mem_map);
119#endif /* CONFIG_FLATMEM */
120
Kefeng Wangce3aca02021-06-02 16:55:16 +0800121#ifdef CONFIG_SWIOTLB
122 if (swiotlb_force == SWIOTLB_FORCE ||
123 max_pfn > PFN_DOWN(dma32_phys_limit))
124 swiotlb_init(1);
125 else
126 swiotlb_force = SWIOTLB_NO_FORCE;
127#endif
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700128 high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
Mike Rapoportc6ffc5c2018-10-30 15:09:30 -0700129 memblock_free_all();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700130
Yash Shah2cc6c4a2019-11-18 05:58:34 +0000131 print_vm_layout();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700132}
133
Alexandre Ghitif7ae0232021-12-06 11:46:45 +0100134/* Limit the memory size via mem. */
135static phys_addr_t memory_limit;
Kefeng Wangc9811e32021-06-02 16:55:17 +0800136
137static int __init early_mem(char *p)
138{
139 u64 size;
140
141 if (!p)
142 return 1;
143
144 size = memparse(p, &p) & PAGE_MASK;
145 memory_limit = min_t(u64, size, memory_limit);
146
147 pr_notice("Memory limited to %lldMB\n", (u64)memory_limit >> 20);
148
149 return 0;
150}
151early_param("mem", early_mem);
152
Kefeng Wangf842f5f2021-05-10 19:42:22 +0800153static void __init setup_bootmem(void)
Anup Patel0651c262019-02-21 11:25:49 +0530154{
Zong Liac51e002020-01-02 11:12:40 +0800155 phys_addr_t vmlinux_end = __pa_symbol(&_end);
Jisheng Zhang07aabe82021-12-06 23:03:50 +0800156 phys_addr_t max_mapped_addr;
Jisheng Zhangfe036db2021-12-06 23:03:52 +0800157 phys_addr_t phys_ram_end, vmlinux_start;
Anup Patel0651c262019-02-21 11:25:49 +0530158
Jisheng Zhangfe036db2021-12-06 23:03:52 +0800159 if (IS_ENABLED(CONFIG_XIP_KERNEL))
160 vmlinux_start = __pa_symbol(&_sdata);
161 else
162 vmlinux_start = __pa_symbol(&_start);
Vitaly Wool44c92252021-04-13 02:35:14 -0400163
Kefeng Wangc9811e32021-06-02 16:55:17 +0800164 memblock_enforce_memory_limit(memory_limit);
Anup Patel0651c262019-02-21 11:25:49 +0530165
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400166 /*
Geert Uytterhoeven8db6f932021-04-29 17:05:00 +0200167 * Make sure we align the reservation on PMD_SIZE since we will
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400168 * map the kernel in the linear mapping as read-only: we do not want
169 * any allocation to happen between _end and the next pmd aligned page.
170 */
Jisheng Zhang07aabe82021-12-06 23:03:50 +0800171 if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_STRICT_KERNEL_RWX))
172 vmlinux_end = (vmlinux_end + PMD_SIZE - 1) & PMD_MASK;
173 /*
174 * Reserve from the start of the kernel to the end of the kernel
175 */
Geert Uytterhoeven8db6f932021-04-29 17:05:00 +0200176 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
Anup Pateld90d45d2019-06-07 06:01:29 +0000177
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +0200178 phys_ram_end = memblock_end_of_DRAM();
Jisheng Zhangfe036db2021-12-06 23:03:52 +0800179 if (!IS_ENABLED(CONFIG_XIP_KERNEL))
180 phys_ram_base = memblock_start_of_DRAM();
Atish Patraabb8e862021-01-11 15:45:02 -0800181 /*
182 * memblock allocator is not aware of the fact that last 4K bytes of
183 * the addressable memory can not be mapped because of IS_ERR_VALUE
184 * macro. Make sure that last 4k bytes are not usable by memblock
Alexandre Ghitidb6b84a2021-06-29 11:13:48 +0200185 * if end of dram is equal to maximum addressable memory. For 64-bit
186 * kernel, this problem can't happen here as the end of the virtual
187 * address space is occupied by the kernel mapping then this check must
Alexandre Ghitifdf3a7a2021-07-26 07:42:54 +0200188 * be done as soon as the kernel mapping base address is determined.
Atish Patraabb8e862021-01-11 15:45:02 -0800189 */
Jisheng Zhang07aabe82021-12-06 23:03:50 +0800190 if (!IS_ENABLED(CONFIG_64BIT)) {
191 max_mapped_addr = __pa(~(ulong)0);
192 if (max_mapped_addr == (phys_ram_end - 1))
193 memblock_set_current_limit(max_mapped_addr - 4096);
194 }
Atish Patraabb8e862021-01-11 15:45:02 -0800195
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +0200196 min_low_pfn = PFN_UP(phys_ram_base);
197 max_low_pfn = max_pfn = PFN_DOWN(phys_ram_end);
Kefeng Wangf6e5aed2021-02-25 14:54:17 +0800198
Kefeng Wangda815582020-10-31 14:01:12 +0800199 dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
Guo Ren336e8eb2021-01-21 14:31:17 +0800200 set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
Anup Patel0651c262019-02-21 11:25:49 +0530201
Kefeng Wangaec33b52021-01-15 13:46:06 +0800202 reserve_initrd_mem();
Albert Ou922b0372019-09-27 16:14:18 -0700203 /*
Vitaly Woolf105aa92021-01-16 01:49:48 +0200204 * If DTB is built in, no need to reserve its memblock.
205 * Otherwise, do reserve it but avoid using
206 * early_init_fdt_reserve_self() since __pa() does
Albert Ou922b0372019-09-27 16:14:18 -0700207 * not work for DTB pointers that are fixmap addresses
208 */
Vitaly Woolf105aa92021-01-16 01:49:48 +0200209 if (!IS_ENABLED(CONFIG_BUILTIN_DTB))
210 memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
Albert Ou922b0372019-09-27 16:14:18 -0700211
Anup Patel0651c262019-02-21 11:25:49 +0530212 early_init_fdt_scan_reserved_mem();
Kefeng Wangda815582020-10-31 14:01:12 +0800213 dma_contiguous_reserve(dma32_phys_limit);
Kefeng Wang8ba1a8b2021-07-30 20:48:41 +0800214 if (IS_ENABLED(CONFIG_64BIT))
215 hugetlb_cma_reserve(PUD_SHIFT - PAGE_SHIFT);
Anup Patel0651c262019-02-21 11:25:49 +0530216 memblock_allow_resize();
Anup Patel0651c262019-02-21 11:25:49 +0530217}
Anup Patel6f1e9e92019-02-13 16:38:36 +0530218
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100219#ifdef CONFIG_MMU
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800220struct pt_alloc_ops pt_ops __initdata;
Vitaly Wool44c92252021-04-13 02:35:14 -0400221
Kenneth Leefb31f0a2021-07-28 15:15:57 +0800222unsigned long riscv_pfn_base __ro_after_init;
223EXPORT_SYMBOL(riscv_pfn_base);
Anup Patel387181d2019-03-26 08:03:47 +0000224
Anup Patel6f1e9e92019-02-13 16:38:36 +0530225pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700226pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Jisheng Zhang01062352021-05-16 21:15:56 +0800227static pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700228
Anup Patel671f9a32019-06-28 13:36:21 -0700229pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100230static pud_t __maybe_unused early_dtb_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200231static pmd_t __maybe_unused early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530232
Vitaly Wool44c92252021-04-13 02:35:14 -0400233#ifdef CONFIG_XIP_KERNEL
Jisheng Zhang805a3eb2021-12-06 23:03:53 +0800234#define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&pt_ops))
Vitaly Wool44c92252021-04-13 02:35:14 -0400235#define trampoline_pg_dir ((pgd_t *)XIP_FIXUP(trampoline_pg_dir))
236#define fixmap_pte ((pte_t *)XIP_FIXUP(fixmap_pte))
237#define early_pg_dir ((pgd_t *)XIP_FIXUP(early_pg_dir))
238#endif /* CONFIG_XIP_KERNEL */
239
Anup Patelf2c17aa2019-01-07 20:57:01 +0530240void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
241{
242 unsigned long addr = __fix_to_virt(idx);
243 pte_t *ptep;
244
245 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
246
247 ptep = &fixmap_pte[pte_index(addr)];
248
Greentime Hu21190b72020-08-04 11:02:05 +0800249 if (pgprot_val(prot))
Anup Patelf2c17aa2019-01-07 20:57:01 +0530250 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
Greentime Hu21190b72020-08-04 11:02:05 +0800251 else
Anup Patelf2c17aa2019-01-07 20:57:01 +0530252 pte_clear(&init_mm, addr, ptep);
Greentime Hu21190b72020-08-04 11:02:05 +0800253 local_flush_tlb_page(addr);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530254}
255
Atish Patrae8dcb612020-09-17 15:37:12 -0700256static inline pte_t *__init get_pte_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700257{
Atish Patrae8dcb612020-09-17 15:37:12 -0700258 return (pte_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700259}
260
Atish Patrae8dcb612020-09-17 15:37:12 -0700261static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa)
262{
263 clear_fixmap(FIX_PTE);
264 return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
265}
266
Jisheng Zhang01062352021-05-16 21:15:56 +0800267static inline pte_t *__init get_pte_virt_late(phys_addr_t pa)
Atish Patrae8dcb612020-09-17 15:37:12 -0700268{
269 return (pte_t *) __va(pa);
270}
271
272static inline phys_addr_t __init alloc_pte_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700273{
274 /*
275 * We only create PMD or PGD early mappings so we
276 * should never reach here with MMU disabled.
277 */
Atish Patrae8dcb612020-09-17 15:37:12 -0700278 BUG();
279}
Anup Patel671f9a32019-06-28 13:36:21 -0700280
Atish Patrae8dcb612020-09-17 15:37:12 -0700281static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va)
282{
Anup Patel671f9a32019-06-28 13:36:21 -0700283 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
284}
285
Jisheng Zhang01062352021-05-16 21:15:56 +0800286static phys_addr_t __init alloc_pte_late(uintptr_t va)
Atish Patrae8dcb612020-09-17 15:37:12 -0700287{
288 unsigned long vaddr;
289
290 vaddr = __get_free_page(GFP_KERNEL);
zhouchuangaoe75e6bf2021-03-30 06:56:26 -0700291 BUG_ON(!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr)));
292
Atish Patrae8dcb612020-09-17 15:37:12 -0700293 return __pa(vaddr);
294}
295
Anup Patel671f9a32019-06-28 13:36:21 -0700296static void __init create_pte_mapping(pte_t *ptep,
297 uintptr_t va, phys_addr_t pa,
298 phys_addr_t sz, pgprot_t prot)
299{
Mike Rapoport974b9b22020-06-08 21:33:10 -0700300 uintptr_t pte_idx = pte_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700301
302 BUG_ON(sz != PAGE_SIZE);
303
Mike Rapoport974b9b22020-06-08 21:33:10 -0700304 if (pte_none(ptep[pte_idx]))
305 ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700306}
307
308#ifndef __PAGETABLE_PMD_FOLDED
309
Jisheng Zhang01062352021-05-16 21:15:56 +0800310static pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
311static pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
312static pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
Anup Patel671f9a32019-06-28 13:36:21 -0700313
Vitaly Wool44c92252021-04-13 02:35:14 -0400314#ifdef CONFIG_XIP_KERNEL
315#define trampoline_pmd ((pmd_t *)XIP_FIXUP(trampoline_pmd))
316#define fixmap_pmd ((pmd_t *)XIP_FIXUP(fixmap_pmd))
317#define early_pmd ((pmd_t *)XIP_FIXUP(early_pmd))
318#endif /* CONFIG_XIP_KERNEL */
319
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100320static pud_t trampoline_pud[PTRS_PER_PUD] __page_aligned_bss;
321static pud_t fixmap_pud[PTRS_PER_PUD] __page_aligned_bss;
322static pud_t early_pud[PTRS_PER_PUD] __initdata __aligned(PAGE_SIZE);
323
324#ifdef CONFIG_XIP_KERNEL
325#define trampoline_pud ((pud_t *)XIP_FIXUP(trampoline_pud))
326#define fixmap_pud ((pud_t *)XIP_FIXUP(fixmap_pud))
327#define early_pud ((pud_t *)XIP_FIXUP(early_pud))
328#endif /* CONFIG_XIP_KERNEL */
329
Atish Patrae8dcb612020-09-17 15:37:12 -0700330static pmd_t *__init get_pmd_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700331{
Atish Patrae8dcb612020-09-17 15:37:12 -0700332 /* Before MMU is enabled */
333 return (pmd_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700334}
335
Atish Patrae8dcb612020-09-17 15:37:12 -0700336static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa)
337{
338 clear_fixmap(FIX_PMD);
339 return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
340}
341
Jisheng Zhang01062352021-05-16 21:15:56 +0800342static pmd_t *__init get_pmd_virt_late(phys_addr_t pa)
Atish Patrae8dcb612020-09-17 15:37:12 -0700343{
344 return (pmd_t *) __va(pa);
345}
346
347static phys_addr_t __init alloc_pmd_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700348{
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100349 BUG_ON((va - kernel_map.virt_addr) >> PUD_SHIFT);
Anup Patel671f9a32019-06-28 13:36:21 -0700350
Alexandre Ghiti0f02de42021-02-21 09:22:33 -0500351 return (uintptr_t)early_pmd;
Anup Patel671f9a32019-06-28 13:36:21 -0700352}
353
Atish Patrae8dcb612020-09-17 15:37:12 -0700354static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va)
355{
356 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
357}
358
Jisheng Zhang01062352021-05-16 21:15:56 +0800359static phys_addr_t __init alloc_pmd_late(uintptr_t va)
Atish Patrae8dcb612020-09-17 15:37:12 -0700360{
361 unsigned long vaddr;
362
363 vaddr = __get_free_page(GFP_KERNEL);
Kefeng Wang5a7ac592021-09-27 11:03:25 +0800364 BUG_ON(!vaddr || !pgtable_pmd_page_ctor(virt_to_page(vaddr)));
365
Atish Patrae8dcb612020-09-17 15:37:12 -0700366 return __pa(vaddr);
367}
368
Anup Patel671f9a32019-06-28 13:36:21 -0700369static void __init create_pmd_mapping(pmd_t *pmdp,
370 uintptr_t va, phys_addr_t pa,
371 phys_addr_t sz, pgprot_t prot)
372{
373 pte_t *ptep;
374 phys_addr_t pte_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700375 uintptr_t pmd_idx = pmd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700376
377 if (sz == PMD_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700378 if (pmd_none(pmdp[pmd_idx]))
379 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700380 return;
381 }
382
Mike Rapoport974b9b22020-06-08 21:33:10 -0700383 if (pmd_none(pmdp[pmd_idx])) {
Atish Patrae8dcb612020-09-17 15:37:12 -0700384 pte_phys = pt_ops.alloc_pte(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700385 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
Atish Patrae8dcb612020-09-17 15:37:12 -0700386 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700387 memset(ptep, 0, PAGE_SIZE);
388 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700389 pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
Atish Patrae8dcb612020-09-17 15:37:12 -0700390 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700391 }
392
393 create_pte_mapping(ptep, va, pa, sz, prot);
394}
395
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100396static pud_t *__init get_pud_virt_early(phys_addr_t pa)
397{
398 return (pud_t *)((uintptr_t)pa);
399}
400
401static pud_t *__init get_pud_virt_fixmap(phys_addr_t pa)
402{
403 clear_fixmap(FIX_PUD);
404 return (pud_t *)set_fixmap_offset(FIX_PUD, pa);
405}
406
407static pud_t *__init get_pud_virt_late(phys_addr_t pa)
408{
409 return (pud_t *)__va(pa);
410}
411
412static phys_addr_t __init alloc_pud_early(uintptr_t va)
413{
414 /* Only one PUD is available for early mapping */
415 BUG_ON((va - kernel_map.virt_addr) >> PGDIR_SHIFT);
416
417 return (uintptr_t)early_pud;
418}
419
420static phys_addr_t __init alloc_pud_fixmap(uintptr_t va)
421{
422 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
423}
424
425static phys_addr_t alloc_pud_late(uintptr_t va)
426{
427 unsigned long vaddr;
428
429 vaddr = __get_free_page(GFP_KERNEL);
430 BUG_ON(!vaddr);
431 return __pa(vaddr);
432}
433
434static void __init create_pud_mapping(pud_t *pudp,
435 uintptr_t va, phys_addr_t pa,
436 phys_addr_t sz, pgprot_t prot)
437{
438 pmd_t *nextp;
439 phys_addr_t next_phys;
440 uintptr_t pud_index = pud_index(va);
441
442 if (sz == PUD_SIZE) {
443 if (pud_val(pudp[pud_index]) == 0)
444 pudp[pud_index] = pfn_pud(PFN_DOWN(pa), prot);
445 return;
446 }
447
448 if (pud_val(pudp[pud_index]) == 0) {
449 next_phys = pt_ops.alloc_pmd(va);
450 pudp[pud_index] = pfn_pud(PFN_DOWN(next_phys), PAGE_TABLE);
451 nextp = pt_ops.get_pmd_virt(next_phys);
452 memset(nextp, 0, PAGE_SIZE);
453 } else {
454 next_phys = PFN_PHYS(_pud_pfn(pudp[pud_index]));
455 nextp = pt_ops.get_pmd_virt(next_phys);
456 }
457
458 create_pmd_mapping(nextp, va, pa, sz, prot);
459}
460
461#define pgd_next_t pud_t
462#define alloc_pgd_next(__va) (pgtable_l4_enabled ? \
463 pt_ops.alloc_pud(__va) : pt_ops.alloc_pmd(__va))
464#define get_pgd_next_virt(__pa) (pgtable_l4_enabled ? \
465 pt_ops.get_pud_virt(__pa) : (pgd_next_t *)pt_ops.get_pmd_virt(__pa))
Anup Patel671f9a32019-06-28 13:36:21 -0700466#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100467 (pgtable_l4_enabled ? \
468 create_pud_mapping(__nextp, __va, __pa, __sz, __prot) : \
469 create_pmd_mapping((pmd_t *)__nextp, __va, __pa, __sz, __prot))
470#define fixmap_pgd_next (pgtable_l4_enabled ? \
471 (uintptr_t)fixmap_pud : (uintptr_t)fixmap_pmd)
472#define trampoline_pgd_next (pgtable_l4_enabled ? \
473 (uintptr_t)trampoline_pud : (uintptr_t)trampoline_pmd)
474#define early_dtb_pgd_next (pgtable_l4_enabled ? \
475 (uintptr_t)early_dtb_pud : (uintptr_t)early_dtb_pmd)
Anup Patel671f9a32019-06-28 13:36:21 -0700476#else
477#define pgd_next_t pte_t
Atish Patrae8dcb612020-09-17 15:37:12 -0700478#define alloc_pgd_next(__va) pt_ops.alloc_pte(__va)
479#define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700480#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
481 create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100482#define fixmap_pgd_next ((uintptr_t)fixmap_pte)
483#define early_dtb_pgd_next ((uintptr_t)early_dtb_pmd)
484#define create_pud_mapping(__pmdp, __va, __pa, __sz, __prot)
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200485#define create_pmd_mapping(__pmdp, __va, __pa, __sz, __prot)
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100486#endif /* __PAGETABLE_PMD_FOLDED */
Anup Patel671f9a32019-06-28 13:36:21 -0700487
Atish Patrab91540d2020-09-17 15:37:15 -0700488void __init create_pgd_mapping(pgd_t *pgdp,
Anup Patel671f9a32019-06-28 13:36:21 -0700489 uintptr_t va, phys_addr_t pa,
490 phys_addr_t sz, pgprot_t prot)
491{
492 pgd_next_t *nextp;
493 phys_addr_t next_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700494 uintptr_t pgd_idx = pgd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700495
496 if (sz == PGDIR_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700497 if (pgd_val(pgdp[pgd_idx]) == 0)
498 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700499 return;
500 }
501
Mike Rapoport974b9b22020-06-08 21:33:10 -0700502 if (pgd_val(pgdp[pgd_idx]) == 0) {
Anup Patel671f9a32019-06-28 13:36:21 -0700503 next_phys = alloc_pgd_next(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700504 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700505 nextp = get_pgd_next_virt(next_phys);
506 memset(nextp, 0, PAGE_SIZE);
507 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700508 next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
Anup Patel671f9a32019-06-28 13:36:21 -0700509 nextp = get_pgd_next_virt(next_phys);
510 }
511
512 create_pgd_next_mapping(nextp, va, pa, sz, prot);
513}
514
515static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
516{
Zong Li0fdc6362019-11-08 01:00:40 -0800517 /* Upgrade to PMD_SIZE mappings whenever possible */
518 if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
519 return PAGE_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700520
Zong Li0fdc6362019-11-08 01:00:40 -0800521 return PMD_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700522}
523
Vitaly Wool44c92252021-04-13 02:35:14 -0400524#ifdef CONFIG_XIP_KERNEL
Jisheng Zhang805a3eb2021-12-06 23:03:53 +0800525extern char _xiprom[], _exiprom[], __data_loc;
526
Vitaly Wool44c92252021-04-13 02:35:14 -0400527/* called from head.S with MMU off */
528asmlinkage void __init __copy_data(void)
529{
Vitaly Woolf9ace4e2021-10-11 11:14:14 +0200530 void *from = (void *)(&__data_loc);
Vitaly Wool44c92252021-04-13 02:35:14 -0400531 void *to = (void *)CONFIG_PHYS_RAM_BASE;
Vitaly Woolf9ace4e2021-10-11 11:14:14 +0200532 size_t sz = (size_t)((uintptr_t)(&_end) - (uintptr_t)(&_sdata));
Vitaly Wool44c92252021-04-13 02:35:14 -0400533
534 memcpy(to, from, sz);
535}
536#endif
537
Alexandre Ghitie5c35fa02021-06-24 14:00:41 +0200538#ifdef CONFIG_STRICT_KERNEL_RWX
539static __init pgprot_t pgprot_from_va(uintptr_t va)
540{
541 if (is_va_kernel_text(va))
542 return PAGE_KERNEL_READ_EXEC;
543
544 /*
545 * In 64-bit kernel, the kernel mapping is outside the linear mapping so
546 * we must protect its linear mapping alias from being executed and
547 * written.
548 * And rodata section is marked readonly in mark_rodata_ro.
549 */
550 if (IS_ENABLED(CONFIG_64BIT) && is_va_kernel_lm_alias_text(va))
551 return PAGE_KERNEL_READ;
552
553 return PAGE_KERNEL;
554}
555
556void mark_rodata_ro(void)
557{
558 set_kernel_memory(__start_rodata, _data, set_memory_ro);
559 if (IS_ENABLED(CONFIG_64BIT))
560 set_kernel_memory(lm_alias(__start_rodata), lm_alias(_data),
561 set_memory_ro);
562
563 debug_checkwx();
564}
565#else
566static __init pgprot_t pgprot_from_va(uintptr_t va)
567{
568 if (IS_ENABLED(CONFIG_64BIT) && !is_kernel_mapping(va))
569 return PAGE_KERNEL;
570
571 return PAGE_KERNEL_EXEC;
572}
573#endif /* CONFIG_STRICT_KERNEL_RWX */
574
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100575#ifdef CONFIG_64BIT
576static void __init disable_pgtable_l4(void)
577{
578 pgtable_l4_enabled = false;
579 kernel_map.page_offset = PAGE_OFFSET_L3;
580 satp_mode = SATP_MODE_39;
581}
582
583/*
584 * There is a simple way to determine if 4-level is supported by the
585 * underlying hardware: establish 1:1 mapping in 4-level page table mode
586 * then read SATP to see if the configuration was taken into account
587 * meaning sv48 is supported.
588 */
589static __init void set_satp_mode(void)
590{
591 u64 identity_satp, hw_satp;
592 uintptr_t set_satp_mode_pmd;
593
594 set_satp_mode_pmd = ((unsigned long)set_satp_mode) & PMD_MASK;
595 create_pgd_mapping(early_pg_dir,
596 set_satp_mode_pmd, (uintptr_t)early_pud,
597 PGDIR_SIZE, PAGE_TABLE);
598 create_pud_mapping(early_pud,
599 set_satp_mode_pmd, (uintptr_t)early_pmd,
600 PUD_SIZE, PAGE_TABLE);
601 /* Handle the case where set_satp_mode straddles 2 PMDs */
602 create_pmd_mapping(early_pmd,
603 set_satp_mode_pmd, set_satp_mode_pmd,
604 PMD_SIZE, PAGE_KERNEL_EXEC);
605 create_pmd_mapping(early_pmd,
606 set_satp_mode_pmd + PMD_SIZE,
607 set_satp_mode_pmd + PMD_SIZE,
608 PMD_SIZE, PAGE_KERNEL_EXEC);
609
610 identity_satp = PFN_DOWN((uintptr_t)&early_pg_dir) | satp_mode;
611
612 local_flush_tlb_all();
613 csr_write(CSR_SATP, identity_satp);
614 hw_satp = csr_swap(CSR_SATP, 0ULL);
615 local_flush_tlb_all();
616
617 if (hw_satp != identity_satp)
618 disable_pgtable_l4();
619
620 memset(early_pg_dir, 0, PAGE_SIZE);
621 memset(early_pud, 0, PAGE_SIZE);
622 memset(early_pmd, 0, PAGE_SIZE);
623}
624#endif
625
Anup Patel387181d2019-03-26 08:03:47 +0000626/*
627 * setup_vm() is called from head.S with MMU-off.
628 *
629 * Following requirements should be honoured for setup_vm() to work
630 * correctly:
631 * 1) It should use PC-relative addressing for accessing kernel symbols.
632 * To achieve this we always use GCC cmodel=medany.
633 * 2) The compiler instrumentation for FTRACE will not work for setup_vm()
634 * so disable compiler instrumentation when FTRACE is enabled.
635 *
636 * Currently, the above requirements are honoured by using custom CFLAGS
637 * for init.o in mm/Makefile.
638 */
639
640#ifndef __riscv_cmodel_medany
Paul Walmsley6a527b62019-10-17 14:45:58 -0700641#error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
Anup Patel387181d2019-03-26 08:03:47 +0000642#endif
643
Vitaly Wool44c92252021-04-13 02:35:14 -0400644#ifdef CONFIG_XIP_KERNEL
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200645static void __init create_kernel_page_table(pgd_t *pgdir,
Alexandre Ghitie5c35fa02021-06-24 14:00:41 +0200646 __always_unused bool early)
Vitaly Wool44c92252021-04-13 02:35:14 -0400647{
648 uintptr_t va, end_va;
649
650 /* Map the flash resident part */
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200651 end_va = kernel_map.virt_addr + kernel_map.xiprom_sz;
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200652 for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE)
Vitaly Wool44c92252021-04-13 02:35:14 -0400653 create_pgd_mapping(pgdir, va,
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200654 kernel_map.xiprom + (va - kernel_map.virt_addr),
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200655 PMD_SIZE, PAGE_KERNEL_EXEC);
Vitaly Wool44c92252021-04-13 02:35:14 -0400656
657 /* Map the data in RAM */
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200658 end_va = kernel_map.virt_addr + XIP_OFFSET + kernel_map.size;
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200659 for (va = kernel_map.virt_addr + XIP_OFFSET; va < end_va; va += PMD_SIZE)
Vitaly Wool44c92252021-04-13 02:35:14 -0400660 create_pgd_mapping(pgdir, va,
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200661 kernel_map.phys_addr + (va - (kernel_map.virt_addr + XIP_OFFSET)),
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200662 PMD_SIZE, PAGE_KERNEL);
Vitaly Wool44c92252021-04-13 02:35:14 -0400663}
664#else
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200665static void __init create_kernel_page_table(pgd_t *pgdir, bool early)
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400666{
667 uintptr_t va, end_va;
668
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200669 end_va = kernel_map.virt_addr + kernel_map.size;
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200670 for (va = kernel_map.virt_addr; va < end_va; va += PMD_SIZE)
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400671 create_pgd_mapping(pgdir, va,
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200672 kernel_map.phys_addr + (va - kernel_map.virt_addr),
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200673 PMD_SIZE,
Alexandre Ghitie5c35fa02021-06-24 14:00:41 +0200674 early ?
675 PAGE_KERNEL_EXEC : pgprot_from_va(va));
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400676}
Vitaly Wool44c92252021-04-13 02:35:14 -0400677#endif
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400678
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200679/*
680 * Setup a 4MB mapping that encompasses the device tree: for 64-bit kernel,
681 * this means 2 PMD entries whereas for 32-bit kernel, this is only 1 PGDIR
682 * entry.
683 */
684static void __init create_fdt_early_page_table(pgd_t *pgdir, uintptr_t dtb_pa)
685{
686#ifndef CONFIG_BUILTIN_DTB
687 uintptr_t pa = dtb_pa & ~(PMD_SIZE - 1);
688
689 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100690 IS_ENABLED(CONFIG_64BIT) ? early_dtb_pgd_next : pa,
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200691 PGDIR_SIZE,
692 IS_ENABLED(CONFIG_64BIT) ? PAGE_TABLE : PAGE_KERNEL);
693
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100694 if (pgtable_l4_enabled) {
695 create_pud_mapping(early_dtb_pud, DTB_EARLY_BASE_VA,
696 (uintptr_t)early_dtb_pmd, PUD_SIZE, PAGE_TABLE);
697 }
698
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200699 if (IS_ENABLED(CONFIG_64BIT)) {
700 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA,
701 pa, PMD_SIZE, PAGE_KERNEL);
702 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE,
703 pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
704 }
705
706 dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1));
707#else
708 /*
709 * For 64-bit kernel, __va can't be used since it would return a linear
710 * mapping address whereas dtb_early_va will be used before
711 * setup_vm_final installs the linear mapping. For 32-bit kernel, as the
712 * kernel is mapped in the linear mapping, that makes no difference.
713 */
714 dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa));
715#endif
716
717 dtb_early_pa = dtb_pa;
718}
719
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100720/*
721 * MMU is not enabled, the page tables are allocated directly using
722 * early_pmd/pud/p4d and the address returned is the physical one.
723 */
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800724void __init pt_ops_set_early(void)
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100725{
726 pt_ops.alloc_pte = alloc_pte_early;
727 pt_ops.get_pte_virt = get_pte_virt_early;
728#ifndef __PAGETABLE_PMD_FOLDED
729 pt_ops.alloc_pmd = alloc_pmd_early;
730 pt_ops.get_pmd_virt = get_pmd_virt_early;
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100731 pt_ops.alloc_pud = alloc_pud_early;
732 pt_ops.get_pud_virt = get_pud_virt_early;
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100733#endif
734}
735
736/*
737 * MMU is enabled but page table setup is not complete yet.
738 * fixmap page table alloc functions must be used as a means to temporarily
739 * map the allocated physical pages since the linear mapping does not exist yet.
740 *
741 * Note that this is called with MMU disabled, hence kernel_mapping_pa_to_va,
742 * but it will be used as described above.
743 */
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800744void __init pt_ops_set_fixmap(void)
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100745{
746 pt_ops.alloc_pte = kernel_mapping_pa_to_va((uintptr_t)alloc_pte_fixmap);
747 pt_ops.get_pte_virt = kernel_mapping_pa_to_va((uintptr_t)get_pte_virt_fixmap);
748#ifndef __PAGETABLE_PMD_FOLDED
749 pt_ops.alloc_pmd = kernel_mapping_pa_to_va((uintptr_t)alloc_pmd_fixmap);
750 pt_ops.get_pmd_virt = kernel_mapping_pa_to_va((uintptr_t)get_pmd_virt_fixmap);
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100751 pt_ops.alloc_pud = kernel_mapping_pa_to_va((uintptr_t)alloc_pud_fixmap);
752 pt_ops.get_pud_virt = kernel_mapping_pa_to_va((uintptr_t)get_pud_virt_fixmap);
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100753#endif
754}
755
756/*
757 * MMU is enabled and page table setup is complete, so from now, we can use
758 * generic page allocation functions to setup page table.
759 */
Palmer Dabbelt0c34e792022-01-19 19:23:41 -0800760void __init pt_ops_set_late(void)
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100761{
762 pt_ops.alloc_pte = alloc_pte_late;
763 pt_ops.get_pte_virt = get_pte_virt_late;
764#ifndef __PAGETABLE_PMD_FOLDED
765 pt_ops.alloc_pmd = alloc_pmd_late;
766 pt_ops.get_pmd_virt = get_pmd_virt_late;
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100767 pt_ops.alloc_pud = alloc_pud_late;
768 pt_ops.get_pud_virt = get_pud_virt_late;
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100769#endif
770}
771
Anup Patel671f9a32019-06-28 13:36:21 -0700772asmlinkage void __init setup_vm(uintptr_t dtb_pa)
Anup Patel6f1e9e92019-02-13 16:38:36 +0530773{
Alexandre Ghiti6f3e5fd2021-07-23 15:01:26 +0200774 pmd_t __maybe_unused fix_bmap_spmd, fix_bmap_epmd;
Anup Patel6f1e9e92019-02-13 16:38:36 +0530775
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200776 kernel_map.virt_addr = KERNEL_LINK_ADDR;
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100777 kernel_map.page_offset = _AC(CONFIG_PAGE_OFFSET, UL);
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200778
Vitaly Wool44c92252021-04-13 02:35:14 -0400779#ifdef CONFIG_XIP_KERNEL
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200780 kernel_map.xiprom = (uintptr_t)CONFIG_XIP_PHYS_ADDR;
781 kernel_map.xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom);
Vitaly Wool44c92252021-04-13 02:35:14 -0400782
Alexandre Ghiti6d7f91d2021-07-21 09:59:35 +0200783 phys_ram_base = CONFIG_PHYS_RAM_BASE;
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200784 kernel_map.phys_addr = (uintptr_t)CONFIG_PHYS_RAM_BASE;
785 kernel_map.size = (uintptr_t)(&_end) - (uintptr_t)(&_sdata);
Vitaly Wool44c92252021-04-13 02:35:14 -0400786
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200787 kernel_map.va_kernel_xip_pa_offset = kernel_map.virt_addr - kernel_map.xiprom;
Vitaly Wool44c92252021-04-13 02:35:14 -0400788#else
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200789 kernel_map.phys_addr = (uintptr_t)(&_start);
790 kernel_map.size = (uintptr_t)(&_end) - kernel_map.phys_addr;
Vitaly Wool44c92252021-04-13 02:35:14 -0400791#endif
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100792
793#if defined(CONFIG_64BIT) && !defined(CONFIG_XIP_KERNEL)
794 set_satp_mode();
795#endif
796
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200797 kernel_map.va_pa_offset = PAGE_OFFSET - kernel_map.phys_addr;
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200798 kernel_map.va_kernel_pa_offset = kernel_map.virt_addr - kernel_map.phys_addr;
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400799
Kenneth Leefb31f0a2021-07-28 15:15:57 +0800800 riscv_pfn_base = PFN_DOWN(kernel_map.phys_addr);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530801
Alexandre Ghitif7ae0232021-12-06 11:46:45 +0100802 /*
803 * The default maximal physical memory size is KERN_VIRT_SIZE for 32-bit
804 * kernel, whereas for 64-bit kernel, the end of the virtual address
805 * space is occupied by the modules/BPF/kernel mappings which reduces
806 * the available size of the linear mapping.
807 */
808 memory_limit = KERN_VIRT_SIZE - (IS_ENABLED(CONFIG_64BIT) ? SZ_4G : 0);
809
Anup Patel6f1e9e92019-02-13 16:38:36 +0530810 /* Sanity check alignment and size */
811 BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200812 BUG_ON((kernel_map.phys_addr % PMD_SIZE) != 0);
Anup Patel671f9a32019-06-28 13:36:21 -0700813
Alexandre Ghitidb6b84a2021-06-29 11:13:48 +0200814#ifdef CONFIG_64BIT
815 /*
816 * The last 4K bytes of the addressable memory can not be mapped because
817 * of IS_ERR_VALUE macro.
818 */
819 BUG_ON((kernel_map.virt_addr + kernel_map.size) > ADDRESS_SPACE_END - SZ_4K);
Atish Patrae8dcb612020-09-17 15:37:12 -0700820#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700821
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100822 pt_ops_set_early();
823
Anup Patel6f1e9e92019-02-13 16:38:36 +0530824 /* Setup early PGD for fixmap */
825 create_pgd_mapping(early_pg_dir, FIXADDR_START,
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100826 fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530827
828#ifndef __PAGETABLE_PMD_FOLDED
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100829 /* Setup fixmap PUD and PMD */
830 if (pgtable_l4_enabled)
831 create_pud_mapping(fixmap_pud, FIXADDR_START,
832 (uintptr_t)fixmap_pmd, PUD_SIZE, PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700833 create_pmd_mapping(fixmap_pmd, FIXADDR_START,
834 (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
835 /* Setup trampoline PGD and PMD */
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200836 create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr,
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100837 trampoline_pgd_next, PGDIR_SIZE, PAGE_TABLE);
838 if (pgtable_l4_enabled)
839 create_pud_mapping(trampoline_pud, kernel_map.virt_addr,
840 (uintptr_t)trampoline_pmd, PUD_SIZE, PAGE_TABLE);
Vitaly Wool44c92252021-04-13 02:35:14 -0400841#ifdef CONFIG_XIP_KERNEL
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200842 create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr,
843 kernel_map.xiprom, PMD_SIZE, PAGE_KERNEL_EXEC);
Vitaly Wool44c92252021-04-13 02:35:14 -0400844#else
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200845 create_pmd_mapping(trampoline_pmd, kernel_map.virt_addr,
846 kernel_map.phys_addr, PMD_SIZE, PAGE_KERNEL_EXEC);
Vitaly Wool44c92252021-04-13 02:35:14 -0400847#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530848#else
Anup Patel671f9a32019-06-28 13:36:21 -0700849 /* Setup trampoline PGD */
Alexandre Ghiti658e2c52021-06-17 15:53:07 +0200850 create_pgd_mapping(trampoline_pg_dir, kernel_map.virt_addr,
851 kernel_map.phys_addr, PGDIR_SIZE, PAGE_KERNEL_EXEC);
Anup Patel671f9a32019-06-28 13:36:21 -0700852#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530853
Anup Patel671f9a32019-06-28 13:36:21 -0700854 /*
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400855 * Setup early PGD covering entire kernel which will allow
Anup Patel671f9a32019-06-28 13:36:21 -0700856 * us to reach paging_init(). We map all memory banks later
857 * in setup_vm_final() below.
858 */
Alexandre Ghiti526f83d2021-07-23 15:01:25 +0200859 create_kernel_page_table(early_pg_dir, true);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530860
Alexandre Ghitife45ffa2021-07-23 15:01:28 +0200861 /* Setup early mapping for FDT early scan */
862 create_fdt_early_page_table(early_pg_dir, dtb_pa);
Atish Patra6262f662020-09-17 15:37:11 -0700863
864 /*
865 * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
866 * range can not span multiple pmds.
867 */
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100868 BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
Atish Patra6262f662020-09-17 15:37:11 -0700869 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
870
871#ifndef __PAGETABLE_PMD_FOLDED
872 /*
873 * Early ioremap fixmap is already created as it lies within first 2MB
874 * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END
875 * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn
876 * the user if not.
877 */
878 fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))];
879 fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))];
880 if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) {
881 WARN_ON(1);
882 pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n",
883 pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd));
884 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
885 fix_to_virt(FIX_BTMAP_BEGIN));
886 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
887 fix_to_virt(FIX_BTMAP_END));
888
889 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
890 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
891 }
892#endif
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100893
894 pt_ops_set_fixmap();
Anup Patel671f9a32019-06-28 13:36:21 -0700895}
896
897static void __init setup_vm_final(void)
898{
899 uintptr_t va, map_size;
900 phys_addr_t pa, start, end;
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700901 u64 i;
Anup Patel671f9a32019-06-28 13:36:21 -0700902
Anup Patel671f9a32019-06-28 13:36:21 -0700903 /* Setup swapper PGD for fixmap */
904 create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
Zong Liac51e002020-01-02 11:12:40 +0800905 __pa_symbol(fixmap_pgd_next),
Anup Patel671f9a32019-06-28 13:36:21 -0700906 PGDIR_SIZE, PAGE_TABLE);
907
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400908 /* Map all memory banks in the linear mapping */
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700909 for_each_mem_range(i, &start, &end) {
Anup Patel671f9a32019-06-28 13:36:21 -0700910 if (start >= end)
911 break;
Anup Patel671f9a32019-06-28 13:36:21 -0700912 if (start <= __pa(PAGE_OFFSET) &&
913 __pa(PAGE_OFFSET) < end)
914 start = __pa(PAGE_OFFSET);
Alexandre Ghitic99127c2021-06-29 11:13:47 +0200915 if (end >= __pa(PAGE_OFFSET) + memory_limit)
916 end = __pa(PAGE_OFFSET) + memory_limit;
Anup Patel671f9a32019-06-28 13:36:21 -0700917
918 map_size = best_map_size(start, end - start);
919 for (pa = start; pa < end; pa += map_size) {
920 va = (uintptr_t)__va(pa);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400921
Alexandre Ghitie5c35fa02021-06-24 14:00:41 +0200922 create_pgd_mapping(swapper_pg_dir, va, pa, map_size,
923 pgprot_from_va(va));
Anup Patel671f9a32019-06-28 13:36:21 -0700924 }
Anup Patel6f1e9e92019-02-13 16:38:36 +0530925 }
Anup Patelf2c17aa2019-01-07 20:57:01 +0530926
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400927 /* Map the kernel */
Jisheng Zhang07aabe82021-12-06 23:03:50 +0800928 if (IS_ENABLED(CONFIG_64BIT))
929 create_kernel_page_table(swapper_pg_dir, false);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400930
Alexandre Ghiti2efad172021-12-06 11:46:46 +0100931#ifdef CONFIG_KASAN
932 kasan_swapper_init();
933#endif
934
Anup Patel671f9a32019-06-28 13:36:21 -0700935 /* Clear fixmap PTE and PMD mappings */
936 clear_fixmap(FIX_PTE);
937 clear_fixmap(FIX_PMD);
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100938 clear_fixmap(FIX_PUD);
Anup Patel671f9a32019-06-28 13:36:21 -0700939
940 /* Move to swapper page table */
Alexandre Ghitie8a62cc2021-12-06 11:46:51 +0100941 csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | satp_mode);
Anup Patel671f9a32019-06-28 13:36:21 -0700942 local_flush_tlb_all();
Atish Patrae8dcb612020-09-17 15:37:12 -0700943
Alexandre Ghiti840125a2021-12-06 11:46:47 +0100944 pt_ops_set_late();
Anup Patel671f9a32019-06-28 13:36:21 -0700945}
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100946#else
947asmlinkage void __init setup_vm(uintptr_t dtb_pa)
948{
949 dtb_early_va = (void *)dtb_pa;
Atish Patraa78c6f52020-10-01 12:04:56 -0700950 dtb_early_pa = dtb_pa;
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100951}
952
953static inline void setup_vm_final(void)
954{
955}
956#endif /* CONFIG_MMU */
Anup Patel671f9a32019-06-28 13:36:21 -0700957
Nick Kossifidise53d2812021-04-19 03:55:38 +0300958#ifdef CONFIG_KEXEC_CORE
959/*
960 * reserve_crashkernel() - reserves memory for crash kernel
961 *
962 * This function reserves memory area given in "crashkernel=" kernel command
963 * line parameter. The memory reserved is used by dump capture kernel when
964 * primary kernel is crashing.
965 */
966static void __init reserve_crashkernel(void)
967{
968 unsigned long long crash_base = 0;
969 unsigned long long crash_size = 0;
970 unsigned long search_start = memblock_start_of_DRAM();
971 unsigned long search_end = memblock_end_of_DRAM();
972
973 int ret = 0;
974
Nick Kossifidis56409752021-04-19 03:55:39 +0300975 /*
976 * Don't reserve a region for a crash kernel on a crash kernel
977 * since it doesn't make much sense and we have limited memory
978 * resources.
979 */
Nick Kossifidis56409752021-04-19 03:55:39 +0300980 if (is_kdump_kernel()) {
981 pr_info("crashkernel: ignoring reservation request\n");
982 return;
983 }
Nick Kossifidis56409752021-04-19 03:55:39 +0300984
Nick Kossifidise53d2812021-04-19 03:55:38 +0300985 ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),
986 &crash_size, &crash_base);
987 if (ret || !crash_size)
988 return;
989
990 crash_size = PAGE_ALIGN(crash_size);
991
Mike Rapoporta7259df2021-09-02 15:00:26 -0700992 if (crash_base) {
993 search_start = crash_base;
994 search_end = crash_base + crash_size;
Nick Kossifidise53d2812021-04-19 03:55:38 +0300995 }
Mike Rapoporta7259df2021-09-02 15:00:26 -0700996
997 /*
998 * Current riscv boot protocol requires 2MB alignment for
999 * RV64 and 4MB alignment for RV32 (hugepage size)
Nick Kossifidisdecf89f2021-11-26 20:04:11 +02001000 *
1001 * Try to alloc from 32bit addressible physical memory so that
1002 * swiotlb can work on the crash kernel.
Mike Rapoporta7259df2021-09-02 15:00:26 -07001003 */
1004 crash_base = memblock_phys_alloc_range(crash_size, PMD_SIZE,
Nick Kossifidisdecf89f2021-11-26 20:04:11 +02001005 search_start,
1006 min(search_end, (unsigned long) SZ_4G));
Mike Rapoporta7259df2021-09-02 15:00:26 -07001007 if (crash_base == 0) {
Nick Kossifidisdecf89f2021-11-26 20:04:11 +02001008 /* Try again without restricting region to 32bit addressible memory */
1009 crash_base = memblock_phys_alloc_range(crash_size, PMD_SIZE,
1010 search_start, search_end);
1011 if (crash_base == 0) {
1012 pr_warn("crashkernel: couldn't allocate %lldKB\n",
1013 crash_size >> 10);
1014 return;
1015 }
Mike Rapoporta7259df2021-09-02 15:00:26 -07001016 }
Nick Kossifidise53d2812021-04-19 03:55:38 +03001017
1018 pr_info("crashkernel: reserved 0x%016llx - 0x%016llx (%lld MB)\n",
1019 crash_base, crash_base + crash_size, crash_size >> 20);
1020
1021 crashk_res.start = crash_base;
1022 crashk_res.end = crash_base + crash_size - 1;
1023}
1024#endif /* CONFIG_KEXEC_CORE */
1025
Anup Patel671f9a32019-06-28 13:36:21 -07001026void __init paging_init(void)
1027{
Kefeng Wangf842f5f2021-05-10 19:42:22 +08001028 setup_bootmem();
Anup Patel671f9a32019-06-28 13:36:21 -07001029 setup_vm_final();
Atish Patracbd34f42020-11-18 16:38:27 -08001030}
1031
1032void __init misc_mem_init(void)
1033{
Kefeng Wangf6e5aed2021-02-25 14:54:17 +08001034 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
Atish Patra4f0e8ee2020-11-18 16:38:29 -08001035 arch_numa_init();
Atish Patracbd34f42020-11-18 16:38:27 -08001036 sparse_init();
Anup Patel671f9a32019-06-28 13:36:21 -07001037 zone_sizes_init();
Nick Kossifidise53d2812021-04-19 03:55:38 +03001038#ifdef CONFIG_KEXEC_CORE
1039 reserve_crashkernel();
1040#endif
Atish Patra4f0e8ee2020-11-18 16:38:29 -08001041 memblock_dump_all();
Anup Patel6f1e9e92019-02-13 16:38:36 +05301042}
Logan Gunthorped95f1a52019-08-28 15:40:54 -06001043
Kefeng Wang9fe57d82019-10-23 11:23:02 +08001044#ifdef CONFIG_SPARSEMEM_VMEMMAP
Logan Gunthorped95f1a52019-08-28 15:40:54 -06001045int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
1046 struct vmem_altmap *altmap)
1047{
Anshuman Khandual1d9cfee2020-08-06 23:23:19 -07001048 return vmemmap_populate_basepages(start, end, node, NULL);
Logan Gunthorped95f1a52019-08-28 15:40:54 -06001049}
1050#endif