blob: 0fc72603c699d03e70de7aad48bc1540faa6ccbb [file] [log] [blame]
Thomas Gleixner50acfb22019-05-29 07:18:00 -07001// SPDX-License-Identifier: GPL-2.0-only
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07002/*
3 * Copyright (C) 2012 Regents of the University of California
Anup Patel671f9a32019-06-28 13:36:21 -07004 * Copyright (C) 2019 Western Digital Corporation or its affiliates.
Nick Kossifidise53d2812021-04-19 03:55:38 +03005 * Copyright (C) 2020 FORTH-ICS/CARV
6 * Nick Kossifidis <mick@ics.forth.gr>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07007 */
8
9#include <linux/init.h>
10#include <linux/mm.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070011#include <linux/memblock.h>
Mike Rapoport57c8a662018-10-30 15:09:49 -070012#include <linux/initrd.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070013#include <linux/swap.h>
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010014#include <linux/sizes.h>
Anup Patel0651c262019-02-21 11:25:49 +053015#include <linux/of_fdt.h>
Nick Kossifidis56409752021-04-19 03:55:39 +030016#include <linux/of_reserved_mem.h>
Albert Ou922b0372019-09-27 16:14:18 -070017#include <linux/libfdt.h>
Zong Lid27c3c92020-03-10 00:55:41 +080018#include <linux/set_memory.h>
Kefeng Wangda815582020-10-31 14:01:12 +080019#include <linux/dma-map-ops.h>
Nick Kossifidise53d2812021-04-19 03:55:38 +030020#include <linux/crash_dump.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070021
Anup Patelf2c17aa2019-01-07 20:57:01 +053022#include <asm/fixmap.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070023#include <asm/tlbflush.h>
24#include <asm/sections.h>
Palmer Dabbelt2d268252020-04-14 13:43:24 +090025#include <asm/soc.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070026#include <asm/io.h>
Zong Lib422d282020-06-03 16:03:55 -070027#include <asm/ptdump.h>
Atish Patra4f0e8ee2020-11-18 16:38:29 -080028#include <asm/numa.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070029
Paul Walmsleyffaee272019-10-17 15:00:17 -070030#include "../kernel/head.h"
31
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -040032unsigned long kernel_virt_addr = KERNEL_LINK_ADDR;
33EXPORT_SYMBOL(kernel_virt_addr);
Vitaly Wool44c92252021-04-13 02:35:14 -040034#ifdef CONFIG_XIP_KERNEL
35#define kernel_virt_addr (*((unsigned long *)XIP_FIXUP(&kernel_virt_addr)))
36#endif
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -040037
Anup Patel387181d2019-03-26 08:03:47 +000038unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
39 __page_aligned_bss;
40EXPORT_SYMBOL(empty_zero_page);
41
Anup Pateld90d45d2019-06-07 06:01:29 +000042extern char _start[];
Anup Patel8f3a2b42020-09-17 15:37:10 -070043#define DTB_EARLY_BASE_VA PGDIR_SIZE
Vitaly Wool44c92252021-04-13 02:35:14 -040044void *_dtb_early_va __initdata;
45uintptr_t _dtb_early_pa __initdata;
Anup Pateld90d45d2019-06-07 06:01:29 +000046
Atish Patrae8dcb612020-09-17 15:37:12 -070047struct pt_alloc_ops {
48 pte_t *(*get_pte_virt)(phys_addr_t pa);
49 phys_addr_t (*alloc_pte)(uintptr_t va);
50#ifndef __PAGETABLE_PMD_FOLDED
51 pmd_t *(*get_pmd_virt)(phys_addr_t pa);
52 phys_addr_t (*alloc_pmd)(uintptr_t va);
53#endif
54};
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070055
Kefeng Wangda815582020-10-31 14:01:12 +080056static phys_addr_t dma32_phys_limit __ro_after_init;
57
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070058static void __init zone_sizes_init(void)
59{
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010060 unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070061
Zong Lid5fad482018-06-25 16:49:37 +080062#ifdef CONFIG_ZONE_DMA32
Kefeng Wangda815582020-10-31 14:01:12 +080063 max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit);
Zong Lid5fad482018-06-25 16:49:37 +080064#endif
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010065 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
66
Mike Rapoport9691a072020-06-03 15:57:10 -070067 free_area_init(max_zone_pfns);
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070068}
69
Jisheng Zhang19875012021-03-30 02:22:21 +080070static void __init setup_zero_page(void)
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070071{
72 memset((void *)empty_zero_page, 0, PAGE_SIZE);
73}
74
Kefeng Wang8fa3cdf2020-05-14 19:53:35 +080075#if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000076static inline void print_mlk(char *name, unsigned long b, unsigned long t)
77{
78 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t,
79 (((t) - (b)) >> 10));
80}
81
82static inline void print_mlm(char *name, unsigned long b, unsigned long t)
83{
84 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t,
85 (((t) - (b)) >> 20));
86}
87
Jisheng Zhang19875012021-03-30 02:22:21 +080088static void __init print_vm_layout(void)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000089{
90 pr_notice("Virtual kernel memory layout:\n");
91 print_mlk("fixmap", (unsigned long)FIXADDR_START,
92 (unsigned long)FIXADDR_TOP);
93 print_mlm("pci io", (unsigned long)PCI_IO_START,
94 (unsigned long)PCI_IO_END);
95 print_mlm("vmemmap", (unsigned long)VMEMMAP_START,
96 (unsigned long)VMEMMAP_END);
97 print_mlm("vmalloc", (unsigned long)VMALLOC_START,
98 (unsigned long)VMALLOC_END);
99 print_mlm("lowmem", (unsigned long)PAGE_OFFSET,
100 (unsigned long)high_memory);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400101#ifdef CONFIG_64BIT
102 print_mlm("kernel", (unsigned long)KERNEL_LINK_ADDR,
103 (unsigned long)ADDRESS_SPACE_END);
104#endif
Yash Shah2cc6c4a2019-11-18 05:58:34 +0000105}
106#else
107static void print_vm_layout(void) { }
108#endif /* CONFIG_DEBUG_VM */
109
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700110void __init mem_init(void)
111{
112#ifdef CONFIG_FLATMEM
113 BUG_ON(!mem_map);
114#endif /* CONFIG_FLATMEM */
115
116 high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
Mike Rapoportc6ffc5c2018-10-30 15:09:30 -0700117 memblock_free_all();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700118
Yash Shah2cc6c4a2019-11-18 05:58:34 +0000119 print_vm_layout();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700120}
121
Anup Patel0651c262019-02-21 11:25:49 +0530122void __init setup_bootmem(void)
123{
Zong Liac51e002020-01-02 11:12:40 +0800124 phys_addr_t vmlinux_end = __pa_symbol(&_end);
125 phys_addr_t vmlinux_start = __pa_symbol(&_start);
Bin Mengd0e4dae2021-06-27 21:51:17 +0800126 phys_addr_t dram_end;
Atish Patraabb8e862021-01-11 15:45:02 -0800127 phys_addr_t max_mapped_addr = __pa(~(ulong)0);
Anup Patel0651c262019-02-21 11:25:49 +0530128
Vitaly Wool44c92252021-04-13 02:35:14 -0400129#ifdef CONFIG_XIP_KERNEL
130 vmlinux_start = __pa_symbol(&_sdata);
131#endif
132
Kefeng Wangdd2d0822021-02-09 09:01:51 +0800133 /* The maximal physical memory size is -PAGE_OFFSET. */
Atish Patrade043da2020-12-18 16:13:56 -0800134 memblock_enforce_memory_limit(-PAGE_OFFSET);
Anup Patel0651c262019-02-21 11:25:49 +0530135
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400136 /*
137 * Reserve from the start of the kernel to the end of the kernel
Geert Uytterhoeven8db6f932021-04-29 17:05:00 +0200138 */
139#if defined(CONFIG_64BIT) && defined(CONFIG_STRICT_KERNEL_RWX)
140 /*
141 * Make sure we align the reservation on PMD_SIZE since we will
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400142 * map the kernel in the linear mapping as read-only: we do not want
143 * any allocation to happen between _end and the next pmd aligned page.
144 */
Geert Uytterhoeven8db6f932021-04-29 17:05:00 +0200145 vmlinux_end = (vmlinux_end + PMD_SIZE - 1) & PMD_MASK;
146#endif
147 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
Anup Pateld90d45d2019-06-07 06:01:29 +0000148
Bin Mengd0e4dae2021-06-27 21:51:17 +0800149 dram_end = memblock_end_of_DRAM();
150
Atish Patraabb8e862021-01-11 15:45:02 -0800151 /*
152 * memblock allocator is not aware of the fact that last 4K bytes of
153 * the addressable memory can not be mapped because of IS_ERR_VALUE
154 * macro. Make sure that last 4k bytes are not usable by memblock
155 * if end of dram is equal to maximum addressable memory.
156 */
157 if (max_mapped_addr == (dram_end - 1))
158 memblock_set_current_limit(max_mapped_addr - 4096);
159
Kefeng Wangf6e5aed2021-02-25 14:54:17 +0800160 min_low_pfn = PFN_UP(memblock_start_of_DRAM());
161 max_low_pfn = max_pfn = PFN_DOWN(dram_end);
162
Kefeng Wangda815582020-10-31 14:01:12 +0800163 dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
Guo Ren336e8eb2021-01-21 14:31:17 +0800164 set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
Anup Patel0651c262019-02-21 11:25:49 +0530165
Kefeng Wangaec33b52021-01-15 13:46:06 +0800166 reserve_initrd_mem();
Albert Ou922b0372019-09-27 16:14:18 -0700167 /*
Vitaly Woolf105aa92021-01-16 01:49:48 +0200168 * If DTB is built in, no need to reserve its memblock.
169 * Otherwise, do reserve it but avoid using
170 * early_init_fdt_reserve_self() since __pa() does
Albert Ou922b0372019-09-27 16:14:18 -0700171 * not work for DTB pointers that are fixmap addresses
172 */
Vitaly Woolf105aa92021-01-16 01:49:48 +0200173 if (!IS_ENABLED(CONFIG_BUILTIN_DTB))
174 memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
Albert Ou922b0372019-09-27 16:14:18 -0700175
Anup Patel0651c262019-02-21 11:25:49 +0530176 early_init_fdt_scan_reserved_mem();
Kefeng Wangda815582020-10-31 14:01:12 +0800177 dma_contiguous_reserve(dma32_phys_limit);
Anup Patel0651c262019-02-21 11:25:49 +0530178 memblock_allow_resize();
Anup Patel0651c262019-02-21 11:25:49 +0530179}
Anup Patel6f1e9e92019-02-13 16:38:36 +0530180
Vitaly Wool44c92252021-04-13 02:35:14 -0400181#ifdef CONFIG_XIP_KERNEL
Atish Patrae8dcb612020-09-17 15:37:12 -0700182
Vitaly Wool44c92252021-04-13 02:35:14 -0400183extern char _xiprom[], _exiprom[];
184extern char _sdata[], _edata[];
185
186#endif /* CONFIG_XIP_KERNEL */
187
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700188#ifdef CONFIG_MMU
Vitaly Wool44c92252021-04-13 02:35:14 -0400189static struct pt_alloc_ops _pt_ops __ro_after_init;
190
191#ifdef CONFIG_XIP_KERNEL
192#define pt_ops (*(struct pt_alloc_ops *)XIP_FIXUP(&_pt_ops))
193#else
194#define pt_ops _pt_ops
195#endif
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100196
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400197/* Offset between linear mapping virtual address and kernel load address */
Jisheng Zhangde31ea42021-03-30 02:22:51 +0800198unsigned long va_pa_offset __ro_after_init;
Anup Patel387181d2019-03-26 08:03:47 +0000199EXPORT_SYMBOL(va_pa_offset);
Vitaly Wool44c92252021-04-13 02:35:14 -0400200#ifdef CONFIG_XIP_KERNEL
201#define va_pa_offset (*((unsigned long *)XIP_FIXUP(&va_pa_offset)))
202#endif
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400203/* Offset between kernel mapping virtual address and kernel load address */
Vitaly Wool44c92252021-04-13 02:35:14 -0400204#ifdef CONFIG_64BIT
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400205unsigned long va_kernel_pa_offset;
206EXPORT_SYMBOL(va_kernel_pa_offset);
207#endif
Vitaly Wool44c92252021-04-13 02:35:14 -0400208#ifdef CONFIG_XIP_KERNEL
209#define va_kernel_pa_offset (*((unsigned long *)XIP_FIXUP(&va_kernel_pa_offset)))
210#endif
211unsigned long va_kernel_xip_pa_offset;
212EXPORT_SYMBOL(va_kernel_xip_pa_offset);
213#ifdef CONFIG_XIP_KERNEL
214#define va_kernel_xip_pa_offset (*((unsigned long *)XIP_FIXUP(&va_kernel_xip_pa_offset)))
215#endif
Jisheng Zhangde31ea42021-03-30 02:22:51 +0800216unsigned long pfn_base __ro_after_init;
Anup Patel387181d2019-03-26 08:03:47 +0000217EXPORT_SYMBOL(pfn_base);
218
Anup Patel6f1e9e92019-02-13 16:38:36 +0530219pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700220pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patelf2c17aa2019-01-07 20:57:01 +0530221pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700222
Anup Patel671f9a32019-06-28 13:36:21 -0700223pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530224
Vitaly Wool44c92252021-04-13 02:35:14 -0400225#ifdef CONFIG_XIP_KERNEL
226#define trampoline_pg_dir ((pgd_t *)XIP_FIXUP(trampoline_pg_dir))
227#define fixmap_pte ((pte_t *)XIP_FIXUP(fixmap_pte))
228#define early_pg_dir ((pgd_t *)XIP_FIXUP(early_pg_dir))
229#endif /* CONFIG_XIP_KERNEL */
230
Anup Patelf2c17aa2019-01-07 20:57:01 +0530231void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
232{
233 unsigned long addr = __fix_to_virt(idx);
234 pte_t *ptep;
235
236 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
237
238 ptep = &fixmap_pte[pte_index(addr)];
239
Greentime Hu21190b72020-08-04 11:02:05 +0800240 if (pgprot_val(prot))
Anup Patelf2c17aa2019-01-07 20:57:01 +0530241 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
Greentime Hu21190b72020-08-04 11:02:05 +0800242 else
Anup Patelf2c17aa2019-01-07 20:57:01 +0530243 pte_clear(&init_mm, addr, ptep);
Greentime Hu21190b72020-08-04 11:02:05 +0800244 local_flush_tlb_page(addr);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530245}
246
Atish Patrae8dcb612020-09-17 15:37:12 -0700247static inline pte_t *__init get_pte_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700248{
Atish Patrae8dcb612020-09-17 15:37:12 -0700249 return (pte_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700250}
251
Atish Patrae8dcb612020-09-17 15:37:12 -0700252static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa)
253{
254 clear_fixmap(FIX_PTE);
255 return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
256}
257
258static inline pte_t *get_pte_virt_late(phys_addr_t pa)
259{
260 return (pte_t *) __va(pa);
261}
262
263static inline phys_addr_t __init alloc_pte_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700264{
265 /*
266 * We only create PMD or PGD early mappings so we
267 * should never reach here with MMU disabled.
268 */
Atish Patrae8dcb612020-09-17 15:37:12 -0700269 BUG();
270}
Anup Patel671f9a32019-06-28 13:36:21 -0700271
Atish Patrae8dcb612020-09-17 15:37:12 -0700272static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va)
273{
Anup Patel671f9a32019-06-28 13:36:21 -0700274 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
275}
276
Atish Patrae8dcb612020-09-17 15:37:12 -0700277static phys_addr_t alloc_pte_late(uintptr_t va)
278{
279 unsigned long vaddr;
280
281 vaddr = __get_free_page(GFP_KERNEL);
zhouchuangaoe75e6bf2021-03-30 06:56:26 -0700282 BUG_ON(!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr)));
283
Atish Patrae8dcb612020-09-17 15:37:12 -0700284 return __pa(vaddr);
285}
286
Anup Patel671f9a32019-06-28 13:36:21 -0700287static void __init create_pte_mapping(pte_t *ptep,
288 uintptr_t va, phys_addr_t pa,
289 phys_addr_t sz, pgprot_t prot)
290{
Mike Rapoport974b9b22020-06-08 21:33:10 -0700291 uintptr_t pte_idx = pte_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700292
293 BUG_ON(sz != PAGE_SIZE);
294
Mike Rapoport974b9b22020-06-08 21:33:10 -0700295 if (pte_none(ptep[pte_idx]))
296 ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700297}
298
299#ifndef __PAGETABLE_PMD_FOLDED
300
301pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
302pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
Alexandre Ghiti0f02de42021-02-21 09:22:33 -0500303pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
Anup Patel1074dd42020-11-04 12:07:13 +0530304pmd_t early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE);
Anup Patel671f9a32019-06-28 13:36:21 -0700305
Vitaly Wool44c92252021-04-13 02:35:14 -0400306#ifdef CONFIG_XIP_KERNEL
307#define trampoline_pmd ((pmd_t *)XIP_FIXUP(trampoline_pmd))
308#define fixmap_pmd ((pmd_t *)XIP_FIXUP(fixmap_pmd))
309#define early_pmd ((pmd_t *)XIP_FIXUP(early_pmd))
310#endif /* CONFIG_XIP_KERNEL */
311
Atish Patrae8dcb612020-09-17 15:37:12 -0700312static pmd_t *__init get_pmd_virt_early(phys_addr_t pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700313{
Atish Patrae8dcb612020-09-17 15:37:12 -0700314 /* Before MMU is enabled */
315 return (pmd_t *)((uintptr_t)pa);
Anup Patel671f9a32019-06-28 13:36:21 -0700316}
317
Atish Patrae8dcb612020-09-17 15:37:12 -0700318static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa)
319{
320 clear_fixmap(FIX_PMD);
321 return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
322}
323
324static pmd_t *get_pmd_virt_late(phys_addr_t pa)
325{
326 return (pmd_t *) __va(pa);
327}
328
329static phys_addr_t __init alloc_pmd_early(uintptr_t va)
Anup Patel671f9a32019-06-28 13:36:21 -0700330{
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400331 BUG_ON((va - kernel_virt_addr) >> PGDIR_SHIFT);
Anup Patel671f9a32019-06-28 13:36:21 -0700332
Alexandre Ghiti0f02de42021-02-21 09:22:33 -0500333 return (uintptr_t)early_pmd;
Anup Patel671f9a32019-06-28 13:36:21 -0700334}
335
Atish Patrae8dcb612020-09-17 15:37:12 -0700336static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va)
337{
338 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
339}
340
341static phys_addr_t alloc_pmd_late(uintptr_t va)
342{
343 unsigned long vaddr;
344
345 vaddr = __get_free_page(GFP_KERNEL);
346 BUG_ON(!vaddr);
347 return __pa(vaddr);
348}
349
Anup Patel671f9a32019-06-28 13:36:21 -0700350static void __init create_pmd_mapping(pmd_t *pmdp,
351 uintptr_t va, phys_addr_t pa,
352 phys_addr_t sz, pgprot_t prot)
353{
354 pte_t *ptep;
355 phys_addr_t pte_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700356 uintptr_t pmd_idx = pmd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700357
358 if (sz == PMD_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700359 if (pmd_none(pmdp[pmd_idx]))
360 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700361 return;
362 }
363
Mike Rapoport974b9b22020-06-08 21:33:10 -0700364 if (pmd_none(pmdp[pmd_idx])) {
Atish Patrae8dcb612020-09-17 15:37:12 -0700365 pte_phys = pt_ops.alloc_pte(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700366 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
Atish Patrae8dcb612020-09-17 15:37:12 -0700367 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700368 memset(ptep, 0, PAGE_SIZE);
369 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700370 pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
Atish Patrae8dcb612020-09-17 15:37:12 -0700371 ptep = pt_ops.get_pte_virt(pte_phys);
Anup Patel671f9a32019-06-28 13:36:21 -0700372 }
373
374 create_pte_mapping(ptep, va, pa, sz, prot);
375}
376
377#define pgd_next_t pmd_t
Atish Patrae8dcb612020-09-17 15:37:12 -0700378#define alloc_pgd_next(__va) pt_ops.alloc_pmd(__va)
379#define get_pgd_next_virt(__pa) pt_ops.get_pmd_virt(__pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700380#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
381 create_pmd_mapping(__nextp, __va, __pa, __sz, __prot)
Anup Patel671f9a32019-06-28 13:36:21 -0700382#define fixmap_pgd_next fixmap_pmd
383#else
384#define pgd_next_t pte_t
Atish Patrae8dcb612020-09-17 15:37:12 -0700385#define alloc_pgd_next(__va) pt_ops.alloc_pte(__va)
386#define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa)
Anup Patel671f9a32019-06-28 13:36:21 -0700387#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
388 create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
Anup Patel671f9a32019-06-28 13:36:21 -0700389#define fixmap_pgd_next fixmap_pte
390#endif
391
Atish Patrab91540d2020-09-17 15:37:15 -0700392void __init create_pgd_mapping(pgd_t *pgdp,
Anup Patel671f9a32019-06-28 13:36:21 -0700393 uintptr_t va, phys_addr_t pa,
394 phys_addr_t sz, pgprot_t prot)
395{
396 pgd_next_t *nextp;
397 phys_addr_t next_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700398 uintptr_t pgd_idx = pgd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700399
400 if (sz == PGDIR_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700401 if (pgd_val(pgdp[pgd_idx]) == 0)
402 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700403 return;
404 }
405
Mike Rapoport974b9b22020-06-08 21:33:10 -0700406 if (pgd_val(pgdp[pgd_idx]) == 0) {
Anup Patel671f9a32019-06-28 13:36:21 -0700407 next_phys = alloc_pgd_next(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700408 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700409 nextp = get_pgd_next_virt(next_phys);
410 memset(nextp, 0, PAGE_SIZE);
411 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700412 next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
Anup Patel671f9a32019-06-28 13:36:21 -0700413 nextp = get_pgd_next_virt(next_phys);
414 }
415
416 create_pgd_next_mapping(nextp, va, pa, sz, prot);
417}
418
419static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
420{
Zong Li0fdc6362019-11-08 01:00:40 -0800421 /* Upgrade to PMD_SIZE mappings whenever possible */
422 if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
423 return PAGE_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700424
Zong Li0fdc6362019-11-08 01:00:40 -0800425 return PMD_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700426}
427
Vitaly Wool44c92252021-04-13 02:35:14 -0400428#ifdef CONFIG_XIP_KERNEL
429/* called from head.S with MMU off */
430asmlinkage void __init __copy_data(void)
431{
432 void *from = (void *)(&_sdata);
433 void *end = (void *)(&_end);
434 void *to = (void *)CONFIG_PHYS_RAM_BASE;
435 size_t sz = (size_t)(end - from + 1);
436
437 memcpy(to, from, sz);
438}
439#endif
440
Anup Patel387181d2019-03-26 08:03:47 +0000441/*
442 * setup_vm() is called from head.S with MMU-off.
443 *
444 * Following requirements should be honoured for setup_vm() to work
445 * correctly:
446 * 1) It should use PC-relative addressing for accessing kernel symbols.
447 * To achieve this we always use GCC cmodel=medany.
448 * 2) The compiler instrumentation for FTRACE will not work for setup_vm()
449 * so disable compiler instrumentation when FTRACE is enabled.
450 *
451 * Currently, the above requirements are honoured by using custom CFLAGS
452 * for init.o in mm/Makefile.
453 */
454
455#ifndef __riscv_cmodel_medany
Paul Walmsley6a527b62019-10-17 14:45:58 -0700456#error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
Anup Patel387181d2019-03-26 08:03:47 +0000457#endif
458
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400459uintptr_t load_pa, load_sz;
Vitaly Wool44c92252021-04-13 02:35:14 -0400460#ifdef CONFIG_XIP_KERNEL
461#define load_pa (*((uintptr_t *)XIP_FIXUP(&load_pa)))
462#define load_sz (*((uintptr_t *)XIP_FIXUP(&load_sz)))
463#endif
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400464
Vitaly Wool44c92252021-04-13 02:35:14 -0400465#ifdef CONFIG_XIP_KERNEL
466uintptr_t xiprom, xiprom_sz;
467#define xiprom_sz (*((uintptr_t *)XIP_FIXUP(&xiprom_sz)))
468#define xiprom (*((uintptr_t *)XIP_FIXUP(&xiprom)))
469
470static void __init create_kernel_page_table(pgd_t *pgdir, uintptr_t map_size)
471{
472 uintptr_t va, end_va;
473
474 /* Map the flash resident part */
475 end_va = kernel_virt_addr + xiprom_sz;
476 for (va = kernel_virt_addr; va < end_va; va += map_size)
477 create_pgd_mapping(pgdir, va,
478 xiprom + (va - kernel_virt_addr),
479 map_size, PAGE_KERNEL_EXEC);
480
481 /* Map the data in RAM */
482 end_va = kernel_virt_addr + XIP_OFFSET + load_sz;
483 for (va = kernel_virt_addr + XIP_OFFSET; va < end_va; va += map_size)
484 create_pgd_mapping(pgdir, va,
485 load_pa + (va - (kernel_virt_addr + XIP_OFFSET)),
486 map_size, PAGE_KERNEL);
487}
488#else
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400489static void __init create_kernel_page_table(pgd_t *pgdir, uintptr_t map_size)
490{
491 uintptr_t va, end_va;
492
493 end_va = kernel_virt_addr + load_sz;
494 for (va = kernel_virt_addr; va < end_va; va += map_size)
495 create_pgd_mapping(pgdir, va,
496 load_pa + (va - kernel_virt_addr),
497 map_size, PAGE_KERNEL_EXEC);
498}
Vitaly Wool44c92252021-04-13 02:35:14 -0400499#endif
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400500
Anup Patel671f9a32019-06-28 13:36:21 -0700501asmlinkage void __init setup_vm(uintptr_t dtb_pa)
Anup Patel6f1e9e92019-02-13 16:38:36 +0530502{
Vitaly Wool44c92252021-04-13 02:35:14 -0400503 uintptr_t __maybe_unused pa;
Alexandre Ghiti0f02de42021-02-21 09:22:33 -0500504 uintptr_t map_size;
Atish Patra6262f662020-09-17 15:37:11 -0700505#ifndef __PAGETABLE_PMD_FOLDED
506 pmd_t fix_bmap_spmd, fix_bmap_epmd;
507#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530508
Vitaly Wool44c92252021-04-13 02:35:14 -0400509#ifdef CONFIG_XIP_KERNEL
510 xiprom = (uintptr_t)CONFIG_XIP_PHYS_ADDR;
511 xiprom_sz = (uintptr_t)(&_exiprom) - (uintptr_t)(&_xiprom);
512
513 load_pa = (uintptr_t)CONFIG_PHYS_RAM_BASE;
514 load_sz = (uintptr_t)(&_end) - (uintptr_t)(&_sdata);
515
516 va_kernel_xip_pa_offset = kernel_virt_addr - xiprom;
517#else
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400518 load_pa = (uintptr_t)(&_start);
519 load_sz = (uintptr_t)(&_end) - load_pa;
Vitaly Wool44c92252021-04-13 02:35:14 -0400520#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530521
Anup Patel671f9a32019-06-28 13:36:21 -0700522 va_pa_offset = PAGE_OFFSET - load_pa;
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400523#ifdef CONFIG_64BIT
524 va_kernel_pa_offset = kernel_virt_addr - load_pa;
525#endif
526
Anup Patel671f9a32019-06-28 13:36:21 -0700527 pfn_base = PFN_DOWN(load_pa);
528
529 /*
530 * Enforce boot alignment requirements of RV32 and
531 * RV64 by only allowing PMD or PGD mappings.
532 */
Alexandre Ghiti0f02de42021-02-21 09:22:33 -0500533 map_size = PMD_SIZE;
Anup Patel6f1e9e92019-02-13 16:38:36 +0530534
535 /* Sanity check alignment and size */
536 BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
Anup Patel671f9a32019-06-28 13:36:21 -0700537 BUG_ON((load_pa % map_size) != 0);
Anup Patel671f9a32019-06-28 13:36:21 -0700538
Atish Patrae8dcb612020-09-17 15:37:12 -0700539 pt_ops.alloc_pte = alloc_pte_early;
540 pt_ops.get_pte_virt = get_pte_virt_early;
541#ifndef __PAGETABLE_PMD_FOLDED
542 pt_ops.alloc_pmd = alloc_pmd_early;
543 pt_ops.get_pmd_virt = get_pmd_virt_early;
544#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700545 /* Setup early PGD for fixmap */
546 create_pgd_mapping(early_pg_dir, FIXADDR_START,
547 (uintptr_t)fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530548
549#ifndef __PAGETABLE_PMD_FOLDED
Anup Patel671f9a32019-06-28 13:36:21 -0700550 /* Setup fixmap PMD */
551 create_pmd_mapping(fixmap_pmd, FIXADDR_START,
552 (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
553 /* Setup trampoline PGD and PMD */
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400554 create_pgd_mapping(trampoline_pg_dir, kernel_virt_addr,
Anup Patel671f9a32019-06-28 13:36:21 -0700555 (uintptr_t)trampoline_pmd, PGDIR_SIZE, PAGE_TABLE);
Vitaly Wool44c92252021-04-13 02:35:14 -0400556#ifdef CONFIG_XIP_KERNEL
557 create_pmd_mapping(trampoline_pmd, kernel_virt_addr,
558 xiprom, PMD_SIZE, PAGE_KERNEL_EXEC);
559#else
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400560 create_pmd_mapping(trampoline_pmd, kernel_virt_addr,
Anup Patel671f9a32019-06-28 13:36:21 -0700561 load_pa, PMD_SIZE, PAGE_KERNEL_EXEC);
Vitaly Wool44c92252021-04-13 02:35:14 -0400562#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530563#else
Anup Patel671f9a32019-06-28 13:36:21 -0700564 /* Setup trampoline PGD */
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400565 create_pgd_mapping(trampoline_pg_dir, kernel_virt_addr,
Anup Patel671f9a32019-06-28 13:36:21 -0700566 load_pa, PGDIR_SIZE, PAGE_KERNEL_EXEC);
567#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530568
Anup Patel671f9a32019-06-28 13:36:21 -0700569 /*
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400570 * Setup early PGD covering entire kernel which will allow
Anup Patel671f9a32019-06-28 13:36:21 -0700571 * us to reach paging_init(). We map all memory banks later
572 * in setup_vm_final() below.
573 */
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400574 create_kernel_page_table(early_pg_dir, map_size);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530575
Anup Patel1074dd42020-11-04 12:07:13 +0530576#ifndef __PAGETABLE_PMD_FOLDED
577 /* Setup early PMD for DTB */
578 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
579 (uintptr_t)early_dtb_pmd, PGDIR_SIZE, PAGE_TABLE);
Vitaly Woolf105aa92021-01-16 01:49:48 +0200580#ifndef CONFIG_BUILTIN_DTB
Anup Patel1074dd42020-11-04 12:07:13 +0530581 /* Create two consecutive PMD mappings for FDT early scan */
582 pa = dtb_pa & ~(PMD_SIZE - 1);
583 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA,
584 pa, PMD_SIZE, PAGE_KERNEL);
585 create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE,
586 pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL);
587 dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1));
Vitaly Woolf105aa92021-01-16 01:49:48 +0200588#else /* CONFIG_BUILTIN_DTB */
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400589#ifdef CONFIG_64BIT
590 /*
591 * __va can't be used since it would return a linear mapping address
592 * whereas dtb_early_va will be used before setup_vm_final installs
593 * the linear mapping.
594 */
Vitaly Wool44c92252021-04-13 02:35:14 -0400595 dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa));
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400596#else
Vitaly Woolf105aa92021-01-16 01:49:48 +0200597 dtb_early_va = __va(dtb_pa);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400598#endif /* CONFIG_64BIT */
Vitaly Woolf105aa92021-01-16 01:49:48 +0200599#endif /* CONFIG_BUILTIN_DTB */
Anup Patel1074dd42020-11-04 12:07:13 +0530600#else
Vitaly Woolf105aa92021-01-16 01:49:48 +0200601#ifndef CONFIG_BUILTIN_DTB
Anup Patel8f3a2b42020-09-17 15:37:10 -0700602 /* Create two consecutive PGD mappings for FDT early scan */
603 pa = dtb_pa & ~(PGDIR_SIZE - 1);
604 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA,
605 pa, PGDIR_SIZE, PAGE_KERNEL);
606 create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA + PGDIR_SIZE,
607 pa + PGDIR_SIZE, PGDIR_SIZE, PAGE_KERNEL);
608 dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PGDIR_SIZE - 1));
Vitaly Woolf105aa92021-01-16 01:49:48 +0200609#else /* CONFIG_BUILTIN_DTB */
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400610#ifdef CONFIG_64BIT
Vitaly Wool44c92252021-04-13 02:35:14 -0400611 dtb_early_va = kernel_mapping_pa_to_va(XIP_FIXUP(dtb_pa));
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400612#else
Vitaly Woolf105aa92021-01-16 01:49:48 +0200613 dtb_early_va = __va(dtb_pa);
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400614#endif /* CONFIG_64BIT */
Vitaly Woolf105aa92021-01-16 01:49:48 +0200615#endif /* CONFIG_BUILTIN_DTB */
Anup Patel1074dd42020-11-04 12:07:13 +0530616#endif
Albert Ou922b0372019-09-27 16:14:18 -0700617 dtb_early_pa = dtb_pa;
Atish Patra6262f662020-09-17 15:37:11 -0700618
619 /*
620 * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap
621 * range can not span multiple pmds.
622 */
623 BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
624 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
625
626#ifndef __PAGETABLE_PMD_FOLDED
627 /*
628 * Early ioremap fixmap is already created as it lies within first 2MB
629 * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END
630 * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn
631 * the user if not.
632 */
633 fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))];
634 fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))];
635 if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) {
636 WARN_ON(1);
637 pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n",
638 pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd));
639 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
640 fix_to_virt(FIX_BTMAP_BEGIN));
641 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
642 fix_to_virt(FIX_BTMAP_END));
643
644 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
645 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
646 }
647#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700648}
649
Geert Uytterhoeven8d91b092021-04-29 17:10:04 +0200650#if defined(CONFIG_64BIT) && defined(CONFIG_STRICT_KERNEL_RWX)
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400651void protect_kernel_linear_mapping_text_rodata(void)
652{
653 unsigned long text_start = (unsigned long)lm_alias(_start);
654 unsigned long init_text_start = (unsigned long)lm_alias(__init_text_begin);
655 unsigned long rodata_start = (unsigned long)lm_alias(__start_rodata);
656 unsigned long data_start = (unsigned long)lm_alias(_data);
657
658 set_memory_ro(text_start, (init_text_start - text_start) >> PAGE_SHIFT);
659 set_memory_nx(text_start, (init_text_start - text_start) >> PAGE_SHIFT);
660
661 set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
662 set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
663}
664#endif
665
Anup Patel671f9a32019-06-28 13:36:21 -0700666static void __init setup_vm_final(void)
667{
668 uintptr_t va, map_size;
669 phys_addr_t pa, start, end;
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700670 u64 i;
Anup Patel671f9a32019-06-28 13:36:21 -0700671
Atish Patrae8dcb612020-09-17 15:37:12 -0700672 /**
673 * MMU is enabled at this point. But page table setup is not complete yet.
674 * fixmap page table alloc functions should be used at this point
675 */
676 pt_ops.alloc_pte = alloc_pte_fixmap;
677 pt_ops.get_pte_virt = get_pte_virt_fixmap;
678#ifndef __PAGETABLE_PMD_FOLDED
679 pt_ops.alloc_pmd = alloc_pmd_fixmap;
680 pt_ops.get_pmd_virt = get_pmd_virt_fixmap;
681#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700682 /* Setup swapper PGD for fixmap */
683 create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
Zong Liac51e002020-01-02 11:12:40 +0800684 __pa_symbol(fixmap_pgd_next),
Anup Patel671f9a32019-06-28 13:36:21 -0700685 PGDIR_SIZE, PAGE_TABLE);
686
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400687 /* Map all memory banks in the linear mapping */
Mike Rapoportb10d6bc2020-10-13 16:58:08 -0700688 for_each_mem_range(i, &start, &end) {
Anup Patel671f9a32019-06-28 13:36:21 -0700689 if (start >= end)
690 break;
Anup Patel671f9a32019-06-28 13:36:21 -0700691 if (start <= __pa(PAGE_OFFSET) &&
692 __pa(PAGE_OFFSET) < end)
693 start = __pa(PAGE_OFFSET);
694
695 map_size = best_map_size(start, end - start);
696 for (pa = start; pa < end; pa += map_size) {
697 va = (uintptr_t)__va(pa);
698 create_pgd_mapping(swapper_pg_dir, va, pa,
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400699 map_size,
700#ifdef CONFIG_64BIT
701 PAGE_KERNEL
702#else
703 PAGE_KERNEL_EXEC
704#endif
705 );
706
Anup Patel671f9a32019-06-28 13:36:21 -0700707 }
Anup Patel6f1e9e92019-02-13 16:38:36 +0530708 }
Anup Patelf2c17aa2019-01-07 20:57:01 +0530709
Alexandre Ghiti2bfc6cd2021-04-11 12:41:44 -0400710#ifdef CONFIG_64BIT
711 /* Map the kernel */
712 create_kernel_page_table(swapper_pg_dir, PMD_SIZE);
713#endif
714
Anup Patel671f9a32019-06-28 13:36:21 -0700715 /* Clear fixmap PTE and PMD mappings */
716 clear_fixmap(FIX_PTE);
717 clear_fixmap(FIX_PMD);
718
719 /* Move to swapper page table */
Zong Liac51e002020-01-02 11:12:40 +0800720 csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | SATP_MODE);
Anup Patel671f9a32019-06-28 13:36:21 -0700721 local_flush_tlb_all();
Atish Patrae8dcb612020-09-17 15:37:12 -0700722
723 /* generic page allocation functions must be used to setup page table */
724 pt_ops.alloc_pte = alloc_pte_late;
725 pt_ops.get_pte_virt = get_pte_virt_late;
726#ifndef __PAGETABLE_PMD_FOLDED
727 pt_ops.alloc_pmd = alloc_pmd_late;
728 pt_ops.get_pmd_virt = get_pmd_virt_late;
729#endif
Anup Patel671f9a32019-06-28 13:36:21 -0700730}
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100731#else
732asmlinkage void __init setup_vm(uintptr_t dtb_pa)
733{
734 dtb_early_va = (void *)dtb_pa;
Atish Patraa78c6f52020-10-01 12:04:56 -0700735 dtb_early_pa = dtb_pa;
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100736}
737
738static inline void setup_vm_final(void)
739{
740}
741#endif /* CONFIG_MMU */
Anup Patel671f9a32019-06-28 13:36:21 -0700742
Zong Lid27c3c92020-03-10 00:55:41 +0800743#ifdef CONFIG_STRICT_KERNEL_RWX
Jisheng Zhang19875012021-03-30 02:22:21 +0800744void __init protect_kernel_text_data(void)
Zong Lid27c3c92020-03-10 00:55:41 +0800745{
Atish Patra19a00862020-11-04 16:04:38 -0800746 unsigned long text_start = (unsigned long)_start;
747 unsigned long init_text_start = (unsigned long)__init_text_begin;
748 unsigned long init_data_start = (unsigned long)__init_data_begin;
Zong Lid27c3c92020-03-10 00:55:41 +0800749 unsigned long rodata_start = (unsigned long)__start_rodata;
750 unsigned long data_start = (unsigned long)_data;
751 unsigned long max_low = (unsigned long)(__va(PFN_PHYS(max_low_pfn)));
752
Atish Patra19a00862020-11-04 16:04:38 -0800753 set_memory_ro(text_start, (init_text_start - text_start) >> PAGE_SHIFT);
754 set_memory_ro(init_text_start, (init_data_start - init_text_start) >> PAGE_SHIFT);
755 set_memory_nx(init_data_start, (rodata_start - init_data_start) >> PAGE_SHIFT);
756 /* rodata section is marked readonly in mark_rodata_ro */
Zong Lid27c3c92020-03-10 00:55:41 +0800757 set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
758 set_memory_nx(data_start, (max_low - data_start) >> PAGE_SHIFT);
Atish Patra19a00862020-11-04 16:04:38 -0800759}
760
761void mark_rodata_ro(void)
762{
763 unsigned long rodata_start = (unsigned long)__start_rodata;
764 unsigned long data_start = (unsigned long)_data;
765
766 set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
Zong Lib422d282020-06-03 16:03:55 -0700767
768 debug_checkwx();
Zong Lid27c3c92020-03-10 00:55:41 +0800769}
770#endif
771
Nick Kossifidise53d2812021-04-19 03:55:38 +0300772#ifdef CONFIG_KEXEC_CORE
773/*
774 * reserve_crashkernel() - reserves memory for crash kernel
775 *
776 * This function reserves memory area given in "crashkernel=" kernel command
777 * line parameter. The memory reserved is used by dump capture kernel when
778 * primary kernel is crashing.
779 */
780static void __init reserve_crashkernel(void)
781{
782 unsigned long long crash_base = 0;
783 unsigned long long crash_size = 0;
784 unsigned long search_start = memblock_start_of_DRAM();
785 unsigned long search_end = memblock_end_of_DRAM();
786
787 int ret = 0;
788
Nick Kossifidis56409752021-04-19 03:55:39 +0300789 /*
790 * Don't reserve a region for a crash kernel on a crash kernel
791 * since it doesn't make much sense and we have limited memory
792 * resources.
793 */
794#ifdef CONFIG_CRASH_DUMP
795 if (is_kdump_kernel()) {
796 pr_info("crashkernel: ignoring reservation request\n");
797 return;
798 }
799#endif
800
Nick Kossifidise53d2812021-04-19 03:55:38 +0300801 ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),
802 &crash_size, &crash_base);
803 if (ret || !crash_size)
804 return;
805
806 crash_size = PAGE_ALIGN(crash_size);
807
808 if (crash_base == 0) {
809 /*
810 * Current riscv boot protocol requires 2MB alignment for
811 * RV64 and 4MB alignment for RV32 (hugepage size)
812 */
813 crash_base = memblock_find_in_range(search_start, search_end,
814 crash_size, PMD_SIZE);
815
816 if (crash_base == 0) {
817 pr_warn("crashkernel: couldn't allocate %lldKB\n",
818 crash_size >> 10);
819 return;
820 }
821 } else {
822 /* User specifies base address explicitly. */
823 if (!memblock_is_region_memory(crash_base, crash_size)) {
824 pr_warn("crashkernel: requested region is not memory\n");
825 return;
826 }
827
828 if (memblock_is_region_reserved(crash_base, crash_size)) {
829 pr_warn("crashkernel: requested region is reserved\n");
830 return;
831 }
832
833
834 if (!IS_ALIGNED(crash_base, PMD_SIZE)) {
835 pr_warn("crashkernel: requested region is misaligned\n");
836 return;
837 }
838 }
839 memblock_reserve(crash_base, crash_size);
840
841 pr_info("crashkernel: reserved 0x%016llx - 0x%016llx (%lld MB)\n",
842 crash_base, crash_base + crash_size, crash_size >> 20);
843
844 crashk_res.start = crash_base;
845 crashk_res.end = crash_base + crash_size - 1;
846}
847#endif /* CONFIG_KEXEC_CORE */
848
Nick Kossifidis56409752021-04-19 03:55:39 +0300849#ifdef CONFIG_CRASH_DUMP
850/*
851 * We keep track of the ELF core header of the crashed
852 * kernel with a reserved-memory region with compatible
853 * string "linux,elfcorehdr". Here we register a callback
854 * to populate elfcorehdr_addr/size when this region is
855 * present. Note that this region will be marked as
856 * reserved once we call early_init_fdt_scan_reserved_mem()
857 * later on.
858 */
859static int elfcore_hdr_setup(struct reserved_mem *rmem)
860{
861 elfcorehdr_addr = rmem->base;
862 elfcorehdr_size = rmem->size;
863 return 0;
864}
865
866RESERVEDMEM_OF_DECLARE(elfcorehdr, "linux,elfcorehdr", elfcore_hdr_setup);
867#endif
868
Anup Patel671f9a32019-06-28 13:36:21 -0700869void __init paging_init(void)
870{
871 setup_vm_final();
872 setup_zero_page();
Atish Patracbd34f42020-11-18 16:38:27 -0800873}
874
875void __init misc_mem_init(void)
876{
Kefeng Wangf6e5aed2021-02-25 14:54:17 +0800877 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
Atish Patra4f0e8ee2020-11-18 16:38:29 -0800878 arch_numa_init();
Atish Patracbd34f42020-11-18 16:38:27 -0800879 sparse_init();
Anup Patel671f9a32019-06-28 13:36:21 -0700880 zone_sizes_init();
Nick Kossifidise53d2812021-04-19 03:55:38 +0300881#ifdef CONFIG_KEXEC_CORE
882 reserve_crashkernel();
883#endif
Atish Patra4f0e8ee2020-11-18 16:38:29 -0800884 memblock_dump_all();
Anup Patel6f1e9e92019-02-13 16:38:36 +0530885}
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600886
Kefeng Wang9fe57d82019-10-23 11:23:02 +0800887#ifdef CONFIG_SPARSEMEM_VMEMMAP
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600888int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
889 struct vmem_altmap *altmap)
890{
Anshuman Khandual1d9cfee2020-08-06 23:23:19 -0700891 return vmemmap_populate_basepages(start, end, node, NULL);
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600892}
893#endif