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Bean Huo67351112020-06-05 22:05:19 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05303 * Universal Flash Storage Host controller driver Core
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02005 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307 * Authors:
8 * Santosh Yaraganavi <santosh.sy@samsung.com>
9 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010 */
11
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053012#include <linux/async.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030013#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020014#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020015#include <linux/of.h>
Adrian Hunterad448372018-03-20 15:07:38 +020016#include <linux/bitfield.h>
Can Guofb276f72020-03-25 18:09:59 -070017#include <linux/blk-pm.h>
Can Guoc72e79c2020-08-09 05:15:52 -070018#include <linux/blkdev.h>
Asutosh Dasb294ff32021-04-23 17:20:16 -070019#include <scsi/scsi_driver.h>
Bart Van Asschea113eaa2021-07-21 20:34:37 -070020#include <scsi/scsi_transport.h>
21#include "../scsi_transport_api.h"
Vinayak Holikattie0eca632013-02-25 21:44:33 +053022#include "ufshcd.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020023#include "ufs_quirks.h"
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +053024#include "unipro.h"
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +020025#include "ufs-sysfs.h"
Adrian Hunterb6cacaf2021-01-07 09:25:38 +020026#include "ufs-debugfs.h"
Bart Van Asschec11a1ae2021-07-21 20:34:39 -070027#include "ufs-fault-injection.h"
Avri Altmandf032bf2018-10-07 17:30:35 +030028#include "ufs_bsg.h"
Satya Tangiraladf043c742020-07-06 20:04:14 +000029#include "ufshcd-crypto.h"
Daejun Parkf02bc972021-07-12 17:58:30 +090030#include "ufshpb.h"
Asutosh Das3d17b9b2020-04-22 14:41:42 -070031#include <asm/unaligned.h>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053032
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -080033#define CREATE_TRACE_POINTS
34#include <trace/events/ufs.h>
35
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053036#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
37 UTP_TASK_REQ_COMPL |\
38 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053039/* UIC command timeout, unit: ms */
40#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053041
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053042/* NOP OUT retries waiting for NOP IN response */
43#define NOP_OUT_RETRIES 10
Daejun Park782e2ef2020-09-02 11:58:52 +090044/* Timeout after 50 msecs if NOP OUT hangs without response */
45#define NOP_OUT_TIMEOUT 50 /* msecs */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053046
Dolev Raviv68078d52013-07-30 00:35:58 +053047/* Query request retries */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080048#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +053049/* Query request timeout */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080050#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +053051
Sujit Reddy Thummae2933132014-05-26 10:59:12 +053052/* Task management command timeout */
53#define TM_CMD_TIMEOUT 100 /* msecs */
54
Yaniv Gardi64238fb2016-02-01 15:02:43 +020055/* maximum number of retries for a general UIC command */
56#define UFS_UIC_COMMAND_RETRIES 3
57
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030058/* maximum number of link-startup retries */
59#define DME_LINKSTARTUP_RETRIES 3
60
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +020061/* Maximum retries for Hibern8 enter */
62#define UIC_HIBERN8_ENTER_RETRIES 3
63
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030064/* maximum number of reset retries before giving up */
65#define MAX_HOST_RESET_RETRIES 5
66
Adrian Hunter87bf6a62021-10-02 18:45:50 +030067/* Maximum number of error handler retries before giving up */
68#define MAX_ERR_HANDLER_RETRIES 5
69
Dolev Raviv68078d52013-07-30 00:35:58 +053070/* Expose the flag value from utp_upiu_query.value */
71#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
72
Seungwon Jeon7d568652013-08-31 21:40:20 +053073/* Interrupt aggregation default timeout, unit: 40us */
74#define INT_AGGR_DEF_TO 0x02
75
Stanley Chu49615ba2019-09-16 23:56:50 +080076/* default delay of autosuspend: 2000 ms */
77#define RPM_AUTOSUSPEND_DELAY_MS 2000
78
Stanley Chu51dd9052020-05-22 16:32:12 +080079/* Default delay of RPM device flush delayed work */
80#define RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS 5000
81
Can Guo09f17792020-02-10 19:40:49 -080082/* Default value of wait time before gating device ref clock */
83#define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */
84
Kiwoong Kim29707fa2020-08-10 19:02:27 +090085/* Polling time to wait for fDeviceInit */
86#define FDEVICEINIT_COMPL_TIMEOUT 1500 /* millisecs */
87
Asutosh Dasb294ff32021-04-23 17:20:16 -070088#define wlun_dev_to_hba(dv) shost_priv(to_scsi_device(dv)->host)
89
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030090#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
91 ({ \
92 int _ret; \
93 if (_on) \
94 _ret = ufshcd_enable_vreg(_dev, _vreg); \
95 else \
96 _ret = ufshcd_disable_vreg(_dev, _vreg); \
97 _ret; \
98 })
99
Tomas Winklerba809172018-06-14 11:14:09 +0300100#define ufshcd_hex_dump(prefix_str, buf, len) do { \
101 size_t __len = (len); \
102 print_hex_dump(KERN_ERR, prefix_str, \
103 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
104 16, 4, buf, __len, false); \
105} while (0)
106
107int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
108 const char *prefix)
109{
Marc Gonzalezd6724752019-01-22 18:29:22 +0100110 u32 *regs;
111 size_t pos;
112
113 if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
114 return -EINVAL;
Tomas Winklerba809172018-06-14 11:14:09 +0300115
Can Guocddaeba2019-11-14 22:09:27 -0800116 regs = kzalloc(len, GFP_ATOMIC);
Tomas Winklerba809172018-06-14 11:14:09 +0300117 if (!regs)
118 return -ENOMEM;
119
Marc Gonzalezd6724752019-01-22 18:29:22 +0100120 for (pos = 0; pos < len; pos += 4)
121 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
122
Tomas Winklerba809172018-06-14 11:14:09 +0300123 ufshcd_hex_dump(prefix, regs, len);
124 kfree(regs);
125
126 return 0;
127}
128EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800129
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530130enum {
131 UFSHCD_MAX_CHANNEL = 0,
132 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530133 UFSHCD_CMD_PER_LUN = 32,
134 UFSHCD_CAN_QUEUE = 32,
135};
136
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530137/* UFSHCD error handling flags */
138enum {
139 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530140};
141
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530142/* UFSHCD UIC layer error flags */
143enum {
144 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200145 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
146 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
147 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
148 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
149 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Can Guo2355b662020-08-24 19:07:06 -0700150 UFSHCD_UIC_PA_GENERIC_ERROR = (1 << 6), /* Generic PA error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530151};
152
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530153#define ufshcd_set_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300154 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530155#define ufshcd_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300156 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530157#define ufshcd_clear_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300158 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530159
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +0200160struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
Bart Van Asschee2ac7ab2021-05-19 13:20:58 -0700161 [UFS_PM_LVL_0] = {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
162 [UFS_PM_LVL_1] = {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
163 [UFS_PM_LVL_2] = {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
164 [UFS_PM_LVL_3] = {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
165 [UFS_PM_LVL_4] = {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
166 [UFS_PM_LVL_5] = {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
Adrian Hunterfe1d4c22020-11-03 16:14:02 +0200167 /*
168 * For DeepSleep, the link is first put in hibern8 and then off.
169 * Leaving the link in hibern8 is not supported.
170 */
Bart Van Asschee2ac7ab2021-05-19 13:20:58 -0700171 [UFS_PM_LVL_6] = {UFS_DEEPSLEEP_PWR_MODE, UIC_LINK_OFF_STATE},
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300172};
173
174static inline enum ufs_dev_pwr_mode
175ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
176{
177 return ufs_pm_lvl_states[lvl].dev_state;
178}
179
180static inline enum uic_link_state
181ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
182{
183 return ufs_pm_lvl_states[lvl].link_state;
184}
185
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -0800186static inline enum ufs_pm_level
187ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
188 enum uic_link_state link_state)
189{
190 enum ufs_pm_level lvl;
191
192 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
193 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
194 (ufs_pm_lvl_states[lvl].link_state == link_state))
195 return lvl;
196 }
197
198 /* if no match found, return the level 0 */
199 return UFS_PM_LVL_0;
200}
201
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800202static struct ufs_dev_fix ufs_fixups[] = {
203 /* UFS cards deviations table */
Stanley Chuc0a18ee2020-06-12 09:26:24 +0800204 UFS_FIX(UFS_VENDOR_MICRON, UFS_ANY_MODEL,
Bean Huo63522bf2021-08-04 20:21:27 +0200205 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM |
206 UFS_DEVICE_QUIRK_SWAP_L2P_ENTRY_FOR_HPB_READ),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800207 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
Stanley Chued0b40f2020-06-12 09:26:25 +0800208 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM |
209 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE |
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800210 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
Stanley Chued0b40f2020-06-12 09:26:25 +0800211 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
212 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
213 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
214 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800215 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
216 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
217 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
218 UFS_DEVICE_QUIRK_PA_TACTIVATE),
219 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
220 UFS_DEVICE_QUIRK_PA_TACTIVATE),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800221 END_FIX
222};
223
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -0800224static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530225static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530226static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Dolev Ravive7d38252016-12-22 18:40:07 -0800227static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530228static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300229static void ufshcd_hba_exit(struct ufs_hba *hba);
Bean Huo68444d72021-09-29 22:06:39 +0200230static int ufshcd_probe_hba(struct ufs_hba *hba, bool init_dev_params);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300231static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300232static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300233static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800234static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
235static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800236static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800237static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300238static irqreturn_t ufshcd_intr(int irq, void *__hba);
Yaniv Gardi874237f2015-05-17 18:55:03 +0300239static int ufshcd_change_power_mode(struct ufs_hba *hba,
240 struct ufs_pa_layer_attr *pwr_mode);
Can Guoc72e79c2020-08-09 05:15:52 -0700241static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on);
242static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on);
243static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
244 struct ufs_vreg *vreg);
Can Guo307348f2020-08-24 19:07:05 -0700245static int ufshcd_try_to_abort_task(struct ufs_hba *hba, int tag);
Yue Hu3b5f3c02021-03-18 17:55:36 +0800246static void ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set);
247static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable);
Can Guodd7143e2020-10-27 12:10:36 -0700248static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba);
249static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700250
Can Guo5231d382019-12-05 02:14:46 +0000251static inline void ufshcd_enable_irq(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300252{
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300253 if (!hba->is_irq_enabled) {
Can Guo5231d382019-12-05 02:14:46 +0000254 enable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300255 hba->is_irq_enabled = true;
256 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300257}
258
259static inline void ufshcd_disable_irq(struct ufs_hba *hba)
260{
261 if (hba->is_irq_enabled) {
Can Guo5231d382019-12-05 02:14:46 +0000262 disable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300263 hba->is_irq_enabled = false;
264 }
265}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530266
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700267static inline void ufshcd_wb_config(struct ufs_hba *hba)
268{
Stanley Chu79e35202020-05-08 16:01:15 +0800269 if (!ufshcd_is_wb_allowed(hba))
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700270 return;
271
Yue Hu3b5f3c02021-03-18 17:55:36 +0800272 ufshcd_wb_toggle(hba, true);
273
274 ufshcd_wb_toggle_flush_during_h8(hba, true);
Stanley Chu21acf462020-12-22 15:29:05 +0800275 if (!(hba->quirks & UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL))
276 ufshcd_wb_toggle_flush(hba, true);
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700277}
278
Subhash Jadavani38135532018-05-03 16:37:18 +0530279static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
280{
281 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
282 scsi_unblock_requests(hba->host);
283}
284
285static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
286{
287 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
288 scsi_block_requests(hba->host);
289}
290
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300291static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
Bean Huo28fa68f2021-01-05 12:34:42 +0100292 enum ufs_trace_str_t str_t)
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300293{
294 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
Bean Huo89ac2c3b2021-05-31 12:43:06 +0200295 struct utp_upiu_header *header;
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300296
Bean Huo9d5095e2021-01-05 12:34:43 +0100297 if (!trace_ufshcd_upiu_enabled())
298 return;
299
Bean Huo89ac2c3b2021-05-31 12:43:06 +0200300 if (str_t == UFS_CMD_SEND)
301 header = &rq->header;
302 else
303 header = &hba->lrb[tag].ucd_rsp_ptr->header;
304
305 trace_ufshcd_upiu(dev_name(hba->dev), str_t, header, &rq->sc.cdb,
Bean Huo867fdc22021-01-05 12:34:46 +0100306 UFS_TSF_CDB);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300307}
308
Avri Altmanfb475b72021-01-10 10:46:18 +0200309static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba,
310 enum ufs_trace_str_t str_t,
311 struct utp_upiu_req *rq_rsp)
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300312{
Bean Huo9d5095e2021-01-05 12:34:43 +0100313 if (!trace_ufshcd_upiu_enabled())
314 return;
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300315
Bean Huobe20b512021-01-05 12:34:44 +0100316 trace_ufshcd_upiu(dev_name(hba->dev), str_t, &rq_rsp->header,
Bean Huo867fdc22021-01-05 12:34:46 +0100317 &rq_rsp->qr, UFS_TSF_OSF);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300318}
319
320static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
Bean Huo28fa68f2021-01-05 12:34:42 +0100321 enum ufs_trace_str_t str_t)
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300322{
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300323 int off = (int)tag - hba->nutrs;
Christoph Hellwig391e3882018-10-07 17:30:32 +0300324 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300325
Bean Huo9d5095e2021-01-05 12:34:43 +0100326 if (!trace_ufshcd_upiu_enabled())
327 return;
328
Bean Huo0ed083e2021-01-05 12:34:45 +0100329 if (str_t == UFS_TM_SEND)
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -0500330 trace_ufshcd_upiu(dev_name(hba->dev), str_t,
331 &descp->upiu_req.req_header,
332 &descp->upiu_req.input_param1,
333 UFS_TSF_TM_INPUT);
Bean Huo0ed083e2021-01-05 12:34:45 +0100334 else
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -0500335 trace_ufshcd_upiu(dev_name(hba->dev), str_t,
336 &descp->upiu_rsp.rsp_header,
337 &descp->upiu_rsp.output_param1,
338 UFS_TSF_TM_OUTPUT);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300339}
340
Stanley Chuaa5c6972020-06-15 15:22:35 +0800341static void ufshcd_add_uic_command_trace(struct ufs_hba *hba,
342 struct uic_command *ucmd,
Bean Huo28fa68f2021-01-05 12:34:42 +0100343 enum ufs_trace_str_t str_t)
Stanley Chuaa5c6972020-06-15 15:22:35 +0800344{
345 u32 cmd;
346
347 if (!trace_ufshcd_uic_command_enabled())
348 return;
349
Bean Huo28fa68f2021-01-05 12:34:42 +0100350 if (str_t == UFS_CMD_SEND)
Stanley Chuaa5c6972020-06-15 15:22:35 +0800351 cmd = ucmd->command;
352 else
353 cmd = ufshcd_readl(hba, REG_UIC_COMMAND);
354
Bean Huo28fa68f2021-01-05 12:34:42 +0100355 trace_ufshcd_uic_command(dev_name(hba->dev), str_t, cmd,
Stanley Chuaa5c6972020-06-15 15:22:35 +0800356 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_1),
357 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2),
358 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3));
359}
360
Bean Huo28fa68f2021-01-05 12:34:42 +0100361static void ufshcd_add_command_trace(struct ufs_hba *hba, unsigned int tag,
362 enum ufs_trace_str_t str_t)
Lee Susman1a07f2d2016-12-22 18:42:03 -0800363{
Colin Ian King102851f2021-08-04 14:32:41 +0100364 u64 lba;
Jaegeuk Kim69a314d2020-11-17 08:58:37 -0800365 u8 opcode = 0, group_id = 0;
Lee Susman1a07f2d2016-12-22 18:42:03 -0800366 u32 intr, doorbell;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300367 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800368 struct scsi_cmnd *cmd = lrbp->cmd;
Bart Van Assche3f2c1002021-08-09 16:03:50 -0700369 struct request *rq = scsi_cmd_to_rq(cmd);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800370 int transfer_len = -1;
371
Bean Huo44b5de32021-05-31 12:43:07 +0200372 if (!cmd)
373 return;
374
Bean Huo44b5de32021-05-31 12:43:07 +0200375 /* trace UPIU also */
376 ufshcd_add_cmd_upiu_trace(hba, tag, str_t);
Bean Huof0101af2021-08-02 20:08:03 +0200377 if (!trace_ufshcd_command_enabled())
378 return;
379
Bean Huo44b5de32021-05-31 12:43:07 +0200380 opcode = cmd->cmnd[0];
Martin K. Petersen54815082021-06-08 23:39:29 -0400381 lba = scsi_get_lba(cmd);
Bean Huo04c073f2021-05-31 12:43:05 +0200382
Bean Huo44b5de32021-05-31 12:43:07 +0200383 if (opcode == READ_10 || opcode == WRITE_10) {
384 /*
385 * Currently we only fully trace read(10) and write(10) commands
386 */
387 transfer_len =
388 be32_to_cpu(lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
389 if (opcode == WRITE_10)
390 group_id = lrbp->cmd->cmnd[6];
391 } else if (opcode == UNMAP) {
392 /*
393 * The number of Bytes to be unmapped beginning with the lba.
394 */
Bart Van Assche3f2c1002021-08-09 16:03:50 -0700395 transfer_len = blk_rq_bytes(rq);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800396 }
397
398 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
399 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Bean Huo28fa68f2021-01-05 12:34:42 +0100400 trace_ufshcd_command(dev_name(hba->dev), str_t, tag,
Jaegeuk Kim69a314d2020-11-17 08:58:37 -0800401 doorbell, transfer_len, intr, lba, opcode, group_id);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800402}
403
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800404static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
405{
406 struct ufs_clk_info *clki;
407 struct list_head *head = &hba->clk_list_head;
408
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300409 if (list_empty(head))
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800410 return;
411
412 list_for_each_entry(clki, head, list) {
413 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
414 clki->max_freq)
415 dev_err(hba->dev, "clk: %s, rate: %u\n",
416 clki->name, clki->curr_freq);
417 }
418}
419
Stanley Chue965e5e2020-12-05 19:58:59 +0800420static void ufshcd_print_evt(struct ufs_hba *hba, u32 id,
421 char *err_name)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800422{
423 int i;
Stanley Chu27752642019-01-28 22:04:26 +0800424 bool found = false;
Stanley Chue965e5e2020-12-05 19:58:59 +0800425 struct ufs_event_hist *e;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800426
Stanley Chue965e5e2020-12-05 19:58:59 +0800427 if (id >= UFS_EVT_CNT)
428 return;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800429
Stanley Chue965e5e2020-12-05 19:58:59 +0800430 e = &hba->ufs_stats.event[id];
431
432 for (i = 0; i < UFS_EVENT_HIST_LENGTH; i++) {
433 int p = (i + e->pos) % UFS_EVENT_HIST_LENGTH;
434
435 if (e->tstamp[p] == 0)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800436 continue;
Stanley Chuc5397f12019-07-10 21:38:20 +0800437 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
Stanley Chue965e5e2020-12-05 19:58:59 +0800438 e->val[p], ktime_to_us(e->tstamp[p]));
Stanley Chu27752642019-01-28 22:04:26 +0800439 found = true;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800440 }
Stanley Chu27752642019-01-28 22:04:26 +0800441
442 if (!found)
Stanley Chufd1fb4d2020-01-04 22:26:08 +0800443 dev_err(hba->dev, "No record of %s\n", err_name);
DooHyun Hwangbafd09f2021-02-03 19:14:43 +0900444 else
445 dev_err(hba->dev, "%s: total cnt=%llu\n", err_name, e->cnt);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800446}
447
Stanley Chue965e5e2020-12-05 19:58:59 +0800448static void ufshcd_print_evt_hist(struct ufs_hba *hba)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800449{
Tomas Winklerba809172018-06-14 11:14:09 +0300450 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800451
Stanley Chue965e5e2020-12-05 19:58:59 +0800452 ufshcd_print_evt(hba, UFS_EVT_PA_ERR, "pa_err");
453 ufshcd_print_evt(hba, UFS_EVT_DL_ERR, "dl_err");
454 ufshcd_print_evt(hba, UFS_EVT_NL_ERR, "nl_err");
455 ufshcd_print_evt(hba, UFS_EVT_TL_ERR, "tl_err");
456 ufshcd_print_evt(hba, UFS_EVT_DME_ERR, "dme_err");
457 ufshcd_print_evt(hba, UFS_EVT_AUTO_HIBERN8_ERR,
458 "auto_hibern8_err");
459 ufshcd_print_evt(hba, UFS_EVT_FATAL_ERR, "fatal_err");
460 ufshcd_print_evt(hba, UFS_EVT_LINK_STARTUP_FAIL,
461 "link_startup_fail");
462 ufshcd_print_evt(hba, UFS_EVT_RESUME_ERR, "resume_fail");
463 ufshcd_print_evt(hba, UFS_EVT_SUSPEND_ERR,
464 "suspend_fail");
465 ufshcd_print_evt(hba, UFS_EVT_DEV_RESET, "dev_reset");
466 ufshcd_print_evt(hba, UFS_EVT_HOST_RESET, "host_reset");
467 ufshcd_print_evt(hba, UFS_EVT_ABORT, "task_abort");
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800468
Stanley Chu7c486d912019-12-24 21:01:06 +0800469 ufshcd_vops_dbg_register_dump(hba);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800470}
471
472static
473void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
474{
475 struct ufshcd_lrb *lrbp;
Gilad Broner7fabb772017-02-03 16:56:50 -0800476 int prdt_length;
Dolev Raviv66cc8202016-12-22 18:39:42 -0800477 int tag;
478
479 for_each_set_bit(tag, &bitmap, hba->nutrs) {
480 lrbp = &hba->lrb[tag];
481
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800482 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
483 tag, ktime_to_us(lrbp->issue_time_stamp));
Zang Leigang09017182017-09-27 10:06:06 +0800484 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
485 tag, ktime_to_us(lrbp->compl_time_stamp));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800486 dev_err(hba->dev,
487 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
488 tag, (u64)lrbp->utrd_dma_addr);
489
Dolev Raviv66cc8202016-12-22 18:39:42 -0800490 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
491 sizeof(struct utp_transfer_req_desc));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800492 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
493 (u64)lrbp->ucd_req_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800494 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
495 sizeof(struct utp_upiu_req));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800496 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
497 (u64)lrbp->ucd_rsp_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800498 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
499 sizeof(struct utp_upiu_rsp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800500
Gilad Broner7fabb772017-02-03 16:56:50 -0800501 prdt_length = le16_to_cpu(
502 lrbp->utr_descriptor_ptr->prd_table_length);
Eric Biggerscc770ce2020-08-25 19:10:40 -0700503 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
504 prdt_length /= sizeof(struct ufshcd_sg_entry);
505
Gilad Broner7fabb772017-02-03 16:56:50 -0800506 dev_err(hba->dev,
507 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
508 tag, prdt_length,
509 (u64)lrbp->ucd_prdt_dma_addr);
510
511 if (pr_prdt)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800512 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
Gilad Broner7fabb772017-02-03 16:56:50 -0800513 sizeof(struct ufshcd_sg_entry) * prdt_length);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800514 }
515}
516
517static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
518{
Dolev Raviv66cc8202016-12-22 18:39:42 -0800519 int tag;
520
521 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
Christoph Hellwig391e3882018-10-07 17:30:32 +0300522 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
523
Dolev Raviv66cc8202016-12-22 18:39:42 -0800524 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
Christoph Hellwig391e3882018-10-07 17:30:32 +0300525 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800526 }
527}
528
Gilad Broner6ba65582017-02-03 16:57:28 -0800529static void ufshcd_print_host_state(struct ufs_hba *hba)
530{
Can Guo3f8af602020-08-09 05:15:50 -0700531 struct scsi_device *sdev_ufs = hba->sdev_ufs_device;
532
Gilad Broner6ba65582017-02-03 16:57:28 -0800533 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
Bart Van Assche7252a362019-12-09 10:13:08 -0800534 dev_err(hba->dev, "outstanding reqs=0x%lx tasks=0x%lx\n",
535 hba->outstanding_reqs, hba->outstanding_tasks);
Gilad Broner6ba65582017-02-03 16:57:28 -0800536 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
537 hba->saved_err, hba->saved_uic_err);
538 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
539 hba->curr_dev_pwr_mode, hba->uic_link_state);
540 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
541 hba->pm_op_in_progress, hba->is_sys_suspended);
542 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
543 hba->auto_bkops_enabled, hba->host->host_self_blocked);
544 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
Can Guo3f8af602020-08-09 05:15:50 -0700545 dev_err(hba->dev,
546 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt=%d\n",
547 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
548 hba->ufs_stats.hibern8_exit_cnt);
549 dev_err(hba->dev, "last intr at %lld us, last intr status=0x%x\n",
550 ktime_to_us(hba->ufs_stats.last_intr_ts),
551 hba->ufs_stats.last_intr_status);
Gilad Broner6ba65582017-02-03 16:57:28 -0800552 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
553 hba->eh_flags, hba->req_abort_count);
Can Guo3f8af602020-08-09 05:15:50 -0700554 dev_err(hba->dev, "hba->ufs_version=0x%x, Host capabilities=0x%x, caps=0x%x\n",
555 hba->ufs_version, hba->capabilities, hba->caps);
Gilad Broner6ba65582017-02-03 16:57:28 -0800556 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
557 hba->dev_quirks);
Can Guo3f8af602020-08-09 05:15:50 -0700558 if (sdev_ufs)
559 dev_err(hba->dev, "UFS dev info: %.8s %.16s rev %.4s\n",
560 sdev_ufs->vendor, sdev_ufs->model, sdev_ufs->rev);
561
562 ufshcd_print_clk_freqs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -0800563}
564
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800565/**
566 * ufshcd_print_pwr_info - print power params as saved in hba
567 * power info
568 * @hba: per-adapter instance
569 */
570static void ufshcd_print_pwr_info(struct ufs_hba *hba)
571{
572 static const char * const names[] = {
573 "INVALID MODE",
574 "FAST MODE",
575 "SLOW_MODE",
576 "INVALID MODE",
577 "FASTAUTO_MODE",
578 "SLOWAUTO_MODE",
579 "INVALID MODE",
580 };
581
582 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
583 __func__,
584 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
585 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
586 names[hba->pwr_info.pwr_rx],
587 names[hba->pwr_info.pwr_tx],
588 hba->pwr_info.hs_rate);
589}
590
Stanley Chu31a5d9c2020-12-08 21:56:35 +0800591static void ufshcd_device_reset(struct ufs_hba *hba)
592{
593 int err;
594
595 err = ufshcd_vops_device_reset(hba);
596
597 if (!err) {
598 ufshcd_set_ufs_dev_active(hba);
599 if (ufshcd_is_wb_allowed(hba)) {
Bean Huo4cd48992021-01-19 17:38:46 +0100600 hba->dev_info.wb_enabled = false;
601 hba->dev_info.wb_buf_flush_enabled = false;
Stanley Chu31a5d9c2020-12-08 21:56:35 +0800602 }
603 }
604 if (err != -EOPNOTSUPP)
605 ufshcd_update_evt_hist(hba, UFS_EVT_DEV_RESET, err);
606}
607
Stanley Chu5c955c12020-03-18 18:40:12 +0800608void ufshcd_delay_us(unsigned long us, unsigned long tolerance)
609{
610 if (!us)
611 return;
612
613 if (us < 10)
614 udelay(us);
615 else
616 usleep_range(us, us + tolerance);
617}
618EXPORT_SYMBOL_GPL(ufshcd_delay_us);
619
Bart Van Assche5cac1092020-05-07 15:27:50 -0700620/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530621 * ufshcd_wait_for_register - wait for register value to change
Bart Van Assche5cac1092020-05-07 15:27:50 -0700622 * @hba: per-adapter interface
623 * @reg: mmio register offset
624 * @mask: mask to apply to the read register value
625 * @val: value to wait for
626 * @interval_us: polling interval in microseconds
627 * @timeout_ms: timeout in milliseconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530628 *
Bart Van Assche5cac1092020-05-07 15:27:50 -0700629 * Return:
630 * -ETIMEDOUT on error, zero on success.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530631 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200632int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
633 u32 val, unsigned long interval_us,
Bart Van Assche5cac1092020-05-07 15:27:50 -0700634 unsigned long timeout_ms)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530635{
636 int err = 0;
637 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
638
639 /* ignore bits that we don't intend to wait on */
640 val = val & mask;
641
642 while ((ufshcd_readl(hba, reg) & mask) != val) {
Bart Van Assche5cac1092020-05-07 15:27:50 -0700643 usleep_range(interval_us, interval_us + 50);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530644 if (time_after(jiffies, timeout)) {
645 if ((ufshcd_readl(hba, reg) & mask) != val)
646 err = -ETIMEDOUT;
647 break;
648 }
649 }
650
651 return err;
652}
653
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530654/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530655 * ufshcd_get_intr_mask - Get the interrupt bit mask
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800656 * @hba: Pointer to adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530657 *
658 * Returns interrupt bit mask per version
659 */
660static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
661{
Caleb Connolly51428812021-03-10 15:33:42 +0000662 if (hba->ufs_version == ufshci_version(1, 0))
663 return INTERRUPT_MASK_ALL_VER_10;
664 if (hba->ufs_version <= ufshci_version(2, 0))
665 return INTERRUPT_MASK_ALL_VER_11;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800666
Caleb Connolly51428812021-03-10 15:33:42 +0000667 return INTERRUPT_MASK_ALL_VER_21;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530668}
669
670/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530671 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800672 * @hba: Pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530673 *
674 * Returns UFSHCI version supported by the controller
675 */
676static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
677{
Caleb Connolly51428812021-03-10 15:33:42 +0000678 u32 ufshci_ver;
Yaniv Gardi9949e702015-05-17 18:55:05 +0300679
Caleb Connolly51428812021-03-10 15:33:42 +0000680 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
681 ufshci_ver = ufshcd_vops_get_ufs_hci_version(hba);
682 else
683 ufshci_ver = ufshcd_readl(hba, REG_UFS_VERSION);
684
685 /*
686 * UFSHCI v1.x uses a different version scheme, in order
687 * to allow the use of comparisons with the ufshci_version
688 * function, we convert it to the same scheme as ufs 2.0+.
689 */
690 if (ufshci_ver & 0x00010000)
691 return ufshci_version(1, ufshci_ver & 0x00000100);
692
693 return ufshci_ver;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530694}
695
696/**
697 * ufshcd_is_device_present - Check if any device connected to
698 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300699 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530700 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300701 * Returns true if device present, false if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530702 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300703static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530704{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300705 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300706 DEVICE_PRESENT) ? true : false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530707}
708
709/**
710 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800711 * @lrbp: pointer to local command reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530712 *
713 * This function is used to get the OCS field from UTRD
714 * Returns the OCS field in the UTRD
715 */
716static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
717{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530718 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530719}
720
721/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530722 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
723 * @hba: per adapter instance
724 * @pos: position of the bit to be cleared
725 */
726static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
727{
Alim Akhtar87183842020-05-28 06:46:49 +0530728 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
729 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
730 else
731 ufshcd_writel(hba, ~(1 << pos),
732 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
Alim Akhtar1399c5b2018-05-06 15:44:15 +0530733}
734
735/**
736 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
737 * @hba: per adapter instance
738 * @pos: position of the bit to be cleared
739 */
740static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
741{
Alim Akhtar87183842020-05-28 06:46:49 +0530742 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
743 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
744 else
745 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530746}
747
748/**
749 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
750 * @reg: Register value of host controller status
751 *
752 * Returns integer, 0 on Success and positive value if failed
753 */
754static inline int ufshcd_get_lists_status(u32 reg)
755{
Tomohiro Kusumi6cf16112017-04-26 20:28:58 +0300756 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530757}
758
759/**
760 * ufshcd_get_uic_cmd_result - Get the UIC command result
761 * @hba: Pointer to adapter instance
762 *
763 * This function gets the result of UIC command completion
764 * Returns 0 on success, non zero value on error
765 */
766static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
767{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530768 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530769 MASK_UIC_COMMAND_RESULT;
770}
771
772/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530773 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
774 * @hba: Pointer to adapter instance
775 *
776 * This function gets UIC command argument3
777 * Returns 0 on success, non zero value on error
778 */
779static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
780{
781 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
782}
783
784/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530785 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530786 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530787 */
788static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530789ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530790{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530791 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530792}
793
794/**
795 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
796 * @ucd_rsp_ptr: pointer to response UPIU
797 *
798 * This function gets the response status and scsi_status from response UPIU
799 * Returns the response result code.
800 */
801static inline int
802ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
803{
804 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
805}
806
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530807/*
808 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
809 * from response UPIU
810 * @ucd_rsp_ptr: pointer to response UPIU
811 *
812 * Return the data segment length.
813 */
814static inline unsigned int
815ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
816{
817 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
818 MASK_RSP_UPIU_DATA_SEG_LEN;
819}
820
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530821/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530822 * ufshcd_is_exception_event - Check if the device raised an exception event
823 * @ucd_rsp_ptr: pointer to response UPIU
824 *
825 * The function checks if the device raised an exception event indicated in
826 * the Device Information field of response UPIU.
827 *
828 * Returns true if exception is raised, false otherwise.
829 */
830static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
831{
832 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
833 MASK_RSP_EXCEPTION_EVENT ? true : false;
834}
835
836/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530837 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530838 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530839 */
840static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530841ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530842{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530843 ufshcd_writel(hba, INT_AGGR_ENABLE |
844 INT_AGGR_COUNTER_AND_TIMER_RESET,
845 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
846}
847
848/**
849 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
850 * @hba: per adapter instance
851 * @cnt: Interrupt aggregation counter threshold
852 * @tmout: Interrupt aggregation timeout value
853 */
854static inline void
855ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
856{
857 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
858 INT_AGGR_COUNTER_THLD_VAL(cnt) |
859 INT_AGGR_TIMEOUT_VAL(tmout),
860 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530861}
862
863/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300864 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
865 * @hba: per adapter instance
866 */
867static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
868{
869 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
870}
871
872/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530873 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
874 * When run-stop registers are set to 1, it indicates the
875 * host controller that it can process the requests
876 * @hba: per adapter instance
877 */
878static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
879{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530880 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
881 REG_UTP_TASK_REQ_LIST_RUN_STOP);
882 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
883 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530884}
885
886/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530887 * ufshcd_hba_start - Start controller initialization sequence
888 * @hba: per adapter instance
889 */
890static inline void ufshcd_hba_start(struct ufs_hba *hba)
891{
Satya Tangiraladf043c742020-07-06 20:04:14 +0000892 u32 val = CONTROLLER_ENABLE;
893
894 if (ufshcd_crypto_enable(hba))
895 val |= CRYPTO_GENERAL_ENABLE;
896
897 ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530898}
899
900/**
901 * ufshcd_is_hba_active - Get controller state
902 * @hba: per adapter instance
903 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300904 * Returns false if controller is active, true otherwise
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530905 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300906static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530907{
Tomohiro Kusumi4a8eec22017-03-28 16:49:25 +0300908 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
909 ? false : true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530910}
911
Yaniv Gardi37113102016-03-10 17:37:16 +0200912u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
913{
914 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
Caleb Connolly51428812021-03-10 15:33:42 +0000915 if (hba->ufs_version <= ufshci_version(1, 1))
Yaniv Gardi37113102016-03-10 17:37:16 +0200916 return UFS_UNIPRO_VER_1_41;
917 else
918 return UFS_UNIPRO_VER_1_6;
919}
920EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
921
922static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
923{
924 /*
925 * If both host and device support UniPro ver1.6 or later, PA layer
926 * parameters tuning happens during link startup itself.
927 *
928 * We can manually tune PA layer parameters if either host or device
929 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
930 * logic simple, we will only do manual tuning if local unipro version
931 * doesn't support ver1.6 or later.
932 */
933 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
934 return true;
935 else
936 return false;
937}
938
Subhash Jadavani394b9492020-03-26 02:25:40 -0700939/**
940 * ufshcd_set_clk_freq - set UFS controller clock frequencies
941 * @hba: per adapter instance
942 * @scale_up: If True, set max possible frequency othewise set low frequency
943 *
944 * Returns 0 if successful
945 * Returns < 0 for any other errors
946 */
947static int ufshcd_set_clk_freq(struct ufs_hba *hba, bool scale_up)
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800948{
949 int ret = 0;
950 struct ufs_clk_info *clki;
951 struct list_head *head = &hba->clk_list_head;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800952
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300953 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800954 goto out;
955
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800956 list_for_each_entry(clki, head, list) {
957 if (!IS_ERR_OR_NULL(clki->clk)) {
958 if (scale_up && clki->max_freq) {
959 if (clki->curr_freq == clki->max_freq)
960 continue;
961
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800962 ret = clk_set_rate(clki->clk, clki->max_freq);
963 if (ret) {
964 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
965 __func__, clki->name,
966 clki->max_freq, ret);
967 break;
968 }
969 trace_ufshcd_clk_scaling(dev_name(hba->dev),
970 "scaled up", clki->name,
971 clki->curr_freq,
972 clki->max_freq);
973
974 clki->curr_freq = clki->max_freq;
975
976 } else if (!scale_up && clki->min_freq) {
977 if (clki->curr_freq == clki->min_freq)
978 continue;
979
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800980 ret = clk_set_rate(clki->clk, clki->min_freq);
981 if (ret) {
982 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
983 __func__, clki->name,
984 clki->min_freq, ret);
985 break;
986 }
987 trace_ufshcd_clk_scaling(dev_name(hba->dev),
988 "scaled down", clki->name,
989 clki->curr_freq,
990 clki->min_freq);
991 clki->curr_freq = clki->min_freq;
992 }
993 }
994 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
995 clki->name, clk_get_rate(clki->clk));
996 }
997
Subhash Jadavani394b9492020-03-26 02:25:40 -0700998out:
999 return ret;
1000}
1001
1002/**
1003 * ufshcd_scale_clks - scale up or scale down UFS controller clocks
1004 * @hba: per adapter instance
1005 * @scale_up: True if scaling up and false if scaling down
1006 *
1007 * Returns 0 if successful
1008 * Returns < 0 for any other errors
1009 */
1010static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
1011{
1012 int ret = 0;
1013 ktime_t start = ktime_get();
1014
1015 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
1016 if (ret)
1017 goto out;
1018
1019 ret = ufshcd_set_clk_freq(hba, scale_up);
1020 if (ret)
1021 goto out;
1022
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001023 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
Subhash Jadavani394b9492020-03-26 02:25:40 -07001024 if (ret)
1025 ufshcd_set_clk_freq(hba, !scale_up);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001026
1027out:
Subhash Jadavani394b9492020-03-26 02:25:40 -07001028 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001029 (scale_up ? "up" : "down"),
1030 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1031 return ret;
1032}
1033
1034/**
1035 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
1036 * @hba: per adapter instance
1037 * @scale_up: True if scaling up and false if scaling down
1038 *
1039 * Returns true if scaling is required, false otherwise.
1040 */
1041static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
1042 bool scale_up)
1043{
1044 struct ufs_clk_info *clki;
1045 struct list_head *head = &hba->clk_list_head;
1046
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03001047 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001048 return false;
1049
1050 list_for_each_entry(clki, head, list) {
1051 if (!IS_ERR_OR_NULL(clki->clk)) {
1052 if (scale_up && clki->max_freq) {
1053 if (clki->curr_freq == clki->max_freq)
1054 continue;
1055 return true;
1056 } else if (!scale_up && clki->min_freq) {
1057 if (clki->curr_freq == clki->min_freq)
1058 continue;
1059 return true;
1060 }
1061 }
1062 }
1063
1064 return false;
1065}
1066
1067static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
1068 u64 wait_timeout_us)
1069{
1070 unsigned long flags;
1071 int ret = 0;
1072 u32 tm_doorbell;
1073 u32 tr_doorbell;
1074 bool timeout = false, do_last_check = false;
1075 ktime_t start;
1076
1077 ufshcd_hold(hba, false);
1078 spin_lock_irqsave(hba->host->host_lock, flags);
1079 /*
1080 * Wait for all the outstanding tasks/transfer requests.
1081 * Verify by checking the doorbell registers are clear.
1082 */
1083 start = ktime_get();
1084 do {
1085 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1086 ret = -EBUSY;
1087 goto out;
1088 }
1089
1090 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1091 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1092 if (!tm_doorbell && !tr_doorbell) {
1093 timeout = false;
1094 break;
1095 } else if (do_last_check) {
1096 break;
1097 }
1098
1099 spin_unlock_irqrestore(hba->host->host_lock, flags);
1100 schedule();
1101 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1102 wait_timeout_us) {
1103 timeout = true;
1104 /*
1105 * We might have scheduled out for long time so make
1106 * sure to check if doorbells are cleared by this time
1107 * or not.
1108 */
1109 do_last_check = true;
1110 }
1111 spin_lock_irqsave(hba->host->host_lock, flags);
1112 } while (tm_doorbell || tr_doorbell);
1113
1114 if (timeout) {
1115 dev_err(hba->dev,
1116 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1117 __func__, tm_doorbell, tr_doorbell);
1118 ret = -EBUSY;
1119 }
1120out:
1121 spin_unlock_irqrestore(hba->host->host_lock, flags);
1122 ufshcd_release(hba);
1123 return ret;
1124}
1125
1126/**
1127 * ufshcd_scale_gear - scale up/down UFS gear
1128 * @hba: per adapter instance
1129 * @scale_up: True for scaling up gear and false for scaling down
1130 *
1131 * Returns 0 for success,
1132 * Returns -EBUSY if scaling can't happen at this time
1133 * Returns non-zero for any other errors
1134 */
1135static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1136{
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001137 int ret = 0;
1138 struct ufs_pa_layer_attr new_pwr_info;
1139
1140 if (scale_up) {
1141 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1142 sizeof(struct ufs_pa_layer_attr));
1143 } else {
1144 memcpy(&new_pwr_info, &hba->pwr_info,
1145 sizeof(struct ufs_pa_layer_attr));
1146
Can Guo29b87e92020-11-26 17:58:48 -08001147 if (hba->pwr_info.gear_tx > hba->clk_scaling.min_gear ||
1148 hba->pwr_info.gear_rx > hba->clk_scaling.min_gear) {
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001149 /* save the current power mode */
1150 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1151 &hba->pwr_info,
1152 sizeof(struct ufs_pa_layer_attr));
1153
1154 /* scale down gear */
Can Guo29b87e92020-11-26 17:58:48 -08001155 new_pwr_info.gear_tx = hba->clk_scaling.min_gear;
1156 new_pwr_info.gear_rx = hba->clk_scaling.min_gear;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001157 }
1158 }
1159
1160 /* check if the power mode needs to be changed or not? */
Can Guo6a9df812020-02-11 21:38:28 -08001161 ret = ufshcd_config_pwr_mode(hba, &new_pwr_info);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001162 if (ret)
1163 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1164 __func__, ret,
1165 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1166 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1167
1168 return ret;
1169}
1170
1171static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1172{
1173 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1174 int ret = 0;
1175 /*
1176 * make sure that there are no outstanding requests when
1177 * clock scaling is in progress
1178 */
Subhash Jadavani38135532018-05-03 16:37:18 +05301179 ufshcd_scsi_block_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001180 down_write(&hba->clk_scaling_lock);
Can Guo0e9d4ca2021-01-20 02:04:21 -08001181
1182 if (!hba->clk_scaling.is_allowed ||
1183 ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001184 ret = -EBUSY;
1185 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301186 ufshcd_scsi_unblock_requests(hba);
Can Guo0e9d4ca2021-01-20 02:04:21 -08001187 goto out;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001188 }
1189
Can Guo0e9d4ca2021-01-20 02:04:21 -08001190 /* let's not get into low power until clock scaling is completed */
1191 ufshcd_hold(hba, false);
1192
1193out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001194 return ret;
1195}
1196
Can Guo0e9d4ca2021-01-20 02:04:21 -08001197static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba, bool writelock)
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001198{
Can Guo0e9d4ca2021-01-20 02:04:21 -08001199 if (writelock)
1200 up_write(&hba->clk_scaling_lock);
1201 else
1202 up_read(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301203 ufshcd_scsi_unblock_requests(hba);
Can Guo0e9d4ca2021-01-20 02:04:21 -08001204 ufshcd_release(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001205}
1206
1207/**
1208 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1209 * @hba: per adapter instance
1210 * @scale_up: True for scaling up and false for scalin down
1211 *
1212 * Returns 0 for success,
1213 * Returns -EBUSY if scaling can't happen at this time
1214 * Returns non-zero for any other errors
1215 */
1216static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1217{
1218 int ret = 0;
Can Guo0e9d4ca2021-01-20 02:04:21 -08001219 bool is_writelock = true;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001220
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001221 ret = ufshcd_clock_scaling_prepare(hba);
1222 if (ret)
Can Guo0e9d4ca2021-01-20 02:04:21 -08001223 return ret;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001224
1225 /* scale down the gear before scaling down clocks */
1226 if (!scale_up) {
1227 ret = ufshcd_scale_gear(hba, false);
1228 if (ret)
Subhash Jadavani394b9492020-03-26 02:25:40 -07001229 goto out_unprepare;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001230 }
1231
1232 ret = ufshcd_scale_clks(hba, scale_up);
1233 if (ret) {
1234 if (!scale_up)
1235 ufshcd_scale_gear(hba, true);
Subhash Jadavani394b9492020-03-26 02:25:40 -07001236 goto out_unprepare;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001237 }
1238
1239 /* scale up the gear after scaling up clocks */
1240 if (scale_up) {
1241 ret = ufshcd_scale_gear(hba, true);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001242 if (ret) {
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001243 ufshcd_scale_clks(hba, false);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001244 goto out_unprepare;
1245 }
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001246 }
1247
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001248 /* Enable Write Booster if we have scaled up else disable it */
Can Guo0e9d4ca2021-01-20 02:04:21 -08001249 downgrade_write(&hba->clk_scaling_lock);
1250 is_writelock = false;
Yue Hu3b5f3c02021-03-18 17:55:36 +08001251 ufshcd_wb_toggle(hba, scale_up);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001252
Subhash Jadavani394b9492020-03-26 02:25:40 -07001253out_unprepare:
Can Guo0e9d4ca2021-01-20 02:04:21 -08001254 ufshcd_clock_scaling_unprepare(hba, is_writelock);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001255 return ret;
1256}
1257
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001258static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1259{
1260 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1261 clk_scaling.suspend_work);
1262 unsigned long irq_flags;
1263
1264 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1265 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1266 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1267 return;
1268 }
1269 hba->clk_scaling.is_suspended = true;
1270 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1271
1272 __ufshcd_suspend_clkscaling(hba);
1273}
1274
1275static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1276{
1277 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1278 clk_scaling.resume_work);
1279 unsigned long irq_flags;
1280
1281 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1282 if (!hba->clk_scaling.is_suspended) {
1283 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1284 return;
1285 }
1286 hba->clk_scaling.is_suspended = false;
1287 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1288
1289 devfreq_resume_device(hba->devfreq);
1290}
1291
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001292static int ufshcd_devfreq_target(struct device *dev,
1293 unsigned long *freq, u32 flags)
1294{
1295 int ret = 0;
1296 struct ufs_hba *hba = dev_get_drvdata(dev);
1297 ktime_t start;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001298 bool scale_up, sched_clk_scaling_suspend_work = false;
Bjorn Andersson092b4552018-05-17 23:26:37 -07001299 struct list_head *clk_list = &hba->clk_list_head;
1300 struct ufs_clk_info *clki;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001301 unsigned long irq_flags;
1302
1303 if (!ufshcd_is_clkscaling_supported(hba))
1304 return -EINVAL;
1305
Asutosh Das91831d32020-03-25 11:29:00 -07001306 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1307 /* Override with the closest supported frequency */
1308 *freq = (unsigned long) clk_round_rate(clki->clk, *freq);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001309 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1310 if (ufshcd_eh_in_progress(hba)) {
1311 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1312 return 0;
1313 }
1314
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001315 if (!hba->clk_scaling.active_reqs)
1316 sched_clk_scaling_suspend_work = true;
1317
Bjorn Andersson092b4552018-05-17 23:26:37 -07001318 if (list_empty(clk_list)) {
1319 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1320 goto out;
1321 }
1322
Asutosh Das91831d32020-03-25 11:29:00 -07001323 /* Decide based on the rounded-off frequency and update */
Bjorn Andersson092b4552018-05-17 23:26:37 -07001324 scale_up = (*freq == clki->max_freq) ? true : false;
Asutosh Das91831d32020-03-25 11:29:00 -07001325 if (!scale_up)
1326 *freq = clki->min_freq;
1327 /* Update the frequency */
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001328 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1329 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1330 ret = 0;
1331 goto out; /* no state change required */
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001332 }
1333 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1334
1335 start = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001336 ret = ufshcd_devfreq_scale(hba, scale_up);
1337
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001338 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1339 (scale_up ? "up" : "down"),
1340 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1341
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001342out:
1343 if (sched_clk_scaling_suspend_work)
1344 queue_work(hba->clk_scaling.workq,
1345 &hba->clk_scaling.suspend_work);
1346
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001347 return ret;
1348}
1349
Bart Van Assche7252a362019-12-09 10:13:08 -08001350static bool ufshcd_is_busy(struct request *req, void *priv, bool reserved)
1351{
1352 int *busy = priv;
1353
1354 WARN_ON_ONCE(reserved);
1355 (*busy)++;
1356 return false;
1357}
1358
1359/* Whether or not any tag is in use by a request that is in progress. */
1360static bool ufshcd_any_tag_in_use(struct ufs_hba *hba)
1361{
1362 struct request_queue *q = hba->cmd_queue;
1363 int busy = 0;
1364
1365 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_is_busy, &busy);
1366 return busy;
1367}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001368
1369static int ufshcd_devfreq_get_dev_status(struct device *dev,
1370 struct devfreq_dev_status *stat)
1371{
1372 struct ufs_hba *hba = dev_get_drvdata(dev);
1373 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1374 unsigned long flags;
Asutosh Das91831d32020-03-25 11:29:00 -07001375 struct list_head *clk_list = &hba->clk_list_head;
1376 struct ufs_clk_info *clki;
Stanley Chub1bf66d2020-06-11 18:10:43 +08001377 ktime_t curr_t;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001378
1379 if (!ufshcd_is_clkscaling_supported(hba))
1380 return -EINVAL;
1381
1382 memset(stat, 0, sizeof(*stat));
1383
1384 spin_lock_irqsave(hba->host->host_lock, flags);
Stanley Chub1bf66d2020-06-11 18:10:43 +08001385 curr_t = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001386 if (!scaling->window_start_t)
1387 goto start_window;
1388
Asutosh Das91831d32020-03-25 11:29:00 -07001389 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1390 /*
1391 * If current frequency is 0, then the ondemand governor considers
1392 * there's no initial frequency set. And it always requests to set
1393 * to max. frequency.
1394 */
1395 stat->current_frequency = clki->curr_freq;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001396 if (scaling->is_busy_started)
Stanley Chub1bf66d2020-06-11 18:10:43 +08001397 scaling->tot_busy_t += ktime_us_delta(curr_t,
1398 scaling->busy_start_t);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001399
Stanley Chub1bf66d2020-06-11 18:10:43 +08001400 stat->total_time = ktime_us_delta(curr_t, scaling->window_start_t);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001401 stat->busy_time = scaling->tot_busy_t;
1402start_window:
Stanley Chub1bf66d2020-06-11 18:10:43 +08001403 scaling->window_start_t = curr_t;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001404 scaling->tot_busy_t = 0;
1405
1406 if (hba->outstanding_reqs) {
Stanley Chub1bf66d2020-06-11 18:10:43 +08001407 scaling->busy_start_t = curr_t;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001408 scaling->is_busy_started = true;
1409 } else {
1410 scaling->busy_start_t = 0;
1411 scaling->is_busy_started = false;
1412 }
1413 spin_unlock_irqrestore(hba->host->host_lock, flags);
1414 return 0;
1415}
1416
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001417static int ufshcd_devfreq_init(struct ufs_hba *hba)
1418{
Bjorn Andersson092b4552018-05-17 23:26:37 -07001419 struct list_head *clk_list = &hba->clk_list_head;
1420 struct ufs_clk_info *clki;
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001421 struct devfreq *devfreq;
1422 int ret;
1423
Bjorn Andersson092b4552018-05-17 23:26:37 -07001424 /* Skip devfreq if we don't have any clocks in the list */
1425 if (list_empty(clk_list))
1426 return 0;
1427
1428 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1429 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1430 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1431
Stanley Chu90b84912020-05-09 17:37:13 +08001432 ufshcd_vops_config_scaling_param(hba, &hba->vps->devfreq_profile,
1433 &hba->vps->ondemand_data);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001434 devfreq = devfreq_add_device(hba->dev,
Stanley Chu90b84912020-05-09 17:37:13 +08001435 &hba->vps->devfreq_profile,
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001436 DEVFREQ_GOV_SIMPLE_ONDEMAND,
Stanley Chu90b84912020-05-09 17:37:13 +08001437 &hba->vps->ondemand_data);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001438 if (IS_ERR(devfreq)) {
1439 ret = PTR_ERR(devfreq);
1440 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001441
1442 dev_pm_opp_remove(hba->dev, clki->min_freq);
1443 dev_pm_opp_remove(hba->dev, clki->max_freq);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001444 return ret;
1445 }
1446
1447 hba->devfreq = devfreq;
1448
1449 return 0;
1450}
1451
Bjorn Andersson092b4552018-05-17 23:26:37 -07001452static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1453{
1454 struct list_head *clk_list = &hba->clk_list_head;
1455 struct ufs_clk_info *clki;
1456
1457 if (!hba->devfreq)
1458 return;
1459
1460 devfreq_remove_device(hba->devfreq);
1461 hba->devfreq = NULL;
1462
1463 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1464 dev_pm_opp_remove(hba->dev, clki->min_freq);
1465 dev_pm_opp_remove(hba->dev, clki->max_freq);
1466}
1467
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001468static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1469{
1470 unsigned long flags;
1471
1472 devfreq_suspend_device(hba->devfreq);
1473 spin_lock_irqsave(hba->host->host_lock, flags);
1474 hba->clk_scaling.window_start_t = 0;
1475 spin_unlock_irqrestore(hba->host->host_lock, flags);
1476}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001477
Gilad Bronera5082532016-10-17 17:10:00 -07001478static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1479{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001480 unsigned long flags;
1481 bool suspend = false;
1482
Stanley Chuf9a7fa32021-01-20 23:01:40 +08001483 cancel_work_sync(&hba->clk_scaling.suspend_work);
1484 cancel_work_sync(&hba->clk_scaling.resume_work);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001485
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001486 spin_lock_irqsave(hba->host->host_lock, flags);
1487 if (!hba->clk_scaling.is_suspended) {
1488 suspend = true;
1489 hba->clk_scaling.is_suspended = true;
1490 }
1491 spin_unlock_irqrestore(hba->host->host_lock, flags);
1492
1493 if (suspend)
1494 __ufshcd_suspend_clkscaling(hba);
Gilad Bronera5082532016-10-17 17:10:00 -07001495}
1496
1497static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1498{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001499 unsigned long flags;
1500 bool resume = false;
1501
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001502 spin_lock_irqsave(hba->host->host_lock, flags);
1503 if (hba->clk_scaling.is_suspended) {
1504 resume = true;
1505 hba->clk_scaling.is_suspended = false;
1506 }
1507 spin_unlock_irqrestore(hba->host->host_lock, flags);
1508
1509 if (resume)
1510 devfreq_resume_device(hba->devfreq);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001511}
1512
1513static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1514 struct device_attribute *attr, char *buf)
1515{
1516 struct ufs_hba *hba = dev_get_drvdata(dev);
1517
Jiapeng Chong1481b7f2021-03-02 14:08:18 +08001518 return sysfs_emit(buf, "%d\n", hba->clk_scaling.is_enabled);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001519}
1520
1521static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1522 struct device_attribute *attr, const char *buf, size_t count)
1523{
1524 struct ufs_hba *hba = dev_get_drvdata(dev);
1525 u32 value;
Can Guo9cd20d32021-01-13 19:13:28 -08001526 int err = 0;
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001527
1528 if (kstrtou32(buf, 0, &value))
1529 return -EINVAL;
1530
Can Guo9cd20d32021-01-13 19:13:28 -08001531 down(&hba->host_sem);
1532 if (!ufshcd_is_user_access_allowed(hba)) {
1533 err = -EBUSY;
1534 goto out;
1535 }
1536
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001537 value = !!value;
Can Guo0e9d4ca2021-01-20 02:04:21 -08001538 if (value == hba->clk_scaling.is_enabled)
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001539 goto out;
1540
Asutosh Dasb294ff32021-04-23 17:20:16 -07001541 ufshcd_rpm_get_sync(hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001542 ufshcd_hold(hba, false);
1543
Can Guo0e9d4ca2021-01-20 02:04:21 -08001544 hba->clk_scaling.is_enabled = value;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001545
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001546 if (value) {
1547 ufshcd_resume_clkscaling(hba);
1548 } else {
1549 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001550 err = ufshcd_devfreq_scale(hba, true);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001551 if (err)
1552 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1553 __func__, err);
1554 }
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001555
1556 ufshcd_release(hba);
Asutosh Dasb294ff32021-04-23 17:20:16 -07001557 ufshcd_rpm_put_sync(hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001558out:
Can Guo9cd20d32021-01-13 19:13:28 -08001559 up(&hba->host_sem);
1560 return err ? err : count;
Gilad Bronera5082532016-10-17 17:10:00 -07001561}
1562
Can Guo4543d9d2021-01-20 02:04:22 -08001563static void ufshcd_init_clk_scaling_sysfs(struct ufs_hba *hba)
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001564{
1565 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1566 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1567 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1568 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1569 hba->clk_scaling.enable_attr.attr.mode = 0644;
1570 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1571 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1572}
1573
Can Guo4543d9d2021-01-20 02:04:22 -08001574static void ufshcd_remove_clk_scaling_sysfs(struct ufs_hba *hba)
1575{
1576 if (hba->clk_scaling.enable_attr.attr.name)
1577 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
1578}
1579
1580static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1581{
1582 char wq_name[sizeof("ufs_clkscaling_00")];
1583
1584 if (!ufshcd_is_clkscaling_supported(hba))
1585 return;
1586
Can Guo80d892f2021-01-27 18:49:27 -08001587 if (!hba->clk_scaling.min_gear)
1588 hba->clk_scaling.min_gear = UFS_HS_G1;
1589
Can Guo4543d9d2021-01-20 02:04:22 -08001590 INIT_WORK(&hba->clk_scaling.suspend_work,
1591 ufshcd_clk_scaling_suspend_work);
1592 INIT_WORK(&hba->clk_scaling.resume_work,
1593 ufshcd_clk_scaling_resume_work);
1594
1595 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1596 hba->host->host_no);
1597 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1598
1599 hba->clk_scaling.is_initialized = true;
1600}
1601
1602static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1603{
1604 if (!hba->clk_scaling.is_initialized)
1605 return;
1606
1607 ufshcd_remove_clk_scaling_sysfs(hba);
1608 destroy_workqueue(hba->clk_scaling.workq);
1609 ufshcd_devfreq_remove(hba);
1610 hba->clk_scaling.is_initialized = false;
1611}
1612
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001613static void ufshcd_ungate_work(struct work_struct *work)
1614{
1615 int ret;
1616 unsigned long flags;
1617 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1618 clk_gating.ungate_work);
1619
1620 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1621
1622 spin_lock_irqsave(hba->host->host_lock, flags);
1623 if (hba->clk_gating.state == CLKS_ON) {
1624 spin_unlock_irqrestore(hba->host->host_lock, flags);
1625 goto unblock_reqs;
1626 }
1627
1628 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guodd7143e2020-10-27 12:10:36 -07001629 ufshcd_hba_vreg_set_hpm(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001630 ufshcd_setup_clocks(hba, true);
1631
Stanley Chu8b0bbf02019-12-07 20:22:01 +08001632 ufshcd_enable_irq(hba);
1633
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001634 /* Exit from hibern8 */
1635 if (ufshcd_can_hibern8_during_gating(hba)) {
1636 /* Prevent gating in this path */
1637 hba->clk_gating.is_suspended = true;
1638 if (ufshcd_is_link_hibern8(hba)) {
1639 ret = ufshcd_uic_hibern8_exit(hba);
1640 if (ret)
1641 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1642 __func__, ret);
1643 else
1644 ufshcd_set_link_active(hba);
1645 }
1646 hba->clk_gating.is_suspended = false;
1647 }
1648unblock_reqs:
Subhash Jadavani38135532018-05-03 16:37:18 +05301649 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001650}
1651
1652/**
1653 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1654 * Also, exit from hibern8 mode and set the link as active.
1655 * @hba: per adapter instance
1656 * @async: This indicates whether caller should ungate clocks asynchronously.
1657 */
1658int ufshcd_hold(struct ufs_hba *hba, bool async)
1659{
1660 int rc = 0;
Stanley Chu93b6c5d2020-08-09 13:07:34 +08001661 bool flush_result;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001662 unsigned long flags;
1663
1664 if (!ufshcd_is_clkgating_allowed(hba))
1665 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001666 spin_lock_irqsave(hba->host->host_lock, flags);
1667 hba->clk_gating.active_reqs++;
1668
Sahitya Tummala856b3482014-09-25 15:32:34 +03001669start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001670 switch (hba->clk_gating.state) {
1671 case CLKS_ON:
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001672 /*
1673 * Wait for the ungate work to complete if in progress.
1674 * Though the clocks may be in ON state, the link could
1675 * still be in hibner8 state if hibern8 is allowed
1676 * during clock gating.
1677 * Make sure we exit hibern8 state also in addition to
1678 * clocks being ON.
1679 */
1680 if (ufshcd_can_hibern8_during_gating(hba) &&
1681 ufshcd_is_link_hibern8(hba)) {
Can Guoc63d6092020-02-10 19:40:48 -08001682 if (async) {
1683 rc = -EAGAIN;
1684 hba->clk_gating.active_reqs--;
1685 break;
1686 }
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001687 spin_unlock_irqrestore(hba->host->host_lock, flags);
Stanley Chu93b6c5d2020-08-09 13:07:34 +08001688 flush_result = flush_work(&hba->clk_gating.ungate_work);
1689 if (hba->clk_gating.is_suspended && !flush_result)
1690 goto out;
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001691 spin_lock_irqsave(hba->host->host_lock, flags);
1692 goto start;
1693 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001694 break;
1695 case REQ_CLKS_OFF:
1696 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1697 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001698 trace_ufshcd_clk_gating(dev_name(hba->dev),
1699 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001700 break;
1701 }
1702 /*
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +03001703 * If we are here, it means gating work is either done or
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001704 * currently running. Hence, fall through to cancel gating
1705 * work and to enable clocks.
1706 */
Gustavo A. R. Silvadf561f662020-08-23 17:36:59 -05001707 fallthrough;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001708 case CLKS_OFF:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001709 hba->clk_gating.state = REQ_CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001710 trace_ufshcd_clk_gating(dev_name(hba->dev),
1711 hba->clk_gating.state);
Can Guoda3fecb2020-11-02 22:24:39 -08001712 if (queue_work(hba->clk_gating.clk_gating_workq,
1713 &hba->clk_gating.ungate_work))
1714 ufshcd_scsi_block_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001715 /*
1716 * fall through to check if we should wait for this
1717 * work to be done or not.
1718 */
Gustavo A. R. Silvadf561f662020-08-23 17:36:59 -05001719 fallthrough;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001720 case REQ_CLKS_ON:
1721 if (async) {
1722 rc = -EAGAIN;
1723 hba->clk_gating.active_reqs--;
1724 break;
1725 }
1726
1727 spin_unlock_irqrestore(hba->host->host_lock, flags);
1728 flush_work(&hba->clk_gating.ungate_work);
1729 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001730 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001731 goto start;
1732 default:
1733 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1734 __func__, hba->clk_gating.state);
1735 break;
1736 }
1737 spin_unlock_irqrestore(hba->host->host_lock, flags);
1738out:
1739 return rc;
1740}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001741EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001742
1743static void ufshcd_gate_work(struct work_struct *work)
1744{
1745 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1746 clk_gating.gate_work.work);
1747 unsigned long flags;
Can Guo4db7a232020-08-09 05:15:51 -07001748 int ret;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001749
1750 spin_lock_irqsave(hba->host->host_lock, flags);
Venkat Gopalakrishnan3f0c06d2016-10-17 17:11:07 -07001751 /*
1752 * In case you are here to cancel this work the gating state
1753 * would be marked as REQ_CLKS_ON. In this case save time by
1754 * skipping the gating work and exit after changing the clock
1755 * state to CLKS_ON.
1756 */
1757 if (hba->clk_gating.is_suspended ||
Asutosh Das18f013742019-11-14 22:09:29 -08001758 (hba->clk_gating.state != REQ_CLKS_OFF)) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001759 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001760 trace_ufshcd_clk_gating(dev_name(hba->dev),
1761 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001762 goto rel_lock;
1763 }
1764
1765 if (hba->clk_gating.active_reqs
1766 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
Bart Van Assche7252a362019-12-09 10:13:08 -08001767 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001768 || hba->active_uic_cmd || hba->uic_async_done)
1769 goto rel_lock;
1770
1771 spin_unlock_irqrestore(hba->host->host_lock, flags);
1772
1773 /* put the link into hibern8 mode before turning off clocks */
1774 if (ufshcd_can_hibern8_during_gating(hba)) {
Can Guo4db7a232020-08-09 05:15:51 -07001775 ret = ufshcd_uic_hibern8_enter(hba);
1776 if (ret) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001777 hba->clk_gating.state = CLKS_ON;
Can Guo4db7a232020-08-09 05:15:51 -07001778 dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
1779 __func__, ret);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001780 trace_ufshcd_clk_gating(dev_name(hba->dev),
1781 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001782 goto out;
1783 }
1784 ufshcd_set_link_hibern8(hba);
1785 }
1786
Stanley Chu8b0bbf02019-12-07 20:22:01 +08001787 ufshcd_disable_irq(hba);
1788
Can Guo81309c22020-11-25 18:01:00 -08001789 ufshcd_setup_clocks(hba, false);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001790
Can Guodd7143e2020-10-27 12:10:36 -07001791 /* Put the host controller in low power mode if possible */
1792 ufshcd_hba_vreg_set_lpm(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001793 /*
1794 * In case you are here to cancel this work the gating state
1795 * would be marked as REQ_CLKS_ON. In this case keep the state
1796 * as REQ_CLKS_ON which would anyway imply that clocks are off
1797 * and a request to turn them on is pending. By doing this way,
1798 * we keep the state machine in tact and this would ultimately
1799 * prevent from doing cancel work multiple times when there are
1800 * new requests arriving before the current cancel work is done.
1801 */
1802 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001803 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001804 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001805 trace_ufshcd_clk_gating(dev_name(hba->dev),
1806 hba->clk_gating.state);
1807 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001808rel_lock:
1809 spin_unlock_irqrestore(hba->host->host_lock, flags);
1810out:
1811 return;
1812}
1813
1814/* host lock must be held before calling this variant */
1815static void __ufshcd_release(struct ufs_hba *hba)
1816{
1817 if (!ufshcd_is_clkgating_allowed(hba))
1818 return;
1819
1820 hba->clk_gating.active_reqs--;
1821
Can Guo4db7a232020-08-09 05:15:51 -07001822 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended ||
1823 hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL ||
Jaegeuk Kim8eb456b2020-11-17 08:58:38 -08001824 hba->outstanding_tasks ||
Jaegeuk Kimfd62de12020-11-17 08:58:33 -08001825 hba->active_uic_cmd || hba->uic_async_done ||
1826 hba->clk_gating.state == CLKS_OFF)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001827 return;
1828
1829 hba->clk_gating.state = REQ_CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001830 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Evan Greenf4bb7702018-10-05 10:27:32 -07001831 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1832 &hba->clk_gating.gate_work,
1833 msecs_to_jiffies(hba->clk_gating.delay_ms));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001834}
1835
1836void ufshcd_release(struct ufs_hba *hba)
1837{
1838 unsigned long flags;
1839
1840 spin_lock_irqsave(hba->host->host_lock, flags);
1841 __ufshcd_release(hba);
1842 spin_unlock_irqrestore(hba->host->host_lock, flags);
1843}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001844EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001845
1846static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1847 struct device_attribute *attr, char *buf)
1848{
1849 struct ufs_hba *hba = dev_get_drvdata(dev);
1850
DooHyun Hwangbafd09f2021-02-03 19:14:43 +09001851 return sysfs_emit(buf, "%lu\n", hba->clk_gating.delay_ms);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001852}
1853
1854static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1855 struct device_attribute *attr, const char *buf, size_t count)
1856{
1857 struct ufs_hba *hba = dev_get_drvdata(dev);
1858 unsigned long flags, value;
1859
1860 if (kstrtoul(buf, 0, &value))
1861 return -EINVAL;
1862
1863 spin_lock_irqsave(hba->host->host_lock, flags);
1864 hba->clk_gating.delay_ms = value;
1865 spin_unlock_irqrestore(hba->host->host_lock, flags);
1866 return count;
1867}
1868
Sahitya Tummalab4274112016-12-22 18:40:39 -08001869static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1870 struct device_attribute *attr, char *buf)
1871{
1872 struct ufs_hba *hba = dev_get_drvdata(dev);
1873
DooHyun Hwangbafd09f2021-02-03 19:14:43 +09001874 return sysfs_emit(buf, "%d\n", hba->clk_gating.is_enabled);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001875}
1876
1877static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1878 struct device_attribute *attr, const char *buf, size_t count)
1879{
1880 struct ufs_hba *hba = dev_get_drvdata(dev);
1881 unsigned long flags;
1882 u32 value;
1883
1884 if (kstrtou32(buf, 0, &value))
1885 return -EINVAL;
1886
1887 value = !!value;
Jaegeuk Kimb6645112020-11-17 08:58:34 -08001888
1889 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001890 if (value == hba->clk_gating.is_enabled)
1891 goto out;
1892
Jaegeuk Kimb6645112020-11-17 08:58:34 -08001893 if (value)
1894 __ufshcd_release(hba);
1895 else
Sahitya Tummalab4274112016-12-22 18:40:39 -08001896 hba->clk_gating.active_reqs++;
Sahitya Tummalab4274112016-12-22 18:40:39 -08001897
1898 hba->clk_gating.is_enabled = value;
1899out:
Jaegeuk Kimb6645112020-11-17 08:58:34 -08001900 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001901 return count;
1902}
1903
Can Guo4543d9d2021-01-20 02:04:22 -08001904static void ufshcd_init_clk_gating_sysfs(struct ufs_hba *hba)
Vivek Gautameebcc192018-08-07 23:17:39 +05301905{
Can Guo4543d9d2021-01-20 02:04:22 -08001906 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1907 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1908 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1909 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1910 hba->clk_gating.delay_attr.attr.mode = 0644;
1911 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1912 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Vivek Gautameebcc192018-08-07 23:17:39 +05301913
Can Guo4543d9d2021-01-20 02:04:22 -08001914 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1915 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1916 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1917 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1918 hba->clk_gating.enable_attr.attr.mode = 0644;
1919 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1920 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Vivek Gautameebcc192018-08-07 23:17:39 +05301921}
1922
Can Guo4543d9d2021-01-20 02:04:22 -08001923static void ufshcd_remove_clk_gating_sysfs(struct ufs_hba *hba)
Vivek Gautameebcc192018-08-07 23:17:39 +05301924{
Can Guo4543d9d2021-01-20 02:04:22 -08001925 if (hba->clk_gating.delay_attr.attr.name)
1926 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1927 if (hba->clk_gating.enable_attr.attr.name)
1928 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Vivek Gautameebcc192018-08-07 23:17:39 +05301929}
1930
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001931static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1932{
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301933 char wq_name[sizeof("ufs_clk_gating_00")];
1934
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001935 if (!ufshcd_is_clkgating_allowed(hba))
1936 return;
1937
Can Guo2dec9472020-08-09 05:15:47 -07001938 hba->clk_gating.state = CLKS_ON;
1939
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001940 hba->clk_gating.delay_ms = 150;
1941 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1942 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1943
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301944 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1945 hba->host->host_no);
1946 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
Jaegeuk Kime93e6e42020-11-17 08:58:36 -08001947 WQ_MEM_RECLAIM | WQ_HIGHPRI);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301948
Can Guo4543d9d2021-01-20 02:04:22 -08001949 ufshcd_init_clk_gating_sysfs(hba);
1950
Sahitya Tummalab4274112016-12-22 18:40:39 -08001951 hba->clk_gating.is_enabled = true;
Can Guo4543d9d2021-01-20 02:04:22 -08001952 hba->clk_gating.is_initialized = true;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001953}
1954
1955static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1956{
Can Guo4543d9d2021-01-20 02:04:22 -08001957 if (!hba->clk_gating.is_initialized)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001958 return;
Can Guo4543d9d2021-01-20 02:04:22 -08001959 ufshcd_remove_clk_gating_sysfs(hba);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001960 cancel_work_sync(&hba->clk_gating.ungate_work);
1961 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301962 destroy_workqueue(hba->clk_gating.clk_gating_workq);
Can Guo4543d9d2021-01-20 02:04:22 -08001963 hba->clk_gating.is_initialized = false;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001964}
1965
Sahitya Tummala856b3482014-09-25 15:32:34 +03001966/* Must be called with host lock acquired */
1967static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1968{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001969 bool queue_resume_work = false;
Stanley Chub1bf66d2020-06-11 18:10:43 +08001970 ktime_t curr_t = ktime_get();
Can Guoa45f9372021-05-24 01:36:57 -07001971 unsigned long flags;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001972
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001973 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001974 return;
1975
Can Guoa45f9372021-05-24 01:36:57 -07001976 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001977 if (!hba->clk_scaling.active_reqs++)
1978 queue_resume_work = true;
1979
Can Guoa45f9372021-05-24 01:36:57 -07001980 if (!hba->clk_scaling.is_enabled || hba->pm_op_in_progress) {
1981 spin_unlock_irqrestore(hba->host->host_lock, flags);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001982 return;
Can Guoa45f9372021-05-24 01:36:57 -07001983 }
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001984
1985 if (queue_resume_work)
1986 queue_work(hba->clk_scaling.workq,
1987 &hba->clk_scaling.resume_work);
1988
1989 if (!hba->clk_scaling.window_start_t) {
Stanley Chub1bf66d2020-06-11 18:10:43 +08001990 hba->clk_scaling.window_start_t = curr_t;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001991 hba->clk_scaling.tot_busy_t = 0;
1992 hba->clk_scaling.is_busy_started = false;
1993 }
1994
Sahitya Tummala856b3482014-09-25 15:32:34 +03001995 if (!hba->clk_scaling.is_busy_started) {
Stanley Chub1bf66d2020-06-11 18:10:43 +08001996 hba->clk_scaling.busy_start_t = curr_t;
Sahitya Tummala856b3482014-09-25 15:32:34 +03001997 hba->clk_scaling.is_busy_started = true;
1998 }
Can Guoa45f9372021-05-24 01:36:57 -07001999 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sahitya Tummala856b3482014-09-25 15:32:34 +03002000}
2001
2002static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
2003{
2004 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
Can Guoa45f9372021-05-24 01:36:57 -07002005 unsigned long flags;
Sahitya Tummala856b3482014-09-25 15:32:34 +03002006
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08002007 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03002008 return;
2009
Can Guoa45f9372021-05-24 01:36:57 -07002010 spin_lock_irqsave(hba->host->host_lock, flags);
2011 hba->clk_scaling.active_reqs--;
Sahitya Tummala856b3482014-09-25 15:32:34 +03002012 if (!hba->outstanding_reqs && scaling->is_busy_started) {
2013 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
2014 scaling->busy_start_t));
Thomas Gleixner8b0e1952016-12-25 12:30:41 +01002015 scaling->busy_start_t = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03002016 scaling->is_busy_started = false;
2017 }
Can Guoa45f9372021-05-24 01:36:57 -07002018 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sahitya Tummala856b3482014-09-25 15:32:34 +03002019}
Can Guo1d8613a2021-04-21 19:28:39 -07002020
2021static inline int ufshcd_monitor_opcode2dir(u8 opcode)
2022{
2023 if (opcode == READ_6 || opcode == READ_10 || opcode == READ_16)
2024 return READ;
2025 else if (opcode == WRITE_6 || opcode == WRITE_10 || opcode == WRITE_16)
2026 return WRITE;
2027 else
2028 return -EINVAL;
2029}
2030
2031static inline bool ufshcd_should_inform_monitor(struct ufs_hba *hba,
2032 struct ufshcd_lrb *lrbp)
2033{
2034 struct ufs_hba_monitor *m = &hba->monitor;
2035
2036 return (m->enabled && lrbp && lrbp->cmd &&
2037 (!m->chunk_size || m->chunk_size == lrbp->cmd->sdb.length) &&
2038 ktime_before(hba->monitor.enabled_ts, lrbp->issue_time_stamp));
2039}
2040
2041static void ufshcd_start_monitor(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2042{
2043 int dir = ufshcd_monitor_opcode2dir(*lrbp->cmd->cmnd);
Can Guoa45f9372021-05-24 01:36:57 -07002044 unsigned long flags;
Can Guo1d8613a2021-04-21 19:28:39 -07002045
Can Guoa45f9372021-05-24 01:36:57 -07002046 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo1d8613a2021-04-21 19:28:39 -07002047 if (dir >= 0 && hba->monitor.nr_queued[dir]++ == 0)
2048 hba->monitor.busy_start_ts[dir] = ktime_get();
Can Guoa45f9372021-05-24 01:36:57 -07002049 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guo1d8613a2021-04-21 19:28:39 -07002050}
2051
2052static void ufshcd_update_monitor(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2053{
2054 int dir = ufshcd_monitor_opcode2dir(*lrbp->cmd->cmnd);
Can Guoa45f9372021-05-24 01:36:57 -07002055 unsigned long flags;
Can Guo1d8613a2021-04-21 19:28:39 -07002056
Can Guoa45f9372021-05-24 01:36:57 -07002057 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo1d8613a2021-04-21 19:28:39 -07002058 if (dir >= 0 && hba->monitor.nr_queued[dir] > 0) {
Bart Van Assche3f2c1002021-08-09 16:03:50 -07002059 struct request *req = scsi_cmd_to_rq(lrbp->cmd);
Can Guo1d8613a2021-04-21 19:28:39 -07002060 struct ufs_hba_monitor *m = &hba->monitor;
2061 ktime_t now, inc, lat;
2062
2063 now = lrbp->compl_time_stamp;
2064 inc = ktime_sub(now, m->busy_start_ts[dir]);
2065 m->total_busy[dir] = ktime_add(m->total_busy[dir], inc);
2066 m->nr_sec_rw[dir] += blk_rq_sectors(req);
2067
2068 /* Update latencies */
2069 m->nr_req[dir]++;
2070 lat = ktime_sub(now, lrbp->issue_time_stamp);
2071 m->lat_sum[dir] += lat;
2072 if (m->lat_max[dir] < lat || !m->lat_max[dir])
2073 m->lat_max[dir] = lat;
2074 if (m->lat_min[dir] > lat || !m->lat_min[dir])
2075 m->lat_min[dir] = lat;
2076
2077 m->nr_queued[dir]--;
2078 /* Push forward the busy start of monitor */
2079 m->busy_start_ts[dir] = now;
2080 }
Can Guoa45f9372021-05-24 01:36:57 -07002081 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guo1d8613a2021-04-21 19:28:39 -07002082}
2083
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302084/**
2085 * ufshcd_send_command - Send SCSI or device management commands
2086 * @hba: per adapter instance
2087 * @task_tag: Task tag of the command
2088 */
2089static inline
2090void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
2091{
Stanley Chu6edfdcf2020-07-06 14:07:07 +08002092 struct ufshcd_lrb *lrbp = &hba->lrb[task_tag];
Bart Van Assche1f522c52021-07-21 20:34:32 -07002093 unsigned long flags;
Stanley Chu6edfdcf2020-07-06 14:07:07 +08002094
2095 lrbp->issue_time_stamp = ktime_get();
2096 lrbp->compl_time_stamp = ktime_set(0, 0);
Bean Huo28fa68f2021-01-05 12:34:42 +01002097 ufshcd_add_command_trace(hba, task_tag, UFS_CMD_SEND);
Sahitya Tummala856b3482014-09-25 15:32:34 +03002098 ufshcd_clk_scaling_start_busy(hba);
Can Guo1d8613a2021-04-21 19:28:39 -07002099 if (unlikely(ufshcd_should_inform_monitor(hba, lrbp)))
2100 ufshcd_start_monitor(hba, lrbp);
Bart Van Assche169f5eb2021-07-21 20:34:34 -07002101
2102 spin_lock_irqsave(&hba->outstanding_lock, flags);
Bart Van Asschea024ad02021-07-21 20:34:33 -07002103 if (hba->vops && hba->vops->setup_xfer_req)
2104 hba->vops->setup_xfer_req(hba, task_tag, !!lrbp->cmd);
Bart Van Assche169f5eb2021-07-21 20:34:34 -07002105 __set_bit(task_tag, &hba->outstanding_reqs);
Bart Van Assche1f522c52021-07-21 20:34:32 -07002106 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Bart Van Assche169f5eb2021-07-21 20:34:34 -07002107 spin_unlock_irqrestore(&hba->outstanding_lock, flags);
2108
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002109 /* Make sure that doorbell is committed immediately */
2110 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302111}
2112
2113/**
2114 * ufshcd_copy_sense_data - Copy sense data in case of check condition
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002115 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302116 */
2117static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
2118{
2119 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05302120 if (lrbp->sense_buffer &&
2121 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07002122 int len_to_copy;
2123
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302124 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Avri Altman09a5a242018-11-22 20:04:56 +02002125 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07002126
Avri Altman09a5a242018-11-22 20:04:56 +02002127 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
2128 len_to_copy);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302129 }
2130}
2131
2132/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302133 * ufshcd_copy_query_response() - Copy the Query Response and the data
2134 * descriptor
2135 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002136 * @lrbp: pointer to local reference block
Dolev Raviv68078d52013-07-30 00:35:58 +05302137 */
2138static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002139int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05302140{
2141 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2142
Dolev Raviv68078d52013-07-30 00:35:58 +05302143 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302144
Dolev Raviv68078d52013-07-30 00:35:58 +05302145 /* Get the descriptor */
Avri Altman1c908362019-05-21 11:24:22 +03002146 if (hba->dev_cmd.query.descriptor &&
2147 lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002148 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05302149 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002150 u16 resp_len;
2151 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05302152
2153 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002154 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302155 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002156 buf_len = be16_to_cpu(
2157 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002158 if (likely(buf_len >= resp_len)) {
2159 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
2160 } else {
2161 dev_warn(hba->dev,
Bean Huo3d4881d2019-11-12 23:34:35 +01002162 "%s: rsp size %d is bigger than buffer size %d",
2163 __func__, resp_len, buf_len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002164 return -EINVAL;
2165 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302166 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002167
2168 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302169}
2170
2171/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302172 * ufshcd_hba_capabilities - Read controller capabilities
2173 * @hba: per adapter instance
Satya Tangiraladf043c742020-07-06 20:04:14 +00002174 *
2175 * Return: 0 on success, negative on error.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302176 */
Satya Tangiraladf043c742020-07-06 20:04:14 +00002177static inline int ufshcd_hba_capabilities(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302178{
Satya Tangiraladf043c742020-07-06 20:04:14 +00002179 int err;
2180
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302181 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302182
2183 /* nutrs and nutmrs are 0 based values */
2184 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
2185 hba->nutmrs =
2186 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
Satya Tangiraladf043c742020-07-06 20:04:14 +00002187
2188 /* Read crypto capabilities */
2189 err = ufshcd_hba_init_crypto_capabilities(hba);
2190 if (err)
2191 dev_err(hba->dev, "crypto setup failed\n");
2192
2193 return err;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302194}
2195
2196/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302197 * ufshcd_ready_for_uic_cmd - Check if controller is ready
2198 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302199 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302200 * Return true on success, else false
2201 */
2202static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
2203{
2204 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
2205 return true;
2206 else
2207 return false;
2208}
2209
2210/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05302211 * ufshcd_get_upmcrs - Get the power mode change request status
2212 * @hba: Pointer to adapter instance
2213 *
2214 * This function gets the UPMCRS field of HCS register
2215 * Returns value of UPMCRS field
2216 */
2217static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
2218{
2219 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
2220}
2221
2222/**
Bart Van Assche35c7d872021-07-21 20:34:28 -07002223 * ufshcd_dispatch_uic_cmd - Dispatch an UIC command to the Unipro layer
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302224 * @hba: per adapter instance
2225 * @uic_cmd: UIC command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302226 */
2227static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302228ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302229{
Bart Van Assche35c7d872021-07-21 20:34:28 -07002230 lockdep_assert_held(&hba->uic_cmd_mutex);
2231
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302232 WARN_ON(hba->active_uic_cmd);
2233
2234 hba->active_uic_cmd = uic_cmd;
2235
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302236 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302237 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2238 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2239 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302240
Bean Huo28fa68f2021-01-05 12:34:42 +01002241 ufshcd_add_uic_command_trace(hba, uic_cmd, UFS_CMD_SEND);
Stanley Chuaa5c6972020-06-15 15:22:35 +08002242
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302243 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302244 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302245 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302246}
2247
2248/**
Bart Van Assche35c7d872021-07-21 20:34:28 -07002249 * ufshcd_wait_for_uic_cmd - Wait for completion of an UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302250 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002251 * @uic_cmd: UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302252 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302253 * Returns 0 only if success.
2254 */
2255static int
2256ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2257{
2258 int ret;
2259 unsigned long flags;
2260
Bart Van Assche35c7d872021-07-21 20:34:28 -07002261 lockdep_assert_held(&hba->uic_cmd_mutex);
2262
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302263 if (wait_for_completion_timeout(&uic_cmd->done,
Can Guo0f52fcb92020-11-02 22:24:40 -08002264 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302265 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
Can Guo0f52fcb92020-11-02 22:24:40 -08002266 } else {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302267 ret = -ETIMEDOUT;
Can Guo0f52fcb92020-11-02 22:24:40 -08002268 dev_err(hba->dev,
2269 "uic cmd 0x%x with arg3 0x%x completion timeout\n",
2270 uic_cmd->command, uic_cmd->argument3);
2271
2272 if (!uic_cmd->cmd_active) {
2273 dev_err(hba->dev, "%s: UIC cmd has been completed, return the result\n",
2274 __func__);
2275 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2276 }
2277 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302278
2279 spin_lock_irqsave(hba->host->host_lock, flags);
2280 hba->active_uic_cmd = NULL;
2281 spin_unlock_irqrestore(hba->host->host_lock, flags);
2282
2283 return ret;
2284}
2285
2286/**
2287 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2288 * @hba: per adapter instance
2289 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002290 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302291 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302292 * Returns 0 only if success.
2293 */
2294static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002295__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2296 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302297{
Bart Van Assche35c7d872021-07-21 20:34:28 -07002298 lockdep_assert_held(&hba->uic_cmd_mutex);
2299 lockdep_assert_held(hba->host->host_lock);
2300
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302301 if (!ufshcd_ready_for_uic_cmd(hba)) {
2302 dev_err(hba->dev,
2303 "Controller not ready to accept UIC commands\n");
2304 return -EIO;
2305 }
2306
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002307 if (completion)
2308 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302309
Can Guo0f52fcb92020-11-02 22:24:40 -08002310 uic_cmd->cmd_active = 1;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302311 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302312
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002313 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302314}
2315
2316/**
2317 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2318 * @hba: per adapter instance
2319 * @uic_cmd: UIC command
2320 *
2321 * Returns 0 only if success.
2322 */
Avri Altmane77044c52018-10-07 17:30:39 +03002323int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302324{
2325 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002326 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302327
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002328 ufshcd_hold(hba, false);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302329 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03002330 ufshcd_add_delay_before_dme_cmd(hba);
2331
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002332 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002333 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002334 spin_unlock_irqrestore(hba->host->host_lock, flags);
2335 if (!ret)
2336 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2337
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302338 mutex_unlock(&hba->uic_cmd_mutex);
2339
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002340 ufshcd_release(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302341 return ret;
2342}
2343
2344/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302345 * ufshcd_map_sg - Map scatter-gather list to prdt
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002346 * @hba: per adapter instance
2347 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302348 *
2349 * Returns 0 in case of success, non-zero value in case of failure
2350 */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002351static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302352{
2353 struct ufshcd_sg_entry *prd_table;
2354 struct scatterlist *sg;
2355 struct scsi_cmnd *cmd;
2356 int sg_segments;
2357 int i;
2358
2359 cmd = lrbp->cmd;
2360 sg_segments = scsi_dma_map(cmd);
2361 if (sg_segments < 0)
2362 return sg_segments;
2363
2364 if (sg_segments) {
Alim Akhtar26f968d2020-05-28 06:46:52 +05302365
2366 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2367 lrbp->utr_descriptor_ptr->prd_table_length =
2368 cpu_to_le16((sg_segments *
2369 sizeof(struct ufshcd_sg_entry)));
2370 else
2371 lrbp->utr_descriptor_ptr->prd_table_length =
2372 cpu_to_le16((u16) (sg_segments));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302373
2374 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2375
2376 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2377 prd_table[i].size =
2378 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2379 prd_table[i].base_addr =
2380 cpu_to_le32(lower_32_bits(sg->dma_address));
2381 prd_table[i].upper_addr =
2382 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002383 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302384 }
2385 } else {
2386 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2387 }
2388
2389 return 0;
2390}
2391
2392/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302393 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302394 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302395 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302396 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302397static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302398{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302399 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2400
Caleb Connolly51428812021-03-10 15:33:42 +00002401 if (hba->ufs_version == ufshci_version(1, 0)) {
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302402 u32 rw;
2403 rw = set & INTERRUPT_MASK_RW_VER_10;
2404 set = rw | ((set ^ intrs) & intrs);
2405 } else {
2406 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302407 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302408
2409 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2410}
2411
2412/**
2413 * ufshcd_disable_intr - disable interrupts
2414 * @hba: per adapter instance
2415 * @intrs: interrupt bits
2416 */
2417static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2418{
2419 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2420
Caleb Connolly51428812021-03-10 15:33:42 +00002421 if (hba->ufs_version == ufshci_version(1, 0)) {
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302422 u32 rw;
2423 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2424 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2425 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2426
2427 } else {
2428 set &= ~intrs;
2429 }
2430
2431 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302432}
2433
2434/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302435 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2436 * descriptor according to request
2437 * @lrbp: pointer to local reference block
2438 * @upiu_flags: flags required in the header
2439 * @cmd_dir: requests data direction
2440 */
2441static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
Bean Huoa23064c2020-07-06 14:39:36 +02002442 u8 *upiu_flags, enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302443{
2444 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2445 u32 data_direction;
2446 u32 dword_0;
Satya Tangiraladf043c742020-07-06 20:04:14 +00002447 u32 dword_1 = 0;
2448 u32 dword_3 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302449
2450 if (cmd_dir == DMA_FROM_DEVICE) {
2451 data_direction = UTP_DEVICE_TO_HOST;
2452 *upiu_flags = UPIU_CMD_FLAGS_READ;
2453 } else if (cmd_dir == DMA_TO_DEVICE) {
2454 data_direction = UTP_HOST_TO_DEVICE;
2455 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2456 } else {
2457 data_direction = UTP_NO_DATA_TRANSFER;
2458 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2459 }
2460
2461 dword_0 = data_direction | (lrbp->command_type
2462 << UPIU_COMMAND_TYPE_OFFSET);
2463 if (lrbp->intr_cmd)
2464 dword_0 |= UTP_REQ_DESC_INT_CMD;
2465
Satya Tangiraladf043c742020-07-06 20:04:14 +00002466 /* Prepare crypto related dwords */
2467 ufshcd_prepare_req_desc_hdr_crypto(lrbp, &dword_0, &dword_1, &dword_3);
2468
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302469 /* Transfer request descriptor header fields */
2470 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Satya Tangiraladf043c742020-07-06 20:04:14 +00002471 req_desc->header.dword_1 = cpu_to_le32(dword_1);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302472 /*
2473 * assigning invalid value for command status. Controller
2474 * updates OCS on command completion, with the command
2475 * status
2476 */
2477 req_desc->header.dword_2 =
2478 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Satya Tangiraladf043c742020-07-06 20:04:14 +00002479 req_desc->header.dword_3 = cpu_to_le32(dword_3);
Yaniv Gardi51047262016-02-01 15:02:38 +02002480
2481 req_desc->prd_table_length = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302482}
2483
2484/**
2485 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2486 * for scsi commands
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002487 * @lrbp: local reference block pointer
2488 * @upiu_flags: flags
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302489 */
2490static
Bean Huoa23064c2020-07-06 14:39:36 +02002491void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u8 upiu_flags)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302492{
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002493 struct scsi_cmnd *cmd = lrbp->cmd;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302494 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002495 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302496
2497 /* command descriptor fields */
2498 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2499 UPIU_TRANSACTION_COMMAND, upiu_flags,
2500 lrbp->lun, lrbp->task_tag);
2501 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2502 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2503
2504 /* Total EHS length and Data segment length will be zero */
2505 ucd_req_ptr->header.dword_2 = 0;
2506
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002507 ucd_req_ptr->sc.exp_data_transfer_len = cpu_to_be32(cmd->sdb.length);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302508
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002509 cdb_len = min_t(unsigned short, cmd->cmd_len, UFS_CDB_SIZE);
Avri Altmana851b2b2018-10-07 17:30:34 +03002510 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002511 memcpy(ucd_req_ptr->sc.cdb, cmd->cmnd, cdb_len);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002512
2513 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302514}
2515
Dolev Raviv68078d52013-07-30 00:35:58 +05302516/**
2517 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2518 * for query requsts
2519 * @hba: UFS hba
2520 * @lrbp: local reference block pointer
2521 * @upiu_flags: flags
2522 */
2523static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
Bean Huoa23064c2020-07-06 14:39:36 +02002524 struct ufshcd_lrb *lrbp, u8 upiu_flags)
Dolev Raviv68078d52013-07-30 00:35:58 +05302525{
2526 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2527 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302528 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302529
2530 /* Query request header */
2531 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2532 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2533 lrbp->lun, lrbp->task_tag);
2534 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2535 0, query->request.query_func, 0, 0);
2536
Zang Leigang68612852016-08-25 17:39:19 +08002537 /* Data segment length only need for WRITE_DESC */
2538 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2539 ucd_req_ptr->header.dword_2 =
2540 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2541 else
2542 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302543
2544 /* Copy the Query Request buffer as is */
2545 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2546 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302547
2548 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002549 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
Avri Altman220d17a62018-10-07 17:30:36 +03002550 memcpy(ucd_req_ptr + 1, query->descriptor, len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002551
Yaniv Gardi51047262016-02-01 15:02:38 +02002552 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302553}
2554
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302555static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2556{
2557 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2558
2559 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2560
2561 /* command descriptor fields */
2562 ucd_req_ptr->header.dword_0 =
2563 UPIU_HEADER_DWORD(
2564 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002565 /* clear rest of the fields of basic header */
2566 ucd_req_ptr->header.dword_1 = 0;
2567 ucd_req_ptr->header.dword_2 = 0;
2568
2569 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302570}
2571
2572/**
Bean Huof273c542020-08-14 11:50:33 +02002573 * ufshcd_compose_devman_upiu - UFS Protocol Information Unit(UPIU)
Joao Pinto300bb132016-05-11 12:21:27 +01002574 * for Device Management Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002575 * @hba: per adapter instance
2576 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302577 */
Bean Huof273c542020-08-14 11:50:33 +02002578static int ufshcd_compose_devman_upiu(struct ufs_hba *hba,
2579 struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302580{
Bean Huoa23064c2020-07-06 14:39:36 +02002581 u8 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302582 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302583
Caleb Connolly51428812021-03-10 15:33:42 +00002584 if (hba->ufs_version <= ufshci_version(1, 1))
Joao Pinto300bb132016-05-11 12:21:27 +01002585 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
kehuanlin83dc7e32017-09-06 17:58:39 +08002586 else
2587 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002588
2589 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2590 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2591 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2592 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2593 ufshcd_prepare_utp_nop_upiu(lrbp);
2594 else
2595 ret = -EINVAL;
2596
2597 return ret;
2598}
2599
2600/**
2601 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2602 * for SCSI Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002603 * @hba: per adapter instance
2604 * @lrbp: pointer to local reference block
Joao Pinto300bb132016-05-11 12:21:27 +01002605 */
2606static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2607{
Bean Huoa23064c2020-07-06 14:39:36 +02002608 u8 upiu_flags;
Joao Pinto300bb132016-05-11 12:21:27 +01002609 int ret = 0;
2610
Caleb Connolly51428812021-03-10 15:33:42 +00002611 if (hba->ufs_version <= ufshci_version(1, 1))
Joao Pinto300bb132016-05-11 12:21:27 +01002612 lrbp->command_type = UTP_CMD_TYPE_SCSI;
kehuanlin83dc7e32017-09-06 17:58:39 +08002613 else
2614 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002615
2616 if (likely(lrbp->cmd)) {
2617 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2618 lrbp->cmd->sc_data_direction);
2619 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2620 } else {
2621 ret = -EINVAL;
2622 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302623
2624 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302625}
2626
2627/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002628 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002629 * @upiu_wlun_id: UPIU W-LUN id
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002630 *
2631 * Returns SCSI W-LUN id
2632 */
2633static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2634{
2635 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2636}
2637
Asutosh Dasb294ff32021-04-23 17:20:16 -07002638static inline bool is_rpmb_wlun(struct scsi_device *sdev)
2639{
2640 return sdev->lun == ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN);
2641}
2642
2643static inline bool is_device_wlun(struct scsi_device *sdev)
2644{
2645 return sdev->lun ==
2646 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN);
2647}
2648
Bart Van Assche4d2b8d42020-01-22 19:56:35 -08002649static void ufshcd_init_lrb(struct ufs_hba *hba, struct ufshcd_lrb *lrb, int i)
2650{
2651 struct utp_transfer_cmd_desc *cmd_descp = hba->ucdl_base_addr;
2652 struct utp_transfer_req_desc *utrdlp = hba->utrdl_base_addr;
2653 dma_addr_t cmd_desc_element_addr = hba->ucdl_dma_addr +
2654 i * sizeof(struct utp_transfer_cmd_desc);
2655 u16 response_offset = offsetof(struct utp_transfer_cmd_desc,
2656 response_upiu);
2657 u16 prdt_offset = offsetof(struct utp_transfer_cmd_desc, prd_table);
2658
2659 lrb->utr_descriptor_ptr = utrdlp + i;
2660 lrb->utrd_dma_addr = hba->utrdl_dma_addr +
2661 i * sizeof(struct utp_transfer_req_desc);
2662 lrb->ucd_req_ptr = (struct utp_upiu_req *)(cmd_descp + i);
2663 lrb->ucd_req_dma_addr = cmd_desc_element_addr;
2664 lrb->ucd_rsp_ptr = (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
2665 lrb->ucd_rsp_dma_addr = cmd_desc_element_addr + response_offset;
2666 lrb->ucd_prdt_ptr = (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
2667 lrb->ucd_prdt_dma_addr = cmd_desc_element_addr + prdt_offset;
2668}
2669
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002670/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302671 * ufshcd_queuecommand - main entry point for SCSI requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002672 * @host: SCSI host pointer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302673 * @cmd: command from SCSI Midlayer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302674 *
2675 * Returns 0 for success, non-zero in case of failure
2676 */
2677static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2678{
Bart Van Assche4728ab42021-07-21 20:34:27 -07002679 struct ufs_hba *hba = shost_priv(host);
Bart Van Assche3f2c1002021-08-09 16:03:50 -07002680 int tag = scsi_cmd_to_rq(cmd)->tag;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302681 struct ufshcd_lrb *lrbp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302682 int err = 0;
2683
Bart Van Assche4728ab42021-07-21 20:34:27 -07002684 WARN_ONCE(tag < 0, "Invalid tag %d\n", tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302685
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002686 if (!down_read_trylock(&hba->clk_scaling_lock))
2687 return SCSI_MLQUEUE_HOST_BUSY;
2688
Can Guoa45f9372021-05-24 01:36:57 -07002689 switch (hba->ufshcd_state) {
2690 case UFSHCD_STATE_OPERATIONAL:
2691 case UFSHCD_STATE_EH_SCHEDULED_NON_FATAL:
2692 break;
2693 case UFSHCD_STATE_EH_SCHEDULED_FATAL:
2694 /*
2695 * pm_runtime_get_sync() is used at error handling preparation
2696 * stage. If a scsi cmd, e.g. the SSU cmd, is sent from hba's
2697 * PM ops, it can never be finished if we let SCSI layer keep
2698 * retrying it, which gets err handler stuck forever. Neither
2699 * can we let the scsi cmd pass through, because UFS is in bad
2700 * state, the scsi cmd may eventually time out, which will get
2701 * err handler blocked for too long. So, just fail the scsi cmd
2702 * sent from PM ops, err handler can recover PM error anyways.
2703 */
2704 if (hba->pm_op_in_progress) {
2705 hba->force_reset = true;
2706 set_host_byte(cmd, DID_BAD_TARGET);
2707 cmd->scsi_done(cmd);
2708 goto out;
2709 }
2710 fallthrough;
2711 case UFSHCD_STATE_RESET:
2712 err = SCSI_MLQUEUE_HOST_BUSY;
2713 goto out;
2714 case UFSHCD_STATE_ERROR:
2715 set_host_byte(cmd, DID_ERROR);
2716 cmd->scsi_done(cmd);
2717 goto out;
Can Guoa45f9372021-05-24 01:36:57 -07002718 }
2719
Gilad Broner7fabb772017-02-03 16:56:50 -08002720 hba->req_abort_count = 0;
2721
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002722 err = ufshcd_hold(hba, true);
2723 if (err) {
2724 err = SCSI_MLQUEUE_HOST_BUSY;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002725 goto out;
2726 }
Can Guo2dec9472020-08-09 05:15:47 -07002727 WARN_ON(ufshcd_is_clkgating_allowed(hba) &&
2728 (hba->clk_gating.state != CLKS_ON));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002729
Can Guoa45f9372021-05-24 01:36:57 -07002730 lrbp = &hba->lrb[tag];
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302731 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302732 lrbp->cmd = cmd;
Avri Altman09a5a242018-11-22 20:04:56 +02002733 lrbp->sense_bufflen = UFS_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302734 lrbp->sense_buffer = cmd->sense_buffer;
2735 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002736 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002737 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Satya Tangiraladf043c742020-07-06 20:04:14 +00002738
Bart Van Assche3f2c1002021-08-09 16:03:50 -07002739 ufshcd_prepare_lrbp_crypto(scsi_cmd_to_rq(cmd), lrbp);
Satya Tangiraladf043c742020-07-06 20:04:14 +00002740
Gilad Bronere0b299e2017-02-03 16:56:40 -08002741 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302742
Daejun Park41d8a932021-07-12 18:00:25 +09002743 err = ufshpb_prep(hba, lrbp);
2744 if (err == -EAGAIN) {
2745 lrbp->cmd = NULL;
2746 ufshcd_release(hba);
2747 goto out;
2748 }
Daejun Park2fff76f2021-07-12 17:59:36 +09002749
Joao Pinto300bb132016-05-11 12:21:27 +01002750 ufshcd_comp_scsi_upiu(hba, lrbp);
2751
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002752 err = ufshcd_map_sg(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302753 if (err) {
2754 lrbp->cmd = NULL;
Can Guo17c7d352019-12-05 02:14:33 +00002755 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302756 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302757 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302758
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302759 ufshcd_send_command(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302760out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002761 up_read(&hba->clk_scaling_lock);
Bart Van Asschec11a1ae2021-07-21 20:34:39 -07002762
2763 if (ufs_trigger_eh())
2764 scsi_schedule_eh(hba->host);
2765
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302766 return err;
2767}
2768
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302769static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2770 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2771{
2772 lrbp->cmd = NULL;
2773 lrbp->sense_bufflen = 0;
2774 lrbp->sense_buffer = NULL;
2775 lrbp->task_tag = tag;
2776 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302777 lrbp->intr_cmd = true; /* No interrupt aggregation */
Satya Tangiraladf043c742020-07-06 20:04:14 +00002778 ufshcd_prepare_lrbp_crypto(NULL, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302779 hba->dev_cmd.type = cmd_type;
2780
Bean Huof273c542020-08-14 11:50:33 +02002781 return ufshcd_compose_devman_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302782}
2783
2784static int
2785ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2786{
2787 int err = 0;
2788 unsigned long flags;
2789 u32 mask = 1 << tag;
2790
2791 /* clear outstanding transaction before retry */
2792 spin_lock_irqsave(hba->host->host_lock, flags);
2793 ufshcd_utrl_clear(hba, tag);
2794 spin_unlock_irqrestore(hba->host->host_lock, flags);
2795
2796 /*
Keoseong Park32424902021-06-04 11:40:38 +09002797 * wait for h/w to clear corresponding bit in door-bell.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302798 * max. wait is 1 sec.
2799 */
2800 err = ufshcd_wait_for_register(hba,
2801 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Bart Van Assche5cac1092020-05-07 15:27:50 -07002802 mask, ~mask, 1000, 1000);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302803
2804 return err;
2805}
2806
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002807static int
2808ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2809{
2810 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2811
2812 /* Get the UPIU response */
2813 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2814 UPIU_RSP_CODE_OFFSET;
2815 return query_res->response;
2816}
2817
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302818/**
2819 * ufshcd_dev_cmd_completion() - handles device management command responses
2820 * @hba: per adapter instance
2821 * @lrbp: pointer to local reference block
2822 */
2823static int
2824ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2825{
2826 int resp;
2827 int err = 0;
2828
Dolev Ravivff8e20c2016-12-22 18:42:18 -08002829 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302830 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2831
2832 switch (resp) {
2833 case UPIU_TRANSACTION_NOP_IN:
2834 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2835 err = -EINVAL;
2836 dev_err(hba->dev, "%s: unexpected response %x\n",
2837 __func__, resp);
2838 }
2839 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302840 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002841 err = ufshcd_check_query_response(hba, lrbp);
2842 if (!err)
2843 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302844 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302845 case UPIU_TRANSACTION_REJECT_UPIU:
2846 /* TODO: handle Reject UPIU Response */
2847 err = -EPERM;
2848 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2849 __func__);
2850 break;
2851 default:
2852 err = -EINVAL;
2853 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2854 __func__, resp);
2855 break;
2856 }
2857
2858 return err;
2859}
2860
2861static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2862 struct ufshcd_lrb *lrbp, int max_timeout)
2863{
2864 int err = 0;
2865 unsigned long time_left;
2866 unsigned long flags;
2867
2868 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2869 msecs_to_jiffies(max_timeout));
2870
2871 spin_lock_irqsave(hba->host->host_lock, flags);
2872 hba->dev_cmd.complete = NULL;
2873 if (likely(time_left)) {
2874 err = ufshcd_get_tr_ocs(lrbp);
2875 if (!err)
2876 err = ufshcd_dev_cmd_completion(hba, lrbp);
2877 }
2878 spin_unlock_irqrestore(hba->host->host_lock, flags);
2879
2880 if (!time_left) {
2881 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002882 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2883 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302884 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002885 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302886 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002887 /*
2888 * in case of an error, after clearing the doorbell,
2889 * we also need to clear the outstanding_request
2890 * field in hba
2891 */
Bart Van Assche169f5eb2021-07-21 20:34:34 -07002892 spin_lock_irqsave(&hba->outstanding_lock, flags);
2893 __clear_bit(lrbp->task_tag, &hba->outstanding_reqs);
2894 spin_unlock_irqrestore(&hba->outstanding_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302895 }
2896
2897 return err;
2898}
2899
2900/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302901 * ufshcd_exec_dev_cmd - API for sending device management requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002902 * @hba: UFS hba
2903 * @cmd_type: specifies the type (NOP, Query...)
Bart Van Assched0b2b702021-05-13 09:49:12 -07002904 * @timeout: timeout in milliseconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302905 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302906 * NOTE: Since there is only one available tag for device management commands,
2907 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302908 */
2909static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2910 enum dev_cmd_type cmd_type, int timeout)
2911{
Bart Van Assche7252a362019-12-09 10:13:08 -08002912 struct request_queue *q = hba->cmd_queue;
Bart Van Assche8a686f22021-07-21 20:34:26 -07002913 DECLARE_COMPLETION_ONSTACK(wait);
Bart Van Assche7252a362019-12-09 10:13:08 -08002914 struct request *req;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302915 struct ufshcd_lrb *lrbp;
2916 int err;
2917 int tag;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302918
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002919 down_read(&hba->clk_scaling_lock);
2920
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302921 /*
2922 * Get free slot, sleep if slots are unavailable.
2923 * Even though we use wait_event() which sleeps indefinitely,
2924 * the maximum wait time is bounded by SCSI request timeout.
2925 */
Bart Van Assche7252a362019-12-09 10:13:08 -08002926 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03002927 if (IS_ERR(req)) {
2928 err = PTR_ERR(req);
2929 goto out_unlock;
2930 }
Bart Van Assche7252a362019-12-09 10:13:08 -08002931 tag = req->tag;
Bart Van Assche4728ab42021-07-21 20:34:27 -07002932 WARN_ONCE(tag < 0, "Invalid tag %d\n", tag);
Bart Van Assched0b2b702021-05-13 09:49:12 -07002933 /* Set the timeout such that the SCSI error handler is not activated. */
2934 req->timeout = msecs_to_jiffies(2 * timeout);
2935 blk_mq_start_request(req);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302936
Can Guoa45f9372021-05-24 01:36:57 -07002937 lrbp = &hba->lrb[tag];
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302938 WARN_ON(lrbp->cmd);
2939 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2940 if (unlikely(err))
Can Guoeb783bb2021-06-09 01:24:00 -07002941 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302942
2943 hba->dev_cmd.complete = &wait;
2944
Avri Altmanfb475b72021-01-10 10:46:18 +02002945 ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr);
Can Guoa45f9372021-05-24 01:36:57 -07002946
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302947 ufshcd_send_command(hba, tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302948 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
Avri Altmanfb475b72021-01-10 10:46:18 +02002949 ufshcd_add_query_upiu_trace(hba, err ? UFS_QUERY_ERR : UFS_QUERY_COMP,
2950 (struct utp_upiu_req *)lrbp->ucd_rsp_ptr);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002951
Can Guoeb783bb2021-06-09 01:24:00 -07002952out:
Bart Van Assche7252a362019-12-09 10:13:08 -08002953 blk_put_request(req);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03002954out_unlock:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002955 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302956 return err;
2957}
2958
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302959/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002960 * ufshcd_init_query() - init the query response and request parameters
2961 * @hba: per-adapter instance
2962 * @request: address of the request pointer to be initialized
2963 * @response: address of the response pointer to be initialized
2964 * @opcode: operation to perform
2965 * @idn: flag idn to access
2966 * @index: LU number to access
2967 * @selector: query/flag/descriptor further identification
2968 */
2969static inline void ufshcd_init_query(struct ufs_hba *hba,
2970 struct ufs_query_req **request, struct ufs_query_res **response,
2971 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2972{
2973 *request = &hba->dev_cmd.query.request;
2974 *response = &hba->dev_cmd.query.response;
2975 memset(*request, 0, sizeof(struct ufs_query_req));
2976 memset(*response, 0, sizeof(struct ufs_query_res));
2977 (*request)->upiu_req.opcode = opcode;
2978 (*request)->upiu_req.idn = idn;
2979 (*request)->upiu_req.index = index;
2980 (*request)->upiu_req.selector = selector;
2981}
2982
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002983static int ufshcd_query_flag_retry(struct ufs_hba *hba,
Stanley Chu1f34eed2020-05-08 16:01:12 +08002984 enum query_opcode opcode, enum flag_idn idn, u8 index, bool *flag_res)
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002985{
2986 int ret;
2987 int retries;
2988
2989 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
Stanley Chu1f34eed2020-05-08 16:01:12 +08002990 ret = ufshcd_query_flag(hba, opcode, idn, index, flag_res);
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002991 if (ret)
2992 dev_dbg(hba->dev,
2993 "%s: failed with error %d, retries %d\n",
2994 __func__, ret, retries);
2995 else
2996 break;
2997 }
2998
2999 if (ret)
3000 dev_err(hba->dev,
3001 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
3002 __func__, opcode, idn, ret, retries);
3003 return ret;
3004}
3005
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003006/**
Dolev Raviv68078d52013-07-30 00:35:58 +05303007 * ufshcd_query_flag() - API function for sending flag query requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08003008 * @hba: per-adapter instance
3009 * @opcode: flag query to perform
3010 * @idn: flag idn to access
Stanley Chu1f34eed2020-05-08 16:01:12 +08003011 * @index: flag index to access
Bart Van Assche8aa29f12018-03-01 15:07:20 -08003012 * @flag_res: the flag value after the query request completes
Dolev Raviv68078d52013-07-30 00:35:58 +05303013 *
3014 * Returns 0 for success, non-zero in case of failure
3015 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02003016int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Stanley Chu1f34eed2020-05-08 16:01:12 +08003017 enum flag_idn idn, u8 index, bool *flag_res)
Dolev Raviv68078d52013-07-30 00:35:58 +05303018{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003019 struct ufs_query_req *request = NULL;
3020 struct ufs_query_res *response = NULL;
Stanley Chu1f34eed2020-05-08 16:01:12 +08003021 int err, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02003022 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05303023
3024 BUG_ON(!hba);
3025
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003026 ufshcd_hold(hba, false);
Dolev Raviv68078d52013-07-30 00:35:58 +05303027 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003028 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3029 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05303030
3031 switch (opcode) {
3032 case UPIU_QUERY_OPCODE_SET_FLAG:
3033 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
3034 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
3035 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3036 break;
3037 case UPIU_QUERY_OPCODE_READ_FLAG:
3038 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3039 if (!flag_res) {
3040 /* No dummy reads */
3041 dev_err(hba->dev, "%s: Invalid argument for read request\n",
3042 __func__);
3043 err = -EINVAL;
3044 goto out_unlock;
3045 }
3046 break;
3047 default:
3048 dev_err(hba->dev,
3049 "%s: Expected query flag opcode but got = %d\n",
3050 __func__, opcode);
3051 err = -EINVAL;
3052 goto out_unlock;
3053 }
Dolev Raviv68078d52013-07-30 00:35:58 +05303054
Yaniv Gardie5ad4062016-02-01 15:02:41 +02003055 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05303056
3057 if (err) {
3058 dev_err(hba->dev,
3059 "%s: Sending flag query for idn %d failed, err = %d\n",
3060 __func__, idn, err);
3061 goto out_unlock;
3062 }
3063
3064 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303065 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05303066 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
3067
3068out_unlock:
3069 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003070 ufshcd_release(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05303071 return err;
3072}
3073
3074/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303075 * ufshcd_query_attr - API function for sending attribute requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08003076 * @hba: per-adapter instance
3077 * @opcode: attribute opcode
3078 * @idn: attribute idn to access
3079 * @index: index field
3080 * @selector: selector field
3081 * @attr_val: the attribute value after the query request completes
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303082 *
3083 * Returns 0 for success, non-zero in case of failure
3084*/
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02003085int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
3086 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303087{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003088 struct ufs_query_req *request = NULL;
3089 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303090 int err;
3091
3092 BUG_ON(!hba);
3093
3094 if (!attr_val) {
3095 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
3096 __func__, opcode);
jintae jang8ca1a402020-12-03 14:25:32 +09003097 return -EINVAL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303098 }
3099
jintae jang8ca1a402020-12-03 14:25:32 +09003100 ufshcd_hold(hba, false);
3101
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303102 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003103 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3104 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303105
3106 switch (opcode) {
3107 case UPIU_QUERY_OPCODE_WRITE_ATTR:
3108 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303109 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303110 break;
3111 case UPIU_QUERY_OPCODE_READ_ATTR:
3112 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3113 break;
3114 default:
3115 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
3116 __func__, opcode);
3117 err = -EINVAL;
3118 goto out_unlock;
3119 }
3120
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003121 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303122
3123 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08003124 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3125 __func__, opcode, idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303126 goto out_unlock;
3127 }
3128
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303129 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303130
3131out_unlock:
3132 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003133 ufshcd_release(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303134 return err;
3135}
3136
3137/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02003138 * ufshcd_query_attr_retry() - API function for sending query
3139 * attribute with retries
3140 * @hba: per-adapter instance
3141 * @opcode: attribute opcode
3142 * @idn: attribute idn to access
3143 * @index: index field
3144 * @selector: selector field
3145 * @attr_val: the attribute value after the query request
3146 * completes
3147 *
3148 * Returns 0 for success, non-zero in case of failure
3149*/
Daejun Park41d8a932021-07-12 18:00:25 +09003150int ufshcd_query_attr_retry(struct ufs_hba *hba,
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02003151 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
3152 u32 *attr_val)
3153{
3154 int ret = 0;
3155 u32 retries;
3156
Bart Van Assche68c9fcf2019-12-24 14:02:43 -08003157 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02003158 ret = ufshcd_query_attr(hba, opcode, idn, index,
3159 selector, attr_val);
3160 if (ret)
3161 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
3162 __func__, ret, retries);
3163 else
3164 break;
3165 }
3166
3167 if (ret)
3168 dev_err(hba->dev,
3169 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
3170 __func__, idn, ret, QUERY_REQ_RETRIES);
3171 return ret;
3172}
3173
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003174static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003175 enum query_opcode opcode, enum desc_idn idn, u8 index,
3176 u8 selector, u8 *desc_buf, int *buf_len)
3177{
3178 struct ufs_query_req *request = NULL;
3179 struct ufs_query_res *response = NULL;
3180 int err;
3181
3182 BUG_ON(!hba);
3183
3184 if (!desc_buf) {
3185 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
3186 __func__, opcode);
jintae jang8ca1a402020-12-03 14:25:32 +09003187 return -EINVAL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003188 }
3189
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003190 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003191 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
3192 __func__, *buf_len);
jintae jang8ca1a402020-12-03 14:25:32 +09003193 return -EINVAL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003194 }
3195
jintae jang8ca1a402020-12-03 14:25:32 +09003196 ufshcd_hold(hba, false);
3197
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003198 mutex_lock(&hba->dev_cmd.lock);
3199 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3200 selector);
3201 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03003202 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003203
3204 switch (opcode) {
3205 case UPIU_QUERY_OPCODE_WRITE_DESC:
3206 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3207 break;
3208 case UPIU_QUERY_OPCODE_READ_DESC:
3209 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3210 break;
3211 default:
3212 dev_err(hba->dev,
3213 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
3214 __func__, opcode);
3215 err = -EINVAL;
3216 goto out_unlock;
3217 }
3218
3219 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3220
3221 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08003222 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3223 __func__, opcode, idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003224 goto out_unlock;
3225 }
3226
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03003227 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003228
3229out_unlock:
Bean Huocfcbae32019-11-12 23:34:36 +01003230 hba->dev_cmd.query.descriptor = NULL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003231 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003232 ufshcd_release(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003233 return err;
3234}
3235
3236/**
Bart Van Assche8aa29f12018-03-01 15:07:20 -08003237 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
3238 * @hba: per-adapter instance
3239 * @opcode: attribute opcode
3240 * @idn: attribute idn to access
3241 * @index: index field
3242 * @selector: selector field
3243 * @desc_buf: the buffer that contains the descriptor
3244 * @buf_len: length parameter passed to the device
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003245 *
3246 * Returns 0 for success, non-zero in case of failure.
3247 * The buf_len parameter will contain, on return, the length parameter
3248 * received on the response.
3249 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02003250int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3251 enum query_opcode opcode,
3252 enum desc_idn idn, u8 index,
3253 u8 selector,
3254 u8 *desc_buf, int *buf_len)
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003255{
3256 int err;
3257 int retries;
3258
3259 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3260 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3261 selector, desc_buf, buf_len);
3262 if (!err || err == -EINVAL)
3263 break;
3264 }
3265
3266 return err;
3267}
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003268
3269/**
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003270 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3271 * @hba: Pointer to adapter instance
3272 * @desc_id: descriptor idn value
3273 * @desc_len: mapped desc length (out)
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003274 */
Bean Huo7a0bf852020-06-03 11:19:58 +02003275void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
3276 int *desc_len)
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003277{
Bean Huo7a0bf852020-06-03 11:19:58 +02003278 if (desc_id >= QUERY_DESC_IDN_MAX || desc_id == QUERY_DESC_IDN_RFU_0 ||
3279 desc_id == QUERY_DESC_IDN_RFU_1)
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003280 *desc_len = 0;
Bean Huo7a0bf852020-06-03 11:19:58 +02003281 else
3282 *desc_len = hba->desc_size[desc_id];
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003283}
3284EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3285
Bean Huo7a0bf852020-06-03 11:19:58 +02003286static void ufshcd_update_desc_length(struct ufs_hba *hba,
Bean Huo72fb6902020-06-03 11:19:59 +02003287 enum desc_idn desc_id, int desc_index,
Bean Huo7a0bf852020-06-03 11:19:58 +02003288 unsigned char desc_len)
3289{
3290 if (hba->desc_size[desc_id] == QUERY_DESC_MAX_SIZE &&
Bean Huo72fb6902020-06-03 11:19:59 +02003291 desc_id != QUERY_DESC_IDN_STRING && desc_index != UFS_RPMB_UNIT)
3292 /* For UFS 3.1, the normal unit descriptor is 10 bytes larger
3293 * than the RPMB unit, however, both descriptors share the same
3294 * desc_idn, to cover both unit descriptors with one length, we
3295 * choose the normal unit descriptor length by desc_index.
3296 */
Bean Huo7a0bf852020-06-03 11:19:58 +02003297 hba->desc_size[desc_id] = desc_len;
3298}
3299
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003300/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003301 * ufshcd_read_desc_param - read the specified descriptor parameter
3302 * @hba: Pointer to adapter instance
3303 * @desc_id: descriptor idn value
3304 * @desc_index: descriptor index
3305 * @param_offset: offset of the parameter to read
3306 * @param_read_buf: pointer to buffer where parameter would be read
3307 * @param_size: sizeof(param_read_buf)
3308 *
3309 * Return 0 in case of success, non-zero otherwise
3310 */
Stanislav Nijnikov45bced82018-02-15 14:14:02 +02003311int ufshcd_read_desc_param(struct ufs_hba *hba,
3312 enum desc_idn desc_id,
3313 int desc_index,
3314 u8 param_offset,
3315 u8 *param_read_buf,
3316 u8 param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003317{
3318 int ret;
3319 u8 *desc_buf;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003320 int buff_len;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003321 bool is_kmalloc = true;
3322
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003323 /* Safety check */
3324 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003325 return -EINVAL;
3326
Bean Huo7a0bf852020-06-03 11:19:58 +02003327 /* Get the length of descriptor */
3328 ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
3329 if (!buff_len) {
Can Guo1699f982020-10-21 22:59:00 -07003330 dev_err(hba->dev, "%s: Failed to get desc length\n", __func__);
3331 return -EINVAL;
3332 }
3333
3334 if (param_offset >= buff_len) {
3335 dev_err(hba->dev, "%s: Invalid offset 0x%x in descriptor IDN 0x%x, length 0x%x\n",
3336 __func__, param_offset, desc_id, buff_len);
Bean Huo7a0bf852020-06-03 11:19:58 +02003337 return -EINVAL;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003338 }
3339
3340 /* Check whether we need temp memory */
3341 if (param_offset != 0 || param_size < buff_len) {
Can Guo1699f982020-10-21 22:59:00 -07003342 desc_buf = kzalloc(buff_len, GFP_KERNEL);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003343 if (!desc_buf)
3344 return -ENOMEM;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003345 } else {
3346 desc_buf = param_read_buf;
3347 is_kmalloc = false;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003348 }
3349
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003350 /* Request for full descriptor */
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003351 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003352 desc_id, desc_index, 0,
3353 desc_buf, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003354
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003355 if (ret) {
Can Guo1699f982020-10-21 22:59:00 -07003356 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d\n",
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003357 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003358 goto out;
3359 }
3360
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003361 /* Sanity check */
3362 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
Can Guo1699f982020-10-21 22:59:00 -07003363 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header\n",
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003364 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3365 ret = -EINVAL;
3366 goto out;
3367 }
3368
Bean Huo7a0bf852020-06-03 11:19:58 +02003369 /* Update descriptor length */
3370 buff_len = desc_buf[QUERY_DESC_LENGTH_OFFSET];
Bean Huo72fb6902020-06-03 11:19:59 +02003371 ufshcd_update_desc_length(hba, desc_id, desc_index, buff_len);
Bean Huo7a0bf852020-06-03 11:19:58 +02003372
Can Guo1699f982020-10-21 22:59:00 -07003373 if (is_kmalloc) {
3374 /* Make sure we don't copy more data than available */
Bart Van Assched3d9c452021-07-21 20:34:22 -07003375 if (param_offset >= buff_len)
3376 ret = -EINVAL;
3377 else
3378 memcpy(param_read_buf, &desc_buf[param_offset],
3379 min_t(u32, param_size, buff_len - param_offset));
Can Guo1699f982020-10-21 22:59:00 -07003380 }
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003381out:
3382 if (is_kmalloc)
3383 kfree(desc_buf);
3384 return ret;
3385}
3386
Yaniv Gardib573d482016-03-10 17:37:09 +02003387/**
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003388 * struct uc_string_id - unicode string
3389 *
3390 * @len: size of this descriptor inclusive
3391 * @type: descriptor type
3392 * @uc: unicode string character
3393 */
3394struct uc_string_id {
3395 u8 len;
3396 u8 type;
Gustavo A. R. Silvaec38c0a2020-05-07 14:25:50 -05003397 wchar_t uc[];
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003398} __packed;
3399
3400/* replace non-printable or non-ASCII characters with spaces */
3401static inline char ufshcd_remove_non_printable(u8 ch)
3402{
3403 return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3404}
3405
3406/**
Yaniv Gardib573d482016-03-10 17:37:09 +02003407 * ufshcd_read_string_desc - read string descriptor
3408 * @hba: pointer to adapter instance
3409 * @desc_index: descriptor index
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003410 * @buf: pointer to buffer where descriptor would be read,
3411 * the caller should free the memory.
Yaniv Gardib573d482016-03-10 17:37:09 +02003412 * @ascii: if true convert from unicode to ascii characters
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003413 * null terminated string.
Yaniv Gardib573d482016-03-10 17:37:09 +02003414 *
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003415 * Return:
3416 * * string size on success.
3417 * * -ENOMEM: on allocation failure
3418 * * -EINVAL: on a wrong parameter
Yaniv Gardib573d482016-03-10 17:37:09 +02003419 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003420int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3421 u8 **buf, bool ascii)
Yaniv Gardib573d482016-03-10 17:37:09 +02003422{
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003423 struct uc_string_id *uc_str;
3424 u8 *str;
3425 int ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003426
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003427 if (!buf)
3428 return -EINVAL;
Yaniv Gardib573d482016-03-10 17:37:09 +02003429
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003430 uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3431 if (!uc_str)
3432 return -ENOMEM;
3433
Bean Huoc4607a02020-06-03 11:19:56 +02003434 ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_STRING, desc_index, 0,
3435 (u8 *)uc_str, QUERY_DESC_MAX_SIZE);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003436 if (ret < 0) {
3437 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3438 QUERY_REQ_RETRIES, ret);
3439 str = NULL;
3440 goto out;
3441 }
3442
3443 if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3444 dev_dbg(hba->dev, "String Desc is of zero length\n");
3445 str = NULL;
3446 ret = 0;
Yaniv Gardib573d482016-03-10 17:37:09 +02003447 goto out;
3448 }
3449
3450 if (ascii) {
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003451 ssize_t ascii_len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003452 int i;
Yaniv Gardib573d482016-03-10 17:37:09 +02003453 /* remove header and divide by 2 to move from UTF16 to UTF8 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003454 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3455 str = kzalloc(ascii_len, GFP_KERNEL);
3456 if (!str) {
3457 ret = -ENOMEM;
Tiezhu Yangfcbefc32016-06-25 12:35:22 +08003458 goto out;
Yaniv Gardib573d482016-03-10 17:37:09 +02003459 }
3460
3461 /*
3462 * the descriptor contains string in UTF16 format
3463 * we need to convert to utf-8 so it can be displayed
3464 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003465 ret = utf16s_to_utf8s(uc_str->uc,
3466 uc_str->len - QUERY_DESC_HDR_SIZE,
3467 UTF16_BIG_ENDIAN, str, ascii_len);
Yaniv Gardib573d482016-03-10 17:37:09 +02003468
3469 /* replace non-printable or non-ASCII characters with spaces */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003470 for (i = 0; i < ret; i++)
3471 str[i] = ufshcd_remove_non_printable(str[i]);
Yaniv Gardib573d482016-03-10 17:37:09 +02003472
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003473 str[ret++] = '\0';
3474
3475 } else {
YueHaibing5f577042019-08-31 12:44:24 +00003476 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003477 if (!str) {
3478 ret = -ENOMEM;
3479 goto out;
3480 }
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003481 ret = uc_str->len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003482 }
3483out:
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003484 *buf = str;
3485 kfree(uc_str);
3486 return ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003487}
Yaniv Gardib573d482016-03-10 17:37:09 +02003488
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003489/**
3490 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3491 * @hba: Pointer to adapter instance
3492 * @lun: lun id
3493 * @param_offset: offset of the parameter to read
3494 * @param_read_buf: pointer to buffer where parameter would be read
3495 * @param_size: sizeof(param_read_buf)
3496 *
3497 * Return 0 in case of success, non-zero otherwise
3498 */
3499static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3500 int lun,
3501 enum unit_desc_param param_offset,
3502 u8 *param_read_buf,
3503 u32 param_size)
3504{
3505 /*
3506 * Unit descriptors are only available for general purpose LUs (LUN id
3507 * from 0 to 7) and RPMB Well known LU.
3508 */
Jaegeuk Kima2fca522021-01-11 01:59:27 -08003509 if (!ufs_is_valid_unit_desc_lun(&hba->dev_info, lun, param_offset))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003510 return -EOPNOTSUPP;
3511
3512 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3513 param_offset, param_read_buf, param_size);
3514}
3515
Can Guo09f17792020-02-10 19:40:49 -08003516static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
3517{
3518 int err = 0;
3519 u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3520
3521 if (hba->dev_info.wspecversion >= 0x300) {
3522 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
3523 QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
3524 &gating_wait);
3525 if (err)
3526 dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",
3527 err, gating_wait);
3528
3529 if (gating_wait == 0) {
3530 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3531 dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",
3532 gating_wait);
3533 }
3534
3535 hba->dev_info.clk_gating_wait_us = gating_wait;
3536 }
3537
3538 return err;
3539}
3540
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003541/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303542 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3543 * @hba: per adapter instance
3544 *
3545 * 1. Allocate DMA memory for Command Descriptor array
3546 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3547 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3548 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3549 * (UTMRDL)
3550 * 4. Allocate memory for local reference block(lrb).
3551 *
3552 * Returns 0 for success, non-zero in case of failure
3553 */
3554static int ufshcd_memory_alloc(struct ufs_hba *hba)
3555{
3556 size_t utmrdl_size, utrdl_size, ucdl_size;
3557
3558 /* Allocate memory for UTP command descriptors */
3559 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003560 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3561 ucdl_size,
3562 &hba->ucdl_dma_addr,
3563 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303564
3565 /*
3566 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3567 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3568 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3569 * be aligned to 128 bytes as well
3570 */
3571 if (!hba->ucdl_base_addr ||
3572 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303573 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303574 "Command Descriptor Memory allocation failed\n");
3575 goto out;
3576 }
3577
3578 /*
3579 * Allocate memory for UTP Transfer descriptors
3580 * UFSHCI requires 1024 byte alignment of UTRD
3581 */
3582 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003583 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3584 utrdl_size,
3585 &hba->utrdl_dma_addr,
3586 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303587 if (!hba->utrdl_base_addr ||
3588 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303589 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303590 "Transfer Descriptor Memory allocation failed\n");
3591 goto out;
3592 }
3593
3594 /*
3595 * Allocate memory for UTP Task Management descriptors
3596 * UFSHCI requires 1024 byte alignment of UTMRD
3597 */
3598 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003599 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3600 utmrdl_size,
3601 &hba->utmrdl_dma_addr,
3602 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303603 if (!hba->utmrdl_base_addr ||
3604 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303605 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303606 "Task Management Descriptor Memory allocation failed\n");
3607 goto out;
3608 }
3609
3610 /* Allocate memory for local reference block */
Kees Cooka86854d2018-06-12 14:07:58 -07003611 hba->lrb = devm_kcalloc(hba->dev,
3612 hba->nutrs, sizeof(struct ufshcd_lrb),
Seungwon Jeon2953f852013-06-27 13:31:54 +09003613 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303614 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303615 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303616 goto out;
3617 }
3618 return 0;
3619out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303620 return -ENOMEM;
3621}
3622
3623/**
3624 * ufshcd_host_memory_configure - configure local reference block with
3625 * memory offsets
3626 * @hba: per adapter instance
3627 *
3628 * Configure Host memory space
3629 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3630 * address.
3631 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3632 * and PRDT offset.
3633 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3634 * into local reference block.
3635 */
3636static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3637{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303638 struct utp_transfer_req_desc *utrdlp;
3639 dma_addr_t cmd_desc_dma_addr;
3640 dma_addr_t cmd_desc_element_addr;
3641 u16 response_offset;
3642 u16 prdt_offset;
3643 int cmd_desc_size;
3644 int i;
3645
3646 utrdlp = hba->utrdl_base_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303647
3648 response_offset =
3649 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3650 prdt_offset =
3651 offsetof(struct utp_transfer_cmd_desc, prd_table);
3652
3653 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3654 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3655
3656 for (i = 0; i < hba->nutrs; i++) {
3657 /* Configure UTRD with command descriptor base address */
3658 cmd_desc_element_addr =
3659 (cmd_desc_dma_addr + (cmd_desc_size * i));
3660 utrdlp[i].command_desc_base_addr_lo =
3661 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3662 utrdlp[i].command_desc_base_addr_hi =
3663 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3664
3665 /* Response upiu and prdt offset should be in double words */
Alim Akhtar26f968d2020-05-28 06:46:52 +05303666 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3667 utrdlp[i].response_upiu_offset =
3668 cpu_to_le16(response_offset);
3669 utrdlp[i].prd_table_offset =
3670 cpu_to_le16(prdt_offset);
3671 utrdlp[i].response_upiu_length =
3672 cpu_to_le16(ALIGNED_UPIU_SIZE);
3673 } else {
3674 utrdlp[i].response_upiu_offset =
3675 cpu_to_le16(response_offset >> 2);
3676 utrdlp[i].prd_table_offset =
3677 cpu_to_le16(prdt_offset >> 2);
3678 utrdlp[i].response_upiu_length =
3679 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
3680 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303681
Bart Van Assche4d2b8d42020-01-22 19:56:35 -08003682 ufshcd_init_lrb(hba, &hba->lrb[i], i);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303683 }
3684}
3685
3686/**
3687 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3688 * @hba: per adapter instance
3689 *
3690 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3691 * in order to initialize the Unipro link startup procedure.
3692 * Once the Unipro links are up, the device connected to the controller
3693 * is detected.
3694 *
3695 * Returns 0 on success, non-zero value on failure
3696 */
3697static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3698{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303699 struct uic_command uic_cmd = {0};
3700 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303701
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303702 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3703
3704 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3705 if (ret)
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003706 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303707 "dme-link-startup: error code %d\n", ret);
3708 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303709}
Alim Akhtar39bf2d82020-05-28 06:46:51 +05303710/**
3711 * ufshcd_dme_reset - UIC command for DME_RESET
3712 * @hba: per adapter instance
3713 *
3714 * DME_RESET command is issued in order to reset UniPro stack.
3715 * This function now deals with cold reset.
3716 *
3717 * Returns 0 on success, non-zero value on failure
3718 */
3719static int ufshcd_dme_reset(struct ufs_hba *hba)
3720{
3721 struct uic_command uic_cmd = {0};
3722 int ret;
3723
3724 uic_cmd.command = UIC_CMD_DME_RESET;
3725
3726 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3727 if (ret)
3728 dev_err(hba->dev,
3729 "dme-reset: error code %d\n", ret);
3730
3731 return ret;
3732}
3733
Stanley Chufc85a742020-11-16 14:50:52 +08003734int ufshcd_dme_configure_adapt(struct ufs_hba *hba,
3735 int agreed_gear,
3736 int adapt_val)
3737{
3738 int ret;
3739
3740 if (agreed_gear != UFS_HS_G4)
Bjorn Andersson66df79c2020-11-20 20:48:10 -08003741 adapt_val = PA_NO_ADAPT;
Stanley Chufc85a742020-11-16 14:50:52 +08003742
3743 ret = ufshcd_dme_set(hba,
3744 UIC_ARG_MIB(PA_TXHSADAPTTYPE),
3745 adapt_val);
3746 return ret;
3747}
3748EXPORT_SYMBOL_GPL(ufshcd_dme_configure_adapt);
3749
Alim Akhtar39bf2d82020-05-28 06:46:51 +05303750/**
3751 * ufshcd_dme_enable - UIC command for DME_ENABLE
3752 * @hba: per adapter instance
3753 *
3754 * DME_ENABLE command is issued in order to enable UniPro stack.
3755 *
3756 * Returns 0 on success, non-zero value on failure
3757 */
3758static int ufshcd_dme_enable(struct ufs_hba *hba)
3759{
3760 struct uic_command uic_cmd = {0};
3761 int ret;
3762
3763 uic_cmd.command = UIC_CMD_DME_ENABLE;
3764
3765 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3766 if (ret)
3767 dev_err(hba->dev,
Bean Huo1fa05702020-12-07 20:01:37 +01003768 "dme-enable: error code %d\n", ret);
Alim Akhtar39bf2d82020-05-28 06:46:51 +05303769
3770 return ret;
3771}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303772
Yaniv Gardicad2e032015-03-31 17:37:14 +03003773static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3774{
3775 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3776 unsigned long min_sleep_time_us;
3777
3778 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3779 return;
3780
3781 /*
3782 * last_dme_cmd_tstamp will be 0 only for 1st call to
3783 * this function
3784 */
3785 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3786 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3787 } else {
3788 unsigned long delta =
3789 (unsigned long) ktime_to_us(
3790 ktime_sub(ktime_get(),
3791 hba->last_dme_cmd_tstamp));
3792
3793 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3794 min_sleep_time_us =
3795 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3796 else
3797 return; /* no more delay required */
3798 }
3799
3800 /* allow sleep for extra 50us if needed */
3801 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3802}
3803
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303804/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303805 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3806 * @hba: per adapter instance
3807 * @attr_sel: uic command argument1
3808 * @attr_set: attribute set type as uic command argument2
3809 * @mib_val: setting value as uic command argument3
3810 * @peer: indicate whether peer or local
3811 *
3812 * Returns 0 on success, non-zero value on failure
3813 */
3814int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3815 u8 attr_set, u32 mib_val, u8 peer)
3816{
3817 struct uic_command uic_cmd = {0};
3818 static const char *const action[] = {
3819 "dme-set",
3820 "dme-peer-set"
3821 };
3822 const char *set = action[!!peer];
3823 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003824 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303825
3826 uic_cmd.command = peer ?
3827 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3828 uic_cmd.argument1 = attr_sel;
3829 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3830 uic_cmd.argument3 = mib_val;
3831
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003832 do {
3833 /* for peer attributes we retry upon failure */
3834 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3835 if (ret)
3836 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3837 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3838 } while (ret && peer && --retries);
3839
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003840 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003841 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003842 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3843 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303844
3845 return ret;
3846}
3847EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3848
3849/**
3850 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3851 * @hba: per adapter instance
3852 * @attr_sel: uic command argument1
3853 * @mib_val: the value of the attribute as returned by the UIC command
3854 * @peer: indicate whether peer or local
3855 *
3856 * Returns 0 on success, non-zero value on failure
3857 */
3858int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3859 u32 *mib_val, u8 peer)
3860{
3861 struct uic_command uic_cmd = {0};
3862 static const char *const action[] = {
3863 "dme-get",
3864 "dme-peer-get"
3865 };
3866 const char *get = action[!!peer];
3867 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003868 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003869 struct ufs_pa_layer_attr orig_pwr_info;
3870 struct ufs_pa_layer_attr temp_pwr_info;
3871 bool pwr_mode_change = false;
3872
3873 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3874 orig_pwr_info = hba->pwr_info;
3875 temp_pwr_info = orig_pwr_info;
3876
3877 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3878 orig_pwr_info.pwr_rx == FAST_MODE) {
3879 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3880 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3881 pwr_mode_change = true;
3882 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3883 orig_pwr_info.pwr_rx == SLOW_MODE) {
3884 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3885 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3886 pwr_mode_change = true;
3887 }
3888 if (pwr_mode_change) {
3889 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3890 if (ret)
3891 goto out;
3892 }
3893 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303894
3895 uic_cmd.command = peer ?
3896 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3897 uic_cmd.argument1 = attr_sel;
3898
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003899 do {
3900 /* for peer attributes we retry upon failure */
3901 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3902 if (ret)
3903 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3904 get, UIC_GET_ATTR_ID(attr_sel), ret);
3905 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303906
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003907 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003908 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003909 get, UIC_GET_ATTR_ID(attr_sel),
3910 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003911
3912 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303913 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003914
3915 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3916 && pwr_mode_change)
3917 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303918out:
3919 return ret;
3920}
3921EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3922
Bart Van Asschea113eaa2021-07-21 20:34:37 -07003923static inline bool ufshcd_is_saved_err_fatal(struct ufs_hba *hba)
3924{
3925 lockdep_assert_held(hba->host->host_lock);
3926
3927 return (hba->saved_uic_err & UFSHCD_UIC_DL_PA_INIT_ERROR) ||
3928 (hba->saved_err & (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK));
3929}
3930
3931static void ufshcd_schedule_eh(struct ufs_hba *hba)
3932{
3933 bool schedule_eh = false;
3934 unsigned long flags;
3935
3936 spin_lock_irqsave(hba->host->host_lock, flags);
3937 /* handle fatal errors only when link is not in error state */
3938 if (hba->ufshcd_state != UFSHCD_STATE_ERROR) {
3939 if (hba->force_reset || ufshcd_is_link_broken(hba) ||
3940 ufshcd_is_saved_err_fatal(hba))
3941 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED_FATAL;
3942 else
3943 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED_NON_FATAL;
3944 schedule_eh = true;
3945 }
3946 spin_unlock_irqrestore(hba->host->host_lock, flags);
3947
3948 if (schedule_eh)
3949 scsi_schedule_eh(hba->host);
3950}
3951
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303952/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003953 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3954 * state) and waits for it to take effect.
3955 *
3956 * @hba: per adapter instance
3957 * @cmd: UIC command to execute
3958 *
3959 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3960 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3961 * and device UniPro link and hence it's final completion would be indicated by
3962 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3963 * addition to normal UIC command completion Status (UCCS). This function only
3964 * returns after the relevant status bits indicate the completion.
3965 *
3966 * Returns 0 on success, non-zero value on failure
3967 */
3968static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3969{
Bart Van Assche8a686f22021-07-21 20:34:26 -07003970 DECLARE_COMPLETION_ONSTACK(uic_async_done);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003971 unsigned long flags;
Bart Van Asschea113eaa2021-07-21 20:34:37 -07003972 bool schedule_eh = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003973 u8 status;
3974 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003975 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003976
3977 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003978 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003979
3980 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo4db7a232020-08-09 05:15:51 -07003981 if (ufshcd_is_link_broken(hba)) {
3982 ret = -ENOLINK;
3983 goto out_unlock;
3984 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003985 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003986 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3987 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3988 /*
3989 * Make sure UIC command completion interrupt is disabled before
3990 * issuing UIC command.
3991 */
3992 wmb();
3993 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003994 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003995 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3996 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003997 if (ret) {
3998 dev_err(hba->dev,
3999 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
4000 cmd->command, cmd->argument3, ret);
4001 goto out;
4002 }
4003
4004 if (!wait_for_completion_timeout(hba->uic_async_done,
4005 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
4006 dev_err(hba->dev,
4007 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
4008 cmd->command, cmd->argument3);
Can Guo0f52fcb92020-11-02 22:24:40 -08004009
4010 if (!cmd->cmd_active) {
4011 dev_err(hba->dev, "%s: Power Mode Change operation has been completed, go check UPMCRS\n",
4012 __func__);
4013 goto check_upmcrs;
4014 }
4015
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004016 ret = -ETIMEDOUT;
4017 goto out;
4018 }
4019
Can Guo0f52fcb92020-11-02 22:24:40 -08004020check_upmcrs:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004021 status = ufshcd_get_upmcrs(hba);
4022 if (status != PWR_LOCAL) {
4023 dev_err(hba->dev,
Zang Leigang479da362017-09-19 16:50:30 +08004024 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004025 cmd->command, status);
4026 ret = (status != PWR_OK) ? status : -1;
4027 }
4028out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004029 if (ret) {
4030 ufshcd_print_host_state(hba);
4031 ufshcd_print_pwr_info(hba);
Stanley Chue965e5e2020-12-05 19:58:59 +08004032 ufshcd_print_evt_hist(hba);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004033 }
4034
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004035 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02004036 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004037 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02004038 if (reenable_intr)
4039 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Can Guo4db7a232020-08-09 05:15:51 -07004040 if (ret) {
4041 ufshcd_set_link_broken(hba);
Bart Van Asschea113eaa2021-07-21 20:34:37 -07004042 schedule_eh = true;
Can Guo4db7a232020-08-09 05:15:51 -07004043 }
Bart Van Asschea113eaa2021-07-21 20:34:37 -07004044
Can Guo4db7a232020-08-09 05:15:51 -07004045out_unlock:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004046 spin_unlock_irqrestore(hba->host->host_lock, flags);
Bart Van Asschea113eaa2021-07-21 20:34:37 -07004047
4048 if (schedule_eh)
4049 ufshcd_schedule_eh(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004050 mutex_unlock(&hba->uic_cmd_mutex);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004051
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004052 return ret;
4053}
4054
4055/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304056 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
4057 * using DME_SET primitives.
4058 * @hba: per adapter instance
4059 * @mode: powr mode value
4060 *
4061 * Returns 0 on success, non-zero value on failure
4062 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05304063static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304064{
4065 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004066 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304067
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03004068 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
4069 ret = ufshcd_dme_set(hba,
4070 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
4071 if (ret) {
4072 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
4073 __func__, ret);
4074 goto out;
4075 }
4076 }
4077
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304078 uic_cmd.command = UIC_CMD_DME_SET;
4079 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
4080 uic_cmd.argument3 = mode;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004081 ufshcd_hold(hba, false);
4082 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
4083 ufshcd_release(hba);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304084
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03004085out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004086 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004087}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304088
Stanley Chu087c5ef2020-03-27 17:53:28 +08004089int ufshcd_link_recovery(struct ufs_hba *hba)
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004090{
4091 int ret;
4092 unsigned long flags;
4093
4094 spin_lock_irqsave(hba->host->host_lock, flags);
4095 hba->ufshcd_state = UFSHCD_STATE_RESET;
4096 ufshcd_set_eh_in_progress(hba);
4097 spin_unlock_irqrestore(hba->host->host_lock, flags);
4098
Can Guoebdd1df2019-11-14 22:09:24 -08004099 /* Reset the attached device */
Stanley Chu31a5d9c2020-12-08 21:56:35 +08004100 ufshcd_device_reset(hba);
Can Guoebdd1df2019-11-14 22:09:24 -08004101
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004102 ret = ufshcd_host_reset_and_restore(hba);
4103
4104 spin_lock_irqsave(hba->host->host_lock, flags);
4105 if (ret)
4106 hba->ufshcd_state = UFSHCD_STATE_ERROR;
4107 ufshcd_clear_eh_in_progress(hba);
4108 spin_unlock_irqrestore(hba->host->host_lock, flags);
4109
4110 if (ret)
4111 dev_err(hba->dev, "%s: link recovery failed, err %d",
4112 __func__, ret);
4113
4114 return ret;
4115}
Stanley Chu087c5ef2020-03-27 17:53:28 +08004116EXPORT_SYMBOL_GPL(ufshcd_link_recovery);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004117
Asutosh Das525943a2021-09-28 02:06:12 -07004118int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004119{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004120 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004121 struct uic_command uic_cmd = {0};
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08004122 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004123
Kiwoong Kimee32c902016-11-10 21:17:43 +09004124 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
4125
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004126 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004127 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08004128 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
4129 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004130
Can Guo4db7a232020-08-09 05:15:51 -07004131 if (ret)
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004132 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
4133 __func__, ret);
Can Guo4db7a232020-08-09 05:15:51 -07004134 else
Kiwoong Kimee32c902016-11-10 21:17:43 +09004135 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
4136 POST_CHANGE);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004137
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004138 return ret;
4139}
Asutosh Das525943a2021-09-28 02:06:12 -07004140EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_enter);
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004141
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004142int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004143{
4144 struct uic_command uic_cmd = {0};
4145 int ret;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08004146 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004147
Kiwoong Kimee32c902016-11-10 21:17:43 +09004148 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
4149
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004150 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
4151 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08004152 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
4153 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
4154
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304155 if (ret) {
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004156 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
4157 __func__, ret);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004158 } else {
Kiwoong Kimee32c902016-11-10 21:17:43 +09004159 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
4160 POST_CHANGE);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004161 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
4162 hba->ufs_stats.hibern8_exit_cnt++;
4163 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304164
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304165 return ret;
4166}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004167EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_exit);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304168
Stanley Chuba7af5e2019-12-30 13:32:28 +08004169void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit)
4170{
4171 unsigned long flags;
Can Guobe7594a2020-03-05 00:53:07 -08004172 bool update = false;
Stanley Chuba7af5e2019-12-30 13:32:28 +08004173
Can Guobe7594a2020-03-05 00:53:07 -08004174 if (!ufshcd_is_auto_hibern8_supported(hba))
Stanley Chuba7af5e2019-12-30 13:32:28 +08004175 return;
4176
4177 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guobe7594a2020-03-05 00:53:07 -08004178 if (hba->ahit != ahit) {
4179 hba->ahit = ahit;
4180 update = true;
4181 }
Stanley Chuba7af5e2019-12-30 13:32:28 +08004182 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guobe7594a2020-03-05 00:53:07 -08004183
Asutosh Dasb294ff32021-04-23 17:20:16 -07004184 if (update &&
4185 !pm_runtime_suspended(&hba->sdev_ufs_device->sdev_gendev)) {
4186 ufshcd_rpm_get_sync(hba);
Can Guobe7594a2020-03-05 00:53:07 -08004187 ufshcd_hold(hba, false);
4188 ufshcd_auto_hibern8_enable(hba);
4189 ufshcd_release(hba);
Asutosh Dasb294ff32021-04-23 17:20:16 -07004190 ufshcd_rpm_put_sync(hba);
Can Guobe7594a2020-03-05 00:53:07 -08004191 }
Stanley Chuba7af5e2019-12-30 13:32:28 +08004192}
4193EXPORT_SYMBOL_GPL(ufshcd_auto_hibern8_update);
4194
Can Guo71d848b2019-11-14 22:09:26 -08004195void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
Adrian Hunterad448372018-03-20 15:07:38 +02004196{
4197 unsigned long flags;
4198
Bao D. Nguyen499f7a92020-08-28 18:05:13 -07004199 if (!ufshcd_is_auto_hibern8_supported(hba))
Adrian Hunterad448372018-03-20 15:07:38 +02004200 return;
4201
4202 spin_lock_irqsave(hba->host->host_lock, flags);
4203 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
4204 spin_unlock_irqrestore(hba->host->host_lock, flags);
4205}
4206
Yaniv Gardi50646362014-10-23 13:25:13 +03004207 /**
4208 * ufshcd_init_pwr_info - setting the POR (power on reset)
4209 * values in hba power info
4210 * @hba: per-adapter instance
4211 */
4212static void ufshcd_init_pwr_info(struct ufs_hba *hba)
4213{
4214 hba->pwr_info.gear_rx = UFS_PWM_G1;
4215 hba->pwr_info.gear_tx = UFS_PWM_G1;
4216 hba->pwr_info.lane_rx = 1;
4217 hba->pwr_info.lane_tx = 1;
4218 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
4219 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
4220 hba->pwr_info.hs_rate = 0;
4221}
4222
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304223/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004224 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
4225 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304226 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004227static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304228{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004229 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
4230
4231 if (hba->max_pwr_info.is_valid)
4232 return 0;
4233
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004234 pwr_info->pwr_tx = FAST_MODE;
4235 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004236 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304237
4238 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004239 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
4240 &pwr_info->lane_rx);
4241 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4242 &pwr_info->lane_tx);
4243
4244 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
4245 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
4246 __func__,
4247 pwr_info->lane_rx,
4248 pwr_info->lane_tx);
4249 return -EINVAL;
4250 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304251
4252 /*
4253 * First, get the maximum gears of HS speed.
4254 * If a zero value, it means there is no HSGEAR capability.
4255 * Then, get the maximum gears of PWM speed.
4256 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004257 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
4258 if (!pwr_info->gear_rx) {
4259 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4260 &pwr_info->gear_rx);
4261 if (!pwr_info->gear_rx) {
4262 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
4263 __func__, pwr_info->gear_rx);
4264 return -EINVAL;
4265 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004266 pwr_info->pwr_rx = SLOW_MODE;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304267 }
4268
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004269 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
4270 &pwr_info->gear_tx);
4271 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304272 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004273 &pwr_info->gear_tx);
4274 if (!pwr_info->gear_tx) {
4275 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
4276 __func__, pwr_info->gear_tx);
4277 return -EINVAL;
4278 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004279 pwr_info->pwr_tx = SLOW_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004280 }
4281
4282 hba->max_pwr_info.is_valid = true;
4283 return 0;
4284}
4285
4286static int ufshcd_change_power_mode(struct ufs_hba *hba,
4287 struct ufs_pa_layer_attr *pwr_mode)
4288{
4289 int ret;
4290
4291 /* if already configured to the requested pwr_mode */
Can Guo2355b662020-08-24 19:07:06 -07004292 if (!hba->force_pmc &&
4293 pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004294 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4295 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4296 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4297 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4298 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4299 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4300 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4301 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304302 }
4303
4304 /*
4305 * Configure attributes for power mode change with below.
4306 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4307 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4308 * - PA_HSSERIES
4309 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004310 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4311 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4312 pwr_mode->lane_rx);
4313 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4314 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304315 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004316 else
4317 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304318
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004319 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4320 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4321 pwr_mode->lane_tx);
4322 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4323 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304324 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004325 else
4326 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304327
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004328 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4329 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4330 pwr_mode->pwr_rx == FAST_MODE ||
4331 pwr_mode->pwr_tx == FAST_MODE)
4332 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4333 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304334
Kiwoong Kimb1d0d2e2020-12-21 10:24:40 +09004335 if (!(hba->quirks & UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING)) {
4336 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
4337 DL_FC0ProtectionTimeOutVal_Default);
4338 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
4339 DL_TC0ReplayTimeOutVal_Default);
4340 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
4341 DL_AFC0ReqTimeOutVal_Default);
4342 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
4343 DL_FC1ProtectionTimeOutVal_Default);
4344 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
4345 DL_TC1ReplayTimeOutVal_Default);
4346 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
4347 DL_AFC1ReqTimeOutVal_Default);
Can Guo08342532019-12-05 02:14:42 +00004348
Kiwoong Kimb1d0d2e2020-12-21 10:24:40 +09004349 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
4350 DL_FC0ProtectionTimeOutVal_Default);
4351 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
4352 DL_TC0ReplayTimeOutVal_Default);
4353 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
4354 DL_AFC0ReqTimeOutVal_Default);
4355 }
Can Guo08342532019-12-05 02:14:42 +00004356
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004357 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4358 | pwr_mode->pwr_tx);
4359
4360 if (ret) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304361 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004362 "%s: power mode change failed %d\n", __func__, ret);
4363 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004364 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4365 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004366
4367 memcpy(&hba->pwr_info, pwr_mode,
4368 sizeof(struct ufs_pa_layer_attr));
4369 }
4370
4371 return ret;
4372}
4373
4374/**
4375 * ufshcd_config_pwr_mode - configure a new power mode
4376 * @hba: per-adapter instance
4377 * @desired_pwr_mode: desired power configuration
4378 */
Alim Akhtar0d846e72018-05-06 15:44:18 +05304379int ufshcd_config_pwr_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004380 struct ufs_pa_layer_attr *desired_pwr_mode)
4381{
4382 struct ufs_pa_layer_attr final_params = { 0 };
4383 int ret;
4384
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004385 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4386 desired_pwr_mode, &final_params);
4387
4388 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004389 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4390
4391 ret = ufshcd_change_power_mode(hba, &final_params);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304392
4393 return ret;
4394}
Alim Akhtar0d846e72018-05-06 15:44:18 +05304395EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304396
4397/**
Dolev Raviv68078d52013-07-30 00:35:58 +05304398 * ufshcd_complete_dev_init() - checks device readiness
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004399 * @hba: per-adapter instance
Dolev Raviv68078d52013-07-30 00:35:58 +05304400 *
4401 * Set fDeviceInit flag and poll until device toggles it.
4402 */
4403static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4404{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004405 int err;
Jason Yan7dfdcc32020-04-26 17:43:05 +08004406 bool flag_res = true;
Kiwoong Kim29707fa2020-08-10 19:02:27 +09004407 ktime_t timeout;
Dolev Raviv68078d52013-07-30 00:35:58 +05304408
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004409 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08004410 QUERY_FLAG_IDN_FDEVICEINIT, 0, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05304411 if (err) {
4412 dev_err(hba->dev,
4413 "%s setting fDeviceInit flag failed with error %d\n",
4414 __func__, err);
4415 goto out;
4416 }
4417
Kiwoong Kim29707fa2020-08-10 19:02:27 +09004418 /* Poll fDeviceInit flag to be cleared */
4419 timeout = ktime_add_ms(ktime_get(), FDEVICEINIT_COMPL_TIMEOUT);
4420 do {
4421 err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4422 QUERY_FLAG_IDN_FDEVICEINIT, 0, &flag_res);
4423 if (!flag_res)
4424 break;
4425 usleep_range(5000, 10000);
4426 } while (ktime_before(ktime_get(), timeout));
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004427
Kiwoong Kim29707fa2020-08-10 19:02:27 +09004428 if (err) {
Dolev Raviv68078d52013-07-30 00:35:58 +05304429 dev_err(hba->dev,
Kiwoong Kim29707fa2020-08-10 19:02:27 +09004430 "%s reading fDeviceInit flag failed with error %d\n",
4431 __func__, err);
4432 } else if (flag_res) {
Dolev Raviv68078d52013-07-30 00:35:58 +05304433 dev_err(hba->dev,
Kiwoong Kim29707fa2020-08-10 19:02:27 +09004434 "%s fDeviceInit was not cleared by the device\n",
4435 __func__);
4436 err = -EBUSY;
4437 }
Dolev Raviv68078d52013-07-30 00:35:58 +05304438out:
4439 return err;
4440}
4441
4442/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304443 * ufshcd_make_hba_operational - Make UFS controller operational
4444 * @hba: per adapter instance
4445 *
4446 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004447 * 1. Enable required interrupts
4448 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004449 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004450 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304451 *
4452 * Returns 0 on success, non-zero value on failure
4453 */
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004454int ufshcd_make_hba_operational(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304455{
4456 int err = 0;
4457 u32 reg;
4458
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304459 /* Enable required interrupts */
4460 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4461
4462 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004463 if (ufshcd_is_intr_aggr_allowed(hba))
4464 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4465 else
4466 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304467
4468 /* Configure UTRL and UTMRL base address registers */
4469 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4470 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4471 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4472 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4473 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4474 REG_UTP_TASK_REQ_LIST_BASE_L);
4475 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4476 REG_UTP_TASK_REQ_LIST_BASE_H);
4477
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304478 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004479 * Make sure base address and interrupt setup are updated before
4480 * enabling the run/stop registers below.
4481 */
4482 wmb();
4483
4484 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304485 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304486 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004487 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304488 if (!(ufshcd_get_lists_status(reg))) {
4489 ufshcd_enable_run_stop_reg(hba);
4490 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304491 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304492 "Host controller not ready to process requests");
4493 err = -EIO;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304494 }
4495
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304496 return err;
4497}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004498EXPORT_SYMBOL_GPL(ufshcd_make_hba_operational);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304499
4500/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02004501 * ufshcd_hba_stop - Send controller to reset state
4502 * @hba: per adapter instance
Yaniv Gardi596585a2016-03-10 17:37:08 +02004503 */
Alice.Chao3a95f5b2021-05-28 11:36:21 +08004504void ufshcd_hba_stop(struct ufs_hba *hba)
Yaniv Gardi596585a2016-03-10 17:37:08 +02004505{
Bart Van Assche5cac1092020-05-07 15:27:50 -07004506 unsigned long flags;
Yaniv Gardi596585a2016-03-10 17:37:08 +02004507 int err;
4508
Bart Van Assche5cac1092020-05-07 15:27:50 -07004509 /*
4510 * Obtain the host lock to prevent that the controller is disabled
4511 * while the UFS interrupt handler is active on another CPU.
4512 */
4513 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02004514 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
Bart Van Assche5cac1092020-05-07 15:27:50 -07004515 spin_unlock_irqrestore(hba->host->host_lock, flags);
4516
Yaniv Gardi596585a2016-03-10 17:37:08 +02004517 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4518 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
Bart Van Assche5cac1092020-05-07 15:27:50 -07004519 10, 1);
Yaniv Gardi596585a2016-03-10 17:37:08 +02004520 if (err)
4521 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4522}
Alice.Chao3a95f5b2021-05-28 11:36:21 +08004523EXPORT_SYMBOL_GPL(ufshcd_hba_stop);
Yaniv Gardi596585a2016-03-10 17:37:08 +02004524
4525/**
Alim Akhtar39bf2d82020-05-28 06:46:51 +05304526 * ufshcd_hba_execute_hce - initialize the controller
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304527 * @hba: per adapter instance
4528 *
4529 * The controller resets itself and controller firmware initialization
4530 * sequence kicks off. When controller is ready it will set
4531 * the Host Controller Enable bit to 1.
4532 *
4533 * Returns 0 on success, non-zero value on failure
4534 */
Alim Akhtar39bf2d82020-05-28 06:46:51 +05304535static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304536{
Stanley Chu6081b122020-11-12 13:45:37 +08004537 int retry_outer = 3;
4538 int retry_inner;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304539
Stanley Chu6081b122020-11-12 13:45:37 +08004540start:
Yaniv Gardi596585a2016-03-10 17:37:08 +02004541 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304542 /* change controller state to "reset state" */
Bart Van Assche5cac1092020-05-07 15:27:50 -07004543 ufshcd_hba_stop(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304544
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004545 /* UniPro link is disabled at this point */
4546 ufshcd_set_link_off(hba);
4547
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004548 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004549
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304550 /* start controller initialization sequence */
4551 ufshcd_hba_start(hba);
4552
4553 /*
4554 * To initialize a UFS host controller HCE bit must be set to 1.
4555 * During initialization the HCE bit value changes from 1->0->1.
4556 * When the host controller completes initialization sequence
4557 * it sets the value of HCE bit to 1. The same HCE bit is read back
4558 * to check if the controller has completed initialization sequence.
4559 * So without this delay the value HCE = 1, set in the previous
4560 * instruction might be read back.
4561 * This delay can be changed based on the controller.
4562 */
Stanley Chu90b84912020-05-09 17:37:13 +08004563 ufshcd_delay_us(hba->vps->hba_enable_delay_us, 100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304564
4565 /* wait for the host controller to complete initialization */
Stanley Chu6081b122020-11-12 13:45:37 +08004566 retry_inner = 50;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304567 while (ufshcd_is_hba_active(hba)) {
Stanley Chu6081b122020-11-12 13:45:37 +08004568 if (retry_inner) {
4569 retry_inner--;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304570 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304571 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304572 "Controller enable failed\n");
Stanley Chu6081b122020-11-12 13:45:37 +08004573 if (retry_outer) {
4574 retry_outer--;
4575 goto start;
4576 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304577 return -EIO;
4578 }
Stanley Chu9fc305e2020-03-18 18:40:15 +08004579 usleep_range(1000, 1100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304580 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004581
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004582 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004583 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004584
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004585 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004586
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304587 return 0;
4588}
Alim Akhtar39bf2d82020-05-28 06:46:51 +05304589
4590int ufshcd_hba_enable(struct ufs_hba *hba)
4591{
4592 int ret;
4593
4594 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4595 ufshcd_set_link_off(hba);
4596 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4597
4598 /* enable UIC related interrupts */
4599 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4600 ret = ufshcd_dme_reset(hba);
4601 if (!ret) {
4602 ret = ufshcd_dme_enable(hba);
4603 if (!ret)
4604 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4605 if (ret)
4606 dev_err(hba->dev,
4607 "Host controller enable failed with non-hce\n");
4608 }
4609 } else {
4610 ret = ufshcd_hba_execute_hce(hba);
4611 }
4612
4613 return ret;
4614}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004615EXPORT_SYMBOL_GPL(ufshcd_hba_enable);
4616
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004617static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4618{
Stanley Chuba0320f2020-03-18 18:40:10 +08004619 int tx_lanes = 0, i, err = 0;
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004620
4621 if (!peer)
4622 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4623 &tx_lanes);
4624 else
4625 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4626 &tx_lanes);
4627 for (i = 0; i < tx_lanes; i++) {
4628 if (!peer)
4629 err = ufshcd_dme_set(hba,
4630 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4631 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4632 0);
4633 else
4634 err = ufshcd_dme_peer_set(hba,
4635 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4636 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4637 0);
4638 if (err) {
4639 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4640 __func__, peer, i, err);
4641 break;
4642 }
4643 }
4644
4645 return err;
4646}
4647
4648static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4649{
4650 return ufshcd_disable_tx_lcc(hba, true);
4651}
4652
Stanley Chue965e5e2020-12-05 19:58:59 +08004653void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val)
Stanley Chu8808b4e2019-07-10 21:38:21 +08004654{
Stanley Chue965e5e2020-12-05 19:58:59 +08004655 struct ufs_event_hist *e;
4656
4657 if (id >= UFS_EVT_CNT)
4658 return;
4659
4660 e = &hba->ufs_stats.event[id];
4661 e->val[e->pos] = val;
4662 e->tstamp[e->pos] = ktime_get();
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02004663 e->cnt += 1;
Stanley Chue965e5e2020-12-05 19:58:59 +08004664 e->pos = (e->pos + 1) % UFS_EVENT_HIST_LENGTH;
Stanley Chu172614a2020-12-05 19:59:00 +08004665
4666 ufshcd_vops_event_notify(hba, id, &val);
Stanley Chu8808b4e2019-07-10 21:38:21 +08004667}
Stanley Chue965e5e2020-12-05 19:58:59 +08004668EXPORT_SYMBOL_GPL(ufshcd_update_evt_hist);
Stanley Chu8808b4e2019-07-10 21:38:21 +08004669
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304670/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304671 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304672 * @hba: per adapter instance
4673 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304674 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304675 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304676static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304677{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304678 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004679 int retries = DME_LINKSTARTUP_RETRIES;
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004680 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304681
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004682 /*
4683 * If UFS device isn't active then we will have to issue link startup
4684 * 2 times to make sure the device state move to active.
4685 */
4686 if (!ufshcd_is_ufs_dev_active(hba))
4687 link_startup_again = true;
4688
4689link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004690 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004691 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304692
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004693 ret = ufshcd_dme_link_startup(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004694
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004695 /* check if device is detected by inter-connect layer */
4696 if (!ret && !ufshcd_is_device_present(hba)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08004697 ufshcd_update_evt_hist(hba,
4698 UFS_EVT_LINK_STARTUP_FAIL,
Stanley Chu8808b4e2019-07-10 21:38:21 +08004699 0);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004700 dev_err(hba->dev, "%s: Device not present\n", __func__);
4701 ret = -ENXIO;
4702 goto out;
4703 }
4704
4705 /*
4706 * DME link lost indication is only received when link is up,
4707 * but we can't be sure if the link is up until link startup
4708 * succeeds. So reset the local Uni-Pro and try again.
4709 */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004710 if (ret && ufshcd_hba_enable(hba)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08004711 ufshcd_update_evt_hist(hba,
4712 UFS_EVT_LINK_STARTUP_FAIL,
Stanley Chu8808b4e2019-07-10 21:38:21 +08004713 (u32)ret);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004714 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004715 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004716 } while (ret && retries--);
4717
Stanley Chu8808b4e2019-07-10 21:38:21 +08004718 if (ret) {
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004719 /* failed to get the link up... retire */
Stanley Chue965e5e2020-12-05 19:58:59 +08004720 ufshcd_update_evt_hist(hba,
4721 UFS_EVT_LINK_STARTUP_FAIL,
Stanley Chu8808b4e2019-07-10 21:38:21 +08004722 (u32)ret);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304723 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004724 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304725
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004726 if (link_startup_again) {
4727 link_startup_again = false;
4728 retries = DME_LINKSTARTUP_RETRIES;
4729 goto link_startup;
4730 }
4731
subhashj@codeaurora.orgd2aebb92016-12-22 18:41:33 -08004732 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4733 ufshcd_init_pwr_info(hba);
4734 ufshcd_print_pwr_info(hba);
4735
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004736 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4737 ret = ufshcd_disable_device_tx_lcc(hba);
4738 if (ret)
4739 goto out;
4740 }
4741
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004742 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004743 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4744 if (ret)
4745 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004746
Can Guo2355b662020-08-24 19:07:06 -07004747 /* Clear UECPA once due to LINERESET has happened during LINK_STARTUP */
4748 ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004749 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304750out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004751 if (ret) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304752 dev_err(hba->dev, "link startup failed %d\n", ret);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004753 ufshcd_print_host_state(hba);
4754 ufshcd_print_pwr_info(hba);
Stanley Chue965e5e2020-12-05 19:58:59 +08004755 ufshcd_print_evt_hist(hba);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004756 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304757 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304758}
4759
4760/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304761 * ufshcd_verify_dev_init() - Verify device initialization
4762 * @hba: per-adapter instance
4763 *
4764 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4765 * device Transport Protocol (UTP) layer is ready after a reset.
4766 * If the UTP layer at the device side is not initialized, it may
4767 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4768 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4769 */
4770static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4771{
4772 int err = 0;
4773 int retries;
4774
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004775 ufshcd_hold(hba, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304776 mutex_lock(&hba->dev_cmd.lock);
4777 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4778 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4779 NOP_OUT_TIMEOUT);
4780
4781 if (!err || err == -ETIMEDOUT)
4782 break;
4783
4784 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4785 }
4786 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004787 ufshcd_release(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304788
4789 if (err)
4790 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4791 return err;
4792}
4793
4794/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004795 * ufshcd_set_queue_depth - set lun queue depth
4796 * @sdev: pointer to SCSI device
4797 *
4798 * Read bLUQueueDepth value and activate scsi tagged command
4799 * queueing. For WLUN, queue depth is set to 1. For best-effort
4800 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4801 * value that host can queue.
4802 */
4803static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4804{
4805 int ret = 0;
4806 u8 lun_qdepth;
4807 struct ufs_hba *hba;
4808
4809 hba = shost_priv(sdev->host);
4810
4811 lun_qdepth = hba->nutrs;
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02004812 ret = ufshcd_read_unit_desc_param(hba,
4813 ufshcd_scsi_to_upiu_lun(sdev->lun),
4814 UNIT_DESC_PARAM_LU_Q_DEPTH,
4815 &lun_qdepth,
4816 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004817
4818 /* Some WLUN doesn't support unit descriptor */
4819 if (ret == -EOPNOTSUPP)
4820 lun_qdepth = 1;
4821 else if (!lun_qdepth)
4822 /* eventually, we can figure out the real queue depth */
4823 lun_qdepth = hba->nutrs;
4824 else
4825 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4826
4827 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4828 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004829 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004830}
4831
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004832/*
4833 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4834 * @hba: per-adapter instance
4835 * @lun: UFS device lun id
4836 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4837 *
4838 * Returns 0 in case of success and b_lu_write_protect status would be returned
4839 * @b_lu_write_protect parameter.
4840 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4841 * Returns -EINVAL in case of invalid parameters passed to this function.
4842 */
4843static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4844 u8 lun,
4845 u8 *b_lu_write_protect)
4846{
4847 int ret;
4848
4849 if (!b_lu_write_protect)
4850 ret = -EINVAL;
4851 /*
4852 * According to UFS device spec, RPMB LU can't be write
4853 * protected so skip reading bLUWriteProtect parameter for
4854 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4855 */
Bean Huo1baa8012020-01-20 14:08:20 +01004856 else if (lun >= hba->dev_info.max_lu_supported)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004857 ret = -ENOTSUPP;
4858 else
4859 ret = ufshcd_read_unit_desc_param(hba,
4860 lun,
4861 UNIT_DESC_PARAM_LU_WR_PROTECT,
4862 b_lu_write_protect,
4863 sizeof(*b_lu_write_protect));
4864 return ret;
4865}
4866
4867/**
4868 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4869 * status
4870 * @hba: per-adapter instance
4871 * @sdev: pointer to SCSI device
4872 *
4873 */
4874static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4875 struct scsi_device *sdev)
4876{
4877 if (hba->dev_info.f_power_on_wp_en &&
4878 !hba->dev_info.is_lu_power_on_wp) {
4879 u8 b_lu_write_protect;
4880
4881 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4882 &b_lu_write_protect) &&
4883 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4884 hba->dev_info.is_lu_power_on_wp = true;
4885 }
4886}
4887
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004888/**
Asutosh Dasb294ff32021-04-23 17:20:16 -07004889 * ufshcd_setup_links - associate link b/w device wlun and other luns
4890 * @sdev: pointer to SCSI device
4891 * @hba: pointer to ufs hba
4892 */
4893static void ufshcd_setup_links(struct ufs_hba *hba, struct scsi_device *sdev)
4894{
4895 struct device_link *link;
4896
4897 /*
4898 * Device wlun is the supplier & rest of the luns are consumers.
4899 * This ensures that device wlun suspends after all other luns.
4900 */
4901 if (hba->sdev_ufs_device) {
4902 link = device_link_add(&sdev->sdev_gendev,
4903 &hba->sdev_ufs_device->sdev_gendev,
4904 DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE);
4905 if (!link) {
4906 dev_err(&sdev->sdev_gendev, "Failed establishing link - %s\n",
4907 dev_name(&hba->sdev_ufs_device->sdev_gendev));
4908 return;
4909 }
4910 hba->luns_avail--;
4911 /* Ignore REPORT_LUN wlun probing */
4912 if (hba->luns_avail == 1) {
4913 ufshcd_rpm_put(hba);
4914 return;
4915 }
4916 } else {
4917 /*
4918 * Device wlun is probed. The assumption is that WLUNs are
4919 * scanned before other LUNs.
4920 */
4921 hba->luns_avail--;
4922 }
4923}
4924
4925/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304926 * ufshcd_slave_alloc - handle initial SCSI device configurations
4927 * @sdev: pointer to SCSI device
4928 *
4929 * Returns success
4930 */
4931static int ufshcd_slave_alloc(struct scsi_device *sdev)
4932{
4933 struct ufs_hba *hba;
4934
4935 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304936
4937 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4938 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304939
Can Guoa3a76392019-12-05 02:14:30 +00004940 /* DBD field should be set to 1 in mode sense(10) */
4941 sdev->set_dbd_for_ms = 1;
4942
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304943 /* allow SCSI layer to restart the device in case of errors */
4944 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004945
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004946 /* REPORT SUPPORTED OPERATION CODES is not supported */
4947 sdev->no_report_opcodes = 1;
4948
Sujit Reddy Thumma84af7e82018-01-24 09:52:35 +05304949 /* WRITE_SAME command is not supported */
4950 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004951
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004952 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004953
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004954 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4955
Asutosh Dasb294ff32021-04-23 17:20:16 -07004956 ufshcd_setup_links(hba, sdev);
4957
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004958 return 0;
4959}
4960
4961/**
4962 * ufshcd_change_queue_depth - change queue depth
4963 * @sdev: pointer to SCSI device
4964 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004965 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004966 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004967 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004968static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004969{
4970 struct ufs_hba *hba = shost_priv(sdev->host);
4971
4972 if (depth > hba->nutrs)
4973 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004974 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304975}
4976
Daejun Parkf02bc972021-07-12 17:58:30 +09004977static void ufshcd_hpb_destroy(struct ufs_hba *hba, struct scsi_device *sdev)
4978{
4979 /* skip well-known LU */
Daejun Park41d8a932021-07-12 18:00:25 +09004980 if ((sdev->lun >= UFS_UPIU_MAX_UNIT_NUM_ID) ||
4981 !(hba->dev_info.hpb_enabled) || !ufshpb_is_allowed(hba))
Daejun Parkf02bc972021-07-12 17:58:30 +09004982 return;
4983
4984 ufshpb_destroy_lu(hba, sdev);
4985}
4986
4987static void ufshcd_hpb_configure(struct ufs_hba *hba, struct scsi_device *sdev)
4988{
4989 /* skip well-known LU */
4990 if ((sdev->lun >= UFS_UPIU_MAX_UNIT_NUM_ID) ||
4991 !(hba->dev_info.hpb_enabled) || !ufshpb_is_allowed(hba))
4992 return;
4993
4994 ufshpb_init_hpb_lu(hba, sdev);
4995}
4996
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304997/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004998 * ufshcd_slave_configure - adjust SCSI device configurations
4999 * @sdev: pointer to SCSI device
5000 */
5001static int ufshcd_slave_configure(struct scsi_device *sdev)
5002{
Stanley Chu49615ba2019-09-16 23:56:50 +08005003 struct ufs_hba *hba = shost_priv(sdev->host);
Akinobu Mitaeeda4742014-07-01 23:00:32 +09005004 struct request_queue *q = sdev->request_queue;
5005
Daejun Parkf02bc972021-07-12 17:58:30 +09005006 ufshcd_hpb_configure(hba, sdev);
5007
Akinobu Mitaeeda4742014-07-01 23:00:32 +09005008 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
Kiwoong Kim2b2bfc8a2021-01-19 12:33:41 +09005009 if (hba->quirks & UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE)
5010 blk_queue_update_dma_alignment(q, PAGE_SIZE - 1);
Asutosh Dasb294ff32021-04-23 17:20:16 -07005011 /*
5012 * Block runtime-pm until all consumers are added.
5013 * Refer ufshcd_setup_links().
5014 */
5015 if (is_device_wlun(sdev))
5016 pm_runtime_get_noresume(&sdev->sdev_gendev);
5017 else if (ufshcd_is_rpm_autosuspend_allowed(hba))
Stanley Chu49615ba2019-09-16 23:56:50 +08005018 sdev->rpm_autosuspend = 1;
5019
Satya Tangiraladf043c742020-07-06 20:04:14 +00005020 ufshcd_crypto_setup_rq_keyslot_manager(hba, q);
5021
Akinobu Mitaeeda4742014-07-01 23:00:32 +09005022 return 0;
5023}
5024
5025/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305026 * ufshcd_slave_destroy - remove SCSI device configurations
5027 * @sdev: pointer to SCSI device
5028 */
5029static void ufshcd_slave_destroy(struct scsi_device *sdev)
5030{
5031 struct ufs_hba *hba;
Adrian Hunterbf259672021-08-06 16:04:41 +03005032 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305033
5034 hba = shost_priv(sdev->host);
Daejun Parkf02bc972021-07-12 17:58:30 +09005035
5036 ufshcd_hpb_destroy(hba, sdev);
5037
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03005038 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03005039 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03005040 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03005041 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03005042 spin_unlock_irqrestore(hba->host->host_lock, flags);
Adrian Hunterbf259672021-08-06 16:04:41 +03005043 } else if (hba->sdev_ufs_device) {
5044 struct device *supplier = NULL;
5045
5046 /* Ensure UFS Device WLUN exists and does not disappear */
5047 spin_lock_irqsave(hba->host->host_lock, flags);
5048 if (hba->sdev_ufs_device) {
5049 supplier = &hba->sdev_ufs_device->sdev_gendev;
5050 get_device(supplier);
5051 }
5052 spin_unlock_irqrestore(hba->host->host_lock, flags);
5053
5054 if (supplier) {
5055 /*
5056 * If a LUN fails to probe (e.g. absent BOOT WLUN), the
5057 * device will not have been registered but can still
5058 * have a device link holding a reference to the device.
5059 */
5060 device_link_remove(&sdev->sdev_gendev, supplier);
5061 put_device(supplier);
5062 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03005063 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305064}
5065
5066/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305067 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
Bart Van Assche8aa29f12018-03-01 15:07:20 -08005068 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305069 * @scsi_status: SCSI command status
5070 *
5071 * Returns value base on SCSI command status
5072 */
5073static inline int
5074ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
5075{
5076 int result = 0;
5077
5078 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05305079 case SAM_STAT_CHECK_CONDITION:
5080 ufshcd_copy_sense_data(lrbp);
Gustavo A. R. Silvadf561f662020-08-23 17:36:59 -05005081 fallthrough;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305082 case SAM_STAT_GOOD:
Hannes Reineckedb83d8a2021-01-13 10:04:48 +01005083 result |= DID_OK << 16 | scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305084 break;
5085 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05305086 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305087 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05305088 ufshcd_copy_sense_data(lrbp);
5089 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305090 break;
5091 default:
5092 result |= DID_ERROR << 16;
5093 break;
5094 } /* end of switch */
5095
5096 return result;
5097}
5098
5099/**
5100 * ufshcd_transfer_rsp_status - Get overall status of the response
5101 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08005102 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305103 *
5104 * Returns result of the command to notify SCSI midlayer
5105 */
5106static inline int
5107ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
5108{
5109 int result = 0;
5110 int scsi_status;
5111 int ocs;
5112
5113 /* overall command status of utrd */
5114 ocs = ufshcd_get_tr_ocs(lrbp);
5115
Kiwoong Kimd779a6e2020-05-28 06:46:53 +05305116 if (hba->quirks & UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR) {
5117 if (be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_1) &
5118 MASK_RSP_UPIU_RESULT)
5119 ocs = OCS_SUCCESS;
5120 }
5121
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305122 switch (ocs) {
5123 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305124 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005125 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305126 switch (result) {
5127 case UPIU_TRANSACTION_RESPONSE:
5128 /*
5129 * get the response UPIU result to extract
5130 * the SCSI command status
5131 */
5132 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
5133
5134 /*
5135 * get the result based on SCSI status response
5136 * to notify the SCSI midlayer of the command status
5137 */
5138 scsi_status = result & MASK_SCSI_STATUS;
5139 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305140
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02005141 /*
5142 * Currently we are only supporting BKOPs exception
5143 * events hence we can ignore BKOPs exception event
5144 * during power management callbacks. BKOPs exception
5145 * event is not expected to be raised in runtime suspend
5146 * callback as it allows the urgent bkops.
5147 * During system suspend, we are anyway forcefully
5148 * disabling the bkops and if urgent bkops is needed
5149 * it will be enabled on system resume. Long term
5150 * solution could be to abort the system suspend if
5151 * UFS device needs urgent BKOPs.
5152 */
5153 if (!hba->pm_op_in_progress &&
Can Guoaa53f582021-02-23 21:36:47 -08005154 !ufshcd_eh_in_progress(hba) &&
Asutosh Dasb294ff32021-04-23 17:20:16 -07005155 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
5156 /* Flushed in suspend */
5157 schedule_work(&hba->eeh_work);
Daejun Park4b5f4902021-07-12 17:58:59 +09005158
5159 if (scsi_status == SAM_STAT_GOOD)
5160 ufshpb_rsp_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305161 break;
5162 case UPIU_TRANSACTION_REJECT_UPIU:
5163 /* TODO: handle Reject UPIU Response */
5164 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305165 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305166 "Reject UPIU not fully implemented\n");
5167 break;
5168 default:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305169 dev_err(hba->dev,
5170 "Unexpected request response code = %x\n",
5171 result);
Stanley Chue0347d82019-04-15 20:23:38 +08005172 result = DID_ERROR << 16;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305173 break;
5174 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305175 break;
5176 case OCS_ABORTED:
5177 result |= DID_ABORT << 16;
5178 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305179 case OCS_INVALID_COMMAND_STATUS:
5180 result |= DID_REQUEUE << 16;
5181 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305182 case OCS_INVALID_CMD_TABLE_ATTR:
5183 case OCS_INVALID_PRDT_ATTR:
5184 case OCS_MISMATCH_DATA_BUF_SIZE:
5185 case OCS_MISMATCH_RESP_UPIU_SIZE:
5186 case OCS_PEER_COMM_FAILURE:
5187 case OCS_FATAL_ERROR:
Satya Tangirala5e7341e2020-07-06 20:04:12 +00005188 case OCS_DEVICE_FATAL_ERROR:
5189 case OCS_INVALID_CRYPTO_CONFIG:
5190 case OCS_GENERAL_CRYPTO_ERROR:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305191 default:
5192 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305193 dev_err(hba->dev,
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005194 "OCS error from controller = %x for tag %d\n",
5195 ocs, lrbp->task_tag);
Stanley Chue965e5e2020-12-05 19:58:59 +08005196 ufshcd_print_evt_hist(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08005197 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305198 break;
5199 } /* end of switch */
5200
Jaegeuk Kimeeb1b552021-01-07 10:53:16 -08005201 if ((host_byte(result) != DID_OK) &&
5202 (host_byte(result) != DID_REQUEUE) && !hba->silence_err_logs)
Dolev Raviv66cc8202016-12-22 18:39:42 -08005203 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305204 return result;
5205}
5206
Can Guoa45f9372021-05-24 01:36:57 -07005207static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5208 u32 intr_mask)
5209{
5210 if (!ufshcd_is_auto_hibern8_supported(hba) ||
5211 !ufshcd_is_auto_hibern8_enabled(hba))
5212 return false;
5213
5214 if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5215 return false;
5216
5217 if (hba->active_uic_cmd &&
5218 (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5219 hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5220 return false;
5221
5222 return true;
5223}
5224
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305225/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305226 * ufshcd_uic_cmd_compl - handle completion of uic command
5227 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305228 * @intr_status: interrupt status generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005229 *
5230 * Returns
5231 * IRQ_HANDLED - If interrupt is valid
5232 * IRQ_NONE - If invalid interrupt
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305233 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005234static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305235{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005236 irqreturn_t retval = IRQ_NONE;
5237
Can Guoa45f9372021-05-24 01:36:57 -07005238 spin_lock(hba->host->host_lock);
5239 if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5240 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5241
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305242 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305243 hba->active_uic_cmd->argument2 |=
5244 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05305245 hba->active_uic_cmd->argument3 =
5246 ufshcd_get_dme_attr_val(hba);
Can Guo0f52fcb92020-11-02 22:24:40 -08005247 if (!hba->uic_async_done)
5248 hba->active_uic_cmd->cmd_active = 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305249 complete(&hba->active_uic_cmd->done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005250 retval = IRQ_HANDLED;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305251 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305252
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005253 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
Can Guo0f52fcb92020-11-02 22:24:40 -08005254 hba->active_uic_cmd->cmd_active = 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005255 complete(hba->uic_async_done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005256 retval = IRQ_HANDLED;
5257 }
Stanley Chuaa5c6972020-06-15 15:22:35 +08005258
5259 if (retval == IRQ_HANDLED)
5260 ufshcd_add_uic_command_trace(hba, hba->active_uic_cmd,
Bean Huo28fa68f2021-01-05 12:34:42 +01005261 UFS_CMD_COMP);
Can Guoa45f9372021-05-24 01:36:57 -07005262 spin_unlock(hba->host->host_lock);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005263 return retval;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305264}
5265
5266/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005267 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305268 * @hba: per adapter instance
Bart Van Assche73dc3c42021-07-21 20:34:38 -07005269 * @completed_reqs: bitmask that indicates which requests to complete
5270 * @retry_requests: whether to ask the SCSI core to retry completed requests
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305271 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005272static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
Bart Van Assche73dc3c42021-07-21 20:34:38 -07005273 unsigned long completed_reqs,
5274 bool retry_requests)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305275{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305276 struct ufshcd_lrb *lrbp;
5277 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305278 int result;
5279 int index;
Can Guo7a7e66c2020-12-02 04:04:02 -08005280 bool update_scaling = false;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005281
Dolev Ravive9d501b2014-07-01 12:22:37 +03005282 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
5283 lrbp = &hba->lrb[index];
Stanley Chua3170372020-07-06 14:07:06 +08005284 lrbp->compl_time_stamp = ktime_get();
Dolev Ravive9d501b2014-07-01 12:22:37 +03005285 cmd = lrbp->cmd;
5286 if (cmd) {
Can Guo1d8613a2021-04-21 19:28:39 -07005287 if (unlikely(ufshcd_should_inform_monitor(hba, lrbp)))
5288 ufshcd_update_monitor(hba, lrbp);
Bean Huo28fa68f2021-01-05 12:34:42 +01005289 ufshcd_add_command_trace(hba, index, UFS_CMD_COMP);
Bart Van Assche73dc3c42021-07-21 20:34:38 -07005290 result = retry_requests ? DID_BUS_BUSY << 16 :
5291 ufshcd_transfer_rsp_status(hba, lrbp);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005292 scsi_dma_unmap(cmd);
5293 cmd->result = result;
5294 /* Mark completed command as NULL in LRB */
5295 lrbp->cmd = NULL;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005296 /* Do not touch lrbp after scsi done */
5297 cmd->scsi_done(cmd);
Can Guoa45f9372021-05-24 01:36:57 -07005298 ufshcd_release(hba);
Can Guo7a7e66c2020-12-02 04:04:02 -08005299 update_scaling = true;
Joao Pinto300bb132016-05-11 12:21:27 +01005300 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
5301 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08005302 if (hba->dev_cmd.complete) {
5303 ufshcd_add_command_trace(hba, index,
Bean Huo28fa68f2021-01-05 12:34:42 +01005304 UFS_DEV_COMP);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005305 complete(hba->dev_cmd.complete);
Can Guo7a7e66c2020-12-02 04:04:02 -08005306 update_scaling = true;
Lee Susman1a07f2d2016-12-22 18:42:03 -08005307 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03005308 }
Can Guoa45f9372021-05-24 01:36:57 -07005309 if (update_scaling)
5310 ufshcd_clk_scaling_update_busy(hba);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005311 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305312}
5313
5314/**
Bart Van Assche1f522c52021-07-21 20:34:32 -07005315 * ufshcd_transfer_req_compl - handle SCSI and query command completion
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005316 * @hba: per adapter instance
Bart Van Assche73dc3c42021-07-21 20:34:38 -07005317 * @retry_requests: whether or not to ask to retry requests
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005318 *
5319 * Returns
5320 * IRQ_HANDLED - If interrupt is valid
5321 * IRQ_NONE - If invalid interrupt
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005322 */
Bart Van Assche73dc3c42021-07-21 20:34:38 -07005323static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba,
5324 bool retry_requests)
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005325{
Bart Van Assche1f522c52021-07-21 20:34:32 -07005326 unsigned long completed_reqs, flags;
5327 u32 tr_doorbell;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005328
5329 /* Resetting interrupt aggregation counters first and reading the
5330 * DOOR_BELL afterward allows us to handle all the completed requests.
5331 * In order to prevent other interrupts starvation the DB is read once
5332 * after reset. The down side of this solution is the possibility of
5333 * false interrupt if device completes another request after resetting
5334 * aggregation and before reading the DB.
5335 */
Alim Akhtarb638b5e2020-05-28 06:46:50 +05305336 if (ufshcd_is_intr_aggr_allowed(hba) &&
5337 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005338 ufshcd_reset_intr_aggr(hba);
5339
Bart Van Asschec11a1ae2021-07-21 20:34:39 -07005340 if (ufs_fail_completion())
5341 return IRQ_HANDLED;
5342
Bart Van Assche169f5eb2021-07-21 20:34:34 -07005343 spin_lock_irqsave(&hba->outstanding_lock, flags);
Bart Van Assche1f522c52021-07-21 20:34:32 -07005344 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Bart Van Assche169f5eb2021-07-21 20:34:34 -07005345 completed_reqs = ~tr_doorbell & hba->outstanding_reqs;
5346 WARN_ONCE(completed_reqs & ~hba->outstanding_reqs,
5347 "completed: %#lx; outstanding: %#lx\n", completed_reqs,
5348 hba->outstanding_reqs);
5349 hba->outstanding_reqs &= ~completed_reqs;
5350 spin_unlock_irqrestore(&hba->outstanding_lock, flags);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005351
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005352 if (completed_reqs) {
Bart Van Assche73dc3c42021-07-21 20:34:38 -07005353 __ufshcd_transfer_req_compl(hba, completed_reqs,
5354 retry_requests);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005355 return IRQ_HANDLED;
5356 } else {
5357 return IRQ_NONE;
5358 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005359}
5360
Adrian Hunter7deedfd2021-02-09 08:24:37 +02005361int __ufshcd_write_ee_control(struct ufs_hba *hba, u32 ee_ctrl_mask)
Adrian Huntercd469472021-02-09 08:24:36 +02005362{
5363 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
5364 QUERY_ATTR_IDN_EE_CONTROL, 0, 0,
5365 &ee_ctrl_mask);
5366}
5367
Adrian Hunter7deedfd2021-02-09 08:24:37 +02005368int ufshcd_write_ee_control(struct ufs_hba *hba)
Adrian Huntercd469472021-02-09 08:24:36 +02005369{
5370 int err;
5371
5372 mutex_lock(&hba->ee_ctrl_mutex);
5373 err = __ufshcd_write_ee_control(hba, hba->ee_ctrl_mask);
5374 mutex_unlock(&hba->ee_ctrl_mutex);
5375 if (err)
5376 dev_err(hba->dev, "%s: failed to write ee control %d\n",
5377 __func__, err);
5378 return err;
5379}
5380
5381int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask, u16 *other_mask,
5382 u16 set, u16 clr)
5383{
5384 u16 new_mask, ee_ctrl_mask;
5385 int err = 0;
5386
5387 mutex_lock(&hba->ee_ctrl_mutex);
5388 new_mask = (*mask & ~clr) | set;
5389 ee_ctrl_mask = new_mask | *other_mask;
5390 if (ee_ctrl_mask != hba->ee_ctrl_mask)
5391 err = __ufshcd_write_ee_control(hba, ee_ctrl_mask);
5392 /* Still need to update 'mask' even if 'ee_ctrl_mask' was unchanged */
5393 if (!err) {
5394 hba->ee_ctrl_mask = ee_ctrl_mask;
5395 *mask = new_mask;
5396 }
5397 mutex_unlock(&hba->ee_ctrl_mutex);
5398 return err;
5399}
5400
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005401/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305402 * ufshcd_disable_ee - disable exception event
5403 * @hba: per-adapter instance
5404 * @mask: exception event to disable
5405 *
5406 * Disables exception event in the device so that the EVENT_ALERT
5407 * bit is not set.
5408 *
5409 * Returns zero on success, non-zero error value on failure.
5410 */
Adrian Huntercd469472021-02-09 08:24:36 +02005411static inline int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305412{
Adrian Huntercd469472021-02-09 08:24:36 +02005413 return ufshcd_update_ee_drv_mask(hba, 0, mask);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305414}
5415
5416/**
5417 * ufshcd_enable_ee - enable exception event
5418 * @hba: per-adapter instance
5419 * @mask: exception event to enable
5420 *
5421 * Enable corresponding exception event in the device to allow
5422 * device to alert host in critical scenarios.
5423 *
5424 * Returns zero on success, non-zero error value on failure.
5425 */
Adrian Huntercd469472021-02-09 08:24:36 +02005426static inline int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305427{
Adrian Huntercd469472021-02-09 08:24:36 +02005428 return ufshcd_update_ee_drv_mask(hba, mask, 0);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305429}
5430
5431/**
5432 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
5433 * @hba: per-adapter instance
5434 *
5435 * Allow device to manage background operations on its own. Enabling
5436 * this might lead to inconsistent latencies during normal data transfers
5437 * as the device is allowed to manage its own way of handling background
5438 * operations.
5439 *
5440 * Returns zero on success, non-zero on failure.
5441 */
5442static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
5443{
5444 int err = 0;
5445
5446 if (hba->auto_bkops_enabled)
5447 goto out;
5448
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005449 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08005450 QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305451 if (err) {
5452 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
5453 __func__, err);
5454 goto out;
5455 }
5456
5457 hba->auto_bkops_enabled = true;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08005458 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305459
5460 /* No need of URGENT_BKOPS exception from the device */
5461 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5462 if (err)
5463 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
5464 __func__, err);
5465out:
5466 return err;
5467}
5468
5469/**
5470 * ufshcd_disable_auto_bkops - block device in doing background operations
5471 * @hba: per-adapter instance
5472 *
5473 * Disabling background operations improves command response latency but
5474 * has drawback of device moving into critical state where the device is
5475 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
5476 * host is idle so that BKOPS are managed effectively without any negative
5477 * impacts.
5478 *
5479 * Returns zero on success, non-zero on failure.
5480 */
5481static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5482{
5483 int err = 0;
5484
5485 if (!hba->auto_bkops_enabled)
5486 goto out;
5487
5488 /*
5489 * If host assisted BKOPs is to be enabled, make sure
5490 * urgent bkops exception is allowed.
5491 */
5492 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5493 if (err) {
5494 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5495 __func__, err);
5496 goto out;
5497 }
5498
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005499 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08005500 QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305501 if (err) {
5502 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5503 __func__, err);
5504 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5505 goto out;
5506 }
5507
5508 hba->auto_bkops_enabled = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08005509 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
Asutosh Das24366c2a2019-11-25 22:53:30 -08005510 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305511out:
5512 return err;
5513}
5514
5515/**
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005516 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305517 * @hba: per adapter instance
5518 *
5519 * After a device reset the device may toggle the BKOPS_EN flag
5520 * to default value. The s/w tracking variables should be updated
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005521 * as well. This function would change the auto-bkops state based on
5522 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305523 */
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005524static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305525{
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005526 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5527 hba->auto_bkops_enabled = false;
5528 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5529 ufshcd_enable_auto_bkops(hba);
5530 } else {
5531 hba->auto_bkops_enabled = true;
5532 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5533 ufshcd_disable_auto_bkops(hba);
5534 }
Stanley Chu7b6668d2020-05-30 22:12:00 +08005535 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
Asutosh Das24366c2a2019-11-25 22:53:30 -08005536 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305537}
5538
5539static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5540{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005541 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305542 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5543}
5544
5545/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005546 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5547 * @hba: per-adapter instance
5548 * @status: bkops_status value
5549 *
5550 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5551 * flag in the device to permit background operations if the device
5552 * bkops_status is greater than or equal to "status" argument passed to
5553 * this function, disable otherwise.
5554 *
5555 * Returns 0 for success, non-zero in case of failure.
5556 *
5557 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5558 * to know whether auto bkops is enabled or disabled after this function
5559 * returns control to it.
5560 */
5561static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5562 enum bkops_status status)
5563{
5564 int err;
5565 u32 curr_status = 0;
5566
5567 err = ufshcd_get_bkops_status(hba, &curr_status);
5568 if (err) {
5569 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5570 __func__, err);
5571 goto out;
5572 } else if (curr_status > BKOPS_STATUS_MAX) {
5573 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5574 __func__, curr_status);
5575 err = -EINVAL;
5576 goto out;
5577 }
5578
5579 if (curr_status >= status)
5580 err = ufshcd_enable_auto_bkops(hba);
5581 else
5582 err = ufshcd_disable_auto_bkops(hba);
5583out:
5584 return err;
5585}
5586
5587/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305588 * ufshcd_urgent_bkops - handle urgent bkops exception event
5589 * @hba: per-adapter instance
5590 *
5591 * Enable fBackgroundOpsEn flag in the device to permit background
5592 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005593 *
5594 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5595 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305596 */
5597static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5598{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005599 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305600}
5601
5602static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5603{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005604 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305605 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5606}
5607
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005608static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5609{
5610 int err;
5611 u32 curr_status = 0;
5612
5613 if (hba->is_urgent_bkops_lvl_checked)
5614 goto enable_auto_bkops;
5615
5616 err = ufshcd_get_bkops_status(hba, &curr_status);
5617 if (err) {
5618 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5619 __func__, err);
5620 goto out;
5621 }
5622
5623 /*
5624 * We are seeing that some devices are raising the urgent bkops
5625 * exception events even when BKOPS status doesn't indicate performace
5626 * impacted or critical. Handle these device by determining their urgent
5627 * bkops status at runtime.
5628 */
5629 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5630 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5631 __func__, curr_status);
5632 /* update the current status as the urgent bkops level */
5633 hba->urgent_bkops_lvl = curr_status;
5634 hba->is_urgent_bkops_lvl_checked = true;
5635 }
5636
5637enable_auto_bkops:
5638 err = ufshcd_enable_auto_bkops(hba);
5639out:
5640 if (err < 0)
5641 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5642 __func__, err);
5643}
5644
Avri Altman322c4b22021-09-15 09:04:07 +03005645static void ufshcd_temp_exception_event_handler(struct ufs_hba *hba, u16 status)
5646{
5647 u32 value;
5648
5649 if (ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5650 QUERY_ATTR_IDN_CASE_ROUGH_TEMP, 0, 0, &value))
5651 return;
5652
5653 dev_info(hba->dev, "exception Tcase %d\n", value - 80);
5654
5655 ufs_hwmon_notify_event(hba, status & MASK_EE_URGENT_TEMP);
5656
5657 /*
5658 * A placeholder for the platform vendors to add whatever additional
5659 * steps required
5660 */
5661}
5662
Yue Hu3b5f3c02021-03-18 17:55:36 +08005663static int __ufshcd_wb_toggle(struct ufs_hba *hba, bool set, enum flag_idn idn)
5664{
5665 u8 index;
5666 enum query_opcode opcode = set ? UPIU_QUERY_OPCODE_SET_FLAG :
5667 UPIU_QUERY_OPCODE_CLEAR_FLAG;
5668
5669 index = ufshcd_wb_get_query_index(hba);
5670 return ufshcd_query_flag_retry(hba, opcode, idn, index, NULL);
5671}
5672
5673int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable)
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005674{
5675 int ret;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005676
Stanley Chu79e35202020-05-08 16:01:15 +08005677 if (!ufshcd_is_wb_allowed(hba))
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005678 return 0;
5679
Bean Huo4cd48992021-01-19 17:38:46 +01005680 if (!(enable ^ hba->dev_info.wb_enabled))
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005681 return 0;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005682
Yue Hu3b5f3c02021-03-18 17:55:36 +08005683 ret = __ufshcd_wb_toggle(hba, enable, QUERY_FLAG_IDN_WB_EN);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005684 if (ret) {
Yue Hu3b5f3c02021-03-18 17:55:36 +08005685 dev_err(hba->dev, "%s Write Booster %s failed %d\n",
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005686 __func__, enable ? "enable" : "disable", ret);
5687 return ret;
5688 }
5689
Bean Huo4cd48992021-01-19 17:38:46 +01005690 hba->dev_info.wb_enabled = enable;
Yue Hu3b5f3c02021-03-18 17:55:36 +08005691 dev_info(hba->dev, "%s Write Booster %s\n",
5692 __func__, enable ? "enabled" : "disabled");
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005693
5694 return ret;
5695}
5696
Yue Hu3b5f3c02021-03-18 17:55:36 +08005697static void ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set)
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005698{
Bean Huod3ba6222021-01-21 19:57:36 +01005699 int ret;
Yue Hu3b5f3c02021-03-18 17:55:36 +08005700
5701 ret = __ufshcd_wb_toggle(hba, set,
5702 QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8);
5703 if (ret) {
5704 dev_err(hba->dev, "%s: WB-Buf Flush during H8 %s failed: %d\n",
5705 __func__, set ? "enable" : "disable", ret);
5706 return;
5707 }
5708 dev_dbg(hba->dev, "%s WB-Buf Flush during H8 %s\n",
5709 __func__, set ? "enabled" : "disabled");
5710}
5711
5712static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable)
5713{
5714 int ret;
Bean Huod3ba6222021-01-21 19:57:36 +01005715
5716 if (!ufshcd_is_wb_allowed(hba) ||
5717 hba->dev_info.wb_buf_flush_enabled == enable)
Yue Hu3b5f3c02021-03-18 17:55:36 +08005718 return;
Bean Huod3ba6222021-01-21 19:57:36 +01005719
Yue Hu3b5f3c02021-03-18 17:55:36 +08005720 ret = __ufshcd_wb_toggle(hba, enable, QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005721 if (ret) {
Bean Huod3ba6222021-01-21 19:57:36 +01005722 dev_err(hba->dev, "%s WB-Buf Flush %s failed %d\n", __func__,
5723 enable ? "enable" : "disable", ret);
Yue Hu3b5f3c02021-03-18 17:55:36 +08005724 return;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005725 }
5726
Bean Huod3ba6222021-01-21 19:57:36 +01005727 hba->dev_info.wb_buf_flush_enabled = enable;
5728
Yue Hu3b5f3c02021-03-18 17:55:36 +08005729 dev_dbg(hba->dev, "%s WB-Buf Flush %s\n",
5730 __func__, enable ? "enabled" : "disabled");
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005731}
5732
5733static bool ufshcd_wb_presrv_usrspc_keep_vcc_on(struct ufs_hba *hba,
5734 u32 avail_buf)
5735{
5736 u32 cur_buf;
5737 int ret;
Stanley Chue31011a2020-05-22 16:32:11 +08005738 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005739
Stanley Chue31011a2020-05-22 16:32:11 +08005740 index = ufshcd_wb_get_query_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005741 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5742 QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE,
Stanley Chue31011a2020-05-22 16:32:11 +08005743 index, 0, &cur_buf);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005744 if (ret) {
5745 dev_err(hba->dev, "%s dCurWriteBoosterBufferSize read failed %d\n",
5746 __func__, ret);
5747 return false;
5748 }
5749
5750 if (!cur_buf) {
5751 dev_info(hba->dev, "dCurWBBuf: %d WB disabled until free-space is available\n",
5752 cur_buf);
5753 return false;
5754 }
Stanley Chud14734ae2020-05-09 17:37:15 +08005755 /* Let it continue to flush when available buffer exceeds threshold */
5756 if (avail_buf < hba->vps->wb_flush_threshold)
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005757 return true;
5758
5759 return false;
5760}
5761
Stanley Chu51dd9052020-05-22 16:32:12 +08005762static bool ufshcd_wb_need_flush(struct ufs_hba *hba)
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005763{
5764 int ret;
5765 u32 avail_buf;
Stanley Chue31011a2020-05-22 16:32:11 +08005766 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005767
Stanley Chu79e35202020-05-08 16:01:15 +08005768 if (!ufshcd_is_wb_allowed(hba))
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005769 return false;
5770 /*
5771 * The ufs device needs the vcc to be ON to flush.
5772 * With user-space reduction enabled, it's enough to enable flush
5773 * by checking only the available buffer. The threshold
5774 * defined here is > 90% full.
5775 * With user-space preserved enabled, the current-buffer
5776 * should be checked too because the wb buffer size can reduce
5777 * when disk tends to be full. This info is provided by current
5778 * buffer (dCurrentWriteBoosterBufferSize). There's no point in
5779 * keeping vcc on when current buffer is empty.
5780 */
Stanley Chue31011a2020-05-22 16:32:11 +08005781 index = ufshcd_wb_get_query_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005782 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5783 QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE,
Stanley Chue31011a2020-05-22 16:32:11 +08005784 index, 0, &avail_buf);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005785 if (ret) {
5786 dev_warn(hba->dev, "%s dAvailableWriteBoosterBufferSize read failed %d\n",
5787 __func__, ret);
5788 return false;
5789 }
5790
5791 if (!hba->dev_info.b_presrv_uspc_en) {
Stanley Chud14734ae2020-05-09 17:37:15 +08005792 if (avail_buf <= UFS_WB_BUF_REMAIN_PERCENT(10))
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005793 return true;
5794 return false;
5795 }
5796
5797 return ufshcd_wb_presrv_usrspc_keep_vcc_on(hba, avail_buf);
5798}
5799
Stanley Chu51dd9052020-05-22 16:32:12 +08005800static void ufshcd_rpm_dev_flush_recheck_work(struct work_struct *work)
5801{
5802 struct ufs_hba *hba = container_of(to_delayed_work(work),
5803 struct ufs_hba,
5804 rpm_dev_flush_recheck_work);
5805 /*
5806 * To prevent unnecessary VCC power drain after device finishes
5807 * WriteBooster buffer flush or Auto BKOPs, force runtime resume
5808 * after a certain delay to recheck the threshold by next runtime
5809 * suspend.
5810 */
Asutosh Dasb294ff32021-04-23 17:20:16 -07005811 ufshcd_rpm_get_sync(hba);
5812 ufshcd_rpm_put_sync(hba);
Stanley Chu51dd9052020-05-22 16:32:12 +08005813}
5814
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305815/**
5816 * ufshcd_exception_event_handler - handle exceptions raised by device
5817 * @work: pointer to work data
5818 *
5819 * Read bExceptionEventStatus attribute from the device and handle the
5820 * exception event accordingly.
5821 */
5822static void ufshcd_exception_event_handler(struct work_struct *work)
5823{
5824 struct ufs_hba *hba;
5825 int err;
5826 u32 status = 0;
5827 hba = container_of(work, struct ufs_hba, eeh_work);
5828
Stanley Chu03e1d282019-12-24 21:01:05 +08005829 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305830 err = ufshcd_get_ee_status(hba, &status);
5831 if (err) {
5832 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5833 __func__, err);
5834 goto out;
5835 }
5836
Adrian Hunterf7733622021-02-09 08:24:34 +02005837 trace_ufshcd_exception_event(dev_name(hba->dev), status);
5838
Adrian Huntercd469472021-02-09 08:24:36 +02005839 if (status & hba->ee_drv_mask & MASK_EE_URGENT_BKOPS)
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005840 ufshcd_bkops_exception_event_handler(hba);
5841
Avri Altman322c4b22021-09-15 09:04:07 +03005842 if (status & hba->ee_drv_mask & MASK_EE_URGENT_TEMP)
5843 ufshcd_temp_exception_event_handler(hba, status);
5844
Adrian Hunter7deedfd2021-02-09 08:24:37 +02005845 ufs_debugfs_exception_event(hba, status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305846out:
Stanley Chu03e1d282019-12-24 21:01:05 +08005847 ufshcd_scsi_unblock_requests(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305848}
5849
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005850/* Complete requests that have door-bell cleared */
5851static void ufshcd_complete_requests(struct ufs_hba *hba)
5852{
Bart Van Assche73dc3c42021-07-21 20:34:38 -07005853 ufshcd_transfer_req_compl(hba, /*retry_requests=*/false);
5854 ufshcd_tmc_handler(hba);
5855}
5856
5857static void ufshcd_retry_aborted_requests(struct ufs_hba *hba)
5858{
5859 ufshcd_transfer_req_compl(hba, /*retry_requests=*/true);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005860 ufshcd_tmc_handler(hba);
5861}
5862
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305863/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02005864 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5865 * to recover from the DL NAC errors or not.
5866 * @hba: per-adapter instance
5867 *
5868 * Returns true if error handling is required, false otherwise
5869 */
5870static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5871{
5872 unsigned long flags;
5873 bool err_handling = true;
5874
5875 spin_lock_irqsave(hba->host->host_lock, flags);
5876 /*
5877 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5878 * device fatal error and/or DL NAC & REPLAY timeout errors.
5879 */
5880 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5881 goto out;
5882
5883 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5884 ((hba->saved_err & UIC_ERROR) &&
5885 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5886 goto out;
5887
5888 if ((hba->saved_err & UIC_ERROR) &&
5889 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5890 int err;
5891 /*
5892 * wait for 50ms to see if we can get any other errors or not.
5893 */
5894 spin_unlock_irqrestore(hba->host->host_lock, flags);
5895 msleep(50);
5896 spin_lock_irqsave(hba->host->host_lock, flags);
5897
5898 /*
5899 * now check if we have got any other severe errors other than
5900 * DL NAC error?
5901 */
5902 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5903 ((hba->saved_err & UIC_ERROR) &&
5904 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5905 goto out;
5906
5907 /*
5908 * As DL NAC is the only error received so far, send out NOP
5909 * command to confirm if link is still active or not.
5910 * - If we don't get any response then do error recovery.
5911 * - If we get response then clear the DL NAC error bit.
5912 */
5913
5914 spin_unlock_irqrestore(hba->host->host_lock, flags);
5915 err = ufshcd_verify_dev_init(hba);
5916 spin_lock_irqsave(hba->host->host_lock, flags);
5917
5918 if (err)
5919 goto out;
5920
5921 /* Link seems to be alive hence ignore the DL NAC errors */
5922 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5923 hba->saved_err &= ~UIC_ERROR;
5924 /* clear NAC error */
5925 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
Bean Huob0008622020-08-14 11:50:34 +02005926 if (!hba->saved_uic_err)
Yaniv Gardi583fa622016-03-10 17:37:13 +02005927 err_handling = false;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005928 }
5929out:
5930 spin_unlock_irqrestore(hba->host->host_lock, flags);
5931 return err_handling;
5932}
5933
Stanley Chu348e1bc2021-01-20 23:01:42 +08005934static void ufshcd_clk_scaling_allow(struct ufs_hba *hba, bool allow)
5935{
5936 down_write(&hba->clk_scaling_lock);
5937 hba->clk_scaling.is_allowed = allow;
5938 up_write(&hba->clk_scaling_lock);
5939}
5940
5941static void ufshcd_clk_scaling_suspend(struct ufs_hba *hba, bool suspend)
5942{
5943 if (suspend) {
5944 if (hba->clk_scaling.is_enabled)
5945 ufshcd_suspend_clkscaling(hba);
5946 ufshcd_clk_scaling_allow(hba, false);
5947 } else {
5948 ufshcd_clk_scaling_allow(hba, true);
5949 if (hba->clk_scaling.is_enabled)
5950 ufshcd_resume_clkscaling(hba);
5951 }
5952}
5953
Can Guoc72e79c2020-08-09 05:15:52 -07005954static void ufshcd_err_handling_prepare(struct ufs_hba *hba)
5955{
Asutosh Dasb294ff32021-04-23 17:20:16 -07005956 ufshcd_rpm_get_sync(hba);
5957 if (pm_runtime_status_suspended(&hba->sdev_ufs_device->sdev_gendev) ||
5958 hba->is_sys_suspended) {
Can Guo88a92d62020-12-02 04:04:01 -08005959 enum ufs_pm_op pm_op;
5960
Can Guoc72e79c2020-08-09 05:15:52 -07005961 /*
Asutosh Dasb294ff32021-04-23 17:20:16 -07005962 * Don't assume anything of resume, if
Can Guoc72e79c2020-08-09 05:15:52 -07005963 * resume fails, irq and clocks can be OFF, and powers
5964 * can be OFF or in LPM.
5965 */
5966 ufshcd_setup_hba_vreg(hba, true);
5967 ufshcd_enable_irq(hba);
5968 ufshcd_setup_vreg(hba, true);
5969 ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
5970 ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
5971 ufshcd_hold(hba, false);
5972 if (!ufshcd_is_clkgating_allowed(hba))
5973 ufshcd_setup_clocks(hba, true);
5974 ufshcd_release(hba);
Can Guo88a92d62020-12-02 04:04:01 -08005975 pm_op = hba->is_sys_suspended ? UFS_SYSTEM_PM : UFS_RUNTIME_PM;
5976 ufshcd_vops_resume(hba, pm_op);
Can Guoc72e79c2020-08-09 05:15:52 -07005977 } else {
5978 ufshcd_hold(hba, false);
Stanley Chu348e1bc2021-01-20 23:01:42 +08005979 if (ufshcd_is_clkscaling_supported(hba) &&
5980 hba->clk_scaling.is_enabled)
Can Guoc72e79c2020-08-09 05:15:52 -07005981 ufshcd_suspend_clkscaling(hba);
Stanley Chu348e1bc2021-01-20 23:01:42 +08005982 ufshcd_clk_scaling_allow(hba, false);
Can Guoc72e79c2020-08-09 05:15:52 -07005983 }
Can Guoaa53f582021-02-23 21:36:47 -08005984 ufshcd_scsi_block_requests(hba);
5985 /* Drain ufshcd_queuecommand() */
5986 down_write(&hba->clk_scaling_lock);
5987 up_write(&hba->clk_scaling_lock);
5988 cancel_work_sync(&hba->eeh_work);
Can Guoc72e79c2020-08-09 05:15:52 -07005989}
5990
5991static void ufshcd_err_handling_unprepare(struct ufs_hba *hba)
5992{
Can Guoaa53f582021-02-23 21:36:47 -08005993 ufshcd_scsi_unblock_requests(hba);
Can Guoc72e79c2020-08-09 05:15:52 -07005994 ufshcd_release(hba);
Stanley Chu348e1bc2021-01-20 23:01:42 +08005995 if (ufshcd_is_clkscaling_supported(hba))
5996 ufshcd_clk_scaling_suspend(hba, false);
Asutosh Dasb294ff32021-04-23 17:20:16 -07005997 ufshcd_rpm_put(hba);
Can Guoc72e79c2020-08-09 05:15:52 -07005998}
5999
6000static inline bool ufshcd_err_handling_should_stop(struct ufs_hba *hba)
6001{
Can Guo9cd20d32021-01-13 19:13:28 -08006002 return (!hba->is_powered || hba->shutting_down ||
Asutosh Dasb294ff32021-04-23 17:20:16 -07006003 !hba->sdev_ufs_device ||
Can Guo9cd20d32021-01-13 19:13:28 -08006004 hba->ufshcd_state == UFSHCD_STATE_ERROR ||
Can Guoc72e79c2020-08-09 05:15:52 -07006005 (!(hba->saved_err || hba->saved_uic_err || hba->force_reset ||
Can Guo9cd20d32021-01-13 19:13:28 -08006006 ufshcd_is_link_broken(hba))));
Can Guoc72e79c2020-08-09 05:15:52 -07006007}
6008
6009#ifdef CONFIG_PM
6010static void ufshcd_recover_pm_error(struct ufs_hba *hba)
6011{
6012 struct Scsi_Host *shost = hba->host;
6013 struct scsi_device *sdev;
6014 struct request_queue *q;
6015 int ret;
6016
Can Guo88a92d62020-12-02 04:04:01 -08006017 hba->is_sys_suspended = false;
Can Guoc72e79c2020-08-09 05:15:52 -07006018 /*
Asutosh Dasb294ff32021-04-23 17:20:16 -07006019 * Set RPM status of wlun device to RPM_ACTIVE,
Can Guoc72e79c2020-08-09 05:15:52 -07006020 * this also clears its runtime error.
6021 */
Asutosh Dasb294ff32021-04-23 17:20:16 -07006022 ret = pm_runtime_set_active(&hba->sdev_ufs_device->sdev_gendev);
6023
6024 /* hba device might have a runtime error otherwise */
6025 if (ret)
6026 ret = pm_runtime_set_active(hba->dev);
Can Guoc72e79c2020-08-09 05:15:52 -07006027 /*
Asutosh Dasb294ff32021-04-23 17:20:16 -07006028 * If wlun device had runtime error, we also need to resume those
6029 * consumer scsi devices in case any of them has failed to be
6030 * resumed due to supplier runtime resume failure. This is to unblock
Can Guoc72e79c2020-08-09 05:15:52 -07006031 * blk_queue_enter in case there are bios waiting inside it.
6032 */
6033 if (!ret) {
6034 shost_for_each_device(sdev, shost) {
6035 q = sdev->request_queue;
6036 if (q->dev && (q->rpm_status == RPM_SUSPENDED ||
6037 q->rpm_status == RPM_SUSPENDING))
6038 pm_request_resume(q->dev);
6039 }
6040 }
6041}
6042#else
6043static inline void ufshcd_recover_pm_error(struct ufs_hba *hba)
6044{
6045}
6046#endif
6047
Can Guo2355b662020-08-24 19:07:06 -07006048static bool ufshcd_is_pwr_mode_restore_needed(struct ufs_hba *hba)
6049{
6050 struct ufs_pa_layer_attr *pwr_info = &hba->pwr_info;
6051 u32 mode;
6052
6053 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_PWRMODE), &mode);
6054
6055 if (pwr_info->pwr_rx != ((mode >> PWRMODE_RX_OFFSET) & PWRMODE_MASK))
6056 return true;
6057
6058 if (pwr_info->pwr_tx != (mode & PWRMODE_MASK))
6059 return true;
6060
6061 return false;
6062}
6063
Yaniv Gardi583fa622016-03-10 17:37:13 +02006064/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306065 * ufshcd_err_handler - handle UFS errors that require s/w attention
Bart Van Asschea113eaa2021-07-21 20:34:37 -07006066 * @host: SCSI host pointer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306067 */
Bart Van Asschea113eaa2021-07-21 20:34:37 -07006068static void ufshcd_err_handler(struct Scsi_Host *host)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306069{
Bart Van Asschea113eaa2021-07-21 20:34:37 -07006070 struct ufs_hba *hba = shost_priv(host);
Adrian Hunter87bf6a62021-10-02 18:45:50 +03006071 int retries = MAX_ERR_HANDLER_RETRIES;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306072 unsigned long flags;
Adrian Hunter87bf6a62021-10-02 18:45:50 +03006073 bool needs_restore;
6074 bool needs_reset;
6075 bool err_xfer;
6076 bool err_tm;
6077 int pmc_err;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306078 int tag;
6079
Can Guo9cd20d32021-01-13 19:13:28 -08006080 down(&hba->host_sem);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306081 spin_lock_irqsave(hba->host->host_lock, flags);
Bart Van Asschea113eaa2021-07-21 20:34:37 -07006082 hba->host->host_eh_scheduled = 0;
Can Guoc72e79c2020-08-09 05:15:52 -07006083 if (ufshcd_err_handling_should_stop(hba)) {
Can Guo4db7a232020-08-09 05:15:51 -07006084 if (hba->ufshcd_state != UFSHCD_STATE_ERROR)
6085 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6086 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guo9cd20d32021-01-13 19:13:28 -08006087 up(&hba->host_sem);
Can Guo4db7a232020-08-09 05:15:51 -07006088 return;
6089 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306090 ufshcd_set_eh_in_progress(hba);
Can Guo4db7a232020-08-09 05:15:51 -07006091 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guoc72e79c2020-08-09 05:15:52 -07006092 ufshcd_err_handling_prepare(hba);
Can Guoa45f9372021-05-24 01:36:57 -07006093 /* Complete requests that have door-bell cleared by h/w */
6094 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306095 spin_lock_irqsave(hba->host->host_lock, flags);
Adrian Hunter87bf6a62021-10-02 18:45:50 +03006096again:
6097 needs_restore = false;
6098 needs_reset = false;
6099 err_xfer = false;
6100 err_tm = false;
6101
Can Guoaa53f582021-02-23 21:36:47 -08006102 if (hba->ufshcd_state != UFSHCD_STATE_ERROR)
6103 hba->ufshcd_state = UFSHCD_STATE_RESET;
Can Guo88a92d62020-12-02 04:04:01 -08006104 /*
6105 * A full reset and restore might have happened after preparation
6106 * is finished, double check whether we should stop.
6107 */
6108 if (ufshcd_err_handling_should_stop(hba))
6109 goto skip_err_handling;
6110
Yaniv Gardi583fa622016-03-10 17:37:13 +02006111 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
6112 bool ret;
6113
6114 spin_unlock_irqrestore(hba->host->host_lock, flags);
6115 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
6116 ret = ufshcd_quirk_dl_nac_errors(hba);
6117 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo88a92d62020-12-02 04:04:01 -08006118 if (!ret && ufshcd_err_handling_should_stop(hba))
Yaniv Gardi583fa622016-03-10 17:37:13 +02006119 goto skip_err_handling;
6120 }
Can Guo4db7a232020-08-09 05:15:51 -07006121
Can Guo2355b662020-08-24 19:07:06 -07006122 if ((hba->saved_err & (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK)) ||
6123 (hba->saved_uic_err &&
6124 (hba->saved_uic_err != UFSHCD_UIC_PA_GENERIC_ERROR))) {
Can Guoc3be8d1e2020-08-09 05:15:53 -07006125 bool pr_prdt = !!(hba->saved_err & SYSTEM_BUS_FATAL_ERROR);
6126
6127 spin_unlock_irqrestore(hba->host->host_lock, flags);
6128 ufshcd_print_host_state(hba);
6129 ufshcd_print_pwr_info(hba);
Stanley Chue965e5e2020-12-05 19:58:59 +08006130 ufshcd_print_evt_hist(hba);
Can Guoc3be8d1e2020-08-09 05:15:53 -07006131 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
6132 ufshcd_print_trs(hba, hba->outstanding_reqs, pr_prdt);
6133 spin_lock_irqsave(hba->host->host_lock, flags);
6134 }
6135
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006136 /*
6137 * if host reset is required then skip clearing the pending
Can Guo2df74b62019-11-25 22:53:33 -08006138 * transfers forcefully because they will get cleared during
6139 * host reset and restore
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006140 */
Can Guo88a92d62020-12-02 04:04:01 -08006141 if (hba->force_reset || ufshcd_is_link_broken(hba) ||
6142 ufshcd_is_saved_err_fatal(hba) ||
6143 ((hba->saved_err & UIC_ERROR) &&
6144 (hba->saved_uic_err & (UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
6145 UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))) {
6146 needs_reset = true;
Can Guo2355b662020-08-24 19:07:06 -07006147 goto do_reset;
Can Guo88a92d62020-12-02 04:04:01 -08006148 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006149
Can Guo2355b662020-08-24 19:07:06 -07006150 /*
6151 * If LINERESET was caught, UFS might have been put to PWM mode,
6152 * check if power mode restore is needed.
6153 */
6154 if (hba->saved_uic_err & UFSHCD_UIC_PA_GENERIC_ERROR) {
6155 hba->saved_uic_err &= ~UFSHCD_UIC_PA_GENERIC_ERROR;
6156 if (!hba->saved_uic_err)
6157 hba->saved_err &= ~UIC_ERROR;
6158 spin_unlock_irqrestore(hba->host->host_lock, flags);
6159 if (ufshcd_is_pwr_mode_restore_needed(hba))
6160 needs_restore = true;
6161 spin_lock_irqsave(hba->host->host_lock, flags);
6162 if (!hba->saved_err && !needs_restore)
6163 goto skip_err_handling;
6164 }
6165
6166 hba->silence_err_logs = true;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006167 /* release lock as clear command might sleep */
6168 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306169 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006170 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
Can Guo307348f2020-08-24 19:07:05 -07006171 if (ufshcd_try_to_abort_task(hba, tag)) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006172 err_xfer = true;
6173 goto lock_skip_pending_xfer_clear;
6174 }
6175 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306176
6177 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006178 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
6179 if (ufshcd_clear_tm_cmd(hba, tag)) {
6180 err_tm = true;
6181 goto lock_skip_pending_xfer_clear;
6182 }
6183 }
6184
6185lock_skip_pending_xfer_clear:
Bart Van Assche73dc3c42021-07-21 20:34:38 -07006186 ufshcd_retry_aborted_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306187
Can Guoa45f9372021-05-24 01:36:57 -07006188 spin_lock_irqsave(hba->host->host_lock, flags);
6189 hba->silence_err_logs = false;
Can Guo2355b662020-08-24 19:07:06 -07006190 if (err_xfer || err_tm) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006191 needs_reset = true;
Can Guo2355b662020-08-24 19:07:06 -07006192 goto do_reset;
6193 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006194
Can Guo2355b662020-08-24 19:07:06 -07006195 /*
6196 * After all reqs and tasks are cleared from doorbell,
6197 * now it is safe to retore power mode.
6198 */
6199 if (needs_restore) {
6200 spin_unlock_irqrestore(hba->host->host_lock, flags);
6201 /*
6202 * Hold the scaling lock just in case dev cmds
6203 * are sent via bsg and/or sysfs.
6204 */
6205 down_write(&hba->clk_scaling_lock);
6206 hba->force_pmc = true;
6207 pmc_err = ufshcd_config_pwr_mode(hba, &(hba->pwr_info));
6208 if (pmc_err) {
6209 needs_reset = true;
6210 dev_err(hba->dev, "%s: Failed to restore power mode, err = %d\n",
6211 __func__, pmc_err);
6212 }
6213 hba->force_pmc = false;
6214 ufshcd_print_pwr_info(hba);
6215 up_write(&hba->clk_scaling_lock);
6216 spin_lock_irqsave(hba->host->host_lock, flags);
6217 }
6218
6219do_reset:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306220 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006221 if (needs_reset) {
Adrian Hunter87bf6a62021-10-02 18:45:50 +03006222 int err;
6223
Can Guo4db7a232020-08-09 05:15:51 -07006224 hba->force_reset = false;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006225 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306226 err = ufshcd_reset_and_restore(hba);
Can Guo4db7a232020-08-09 05:15:51 -07006227 if (err)
6228 dev_err(hba->dev, "%s: reset and restore failed with err %d\n",
6229 __func__, err);
Can Guoc72e79c2020-08-09 05:15:52 -07006230 else
6231 ufshcd_recover_pm_error(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006232 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306233 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006234
Yaniv Gardi583fa622016-03-10 17:37:13 +02006235skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006236 if (!needs_reset) {
Can Guo4db7a232020-08-09 05:15:51 -07006237 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
6238 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006239 if (hba->saved_err || hba->saved_uic_err)
6240 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
6241 __func__, hba->saved_err, hba->saved_uic_err);
6242 }
Adrian Hunter87bf6a62021-10-02 18:45:50 +03006243 /* Exit in an operational state or dead */
6244 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL &&
6245 hba->ufshcd_state != UFSHCD_STATE_ERROR) {
6246 if (--retries)
6247 goto again;
6248 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6249 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306250 ufshcd_clear_eh_in_progress(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006251 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guoc72e79c2020-08-09 05:15:52 -07006252 ufshcd_err_handling_unprepare(hba);
Can Guo9cd20d32021-01-13 19:13:28 -08006253 up(&hba->host_sem);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306254}
6255
6256/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306257 * ufshcd_update_uic_error - check and set fatal UIC error flags.
6258 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006259 *
6260 * Returns
6261 * IRQ_HANDLED - If interrupt is valid
6262 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306263 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006264static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306265{
6266 u32 reg;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006267 irqreturn_t retval = IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306268
Can Guo2355b662020-08-24 19:07:06 -07006269 /* PHY layer error */
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08006270 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08006271 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
Can Guo2355b662020-08-24 19:07:06 -07006272 (reg & UIC_PHY_ADAPTER_LAYER_ERROR_CODE_MASK)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006273 ufshcd_update_evt_hist(hba, UFS_EVT_PA_ERR, reg);
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08006274 /*
6275 * To know whether this error is fatal or not, DB timeout
6276 * must be checked but this error is handled separately.
6277 */
Can Guo2355b662020-08-24 19:07:06 -07006278 if (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)
6279 dev_dbg(hba->dev, "%s: UIC Lane error reported\n",
6280 __func__);
6281
6282 /* Got a LINERESET indication. */
6283 if (reg & UIC_PHY_ADAPTER_LAYER_GENERIC_ERROR) {
6284 struct uic_command *cmd = NULL;
6285
6286 hba->uic_error |= UFSHCD_UIC_PA_GENERIC_ERROR;
6287 if (hba->uic_async_done && hba->active_uic_cmd)
6288 cmd = hba->active_uic_cmd;
6289 /*
6290 * Ignore the LINERESET during power mode change
6291 * operation via DME_SET command.
6292 */
6293 if (cmd && (cmd->command == UIC_CMD_DME_SET))
6294 hba->uic_error &= ~UFSHCD_UIC_PA_GENERIC_ERROR;
6295 }
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006296 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006297 }
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08006298
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306299 /* PA_INIT_ERROR is fatal and needs UIC reset */
6300 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006301 if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
6302 (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006303 ufshcd_update_evt_hist(hba, UFS_EVT_DL_ERR, reg);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006304
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006305 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
6306 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
6307 else if (hba->dev_quirks &
6308 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
6309 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
6310 hba->uic_error |=
6311 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
6312 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
6313 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
6314 }
6315 retval |= IRQ_HANDLED;
Yaniv Gardi583fa622016-03-10 17:37:13 +02006316 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306317
6318 /* UIC NL/TL/DME errors needs software retry */
6319 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006320 if ((reg & UIC_NETWORK_LAYER_ERROR) &&
6321 (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006322 ufshcd_update_evt_hist(hba, UFS_EVT_NL_ERR, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306323 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006324 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006325 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306326
6327 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006328 if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
6329 (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006330 ufshcd_update_evt_hist(hba, UFS_EVT_TL_ERR, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306331 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006332 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006333 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306334
6335 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006336 if ((reg & UIC_DME_ERROR) &&
6337 (reg & UIC_DME_ERROR_CODE_MASK)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006338 ufshcd_update_evt_hist(hba, UFS_EVT_DME_ERR, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306339 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006340 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006341 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306342
6343 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
6344 __func__, hba->uic_error);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006345 return retval;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306346}
6347
6348/**
6349 * ufshcd_check_errors - Check for errors that need s/w attention
6350 * @hba: per-adapter instance
Can Guoa45f9372021-05-24 01:36:57 -07006351 * @intr_status: interrupt status generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006352 *
6353 * Returns
6354 * IRQ_HANDLED - If interrupt is valid
6355 * IRQ_NONE - If invalid interrupt
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306356 */
Can Guoa45f9372021-05-24 01:36:57 -07006357static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba, u32 intr_status)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306358{
6359 bool queue_eh_work = false;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006360 irqreturn_t retval = IRQ_NONE;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306361
Can Guoa45f9372021-05-24 01:36:57 -07006362 spin_lock(hba->host->host_lock);
6363 hba->errors |= UFSHCD_ERROR_MASK & intr_status;
6364
Stanley Chud3c615b2019-07-10 21:38:19 +08006365 if (hba->errors & INT_FATAL_ERRORS) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006366 ufshcd_update_evt_hist(hba, UFS_EVT_FATAL_ERR,
6367 hba->errors);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306368 queue_eh_work = true;
Stanley Chud3c615b2019-07-10 21:38:19 +08006369 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306370
6371 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306372 hba->uic_error = 0;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006373 retval = ufshcd_update_uic_error(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306374 if (hba->uic_error)
6375 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306376 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306377
Stanley Chu82174442019-05-21 14:44:54 +08006378 if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
6379 dev_err(hba->dev,
6380 "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
6381 __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
6382 "Enter" : "Exit",
6383 hba->errors, ufshcd_get_upmcrs(hba));
Stanley Chue965e5e2020-12-05 19:58:59 +08006384 ufshcd_update_evt_hist(hba, UFS_EVT_AUTO_HIBERN8_ERR,
Stanley Chud3c615b2019-07-10 21:38:19 +08006385 hba->errors);
Can Guo4db7a232020-08-09 05:15:51 -07006386 ufshcd_set_link_broken(hba);
Stanley Chu82174442019-05-21 14:44:54 +08006387 queue_eh_work = true;
6388 }
6389
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306390 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006391 /*
6392 * update the transfer error masks to sticky bits, let's do this
6393 * irrespective of current ufshcd_state.
6394 */
6395 hba->saved_err |= hba->errors;
6396 hba->saved_uic_err |= hba->uic_error;
6397
Can Guo4db7a232020-08-09 05:15:51 -07006398 /* dump controller state before resetting */
Can Guoace38042020-12-02 04:04:03 -08006399 if ((hba->saved_err &
6400 (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK)) ||
Can Guo2355b662020-08-24 19:07:06 -07006401 (hba->saved_uic_err &&
6402 (hba->saved_uic_err != UFSHCD_UIC_PA_GENERIC_ERROR))) {
Can Guo4db7a232020-08-09 05:15:51 -07006403 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
Dolev Raviv66cc8202016-12-22 18:39:42 -08006404 __func__, hba->saved_err,
6405 hba->saved_uic_err);
Can Guoc3be8d1e2020-08-09 05:15:53 -07006406 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE,
6407 "host_regs: ");
Can Guo4db7a232020-08-09 05:15:51 -07006408 ufshcd_print_pwr_info(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306409 }
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006410 retval |= IRQ_HANDLED;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306411 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306412 /*
6413 * if (!queue_eh_work) -
6414 * Other errors are either non-fatal where host recovers
6415 * itself without s/w intervention or errors that will be
6416 * handled by the SCSI core layer.
6417 */
Can Guoa45f9372021-05-24 01:36:57 -07006418 hba->errors = 0;
6419 hba->uic_error = 0;
6420 spin_unlock(hba->host->host_lock);
Bart Van Asschea113eaa2021-07-21 20:34:37 -07006421
6422 if (queue_eh_work)
6423 ufshcd_schedule_eh(hba);
6424
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006425 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306426}
6427
Bart Van Assche69a6c262019-12-09 10:13:09 -08006428struct ctm_info {
6429 struct ufs_hba *hba;
6430 unsigned long pending;
6431 unsigned int ncpl;
6432};
6433
6434static bool ufshcd_compl_tm(struct request *req, void *priv, bool reserved)
6435{
6436 struct ctm_info *const ci = priv;
6437 struct completion *c;
6438
6439 WARN_ON_ONCE(reserved);
6440 if (test_bit(req->tag, &ci->pending))
6441 return true;
6442 ci->ncpl++;
6443 c = req->end_io_data;
6444 if (c)
6445 complete(c);
6446 return true;
6447}
6448
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306449/**
6450 * ufshcd_tmc_handler - handle task management function completion
6451 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006452 *
6453 * Returns
6454 * IRQ_HANDLED - If interrupt is valid
6455 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306456 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006457static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306458{
Can Guoa45f9372021-05-24 01:36:57 -07006459 unsigned long flags;
Bart Van Assche69a6c262019-12-09 10:13:09 -08006460 struct request_queue *q = hba->tmf_queue;
6461 struct ctm_info ci = {
6462 .hba = hba,
Bart Van Assche69a6c262019-12-09 10:13:09 -08006463 };
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306464
Can Guoa45f9372021-05-24 01:36:57 -07006465 spin_lock_irqsave(hba->host->host_lock, flags);
6466 ci.pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
Bart Van Assche69a6c262019-12-09 10:13:09 -08006467 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_compl_tm, &ci);
Can Guoa45f9372021-05-24 01:36:57 -07006468 spin_unlock_irqrestore(hba->host->host_lock, flags);
6469
Bart Van Assche69a6c262019-12-09 10:13:09 -08006470 return ci.ncpl ? IRQ_HANDLED : IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306471}
6472
6473/**
6474 * ufshcd_sl_intr - Interrupt service routine
6475 * @hba: per adapter instance
6476 * @intr_status: contains interrupts generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006477 *
6478 * Returns
6479 * IRQ_HANDLED - If interrupt is valid
6480 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306481 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006482static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306483{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006484 irqreturn_t retval = IRQ_NONE;
6485
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05306486 if (intr_status & UFSHCD_UIC_MASK)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006487 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306488
Can Guoa45f9372021-05-24 01:36:57 -07006489 if (intr_status & UFSHCD_ERROR_MASK || hba->errors)
6490 retval |= ufshcd_check_errors(hba, intr_status);
6491
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306492 if (intr_status & UTP_TASK_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006493 retval |= ufshcd_tmc_handler(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306494
6495 if (intr_status & UTP_TRANSFER_REQ_COMPL)
Bart Van Assche73dc3c42021-07-21 20:34:38 -07006496 retval |= ufshcd_transfer_req_compl(hba, /*retry_requests=*/false);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006497
6498 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306499}
6500
6501/**
6502 * ufshcd_intr - Main interrupt service routine
6503 * @irq: irq number
6504 * @__hba: pointer to adapter instance
6505 *
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006506 * Returns
6507 * IRQ_HANDLED - If interrupt is valid
6508 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306509 */
6510static irqreturn_t ufshcd_intr(int irq, void *__hba)
6511{
Adrian Hunter127d5f72020-08-11 16:39:36 +03006512 u32 intr_status, enabled_intr_status = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306513 irqreturn_t retval = IRQ_NONE;
6514 struct ufs_hba *hba = __hba;
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05306515 int retries = hba->nutrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306516
Seungwon Jeonb873a2752013-06-26 22:39:26 +05306517 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Can Guo3f8af602020-08-09 05:15:50 -07006518 hba->ufs_stats.last_intr_status = intr_status;
6519 hba->ufs_stats.last_intr_ts = ktime_get();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306520
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05306521 /*
6522 * There could be max of hba->nutrs reqs in flight and in worst case
6523 * if the reqs get finished 1 by 1 after the interrupt status is
6524 * read, make sure we handle them by checking the interrupt status
6525 * again in a loop until we process all of the reqs before returning.
6526 */
Adrian Hunter127d5f72020-08-11 16:39:36 +03006527 while (intr_status && retries--) {
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05306528 enabled_intr_status =
6529 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
Bean Huo60ec3752021-01-18 21:12:33 +01006530 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006531 if (enabled_intr_status)
6532 retval |= ufshcd_sl_intr(hba, enabled_intr_status);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02006533
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05306534 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Adrian Hunter127d5f72020-08-11 16:39:36 +03006535 }
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05306536
Jaegeuk Kimeeb1b552021-01-07 10:53:16 -08006537 if (enabled_intr_status && retval == IRQ_NONE &&
Bart Van Assche40d2fd02021-05-19 13:20:57 -07006538 (!(enabled_intr_status & UTP_TRANSFER_REQ_COMPL) ||
6539 hba->outstanding_reqs) && !ufshcd_eh_in_progress(hba)) {
Jaegeuk Kimeeb1b552021-01-07 10:53:16 -08006540 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x (0x%08x, 0x%08x)\n",
6541 __func__,
6542 intr_status,
6543 hba->ufs_stats.last_intr_status,
6544 enabled_intr_status);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006545 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
6546 }
6547
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306548 return retval;
6549}
6550
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306551static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
6552{
6553 int err = 0;
6554 u32 mask = 1 << tag;
6555 unsigned long flags;
6556
6557 if (!test_bit(tag, &hba->outstanding_tasks))
6558 goto out;
6559
6560 spin_lock_irqsave(hba->host->host_lock, flags);
Alim Akhtar1399c5b2018-05-06 15:44:15 +05306561 ufshcd_utmrl_clear(hba, tag);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306562 spin_unlock_irqrestore(hba->host->host_lock, flags);
6563
6564 /* poll for max. 1 sec to clear door bell register by h/w */
6565 err = ufshcd_wait_for_register(hba,
6566 REG_UTP_TASK_REQ_DOOR_BELL,
Bart Van Assche5cac1092020-05-07 15:27:50 -07006567 mask, 0, 1000, 1000);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306568out:
6569 return err;
6570}
6571
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006572static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
6573 struct utp_task_req_desc *treq, u8 tm_function)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306574{
Bart Van Assche69a6c262019-12-09 10:13:09 -08006575 struct request_queue *q = hba->tmf_queue;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006576 struct Scsi_Host *host = hba->host;
Bart Van Assche69a6c262019-12-09 10:13:09 -08006577 DECLARE_COMPLETION_ONSTACK(wait);
6578 struct request *req;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306579 unsigned long flags;
Can Guo4b42d5572021-04-01 00:39:09 -07006580 int task_tag, err;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306581
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306582 /*
Can Guo4b42d5572021-04-01 00:39:09 -07006583 * blk_get_request() is used here only to get a free tag.
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306584 */
Jaegeuk Kimeeb1b552021-01-07 10:53:16 -08006585 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
6586 if (IS_ERR(req))
6587 return PTR_ERR(req);
6588
Bart Van Assche69a6c262019-12-09 10:13:09 -08006589 req->end_io_data = &wait;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006590 ufshcd_hold(hba, false);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306591
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306592 spin_lock_irqsave(host->host_lock, flags);
Can Guo1235fc52021-04-01 00:39:08 -07006593 blk_mq_start_request(req);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306594
Can Guo4b42d5572021-04-01 00:39:09 -07006595 task_tag = req->tag;
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -05006596 treq->upiu_req.req_header.dword_0 |= cpu_to_be32(task_tag);
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006597
Can Guo4b42d5572021-04-01 00:39:09 -07006598 memcpy(hba->utmrdl_base_addr + task_tag, treq, sizeof(*treq));
6599 ufshcd_vops_setup_task_mgmt(hba, task_tag, tm_function);
Kiwoong Kimd2877be2016-11-10 21:16:15 +09006600
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306601 /* send command to the controller */
Can Guo4b42d5572021-04-01 00:39:09 -07006602 __set_bit(task_tag, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02006603
Can Guo4b42d5572021-04-01 00:39:09 -07006604 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TASK_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07006605 /* Make sure that doorbell is committed immediately */
6606 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306607
6608 spin_unlock_irqrestore(host->host_lock, flags);
6609
Bean Huo28fa68f2021-01-05 12:34:42 +01006610 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_SEND);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03006611
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306612 /* wait until the task management command is completed */
Bart Van Assche69a6c262019-12-09 10:13:09 -08006613 err = wait_for_completion_io_timeout(&wait,
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306614 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306615 if (!err) {
Bart Van Assche69a6c262019-12-09 10:13:09 -08006616 /*
6617 * Make sure that ufshcd_compl_tm() does not trigger a
6618 * use-after-free.
6619 */
6620 req->end_io_data = NULL;
Bean Huo28fa68f2021-01-05 12:34:42 +01006621 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_ERR);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306622 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
6623 __func__, tm_function);
Can Guo4b42d5572021-04-01 00:39:09 -07006624 if (ufshcd_clear_tm_cmd(hba, task_tag))
6625 dev_WARN(hba->dev, "%s: unable to clear tm cmd (slot %d) after timeout\n",
6626 __func__, task_tag);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306627 err = -ETIMEDOUT;
6628 } else {
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006629 err = 0;
Can Guo4b42d5572021-04-01 00:39:09 -07006630 memcpy(treq, hba->utmrdl_base_addr + task_tag, sizeof(*treq));
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006631
Bean Huo28fa68f2021-01-05 12:34:42 +01006632 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_COMP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306633 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306634
Stanley Chub5572172019-08-19 21:43:28 +08006635 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo4b42d5572021-04-01 00:39:09 -07006636 __clear_bit(task_tag, &hba->outstanding_tasks);
Stanley Chub5572172019-08-19 21:43:28 +08006637 spin_unlock_irqrestore(hba->host->host_lock, flags);
6638
Can Guo4b42d5572021-04-01 00:39:09 -07006639 ufshcd_release(hba);
Bart Van Assche69a6c262019-12-09 10:13:09 -08006640 blk_put_request(req);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306641
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306642 return err;
6643}
6644
6645/**
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006646 * ufshcd_issue_tm_cmd - issues task management commands to controller
6647 * @hba: per adapter instance
6648 * @lun_id: LUN ID to which TM command is sent
6649 * @task_id: task ID to which the TM command is applicable
6650 * @tm_function: task management function opcode
6651 * @tm_response: task management service response return value
6652 *
6653 * Returns non-zero value on error, zero on success.
6654 */
6655static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
6656 u8 tm_function, u8 *tm_response)
6657{
6658 struct utp_task_req_desc treq = { { 0 }, };
6659 int ocs_value, err;
6660
6661 /* Configure task request descriptor */
6662 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6663 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6664
6665 /* Configure task request UPIU */
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -05006666 treq.upiu_req.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006667 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -05006668 treq.upiu_req.req_header.dword_1 = cpu_to_be32(tm_function << 16);
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006669
6670 /*
6671 * The host shall provide the same value for LUN field in the basic
6672 * header and for Input Parameter.
6673 */
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -05006674 treq.upiu_req.input_param1 = cpu_to_be32(lun_id);
6675 treq.upiu_req.input_param2 = cpu_to_be32(task_id);
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006676
6677 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
6678 if (err == -ETIMEDOUT)
6679 return err;
6680
6681 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6682 if (ocs_value != OCS_SUCCESS)
6683 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
6684 __func__, ocs_value);
6685 else if (tm_response)
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -05006686 *tm_response = be32_to_cpu(treq.upiu_rsp.output_param1) &
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006687 MASK_TM_SERVICE_RESP;
6688 return err;
6689}
6690
6691/**
Avri Altman5e0a86e2018-10-07 17:30:37 +03006692 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
6693 * @hba: per-adapter instance
6694 * @req_upiu: upiu request
6695 * @rsp_upiu: upiu reply
Avri Altman5e0a86e2018-10-07 17:30:37 +03006696 * @desc_buff: pointer to descriptor buffer, NULL if NA
6697 * @buff_len: descriptor size, 0 if NA
Bart Van Assched0e97602019-10-29 16:07:08 -07006698 * @cmd_type: specifies the type (NOP, Query...)
Avri Altman5e0a86e2018-10-07 17:30:37 +03006699 * @desc_op: descriptor operation
6700 *
6701 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
6702 * Therefore, it "rides" the device management infrastructure: uses its tag and
6703 * tasks work queues.
6704 *
6705 * Since there is only one available tag for device management commands,
6706 * the caller is expected to hold the hba->dev_cmd.lock mutex.
6707 */
6708static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
6709 struct utp_upiu_req *req_upiu,
6710 struct utp_upiu_req *rsp_upiu,
6711 u8 *desc_buff, int *buff_len,
Bart Van Assche7f674c32019-10-29 16:07:09 -07006712 enum dev_cmd_type cmd_type,
Avri Altman5e0a86e2018-10-07 17:30:37 +03006713 enum query_opcode desc_op)
6714{
Bart Van Assche7252a362019-12-09 10:13:08 -08006715 struct request_queue *q = hba->cmd_queue;
Bart Van Assche8a686f22021-07-21 20:34:26 -07006716 DECLARE_COMPLETION_ONSTACK(wait);
Bart Van Assche7252a362019-12-09 10:13:08 -08006717 struct request *req;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006718 struct ufshcd_lrb *lrbp;
6719 int err = 0;
6720 int tag;
Bean Huoa23064c2020-07-06 14:39:36 +02006721 u8 upiu_flags;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006722
6723 down_read(&hba->clk_scaling_lock);
6724
Bart Van Assche7252a362019-12-09 10:13:08 -08006725 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03006726 if (IS_ERR(req)) {
6727 err = PTR_ERR(req);
6728 goto out_unlock;
6729 }
Bart Van Assche7252a362019-12-09 10:13:08 -08006730 tag = req->tag;
Bart Van Assche4728ab42021-07-21 20:34:27 -07006731 WARN_ONCE(tag < 0, "Invalid tag %d\n", tag);
Avri Altman5e0a86e2018-10-07 17:30:37 +03006732
Can Guoa45f9372021-05-24 01:36:57 -07006733 if (unlikely(test_bit(tag, &hba->outstanding_reqs))) {
Can Guo7a7e66c2020-12-02 04:04:02 -08006734 err = -EBUSY;
6735 goto out;
6736 }
Avri Altman5e0a86e2018-10-07 17:30:37 +03006737
Can Guoa45f9372021-05-24 01:36:57 -07006738 lrbp = &hba->lrb[tag];
Can Guo7a7e66c2020-12-02 04:04:02 -08006739 WARN_ON(lrbp->cmd);
Avri Altman5e0a86e2018-10-07 17:30:37 +03006740 lrbp->cmd = NULL;
6741 lrbp->sense_bufflen = 0;
6742 lrbp->sense_buffer = NULL;
6743 lrbp->task_tag = tag;
6744 lrbp->lun = 0;
6745 lrbp->intr_cmd = true;
Satya Tangiraladf043c742020-07-06 20:04:14 +00006746 ufshcd_prepare_lrbp_crypto(NULL, lrbp);
Avri Altman5e0a86e2018-10-07 17:30:37 +03006747 hba->dev_cmd.type = cmd_type;
6748
Caleb Connolly51428812021-03-10 15:33:42 +00006749 if (hba->ufs_version <= ufshci_version(1, 1))
Avri Altman5e0a86e2018-10-07 17:30:37 +03006750 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
Caleb Connolly51428812021-03-10 15:33:42 +00006751 else
Avri Altman5e0a86e2018-10-07 17:30:37 +03006752 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006753
6754 /* update the task tag in the request upiu */
6755 req_upiu->header.dword_0 |= cpu_to_be32(tag);
6756
6757 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
6758
6759 /* just copy the upiu request as it is */
6760 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
6761 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
6762 /* The Data Segment Area is optional depending upon the query
6763 * function value. for WRITE DESCRIPTOR, the data segment
6764 * follows right after the tsf.
6765 */
6766 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
6767 *buff_len = 0;
6768 }
6769
6770 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
6771
6772 hba->dev_cmd.complete = &wait;
6773
Bean Huo10542482021-05-31 12:43:08 +02006774 ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr);
Avri Altman5e0a86e2018-10-07 17:30:37 +03006775
Can Guoa45f9372021-05-24 01:36:57 -07006776 ufshcd_send_command(hba, tag);
Avri Altman5e0a86e2018-10-07 17:30:37 +03006777 /*
6778 * ignore the returning value here - ufshcd_check_query_response is
6779 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
6780 * read the response directly ignoring all errors.
6781 */
6782 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
6783
6784 /* just copy the upiu response as it is */
6785 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
Avri Altman4bbbe242019-02-20 09:11:13 +02006786 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
6787 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
6788 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
6789 MASK_QUERY_DATA_SEG_LEN;
6790
6791 if (*buff_len >= resp_len) {
6792 memcpy(desc_buff, descp, resp_len);
6793 *buff_len = resp_len;
6794 } else {
Bean Huo3d4881d2019-11-12 23:34:35 +01006795 dev_warn(hba->dev,
6796 "%s: rsp size %d is bigger than buffer size %d",
6797 __func__, resp_len, *buff_len);
Avri Altman4bbbe242019-02-20 09:11:13 +02006798 *buff_len = 0;
6799 err = -EINVAL;
6800 }
6801 }
Bean Huo10542482021-05-31 12:43:08 +02006802 ufshcd_add_query_upiu_trace(hba, err ? UFS_QUERY_ERR : UFS_QUERY_COMP,
6803 (struct utp_upiu_req *)lrbp->ucd_rsp_ptr);
Avri Altman5e0a86e2018-10-07 17:30:37 +03006804
Can Guo7a7e66c2020-12-02 04:04:02 -08006805out:
Bart Van Assche7252a362019-12-09 10:13:08 -08006806 blk_put_request(req);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03006807out_unlock:
Avri Altman5e0a86e2018-10-07 17:30:37 +03006808 up_read(&hba->clk_scaling_lock);
6809 return err;
6810}
6811
6812/**
6813 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
6814 * @hba: per-adapter instance
6815 * @req_upiu: upiu request
6816 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
6817 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
6818 * @desc_buff: pointer to descriptor buffer, NULL if NA
6819 * @buff_len: descriptor size, 0 if NA
6820 * @desc_op: descriptor operation
6821 *
6822 * Supports UTP Transfer requests (nop and query), and UTP Task
6823 * Management requests.
6824 * It is up to the caller to fill the upiu conent properly, as it will
6825 * be copied without any further input validations.
6826 */
6827int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
6828 struct utp_upiu_req *req_upiu,
6829 struct utp_upiu_req *rsp_upiu,
6830 int msgcode,
6831 u8 *desc_buff, int *buff_len,
6832 enum query_opcode desc_op)
6833{
6834 int err;
Bart Van Assche7f674c32019-10-29 16:07:09 -07006835 enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006836 struct utp_task_req_desc treq = { { 0 }, };
6837 int ocs_value;
6838 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
6839
Avri Altman5e0a86e2018-10-07 17:30:37 +03006840 switch (msgcode) {
6841 case UPIU_TRANSACTION_NOP_OUT:
6842 cmd_type = DEV_CMD_TYPE_NOP;
Gustavo A. R. Silvadf561f662020-08-23 17:36:59 -05006843 fallthrough;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006844 case UPIU_TRANSACTION_QUERY_REQ:
6845 ufshcd_hold(hba, false);
6846 mutex_lock(&hba->dev_cmd.lock);
6847 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
6848 desc_buff, buff_len,
6849 cmd_type, desc_op);
6850 mutex_unlock(&hba->dev_cmd.lock);
6851 ufshcd_release(hba);
6852
6853 break;
6854 case UPIU_TRANSACTION_TASK_REQ:
6855 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6856 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6857
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -05006858 memcpy(&treq.upiu_req, req_upiu, sizeof(*req_upiu));
Avri Altman5e0a86e2018-10-07 17:30:37 +03006859
6860 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
6861 if (err == -ETIMEDOUT)
6862 break;
6863
6864 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6865 if (ocs_value != OCS_SUCCESS) {
6866 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
6867 ocs_value);
6868 break;
6869 }
6870
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -05006871 memcpy(rsp_upiu, &treq.upiu_rsp, sizeof(*rsp_upiu));
Avri Altman5e0a86e2018-10-07 17:30:37 +03006872
6873 break;
6874 default:
6875 err = -EINVAL;
6876
6877 break;
6878 }
6879
Avri Altman5e0a86e2018-10-07 17:30:37 +03006880 return err;
6881}
6882
6883/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306884 * ufshcd_eh_device_reset_handler - device reset handler registered to
6885 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306886 * @cmd: SCSI command pointer
6887 *
6888 * Returns SUCCESS/FAILED
6889 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306890static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306891{
6892 struct Scsi_Host *host;
6893 struct ufs_hba *hba;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306894 u32 pos;
6895 int err;
Can Guo35fc4cd2020-12-28 04:04:36 -08006896 u8 resp = 0xF, lun;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306897
6898 host = cmd->device->host;
6899 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306900
Can Guo35fc4cd2020-12-28 04:04:36 -08006901 lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
6902 err = ufshcd_issue_tm_cmd(hba, lun, 0, UFS_LOGICAL_RESET, &resp);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306903 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306904 if (!err)
6905 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306906 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306907 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306908
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306909 /* clear the commands that were pending for corresponding LUN */
6910 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
Can Guo35fc4cd2020-12-28 04:04:36 -08006911 if (hba->lrb[pos].lun == lun) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306912 err = ufshcd_clear_cmd(hba, pos);
6913 if (err)
6914 break;
Bart Van Assche73dc3c42021-07-21 20:34:38 -07006915 __ufshcd_transfer_req_compl(hba, pos, /*retry_requests=*/true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306916 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306917 }
Gilad Broner7fabb772017-02-03 16:56:50 -08006918
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306919out:
Gilad Broner7fabb772017-02-03 16:56:50 -08006920 hba->req_abort_count = 0;
Stanley Chue965e5e2020-12-05 19:58:59 +08006921 ufshcd_update_evt_hist(hba, UFS_EVT_DEV_RESET, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306922 if (!err) {
6923 err = SUCCESS;
6924 } else {
6925 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6926 err = FAILED;
6927 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306928 return err;
6929}
6930
Gilad Bronere0b299e2017-02-03 16:56:40 -08006931static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6932{
6933 struct ufshcd_lrb *lrbp;
6934 int tag;
6935
6936 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6937 lrbp = &hba->lrb[tag];
6938 lrbp->req_abort_skip = true;
6939 }
6940}
6941
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306942/**
Can Guo307348f2020-08-24 19:07:05 -07006943 * ufshcd_try_to_abort_task - abort a specific task
Lee Jonesd23ec0b2020-11-02 14:23:51 +00006944 * @hba: Pointer to adapter instance
6945 * @tag: Task tag/index to be aborted
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306946 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306947 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6948 * command, and in host controller by clearing the door-bell register. There can
6949 * be race between controller sending the command to the device while abort is
6950 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6951 * really issued and then try to abort it.
6952 *
Can Guo307348f2020-08-24 19:07:05 -07006953 * Returns zero on success, non-zero on failure
6954 */
6955static int ufshcd_try_to_abort_task(struct ufs_hba *hba, int tag)
6956{
6957 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
6958 int err = 0;
6959 int poll_cnt;
6960 u8 resp = 0xF;
6961 u32 reg;
6962
6963 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6964 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6965 UFS_QUERY_TASK, &resp);
6966 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6967 /* cmd pending in the device */
6968 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6969 __func__, tag);
6970 break;
6971 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6972 /*
6973 * cmd not pending in the device, check if it is
6974 * in transition.
6975 */
6976 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6977 __func__, tag);
6978 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6979 if (reg & (1 << tag)) {
6980 /* sleep for max. 200us to stabilize */
6981 usleep_range(100, 200);
6982 continue;
6983 }
6984 /* command completed already */
6985 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6986 __func__, tag);
6987 goto out;
6988 } else {
6989 dev_err(hba->dev,
6990 "%s: no response from device. tag = %d, err %d\n",
6991 __func__, tag, err);
6992 if (!err)
6993 err = resp; /* service response error */
6994 goto out;
6995 }
6996 }
6997
6998 if (!poll_cnt) {
6999 err = -EBUSY;
7000 goto out;
7001 }
7002
7003 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
7004 UFS_ABORT_TASK, &resp);
7005 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
7006 if (!err) {
7007 err = resp; /* service response error */
7008 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
7009 __func__, tag, err);
7010 }
7011 goto out;
7012 }
7013
7014 err = ufshcd_clear_cmd(hba, tag);
7015 if (err)
7016 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
7017 __func__, tag, err);
7018
7019out:
7020 return err;
7021}
7022
7023/**
7024 * ufshcd_abort - scsi host template eh_abort_handler callback
7025 * @cmd: SCSI command pointer
7026 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307027 * Returns SUCCESS/FAILED
7028 */
7029static int ufshcd_abort(struct scsi_cmnd *cmd)
7030{
Bart Van Assche4728ab42021-07-21 20:34:27 -07007031 struct Scsi_Host *host = cmd->device->host;
7032 struct ufs_hba *hba = shost_priv(host);
Bart Van Assche3f2c1002021-08-09 16:03:50 -07007033 int tag = scsi_cmd_to_rq(cmd)->tag;
Bart Van Assche4728ab42021-07-21 20:34:27 -07007034 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307035 unsigned long flags;
Bart Van Assche64180742021-07-21 20:34:35 -07007036 int err = FAILED;
Dolev Ravive9d501b2014-07-01 12:22:37 +03007037 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307038
Bart Van Assche4728ab42021-07-21 20:34:27 -07007039 WARN_ONCE(tag < 0, "Invalid tag %d\n", tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307040
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007041 ufshcd_hold(hba, false);
Dolev Ravive9d501b2014-07-01 12:22:37 +03007042 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Bart Van Assche64180742021-07-21 20:34:35 -07007043 /* If command is already aborted/completed, return FAILED. */
Yaniv Gardi14497322016-02-01 15:02:39 +02007044 if (!(test_bit(tag, &hba->outstanding_reqs))) {
7045 dev_err(hba->dev,
7046 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
7047 __func__, tag, hba->outstanding_reqs, reg);
Bart Van Assche64180742021-07-21 20:34:35 -07007048 goto release;
Yaniv Gardi14497322016-02-01 15:02:39 +02007049 }
7050
Dolev Raviv66cc8202016-12-22 18:39:42 -08007051 /* Print Transfer Request of aborted task */
Bean Huod87a1f62020-08-11 16:18:59 +02007052 dev_info(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
Dolev Raviv66cc8202016-12-22 18:39:42 -08007053
Gilad Broner7fabb772017-02-03 16:56:50 -08007054 /*
7055 * Print detailed info about aborted request.
7056 * As more than one request might get aborted at the same time,
7057 * print full information only for the first aborted request in order
7058 * to reduce repeated printouts. For other aborted requests only print
7059 * basic details.
7060 */
Can Guo7a7e66c2020-12-02 04:04:02 -08007061 scsi_print_command(cmd);
Gilad Broner7fabb772017-02-03 16:56:50 -08007062 if (!hba->req_abort_count) {
Stanley Chue965e5e2020-12-05 19:58:59 +08007063 ufshcd_update_evt_hist(hba, UFS_EVT_ABORT, tag);
7064 ufshcd_print_evt_hist(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08007065 ufshcd_print_host_state(hba);
Gilad Broner7fabb772017-02-03 16:56:50 -08007066 ufshcd_print_pwr_info(hba);
7067 ufshcd_print_trs(hba, 1 << tag, true);
7068 } else {
7069 ufshcd_print_trs(hba, 1 << tag, false);
7070 }
7071 hba->req_abort_count++;
Gilad Bronere0b299e2017-02-03 16:56:40 -08007072
Bean Huod87a1f62020-08-11 16:18:59 +02007073 if (!(reg & (1 << tag))) {
7074 dev_err(hba->dev,
7075 "%s: cmd was completed, but without a notifying intr, tag = %d",
7076 __func__, tag);
Bart Van Assche73dc3c42021-07-21 20:34:38 -07007077 __ufshcd_transfer_req_compl(hba, 1UL << tag, /*retry_requests=*/false);
Bart Van Assche64180742021-07-21 20:34:35 -07007078 goto release;
Bean Huod87a1f62020-08-11 16:18:59 +02007079 }
7080
Can Guo7a7e66c2020-12-02 04:04:02 -08007081 /*
7082 * Task abort to the device W-LUN is illegal. When this command
7083 * will fail, due to spec violation, scsi err handling next step
7084 * will be to send LU reset which, again, is a spec violation.
7085 * To avoid these unnecessary/illegal steps, first we clean up
Can Guoa45f9372021-05-24 01:36:57 -07007086 * the lrb taken by this cmd and re-set it in outstanding_reqs,
Bart Van Asschea113eaa2021-07-21 20:34:37 -07007087 * then queue the error handler and bail.
Can Guo7a7e66c2020-12-02 04:04:02 -08007088 */
7089 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN) {
7090 ufshcd_update_evt_hist(hba, UFS_EVT_ABORT, lrbp->lun);
Bart Van Assche64180742021-07-21 20:34:35 -07007091
Can Guo7a7e66c2020-12-02 04:04:02 -08007092 spin_lock_irqsave(host->host_lock, flags);
Can Guoa45f9372021-05-24 01:36:57 -07007093 hba->force_reset = true;
Can Guo7a7e66c2020-12-02 04:04:02 -08007094 spin_unlock_irqrestore(host->host_lock, flags);
Bart Van Asschea113eaa2021-07-21 20:34:37 -07007095
7096 ufshcd_schedule_eh(hba);
7097
Bart Van Assche64180742021-07-21 20:34:35 -07007098 goto release;
Can Guo7a7e66c2020-12-02 04:04:02 -08007099 }
7100
Gilad Bronere0b299e2017-02-03 16:56:40 -08007101 /* Skip task abort in case previous aborts failed and report failure */
Bart Van Assche64180742021-07-21 20:34:35 -07007102 if (lrbp->req_abort_skip) {
7103 dev_err(hba->dev, "%s: skipping abort\n", __func__);
7104 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
7105 goto release;
7106 }
Gilad Bronere0b299e2017-02-03 16:56:40 -08007107
Bart Van Assche64180742021-07-21 20:34:35 -07007108 err = ufshcd_try_to_abort_task(hba, tag);
7109 if (err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307110 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Gilad Bronere0b299e2017-02-03 16:56:40 -08007111 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307112 err = FAILED;
Bart Van Assche64180742021-07-21 20:34:35 -07007113 goto release;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307114 }
7115
Bart Van Assche64180742021-07-21 20:34:35 -07007116 err = SUCCESS;
7117
7118release:
7119 /* Matches the ufshcd_hold() call at the start of this function. */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007120 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307121 return err;
7122}
7123
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307124/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307125 * ufshcd_host_reset_and_restore - reset and restore host controller
7126 * @hba: per-adapter instance
7127 *
7128 * Note that host controller reset may issue DME_RESET to
7129 * local and remote (device) Uni-Pro stack and the attributes
7130 * are reset to default state.
7131 *
7132 * Returns zero on success, non-zero on failure
7133 */
7134static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
7135{
7136 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307137
Can Guo2df74b62019-11-25 22:53:33 -08007138 /*
7139 * Stop the host controller and complete the requests
7140 * cleared by h/w
7141 */
Daejun Parkf02bc972021-07-12 17:58:30 +09007142 ufshpb_reset_host(hba);
Bart Van Assche5cac1092020-05-07 15:27:50 -07007143 ufshcd_hba_stop(hba);
Can Guo2df74b62019-11-25 22:53:33 -08007144 hba->silence_err_logs = true;
Bart Van Assche73dc3c42021-07-21 20:34:38 -07007145 ufshcd_retry_aborted_requests(hba);
Can Guo2df74b62019-11-25 22:53:33 -08007146 hba->silence_err_logs = false;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307147
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08007148 /* scale up clocks to max frequency before full reinitialization */
Subhash Jadavani394b9492020-03-26 02:25:40 -07007149 ufshcd_set_clk_freq(hba, true);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08007150
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307151 err = ufshcd_hba_enable(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307152
7153 /* Establish the link again and restore the device */
Randall Huang19186512020-11-30 20:14:02 -08007154 if (!err)
Jaegeuk Kim4ee7ee52021-01-07 10:53:15 -08007155 err = ufshcd_probe_hba(hba, false);
7156
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307157 if (err)
7158 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
Stanley Chue965e5e2020-12-05 19:58:59 +08007159 ufshcd_update_evt_hist(hba, UFS_EVT_HOST_RESET, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307160 return err;
7161}
7162
7163/**
7164 * ufshcd_reset_and_restore - reset and re-initialize host/device
7165 * @hba: per-adapter instance
7166 *
7167 * Reset and recover device, host and re-establish link. This
7168 * is helpful to recover the communication in fatal error conditions.
7169 *
7170 * Returns zero on success, non-zero on failure
7171 */
7172static int ufshcd_reset_and_restore(struct ufs_hba *hba)
7173{
Adrian Hunter54a40452021-10-02 18:45:49 +03007174 u32 saved_err = 0;
7175 u32 saved_uic_err = 0;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307176 int err = 0;
Can Guo4db7a232020-08-09 05:15:51 -07007177 unsigned long flags;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007178 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307179
Can Guo4db7a232020-08-09 05:15:51 -07007180 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007181 do {
Adrian Hunter54a40452021-10-02 18:45:49 +03007182 /*
7183 * This is a fresh start, cache and clear saved error first,
7184 * in case new error generated during reset and restore.
7185 */
7186 saved_err |= hba->saved_err;
7187 saved_uic_err |= hba->saved_uic_err;
7188 hba->saved_err = 0;
7189 hba->saved_uic_err = 0;
7190 hba->force_reset = false;
7191 hba->ufshcd_state = UFSHCD_STATE_RESET;
7192 spin_unlock_irqrestore(hba->host->host_lock, flags);
7193
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07007194 /* Reset the attached device */
Stanley Chu31a5d9c2020-12-08 21:56:35 +08007195 ufshcd_device_reset(hba);
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07007196
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007197 err = ufshcd_host_reset_and_restore(hba);
Adrian Hunter54a40452021-10-02 18:45:49 +03007198
7199 spin_lock_irqsave(hba->host->host_lock, flags);
7200 if (err)
7201 continue;
7202 /* Do not exit unless operational or dead */
7203 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL &&
7204 hba->ufshcd_state != UFSHCD_STATE_ERROR &&
7205 hba->ufshcd_state != UFSHCD_STATE_EH_SCHEDULED_NON_FATAL)
7206 err = -EAGAIN;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007207 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307208
Can Guo4db7a232020-08-09 05:15:51 -07007209 /*
7210 * Inform scsi mid-layer that we did reset and allow to handle
7211 * Unit Attention properly.
7212 */
7213 scsi_report_bus_reset(hba->host, 0);
7214 if (err) {
Can Guo88a92d62020-12-02 04:04:01 -08007215 hba->ufshcd_state = UFSHCD_STATE_ERROR;
Can Guo4db7a232020-08-09 05:15:51 -07007216 hba->saved_err |= saved_err;
7217 hba->saved_uic_err |= saved_uic_err;
7218 }
7219 spin_unlock_irqrestore(hba->host->host_lock, flags);
7220
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307221 return err;
7222}
7223
7224/**
7225 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
Bart Van Assche8aa29f12018-03-01 15:07:20 -08007226 * @cmd: SCSI command pointer
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307227 *
7228 * Returns SUCCESS/FAILED
7229 */
7230static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
7231{
Can Guo4db7a232020-08-09 05:15:51 -07007232 int err = SUCCESS;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307233 unsigned long flags;
7234 struct ufs_hba *hba;
7235
7236 hba = shost_priv(cmd->device->host);
7237
Can Guo4db7a232020-08-09 05:15:51 -07007238 spin_lock_irqsave(hba->host->host_lock, flags);
7239 hba->force_reset = true;
Can Guo4db7a232020-08-09 05:15:51 -07007240 dev_err(hba->dev, "%s: reset in progress - 1\n", __func__);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307241 spin_unlock_irqrestore(hba->host->host_lock, flags);
7242
Bart Van Asschea113eaa2021-07-21 20:34:37 -07007243 ufshcd_err_handler(hba->host);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307244
7245 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo4db7a232020-08-09 05:15:51 -07007246 if (hba->ufshcd_state == UFSHCD_STATE_ERROR)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307247 err = FAILED;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307248 spin_unlock_irqrestore(hba->host->host_lock, flags);
7249
7250 return err;
7251}
7252
7253/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007254 * ufshcd_get_max_icc_level - calculate the ICC level
7255 * @sup_curr_uA: max. current supported by the regulator
7256 * @start_scan: row at the desc table to start scan from
7257 * @buff: power descriptor buffer
7258 *
7259 * Returns calculated max ICC level for specific regulator
7260 */
7261static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
7262{
7263 int i;
7264 int curr_uA;
7265 u16 data;
7266 u16 unit;
7267
7268 for (i = start_scan; i >= 0; i--) {
Tomas Winklerd79713f2017-01-05 10:45:11 +02007269 data = be16_to_cpup((__be16 *)&buff[2 * i]);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007270 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
7271 ATTR_ICC_LVL_UNIT_OFFSET;
7272 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
7273 switch (unit) {
7274 case UFSHCD_NANO_AMP:
7275 curr_uA = curr_uA / 1000;
7276 break;
7277 case UFSHCD_MILI_AMP:
7278 curr_uA = curr_uA * 1000;
7279 break;
7280 case UFSHCD_AMP:
7281 curr_uA = curr_uA * 1000 * 1000;
7282 break;
7283 case UFSHCD_MICRO_AMP:
7284 default:
7285 break;
7286 }
7287 if (sup_curr_uA >= curr_uA)
7288 break;
7289 }
7290 if (i < 0) {
7291 i = 0;
7292 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
7293 }
7294
7295 return (u32)i;
7296}
7297
7298/**
Lee Jones11eea9b2021-03-12 09:47:10 +00007299 * ufshcd_find_max_sup_active_icc_level - calculate the max ICC level
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007300 * In case regulators are not initialized we'll return 0
7301 * @hba: per-adapter instance
7302 * @desc_buf: power descriptor buffer to extract ICC levels from.
7303 * @len: length of desc_buff
7304 *
7305 * Returns calculated ICC level
7306 */
7307static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
7308 u8 *desc_buf, int len)
7309{
7310 u32 icc_level = 0;
7311
7312 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
7313 !hba->vreg_info.vccq2) {
7314 dev_err(hba->dev,
7315 "%s: Regulator capability was not set, actvIccLevel=%d",
7316 __func__, icc_level);
7317 goto out;
7318 }
7319
Yue Hu08730452021-03-19 15:09:16 +08007320 if (hba->vreg_info.vcc->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007321 icc_level = ufshcd_get_max_icc_level(
7322 hba->vreg_info.vcc->max_uA,
7323 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
7324 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
7325
Yue Hu08730452021-03-19 15:09:16 +08007326 if (hba->vreg_info.vccq->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007327 icc_level = ufshcd_get_max_icc_level(
7328 hba->vreg_info.vccq->max_uA,
7329 icc_level,
7330 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
7331
Yue Hu08730452021-03-19 15:09:16 +08007332 if (hba->vreg_info.vccq2->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007333 icc_level = ufshcd_get_max_icc_level(
7334 hba->vreg_info.vccq2->max_uA,
7335 icc_level,
7336 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
7337out:
7338 return icc_level;
7339}
7340
Can Guoe89860f2020-03-26 02:25:41 -07007341static void ufshcd_set_active_icc_lvl(struct ufs_hba *hba)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007342{
7343 int ret;
Bean Huo7a0bf852020-06-03 11:19:58 +02007344 int buff_len = hba->desc_size[QUERY_DESC_IDN_POWER];
Kees Cookbbe21d72018-05-02 16:58:09 -07007345 u8 *desc_buf;
Can Guoe89860f2020-03-26 02:25:41 -07007346 u32 icc_level;
Kees Cookbbe21d72018-05-02 16:58:09 -07007347
7348 desc_buf = kmalloc(buff_len, GFP_KERNEL);
7349 if (!desc_buf)
7350 return;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007351
Bean Huoc4607a02020-06-03 11:19:56 +02007352 ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_POWER, 0, 0,
7353 desc_buf, buff_len);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007354 if (ret) {
7355 dev_err(hba->dev,
7356 "%s: Failed reading power descriptor.len = %d ret = %d",
7357 __func__, buff_len, ret);
Kees Cookbbe21d72018-05-02 16:58:09 -07007358 goto out;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007359 }
7360
Can Guoe89860f2020-03-26 02:25:41 -07007361 icc_level = ufshcd_find_max_sup_active_icc_level(hba, desc_buf,
7362 buff_len);
7363 dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007364
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02007365 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Can Guoe89860f2020-03-26 02:25:41 -07007366 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, &icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007367
7368 if (ret)
7369 dev_err(hba->dev,
7370 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
Can Guoe89860f2020-03-26 02:25:41 -07007371 __func__, icc_level, ret);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007372
Kees Cookbbe21d72018-05-02 16:58:09 -07007373out:
7374 kfree(desc_buf);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007375}
7376
Can Guofb276f72020-03-25 18:09:59 -07007377static inline void ufshcd_blk_pm_runtime_init(struct scsi_device *sdev)
7378{
7379 scsi_autopm_get_device(sdev);
7380 blk_pm_runtime_init(sdev->request_queue, &sdev->sdev_gendev);
7381 if (sdev->rpm_autosuspend)
7382 pm_runtime_set_autosuspend_delay(&sdev->sdev_gendev,
7383 RPM_AUTOSUSPEND_DELAY_MS);
7384 scsi_autopm_put_device(sdev);
7385}
7386
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007387/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007388 * ufshcd_scsi_add_wlus - Adds required W-LUs
7389 * @hba: per-adapter instance
7390 *
7391 * UFS device specification requires the UFS devices to support 4 well known
7392 * logical units:
7393 * "REPORT_LUNS" (address: 01h)
7394 * "UFS Device" (address: 50h)
7395 * "RPMB" (address: 44h)
7396 * "BOOT" (address: 30h)
7397 * UFS device's power management needs to be controlled by "POWER CONDITION"
7398 * field of SSU (START STOP UNIT) command. But this "power condition" field
7399 * will take effect only when its sent to "UFS device" well known logical unit
7400 * hence we require the scsi_device instance to represent this logical unit in
7401 * order for the UFS host driver to send the SSU command for power management.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08007402 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007403 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
7404 * Block) LU so user space process can control this LU. User space may also
7405 * want to have access to BOOT LU.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08007406 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007407 * This function adds scsi device instances for each of all well known LUs
7408 * (except "REPORT LUNS" LU).
7409 *
7410 * Returns zero on success (all required W-LUs are added successfully),
7411 * non-zero error value on failure (if failed to add any of the required W-LU).
7412 */
7413static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
7414{
7415 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007416 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007417
7418 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
7419 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
7420 if (IS_ERR(hba->sdev_ufs_device)) {
7421 ret = PTR_ERR(hba->sdev_ufs_device);
7422 hba->sdev_ufs_device = NULL;
7423 goto out;
7424 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007425 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007426
Jaegeuk Kim4f3e9002020-11-17 08:58:35 -08007427 hba->sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007428 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Jaegeuk Kim4f3e9002020-11-17 08:58:35 -08007429 if (IS_ERR(hba->sdev_rpmb)) {
7430 ret = PTR_ERR(hba->sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08007431 goto remove_sdev_ufs_device;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007432 }
Jaegeuk Kim4f3e9002020-11-17 08:58:35 -08007433 ufshcd_blk_pm_runtime_init(hba->sdev_rpmb);
7434 scsi_device_put(hba->sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08007435
7436 sdev_boot = __scsi_add_device(hba->host, 0, 0,
7437 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
Can Guofb276f72020-03-25 18:09:59 -07007438 if (IS_ERR(sdev_boot)) {
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08007439 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
Can Guofb276f72020-03-25 18:09:59 -07007440 } else {
7441 ufshcd_blk_pm_runtime_init(sdev_boot);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08007442 scsi_device_put(sdev_boot);
Can Guofb276f72020-03-25 18:09:59 -07007443 }
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007444 goto out;
7445
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007446remove_sdev_ufs_device:
7447 scsi_remove_device(hba->sdev_ufs_device);
7448out:
7449 return ret;
7450}
7451
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007452static void ufshcd_wb_probe(struct ufs_hba *hba, u8 *desc_buf)
7453{
Stanley Chua7f1e692020-06-25 11:04:30 +08007454 struct ufs_dev_info *dev_info = &hba->dev_info;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08007455 u8 lun;
7456 u32 d_lu_wb_buf_alloc;
Bean Huoe8d03812021-01-19 17:38:45 +01007457 u32 ext_ufs_feature;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08007458
Stanley Chu817d7e12020-05-08 16:01:08 +08007459 if (!ufshcd_is_wb_allowed(hba))
7460 return;
Stanley Chua7f1e692020-06-25 11:04:30 +08007461 /*
7462 * Probe WB only for UFS-2.2 and UFS-3.1 (and later) devices or
7463 * UFS devices with quirk UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES
7464 * enabled
7465 */
7466 if (!(dev_info->wspecversion >= 0x310 ||
7467 dev_info->wspecversion == 0x220 ||
7468 (hba->dev_quirks & UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES)))
7469 goto wb_disabled;
Stanley Chu817d7e12020-05-08 16:01:08 +08007470
Bean Huo7a0bf852020-06-03 11:19:58 +02007471 if (hba->desc_size[QUERY_DESC_IDN_DEVICE] <
7472 DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP + 4)
Stanley Chu817d7e12020-05-08 16:01:08 +08007473 goto wb_disabled;
7474
Bean Huoe8d03812021-01-19 17:38:45 +01007475 ext_ufs_feature = get_unaligned_be32(desc_buf +
7476 DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
Stanley Chu817d7e12020-05-08 16:01:08 +08007477
Bean Huoe8d03812021-01-19 17:38:45 +01007478 if (!(ext_ufs_feature & UFS_DEV_WRITE_BOOSTER_SUP))
Stanley Chu817d7e12020-05-08 16:01:08 +08007479 goto wb_disabled;
7480
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007481 /*
Bean Huoae1ce1f2021-01-19 17:38:44 +01007482 * WB may be supported but not configured while provisioning. The spec
7483 * says, in dedicated wb buffer mode, a max of 1 lun would have wb
7484 * buffer configured.
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007485 */
Bean Huo4cd48992021-01-19 17:38:46 +01007486 dev_info->wb_buffer_type = desc_buf[DEVICE_DESC_PARAM_WB_TYPE];
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007487
Stanley Chua7f1e692020-06-25 11:04:30 +08007488 dev_info->b_presrv_uspc_en =
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007489 desc_buf[DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN];
7490
Bean Huo4cd48992021-01-19 17:38:46 +01007491 if (dev_info->wb_buffer_type == WB_BUF_MODE_SHARED) {
Bean Huoe8d03812021-01-19 17:38:45 +01007492 if (!get_unaligned_be32(desc_buf +
7493 DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS))
Stanley Chu6f8d5a62020-05-08 16:01:13 +08007494 goto wb_disabled;
7495 } else {
7496 for (lun = 0; lun < UFS_UPIU_MAX_WB_LUN_ID; lun++) {
7497 d_lu_wb_buf_alloc = 0;
7498 ufshcd_read_unit_desc_param(hba,
7499 lun,
7500 UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS,
7501 (u8 *)&d_lu_wb_buf_alloc,
7502 sizeof(d_lu_wb_buf_alloc));
7503 if (d_lu_wb_buf_alloc) {
Stanley Chua7f1e692020-06-25 11:04:30 +08007504 dev_info->wb_dedicated_lu = lun;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08007505 break;
7506 }
7507 }
Stanley Chu817d7e12020-05-08 16:01:08 +08007508
Stanley Chu6f8d5a62020-05-08 16:01:13 +08007509 if (!d_lu_wb_buf_alloc)
7510 goto wb_disabled;
7511 }
Stanley Chu817d7e12020-05-08 16:01:08 +08007512 return;
7513
7514wb_disabled:
7515 hba->caps &= ~UFSHCD_CAP_WB_EN;
7516}
7517
Avri Altmane88e2d32021-09-15 09:04:06 +03007518static void ufshcd_temp_notif_probe(struct ufs_hba *hba, u8 *desc_buf)
7519{
7520 struct ufs_dev_info *dev_info = &hba->dev_info;
7521 u32 ext_ufs_feature;
7522 u8 mask = 0;
7523
7524 if (!(hba->caps & UFSHCD_CAP_TEMP_NOTIF) || dev_info->wspecversion < 0x300)
7525 return;
7526
7527 ext_ufs_feature = get_unaligned_be32(desc_buf + DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
7528
7529 if (ext_ufs_feature & UFS_DEV_LOW_TEMP_NOTIF)
7530 mask |= MASK_EE_TOO_LOW_TEMP;
7531
7532 if (ext_ufs_feature & UFS_DEV_HIGH_TEMP_NOTIF)
7533 mask |= MASK_EE_TOO_HIGH_TEMP;
7534
7535 if (mask) {
7536 ufshcd_enable_ee(hba, mask);
7537 ufs_hwmon_probe(hba, mask);
7538 }
7539}
7540
Stanley Chu8db269a2020-05-08 16:01:10 +08007541void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups)
Stanley Chu817d7e12020-05-08 16:01:08 +08007542{
7543 struct ufs_dev_fix *f;
7544 struct ufs_dev_info *dev_info = &hba->dev_info;
7545
Stanley Chu8db269a2020-05-08 16:01:10 +08007546 if (!fixups)
7547 return;
7548
7549 for (f = fixups; f->quirk; f++) {
Stanley Chu817d7e12020-05-08 16:01:08 +08007550 if ((f->wmanufacturerid == dev_info->wmanufacturerid ||
7551 f->wmanufacturerid == UFS_ANY_VENDOR) &&
7552 ((dev_info->model &&
7553 STR_PRFX_EQUAL(f->model, dev_info->model)) ||
7554 !strcmp(f->model, UFS_ANY_MODEL)))
7555 hba->dev_quirks |= f->quirk;
7556 }
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007557}
Stanley Chu8db269a2020-05-08 16:01:10 +08007558EXPORT_SYMBOL_GPL(ufshcd_fixup_dev_quirks);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007559
Stanley Chuc28c00b2020-05-08 16:01:09 +08007560static void ufs_fixup_device_setup(struct ufs_hba *hba)
7561{
7562 /* fix by general quirk table */
Stanley Chu8db269a2020-05-08 16:01:10 +08007563 ufshcd_fixup_dev_quirks(hba, ufs_fixups);
Stanley Chuc28c00b2020-05-08 16:01:09 +08007564
7565 /* allow vendors to fix quirks */
7566 ufshcd_vops_fixup_dev_quirks(hba);
7567}
7568
Bean Huo09750062020-01-20 14:08:14 +01007569static int ufs_get_device_desc(struct ufs_hba *hba)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007570{
7571 int err;
7572 u8 model_index;
Daejun Parkf02bc972021-07-12 17:58:30 +09007573 u8 b_ufs_feature_sup;
Kees Cookbbe21d72018-05-02 16:58:09 -07007574 u8 *desc_buf;
Bean Huo09750062020-01-20 14:08:14 +01007575 struct ufs_dev_info *dev_info = &hba->dev_info;
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007576
Bean Huo458a45f2020-06-03 11:19:55 +02007577 desc_buf = kmalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
Kees Cookbbe21d72018-05-02 16:58:09 -07007578 if (!desc_buf) {
7579 err = -ENOMEM;
7580 goto out;
7581 }
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007582
Bean Huoc4607a02020-06-03 11:19:56 +02007583 err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_DEVICE, 0, 0, desc_buf,
Bean Huo7a0bf852020-06-03 11:19:58 +02007584 hba->desc_size[QUERY_DESC_IDN_DEVICE]);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007585 if (err) {
7586 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
7587 __func__, err);
7588 goto out;
7589 }
7590
7591 /*
7592 * getting vendor (manufacturerID) and Bank Index in big endian
7593 * format
7594 */
Bean Huo09750062020-01-20 14:08:14 +01007595 dev_info->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007596 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
7597
Can Guo09f17792020-02-10 19:40:49 -08007598 /* getting Specification Version in big endian format */
7599 dev_info->wspecversion = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
7600 desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];
Daejun Parkf02bc972021-07-12 17:58:30 +09007601 b_ufs_feature_sup = desc_buf[DEVICE_DESC_PARAM_UFS_FEAT];
Can Guo09f17792020-02-10 19:40:49 -08007602
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007603 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007604
Daejun Parkf02bc972021-07-12 17:58:30 +09007605 if (dev_info->wspecversion >= UFS_DEV_HPB_SUPPORT_VERSION &&
7606 (b_ufs_feature_sup & UFS_DEV_HPB_SUPPORT)) {
Daejun Park41d8a932021-07-12 18:00:25 +09007607 bool hpb_en = false;
7608
Daejun Parkf02bc972021-07-12 17:58:30 +09007609 ufshpb_get_dev_info(hba, desc_buf);
Daejun Park41d8a932021-07-12 18:00:25 +09007610
7611 if (!ufshpb_is_legacy(hba))
7612 err = ufshcd_query_flag_retry(hba,
7613 UPIU_QUERY_OPCODE_READ_FLAG,
7614 QUERY_FLAG_IDN_HPB_EN, 0,
7615 &hpb_en);
7616
7617 if (ufshpb_is_legacy(hba) || (!err && hpb_en))
7618 dev_info->hpb_enabled = true;
Daejun Parkf02bc972021-07-12 17:58:30 +09007619 }
7620
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007621 err = ufshcd_read_string_desc(hba, model_index,
Bean Huo09750062020-01-20 14:08:14 +01007622 &dev_info->model, SD_ASCII_STD);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007623 if (err < 0) {
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007624 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
7625 __func__, err);
7626 goto out;
7627 }
7628
Asutosh Dasb294ff32021-04-23 17:20:16 -07007629 hba->luns_avail = desc_buf[DEVICE_DESC_PARAM_NUM_LU] +
7630 desc_buf[DEVICE_DESC_PARAM_NUM_WLU];
7631
Stanley Chu817d7e12020-05-08 16:01:08 +08007632 ufs_fixup_device_setup(hba);
7633
Stanley Chua7f1e692020-06-25 11:04:30 +08007634 ufshcd_wb_probe(hba, desc_buf);
Stanley Chu817d7e12020-05-08 16:01:08 +08007635
Avri Altmane88e2d32021-09-15 09:04:06 +03007636 ufshcd_temp_notif_probe(hba, desc_buf);
7637
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007638 /*
7639 * ufshcd_read_string_desc returns size of the string
7640 * reset the error value
7641 */
7642 err = 0;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007643
7644out:
Kees Cookbbe21d72018-05-02 16:58:09 -07007645 kfree(desc_buf);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007646 return err;
7647}
7648
Bean Huo09750062020-01-20 14:08:14 +01007649static void ufs_put_device_desc(struct ufs_hba *hba)
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007650{
Bean Huo09750062020-01-20 14:08:14 +01007651 struct ufs_dev_info *dev_info = &hba->dev_info;
7652
7653 kfree(dev_info->model);
7654 dev_info->model = NULL;
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007655}
7656
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007657/**
Yaniv Gardi37113102016-03-10 17:37:16 +02007658 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
7659 * @hba: per-adapter instance
7660 *
7661 * PA_TActivate parameter can be tuned manually if UniPro version is less than
7662 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
7663 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
7664 * the hibern8 exit latency.
7665 *
7666 * Returns zero on success, non-zero error value on failure.
7667 */
7668static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
7669{
7670 int ret = 0;
7671 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
7672
7673 ret = ufshcd_dme_peer_get(hba,
7674 UIC_ARG_MIB_SEL(
7675 RX_MIN_ACTIVATETIME_CAPABILITY,
7676 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7677 &peer_rx_min_activatetime);
7678 if (ret)
7679 goto out;
7680
7681 /* make sure proper unit conversion is applied */
7682 tuned_pa_tactivate =
7683 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
7684 / PA_TACTIVATE_TIME_UNIT_US);
7685 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7686 tuned_pa_tactivate);
7687
7688out:
7689 return ret;
7690}
7691
7692/**
7693 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
7694 * @hba: per-adapter instance
7695 *
7696 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
7697 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
7698 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
7699 * This optimal value can help reduce the hibern8 exit latency.
7700 *
7701 * Returns zero on success, non-zero error value on failure.
7702 */
7703static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
7704{
7705 int ret = 0;
7706 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
7707 u32 max_hibern8_time, tuned_pa_hibern8time;
7708
7709 ret = ufshcd_dme_get(hba,
7710 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
7711 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
7712 &local_tx_hibern8_time_cap);
7713 if (ret)
7714 goto out;
7715
7716 ret = ufshcd_dme_peer_get(hba,
7717 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
7718 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7719 &peer_rx_hibern8_time_cap);
7720 if (ret)
7721 goto out;
7722
7723 max_hibern8_time = max(local_tx_hibern8_time_cap,
7724 peer_rx_hibern8_time_cap);
7725 /* make sure proper unit conversion is applied */
7726 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
7727 / PA_HIBERN8_TIME_UNIT_US);
7728 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
7729 tuned_pa_hibern8time);
7730out:
7731 return ret;
7732}
7733
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08007734/**
7735 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
7736 * less than device PA_TACTIVATE time.
7737 * @hba: per-adapter instance
7738 *
7739 * Some UFS devices require host PA_TACTIVATE to be lower than device
7740 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
7741 * for such devices.
7742 *
7743 * Returns zero on success, non-zero error value on failure.
7744 */
7745static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
7746{
7747 int ret = 0;
7748 u32 granularity, peer_granularity;
7749 u32 pa_tactivate, peer_pa_tactivate;
7750 u32 pa_tactivate_us, peer_pa_tactivate_us;
7751 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
7752
7753 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7754 &granularity);
7755 if (ret)
7756 goto out;
7757
7758 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7759 &peer_granularity);
7760 if (ret)
7761 goto out;
7762
7763 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
7764 (granularity > PA_GRANULARITY_MAX_VAL)) {
7765 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
7766 __func__, granularity);
7767 return -EINVAL;
7768 }
7769
7770 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
7771 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
7772 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
7773 __func__, peer_granularity);
7774 return -EINVAL;
7775 }
7776
7777 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
7778 if (ret)
7779 goto out;
7780
7781 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
7782 &peer_pa_tactivate);
7783 if (ret)
7784 goto out;
7785
7786 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
7787 peer_pa_tactivate_us = peer_pa_tactivate *
7788 gran_to_us_table[peer_granularity - 1];
7789
7790 if (pa_tactivate_us > peer_pa_tactivate_us) {
7791 u32 new_peer_pa_tactivate;
7792
7793 new_peer_pa_tactivate = pa_tactivate_us /
7794 gran_to_us_table[peer_granularity - 1];
7795 new_peer_pa_tactivate++;
7796 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7797 new_peer_pa_tactivate);
7798 }
7799
7800out:
7801 return ret;
7802}
7803
Bean Huo09750062020-01-20 14:08:14 +01007804static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
Yaniv Gardi37113102016-03-10 17:37:16 +02007805{
7806 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
7807 ufshcd_tune_pa_tactivate(hba);
7808 ufshcd_tune_pa_hibern8time(hba);
7809 }
7810
Can Guoe91ed9e2020-02-23 20:09:21 -08007811 ufshcd_vops_apply_dev_quirks(hba);
7812
Yaniv Gardi37113102016-03-10 17:37:16 +02007813 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
7814 /* set 1ms timeout for PA_TACTIVATE */
7815 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08007816
7817 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
7818 ufshcd_quirk_tune_host_pa_tactivate(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02007819}
7820
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007821static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
7822{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007823 hba->ufs_stats.hibern8_exit_cnt = 0;
7824 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08007825 hba->req_abort_count = 0;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007826}
7827
Bean Huo731f0622020-01-20 14:08:19 +01007828static int ufshcd_device_geo_params_init(struct ufs_hba *hba)
7829{
7830 int err;
7831 size_t buff_len;
7832 u8 *desc_buf;
7833
Bean Huo7a0bf852020-06-03 11:19:58 +02007834 buff_len = hba->desc_size[QUERY_DESC_IDN_GEOMETRY];
Bean Huo731f0622020-01-20 14:08:19 +01007835 desc_buf = kmalloc(buff_len, GFP_KERNEL);
7836 if (!desc_buf) {
7837 err = -ENOMEM;
7838 goto out;
7839 }
7840
Bean Huoc4607a02020-06-03 11:19:56 +02007841 err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_GEOMETRY, 0, 0,
7842 desc_buf, buff_len);
Bean Huo731f0622020-01-20 14:08:19 +01007843 if (err) {
7844 dev_err(hba->dev, "%s: Failed reading Geometry Desc. err = %d\n",
7845 __func__, err);
7846 goto out;
7847 }
7848
7849 if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 1)
7850 hba->dev_info.max_lu_supported = 32;
7851 else if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 0)
7852 hba->dev_info.max_lu_supported = 8;
7853
Daejun Parkf02bc972021-07-12 17:58:30 +09007854 if (hba->desc_size[QUERY_DESC_IDN_GEOMETRY] >=
7855 GEOMETRY_DESC_PARAM_HPB_MAX_ACTIVE_REGS)
7856 ufshpb_get_geo_info(hba, desc_buf);
7857
Bean Huo731f0622020-01-20 14:08:19 +01007858out:
7859 kfree(desc_buf);
7860 return err;
7861}
7862
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307863static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
7864 {19200000, REF_CLK_FREQ_19_2_MHZ},
7865 {26000000, REF_CLK_FREQ_26_MHZ},
7866 {38400000, REF_CLK_FREQ_38_4_MHZ},
7867 {52000000, REF_CLK_FREQ_52_MHZ},
7868 {0, REF_CLK_FREQ_INVAL},
7869};
7870
7871static enum ufs_ref_clk_freq
7872ufs_get_bref_clk_from_hz(unsigned long freq)
7873{
7874 int i;
7875
7876 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
7877 if (ufs_ref_clk_freqs[i].freq_hz == freq)
7878 return ufs_ref_clk_freqs[i].val;
7879
7880 return REF_CLK_FREQ_INVAL;
7881}
7882
7883void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
7884{
7885 unsigned long freq;
7886
7887 freq = clk_get_rate(refclk);
7888
7889 hba->dev_ref_clk_freq =
7890 ufs_get_bref_clk_from_hz(freq);
7891
7892 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
7893 dev_err(hba->dev,
7894 "invalid ref_clk setting = %ld\n", freq);
7895}
7896
7897static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
7898{
7899 int err;
7900 u32 ref_clk;
7901 u32 freq = hba->dev_ref_clk_freq;
7902
7903 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
7904 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
7905
7906 if (err) {
7907 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
7908 err);
7909 goto out;
7910 }
7911
7912 if (ref_clk == freq)
7913 goto out; /* nothing to update */
7914
7915 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
7916 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
7917
7918 if (err) {
7919 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
7920 ufs_ref_clk_freqs[freq].freq_hz);
7921 goto out;
7922 }
7923
7924 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
7925 ufs_ref_clk_freqs[freq].freq_hz);
7926
7927out:
7928 return err;
7929}
7930
Bean Huo1b9e2142020-01-20 14:08:15 +01007931static int ufshcd_device_params_init(struct ufs_hba *hba)
7932{
7933 bool flag;
Bean Huo7a0bf852020-06-03 11:19:58 +02007934 int ret, i;
Bean Huo1b9e2142020-01-20 14:08:15 +01007935
Bean Huo7a0bf852020-06-03 11:19:58 +02007936 /* Init device descriptor sizes */
7937 for (i = 0; i < QUERY_DESC_IDN_MAX; i++)
7938 hba->desc_size[i] = QUERY_DESC_MAX_SIZE;
Bean Huo1b9e2142020-01-20 14:08:15 +01007939
Bean Huo731f0622020-01-20 14:08:19 +01007940 /* Init UFS geometry descriptor related parameters */
7941 ret = ufshcd_device_geo_params_init(hba);
7942 if (ret)
7943 goto out;
7944
Bean Huo1b9e2142020-01-20 14:08:15 +01007945 /* Check and apply UFS device quirks */
7946 ret = ufs_get_device_desc(hba);
7947 if (ret) {
7948 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
7949 __func__, ret);
7950 goto out;
7951 }
7952
Can Guo09f17792020-02-10 19:40:49 -08007953 ufshcd_get_ref_clk_gating_wait(hba);
7954
Bean Huo1b9e2142020-01-20 14:08:15 +01007955 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08007956 QUERY_FLAG_IDN_PWR_ON_WPE, 0, &flag))
Bean Huo1b9e2142020-01-20 14:08:15 +01007957 hba->dev_info.f_power_on_wp_en = flag;
7958
Bean Huo2b35b2a2020-01-20 14:08:16 +01007959 /* Probe maximum power mode co-supported by both UFS host and device */
7960 if (ufshcd_get_max_pwr_mode(hba))
7961 dev_err(hba->dev,
7962 "%s: Failed getting max supported power mode\n",
7963 __func__);
Bean Huo1b9e2142020-01-20 14:08:15 +01007964out:
7965 return ret;
7966}
7967
7968/**
7969 * ufshcd_add_lus - probe and add UFS logical units
7970 * @hba: per-adapter instance
7971 */
7972static int ufshcd_add_lus(struct ufs_hba *hba)
7973{
7974 int ret;
7975
Bean Huo1b9e2142020-01-20 14:08:15 +01007976 /* Add required well known logical units to scsi mid layer */
7977 ret = ufshcd_scsi_add_wlus(hba);
7978 if (ret)
7979 goto out;
7980
7981 /* Initialize devfreq after UFS device is detected */
7982 if (ufshcd_is_clkscaling_supported(hba)) {
7983 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7984 &hba->pwr_info,
7985 sizeof(struct ufs_pa_layer_attr));
7986 hba->clk_scaling.saved_pwr_info.is_valid = true;
Bean Huo1b9e2142020-01-20 14:08:15 +01007987 hba->clk_scaling.is_allowed = true;
Bean Huo1b9e2142020-01-20 14:08:15 +01007988
Stanley Chub058fa82021-01-20 23:01:41 +08007989 ret = ufshcd_devfreq_init(hba);
7990 if (ret)
7991 goto out;
7992
7993 hba->clk_scaling.is_enabled = true;
7994 ufshcd_init_clk_scaling_sysfs(hba);
Bean Huo1b9e2142020-01-20 14:08:15 +01007995 }
7996
7997 ufs_bsg_probe(hba);
Daejun Parkf02bc972021-07-12 17:58:30 +09007998 ufshpb_init(hba);
Bean Huo1b9e2142020-01-20 14:08:15 +01007999 scsi_scan_host(hba->host);
8000 pm_runtime_put_sync(hba->dev);
8001
Bean Huo1b9e2142020-01-20 14:08:15 +01008002out:
8003 return ret;
8004}
8005
Yaniv Gardi37113102016-03-10 17:37:16 +02008006/**
Bart Van Assche568dd992021-07-21 20:34:25 -07008007 * ufshcd_probe_hba - probe hba to detect device and initialize it
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008008 * @hba: per-adapter instance
Bart Van Assche568dd992021-07-21 20:34:25 -07008009 * @init_dev_params: whether or not to call ufshcd_device_params_init().
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008010 *
8011 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308012 */
Bart Van Assche568dd992021-07-21 20:34:25 -07008013static int ufshcd_probe_hba(struct ufs_hba *hba, bool init_dev_params)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308014{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308015 int ret;
Can Guo4db7a232020-08-09 05:15:51 -07008016 unsigned long flags;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008017 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308018
Can Guoaa53f582021-02-23 21:36:47 -08008019 hba->ufshcd_state = UFSHCD_STATE_RESET;
8020
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308021 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308022 if (ret)
8023 goto out;
8024
Dolev Ravivff8e20c2016-12-22 18:42:18 -08008025 /* Debug counters initialization */
8026 ufshcd_clear_dbg_ufs_stats(hba);
8027
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008028 /* UniPro link is active now */
8029 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05308030
Bean Huo1b9e2142020-01-20 14:08:15 +01008031 /* Verify device initialization by sending NOP OUT UPIU */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308032 ret = ufshcd_verify_dev_init(hba);
8033 if (ret)
8034 goto out;
8035
Bean Huo1b9e2142020-01-20 14:08:15 +01008036 /* Initiate UFS initialization, and waiting until completion */
Dolev Raviv68078d52013-07-30 00:35:58 +05308037 ret = ufshcd_complete_dev_init(hba);
8038 if (ret)
8039 goto out;
8040
Bean Huo1b9e2142020-01-20 14:08:15 +01008041 /*
8042 * Initialize UFS device parameters used by driver, these
8043 * parameters are associated with UFS descriptors.
8044 */
Bart Van Assche568dd992021-07-21 20:34:25 -07008045 if (init_dev_params) {
Bean Huo1b9e2142020-01-20 14:08:15 +01008046 ret = ufshcd_device_params_init(hba);
8047 if (ret)
8048 goto out;
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02008049 }
8050
Bean Huo09750062020-01-20 14:08:14 +01008051 ufshcd_tune_unipro_params(hba);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03008052
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008053 /* UFS device is also active now */
8054 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308055 ufshcd_force_reset_auto_bkops(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05308056
Bean Huo2b35b2a2020-01-20 14:08:16 +01008057 /* Gear up to HS gear if supported */
8058 if (hba->max_pwr_info.is_valid) {
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05308059 /*
8060 * Set the right value to bRefClkFreq before attempting to
8061 * switch to HS gears.
8062 */
8063 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
8064 ufshcd_set_dev_ref_clk(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03008065 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Dov Levenglick8643ae62016-10-17 17:10:14 -07008066 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03008067 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
8068 __func__, ret);
Dov Levenglick8643ae62016-10-17 17:10:14 -07008069 goto out;
8070 }
Can Guo6a9df812020-02-11 21:38:28 -08008071 ufshcd_print_pwr_info(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03008072 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008073
Can Guoe89860f2020-03-26 02:25:41 -07008074 /*
8075 * bActiveICCLevel is volatile for UFS device (as per latest v2.1 spec)
8076 * and for removable UFS card as well, hence always set the parameter.
8077 * Note: Error handler may issue the device reset hence resetting
8078 * bActiveICCLevel as well so it is always safe to set this here.
8079 */
8080 ufshcd_set_active_icc_lvl(hba);
8081
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008082 ufshcd_wb_config(hba);
Adrian Huntercd469472021-02-09 08:24:36 +02008083 if (hba->ee_usr_mask)
8084 ufshcd_write_ee_control(hba);
Can Guo71d848b2019-11-14 22:09:26 -08008085 /* Enable Auto-Hibernate if configured */
8086 ufshcd_auto_hibern8_enable(hba);
8087
Daejun Parkf02bc972021-07-12 17:58:30 +09008088 ufshpb_reset(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308089out:
Can Guo4db7a232020-08-09 05:15:51 -07008090 spin_lock_irqsave(hba->host->host_lock, flags);
8091 if (ret)
8092 hba->ufshcd_state = UFSHCD_STATE_ERROR;
8093 else if (hba->ufshcd_state == UFSHCD_STATE_RESET)
8094 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
8095 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008096
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008097 trace_ufshcd_init(dev_name(hba->dev), ret,
8098 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008099 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008100 return ret;
8101}
8102
8103/**
8104 * ufshcd_async_scan - asynchronous execution for probing hba
8105 * @data: data pointer to pass to this function
8106 * @cookie: cookie data
8107 */
8108static void ufshcd_async_scan(void *data, async_cookie_t cookie)
8109{
8110 struct ufs_hba *hba = (struct ufs_hba *)data;
Bean Huo1b9e2142020-01-20 14:08:15 +01008111 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008112
Can Guo9cd20d32021-01-13 19:13:28 -08008113 down(&hba->host_sem);
Bean Huo1b9e2142020-01-20 14:08:15 +01008114 /* Initialize hba, detect and initialize UFS device */
8115 ret = ufshcd_probe_hba(hba, true);
Can Guo9cd20d32021-01-13 19:13:28 -08008116 up(&hba->host_sem);
Bean Huo1b9e2142020-01-20 14:08:15 +01008117 if (ret)
8118 goto out;
8119
8120 /* Probe and add UFS logical units */
8121 ret = ufshcd_add_lus(hba);
8122out:
8123 /*
8124 * If we failed to initialize the device or the device is not
8125 * present, turn off the power/clocks etc.
8126 */
8127 if (ret) {
8128 pm_runtime_put_sync(hba->dev);
Bean Huo1b9e2142020-01-20 14:08:15 +01008129 ufshcd_hba_exit(hba);
8130 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308131}
8132
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02008133static const struct attribute_group *ufshcd_driver_groups[] = {
8134 &ufs_sysfs_unit_descriptor_group,
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02008135 &ufs_sysfs_lun_attributes_group,
Daejun Parkf02bc972021-07-12 17:58:30 +09008136#ifdef CONFIG_SCSI_UFS_HPB
8137 &ufs_sysfs_hpb_stat_group,
Daejun Park41d8a932021-07-12 18:00:25 +09008138 &ufs_sysfs_hpb_param_group,
Daejun Parkf02bc972021-07-12 17:58:30 +09008139#endif
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02008140 NULL,
8141};
8142
Stanley Chu90b84912020-05-09 17:37:13 +08008143static struct ufs_hba_variant_params ufs_hba_vps = {
8144 .hba_enable_delay_us = 1000,
Stanley Chud14734ae2020-05-09 17:37:15 +08008145 .wb_flush_threshold = UFS_WB_BUF_REMAIN_PERCENT(40),
Stanley Chu90b84912020-05-09 17:37:13 +08008146 .devfreq_profile.polling_ms = 100,
8147 .devfreq_profile.target = ufshcd_devfreq_target,
8148 .devfreq_profile.get_dev_status = ufshcd_devfreq_get_dev_status,
8149 .ondemand_data.upthreshold = 70,
8150 .ondemand_data.downdifferential = 5,
8151};
8152
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308153static struct scsi_host_template ufshcd_driver_template = {
8154 .module = THIS_MODULE,
8155 .name = UFSHCD,
8156 .proc_name = UFSHCD,
8157 .queuecommand = ufshcd_queuecommand,
8158 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09008159 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308160 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03008161 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308162 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05308163 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
8164 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308165 .this_id = -1,
8166 .sg_tablesize = SG_ALL,
8167 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
8168 .can_queue = UFSHCD_CAN_QUEUE,
Christoph Hellwig552a9902019-06-17 14:19:55 +02008169 .max_segment_size = PRDT_DATA_BYTE_COUNT_MAX,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008170 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01008171 .track_queue_depth = 1,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02008172 .sdev_groups = ufshcd_driver_groups,
Christoph Hellwig4af14d12018-12-13 16:17:09 +01008173 .dma_boundary = PAGE_SIZE - 1,
Stanley Chu49615ba2019-09-16 23:56:50 +08008174 .rpm_autosuspend_delay = RPM_AUTOSUSPEND_DELAY_MS,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308175};
8176
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008177static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
8178 int ua)
8179{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08008180 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008181
Bjorn Andersson7b16a072015-02-11 19:35:28 -08008182 if (!vreg)
8183 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008184
Stanley Chu0487fff2019-03-28 17:16:25 +08008185 /*
8186 * "set_load" operation shall be required on those regulators
8187 * which specifically configured current limitation. Otherwise
8188 * zero max_uA may cause unexpected behavior when regulator is
8189 * enabled or set as high power mode.
8190 */
8191 if (!vreg->max_uA)
8192 return 0;
8193
Bjorn Andersson7b16a072015-02-11 19:35:28 -08008194 ret = regulator_set_load(vreg->reg, ua);
8195 if (ret < 0) {
8196 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
8197 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008198 }
8199
8200 return ret;
8201}
8202
8203static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
8204 struct ufs_vreg *vreg)
8205{
Marc Gonzalez73067982019-02-27 11:41:45 +01008206 return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008207}
8208
8209static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
8210 struct ufs_vreg *vreg)
8211{
Adrian Hunter7c7cfdc2019-08-14 15:59:50 +03008212 if (!vreg)
8213 return 0;
8214
Marc Gonzalez73067982019-02-27 11:41:45 +01008215 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008216}
8217
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008218static int ufshcd_config_vreg(struct device *dev,
8219 struct ufs_vreg *vreg, bool on)
8220{
8221 int ret = 0;
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06008222 struct regulator *reg;
8223 const char *name;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008224 int min_uV, uA_load;
8225
8226 BUG_ON(!vreg);
8227
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06008228 reg = vreg->reg;
8229 name = vreg->name;
8230
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008231 if (regulator_count_voltages(reg) > 0) {
Asutosh Das90d88f42020-02-10 19:40:45 -08008232 uA_load = on ? vreg->max_uA : 0;
8233 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
8234 if (ret)
8235 goto out;
8236
Stanley Chu3b141e82019-03-28 17:16:24 +08008237 if (vreg->min_uV && vreg->max_uV) {
8238 min_uV = on ? vreg->min_uV : 0;
8239 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
Bean Huob0008622020-08-14 11:50:34 +02008240 if (ret)
Stanley Chu3b141e82019-03-28 17:16:24 +08008241 dev_err(dev,
8242 "%s: %s set voltage failed, err=%d\n",
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008243 __func__, name, ret);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008244 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008245 }
8246out:
8247 return ret;
8248}
8249
8250static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
8251{
8252 int ret = 0;
8253
Marc Gonzalez73067982019-02-27 11:41:45 +01008254 if (!vreg || vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008255 goto out;
8256
8257 ret = ufshcd_config_vreg(dev, vreg, true);
8258 if (!ret)
8259 ret = regulator_enable(vreg->reg);
8260
8261 if (!ret)
8262 vreg->enabled = true;
8263 else
8264 dev_err(dev, "%s: %s enable failed, err=%d\n",
8265 __func__, vreg->name, ret);
8266out:
8267 return ret;
8268}
8269
8270static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
8271{
8272 int ret = 0;
8273
Stanley Chuf8162ac2020-12-07 13:49:54 +08008274 if (!vreg || !vreg->enabled || vreg->always_on)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008275 goto out;
8276
8277 ret = regulator_disable(vreg->reg);
8278
8279 if (!ret) {
8280 /* ignore errors on applying disable config */
8281 ufshcd_config_vreg(dev, vreg, false);
8282 vreg->enabled = false;
8283 } else {
8284 dev_err(dev, "%s: %s disable failed, err=%d\n",
8285 __func__, vreg->name, ret);
8286 }
8287out:
8288 return ret;
8289}
8290
8291static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
8292{
8293 int ret = 0;
8294 struct device *dev = hba->dev;
8295 struct ufs_vreg_info *info = &hba->vreg_info;
8296
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008297 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
8298 if (ret)
8299 goto out;
8300
8301 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
8302 if (ret)
8303 goto out;
8304
8305 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008306
8307out:
8308 if (ret) {
8309 ufshcd_toggle_vreg(dev, info->vccq2, false);
8310 ufshcd_toggle_vreg(dev, info->vccq, false);
8311 ufshcd_toggle_vreg(dev, info->vcc, false);
8312 }
8313 return ret;
8314}
8315
Raviv Shvili6a771a62014-09-25 15:32:24 +03008316static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
8317{
8318 struct ufs_vreg_info *info = &hba->vreg_info;
8319
Zeng Guangyue60b7b822019-03-30 17:03:13 +08008320 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
Raviv Shvili6a771a62014-09-25 15:32:24 +03008321}
8322
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008323static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
8324{
8325 int ret = 0;
8326
8327 if (!vreg)
8328 goto out;
8329
8330 vreg->reg = devm_regulator_get(dev, vreg->name);
8331 if (IS_ERR(vreg->reg)) {
8332 ret = PTR_ERR(vreg->reg);
8333 dev_err(dev, "%s: %s get failed, err=%d\n",
8334 __func__, vreg->name, ret);
8335 }
8336out:
8337 return ret;
8338}
8339
8340static int ufshcd_init_vreg(struct ufs_hba *hba)
8341{
8342 int ret = 0;
8343 struct device *dev = hba->dev;
8344 struct ufs_vreg_info *info = &hba->vreg_info;
8345
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008346 ret = ufshcd_get_vreg(dev, info->vcc);
8347 if (ret)
8348 goto out;
8349
8350 ret = ufshcd_get_vreg(dev, info->vccq);
Bean Huob0008622020-08-14 11:50:34 +02008351 if (!ret)
8352 ret = ufshcd_get_vreg(dev, info->vccq2);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008353out:
8354 return ret;
8355}
8356
Raviv Shvili6a771a62014-09-25 15:32:24 +03008357static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
8358{
8359 struct ufs_vreg_info *info = &hba->vreg_info;
8360
8361 if (info)
8362 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
8363
8364 return 0;
8365}
8366
Can Guo81309c22020-11-25 18:01:00 -08008367static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008368{
8369 int ret = 0;
8370 struct ufs_clk_info *clki;
8371 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008372 unsigned long flags;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08008373 ktime_t start = ktime_get();
8374 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008375
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03008376 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008377 goto out;
8378
Can Guo38f32422020-02-10 19:40:47 -08008379 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
8380 if (ret)
8381 return ret;
Subhash Jadavani1e879e82016-10-06 21:48:22 -07008382
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008383 list_for_each_entry(clki, head, list) {
8384 if (!IS_ERR_OR_NULL(clki->clk)) {
Can Guo81309c22020-11-25 18:01:00 -08008385 /*
8386 * Don't disable clocks which are needed
8387 * to keep the link active.
8388 */
8389 if (ufshcd_is_link_active(hba) &&
8390 clki->keep_link_active)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008391 continue;
8392
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08008393 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008394 if (on && !clki->enabled) {
8395 ret = clk_prepare_enable(clki->clk);
8396 if (ret) {
8397 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
8398 __func__, clki->name, ret);
8399 goto out;
8400 }
8401 } else if (!on && clki->enabled) {
8402 clk_disable_unprepare(clki->clk);
8403 }
8404 clki->enabled = on;
8405 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
8406 clki->name, on ? "en" : "dis");
8407 }
8408 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008409
Can Guo38f32422020-02-10 19:40:47 -08008410 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
8411 if (ret)
8412 return ret;
Subhash Jadavani1e879e82016-10-06 21:48:22 -07008413
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008414out:
8415 if (ret) {
8416 list_for_each_entry(clki, head, list) {
8417 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
8418 clk_disable_unprepare(clki->clk);
8419 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008420 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008421 spin_lock_irqsave(hba->host->host_lock, flags);
8422 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008423 trace_ufshcd_clk_gating(dev_name(hba->dev),
8424 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008425 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008426 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008427
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08008428 if (clk_state_changed)
8429 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
8430 (on ? "on" : "off"),
8431 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008432 return ret;
8433}
8434
8435static int ufshcd_init_clocks(struct ufs_hba *hba)
8436{
8437 int ret = 0;
8438 struct ufs_clk_info *clki;
8439 struct device *dev = hba->dev;
8440 struct list_head *head = &hba->clk_list_head;
8441
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03008442 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008443 goto out;
8444
8445 list_for_each_entry(clki, head, list) {
8446 if (!clki->name)
8447 continue;
8448
8449 clki->clk = devm_clk_get(dev, clki->name);
8450 if (IS_ERR(clki->clk)) {
8451 ret = PTR_ERR(clki->clk);
8452 dev_err(dev, "%s: %s clk get failed, %d\n",
8453 __func__, clki->name, ret);
8454 goto out;
8455 }
8456
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05308457 /*
8458 * Parse device ref clk freq as per device tree "ref_clk".
8459 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
8460 * in ufshcd_alloc_host().
8461 */
8462 if (!strcmp(clki->name, "ref_clk"))
8463 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
8464
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008465 if (clki->max_freq) {
8466 ret = clk_set_rate(clki->clk, clki->max_freq);
8467 if (ret) {
8468 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
8469 __func__, clki->name,
8470 clki->max_freq, ret);
8471 goto out;
8472 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03008473 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008474 }
8475 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
8476 clki->name, clk_get_rate(clki->clk));
8477 }
8478out:
8479 return ret;
8480}
8481
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008482static int ufshcd_variant_hba_init(struct ufs_hba *hba)
8483{
8484 int err = 0;
8485
8486 if (!hba->vops)
8487 goto out;
8488
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008489 err = ufshcd_vops_init(hba);
8490 if (err)
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008491 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008492 __func__, ufshcd_get_var_name(hba), err);
Stanley Chuade921a2020-12-05 20:00:38 +08008493out:
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008494 return err;
8495}
8496
8497static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
8498{
8499 if (!hba->vops)
8500 return;
8501
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008502 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008503}
8504
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008505static int ufshcd_hba_init(struct ufs_hba *hba)
8506{
8507 int err;
8508
Raviv Shvili6a771a62014-09-25 15:32:24 +03008509 /*
8510 * Handle host controller power separately from the UFS device power
8511 * rails as it will help controlling the UFS host controller power
8512 * collapse easily which is different than UFS device power collapse.
8513 * Also, enable the host controller power before we go ahead with rest
8514 * of the initialization here.
8515 */
8516 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008517 if (err)
8518 goto out;
8519
Raviv Shvili6a771a62014-09-25 15:32:24 +03008520 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008521 if (err)
8522 goto out;
8523
Raviv Shvili6a771a62014-09-25 15:32:24 +03008524 err = ufshcd_init_clocks(hba);
8525 if (err)
8526 goto out_disable_hba_vreg;
8527
8528 err = ufshcd_setup_clocks(hba, true);
8529 if (err)
8530 goto out_disable_hba_vreg;
8531
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008532 err = ufshcd_init_vreg(hba);
8533 if (err)
8534 goto out_disable_clks;
8535
8536 err = ufshcd_setup_vreg(hba, true);
8537 if (err)
8538 goto out_disable_clks;
8539
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008540 err = ufshcd_variant_hba_init(hba);
8541 if (err)
8542 goto out_disable_vreg;
8543
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02008544 ufs_debugfs_hba_init(hba);
8545
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008546 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008547 goto out;
8548
8549out_disable_vreg:
8550 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008551out_disable_clks:
8552 ufshcd_setup_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03008553out_disable_hba_vreg:
8554 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008555out:
8556 return err;
8557}
8558
8559static void ufshcd_hba_exit(struct ufs_hba *hba)
8560{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008561 if (hba->is_powered) {
Can Guo4543d9d2021-01-20 02:04:22 -08008562 ufshcd_exit_clk_scaling(hba);
8563 ufshcd_exit_clk_gating(hba);
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02008564 ufs_debugfs_hba_exit(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008565 ufshcd_variant_hba_exit(hba);
8566 ufshcd_setup_vreg(hba, false);
8567 ufshcd_setup_clocks(hba, false);
8568 ufshcd_setup_hba_vreg(hba, false);
8569 hba->is_powered = false;
Bean Huo09750062020-01-20 14:08:14 +01008570 ufs_put_device_desc(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008571 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008572}
8573
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308574/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008575 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
8576 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308577 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008578 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308579 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008580 * Returns 0 if requested power mode is set successfully
8581 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308582 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008583static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
8584 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308585{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008586 unsigned char cmd[6] = { START_STOP };
8587 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03008588 struct scsi_device *sdp;
8589 unsigned long flags;
Jaegeuk Kimaf21c3f2021-10-01 11:20:14 -07008590 int ret, retries;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008591
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03008592 spin_lock_irqsave(hba->host->host_lock, flags);
8593 sdp = hba->sdev_ufs_device;
8594 if (sdp) {
8595 ret = scsi_device_get(sdp);
8596 if (!ret && !scsi_device_online(sdp)) {
8597 ret = -ENODEV;
8598 scsi_device_put(sdp);
8599 }
8600 } else {
8601 ret = -ENODEV;
8602 }
8603 spin_unlock_irqrestore(hba->host->host_lock, flags);
8604
8605 if (ret)
8606 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008607
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308608 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008609 * If scsi commands fail, the scsi mid-layer schedules scsi error-
8610 * handling, which would wait for host to be resumed. Since we know
8611 * we are functional while we are here, skip host resume in error
8612 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308613 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008614 hba->host->eh_noresume = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308615
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008616 cmd[4] = pwr_mode << 4;
8617
8618 /*
8619 * Current function would be generally called from the power management
Christoph Hellwige8064022016-10-20 15:12:13 +02008620 * callbacks hence set the RQF_PM flag so that it doesn't resume the
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008621 * already suspended childs.
8622 */
Jaegeuk Kimaf21c3f2021-10-01 11:20:14 -07008623 for (retries = 3; retries > 0; --retries) {
8624 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
8625 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
8626 if (!scsi_status_is_check_condition(ret) ||
8627 !scsi_sense_valid(&sshdr) ||
8628 sshdr.sense_key != UNIT_ATTENTION)
8629 break;
8630 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008631 if (ret) {
8632 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02008633 "START_STOP failed for power mode: %d, result %x\n",
8634 pwr_mode, ret);
Hannes Reinecke464a00c2021-04-27 10:30:15 +02008635 if (ret > 0 && scsi_sense_valid(&sshdr))
Hannes Reinecke21045512015-01-08 07:43:46 +01008636 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008637 }
8638
8639 if (!ret)
8640 hba->curr_dev_pwr_mode = pwr_mode;
Randall Huang19186512020-11-30 20:14:02 -08008641
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03008642 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008643 hba->host->eh_noresume = 0;
8644 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308645}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308646
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008647static int ufshcd_link_state_transition(struct ufs_hba *hba,
8648 enum uic_link_state req_link_state,
8649 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308650{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008651 int ret = 0;
8652
8653 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308654 return 0;
8655
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008656 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
8657 ret = ufshcd_uic_hibern8_enter(hba);
Can Guo4db7a232020-08-09 05:15:51 -07008658 if (!ret) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008659 ufshcd_set_link_hibern8(hba);
Can Guo4db7a232020-08-09 05:15:51 -07008660 } else {
8661 dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
8662 __func__, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008663 goto out;
Can Guo4db7a232020-08-09 05:15:51 -07008664 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008665 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308666 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008667 * If autobkops is enabled, link can't be turned off because
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008668 * turning off the link would also turn off the device, except in the
8669 * case of DeepSleep where the device is expected to remain powered.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308670 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008671 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
Dan Carpenterdc30c9e2019-12-13 13:49:35 +03008672 (!check_for_bkops || !hba->auto_bkops_enabled)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008673 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02008674 * Let's make sure that link is in low power mode, we are doing
8675 * this currently by putting the link in Hibern8. Otherway to
8676 * put the link in low power mode is to send the DME end point
8677 * to device and then send the DME reset command to local
8678 * unipro. But putting the link in hibern8 is much faster.
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008679 *
8680 * Note also that putting the link in Hibern8 is a requirement
8681 * for entering DeepSleep.
Yaniv Gardif3099fb2016-03-10 17:37:17 +02008682 */
8683 ret = ufshcd_uic_hibern8_enter(hba);
Can Guo4db7a232020-08-09 05:15:51 -07008684 if (ret) {
8685 dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
8686 __func__, ret);
Yaniv Gardif3099fb2016-03-10 17:37:17 +02008687 goto out;
Can Guo4db7a232020-08-09 05:15:51 -07008688 }
Yaniv Gardif3099fb2016-03-10 17:37:17 +02008689 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008690 * Change controller state to "reset state" which
8691 * should also put the link in off/reset state
8692 */
Bart Van Assche5cac1092020-05-07 15:27:50 -07008693 ufshcd_hba_stop(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008694 /*
8695 * TODO: Check if we need any delay to make sure that
8696 * controller is reset
8697 */
8698 ufshcd_set_link_off(hba);
8699 }
8700
8701out:
8702 return ret;
8703}
8704
8705static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
8706{
Stanley Chuc4df6ee2020-07-29 13:18:39 +08008707 bool vcc_off = false;
8708
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008709 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02008710 * It seems some UFS devices may keep drawing more than sleep current
8711 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
8712 * To avoid this situation, add 2ms delay before putting these UFS
8713 * rails in LPM mode.
8714 */
8715 if (!ufshcd_is_link_active(hba) &&
8716 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
8717 usleep_range(2000, 2100);
8718
8719 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008720 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
8721 * power.
8722 *
8723 * If UFS device and link is in OFF state, all power supplies (VCC,
8724 * VCCQ, VCCQ2) can be turned off if power on write protect is not
8725 * required. If UFS link is inactive (Hibern8 or OFF state) and device
8726 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
8727 *
8728 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
8729 * in low power state which would save some power.
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008730 *
8731 * If Write Booster is enabled and the device needs to flush the WB
8732 * buffer OR if bkops status is urgent for WB, keep Vcc on.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008733 */
8734 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8735 !hba->dev_info.is_lu_power_on_wp) {
8736 ufshcd_setup_vreg(hba, false);
Stanley Chuc4df6ee2020-07-29 13:18:39 +08008737 vcc_off = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008738 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Stanley Chu51dd9052020-05-22 16:32:12 +08008739 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
Stanley Chuc4df6ee2020-07-29 13:18:39 +08008740 vcc_off = true;
Can Guo23043dd2021-04-25 20:48:38 -07008741 if (ufshcd_is_link_hibern8(hba) || ufshcd_is_link_off(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008742 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8743 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
8744 }
8745 }
Stanley Chuc4df6ee2020-07-29 13:18:39 +08008746
8747 /*
8748 * Some UFS devices require delay after VCC power rail is turned-off.
8749 */
8750 if (vcc_off && hba->vreg_info.vcc &&
8751 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_AFTER_LPM)
8752 usleep_range(5000, 5100);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008753}
8754
Bart Van Assche9bb25e52021-07-21 20:34:24 -07008755#ifdef CONFIG_PM
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008756static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
8757{
8758 int ret = 0;
8759
8760 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8761 !hba->dev_info.is_lu_power_on_wp) {
8762 ret = ufshcd_setup_vreg(hba, true);
8763 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Can Guo23043dd2021-04-25 20:48:38 -07008764 if (!ufshcd_is_link_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008765 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
8766 if (ret)
8767 goto vcc_disable;
8768 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
8769 if (ret)
8770 goto vccq_lpm;
8771 }
Subhash Jadavani69d72ac2016-10-27 17:26:24 -07008772 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008773 }
8774 goto out;
8775
8776vccq_lpm:
8777 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8778vcc_disable:
8779 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
8780out:
8781 return ret;
8782}
Bart Van Assche9bb25e52021-07-21 20:34:24 -07008783#endif /* CONFIG_PM */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008784
8785static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
8786{
Can Guodd7143e2020-10-27 12:10:36 -07008787 if (ufshcd_is_link_off(hba) || ufshcd_can_aggressive_pc(hba))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008788 ufshcd_setup_hba_vreg(hba, false);
8789}
8790
8791static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
8792{
Can Guodd7143e2020-10-27 12:10:36 -07008793 if (ufshcd_is_link_off(hba) || ufshcd_can_aggressive_pc(hba))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008794 ufshcd_setup_hba_vreg(hba, true);
8795}
8796
Asutosh Dasb294ff32021-04-23 17:20:16 -07008797static int __ufshcd_wl_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008798{
8799 int ret = 0;
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008800 int check_for_bkops;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008801 enum ufs_pm_level pm_lvl;
8802 enum ufs_dev_pwr_mode req_dev_pwr_mode;
8803 enum uic_link_state req_link_state;
8804
Asutosh Dasb294ff32021-04-23 17:20:16 -07008805 hba->pm_op_in_progress = true;
Bart Van Assche4c6cb9e2021-05-13 10:12:29 -07008806 if (pm_op != UFS_SHUTDOWN_PM) {
8807 pm_lvl = pm_op == UFS_RUNTIME_PM ?
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008808 hba->rpm_lvl : hba->spm_lvl;
8809 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
8810 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
8811 } else {
8812 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
8813 req_link_state = UIC_LINK_OFF_STATE;
8814 }
8815
Daejun Parkf02bc972021-07-12 17:58:30 +09008816 ufshpb_suspend(hba);
8817
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008818 /*
8819 * If we can't transition into any of the low power modes
8820 * just gate the clocks.
8821 */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008822 ufshcd_hold(hba, false);
8823 hba->clk_gating.is_suspended = true;
8824
Stanley Chu348e1bc2021-01-20 23:01:42 +08008825 if (ufshcd_is_clkscaling_supported(hba))
8826 ufshcd_clk_scaling_suspend(hba, true);
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07008827
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008828 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
8829 req_link_state == UIC_LINK_ACTIVE_STATE) {
Asutosh Dasb294ff32021-04-23 17:20:16 -07008830 goto vops_suspend;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008831 }
8832
8833 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
8834 (req_link_state == hba->uic_link_state))
Asutosh Dasb294ff32021-04-23 17:20:16 -07008835 goto enable_scaling;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008836
8837 /* UFS device & link must be active before we enter in this function */
8838 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
8839 ret = -EINVAL;
Asutosh Dasb294ff32021-04-23 17:20:16 -07008840 goto enable_scaling;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008841 }
8842
Bart Van Assche4c6cb9e2021-05-13 10:12:29 -07008843 if (pm_op == UFS_RUNTIME_PM) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03008844 if (ufshcd_can_autobkops_during_suspend(hba)) {
8845 /*
8846 * The device is idle with no requests in the queue,
8847 * allow background operations if bkops status shows
8848 * that performance might be impacted.
8849 */
8850 ret = ufshcd_urgent_bkops(hba);
8851 if (ret)
Asutosh Dasb294ff32021-04-23 17:20:16 -07008852 goto enable_scaling;
Subhash Jadavani374a2462014-09-25 15:32:35 +03008853 } else {
8854 /* make sure that auto bkops is disabled */
8855 ufshcd_disable_auto_bkops(hba);
8856 }
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008857 /*
Stanley Chu51dd9052020-05-22 16:32:12 +08008858 * If device needs to do BKOP or WB buffer flush during
8859 * Hibern8, keep device power mode as "active power mode"
8860 * and VCC supply.
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008861 */
Stanley Chu51dd9052020-05-22 16:32:12 +08008862 hba->dev_info.b_rpm_dev_flush_capable =
8863 hba->auto_bkops_enabled ||
8864 (((req_link_state == UIC_LINK_HIBERN8_STATE) ||
8865 ((req_link_state == UIC_LINK_ACTIVE_STATE) &&
8866 ufshcd_is_auto_hibern8_enabled(hba))) &&
8867 ufshcd_wb_need_flush(hba));
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008868 }
8869
Kiwoong Kim6948a962020-12-19 15:40:39 +09008870 flush_work(&hba->eeh_work);
8871
Stanley Chu51dd9052020-05-22 16:32:12 +08008872 if (req_dev_pwr_mode != hba->curr_dev_pwr_mode) {
Bart Van Assche4c6cb9e2021-05-13 10:12:29 -07008873 if (pm_op != UFS_RUNTIME_PM)
Stanley Chu51dd9052020-05-22 16:32:12 +08008874 /* ensure that bkops is disabled */
8875 ufshcd_disable_auto_bkops(hba);
Stanley Chu51dd9052020-05-22 16:32:12 +08008876
8877 if (!hba->dev_info.b_rpm_dev_flush_capable) {
8878 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
8879 if (ret)
Asutosh Dasb294ff32021-04-23 17:20:16 -07008880 goto enable_scaling;
Stanley Chu51dd9052020-05-22 16:32:12 +08008881 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008882 }
8883
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008884 /*
8885 * In the case of DeepSleep, the device is expected to remain powered
8886 * with the link off, so do not check for bkops.
8887 */
8888 check_for_bkops = !ufshcd_is_ufs_dev_deepsleep(hba);
8889 ret = ufshcd_link_state_transition(hba, req_link_state, check_for_bkops);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008890 if (ret)
8891 goto set_dev_active;
8892
Asutosh Dasb294ff32021-04-23 17:20:16 -07008893vops_suspend:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008894 /*
8895 * Call vendor specific suspend callback. As these callbacks may access
8896 * vendor specific host controller register space call them before the
8897 * host clocks are ON.
8898 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008899 ret = ufshcd_vops_suspend(hba, pm_op);
8900 if (ret)
8901 goto set_link_active;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008902 goto out;
8903
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008904set_link_active:
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008905 /*
8906 * Device hardware reset is required to exit DeepSleep. Also, for
8907 * DeepSleep, the link is off so host reset and restore will be done
8908 * further below.
8909 */
8910 if (ufshcd_is_ufs_dev_deepsleep(hba)) {
Stanley Chu31a5d9c2020-12-08 21:56:35 +08008911 ufshcd_device_reset(hba);
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008912 WARN_ON(!ufshcd_is_link_off(hba));
8913 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008914 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
8915 ufshcd_set_link_active(hba);
8916 else if (ufshcd_is_link_off(hba))
8917 ufshcd_host_reset_and_restore(hba);
8918set_dev_active:
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008919 /* Can also get here needing to exit DeepSleep */
8920 if (ufshcd_is_ufs_dev_deepsleep(hba)) {
Stanley Chu31a5d9c2020-12-08 21:56:35 +08008921 ufshcd_device_reset(hba);
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008922 ufshcd_host_reset_and_restore(hba);
8923 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008924 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
8925 ufshcd_disable_auto_bkops(hba);
Asutosh Dasb294ff32021-04-23 17:20:16 -07008926enable_scaling:
Stanley Chu348e1bc2021-01-20 23:01:42 +08008927 if (ufshcd_is_clkscaling_supported(hba))
8928 ufshcd_clk_scaling_suspend(hba, false);
8929
Stanley Chu51dd9052020-05-22 16:32:12 +08008930 hba->dev_info.b_rpm_dev_flush_capable = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008931out:
Stanley Chu51dd9052020-05-22 16:32:12 +08008932 if (hba->dev_info.b_rpm_dev_flush_capable) {
8933 schedule_delayed_work(&hba->rpm_dev_flush_recheck_work,
8934 msecs_to_jiffies(RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS));
8935 }
8936
Asutosh Dasb294ff32021-04-23 17:20:16 -07008937 if (ret) {
8938 ufshcd_update_evt_hist(hba, UFS_EVT_WL_SUSP_ERR, (u32)ret);
8939 hba->clk_gating.is_suspended = false;
8940 ufshcd_release(hba);
Daejun Parkf02bc972021-07-12 17:58:30 +09008941 ufshpb_resume(hba);
Asutosh Dasb294ff32021-04-23 17:20:16 -07008942 }
8943 hba->pm_op_in_progress = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008944 return ret;
8945}
8946
YueHaibing75d645a2021-06-17 11:13:26 +08008947#ifdef CONFIG_PM
Asutosh Dasb294ff32021-04-23 17:20:16 -07008948static int __ufshcd_wl_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008949{
8950 int ret;
Asutosh Dasb294ff32021-04-23 17:20:16 -07008951 enum uic_link_state old_link_state = hba->uic_link_state;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008952
Asutosh Dasb294ff32021-04-23 17:20:16 -07008953 hba->pm_op_in_progress = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008954
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008955 /*
8956 * Call vendor specific resume callback. As these callbacks may access
8957 * vendor specific host controller register space call them when the
8958 * host clocks are ON.
8959 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008960 ret = ufshcd_vops_resume(hba, pm_op);
8961 if (ret)
Asutosh Dasb294ff32021-04-23 17:20:16 -07008962 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008963
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008964 /* For DeepSleep, the only supported option is to have the link off */
8965 WARN_ON(ufshcd_is_ufs_dev_deepsleep(hba) && !ufshcd_is_link_off(hba));
8966
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008967 if (ufshcd_is_link_hibern8(hba)) {
8968 ret = ufshcd_uic_hibern8_exit(hba);
Can Guo4db7a232020-08-09 05:15:51 -07008969 if (!ret) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008970 ufshcd_set_link_active(hba);
Can Guo4db7a232020-08-09 05:15:51 -07008971 } else {
8972 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
8973 __func__, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008974 goto vendor_suspend;
Can Guo4db7a232020-08-09 05:15:51 -07008975 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008976 } else if (ufshcd_is_link_off(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008977 /*
Asutosh Das089f5b62020-04-13 23:14:48 -07008978 * A full initialization of the host and the device is
8979 * required since the link was put to off during suspend.
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008980 * Note, in the case of DeepSleep, the device will exit
8981 * DeepSleep due to device reset.
Asutosh Das089f5b62020-04-13 23:14:48 -07008982 */
8983 ret = ufshcd_reset_and_restore(hba);
8984 /*
8985 * ufshcd_reset_and_restore() should have already
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008986 * set the link state as active
8987 */
8988 if (ret || !ufshcd_is_link_active(hba))
8989 goto vendor_suspend;
8990 }
8991
8992 if (!ufshcd_is_ufs_dev_active(hba)) {
8993 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
8994 if (ret)
8995 goto set_old_link_state;
8996 }
8997
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08008998 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
8999 ufshcd_enable_auto_bkops(hba);
9000 else
9001 /*
9002 * If BKOPs operations are urgently needed at this moment then
9003 * keep auto-bkops enabled or else disable it.
9004 */
9005 ufshcd_urgent_bkops(hba);
9006
Adrian Huntercd469472021-02-09 08:24:36 +02009007 if (hba->ee_usr_mask)
9008 ufshcd_write_ee_control(hba);
9009
Stanley Chu348e1bc2021-01-20 23:01:42 +08009010 if (ufshcd_is_clkscaling_supported(hba))
9011 ufshcd_clk_scaling_suspend(hba, false);
Sahitya Tummala856b3482014-09-25 15:32:34 +03009012
Stanley Chu51dd9052020-05-22 16:32:12 +08009013 if (hba->dev_info.b_rpm_dev_flush_capable) {
9014 hba->dev_info.b_rpm_dev_flush_capable = false;
9015 cancel_delayed_work(&hba->rpm_dev_flush_recheck_work);
9016 }
9017
Asutosh Dasb294ff32021-04-23 17:20:16 -07009018 /* Enable Auto-Hibernate if configured */
9019 ufshcd_auto_hibern8_enable(hba);
Daejun Parkf02bc972021-07-12 17:58:30 +09009020
9021 ufshpb_resume(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009022 goto out;
9023
9024set_old_link_state:
9025 ufshcd_link_state_transition(hba, old_link_state, 0);
9026vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02009027 ufshcd_vops_suspend(hba, pm_op);
Asutosh Dasb294ff32021-04-23 17:20:16 -07009028out:
9029 if (ret)
9030 ufshcd_update_evt_hist(hba, UFS_EVT_WL_RES_ERR, (u32)ret);
9031 hba->clk_gating.is_suspended = false;
9032 ufshcd_release(hba);
9033 hba->pm_op_in_progress = false;
9034 return ret;
9035}
9036
9037static int ufshcd_wl_runtime_suspend(struct device *dev)
9038{
9039 struct scsi_device *sdev = to_scsi_device(dev);
9040 struct ufs_hba *hba;
9041 int ret;
9042 ktime_t start = ktime_get();
9043
9044 hba = shost_priv(sdev->host);
9045
9046 ret = __ufshcd_wl_suspend(hba, UFS_RUNTIME_PM);
9047 if (ret)
9048 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9049
9050 trace_ufshcd_wl_runtime_suspend(dev_name(dev), ret,
9051 ktime_to_us(ktime_sub(ktime_get(), start)),
9052 hba->curr_dev_pwr_mode, hba->uic_link_state);
9053
9054 return ret;
9055}
9056
9057static int ufshcd_wl_runtime_resume(struct device *dev)
9058{
9059 struct scsi_device *sdev = to_scsi_device(dev);
9060 struct ufs_hba *hba;
9061 int ret = 0;
9062 ktime_t start = ktime_get();
9063
9064 hba = shost_priv(sdev->host);
9065
9066 ret = __ufshcd_wl_resume(hba, UFS_RUNTIME_PM);
9067 if (ret)
9068 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9069
9070 trace_ufshcd_wl_runtime_resume(dev_name(dev), ret,
9071 ktime_to_us(ktime_sub(ktime_get(), start)),
9072 hba->curr_dev_pwr_mode, hba->uic_link_state);
9073
9074 return ret;
9075}
YueHaibing75d645a2021-06-17 11:13:26 +08009076#endif
Asutosh Dasb294ff32021-04-23 17:20:16 -07009077
9078#ifdef CONFIG_PM_SLEEP
9079static int ufshcd_wl_suspend(struct device *dev)
9080{
9081 struct scsi_device *sdev = to_scsi_device(dev);
9082 struct ufs_hba *hba;
9083 int ret = 0;
9084 ktime_t start = ktime_get();
9085
9086 hba = shost_priv(sdev->host);
9087 down(&hba->host_sem);
9088
9089 if (pm_runtime_suspended(dev))
9090 goto out;
9091
9092 ret = __ufshcd_wl_suspend(hba, UFS_SYSTEM_PM);
9093 if (ret) {
9094 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9095 up(&hba->host_sem);
9096 }
9097
9098out:
9099 if (!ret)
9100 hba->is_sys_suspended = true;
9101 trace_ufshcd_wl_suspend(dev_name(dev), ret,
9102 ktime_to_us(ktime_sub(ktime_get(), start)),
9103 hba->curr_dev_pwr_mode, hba->uic_link_state);
9104
9105 return ret;
9106}
9107
9108static int ufshcd_wl_resume(struct device *dev)
9109{
9110 struct scsi_device *sdev = to_scsi_device(dev);
9111 struct ufs_hba *hba;
9112 int ret = 0;
9113 ktime_t start = ktime_get();
9114
9115 hba = shost_priv(sdev->host);
9116
9117 if (pm_runtime_suspended(dev))
9118 goto out;
9119
9120 ret = __ufshcd_wl_resume(hba, UFS_SYSTEM_PM);
9121 if (ret)
9122 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9123out:
9124 trace_ufshcd_wl_resume(dev_name(dev), ret,
9125 ktime_to_us(ktime_sub(ktime_get(), start)),
9126 hba->curr_dev_pwr_mode, hba->uic_link_state);
9127 if (!ret)
9128 hba->is_sys_suspended = false;
9129 up(&hba->host_sem);
9130 return ret;
9131}
9132#endif
9133
9134static void ufshcd_wl_shutdown(struct device *dev)
9135{
9136 struct scsi_device *sdev = to_scsi_device(dev);
9137 struct ufs_hba *hba;
9138
9139 hba = shost_priv(sdev->host);
9140
9141 down(&hba->host_sem);
9142 hba->shutting_down = true;
9143 up(&hba->host_sem);
9144
9145 /* Turn on everything while shutting down */
9146 ufshcd_rpm_get_sync(hba);
9147 scsi_device_quiesce(sdev);
9148 shost_for_each_device(sdev, hba->host) {
9149 if (sdev == hba->sdev_ufs_device)
9150 continue;
9151 scsi_device_quiesce(sdev);
9152 }
9153 __ufshcd_wl_suspend(hba, UFS_SHUTDOWN_PM);
9154}
9155
9156/**
9157 * ufshcd_suspend - helper function for suspend operations
9158 * @hba: per adapter instance
9159 *
9160 * This function will put disable irqs, turn off clocks
9161 * and set vreg and hba-vreg in lpm mode.
Asutosh Dasb294ff32021-04-23 17:20:16 -07009162 */
9163static int ufshcd_suspend(struct ufs_hba *hba)
9164{
9165 int ret;
9166
9167 if (!hba->is_powered)
9168 return 0;
9169 /*
9170 * Disable the host irq as host controller as there won't be any
9171 * host controller transaction expected till resume.
9172 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009173 ufshcd_disable_irq(hba);
Asutosh Dasb294ff32021-04-23 17:20:16 -07009174 ret = ufshcd_setup_clocks(hba, false);
9175 if (ret) {
9176 ufshcd_enable_irq(hba);
9177 return ret;
9178 }
Can Guo2dec9472020-08-09 05:15:47 -07009179 if (ufshcd_is_clkgating_allowed(hba)) {
9180 hba->clk_gating.state = CLKS_OFF;
9181 trace_ufshcd_clk_gating(dev_name(hba->dev),
9182 hba->clk_gating.state);
9183 }
Asutosh Dasb294ff32021-04-23 17:20:16 -07009184
9185 ufshcd_vreg_set_lpm(hba);
9186 /* Put the host controller in low power mode if possible */
9187 ufshcd_hba_vreg_set_lpm(hba);
9188 return ret;
9189}
9190
Bart Van Assche9bb25e52021-07-21 20:34:24 -07009191#ifdef CONFIG_PM
Asutosh Dasb294ff32021-04-23 17:20:16 -07009192/**
9193 * ufshcd_resume - helper function for resume operations
9194 * @hba: per adapter instance
9195 *
9196 * This function basically turns on the regulators, clocks and
9197 * irqs of the hba.
Asutosh Dasb294ff32021-04-23 17:20:16 -07009198 *
9199 * Returns 0 for success and non-zero for failure
9200 */
9201static int ufshcd_resume(struct ufs_hba *hba)
9202{
9203 int ret;
9204
9205 if (!hba->is_powered)
9206 return 0;
9207
9208 ufshcd_hba_vreg_set_hpm(hba);
9209 ret = ufshcd_vreg_set_hpm(hba);
9210 if (ret)
9211 goto out;
9212
9213 /* Make sure clocks are enabled before accessing controller */
9214 ret = ufshcd_setup_clocks(hba, true);
9215 if (ret)
9216 goto disable_vreg;
9217
9218 /* enable the host irq as host controller would be active soon */
9219 ufshcd_enable_irq(hba);
9220 goto out;
9221
Ziqi Chen528db9e2021-01-08 18:56:24 +08009222disable_vreg:
9223 ufshcd_vreg_set_lpm(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009224out:
Stanley Chu8808b4e2019-07-10 21:38:21 +08009225 if (ret)
Stanley Chue965e5e2020-12-05 19:58:59 +08009226 ufshcd_update_evt_hist(hba, UFS_EVT_RESUME_ERR, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009227 return ret;
9228}
Bart Van Assche9bb25e52021-07-21 20:34:24 -07009229#endif /* CONFIG_PM */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009230
Bart Van Assche9bb25e52021-07-21 20:34:24 -07009231#ifdef CONFIG_PM_SLEEP
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009232/**
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009233 * ufshcd_system_suspend - system suspend callback
9234 * @dev: Device associated with the UFS controller.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009235 *
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009236 * Executed before putting the system into a sleep state in which the contents
9237 * of main memory are preserved.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009238 *
9239 * Returns 0 for success and non-zero for failure
9240 */
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009241int ufshcd_system_suspend(struct device *dev)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009242{
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009243 struct ufs_hba *hba = dev_get_drvdata(dev);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009244 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009245 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009246
Asutosh Dasb294ff32021-04-23 17:20:16 -07009247 if (pm_runtime_suspended(hba->dev))
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08009248 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009249
Asutosh Dasb294ff32021-04-23 17:20:16 -07009250 ret = ufshcd_suspend(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009251out:
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009252 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
9253 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08009254 hba->curr_dev_pwr_mode, hba->uic_link_state);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009255 return ret;
9256}
9257EXPORT_SYMBOL(ufshcd_system_suspend);
9258
9259/**
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009260 * ufshcd_system_resume - system resume callback
9261 * @dev: Device associated with the UFS controller.
9262 *
9263 * Executed after waking the system up from a sleep state in which the contents
9264 * of main memory were preserved.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009265 *
9266 * Returns 0 for success and non-zero for failure
9267 */
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009268int ufshcd_system_resume(struct device *dev)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009269{
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009270 struct ufs_hba *hba = dev_get_drvdata(dev);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009271 ktime_t start = ktime_get();
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009272 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009273
Asutosh Dasb294ff32021-04-23 17:20:16 -07009274 if (pm_runtime_suspended(hba->dev))
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009275 goto out;
Asutosh Dasb294ff32021-04-23 17:20:16 -07009276
9277 ret = ufshcd_resume(hba);
9278
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009279out:
9280 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
9281 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08009282 hba->curr_dev_pwr_mode, hba->uic_link_state);
Asutosh Dasb294ff32021-04-23 17:20:16 -07009283
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009284 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009285}
9286EXPORT_SYMBOL(ufshcd_system_resume);
Bart Van Assche9bb25e52021-07-21 20:34:24 -07009287#endif /* CONFIG_PM_SLEEP */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009288
Bart Van Assche9bb25e52021-07-21 20:34:24 -07009289#ifdef CONFIG_PM
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009290/**
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009291 * ufshcd_runtime_suspend - runtime suspend callback
9292 * @dev: Device associated with the UFS controller.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009293 *
9294 * Check the description of ufshcd_suspend() function for more details.
9295 *
9296 * Returns 0 for success and non-zero for failure
9297 */
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009298int ufshcd_runtime_suspend(struct device *dev)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009299{
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009300 struct ufs_hba *hba = dev_get_drvdata(dev);
Asutosh Dasb294ff32021-04-23 17:20:16 -07009301 int ret;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009302 ktime_t start = ktime_get();
9303
Asutosh Dasb294ff32021-04-23 17:20:16 -07009304 ret = ufshcd_suspend(hba);
9305
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009306 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
9307 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08009308 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009309 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309310}
9311EXPORT_SYMBOL(ufshcd_runtime_suspend);
9312
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009313/**
9314 * ufshcd_runtime_resume - runtime resume routine
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009315 * @dev: Device associated with the UFS controller.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009316 *
Asutosh Dasb294ff32021-04-23 17:20:16 -07009317 * This function basically brings controller
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009318 * to active state. Following operations are done in this function:
9319 *
9320 * 1. Turn on all the controller related clocks
Asutosh Dasb294ff32021-04-23 17:20:16 -07009321 * 2. Turn ON VCC rail
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009322 */
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009323int ufshcd_runtime_resume(struct device *dev)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309324{
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009325 struct ufs_hba *hba = dev_get_drvdata(dev);
Asutosh Dasb294ff32021-04-23 17:20:16 -07009326 int ret;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009327 ktime_t start = ktime_get();
9328
Asutosh Dasb294ff32021-04-23 17:20:16 -07009329 ret = ufshcd_resume(hba);
9330
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009331 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
9332 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08009333 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009334 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309335}
9336EXPORT_SYMBOL(ufshcd_runtime_resume);
Bart Van Assche9bb25e52021-07-21 20:34:24 -07009337#endif /* CONFIG_PM */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309338
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309339/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009340 * ufshcd_shutdown - shutdown routine
9341 * @hba: per adapter instance
9342 *
Asutosh Dasb294ff32021-04-23 17:20:16 -07009343 * This function would turn off both UFS device and UFS hba
9344 * regulators. It would also disable clocks.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009345 *
9346 * Returns 0 always to allow force shutdown even in case of errors.
9347 */
9348int ufshcd_shutdown(struct ufs_hba *hba)
9349{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009350 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
9351 goto out;
9352
Stanley Chue92643d2020-11-19 14:29:16 +08009353 pm_runtime_get_sync(hba->dev);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009354
Asutosh Dasb294ff32021-04-23 17:20:16 -07009355 ufshcd_suspend(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009356out:
Can Guo88a92d62020-12-02 04:04:01 -08009357 hba->is_powered = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009358 /* allow force shutdown even in case of errors */
9359 return 0;
9360}
9361EXPORT_SYMBOL(ufshcd_shutdown);
9362
9363/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309364 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309365 * data structure memory
Bart Van Assche8aa29f12018-03-01 15:07:20 -08009366 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309367 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309368void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309369{
Asutosh Dasb294ff32021-04-23 17:20:16 -07009370 if (hba->sdev_ufs_device)
9371 ufshcd_rpm_get_sync(hba);
Avri Altmane88e2d32021-09-15 09:04:06 +03009372 ufs_hwmon_remove(hba);
Avri Altmandf032bf2018-10-07 17:30:35 +03009373 ufs_bsg_remove(hba);
Daejun Park4b5f4902021-07-12 17:58:59 +09009374 ufshpb_remove(hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02009375 ufs_sysfs_remove_nodes(hba->dev);
Bart Van Assche69a6c262019-12-09 10:13:09 -08009376 blk_cleanup_queue(hba->tmf_queue);
9377 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08009378 blk_cleanup_queue(hba->cmd_queue);
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05309379 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309380 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05309381 ufshcd_disable_intr(hba, hba->intr_mask);
Bart Van Assche5cac1092020-05-07 15:27:50 -07009382 ufshcd_hba_stop(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03009383 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309384}
9385EXPORT_SYMBOL_GPL(ufshcd_remove);
9386
9387/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02009388 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
9389 * @hba: pointer to Host Bus Adapter (HBA)
9390 */
9391void ufshcd_dealloc_host(struct ufs_hba *hba)
9392{
9393 scsi_host_put(hba->host);
9394}
9395EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
9396
9397/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09009398 * ufshcd_set_dma_mask - Set dma mask based on the controller
9399 * addressing capability
9400 * @hba: per adapter instance
9401 *
9402 * Returns 0 for success, non-zero for failure
9403 */
9404static int ufshcd_set_dma_mask(struct ufs_hba *hba)
9405{
9406 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
9407 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
9408 return 0;
9409 }
9410 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
9411}
9412
Bart Van Asschea113eaa2021-07-21 20:34:37 -07009413static struct scsi_transport_template ufshcd_transport_template = {
9414 .eh_strategy_handler = ufshcd_err_handler,
9415};
9416
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09009417/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009418 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309419 * @dev: pointer to device handle
9420 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309421 * Returns 0 on success, non-zero value on failure
9422 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009423int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309424{
9425 struct Scsi_Host *host;
9426 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009427 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309428
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309429 if (!dev) {
9430 dev_err(dev,
9431 "Invalid memory reference for dev is NULL\n");
9432 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309433 goto out_error;
9434 }
9435
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309436 host = scsi_host_alloc(&ufshcd_driver_template,
9437 sizeof(struct ufs_hba));
9438 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309439 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309440 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309441 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309442 }
Bart Van Asschea113eaa2021-07-21 20:34:37 -07009443 host->transportt = &ufshcd_transport_template;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309444 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309445 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309446 hba->dev = dev;
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05309447 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03009448 INIT_LIST_HEAD(&hba->clk_list_head);
Bart Van Assche169f5eb2021-07-21 20:34:34 -07009449 spin_lock_init(&hba->outstanding_lock);
9450
9451 *hba_handle = hba;
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03009452
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009453out_error:
9454 return err;
9455}
9456EXPORT_SYMBOL(ufshcd_alloc_host);
9457
Bart Van Assche69a6c262019-12-09 10:13:09 -08009458/* This function exists because blk_mq_alloc_tag_set() requires this. */
9459static blk_status_t ufshcd_queue_tmf(struct blk_mq_hw_ctx *hctx,
9460 const struct blk_mq_queue_data *qd)
9461{
9462 WARN_ON_ONCE(true);
9463 return BLK_STS_NOTSUPP;
9464}
9465
9466static const struct blk_mq_ops ufshcd_tmf_ops = {
9467 .queue_rq = ufshcd_queue_tmf,
9468};
9469
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009470/**
9471 * ufshcd_init - Driver initialization routine
9472 * @hba: per-adapter instance
9473 * @mmio_base: base register address
9474 * @irq: Interrupt line of device
9475 * Returns 0 on success, non-zero value on failure
9476 */
9477int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
9478{
9479 int err;
9480 struct Scsi_Host *host = hba->host;
9481 struct device *dev = hba->dev;
9482
9483 if (!mmio_base) {
9484 dev_err(hba->dev,
9485 "Invalid memory reference for mmio_base is NULL\n");
9486 err = -ENODEV;
9487 goto out_error;
9488 }
9489
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309490 hba->mmio_base = mmio_base;
9491 hba->irq = irq;
Stanley Chu90b84912020-05-09 17:37:13 +08009492 hba->vps = &ufs_hba_vps;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309493
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03009494 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009495 if (err)
9496 goto out_error;
9497
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309498 /* Read capabilities registers */
Satya Tangiraladf043c742020-07-06 20:04:14 +00009499 err = ufshcd_hba_capabilities(hba);
9500 if (err)
9501 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309502
9503 /* Get UFS version supported by the controller */
9504 hba->ufs_version = ufshcd_get_ufs_version(hba);
9505
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05309506 /* Get Interrupt bit mask per version */
9507 hba->intr_mask = ufshcd_get_intr_mask(hba);
9508
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09009509 err = ufshcd_set_dma_mask(hba);
9510 if (err) {
9511 dev_err(hba->dev, "set dma mask failed\n");
9512 goto out_disable;
9513 }
9514
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309515 /* Allocate memory for host memory space */
9516 err = ufshcd_memory_alloc(hba);
9517 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309518 dev_err(hba->dev, "Memory allocation failed\n");
9519 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309520 }
9521
9522 /* Configure LRB */
9523 ufshcd_host_memory_configure(hba);
9524
9525 host->can_queue = hba->nutrs;
9526 host->cmd_per_lun = hba->nutrs;
9527 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03009528 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309529 host->max_channel = UFSHCD_MAX_CHANNEL;
9530 host->unique_id = host->host_no;
Avri Altmana851b2b2018-10-07 17:30:34 +03009531 host->max_cmd_len = UFS_CDB_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309532
Dolev Raviv7eb584d2014-09-25 15:32:31 +03009533 hba->max_pwr_info.is_valid = false;
9534
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309535 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309536
Can Guo9cd20d32021-01-13 19:13:28 -08009537 sema_init(&hba->host_sem, 1);
Can Guo88a92d62020-12-02 04:04:01 -08009538
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309539 /* Initialize UIC command mutex */
9540 mutex_init(&hba->uic_cmd_mutex);
9541
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05309542 /* Initialize mutex for device management commands */
9543 mutex_init(&hba->dev_cmd.lock);
9544
Adrian Huntercd469472021-02-09 08:24:36 +02009545 /* Initialize mutex for exception event control */
9546 mutex_init(&hba->ee_ctrl_mutex);
9547
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08009548 init_rwsem(&hba->clk_scaling_lock);
9549
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009550 ufshcd_init_clk_gating(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02009551
Vivek Gautameebcc192018-08-07 23:17:39 +05309552 ufshcd_init_clk_scaling(hba);
9553
Yaniv Gardi199ef132016-03-10 17:37:06 +02009554 /*
9555 * In order to avoid any spurious interrupt immediately after
9556 * registering UFS controller interrupt handler, clear any pending UFS
9557 * interrupt status and disable all the UFS interrupts.
9558 */
9559 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
9560 REG_INTERRUPT_STATUS);
9561 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
9562 /*
9563 * Make sure that UFS interrupts are disabled and any pending interrupt
9564 * status is cleared before registering UFS interrupt handler.
9565 */
9566 mb();
9567
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309568 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09009569 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309570 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309571 dev_err(hba->dev, "request irq failed\n");
Can Guo4543d9d2021-01-20 02:04:22 -08009572 goto out_disable;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009573 } else {
9574 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309575 }
9576
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309577 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309578 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309579 dev_err(hba->dev, "scsi_add_host failed\n");
Can Guo4543d9d2021-01-20 02:04:22 -08009580 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309581 }
9582
Bart Van Assche7252a362019-12-09 10:13:08 -08009583 hba->cmd_queue = blk_mq_init_queue(&hba->host->tag_set);
9584 if (IS_ERR(hba->cmd_queue)) {
9585 err = PTR_ERR(hba->cmd_queue);
9586 goto out_remove_scsi_host;
9587 }
9588
Bart Van Assche69a6c262019-12-09 10:13:09 -08009589 hba->tmf_tag_set = (struct blk_mq_tag_set) {
9590 .nr_hw_queues = 1,
9591 .queue_depth = hba->nutmrs,
9592 .ops = &ufshcd_tmf_ops,
9593 .flags = BLK_MQ_F_NO_SCHED,
9594 };
9595 err = blk_mq_alloc_tag_set(&hba->tmf_tag_set);
9596 if (err < 0)
9597 goto free_cmd_queue;
9598 hba->tmf_queue = blk_mq_init_queue(&hba->tmf_tag_set);
9599 if (IS_ERR(hba->tmf_queue)) {
9600 err = PTR_ERR(hba->tmf_queue);
9601 goto free_tmf_tag_set;
9602 }
9603
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07009604 /* Reset the attached device */
Stanley Chu31a5d9c2020-12-08 21:56:35 +08009605 ufshcd_device_reset(hba);
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07009606
Satya Tangiraladf043c742020-07-06 20:04:14 +00009607 ufshcd_init_crypto(hba);
9608
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309609 /* Host controller enable */
9610 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309611 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309612 dev_err(hba->dev, "Host controller enable failed\n");
Stanley Chue965e5e2020-12-05 19:58:59 +08009613 ufshcd_print_evt_hist(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08009614 ufshcd_print_host_state(hba);
Bart Van Assche69a6c262019-12-09 10:13:09 -08009615 goto free_tmf_queue;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309616 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309617
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -08009618 /*
9619 * Set the default power management level for runtime and system PM.
9620 * Default power saving mode is to keep UFS link in Hibern8 state
9621 * and UFS device in sleep state.
9622 */
9623 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9624 UFS_SLEEP_PWR_MODE,
9625 UIC_LINK_HIBERN8_STATE);
9626 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9627 UFS_SLEEP_PWR_MODE,
9628 UIC_LINK_HIBERN8_STATE);
9629
Stanley Chu51dd9052020-05-22 16:32:12 +08009630 INIT_DELAYED_WORK(&hba->rpm_dev_flush_recheck_work,
9631 ufshcd_rpm_dev_flush_recheck_work);
9632
Adrian Hunterad448372018-03-20 15:07:38 +02009633 /* Set the default auto-hiberate idle timer value to 150 ms */
Stanley Chuf571b372019-05-21 14:44:53 +08009634 if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
Adrian Hunterad448372018-03-20 15:07:38 +02009635 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
9636 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
9637 }
9638
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05309639 /* Hold auto suspend until async scan completes */
9640 pm_runtime_get_sync(dev);
Subhash Jadavani38135532018-05-03 16:37:18 +05309641 atomic_set(&hba->scsi_block_reqs_cnt, 0);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009642 /*
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08009643 * We are assuming that device wasn't put in sleep/power-down
9644 * state exclusively during the boot stage before kernel.
9645 * This assumption helps avoid doing link startup twice during
9646 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009647 */
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08009648 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009649
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309650 async_schedule(ufshcd_async_scan, hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02009651 ufs_sysfs_add_nodes(hba->dev);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309652
Vincent Palomares10845142021-07-27 18:27:43 -07009653 device_enable_async_suspend(dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309654 return 0;
9655
Bart Van Assche69a6c262019-12-09 10:13:09 -08009656free_tmf_queue:
9657 blk_cleanup_queue(hba->tmf_queue);
9658free_tmf_tag_set:
9659 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08009660free_cmd_queue:
9661 blk_cleanup_queue(hba->cmd_queue);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309662out_remove_scsi_host:
9663 scsi_remove_host(hba->host);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309664out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009665 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03009666 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309667out_error:
9668 return err;
9669}
9670EXPORT_SYMBOL_GPL(ufshcd_init);
9671
Asutosh Dasb294ff32021-04-23 17:20:16 -07009672void ufshcd_resume_complete(struct device *dev)
9673{
9674 struct ufs_hba *hba = dev_get_drvdata(dev);
9675
9676 if (hba->complete_put) {
9677 ufshcd_rpm_put(hba);
9678 hba->complete_put = false;
9679 }
Asutosh Dasb294ff32021-04-23 17:20:16 -07009680}
9681EXPORT_SYMBOL_GPL(ufshcd_resume_complete);
9682
9683int ufshcd_suspend_prepare(struct device *dev)
9684{
9685 struct ufs_hba *hba = dev_get_drvdata(dev);
9686 int ret;
9687
9688 /*
9689 * SCSI assumes that runtime-pm and system-pm for scsi drivers
9690 * are same. And it doesn't wake up the device for system-suspend
9691 * if it's runtime suspended. But ufs doesn't follow that.
9692 * Refer ufshcd_resume_complete()
9693 */
9694 if (hba->sdev_ufs_device) {
9695 ret = ufshcd_rpm_get_sync(hba);
9696 if (ret < 0 && ret != -EACCES) {
9697 ufshcd_rpm_put(hba);
9698 return ret;
9699 }
9700 hba->complete_put = true;
9701 }
Asutosh Dasb294ff32021-04-23 17:20:16 -07009702 return 0;
9703}
9704EXPORT_SYMBOL_GPL(ufshcd_suspend_prepare);
9705
9706#ifdef CONFIG_PM_SLEEP
9707static int ufshcd_wl_poweroff(struct device *dev)
9708{
9709 struct scsi_device *sdev = to_scsi_device(dev);
9710 struct ufs_hba *hba = shost_priv(sdev->host);
9711
9712 __ufshcd_wl_suspend(hba, UFS_SHUTDOWN_PM);
9713 return 0;
9714}
9715#endif
9716
9717static int ufshcd_wl_probe(struct device *dev)
9718{
9719 struct scsi_device *sdev = to_scsi_device(dev);
9720
9721 if (!is_device_wlun(sdev))
9722 return -ENODEV;
9723
9724 blk_pm_runtime_init(sdev->request_queue, dev);
9725 pm_runtime_set_autosuspend_delay(dev, 0);
9726 pm_runtime_allow(dev);
9727
9728 return 0;
9729}
9730
9731static int ufshcd_wl_remove(struct device *dev)
9732{
9733 pm_runtime_forbid(dev);
9734 return 0;
9735}
9736
9737static const struct dev_pm_ops ufshcd_wl_pm_ops = {
9738#ifdef CONFIG_PM_SLEEP
9739 .suspend = ufshcd_wl_suspend,
9740 .resume = ufshcd_wl_resume,
9741 .freeze = ufshcd_wl_suspend,
9742 .thaw = ufshcd_wl_resume,
9743 .poweroff = ufshcd_wl_poweroff,
9744 .restore = ufshcd_wl_resume,
9745#endif
9746 SET_RUNTIME_PM_OPS(ufshcd_wl_runtime_suspend, ufshcd_wl_runtime_resume, NULL)
9747};
9748
9749/*
9750 * ufs_dev_wlun_template - describes ufs device wlun
9751 * ufs-device wlun - used to send pm commands
9752 * All luns are consumers of ufs-device wlun.
9753 *
9754 * Currently, no sd driver is present for wluns.
9755 * Hence the no specific pm operations are performed.
9756 * With ufs design, SSU should be sent to ufs-device wlun.
9757 * Hence register a scsi driver for ufs wluns only.
9758 */
9759static struct scsi_driver ufs_dev_wlun_template = {
9760 .gendrv = {
9761 .name = "ufs_device_wlun",
9762 .owner = THIS_MODULE,
9763 .probe = ufshcd_wl_probe,
9764 .remove = ufshcd_wl_remove,
9765 .pm = &ufshcd_wl_pm_ops,
9766 .shutdown = ufshcd_wl_shutdown,
9767 },
9768};
9769
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02009770static int __init ufshcd_core_init(void)
9771{
Asutosh Dasb294ff32021-04-23 17:20:16 -07009772 int ret;
9773
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02009774 ufs_debugfs_init();
Asutosh Dasb294ff32021-04-23 17:20:16 -07009775
9776 ret = scsi_register_driver(&ufs_dev_wlun_template.gendrv);
9777 if (ret)
Bart Van Asscheedc05962021-10-01 11:20:15 -07009778 ufs_debugfs_exit();
Asutosh Dasb294ff32021-04-23 17:20:16 -07009779 return ret;
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02009780}
9781
9782static void __exit ufshcd_core_exit(void)
9783{
9784 ufs_debugfs_exit();
Asutosh Dasb294ff32021-04-23 17:20:16 -07009785 scsi_unregister_driver(&ufs_dev_wlun_template.gendrv);
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02009786}
9787
9788module_init(ufshcd_core_init);
9789module_exit(ufshcd_core_exit);
9790
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309791MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
9792MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05309793MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309794MODULE_LICENSE("GPL");
9795MODULE_VERSION(UFSHCD_DRIVER_VERSION);