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Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05302 * Universal Flash Storage Host controller driver Core
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303 *
4 * This code is based on drivers/scsi/ufs/ufshcd.c
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053011 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053016 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053018 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053024 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030035 *
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053038 */
39
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053040#include <linux/async.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030041#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020042#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020043#include <linux/of.h>
Adrian Hunterad448372018-03-20 15:07:38 +020044#include <linux/bitfield.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053045#include "ufshcd.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020046#include "ufs_quirks.h"
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +053047#include "unipro.h"
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +020048#include "ufs-sysfs.h"
Avri Altmandf032bf2018-10-07 17:30:35 +030049#include "ufs_bsg.h"
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053050
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -080051#define CREATE_TRACE_POINTS
52#include <trace/events/ufs.h>
53
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053054#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
55 UTP_TASK_REQ_COMPL |\
56 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053057/* UIC command timeout, unit: ms */
58#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053059
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053060/* NOP OUT retries waiting for NOP IN response */
61#define NOP_OUT_RETRIES 10
62/* Timeout after 30 msecs if NOP OUT hangs without response */
63#define NOP_OUT_TIMEOUT 30 /* msecs */
64
Dolev Raviv68078d52013-07-30 00:35:58 +053065/* Query request retries */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080066#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +053067/* Query request timeout */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080068#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +053069
Sujit Reddy Thummae2933132014-05-26 10:59:12 +053070/* Task management command timeout */
71#define TM_CMD_TIMEOUT 100 /* msecs */
72
Yaniv Gardi64238fb2016-02-01 15:02:43 +020073/* maximum number of retries for a general UIC command */
74#define UFS_UIC_COMMAND_RETRIES 3
75
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030076/* maximum number of link-startup retries */
77#define DME_LINKSTARTUP_RETRIES 3
78
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +020079/* Maximum retries for Hibern8 enter */
80#define UIC_HIBERN8_ENTER_RETRIES 3
81
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030082/* maximum number of reset retries before giving up */
83#define MAX_HOST_RESET_RETRIES 5
84
Dolev Raviv68078d52013-07-30 00:35:58 +053085/* Expose the flag value from utp_upiu_query.value */
86#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
87
Seungwon Jeon7d568652013-08-31 21:40:20 +053088/* Interrupt aggregation default timeout, unit: 40us */
89#define INT_AGGR_DEF_TO 0x02
90
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030091#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
92 ({ \
93 int _ret; \
94 if (_on) \
95 _ret = ufshcd_enable_vreg(_dev, _vreg); \
96 else \
97 _ret = ufshcd_disable_vreg(_dev, _vreg); \
98 _ret; \
99 })
100
Tomas Winklerba809172018-06-14 11:14:09 +0300101#define ufshcd_hex_dump(prefix_str, buf, len) do { \
102 size_t __len = (len); \
103 print_hex_dump(KERN_ERR, prefix_str, \
104 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
105 16, 4, buf, __len, false); \
106} while (0)
107
108int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
109 const char *prefix)
110{
111 u8 *regs;
112
113 regs = kzalloc(len, GFP_KERNEL);
114 if (!regs)
115 return -ENOMEM;
116
117 memcpy_fromio(regs, hba->mmio_base + offset, len);
118 ufshcd_hex_dump(prefix, regs, len);
119 kfree(regs);
120
121 return 0;
122}
123EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800124
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530125enum {
126 UFSHCD_MAX_CHANNEL = 0,
127 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530128 UFSHCD_CMD_PER_LUN = 32,
129 UFSHCD_CAN_QUEUE = 32,
130};
131
132/* UFSHCD states */
133enum {
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530134 UFSHCD_STATE_RESET,
135 UFSHCD_STATE_ERROR,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530136 UFSHCD_STATE_OPERATIONAL,
Zang Leigang141f8162016-11-16 11:29:37 +0800137 UFSHCD_STATE_EH_SCHEDULED,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530138};
139
140/* UFSHCD error handling flags */
141enum {
142 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530143};
144
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530145/* UFSHCD UIC layer error flags */
146enum {
147 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200148 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
149 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
150 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
151 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
152 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530153};
154
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530155#define ufshcd_set_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300156 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530157#define ufshcd_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300158 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530159#define ufshcd_clear_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300160 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530161
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300162#define ufshcd_set_ufs_dev_active(h) \
163 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
164#define ufshcd_set_ufs_dev_sleep(h) \
165 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
166#define ufshcd_set_ufs_dev_poweroff(h) \
167 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
168#define ufshcd_is_ufs_dev_active(h) \
169 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
170#define ufshcd_is_ufs_dev_sleep(h) \
171 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
172#define ufshcd_is_ufs_dev_poweroff(h) \
173 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
174
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +0200175struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300176 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
177 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
178 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
179 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
180 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
181 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
182};
183
184static inline enum ufs_dev_pwr_mode
185ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
186{
187 return ufs_pm_lvl_states[lvl].dev_state;
188}
189
190static inline enum uic_link_state
191ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
192{
193 return ufs_pm_lvl_states[lvl].link_state;
194}
195
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -0800196static inline enum ufs_pm_level
197ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
198 enum uic_link_state link_state)
199{
200 enum ufs_pm_level lvl;
201
202 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
203 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
204 (ufs_pm_lvl_states[lvl].link_state == link_state))
205 return lvl;
206 }
207
208 /* if no match found, return the level 0 */
209 return UFS_PM_LVL_0;
210}
211
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800212static struct ufs_dev_fix ufs_fixups[] = {
213 /* UFS cards deviations table */
214 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
215 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800216 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
217 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
218 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800219 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
220 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
221 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
222 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
223 UFS_DEVICE_QUIRK_PA_TACTIVATE),
224 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
225 UFS_DEVICE_QUIRK_PA_TACTIVATE),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800226 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
227 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
Wei Li8e4829c2018-11-08 09:08:29 -0800228 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
229 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800230
231 END_FIX
232};
233
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530234static void ufshcd_tmc_handler(struct ufs_hba *hba);
235static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530236static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Dolev Ravive7d38252016-12-22 18:40:07 -0800237static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530238static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300239static void ufshcd_hba_exit(struct ufs_hba *hba);
240static int ufshcd_probe_hba(struct ufs_hba *hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300241static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
242 bool skip_ref_clk);
243static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
244static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
245static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300246static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300247static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800248static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
249static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800250static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800251static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300252static irqreturn_t ufshcd_intr(int irq, void *__hba);
Yaniv Gardi874237f2015-05-17 18:55:03 +0300253static int ufshcd_change_power_mode(struct ufs_hba *hba,
254 struct ufs_pa_layer_attr *pwr_mode);
Yaniv Gardi14497322016-02-01 15:02:39 +0200255static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
256{
257 return tag >= 0 && tag < hba->nutrs;
258}
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300259
260static inline int ufshcd_enable_irq(struct ufs_hba *hba)
261{
262 int ret = 0;
263
264 if (!hba->is_irq_enabled) {
265 ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
266 hba);
267 if (ret)
268 dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
269 __func__, ret);
270 hba->is_irq_enabled = true;
271 }
272
273 return ret;
274}
275
276static inline void ufshcd_disable_irq(struct ufs_hba *hba)
277{
278 if (hba->is_irq_enabled) {
279 free_irq(hba->irq, hba);
280 hba->is_irq_enabled = false;
281 }
282}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530283
Subhash Jadavani38135532018-05-03 16:37:18 +0530284static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
285{
286 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
287 scsi_unblock_requests(hba->host);
288}
289
290static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
291{
292 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
293 scsi_block_requests(hba->host);
294}
295
Yaniv Gardib573d482016-03-10 17:37:09 +0200296/* replace non-printable or non-ASCII characters with spaces */
297static inline void ufshcd_remove_non_printable(char *val)
298{
299 if (!val)
300 return;
301
302 if (*val < 0x20 || *val > 0x7e)
303 *val = ' ';
304}
305
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300306static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
307 const char *str)
308{
309 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
310
311 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
312}
313
314static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
315 const char *str)
316{
317 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
318
319 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
320}
321
322static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
323 const char *str)
324{
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300325 int off = (int)tag - hba->nutrs;
Christoph Hellwig391e3882018-10-07 17:30:32 +0300326 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300327
Christoph Hellwig391e3882018-10-07 17:30:32 +0300328 trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
329 &descp->input_param1);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300330}
331
Lee Susman1a07f2d2016-12-22 18:42:03 -0800332static void ufshcd_add_command_trace(struct ufs_hba *hba,
333 unsigned int tag, const char *str)
334{
335 sector_t lba = -1;
336 u8 opcode = 0;
337 u32 intr, doorbell;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300338 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
Lee Susman1a07f2d2016-12-22 18:42:03 -0800339 int transfer_len = -1;
340
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300341 if (!trace_ufshcd_command_enabled()) {
342 /* trace UPIU W/O tracing command */
343 if (lrbp->cmd)
344 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800345 return;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300346 }
Lee Susman1a07f2d2016-12-22 18:42:03 -0800347
348 if (lrbp->cmd) { /* data phase exists */
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300349 /* trace UPIU also */
350 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800351 opcode = (u8)(*lrbp->cmd->cmnd);
352 if ((opcode == READ_10) || (opcode == WRITE_10)) {
353 /*
354 * Currently we only fully trace read(10) and write(10)
355 * commands
356 */
357 if (lrbp->cmd->request && lrbp->cmd->request->bio)
358 lba =
359 lrbp->cmd->request->bio->bi_iter.bi_sector;
360 transfer_len = be32_to_cpu(
361 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
362 }
363 }
364
365 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
366 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
367 trace_ufshcd_command(dev_name(hba->dev), str, tag,
368 doorbell, transfer_len, intr, lba, opcode);
369}
370
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800371static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
372{
373 struct ufs_clk_info *clki;
374 struct list_head *head = &hba->clk_list_head;
375
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300376 if (list_empty(head))
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800377 return;
378
379 list_for_each_entry(clki, head, list) {
380 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
381 clki->max_freq)
382 dev_err(hba->dev, "clk: %s, rate: %u\n",
383 clki->name, clki->curr_freq);
384 }
385}
386
387static void ufshcd_print_uic_err_hist(struct ufs_hba *hba,
388 struct ufs_uic_err_reg_hist *err_hist, char *err_name)
389{
390 int i;
Stanley Chu27752642019-01-28 22:04:26 +0800391 bool found = false;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800392
393 for (i = 0; i < UIC_ERR_REG_HIST_LENGTH; i++) {
Stanley Chu27752642019-01-28 22:04:26 +0800394 int p = (i + err_hist->pos) % UIC_ERR_REG_HIST_LENGTH;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800395
396 if (err_hist->reg[p] == 0)
397 continue;
398 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, i,
399 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
Stanley Chu27752642019-01-28 22:04:26 +0800400 found = true;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800401 }
Stanley Chu27752642019-01-28 22:04:26 +0800402
403 if (!found)
404 dev_err(hba->dev, "No record of %s uic errors\n", err_name);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800405}
406
Dolev Raviv66cc8202016-12-22 18:39:42 -0800407static void ufshcd_print_host_regs(struct ufs_hba *hba)
408{
Tomas Winklerba809172018-06-14 11:14:09 +0300409 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
Dolev Raviv66cc8202016-12-22 18:39:42 -0800410 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
411 hba->ufs_version, hba->capabilities);
412 dev_err(hba->dev,
413 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
414 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800415 dev_err(hba->dev,
416 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
417 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
418 hba->ufs_stats.hibern8_exit_cnt);
419
420 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
421 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
422 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
423 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
424 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
425
426 ufshcd_print_clk_freqs(hba);
427
428 if (hba->vops && hba->vops->dbg_register_dump)
429 hba->vops->dbg_register_dump(hba);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800430}
431
432static
433void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
434{
435 struct ufshcd_lrb *lrbp;
Gilad Broner7fabb772017-02-03 16:56:50 -0800436 int prdt_length;
Dolev Raviv66cc8202016-12-22 18:39:42 -0800437 int tag;
438
439 for_each_set_bit(tag, &bitmap, hba->nutrs) {
440 lrbp = &hba->lrb[tag];
441
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800442 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
443 tag, ktime_to_us(lrbp->issue_time_stamp));
Zang Leigang09017182017-09-27 10:06:06 +0800444 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
445 tag, ktime_to_us(lrbp->compl_time_stamp));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800446 dev_err(hba->dev,
447 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
448 tag, (u64)lrbp->utrd_dma_addr);
449
Dolev Raviv66cc8202016-12-22 18:39:42 -0800450 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
451 sizeof(struct utp_transfer_req_desc));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800452 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
453 (u64)lrbp->ucd_req_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800454 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
455 sizeof(struct utp_upiu_req));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800456 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
457 (u64)lrbp->ucd_rsp_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800458 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
459 sizeof(struct utp_upiu_rsp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800460
Gilad Broner7fabb772017-02-03 16:56:50 -0800461 prdt_length = le16_to_cpu(
462 lrbp->utr_descriptor_ptr->prd_table_length);
463 dev_err(hba->dev,
464 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
465 tag, prdt_length,
466 (u64)lrbp->ucd_prdt_dma_addr);
467
468 if (pr_prdt)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800469 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
Gilad Broner7fabb772017-02-03 16:56:50 -0800470 sizeof(struct ufshcd_sg_entry) * prdt_length);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800471 }
472}
473
474static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
475{
Dolev Raviv66cc8202016-12-22 18:39:42 -0800476 int tag;
477
478 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
Christoph Hellwig391e3882018-10-07 17:30:32 +0300479 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
480
Dolev Raviv66cc8202016-12-22 18:39:42 -0800481 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
Christoph Hellwig391e3882018-10-07 17:30:32 +0300482 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800483 }
484}
485
Gilad Broner6ba65582017-02-03 16:57:28 -0800486static void ufshcd_print_host_state(struct ufs_hba *hba)
487{
488 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
489 dev_err(hba->dev, "lrb in use=0x%lx, outstanding reqs=0x%lx tasks=0x%lx\n",
Zang Leigange002e652017-08-24 10:57:15 +0800490 hba->lrb_in_use, hba->outstanding_reqs, hba->outstanding_tasks);
Gilad Broner6ba65582017-02-03 16:57:28 -0800491 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
492 hba->saved_err, hba->saved_uic_err);
493 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
494 hba->curr_dev_pwr_mode, hba->uic_link_state);
495 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
496 hba->pm_op_in_progress, hba->is_sys_suspended);
497 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
498 hba->auto_bkops_enabled, hba->host->host_self_blocked);
499 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
500 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
501 hba->eh_flags, hba->req_abort_count);
502 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
503 hba->capabilities, hba->caps);
504 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
505 hba->dev_quirks);
506}
507
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800508/**
509 * ufshcd_print_pwr_info - print power params as saved in hba
510 * power info
511 * @hba: per-adapter instance
512 */
513static void ufshcd_print_pwr_info(struct ufs_hba *hba)
514{
515 static const char * const names[] = {
516 "INVALID MODE",
517 "FAST MODE",
518 "SLOW_MODE",
519 "INVALID MODE",
520 "FASTAUTO_MODE",
521 "SLOWAUTO_MODE",
522 "INVALID MODE",
523 };
524
525 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
526 __func__,
527 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
528 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
529 names[hba->pwr_info.pwr_rx],
530 names[hba->pwr_info.pwr_tx],
531 hba->pwr_info.hs_rate);
532}
533
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530534/*
535 * ufshcd_wait_for_register - wait for register value to change
536 * @hba - per-adapter interface
537 * @reg - mmio register offset
538 * @mask - mask to apply to read register value
539 * @val - wait condition
540 * @interval_us - polling interval in microsecs
541 * @timeout_ms - timeout in millisecs
Yaniv Gardi596585a2016-03-10 17:37:08 +0200542 * @can_sleep - perform sleep or just spin
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530543 *
544 * Returns -ETIMEDOUT on error, zero on success
545 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200546int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
547 u32 val, unsigned long interval_us,
548 unsigned long timeout_ms, bool can_sleep)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530549{
550 int err = 0;
551 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
552
553 /* ignore bits that we don't intend to wait on */
554 val = val & mask;
555
556 while ((ufshcd_readl(hba, reg) & mask) != val) {
Yaniv Gardi596585a2016-03-10 17:37:08 +0200557 if (can_sleep)
558 usleep_range(interval_us, interval_us + 50);
559 else
560 udelay(interval_us);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530561 if (time_after(jiffies, timeout)) {
562 if ((ufshcd_readl(hba, reg) & mask) != val)
563 err = -ETIMEDOUT;
564 break;
565 }
566 }
567
568 return err;
569}
570
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530571/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530572 * ufshcd_get_intr_mask - Get the interrupt bit mask
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800573 * @hba: Pointer to adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530574 *
575 * Returns interrupt bit mask per version
576 */
577static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
578{
Yaniv Gardic01848c2016-12-05 19:25:02 -0800579 u32 intr_mask = 0;
580
581 switch (hba->ufs_version) {
582 case UFSHCI_VERSION_10:
583 intr_mask = INTERRUPT_MASK_ALL_VER_10;
584 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800585 case UFSHCI_VERSION_11:
586 case UFSHCI_VERSION_20:
587 intr_mask = INTERRUPT_MASK_ALL_VER_11;
588 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800589 case UFSHCI_VERSION_21:
590 default:
591 intr_mask = INTERRUPT_MASK_ALL_VER_21;
Tomohiro Kusumi031d1e02017-03-23 12:49:04 +0200592 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800593 }
594
595 return intr_mask;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530596}
597
598/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530599 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800600 * @hba: Pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530601 *
602 * Returns UFSHCI version supported by the controller
603 */
604static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
605{
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200606 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
607 return ufshcd_vops_get_ufs_hci_version(hba);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300608
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530609 return ufshcd_readl(hba, REG_UFS_VERSION);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530610}
611
612/**
613 * ufshcd_is_device_present - Check if any device connected to
614 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300615 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530616 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300617 * Returns true if device present, false if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530618 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300619static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530620{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300621 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300622 DEVICE_PRESENT) ? true : false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530623}
624
625/**
626 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800627 * @lrbp: pointer to local command reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530628 *
629 * This function is used to get the OCS field from UTRD
630 * Returns the OCS field in the UTRD
631 */
632static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
633{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530634 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530635}
636
637/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530638 * ufshcd_get_tm_free_slot - get a free slot for task management request
639 * @hba: per adapter instance
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530640 * @free_slot: pointer to variable with available slot value
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530641 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530642 * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
643 * Returns 0 if free slot is not available, else return 1 with tag value
644 * in @free_slot.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530645 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530646static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530647{
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530648 int tag;
649 bool ret = false;
650
651 if (!free_slot)
652 goto out;
653
654 do {
655 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
656 if (tag >= hba->nutmrs)
657 goto out;
658 } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
659
660 *free_slot = tag;
661 ret = true;
662out:
663 return ret;
664}
665
666static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
667{
668 clear_bit_unlock(slot, &hba->tm_slots_in_use);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530669}
670
671/**
672 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
673 * @hba: per adapter instance
674 * @pos: position of the bit to be cleared
675 */
676static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
677{
Alim Akhtar1399c5b2018-05-06 15:44:15 +0530678 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
679 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
680 else
681 ufshcd_writel(hba, ~(1 << pos),
682 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
683}
684
685/**
686 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
687 * @hba: per adapter instance
688 * @pos: position of the bit to be cleared
689 */
690static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
691{
692 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
693 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
694 else
695 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530696}
697
698/**
Yaniv Gardia48353f2016-02-01 15:02:40 +0200699 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
700 * @hba: per adapter instance
701 * @tag: position of the bit to be cleared
702 */
703static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
704{
705 __clear_bit(tag, &hba->outstanding_reqs);
706}
707
708/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530709 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
710 * @reg: Register value of host controller status
711 *
712 * Returns integer, 0 on Success and positive value if failed
713 */
714static inline int ufshcd_get_lists_status(u32 reg)
715{
Tomohiro Kusumi6cf16112017-04-26 20:28:58 +0300716 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530717}
718
719/**
720 * ufshcd_get_uic_cmd_result - Get the UIC command result
721 * @hba: Pointer to adapter instance
722 *
723 * This function gets the result of UIC command completion
724 * Returns 0 on success, non zero value on error
725 */
726static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
727{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530728 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530729 MASK_UIC_COMMAND_RESULT;
730}
731
732/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530733 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
734 * @hba: Pointer to adapter instance
735 *
736 * This function gets UIC command argument3
737 * Returns 0 on success, non zero value on error
738 */
739static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
740{
741 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
742}
743
744/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530745 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530746 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530747 */
748static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530749ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530750{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530751 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530752}
753
754/**
755 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
756 * @ucd_rsp_ptr: pointer to response UPIU
757 *
758 * This function gets the response status and scsi_status from response UPIU
759 * Returns the response result code.
760 */
761static inline int
762ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
763{
764 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
765}
766
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530767/*
768 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
769 * from response UPIU
770 * @ucd_rsp_ptr: pointer to response UPIU
771 *
772 * Return the data segment length.
773 */
774static inline unsigned int
775ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
776{
777 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
778 MASK_RSP_UPIU_DATA_SEG_LEN;
779}
780
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530781/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530782 * ufshcd_is_exception_event - Check if the device raised an exception event
783 * @ucd_rsp_ptr: pointer to response UPIU
784 *
785 * The function checks if the device raised an exception event indicated in
786 * the Device Information field of response UPIU.
787 *
788 * Returns true if exception is raised, false otherwise.
789 */
790static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
791{
792 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
793 MASK_RSP_EXCEPTION_EVENT ? true : false;
794}
795
796/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530797 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530798 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530799 */
800static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530801ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530802{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530803 ufshcd_writel(hba, INT_AGGR_ENABLE |
804 INT_AGGR_COUNTER_AND_TIMER_RESET,
805 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
806}
807
808/**
809 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
810 * @hba: per adapter instance
811 * @cnt: Interrupt aggregation counter threshold
812 * @tmout: Interrupt aggregation timeout value
813 */
814static inline void
815ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
816{
817 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
818 INT_AGGR_COUNTER_THLD_VAL(cnt) |
819 INT_AGGR_TIMEOUT_VAL(tmout),
820 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530821}
822
823/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300824 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
825 * @hba: per adapter instance
826 */
827static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
828{
829 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
830}
831
832/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530833 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
834 * When run-stop registers are set to 1, it indicates the
835 * host controller that it can process the requests
836 * @hba: per adapter instance
837 */
838static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
839{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530840 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
841 REG_UTP_TASK_REQ_LIST_RUN_STOP);
842 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
843 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530844}
845
846/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530847 * ufshcd_hba_start - Start controller initialization sequence
848 * @hba: per adapter instance
849 */
850static inline void ufshcd_hba_start(struct ufs_hba *hba)
851{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530852 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530853}
854
855/**
856 * ufshcd_is_hba_active - Get controller state
857 * @hba: per adapter instance
858 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300859 * Returns false if controller is active, true otherwise
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530860 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300861static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530862{
Tomohiro Kusumi4a8eec22017-03-28 16:49:25 +0300863 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
864 ? false : true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530865}
866
Yaniv Gardi37113102016-03-10 17:37:16 +0200867u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
868{
869 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
870 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
871 (hba->ufs_version == UFSHCI_VERSION_11))
872 return UFS_UNIPRO_VER_1_41;
873 else
874 return UFS_UNIPRO_VER_1_6;
875}
876EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
877
878static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
879{
880 /*
881 * If both host and device support UniPro ver1.6 or later, PA layer
882 * parameters tuning happens during link startup itself.
883 *
884 * We can manually tune PA layer parameters if either host or device
885 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
886 * logic simple, we will only do manual tuning if local unipro version
887 * doesn't support ver1.6 or later.
888 */
889 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
890 return true;
891 else
892 return false;
893}
894
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800895static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
896{
897 int ret = 0;
898 struct ufs_clk_info *clki;
899 struct list_head *head = &hba->clk_list_head;
900 ktime_t start = ktime_get();
901 bool clk_state_changed = false;
902
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300903 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800904 goto out;
905
906 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
907 if (ret)
908 return ret;
909
910 list_for_each_entry(clki, head, list) {
911 if (!IS_ERR_OR_NULL(clki->clk)) {
912 if (scale_up && clki->max_freq) {
913 if (clki->curr_freq == clki->max_freq)
914 continue;
915
916 clk_state_changed = true;
917 ret = clk_set_rate(clki->clk, clki->max_freq);
918 if (ret) {
919 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
920 __func__, clki->name,
921 clki->max_freq, ret);
922 break;
923 }
924 trace_ufshcd_clk_scaling(dev_name(hba->dev),
925 "scaled up", clki->name,
926 clki->curr_freq,
927 clki->max_freq);
928
929 clki->curr_freq = clki->max_freq;
930
931 } else if (!scale_up && clki->min_freq) {
932 if (clki->curr_freq == clki->min_freq)
933 continue;
934
935 clk_state_changed = true;
936 ret = clk_set_rate(clki->clk, clki->min_freq);
937 if (ret) {
938 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
939 __func__, clki->name,
940 clki->min_freq, ret);
941 break;
942 }
943 trace_ufshcd_clk_scaling(dev_name(hba->dev),
944 "scaled down", clki->name,
945 clki->curr_freq,
946 clki->min_freq);
947 clki->curr_freq = clki->min_freq;
948 }
949 }
950 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
951 clki->name, clk_get_rate(clki->clk));
952 }
953
954 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
955
956out:
957 if (clk_state_changed)
958 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
959 (scale_up ? "up" : "down"),
960 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
961 return ret;
962}
963
964/**
965 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
966 * @hba: per adapter instance
967 * @scale_up: True if scaling up and false if scaling down
968 *
969 * Returns true if scaling is required, false otherwise.
970 */
971static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
972 bool scale_up)
973{
974 struct ufs_clk_info *clki;
975 struct list_head *head = &hba->clk_list_head;
976
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300977 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800978 return false;
979
980 list_for_each_entry(clki, head, list) {
981 if (!IS_ERR_OR_NULL(clki->clk)) {
982 if (scale_up && clki->max_freq) {
983 if (clki->curr_freq == clki->max_freq)
984 continue;
985 return true;
986 } else if (!scale_up && clki->min_freq) {
987 if (clki->curr_freq == clki->min_freq)
988 continue;
989 return true;
990 }
991 }
992 }
993
994 return false;
995}
996
997static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
998 u64 wait_timeout_us)
999{
1000 unsigned long flags;
1001 int ret = 0;
1002 u32 tm_doorbell;
1003 u32 tr_doorbell;
1004 bool timeout = false, do_last_check = false;
1005 ktime_t start;
1006
1007 ufshcd_hold(hba, false);
1008 spin_lock_irqsave(hba->host->host_lock, flags);
1009 /*
1010 * Wait for all the outstanding tasks/transfer requests.
1011 * Verify by checking the doorbell registers are clear.
1012 */
1013 start = ktime_get();
1014 do {
1015 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1016 ret = -EBUSY;
1017 goto out;
1018 }
1019
1020 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1021 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1022 if (!tm_doorbell && !tr_doorbell) {
1023 timeout = false;
1024 break;
1025 } else if (do_last_check) {
1026 break;
1027 }
1028
1029 spin_unlock_irqrestore(hba->host->host_lock, flags);
1030 schedule();
1031 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1032 wait_timeout_us) {
1033 timeout = true;
1034 /*
1035 * We might have scheduled out for long time so make
1036 * sure to check if doorbells are cleared by this time
1037 * or not.
1038 */
1039 do_last_check = true;
1040 }
1041 spin_lock_irqsave(hba->host->host_lock, flags);
1042 } while (tm_doorbell || tr_doorbell);
1043
1044 if (timeout) {
1045 dev_err(hba->dev,
1046 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1047 __func__, tm_doorbell, tr_doorbell);
1048 ret = -EBUSY;
1049 }
1050out:
1051 spin_unlock_irqrestore(hba->host->host_lock, flags);
1052 ufshcd_release(hba);
1053 return ret;
1054}
1055
1056/**
1057 * ufshcd_scale_gear - scale up/down UFS gear
1058 * @hba: per adapter instance
1059 * @scale_up: True for scaling up gear and false for scaling down
1060 *
1061 * Returns 0 for success,
1062 * Returns -EBUSY if scaling can't happen at this time
1063 * Returns non-zero for any other errors
1064 */
1065static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1066{
1067 #define UFS_MIN_GEAR_TO_SCALE_DOWN UFS_HS_G1
1068 int ret = 0;
1069 struct ufs_pa_layer_attr new_pwr_info;
1070
1071 if (scale_up) {
1072 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1073 sizeof(struct ufs_pa_layer_attr));
1074 } else {
1075 memcpy(&new_pwr_info, &hba->pwr_info,
1076 sizeof(struct ufs_pa_layer_attr));
1077
1078 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1079 || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1080 /* save the current power mode */
1081 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1082 &hba->pwr_info,
1083 sizeof(struct ufs_pa_layer_attr));
1084
1085 /* scale down gear */
1086 new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1087 new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1088 }
1089 }
1090
1091 /* check if the power mode needs to be changed or not? */
1092 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1093
1094 if (ret)
1095 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1096 __func__, ret,
1097 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1098 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1099
1100 return ret;
1101}
1102
1103static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1104{
1105 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1106 int ret = 0;
1107 /*
1108 * make sure that there are no outstanding requests when
1109 * clock scaling is in progress
1110 */
Subhash Jadavani38135532018-05-03 16:37:18 +05301111 ufshcd_scsi_block_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001112 down_write(&hba->clk_scaling_lock);
1113 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1114 ret = -EBUSY;
1115 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301116 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001117 }
1118
1119 return ret;
1120}
1121
1122static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1123{
1124 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301125 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001126}
1127
1128/**
1129 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1130 * @hba: per adapter instance
1131 * @scale_up: True for scaling up and false for scalin down
1132 *
1133 * Returns 0 for success,
1134 * Returns -EBUSY if scaling can't happen at this time
1135 * Returns non-zero for any other errors
1136 */
1137static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1138{
1139 int ret = 0;
1140
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001141 /* let's not get into low power until clock scaling is completed */
1142 ufshcd_hold(hba, false);
1143
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001144 ret = ufshcd_clock_scaling_prepare(hba);
1145 if (ret)
1146 return ret;
1147
1148 /* scale down the gear before scaling down clocks */
1149 if (!scale_up) {
1150 ret = ufshcd_scale_gear(hba, false);
1151 if (ret)
1152 goto out;
1153 }
1154
1155 ret = ufshcd_scale_clks(hba, scale_up);
1156 if (ret) {
1157 if (!scale_up)
1158 ufshcd_scale_gear(hba, true);
1159 goto out;
1160 }
1161
1162 /* scale up the gear after scaling up clocks */
1163 if (scale_up) {
1164 ret = ufshcd_scale_gear(hba, true);
1165 if (ret) {
1166 ufshcd_scale_clks(hba, false);
1167 goto out;
1168 }
1169 }
1170
1171 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1172
1173out:
1174 ufshcd_clock_scaling_unprepare(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001175 ufshcd_release(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001176 return ret;
1177}
1178
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001179static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1180{
1181 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1182 clk_scaling.suspend_work);
1183 unsigned long irq_flags;
1184
1185 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1186 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1187 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1188 return;
1189 }
1190 hba->clk_scaling.is_suspended = true;
1191 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1192
1193 __ufshcd_suspend_clkscaling(hba);
1194}
1195
1196static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1197{
1198 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1199 clk_scaling.resume_work);
1200 unsigned long irq_flags;
1201
1202 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1203 if (!hba->clk_scaling.is_suspended) {
1204 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1205 return;
1206 }
1207 hba->clk_scaling.is_suspended = false;
1208 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1209
1210 devfreq_resume_device(hba->devfreq);
1211}
1212
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001213static int ufshcd_devfreq_target(struct device *dev,
1214 unsigned long *freq, u32 flags)
1215{
1216 int ret = 0;
1217 struct ufs_hba *hba = dev_get_drvdata(dev);
1218 ktime_t start;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001219 bool scale_up, sched_clk_scaling_suspend_work = false;
Bjorn Andersson092b4552018-05-17 23:26:37 -07001220 struct list_head *clk_list = &hba->clk_list_head;
1221 struct ufs_clk_info *clki;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001222 unsigned long irq_flags;
1223
1224 if (!ufshcd_is_clkscaling_supported(hba))
1225 return -EINVAL;
1226
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001227 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1228 if (ufshcd_eh_in_progress(hba)) {
1229 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1230 return 0;
1231 }
1232
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001233 if (!hba->clk_scaling.active_reqs)
1234 sched_clk_scaling_suspend_work = true;
1235
Bjorn Andersson092b4552018-05-17 23:26:37 -07001236 if (list_empty(clk_list)) {
1237 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1238 goto out;
1239 }
1240
1241 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1242 scale_up = (*freq == clki->max_freq) ? true : false;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001243 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1244 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1245 ret = 0;
1246 goto out; /* no state change required */
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001247 }
1248 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1249
1250 start = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001251 ret = ufshcd_devfreq_scale(hba, scale_up);
1252
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001253 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1254 (scale_up ? "up" : "down"),
1255 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1256
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001257out:
1258 if (sched_clk_scaling_suspend_work)
1259 queue_work(hba->clk_scaling.workq,
1260 &hba->clk_scaling.suspend_work);
1261
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001262 return ret;
1263}
1264
1265
1266static int ufshcd_devfreq_get_dev_status(struct device *dev,
1267 struct devfreq_dev_status *stat)
1268{
1269 struct ufs_hba *hba = dev_get_drvdata(dev);
1270 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1271 unsigned long flags;
1272
1273 if (!ufshcd_is_clkscaling_supported(hba))
1274 return -EINVAL;
1275
1276 memset(stat, 0, sizeof(*stat));
1277
1278 spin_lock_irqsave(hba->host->host_lock, flags);
1279 if (!scaling->window_start_t)
1280 goto start_window;
1281
1282 if (scaling->is_busy_started)
1283 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1284 scaling->busy_start_t));
1285
1286 stat->total_time = jiffies_to_usecs((long)jiffies -
1287 (long)scaling->window_start_t);
1288 stat->busy_time = scaling->tot_busy_t;
1289start_window:
1290 scaling->window_start_t = jiffies;
1291 scaling->tot_busy_t = 0;
1292
1293 if (hba->outstanding_reqs) {
1294 scaling->busy_start_t = ktime_get();
1295 scaling->is_busy_started = true;
1296 } else {
1297 scaling->busy_start_t = 0;
1298 scaling->is_busy_started = false;
1299 }
1300 spin_unlock_irqrestore(hba->host->host_lock, flags);
1301 return 0;
1302}
1303
1304static struct devfreq_dev_profile ufs_devfreq_profile = {
1305 .polling_ms = 100,
1306 .target = ufshcd_devfreq_target,
1307 .get_dev_status = ufshcd_devfreq_get_dev_status,
1308};
1309
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001310static int ufshcd_devfreq_init(struct ufs_hba *hba)
1311{
Bjorn Andersson092b4552018-05-17 23:26:37 -07001312 struct list_head *clk_list = &hba->clk_list_head;
1313 struct ufs_clk_info *clki;
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001314 struct devfreq *devfreq;
1315 int ret;
1316
Bjorn Andersson092b4552018-05-17 23:26:37 -07001317 /* Skip devfreq if we don't have any clocks in the list */
1318 if (list_empty(clk_list))
1319 return 0;
1320
1321 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1322 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1323 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1324
1325 devfreq = devfreq_add_device(hba->dev,
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001326 &ufs_devfreq_profile,
1327 DEVFREQ_GOV_SIMPLE_ONDEMAND,
1328 NULL);
1329 if (IS_ERR(devfreq)) {
1330 ret = PTR_ERR(devfreq);
1331 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001332
1333 dev_pm_opp_remove(hba->dev, clki->min_freq);
1334 dev_pm_opp_remove(hba->dev, clki->max_freq);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001335 return ret;
1336 }
1337
1338 hba->devfreq = devfreq;
1339
1340 return 0;
1341}
1342
Bjorn Andersson092b4552018-05-17 23:26:37 -07001343static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1344{
1345 struct list_head *clk_list = &hba->clk_list_head;
1346 struct ufs_clk_info *clki;
1347
1348 if (!hba->devfreq)
1349 return;
1350
1351 devfreq_remove_device(hba->devfreq);
1352 hba->devfreq = NULL;
1353
1354 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1355 dev_pm_opp_remove(hba->dev, clki->min_freq);
1356 dev_pm_opp_remove(hba->dev, clki->max_freq);
1357}
1358
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001359static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1360{
1361 unsigned long flags;
1362
1363 devfreq_suspend_device(hba->devfreq);
1364 spin_lock_irqsave(hba->host->host_lock, flags);
1365 hba->clk_scaling.window_start_t = 0;
1366 spin_unlock_irqrestore(hba->host->host_lock, flags);
1367}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001368
Gilad Bronera5082532016-10-17 17:10:00 -07001369static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1370{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001371 unsigned long flags;
1372 bool suspend = false;
1373
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001374 if (!ufshcd_is_clkscaling_supported(hba))
1375 return;
1376
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001377 spin_lock_irqsave(hba->host->host_lock, flags);
1378 if (!hba->clk_scaling.is_suspended) {
1379 suspend = true;
1380 hba->clk_scaling.is_suspended = true;
1381 }
1382 spin_unlock_irqrestore(hba->host->host_lock, flags);
1383
1384 if (suspend)
1385 __ufshcd_suspend_clkscaling(hba);
Gilad Bronera5082532016-10-17 17:10:00 -07001386}
1387
1388static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1389{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001390 unsigned long flags;
1391 bool resume = false;
1392
1393 if (!ufshcd_is_clkscaling_supported(hba))
1394 return;
1395
1396 spin_lock_irqsave(hba->host->host_lock, flags);
1397 if (hba->clk_scaling.is_suspended) {
1398 resume = true;
1399 hba->clk_scaling.is_suspended = false;
1400 }
1401 spin_unlock_irqrestore(hba->host->host_lock, flags);
1402
1403 if (resume)
1404 devfreq_resume_device(hba->devfreq);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001405}
1406
1407static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1408 struct device_attribute *attr, char *buf)
1409{
1410 struct ufs_hba *hba = dev_get_drvdata(dev);
1411
1412 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1413}
1414
1415static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1416 struct device_attribute *attr, const char *buf, size_t count)
1417{
1418 struct ufs_hba *hba = dev_get_drvdata(dev);
1419 u32 value;
1420 int err;
1421
1422 if (kstrtou32(buf, 0, &value))
1423 return -EINVAL;
1424
1425 value = !!value;
1426 if (value == hba->clk_scaling.is_allowed)
1427 goto out;
1428
1429 pm_runtime_get_sync(hba->dev);
1430 ufshcd_hold(hba, false);
1431
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001432 cancel_work_sync(&hba->clk_scaling.suspend_work);
1433 cancel_work_sync(&hba->clk_scaling.resume_work);
1434
1435 hba->clk_scaling.is_allowed = value;
1436
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001437 if (value) {
1438 ufshcd_resume_clkscaling(hba);
1439 } else {
1440 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001441 err = ufshcd_devfreq_scale(hba, true);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001442 if (err)
1443 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1444 __func__, err);
1445 }
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001446
1447 ufshcd_release(hba);
1448 pm_runtime_put_sync(hba->dev);
1449out:
1450 return count;
Gilad Bronera5082532016-10-17 17:10:00 -07001451}
1452
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001453static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1454{
1455 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1456 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1457 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1458 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1459 hba->clk_scaling.enable_attr.attr.mode = 0644;
1460 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1461 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1462}
1463
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001464static void ufshcd_ungate_work(struct work_struct *work)
1465{
1466 int ret;
1467 unsigned long flags;
1468 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1469 clk_gating.ungate_work);
1470
1471 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1472
1473 spin_lock_irqsave(hba->host->host_lock, flags);
1474 if (hba->clk_gating.state == CLKS_ON) {
1475 spin_unlock_irqrestore(hba->host->host_lock, flags);
1476 goto unblock_reqs;
1477 }
1478
1479 spin_unlock_irqrestore(hba->host->host_lock, flags);
1480 ufshcd_setup_clocks(hba, true);
1481
1482 /* Exit from hibern8 */
1483 if (ufshcd_can_hibern8_during_gating(hba)) {
1484 /* Prevent gating in this path */
1485 hba->clk_gating.is_suspended = true;
1486 if (ufshcd_is_link_hibern8(hba)) {
1487 ret = ufshcd_uic_hibern8_exit(hba);
1488 if (ret)
1489 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1490 __func__, ret);
1491 else
1492 ufshcd_set_link_active(hba);
1493 }
1494 hba->clk_gating.is_suspended = false;
1495 }
1496unblock_reqs:
Subhash Jadavani38135532018-05-03 16:37:18 +05301497 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001498}
1499
1500/**
1501 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1502 * Also, exit from hibern8 mode and set the link as active.
1503 * @hba: per adapter instance
1504 * @async: This indicates whether caller should ungate clocks asynchronously.
1505 */
1506int ufshcd_hold(struct ufs_hba *hba, bool async)
1507{
1508 int rc = 0;
1509 unsigned long flags;
1510
1511 if (!ufshcd_is_clkgating_allowed(hba))
1512 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001513 spin_lock_irqsave(hba->host->host_lock, flags);
1514 hba->clk_gating.active_reqs++;
1515
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001516 if (ufshcd_eh_in_progress(hba)) {
1517 spin_unlock_irqrestore(hba->host->host_lock, flags);
1518 return 0;
1519 }
1520
Sahitya Tummala856b3482014-09-25 15:32:34 +03001521start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001522 switch (hba->clk_gating.state) {
1523 case CLKS_ON:
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001524 /*
1525 * Wait for the ungate work to complete if in progress.
1526 * Though the clocks may be in ON state, the link could
1527 * still be in hibner8 state if hibern8 is allowed
1528 * during clock gating.
1529 * Make sure we exit hibern8 state also in addition to
1530 * clocks being ON.
1531 */
1532 if (ufshcd_can_hibern8_during_gating(hba) &&
1533 ufshcd_is_link_hibern8(hba)) {
1534 spin_unlock_irqrestore(hba->host->host_lock, flags);
1535 flush_work(&hba->clk_gating.ungate_work);
1536 spin_lock_irqsave(hba->host->host_lock, flags);
1537 goto start;
1538 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001539 break;
1540 case REQ_CLKS_OFF:
1541 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1542 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001543 trace_ufshcd_clk_gating(dev_name(hba->dev),
1544 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001545 break;
1546 }
1547 /*
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +03001548 * If we are here, it means gating work is either done or
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001549 * currently running. Hence, fall through to cancel gating
1550 * work and to enable clocks.
1551 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001552 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001553 case CLKS_OFF:
Subhash Jadavani38135532018-05-03 16:37:18 +05301554 ufshcd_scsi_block_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001555 hba->clk_gating.state = REQ_CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001556 trace_ufshcd_clk_gating(dev_name(hba->dev),
1557 hba->clk_gating.state);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301558 queue_work(hba->clk_gating.clk_gating_workq,
1559 &hba->clk_gating.ungate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001560 /*
1561 * fall through to check if we should wait for this
1562 * work to be done or not.
1563 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001564 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001565 case REQ_CLKS_ON:
1566 if (async) {
1567 rc = -EAGAIN;
1568 hba->clk_gating.active_reqs--;
1569 break;
1570 }
1571
1572 spin_unlock_irqrestore(hba->host->host_lock, flags);
1573 flush_work(&hba->clk_gating.ungate_work);
1574 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001575 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001576 goto start;
1577 default:
1578 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1579 __func__, hba->clk_gating.state);
1580 break;
1581 }
1582 spin_unlock_irqrestore(hba->host->host_lock, flags);
1583out:
1584 return rc;
1585}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001586EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001587
1588static void ufshcd_gate_work(struct work_struct *work)
1589{
1590 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1591 clk_gating.gate_work.work);
1592 unsigned long flags;
1593
1594 spin_lock_irqsave(hba->host->host_lock, flags);
Venkat Gopalakrishnan3f0c06d2016-10-17 17:11:07 -07001595 /*
1596 * In case you are here to cancel this work the gating state
1597 * would be marked as REQ_CLKS_ON. In this case save time by
1598 * skipping the gating work and exit after changing the clock
1599 * state to CLKS_ON.
1600 */
1601 if (hba->clk_gating.is_suspended ||
1602 (hba->clk_gating.state == REQ_CLKS_ON)) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001603 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001604 trace_ufshcd_clk_gating(dev_name(hba->dev),
1605 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001606 goto rel_lock;
1607 }
1608
1609 if (hba->clk_gating.active_reqs
1610 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1611 || hba->lrb_in_use || hba->outstanding_tasks
1612 || hba->active_uic_cmd || hba->uic_async_done)
1613 goto rel_lock;
1614
1615 spin_unlock_irqrestore(hba->host->host_lock, flags);
1616
1617 /* put the link into hibern8 mode before turning off clocks */
1618 if (ufshcd_can_hibern8_during_gating(hba)) {
1619 if (ufshcd_uic_hibern8_enter(hba)) {
1620 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001621 trace_ufshcd_clk_gating(dev_name(hba->dev),
1622 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001623 goto out;
1624 }
1625 ufshcd_set_link_hibern8(hba);
1626 }
1627
1628 if (!ufshcd_is_link_active(hba))
1629 ufshcd_setup_clocks(hba, false);
1630 else
1631 /* If link is active, device ref_clk can't be switched off */
1632 __ufshcd_setup_clocks(hba, false, true);
1633
1634 /*
1635 * In case you are here to cancel this work the gating state
1636 * would be marked as REQ_CLKS_ON. In this case keep the state
1637 * as REQ_CLKS_ON which would anyway imply that clocks are off
1638 * and a request to turn them on is pending. By doing this way,
1639 * we keep the state machine in tact and this would ultimately
1640 * prevent from doing cancel work multiple times when there are
1641 * new requests arriving before the current cancel work is done.
1642 */
1643 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001644 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001645 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001646 trace_ufshcd_clk_gating(dev_name(hba->dev),
1647 hba->clk_gating.state);
1648 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001649rel_lock:
1650 spin_unlock_irqrestore(hba->host->host_lock, flags);
1651out:
1652 return;
1653}
1654
1655/* host lock must be held before calling this variant */
1656static void __ufshcd_release(struct ufs_hba *hba)
1657{
1658 if (!ufshcd_is_clkgating_allowed(hba))
1659 return;
1660
1661 hba->clk_gating.active_reqs--;
1662
1663 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1664 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1665 || hba->lrb_in_use || hba->outstanding_tasks
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001666 || hba->active_uic_cmd || hba->uic_async_done
1667 || ufshcd_eh_in_progress(hba))
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001668 return;
1669
1670 hba->clk_gating.state = REQ_CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001671 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Evan Greenf4bb7702018-10-05 10:27:32 -07001672 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1673 &hba->clk_gating.gate_work,
1674 msecs_to_jiffies(hba->clk_gating.delay_ms));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001675}
1676
1677void ufshcd_release(struct ufs_hba *hba)
1678{
1679 unsigned long flags;
1680
1681 spin_lock_irqsave(hba->host->host_lock, flags);
1682 __ufshcd_release(hba);
1683 spin_unlock_irqrestore(hba->host->host_lock, flags);
1684}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001685EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001686
1687static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1688 struct device_attribute *attr, char *buf)
1689{
1690 struct ufs_hba *hba = dev_get_drvdata(dev);
1691
1692 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1693}
1694
1695static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1696 struct device_attribute *attr, const char *buf, size_t count)
1697{
1698 struct ufs_hba *hba = dev_get_drvdata(dev);
1699 unsigned long flags, value;
1700
1701 if (kstrtoul(buf, 0, &value))
1702 return -EINVAL;
1703
1704 spin_lock_irqsave(hba->host->host_lock, flags);
1705 hba->clk_gating.delay_ms = value;
1706 spin_unlock_irqrestore(hba->host->host_lock, flags);
1707 return count;
1708}
1709
Sahitya Tummalab4274112016-12-22 18:40:39 -08001710static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1711 struct device_attribute *attr, char *buf)
1712{
1713 struct ufs_hba *hba = dev_get_drvdata(dev);
1714
1715 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1716}
1717
1718static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1719 struct device_attribute *attr, const char *buf, size_t count)
1720{
1721 struct ufs_hba *hba = dev_get_drvdata(dev);
1722 unsigned long flags;
1723 u32 value;
1724
1725 if (kstrtou32(buf, 0, &value))
1726 return -EINVAL;
1727
1728 value = !!value;
1729 if (value == hba->clk_gating.is_enabled)
1730 goto out;
1731
1732 if (value) {
1733 ufshcd_release(hba);
1734 } else {
1735 spin_lock_irqsave(hba->host->host_lock, flags);
1736 hba->clk_gating.active_reqs++;
1737 spin_unlock_irqrestore(hba->host->host_lock, flags);
1738 }
1739
1740 hba->clk_gating.is_enabled = value;
1741out:
1742 return count;
1743}
1744
Vivek Gautameebcc192018-08-07 23:17:39 +05301745static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1746{
1747 char wq_name[sizeof("ufs_clkscaling_00")];
1748
1749 if (!ufshcd_is_clkscaling_supported(hba))
1750 return;
1751
1752 INIT_WORK(&hba->clk_scaling.suspend_work,
1753 ufshcd_clk_scaling_suspend_work);
1754 INIT_WORK(&hba->clk_scaling.resume_work,
1755 ufshcd_clk_scaling_resume_work);
1756
1757 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1758 hba->host->host_no);
1759 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1760
1761 ufshcd_clkscaling_init_sysfs(hba);
1762}
1763
1764static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1765{
1766 if (!ufshcd_is_clkscaling_supported(hba))
1767 return;
1768
1769 destroy_workqueue(hba->clk_scaling.workq);
1770 ufshcd_devfreq_remove(hba);
1771}
1772
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001773static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1774{
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301775 char wq_name[sizeof("ufs_clk_gating_00")];
1776
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001777 if (!ufshcd_is_clkgating_allowed(hba))
1778 return;
1779
1780 hba->clk_gating.delay_ms = 150;
1781 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1782 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1783
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301784 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1785 hba->host->host_no);
1786 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1787 WQ_MEM_RECLAIM);
1788
Sahitya Tummalab4274112016-12-22 18:40:39 -08001789 hba->clk_gating.is_enabled = true;
1790
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001791 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1792 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1793 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1794 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
Sahitya Tummalab4274112016-12-22 18:40:39 -08001795 hba->clk_gating.delay_attr.attr.mode = 0644;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001796 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1797 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Sahitya Tummalab4274112016-12-22 18:40:39 -08001798
1799 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1800 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1801 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1802 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1803 hba->clk_gating.enable_attr.attr.mode = 0644;
1804 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1805 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001806}
1807
1808static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1809{
1810 if (!ufshcd_is_clkgating_allowed(hba))
1811 return;
1812 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001813 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001814 cancel_work_sync(&hba->clk_gating.ungate_work);
1815 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301816 destroy_workqueue(hba->clk_gating.clk_gating_workq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001817}
1818
Sahitya Tummala856b3482014-09-25 15:32:34 +03001819/* Must be called with host lock acquired */
1820static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1821{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001822 bool queue_resume_work = false;
1823
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001824 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001825 return;
1826
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001827 if (!hba->clk_scaling.active_reqs++)
1828 queue_resume_work = true;
1829
1830 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1831 return;
1832
1833 if (queue_resume_work)
1834 queue_work(hba->clk_scaling.workq,
1835 &hba->clk_scaling.resume_work);
1836
1837 if (!hba->clk_scaling.window_start_t) {
1838 hba->clk_scaling.window_start_t = jiffies;
1839 hba->clk_scaling.tot_busy_t = 0;
1840 hba->clk_scaling.is_busy_started = false;
1841 }
1842
Sahitya Tummala856b3482014-09-25 15:32:34 +03001843 if (!hba->clk_scaling.is_busy_started) {
1844 hba->clk_scaling.busy_start_t = ktime_get();
1845 hba->clk_scaling.is_busy_started = true;
1846 }
1847}
1848
1849static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1850{
1851 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1852
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001853 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001854 return;
1855
1856 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1857 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1858 scaling->busy_start_t));
Thomas Gleixner8b0e1952016-12-25 12:30:41 +01001859 scaling->busy_start_t = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03001860 scaling->is_busy_started = false;
1861 }
1862}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301863/**
1864 * ufshcd_send_command - Send SCSI or device management commands
1865 * @hba: per adapter instance
1866 * @task_tag: Task tag of the command
1867 */
1868static inline
1869void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1870{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08001871 hba->lrb[task_tag].issue_time_stamp = ktime_get();
Zang Leigang09017182017-09-27 10:06:06 +08001872 hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
Sahitya Tummala856b3482014-09-25 15:32:34 +03001873 ufshcd_clk_scaling_start_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301874 __set_bit(task_tag, &hba->outstanding_reqs);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301875 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07001876 /* Make sure that doorbell is committed immediately */
1877 wmb();
Lee Susman1a07f2d2016-12-22 18:42:03 -08001878 ufshcd_add_command_trace(hba, task_tag, "send");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301879}
1880
1881/**
1882 * ufshcd_copy_sense_data - Copy sense data in case of check condition
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001883 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301884 */
1885static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1886{
1887 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05301888 if (lrbp->sense_buffer &&
1889 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001890 int len_to_copy;
1891
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301892 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Avri Altman09a5a242018-11-22 20:04:56 +02001893 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001894
Avri Altman09a5a242018-11-22 20:04:56 +02001895 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
1896 len_to_copy);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301897 }
1898}
1899
1900/**
Dolev Raviv68078d52013-07-30 00:35:58 +05301901 * ufshcd_copy_query_response() - Copy the Query Response and the data
1902 * descriptor
1903 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001904 * @lrbp: pointer to local reference block
Dolev Raviv68078d52013-07-30 00:35:58 +05301905 */
1906static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001907int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05301908{
1909 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1910
Dolev Raviv68078d52013-07-30 00:35:58 +05301911 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05301912
Dolev Raviv68078d52013-07-30 00:35:58 +05301913 /* Get the descriptor */
1914 if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03001915 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05301916 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001917 u16 resp_len;
1918 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05301919
1920 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001921 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05301922 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03001923 buf_len = be16_to_cpu(
1924 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001925 if (likely(buf_len >= resp_len)) {
1926 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1927 } else {
1928 dev_warn(hba->dev,
1929 "%s: Response size is bigger than buffer",
1930 __func__);
1931 return -EINVAL;
1932 }
Dolev Raviv68078d52013-07-30 00:35:58 +05301933 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001934
1935 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05301936}
1937
1938/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301939 * ufshcd_hba_capabilities - Read controller capabilities
1940 * @hba: per adapter instance
1941 */
1942static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1943{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301944 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301945
1946 /* nutrs and nutmrs are 0 based values */
1947 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1948 hba->nutmrs =
1949 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1950}
1951
1952/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301953 * ufshcd_ready_for_uic_cmd - Check if controller is ready
1954 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301955 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301956 * Return true on success, else false
1957 */
1958static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1959{
1960 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1961 return true;
1962 else
1963 return false;
1964}
1965
1966/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05301967 * ufshcd_get_upmcrs - Get the power mode change request status
1968 * @hba: Pointer to adapter instance
1969 *
1970 * This function gets the UPMCRS field of HCS register
1971 * Returns value of UPMCRS field
1972 */
1973static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1974{
1975 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1976}
1977
1978/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301979 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1980 * @hba: per adapter instance
1981 * @uic_cmd: UIC command
1982 *
1983 * Mutex must be held.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301984 */
1985static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301986ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301987{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301988 WARN_ON(hba->active_uic_cmd);
1989
1990 hba->active_uic_cmd = uic_cmd;
1991
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301992 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301993 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
1994 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
1995 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301996
1997 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301998 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301999 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302000}
2001
2002/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302003 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2004 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002005 * @uic_cmd: UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302006 *
2007 * Must be called with mutex held.
2008 * Returns 0 only if success.
2009 */
2010static int
2011ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2012{
2013 int ret;
2014 unsigned long flags;
2015
2016 if (wait_for_completion_timeout(&uic_cmd->done,
2017 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2018 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2019 else
2020 ret = -ETIMEDOUT;
2021
2022 spin_lock_irqsave(hba->host->host_lock, flags);
2023 hba->active_uic_cmd = NULL;
2024 spin_unlock_irqrestore(hba->host->host_lock, flags);
2025
2026 return ret;
2027}
2028
2029/**
2030 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2031 * @hba: per adapter instance
2032 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002033 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302034 *
2035 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002036 * with mutex held and host_lock locked.
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302037 * Returns 0 only if success.
2038 */
2039static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002040__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2041 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302042{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302043 if (!ufshcd_ready_for_uic_cmd(hba)) {
2044 dev_err(hba->dev,
2045 "Controller not ready to accept UIC commands\n");
2046 return -EIO;
2047 }
2048
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002049 if (completion)
2050 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302051
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302052 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302053
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002054 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302055}
2056
2057/**
2058 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2059 * @hba: per adapter instance
2060 * @uic_cmd: UIC command
2061 *
2062 * Returns 0 only if success.
2063 */
Avri Altmane77044c52018-10-07 17:30:39 +03002064int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302065{
2066 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002067 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302068
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002069 ufshcd_hold(hba, false);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302070 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03002071 ufshcd_add_delay_before_dme_cmd(hba);
2072
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002073 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002074 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002075 spin_unlock_irqrestore(hba->host->host_lock, flags);
2076 if (!ret)
2077 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2078
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302079 mutex_unlock(&hba->uic_cmd_mutex);
2080
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002081 ufshcd_release(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302082 return ret;
2083}
2084
2085/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302086 * ufshcd_map_sg - Map scatter-gather list to prdt
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002087 * @hba: per adapter instance
2088 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302089 *
2090 * Returns 0 in case of success, non-zero value in case of failure
2091 */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002092static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302093{
2094 struct ufshcd_sg_entry *prd_table;
2095 struct scatterlist *sg;
2096 struct scsi_cmnd *cmd;
2097 int sg_segments;
2098 int i;
2099
2100 cmd = lrbp->cmd;
2101 sg_segments = scsi_dma_map(cmd);
2102 if (sg_segments < 0)
2103 return sg_segments;
2104
2105 if (sg_segments) {
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002106 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2107 lrbp->utr_descriptor_ptr->prd_table_length =
2108 cpu_to_le16((u16)(sg_segments *
2109 sizeof(struct ufshcd_sg_entry)));
2110 else
2111 lrbp->utr_descriptor_ptr->prd_table_length =
2112 cpu_to_le16((u16) (sg_segments));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302113
2114 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2115
2116 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2117 prd_table[i].size =
2118 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2119 prd_table[i].base_addr =
2120 cpu_to_le32(lower_32_bits(sg->dma_address));
2121 prd_table[i].upper_addr =
2122 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002123 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302124 }
2125 } else {
2126 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2127 }
2128
2129 return 0;
2130}
2131
2132/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302133 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302134 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302135 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302136 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302137static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302138{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302139 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2140
2141 if (hba->ufs_version == UFSHCI_VERSION_10) {
2142 u32 rw;
2143 rw = set & INTERRUPT_MASK_RW_VER_10;
2144 set = rw | ((set ^ intrs) & intrs);
2145 } else {
2146 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302147 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302148
2149 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2150}
2151
2152/**
2153 * ufshcd_disable_intr - disable interrupts
2154 * @hba: per adapter instance
2155 * @intrs: interrupt bits
2156 */
2157static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2158{
2159 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2160
2161 if (hba->ufs_version == UFSHCI_VERSION_10) {
2162 u32 rw;
2163 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2164 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2165 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2166
2167 } else {
2168 set &= ~intrs;
2169 }
2170
2171 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302172}
2173
2174/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302175 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2176 * descriptor according to request
2177 * @lrbp: pointer to local reference block
2178 * @upiu_flags: flags required in the header
2179 * @cmd_dir: requests data direction
2180 */
2181static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
Joao Pinto300bb132016-05-11 12:21:27 +01002182 u32 *upiu_flags, enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302183{
2184 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2185 u32 data_direction;
2186 u32 dword_0;
2187
2188 if (cmd_dir == DMA_FROM_DEVICE) {
2189 data_direction = UTP_DEVICE_TO_HOST;
2190 *upiu_flags = UPIU_CMD_FLAGS_READ;
2191 } else if (cmd_dir == DMA_TO_DEVICE) {
2192 data_direction = UTP_HOST_TO_DEVICE;
2193 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2194 } else {
2195 data_direction = UTP_NO_DATA_TRANSFER;
2196 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2197 }
2198
2199 dword_0 = data_direction | (lrbp->command_type
2200 << UPIU_COMMAND_TYPE_OFFSET);
2201 if (lrbp->intr_cmd)
2202 dword_0 |= UTP_REQ_DESC_INT_CMD;
2203
2204 /* Transfer request descriptor header fields */
2205 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002206 /* dword_1 is reserved, hence it is set to 0 */
2207 req_desc->header.dword_1 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302208 /*
2209 * assigning invalid value for command status. Controller
2210 * updates OCS on command completion, with the command
2211 * status
2212 */
2213 req_desc->header.dword_2 =
2214 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002215 /* dword_3 is reserved, hence it is set to 0 */
2216 req_desc->header.dword_3 = 0;
Yaniv Gardi51047262016-02-01 15:02:38 +02002217
2218 req_desc->prd_table_length = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302219}
2220
2221/**
2222 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2223 * for scsi commands
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002224 * @lrbp: local reference block pointer
2225 * @upiu_flags: flags
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302226 */
2227static
2228void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2229{
2230 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002231 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302232
2233 /* command descriptor fields */
2234 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2235 UPIU_TRANSACTION_COMMAND, upiu_flags,
2236 lrbp->lun, lrbp->task_tag);
2237 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2238 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2239
2240 /* Total EHS length and Data segment length will be zero */
2241 ucd_req_ptr->header.dword_2 = 0;
2242
2243 ucd_req_ptr->sc.exp_data_transfer_len =
2244 cpu_to_be32(lrbp->cmd->sdb.length);
2245
Avri Altmana851b2b2018-10-07 17:30:34 +03002246 cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, UFS_CDB_SIZE);
2247 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002248 memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
2249
2250 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302251}
2252
Dolev Raviv68078d52013-07-30 00:35:58 +05302253/**
2254 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2255 * for query requsts
2256 * @hba: UFS hba
2257 * @lrbp: local reference block pointer
2258 * @upiu_flags: flags
2259 */
2260static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2261 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2262{
2263 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2264 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302265 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302266
2267 /* Query request header */
2268 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2269 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2270 lrbp->lun, lrbp->task_tag);
2271 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2272 0, query->request.query_func, 0, 0);
2273
Zang Leigang68612852016-08-25 17:39:19 +08002274 /* Data segment length only need for WRITE_DESC */
2275 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2276 ucd_req_ptr->header.dword_2 =
2277 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2278 else
2279 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302280
2281 /* Copy the Query Request buffer as is */
2282 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2283 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302284
2285 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002286 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
Avri Altman220d17a62018-10-07 17:30:36 +03002287 memcpy(ucd_req_ptr + 1, query->descriptor, len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002288
Yaniv Gardi51047262016-02-01 15:02:38 +02002289 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302290}
2291
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302292static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2293{
2294 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2295
2296 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2297
2298 /* command descriptor fields */
2299 ucd_req_ptr->header.dword_0 =
2300 UPIU_HEADER_DWORD(
2301 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002302 /* clear rest of the fields of basic header */
2303 ucd_req_ptr->header.dword_1 = 0;
2304 ucd_req_ptr->header.dword_2 = 0;
2305
2306 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302307}
2308
2309/**
Joao Pinto300bb132016-05-11 12:21:27 +01002310 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2311 * for Device Management Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002312 * @hba: per adapter instance
2313 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302314 */
Joao Pinto300bb132016-05-11 12:21:27 +01002315static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302316{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302317 u32 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302318 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302319
kehuanlin83dc7e32017-09-06 17:58:39 +08002320 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2321 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002322 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
kehuanlin83dc7e32017-09-06 17:58:39 +08002323 else
2324 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002325
2326 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2327 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2328 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2329 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2330 ufshcd_prepare_utp_nop_upiu(lrbp);
2331 else
2332 ret = -EINVAL;
2333
2334 return ret;
2335}
2336
2337/**
2338 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2339 * for SCSI Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002340 * @hba: per adapter instance
2341 * @lrbp: pointer to local reference block
Joao Pinto300bb132016-05-11 12:21:27 +01002342 */
2343static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2344{
2345 u32 upiu_flags;
2346 int ret = 0;
2347
kehuanlin83dc7e32017-09-06 17:58:39 +08002348 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2349 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002350 lrbp->command_type = UTP_CMD_TYPE_SCSI;
kehuanlin83dc7e32017-09-06 17:58:39 +08002351 else
2352 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002353
2354 if (likely(lrbp->cmd)) {
2355 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2356 lrbp->cmd->sc_data_direction);
2357 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2358 } else {
2359 ret = -EINVAL;
2360 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302361
2362 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302363}
2364
2365/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002366 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002367 * @upiu_wlun_id: UPIU W-LUN id
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002368 *
2369 * Returns SCSI W-LUN id
2370 */
2371static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2372{
2373 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2374}
2375
2376/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302377 * ufshcd_queuecommand - main entry point for SCSI requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002378 * @host: SCSI host pointer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302379 * @cmd: command from SCSI Midlayer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302380 *
2381 * Returns 0 for success, non-zero in case of failure
2382 */
2383static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2384{
2385 struct ufshcd_lrb *lrbp;
2386 struct ufs_hba *hba;
2387 unsigned long flags;
2388 int tag;
2389 int err = 0;
2390
2391 hba = shost_priv(host);
2392
2393 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02002394 if (!ufshcd_valid_tag(hba, tag)) {
2395 dev_err(hba->dev,
2396 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2397 __func__, tag, cmd, cmd->request);
2398 BUG();
2399 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302400
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002401 if (!down_read_trylock(&hba->clk_scaling_lock))
2402 return SCSI_MLQUEUE_HOST_BUSY;
2403
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302404 spin_lock_irqsave(hba->host->host_lock, flags);
2405 switch (hba->ufshcd_state) {
2406 case UFSHCD_STATE_OPERATIONAL:
2407 break;
Zang Leigang141f8162016-11-16 11:29:37 +08002408 case UFSHCD_STATE_EH_SCHEDULED:
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302409 case UFSHCD_STATE_RESET:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302410 err = SCSI_MLQUEUE_HOST_BUSY;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302411 goto out_unlock;
2412 case UFSHCD_STATE_ERROR:
2413 set_host_byte(cmd, DID_ERROR);
2414 cmd->scsi_done(cmd);
2415 goto out_unlock;
2416 default:
2417 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2418 __func__, hba->ufshcd_state);
2419 set_host_byte(cmd, DID_BAD_TARGET);
2420 cmd->scsi_done(cmd);
2421 goto out_unlock;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302422 }
Yaniv Gardi53c12d02016-02-01 15:02:45 +02002423
2424 /* if error handling is in progress, don't issue commands */
2425 if (ufshcd_eh_in_progress(hba)) {
2426 set_host_byte(cmd, DID_ERROR);
2427 cmd->scsi_done(cmd);
2428 goto out_unlock;
2429 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302430 spin_unlock_irqrestore(hba->host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302431
Gilad Broner7fabb772017-02-03 16:56:50 -08002432 hba->req_abort_count = 0;
2433
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302434 /* acquire the tag to make sure device cmds don't use it */
2435 if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
2436 /*
2437 * Dev manage command in progress, requeue the command.
2438 * Requeuing the command helps in cases where the request *may*
2439 * find different tag instead of waiting for dev manage command
2440 * completion.
2441 */
2442 err = SCSI_MLQUEUE_HOST_BUSY;
2443 goto out;
2444 }
2445
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002446 err = ufshcd_hold(hba, true);
2447 if (err) {
2448 err = SCSI_MLQUEUE_HOST_BUSY;
2449 clear_bit_unlock(tag, &hba->lrb_in_use);
2450 goto out;
2451 }
2452 WARN_ON(hba->clk_gating.state != CLKS_ON);
2453
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302454 lrbp = &hba->lrb[tag];
2455
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302456 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302457 lrbp->cmd = cmd;
Avri Altman09a5a242018-11-22 20:04:56 +02002458 lrbp->sense_bufflen = UFS_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302459 lrbp->sense_buffer = cmd->sense_buffer;
2460 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002461 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002462 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Gilad Bronere0b299e2017-02-03 16:56:40 -08002463 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302464
Joao Pinto300bb132016-05-11 12:21:27 +01002465 ufshcd_comp_scsi_upiu(hba, lrbp);
2466
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002467 err = ufshcd_map_sg(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302468 if (err) {
2469 lrbp->cmd = NULL;
2470 clear_bit_unlock(tag, &hba->lrb_in_use);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302471 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302472 }
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002473 /* Make sure descriptors are ready before ringing the doorbell */
2474 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302475
2476 /* issue command to the controller */
2477 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002478 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302479 ufshcd_send_command(hba, tag);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302480out_unlock:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302481 spin_unlock_irqrestore(hba->host->host_lock, flags);
2482out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002483 up_read(&hba->clk_scaling_lock);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302484 return err;
2485}
2486
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302487static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2488 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2489{
2490 lrbp->cmd = NULL;
2491 lrbp->sense_bufflen = 0;
2492 lrbp->sense_buffer = NULL;
2493 lrbp->task_tag = tag;
2494 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302495 lrbp->intr_cmd = true; /* No interrupt aggregation */
2496 hba->dev_cmd.type = cmd_type;
2497
Joao Pinto300bb132016-05-11 12:21:27 +01002498 return ufshcd_comp_devman_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302499}
2500
2501static int
2502ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2503{
2504 int err = 0;
2505 unsigned long flags;
2506 u32 mask = 1 << tag;
2507
2508 /* clear outstanding transaction before retry */
2509 spin_lock_irqsave(hba->host->host_lock, flags);
2510 ufshcd_utrl_clear(hba, tag);
2511 spin_unlock_irqrestore(hba->host->host_lock, flags);
2512
2513 /*
2514 * wait for for h/w to clear corresponding bit in door-bell.
2515 * max. wait is 1 sec.
2516 */
2517 err = ufshcd_wait_for_register(hba,
2518 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02002519 mask, ~mask, 1000, 1000, true);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302520
2521 return err;
2522}
2523
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002524static int
2525ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2526{
2527 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2528
2529 /* Get the UPIU response */
2530 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2531 UPIU_RSP_CODE_OFFSET;
2532 return query_res->response;
2533}
2534
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302535/**
2536 * ufshcd_dev_cmd_completion() - handles device management command responses
2537 * @hba: per adapter instance
2538 * @lrbp: pointer to local reference block
2539 */
2540static int
2541ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2542{
2543 int resp;
2544 int err = 0;
2545
Dolev Ravivff8e20c2016-12-22 18:42:18 -08002546 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302547 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2548
2549 switch (resp) {
2550 case UPIU_TRANSACTION_NOP_IN:
2551 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2552 err = -EINVAL;
2553 dev_err(hba->dev, "%s: unexpected response %x\n",
2554 __func__, resp);
2555 }
2556 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302557 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002558 err = ufshcd_check_query_response(hba, lrbp);
2559 if (!err)
2560 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302561 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302562 case UPIU_TRANSACTION_REJECT_UPIU:
2563 /* TODO: handle Reject UPIU Response */
2564 err = -EPERM;
2565 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2566 __func__);
2567 break;
2568 default:
2569 err = -EINVAL;
2570 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2571 __func__, resp);
2572 break;
2573 }
2574
2575 return err;
2576}
2577
2578static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2579 struct ufshcd_lrb *lrbp, int max_timeout)
2580{
2581 int err = 0;
2582 unsigned long time_left;
2583 unsigned long flags;
2584
2585 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2586 msecs_to_jiffies(max_timeout));
2587
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002588 /* Make sure descriptors are ready before ringing the doorbell */
2589 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302590 spin_lock_irqsave(hba->host->host_lock, flags);
2591 hba->dev_cmd.complete = NULL;
2592 if (likely(time_left)) {
2593 err = ufshcd_get_tr_ocs(lrbp);
2594 if (!err)
2595 err = ufshcd_dev_cmd_completion(hba, lrbp);
2596 }
2597 spin_unlock_irqrestore(hba->host->host_lock, flags);
2598
2599 if (!time_left) {
2600 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002601 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2602 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302603 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002604 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302605 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002606 /*
2607 * in case of an error, after clearing the doorbell,
2608 * we also need to clear the outstanding_request
2609 * field in hba
2610 */
2611 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302612 }
2613
2614 return err;
2615}
2616
2617/**
2618 * ufshcd_get_dev_cmd_tag - Get device management command tag
2619 * @hba: per-adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002620 * @tag_out: pointer to variable with available slot value
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302621 *
2622 * Get a free slot and lock it until device management command
2623 * completes.
2624 *
2625 * Returns false if free slot is unavailable for locking, else
2626 * return true with tag value in @tag.
2627 */
2628static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
2629{
2630 int tag;
2631 bool ret = false;
2632 unsigned long tmp;
2633
2634 if (!tag_out)
2635 goto out;
2636
2637 do {
2638 tmp = ~hba->lrb_in_use;
2639 tag = find_last_bit(&tmp, hba->nutrs);
2640 if (tag >= hba->nutrs)
2641 goto out;
2642 } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
2643
2644 *tag_out = tag;
2645 ret = true;
2646out:
2647 return ret;
2648}
2649
2650static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
2651{
2652 clear_bit_unlock(tag, &hba->lrb_in_use);
2653}
2654
2655/**
2656 * ufshcd_exec_dev_cmd - API for sending device management requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002657 * @hba: UFS hba
2658 * @cmd_type: specifies the type (NOP, Query...)
2659 * @timeout: time in seconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302660 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302661 * NOTE: Since there is only one available tag for device management commands,
2662 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302663 */
2664static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2665 enum dev_cmd_type cmd_type, int timeout)
2666{
2667 struct ufshcd_lrb *lrbp;
2668 int err;
2669 int tag;
2670 struct completion wait;
2671 unsigned long flags;
2672
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002673 down_read(&hba->clk_scaling_lock);
2674
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302675 /*
2676 * Get free slot, sleep if slots are unavailable.
2677 * Even though we use wait_event() which sleeps indefinitely,
2678 * the maximum wait time is bounded by SCSI request timeout.
2679 */
2680 wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
2681
2682 init_completion(&wait);
2683 lrbp = &hba->lrb[tag];
2684 WARN_ON(lrbp->cmd);
2685 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2686 if (unlikely(err))
2687 goto out_put_tag;
2688
2689 hba->dev_cmd.complete = &wait;
2690
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002691 ufshcd_add_query_upiu_trace(hba, tag, "query_send");
Yaniv Gardie3dfdc52016-02-01 15:02:49 +02002692 /* Make sure descriptors are ready before ringing the doorbell */
2693 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302694 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002695 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302696 ufshcd_send_command(hba, tag);
2697 spin_unlock_irqrestore(hba->host->host_lock, flags);
2698
2699 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2700
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002701 ufshcd_add_query_upiu_trace(hba, tag,
2702 err ? "query_complete_err" : "query_complete");
2703
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302704out_put_tag:
2705 ufshcd_put_dev_cmd_tag(hba, tag);
2706 wake_up(&hba->dev_cmd.tag_wq);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002707 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302708 return err;
2709}
2710
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302711/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002712 * ufshcd_init_query() - init the query response and request parameters
2713 * @hba: per-adapter instance
2714 * @request: address of the request pointer to be initialized
2715 * @response: address of the response pointer to be initialized
2716 * @opcode: operation to perform
2717 * @idn: flag idn to access
2718 * @index: LU number to access
2719 * @selector: query/flag/descriptor further identification
2720 */
2721static inline void ufshcd_init_query(struct ufs_hba *hba,
2722 struct ufs_query_req **request, struct ufs_query_res **response,
2723 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2724{
2725 *request = &hba->dev_cmd.query.request;
2726 *response = &hba->dev_cmd.query.response;
2727 memset(*request, 0, sizeof(struct ufs_query_req));
2728 memset(*response, 0, sizeof(struct ufs_query_res));
2729 (*request)->upiu_req.opcode = opcode;
2730 (*request)->upiu_req.idn = idn;
2731 (*request)->upiu_req.index = index;
2732 (*request)->upiu_req.selector = selector;
2733}
2734
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002735static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2736 enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2737{
2738 int ret;
2739 int retries;
2740
2741 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2742 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2743 if (ret)
2744 dev_dbg(hba->dev,
2745 "%s: failed with error %d, retries %d\n",
2746 __func__, ret, retries);
2747 else
2748 break;
2749 }
2750
2751 if (ret)
2752 dev_err(hba->dev,
2753 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2754 __func__, opcode, idn, ret, retries);
2755 return ret;
2756}
2757
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002758/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302759 * ufshcd_query_flag() - API function for sending flag query requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002760 * @hba: per-adapter instance
2761 * @opcode: flag query to perform
2762 * @idn: flag idn to access
2763 * @flag_res: the flag value after the query request completes
Dolev Raviv68078d52013-07-30 00:35:58 +05302764 *
2765 * Returns 0 for success, non-zero in case of failure
2766 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002767int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Dolev Raviv68078d52013-07-30 00:35:58 +05302768 enum flag_idn idn, bool *flag_res)
2769{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002770 struct ufs_query_req *request = NULL;
2771 struct ufs_query_res *response = NULL;
2772 int err, index = 0, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002773 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05302774
2775 BUG_ON(!hba);
2776
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002777 ufshcd_hold(hba, false);
Dolev Raviv68078d52013-07-30 00:35:58 +05302778 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002779 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2780 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05302781
2782 switch (opcode) {
2783 case UPIU_QUERY_OPCODE_SET_FLAG:
2784 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2785 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2786 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2787 break;
2788 case UPIU_QUERY_OPCODE_READ_FLAG:
2789 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2790 if (!flag_res) {
2791 /* No dummy reads */
2792 dev_err(hba->dev, "%s: Invalid argument for read request\n",
2793 __func__);
2794 err = -EINVAL;
2795 goto out_unlock;
2796 }
2797 break;
2798 default:
2799 dev_err(hba->dev,
2800 "%s: Expected query flag opcode but got = %d\n",
2801 __func__, opcode);
2802 err = -EINVAL;
2803 goto out_unlock;
2804 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302805
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002806 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05302807
2808 if (err) {
2809 dev_err(hba->dev,
2810 "%s: Sending flag query for idn %d failed, err = %d\n",
2811 __func__, idn, err);
2812 goto out_unlock;
2813 }
2814
2815 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302816 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302817 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2818
2819out_unlock:
2820 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002821 ufshcd_release(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05302822 return err;
2823}
2824
2825/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302826 * ufshcd_query_attr - API function for sending attribute requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002827 * @hba: per-adapter instance
2828 * @opcode: attribute opcode
2829 * @idn: attribute idn to access
2830 * @index: index field
2831 * @selector: selector field
2832 * @attr_val: the attribute value after the query request completes
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302833 *
2834 * Returns 0 for success, non-zero in case of failure
2835*/
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02002836int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2837 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302838{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002839 struct ufs_query_req *request = NULL;
2840 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302841 int err;
2842
2843 BUG_ON(!hba);
2844
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002845 ufshcd_hold(hba, false);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302846 if (!attr_val) {
2847 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2848 __func__, opcode);
2849 err = -EINVAL;
2850 goto out;
2851 }
2852
2853 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002854 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2855 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302856
2857 switch (opcode) {
2858 case UPIU_QUERY_OPCODE_WRITE_ATTR:
2859 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302860 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302861 break;
2862 case UPIU_QUERY_OPCODE_READ_ATTR:
2863 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2864 break;
2865 default:
2866 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2867 __func__, opcode);
2868 err = -EINVAL;
2869 goto out_unlock;
2870 }
2871
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002872 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302873
2874 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002875 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2876 __func__, opcode, idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302877 goto out_unlock;
2878 }
2879
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302880 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302881
2882out_unlock:
2883 mutex_unlock(&hba->dev_cmd.lock);
2884out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002885 ufshcd_release(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302886 return err;
2887}
2888
2889/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02002890 * ufshcd_query_attr_retry() - API function for sending query
2891 * attribute with retries
2892 * @hba: per-adapter instance
2893 * @opcode: attribute opcode
2894 * @idn: attribute idn to access
2895 * @index: index field
2896 * @selector: selector field
2897 * @attr_val: the attribute value after the query request
2898 * completes
2899 *
2900 * Returns 0 for success, non-zero in case of failure
2901*/
2902static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2903 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2904 u32 *attr_val)
2905{
2906 int ret = 0;
2907 u32 retries;
2908
2909 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2910 ret = ufshcd_query_attr(hba, opcode, idn, index,
2911 selector, attr_val);
2912 if (ret)
2913 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2914 __func__, ret, retries);
2915 else
2916 break;
2917 }
2918
2919 if (ret)
2920 dev_err(hba->dev,
2921 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2922 __func__, idn, ret, QUERY_REQ_RETRIES);
2923 return ret;
2924}
2925
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002926static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002927 enum query_opcode opcode, enum desc_idn idn, u8 index,
2928 u8 selector, u8 *desc_buf, int *buf_len)
2929{
2930 struct ufs_query_req *request = NULL;
2931 struct ufs_query_res *response = NULL;
2932 int err;
2933
2934 BUG_ON(!hba);
2935
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002936 ufshcd_hold(hba, false);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002937 if (!desc_buf) {
2938 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2939 __func__, opcode);
2940 err = -EINVAL;
2941 goto out;
2942 }
2943
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002944 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002945 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2946 __func__, *buf_len);
2947 err = -EINVAL;
2948 goto out;
2949 }
2950
2951 mutex_lock(&hba->dev_cmd.lock);
2952 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2953 selector);
2954 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002955 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002956
2957 switch (opcode) {
2958 case UPIU_QUERY_OPCODE_WRITE_DESC:
2959 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2960 break;
2961 case UPIU_QUERY_OPCODE_READ_DESC:
2962 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2963 break;
2964 default:
2965 dev_err(hba->dev,
2966 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2967 __func__, opcode);
2968 err = -EINVAL;
2969 goto out_unlock;
2970 }
2971
2972 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2973
2974 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002975 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2976 __func__, opcode, idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002977 goto out_unlock;
2978 }
2979
2980 hba->dev_cmd.query.descriptor = NULL;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002981 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002982
2983out_unlock:
2984 mutex_unlock(&hba->dev_cmd.lock);
2985out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002986 ufshcd_release(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002987 return err;
2988}
2989
2990/**
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002991 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
2992 * @hba: per-adapter instance
2993 * @opcode: attribute opcode
2994 * @idn: attribute idn to access
2995 * @index: index field
2996 * @selector: selector field
2997 * @desc_buf: the buffer that contains the descriptor
2998 * @buf_len: length parameter passed to the device
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002999 *
3000 * Returns 0 for success, non-zero in case of failure.
3001 * The buf_len parameter will contain, on return, the length parameter
3002 * received on the response.
3003 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02003004int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3005 enum query_opcode opcode,
3006 enum desc_idn idn, u8 index,
3007 u8 selector,
3008 u8 *desc_buf, int *buf_len)
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003009{
3010 int err;
3011 int retries;
3012
3013 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3014 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3015 selector, desc_buf, buf_len);
3016 if (!err || err == -EINVAL)
3017 break;
3018 }
3019
3020 return err;
3021}
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003022
3023/**
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003024 * ufshcd_read_desc_length - read the specified descriptor length from header
3025 * @hba: Pointer to adapter instance
3026 * @desc_id: descriptor idn value
3027 * @desc_index: descriptor index
3028 * @desc_length: pointer to variable to read the length of descriptor
3029 *
3030 * Return 0 in case of success, non-zero otherwise
3031 */
3032static int ufshcd_read_desc_length(struct ufs_hba *hba,
3033 enum desc_idn desc_id,
3034 int desc_index,
3035 int *desc_length)
3036{
3037 int ret;
3038 u8 header[QUERY_DESC_HDR_SIZE];
3039 int header_len = QUERY_DESC_HDR_SIZE;
3040
3041 if (desc_id >= QUERY_DESC_IDN_MAX)
3042 return -EINVAL;
3043
3044 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3045 desc_id, desc_index, 0, header,
3046 &header_len);
3047
3048 if (ret) {
3049 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
3050 __func__, desc_id);
3051 return ret;
3052 } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
3053 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
3054 __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3055 desc_id);
3056 ret = -EINVAL;
3057 }
3058
3059 *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3060 return ret;
3061
3062}
3063
3064/**
3065 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3066 * @hba: Pointer to adapter instance
3067 * @desc_id: descriptor idn value
3068 * @desc_len: mapped desc length (out)
3069 *
3070 * Return 0 in case of success, non-zero otherwise
3071 */
3072int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3073 enum desc_idn desc_id, int *desc_len)
3074{
3075 switch (desc_id) {
3076 case QUERY_DESC_IDN_DEVICE:
3077 *desc_len = hba->desc_size.dev_desc;
3078 break;
3079 case QUERY_DESC_IDN_POWER:
3080 *desc_len = hba->desc_size.pwr_desc;
3081 break;
3082 case QUERY_DESC_IDN_GEOMETRY:
3083 *desc_len = hba->desc_size.geom_desc;
3084 break;
3085 case QUERY_DESC_IDN_CONFIGURATION:
3086 *desc_len = hba->desc_size.conf_desc;
3087 break;
3088 case QUERY_DESC_IDN_UNIT:
3089 *desc_len = hba->desc_size.unit_desc;
3090 break;
3091 case QUERY_DESC_IDN_INTERCONNECT:
3092 *desc_len = hba->desc_size.interc_desc;
3093 break;
3094 case QUERY_DESC_IDN_STRING:
3095 *desc_len = QUERY_DESC_MAX_SIZE;
3096 break;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02003097 case QUERY_DESC_IDN_HEALTH:
3098 *desc_len = hba->desc_size.hlth_desc;
3099 break;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003100 case QUERY_DESC_IDN_RFU_0:
3101 case QUERY_DESC_IDN_RFU_1:
3102 *desc_len = 0;
3103 break;
3104 default:
3105 *desc_len = 0;
3106 return -EINVAL;
3107 }
3108 return 0;
3109}
3110EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3111
3112/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003113 * ufshcd_read_desc_param - read the specified descriptor parameter
3114 * @hba: Pointer to adapter instance
3115 * @desc_id: descriptor idn value
3116 * @desc_index: descriptor index
3117 * @param_offset: offset of the parameter to read
3118 * @param_read_buf: pointer to buffer where parameter would be read
3119 * @param_size: sizeof(param_read_buf)
3120 *
3121 * Return 0 in case of success, non-zero otherwise
3122 */
Stanislav Nijnikov45bced82018-02-15 14:14:02 +02003123int ufshcd_read_desc_param(struct ufs_hba *hba,
3124 enum desc_idn desc_id,
3125 int desc_index,
3126 u8 param_offset,
3127 u8 *param_read_buf,
3128 u8 param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003129{
3130 int ret;
3131 u8 *desc_buf;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003132 int buff_len;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003133 bool is_kmalloc = true;
3134
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003135 /* Safety check */
3136 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003137 return -EINVAL;
3138
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003139 /* Get the max length of descriptor from structure filled up at probe
3140 * time.
3141 */
3142 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003143
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003144 /* Sanity checks */
3145 if (ret || !buff_len) {
3146 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3147 __func__);
3148 return ret;
3149 }
3150
3151 /* Check whether we need temp memory */
3152 if (param_offset != 0 || param_size < buff_len) {
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003153 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3154 if (!desc_buf)
3155 return -ENOMEM;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003156 } else {
3157 desc_buf = param_read_buf;
3158 is_kmalloc = false;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003159 }
3160
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003161 /* Request for full descriptor */
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003162 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003163 desc_id, desc_index, 0,
3164 desc_buf, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003165
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003166 if (ret) {
3167 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3168 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003169 goto out;
3170 }
3171
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003172 /* Sanity check */
3173 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3174 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3175 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3176 ret = -EINVAL;
3177 goto out;
3178 }
3179
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003180 /* Check wherher we will not copy more data, than available */
3181 if (is_kmalloc && param_size > buff_len)
3182 param_size = buff_len;
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003183
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003184 if (is_kmalloc)
3185 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3186out:
3187 if (is_kmalloc)
3188 kfree(desc_buf);
3189 return ret;
3190}
3191
3192static inline int ufshcd_read_desc(struct ufs_hba *hba,
3193 enum desc_idn desc_id,
3194 int desc_index,
3195 u8 *buf,
3196 u32 size)
3197{
3198 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3199}
3200
3201static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3202 u8 *buf,
3203 u32 size)
3204{
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02003205 return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003206}
3207
Tomas Winkler8209b6d2017-01-05 10:45:10 +02003208static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
Yaniv Gardib573d482016-03-10 17:37:09 +02003209{
3210 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3211}
Yaniv Gardib573d482016-03-10 17:37:09 +02003212
3213/**
3214 * ufshcd_read_string_desc - read string descriptor
3215 * @hba: pointer to adapter instance
3216 * @desc_index: descriptor index
3217 * @buf: pointer to buffer where descriptor would be read
3218 * @size: size of buf
3219 * @ascii: if true convert from unicode to ascii characters
3220 *
3221 * Return 0 in case of success, non-zero otherwise
3222 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02003223int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index,
3224 u8 *buf, u32 size, bool ascii)
Yaniv Gardib573d482016-03-10 17:37:09 +02003225{
3226 int err = 0;
3227
3228 err = ufshcd_read_desc(hba,
3229 QUERY_DESC_IDN_STRING, desc_index, buf, size);
3230
3231 if (err) {
3232 dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n",
3233 __func__, QUERY_REQ_RETRIES, err);
3234 goto out;
3235 }
3236
3237 if (ascii) {
3238 int desc_len;
3239 int ascii_len;
3240 int i;
3241 char *buff_ascii;
3242
3243 desc_len = buf[0];
3244 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3245 ascii_len = (desc_len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3246 if (size < ascii_len + QUERY_DESC_HDR_SIZE) {
3247 dev_err(hba->dev, "%s: buffer allocated size is too small\n",
3248 __func__);
3249 err = -ENOMEM;
3250 goto out;
3251 }
3252
3253 buff_ascii = kmalloc(ascii_len, GFP_KERNEL);
3254 if (!buff_ascii) {
3255 err = -ENOMEM;
Tiezhu Yangfcbefc32016-06-25 12:35:22 +08003256 goto out;
Yaniv Gardib573d482016-03-10 17:37:09 +02003257 }
3258
3259 /*
3260 * the descriptor contains string in UTF16 format
3261 * we need to convert to utf-8 so it can be displayed
3262 */
3263 utf16s_to_utf8s((wchar_t *)&buf[QUERY_DESC_HDR_SIZE],
3264 desc_len - QUERY_DESC_HDR_SIZE,
3265 UTF16_BIG_ENDIAN, buff_ascii, ascii_len);
3266
3267 /* replace non-printable or non-ASCII characters with spaces */
3268 for (i = 0; i < ascii_len; i++)
3269 ufshcd_remove_non_printable(&buff_ascii[i]);
3270
3271 memset(buf + QUERY_DESC_HDR_SIZE, 0,
3272 size - QUERY_DESC_HDR_SIZE);
3273 memcpy(buf + QUERY_DESC_HDR_SIZE, buff_ascii, ascii_len);
3274 buf[QUERY_DESC_LENGTH_OFFSET] = ascii_len + QUERY_DESC_HDR_SIZE;
Yaniv Gardib573d482016-03-10 17:37:09 +02003275 kfree(buff_ascii);
3276 }
3277out:
3278 return err;
3279}
Yaniv Gardib573d482016-03-10 17:37:09 +02003280
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003281/**
3282 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3283 * @hba: Pointer to adapter instance
3284 * @lun: lun id
3285 * @param_offset: offset of the parameter to read
3286 * @param_read_buf: pointer to buffer where parameter would be read
3287 * @param_size: sizeof(param_read_buf)
3288 *
3289 * Return 0 in case of success, non-zero otherwise
3290 */
3291static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3292 int lun,
3293 enum unit_desc_param param_offset,
3294 u8 *param_read_buf,
3295 u32 param_size)
3296{
3297 /*
3298 * Unit descriptors are only available for general purpose LUs (LUN id
3299 * from 0 to 7) and RPMB Well known LU.
3300 */
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02003301 if (!ufs_is_valid_unit_desc_lun(lun))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003302 return -EOPNOTSUPP;
3303
3304 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3305 param_offset, param_read_buf, param_size);
3306}
3307
3308/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303309 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3310 * @hba: per adapter instance
3311 *
3312 * 1. Allocate DMA memory for Command Descriptor array
3313 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3314 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3315 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3316 * (UTMRDL)
3317 * 4. Allocate memory for local reference block(lrb).
3318 *
3319 * Returns 0 for success, non-zero in case of failure
3320 */
3321static int ufshcd_memory_alloc(struct ufs_hba *hba)
3322{
3323 size_t utmrdl_size, utrdl_size, ucdl_size;
3324
3325 /* Allocate memory for UTP command descriptors */
3326 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003327 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3328 ucdl_size,
3329 &hba->ucdl_dma_addr,
3330 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303331
3332 /*
3333 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3334 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3335 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3336 * be aligned to 128 bytes as well
3337 */
3338 if (!hba->ucdl_base_addr ||
3339 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303340 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303341 "Command Descriptor Memory allocation failed\n");
3342 goto out;
3343 }
3344
3345 /*
3346 * Allocate memory for UTP Transfer descriptors
3347 * UFSHCI requires 1024 byte alignment of UTRD
3348 */
3349 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003350 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3351 utrdl_size,
3352 &hba->utrdl_dma_addr,
3353 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303354 if (!hba->utrdl_base_addr ||
3355 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303356 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303357 "Transfer Descriptor Memory allocation failed\n");
3358 goto out;
3359 }
3360
3361 /*
3362 * Allocate memory for UTP Task Management descriptors
3363 * UFSHCI requires 1024 byte alignment of UTMRD
3364 */
3365 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003366 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3367 utmrdl_size,
3368 &hba->utmrdl_dma_addr,
3369 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303370 if (!hba->utmrdl_base_addr ||
3371 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303372 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303373 "Task Management Descriptor Memory allocation failed\n");
3374 goto out;
3375 }
3376
3377 /* Allocate memory for local reference block */
Kees Cooka86854d2018-06-12 14:07:58 -07003378 hba->lrb = devm_kcalloc(hba->dev,
3379 hba->nutrs, sizeof(struct ufshcd_lrb),
Seungwon Jeon2953f852013-06-27 13:31:54 +09003380 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303381 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303382 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303383 goto out;
3384 }
3385 return 0;
3386out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303387 return -ENOMEM;
3388}
3389
3390/**
3391 * ufshcd_host_memory_configure - configure local reference block with
3392 * memory offsets
3393 * @hba: per adapter instance
3394 *
3395 * Configure Host memory space
3396 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3397 * address.
3398 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3399 * and PRDT offset.
3400 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3401 * into local reference block.
3402 */
3403static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3404{
3405 struct utp_transfer_cmd_desc *cmd_descp;
3406 struct utp_transfer_req_desc *utrdlp;
3407 dma_addr_t cmd_desc_dma_addr;
3408 dma_addr_t cmd_desc_element_addr;
3409 u16 response_offset;
3410 u16 prdt_offset;
3411 int cmd_desc_size;
3412 int i;
3413
3414 utrdlp = hba->utrdl_base_addr;
3415 cmd_descp = hba->ucdl_base_addr;
3416
3417 response_offset =
3418 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3419 prdt_offset =
3420 offsetof(struct utp_transfer_cmd_desc, prd_table);
3421
3422 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3423 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3424
3425 for (i = 0; i < hba->nutrs; i++) {
3426 /* Configure UTRD with command descriptor base address */
3427 cmd_desc_element_addr =
3428 (cmd_desc_dma_addr + (cmd_desc_size * i));
3429 utrdlp[i].command_desc_base_addr_lo =
3430 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3431 utrdlp[i].command_desc_base_addr_hi =
3432 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3433
3434 /* Response upiu and prdt offset should be in double words */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003435 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3436 utrdlp[i].response_upiu_offset =
3437 cpu_to_le16(response_offset);
3438 utrdlp[i].prd_table_offset =
3439 cpu_to_le16(prdt_offset);
3440 utrdlp[i].response_upiu_length =
3441 cpu_to_le16(ALIGNED_UPIU_SIZE);
3442 } else {
3443 utrdlp[i].response_upiu_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303444 cpu_to_le16((response_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003445 utrdlp[i].prd_table_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303446 cpu_to_le16((prdt_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003447 utrdlp[i].response_upiu_length =
Sujit Reddy Thumma3ca316c2013-06-26 22:39:30 +05303448 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003449 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303450
3451 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003452 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3453 (i * sizeof(struct utp_transfer_req_desc));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303454 hba->lrb[i].ucd_req_ptr =
3455 (struct utp_upiu_req *)(cmd_descp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003456 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303457 hba->lrb[i].ucd_rsp_ptr =
3458 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003459 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3460 response_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303461 hba->lrb[i].ucd_prdt_ptr =
3462 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003463 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3464 prdt_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303465 }
3466}
3467
3468/**
3469 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3470 * @hba: per adapter instance
3471 *
3472 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3473 * in order to initialize the Unipro link startup procedure.
3474 * Once the Unipro links are up, the device connected to the controller
3475 * is detected.
3476 *
3477 * Returns 0 on success, non-zero value on failure
3478 */
3479static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3480{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303481 struct uic_command uic_cmd = {0};
3482 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303483
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303484 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3485
3486 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3487 if (ret)
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003488 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303489 "dme-link-startup: error code %d\n", ret);
3490 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303491}
Alim Akhtar4404c5d2018-05-06 15:44:17 +05303492/**
3493 * ufshcd_dme_reset - UIC command for DME_RESET
3494 * @hba: per adapter instance
3495 *
3496 * DME_RESET command is issued in order to reset UniPro stack.
3497 * This function now deal with cold reset.
3498 *
3499 * Returns 0 on success, non-zero value on failure
3500 */
3501static int ufshcd_dme_reset(struct ufs_hba *hba)
3502{
3503 struct uic_command uic_cmd = {0};
3504 int ret;
3505
3506 uic_cmd.command = UIC_CMD_DME_RESET;
3507
3508 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3509 if (ret)
3510 dev_err(hba->dev,
3511 "dme-reset: error code %d\n", ret);
3512
3513 return ret;
3514}
3515
3516/**
3517 * ufshcd_dme_enable - UIC command for DME_ENABLE
3518 * @hba: per adapter instance
3519 *
3520 * DME_ENABLE command is issued in order to enable UniPro stack.
3521 *
3522 * Returns 0 on success, non-zero value on failure
3523 */
3524static int ufshcd_dme_enable(struct ufs_hba *hba)
3525{
3526 struct uic_command uic_cmd = {0};
3527 int ret;
3528
3529 uic_cmd.command = UIC_CMD_DME_ENABLE;
3530
3531 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3532 if (ret)
3533 dev_err(hba->dev,
3534 "dme-reset: error code %d\n", ret);
3535
3536 return ret;
3537}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303538
Yaniv Gardicad2e032015-03-31 17:37:14 +03003539static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3540{
3541 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3542 unsigned long min_sleep_time_us;
3543
3544 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3545 return;
3546
3547 /*
3548 * last_dme_cmd_tstamp will be 0 only for 1st call to
3549 * this function
3550 */
3551 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3552 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3553 } else {
3554 unsigned long delta =
3555 (unsigned long) ktime_to_us(
3556 ktime_sub(ktime_get(),
3557 hba->last_dme_cmd_tstamp));
3558
3559 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3560 min_sleep_time_us =
3561 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3562 else
3563 return; /* no more delay required */
3564 }
3565
3566 /* allow sleep for extra 50us if needed */
3567 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3568}
3569
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303570/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303571 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3572 * @hba: per adapter instance
3573 * @attr_sel: uic command argument1
3574 * @attr_set: attribute set type as uic command argument2
3575 * @mib_val: setting value as uic command argument3
3576 * @peer: indicate whether peer or local
3577 *
3578 * Returns 0 on success, non-zero value on failure
3579 */
3580int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3581 u8 attr_set, u32 mib_val, u8 peer)
3582{
3583 struct uic_command uic_cmd = {0};
3584 static const char *const action[] = {
3585 "dme-set",
3586 "dme-peer-set"
3587 };
3588 const char *set = action[!!peer];
3589 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003590 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303591
3592 uic_cmd.command = peer ?
3593 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3594 uic_cmd.argument1 = attr_sel;
3595 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3596 uic_cmd.argument3 = mib_val;
3597
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003598 do {
3599 /* for peer attributes we retry upon failure */
3600 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3601 if (ret)
3602 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3603 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3604 } while (ret && peer && --retries);
3605
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003606 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003607 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003608 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3609 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303610
3611 return ret;
3612}
3613EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3614
3615/**
3616 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3617 * @hba: per adapter instance
3618 * @attr_sel: uic command argument1
3619 * @mib_val: the value of the attribute as returned by the UIC command
3620 * @peer: indicate whether peer or local
3621 *
3622 * Returns 0 on success, non-zero value on failure
3623 */
3624int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3625 u32 *mib_val, u8 peer)
3626{
3627 struct uic_command uic_cmd = {0};
3628 static const char *const action[] = {
3629 "dme-get",
3630 "dme-peer-get"
3631 };
3632 const char *get = action[!!peer];
3633 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003634 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003635 struct ufs_pa_layer_attr orig_pwr_info;
3636 struct ufs_pa_layer_attr temp_pwr_info;
3637 bool pwr_mode_change = false;
3638
3639 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3640 orig_pwr_info = hba->pwr_info;
3641 temp_pwr_info = orig_pwr_info;
3642
3643 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3644 orig_pwr_info.pwr_rx == FAST_MODE) {
3645 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3646 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3647 pwr_mode_change = true;
3648 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3649 orig_pwr_info.pwr_rx == SLOW_MODE) {
3650 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3651 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3652 pwr_mode_change = true;
3653 }
3654 if (pwr_mode_change) {
3655 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3656 if (ret)
3657 goto out;
3658 }
3659 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303660
3661 uic_cmd.command = peer ?
3662 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3663 uic_cmd.argument1 = attr_sel;
3664
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003665 do {
3666 /* for peer attributes we retry upon failure */
3667 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3668 if (ret)
3669 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3670 get, UIC_GET_ATTR_ID(attr_sel), ret);
3671 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303672
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003673 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003674 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003675 get, UIC_GET_ATTR_ID(attr_sel),
3676 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003677
3678 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303679 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003680
3681 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3682 && pwr_mode_change)
3683 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303684out:
3685 return ret;
3686}
3687EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3688
3689/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003690 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3691 * state) and waits for it to take effect.
3692 *
3693 * @hba: per adapter instance
3694 * @cmd: UIC command to execute
3695 *
3696 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3697 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3698 * and device UniPro link and hence it's final completion would be indicated by
3699 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3700 * addition to normal UIC command completion Status (UCCS). This function only
3701 * returns after the relevant status bits indicate the completion.
3702 *
3703 * Returns 0 on success, non-zero value on failure
3704 */
3705static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3706{
3707 struct completion uic_async_done;
3708 unsigned long flags;
3709 u8 status;
3710 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003711 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003712
3713 mutex_lock(&hba->uic_cmd_mutex);
3714 init_completion(&uic_async_done);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003715 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003716
3717 spin_lock_irqsave(hba->host->host_lock, flags);
3718 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003719 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3720 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3721 /*
3722 * Make sure UIC command completion interrupt is disabled before
3723 * issuing UIC command.
3724 */
3725 wmb();
3726 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003727 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003728 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3729 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003730 if (ret) {
3731 dev_err(hba->dev,
3732 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3733 cmd->command, cmd->argument3, ret);
3734 goto out;
3735 }
3736
3737 if (!wait_for_completion_timeout(hba->uic_async_done,
3738 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3739 dev_err(hba->dev,
3740 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3741 cmd->command, cmd->argument3);
3742 ret = -ETIMEDOUT;
3743 goto out;
3744 }
3745
3746 status = ufshcd_get_upmcrs(hba);
3747 if (status != PWR_LOCAL) {
3748 dev_err(hba->dev,
Zang Leigang479da362017-09-19 16:50:30 +08003749 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003750 cmd->command, status);
3751 ret = (status != PWR_OK) ? status : -1;
3752 }
3753out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08003754 if (ret) {
3755 ufshcd_print_host_state(hba);
3756 ufshcd_print_pwr_info(hba);
3757 ufshcd_print_host_regs(hba);
3758 }
3759
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003760 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003761 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003762 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003763 if (reenable_intr)
3764 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003765 spin_unlock_irqrestore(hba->host->host_lock, flags);
3766 mutex_unlock(&hba->uic_cmd_mutex);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003767
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003768 return ret;
3769}
3770
3771/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303772 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3773 * using DME_SET primitives.
3774 * @hba: per adapter instance
3775 * @mode: powr mode value
3776 *
3777 * Returns 0 on success, non-zero value on failure
3778 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05303779static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303780{
3781 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003782 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303783
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003784 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3785 ret = ufshcd_dme_set(hba,
3786 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3787 if (ret) {
3788 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3789 __func__, ret);
3790 goto out;
3791 }
3792 }
3793
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303794 uic_cmd.command = UIC_CMD_DME_SET;
3795 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3796 uic_cmd.argument3 = mode;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003797 ufshcd_hold(hba, false);
3798 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3799 ufshcd_release(hba);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303800
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003801out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003802 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003803}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303804
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003805static int ufshcd_link_recovery(struct ufs_hba *hba)
3806{
3807 int ret;
3808 unsigned long flags;
3809
3810 spin_lock_irqsave(hba->host->host_lock, flags);
3811 hba->ufshcd_state = UFSHCD_STATE_RESET;
3812 ufshcd_set_eh_in_progress(hba);
3813 spin_unlock_irqrestore(hba->host->host_lock, flags);
3814
3815 ret = ufshcd_host_reset_and_restore(hba);
3816
3817 spin_lock_irqsave(hba->host->host_lock, flags);
3818 if (ret)
3819 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3820 ufshcd_clear_eh_in_progress(hba);
3821 spin_unlock_irqrestore(hba->host->host_lock, flags);
3822
3823 if (ret)
3824 dev_err(hba->dev, "%s: link recovery failed, err %d",
3825 __func__, ret);
3826
3827 return ret;
3828}
3829
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003830static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003831{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003832 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003833 struct uic_command uic_cmd = {0};
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003834 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003835
Kiwoong Kimee32c902016-11-10 21:17:43 +09003836 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3837
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003838 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003839 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003840 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3841 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003842
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003843 if (ret) {
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003844 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3845 __func__, ret);
3846
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003847 /*
3848 * If link recovery fails then return error so that caller
3849 * don't retry the hibern8 enter again.
3850 */
3851 if (ufshcd_link_recovery(hba))
3852 ret = -ENOLINK;
Kiwoong Kimee32c902016-11-10 21:17:43 +09003853 } else
3854 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3855 POST_CHANGE);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003856
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003857 return ret;
3858}
3859
3860static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3861{
3862 int ret = 0, retries;
3863
3864 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3865 ret = __ufshcd_uic_hibern8_enter(hba);
3866 if (!ret || ret == -ENOLINK)
3867 goto out;
3868 }
3869out:
3870 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003871}
3872
3873static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3874{
3875 struct uic_command uic_cmd = {0};
3876 int ret;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003877 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003878
Kiwoong Kimee32c902016-11-10 21:17:43 +09003879 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3880
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003881 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3882 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003883 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3884 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3885
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303886 if (ret) {
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003887 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3888 __func__, ret);
3889 ret = ufshcd_link_recovery(hba);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003890 } else {
Kiwoong Kimee32c902016-11-10 21:17:43 +09003891 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3892 POST_CHANGE);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003893 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3894 hba->ufs_stats.hibern8_exit_cnt++;
3895 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303896
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303897 return ret;
3898}
3899
Adrian Hunterad448372018-03-20 15:07:38 +02003900static void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
3901{
3902 unsigned long flags;
3903
3904 if (!(hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) || !hba->ahit)
3905 return;
3906
3907 spin_lock_irqsave(hba->host->host_lock, flags);
3908 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3909 spin_unlock_irqrestore(hba->host->host_lock, flags);
3910}
3911
Yaniv Gardi50646362014-10-23 13:25:13 +03003912 /**
3913 * ufshcd_init_pwr_info - setting the POR (power on reset)
3914 * values in hba power info
3915 * @hba: per-adapter instance
3916 */
3917static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3918{
3919 hba->pwr_info.gear_rx = UFS_PWM_G1;
3920 hba->pwr_info.gear_tx = UFS_PWM_G1;
3921 hba->pwr_info.lane_rx = 1;
3922 hba->pwr_info.lane_tx = 1;
3923 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3924 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3925 hba->pwr_info.hs_rate = 0;
3926}
3927
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303928/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003929 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3930 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303931 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003932static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303933{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003934 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3935
3936 if (hba->max_pwr_info.is_valid)
3937 return 0;
3938
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003939 pwr_info->pwr_tx = FAST_MODE;
3940 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003941 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303942
3943 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003944 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3945 &pwr_info->lane_rx);
3946 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3947 &pwr_info->lane_tx);
3948
3949 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
3950 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
3951 __func__,
3952 pwr_info->lane_rx,
3953 pwr_info->lane_tx);
3954 return -EINVAL;
3955 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303956
3957 /*
3958 * First, get the maximum gears of HS speed.
3959 * If a zero value, it means there is no HSGEAR capability.
3960 * Then, get the maximum gears of PWM speed.
3961 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003962 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
3963 if (!pwr_info->gear_rx) {
3964 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3965 &pwr_info->gear_rx);
3966 if (!pwr_info->gear_rx) {
3967 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
3968 __func__, pwr_info->gear_rx);
3969 return -EINVAL;
3970 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003971 pwr_info->pwr_rx = SLOW_MODE;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303972 }
3973
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003974 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
3975 &pwr_info->gear_tx);
3976 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303977 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003978 &pwr_info->gear_tx);
3979 if (!pwr_info->gear_tx) {
3980 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
3981 __func__, pwr_info->gear_tx);
3982 return -EINVAL;
3983 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003984 pwr_info->pwr_tx = SLOW_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003985 }
3986
3987 hba->max_pwr_info.is_valid = true;
3988 return 0;
3989}
3990
3991static int ufshcd_change_power_mode(struct ufs_hba *hba,
3992 struct ufs_pa_layer_attr *pwr_mode)
3993{
3994 int ret;
3995
3996 /* if already configured to the requested pwr_mode */
3997 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
3998 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
3999 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4000 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4001 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4002 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4003 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4004 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4005 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304006 }
4007
4008 /*
4009 * Configure attributes for power mode change with below.
4010 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4011 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4012 * - PA_HSSERIES
4013 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004014 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4015 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4016 pwr_mode->lane_rx);
4017 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4018 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304019 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004020 else
4021 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304022
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004023 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4024 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4025 pwr_mode->lane_tx);
4026 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4027 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304028 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004029 else
4030 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304031
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004032 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4033 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4034 pwr_mode->pwr_rx == FAST_MODE ||
4035 pwr_mode->pwr_tx == FAST_MODE)
4036 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4037 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304038
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004039 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4040 | pwr_mode->pwr_tx);
4041
4042 if (ret) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304043 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004044 "%s: power mode change failed %d\n", __func__, ret);
4045 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004046 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4047 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004048
4049 memcpy(&hba->pwr_info, pwr_mode,
4050 sizeof(struct ufs_pa_layer_attr));
4051 }
4052
4053 return ret;
4054}
4055
4056/**
4057 * ufshcd_config_pwr_mode - configure a new power mode
4058 * @hba: per-adapter instance
4059 * @desired_pwr_mode: desired power configuration
4060 */
Alim Akhtar0d846e72018-05-06 15:44:18 +05304061int ufshcd_config_pwr_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004062 struct ufs_pa_layer_attr *desired_pwr_mode)
4063{
4064 struct ufs_pa_layer_attr final_params = { 0 };
4065 int ret;
4066
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004067 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4068 desired_pwr_mode, &final_params);
4069
4070 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004071 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4072
4073 ret = ufshcd_change_power_mode(hba, &final_params);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08004074 if (!ret)
4075 ufshcd_print_pwr_info(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304076
4077 return ret;
4078}
Alim Akhtar0d846e72018-05-06 15:44:18 +05304079EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304080
4081/**
Dolev Raviv68078d52013-07-30 00:35:58 +05304082 * ufshcd_complete_dev_init() - checks device readiness
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004083 * @hba: per-adapter instance
Dolev Raviv68078d52013-07-30 00:35:58 +05304084 *
4085 * Set fDeviceInit flag and poll until device toggles it.
4086 */
4087static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4088{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004089 int i;
4090 int err;
Dolev Raviv68078d52013-07-30 00:35:58 +05304091 bool flag_res = 1;
4092
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004093 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4094 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05304095 if (err) {
4096 dev_err(hba->dev,
4097 "%s setting fDeviceInit flag failed with error %d\n",
4098 __func__, err);
4099 goto out;
4100 }
4101
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004102 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4103 for (i = 0; i < 1000 && !err && flag_res; i++)
4104 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4105 QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4106
Dolev Raviv68078d52013-07-30 00:35:58 +05304107 if (err)
4108 dev_err(hba->dev,
4109 "%s reading fDeviceInit flag failed with error %d\n",
4110 __func__, err);
4111 else if (flag_res)
4112 dev_err(hba->dev,
4113 "%s fDeviceInit was not cleared by the device\n",
4114 __func__);
4115
4116out:
4117 return err;
4118}
4119
4120/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304121 * ufshcd_make_hba_operational - Make UFS controller operational
4122 * @hba: per adapter instance
4123 *
4124 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004125 * 1. Enable required interrupts
4126 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004127 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004128 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304129 *
4130 * Returns 0 on success, non-zero value on failure
4131 */
4132static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4133{
4134 int err = 0;
4135 u32 reg;
4136
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304137 /* Enable required interrupts */
4138 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4139
4140 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004141 if (ufshcd_is_intr_aggr_allowed(hba))
4142 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4143 else
4144 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304145
4146 /* Configure UTRL and UTMRL base address registers */
4147 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4148 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4149 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4150 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4151 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4152 REG_UTP_TASK_REQ_LIST_BASE_L);
4153 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4154 REG_UTP_TASK_REQ_LIST_BASE_H);
4155
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304156 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004157 * Make sure base address and interrupt setup are updated before
4158 * enabling the run/stop registers below.
4159 */
4160 wmb();
4161
4162 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304163 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304164 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004165 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304166 if (!(ufshcd_get_lists_status(reg))) {
4167 ufshcd_enable_run_stop_reg(hba);
4168 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304169 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304170 "Host controller not ready to process requests");
4171 err = -EIO;
4172 goto out;
4173 }
4174
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304175out:
4176 return err;
4177}
4178
4179/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02004180 * ufshcd_hba_stop - Send controller to reset state
4181 * @hba: per adapter instance
4182 * @can_sleep: perform sleep or just spin
4183 */
4184static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4185{
4186 int err;
4187
4188 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4189 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4190 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4191 10, 1, can_sleep);
4192 if (err)
4193 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4194}
4195
4196/**
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304197 * ufshcd_hba_execute_hce - initialize the controller
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304198 * @hba: per adapter instance
4199 *
4200 * The controller resets itself and controller firmware initialization
4201 * sequence kicks off. When controller is ready it will set
4202 * the Host Controller Enable bit to 1.
4203 *
4204 * Returns 0 on success, non-zero value on failure
4205 */
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304206static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304207{
4208 int retry;
4209
4210 /*
4211 * msleep of 1 and 5 used in this function might result in msleep(20),
4212 * but it was necessary to send the UFS FPGA to reset mode during
4213 * development and testing of this driver. msleep can be changed to
4214 * mdelay and retry count can be reduced based on the controller.
4215 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004216 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304217 /* change controller state to "reset state" */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004218 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304219
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004220 /* UniPro link is disabled at this point */
4221 ufshcd_set_link_off(hba);
4222
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004223 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004224
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304225 /* start controller initialization sequence */
4226 ufshcd_hba_start(hba);
4227
4228 /*
4229 * To initialize a UFS host controller HCE bit must be set to 1.
4230 * During initialization the HCE bit value changes from 1->0->1.
4231 * When the host controller completes initialization sequence
4232 * it sets the value of HCE bit to 1. The same HCE bit is read back
4233 * to check if the controller has completed initialization sequence.
4234 * So without this delay the value HCE = 1, set in the previous
4235 * instruction might be read back.
4236 * This delay can be changed based on the controller.
4237 */
4238 msleep(1);
4239
4240 /* wait for the host controller to complete initialization */
4241 retry = 10;
4242 while (ufshcd_is_hba_active(hba)) {
4243 if (retry) {
4244 retry--;
4245 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304246 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304247 "Controller enable failed\n");
4248 return -EIO;
4249 }
4250 msleep(5);
4251 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004252
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004253 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004254 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004255
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004256 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004257
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304258 return 0;
4259}
4260
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304261static int ufshcd_hba_enable(struct ufs_hba *hba)
4262{
4263 int ret;
4264
4265 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4266 ufshcd_set_link_off(hba);
4267 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4268
4269 /* enable UIC related interrupts */
4270 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4271 ret = ufshcd_dme_reset(hba);
4272 if (!ret) {
4273 ret = ufshcd_dme_enable(hba);
4274 if (!ret)
4275 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4276 if (ret)
4277 dev_err(hba->dev,
4278 "Host controller enable failed with non-hce\n");
4279 }
4280 } else {
4281 ret = ufshcd_hba_execute_hce(hba);
4282 }
4283
4284 return ret;
4285}
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004286static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4287{
4288 int tx_lanes, i, err = 0;
4289
4290 if (!peer)
4291 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4292 &tx_lanes);
4293 else
4294 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4295 &tx_lanes);
4296 for (i = 0; i < tx_lanes; i++) {
4297 if (!peer)
4298 err = ufshcd_dme_set(hba,
4299 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4300 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4301 0);
4302 else
4303 err = ufshcd_dme_peer_set(hba,
4304 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4305 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4306 0);
4307 if (err) {
4308 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4309 __func__, peer, i, err);
4310 break;
4311 }
4312 }
4313
4314 return err;
4315}
4316
4317static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4318{
4319 return ufshcd_disable_tx_lcc(hba, true);
4320}
4321
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304322/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304323 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304324 * @hba: per adapter instance
4325 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304326 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304327 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304328static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304329{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304330 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004331 int retries = DME_LINKSTARTUP_RETRIES;
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004332 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304333
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004334 /*
4335 * If UFS device isn't active then we will have to issue link startup
4336 * 2 times to make sure the device state move to active.
4337 */
4338 if (!ufshcd_is_ufs_dev_active(hba))
4339 link_startup_again = true;
4340
4341link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004342 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004343 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304344
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004345 ret = ufshcd_dme_link_startup(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004346
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004347 /* check if device is detected by inter-connect layer */
4348 if (!ret && !ufshcd_is_device_present(hba)) {
4349 dev_err(hba->dev, "%s: Device not present\n", __func__);
4350 ret = -ENXIO;
4351 goto out;
4352 }
4353
4354 /*
4355 * DME link lost indication is only received when link is up,
4356 * but we can't be sure if the link is up until link startup
4357 * succeeds. So reset the local Uni-Pro and try again.
4358 */
4359 if (ret && ufshcd_hba_enable(hba))
4360 goto out;
4361 } while (ret && retries--);
4362
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304363 if (ret)
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004364 /* failed to get the link up... retire */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304365 goto out;
4366
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004367 if (link_startup_again) {
4368 link_startup_again = false;
4369 retries = DME_LINKSTARTUP_RETRIES;
4370 goto link_startup;
4371 }
4372
subhashj@codeaurora.orgd2aebb92016-12-22 18:41:33 -08004373 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4374 ufshcd_init_pwr_info(hba);
4375 ufshcd_print_pwr_info(hba);
4376
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004377 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4378 ret = ufshcd_disable_device_tx_lcc(hba);
4379 if (ret)
4380 goto out;
4381 }
4382
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004383 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004384 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4385 if (ret)
4386 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004387
4388 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304389out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004390 if (ret) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304391 dev_err(hba->dev, "link startup failed %d\n", ret);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004392 ufshcd_print_host_state(hba);
4393 ufshcd_print_pwr_info(hba);
4394 ufshcd_print_host_regs(hba);
4395 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304396 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304397}
4398
4399/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304400 * ufshcd_verify_dev_init() - Verify device initialization
4401 * @hba: per-adapter instance
4402 *
4403 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4404 * device Transport Protocol (UTP) layer is ready after a reset.
4405 * If the UTP layer at the device side is not initialized, it may
4406 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4407 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4408 */
4409static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4410{
4411 int err = 0;
4412 int retries;
4413
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004414 ufshcd_hold(hba, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304415 mutex_lock(&hba->dev_cmd.lock);
4416 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4417 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4418 NOP_OUT_TIMEOUT);
4419
4420 if (!err || err == -ETIMEDOUT)
4421 break;
4422
4423 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4424 }
4425 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004426 ufshcd_release(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304427
4428 if (err)
4429 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4430 return err;
4431}
4432
4433/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004434 * ufshcd_set_queue_depth - set lun queue depth
4435 * @sdev: pointer to SCSI device
4436 *
4437 * Read bLUQueueDepth value and activate scsi tagged command
4438 * queueing. For WLUN, queue depth is set to 1. For best-effort
4439 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4440 * value that host can queue.
4441 */
4442static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4443{
4444 int ret = 0;
4445 u8 lun_qdepth;
4446 struct ufs_hba *hba;
4447
4448 hba = shost_priv(sdev->host);
4449
4450 lun_qdepth = hba->nutrs;
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02004451 ret = ufshcd_read_unit_desc_param(hba,
4452 ufshcd_scsi_to_upiu_lun(sdev->lun),
4453 UNIT_DESC_PARAM_LU_Q_DEPTH,
4454 &lun_qdepth,
4455 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004456
4457 /* Some WLUN doesn't support unit descriptor */
4458 if (ret == -EOPNOTSUPP)
4459 lun_qdepth = 1;
4460 else if (!lun_qdepth)
4461 /* eventually, we can figure out the real queue depth */
4462 lun_qdepth = hba->nutrs;
4463 else
4464 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4465
4466 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4467 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004468 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004469}
4470
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004471/*
4472 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4473 * @hba: per-adapter instance
4474 * @lun: UFS device lun id
4475 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4476 *
4477 * Returns 0 in case of success and b_lu_write_protect status would be returned
4478 * @b_lu_write_protect parameter.
4479 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4480 * Returns -EINVAL in case of invalid parameters passed to this function.
4481 */
4482static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4483 u8 lun,
4484 u8 *b_lu_write_protect)
4485{
4486 int ret;
4487
4488 if (!b_lu_write_protect)
4489 ret = -EINVAL;
4490 /*
4491 * According to UFS device spec, RPMB LU can't be write
4492 * protected so skip reading bLUWriteProtect parameter for
4493 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4494 */
4495 else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4496 ret = -ENOTSUPP;
4497 else
4498 ret = ufshcd_read_unit_desc_param(hba,
4499 lun,
4500 UNIT_DESC_PARAM_LU_WR_PROTECT,
4501 b_lu_write_protect,
4502 sizeof(*b_lu_write_protect));
4503 return ret;
4504}
4505
4506/**
4507 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4508 * status
4509 * @hba: per-adapter instance
4510 * @sdev: pointer to SCSI device
4511 *
4512 */
4513static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4514 struct scsi_device *sdev)
4515{
4516 if (hba->dev_info.f_power_on_wp_en &&
4517 !hba->dev_info.is_lu_power_on_wp) {
4518 u8 b_lu_write_protect;
4519
4520 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4521 &b_lu_write_protect) &&
4522 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4523 hba->dev_info.is_lu_power_on_wp = true;
4524 }
4525}
4526
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004527/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304528 * ufshcd_slave_alloc - handle initial SCSI device configurations
4529 * @sdev: pointer to SCSI device
4530 *
4531 * Returns success
4532 */
4533static int ufshcd_slave_alloc(struct scsi_device *sdev)
4534{
4535 struct ufs_hba *hba;
4536
4537 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304538
4539 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4540 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304541
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304542 /* allow SCSI layer to restart the device in case of errors */
4543 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004544
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004545 /* REPORT SUPPORTED OPERATION CODES is not supported */
4546 sdev->no_report_opcodes = 1;
4547
Sujit Reddy Thumma84af7e82018-01-24 09:52:35 +05304548 /* WRITE_SAME command is not supported */
4549 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004550
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004551 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004552
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004553 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4554
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004555 return 0;
4556}
4557
4558/**
4559 * ufshcd_change_queue_depth - change queue depth
4560 * @sdev: pointer to SCSI device
4561 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004562 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004563 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004564 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004565static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004566{
4567 struct ufs_hba *hba = shost_priv(sdev->host);
4568
4569 if (depth > hba->nutrs)
4570 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004571 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304572}
4573
4574/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004575 * ufshcd_slave_configure - adjust SCSI device configurations
4576 * @sdev: pointer to SCSI device
4577 */
4578static int ufshcd_slave_configure(struct scsi_device *sdev)
4579{
4580 struct request_queue *q = sdev->request_queue;
4581
4582 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
4583 blk_queue_max_segment_size(q, PRDT_DATA_BYTE_COUNT_MAX);
4584
4585 return 0;
4586}
4587
4588/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304589 * ufshcd_slave_destroy - remove SCSI device configurations
4590 * @sdev: pointer to SCSI device
4591 */
4592static void ufshcd_slave_destroy(struct scsi_device *sdev)
4593{
4594 struct ufs_hba *hba;
4595
4596 hba = shost_priv(sdev->host);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004597 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004598 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4599 unsigned long flags;
4600
4601 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004602 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004603 spin_unlock_irqrestore(hba->host->host_lock, flags);
4604 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304605}
4606
4607/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304608 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004609 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304610 * @scsi_status: SCSI command status
4611 *
4612 * Returns value base on SCSI command status
4613 */
4614static inline int
4615ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4616{
4617 int result = 0;
4618
4619 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304620 case SAM_STAT_CHECK_CONDITION:
4621 ufshcd_copy_sense_data(lrbp);
Tomas Winkler30eb2e42018-11-26 10:10:34 +02004622 /* fallthrough */
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304623 case SAM_STAT_GOOD:
4624 result |= DID_OK << 16 |
4625 COMMAND_COMPLETE << 8 |
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304626 scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304627 break;
4628 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304629 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304630 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304631 ufshcd_copy_sense_data(lrbp);
4632 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304633 break;
4634 default:
4635 result |= DID_ERROR << 16;
4636 break;
4637 } /* end of switch */
4638
4639 return result;
4640}
4641
4642/**
4643 * ufshcd_transfer_rsp_status - Get overall status of the response
4644 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004645 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304646 *
4647 * Returns result of the command to notify SCSI midlayer
4648 */
4649static inline int
4650ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4651{
4652 int result = 0;
4653 int scsi_status;
4654 int ocs;
4655
4656 /* overall command status of utrd */
4657 ocs = ufshcd_get_tr_ocs(lrbp);
4658
4659 switch (ocs) {
4660 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304661 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004662 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304663 switch (result) {
4664 case UPIU_TRANSACTION_RESPONSE:
4665 /*
4666 * get the response UPIU result to extract
4667 * the SCSI command status
4668 */
4669 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4670
4671 /*
4672 * get the result based on SCSI status response
4673 * to notify the SCSI midlayer of the command status
4674 */
4675 scsi_status = result & MASK_SCSI_STATUS;
4676 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304677
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02004678 /*
4679 * Currently we are only supporting BKOPs exception
4680 * events hence we can ignore BKOPs exception event
4681 * during power management callbacks. BKOPs exception
4682 * event is not expected to be raised in runtime suspend
4683 * callback as it allows the urgent bkops.
4684 * During system suspend, we are anyway forcefully
4685 * disabling the bkops and if urgent bkops is needed
4686 * it will be enabled on system resume. Long term
4687 * solution could be to abort the system suspend if
4688 * UFS device needs urgent BKOPs.
4689 */
4690 if (!hba->pm_op_in_progress &&
4691 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304692 schedule_work(&hba->eeh_work);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304693 break;
4694 case UPIU_TRANSACTION_REJECT_UPIU:
4695 /* TODO: handle Reject UPIU Response */
4696 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304697 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304698 "Reject UPIU not fully implemented\n");
4699 break;
4700 default:
4701 result = DID_ERROR << 16;
4702 dev_err(hba->dev,
4703 "Unexpected request response code = %x\n",
4704 result);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304705 break;
4706 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304707 break;
4708 case OCS_ABORTED:
4709 result |= DID_ABORT << 16;
4710 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304711 case OCS_INVALID_COMMAND_STATUS:
4712 result |= DID_REQUEUE << 16;
4713 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304714 case OCS_INVALID_CMD_TABLE_ATTR:
4715 case OCS_INVALID_PRDT_ATTR:
4716 case OCS_MISMATCH_DATA_BUF_SIZE:
4717 case OCS_MISMATCH_RESP_UPIU_SIZE:
4718 case OCS_PEER_COMM_FAILURE:
4719 case OCS_FATAL_ERROR:
4720 default:
4721 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304722 dev_err(hba->dev,
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004723 "OCS error from controller = %x for tag %d\n",
4724 ocs, lrbp->task_tag);
4725 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08004726 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304727 break;
4728 } /* end of switch */
4729
Dolev Raviv66cc8202016-12-22 18:39:42 -08004730 if (host_byte(result) != DID_OK)
4731 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304732 return result;
4733}
4734
4735/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304736 * ufshcd_uic_cmd_compl - handle completion of uic command
4737 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304738 * @intr_status: interrupt status generated by the controller
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304739 */
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304740static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304741{
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304742 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304743 hba->active_uic_cmd->argument2 |=
4744 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304745 hba->active_uic_cmd->argument3 =
4746 ufshcd_get_dme_attr_val(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304747 complete(&hba->active_uic_cmd->done);
4748 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304749
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004750 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done)
4751 complete(hba->uic_async_done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304752}
4753
4754/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004755 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304756 * @hba: per adapter instance
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004757 * @completed_reqs: requests to complete
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304758 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004759static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4760 unsigned long completed_reqs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304761{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304762 struct ufshcd_lrb *lrbp;
4763 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304764 int result;
4765 int index;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004766
Dolev Ravive9d501b2014-07-01 12:22:37 +03004767 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4768 lrbp = &hba->lrb[index];
4769 cmd = lrbp->cmd;
4770 if (cmd) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004771 ufshcd_add_command_trace(hba, index, "complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004772 result = ufshcd_transfer_rsp_status(hba, lrbp);
4773 scsi_dma_unmap(cmd);
4774 cmd->result = result;
4775 /* Mark completed command as NULL in LRB */
4776 lrbp->cmd = NULL;
4777 clear_bit_unlock(index, &hba->lrb_in_use);
4778 /* Do not touch lrbp after scsi done */
4779 cmd->scsi_done(cmd);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004780 __ufshcd_release(hba);
Joao Pinto300bb132016-05-11 12:21:27 +01004781 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4782 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004783 if (hba->dev_cmd.complete) {
4784 ufshcd_add_command_trace(hba, index,
4785 "dev_complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004786 complete(hba->dev_cmd.complete);
Lee Susman1a07f2d2016-12-22 18:42:03 -08004787 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03004788 }
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08004789 if (ufshcd_is_clkscaling_supported(hba))
4790 hba->clk_scaling.active_reqs--;
Zang Leigang09017182017-09-27 10:06:06 +08004791
4792 lrbp->compl_time_stamp = ktime_get();
Dolev Ravive9d501b2014-07-01 12:22:37 +03004793 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304794
4795 /* clear corresponding bits of completed commands */
4796 hba->outstanding_reqs ^= completed_reqs;
4797
Sahitya Tummala856b3482014-09-25 15:32:34 +03004798 ufshcd_clk_scaling_update_busy(hba);
4799
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304800 /* we might have free'd some tags above */
4801 wake_up(&hba->dev_cmd.tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304802}
4803
4804/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004805 * ufshcd_transfer_req_compl - handle SCSI and query command completion
4806 * @hba: per adapter instance
4807 */
4808static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
4809{
4810 unsigned long completed_reqs;
4811 u32 tr_doorbell;
4812
4813 /* Resetting interrupt aggregation counters first and reading the
4814 * DOOR_BELL afterward allows us to handle all the completed requests.
4815 * In order to prevent other interrupts starvation the DB is read once
4816 * after reset. The down side of this solution is the possibility of
4817 * false interrupt if device completes another request after resetting
4818 * aggregation and before reading the DB.
4819 */
Alim Akhtar5ac6abc2018-05-06 15:44:16 +05304820 if (ufshcd_is_intr_aggr_allowed(hba) &&
4821 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004822 ufshcd_reset_intr_aggr(hba);
4823
4824 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4825 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4826
4827 __ufshcd_transfer_req_compl(hba, completed_reqs);
4828}
4829
4830/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304831 * ufshcd_disable_ee - disable exception event
4832 * @hba: per-adapter instance
4833 * @mask: exception event to disable
4834 *
4835 * Disables exception event in the device so that the EVENT_ALERT
4836 * bit is not set.
4837 *
4838 * Returns zero on success, non-zero error value on failure.
4839 */
4840static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4841{
4842 int err = 0;
4843 u32 val;
4844
4845 if (!(hba->ee_ctrl_mask & mask))
4846 goto out;
4847
4848 val = hba->ee_ctrl_mask & ~mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004849 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004850 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304851 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4852 if (!err)
4853 hba->ee_ctrl_mask &= ~mask;
4854out:
4855 return err;
4856}
4857
4858/**
4859 * ufshcd_enable_ee - enable exception event
4860 * @hba: per-adapter instance
4861 * @mask: exception event to enable
4862 *
4863 * Enable corresponding exception event in the device to allow
4864 * device to alert host in critical scenarios.
4865 *
4866 * Returns zero on success, non-zero error value on failure.
4867 */
4868static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4869{
4870 int err = 0;
4871 u32 val;
4872
4873 if (hba->ee_ctrl_mask & mask)
4874 goto out;
4875
4876 val = hba->ee_ctrl_mask | mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004877 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004878 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304879 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4880 if (!err)
4881 hba->ee_ctrl_mask |= mask;
4882out:
4883 return err;
4884}
4885
4886/**
4887 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4888 * @hba: per-adapter instance
4889 *
4890 * Allow device to manage background operations on its own. Enabling
4891 * this might lead to inconsistent latencies during normal data transfers
4892 * as the device is allowed to manage its own way of handling background
4893 * operations.
4894 *
4895 * Returns zero on success, non-zero on failure.
4896 */
4897static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4898{
4899 int err = 0;
4900
4901 if (hba->auto_bkops_enabled)
4902 goto out;
4903
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004904 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304905 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4906 if (err) {
4907 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4908 __func__, err);
4909 goto out;
4910 }
4911
4912 hba->auto_bkops_enabled = true;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08004913 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304914
4915 /* No need of URGENT_BKOPS exception from the device */
4916 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4917 if (err)
4918 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
4919 __func__, err);
4920out:
4921 return err;
4922}
4923
4924/**
4925 * ufshcd_disable_auto_bkops - block device in doing background operations
4926 * @hba: per-adapter instance
4927 *
4928 * Disabling background operations improves command response latency but
4929 * has drawback of device moving into critical state where the device is
4930 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
4931 * host is idle so that BKOPS are managed effectively without any negative
4932 * impacts.
4933 *
4934 * Returns zero on success, non-zero on failure.
4935 */
4936static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
4937{
4938 int err = 0;
4939
4940 if (!hba->auto_bkops_enabled)
4941 goto out;
4942
4943 /*
4944 * If host assisted BKOPs is to be enabled, make sure
4945 * urgent bkops exception is allowed.
4946 */
4947 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
4948 if (err) {
4949 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
4950 __func__, err);
4951 goto out;
4952 }
4953
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004954 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304955 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4956 if (err) {
4957 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
4958 __func__, err);
4959 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4960 goto out;
4961 }
4962
4963 hba->auto_bkops_enabled = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08004964 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304965out:
4966 return err;
4967}
4968
4969/**
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004970 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304971 * @hba: per adapter instance
4972 *
4973 * After a device reset the device may toggle the BKOPS_EN flag
4974 * to default value. The s/w tracking variables should be updated
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004975 * as well. This function would change the auto-bkops state based on
4976 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304977 */
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004978static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304979{
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004980 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
4981 hba->auto_bkops_enabled = false;
4982 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
4983 ufshcd_enable_auto_bkops(hba);
4984 } else {
4985 hba->auto_bkops_enabled = true;
4986 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
4987 ufshcd_disable_auto_bkops(hba);
4988 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304989}
4990
4991static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
4992{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004993 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304994 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
4995}
4996
4997/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004998 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
4999 * @hba: per-adapter instance
5000 * @status: bkops_status value
5001 *
5002 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5003 * flag in the device to permit background operations if the device
5004 * bkops_status is greater than or equal to "status" argument passed to
5005 * this function, disable otherwise.
5006 *
5007 * Returns 0 for success, non-zero in case of failure.
5008 *
5009 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5010 * to know whether auto bkops is enabled or disabled after this function
5011 * returns control to it.
5012 */
5013static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5014 enum bkops_status status)
5015{
5016 int err;
5017 u32 curr_status = 0;
5018
5019 err = ufshcd_get_bkops_status(hba, &curr_status);
5020 if (err) {
5021 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5022 __func__, err);
5023 goto out;
5024 } else if (curr_status > BKOPS_STATUS_MAX) {
5025 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5026 __func__, curr_status);
5027 err = -EINVAL;
5028 goto out;
5029 }
5030
5031 if (curr_status >= status)
5032 err = ufshcd_enable_auto_bkops(hba);
5033 else
5034 err = ufshcd_disable_auto_bkops(hba);
5035out:
5036 return err;
5037}
5038
5039/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305040 * ufshcd_urgent_bkops - handle urgent bkops exception event
5041 * @hba: per-adapter instance
5042 *
5043 * Enable fBackgroundOpsEn flag in the device to permit background
5044 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005045 *
5046 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5047 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305048 */
5049static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5050{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005051 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305052}
5053
5054static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5055{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005056 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305057 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5058}
5059
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005060static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5061{
5062 int err;
5063 u32 curr_status = 0;
5064
5065 if (hba->is_urgent_bkops_lvl_checked)
5066 goto enable_auto_bkops;
5067
5068 err = ufshcd_get_bkops_status(hba, &curr_status);
5069 if (err) {
5070 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5071 __func__, err);
5072 goto out;
5073 }
5074
5075 /*
5076 * We are seeing that some devices are raising the urgent bkops
5077 * exception events even when BKOPS status doesn't indicate performace
5078 * impacted or critical. Handle these device by determining their urgent
5079 * bkops status at runtime.
5080 */
5081 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5082 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5083 __func__, curr_status);
5084 /* update the current status as the urgent bkops level */
5085 hba->urgent_bkops_lvl = curr_status;
5086 hba->is_urgent_bkops_lvl_checked = true;
5087 }
5088
5089enable_auto_bkops:
5090 err = ufshcd_enable_auto_bkops(hba);
5091out:
5092 if (err < 0)
5093 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5094 __func__, err);
5095}
5096
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305097/**
5098 * ufshcd_exception_event_handler - handle exceptions raised by device
5099 * @work: pointer to work data
5100 *
5101 * Read bExceptionEventStatus attribute from the device and handle the
5102 * exception event accordingly.
5103 */
5104static void ufshcd_exception_event_handler(struct work_struct *work)
5105{
5106 struct ufs_hba *hba;
5107 int err;
5108 u32 status = 0;
5109 hba = container_of(work, struct ufs_hba, eeh_work);
5110
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305111 pm_runtime_get_sync(hba->dev);
Maya Erez2e3611e92018-05-03 16:37:16 +05305112 scsi_block_requests(hba->host);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305113 err = ufshcd_get_ee_status(hba, &status);
5114 if (err) {
5115 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5116 __func__, err);
5117 goto out;
5118 }
5119
5120 status &= hba->ee_ctrl_mask;
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005121
5122 if (status & MASK_EE_URGENT_BKOPS)
5123 ufshcd_bkops_exception_event_handler(hba);
5124
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305125out:
Maya Erez2e3611e92018-05-03 16:37:16 +05305126 scsi_unblock_requests(hba->host);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305127 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305128 return;
5129}
5130
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005131/* Complete requests that have door-bell cleared */
5132static void ufshcd_complete_requests(struct ufs_hba *hba)
5133{
5134 ufshcd_transfer_req_compl(hba);
5135 ufshcd_tmc_handler(hba);
5136}
5137
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305138/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02005139 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5140 * to recover from the DL NAC errors or not.
5141 * @hba: per-adapter instance
5142 *
5143 * Returns true if error handling is required, false otherwise
5144 */
5145static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5146{
5147 unsigned long flags;
5148 bool err_handling = true;
5149
5150 spin_lock_irqsave(hba->host->host_lock, flags);
5151 /*
5152 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5153 * device fatal error and/or DL NAC & REPLAY timeout errors.
5154 */
5155 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5156 goto out;
5157
5158 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5159 ((hba->saved_err & UIC_ERROR) &&
5160 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5161 goto out;
5162
5163 if ((hba->saved_err & UIC_ERROR) &&
5164 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5165 int err;
5166 /*
5167 * wait for 50ms to see if we can get any other errors or not.
5168 */
5169 spin_unlock_irqrestore(hba->host->host_lock, flags);
5170 msleep(50);
5171 spin_lock_irqsave(hba->host->host_lock, flags);
5172
5173 /*
5174 * now check if we have got any other severe errors other than
5175 * DL NAC error?
5176 */
5177 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5178 ((hba->saved_err & UIC_ERROR) &&
5179 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5180 goto out;
5181
5182 /*
5183 * As DL NAC is the only error received so far, send out NOP
5184 * command to confirm if link is still active or not.
5185 * - If we don't get any response then do error recovery.
5186 * - If we get response then clear the DL NAC error bit.
5187 */
5188
5189 spin_unlock_irqrestore(hba->host->host_lock, flags);
5190 err = ufshcd_verify_dev_init(hba);
5191 spin_lock_irqsave(hba->host->host_lock, flags);
5192
5193 if (err)
5194 goto out;
5195
5196 /* Link seems to be alive hence ignore the DL NAC errors */
5197 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5198 hba->saved_err &= ~UIC_ERROR;
5199 /* clear NAC error */
5200 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5201 if (!hba->saved_uic_err) {
5202 err_handling = false;
5203 goto out;
5204 }
5205 }
5206out:
5207 spin_unlock_irqrestore(hba->host->host_lock, flags);
5208 return err_handling;
5209}
5210
5211/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305212 * ufshcd_err_handler - handle UFS errors that require s/w attention
5213 * @work: pointer to work structure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305214 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305215static void ufshcd_err_handler(struct work_struct *work)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305216{
5217 struct ufs_hba *hba;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305218 unsigned long flags;
5219 u32 err_xfer = 0;
5220 u32 err_tm = 0;
5221 int err = 0;
5222 int tag;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005223 bool needs_reset = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305224
5225 hba = container_of(work, struct ufs_hba, eh_work);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305226
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305227 pm_runtime_get_sync(hba->dev);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005228 ufshcd_hold(hba, false);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305229
5230 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005231 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305232 goto out;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305233
5234 hba->ufshcd_state = UFSHCD_STATE_RESET;
5235 ufshcd_set_eh_in_progress(hba);
5236
5237 /* Complete requests that have door-bell cleared by h/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005238 ufshcd_complete_requests(hba);
Yaniv Gardi583fa622016-03-10 17:37:13 +02005239
5240 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5241 bool ret;
5242
5243 spin_unlock_irqrestore(hba->host->host_lock, flags);
5244 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5245 ret = ufshcd_quirk_dl_nac_errors(hba);
5246 spin_lock_irqsave(hba->host->host_lock, flags);
5247 if (!ret)
5248 goto skip_err_handling;
5249 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005250 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5251 ((hba->saved_err & UIC_ERROR) &&
5252 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5253 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5254 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5255 needs_reset = true;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305256
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005257 /*
5258 * if host reset is required then skip clearing the pending
5259 * transfers forcefully because they will automatically get
5260 * cleared after link startup.
5261 */
5262 if (needs_reset)
5263 goto skip_pending_xfer_clear;
5264
5265 /* release lock as clear command might sleep */
5266 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305267 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005268 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5269 if (ufshcd_clear_cmd(hba, tag)) {
5270 err_xfer = true;
5271 goto lock_skip_pending_xfer_clear;
5272 }
5273 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305274
5275 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005276 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5277 if (ufshcd_clear_tm_cmd(hba, tag)) {
5278 err_tm = true;
5279 goto lock_skip_pending_xfer_clear;
5280 }
5281 }
5282
5283lock_skip_pending_xfer_clear:
5284 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305285
5286 /* Complete the requests that are cleared by s/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005287 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305288
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005289 if (err_xfer || err_tm)
5290 needs_reset = true;
5291
5292skip_pending_xfer_clear:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305293 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005294 if (needs_reset) {
5295 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5296
5297 /*
5298 * ufshcd_reset_and_restore() does the link reinitialization
5299 * which will need atleast one empty doorbell slot to send the
5300 * device management commands (NOP and query commands).
5301 * If there is no slot empty at this moment then free up last
5302 * slot forcefully.
5303 */
5304 if (hba->outstanding_reqs == max_doorbells)
5305 __ufshcd_transfer_req_compl(hba,
5306 (1UL << (hba->nutrs - 1)));
5307
5308 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305309 err = ufshcd_reset_and_restore(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005310 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305311 if (err) {
5312 dev_err(hba->dev, "%s: reset and restore failed\n",
5313 __func__);
5314 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5315 }
5316 /*
5317 * Inform scsi mid-layer that we did reset and allow to handle
5318 * Unit Attention properly.
5319 */
5320 scsi_report_bus_reset(hba->host, 0);
5321 hba->saved_err = 0;
5322 hba->saved_uic_err = 0;
5323 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005324
Yaniv Gardi583fa622016-03-10 17:37:13 +02005325skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005326 if (!needs_reset) {
5327 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5328 if (hba->saved_err || hba->saved_uic_err)
5329 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5330 __func__, hba->saved_err, hba->saved_uic_err);
5331 }
5332
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305333 ufshcd_clear_eh_in_progress(hba);
5334
5335out:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005336 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani38135532018-05-03 16:37:18 +05305337 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005338 ufshcd_release(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305339 pm_runtime_put_sync(hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305340}
5341
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005342static void ufshcd_update_uic_reg_hist(struct ufs_uic_err_reg_hist *reg_hist,
5343 u32 reg)
5344{
5345 reg_hist->reg[reg_hist->pos] = reg;
5346 reg_hist->tstamp[reg_hist->pos] = ktime_get();
5347 reg_hist->pos = (reg_hist->pos + 1) % UIC_ERR_REG_HIST_LENGTH;
5348}
5349
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305350/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305351 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5352 * @hba: per-adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305353 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305354static void ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305355{
5356 u32 reg;
5357
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005358 /* PHY layer lane error */
5359 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5360 /* Ignore LINERESET indication, as this is not an error */
5361 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005362 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005363 /*
5364 * To know whether this error is fatal or not, DB timeout
5365 * must be checked but this error is handled separately.
5366 */
5367 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005368 ufshcd_update_uic_reg_hist(&hba->ufs_stats.pa_err, reg);
5369 }
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005370
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305371 /* PA_INIT_ERROR is fatal and needs UIC reset */
5372 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005373 if (reg)
5374 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dl_err, reg);
5375
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305376 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5377 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005378 else if (hba->dev_quirks &
5379 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5380 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5381 hba->uic_error |=
5382 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5383 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5384 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5385 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305386
5387 /* UIC NL/TL/DME errors needs software retry */
5388 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005389 if (reg) {
5390 ufshcd_update_uic_reg_hist(&hba->ufs_stats.nl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305391 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005392 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305393
5394 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005395 if (reg) {
5396 ufshcd_update_uic_reg_hist(&hba->ufs_stats.tl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305397 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005398 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305399
5400 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005401 if (reg) {
5402 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dme_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305403 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005404 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305405
5406 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5407 __func__, hba->uic_error);
5408}
5409
5410/**
5411 * ufshcd_check_errors - Check for errors that need s/w attention
5412 * @hba: per-adapter instance
5413 */
5414static void ufshcd_check_errors(struct ufs_hba *hba)
5415{
5416 bool queue_eh_work = false;
5417
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305418 if (hba->errors & INT_FATAL_ERRORS)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305419 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305420
5421 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305422 hba->uic_error = 0;
5423 ufshcd_update_uic_error(hba);
5424 if (hba->uic_error)
5425 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305426 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305427
5428 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005429 /*
5430 * update the transfer error masks to sticky bits, let's do this
5431 * irrespective of current ufshcd_state.
5432 */
5433 hba->saved_err |= hba->errors;
5434 hba->saved_uic_err |= hba->uic_error;
5435
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305436 /* handle fatal errors only when link is functional */
5437 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5438 /* block commands from scsi mid-layer */
Subhash Jadavani38135532018-05-03 16:37:18 +05305439 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305440
Zang Leigang141f8162016-11-16 11:29:37 +08005441 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
Dolev Raviv66cc8202016-12-22 18:39:42 -08005442
5443 /* dump controller state before resetting */
5444 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5445 bool pr_prdt = !!(hba->saved_err &
5446 SYSTEM_BUS_FATAL_ERROR);
5447
5448 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5449 __func__, hba->saved_err,
5450 hba->saved_uic_err);
5451
5452 ufshcd_print_host_regs(hba);
5453 ufshcd_print_pwr_info(hba);
5454 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5455 ufshcd_print_trs(hba, hba->outstanding_reqs,
5456 pr_prdt);
5457 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305458 schedule_work(&hba->eh_work);
5459 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305460 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305461 /*
5462 * if (!queue_eh_work) -
5463 * Other errors are either non-fatal where host recovers
5464 * itself without s/w intervention or errors that will be
5465 * handled by the SCSI core layer.
5466 */
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305467}
5468
5469/**
5470 * ufshcd_tmc_handler - handle task management function completion
5471 * @hba: per adapter instance
5472 */
5473static void ufshcd_tmc_handler(struct ufs_hba *hba)
5474{
5475 u32 tm_doorbell;
5476
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305477 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305478 hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305479 wake_up(&hba->tm_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305480}
5481
5482/**
5483 * ufshcd_sl_intr - Interrupt service routine
5484 * @hba: per adapter instance
5485 * @intr_status: contains interrupts generated by the controller
5486 */
5487static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
5488{
5489 hba->errors = UFSHCD_ERROR_MASK & intr_status;
5490 if (hba->errors)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305491 ufshcd_check_errors(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305492
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305493 if (intr_status & UFSHCD_UIC_MASK)
5494 ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305495
5496 if (intr_status & UTP_TASK_REQ_COMPL)
5497 ufshcd_tmc_handler(hba);
5498
5499 if (intr_status & UTP_TRANSFER_REQ_COMPL)
5500 ufshcd_transfer_req_compl(hba);
5501}
5502
5503/**
5504 * ufshcd_intr - Main interrupt service routine
5505 * @irq: irq number
5506 * @__hba: pointer to adapter instance
5507 *
5508 * Returns IRQ_HANDLED - If interrupt is valid
5509 * IRQ_NONE - If invalid interrupt
5510 */
5511static irqreturn_t ufshcd_intr(int irq, void *__hba)
5512{
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005513 u32 intr_status, enabled_intr_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305514 irqreturn_t retval = IRQ_NONE;
5515 struct ufs_hba *hba = __hba;
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305516 int retries = hba->nutrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305517
5518 spin_lock(hba->host->host_lock);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305519 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305520
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305521 /*
5522 * There could be max of hba->nutrs reqs in flight and in worst case
5523 * if the reqs get finished 1 by 1 after the interrupt status is
5524 * read, make sure we handle them by checking the interrupt status
5525 * again in a loop until we process all of the reqs before returning.
5526 */
5527 do {
5528 enabled_intr_status =
5529 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5530 if (intr_status)
5531 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
5532 if (enabled_intr_status) {
5533 ufshcd_sl_intr(hba, enabled_intr_status);
5534 retval = IRQ_HANDLED;
5535 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005536
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305537 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5538 } while (intr_status && --retries);
5539
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305540 spin_unlock(hba->host->host_lock);
5541 return retval;
5542}
5543
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305544static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5545{
5546 int err = 0;
5547 u32 mask = 1 << tag;
5548 unsigned long flags;
5549
5550 if (!test_bit(tag, &hba->outstanding_tasks))
5551 goto out;
5552
5553 spin_lock_irqsave(hba->host->host_lock, flags);
Alim Akhtar1399c5b2018-05-06 15:44:15 +05305554 ufshcd_utmrl_clear(hba, tag);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305555 spin_unlock_irqrestore(hba->host->host_lock, flags);
5556
5557 /* poll for max. 1 sec to clear door bell register by h/w */
5558 err = ufshcd_wait_for_register(hba,
5559 REG_UTP_TASK_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02005560 mask, 0, 1000, 1000, true);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305561out:
5562 return err;
5563}
5564
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005565static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
5566 struct utp_task_req_desc *treq, u8 tm_function)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305567{
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005568 struct Scsi_Host *host = hba->host;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305569 unsigned long flags;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005570 int free_slot, task_tag, err;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305571
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305572 /*
5573 * Get free slot, sleep if slots are unavailable.
5574 * Even though we use wait_event() which sleeps indefinitely,
5575 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5576 */
5577 wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005578 ufshcd_hold(hba, false);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305579
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305580 spin_lock_irqsave(host->host_lock, flags);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305581 task_tag = hba->nutrs + free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305582
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005583 treq->req_header.dword_0 |= cpu_to_be32(task_tag);
5584
5585 memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
Kiwoong Kimd2877be2016-11-10 21:16:15 +09005586 ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5587
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305588 /* send command to the controller */
5589 __set_bit(free_slot, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02005590
5591 /* Make sure descriptors are ready before ringing the task doorbell */
5592 wmb();
5593
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305594 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07005595 /* Make sure that doorbell is committed immediately */
5596 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305597
5598 spin_unlock_irqrestore(host->host_lock, flags);
5599
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005600 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");
5601
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305602 /* wait until the task management command is completed */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305603 err = wait_event_timeout(hba->tm_wq,
5604 test_bit(free_slot, &hba->tm_condition),
5605 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305606 if (!err) {
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005607 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305608 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5609 __func__, tm_function);
5610 if (ufshcd_clear_tm_cmd(hba, free_slot))
5611 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5612 __func__, free_slot);
5613 err = -ETIMEDOUT;
5614 } else {
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005615 err = 0;
5616 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));
5617
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005618 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005619
5620 spin_lock_irqsave(hba->host->host_lock, flags);
5621 __clear_bit(free_slot, &hba->outstanding_tasks);
5622 spin_unlock_irqrestore(hba->host->host_lock, flags);
5623
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305624 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305625
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305626 clear_bit(free_slot, &hba->tm_condition);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305627 ufshcd_put_tm_slot(hba, free_slot);
5628 wake_up(&hba->tm_tag_wq);
5629
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005630 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305631 return err;
5632}
5633
5634/**
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005635 * ufshcd_issue_tm_cmd - issues task management commands to controller
5636 * @hba: per adapter instance
5637 * @lun_id: LUN ID to which TM command is sent
5638 * @task_id: task ID to which the TM command is applicable
5639 * @tm_function: task management function opcode
5640 * @tm_response: task management service response return value
5641 *
5642 * Returns non-zero value on error, zero on success.
5643 */
5644static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5645 u8 tm_function, u8 *tm_response)
5646{
5647 struct utp_task_req_desc treq = { { 0 }, };
5648 int ocs_value, err;
5649
5650 /* Configure task request descriptor */
5651 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5652 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5653
5654 /* Configure task request UPIU */
5655 treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
5656 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
5657 treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);
5658
5659 /*
5660 * The host shall provide the same value for LUN field in the basic
5661 * header and for Input Parameter.
5662 */
5663 treq.input_param1 = cpu_to_be32(lun_id);
5664 treq.input_param2 = cpu_to_be32(task_id);
5665
5666 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
5667 if (err == -ETIMEDOUT)
5668 return err;
5669
5670 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5671 if (ocs_value != OCS_SUCCESS)
5672 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
5673 __func__, ocs_value);
5674 else if (tm_response)
5675 *tm_response = be32_to_cpu(treq.output_param1) &
5676 MASK_TM_SERVICE_RESP;
5677 return err;
5678}
5679
5680/**
Avri Altman5e0a86e2018-10-07 17:30:37 +03005681 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
5682 * @hba: per-adapter instance
5683 * @req_upiu: upiu request
5684 * @rsp_upiu: upiu reply
5685 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
5686 * @desc_buff: pointer to descriptor buffer, NULL if NA
5687 * @buff_len: descriptor size, 0 if NA
5688 * @desc_op: descriptor operation
5689 *
5690 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
5691 * Therefore, it "rides" the device management infrastructure: uses its tag and
5692 * tasks work queues.
5693 *
5694 * Since there is only one available tag for device management commands,
5695 * the caller is expected to hold the hba->dev_cmd.lock mutex.
5696 */
5697static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
5698 struct utp_upiu_req *req_upiu,
5699 struct utp_upiu_req *rsp_upiu,
5700 u8 *desc_buff, int *buff_len,
5701 int cmd_type,
5702 enum query_opcode desc_op)
5703{
5704 struct ufshcd_lrb *lrbp;
5705 int err = 0;
5706 int tag;
5707 struct completion wait;
5708 unsigned long flags;
5709 u32 upiu_flags;
5710
5711 down_read(&hba->clk_scaling_lock);
5712
5713 wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
5714
5715 init_completion(&wait);
5716 lrbp = &hba->lrb[tag];
5717 WARN_ON(lrbp->cmd);
5718
5719 lrbp->cmd = NULL;
5720 lrbp->sense_bufflen = 0;
5721 lrbp->sense_buffer = NULL;
5722 lrbp->task_tag = tag;
5723 lrbp->lun = 0;
5724 lrbp->intr_cmd = true;
5725 hba->dev_cmd.type = cmd_type;
5726
5727 switch (hba->ufs_version) {
5728 case UFSHCI_VERSION_10:
5729 case UFSHCI_VERSION_11:
5730 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
5731 break;
5732 default:
5733 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
5734 break;
5735 }
5736
5737 /* update the task tag in the request upiu */
5738 req_upiu->header.dword_0 |= cpu_to_be32(tag);
5739
5740 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
5741
5742 /* just copy the upiu request as it is */
5743 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
5744 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
5745 /* The Data Segment Area is optional depending upon the query
5746 * function value. for WRITE DESCRIPTOR, the data segment
5747 * follows right after the tsf.
5748 */
5749 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
5750 *buff_len = 0;
5751 }
5752
5753 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
5754
5755 hba->dev_cmd.complete = &wait;
5756
5757 /* Make sure descriptors are ready before ringing the doorbell */
5758 wmb();
5759 spin_lock_irqsave(hba->host->host_lock, flags);
5760 ufshcd_send_command(hba, tag);
5761 spin_unlock_irqrestore(hba->host->host_lock, flags);
5762
5763 /*
5764 * ignore the returning value here - ufshcd_check_query_response is
5765 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
5766 * read the response directly ignoring all errors.
5767 */
5768 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
5769
5770 /* just copy the upiu response as it is */
5771 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
Avri Altman4bbbe242019-02-20 09:11:13 +02005772 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
5773 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
5774 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
5775 MASK_QUERY_DATA_SEG_LEN;
5776
5777 if (*buff_len >= resp_len) {
5778 memcpy(desc_buff, descp, resp_len);
5779 *buff_len = resp_len;
5780 } else {
5781 dev_warn(hba->dev, "rsp size is bigger than buffer");
5782 *buff_len = 0;
5783 err = -EINVAL;
5784 }
5785 }
Avri Altman5e0a86e2018-10-07 17:30:37 +03005786
5787 ufshcd_put_dev_cmd_tag(hba, tag);
5788 wake_up(&hba->dev_cmd.tag_wq);
5789 up_read(&hba->clk_scaling_lock);
5790 return err;
5791}
5792
5793/**
5794 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
5795 * @hba: per-adapter instance
5796 * @req_upiu: upiu request
5797 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
5798 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
5799 * @desc_buff: pointer to descriptor buffer, NULL if NA
5800 * @buff_len: descriptor size, 0 if NA
5801 * @desc_op: descriptor operation
5802 *
5803 * Supports UTP Transfer requests (nop and query), and UTP Task
5804 * Management requests.
5805 * It is up to the caller to fill the upiu conent properly, as it will
5806 * be copied without any further input validations.
5807 */
5808int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
5809 struct utp_upiu_req *req_upiu,
5810 struct utp_upiu_req *rsp_upiu,
5811 int msgcode,
5812 u8 *desc_buff, int *buff_len,
5813 enum query_opcode desc_op)
5814{
5815 int err;
5816 int cmd_type = DEV_CMD_TYPE_QUERY;
5817 struct utp_task_req_desc treq = { { 0 }, };
5818 int ocs_value;
5819 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
5820
Avri Altman5e0a86e2018-10-07 17:30:37 +03005821 switch (msgcode) {
5822 case UPIU_TRANSACTION_NOP_OUT:
5823 cmd_type = DEV_CMD_TYPE_NOP;
5824 /* fall through */
5825 case UPIU_TRANSACTION_QUERY_REQ:
5826 ufshcd_hold(hba, false);
5827 mutex_lock(&hba->dev_cmd.lock);
5828 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
5829 desc_buff, buff_len,
5830 cmd_type, desc_op);
5831 mutex_unlock(&hba->dev_cmd.lock);
5832 ufshcd_release(hba);
5833
5834 break;
5835 case UPIU_TRANSACTION_TASK_REQ:
5836 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5837 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5838
5839 memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));
5840
5841 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
5842 if (err == -ETIMEDOUT)
5843 break;
5844
5845 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5846 if (ocs_value != OCS_SUCCESS) {
5847 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
5848 ocs_value);
5849 break;
5850 }
5851
5852 memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));
5853
5854 break;
5855 default:
5856 err = -EINVAL;
5857
5858 break;
5859 }
5860
Avri Altman5e0a86e2018-10-07 17:30:37 +03005861 return err;
5862}
5863
5864/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305865 * ufshcd_eh_device_reset_handler - device reset handler registered to
5866 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305867 * @cmd: SCSI command pointer
5868 *
5869 * Returns SUCCESS/FAILED
5870 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305871static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305872{
5873 struct Scsi_Host *host;
5874 struct ufs_hba *hba;
5875 unsigned int tag;
5876 u32 pos;
5877 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305878 u8 resp = 0xF;
5879 struct ufshcd_lrb *lrbp;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305880 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305881
5882 host = cmd->device->host;
5883 hba = shost_priv(host);
5884 tag = cmd->request->tag;
5885
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305886 lrbp = &hba->lrb[tag];
5887 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
5888 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305889 if (!err)
5890 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305891 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305892 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305893
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305894 /* clear the commands that were pending for corresponding LUN */
5895 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
5896 if (hba->lrb[pos].lun == lrbp->lun) {
5897 err = ufshcd_clear_cmd(hba, pos);
5898 if (err)
5899 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305900 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305901 }
5902 spin_lock_irqsave(host->host_lock, flags);
5903 ufshcd_transfer_req_compl(hba);
5904 spin_unlock_irqrestore(host->host_lock, flags);
Gilad Broner7fabb772017-02-03 16:56:50 -08005905
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305906out:
Gilad Broner7fabb772017-02-03 16:56:50 -08005907 hba->req_abort_count = 0;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305908 if (!err) {
5909 err = SUCCESS;
5910 } else {
5911 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
5912 err = FAILED;
5913 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305914 return err;
5915}
5916
Gilad Bronere0b299e2017-02-03 16:56:40 -08005917static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
5918{
5919 struct ufshcd_lrb *lrbp;
5920 int tag;
5921
5922 for_each_set_bit(tag, &bitmap, hba->nutrs) {
5923 lrbp = &hba->lrb[tag];
5924 lrbp->req_abort_skip = true;
5925 }
5926}
5927
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305928/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305929 * ufshcd_abort - abort a specific command
5930 * @cmd: SCSI command pointer
5931 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305932 * Abort the pending command in device by sending UFS_ABORT_TASK task management
5933 * command, and in host controller by clearing the door-bell register. There can
5934 * be race between controller sending the command to the device while abort is
5935 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
5936 * really issued and then try to abort it.
5937 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305938 * Returns SUCCESS/FAILED
5939 */
5940static int ufshcd_abort(struct scsi_cmnd *cmd)
5941{
5942 struct Scsi_Host *host;
5943 struct ufs_hba *hba;
5944 unsigned long flags;
5945 unsigned int tag;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305946 int err = 0;
5947 int poll_cnt;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305948 u8 resp = 0xF;
5949 struct ufshcd_lrb *lrbp;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005950 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305951
5952 host = cmd->device->host;
5953 hba = shost_priv(host);
5954 tag = cmd->request->tag;
Dolev Ravive7d38252016-12-22 18:40:07 -08005955 lrbp = &hba->lrb[tag];
Yaniv Gardi14497322016-02-01 15:02:39 +02005956 if (!ufshcd_valid_tag(hba, tag)) {
5957 dev_err(hba->dev,
5958 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
5959 __func__, tag, cmd, cmd->request);
5960 BUG();
5961 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305962
Dolev Ravive7d38252016-12-22 18:40:07 -08005963 /*
5964 * Task abort to the device W-LUN is illegal. When this command
5965 * will fail, due to spec violation, scsi err handling next step
5966 * will be to send LU reset which, again, is a spec violation.
5967 * To avoid these unnecessary/illegal step we skip to the last error
5968 * handling stage: reset and restore.
5969 */
5970 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
5971 return ufshcd_eh_host_reset_handler(cmd);
5972
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005973 ufshcd_hold(hba, false);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005974 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Yaniv Gardi14497322016-02-01 15:02:39 +02005975 /* If command is already aborted/completed, return SUCCESS */
5976 if (!(test_bit(tag, &hba->outstanding_reqs))) {
5977 dev_err(hba->dev,
5978 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
5979 __func__, tag, hba->outstanding_reqs, reg);
5980 goto out;
5981 }
5982
Dolev Ravive9d501b2014-07-01 12:22:37 +03005983 if (!(reg & (1 << tag))) {
5984 dev_err(hba->dev,
5985 "%s: cmd was completed, but without a notifying intr, tag = %d",
5986 __func__, tag);
5987 }
5988
Dolev Raviv66cc8202016-12-22 18:39:42 -08005989 /* Print Transfer Request of aborted task */
5990 dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
Dolev Raviv66cc8202016-12-22 18:39:42 -08005991
Gilad Broner7fabb772017-02-03 16:56:50 -08005992 /*
5993 * Print detailed info about aborted request.
5994 * As more than one request might get aborted at the same time,
5995 * print full information only for the first aborted request in order
5996 * to reduce repeated printouts. For other aborted requests only print
5997 * basic details.
5998 */
5999 scsi_print_command(hba->lrb[tag].cmd);
6000 if (!hba->req_abort_count) {
6001 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08006002 ufshcd_print_host_state(hba);
Gilad Broner7fabb772017-02-03 16:56:50 -08006003 ufshcd_print_pwr_info(hba);
6004 ufshcd_print_trs(hba, 1 << tag, true);
6005 } else {
6006 ufshcd_print_trs(hba, 1 << tag, false);
6007 }
6008 hba->req_abort_count++;
Gilad Bronere0b299e2017-02-03 16:56:40 -08006009
6010 /* Skip task abort in case previous aborts failed and report failure */
6011 if (lrbp->req_abort_skip) {
6012 err = -EIO;
6013 goto out;
6014 }
6015
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306016 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6017 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6018 UFS_QUERY_TASK, &resp);
6019 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6020 /* cmd pending in the device */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006021 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6022 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306023 break;
6024 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306025 /*
6026 * cmd not pending in the device, check if it is
6027 * in transition.
6028 */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006029 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6030 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306031 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6032 if (reg & (1 << tag)) {
6033 /* sleep for max. 200us to stabilize */
6034 usleep_range(100, 200);
6035 continue;
6036 }
6037 /* command completed already */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006038 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6039 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306040 goto out;
6041 } else {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006042 dev_err(hba->dev,
6043 "%s: no response from device. tag = %d, err %d\n",
6044 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306045 if (!err)
6046 err = resp; /* service response error */
6047 goto out;
6048 }
6049 }
6050
6051 if (!poll_cnt) {
6052 err = -EBUSY;
6053 goto out;
6054 }
6055
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306056 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6057 UFS_ABORT_TASK, &resp);
6058 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006059 if (!err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306060 err = resp; /* service response error */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006061 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6062 __func__, tag, err);
6063 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306064 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306065 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306066
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306067 err = ufshcd_clear_cmd(hba, tag);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006068 if (err) {
6069 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6070 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306071 goto out;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006072 }
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306073
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306074 scsi_dma_unmap(cmd);
6075
6076 spin_lock_irqsave(host->host_lock, flags);
Yaniv Gardia48353f2016-02-01 15:02:40 +02006077 ufshcd_outstanding_req_clear(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306078 hba->lrb[tag].cmd = NULL;
6079 spin_unlock_irqrestore(host->host_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306080
6081 clear_bit_unlock(tag, &hba->lrb_in_use);
6082 wake_up(&hba->dev_cmd.tag_wq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006083
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306084out:
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306085 if (!err) {
6086 err = SUCCESS;
6087 } else {
6088 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Gilad Bronere0b299e2017-02-03 16:56:40 -08006089 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306090 err = FAILED;
6091 }
6092
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006093 /*
6094 * This ufshcd_release() corresponds to the original scsi cmd that got
6095 * aborted here (as we won't get any IRQ for it).
6096 */
6097 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306098 return err;
6099}
6100
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306101/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306102 * ufshcd_host_reset_and_restore - reset and restore host controller
6103 * @hba: per-adapter instance
6104 *
6105 * Note that host controller reset may issue DME_RESET to
6106 * local and remote (device) Uni-Pro stack and the attributes
6107 * are reset to default state.
6108 *
6109 * Returns zero on success, non-zero on failure
6110 */
6111static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6112{
6113 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306114 unsigned long flags;
6115
6116 /* Reset the host controller */
6117 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02006118 ufshcd_hba_stop(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306119 spin_unlock_irqrestore(hba->host->host_lock, flags);
6120
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08006121 /* scale up clocks to max frequency before full reinitialization */
6122 ufshcd_scale_clks(hba, true);
6123
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306124 err = ufshcd_hba_enable(hba);
6125 if (err)
6126 goto out;
6127
6128 /* Establish the link again and restore the device */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006129 err = ufshcd_probe_hba(hba);
6130
6131 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306132 err = -EIO;
6133out:
6134 if (err)
6135 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
6136
6137 return err;
6138}
6139
6140/**
6141 * ufshcd_reset_and_restore - reset and re-initialize host/device
6142 * @hba: per-adapter instance
6143 *
6144 * Reset and recover device, host and re-establish link. This
6145 * is helpful to recover the communication in fatal error conditions.
6146 *
6147 * Returns zero on success, non-zero on failure
6148 */
6149static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6150{
6151 int err = 0;
6152 unsigned long flags;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006153 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306154
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006155 do {
6156 err = ufshcd_host_reset_and_restore(hba);
6157 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306158
6159 /*
6160 * After reset the door-bell might be cleared, complete
6161 * outstanding requests in s/w here.
6162 */
6163 spin_lock_irqsave(hba->host->host_lock, flags);
6164 ufshcd_transfer_req_compl(hba);
6165 ufshcd_tmc_handler(hba);
6166 spin_unlock_irqrestore(hba->host->host_lock, flags);
6167
6168 return err;
6169}
6170
6171/**
6172 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006173 * @cmd: SCSI command pointer
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306174 *
6175 * Returns SUCCESS/FAILED
6176 */
6177static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6178{
6179 int err;
6180 unsigned long flags;
6181 struct ufs_hba *hba;
6182
6183 hba = shost_priv(cmd->device->host);
6184
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006185 ufshcd_hold(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306186 /*
6187 * Check if there is any race with fatal error handling.
6188 * If so, wait for it to complete. Even though fatal error
6189 * handling does reset and restore in some cases, don't assume
6190 * anything out of it. We are just avoiding race here.
6191 */
6192 do {
6193 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306194 if (!(work_pending(&hba->eh_work) ||
Zang Leigang8dc0da72017-06-24 19:14:32 +08006195 hba->ufshcd_state == UFSHCD_STATE_RESET ||
6196 hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306197 break;
6198 spin_unlock_irqrestore(hba->host->host_lock, flags);
6199 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306200 flush_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306201 } while (1);
6202
6203 hba->ufshcd_state = UFSHCD_STATE_RESET;
6204 ufshcd_set_eh_in_progress(hba);
6205 spin_unlock_irqrestore(hba->host->host_lock, flags);
6206
6207 err = ufshcd_reset_and_restore(hba);
6208
6209 spin_lock_irqsave(hba->host->host_lock, flags);
6210 if (!err) {
6211 err = SUCCESS;
6212 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6213 } else {
6214 err = FAILED;
6215 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6216 }
6217 ufshcd_clear_eh_in_progress(hba);
6218 spin_unlock_irqrestore(hba->host->host_lock, flags);
6219
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006220 ufshcd_release(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306221 return err;
6222}
6223
6224/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006225 * ufshcd_get_max_icc_level - calculate the ICC level
6226 * @sup_curr_uA: max. current supported by the regulator
6227 * @start_scan: row at the desc table to start scan from
6228 * @buff: power descriptor buffer
6229 *
6230 * Returns calculated max ICC level for specific regulator
6231 */
6232static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6233{
6234 int i;
6235 int curr_uA;
6236 u16 data;
6237 u16 unit;
6238
6239 for (i = start_scan; i >= 0; i--) {
Tomas Winklerd79713f2017-01-05 10:45:11 +02006240 data = be16_to_cpup((__be16 *)&buff[2 * i]);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006241 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6242 ATTR_ICC_LVL_UNIT_OFFSET;
6243 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6244 switch (unit) {
6245 case UFSHCD_NANO_AMP:
6246 curr_uA = curr_uA / 1000;
6247 break;
6248 case UFSHCD_MILI_AMP:
6249 curr_uA = curr_uA * 1000;
6250 break;
6251 case UFSHCD_AMP:
6252 curr_uA = curr_uA * 1000 * 1000;
6253 break;
6254 case UFSHCD_MICRO_AMP:
6255 default:
6256 break;
6257 }
6258 if (sup_curr_uA >= curr_uA)
6259 break;
6260 }
6261 if (i < 0) {
6262 i = 0;
6263 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6264 }
6265
6266 return (u32)i;
6267}
6268
6269/**
6270 * ufshcd_calc_icc_level - calculate the max ICC level
6271 * In case regulators are not initialized we'll return 0
6272 * @hba: per-adapter instance
6273 * @desc_buf: power descriptor buffer to extract ICC levels from.
6274 * @len: length of desc_buff
6275 *
6276 * Returns calculated ICC level
6277 */
6278static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6279 u8 *desc_buf, int len)
6280{
6281 u32 icc_level = 0;
6282
6283 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6284 !hba->vreg_info.vccq2) {
6285 dev_err(hba->dev,
6286 "%s: Regulator capability was not set, actvIccLevel=%d",
6287 __func__, icc_level);
6288 goto out;
6289 }
6290
6291 if (hba->vreg_info.vcc)
6292 icc_level = ufshcd_get_max_icc_level(
6293 hba->vreg_info.vcc->max_uA,
6294 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6295 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6296
6297 if (hba->vreg_info.vccq)
6298 icc_level = ufshcd_get_max_icc_level(
6299 hba->vreg_info.vccq->max_uA,
6300 icc_level,
6301 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6302
6303 if (hba->vreg_info.vccq2)
6304 icc_level = ufshcd_get_max_icc_level(
6305 hba->vreg_info.vccq2->max_uA,
6306 icc_level,
6307 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6308out:
6309 return icc_level;
6310}
6311
6312static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6313{
6314 int ret;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006315 int buff_len = hba->desc_size.pwr_desc;
Kees Cookbbe21d72018-05-02 16:58:09 -07006316 u8 *desc_buf;
6317
6318 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6319 if (!desc_buf)
6320 return;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006321
6322 ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6323 if (ret) {
6324 dev_err(hba->dev,
6325 "%s: Failed reading power descriptor.len = %d ret = %d",
6326 __func__, buff_len, ret);
Kees Cookbbe21d72018-05-02 16:58:09 -07006327 goto out;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006328 }
6329
6330 hba->init_prefetch_data.icc_level =
6331 ufshcd_find_max_sup_active_icc_level(hba,
6332 desc_buf, buff_len);
6333 dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6334 __func__, hba->init_prefetch_data.icc_level);
6335
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02006336 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6337 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6338 &hba->init_prefetch_data.icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006339
6340 if (ret)
6341 dev_err(hba->dev,
6342 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6343 __func__, hba->init_prefetch_data.icc_level , ret);
6344
Kees Cookbbe21d72018-05-02 16:58:09 -07006345out:
6346 kfree(desc_buf);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006347}
6348
6349/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006350 * ufshcd_scsi_add_wlus - Adds required W-LUs
6351 * @hba: per-adapter instance
6352 *
6353 * UFS device specification requires the UFS devices to support 4 well known
6354 * logical units:
6355 * "REPORT_LUNS" (address: 01h)
6356 * "UFS Device" (address: 50h)
6357 * "RPMB" (address: 44h)
6358 * "BOOT" (address: 30h)
6359 * UFS device's power management needs to be controlled by "POWER CONDITION"
6360 * field of SSU (START STOP UNIT) command. But this "power condition" field
6361 * will take effect only when its sent to "UFS device" well known logical unit
6362 * hence we require the scsi_device instance to represent this logical unit in
6363 * order for the UFS host driver to send the SSU command for power management.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006364 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006365 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6366 * Block) LU so user space process can control this LU. User space may also
6367 * want to have access to BOOT LU.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006368 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006369 * This function adds scsi device instances for each of all well known LUs
6370 * (except "REPORT LUNS" LU).
6371 *
6372 * Returns zero on success (all required W-LUs are added successfully),
6373 * non-zero error value on failure (if failed to add any of the required W-LU).
6374 */
6375static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6376{
6377 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006378 struct scsi_device *sdev_rpmb;
6379 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006380
6381 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6382 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6383 if (IS_ERR(hba->sdev_ufs_device)) {
6384 ret = PTR_ERR(hba->sdev_ufs_device);
6385 hba->sdev_ufs_device = NULL;
6386 goto out;
6387 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006388 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006389
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006390 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006391 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006392 if (IS_ERR(sdev_rpmb)) {
6393 ret = PTR_ERR(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006394 goto remove_sdev_ufs_device;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006395 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006396 scsi_device_put(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006397
6398 sdev_boot = __scsi_add_device(hba->host, 0, 0,
6399 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6400 if (IS_ERR(sdev_boot))
6401 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6402 else
6403 scsi_device_put(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006404 goto out;
6405
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006406remove_sdev_ufs_device:
6407 scsi_remove_device(hba->sdev_ufs_device);
6408out:
6409 return ret;
6410}
6411
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006412static int ufs_get_device_desc(struct ufs_hba *hba,
6413 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006414{
6415 int err;
Kees Cookbbe21d72018-05-02 16:58:09 -07006416 size_t buff_len;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006417 u8 model_index;
Kees Cookbbe21d72018-05-02 16:58:09 -07006418 u8 *desc_buf;
6419
6420 buff_len = max_t(size_t, hba->desc_size.dev_desc,
6421 QUERY_DESC_MAX_SIZE + 1);
6422 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6423 if (!desc_buf) {
6424 err = -ENOMEM;
6425 goto out;
6426 }
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006427
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006428 err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006429 if (err) {
6430 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6431 __func__, err);
6432 goto out;
6433 }
6434
6435 /*
6436 * getting vendor (manufacturerID) and Bank Index in big endian
6437 * format
6438 */
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006439 dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006440 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6441
6442 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
6443
Kees Cookbbe21d72018-05-02 16:58:09 -07006444 /* Zero-pad entire buffer for string termination. */
6445 memset(desc_buf, 0, buff_len);
6446
6447 err = ufshcd_read_string_desc(hba, model_index, desc_buf,
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006448 QUERY_DESC_MAX_SIZE, true/*ASCII*/);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006449 if (err) {
6450 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6451 __func__, err);
6452 goto out;
6453 }
6454
Kees Cookbbe21d72018-05-02 16:58:09 -07006455 desc_buf[QUERY_DESC_MAX_SIZE] = '\0';
6456 strlcpy(dev_desc->model, (desc_buf + QUERY_DESC_HDR_SIZE),
6457 min_t(u8, desc_buf[QUERY_DESC_LENGTH_OFFSET],
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006458 MAX_MODEL_LEN));
6459
6460 /* Null terminate the model string */
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006461 dev_desc->model[MAX_MODEL_LEN] = '\0';
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006462
6463out:
Kees Cookbbe21d72018-05-02 16:58:09 -07006464 kfree(desc_buf);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006465 return err;
6466}
6467
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006468static void ufs_fixup_device_setup(struct ufs_hba *hba,
6469 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006470{
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006471 struct ufs_dev_fix *f;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006472
6473 for (f = ufs_fixups; f->quirk; f++) {
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006474 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
6475 f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
6476 (STR_PRFX_EQUAL(f->card.model, dev_desc->model) ||
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006477 !strcmp(f->card.model, UFS_ANY_MODEL)))
6478 hba->dev_quirks |= f->quirk;
6479 }
6480}
6481
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006482/**
Yaniv Gardi37113102016-03-10 17:37:16 +02006483 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6484 * @hba: per-adapter instance
6485 *
6486 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6487 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6488 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6489 * the hibern8 exit latency.
6490 *
6491 * Returns zero on success, non-zero error value on failure.
6492 */
6493static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6494{
6495 int ret = 0;
6496 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6497
6498 ret = ufshcd_dme_peer_get(hba,
6499 UIC_ARG_MIB_SEL(
6500 RX_MIN_ACTIVATETIME_CAPABILITY,
6501 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6502 &peer_rx_min_activatetime);
6503 if (ret)
6504 goto out;
6505
6506 /* make sure proper unit conversion is applied */
6507 tuned_pa_tactivate =
6508 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6509 / PA_TACTIVATE_TIME_UNIT_US);
6510 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6511 tuned_pa_tactivate);
6512
6513out:
6514 return ret;
6515}
6516
6517/**
6518 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6519 * @hba: per-adapter instance
6520 *
6521 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6522 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6523 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6524 * This optimal value can help reduce the hibern8 exit latency.
6525 *
6526 * Returns zero on success, non-zero error value on failure.
6527 */
6528static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6529{
6530 int ret = 0;
6531 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6532 u32 max_hibern8_time, tuned_pa_hibern8time;
6533
6534 ret = ufshcd_dme_get(hba,
6535 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6536 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6537 &local_tx_hibern8_time_cap);
6538 if (ret)
6539 goto out;
6540
6541 ret = ufshcd_dme_peer_get(hba,
6542 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6543 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6544 &peer_rx_hibern8_time_cap);
6545 if (ret)
6546 goto out;
6547
6548 max_hibern8_time = max(local_tx_hibern8_time_cap,
6549 peer_rx_hibern8_time_cap);
6550 /* make sure proper unit conversion is applied */
6551 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6552 / PA_HIBERN8_TIME_UNIT_US);
6553 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6554 tuned_pa_hibern8time);
6555out:
6556 return ret;
6557}
6558
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006559/**
6560 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6561 * less than device PA_TACTIVATE time.
6562 * @hba: per-adapter instance
6563 *
6564 * Some UFS devices require host PA_TACTIVATE to be lower than device
6565 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6566 * for such devices.
6567 *
6568 * Returns zero on success, non-zero error value on failure.
6569 */
6570static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6571{
6572 int ret = 0;
6573 u32 granularity, peer_granularity;
6574 u32 pa_tactivate, peer_pa_tactivate;
6575 u32 pa_tactivate_us, peer_pa_tactivate_us;
6576 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6577
6578 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6579 &granularity);
6580 if (ret)
6581 goto out;
6582
6583 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6584 &peer_granularity);
6585 if (ret)
6586 goto out;
6587
6588 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6589 (granularity > PA_GRANULARITY_MAX_VAL)) {
6590 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6591 __func__, granularity);
6592 return -EINVAL;
6593 }
6594
6595 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6596 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6597 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6598 __func__, peer_granularity);
6599 return -EINVAL;
6600 }
6601
6602 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6603 if (ret)
6604 goto out;
6605
6606 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6607 &peer_pa_tactivate);
6608 if (ret)
6609 goto out;
6610
6611 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6612 peer_pa_tactivate_us = peer_pa_tactivate *
6613 gran_to_us_table[peer_granularity - 1];
6614
6615 if (pa_tactivate_us > peer_pa_tactivate_us) {
6616 u32 new_peer_pa_tactivate;
6617
6618 new_peer_pa_tactivate = pa_tactivate_us /
6619 gran_to_us_table[peer_granularity - 1];
6620 new_peer_pa_tactivate++;
6621 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6622 new_peer_pa_tactivate);
6623 }
6624
6625out:
6626 return ret;
6627}
6628
Yaniv Gardi37113102016-03-10 17:37:16 +02006629static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6630{
6631 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6632 ufshcd_tune_pa_tactivate(hba);
6633 ufshcd_tune_pa_hibern8time(hba);
6634 }
6635
6636 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6637 /* set 1ms timeout for PA_TACTIVATE */
6638 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006639
6640 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6641 ufshcd_quirk_tune_host_pa_tactivate(hba);
Subhash Jadavani56d4a182016-12-05 19:25:32 -08006642
6643 ufshcd_vops_apply_dev_quirks(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02006644}
6645
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006646static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6647{
6648 int err_reg_hist_size = sizeof(struct ufs_uic_err_reg_hist);
6649
6650 hba->ufs_stats.hibern8_exit_cnt = 0;
6651 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
6652
6653 memset(&hba->ufs_stats.pa_err, 0, err_reg_hist_size);
6654 memset(&hba->ufs_stats.dl_err, 0, err_reg_hist_size);
6655 memset(&hba->ufs_stats.nl_err, 0, err_reg_hist_size);
6656 memset(&hba->ufs_stats.tl_err, 0, err_reg_hist_size);
6657 memset(&hba->ufs_stats.dme_err, 0, err_reg_hist_size);
Gilad Broner7fabb772017-02-03 16:56:50 -08006658
6659 hba->req_abort_count = 0;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006660}
6661
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006662static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6663{
6664 int err;
6665
6666 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6667 &hba->desc_size.dev_desc);
6668 if (err)
6669 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6670
6671 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6672 &hba->desc_size.pwr_desc);
6673 if (err)
6674 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6675
6676 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6677 &hba->desc_size.interc_desc);
6678 if (err)
6679 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6680
6681 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6682 &hba->desc_size.conf_desc);
6683 if (err)
6684 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6685
6686 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6687 &hba->desc_size.unit_desc);
6688 if (err)
6689 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6690
6691 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6692 &hba->desc_size.geom_desc);
6693 if (err)
6694 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02006695 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
6696 &hba->desc_size.hlth_desc);
6697 if (err)
6698 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006699}
6700
6701static void ufshcd_def_desc_sizes(struct ufs_hba *hba)
6702{
6703 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6704 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6705 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6706 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6707 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6708 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02006709 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006710}
6711
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05306712static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
6713 {19200000, REF_CLK_FREQ_19_2_MHZ},
6714 {26000000, REF_CLK_FREQ_26_MHZ},
6715 {38400000, REF_CLK_FREQ_38_4_MHZ},
6716 {52000000, REF_CLK_FREQ_52_MHZ},
6717 {0, REF_CLK_FREQ_INVAL},
6718};
6719
6720static enum ufs_ref_clk_freq
6721ufs_get_bref_clk_from_hz(unsigned long freq)
6722{
6723 int i;
6724
6725 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
6726 if (ufs_ref_clk_freqs[i].freq_hz == freq)
6727 return ufs_ref_clk_freqs[i].val;
6728
6729 return REF_CLK_FREQ_INVAL;
6730}
6731
6732void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
6733{
6734 unsigned long freq;
6735
6736 freq = clk_get_rate(refclk);
6737
6738 hba->dev_ref_clk_freq =
6739 ufs_get_bref_clk_from_hz(freq);
6740
6741 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
6742 dev_err(hba->dev,
6743 "invalid ref_clk setting = %ld\n", freq);
6744}
6745
6746static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
6747{
6748 int err;
6749 u32 ref_clk;
6750 u32 freq = hba->dev_ref_clk_freq;
6751
6752 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
6753 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
6754
6755 if (err) {
6756 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
6757 err);
6758 goto out;
6759 }
6760
6761 if (ref_clk == freq)
6762 goto out; /* nothing to update */
6763
6764 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6765 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
6766
6767 if (err) {
6768 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
6769 ufs_ref_clk_freqs[freq].freq_hz);
6770 goto out;
6771 }
6772
6773 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
6774 ufs_ref_clk_freqs[freq].freq_hz);
6775
6776out:
6777 return err;
6778}
6779
Yaniv Gardi37113102016-03-10 17:37:16 +02006780/**
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006781 * ufshcd_probe_hba - probe hba to detect device and initialize
6782 * @hba: per-adapter instance
6783 *
6784 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306785 */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006786static int ufshcd_probe_hba(struct ufs_hba *hba)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306787{
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006788 struct ufs_dev_desc card = {0};
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306789 int ret;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006790 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306791
6792 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306793 if (ret)
6794 goto out;
6795
Yaniv Gardiafdfff52016-03-10 17:37:15 +02006796 /* set the default level for urgent bkops */
6797 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6798 hba->is_urgent_bkops_lvl_checked = false;
6799
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006800 /* Debug counters initialization */
6801 ufshcd_clear_dbg_ufs_stats(hba);
6802
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006803 /* UniPro link is active now */
6804 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05306805
Adrian Hunterad448372018-03-20 15:07:38 +02006806 /* Enable Auto-Hibernate if configured */
6807 ufshcd_auto_hibern8_enable(hba);
6808
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306809 ret = ufshcd_verify_dev_init(hba);
6810 if (ret)
6811 goto out;
6812
Dolev Raviv68078d52013-07-30 00:35:58 +05306813 ret = ufshcd_complete_dev_init(hba);
6814 if (ret)
6815 goto out;
6816
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006817 /* Init check for device descriptor sizes */
6818 ufshcd_init_desc_sizes(hba);
6819
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006820 ret = ufs_get_device_desc(hba, &card);
6821 if (ret) {
6822 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6823 __func__, ret);
6824 goto out;
6825 }
6826
6827 ufs_fixup_device_setup(hba, &card);
Yaniv Gardi37113102016-03-10 17:37:16 +02006828 ufshcd_tune_unipro_params(hba);
Yaniv Gardi60f01872016-03-10 17:37:11 +02006829
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006830 /* UFS device is also active now */
6831 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306832 ufshcd_force_reset_auto_bkops(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006833 hba->wlun_dev_clr_ua = true;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306834
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006835 if (ufshcd_get_max_pwr_mode(hba)) {
6836 dev_err(hba->dev,
6837 "%s: Failed getting max supported power mode\n",
6838 __func__);
6839 } else {
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05306840 /*
6841 * Set the right value to bRefClkFreq before attempting to
6842 * switch to HS gears.
6843 */
6844 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
6845 ufshcd_set_dev_ref_clk(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006846 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Dov Levenglick8643ae62016-10-17 17:10:14 -07006847 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006848 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6849 __func__, ret);
Dov Levenglick8643ae62016-10-17 17:10:14 -07006850 goto out;
6851 }
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006852 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006853
Yaniv Gardi53c12d02016-02-01 15:02:45 +02006854 /* set the state as operational after switching to desired gear */
6855 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006856
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006857 /*
6858 * If we are in error handling context or in power management callbacks
6859 * context, no need to scan the host
6860 */
6861 if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6862 bool flag;
6863
6864 /* clear any previous UFS device information */
6865 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02006866 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
6867 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006868 hba->dev_info.f_power_on_wp_en = flag;
6869
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006870 if (!hba->is_init_prefetch)
6871 ufshcd_init_icc_levels(hba);
6872
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006873 /* Add required well known logical units to scsi mid layer */
6874 if (ufshcd_scsi_add_wlus(hba))
6875 goto out;
6876
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08006877 /* Initialize devfreq after UFS device is detected */
6878 if (ufshcd_is_clkscaling_supported(hba)) {
6879 memcpy(&hba->clk_scaling.saved_pwr_info.info,
6880 &hba->pwr_info,
6881 sizeof(struct ufs_pa_layer_attr));
6882 hba->clk_scaling.saved_pwr_info.is_valid = true;
6883 if (!hba->devfreq) {
Bjorn Anderssondeac4442018-05-17 23:26:36 -07006884 ret = ufshcd_devfreq_init(hba);
6885 if (ret)
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08006886 goto out;
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08006887 }
6888 hba->clk_scaling.is_allowed = true;
6889 }
6890
Avri Altmandf032bf2018-10-07 17:30:35 +03006891 ufs_bsg_probe(hba);
6892
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306893 scsi_scan_host(hba->host);
6894 pm_runtime_put_sync(hba->dev);
6895 }
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006896
6897 if (!hba->is_init_prefetch)
6898 hba->is_init_prefetch = true;
6899
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306900out:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006901 /*
6902 * If we failed to initialize the device or the device is not
6903 * present, turn off the power/clocks etc.
6904 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006905 if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6906 pm_runtime_put_sync(hba->dev);
Vivek Gautameebcc192018-08-07 23:17:39 +05306907 ufshcd_exit_clk_scaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006908 ufshcd_hba_exit(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006909 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006910
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006911 trace_ufshcd_init(dev_name(hba->dev), ret,
6912 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08006913 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006914 return ret;
6915}
6916
6917/**
6918 * ufshcd_async_scan - asynchronous execution for probing hba
6919 * @data: data pointer to pass to this function
6920 * @cookie: cookie data
6921 */
6922static void ufshcd_async_scan(void *data, async_cookie_t cookie)
6923{
6924 struct ufs_hba *hba = (struct ufs_hba *)data;
6925
6926 ufshcd_probe_hba(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306927}
6928
Yaniv Gardif550c652016-03-10 17:37:07 +02006929static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
6930{
6931 unsigned long flags;
6932 struct Scsi_Host *host;
6933 struct ufs_hba *hba;
6934 int index;
6935 bool found = false;
6936
6937 if (!scmd || !scmd->device || !scmd->device->host)
Christoph Hellwig66005932018-05-29 15:52:29 +02006938 return BLK_EH_DONE;
Yaniv Gardif550c652016-03-10 17:37:07 +02006939
6940 host = scmd->device->host;
6941 hba = shost_priv(host);
6942 if (!hba)
Christoph Hellwig66005932018-05-29 15:52:29 +02006943 return BLK_EH_DONE;
Yaniv Gardif550c652016-03-10 17:37:07 +02006944
6945 spin_lock_irqsave(host->host_lock, flags);
6946
6947 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
6948 if (hba->lrb[index].cmd == scmd) {
6949 found = true;
6950 break;
6951 }
6952 }
6953
6954 spin_unlock_irqrestore(host->host_lock, flags);
6955
6956 /*
6957 * Bypass SCSI error handling and reset the block layer timer if this
6958 * SCSI command was not actually dispatched to UFS driver, otherwise
6959 * let SCSI layer handle the error as usual.
6960 */
Christoph Hellwig66005932018-05-29 15:52:29 +02006961 return found ? BLK_EH_DONE : BLK_EH_RESET_TIMER;
Yaniv Gardif550c652016-03-10 17:37:07 +02006962}
6963
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02006964static const struct attribute_group *ufshcd_driver_groups[] = {
6965 &ufs_sysfs_unit_descriptor_group,
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02006966 &ufs_sysfs_lun_attributes_group,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02006967 NULL,
6968};
6969
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306970static struct scsi_host_template ufshcd_driver_template = {
6971 .module = THIS_MODULE,
6972 .name = UFSHCD,
6973 .proc_name = UFSHCD,
6974 .queuecommand = ufshcd_queuecommand,
6975 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09006976 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306977 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03006978 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306979 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306980 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
6981 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Yaniv Gardif550c652016-03-10 17:37:07 +02006982 .eh_timed_out = ufshcd_eh_timed_out,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306983 .this_id = -1,
6984 .sg_tablesize = SG_ALL,
6985 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
6986 .can_queue = UFSHCD_CAN_QUEUE,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006987 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01006988 .track_queue_depth = 1,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02006989 .sdev_groups = ufshcd_driver_groups,
Christoph Hellwig4af14d12018-12-13 16:17:09 +01006990 .dma_boundary = PAGE_SIZE - 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306991};
6992
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006993static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
6994 int ua)
6995{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08006996 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006997
Bjorn Andersson7b16a072015-02-11 19:35:28 -08006998 if (!vreg)
6999 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007000
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007001 ret = regulator_set_load(vreg->reg, ua);
7002 if (ret < 0) {
7003 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
7004 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007005 }
7006
7007 return ret;
7008}
7009
7010static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7011 struct ufs_vreg *vreg)
7012{
Marc Gonzalez73067982019-02-27 11:41:45 +01007013 return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007014}
7015
7016static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7017 struct ufs_vreg *vreg)
7018{
Marc Gonzalez73067982019-02-27 11:41:45 +01007019 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007020}
7021
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007022static int ufshcd_config_vreg(struct device *dev,
7023 struct ufs_vreg *vreg, bool on)
7024{
7025 int ret = 0;
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007026 struct regulator *reg;
7027 const char *name;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007028 int min_uV, uA_load;
7029
7030 BUG_ON(!vreg);
7031
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007032 reg = vreg->reg;
7033 name = vreg->name;
7034
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007035 if (regulator_count_voltages(reg) > 0) {
7036 min_uV = on ? vreg->min_uV : 0;
7037 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7038 if (ret) {
7039 dev_err(dev, "%s: %s set voltage failed, err=%d\n",
7040 __func__, name, ret);
7041 goto out;
7042 }
7043
7044 uA_load = on ? vreg->max_uA : 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007045 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7046 if (ret)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007047 goto out;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007048 }
7049out:
7050 return ret;
7051}
7052
7053static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7054{
7055 int ret = 0;
7056
Marc Gonzalez73067982019-02-27 11:41:45 +01007057 if (!vreg || vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007058 goto out;
7059
7060 ret = ufshcd_config_vreg(dev, vreg, true);
7061 if (!ret)
7062 ret = regulator_enable(vreg->reg);
7063
7064 if (!ret)
7065 vreg->enabled = true;
7066 else
7067 dev_err(dev, "%s: %s enable failed, err=%d\n",
7068 __func__, vreg->name, ret);
7069out:
7070 return ret;
7071}
7072
7073static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7074{
7075 int ret = 0;
7076
Marc Gonzalez73067982019-02-27 11:41:45 +01007077 if (!vreg || !vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007078 goto out;
7079
7080 ret = regulator_disable(vreg->reg);
7081
7082 if (!ret) {
7083 /* ignore errors on applying disable config */
7084 ufshcd_config_vreg(dev, vreg, false);
7085 vreg->enabled = false;
7086 } else {
7087 dev_err(dev, "%s: %s disable failed, err=%d\n",
7088 __func__, vreg->name, ret);
7089 }
7090out:
7091 return ret;
7092}
7093
7094static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7095{
7096 int ret = 0;
7097 struct device *dev = hba->dev;
7098 struct ufs_vreg_info *info = &hba->vreg_info;
7099
7100 if (!info)
7101 goto out;
7102
7103 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7104 if (ret)
7105 goto out;
7106
7107 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7108 if (ret)
7109 goto out;
7110
7111 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7112 if (ret)
7113 goto out;
7114
7115out:
7116 if (ret) {
7117 ufshcd_toggle_vreg(dev, info->vccq2, false);
7118 ufshcd_toggle_vreg(dev, info->vccq, false);
7119 ufshcd_toggle_vreg(dev, info->vcc, false);
7120 }
7121 return ret;
7122}
7123
Raviv Shvili6a771a62014-09-25 15:32:24 +03007124static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7125{
7126 struct ufs_vreg_info *info = &hba->vreg_info;
7127
7128 if (info)
7129 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
7130
7131 return 0;
7132}
7133
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007134static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7135{
7136 int ret = 0;
7137
7138 if (!vreg)
7139 goto out;
7140
7141 vreg->reg = devm_regulator_get(dev, vreg->name);
7142 if (IS_ERR(vreg->reg)) {
7143 ret = PTR_ERR(vreg->reg);
7144 dev_err(dev, "%s: %s get failed, err=%d\n",
7145 __func__, vreg->name, ret);
7146 }
7147out:
7148 return ret;
7149}
7150
7151static int ufshcd_init_vreg(struct ufs_hba *hba)
7152{
7153 int ret = 0;
7154 struct device *dev = hba->dev;
7155 struct ufs_vreg_info *info = &hba->vreg_info;
7156
7157 if (!info)
7158 goto out;
7159
7160 ret = ufshcd_get_vreg(dev, info->vcc);
7161 if (ret)
7162 goto out;
7163
7164 ret = ufshcd_get_vreg(dev, info->vccq);
7165 if (ret)
7166 goto out;
7167
7168 ret = ufshcd_get_vreg(dev, info->vccq2);
7169out:
7170 return ret;
7171}
7172
Raviv Shvili6a771a62014-09-25 15:32:24 +03007173static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7174{
7175 struct ufs_vreg_info *info = &hba->vreg_info;
7176
7177 if (info)
7178 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7179
7180 return 0;
7181}
7182
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007183static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7184 bool skip_ref_clk)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007185{
7186 int ret = 0;
7187 struct ufs_clk_info *clki;
7188 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007189 unsigned long flags;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007190 ktime_t start = ktime_get();
7191 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007192
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007193 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007194 goto out;
7195
Subhash Jadavanib3344562018-05-03 16:37:17 +05307196 /*
7197 * vendor specific setup_clocks ops may depend on clocks managed by
7198 * this standard driver hence call the vendor specific setup_clocks
7199 * before disabling the clocks managed here.
7200 */
7201 if (!on) {
7202 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
7203 if (ret)
7204 return ret;
7205 }
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007206
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007207 list_for_each_entry(clki, head, list) {
7208 if (!IS_ERR_OR_NULL(clki->clk)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007209 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7210 continue;
7211
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007212 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007213 if (on && !clki->enabled) {
7214 ret = clk_prepare_enable(clki->clk);
7215 if (ret) {
7216 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7217 __func__, clki->name, ret);
7218 goto out;
7219 }
7220 } else if (!on && clki->enabled) {
7221 clk_disable_unprepare(clki->clk);
7222 }
7223 clki->enabled = on;
7224 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7225 clki->name, on ? "en" : "dis");
7226 }
7227 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007228
Subhash Jadavanib3344562018-05-03 16:37:17 +05307229 /*
7230 * vendor specific setup_clocks ops may depend on clocks managed by
7231 * this standard driver hence call the vendor specific setup_clocks
7232 * after enabling the clocks managed here.
7233 */
7234 if (on) {
7235 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
7236 if (ret)
7237 return ret;
7238 }
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007239
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007240out:
7241 if (ret) {
7242 list_for_each_entry(clki, head, list) {
7243 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7244 clk_disable_unprepare(clki->clk);
7245 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007246 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007247 spin_lock_irqsave(hba->host->host_lock, flags);
7248 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007249 trace_ufshcd_clk_gating(dev_name(hba->dev),
7250 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007251 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007252 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007253
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007254 if (clk_state_changed)
7255 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7256 (on ? "on" : "off"),
7257 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007258 return ret;
7259}
7260
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007261static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
7262{
7263 return __ufshcd_setup_clocks(hba, on, false);
7264}
7265
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007266static int ufshcd_init_clocks(struct ufs_hba *hba)
7267{
7268 int ret = 0;
7269 struct ufs_clk_info *clki;
7270 struct device *dev = hba->dev;
7271 struct list_head *head = &hba->clk_list_head;
7272
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007273 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007274 goto out;
7275
7276 list_for_each_entry(clki, head, list) {
7277 if (!clki->name)
7278 continue;
7279
7280 clki->clk = devm_clk_get(dev, clki->name);
7281 if (IS_ERR(clki->clk)) {
7282 ret = PTR_ERR(clki->clk);
7283 dev_err(dev, "%s: %s clk get failed, %d\n",
7284 __func__, clki->name, ret);
7285 goto out;
7286 }
7287
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307288 /*
7289 * Parse device ref clk freq as per device tree "ref_clk".
7290 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
7291 * in ufshcd_alloc_host().
7292 */
7293 if (!strcmp(clki->name, "ref_clk"))
7294 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
7295
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007296 if (clki->max_freq) {
7297 ret = clk_set_rate(clki->clk, clki->max_freq);
7298 if (ret) {
7299 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7300 __func__, clki->name,
7301 clki->max_freq, ret);
7302 goto out;
7303 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03007304 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007305 }
7306 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7307 clki->name, clk_get_rate(clki->clk));
7308 }
7309out:
7310 return ret;
7311}
7312
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007313static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7314{
7315 int err = 0;
7316
7317 if (!hba->vops)
7318 goto out;
7319
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007320 err = ufshcd_vops_init(hba);
7321 if (err)
7322 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007323
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007324 err = ufshcd_vops_setup_regulators(hba, true);
7325 if (err)
7326 goto out_exit;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007327
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007328 goto out;
7329
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007330out_exit:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007331 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007332out:
7333 if (err)
7334 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007335 __func__, ufshcd_get_var_name(hba), err);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007336 return err;
7337}
7338
7339static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7340{
7341 if (!hba->vops)
7342 return;
7343
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007344 ufshcd_vops_setup_regulators(hba, false);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007345
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007346 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007347}
7348
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007349static int ufshcd_hba_init(struct ufs_hba *hba)
7350{
7351 int err;
7352
Raviv Shvili6a771a62014-09-25 15:32:24 +03007353 /*
7354 * Handle host controller power separately from the UFS device power
7355 * rails as it will help controlling the UFS host controller power
7356 * collapse easily which is different than UFS device power collapse.
7357 * Also, enable the host controller power before we go ahead with rest
7358 * of the initialization here.
7359 */
7360 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007361 if (err)
7362 goto out;
7363
Raviv Shvili6a771a62014-09-25 15:32:24 +03007364 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007365 if (err)
7366 goto out;
7367
Raviv Shvili6a771a62014-09-25 15:32:24 +03007368 err = ufshcd_init_clocks(hba);
7369 if (err)
7370 goto out_disable_hba_vreg;
7371
7372 err = ufshcd_setup_clocks(hba, true);
7373 if (err)
7374 goto out_disable_hba_vreg;
7375
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007376 err = ufshcd_init_vreg(hba);
7377 if (err)
7378 goto out_disable_clks;
7379
7380 err = ufshcd_setup_vreg(hba, true);
7381 if (err)
7382 goto out_disable_clks;
7383
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007384 err = ufshcd_variant_hba_init(hba);
7385 if (err)
7386 goto out_disable_vreg;
7387
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007388 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007389 goto out;
7390
7391out_disable_vreg:
7392 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007393out_disable_clks:
7394 ufshcd_setup_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007395out_disable_hba_vreg:
7396 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007397out:
7398 return err;
7399}
7400
7401static void ufshcd_hba_exit(struct ufs_hba *hba)
7402{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007403 if (hba->is_powered) {
7404 ufshcd_variant_hba_exit(hba);
7405 ufshcd_setup_vreg(hba, false);
Gilad Bronera5082532016-10-17 17:10:00 -07007406 ufshcd_suspend_clkscaling(hba);
Vivek Gautameebcc192018-08-07 23:17:39 +05307407 if (ufshcd_is_clkscaling_supported(hba))
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007408 if (hba->devfreq)
7409 ufshcd_suspend_clkscaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007410 ufshcd_setup_clocks(hba, false);
7411 ufshcd_setup_hba_vreg(hba, false);
7412 hba->is_powered = false;
7413 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007414}
7415
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007416static int
7417ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307418{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007419 unsigned char cmd[6] = {REQUEST_SENSE,
7420 0,
7421 0,
7422 0,
Avri Altman09a5a242018-11-22 20:04:56 +02007423 UFS_SENSE_SIZE,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007424 0};
7425 char *buffer;
7426 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307427
Avri Altman09a5a242018-11-22 20:04:56 +02007428 buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007429 if (!buffer) {
7430 ret = -ENOMEM;
7431 goto out;
7432 }
7433
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007434 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
Avri Altman09a5a242018-11-22 20:04:56 +02007435 UFS_SENSE_SIZE, NULL, NULL,
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007436 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007437 if (ret)
7438 pr_err("%s: failed with err %d\n", __func__, ret);
7439
7440 kfree(buffer);
7441out:
7442 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307443}
7444
7445/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007446 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7447 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307448 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007449 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307450 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007451 * Returns 0 if requested power mode is set successfully
7452 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307453 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007454static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7455 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307456{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007457 unsigned char cmd[6] = { START_STOP };
7458 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007459 struct scsi_device *sdp;
7460 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007461 int ret;
7462
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007463 spin_lock_irqsave(hba->host->host_lock, flags);
7464 sdp = hba->sdev_ufs_device;
7465 if (sdp) {
7466 ret = scsi_device_get(sdp);
7467 if (!ret && !scsi_device_online(sdp)) {
7468 ret = -ENODEV;
7469 scsi_device_put(sdp);
7470 }
7471 } else {
7472 ret = -ENODEV;
7473 }
7474 spin_unlock_irqrestore(hba->host->host_lock, flags);
7475
7476 if (ret)
7477 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007478
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307479 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007480 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7481 * handling, which would wait for host to be resumed. Since we know
7482 * we are functional while we are here, skip host resume in error
7483 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307484 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007485 hba->host->eh_noresume = 1;
7486 if (hba->wlun_dev_clr_ua) {
7487 ret = ufshcd_send_request_sense(hba, sdp);
7488 if (ret)
7489 goto out;
7490 /* Unit attention condition is cleared now */
7491 hba->wlun_dev_clr_ua = false;
7492 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307493
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007494 cmd[4] = pwr_mode << 4;
7495
7496 /*
7497 * Current function would be generally called from the power management
Christoph Hellwige8064022016-10-20 15:12:13 +02007498 * callbacks hence set the RQF_PM flag so that it doesn't resume the
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007499 * already suspended childs.
7500 */
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007501 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7502 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007503 if (ret) {
7504 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02007505 "START_STOP failed for power mode: %d, result %x\n",
7506 pwr_mode, ret);
Johannes Thumshirnc65be1a2018-06-25 13:20:58 +02007507 if (driver_byte(ret) == DRIVER_SENSE)
Hannes Reinecke21045512015-01-08 07:43:46 +01007508 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007509 }
7510
7511 if (!ret)
7512 hba->curr_dev_pwr_mode = pwr_mode;
7513out:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007514 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007515 hba->host->eh_noresume = 0;
7516 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307517}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307518
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007519static int ufshcd_link_state_transition(struct ufs_hba *hba,
7520 enum uic_link_state req_link_state,
7521 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307522{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007523 int ret = 0;
7524
7525 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307526 return 0;
7527
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007528 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7529 ret = ufshcd_uic_hibern8_enter(hba);
7530 if (!ret)
7531 ufshcd_set_link_hibern8(hba);
7532 else
7533 goto out;
7534 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307535 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007536 * If autobkops is enabled, link can't be turned off because
7537 * turning off the link would also turn off the device.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307538 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007539 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
7540 (!check_for_bkops || (check_for_bkops &&
7541 !hba->auto_bkops_enabled))) {
7542 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02007543 * Let's make sure that link is in low power mode, we are doing
7544 * this currently by putting the link in Hibern8. Otherway to
7545 * put the link in low power mode is to send the DME end point
7546 * to device and then send the DME reset command to local
7547 * unipro. But putting the link in hibern8 is much faster.
7548 */
7549 ret = ufshcd_uic_hibern8_enter(hba);
7550 if (ret)
7551 goto out;
7552 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007553 * Change controller state to "reset state" which
7554 * should also put the link in off/reset state
7555 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02007556 ufshcd_hba_stop(hba, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007557 /*
7558 * TODO: Check if we need any delay to make sure that
7559 * controller is reset
7560 */
7561 ufshcd_set_link_off(hba);
7562 }
7563
7564out:
7565 return ret;
7566}
7567
7568static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7569{
7570 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02007571 * It seems some UFS devices may keep drawing more than sleep current
7572 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7573 * To avoid this situation, add 2ms delay before putting these UFS
7574 * rails in LPM mode.
7575 */
7576 if (!ufshcd_is_link_active(hba) &&
7577 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7578 usleep_range(2000, 2100);
7579
7580 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007581 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7582 * power.
7583 *
7584 * If UFS device and link is in OFF state, all power supplies (VCC,
7585 * VCCQ, VCCQ2) can be turned off if power on write protect is not
7586 * required. If UFS link is inactive (Hibern8 or OFF state) and device
7587 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7588 *
7589 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7590 * in low power state which would save some power.
7591 */
7592 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7593 !hba->dev_info.is_lu_power_on_wp) {
7594 ufshcd_setup_vreg(hba, false);
7595 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7596 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7597 if (!ufshcd_is_link_active(hba)) {
7598 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7599 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7600 }
7601 }
7602}
7603
7604static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7605{
7606 int ret = 0;
7607
7608 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7609 !hba->dev_info.is_lu_power_on_wp) {
7610 ret = ufshcd_setup_vreg(hba, true);
7611 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007612 if (!ret && !ufshcd_is_link_active(hba)) {
7613 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7614 if (ret)
7615 goto vcc_disable;
7616 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7617 if (ret)
7618 goto vccq_lpm;
7619 }
Subhash Jadavani69d72ac2016-10-27 17:26:24 -07007620 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007621 }
7622 goto out;
7623
7624vccq_lpm:
7625 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7626vcc_disable:
7627 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7628out:
7629 return ret;
7630}
7631
7632static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7633{
7634 if (ufshcd_is_link_off(hba))
7635 ufshcd_setup_hba_vreg(hba, false);
7636}
7637
7638static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7639{
7640 if (ufshcd_is_link_off(hba))
7641 ufshcd_setup_hba_vreg(hba, true);
7642}
7643
7644/**
7645 * ufshcd_suspend - helper function for suspend operations
7646 * @hba: per adapter instance
7647 * @pm_op: desired low power operation type
7648 *
7649 * This function will try to put the UFS device and link into low power
7650 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7651 * (System PM level).
7652 *
7653 * If this function is called during shutdown, it will make sure that
7654 * both UFS device and UFS link is powered off.
7655 *
7656 * NOTE: UFS device & link must be active before we enter in this function.
7657 *
7658 * Returns 0 for success and non-zero for failure
7659 */
7660static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7661{
7662 int ret = 0;
7663 enum ufs_pm_level pm_lvl;
7664 enum ufs_dev_pwr_mode req_dev_pwr_mode;
7665 enum uic_link_state req_link_state;
7666
7667 hba->pm_op_in_progress = 1;
7668 if (!ufshcd_is_shutdown_pm(pm_op)) {
7669 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7670 hba->rpm_lvl : hba->spm_lvl;
7671 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7672 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7673 } else {
7674 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7675 req_link_state = UIC_LINK_OFF_STATE;
7676 }
7677
7678 /*
7679 * If we can't transition into any of the low power modes
7680 * just gate the clocks.
7681 */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007682 ufshcd_hold(hba, false);
7683 hba->clk_gating.is_suspended = true;
7684
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007685 if (hba->clk_scaling.is_allowed) {
7686 cancel_work_sync(&hba->clk_scaling.suspend_work);
7687 cancel_work_sync(&hba->clk_scaling.resume_work);
7688 ufshcd_suspend_clkscaling(hba);
7689 }
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007690
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007691 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7692 req_link_state == UIC_LINK_ACTIVE_STATE) {
7693 goto disable_clks;
7694 }
7695
7696 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7697 (req_link_state == hba->uic_link_state))
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007698 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007699
7700 /* UFS device & link must be active before we enter in this function */
7701 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7702 ret = -EINVAL;
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007703 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007704 }
7705
7706 if (ufshcd_is_runtime_pm(pm_op)) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03007707 if (ufshcd_can_autobkops_during_suspend(hba)) {
7708 /*
7709 * The device is idle with no requests in the queue,
7710 * allow background operations if bkops status shows
7711 * that performance might be impacted.
7712 */
7713 ret = ufshcd_urgent_bkops(hba);
7714 if (ret)
7715 goto enable_gating;
7716 } else {
7717 /* make sure that auto bkops is disabled */
7718 ufshcd_disable_auto_bkops(hba);
7719 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007720 }
7721
7722 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7723 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7724 !ufshcd_is_runtime_pm(pm_op))) {
7725 /* ensure that bkops is disabled */
7726 ufshcd_disable_auto_bkops(hba);
7727 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7728 if (ret)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007729 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007730 }
7731
7732 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7733 if (ret)
7734 goto set_dev_active;
7735
7736 ufshcd_vreg_set_lpm(hba);
7737
7738disable_clks:
7739 /*
7740 * Call vendor specific suspend callback. As these callbacks may access
7741 * vendor specific host controller register space call them before the
7742 * host clocks are ON.
7743 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007744 ret = ufshcd_vops_suspend(hba, pm_op);
7745 if (ret)
7746 goto set_link_active;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007747
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007748 if (!ufshcd_is_link_active(hba))
7749 ufshcd_setup_clocks(hba, false);
7750 else
7751 /* If link is active, device ref_clk can't be switched off */
7752 __ufshcd_setup_clocks(hba, false, true);
7753
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007754 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007755 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007756 /*
7757 * Disable the host irq as host controller as there won't be any
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007758 * host controller transaction expected till resume.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007759 */
7760 ufshcd_disable_irq(hba);
7761 /* Put the host controller in low power mode if possible */
7762 ufshcd_hba_vreg_set_lpm(hba);
7763 goto out;
7764
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007765set_link_active:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007766 if (hba->clk_scaling.is_allowed)
7767 ufshcd_resume_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007768 ufshcd_vreg_set_hpm(hba);
7769 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7770 ufshcd_set_link_active(hba);
7771 else if (ufshcd_is_link_off(hba))
7772 ufshcd_host_reset_and_restore(hba);
7773set_dev_active:
7774 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7775 ufshcd_disable_auto_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007776enable_gating:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007777 if (hba->clk_scaling.is_allowed)
7778 ufshcd_resume_clkscaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007779 hba->clk_gating.is_suspended = false;
7780 ufshcd_release(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007781out:
7782 hba->pm_op_in_progress = 0;
7783 return ret;
7784}
7785
7786/**
7787 * ufshcd_resume - helper function for resume operations
7788 * @hba: per adapter instance
7789 * @pm_op: runtime PM or system PM
7790 *
7791 * This function basically brings the UFS device, UniPro link and controller
7792 * to active state.
7793 *
7794 * Returns 0 for success and non-zero for failure
7795 */
7796static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7797{
7798 int ret;
7799 enum uic_link_state old_link_state;
7800
7801 hba->pm_op_in_progress = 1;
7802 old_link_state = hba->uic_link_state;
7803
7804 ufshcd_hba_vreg_set_hpm(hba);
7805 /* Make sure clocks are enabled before accessing controller */
7806 ret = ufshcd_setup_clocks(hba, true);
7807 if (ret)
7808 goto out;
7809
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007810 /* enable the host irq as host controller would be active soon */
7811 ret = ufshcd_enable_irq(hba);
7812 if (ret)
7813 goto disable_irq_and_vops_clks;
7814
7815 ret = ufshcd_vreg_set_hpm(hba);
7816 if (ret)
7817 goto disable_irq_and_vops_clks;
7818
7819 /*
7820 * Call vendor specific resume callback. As these callbacks may access
7821 * vendor specific host controller register space call them when the
7822 * host clocks are ON.
7823 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007824 ret = ufshcd_vops_resume(hba, pm_op);
7825 if (ret)
7826 goto disable_vreg;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007827
7828 if (ufshcd_is_link_hibern8(hba)) {
7829 ret = ufshcd_uic_hibern8_exit(hba);
7830 if (!ret)
7831 ufshcd_set_link_active(hba);
7832 else
7833 goto vendor_suspend;
7834 } else if (ufshcd_is_link_off(hba)) {
7835 ret = ufshcd_host_reset_and_restore(hba);
7836 /*
7837 * ufshcd_host_reset_and_restore() should have already
7838 * set the link state as active
7839 */
7840 if (ret || !ufshcd_is_link_active(hba))
7841 goto vendor_suspend;
7842 }
7843
7844 if (!ufshcd_is_ufs_dev_active(hba)) {
7845 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
7846 if (ret)
7847 goto set_old_link_state;
7848 }
7849
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08007850 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
7851 ufshcd_enable_auto_bkops(hba);
7852 else
7853 /*
7854 * If BKOPs operations are urgently needed at this moment then
7855 * keep auto-bkops enabled or else disable it.
7856 */
7857 ufshcd_urgent_bkops(hba);
7858
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007859 hba->clk_gating.is_suspended = false;
7860
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08007861 if (hba->clk_scaling.is_allowed)
7862 ufshcd_resume_clkscaling(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03007863
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007864 /* Schedule clock gating in case of no access to UFS device yet */
7865 ufshcd_release(hba);
Adrian Hunterad448372018-03-20 15:07:38 +02007866
7867 /* Enable Auto-Hibernate if configured */
7868 ufshcd_auto_hibern8_enable(hba);
7869
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007870 goto out;
7871
7872set_old_link_state:
7873 ufshcd_link_state_transition(hba, old_link_state, 0);
7874vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007875 ufshcd_vops_suspend(hba, pm_op);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007876disable_vreg:
7877 ufshcd_vreg_set_lpm(hba);
7878disable_irq_and_vops_clks:
7879 ufshcd_disable_irq(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007880 if (hba->clk_scaling.is_allowed)
7881 ufshcd_suspend_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007882 ufshcd_setup_clocks(hba, false);
7883out:
7884 hba->pm_op_in_progress = 0;
7885 return ret;
7886}
7887
7888/**
7889 * ufshcd_system_suspend - system suspend routine
7890 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007891 *
7892 * Check the description of ufshcd_suspend() function for more details.
7893 *
7894 * Returns 0 for success and non-zero for failure
7895 */
7896int ufshcd_system_suspend(struct ufs_hba *hba)
7897{
7898 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007899 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007900
7901 if (!hba || !hba->is_powered)
Dolev Raviv233b5942014-10-23 13:25:14 +03007902 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007903
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08007904 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
7905 hba->curr_dev_pwr_mode) &&
7906 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
7907 hba->uic_link_state))
7908 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007909
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08007910 if (pm_runtime_suspended(hba->dev)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007911 /*
7912 * UFS device and/or UFS link low power states during runtime
7913 * suspend seems to be different than what is expected during
7914 * system suspend. Hence runtime resume the devic & link and
7915 * let the system suspend low power states to take effect.
7916 * TODO: If resume takes longer time, we might have optimize
7917 * it in future by not resuming everything if possible.
7918 */
7919 ret = ufshcd_runtime_resume(hba);
7920 if (ret)
7921 goto out;
7922 }
7923
7924 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
7925out:
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007926 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
7927 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007928 hba->curr_dev_pwr_mode, hba->uic_link_state);
Dolev Ravive7850602014-09-25 15:32:36 +03007929 if (!ret)
7930 hba->is_sys_suspended = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007931 return ret;
7932}
7933EXPORT_SYMBOL(ufshcd_system_suspend);
7934
7935/**
7936 * ufshcd_system_resume - system resume routine
7937 * @hba: per adapter instance
7938 *
7939 * Returns 0 for success and non-zero for failure
7940 */
7941
7942int ufshcd_system_resume(struct ufs_hba *hba)
7943{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007944 int ret = 0;
7945 ktime_t start = ktime_get();
7946
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07007947 if (!hba)
7948 return -EINVAL;
7949
7950 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007951 /*
7952 * Let the runtime resume take care of resuming
7953 * if runtime suspended.
7954 */
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007955 goto out;
7956 else
7957 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
7958out:
7959 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
7960 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007961 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007962 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007963}
7964EXPORT_SYMBOL(ufshcd_system_resume);
7965
7966/**
7967 * ufshcd_runtime_suspend - runtime suspend routine
7968 * @hba: per adapter instance
7969 *
7970 * Check the description of ufshcd_suspend() function for more details.
7971 *
7972 * Returns 0 for success and non-zero for failure
7973 */
7974int ufshcd_runtime_suspend(struct ufs_hba *hba)
7975{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007976 int ret = 0;
7977 ktime_t start = ktime_get();
7978
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07007979 if (!hba)
7980 return -EINVAL;
7981
7982 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007983 goto out;
7984 else
7985 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
7986out:
7987 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
7988 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007989 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007990 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307991}
7992EXPORT_SYMBOL(ufshcd_runtime_suspend);
7993
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007994/**
7995 * ufshcd_runtime_resume - runtime resume routine
7996 * @hba: per adapter instance
7997 *
7998 * This function basically brings the UFS device, UniPro link and controller
7999 * to active state. Following operations are done in this function:
8000 *
8001 * 1. Turn on all the controller related clocks
8002 * 2. Bring the UniPro link out of Hibernate state
8003 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
8004 * to active state.
8005 * 4. If auto-bkops is enabled on the device, disable it.
8006 *
8007 * So following would be the possible power state after this function return
8008 * successfully:
8009 * S1: UFS device in Active state with VCC rail ON
8010 * UniPro link in Active state
8011 * All the UFS/UniPro controller clocks are ON
8012 *
8013 * Returns 0 for success and non-zero for failure
8014 */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308015int ufshcd_runtime_resume(struct ufs_hba *hba)
8016{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008017 int ret = 0;
8018 ktime_t start = ktime_get();
8019
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008020 if (!hba)
8021 return -EINVAL;
8022
8023 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008024 goto out;
8025 else
8026 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8027out:
8028 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8029 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008030 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008031 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308032}
8033EXPORT_SYMBOL(ufshcd_runtime_resume);
8034
8035int ufshcd_runtime_idle(struct ufs_hba *hba)
8036{
8037 return 0;
8038}
8039EXPORT_SYMBOL(ufshcd_runtime_idle);
8040
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308041/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008042 * ufshcd_shutdown - shutdown routine
8043 * @hba: per adapter instance
8044 *
8045 * This function would power off both UFS device and UFS link.
8046 *
8047 * Returns 0 always to allow force shutdown even in case of errors.
8048 */
8049int ufshcd_shutdown(struct ufs_hba *hba)
8050{
8051 int ret = 0;
8052
8053 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
8054 goto out;
8055
8056 if (pm_runtime_suspended(hba->dev)) {
8057 ret = ufshcd_runtime_resume(hba);
8058 if (ret)
8059 goto out;
8060 }
8061
8062 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
8063out:
8064 if (ret)
8065 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
8066 /* allow force shutdown even in case of errors */
8067 return 0;
8068}
8069EXPORT_SYMBOL(ufshcd_shutdown);
8070
8071/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308072 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308073 * data structure memory
Bart Van Assche8aa29f12018-03-01 15:07:20 -08008074 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308075 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308076void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308077{
Avri Altmandf032bf2018-10-07 17:30:35 +03008078 ufs_bsg_remove(hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008079 ufs_sysfs_remove_nodes(hba->dev);
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05308080 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308081 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308082 ufshcd_disable_intr(hba, hba->intr_mask);
Yaniv Gardi596585a2016-03-10 17:37:08 +02008083 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308084
Vivek Gautameebcc192018-08-07 23:17:39 +05308085 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008086 ufshcd_exit_clk_gating(hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08008087 if (ufshcd_is_clkscaling_supported(hba))
8088 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008089 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308090}
8091EXPORT_SYMBOL_GPL(ufshcd_remove);
8092
8093/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02008094 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8095 * @hba: pointer to Host Bus Adapter (HBA)
8096 */
8097void ufshcd_dealloc_host(struct ufs_hba *hba)
8098{
8099 scsi_host_put(hba->host);
8100}
8101EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8102
8103/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008104 * ufshcd_set_dma_mask - Set dma mask based on the controller
8105 * addressing capability
8106 * @hba: per adapter instance
8107 *
8108 * Returns 0 for success, non-zero for failure
8109 */
8110static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8111{
8112 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8113 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8114 return 0;
8115 }
8116 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8117}
8118
8119/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008120 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308121 * @dev: pointer to device handle
8122 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308123 * Returns 0 on success, non-zero value on failure
8124 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008125int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308126{
8127 struct Scsi_Host *host;
8128 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008129 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308130
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308131 if (!dev) {
8132 dev_err(dev,
8133 "Invalid memory reference for dev is NULL\n");
8134 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308135 goto out_error;
8136 }
8137
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308138 host = scsi_host_alloc(&ufshcd_driver_template,
8139 sizeof(struct ufs_hba));
8140 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308141 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308142 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308143 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308144 }
8145 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308146 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308147 hba->dev = dev;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008148 *hba_handle = hba;
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05308149 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008150
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03008151 INIT_LIST_HEAD(&hba->clk_list_head);
8152
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008153out_error:
8154 return err;
8155}
8156EXPORT_SYMBOL(ufshcd_alloc_host);
8157
8158/**
8159 * ufshcd_init - Driver initialization routine
8160 * @hba: per-adapter instance
8161 * @mmio_base: base register address
8162 * @irq: Interrupt line of device
8163 * Returns 0 on success, non-zero value on failure
8164 */
8165int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
8166{
8167 int err;
8168 struct Scsi_Host *host = hba->host;
8169 struct device *dev = hba->dev;
8170
8171 if (!mmio_base) {
8172 dev_err(hba->dev,
8173 "Invalid memory reference for mmio_base is NULL\n");
8174 err = -ENODEV;
8175 goto out_error;
8176 }
8177
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308178 hba->mmio_base = mmio_base;
8179 hba->irq = irq;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308180
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00008181 /* Set descriptor lengths to specification defaults */
8182 ufshcd_def_desc_sizes(hba);
8183
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008184 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008185 if (err)
8186 goto out_error;
8187
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308188 /* Read capabilities registers */
8189 ufshcd_hba_capabilities(hba);
8190
8191 /* Get UFS version supported by the controller */
8192 hba->ufs_version = ufshcd_get_ufs_version(hba);
8193
Yaniv Gardic01848c2016-12-05 19:25:02 -08008194 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
8195 (hba->ufs_version != UFSHCI_VERSION_11) &&
8196 (hba->ufs_version != UFSHCI_VERSION_20) &&
8197 (hba->ufs_version != UFSHCI_VERSION_21))
8198 dev_err(hba->dev, "invalid UFS version 0x%x\n",
8199 hba->ufs_version);
8200
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308201 /* Get Interrupt bit mask per version */
8202 hba->intr_mask = ufshcd_get_intr_mask(hba);
8203
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008204 err = ufshcd_set_dma_mask(hba);
8205 if (err) {
8206 dev_err(hba->dev, "set dma mask failed\n");
8207 goto out_disable;
8208 }
8209
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308210 /* Allocate memory for host memory space */
8211 err = ufshcd_memory_alloc(hba);
8212 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308213 dev_err(hba->dev, "Memory allocation failed\n");
8214 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308215 }
8216
8217 /* Configure LRB */
8218 ufshcd_host_memory_configure(hba);
8219
8220 host->can_queue = hba->nutrs;
8221 host->cmd_per_lun = hba->nutrs;
8222 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03008223 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308224 host->max_channel = UFSHCD_MAX_CHANNEL;
8225 host->unique_id = host->host_no;
Avri Altmana851b2b2018-10-07 17:30:34 +03008226 host->max_cmd_len = UFS_CDB_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308227
Dolev Raviv7eb584d2014-09-25 15:32:31 +03008228 hba->max_pwr_info.is_valid = false;
8229
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308230 /* Initailize wait queue for task management */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05308231 init_waitqueue_head(&hba->tm_wq);
8232 init_waitqueue_head(&hba->tm_tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308233
8234 /* Initialize work queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05308235 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308236 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308237
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308238 /* Initialize UIC command mutex */
8239 mutex_init(&hba->uic_cmd_mutex);
8240
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308241 /* Initialize mutex for device management commands */
8242 mutex_init(&hba->dev_cmd.lock);
8243
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08008244 init_rwsem(&hba->clk_scaling_lock);
8245
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308246 /* Initialize device management tag acquire wait queue */
8247 init_waitqueue_head(&hba->dev_cmd.tag_wq);
8248
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008249 ufshcd_init_clk_gating(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02008250
Vivek Gautameebcc192018-08-07 23:17:39 +05308251 ufshcd_init_clk_scaling(hba);
8252
Yaniv Gardi199ef132016-03-10 17:37:06 +02008253 /*
8254 * In order to avoid any spurious interrupt immediately after
8255 * registering UFS controller interrupt handler, clear any pending UFS
8256 * interrupt status and disable all the UFS interrupts.
8257 */
8258 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
8259 REG_INTERRUPT_STATUS);
8260 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
8261 /*
8262 * Make sure that UFS interrupts are disabled and any pending interrupt
8263 * status is cleared before registering UFS interrupt handler.
8264 */
8265 mb();
8266
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308267 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09008268 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308269 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308270 dev_err(hba->dev, "request irq failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008271 goto exit_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008272 } else {
8273 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308274 }
8275
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308276 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308277 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308278 dev_err(hba->dev, "scsi_add_host failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008279 goto exit_gating;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308280 }
8281
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308282 /* Host controller enable */
8283 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308284 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308285 dev_err(hba->dev, "Host controller enable failed\n");
Dolev Raviv66cc8202016-12-22 18:39:42 -08008286 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08008287 ufshcd_print_host_state(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308288 goto out_remove_scsi_host;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308289 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308290
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -08008291 /*
8292 * Set the default power management level for runtime and system PM.
8293 * Default power saving mode is to keep UFS link in Hibern8 state
8294 * and UFS device in sleep state.
8295 */
8296 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8297 UFS_SLEEP_PWR_MODE,
8298 UIC_LINK_HIBERN8_STATE);
8299 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8300 UFS_SLEEP_PWR_MODE,
8301 UIC_LINK_HIBERN8_STATE);
8302
Adrian Hunterad448372018-03-20 15:07:38 +02008303 /* Set the default auto-hiberate idle timer value to 150 ms */
8304 if (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) {
8305 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8306 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8307 }
8308
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05308309 /* Hold auto suspend until async scan completes */
8310 pm_runtime_get_sync(dev);
Subhash Jadavani38135532018-05-03 16:37:18 +05308311 atomic_set(&hba->scsi_block_reqs_cnt, 0);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008312 /*
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008313 * We are assuming that device wasn't put in sleep/power-down
8314 * state exclusively during the boot stage before kernel.
8315 * This assumption helps avoid doing link startup twice during
8316 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008317 */
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008318 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008319
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308320 async_schedule(ufshcd_async_scan, hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008321 ufs_sysfs_add_nodes(hba->dev);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308322
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308323 return 0;
8324
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308325out_remove_scsi_host:
8326 scsi_remove_host(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008327exit_gating:
Vivek Gautameebcc192018-08-07 23:17:39 +05308328 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008329 ufshcd_exit_clk_gating(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308330out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008331 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008332 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308333out_error:
8334 return err;
8335}
8336EXPORT_SYMBOL_GPL(ufshcd_init);
8337
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308338MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8339MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05308340MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308341MODULE_LICENSE("GPL");
8342MODULE_VERSION(UFSHCD_DRIVER_VERSION);