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Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05302 * Universal Flash Storage Host controller driver Core
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303 *
4 * This code is based on drivers/scsi/ufs/ufshcd.c
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053011 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053016 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053018 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053024 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030035 *
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053038 */
39
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053040#include <linux/async.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030041#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020042#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020043#include <linux/of.h>
Adrian Hunterad448372018-03-20 15:07:38 +020044#include <linux/bitfield.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053045#include "ufshcd.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020046#include "ufs_quirks.h"
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +053047#include "unipro.h"
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +020048#include "ufs-sysfs.h"
Avri Altmandf032bf2018-10-07 17:30:35 +030049#include "ufs_bsg.h"
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053050
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -080051#define CREATE_TRACE_POINTS
52#include <trace/events/ufs.h>
53
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053054#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
55 UTP_TASK_REQ_COMPL |\
56 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053057/* UIC command timeout, unit: ms */
58#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053059
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053060/* NOP OUT retries waiting for NOP IN response */
61#define NOP_OUT_RETRIES 10
62/* Timeout after 30 msecs if NOP OUT hangs without response */
63#define NOP_OUT_TIMEOUT 30 /* msecs */
64
Dolev Raviv68078d52013-07-30 00:35:58 +053065/* Query request retries */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080066#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +053067/* Query request timeout */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080068#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +053069
Sujit Reddy Thummae2933132014-05-26 10:59:12 +053070/* Task management command timeout */
71#define TM_CMD_TIMEOUT 100 /* msecs */
72
Yaniv Gardi64238fb2016-02-01 15:02:43 +020073/* maximum number of retries for a general UIC command */
74#define UFS_UIC_COMMAND_RETRIES 3
75
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030076/* maximum number of link-startup retries */
77#define DME_LINKSTARTUP_RETRIES 3
78
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +020079/* Maximum retries for Hibern8 enter */
80#define UIC_HIBERN8_ENTER_RETRIES 3
81
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030082/* maximum number of reset retries before giving up */
83#define MAX_HOST_RESET_RETRIES 5
84
Dolev Raviv68078d52013-07-30 00:35:58 +053085/* Expose the flag value from utp_upiu_query.value */
86#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
87
Seungwon Jeon7d568652013-08-31 21:40:20 +053088/* Interrupt aggregation default timeout, unit: 40us */
89#define INT_AGGR_DEF_TO 0x02
90
Stanley Chu49615ba2019-09-16 23:56:50 +080091/* default delay of autosuspend: 2000 ms */
92#define RPM_AUTOSUSPEND_DELAY_MS 2000
93
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030094#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
95 ({ \
96 int _ret; \
97 if (_on) \
98 _ret = ufshcd_enable_vreg(_dev, _vreg); \
99 else \
100 _ret = ufshcd_disable_vreg(_dev, _vreg); \
101 _ret; \
102 })
103
Tomas Winklerba809172018-06-14 11:14:09 +0300104#define ufshcd_hex_dump(prefix_str, buf, len) do { \
105 size_t __len = (len); \
106 print_hex_dump(KERN_ERR, prefix_str, \
107 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
108 16, 4, buf, __len, false); \
109} while (0)
110
111int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
112 const char *prefix)
113{
Marc Gonzalezd6724752019-01-22 18:29:22 +0100114 u32 *regs;
115 size_t pos;
116
117 if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
118 return -EINVAL;
Tomas Winklerba809172018-06-14 11:14:09 +0300119
Can Guocddaeba2019-11-14 22:09:27 -0800120 regs = kzalloc(len, GFP_ATOMIC);
Tomas Winklerba809172018-06-14 11:14:09 +0300121 if (!regs)
122 return -ENOMEM;
123
Marc Gonzalezd6724752019-01-22 18:29:22 +0100124 for (pos = 0; pos < len; pos += 4)
125 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
126
Tomas Winklerba809172018-06-14 11:14:09 +0300127 ufshcd_hex_dump(prefix, regs, len);
128 kfree(regs);
129
130 return 0;
131}
132EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800133
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530134enum {
135 UFSHCD_MAX_CHANNEL = 0,
136 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530137 UFSHCD_CMD_PER_LUN = 32,
138 UFSHCD_CAN_QUEUE = 32,
139};
140
141/* UFSHCD states */
142enum {
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530143 UFSHCD_STATE_RESET,
144 UFSHCD_STATE_ERROR,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530145 UFSHCD_STATE_OPERATIONAL,
Zang Leigang141f8162016-11-16 11:29:37 +0800146 UFSHCD_STATE_EH_SCHEDULED,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530147};
148
149/* UFSHCD error handling flags */
150enum {
151 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530152};
153
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530154/* UFSHCD UIC layer error flags */
155enum {
156 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200157 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
158 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
159 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
160 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
161 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530162};
163
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530164#define ufshcd_set_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300165 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530166#define ufshcd_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300167 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530168#define ufshcd_clear_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300169 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530170
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300171#define ufshcd_set_ufs_dev_active(h) \
172 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
173#define ufshcd_set_ufs_dev_sleep(h) \
174 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
175#define ufshcd_set_ufs_dev_poweroff(h) \
176 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
177#define ufshcd_is_ufs_dev_active(h) \
178 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
179#define ufshcd_is_ufs_dev_sleep(h) \
180 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
181#define ufshcd_is_ufs_dev_poweroff(h) \
182 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
183
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +0200184struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300185 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
186 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
187 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
188 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
189 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
190 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
191};
192
193static inline enum ufs_dev_pwr_mode
194ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
195{
196 return ufs_pm_lvl_states[lvl].dev_state;
197}
198
199static inline enum uic_link_state
200ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
201{
202 return ufs_pm_lvl_states[lvl].link_state;
203}
204
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -0800205static inline enum ufs_pm_level
206ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
207 enum uic_link_state link_state)
208{
209 enum ufs_pm_level lvl;
210
211 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
212 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
213 (ufs_pm_lvl_states[lvl].link_state == link_state))
214 return lvl;
215 }
216
217 /* if no match found, return the level 0 */
218 return UFS_PM_LVL_0;
219}
220
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800221static struct ufs_dev_fix ufs_fixups[] = {
222 /* UFS cards deviations table */
223 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
224 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800225 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
226 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
227 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800228 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
229 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
230 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
231 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
232 UFS_DEVICE_QUIRK_PA_TACTIVATE),
233 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
234 UFS_DEVICE_QUIRK_PA_TACTIVATE),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800235 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
236 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
Wei Li8e4829c2018-11-08 09:08:29 -0800237 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
238 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800239
240 END_FIX
241};
242
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -0800243static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530244static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530245static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Dolev Ravive7d38252016-12-22 18:40:07 -0800246static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530247static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300248static void ufshcd_hba_exit(struct ufs_hba *hba);
249static int ufshcd_probe_hba(struct ufs_hba *hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300250static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
251 bool skip_ref_clk);
252static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
253static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
254static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300255static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300256static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800257static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
258static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800259static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800260static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300261static irqreturn_t ufshcd_intr(int irq, void *__hba);
Yaniv Gardi874237f2015-05-17 18:55:03 +0300262static int ufshcd_change_power_mode(struct ufs_hba *hba,
263 struct ufs_pa_layer_attr *pwr_mode);
Yaniv Gardi14497322016-02-01 15:02:39 +0200264static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
265{
266 return tag >= 0 && tag < hba->nutrs;
267}
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300268
Can Guo5231d382019-12-05 02:14:46 +0000269static inline void ufshcd_enable_irq(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300270{
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300271 if (!hba->is_irq_enabled) {
Can Guo5231d382019-12-05 02:14:46 +0000272 enable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300273 hba->is_irq_enabled = true;
274 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300275}
276
277static inline void ufshcd_disable_irq(struct ufs_hba *hba)
278{
279 if (hba->is_irq_enabled) {
Can Guo5231d382019-12-05 02:14:46 +0000280 disable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300281 hba->is_irq_enabled = false;
282 }
283}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530284
Subhash Jadavani38135532018-05-03 16:37:18 +0530285static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
286{
287 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
288 scsi_unblock_requests(hba->host);
289}
290
291static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
292{
293 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
294 scsi_block_requests(hba->host);
295}
296
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300297static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
298 const char *str)
299{
300 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
301
302 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
303}
304
305static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
306 const char *str)
307{
308 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
309
310 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
311}
312
313static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
314 const char *str)
315{
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300316 int off = (int)tag - hba->nutrs;
Christoph Hellwig391e3882018-10-07 17:30:32 +0300317 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300318
Christoph Hellwig391e3882018-10-07 17:30:32 +0300319 trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
320 &descp->input_param1);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300321}
322
Lee Susman1a07f2d2016-12-22 18:42:03 -0800323static void ufshcd_add_command_trace(struct ufs_hba *hba,
324 unsigned int tag, const char *str)
325{
326 sector_t lba = -1;
327 u8 opcode = 0;
328 u32 intr, doorbell;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300329 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
Lee Susman1a07f2d2016-12-22 18:42:03 -0800330 int transfer_len = -1;
331
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300332 if (!trace_ufshcd_command_enabled()) {
333 /* trace UPIU W/O tracing command */
334 if (lrbp->cmd)
335 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800336 return;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300337 }
Lee Susman1a07f2d2016-12-22 18:42:03 -0800338
339 if (lrbp->cmd) { /* data phase exists */
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300340 /* trace UPIU also */
341 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800342 opcode = (u8)(*lrbp->cmd->cmnd);
343 if ((opcode == READ_10) || (opcode == WRITE_10)) {
344 /*
345 * Currently we only fully trace read(10) and write(10)
346 * commands
347 */
348 if (lrbp->cmd->request && lrbp->cmd->request->bio)
349 lba =
350 lrbp->cmd->request->bio->bi_iter.bi_sector;
351 transfer_len = be32_to_cpu(
352 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
353 }
354 }
355
356 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
357 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
358 trace_ufshcd_command(dev_name(hba->dev), str, tag,
359 doorbell, transfer_len, intr, lba, opcode);
360}
361
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800362static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
363{
364 struct ufs_clk_info *clki;
365 struct list_head *head = &hba->clk_list_head;
366
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300367 if (list_empty(head))
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800368 return;
369
370 list_for_each_entry(clki, head, list) {
371 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
372 clki->max_freq)
373 dev_err(hba->dev, "clk: %s, rate: %u\n",
374 clki->name, clki->curr_freq);
375 }
376}
377
Stanley Chu48d5b972019-07-10 21:38:18 +0800378static void ufshcd_print_err_hist(struct ufs_hba *hba,
379 struct ufs_err_reg_hist *err_hist,
380 char *err_name)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800381{
382 int i;
Stanley Chu27752642019-01-28 22:04:26 +0800383 bool found = false;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800384
Stanley Chu48d5b972019-07-10 21:38:18 +0800385 for (i = 0; i < UFS_ERR_REG_HIST_LENGTH; i++) {
386 int p = (i + err_hist->pos) % UFS_ERR_REG_HIST_LENGTH;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800387
388 if (err_hist->reg[p] == 0)
389 continue;
Stanley Chuc5397f12019-07-10 21:38:20 +0800390 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800391 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
Stanley Chu27752642019-01-28 22:04:26 +0800392 found = true;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800393 }
Stanley Chu27752642019-01-28 22:04:26 +0800394
395 if (!found)
Stanley Chu48d5b972019-07-10 21:38:18 +0800396 dev_err(hba->dev, "No record of %s errors\n", err_name);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800397}
398
Dolev Raviv66cc8202016-12-22 18:39:42 -0800399static void ufshcd_print_host_regs(struct ufs_hba *hba)
400{
Tomas Winklerba809172018-06-14 11:14:09 +0300401 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
Dolev Raviv66cc8202016-12-22 18:39:42 -0800402 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
403 hba->ufs_version, hba->capabilities);
404 dev_err(hba->dev,
405 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
406 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800407 dev_err(hba->dev,
408 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
409 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
410 hba->ufs_stats.hibern8_exit_cnt);
411
Stanley Chu48d5b972019-07-10 21:38:18 +0800412 ufshcd_print_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
413 ufshcd_print_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
414 ufshcd_print_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
415 ufshcd_print_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
416 ufshcd_print_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
Stanley Chud3c615b2019-07-10 21:38:19 +0800417 ufshcd_print_err_hist(hba, &hba->ufs_stats.auto_hibern8_err,
418 "auto_hibern8_err");
Stanley Chu8808b4e2019-07-10 21:38:21 +0800419 ufshcd_print_err_hist(hba, &hba->ufs_stats.fatal_err, "fatal_err");
420 ufshcd_print_err_hist(hba, &hba->ufs_stats.link_startup_err,
421 "link_startup_fail");
422 ufshcd_print_err_hist(hba, &hba->ufs_stats.resume_err, "resume_fail");
423 ufshcd_print_err_hist(hba, &hba->ufs_stats.suspend_err,
424 "suspend_fail");
425 ufshcd_print_err_hist(hba, &hba->ufs_stats.dev_reset, "dev_reset");
426 ufshcd_print_err_hist(hba, &hba->ufs_stats.host_reset, "host_reset");
427 ufshcd_print_err_hist(hba, &hba->ufs_stats.task_abort, "task_abort");
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800428
429 ufshcd_print_clk_freqs(hba);
430
431 if (hba->vops && hba->vops->dbg_register_dump)
432 hba->vops->dbg_register_dump(hba);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800433}
434
435static
436void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
437{
438 struct ufshcd_lrb *lrbp;
Gilad Broner7fabb772017-02-03 16:56:50 -0800439 int prdt_length;
Dolev Raviv66cc8202016-12-22 18:39:42 -0800440 int tag;
441
442 for_each_set_bit(tag, &bitmap, hba->nutrs) {
443 lrbp = &hba->lrb[tag];
444
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800445 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
446 tag, ktime_to_us(lrbp->issue_time_stamp));
Zang Leigang09017182017-09-27 10:06:06 +0800447 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
448 tag, ktime_to_us(lrbp->compl_time_stamp));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800449 dev_err(hba->dev,
450 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
451 tag, (u64)lrbp->utrd_dma_addr);
452
Dolev Raviv66cc8202016-12-22 18:39:42 -0800453 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
454 sizeof(struct utp_transfer_req_desc));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800455 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
456 (u64)lrbp->ucd_req_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800457 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
458 sizeof(struct utp_upiu_req));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800459 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
460 (u64)lrbp->ucd_rsp_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800461 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
462 sizeof(struct utp_upiu_rsp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800463
Gilad Broner7fabb772017-02-03 16:56:50 -0800464 prdt_length = le16_to_cpu(
465 lrbp->utr_descriptor_ptr->prd_table_length);
466 dev_err(hba->dev,
467 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
468 tag, prdt_length,
469 (u64)lrbp->ucd_prdt_dma_addr);
470
471 if (pr_prdt)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800472 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
Gilad Broner7fabb772017-02-03 16:56:50 -0800473 sizeof(struct ufshcd_sg_entry) * prdt_length);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800474 }
475}
476
477static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
478{
Dolev Raviv66cc8202016-12-22 18:39:42 -0800479 int tag;
480
481 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
Christoph Hellwig391e3882018-10-07 17:30:32 +0300482 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
483
Dolev Raviv66cc8202016-12-22 18:39:42 -0800484 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
Christoph Hellwig391e3882018-10-07 17:30:32 +0300485 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800486 }
487}
488
Gilad Broner6ba65582017-02-03 16:57:28 -0800489static void ufshcd_print_host_state(struct ufs_hba *hba)
490{
491 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
Bart Van Assche7252a362019-12-09 10:13:08 -0800492 dev_err(hba->dev, "outstanding reqs=0x%lx tasks=0x%lx\n",
493 hba->outstanding_reqs, hba->outstanding_tasks);
Gilad Broner6ba65582017-02-03 16:57:28 -0800494 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
495 hba->saved_err, hba->saved_uic_err);
496 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
497 hba->curr_dev_pwr_mode, hba->uic_link_state);
498 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
499 hba->pm_op_in_progress, hba->is_sys_suspended);
500 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
501 hba->auto_bkops_enabled, hba->host->host_self_blocked);
502 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
503 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
504 hba->eh_flags, hba->req_abort_count);
505 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
506 hba->capabilities, hba->caps);
507 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
508 hba->dev_quirks);
509}
510
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800511/**
512 * ufshcd_print_pwr_info - print power params as saved in hba
513 * power info
514 * @hba: per-adapter instance
515 */
516static void ufshcd_print_pwr_info(struct ufs_hba *hba)
517{
518 static const char * const names[] = {
519 "INVALID MODE",
520 "FAST MODE",
521 "SLOW_MODE",
522 "INVALID MODE",
523 "FASTAUTO_MODE",
524 "SLOWAUTO_MODE",
525 "INVALID MODE",
526 };
527
528 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
529 __func__,
530 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
531 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
532 names[hba->pwr_info.pwr_rx],
533 names[hba->pwr_info.pwr_tx],
534 hba->pwr_info.hs_rate);
535}
536
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530537/*
538 * ufshcd_wait_for_register - wait for register value to change
539 * @hba - per-adapter interface
540 * @reg - mmio register offset
541 * @mask - mask to apply to read register value
542 * @val - wait condition
543 * @interval_us - polling interval in microsecs
544 * @timeout_ms - timeout in millisecs
Yaniv Gardi596585a2016-03-10 17:37:08 +0200545 * @can_sleep - perform sleep or just spin
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530546 *
547 * Returns -ETIMEDOUT on error, zero on success
548 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200549int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
550 u32 val, unsigned long interval_us,
551 unsigned long timeout_ms, bool can_sleep)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530552{
553 int err = 0;
554 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
555
556 /* ignore bits that we don't intend to wait on */
557 val = val & mask;
558
559 while ((ufshcd_readl(hba, reg) & mask) != val) {
Yaniv Gardi596585a2016-03-10 17:37:08 +0200560 if (can_sleep)
561 usleep_range(interval_us, interval_us + 50);
562 else
563 udelay(interval_us);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530564 if (time_after(jiffies, timeout)) {
565 if ((ufshcd_readl(hba, reg) & mask) != val)
566 err = -ETIMEDOUT;
567 break;
568 }
569 }
570
571 return err;
572}
573
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530574/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530575 * ufshcd_get_intr_mask - Get the interrupt bit mask
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800576 * @hba: Pointer to adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530577 *
578 * Returns interrupt bit mask per version
579 */
580static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
581{
Yaniv Gardic01848c2016-12-05 19:25:02 -0800582 u32 intr_mask = 0;
583
584 switch (hba->ufs_version) {
585 case UFSHCI_VERSION_10:
586 intr_mask = INTERRUPT_MASK_ALL_VER_10;
587 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800588 case UFSHCI_VERSION_11:
589 case UFSHCI_VERSION_20:
590 intr_mask = INTERRUPT_MASK_ALL_VER_11;
591 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800592 case UFSHCI_VERSION_21:
593 default:
594 intr_mask = INTERRUPT_MASK_ALL_VER_21;
Tomohiro Kusumi031d1e02017-03-23 12:49:04 +0200595 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800596 }
597
598 return intr_mask;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530599}
600
601/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530602 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800603 * @hba: Pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530604 *
605 * Returns UFSHCI version supported by the controller
606 */
607static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
608{
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200609 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
610 return ufshcd_vops_get_ufs_hci_version(hba);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300611
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530612 return ufshcd_readl(hba, REG_UFS_VERSION);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530613}
614
615/**
616 * ufshcd_is_device_present - Check if any device connected to
617 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300618 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530619 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300620 * Returns true if device present, false if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530621 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300622static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530623{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300624 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300625 DEVICE_PRESENT) ? true : false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530626}
627
628/**
629 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800630 * @lrbp: pointer to local command reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530631 *
632 * This function is used to get the OCS field from UTRD
633 * Returns the OCS field in the UTRD
634 */
635static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
636{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530637 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530638}
639
640/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530641 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
642 * @hba: per adapter instance
643 * @pos: position of the bit to be cleared
644 */
645static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
646{
Alim Akhtar1399c5b2018-05-06 15:44:15 +0530647 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
648 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
649 else
650 ufshcd_writel(hba, ~(1 << pos),
651 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
652}
653
654/**
655 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
656 * @hba: per adapter instance
657 * @pos: position of the bit to be cleared
658 */
659static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
660{
661 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
662 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
663 else
664 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530665}
666
667/**
Yaniv Gardia48353f2016-02-01 15:02:40 +0200668 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
669 * @hba: per adapter instance
670 * @tag: position of the bit to be cleared
671 */
672static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
673{
674 __clear_bit(tag, &hba->outstanding_reqs);
675}
676
677/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530678 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
679 * @reg: Register value of host controller status
680 *
681 * Returns integer, 0 on Success and positive value if failed
682 */
683static inline int ufshcd_get_lists_status(u32 reg)
684{
Tomohiro Kusumi6cf16112017-04-26 20:28:58 +0300685 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530686}
687
688/**
689 * ufshcd_get_uic_cmd_result - Get the UIC command result
690 * @hba: Pointer to adapter instance
691 *
692 * This function gets the result of UIC command completion
693 * Returns 0 on success, non zero value on error
694 */
695static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
696{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530697 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530698 MASK_UIC_COMMAND_RESULT;
699}
700
701/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530702 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
703 * @hba: Pointer to adapter instance
704 *
705 * This function gets UIC command argument3
706 * Returns 0 on success, non zero value on error
707 */
708static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
709{
710 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
711}
712
713/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530714 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530715 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530716 */
717static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530718ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530719{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530720 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530721}
722
723/**
724 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
725 * @ucd_rsp_ptr: pointer to response UPIU
726 *
727 * This function gets the response status and scsi_status from response UPIU
728 * Returns the response result code.
729 */
730static inline int
731ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
732{
733 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
734}
735
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530736/*
737 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
738 * from response UPIU
739 * @ucd_rsp_ptr: pointer to response UPIU
740 *
741 * Return the data segment length.
742 */
743static inline unsigned int
744ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
745{
746 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
747 MASK_RSP_UPIU_DATA_SEG_LEN;
748}
749
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530750/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530751 * ufshcd_is_exception_event - Check if the device raised an exception event
752 * @ucd_rsp_ptr: pointer to response UPIU
753 *
754 * The function checks if the device raised an exception event indicated in
755 * the Device Information field of response UPIU.
756 *
757 * Returns true if exception is raised, false otherwise.
758 */
759static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
760{
761 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
762 MASK_RSP_EXCEPTION_EVENT ? true : false;
763}
764
765/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530766 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530767 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530768 */
769static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530770ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530771{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530772 ufshcd_writel(hba, INT_AGGR_ENABLE |
773 INT_AGGR_COUNTER_AND_TIMER_RESET,
774 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
775}
776
777/**
778 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
779 * @hba: per adapter instance
780 * @cnt: Interrupt aggregation counter threshold
781 * @tmout: Interrupt aggregation timeout value
782 */
783static inline void
784ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
785{
786 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
787 INT_AGGR_COUNTER_THLD_VAL(cnt) |
788 INT_AGGR_TIMEOUT_VAL(tmout),
789 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530790}
791
792/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300793 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
794 * @hba: per adapter instance
795 */
796static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
797{
798 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
799}
800
801/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530802 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
803 * When run-stop registers are set to 1, it indicates the
804 * host controller that it can process the requests
805 * @hba: per adapter instance
806 */
807static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
808{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530809 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
810 REG_UTP_TASK_REQ_LIST_RUN_STOP);
811 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
812 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530813}
814
815/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530816 * ufshcd_hba_start - Start controller initialization sequence
817 * @hba: per adapter instance
818 */
819static inline void ufshcd_hba_start(struct ufs_hba *hba)
820{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530821 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530822}
823
824/**
825 * ufshcd_is_hba_active - Get controller state
826 * @hba: per adapter instance
827 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300828 * Returns false if controller is active, true otherwise
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530829 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300830static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530831{
Tomohiro Kusumi4a8eec22017-03-28 16:49:25 +0300832 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
833 ? false : true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530834}
835
Yaniv Gardi37113102016-03-10 17:37:16 +0200836u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
837{
838 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
839 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
840 (hba->ufs_version == UFSHCI_VERSION_11))
841 return UFS_UNIPRO_VER_1_41;
842 else
843 return UFS_UNIPRO_VER_1_6;
844}
845EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
846
847static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
848{
849 /*
850 * If both host and device support UniPro ver1.6 or later, PA layer
851 * parameters tuning happens during link startup itself.
852 *
853 * We can manually tune PA layer parameters if either host or device
854 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
855 * logic simple, we will only do manual tuning if local unipro version
856 * doesn't support ver1.6 or later.
857 */
858 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
859 return true;
860 else
861 return false;
862}
863
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800864static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
865{
866 int ret = 0;
867 struct ufs_clk_info *clki;
868 struct list_head *head = &hba->clk_list_head;
869 ktime_t start = ktime_get();
870 bool clk_state_changed = false;
871
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300872 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800873 goto out;
874
875 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
876 if (ret)
877 return ret;
878
879 list_for_each_entry(clki, head, list) {
880 if (!IS_ERR_OR_NULL(clki->clk)) {
881 if (scale_up && clki->max_freq) {
882 if (clki->curr_freq == clki->max_freq)
883 continue;
884
885 clk_state_changed = true;
886 ret = clk_set_rate(clki->clk, clki->max_freq);
887 if (ret) {
888 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
889 __func__, clki->name,
890 clki->max_freq, ret);
891 break;
892 }
893 trace_ufshcd_clk_scaling(dev_name(hba->dev),
894 "scaled up", clki->name,
895 clki->curr_freq,
896 clki->max_freq);
897
898 clki->curr_freq = clki->max_freq;
899
900 } else if (!scale_up && clki->min_freq) {
901 if (clki->curr_freq == clki->min_freq)
902 continue;
903
904 clk_state_changed = true;
905 ret = clk_set_rate(clki->clk, clki->min_freq);
906 if (ret) {
907 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
908 __func__, clki->name,
909 clki->min_freq, ret);
910 break;
911 }
912 trace_ufshcd_clk_scaling(dev_name(hba->dev),
913 "scaled down", clki->name,
914 clki->curr_freq,
915 clki->min_freq);
916 clki->curr_freq = clki->min_freq;
917 }
918 }
919 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
920 clki->name, clk_get_rate(clki->clk));
921 }
922
923 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
924
925out:
926 if (clk_state_changed)
927 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
928 (scale_up ? "up" : "down"),
929 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
930 return ret;
931}
932
933/**
934 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
935 * @hba: per adapter instance
936 * @scale_up: True if scaling up and false if scaling down
937 *
938 * Returns true if scaling is required, false otherwise.
939 */
940static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
941 bool scale_up)
942{
943 struct ufs_clk_info *clki;
944 struct list_head *head = &hba->clk_list_head;
945
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300946 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800947 return false;
948
949 list_for_each_entry(clki, head, list) {
950 if (!IS_ERR_OR_NULL(clki->clk)) {
951 if (scale_up && clki->max_freq) {
952 if (clki->curr_freq == clki->max_freq)
953 continue;
954 return true;
955 } else if (!scale_up && clki->min_freq) {
956 if (clki->curr_freq == clki->min_freq)
957 continue;
958 return true;
959 }
960 }
961 }
962
963 return false;
964}
965
966static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
967 u64 wait_timeout_us)
968{
969 unsigned long flags;
970 int ret = 0;
971 u32 tm_doorbell;
972 u32 tr_doorbell;
973 bool timeout = false, do_last_check = false;
974 ktime_t start;
975
976 ufshcd_hold(hba, false);
977 spin_lock_irqsave(hba->host->host_lock, flags);
978 /*
979 * Wait for all the outstanding tasks/transfer requests.
980 * Verify by checking the doorbell registers are clear.
981 */
982 start = ktime_get();
983 do {
984 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
985 ret = -EBUSY;
986 goto out;
987 }
988
989 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
990 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
991 if (!tm_doorbell && !tr_doorbell) {
992 timeout = false;
993 break;
994 } else if (do_last_check) {
995 break;
996 }
997
998 spin_unlock_irqrestore(hba->host->host_lock, flags);
999 schedule();
1000 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1001 wait_timeout_us) {
1002 timeout = true;
1003 /*
1004 * We might have scheduled out for long time so make
1005 * sure to check if doorbells are cleared by this time
1006 * or not.
1007 */
1008 do_last_check = true;
1009 }
1010 spin_lock_irqsave(hba->host->host_lock, flags);
1011 } while (tm_doorbell || tr_doorbell);
1012
1013 if (timeout) {
1014 dev_err(hba->dev,
1015 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1016 __func__, tm_doorbell, tr_doorbell);
1017 ret = -EBUSY;
1018 }
1019out:
1020 spin_unlock_irqrestore(hba->host->host_lock, flags);
1021 ufshcd_release(hba);
1022 return ret;
1023}
1024
1025/**
1026 * ufshcd_scale_gear - scale up/down UFS gear
1027 * @hba: per adapter instance
1028 * @scale_up: True for scaling up gear and false for scaling down
1029 *
1030 * Returns 0 for success,
1031 * Returns -EBUSY if scaling can't happen at this time
1032 * Returns non-zero for any other errors
1033 */
1034static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1035{
1036 #define UFS_MIN_GEAR_TO_SCALE_DOWN UFS_HS_G1
1037 int ret = 0;
1038 struct ufs_pa_layer_attr new_pwr_info;
1039
1040 if (scale_up) {
1041 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1042 sizeof(struct ufs_pa_layer_attr));
1043 } else {
1044 memcpy(&new_pwr_info, &hba->pwr_info,
1045 sizeof(struct ufs_pa_layer_attr));
1046
1047 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1048 || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1049 /* save the current power mode */
1050 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1051 &hba->pwr_info,
1052 sizeof(struct ufs_pa_layer_attr));
1053
1054 /* scale down gear */
1055 new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1056 new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1057 }
1058 }
1059
1060 /* check if the power mode needs to be changed or not? */
1061 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1062
1063 if (ret)
1064 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1065 __func__, ret,
1066 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1067 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1068
1069 return ret;
1070}
1071
1072static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1073{
1074 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1075 int ret = 0;
1076 /*
1077 * make sure that there are no outstanding requests when
1078 * clock scaling is in progress
1079 */
Subhash Jadavani38135532018-05-03 16:37:18 +05301080 ufshcd_scsi_block_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001081 down_write(&hba->clk_scaling_lock);
1082 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1083 ret = -EBUSY;
1084 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301085 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001086 }
1087
1088 return ret;
1089}
1090
1091static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1092{
1093 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301094 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001095}
1096
1097/**
1098 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1099 * @hba: per adapter instance
1100 * @scale_up: True for scaling up and false for scalin down
1101 *
1102 * Returns 0 for success,
1103 * Returns -EBUSY if scaling can't happen at this time
1104 * Returns non-zero for any other errors
1105 */
1106static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1107{
1108 int ret = 0;
1109
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001110 /* let's not get into low power until clock scaling is completed */
1111 ufshcd_hold(hba, false);
1112
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001113 ret = ufshcd_clock_scaling_prepare(hba);
1114 if (ret)
1115 return ret;
1116
1117 /* scale down the gear before scaling down clocks */
1118 if (!scale_up) {
1119 ret = ufshcd_scale_gear(hba, false);
1120 if (ret)
1121 goto out;
1122 }
1123
1124 ret = ufshcd_scale_clks(hba, scale_up);
1125 if (ret) {
1126 if (!scale_up)
1127 ufshcd_scale_gear(hba, true);
1128 goto out;
1129 }
1130
1131 /* scale up the gear after scaling up clocks */
1132 if (scale_up) {
1133 ret = ufshcd_scale_gear(hba, true);
1134 if (ret) {
1135 ufshcd_scale_clks(hba, false);
1136 goto out;
1137 }
1138 }
1139
1140 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1141
1142out:
1143 ufshcd_clock_scaling_unprepare(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001144 ufshcd_release(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001145 return ret;
1146}
1147
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001148static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1149{
1150 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1151 clk_scaling.suspend_work);
1152 unsigned long irq_flags;
1153
1154 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1155 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1156 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1157 return;
1158 }
1159 hba->clk_scaling.is_suspended = true;
1160 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1161
1162 __ufshcd_suspend_clkscaling(hba);
1163}
1164
1165static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1166{
1167 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1168 clk_scaling.resume_work);
1169 unsigned long irq_flags;
1170
1171 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1172 if (!hba->clk_scaling.is_suspended) {
1173 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1174 return;
1175 }
1176 hba->clk_scaling.is_suspended = false;
1177 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1178
1179 devfreq_resume_device(hba->devfreq);
1180}
1181
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001182static int ufshcd_devfreq_target(struct device *dev,
1183 unsigned long *freq, u32 flags)
1184{
1185 int ret = 0;
1186 struct ufs_hba *hba = dev_get_drvdata(dev);
1187 ktime_t start;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001188 bool scale_up, sched_clk_scaling_suspend_work = false;
Bjorn Andersson092b4552018-05-17 23:26:37 -07001189 struct list_head *clk_list = &hba->clk_list_head;
1190 struct ufs_clk_info *clki;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001191 unsigned long irq_flags;
1192
1193 if (!ufshcd_is_clkscaling_supported(hba))
1194 return -EINVAL;
1195
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001196 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1197 if (ufshcd_eh_in_progress(hba)) {
1198 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1199 return 0;
1200 }
1201
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001202 if (!hba->clk_scaling.active_reqs)
1203 sched_clk_scaling_suspend_work = true;
1204
Bjorn Andersson092b4552018-05-17 23:26:37 -07001205 if (list_empty(clk_list)) {
1206 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1207 goto out;
1208 }
1209
1210 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1211 scale_up = (*freq == clki->max_freq) ? true : false;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001212 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1213 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1214 ret = 0;
1215 goto out; /* no state change required */
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001216 }
1217 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1218
1219 start = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001220 ret = ufshcd_devfreq_scale(hba, scale_up);
1221
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001222 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1223 (scale_up ? "up" : "down"),
1224 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1225
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001226out:
1227 if (sched_clk_scaling_suspend_work)
1228 queue_work(hba->clk_scaling.workq,
1229 &hba->clk_scaling.suspend_work);
1230
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001231 return ret;
1232}
1233
Bart Van Assche7252a362019-12-09 10:13:08 -08001234static bool ufshcd_is_busy(struct request *req, void *priv, bool reserved)
1235{
1236 int *busy = priv;
1237
1238 WARN_ON_ONCE(reserved);
1239 (*busy)++;
1240 return false;
1241}
1242
1243/* Whether or not any tag is in use by a request that is in progress. */
1244static bool ufshcd_any_tag_in_use(struct ufs_hba *hba)
1245{
1246 struct request_queue *q = hba->cmd_queue;
1247 int busy = 0;
1248
1249 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_is_busy, &busy);
1250 return busy;
1251}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001252
1253static int ufshcd_devfreq_get_dev_status(struct device *dev,
1254 struct devfreq_dev_status *stat)
1255{
1256 struct ufs_hba *hba = dev_get_drvdata(dev);
1257 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1258 unsigned long flags;
1259
1260 if (!ufshcd_is_clkscaling_supported(hba))
1261 return -EINVAL;
1262
1263 memset(stat, 0, sizeof(*stat));
1264
1265 spin_lock_irqsave(hba->host->host_lock, flags);
1266 if (!scaling->window_start_t)
1267 goto start_window;
1268
1269 if (scaling->is_busy_started)
1270 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1271 scaling->busy_start_t));
1272
1273 stat->total_time = jiffies_to_usecs((long)jiffies -
1274 (long)scaling->window_start_t);
1275 stat->busy_time = scaling->tot_busy_t;
1276start_window:
1277 scaling->window_start_t = jiffies;
1278 scaling->tot_busy_t = 0;
1279
1280 if (hba->outstanding_reqs) {
1281 scaling->busy_start_t = ktime_get();
1282 scaling->is_busy_started = true;
1283 } else {
1284 scaling->busy_start_t = 0;
1285 scaling->is_busy_started = false;
1286 }
1287 spin_unlock_irqrestore(hba->host->host_lock, flags);
1288 return 0;
1289}
1290
1291static struct devfreq_dev_profile ufs_devfreq_profile = {
1292 .polling_ms = 100,
1293 .target = ufshcd_devfreq_target,
1294 .get_dev_status = ufshcd_devfreq_get_dev_status,
1295};
1296
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001297static int ufshcd_devfreq_init(struct ufs_hba *hba)
1298{
Bjorn Andersson092b4552018-05-17 23:26:37 -07001299 struct list_head *clk_list = &hba->clk_list_head;
1300 struct ufs_clk_info *clki;
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001301 struct devfreq *devfreq;
1302 int ret;
1303
Bjorn Andersson092b4552018-05-17 23:26:37 -07001304 /* Skip devfreq if we don't have any clocks in the list */
1305 if (list_empty(clk_list))
1306 return 0;
1307
1308 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1309 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1310 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1311
1312 devfreq = devfreq_add_device(hba->dev,
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001313 &ufs_devfreq_profile,
1314 DEVFREQ_GOV_SIMPLE_ONDEMAND,
1315 NULL);
1316 if (IS_ERR(devfreq)) {
1317 ret = PTR_ERR(devfreq);
1318 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001319
1320 dev_pm_opp_remove(hba->dev, clki->min_freq);
1321 dev_pm_opp_remove(hba->dev, clki->max_freq);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001322 return ret;
1323 }
1324
1325 hba->devfreq = devfreq;
1326
1327 return 0;
1328}
1329
Bjorn Andersson092b4552018-05-17 23:26:37 -07001330static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1331{
1332 struct list_head *clk_list = &hba->clk_list_head;
1333 struct ufs_clk_info *clki;
1334
1335 if (!hba->devfreq)
1336 return;
1337
1338 devfreq_remove_device(hba->devfreq);
1339 hba->devfreq = NULL;
1340
1341 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1342 dev_pm_opp_remove(hba->dev, clki->min_freq);
1343 dev_pm_opp_remove(hba->dev, clki->max_freq);
1344}
1345
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001346static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1347{
1348 unsigned long flags;
1349
1350 devfreq_suspend_device(hba->devfreq);
1351 spin_lock_irqsave(hba->host->host_lock, flags);
1352 hba->clk_scaling.window_start_t = 0;
1353 spin_unlock_irqrestore(hba->host->host_lock, flags);
1354}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001355
Gilad Bronera5082532016-10-17 17:10:00 -07001356static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1357{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001358 unsigned long flags;
1359 bool suspend = false;
1360
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001361 if (!ufshcd_is_clkscaling_supported(hba))
1362 return;
1363
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001364 spin_lock_irqsave(hba->host->host_lock, flags);
1365 if (!hba->clk_scaling.is_suspended) {
1366 suspend = true;
1367 hba->clk_scaling.is_suspended = true;
1368 }
1369 spin_unlock_irqrestore(hba->host->host_lock, flags);
1370
1371 if (suspend)
1372 __ufshcd_suspend_clkscaling(hba);
Gilad Bronera5082532016-10-17 17:10:00 -07001373}
1374
1375static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1376{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001377 unsigned long flags;
1378 bool resume = false;
1379
1380 if (!ufshcd_is_clkscaling_supported(hba))
1381 return;
1382
1383 spin_lock_irqsave(hba->host->host_lock, flags);
1384 if (hba->clk_scaling.is_suspended) {
1385 resume = true;
1386 hba->clk_scaling.is_suspended = false;
1387 }
1388 spin_unlock_irqrestore(hba->host->host_lock, flags);
1389
1390 if (resume)
1391 devfreq_resume_device(hba->devfreq);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001392}
1393
1394static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1395 struct device_attribute *attr, char *buf)
1396{
1397 struct ufs_hba *hba = dev_get_drvdata(dev);
1398
1399 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1400}
1401
1402static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1403 struct device_attribute *attr, const char *buf, size_t count)
1404{
1405 struct ufs_hba *hba = dev_get_drvdata(dev);
1406 u32 value;
1407 int err;
1408
1409 if (kstrtou32(buf, 0, &value))
1410 return -EINVAL;
1411
1412 value = !!value;
1413 if (value == hba->clk_scaling.is_allowed)
1414 goto out;
1415
1416 pm_runtime_get_sync(hba->dev);
1417 ufshcd_hold(hba, false);
1418
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001419 cancel_work_sync(&hba->clk_scaling.suspend_work);
1420 cancel_work_sync(&hba->clk_scaling.resume_work);
1421
1422 hba->clk_scaling.is_allowed = value;
1423
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001424 if (value) {
1425 ufshcd_resume_clkscaling(hba);
1426 } else {
1427 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001428 err = ufshcd_devfreq_scale(hba, true);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001429 if (err)
1430 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1431 __func__, err);
1432 }
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001433
1434 ufshcd_release(hba);
1435 pm_runtime_put_sync(hba->dev);
1436out:
1437 return count;
Gilad Bronera5082532016-10-17 17:10:00 -07001438}
1439
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001440static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1441{
1442 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1443 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1444 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1445 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1446 hba->clk_scaling.enable_attr.attr.mode = 0644;
1447 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1448 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1449}
1450
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001451static void ufshcd_ungate_work(struct work_struct *work)
1452{
1453 int ret;
1454 unsigned long flags;
1455 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1456 clk_gating.ungate_work);
1457
1458 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1459
1460 spin_lock_irqsave(hba->host->host_lock, flags);
1461 if (hba->clk_gating.state == CLKS_ON) {
1462 spin_unlock_irqrestore(hba->host->host_lock, flags);
1463 goto unblock_reqs;
1464 }
1465
1466 spin_unlock_irqrestore(hba->host->host_lock, flags);
1467 ufshcd_setup_clocks(hba, true);
1468
Stanley Chu8b0bbf02019-12-07 20:22:01 +08001469 ufshcd_enable_irq(hba);
1470
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001471 /* Exit from hibern8 */
1472 if (ufshcd_can_hibern8_during_gating(hba)) {
1473 /* Prevent gating in this path */
1474 hba->clk_gating.is_suspended = true;
1475 if (ufshcd_is_link_hibern8(hba)) {
1476 ret = ufshcd_uic_hibern8_exit(hba);
1477 if (ret)
1478 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1479 __func__, ret);
1480 else
1481 ufshcd_set_link_active(hba);
1482 }
1483 hba->clk_gating.is_suspended = false;
1484 }
1485unblock_reqs:
Subhash Jadavani38135532018-05-03 16:37:18 +05301486 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001487}
1488
1489/**
1490 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1491 * Also, exit from hibern8 mode and set the link as active.
1492 * @hba: per adapter instance
1493 * @async: This indicates whether caller should ungate clocks asynchronously.
1494 */
1495int ufshcd_hold(struct ufs_hba *hba, bool async)
1496{
1497 int rc = 0;
1498 unsigned long flags;
1499
1500 if (!ufshcd_is_clkgating_allowed(hba))
1501 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001502 spin_lock_irqsave(hba->host->host_lock, flags);
1503 hba->clk_gating.active_reqs++;
1504
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001505 if (ufshcd_eh_in_progress(hba)) {
1506 spin_unlock_irqrestore(hba->host->host_lock, flags);
1507 return 0;
1508 }
1509
Sahitya Tummala856b3482014-09-25 15:32:34 +03001510start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001511 switch (hba->clk_gating.state) {
1512 case CLKS_ON:
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001513 /*
1514 * Wait for the ungate work to complete if in progress.
1515 * Though the clocks may be in ON state, the link could
1516 * still be in hibner8 state if hibern8 is allowed
1517 * during clock gating.
1518 * Make sure we exit hibern8 state also in addition to
1519 * clocks being ON.
1520 */
1521 if (ufshcd_can_hibern8_during_gating(hba) &&
1522 ufshcd_is_link_hibern8(hba)) {
1523 spin_unlock_irqrestore(hba->host->host_lock, flags);
1524 flush_work(&hba->clk_gating.ungate_work);
1525 spin_lock_irqsave(hba->host->host_lock, flags);
1526 goto start;
1527 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001528 break;
1529 case REQ_CLKS_OFF:
1530 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1531 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001532 trace_ufshcd_clk_gating(dev_name(hba->dev),
1533 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001534 break;
1535 }
1536 /*
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +03001537 * If we are here, it means gating work is either done or
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001538 * currently running. Hence, fall through to cancel gating
1539 * work and to enable clocks.
1540 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001541 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001542 case CLKS_OFF:
Subhash Jadavani38135532018-05-03 16:37:18 +05301543 ufshcd_scsi_block_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001544 hba->clk_gating.state = REQ_CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001545 trace_ufshcd_clk_gating(dev_name(hba->dev),
1546 hba->clk_gating.state);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301547 queue_work(hba->clk_gating.clk_gating_workq,
1548 &hba->clk_gating.ungate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001549 /*
1550 * fall through to check if we should wait for this
1551 * work to be done or not.
1552 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001553 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001554 case REQ_CLKS_ON:
1555 if (async) {
1556 rc = -EAGAIN;
1557 hba->clk_gating.active_reqs--;
1558 break;
1559 }
1560
1561 spin_unlock_irqrestore(hba->host->host_lock, flags);
1562 flush_work(&hba->clk_gating.ungate_work);
1563 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001564 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001565 goto start;
1566 default:
1567 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1568 __func__, hba->clk_gating.state);
1569 break;
1570 }
1571 spin_unlock_irqrestore(hba->host->host_lock, flags);
1572out:
1573 return rc;
1574}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001575EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001576
1577static void ufshcd_gate_work(struct work_struct *work)
1578{
1579 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1580 clk_gating.gate_work.work);
1581 unsigned long flags;
1582
1583 spin_lock_irqsave(hba->host->host_lock, flags);
Venkat Gopalakrishnan3f0c06d2016-10-17 17:11:07 -07001584 /*
1585 * In case you are here to cancel this work the gating state
1586 * would be marked as REQ_CLKS_ON. In this case save time by
1587 * skipping the gating work and exit after changing the clock
1588 * state to CLKS_ON.
1589 */
1590 if (hba->clk_gating.is_suspended ||
Asutosh Das18f013742019-11-14 22:09:29 -08001591 (hba->clk_gating.state != REQ_CLKS_OFF)) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001592 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001593 trace_ufshcd_clk_gating(dev_name(hba->dev),
1594 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001595 goto rel_lock;
1596 }
1597
1598 if (hba->clk_gating.active_reqs
1599 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
Bart Van Assche7252a362019-12-09 10:13:08 -08001600 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001601 || hba->active_uic_cmd || hba->uic_async_done)
1602 goto rel_lock;
1603
1604 spin_unlock_irqrestore(hba->host->host_lock, flags);
1605
1606 /* put the link into hibern8 mode before turning off clocks */
1607 if (ufshcd_can_hibern8_during_gating(hba)) {
1608 if (ufshcd_uic_hibern8_enter(hba)) {
1609 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001610 trace_ufshcd_clk_gating(dev_name(hba->dev),
1611 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001612 goto out;
1613 }
1614 ufshcd_set_link_hibern8(hba);
1615 }
1616
Stanley Chu8b0bbf02019-12-07 20:22:01 +08001617 ufshcd_disable_irq(hba);
1618
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001619 if (!ufshcd_is_link_active(hba))
1620 ufshcd_setup_clocks(hba, false);
1621 else
1622 /* If link is active, device ref_clk can't be switched off */
1623 __ufshcd_setup_clocks(hba, false, true);
1624
1625 /*
1626 * In case you are here to cancel this work the gating state
1627 * would be marked as REQ_CLKS_ON. In this case keep the state
1628 * as REQ_CLKS_ON which would anyway imply that clocks are off
1629 * and a request to turn them on is pending. By doing this way,
1630 * we keep the state machine in tact and this would ultimately
1631 * prevent from doing cancel work multiple times when there are
1632 * new requests arriving before the current cancel work is done.
1633 */
1634 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001635 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001636 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001637 trace_ufshcd_clk_gating(dev_name(hba->dev),
1638 hba->clk_gating.state);
1639 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001640rel_lock:
1641 spin_unlock_irqrestore(hba->host->host_lock, flags);
1642out:
1643 return;
1644}
1645
1646/* host lock must be held before calling this variant */
1647static void __ufshcd_release(struct ufs_hba *hba)
1648{
1649 if (!ufshcd_is_clkgating_allowed(hba))
1650 return;
1651
1652 hba->clk_gating.active_reqs--;
1653
1654 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1655 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
Bart Van Assche7252a362019-12-09 10:13:08 -08001656 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001657 || hba->active_uic_cmd || hba->uic_async_done
1658 || ufshcd_eh_in_progress(hba))
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001659 return;
1660
1661 hba->clk_gating.state = REQ_CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001662 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Evan Greenf4bb7702018-10-05 10:27:32 -07001663 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1664 &hba->clk_gating.gate_work,
1665 msecs_to_jiffies(hba->clk_gating.delay_ms));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001666}
1667
1668void ufshcd_release(struct ufs_hba *hba)
1669{
1670 unsigned long flags;
1671
1672 spin_lock_irqsave(hba->host->host_lock, flags);
1673 __ufshcd_release(hba);
1674 spin_unlock_irqrestore(hba->host->host_lock, flags);
1675}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001676EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001677
1678static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1679 struct device_attribute *attr, char *buf)
1680{
1681 struct ufs_hba *hba = dev_get_drvdata(dev);
1682
1683 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1684}
1685
1686static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1687 struct device_attribute *attr, const char *buf, size_t count)
1688{
1689 struct ufs_hba *hba = dev_get_drvdata(dev);
1690 unsigned long flags, value;
1691
1692 if (kstrtoul(buf, 0, &value))
1693 return -EINVAL;
1694
1695 spin_lock_irqsave(hba->host->host_lock, flags);
1696 hba->clk_gating.delay_ms = value;
1697 spin_unlock_irqrestore(hba->host->host_lock, flags);
1698 return count;
1699}
1700
Sahitya Tummalab4274112016-12-22 18:40:39 -08001701static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1702 struct device_attribute *attr, char *buf)
1703{
1704 struct ufs_hba *hba = dev_get_drvdata(dev);
1705
1706 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1707}
1708
1709static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1710 struct device_attribute *attr, const char *buf, size_t count)
1711{
1712 struct ufs_hba *hba = dev_get_drvdata(dev);
1713 unsigned long flags;
1714 u32 value;
1715
1716 if (kstrtou32(buf, 0, &value))
1717 return -EINVAL;
1718
1719 value = !!value;
1720 if (value == hba->clk_gating.is_enabled)
1721 goto out;
1722
1723 if (value) {
1724 ufshcd_release(hba);
1725 } else {
1726 spin_lock_irqsave(hba->host->host_lock, flags);
1727 hba->clk_gating.active_reqs++;
1728 spin_unlock_irqrestore(hba->host->host_lock, flags);
1729 }
1730
1731 hba->clk_gating.is_enabled = value;
1732out:
1733 return count;
1734}
1735
Vivek Gautameebcc192018-08-07 23:17:39 +05301736static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1737{
1738 char wq_name[sizeof("ufs_clkscaling_00")];
1739
1740 if (!ufshcd_is_clkscaling_supported(hba))
1741 return;
1742
1743 INIT_WORK(&hba->clk_scaling.suspend_work,
1744 ufshcd_clk_scaling_suspend_work);
1745 INIT_WORK(&hba->clk_scaling.resume_work,
1746 ufshcd_clk_scaling_resume_work);
1747
1748 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1749 hba->host->host_no);
1750 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1751
1752 ufshcd_clkscaling_init_sysfs(hba);
1753}
1754
1755static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1756{
1757 if (!ufshcd_is_clkscaling_supported(hba))
1758 return;
1759
1760 destroy_workqueue(hba->clk_scaling.workq);
1761 ufshcd_devfreq_remove(hba);
1762}
1763
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001764static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1765{
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301766 char wq_name[sizeof("ufs_clk_gating_00")];
1767
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001768 if (!ufshcd_is_clkgating_allowed(hba))
1769 return;
1770
1771 hba->clk_gating.delay_ms = 150;
1772 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1773 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1774
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301775 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1776 hba->host->host_no);
1777 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1778 WQ_MEM_RECLAIM);
1779
Sahitya Tummalab4274112016-12-22 18:40:39 -08001780 hba->clk_gating.is_enabled = true;
1781
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001782 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1783 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1784 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1785 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
Sahitya Tummalab4274112016-12-22 18:40:39 -08001786 hba->clk_gating.delay_attr.attr.mode = 0644;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001787 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1788 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Sahitya Tummalab4274112016-12-22 18:40:39 -08001789
1790 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1791 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1792 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1793 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1794 hba->clk_gating.enable_attr.attr.mode = 0644;
1795 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1796 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001797}
1798
1799static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1800{
1801 if (!ufshcd_is_clkgating_allowed(hba))
1802 return;
1803 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001804 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001805 cancel_work_sync(&hba->clk_gating.ungate_work);
1806 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301807 destroy_workqueue(hba->clk_gating.clk_gating_workq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001808}
1809
Sahitya Tummala856b3482014-09-25 15:32:34 +03001810/* Must be called with host lock acquired */
1811static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1812{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001813 bool queue_resume_work = false;
1814
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001815 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001816 return;
1817
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001818 if (!hba->clk_scaling.active_reqs++)
1819 queue_resume_work = true;
1820
1821 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1822 return;
1823
1824 if (queue_resume_work)
1825 queue_work(hba->clk_scaling.workq,
1826 &hba->clk_scaling.resume_work);
1827
1828 if (!hba->clk_scaling.window_start_t) {
1829 hba->clk_scaling.window_start_t = jiffies;
1830 hba->clk_scaling.tot_busy_t = 0;
1831 hba->clk_scaling.is_busy_started = false;
1832 }
1833
Sahitya Tummala856b3482014-09-25 15:32:34 +03001834 if (!hba->clk_scaling.is_busy_started) {
1835 hba->clk_scaling.busy_start_t = ktime_get();
1836 hba->clk_scaling.is_busy_started = true;
1837 }
1838}
1839
1840static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1841{
1842 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1843
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001844 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001845 return;
1846
1847 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1848 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1849 scaling->busy_start_t));
Thomas Gleixner8b0e1952016-12-25 12:30:41 +01001850 scaling->busy_start_t = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03001851 scaling->is_busy_started = false;
1852 }
1853}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301854/**
1855 * ufshcd_send_command - Send SCSI or device management commands
1856 * @hba: per adapter instance
1857 * @task_tag: Task tag of the command
1858 */
1859static inline
1860void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1861{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08001862 hba->lrb[task_tag].issue_time_stamp = ktime_get();
Zang Leigang09017182017-09-27 10:06:06 +08001863 hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
Sahitya Tummala856b3482014-09-25 15:32:34 +03001864 ufshcd_clk_scaling_start_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301865 __set_bit(task_tag, &hba->outstanding_reqs);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301866 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07001867 /* Make sure that doorbell is committed immediately */
1868 wmb();
Lee Susman1a07f2d2016-12-22 18:42:03 -08001869 ufshcd_add_command_trace(hba, task_tag, "send");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301870}
1871
1872/**
1873 * ufshcd_copy_sense_data - Copy sense data in case of check condition
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001874 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301875 */
1876static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1877{
1878 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05301879 if (lrbp->sense_buffer &&
1880 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001881 int len_to_copy;
1882
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301883 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Avri Altman09a5a242018-11-22 20:04:56 +02001884 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001885
Avri Altman09a5a242018-11-22 20:04:56 +02001886 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
1887 len_to_copy);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301888 }
1889}
1890
1891/**
Dolev Raviv68078d52013-07-30 00:35:58 +05301892 * ufshcd_copy_query_response() - Copy the Query Response and the data
1893 * descriptor
1894 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001895 * @lrbp: pointer to local reference block
Dolev Raviv68078d52013-07-30 00:35:58 +05301896 */
1897static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001898int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05301899{
1900 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1901
Dolev Raviv68078d52013-07-30 00:35:58 +05301902 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05301903
Dolev Raviv68078d52013-07-30 00:35:58 +05301904 /* Get the descriptor */
Avri Altman1c908362019-05-21 11:24:22 +03001905 if (hba->dev_cmd.query.descriptor &&
1906 lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03001907 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05301908 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001909 u16 resp_len;
1910 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05301911
1912 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001913 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05301914 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03001915 buf_len = be16_to_cpu(
1916 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001917 if (likely(buf_len >= resp_len)) {
1918 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1919 } else {
1920 dev_warn(hba->dev,
Bean Huo3d4881d2019-11-12 23:34:35 +01001921 "%s: rsp size %d is bigger than buffer size %d",
1922 __func__, resp_len, buf_len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001923 return -EINVAL;
1924 }
Dolev Raviv68078d52013-07-30 00:35:58 +05301925 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001926
1927 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05301928}
1929
1930/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301931 * ufshcd_hba_capabilities - Read controller capabilities
1932 * @hba: per adapter instance
1933 */
1934static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1935{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301936 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301937
1938 /* nutrs and nutmrs are 0 based values */
1939 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1940 hba->nutmrs =
1941 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1942}
1943
1944/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301945 * ufshcd_ready_for_uic_cmd - Check if controller is ready
1946 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301947 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301948 * Return true on success, else false
1949 */
1950static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1951{
1952 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1953 return true;
1954 else
1955 return false;
1956}
1957
1958/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05301959 * ufshcd_get_upmcrs - Get the power mode change request status
1960 * @hba: Pointer to adapter instance
1961 *
1962 * This function gets the UPMCRS field of HCS register
1963 * Returns value of UPMCRS field
1964 */
1965static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1966{
1967 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1968}
1969
1970/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301971 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1972 * @hba: per adapter instance
1973 * @uic_cmd: UIC command
1974 *
1975 * Mutex must be held.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301976 */
1977static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301978ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301979{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301980 WARN_ON(hba->active_uic_cmd);
1981
1982 hba->active_uic_cmd = uic_cmd;
1983
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301984 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301985 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
1986 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
1987 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301988
1989 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301990 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301991 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301992}
1993
1994/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301995 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
1996 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001997 * @uic_cmd: UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301998 *
1999 * Must be called with mutex held.
2000 * Returns 0 only if success.
2001 */
2002static int
2003ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2004{
2005 int ret;
2006 unsigned long flags;
2007
2008 if (wait_for_completion_timeout(&uic_cmd->done,
2009 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2010 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2011 else
2012 ret = -ETIMEDOUT;
2013
2014 spin_lock_irqsave(hba->host->host_lock, flags);
2015 hba->active_uic_cmd = NULL;
2016 spin_unlock_irqrestore(hba->host->host_lock, flags);
2017
2018 return ret;
2019}
2020
2021/**
2022 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2023 * @hba: per adapter instance
2024 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002025 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302026 *
2027 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002028 * with mutex held and host_lock locked.
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302029 * Returns 0 only if success.
2030 */
2031static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002032__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2033 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302034{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302035 if (!ufshcd_ready_for_uic_cmd(hba)) {
2036 dev_err(hba->dev,
2037 "Controller not ready to accept UIC commands\n");
2038 return -EIO;
2039 }
2040
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002041 if (completion)
2042 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302043
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302044 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302045
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002046 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302047}
2048
2049/**
2050 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2051 * @hba: per adapter instance
2052 * @uic_cmd: UIC command
2053 *
2054 * Returns 0 only if success.
2055 */
Avri Altmane77044c52018-10-07 17:30:39 +03002056int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302057{
2058 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002059 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302060
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002061 ufshcd_hold(hba, false);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302062 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03002063 ufshcd_add_delay_before_dme_cmd(hba);
2064
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002065 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002066 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002067 spin_unlock_irqrestore(hba->host->host_lock, flags);
2068 if (!ret)
2069 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2070
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302071 mutex_unlock(&hba->uic_cmd_mutex);
2072
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002073 ufshcd_release(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302074 return ret;
2075}
2076
2077/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302078 * ufshcd_map_sg - Map scatter-gather list to prdt
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002079 * @hba: per adapter instance
2080 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302081 *
2082 * Returns 0 in case of success, non-zero value in case of failure
2083 */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002084static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302085{
2086 struct ufshcd_sg_entry *prd_table;
2087 struct scatterlist *sg;
2088 struct scsi_cmnd *cmd;
2089 int sg_segments;
2090 int i;
2091
2092 cmd = lrbp->cmd;
2093 sg_segments = scsi_dma_map(cmd);
2094 if (sg_segments < 0)
2095 return sg_segments;
2096
2097 if (sg_segments) {
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002098 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2099 lrbp->utr_descriptor_ptr->prd_table_length =
2100 cpu_to_le16((u16)(sg_segments *
2101 sizeof(struct ufshcd_sg_entry)));
2102 else
2103 lrbp->utr_descriptor_ptr->prd_table_length =
2104 cpu_to_le16((u16) (sg_segments));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302105
2106 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2107
2108 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2109 prd_table[i].size =
2110 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2111 prd_table[i].base_addr =
2112 cpu_to_le32(lower_32_bits(sg->dma_address));
2113 prd_table[i].upper_addr =
2114 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002115 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302116 }
2117 } else {
2118 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2119 }
2120
2121 return 0;
2122}
2123
2124/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302125 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302126 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302127 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302128 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302129static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302130{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302131 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2132
2133 if (hba->ufs_version == UFSHCI_VERSION_10) {
2134 u32 rw;
2135 rw = set & INTERRUPT_MASK_RW_VER_10;
2136 set = rw | ((set ^ intrs) & intrs);
2137 } else {
2138 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302139 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302140
2141 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2142}
2143
2144/**
2145 * ufshcd_disable_intr - disable interrupts
2146 * @hba: per adapter instance
2147 * @intrs: interrupt bits
2148 */
2149static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2150{
2151 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2152
2153 if (hba->ufs_version == UFSHCI_VERSION_10) {
2154 u32 rw;
2155 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2156 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2157 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2158
2159 } else {
2160 set &= ~intrs;
2161 }
2162
2163 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302164}
2165
2166/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302167 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2168 * descriptor according to request
2169 * @lrbp: pointer to local reference block
2170 * @upiu_flags: flags required in the header
2171 * @cmd_dir: requests data direction
2172 */
2173static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
Joao Pinto300bb132016-05-11 12:21:27 +01002174 u32 *upiu_flags, enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302175{
2176 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2177 u32 data_direction;
2178 u32 dword_0;
2179
2180 if (cmd_dir == DMA_FROM_DEVICE) {
2181 data_direction = UTP_DEVICE_TO_HOST;
2182 *upiu_flags = UPIU_CMD_FLAGS_READ;
2183 } else if (cmd_dir == DMA_TO_DEVICE) {
2184 data_direction = UTP_HOST_TO_DEVICE;
2185 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2186 } else {
2187 data_direction = UTP_NO_DATA_TRANSFER;
2188 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2189 }
2190
2191 dword_0 = data_direction | (lrbp->command_type
2192 << UPIU_COMMAND_TYPE_OFFSET);
2193 if (lrbp->intr_cmd)
2194 dword_0 |= UTP_REQ_DESC_INT_CMD;
2195
2196 /* Transfer request descriptor header fields */
2197 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002198 /* dword_1 is reserved, hence it is set to 0 */
2199 req_desc->header.dword_1 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302200 /*
2201 * assigning invalid value for command status. Controller
2202 * updates OCS on command completion, with the command
2203 * status
2204 */
2205 req_desc->header.dword_2 =
2206 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002207 /* dword_3 is reserved, hence it is set to 0 */
2208 req_desc->header.dword_3 = 0;
Yaniv Gardi51047262016-02-01 15:02:38 +02002209
2210 req_desc->prd_table_length = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302211}
2212
2213/**
2214 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2215 * for scsi commands
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002216 * @lrbp: local reference block pointer
2217 * @upiu_flags: flags
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302218 */
2219static
2220void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2221{
2222 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002223 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302224
2225 /* command descriptor fields */
2226 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2227 UPIU_TRANSACTION_COMMAND, upiu_flags,
2228 lrbp->lun, lrbp->task_tag);
2229 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2230 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2231
2232 /* Total EHS length and Data segment length will be zero */
2233 ucd_req_ptr->header.dword_2 = 0;
2234
2235 ucd_req_ptr->sc.exp_data_transfer_len =
2236 cpu_to_be32(lrbp->cmd->sdb.length);
2237
Avri Altmana851b2b2018-10-07 17:30:34 +03002238 cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, UFS_CDB_SIZE);
2239 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002240 memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
2241
2242 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302243}
2244
Dolev Raviv68078d52013-07-30 00:35:58 +05302245/**
2246 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2247 * for query requsts
2248 * @hba: UFS hba
2249 * @lrbp: local reference block pointer
2250 * @upiu_flags: flags
2251 */
2252static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2253 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2254{
2255 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2256 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302257 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302258
2259 /* Query request header */
2260 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2261 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2262 lrbp->lun, lrbp->task_tag);
2263 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2264 0, query->request.query_func, 0, 0);
2265
Zang Leigang68612852016-08-25 17:39:19 +08002266 /* Data segment length only need for WRITE_DESC */
2267 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2268 ucd_req_ptr->header.dword_2 =
2269 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2270 else
2271 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302272
2273 /* Copy the Query Request buffer as is */
2274 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2275 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302276
2277 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002278 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
Avri Altman220d17a62018-10-07 17:30:36 +03002279 memcpy(ucd_req_ptr + 1, query->descriptor, len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002280
Yaniv Gardi51047262016-02-01 15:02:38 +02002281 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302282}
2283
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302284static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2285{
2286 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2287
2288 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2289
2290 /* command descriptor fields */
2291 ucd_req_ptr->header.dword_0 =
2292 UPIU_HEADER_DWORD(
2293 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002294 /* clear rest of the fields of basic header */
2295 ucd_req_ptr->header.dword_1 = 0;
2296 ucd_req_ptr->header.dword_2 = 0;
2297
2298 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302299}
2300
2301/**
Joao Pinto300bb132016-05-11 12:21:27 +01002302 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2303 * for Device Management Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002304 * @hba: per adapter instance
2305 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302306 */
Joao Pinto300bb132016-05-11 12:21:27 +01002307static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302308{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302309 u32 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302310 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302311
kehuanlin83dc7e32017-09-06 17:58:39 +08002312 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2313 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002314 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
kehuanlin83dc7e32017-09-06 17:58:39 +08002315 else
2316 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002317
2318 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2319 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2320 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2321 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2322 ufshcd_prepare_utp_nop_upiu(lrbp);
2323 else
2324 ret = -EINVAL;
2325
2326 return ret;
2327}
2328
2329/**
2330 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2331 * for SCSI Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002332 * @hba: per adapter instance
2333 * @lrbp: pointer to local reference block
Joao Pinto300bb132016-05-11 12:21:27 +01002334 */
2335static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2336{
2337 u32 upiu_flags;
2338 int ret = 0;
2339
kehuanlin83dc7e32017-09-06 17:58:39 +08002340 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2341 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002342 lrbp->command_type = UTP_CMD_TYPE_SCSI;
kehuanlin83dc7e32017-09-06 17:58:39 +08002343 else
2344 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002345
2346 if (likely(lrbp->cmd)) {
2347 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2348 lrbp->cmd->sc_data_direction);
2349 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2350 } else {
2351 ret = -EINVAL;
2352 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302353
2354 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302355}
2356
2357/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002358 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002359 * @upiu_wlun_id: UPIU W-LUN id
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002360 *
2361 * Returns SCSI W-LUN id
2362 */
2363static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2364{
2365 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2366}
2367
2368/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302369 * ufshcd_queuecommand - main entry point for SCSI requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002370 * @host: SCSI host pointer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302371 * @cmd: command from SCSI Midlayer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302372 *
2373 * Returns 0 for success, non-zero in case of failure
2374 */
2375static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2376{
2377 struct ufshcd_lrb *lrbp;
2378 struct ufs_hba *hba;
2379 unsigned long flags;
2380 int tag;
2381 int err = 0;
2382
2383 hba = shost_priv(host);
2384
2385 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02002386 if (!ufshcd_valid_tag(hba, tag)) {
2387 dev_err(hba->dev,
2388 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2389 __func__, tag, cmd, cmd->request);
2390 BUG();
2391 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302392
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002393 if (!down_read_trylock(&hba->clk_scaling_lock))
2394 return SCSI_MLQUEUE_HOST_BUSY;
2395
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302396 spin_lock_irqsave(hba->host->host_lock, flags);
2397 switch (hba->ufshcd_state) {
2398 case UFSHCD_STATE_OPERATIONAL:
2399 break;
Zang Leigang141f8162016-11-16 11:29:37 +08002400 case UFSHCD_STATE_EH_SCHEDULED:
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302401 case UFSHCD_STATE_RESET:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302402 err = SCSI_MLQUEUE_HOST_BUSY;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302403 goto out_unlock;
2404 case UFSHCD_STATE_ERROR:
2405 set_host_byte(cmd, DID_ERROR);
2406 cmd->scsi_done(cmd);
2407 goto out_unlock;
2408 default:
2409 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2410 __func__, hba->ufshcd_state);
2411 set_host_byte(cmd, DID_BAD_TARGET);
2412 cmd->scsi_done(cmd);
2413 goto out_unlock;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302414 }
Yaniv Gardi53c12d02016-02-01 15:02:45 +02002415
2416 /* if error handling is in progress, don't issue commands */
2417 if (ufshcd_eh_in_progress(hba)) {
2418 set_host_byte(cmd, DID_ERROR);
2419 cmd->scsi_done(cmd);
2420 goto out_unlock;
2421 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302422 spin_unlock_irqrestore(hba->host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302423
Gilad Broner7fabb772017-02-03 16:56:50 -08002424 hba->req_abort_count = 0;
2425
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002426 err = ufshcd_hold(hba, true);
2427 if (err) {
2428 err = SCSI_MLQUEUE_HOST_BUSY;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002429 goto out;
2430 }
2431 WARN_ON(hba->clk_gating.state != CLKS_ON);
2432
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302433 lrbp = &hba->lrb[tag];
2434
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302435 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302436 lrbp->cmd = cmd;
Avri Altman09a5a242018-11-22 20:04:56 +02002437 lrbp->sense_bufflen = UFS_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302438 lrbp->sense_buffer = cmd->sense_buffer;
2439 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002440 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002441 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Gilad Bronere0b299e2017-02-03 16:56:40 -08002442 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302443
Joao Pinto300bb132016-05-11 12:21:27 +01002444 ufshcd_comp_scsi_upiu(hba, lrbp);
2445
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002446 err = ufshcd_map_sg(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302447 if (err) {
2448 lrbp->cmd = NULL;
Can Guo17c7d352019-12-05 02:14:33 +00002449 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302450 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302451 }
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002452 /* Make sure descriptors are ready before ringing the doorbell */
2453 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302454
2455 /* issue command to the controller */
2456 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002457 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302458 ufshcd_send_command(hba, tag);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302459out_unlock:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302460 spin_unlock_irqrestore(hba->host->host_lock, flags);
2461out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002462 up_read(&hba->clk_scaling_lock);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302463 return err;
2464}
2465
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302466static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2467 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2468{
2469 lrbp->cmd = NULL;
2470 lrbp->sense_bufflen = 0;
2471 lrbp->sense_buffer = NULL;
2472 lrbp->task_tag = tag;
2473 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302474 lrbp->intr_cmd = true; /* No interrupt aggregation */
2475 hba->dev_cmd.type = cmd_type;
2476
Joao Pinto300bb132016-05-11 12:21:27 +01002477 return ufshcd_comp_devman_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302478}
2479
2480static int
2481ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2482{
2483 int err = 0;
2484 unsigned long flags;
2485 u32 mask = 1 << tag;
2486
2487 /* clear outstanding transaction before retry */
2488 spin_lock_irqsave(hba->host->host_lock, flags);
2489 ufshcd_utrl_clear(hba, tag);
2490 spin_unlock_irqrestore(hba->host->host_lock, flags);
2491
2492 /*
2493 * wait for for h/w to clear corresponding bit in door-bell.
2494 * max. wait is 1 sec.
2495 */
2496 err = ufshcd_wait_for_register(hba,
2497 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02002498 mask, ~mask, 1000, 1000, true);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302499
2500 return err;
2501}
2502
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002503static int
2504ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2505{
2506 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2507
2508 /* Get the UPIU response */
2509 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2510 UPIU_RSP_CODE_OFFSET;
2511 return query_res->response;
2512}
2513
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302514/**
2515 * ufshcd_dev_cmd_completion() - handles device management command responses
2516 * @hba: per adapter instance
2517 * @lrbp: pointer to local reference block
2518 */
2519static int
2520ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2521{
2522 int resp;
2523 int err = 0;
2524
Dolev Ravivff8e20c2016-12-22 18:42:18 -08002525 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302526 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2527
2528 switch (resp) {
2529 case UPIU_TRANSACTION_NOP_IN:
2530 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2531 err = -EINVAL;
2532 dev_err(hba->dev, "%s: unexpected response %x\n",
2533 __func__, resp);
2534 }
2535 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302536 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002537 err = ufshcd_check_query_response(hba, lrbp);
2538 if (!err)
2539 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302540 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302541 case UPIU_TRANSACTION_REJECT_UPIU:
2542 /* TODO: handle Reject UPIU Response */
2543 err = -EPERM;
2544 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2545 __func__);
2546 break;
2547 default:
2548 err = -EINVAL;
2549 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2550 __func__, resp);
2551 break;
2552 }
2553
2554 return err;
2555}
2556
2557static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2558 struct ufshcd_lrb *lrbp, int max_timeout)
2559{
2560 int err = 0;
2561 unsigned long time_left;
2562 unsigned long flags;
2563
2564 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2565 msecs_to_jiffies(max_timeout));
2566
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002567 /* Make sure descriptors are ready before ringing the doorbell */
2568 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302569 spin_lock_irqsave(hba->host->host_lock, flags);
2570 hba->dev_cmd.complete = NULL;
2571 if (likely(time_left)) {
2572 err = ufshcd_get_tr_ocs(lrbp);
2573 if (!err)
2574 err = ufshcd_dev_cmd_completion(hba, lrbp);
2575 }
2576 spin_unlock_irqrestore(hba->host->host_lock, flags);
2577
2578 if (!time_left) {
2579 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002580 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2581 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302582 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002583 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302584 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002585 /*
2586 * in case of an error, after clearing the doorbell,
2587 * we also need to clear the outstanding_request
2588 * field in hba
2589 */
2590 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302591 }
2592
2593 return err;
2594}
2595
2596/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302597 * ufshcd_exec_dev_cmd - API for sending device management requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002598 * @hba: UFS hba
2599 * @cmd_type: specifies the type (NOP, Query...)
2600 * @timeout: time in seconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302601 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302602 * NOTE: Since there is only one available tag for device management commands,
2603 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302604 */
2605static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2606 enum dev_cmd_type cmd_type, int timeout)
2607{
Bart Van Assche7252a362019-12-09 10:13:08 -08002608 struct request_queue *q = hba->cmd_queue;
2609 struct request *req;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302610 struct ufshcd_lrb *lrbp;
2611 int err;
2612 int tag;
2613 struct completion wait;
2614 unsigned long flags;
2615
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002616 down_read(&hba->clk_scaling_lock);
2617
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302618 /*
2619 * Get free slot, sleep if slots are unavailable.
2620 * Even though we use wait_event() which sleeps indefinitely,
2621 * the maximum wait time is bounded by SCSI request timeout.
2622 */
Bart Van Assche7252a362019-12-09 10:13:08 -08002623 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03002624 if (IS_ERR(req)) {
2625 err = PTR_ERR(req);
2626 goto out_unlock;
2627 }
Bart Van Assche7252a362019-12-09 10:13:08 -08002628 tag = req->tag;
2629 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302630
2631 init_completion(&wait);
2632 lrbp = &hba->lrb[tag];
2633 WARN_ON(lrbp->cmd);
2634 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2635 if (unlikely(err))
2636 goto out_put_tag;
2637
2638 hba->dev_cmd.complete = &wait;
2639
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002640 ufshcd_add_query_upiu_trace(hba, tag, "query_send");
Yaniv Gardie3dfdc52016-02-01 15:02:49 +02002641 /* Make sure descriptors are ready before ringing the doorbell */
2642 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302643 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002644 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302645 ufshcd_send_command(hba, tag);
2646 spin_unlock_irqrestore(hba->host->host_lock, flags);
2647
2648 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2649
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002650 ufshcd_add_query_upiu_trace(hba, tag,
2651 err ? "query_complete_err" : "query_complete");
2652
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302653out_put_tag:
Bart Van Assche7252a362019-12-09 10:13:08 -08002654 blk_put_request(req);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03002655out_unlock:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002656 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302657 return err;
2658}
2659
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302660/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002661 * ufshcd_init_query() - init the query response and request parameters
2662 * @hba: per-adapter instance
2663 * @request: address of the request pointer to be initialized
2664 * @response: address of the response pointer to be initialized
2665 * @opcode: operation to perform
2666 * @idn: flag idn to access
2667 * @index: LU number to access
2668 * @selector: query/flag/descriptor further identification
2669 */
2670static inline void ufshcd_init_query(struct ufs_hba *hba,
2671 struct ufs_query_req **request, struct ufs_query_res **response,
2672 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2673{
2674 *request = &hba->dev_cmd.query.request;
2675 *response = &hba->dev_cmd.query.response;
2676 memset(*request, 0, sizeof(struct ufs_query_req));
2677 memset(*response, 0, sizeof(struct ufs_query_res));
2678 (*request)->upiu_req.opcode = opcode;
2679 (*request)->upiu_req.idn = idn;
2680 (*request)->upiu_req.index = index;
2681 (*request)->upiu_req.selector = selector;
2682}
2683
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002684static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2685 enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2686{
2687 int ret;
2688 int retries;
2689
2690 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2691 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2692 if (ret)
2693 dev_dbg(hba->dev,
2694 "%s: failed with error %d, retries %d\n",
2695 __func__, ret, retries);
2696 else
2697 break;
2698 }
2699
2700 if (ret)
2701 dev_err(hba->dev,
2702 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2703 __func__, opcode, idn, ret, retries);
2704 return ret;
2705}
2706
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002707/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302708 * ufshcd_query_flag() - API function for sending flag query requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002709 * @hba: per-adapter instance
2710 * @opcode: flag query to perform
2711 * @idn: flag idn to access
2712 * @flag_res: the flag value after the query request completes
Dolev Raviv68078d52013-07-30 00:35:58 +05302713 *
2714 * Returns 0 for success, non-zero in case of failure
2715 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002716int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Dolev Raviv68078d52013-07-30 00:35:58 +05302717 enum flag_idn idn, bool *flag_res)
2718{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002719 struct ufs_query_req *request = NULL;
2720 struct ufs_query_res *response = NULL;
2721 int err, index = 0, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002722 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05302723
2724 BUG_ON(!hba);
2725
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002726 ufshcd_hold(hba, false);
Dolev Raviv68078d52013-07-30 00:35:58 +05302727 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002728 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2729 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05302730
2731 switch (opcode) {
2732 case UPIU_QUERY_OPCODE_SET_FLAG:
2733 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2734 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2735 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2736 break;
2737 case UPIU_QUERY_OPCODE_READ_FLAG:
2738 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2739 if (!flag_res) {
2740 /* No dummy reads */
2741 dev_err(hba->dev, "%s: Invalid argument for read request\n",
2742 __func__);
2743 err = -EINVAL;
2744 goto out_unlock;
2745 }
2746 break;
2747 default:
2748 dev_err(hba->dev,
2749 "%s: Expected query flag opcode but got = %d\n",
2750 __func__, opcode);
2751 err = -EINVAL;
2752 goto out_unlock;
2753 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302754
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002755 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05302756
2757 if (err) {
2758 dev_err(hba->dev,
2759 "%s: Sending flag query for idn %d failed, err = %d\n",
2760 __func__, idn, err);
2761 goto out_unlock;
2762 }
2763
2764 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302765 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302766 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2767
2768out_unlock:
2769 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002770 ufshcd_release(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05302771 return err;
2772}
2773
2774/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302775 * ufshcd_query_attr - API function for sending attribute requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002776 * @hba: per-adapter instance
2777 * @opcode: attribute opcode
2778 * @idn: attribute idn to access
2779 * @index: index field
2780 * @selector: selector field
2781 * @attr_val: the attribute value after the query request completes
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302782 *
2783 * Returns 0 for success, non-zero in case of failure
2784*/
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02002785int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2786 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302787{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002788 struct ufs_query_req *request = NULL;
2789 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302790 int err;
2791
2792 BUG_ON(!hba);
2793
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002794 ufshcd_hold(hba, false);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302795 if (!attr_val) {
2796 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2797 __func__, opcode);
2798 err = -EINVAL;
2799 goto out;
2800 }
2801
2802 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002803 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2804 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302805
2806 switch (opcode) {
2807 case UPIU_QUERY_OPCODE_WRITE_ATTR:
2808 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302809 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302810 break;
2811 case UPIU_QUERY_OPCODE_READ_ATTR:
2812 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2813 break;
2814 default:
2815 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2816 __func__, opcode);
2817 err = -EINVAL;
2818 goto out_unlock;
2819 }
2820
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002821 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302822
2823 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002824 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2825 __func__, opcode, idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302826 goto out_unlock;
2827 }
2828
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302829 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302830
2831out_unlock:
2832 mutex_unlock(&hba->dev_cmd.lock);
2833out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002834 ufshcd_release(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302835 return err;
2836}
2837
2838/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02002839 * ufshcd_query_attr_retry() - API function for sending query
2840 * attribute with retries
2841 * @hba: per-adapter instance
2842 * @opcode: attribute opcode
2843 * @idn: attribute idn to access
2844 * @index: index field
2845 * @selector: selector field
2846 * @attr_val: the attribute value after the query request
2847 * completes
2848 *
2849 * Returns 0 for success, non-zero in case of failure
2850*/
2851static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2852 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2853 u32 *attr_val)
2854{
2855 int ret = 0;
2856 u32 retries;
2857
2858 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2859 ret = ufshcd_query_attr(hba, opcode, idn, index,
2860 selector, attr_val);
2861 if (ret)
2862 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2863 __func__, ret, retries);
2864 else
2865 break;
2866 }
2867
2868 if (ret)
2869 dev_err(hba->dev,
2870 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2871 __func__, idn, ret, QUERY_REQ_RETRIES);
2872 return ret;
2873}
2874
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002875static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002876 enum query_opcode opcode, enum desc_idn idn, u8 index,
2877 u8 selector, u8 *desc_buf, int *buf_len)
2878{
2879 struct ufs_query_req *request = NULL;
2880 struct ufs_query_res *response = NULL;
2881 int err;
2882
2883 BUG_ON(!hba);
2884
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002885 ufshcd_hold(hba, false);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002886 if (!desc_buf) {
2887 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2888 __func__, opcode);
2889 err = -EINVAL;
2890 goto out;
2891 }
2892
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002893 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002894 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2895 __func__, *buf_len);
2896 err = -EINVAL;
2897 goto out;
2898 }
2899
2900 mutex_lock(&hba->dev_cmd.lock);
2901 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2902 selector);
2903 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002904 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002905
2906 switch (opcode) {
2907 case UPIU_QUERY_OPCODE_WRITE_DESC:
2908 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2909 break;
2910 case UPIU_QUERY_OPCODE_READ_DESC:
2911 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2912 break;
2913 default:
2914 dev_err(hba->dev,
2915 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2916 __func__, opcode);
2917 err = -EINVAL;
2918 goto out_unlock;
2919 }
2920
2921 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2922
2923 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002924 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2925 __func__, opcode, idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002926 goto out_unlock;
2927 }
2928
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002929 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002930
2931out_unlock:
Bean Huocfcbae32019-11-12 23:34:36 +01002932 hba->dev_cmd.query.descriptor = NULL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002933 mutex_unlock(&hba->dev_cmd.lock);
2934out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002935 ufshcd_release(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002936 return err;
2937}
2938
2939/**
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002940 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
2941 * @hba: per-adapter instance
2942 * @opcode: attribute opcode
2943 * @idn: attribute idn to access
2944 * @index: index field
2945 * @selector: selector field
2946 * @desc_buf: the buffer that contains the descriptor
2947 * @buf_len: length parameter passed to the device
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002948 *
2949 * Returns 0 for success, non-zero in case of failure.
2950 * The buf_len parameter will contain, on return, the length parameter
2951 * received on the response.
2952 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02002953int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
2954 enum query_opcode opcode,
2955 enum desc_idn idn, u8 index,
2956 u8 selector,
2957 u8 *desc_buf, int *buf_len)
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002958{
2959 int err;
2960 int retries;
2961
2962 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2963 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
2964 selector, desc_buf, buf_len);
2965 if (!err || err == -EINVAL)
2966 break;
2967 }
2968
2969 return err;
2970}
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002971
2972/**
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002973 * ufshcd_read_desc_length - read the specified descriptor length from header
2974 * @hba: Pointer to adapter instance
2975 * @desc_id: descriptor idn value
2976 * @desc_index: descriptor index
2977 * @desc_length: pointer to variable to read the length of descriptor
2978 *
2979 * Return 0 in case of success, non-zero otherwise
2980 */
2981static int ufshcd_read_desc_length(struct ufs_hba *hba,
2982 enum desc_idn desc_id,
2983 int desc_index,
2984 int *desc_length)
2985{
2986 int ret;
2987 u8 header[QUERY_DESC_HDR_SIZE];
2988 int header_len = QUERY_DESC_HDR_SIZE;
2989
2990 if (desc_id >= QUERY_DESC_IDN_MAX)
2991 return -EINVAL;
2992
2993 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
2994 desc_id, desc_index, 0, header,
2995 &header_len);
2996
2997 if (ret) {
2998 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
2999 __func__, desc_id);
3000 return ret;
3001 } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
3002 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
3003 __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3004 desc_id);
3005 ret = -EINVAL;
3006 }
3007
3008 *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3009 return ret;
3010
3011}
3012
3013/**
3014 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3015 * @hba: Pointer to adapter instance
3016 * @desc_id: descriptor idn value
3017 * @desc_len: mapped desc length (out)
3018 *
3019 * Return 0 in case of success, non-zero otherwise
3020 */
3021int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3022 enum desc_idn desc_id, int *desc_len)
3023{
3024 switch (desc_id) {
3025 case QUERY_DESC_IDN_DEVICE:
3026 *desc_len = hba->desc_size.dev_desc;
3027 break;
3028 case QUERY_DESC_IDN_POWER:
3029 *desc_len = hba->desc_size.pwr_desc;
3030 break;
3031 case QUERY_DESC_IDN_GEOMETRY:
3032 *desc_len = hba->desc_size.geom_desc;
3033 break;
3034 case QUERY_DESC_IDN_CONFIGURATION:
3035 *desc_len = hba->desc_size.conf_desc;
3036 break;
3037 case QUERY_DESC_IDN_UNIT:
3038 *desc_len = hba->desc_size.unit_desc;
3039 break;
3040 case QUERY_DESC_IDN_INTERCONNECT:
3041 *desc_len = hba->desc_size.interc_desc;
3042 break;
3043 case QUERY_DESC_IDN_STRING:
3044 *desc_len = QUERY_DESC_MAX_SIZE;
3045 break;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02003046 case QUERY_DESC_IDN_HEALTH:
3047 *desc_len = hba->desc_size.hlth_desc;
3048 break;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003049 case QUERY_DESC_IDN_RFU_0:
3050 case QUERY_DESC_IDN_RFU_1:
3051 *desc_len = 0;
3052 break;
3053 default:
3054 *desc_len = 0;
3055 return -EINVAL;
3056 }
3057 return 0;
3058}
3059EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3060
3061/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003062 * ufshcd_read_desc_param - read the specified descriptor parameter
3063 * @hba: Pointer to adapter instance
3064 * @desc_id: descriptor idn value
3065 * @desc_index: descriptor index
3066 * @param_offset: offset of the parameter to read
3067 * @param_read_buf: pointer to buffer where parameter would be read
3068 * @param_size: sizeof(param_read_buf)
3069 *
3070 * Return 0 in case of success, non-zero otherwise
3071 */
Stanislav Nijnikov45bced82018-02-15 14:14:02 +02003072int ufshcd_read_desc_param(struct ufs_hba *hba,
3073 enum desc_idn desc_id,
3074 int desc_index,
3075 u8 param_offset,
3076 u8 *param_read_buf,
3077 u8 param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003078{
3079 int ret;
3080 u8 *desc_buf;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003081 int buff_len;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003082 bool is_kmalloc = true;
3083
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003084 /* Safety check */
3085 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003086 return -EINVAL;
3087
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003088 /* Get the max length of descriptor from structure filled up at probe
3089 * time.
3090 */
3091 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003092
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003093 /* Sanity checks */
3094 if (ret || !buff_len) {
3095 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3096 __func__);
3097 return ret;
3098 }
3099
3100 /* Check whether we need temp memory */
3101 if (param_offset != 0 || param_size < buff_len) {
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003102 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3103 if (!desc_buf)
3104 return -ENOMEM;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003105 } else {
3106 desc_buf = param_read_buf;
3107 is_kmalloc = false;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003108 }
3109
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003110 /* Request for full descriptor */
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003111 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003112 desc_id, desc_index, 0,
3113 desc_buf, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003114
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003115 if (ret) {
3116 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3117 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003118 goto out;
3119 }
3120
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003121 /* Sanity check */
3122 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3123 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3124 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3125 ret = -EINVAL;
3126 goto out;
3127 }
3128
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003129 /* Check wherher we will not copy more data, than available */
3130 if (is_kmalloc && param_size > buff_len)
3131 param_size = buff_len;
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003132
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003133 if (is_kmalloc)
3134 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3135out:
3136 if (is_kmalloc)
3137 kfree(desc_buf);
3138 return ret;
3139}
3140
3141static inline int ufshcd_read_desc(struct ufs_hba *hba,
3142 enum desc_idn desc_id,
3143 int desc_index,
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003144 void *buf,
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003145 u32 size)
3146{
3147 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3148}
3149
3150static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3151 u8 *buf,
3152 u32 size)
3153{
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02003154 return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003155}
3156
Tomas Winkler8209b6d2017-01-05 10:45:10 +02003157static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
Yaniv Gardib573d482016-03-10 17:37:09 +02003158{
3159 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3160}
Yaniv Gardib573d482016-03-10 17:37:09 +02003161
3162/**
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003163 * struct uc_string_id - unicode string
3164 *
3165 * @len: size of this descriptor inclusive
3166 * @type: descriptor type
3167 * @uc: unicode string character
3168 */
3169struct uc_string_id {
3170 u8 len;
3171 u8 type;
3172 wchar_t uc[0];
3173} __packed;
3174
3175/* replace non-printable or non-ASCII characters with spaces */
3176static inline char ufshcd_remove_non_printable(u8 ch)
3177{
3178 return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3179}
3180
3181/**
Yaniv Gardib573d482016-03-10 17:37:09 +02003182 * ufshcd_read_string_desc - read string descriptor
3183 * @hba: pointer to adapter instance
3184 * @desc_index: descriptor index
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003185 * @buf: pointer to buffer where descriptor would be read,
3186 * the caller should free the memory.
Yaniv Gardib573d482016-03-10 17:37:09 +02003187 * @ascii: if true convert from unicode to ascii characters
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003188 * null terminated string.
Yaniv Gardib573d482016-03-10 17:37:09 +02003189 *
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003190 * Return:
3191 * * string size on success.
3192 * * -ENOMEM: on allocation failure
3193 * * -EINVAL: on a wrong parameter
Yaniv Gardib573d482016-03-10 17:37:09 +02003194 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003195int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3196 u8 **buf, bool ascii)
Yaniv Gardib573d482016-03-10 17:37:09 +02003197{
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003198 struct uc_string_id *uc_str;
3199 u8 *str;
3200 int ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003201
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003202 if (!buf)
3203 return -EINVAL;
Yaniv Gardib573d482016-03-10 17:37:09 +02003204
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003205 uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3206 if (!uc_str)
3207 return -ENOMEM;
3208
3209 ret = ufshcd_read_desc(hba, QUERY_DESC_IDN_STRING,
3210 desc_index, uc_str,
3211 QUERY_DESC_MAX_SIZE);
3212 if (ret < 0) {
3213 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3214 QUERY_REQ_RETRIES, ret);
3215 str = NULL;
3216 goto out;
3217 }
3218
3219 if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3220 dev_dbg(hba->dev, "String Desc is of zero length\n");
3221 str = NULL;
3222 ret = 0;
Yaniv Gardib573d482016-03-10 17:37:09 +02003223 goto out;
3224 }
3225
3226 if (ascii) {
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003227 ssize_t ascii_len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003228 int i;
Yaniv Gardib573d482016-03-10 17:37:09 +02003229 /* remove header and divide by 2 to move from UTF16 to UTF8 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003230 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3231 str = kzalloc(ascii_len, GFP_KERNEL);
3232 if (!str) {
3233 ret = -ENOMEM;
Tiezhu Yangfcbefc32016-06-25 12:35:22 +08003234 goto out;
Yaniv Gardib573d482016-03-10 17:37:09 +02003235 }
3236
3237 /*
3238 * the descriptor contains string in UTF16 format
3239 * we need to convert to utf-8 so it can be displayed
3240 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003241 ret = utf16s_to_utf8s(uc_str->uc,
3242 uc_str->len - QUERY_DESC_HDR_SIZE,
3243 UTF16_BIG_ENDIAN, str, ascii_len);
Yaniv Gardib573d482016-03-10 17:37:09 +02003244
3245 /* replace non-printable or non-ASCII characters with spaces */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003246 for (i = 0; i < ret; i++)
3247 str[i] = ufshcd_remove_non_printable(str[i]);
Yaniv Gardib573d482016-03-10 17:37:09 +02003248
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003249 str[ret++] = '\0';
3250
3251 } else {
YueHaibing5f577042019-08-31 12:44:24 +00003252 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003253 if (!str) {
3254 ret = -ENOMEM;
3255 goto out;
3256 }
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003257 ret = uc_str->len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003258 }
3259out:
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003260 *buf = str;
3261 kfree(uc_str);
3262 return ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003263}
Yaniv Gardib573d482016-03-10 17:37:09 +02003264
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003265/**
3266 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3267 * @hba: Pointer to adapter instance
3268 * @lun: lun id
3269 * @param_offset: offset of the parameter to read
3270 * @param_read_buf: pointer to buffer where parameter would be read
3271 * @param_size: sizeof(param_read_buf)
3272 *
3273 * Return 0 in case of success, non-zero otherwise
3274 */
3275static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3276 int lun,
3277 enum unit_desc_param param_offset,
3278 u8 *param_read_buf,
3279 u32 param_size)
3280{
3281 /*
3282 * Unit descriptors are only available for general purpose LUs (LUN id
3283 * from 0 to 7) and RPMB Well known LU.
3284 */
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02003285 if (!ufs_is_valid_unit_desc_lun(lun))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003286 return -EOPNOTSUPP;
3287
3288 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3289 param_offset, param_read_buf, param_size);
3290}
3291
3292/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303293 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3294 * @hba: per adapter instance
3295 *
3296 * 1. Allocate DMA memory for Command Descriptor array
3297 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3298 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3299 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3300 * (UTMRDL)
3301 * 4. Allocate memory for local reference block(lrb).
3302 *
3303 * Returns 0 for success, non-zero in case of failure
3304 */
3305static int ufshcd_memory_alloc(struct ufs_hba *hba)
3306{
3307 size_t utmrdl_size, utrdl_size, ucdl_size;
3308
3309 /* Allocate memory for UTP command descriptors */
3310 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003311 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3312 ucdl_size,
3313 &hba->ucdl_dma_addr,
3314 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303315
3316 /*
3317 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3318 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3319 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3320 * be aligned to 128 bytes as well
3321 */
3322 if (!hba->ucdl_base_addr ||
3323 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303324 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303325 "Command Descriptor Memory allocation failed\n");
3326 goto out;
3327 }
3328
3329 /*
3330 * Allocate memory for UTP Transfer descriptors
3331 * UFSHCI requires 1024 byte alignment of UTRD
3332 */
3333 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003334 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3335 utrdl_size,
3336 &hba->utrdl_dma_addr,
3337 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303338 if (!hba->utrdl_base_addr ||
3339 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303340 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303341 "Transfer Descriptor Memory allocation failed\n");
3342 goto out;
3343 }
3344
3345 /*
3346 * Allocate memory for UTP Task Management descriptors
3347 * UFSHCI requires 1024 byte alignment of UTMRD
3348 */
3349 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003350 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3351 utmrdl_size,
3352 &hba->utmrdl_dma_addr,
3353 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303354 if (!hba->utmrdl_base_addr ||
3355 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303356 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303357 "Task Management Descriptor Memory allocation failed\n");
3358 goto out;
3359 }
3360
3361 /* Allocate memory for local reference block */
Kees Cooka86854d2018-06-12 14:07:58 -07003362 hba->lrb = devm_kcalloc(hba->dev,
3363 hba->nutrs, sizeof(struct ufshcd_lrb),
Seungwon Jeon2953f852013-06-27 13:31:54 +09003364 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303365 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303366 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303367 goto out;
3368 }
3369 return 0;
3370out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303371 return -ENOMEM;
3372}
3373
3374/**
3375 * ufshcd_host_memory_configure - configure local reference block with
3376 * memory offsets
3377 * @hba: per adapter instance
3378 *
3379 * Configure Host memory space
3380 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3381 * address.
3382 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3383 * and PRDT offset.
3384 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3385 * into local reference block.
3386 */
3387static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3388{
3389 struct utp_transfer_cmd_desc *cmd_descp;
3390 struct utp_transfer_req_desc *utrdlp;
3391 dma_addr_t cmd_desc_dma_addr;
3392 dma_addr_t cmd_desc_element_addr;
3393 u16 response_offset;
3394 u16 prdt_offset;
3395 int cmd_desc_size;
3396 int i;
3397
3398 utrdlp = hba->utrdl_base_addr;
3399 cmd_descp = hba->ucdl_base_addr;
3400
3401 response_offset =
3402 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3403 prdt_offset =
3404 offsetof(struct utp_transfer_cmd_desc, prd_table);
3405
3406 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3407 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3408
3409 for (i = 0; i < hba->nutrs; i++) {
3410 /* Configure UTRD with command descriptor base address */
3411 cmd_desc_element_addr =
3412 (cmd_desc_dma_addr + (cmd_desc_size * i));
3413 utrdlp[i].command_desc_base_addr_lo =
3414 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3415 utrdlp[i].command_desc_base_addr_hi =
3416 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3417
3418 /* Response upiu and prdt offset should be in double words */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003419 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3420 utrdlp[i].response_upiu_offset =
3421 cpu_to_le16(response_offset);
3422 utrdlp[i].prd_table_offset =
3423 cpu_to_le16(prdt_offset);
3424 utrdlp[i].response_upiu_length =
3425 cpu_to_le16(ALIGNED_UPIU_SIZE);
3426 } else {
3427 utrdlp[i].response_upiu_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303428 cpu_to_le16((response_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003429 utrdlp[i].prd_table_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303430 cpu_to_le16((prdt_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003431 utrdlp[i].response_upiu_length =
Sujit Reddy Thumma3ca316c2013-06-26 22:39:30 +05303432 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003433 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303434
3435 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003436 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3437 (i * sizeof(struct utp_transfer_req_desc));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303438 hba->lrb[i].ucd_req_ptr =
3439 (struct utp_upiu_req *)(cmd_descp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003440 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303441 hba->lrb[i].ucd_rsp_ptr =
3442 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003443 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3444 response_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303445 hba->lrb[i].ucd_prdt_ptr =
3446 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003447 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3448 prdt_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303449 }
3450}
3451
3452/**
3453 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3454 * @hba: per adapter instance
3455 *
3456 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3457 * in order to initialize the Unipro link startup procedure.
3458 * Once the Unipro links are up, the device connected to the controller
3459 * is detected.
3460 *
3461 * Returns 0 on success, non-zero value on failure
3462 */
3463static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3464{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303465 struct uic_command uic_cmd = {0};
3466 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303467
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303468 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3469
3470 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3471 if (ret)
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003472 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303473 "dme-link-startup: error code %d\n", ret);
3474 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303475}
Alim Akhtar4404c5d2018-05-06 15:44:17 +05303476/**
3477 * ufshcd_dme_reset - UIC command for DME_RESET
3478 * @hba: per adapter instance
3479 *
3480 * DME_RESET command is issued in order to reset UniPro stack.
3481 * This function now deal with cold reset.
3482 *
3483 * Returns 0 on success, non-zero value on failure
3484 */
3485static int ufshcd_dme_reset(struct ufs_hba *hba)
3486{
3487 struct uic_command uic_cmd = {0};
3488 int ret;
3489
3490 uic_cmd.command = UIC_CMD_DME_RESET;
3491
3492 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3493 if (ret)
3494 dev_err(hba->dev,
3495 "dme-reset: error code %d\n", ret);
3496
3497 return ret;
3498}
3499
3500/**
3501 * ufshcd_dme_enable - UIC command for DME_ENABLE
3502 * @hba: per adapter instance
3503 *
3504 * DME_ENABLE command is issued in order to enable UniPro stack.
3505 *
3506 * Returns 0 on success, non-zero value on failure
3507 */
3508static int ufshcd_dme_enable(struct ufs_hba *hba)
3509{
3510 struct uic_command uic_cmd = {0};
3511 int ret;
3512
3513 uic_cmd.command = UIC_CMD_DME_ENABLE;
3514
3515 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3516 if (ret)
3517 dev_err(hba->dev,
3518 "dme-reset: error code %d\n", ret);
3519
3520 return ret;
3521}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303522
Yaniv Gardicad2e032015-03-31 17:37:14 +03003523static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3524{
3525 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3526 unsigned long min_sleep_time_us;
3527
3528 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3529 return;
3530
3531 /*
3532 * last_dme_cmd_tstamp will be 0 only for 1st call to
3533 * this function
3534 */
3535 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3536 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3537 } else {
3538 unsigned long delta =
3539 (unsigned long) ktime_to_us(
3540 ktime_sub(ktime_get(),
3541 hba->last_dme_cmd_tstamp));
3542
3543 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3544 min_sleep_time_us =
3545 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3546 else
3547 return; /* no more delay required */
3548 }
3549
3550 /* allow sleep for extra 50us if needed */
3551 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3552}
3553
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303554/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303555 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3556 * @hba: per adapter instance
3557 * @attr_sel: uic command argument1
3558 * @attr_set: attribute set type as uic command argument2
3559 * @mib_val: setting value as uic command argument3
3560 * @peer: indicate whether peer or local
3561 *
3562 * Returns 0 on success, non-zero value on failure
3563 */
3564int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3565 u8 attr_set, u32 mib_val, u8 peer)
3566{
3567 struct uic_command uic_cmd = {0};
3568 static const char *const action[] = {
3569 "dme-set",
3570 "dme-peer-set"
3571 };
3572 const char *set = action[!!peer];
3573 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003574 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303575
3576 uic_cmd.command = peer ?
3577 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3578 uic_cmd.argument1 = attr_sel;
3579 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3580 uic_cmd.argument3 = mib_val;
3581
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003582 do {
3583 /* for peer attributes we retry upon failure */
3584 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3585 if (ret)
3586 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3587 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3588 } while (ret && peer && --retries);
3589
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003590 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003591 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003592 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3593 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303594
3595 return ret;
3596}
3597EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3598
3599/**
3600 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3601 * @hba: per adapter instance
3602 * @attr_sel: uic command argument1
3603 * @mib_val: the value of the attribute as returned by the UIC command
3604 * @peer: indicate whether peer or local
3605 *
3606 * Returns 0 on success, non-zero value on failure
3607 */
3608int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3609 u32 *mib_val, u8 peer)
3610{
3611 struct uic_command uic_cmd = {0};
3612 static const char *const action[] = {
3613 "dme-get",
3614 "dme-peer-get"
3615 };
3616 const char *get = action[!!peer];
3617 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003618 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003619 struct ufs_pa_layer_attr orig_pwr_info;
3620 struct ufs_pa_layer_attr temp_pwr_info;
3621 bool pwr_mode_change = false;
3622
3623 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3624 orig_pwr_info = hba->pwr_info;
3625 temp_pwr_info = orig_pwr_info;
3626
3627 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3628 orig_pwr_info.pwr_rx == FAST_MODE) {
3629 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3630 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3631 pwr_mode_change = true;
3632 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3633 orig_pwr_info.pwr_rx == SLOW_MODE) {
3634 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3635 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3636 pwr_mode_change = true;
3637 }
3638 if (pwr_mode_change) {
3639 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3640 if (ret)
3641 goto out;
3642 }
3643 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303644
3645 uic_cmd.command = peer ?
3646 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3647 uic_cmd.argument1 = attr_sel;
3648
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003649 do {
3650 /* for peer attributes we retry upon failure */
3651 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3652 if (ret)
3653 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3654 get, UIC_GET_ATTR_ID(attr_sel), ret);
3655 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303656
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003657 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003658 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003659 get, UIC_GET_ATTR_ID(attr_sel),
3660 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003661
3662 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303663 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003664
3665 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3666 && pwr_mode_change)
3667 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303668out:
3669 return ret;
3670}
3671EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3672
3673/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003674 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3675 * state) and waits for it to take effect.
3676 *
3677 * @hba: per adapter instance
3678 * @cmd: UIC command to execute
3679 *
3680 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3681 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3682 * and device UniPro link and hence it's final completion would be indicated by
3683 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3684 * addition to normal UIC command completion Status (UCCS). This function only
3685 * returns after the relevant status bits indicate the completion.
3686 *
3687 * Returns 0 on success, non-zero value on failure
3688 */
3689static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3690{
3691 struct completion uic_async_done;
3692 unsigned long flags;
3693 u8 status;
3694 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003695 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003696
3697 mutex_lock(&hba->uic_cmd_mutex);
3698 init_completion(&uic_async_done);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003699 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003700
3701 spin_lock_irqsave(hba->host->host_lock, flags);
3702 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003703 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3704 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3705 /*
3706 * Make sure UIC command completion interrupt is disabled before
3707 * issuing UIC command.
3708 */
3709 wmb();
3710 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003711 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003712 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3713 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003714 if (ret) {
3715 dev_err(hba->dev,
3716 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3717 cmd->command, cmd->argument3, ret);
3718 goto out;
3719 }
3720
3721 if (!wait_for_completion_timeout(hba->uic_async_done,
3722 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3723 dev_err(hba->dev,
3724 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3725 cmd->command, cmd->argument3);
3726 ret = -ETIMEDOUT;
3727 goto out;
3728 }
3729
3730 status = ufshcd_get_upmcrs(hba);
3731 if (status != PWR_LOCAL) {
3732 dev_err(hba->dev,
Zang Leigang479da362017-09-19 16:50:30 +08003733 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003734 cmd->command, status);
3735 ret = (status != PWR_OK) ? status : -1;
3736 }
3737out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08003738 if (ret) {
3739 ufshcd_print_host_state(hba);
3740 ufshcd_print_pwr_info(hba);
3741 ufshcd_print_host_regs(hba);
3742 }
3743
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003744 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003745 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003746 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003747 if (reenable_intr)
3748 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003749 spin_unlock_irqrestore(hba->host->host_lock, flags);
3750 mutex_unlock(&hba->uic_cmd_mutex);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003751
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003752 return ret;
3753}
3754
3755/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303756 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3757 * using DME_SET primitives.
3758 * @hba: per adapter instance
3759 * @mode: powr mode value
3760 *
3761 * Returns 0 on success, non-zero value on failure
3762 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05303763static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303764{
3765 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003766 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303767
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003768 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3769 ret = ufshcd_dme_set(hba,
3770 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3771 if (ret) {
3772 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3773 __func__, ret);
3774 goto out;
3775 }
3776 }
3777
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303778 uic_cmd.command = UIC_CMD_DME_SET;
3779 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3780 uic_cmd.argument3 = mode;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003781 ufshcd_hold(hba, false);
3782 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3783 ufshcd_release(hba);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303784
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003785out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003786 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003787}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303788
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003789static int ufshcd_link_recovery(struct ufs_hba *hba)
3790{
3791 int ret;
3792 unsigned long flags;
3793
3794 spin_lock_irqsave(hba->host->host_lock, flags);
3795 hba->ufshcd_state = UFSHCD_STATE_RESET;
3796 ufshcd_set_eh_in_progress(hba);
3797 spin_unlock_irqrestore(hba->host->host_lock, flags);
3798
Can Guoebdd1df2019-11-14 22:09:24 -08003799 /* Reset the attached device */
3800 ufshcd_vops_device_reset(hba);
3801
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003802 ret = ufshcd_host_reset_and_restore(hba);
3803
3804 spin_lock_irqsave(hba->host->host_lock, flags);
3805 if (ret)
3806 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3807 ufshcd_clear_eh_in_progress(hba);
3808 spin_unlock_irqrestore(hba->host->host_lock, flags);
3809
3810 if (ret)
3811 dev_err(hba->dev, "%s: link recovery failed, err %d",
3812 __func__, ret);
3813
3814 return ret;
3815}
3816
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003817static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003818{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003819 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003820 struct uic_command uic_cmd = {0};
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003821 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003822
Kiwoong Kimee32c902016-11-10 21:17:43 +09003823 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3824
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003825 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003826 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003827 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3828 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003829
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003830 if (ret) {
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003831 int err;
3832
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003833 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3834 __func__, ret);
3835
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003836 /*
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003837 * If link recovery fails then return error code returned from
3838 * ufshcd_link_recovery().
3839 * If link recovery succeeds then return -EAGAIN to attempt
3840 * hibern8 enter retry again.
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003841 */
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003842 err = ufshcd_link_recovery(hba);
3843 if (err) {
3844 dev_err(hba->dev, "%s: link recovery failed", __func__);
3845 ret = err;
3846 } else {
3847 ret = -EAGAIN;
3848 }
Kiwoong Kimee32c902016-11-10 21:17:43 +09003849 } else
3850 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3851 POST_CHANGE);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003852
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003853 return ret;
3854}
3855
3856static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3857{
3858 int ret = 0, retries;
3859
3860 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3861 ret = __ufshcd_uic_hibern8_enter(hba);
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003862 if (!ret)
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003863 goto out;
3864 }
3865out:
3866 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003867}
3868
3869static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3870{
3871 struct uic_command uic_cmd = {0};
3872 int ret;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003873 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003874
Kiwoong Kimee32c902016-11-10 21:17:43 +09003875 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3876
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003877 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3878 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003879 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3880 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3881
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303882 if (ret) {
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003883 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3884 __func__, ret);
3885 ret = ufshcd_link_recovery(hba);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003886 } else {
Kiwoong Kimee32c902016-11-10 21:17:43 +09003887 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3888 POST_CHANGE);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003889 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3890 hba->ufs_stats.hibern8_exit_cnt++;
3891 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303892
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303893 return ret;
3894}
3895
Can Guo71d848b2019-11-14 22:09:26 -08003896void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
Adrian Hunterad448372018-03-20 15:07:38 +02003897{
3898 unsigned long flags;
3899
Stanley Chuee5f1042019-05-21 14:44:52 +08003900 if (!ufshcd_is_auto_hibern8_supported(hba) || !hba->ahit)
Adrian Hunterad448372018-03-20 15:07:38 +02003901 return;
3902
3903 spin_lock_irqsave(hba->host->host_lock, flags);
3904 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3905 spin_unlock_irqrestore(hba->host->host_lock, flags);
3906}
3907
Yaniv Gardi50646362014-10-23 13:25:13 +03003908 /**
3909 * ufshcd_init_pwr_info - setting the POR (power on reset)
3910 * values in hba power info
3911 * @hba: per-adapter instance
3912 */
3913static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3914{
3915 hba->pwr_info.gear_rx = UFS_PWM_G1;
3916 hba->pwr_info.gear_tx = UFS_PWM_G1;
3917 hba->pwr_info.lane_rx = 1;
3918 hba->pwr_info.lane_tx = 1;
3919 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3920 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3921 hba->pwr_info.hs_rate = 0;
3922}
3923
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303924/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003925 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3926 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303927 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003928static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303929{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003930 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3931
3932 if (hba->max_pwr_info.is_valid)
3933 return 0;
3934
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003935 pwr_info->pwr_tx = FAST_MODE;
3936 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003937 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303938
3939 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003940 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3941 &pwr_info->lane_rx);
3942 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3943 &pwr_info->lane_tx);
3944
3945 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
3946 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
3947 __func__,
3948 pwr_info->lane_rx,
3949 pwr_info->lane_tx);
3950 return -EINVAL;
3951 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303952
3953 /*
3954 * First, get the maximum gears of HS speed.
3955 * If a zero value, it means there is no HSGEAR capability.
3956 * Then, get the maximum gears of PWM speed.
3957 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003958 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
3959 if (!pwr_info->gear_rx) {
3960 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3961 &pwr_info->gear_rx);
3962 if (!pwr_info->gear_rx) {
3963 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
3964 __func__, pwr_info->gear_rx);
3965 return -EINVAL;
3966 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003967 pwr_info->pwr_rx = SLOW_MODE;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303968 }
3969
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003970 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
3971 &pwr_info->gear_tx);
3972 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303973 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003974 &pwr_info->gear_tx);
3975 if (!pwr_info->gear_tx) {
3976 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
3977 __func__, pwr_info->gear_tx);
3978 return -EINVAL;
3979 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003980 pwr_info->pwr_tx = SLOW_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003981 }
3982
3983 hba->max_pwr_info.is_valid = true;
3984 return 0;
3985}
3986
3987static int ufshcd_change_power_mode(struct ufs_hba *hba,
3988 struct ufs_pa_layer_attr *pwr_mode)
3989{
3990 int ret;
3991
3992 /* if already configured to the requested pwr_mode */
3993 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
3994 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
3995 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
3996 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
3997 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
3998 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
3999 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4000 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4001 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304002 }
4003
4004 /*
4005 * Configure attributes for power mode change with below.
4006 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4007 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4008 * - PA_HSSERIES
4009 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004010 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4011 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4012 pwr_mode->lane_rx);
4013 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4014 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304015 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004016 else
4017 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304018
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004019 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4020 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4021 pwr_mode->lane_tx);
4022 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4023 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304024 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004025 else
4026 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304027
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004028 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4029 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4030 pwr_mode->pwr_rx == FAST_MODE ||
4031 pwr_mode->pwr_tx == FAST_MODE)
4032 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4033 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304034
Can Guo08342532019-12-05 02:14:42 +00004035 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
4036 DL_FC0ProtectionTimeOutVal_Default);
4037 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
4038 DL_TC0ReplayTimeOutVal_Default);
4039 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
4040 DL_AFC0ReqTimeOutVal_Default);
4041 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
4042 DL_FC1ProtectionTimeOutVal_Default);
4043 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
4044 DL_TC1ReplayTimeOutVal_Default);
4045 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
4046 DL_AFC1ReqTimeOutVal_Default);
4047
4048 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
4049 DL_FC0ProtectionTimeOutVal_Default);
4050 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
4051 DL_TC0ReplayTimeOutVal_Default);
4052 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
4053 DL_AFC0ReqTimeOutVal_Default);
4054
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004055 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4056 | pwr_mode->pwr_tx);
4057
4058 if (ret) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304059 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004060 "%s: power mode change failed %d\n", __func__, ret);
4061 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004062 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4063 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004064
4065 memcpy(&hba->pwr_info, pwr_mode,
4066 sizeof(struct ufs_pa_layer_attr));
4067 }
4068
4069 return ret;
4070}
4071
4072/**
4073 * ufshcd_config_pwr_mode - configure a new power mode
4074 * @hba: per-adapter instance
4075 * @desired_pwr_mode: desired power configuration
4076 */
Alim Akhtar0d846e72018-05-06 15:44:18 +05304077int ufshcd_config_pwr_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004078 struct ufs_pa_layer_attr *desired_pwr_mode)
4079{
4080 struct ufs_pa_layer_attr final_params = { 0 };
4081 int ret;
4082
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004083 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4084 desired_pwr_mode, &final_params);
4085
4086 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004087 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4088
4089 ret = ufshcd_change_power_mode(hba, &final_params);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08004090 if (!ret)
4091 ufshcd_print_pwr_info(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304092
4093 return ret;
4094}
Alim Akhtar0d846e72018-05-06 15:44:18 +05304095EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304096
4097/**
Dolev Raviv68078d52013-07-30 00:35:58 +05304098 * ufshcd_complete_dev_init() - checks device readiness
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004099 * @hba: per-adapter instance
Dolev Raviv68078d52013-07-30 00:35:58 +05304100 *
4101 * Set fDeviceInit flag and poll until device toggles it.
4102 */
4103static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4104{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004105 int i;
4106 int err;
Dolev Raviv68078d52013-07-30 00:35:58 +05304107 bool flag_res = 1;
4108
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004109 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4110 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05304111 if (err) {
4112 dev_err(hba->dev,
4113 "%s setting fDeviceInit flag failed with error %d\n",
4114 __func__, err);
4115 goto out;
4116 }
4117
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004118 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4119 for (i = 0; i < 1000 && !err && flag_res; i++)
4120 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4121 QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4122
Dolev Raviv68078d52013-07-30 00:35:58 +05304123 if (err)
4124 dev_err(hba->dev,
4125 "%s reading fDeviceInit flag failed with error %d\n",
4126 __func__, err);
4127 else if (flag_res)
4128 dev_err(hba->dev,
4129 "%s fDeviceInit was not cleared by the device\n",
4130 __func__);
4131
4132out:
4133 return err;
4134}
4135
4136/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304137 * ufshcd_make_hba_operational - Make UFS controller operational
4138 * @hba: per adapter instance
4139 *
4140 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004141 * 1. Enable required interrupts
4142 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004143 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004144 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304145 *
4146 * Returns 0 on success, non-zero value on failure
4147 */
4148static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4149{
4150 int err = 0;
4151 u32 reg;
4152
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304153 /* Enable required interrupts */
4154 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4155
4156 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004157 if (ufshcd_is_intr_aggr_allowed(hba))
4158 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4159 else
4160 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304161
4162 /* Configure UTRL and UTMRL base address registers */
4163 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4164 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4165 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4166 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4167 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4168 REG_UTP_TASK_REQ_LIST_BASE_L);
4169 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4170 REG_UTP_TASK_REQ_LIST_BASE_H);
4171
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304172 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004173 * Make sure base address and interrupt setup are updated before
4174 * enabling the run/stop registers below.
4175 */
4176 wmb();
4177
4178 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304179 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304180 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004181 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304182 if (!(ufshcd_get_lists_status(reg))) {
4183 ufshcd_enable_run_stop_reg(hba);
4184 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304185 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304186 "Host controller not ready to process requests");
4187 err = -EIO;
4188 goto out;
4189 }
4190
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304191out:
4192 return err;
4193}
4194
4195/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02004196 * ufshcd_hba_stop - Send controller to reset state
4197 * @hba: per adapter instance
4198 * @can_sleep: perform sleep or just spin
4199 */
4200static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4201{
4202 int err;
4203
4204 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4205 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4206 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4207 10, 1, can_sleep);
4208 if (err)
4209 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4210}
4211
4212/**
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304213 * ufshcd_hba_execute_hce - initialize the controller
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304214 * @hba: per adapter instance
4215 *
4216 * The controller resets itself and controller firmware initialization
4217 * sequence kicks off. When controller is ready it will set
4218 * the Host Controller Enable bit to 1.
4219 *
4220 * Returns 0 on success, non-zero value on failure
4221 */
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304222static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304223{
4224 int retry;
4225
Yaniv Gardi596585a2016-03-10 17:37:08 +02004226 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304227 /* change controller state to "reset state" */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004228 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304229
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004230 /* UniPro link is disabled at this point */
4231 ufshcd_set_link_off(hba);
4232
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004233 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004234
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304235 /* start controller initialization sequence */
4236 ufshcd_hba_start(hba);
4237
4238 /*
4239 * To initialize a UFS host controller HCE bit must be set to 1.
4240 * During initialization the HCE bit value changes from 1->0->1.
4241 * When the host controller completes initialization sequence
4242 * it sets the value of HCE bit to 1. The same HCE bit is read back
4243 * to check if the controller has completed initialization sequence.
4244 * So without this delay the value HCE = 1, set in the previous
4245 * instruction might be read back.
4246 * This delay can be changed based on the controller.
4247 */
Bean Huo838c1ef2019-07-15 11:21:10 +00004248 usleep_range(1000, 1100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304249
4250 /* wait for the host controller to complete initialization */
4251 retry = 10;
4252 while (ufshcd_is_hba_active(hba)) {
4253 if (retry) {
4254 retry--;
4255 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304256 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304257 "Controller enable failed\n");
4258 return -EIO;
4259 }
Bean Huo838c1ef2019-07-15 11:21:10 +00004260 usleep_range(5000, 5100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304261 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004262
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004263 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004264 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004265
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004266 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004267
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304268 return 0;
4269}
4270
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304271static int ufshcd_hba_enable(struct ufs_hba *hba)
4272{
4273 int ret;
4274
4275 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4276 ufshcd_set_link_off(hba);
4277 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4278
4279 /* enable UIC related interrupts */
4280 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4281 ret = ufshcd_dme_reset(hba);
4282 if (!ret) {
4283 ret = ufshcd_dme_enable(hba);
4284 if (!ret)
4285 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4286 if (ret)
4287 dev_err(hba->dev,
4288 "Host controller enable failed with non-hce\n");
4289 }
4290 } else {
4291 ret = ufshcd_hba_execute_hce(hba);
4292 }
4293
4294 return ret;
4295}
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004296static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4297{
4298 int tx_lanes, i, err = 0;
4299
4300 if (!peer)
4301 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4302 &tx_lanes);
4303 else
4304 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4305 &tx_lanes);
4306 for (i = 0; i < tx_lanes; i++) {
4307 if (!peer)
4308 err = ufshcd_dme_set(hba,
4309 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4310 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4311 0);
4312 else
4313 err = ufshcd_dme_peer_set(hba,
4314 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4315 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4316 0);
4317 if (err) {
4318 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4319 __func__, peer, i, err);
4320 break;
4321 }
4322 }
4323
4324 return err;
4325}
4326
4327static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4328{
4329 return ufshcd_disable_tx_lcc(hba, true);
4330}
4331
Stanley Chu8808b4e2019-07-10 21:38:21 +08004332static void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist,
4333 u32 reg)
4334{
4335 reg_hist->reg[reg_hist->pos] = reg;
4336 reg_hist->tstamp[reg_hist->pos] = ktime_get();
4337 reg_hist->pos = (reg_hist->pos + 1) % UFS_ERR_REG_HIST_LENGTH;
4338}
4339
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304340/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304341 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304342 * @hba: per adapter instance
4343 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304344 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304345 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304346static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304347{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304348 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004349 int retries = DME_LINKSTARTUP_RETRIES;
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004350 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304351
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004352 /*
4353 * If UFS device isn't active then we will have to issue link startup
4354 * 2 times to make sure the device state move to active.
4355 */
4356 if (!ufshcd_is_ufs_dev_active(hba))
4357 link_startup_again = true;
4358
4359link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004360 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004361 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304362
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004363 ret = ufshcd_dme_link_startup(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004364
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004365 /* check if device is detected by inter-connect layer */
4366 if (!ret && !ufshcd_is_device_present(hba)) {
Stanley Chu8808b4e2019-07-10 21:38:21 +08004367 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4368 0);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004369 dev_err(hba->dev, "%s: Device not present\n", __func__);
4370 ret = -ENXIO;
4371 goto out;
4372 }
4373
4374 /*
4375 * DME link lost indication is only received when link is up,
4376 * but we can't be sure if the link is up until link startup
4377 * succeeds. So reset the local Uni-Pro and try again.
4378 */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004379 if (ret && ufshcd_hba_enable(hba)) {
4380 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4381 (u32)ret);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004382 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004383 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004384 } while (ret && retries--);
4385
Stanley Chu8808b4e2019-07-10 21:38:21 +08004386 if (ret) {
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004387 /* failed to get the link up... retire */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004388 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4389 (u32)ret);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304390 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004391 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304392
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004393 if (link_startup_again) {
4394 link_startup_again = false;
4395 retries = DME_LINKSTARTUP_RETRIES;
4396 goto link_startup;
4397 }
4398
subhashj@codeaurora.orgd2aebb92016-12-22 18:41:33 -08004399 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4400 ufshcd_init_pwr_info(hba);
4401 ufshcd_print_pwr_info(hba);
4402
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004403 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4404 ret = ufshcd_disable_device_tx_lcc(hba);
4405 if (ret)
4406 goto out;
4407 }
4408
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004409 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004410 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4411 if (ret)
4412 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004413
4414 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304415out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004416 if (ret) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304417 dev_err(hba->dev, "link startup failed %d\n", ret);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004418 ufshcd_print_host_state(hba);
4419 ufshcd_print_pwr_info(hba);
4420 ufshcd_print_host_regs(hba);
4421 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304422 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304423}
4424
4425/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304426 * ufshcd_verify_dev_init() - Verify device initialization
4427 * @hba: per-adapter instance
4428 *
4429 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4430 * device Transport Protocol (UTP) layer is ready after a reset.
4431 * If the UTP layer at the device side is not initialized, it may
4432 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4433 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4434 */
4435static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4436{
4437 int err = 0;
4438 int retries;
4439
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004440 ufshcd_hold(hba, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304441 mutex_lock(&hba->dev_cmd.lock);
4442 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4443 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4444 NOP_OUT_TIMEOUT);
4445
4446 if (!err || err == -ETIMEDOUT)
4447 break;
4448
4449 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4450 }
4451 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004452 ufshcd_release(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304453
4454 if (err)
4455 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4456 return err;
4457}
4458
4459/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004460 * ufshcd_set_queue_depth - set lun queue depth
4461 * @sdev: pointer to SCSI device
4462 *
4463 * Read bLUQueueDepth value and activate scsi tagged command
4464 * queueing. For WLUN, queue depth is set to 1. For best-effort
4465 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4466 * value that host can queue.
4467 */
4468static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4469{
4470 int ret = 0;
4471 u8 lun_qdepth;
4472 struct ufs_hba *hba;
4473
4474 hba = shost_priv(sdev->host);
4475
4476 lun_qdepth = hba->nutrs;
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02004477 ret = ufshcd_read_unit_desc_param(hba,
4478 ufshcd_scsi_to_upiu_lun(sdev->lun),
4479 UNIT_DESC_PARAM_LU_Q_DEPTH,
4480 &lun_qdepth,
4481 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004482
4483 /* Some WLUN doesn't support unit descriptor */
4484 if (ret == -EOPNOTSUPP)
4485 lun_qdepth = 1;
4486 else if (!lun_qdepth)
4487 /* eventually, we can figure out the real queue depth */
4488 lun_qdepth = hba->nutrs;
4489 else
4490 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4491
4492 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4493 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004494 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004495}
4496
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004497/*
4498 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4499 * @hba: per-adapter instance
4500 * @lun: UFS device lun id
4501 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4502 *
4503 * Returns 0 in case of success and b_lu_write_protect status would be returned
4504 * @b_lu_write_protect parameter.
4505 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4506 * Returns -EINVAL in case of invalid parameters passed to this function.
4507 */
4508static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4509 u8 lun,
4510 u8 *b_lu_write_protect)
4511{
4512 int ret;
4513
4514 if (!b_lu_write_protect)
4515 ret = -EINVAL;
4516 /*
4517 * According to UFS device spec, RPMB LU can't be write
4518 * protected so skip reading bLUWriteProtect parameter for
4519 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4520 */
4521 else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4522 ret = -ENOTSUPP;
4523 else
4524 ret = ufshcd_read_unit_desc_param(hba,
4525 lun,
4526 UNIT_DESC_PARAM_LU_WR_PROTECT,
4527 b_lu_write_protect,
4528 sizeof(*b_lu_write_protect));
4529 return ret;
4530}
4531
4532/**
4533 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4534 * status
4535 * @hba: per-adapter instance
4536 * @sdev: pointer to SCSI device
4537 *
4538 */
4539static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4540 struct scsi_device *sdev)
4541{
4542 if (hba->dev_info.f_power_on_wp_en &&
4543 !hba->dev_info.is_lu_power_on_wp) {
4544 u8 b_lu_write_protect;
4545
4546 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4547 &b_lu_write_protect) &&
4548 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4549 hba->dev_info.is_lu_power_on_wp = true;
4550 }
4551}
4552
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004553/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304554 * ufshcd_slave_alloc - handle initial SCSI device configurations
4555 * @sdev: pointer to SCSI device
4556 *
4557 * Returns success
4558 */
4559static int ufshcd_slave_alloc(struct scsi_device *sdev)
4560{
4561 struct ufs_hba *hba;
4562
4563 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304564
4565 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4566 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304567
Can Guoa3a76392019-12-05 02:14:30 +00004568 /* DBD field should be set to 1 in mode sense(10) */
4569 sdev->set_dbd_for_ms = 1;
4570
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304571 /* allow SCSI layer to restart the device in case of errors */
4572 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004573
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004574 /* REPORT SUPPORTED OPERATION CODES is not supported */
4575 sdev->no_report_opcodes = 1;
4576
Sujit Reddy Thumma84af7e82018-01-24 09:52:35 +05304577 /* WRITE_SAME command is not supported */
4578 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004579
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004580 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004581
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004582 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4583
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004584 return 0;
4585}
4586
4587/**
4588 * ufshcd_change_queue_depth - change queue depth
4589 * @sdev: pointer to SCSI device
4590 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004591 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004592 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004593 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004594static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004595{
4596 struct ufs_hba *hba = shost_priv(sdev->host);
4597
4598 if (depth > hba->nutrs)
4599 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004600 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304601}
4602
4603/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004604 * ufshcd_slave_configure - adjust SCSI device configurations
4605 * @sdev: pointer to SCSI device
4606 */
4607static int ufshcd_slave_configure(struct scsi_device *sdev)
4608{
Stanley Chu49615ba2019-09-16 23:56:50 +08004609 struct ufs_hba *hba = shost_priv(sdev->host);
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004610 struct request_queue *q = sdev->request_queue;
4611
4612 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
Stanley Chu49615ba2019-09-16 23:56:50 +08004613
4614 if (ufshcd_is_rpm_autosuspend_allowed(hba))
4615 sdev->rpm_autosuspend = 1;
4616
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004617 return 0;
4618}
4619
4620/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304621 * ufshcd_slave_destroy - remove SCSI device configurations
4622 * @sdev: pointer to SCSI device
4623 */
4624static void ufshcd_slave_destroy(struct scsi_device *sdev)
4625{
4626 struct ufs_hba *hba;
4627
4628 hba = shost_priv(sdev->host);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004629 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004630 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4631 unsigned long flags;
4632
4633 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004634 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004635 spin_unlock_irqrestore(hba->host->host_lock, flags);
4636 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304637}
4638
4639/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304640 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004641 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304642 * @scsi_status: SCSI command status
4643 *
4644 * Returns value base on SCSI command status
4645 */
4646static inline int
4647ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4648{
4649 int result = 0;
4650
4651 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304652 case SAM_STAT_CHECK_CONDITION:
4653 ufshcd_copy_sense_data(lrbp);
Tomas Winkler30eb2e42018-11-26 10:10:34 +02004654 /* fallthrough */
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304655 case SAM_STAT_GOOD:
4656 result |= DID_OK << 16 |
4657 COMMAND_COMPLETE << 8 |
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304658 scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304659 break;
4660 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304661 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304662 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304663 ufshcd_copy_sense_data(lrbp);
4664 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304665 break;
4666 default:
4667 result |= DID_ERROR << 16;
4668 break;
4669 } /* end of switch */
4670
4671 return result;
4672}
4673
4674/**
4675 * ufshcd_transfer_rsp_status - Get overall status of the response
4676 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004677 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304678 *
4679 * Returns result of the command to notify SCSI midlayer
4680 */
4681static inline int
4682ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4683{
4684 int result = 0;
4685 int scsi_status;
4686 int ocs;
4687
4688 /* overall command status of utrd */
4689 ocs = ufshcd_get_tr_ocs(lrbp);
4690
4691 switch (ocs) {
4692 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304693 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004694 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304695 switch (result) {
4696 case UPIU_TRANSACTION_RESPONSE:
4697 /*
4698 * get the response UPIU result to extract
4699 * the SCSI command status
4700 */
4701 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4702
4703 /*
4704 * get the result based on SCSI status response
4705 * to notify the SCSI midlayer of the command status
4706 */
4707 scsi_status = result & MASK_SCSI_STATUS;
4708 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304709
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02004710 /*
4711 * Currently we are only supporting BKOPs exception
4712 * events hence we can ignore BKOPs exception event
4713 * during power management callbacks. BKOPs exception
4714 * event is not expected to be raised in runtime suspend
4715 * callback as it allows the urgent bkops.
4716 * During system suspend, we are anyway forcefully
4717 * disabling the bkops and if urgent bkops is needed
4718 * it will be enabled on system resume. Long term
4719 * solution could be to abort the system suspend if
4720 * UFS device needs urgent BKOPs.
4721 */
4722 if (!hba->pm_op_in_progress &&
4723 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304724 schedule_work(&hba->eeh_work);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304725 break;
4726 case UPIU_TRANSACTION_REJECT_UPIU:
4727 /* TODO: handle Reject UPIU Response */
4728 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304729 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304730 "Reject UPIU not fully implemented\n");
4731 break;
4732 default:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304733 dev_err(hba->dev,
4734 "Unexpected request response code = %x\n",
4735 result);
Stanley Chue0347d82019-04-15 20:23:38 +08004736 result = DID_ERROR << 16;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304737 break;
4738 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304739 break;
4740 case OCS_ABORTED:
4741 result |= DID_ABORT << 16;
4742 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304743 case OCS_INVALID_COMMAND_STATUS:
4744 result |= DID_REQUEUE << 16;
4745 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304746 case OCS_INVALID_CMD_TABLE_ATTR:
4747 case OCS_INVALID_PRDT_ATTR:
4748 case OCS_MISMATCH_DATA_BUF_SIZE:
4749 case OCS_MISMATCH_RESP_UPIU_SIZE:
4750 case OCS_PEER_COMM_FAILURE:
4751 case OCS_FATAL_ERROR:
4752 default:
4753 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304754 dev_err(hba->dev,
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004755 "OCS error from controller = %x for tag %d\n",
4756 ocs, lrbp->task_tag);
4757 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08004758 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304759 break;
4760 } /* end of switch */
4761
Can Guo2df74b62019-11-25 22:53:33 -08004762 if ((host_byte(result) != DID_OK) && !hba->silence_err_logs)
Dolev Raviv66cc8202016-12-22 18:39:42 -08004763 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304764 return result;
4765}
4766
4767/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304768 * ufshcd_uic_cmd_compl - handle completion of uic command
4769 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304770 * @intr_status: interrupt status generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004771 *
4772 * Returns
4773 * IRQ_HANDLED - If interrupt is valid
4774 * IRQ_NONE - If invalid interrupt
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304775 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004776static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304777{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004778 irqreturn_t retval = IRQ_NONE;
4779
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304780 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304781 hba->active_uic_cmd->argument2 |=
4782 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304783 hba->active_uic_cmd->argument3 =
4784 ufshcd_get_dme_attr_val(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304785 complete(&hba->active_uic_cmd->done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004786 retval = IRQ_HANDLED;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304787 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304788
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004789 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004790 complete(hba->uic_async_done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004791 retval = IRQ_HANDLED;
4792 }
4793 return retval;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304794}
4795
4796/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004797 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304798 * @hba: per adapter instance
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004799 * @completed_reqs: requests to complete
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304800 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004801static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4802 unsigned long completed_reqs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304803{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304804 struct ufshcd_lrb *lrbp;
4805 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304806 int result;
4807 int index;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004808
Dolev Ravive9d501b2014-07-01 12:22:37 +03004809 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4810 lrbp = &hba->lrb[index];
4811 cmd = lrbp->cmd;
4812 if (cmd) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004813 ufshcd_add_command_trace(hba, index, "complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004814 result = ufshcd_transfer_rsp_status(hba, lrbp);
4815 scsi_dma_unmap(cmd);
4816 cmd->result = result;
4817 /* Mark completed command as NULL in LRB */
4818 lrbp->cmd = NULL;
Can Guo74a527a2019-11-25 22:53:32 -08004819 lrbp->compl_time_stamp = ktime_get();
Dolev Ravive9d501b2014-07-01 12:22:37 +03004820 /* Do not touch lrbp after scsi done */
4821 cmd->scsi_done(cmd);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004822 __ufshcd_release(hba);
Joao Pinto300bb132016-05-11 12:21:27 +01004823 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4824 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
Can Guo74a527a2019-11-25 22:53:32 -08004825 lrbp->compl_time_stamp = ktime_get();
Lee Susman1a07f2d2016-12-22 18:42:03 -08004826 if (hba->dev_cmd.complete) {
4827 ufshcd_add_command_trace(hba, index,
4828 "dev_complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004829 complete(hba->dev_cmd.complete);
Lee Susman1a07f2d2016-12-22 18:42:03 -08004830 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03004831 }
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08004832 if (ufshcd_is_clkscaling_supported(hba))
4833 hba->clk_scaling.active_reqs--;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004834 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304835
4836 /* clear corresponding bits of completed commands */
4837 hba->outstanding_reqs ^= completed_reqs;
4838
Sahitya Tummala856b3482014-09-25 15:32:34 +03004839 ufshcd_clk_scaling_update_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304840}
4841
4842/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004843 * ufshcd_transfer_req_compl - handle SCSI and query command completion
4844 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004845 *
4846 * Returns
4847 * IRQ_HANDLED - If interrupt is valid
4848 * IRQ_NONE - If invalid interrupt
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004849 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004850static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba)
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004851{
4852 unsigned long completed_reqs;
4853 u32 tr_doorbell;
4854
4855 /* Resetting interrupt aggregation counters first and reading the
4856 * DOOR_BELL afterward allows us to handle all the completed requests.
4857 * In order to prevent other interrupts starvation the DB is read once
4858 * after reset. The down side of this solution is the possibility of
4859 * false interrupt if device completes another request after resetting
4860 * aggregation and before reading the DB.
4861 */
Alim Akhtar5ac6abc2018-05-06 15:44:16 +05304862 if (ufshcd_is_intr_aggr_allowed(hba) &&
4863 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004864 ufshcd_reset_intr_aggr(hba);
4865
4866 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4867 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4868
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004869 if (completed_reqs) {
4870 __ufshcd_transfer_req_compl(hba, completed_reqs);
4871 return IRQ_HANDLED;
4872 } else {
4873 return IRQ_NONE;
4874 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004875}
4876
4877/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304878 * ufshcd_disable_ee - disable exception event
4879 * @hba: per-adapter instance
4880 * @mask: exception event to disable
4881 *
4882 * Disables exception event in the device so that the EVENT_ALERT
4883 * bit is not set.
4884 *
4885 * Returns zero on success, non-zero error value on failure.
4886 */
4887static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4888{
4889 int err = 0;
4890 u32 val;
4891
4892 if (!(hba->ee_ctrl_mask & mask))
4893 goto out;
4894
4895 val = hba->ee_ctrl_mask & ~mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004896 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004897 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304898 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4899 if (!err)
4900 hba->ee_ctrl_mask &= ~mask;
4901out:
4902 return err;
4903}
4904
4905/**
4906 * ufshcd_enable_ee - enable exception event
4907 * @hba: per-adapter instance
4908 * @mask: exception event to enable
4909 *
4910 * Enable corresponding exception event in the device to allow
4911 * device to alert host in critical scenarios.
4912 *
4913 * Returns zero on success, non-zero error value on failure.
4914 */
4915static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4916{
4917 int err = 0;
4918 u32 val;
4919
4920 if (hba->ee_ctrl_mask & mask)
4921 goto out;
4922
4923 val = hba->ee_ctrl_mask | mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004924 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004925 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304926 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4927 if (!err)
4928 hba->ee_ctrl_mask |= mask;
4929out:
4930 return err;
4931}
4932
4933/**
4934 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4935 * @hba: per-adapter instance
4936 *
4937 * Allow device to manage background operations on its own. Enabling
4938 * this might lead to inconsistent latencies during normal data transfers
4939 * as the device is allowed to manage its own way of handling background
4940 * operations.
4941 *
4942 * Returns zero on success, non-zero on failure.
4943 */
4944static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4945{
4946 int err = 0;
4947
4948 if (hba->auto_bkops_enabled)
4949 goto out;
4950
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004951 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304952 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4953 if (err) {
4954 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4955 __func__, err);
4956 goto out;
4957 }
4958
4959 hba->auto_bkops_enabled = true;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08004960 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304961
4962 /* No need of URGENT_BKOPS exception from the device */
4963 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4964 if (err)
4965 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
4966 __func__, err);
4967out:
4968 return err;
4969}
4970
4971/**
4972 * ufshcd_disable_auto_bkops - block device in doing background operations
4973 * @hba: per-adapter instance
4974 *
4975 * Disabling background operations improves command response latency but
4976 * has drawback of device moving into critical state where the device is
4977 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
4978 * host is idle so that BKOPS are managed effectively without any negative
4979 * impacts.
4980 *
4981 * Returns zero on success, non-zero on failure.
4982 */
4983static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
4984{
4985 int err = 0;
4986
4987 if (!hba->auto_bkops_enabled)
4988 goto out;
4989
4990 /*
4991 * If host assisted BKOPs is to be enabled, make sure
4992 * urgent bkops exception is allowed.
4993 */
4994 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
4995 if (err) {
4996 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
4997 __func__, err);
4998 goto out;
4999 }
5000
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005001 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305002 QUERY_FLAG_IDN_BKOPS_EN, NULL);
5003 if (err) {
5004 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5005 __func__, err);
5006 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5007 goto out;
5008 }
5009
5010 hba->auto_bkops_enabled = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08005011 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
Asutosh Das24366c2a2019-11-25 22:53:30 -08005012 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305013out:
5014 return err;
5015}
5016
5017/**
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005018 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305019 * @hba: per adapter instance
5020 *
5021 * After a device reset the device may toggle the BKOPS_EN flag
5022 * to default value. The s/w tracking variables should be updated
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005023 * as well. This function would change the auto-bkops state based on
5024 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305025 */
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005026static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305027{
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005028 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5029 hba->auto_bkops_enabled = false;
5030 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5031 ufshcd_enable_auto_bkops(hba);
5032 } else {
5033 hba->auto_bkops_enabled = true;
5034 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5035 ufshcd_disable_auto_bkops(hba);
5036 }
Asutosh Das24366c2a2019-11-25 22:53:30 -08005037 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305038}
5039
5040static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5041{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005042 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305043 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5044}
5045
5046/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005047 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5048 * @hba: per-adapter instance
5049 * @status: bkops_status value
5050 *
5051 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5052 * flag in the device to permit background operations if the device
5053 * bkops_status is greater than or equal to "status" argument passed to
5054 * this function, disable otherwise.
5055 *
5056 * Returns 0 for success, non-zero in case of failure.
5057 *
5058 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5059 * to know whether auto bkops is enabled or disabled after this function
5060 * returns control to it.
5061 */
5062static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5063 enum bkops_status status)
5064{
5065 int err;
5066 u32 curr_status = 0;
5067
5068 err = ufshcd_get_bkops_status(hba, &curr_status);
5069 if (err) {
5070 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5071 __func__, err);
5072 goto out;
5073 } else if (curr_status > BKOPS_STATUS_MAX) {
5074 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5075 __func__, curr_status);
5076 err = -EINVAL;
5077 goto out;
5078 }
5079
5080 if (curr_status >= status)
5081 err = ufshcd_enable_auto_bkops(hba);
5082 else
5083 err = ufshcd_disable_auto_bkops(hba);
Asutosh Das24366c2a2019-11-25 22:53:30 -08005084 hba->urgent_bkops_lvl = curr_status;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005085out:
5086 return err;
5087}
5088
5089/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305090 * ufshcd_urgent_bkops - handle urgent bkops exception event
5091 * @hba: per-adapter instance
5092 *
5093 * Enable fBackgroundOpsEn flag in the device to permit background
5094 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005095 *
5096 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5097 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305098 */
5099static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5100{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005101 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305102}
5103
5104static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5105{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005106 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305107 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5108}
5109
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005110static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5111{
5112 int err;
5113 u32 curr_status = 0;
5114
5115 if (hba->is_urgent_bkops_lvl_checked)
5116 goto enable_auto_bkops;
5117
5118 err = ufshcd_get_bkops_status(hba, &curr_status);
5119 if (err) {
5120 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5121 __func__, err);
5122 goto out;
5123 }
5124
5125 /*
5126 * We are seeing that some devices are raising the urgent bkops
5127 * exception events even when BKOPS status doesn't indicate performace
5128 * impacted or critical. Handle these device by determining their urgent
5129 * bkops status at runtime.
5130 */
5131 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5132 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5133 __func__, curr_status);
5134 /* update the current status as the urgent bkops level */
5135 hba->urgent_bkops_lvl = curr_status;
5136 hba->is_urgent_bkops_lvl_checked = true;
5137 }
5138
5139enable_auto_bkops:
5140 err = ufshcd_enable_auto_bkops(hba);
5141out:
5142 if (err < 0)
5143 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5144 __func__, err);
5145}
5146
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305147/**
5148 * ufshcd_exception_event_handler - handle exceptions raised by device
5149 * @work: pointer to work data
5150 *
5151 * Read bExceptionEventStatus attribute from the device and handle the
5152 * exception event accordingly.
5153 */
5154static void ufshcd_exception_event_handler(struct work_struct *work)
5155{
5156 struct ufs_hba *hba;
5157 int err;
5158 u32 status = 0;
5159 hba = container_of(work, struct ufs_hba, eeh_work);
5160
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305161 pm_runtime_get_sync(hba->dev);
Stanley Chu03e1d282019-12-24 21:01:05 +08005162 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305163 err = ufshcd_get_ee_status(hba, &status);
5164 if (err) {
5165 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5166 __func__, err);
5167 goto out;
5168 }
5169
5170 status &= hba->ee_ctrl_mask;
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005171
5172 if (status & MASK_EE_URGENT_BKOPS)
5173 ufshcd_bkops_exception_event_handler(hba);
5174
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305175out:
Stanley Chu03e1d282019-12-24 21:01:05 +08005176 ufshcd_scsi_unblock_requests(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305177 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305178 return;
5179}
5180
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005181/* Complete requests that have door-bell cleared */
5182static void ufshcd_complete_requests(struct ufs_hba *hba)
5183{
5184 ufshcd_transfer_req_compl(hba);
5185 ufshcd_tmc_handler(hba);
5186}
5187
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305188/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02005189 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5190 * to recover from the DL NAC errors or not.
5191 * @hba: per-adapter instance
5192 *
5193 * Returns true if error handling is required, false otherwise
5194 */
5195static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5196{
5197 unsigned long flags;
5198 bool err_handling = true;
5199
5200 spin_lock_irqsave(hba->host->host_lock, flags);
5201 /*
5202 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5203 * device fatal error and/or DL NAC & REPLAY timeout errors.
5204 */
5205 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5206 goto out;
5207
5208 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5209 ((hba->saved_err & UIC_ERROR) &&
5210 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5211 goto out;
5212
5213 if ((hba->saved_err & UIC_ERROR) &&
5214 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5215 int err;
5216 /*
5217 * wait for 50ms to see if we can get any other errors or not.
5218 */
5219 spin_unlock_irqrestore(hba->host->host_lock, flags);
5220 msleep(50);
5221 spin_lock_irqsave(hba->host->host_lock, flags);
5222
5223 /*
5224 * now check if we have got any other severe errors other than
5225 * DL NAC error?
5226 */
5227 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5228 ((hba->saved_err & UIC_ERROR) &&
5229 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5230 goto out;
5231
5232 /*
5233 * As DL NAC is the only error received so far, send out NOP
5234 * command to confirm if link is still active or not.
5235 * - If we don't get any response then do error recovery.
5236 * - If we get response then clear the DL NAC error bit.
5237 */
5238
5239 spin_unlock_irqrestore(hba->host->host_lock, flags);
5240 err = ufshcd_verify_dev_init(hba);
5241 spin_lock_irqsave(hba->host->host_lock, flags);
5242
5243 if (err)
5244 goto out;
5245
5246 /* Link seems to be alive hence ignore the DL NAC errors */
5247 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5248 hba->saved_err &= ~UIC_ERROR;
5249 /* clear NAC error */
5250 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5251 if (!hba->saved_uic_err) {
5252 err_handling = false;
5253 goto out;
5254 }
5255 }
5256out:
5257 spin_unlock_irqrestore(hba->host->host_lock, flags);
5258 return err_handling;
5259}
5260
5261/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305262 * ufshcd_err_handler - handle UFS errors that require s/w attention
5263 * @work: pointer to work structure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305264 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305265static void ufshcd_err_handler(struct work_struct *work)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305266{
5267 struct ufs_hba *hba;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305268 unsigned long flags;
5269 u32 err_xfer = 0;
5270 u32 err_tm = 0;
5271 int err = 0;
5272 int tag;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005273 bool needs_reset = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305274
5275 hba = container_of(work, struct ufs_hba, eh_work);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305276
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305277 pm_runtime_get_sync(hba->dev);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005278 ufshcd_hold(hba, false);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305279
5280 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005281 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305282 goto out;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305283
5284 hba->ufshcd_state = UFSHCD_STATE_RESET;
5285 ufshcd_set_eh_in_progress(hba);
5286
5287 /* Complete requests that have door-bell cleared by h/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005288 ufshcd_complete_requests(hba);
Yaniv Gardi583fa622016-03-10 17:37:13 +02005289
5290 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5291 bool ret;
5292
5293 spin_unlock_irqrestore(hba->host->host_lock, flags);
5294 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5295 ret = ufshcd_quirk_dl_nac_errors(hba);
5296 spin_lock_irqsave(hba->host->host_lock, flags);
5297 if (!ret)
5298 goto skip_err_handling;
5299 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005300 if ((hba->saved_err & INT_FATAL_ERRORS) ||
Stanley Chu82174442019-05-21 14:44:54 +08005301 (hba->saved_err & UFSHCD_UIC_HIBERN8_MASK) ||
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005302 ((hba->saved_err & UIC_ERROR) &&
5303 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5304 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5305 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5306 needs_reset = true;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305307
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005308 /*
5309 * if host reset is required then skip clearing the pending
Can Guo2df74b62019-11-25 22:53:33 -08005310 * transfers forcefully because they will get cleared during
5311 * host reset and restore
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005312 */
5313 if (needs_reset)
5314 goto skip_pending_xfer_clear;
5315
5316 /* release lock as clear command might sleep */
5317 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305318 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005319 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5320 if (ufshcd_clear_cmd(hba, tag)) {
5321 err_xfer = true;
5322 goto lock_skip_pending_xfer_clear;
5323 }
5324 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305325
5326 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005327 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5328 if (ufshcd_clear_tm_cmd(hba, tag)) {
5329 err_tm = true;
5330 goto lock_skip_pending_xfer_clear;
5331 }
5332 }
5333
5334lock_skip_pending_xfer_clear:
5335 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305336
5337 /* Complete the requests that are cleared by s/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005338 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305339
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005340 if (err_xfer || err_tm)
5341 needs_reset = true;
5342
5343skip_pending_xfer_clear:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305344 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005345 if (needs_reset) {
5346 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5347
5348 /*
5349 * ufshcd_reset_and_restore() does the link reinitialization
5350 * which will need atleast one empty doorbell slot to send the
5351 * device management commands (NOP and query commands).
5352 * If there is no slot empty at this moment then free up last
5353 * slot forcefully.
5354 */
5355 if (hba->outstanding_reqs == max_doorbells)
5356 __ufshcd_transfer_req_compl(hba,
5357 (1UL << (hba->nutrs - 1)));
5358
5359 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305360 err = ufshcd_reset_and_restore(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005361 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305362 if (err) {
5363 dev_err(hba->dev, "%s: reset and restore failed\n",
5364 __func__);
5365 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5366 }
5367 /*
5368 * Inform scsi mid-layer that we did reset and allow to handle
5369 * Unit Attention properly.
5370 */
5371 scsi_report_bus_reset(hba->host, 0);
5372 hba->saved_err = 0;
5373 hba->saved_uic_err = 0;
5374 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005375
Yaniv Gardi583fa622016-03-10 17:37:13 +02005376skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005377 if (!needs_reset) {
5378 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5379 if (hba->saved_err || hba->saved_uic_err)
5380 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5381 __func__, hba->saved_err, hba->saved_uic_err);
5382 }
5383
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305384 ufshcd_clear_eh_in_progress(hba);
5385
5386out:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005387 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani38135532018-05-03 16:37:18 +05305388 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005389 ufshcd_release(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305390 pm_runtime_put_sync(hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305391}
5392
5393/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305394 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5395 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005396 *
5397 * Returns
5398 * IRQ_HANDLED - If interrupt is valid
5399 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305400 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005401static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305402{
5403 u32 reg;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005404 irqreturn_t retval = IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305405
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005406 /* PHY layer lane error */
5407 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5408 /* Ignore LINERESET indication, as this is not an error */
5409 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005410 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005411 /*
5412 * To know whether this error is fatal or not, DB timeout
5413 * must be checked but this error is handled separately.
5414 */
5415 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
Stanley Chu48d5b972019-07-10 21:38:18 +08005416 ufshcd_update_reg_hist(&hba->ufs_stats.pa_err, reg);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005417 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005418 }
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005419
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305420 /* PA_INIT_ERROR is fatal and needs UIC reset */
5421 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005422 if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
5423 (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005424 ufshcd_update_reg_hist(&hba->ufs_stats.dl_err, reg);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005425
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005426 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5427 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
5428 else if (hba->dev_quirks &
5429 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5430 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5431 hba->uic_error |=
5432 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5433 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5434 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5435 }
5436 retval |= IRQ_HANDLED;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005437 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305438
5439 /* UIC NL/TL/DME errors needs software retry */
5440 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005441 if ((reg & UIC_NETWORK_LAYER_ERROR) &&
5442 (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005443 ufshcd_update_reg_hist(&hba->ufs_stats.nl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305444 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005445 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005446 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305447
5448 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005449 if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
5450 (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005451 ufshcd_update_reg_hist(&hba->ufs_stats.tl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305452 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005453 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005454 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305455
5456 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005457 if ((reg & UIC_DME_ERROR) &&
5458 (reg & UIC_DME_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005459 ufshcd_update_reg_hist(&hba->ufs_stats.dme_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305460 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005461 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005462 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305463
5464 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5465 __func__, hba->uic_error);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005466 return retval;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305467}
5468
Stanley Chu82174442019-05-21 14:44:54 +08005469static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5470 u32 intr_mask)
5471{
5472 if (!ufshcd_is_auto_hibern8_supported(hba))
5473 return false;
5474
5475 if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5476 return false;
5477
5478 if (hba->active_uic_cmd &&
5479 (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5480 hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5481 return false;
5482
5483 return true;
5484}
5485
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305486/**
5487 * ufshcd_check_errors - Check for errors that need s/w attention
5488 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005489 *
5490 * Returns
5491 * IRQ_HANDLED - If interrupt is valid
5492 * IRQ_NONE - If invalid interrupt
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305493 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005494static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305495{
5496 bool queue_eh_work = false;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005497 irqreturn_t retval = IRQ_NONE;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305498
Stanley Chud3c615b2019-07-10 21:38:19 +08005499 if (hba->errors & INT_FATAL_ERRORS) {
5500 ufshcd_update_reg_hist(&hba->ufs_stats.fatal_err, hba->errors);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305501 queue_eh_work = true;
Stanley Chud3c615b2019-07-10 21:38:19 +08005502 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305503
5504 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305505 hba->uic_error = 0;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005506 retval = ufshcd_update_uic_error(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305507 if (hba->uic_error)
5508 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305509 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305510
Stanley Chu82174442019-05-21 14:44:54 +08005511 if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
5512 dev_err(hba->dev,
5513 "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
5514 __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
5515 "Enter" : "Exit",
5516 hba->errors, ufshcd_get_upmcrs(hba));
Stanley Chud3c615b2019-07-10 21:38:19 +08005517 ufshcd_update_reg_hist(&hba->ufs_stats.auto_hibern8_err,
5518 hba->errors);
Stanley Chu82174442019-05-21 14:44:54 +08005519 queue_eh_work = true;
5520 }
5521
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305522 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005523 /*
5524 * update the transfer error masks to sticky bits, let's do this
5525 * irrespective of current ufshcd_state.
5526 */
5527 hba->saved_err |= hba->errors;
5528 hba->saved_uic_err |= hba->uic_error;
5529
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305530 /* handle fatal errors only when link is functional */
5531 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5532 /* block commands from scsi mid-layer */
Subhash Jadavani38135532018-05-03 16:37:18 +05305533 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305534
Zang Leigang141f8162016-11-16 11:29:37 +08005535 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
Dolev Raviv66cc8202016-12-22 18:39:42 -08005536
5537 /* dump controller state before resetting */
5538 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5539 bool pr_prdt = !!(hba->saved_err &
5540 SYSTEM_BUS_FATAL_ERROR);
5541
5542 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5543 __func__, hba->saved_err,
5544 hba->saved_uic_err);
5545
5546 ufshcd_print_host_regs(hba);
5547 ufshcd_print_pwr_info(hba);
5548 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5549 ufshcd_print_trs(hba, hba->outstanding_reqs,
5550 pr_prdt);
5551 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305552 schedule_work(&hba->eh_work);
5553 }
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005554 retval |= IRQ_HANDLED;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305555 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305556 /*
5557 * if (!queue_eh_work) -
5558 * Other errors are either non-fatal where host recovers
5559 * itself without s/w intervention or errors that will be
5560 * handled by the SCSI core layer.
5561 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005562 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305563}
5564
Bart Van Assche69a6c262019-12-09 10:13:09 -08005565struct ctm_info {
5566 struct ufs_hba *hba;
5567 unsigned long pending;
5568 unsigned int ncpl;
5569};
5570
5571static bool ufshcd_compl_tm(struct request *req, void *priv, bool reserved)
5572{
5573 struct ctm_info *const ci = priv;
5574 struct completion *c;
5575
5576 WARN_ON_ONCE(reserved);
5577 if (test_bit(req->tag, &ci->pending))
5578 return true;
5579 ci->ncpl++;
5580 c = req->end_io_data;
5581 if (c)
5582 complete(c);
5583 return true;
5584}
5585
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305586/**
5587 * ufshcd_tmc_handler - handle task management function completion
5588 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005589 *
5590 * Returns
5591 * IRQ_HANDLED - If interrupt is valid
5592 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305593 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005594static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305595{
Bart Van Assche69a6c262019-12-09 10:13:09 -08005596 struct request_queue *q = hba->tmf_queue;
5597 struct ctm_info ci = {
5598 .hba = hba,
5599 .pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL),
5600 };
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305601
Bart Van Assche69a6c262019-12-09 10:13:09 -08005602 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_compl_tm, &ci);
5603 return ci.ncpl ? IRQ_HANDLED : IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305604}
5605
5606/**
5607 * ufshcd_sl_intr - Interrupt service routine
5608 * @hba: per adapter instance
5609 * @intr_status: contains interrupts generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005610 *
5611 * Returns
5612 * IRQ_HANDLED - If interrupt is valid
5613 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305614 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005615static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305616{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005617 irqreturn_t retval = IRQ_NONE;
5618
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305619 hba->errors = UFSHCD_ERROR_MASK & intr_status;
Stanley Chu82174442019-05-21 14:44:54 +08005620
5621 if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5622 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5623
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305624 if (hba->errors)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005625 retval |= ufshcd_check_errors(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305626
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305627 if (intr_status & UFSHCD_UIC_MASK)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005628 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305629
5630 if (intr_status & UTP_TASK_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005631 retval |= ufshcd_tmc_handler(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305632
5633 if (intr_status & UTP_TRANSFER_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005634 retval |= ufshcd_transfer_req_compl(hba);
5635
5636 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305637}
5638
5639/**
5640 * ufshcd_intr - Main interrupt service routine
5641 * @irq: irq number
5642 * @__hba: pointer to adapter instance
5643 *
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005644 * Returns
5645 * IRQ_HANDLED - If interrupt is valid
5646 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305647 */
5648static irqreturn_t ufshcd_intr(int irq, void *__hba)
5649{
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005650 u32 intr_status, enabled_intr_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305651 irqreturn_t retval = IRQ_NONE;
5652 struct ufs_hba *hba = __hba;
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305653 int retries = hba->nutrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305654
5655 spin_lock(hba->host->host_lock);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305656 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305657
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305658 /*
5659 * There could be max of hba->nutrs reqs in flight and in worst case
5660 * if the reqs get finished 1 by 1 after the interrupt status is
5661 * read, make sure we handle them by checking the interrupt status
5662 * again in a loop until we process all of the reqs before returning.
5663 */
5664 do {
5665 enabled_intr_status =
5666 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5667 if (intr_status)
5668 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005669 if (enabled_intr_status)
5670 retval |= ufshcd_sl_intr(hba, enabled_intr_status);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005671
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305672 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5673 } while (intr_status && --retries);
5674
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005675 if (retval == IRQ_NONE) {
5676 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x\n",
5677 __func__, intr_status);
5678 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
5679 }
5680
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305681 spin_unlock(hba->host->host_lock);
5682 return retval;
5683}
5684
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305685static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5686{
5687 int err = 0;
5688 u32 mask = 1 << tag;
5689 unsigned long flags;
5690
5691 if (!test_bit(tag, &hba->outstanding_tasks))
5692 goto out;
5693
5694 spin_lock_irqsave(hba->host->host_lock, flags);
Alim Akhtar1399c5b2018-05-06 15:44:15 +05305695 ufshcd_utmrl_clear(hba, tag);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305696 spin_unlock_irqrestore(hba->host->host_lock, flags);
5697
5698 /* poll for max. 1 sec to clear door bell register by h/w */
5699 err = ufshcd_wait_for_register(hba,
5700 REG_UTP_TASK_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02005701 mask, 0, 1000, 1000, true);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305702out:
5703 return err;
5704}
5705
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005706static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
5707 struct utp_task_req_desc *treq, u8 tm_function)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305708{
Bart Van Assche69a6c262019-12-09 10:13:09 -08005709 struct request_queue *q = hba->tmf_queue;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005710 struct Scsi_Host *host = hba->host;
Bart Van Assche69a6c262019-12-09 10:13:09 -08005711 DECLARE_COMPLETION_ONSTACK(wait);
5712 struct request *req;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305713 unsigned long flags;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005714 int free_slot, task_tag, err;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305715
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305716 /*
5717 * Get free slot, sleep if slots are unavailable.
5718 * Even though we use wait_event() which sleeps indefinitely,
5719 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5720 */
Bart Van Assche69a6c262019-12-09 10:13:09 -08005721 req = blk_get_request(q, REQ_OP_DRV_OUT, BLK_MQ_REQ_RESERVED);
5722 req->end_io_data = &wait;
5723 free_slot = req->tag;
5724 WARN_ON_ONCE(free_slot < 0 || free_slot >= hba->nutmrs);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005725 ufshcd_hold(hba, false);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305726
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305727 spin_lock_irqsave(host->host_lock, flags);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305728 task_tag = hba->nutrs + free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305729
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005730 treq->req_header.dword_0 |= cpu_to_be32(task_tag);
5731
5732 memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
Kiwoong Kimd2877be2016-11-10 21:16:15 +09005733 ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5734
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305735 /* send command to the controller */
5736 __set_bit(free_slot, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02005737
5738 /* Make sure descriptors are ready before ringing the task doorbell */
5739 wmb();
5740
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305741 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07005742 /* Make sure that doorbell is committed immediately */
5743 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305744
5745 spin_unlock_irqrestore(host->host_lock, flags);
5746
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005747 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");
5748
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305749 /* wait until the task management command is completed */
Bart Van Assche69a6c262019-12-09 10:13:09 -08005750 err = wait_for_completion_io_timeout(&wait,
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305751 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305752 if (!err) {
Bart Van Assche69a6c262019-12-09 10:13:09 -08005753 /*
5754 * Make sure that ufshcd_compl_tm() does not trigger a
5755 * use-after-free.
5756 */
5757 req->end_io_data = NULL;
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005758 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305759 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5760 __func__, tm_function);
5761 if (ufshcd_clear_tm_cmd(hba, free_slot))
5762 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5763 __func__, free_slot);
5764 err = -ETIMEDOUT;
5765 } else {
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005766 err = 0;
5767 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));
5768
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005769 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305770 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305771
Stanley Chub5572172019-08-19 21:43:28 +08005772 spin_lock_irqsave(hba->host->host_lock, flags);
5773 __clear_bit(free_slot, &hba->outstanding_tasks);
5774 spin_unlock_irqrestore(hba->host->host_lock, flags);
5775
Bart Van Assche69a6c262019-12-09 10:13:09 -08005776 blk_put_request(req);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305777
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005778 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305779 return err;
5780}
5781
5782/**
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005783 * ufshcd_issue_tm_cmd - issues task management commands to controller
5784 * @hba: per adapter instance
5785 * @lun_id: LUN ID to which TM command is sent
5786 * @task_id: task ID to which the TM command is applicable
5787 * @tm_function: task management function opcode
5788 * @tm_response: task management service response return value
5789 *
5790 * Returns non-zero value on error, zero on success.
5791 */
5792static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5793 u8 tm_function, u8 *tm_response)
5794{
5795 struct utp_task_req_desc treq = { { 0 }, };
5796 int ocs_value, err;
5797
5798 /* Configure task request descriptor */
5799 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5800 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5801
5802 /* Configure task request UPIU */
5803 treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
5804 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
5805 treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);
5806
5807 /*
5808 * The host shall provide the same value for LUN field in the basic
5809 * header and for Input Parameter.
5810 */
5811 treq.input_param1 = cpu_to_be32(lun_id);
5812 treq.input_param2 = cpu_to_be32(task_id);
5813
5814 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
5815 if (err == -ETIMEDOUT)
5816 return err;
5817
5818 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5819 if (ocs_value != OCS_SUCCESS)
5820 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
5821 __func__, ocs_value);
5822 else if (tm_response)
5823 *tm_response = be32_to_cpu(treq.output_param1) &
5824 MASK_TM_SERVICE_RESP;
5825 return err;
5826}
5827
5828/**
Avri Altman5e0a86e2018-10-07 17:30:37 +03005829 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
5830 * @hba: per-adapter instance
5831 * @req_upiu: upiu request
5832 * @rsp_upiu: upiu reply
Avri Altman5e0a86e2018-10-07 17:30:37 +03005833 * @desc_buff: pointer to descriptor buffer, NULL if NA
5834 * @buff_len: descriptor size, 0 if NA
Bart Van Assched0e97602019-10-29 16:07:08 -07005835 * @cmd_type: specifies the type (NOP, Query...)
Avri Altman5e0a86e2018-10-07 17:30:37 +03005836 * @desc_op: descriptor operation
5837 *
5838 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
5839 * Therefore, it "rides" the device management infrastructure: uses its tag and
5840 * tasks work queues.
5841 *
5842 * Since there is only one available tag for device management commands,
5843 * the caller is expected to hold the hba->dev_cmd.lock mutex.
5844 */
5845static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
5846 struct utp_upiu_req *req_upiu,
5847 struct utp_upiu_req *rsp_upiu,
5848 u8 *desc_buff, int *buff_len,
Bart Van Assche7f674c32019-10-29 16:07:09 -07005849 enum dev_cmd_type cmd_type,
Avri Altman5e0a86e2018-10-07 17:30:37 +03005850 enum query_opcode desc_op)
5851{
Bart Van Assche7252a362019-12-09 10:13:08 -08005852 struct request_queue *q = hba->cmd_queue;
5853 struct request *req;
Avri Altman5e0a86e2018-10-07 17:30:37 +03005854 struct ufshcd_lrb *lrbp;
5855 int err = 0;
5856 int tag;
5857 struct completion wait;
5858 unsigned long flags;
5859 u32 upiu_flags;
5860
5861 down_read(&hba->clk_scaling_lock);
5862
Bart Van Assche7252a362019-12-09 10:13:08 -08005863 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03005864 if (IS_ERR(req)) {
5865 err = PTR_ERR(req);
5866 goto out_unlock;
5867 }
Bart Van Assche7252a362019-12-09 10:13:08 -08005868 tag = req->tag;
5869 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
Avri Altman5e0a86e2018-10-07 17:30:37 +03005870
5871 init_completion(&wait);
5872 lrbp = &hba->lrb[tag];
5873 WARN_ON(lrbp->cmd);
5874
5875 lrbp->cmd = NULL;
5876 lrbp->sense_bufflen = 0;
5877 lrbp->sense_buffer = NULL;
5878 lrbp->task_tag = tag;
5879 lrbp->lun = 0;
5880 lrbp->intr_cmd = true;
5881 hba->dev_cmd.type = cmd_type;
5882
5883 switch (hba->ufs_version) {
5884 case UFSHCI_VERSION_10:
5885 case UFSHCI_VERSION_11:
5886 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
5887 break;
5888 default:
5889 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
5890 break;
5891 }
5892
5893 /* update the task tag in the request upiu */
5894 req_upiu->header.dword_0 |= cpu_to_be32(tag);
5895
5896 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
5897
5898 /* just copy the upiu request as it is */
5899 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
5900 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
5901 /* The Data Segment Area is optional depending upon the query
5902 * function value. for WRITE DESCRIPTOR, the data segment
5903 * follows right after the tsf.
5904 */
5905 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
5906 *buff_len = 0;
5907 }
5908
5909 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
5910
5911 hba->dev_cmd.complete = &wait;
5912
5913 /* Make sure descriptors are ready before ringing the doorbell */
5914 wmb();
5915 spin_lock_irqsave(hba->host->host_lock, flags);
5916 ufshcd_send_command(hba, tag);
5917 spin_unlock_irqrestore(hba->host->host_lock, flags);
5918
5919 /*
5920 * ignore the returning value here - ufshcd_check_query_response is
5921 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
5922 * read the response directly ignoring all errors.
5923 */
5924 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
5925
5926 /* just copy the upiu response as it is */
5927 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
Avri Altman4bbbe242019-02-20 09:11:13 +02005928 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
5929 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
5930 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
5931 MASK_QUERY_DATA_SEG_LEN;
5932
5933 if (*buff_len >= resp_len) {
5934 memcpy(desc_buff, descp, resp_len);
5935 *buff_len = resp_len;
5936 } else {
Bean Huo3d4881d2019-11-12 23:34:35 +01005937 dev_warn(hba->dev,
5938 "%s: rsp size %d is bigger than buffer size %d",
5939 __func__, resp_len, *buff_len);
Avri Altman4bbbe242019-02-20 09:11:13 +02005940 *buff_len = 0;
5941 err = -EINVAL;
5942 }
5943 }
Avri Altman5e0a86e2018-10-07 17:30:37 +03005944
Bart Van Assche7252a362019-12-09 10:13:08 -08005945 blk_put_request(req);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03005946out_unlock:
Avri Altman5e0a86e2018-10-07 17:30:37 +03005947 up_read(&hba->clk_scaling_lock);
5948 return err;
5949}
5950
5951/**
5952 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
5953 * @hba: per-adapter instance
5954 * @req_upiu: upiu request
5955 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
5956 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
5957 * @desc_buff: pointer to descriptor buffer, NULL if NA
5958 * @buff_len: descriptor size, 0 if NA
5959 * @desc_op: descriptor operation
5960 *
5961 * Supports UTP Transfer requests (nop and query), and UTP Task
5962 * Management requests.
5963 * It is up to the caller to fill the upiu conent properly, as it will
5964 * be copied without any further input validations.
5965 */
5966int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
5967 struct utp_upiu_req *req_upiu,
5968 struct utp_upiu_req *rsp_upiu,
5969 int msgcode,
5970 u8 *desc_buff, int *buff_len,
5971 enum query_opcode desc_op)
5972{
5973 int err;
Bart Van Assche7f674c32019-10-29 16:07:09 -07005974 enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
Avri Altman5e0a86e2018-10-07 17:30:37 +03005975 struct utp_task_req_desc treq = { { 0 }, };
5976 int ocs_value;
5977 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
5978
Avri Altman5e0a86e2018-10-07 17:30:37 +03005979 switch (msgcode) {
5980 case UPIU_TRANSACTION_NOP_OUT:
5981 cmd_type = DEV_CMD_TYPE_NOP;
5982 /* fall through */
5983 case UPIU_TRANSACTION_QUERY_REQ:
5984 ufshcd_hold(hba, false);
5985 mutex_lock(&hba->dev_cmd.lock);
5986 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
5987 desc_buff, buff_len,
5988 cmd_type, desc_op);
5989 mutex_unlock(&hba->dev_cmd.lock);
5990 ufshcd_release(hba);
5991
5992 break;
5993 case UPIU_TRANSACTION_TASK_REQ:
5994 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5995 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5996
5997 memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));
5998
5999 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
6000 if (err == -ETIMEDOUT)
6001 break;
6002
6003 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6004 if (ocs_value != OCS_SUCCESS) {
6005 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
6006 ocs_value);
6007 break;
6008 }
6009
6010 memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));
6011
6012 break;
6013 default:
6014 err = -EINVAL;
6015
6016 break;
6017 }
6018
Avri Altman5e0a86e2018-10-07 17:30:37 +03006019 return err;
6020}
6021
6022/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306023 * ufshcd_eh_device_reset_handler - device reset handler registered to
6024 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306025 * @cmd: SCSI command pointer
6026 *
6027 * Returns SUCCESS/FAILED
6028 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306029static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306030{
6031 struct Scsi_Host *host;
6032 struct ufs_hba *hba;
6033 unsigned int tag;
6034 u32 pos;
6035 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306036 u8 resp = 0xF;
6037 struct ufshcd_lrb *lrbp;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306038 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306039
6040 host = cmd->device->host;
6041 hba = shost_priv(host);
6042 tag = cmd->request->tag;
6043
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306044 lrbp = &hba->lrb[tag];
6045 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
6046 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306047 if (!err)
6048 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306049 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306050 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306051
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306052 /* clear the commands that were pending for corresponding LUN */
6053 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6054 if (hba->lrb[pos].lun == lrbp->lun) {
6055 err = ufshcd_clear_cmd(hba, pos);
6056 if (err)
6057 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306058 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306059 }
6060 spin_lock_irqsave(host->host_lock, flags);
6061 ufshcd_transfer_req_compl(hba);
6062 spin_unlock_irqrestore(host->host_lock, flags);
Gilad Broner7fabb772017-02-03 16:56:50 -08006063
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306064out:
Gilad Broner7fabb772017-02-03 16:56:50 -08006065 hba->req_abort_count = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08006066 ufshcd_update_reg_hist(&hba->ufs_stats.dev_reset, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306067 if (!err) {
6068 err = SUCCESS;
6069 } else {
6070 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6071 err = FAILED;
6072 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306073 return err;
6074}
6075
Gilad Bronere0b299e2017-02-03 16:56:40 -08006076static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6077{
6078 struct ufshcd_lrb *lrbp;
6079 int tag;
6080
6081 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6082 lrbp = &hba->lrb[tag];
6083 lrbp->req_abort_skip = true;
6084 }
6085}
6086
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306087/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306088 * ufshcd_abort - abort a specific command
6089 * @cmd: SCSI command pointer
6090 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306091 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6092 * command, and in host controller by clearing the door-bell register. There can
6093 * be race between controller sending the command to the device while abort is
6094 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6095 * really issued and then try to abort it.
6096 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306097 * Returns SUCCESS/FAILED
6098 */
6099static int ufshcd_abort(struct scsi_cmnd *cmd)
6100{
6101 struct Scsi_Host *host;
6102 struct ufs_hba *hba;
6103 unsigned long flags;
6104 unsigned int tag;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306105 int err = 0;
6106 int poll_cnt;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306107 u8 resp = 0xF;
6108 struct ufshcd_lrb *lrbp;
Dolev Ravive9d501b2014-07-01 12:22:37 +03006109 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306110
6111 host = cmd->device->host;
6112 hba = shost_priv(host);
6113 tag = cmd->request->tag;
Dolev Ravive7d38252016-12-22 18:40:07 -08006114 lrbp = &hba->lrb[tag];
Yaniv Gardi14497322016-02-01 15:02:39 +02006115 if (!ufshcd_valid_tag(hba, tag)) {
6116 dev_err(hba->dev,
6117 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
6118 __func__, tag, cmd, cmd->request);
6119 BUG();
6120 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306121
Dolev Ravive7d38252016-12-22 18:40:07 -08006122 /*
6123 * Task abort to the device W-LUN is illegal. When this command
6124 * will fail, due to spec violation, scsi err handling next step
6125 * will be to send LU reset which, again, is a spec violation.
6126 * To avoid these unnecessary/illegal step we skip to the last error
6127 * handling stage: reset and restore.
6128 */
6129 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
6130 return ufshcd_eh_host_reset_handler(cmd);
6131
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006132 ufshcd_hold(hba, false);
Dolev Ravive9d501b2014-07-01 12:22:37 +03006133 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Yaniv Gardi14497322016-02-01 15:02:39 +02006134 /* If command is already aborted/completed, return SUCCESS */
6135 if (!(test_bit(tag, &hba->outstanding_reqs))) {
6136 dev_err(hba->dev,
6137 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
6138 __func__, tag, hba->outstanding_reqs, reg);
6139 goto out;
6140 }
6141
Dolev Ravive9d501b2014-07-01 12:22:37 +03006142 if (!(reg & (1 << tag))) {
6143 dev_err(hba->dev,
6144 "%s: cmd was completed, but without a notifying intr, tag = %d",
6145 __func__, tag);
6146 }
6147
Dolev Raviv66cc8202016-12-22 18:39:42 -08006148 /* Print Transfer Request of aborted task */
6149 dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
Dolev Raviv66cc8202016-12-22 18:39:42 -08006150
Gilad Broner7fabb772017-02-03 16:56:50 -08006151 /*
6152 * Print detailed info about aborted request.
6153 * As more than one request might get aborted at the same time,
6154 * print full information only for the first aborted request in order
6155 * to reduce repeated printouts. For other aborted requests only print
6156 * basic details.
6157 */
6158 scsi_print_command(hba->lrb[tag].cmd);
6159 if (!hba->req_abort_count) {
Stanley Chu8808b4e2019-07-10 21:38:21 +08006160 ufshcd_update_reg_hist(&hba->ufs_stats.task_abort, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08006161 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08006162 ufshcd_print_host_state(hba);
Gilad Broner7fabb772017-02-03 16:56:50 -08006163 ufshcd_print_pwr_info(hba);
6164 ufshcd_print_trs(hba, 1 << tag, true);
6165 } else {
6166 ufshcd_print_trs(hba, 1 << tag, false);
6167 }
6168 hba->req_abort_count++;
Gilad Bronere0b299e2017-02-03 16:56:40 -08006169
6170 /* Skip task abort in case previous aborts failed and report failure */
6171 if (lrbp->req_abort_skip) {
6172 err = -EIO;
6173 goto out;
6174 }
6175
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306176 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6177 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6178 UFS_QUERY_TASK, &resp);
6179 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6180 /* cmd pending in the device */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006181 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6182 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306183 break;
6184 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306185 /*
6186 * cmd not pending in the device, check if it is
6187 * in transition.
6188 */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006189 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6190 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306191 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6192 if (reg & (1 << tag)) {
6193 /* sleep for max. 200us to stabilize */
6194 usleep_range(100, 200);
6195 continue;
6196 }
6197 /* command completed already */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006198 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6199 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306200 goto out;
6201 } else {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006202 dev_err(hba->dev,
6203 "%s: no response from device. tag = %d, err %d\n",
6204 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306205 if (!err)
6206 err = resp; /* service response error */
6207 goto out;
6208 }
6209 }
6210
6211 if (!poll_cnt) {
6212 err = -EBUSY;
6213 goto out;
6214 }
6215
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306216 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6217 UFS_ABORT_TASK, &resp);
6218 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006219 if (!err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306220 err = resp; /* service response error */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006221 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6222 __func__, tag, err);
6223 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306224 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306225 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306226
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306227 err = ufshcd_clear_cmd(hba, tag);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006228 if (err) {
6229 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6230 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306231 goto out;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006232 }
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306233
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306234 scsi_dma_unmap(cmd);
6235
6236 spin_lock_irqsave(host->host_lock, flags);
Yaniv Gardia48353f2016-02-01 15:02:40 +02006237 ufshcd_outstanding_req_clear(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306238 hba->lrb[tag].cmd = NULL;
6239 spin_unlock_irqrestore(host->host_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306240
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306241out:
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306242 if (!err) {
6243 err = SUCCESS;
6244 } else {
6245 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Gilad Bronere0b299e2017-02-03 16:56:40 -08006246 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306247 err = FAILED;
6248 }
6249
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006250 /*
6251 * This ufshcd_release() corresponds to the original scsi cmd that got
6252 * aborted here (as we won't get any IRQ for it).
6253 */
6254 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306255 return err;
6256}
6257
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306258/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306259 * ufshcd_host_reset_and_restore - reset and restore host controller
6260 * @hba: per-adapter instance
6261 *
6262 * Note that host controller reset may issue DME_RESET to
6263 * local and remote (device) Uni-Pro stack and the attributes
6264 * are reset to default state.
6265 *
6266 * Returns zero on success, non-zero on failure
6267 */
6268static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6269{
6270 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306271 unsigned long flags;
6272
Can Guo2df74b62019-11-25 22:53:33 -08006273 /*
6274 * Stop the host controller and complete the requests
6275 * cleared by h/w
6276 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306277 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02006278 ufshcd_hba_stop(hba, false);
Can Guo2df74b62019-11-25 22:53:33 -08006279 hba->silence_err_logs = true;
6280 ufshcd_complete_requests(hba);
6281 hba->silence_err_logs = false;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306282 spin_unlock_irqrestore(hba->host->host_lock, flags);
6283
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08006284 /* scale up clocks to max frequency before full reinitialization */
6285 ufshcd_scale_clks(hba, true);
6286
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306287 err = ufshcd_hba_enable(hba);
6288 if (err)
6289 goto out;
6290
6291 /* Establish the link again and restore the device */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006292 err = ufshcd_probe_hba(hba);
6293
6294 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306295 err = -EIO;
6296out:
6297 if (err)
6298 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
Stanley Chu8808b4e2019-07-10 21:38:21 +08006299 ufshcd_update_reg_hist(&hba->ufs_stats.host_reset, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306300 return err;
6301}
6302
6303/**
6304 * ufshcd_reset_and_restore - reset and re-initialize host/device
6305 * @hba: per-adapter instance
6306 *
6307 * Reset and recover device, host and re-establish link. This
6308 * is helpful to recover the communication in fatal error conditions.
6309 *
6310 * Returns zero on success, non-zero on failure
6311 */
6312static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6313{
6314 int err = 0;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006315 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306316
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006317 do {
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07006318 /* Reset the attached device */
6319 ufshcd_vops_device_reset(hba);
6320
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006321 err = ufshcd_host_reset_and_restore(hba);
6322 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306323
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306324 return err;
6325}
6326
6327/**
6328 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006329 * @cmd: SCSI command pointer
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306330 *
6331 * Returns SUCCESS/FAILED
6332 */
6333static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6334{
6335 int err;
6336 unsigned long flags;
6337 struct ufs_hba *hba;
6338
6339 hba = shost_priv(cmd->device->host);
6340
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006341 ufshcd_hold(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306342 /*
6343 * Check if there is any race with fatal error handling.
6344 * If so, wait for it to complete. Even though fatal error
6345 * handling does reset and restore in some cases, don't assume
6346 * anything out of it. We are just avoiding race here.
6347 */
6348 do {
6349 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306350 if (!(work_pending(&hba->eh_work) ||
Zang Leigang8dc0da72017-06-24 19:14:32 +08006351 hba->ufshcd_state == UFSHCD_STATE_RESET ||
6352 hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306353 break;
6354 spin_unlock_irqrestore(hba->host->host_lock, flags);
6355 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306356 flush_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306357 } while (1);
6358
6359 hba->ufshcd_state = UFSHCD_STATE_RESET;
6360 ufshcd_set_eh_in_progress(hba);
6361 spin_unlock_irqrestore(hba->host->host_lock, flags);
6362
6363 err = ufshcd_reset_and_restore(hba);
6364
6365 spin_lock_irqsave(hba->host->host_lock, flags);
6366 if (!err) {
6367 err = SUCCESS;
6368 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6369 } else {
6370 err = FAILED;
6371 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6372 }
6373 ufshcd_clear_eh_in_progress(hba);
6374 spin_unlock_irqrestore(hba->host->host_lock, flags);
6375
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006376 ufshcd_release(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306377 return err;
6378}
6379
6380/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006381 * ufshcd_get_max_icc_level - calculate the ICC level
6382 * @sup_curr_uA: max. current supported by the regulator
6383 * @start_scan: row at the desc table to start scan from
6384 * @buff: power descriptor buffer
6385 *
6386 * Returns calculated max ICC level for specific regulator
6387 */
6388static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6389{
6390 int i;
6391 int curr_uA;
6392 u16 data;
6393 u16 unit;
6394
6395 for (i = start_scan; i >= 0; i--) {
Tomas Winklerd79713f2017-01-05 10:45:11 +02006396 data = be16_to_cpup((__be16 *)&buff[2 * i]);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006397 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6398 ATTR_ICC_LVL_UNIT_OFFSET;
6399 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6400 switch (unit) {
6401 case UFSHCD_NANO_AMP:
6402 curr_uA = curr_uA / 1000;
6403 break;
6404 case UFSHCD_MILI_AMP:
6405 curr_uA = curr_uA * 1000;
6406 break;
6407 case UFSHCD_AMP:
6408 curr_uA = curr_uA * 1000 * 1000;
6409 break;
6410 case UFSHCD_MICRO_AMP:
6411 default:
6412 break;
6413 }
6414 if (sup_curr_uA >= curr_uA)
6415 break;
6416 }
6417 if (i < 0) {
6418 i = 0;
6419 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6420 }
6421
6422 return (u32)i;
6423}
6424
6425/**
6426 * ufshcd_calc_icc_level - calculate the max ICC level
6427 * In case regulators are not initialized we'll return 0
6428 * @hba: per-adapter instance
6429 * @desc_buf: power descriptor buffer to extract ICC levels from.
6430 * @len: length of desc_buff
6431 *
6432 * Returns calculated ICC level
6433 */
6434static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6435 u8 *desc_buf, int len)
6436{
6437 u32 icc_level = 0;
6438
6439 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6440 !hba->vreg_info.vccq2) {
6441 dev_err(hba->dev,
6442 "%s: Regulator capability was not set, actvIccLevel=%d",
6443 __func__, icc_level);
6444 goto out;
6445 }
6446
Stanley Chu0487fff2019-03-28 17:16:25 +08006447 if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006448 icc_level = ufshcd_get_max_icc_level(
6449 hba->vreg_info.vcc->max_uA,
6450 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6451 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6452
Stanley Chu0487fff2019-03-28 17:16:25 +08006453 if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006454 icc_level = ufshcd_get_max_icc_level(
6455 hba->vreg_info.vccq->max_uA,
6456 icc_level,
6457 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6458
Stanley Chu0487fff2019-03-28 17:16:25 +08006459 if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006460 icc_level = ufshcd_get_max_icc_level(
6461 hba->vreg_info.vccq2->max_uA,
6462 icc_level,
6463 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6464out:
6465 return icc_level;
6466}
6467
6468static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6469{
6470 int ret;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006471 int buff_len = hba->desc_size.pwr_desc;
Kees Cookbbe21d72018-05-02 16:58:09 -07006472 u8 *desc_buf;
6473
6474 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6475 if (!desc_buf)
6476 return;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006477
6478 ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6479 if (ret) {
6480 dev_err(hba->dev,
6481 "%s: Failed reading power descriptor.len = %d ret = %d",
6482 __func__, buff_len, ret);
Kees Cookbbe21d72018-05-02 16:58:09 -07006483 goto out;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006484 }
6485
6486 hba->init_prefetch_data.icc_level =
6487 ufshcd_find_max_sup_active_icc_level(hba,
6488 desc_buf, buff_len);
6489 dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6490 __func__, hba->init_prefetch_data.icc_level);
6491
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02006492 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6493 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6494 &hba->init_prefetch_data.icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006495
6496 if (ret)
6497 dev_err(hba->dev,
6498 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6499 __func__, hba->init_prefetch_data.icc_level , ret);
6500
Kees Cookbbe21d72018-05-02 16:58:09 -07006501out:
6502 kfree(desc_buf);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006503}
6504
6505/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006506 * ufshcd_scsi_add_wlus - Adds required W-LUs
6507 * @hba: per-adapter instance
6508 *
6509 * UFS device specification requires the UFS devices to support 4 well known
6510 * logical units:
6511 * "REPORT_LUNS" (address: 01h)
6512 * "UFS Device" (address: 50h)
6513 * "RPMB" (address: 44h)
6514 * "BOOT" (address: 30h)
6515 * UFS device's power management needs to be controlled by "POWER CONDITION"
6516 * field of SSU (START STOP UNIT) command. But this "power condition" field
6517 * will take effect only when its sent to "UFS device" well known logical unit
6518 * hence we require the scsi_device instance to represent this logical unit in
6519 * order for the UFS host driver to send the SSU command for power management.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006520 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006521 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6522 * Block) LU so user space process can control this LU. User space may also
6523 * want to have access to BOOT LU.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006524 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006525 * This function adds scsi device instances for each of all well known LUs
6526 * (except "REPORT LUNS" LU).
6527 *
6528 * Returns zero on success (all required W-LUs are added successfully),
6529 * non-zero error value on failure (if failed to add any of the required W-LU).
6530 */
6531static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6532{
6533 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006534 struct scsi_device *sdev_rpmb;
6535 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006536
6537 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6538 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6539 if (IS_ERR(hba->sdev_ufs_device)) {
6540 ret = PTR_ERR(hba->sdev_ufs_device);
6541 hba->sdev_ufs_device = NULL;
6542 goto out;
6543 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006544 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006545
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006546 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006547 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006548 if (IS_ERR(sdev_rpmb)) {
6549 ret = PTR_ERR(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006550 goto remove_sdev_ufs_device;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006551 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006552 scsi_device_put(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006553
6554 sdev_boot = __scsi_add_device(hba->host, 0, 0,
6555 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6556 if (IS_ERR(sdev_boot))
6557 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6558 else
6559 scsi_device_put(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006560 goto out;
6561
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006562remove_sdev_ufs_device:
6563 scsi_remove_device(hba->sdev_ufs_device);
6564out:
6565 return ret;
6566}
6567
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006568static int ufs_get_device_desc(struct ufs_hba *hba,
6569 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006570{
6571 int err;
Kees Cookbbe21d72018-05-02 16:58:09 -07006572 size_t buff_len;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006573 u8 model_index;
Kees Cookbbe21d72018-05-02 16:58:09 -07006574 u8 *desc_buf;
6575
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006576 if (!dev_desc)
6577 return -EINVAL;
6578
Kees Cookbbe21d72018-05-02 16:58:09 -07006579 buff_len = max_t(size_t, hba->desc_size.dev_desc,
6580 QUERY_DESC_MAX_SIZE + 1);
6581 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6582 if (!desc_buf) {
6583 err = -ENOMEM;
6584 goto out;
6585 }
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006586
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006587 err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006588 if (err) {
6589 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6590 __func__, err);
6591 goto out;
6592 }
6593
6594 /*
6595 * getting vendor (manufacturerID) and Bank Index in big endian
6596 * format
6597 */
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006598 dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006599 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6600
6601 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006602 err = ufshcd_read_string_desc(hba, model_index,
6603 &dev_desc->model, SD_ASCII_STD);
6604 if (err < 0) {
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006605 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6606 __func__, err);
6607 goto out;
6608 }
6609
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006610 /*
6611 * ufshcd_read_string_desc returns size of the string
6612 * reset the error value
6613 */
6614 err = 0;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006615
6616out:
Kees Cookbbe21d72018-05-02 16:58:09 -07006617 kfree(desc_buf);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006618 return err;
6619}
6620
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006621static void ufs_put_device_desc(struct ufs_dev_desc *dev_desc)
6622{
6623 kfree(dev_desc->model);
6624 dev_desc->model = NULL;
6625}
6626
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006627static void ufs_fixup_device_setup(struct ufs_hba *hba,
6628 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006629{
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006630 struct ufs_dev_fix *f;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006631
6632 for (f = ufs_fixups; f->quirk; f++) {
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006633 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
6634 f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006635 ((dev_desc->model &&
6636 STR_PRFX_EQUAL(f->card.model, dev_desc->model)) ||
6637 !strcmp(f->card.model, UFS_ANY_MODEL)))
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006638 hba->dev_quirks |= f->quirk;
6639 }
6640}
6641
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006642/**
Yaniv Gardi37113102016-03-10 17:37:16 +02006643 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6644 * @hba: per-adapter instance
6645 *
6646 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6647 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6648 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6649 * the hibern8 exit latency.
6650 *
6651 * Returns zero on success, non-zero error value on failure.
6652 */
6653static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6654{
6655 int ret = 0;
6656 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6657
6658 ret = ufshcd_dme_peer_get(hba,
6659 UIC_ARG_MIB_SEL(
6660 RX_MIN_ACTIVATETIME_CAPABILITY,
6661 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6662 &peer_rx_min_activatetime);
6663 if (ret)
6664 goto out;
6665
6666 /* make sure proper unit conversion is applied */
6667 tuned_pa_tactivate =
6668 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6669 / PA_TACTIVATE_TIME_UNIT_US);
6670 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6671 tuned_pa_tactivate);
6672
6673out:
6674 return ret;
6675}
6676
6677/**
6678 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6679 * @hba: per-adapter instance
6680 *
6681 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6682 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6683 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6684 * This optimal value can help reduce the hibern8 exit latency.
6685 *
6686 * Returns zero on success, non-zero error value on failure.
6687 */
6688static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6689{
6690 int ret = 0;
6691 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6692 u32 max_hibern8_time, tuned_pa_hibern8time;
6693
6694 ret = ufshcd_dme_get(hba,
6695 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6696 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6697 &local_tx_hibern8_time_cap);
6698 if (ret)
6699 goto out;
6700
6701 ret = ufshcd_dme_peer_get(hba,
6702 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6703 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6704 &peer_rx_hibern8_time_cap);
6705 if (ret)
6706 goto out;
6707
6708 max_hibern8_time = max(local_tx_hibern8_time_cap,
6709 peer_rx_hibern8_time_cap);
6710 /* make sure proper unit conversion is applied */
6711 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6712 / PA_HIBERN8_TIME_UNIT_US);
6713 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6714 tuned_pa_hibern8time);
6715out:
6716 return ret;
6717}
6718
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006719/**
6720 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6721 * less than device PA_TACTIVATE time.
6722 * @hba: per-adapter instance
6723 *
6724 * Some UFS devices require host PA_TACTIVATE to be lower than device
6725 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6726 * for such devices.
6727 *
6728 * Returns zero on success, non-zero error value on failure.
6729 */
6730static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6731{
6732 int ret = 0;
6733 u32 granularity, peer_granularity;
6734 u32 pa_tactivate, peer_pa_tactivate;
6735 u32 pa_tactivate_us, peer_pa_tactivate_us;
6736 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6737
6738 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6739 &granularity);
6740 if (ret)
6741 goto out;
6742
6743 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6744 &peer_granularity);
6745 if (ret)
6746 goto out;
6747
6748 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6749 (granularity > PA_GRANULARITY_MAX_VAL)) {
6750 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6751 __func__, granularity);
6752 return -EINVAL;
6753 }
6754
6755 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6756 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6757 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6758 __func__, peer_granularity);
6759 return -EINVAL;
6760 }
6761
6762 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6763 if (ret)
6764 goto out;
6765
6766 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6767 &peer_pa_tactivate);
6768 if (ret)
6769 goto out;
6770
6771 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6772 peer_pa_tactivate_us = peer_pa_tactivate *
6773 gran_to_us_table[peer_granularity - 1];
6774
6775 if (pa_tactivate_us > peer_pa_tactivate_us) {
6776 u32 new_peer_pa_tactivate;
6777
6778 new_peer_pa_tactivate = pa_tactivate_us /
6779 gran_to_us_table[peer_granularity - 1];
6780 new_peer_pa_tactivate++;
6781 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6782 new_peer_pa_tactivate);
6783 }
6784
6785out:
6786 return ret;
6787}
6788
Yaniv Gardi37113102016-03-10 17:37:16 +02006789static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6790{
6791 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6792 ufshcd_tune_pa_tactivate(hba);
6793 ufshcd_tune_pa_hibern8time(hba);
6794 }
6795
6796 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6797 /* set 1ms timeout for PA_TACTIVATE */
6798 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006799
6800 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6801 ufshcd_quirk_tune_host_pa_tactivate(hba);
Subhash Jadavani56d4a182016-12-05 19:25:32 -08006802
6803 ufshcd_vops_apply_dev_quirks(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02006804}
6805
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006806static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6807{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006808 hba->ufs_stats.hibern8_exit_cnt = 0;
6809 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08006810 hba->req_abort_count = 0;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006811}
6812
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006813static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6814{
6815 int err;
6816
6817 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6818 &hba->desc_size.dev_desc);
6819 if (err)
6820 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6821
6822 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6823 &hba->desc_size.pwr_desc);
6824 if (err)
6825 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6826
6827 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6828 &hba->desc_size.interc_desc);
6829 if (err)
6830 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6831
6832 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6833 &hba->desc_size.conf_desc);
6834 if (err)
6835 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6836
6837 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6838 &hba->desc_size.unit_desc);
6839 if (err)
6840 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6841
6842 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6843 &hba->desc_size.geom_desc);
6844 if (err)
6845 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
Bean Huo059efd82019-10-29 14:22:45 +00006846
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02006847 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
6848 &hba->desc_size.hlth_desc);
6849 if (err)
6850 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006851}
6852
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05306853static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
6854 {19200000, REF_CLK_FREQ_19_2_MHZ},
6855 {26000000, REF_CLK_FREQ_26_MHZ},
6856 {38400000, REF_CLK_FREQ_38_4_MHZ},
6857 {52000000, REF_CLK_FREQ_52_MHZ},
6858 {0, REF_CLK_FREQ_INVAL},
6859};
6860
6861static enum ufs_ref_clk_freq
6862ufs_get_bref_clk_from_hz(unsigned long freq)
6863{
6864 int i;
6865
6866 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
6867 if (ufs_ref_clk_freqs[i].freq_hz == freq)
6868 return ufs_ref_clk_freqs[i].val;
6869
6870 return REF_CLK_FREQ_INVAL;
6871}
6872
6873void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
6874{
6875 unsigned long freq;
6876
6877 freq = clk_get_rate(refclk);
6878
6879 hba->dev_ref_clk_freq =
6880 ufs_get_bref_clk_from_hz(freq);
6881
6882 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
6883 dev_err(hba->dev,
6884 "invalid ref_clk setting = %ld\n", freq);
6885}
6886
6887static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
6888{
6889 int err;
6890 u32 ref_clk;
6891 u32 freq = hba->dev_ref_clk_freq;
6892
6893 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
6894 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
6895
6896 if (err) {
6897 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
6898 err);
6899 goto out;
6900 }
6901
6902 if (ref_clk == freq)
6903 goto out; /* nothing to update */
6904
6905 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6906 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
6907
6908 if (err) {
6909 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
6910 ufs_ref_clk_freqs[freq].freq_hz);
6911 goto out;
6912 }
6913
6914 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
6915 ufs_ref_clk_freqs[freq].freq_hz);
6916
6917out:
6918 return err;
6919}
6920
Yaniv Gardi37113102016-03-10 17:37:16 +02006921/**
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006922 * ufshcd_probe_hba - probe hba to detect device and initialize
6923 * @hba: per-adapter instance
6924 *
6925 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306926 */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006927static int ufshcd_probe_hba(struct ufs_hba *hba)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306928{
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006929 struct ufs_dev_desc card = {0};
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306930 int ret;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006931 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306932
6933 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306934 if (ret)
6935 goto out;
6936
Yaniv Gardiafdfff52016-03-10 17:37:15 +02006937 /* set the default level for urgent bkops */
6938 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6939 hba->is_urgent_bkops_lvl_checked = false;
6940
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006941 /* Debug counters initialization */
6942 ufshcd_clear_dbg_ufs_stats(hba);
6943
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006944 /* UniPro link is active now */
6945 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05306946
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306947 ret = ufshcd_verify_dev_init(hba);
6948 if (ret)
6949 goto out;
6950
Dolev Raviv68078d52013-07-30 00:35:58 +05306951 ret = ufshcd_complete_dev_init(hba);
6952 if (ret)
6953 goto out;
6954
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006955 /* Init check for device descriptor sizes */
6956 ufshcd_init_desc_sizes(hba);
6957
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006958 ret = ufs_get_device_desc(hba, &card);
6959 if (ret) {
6960 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6961 __func__, ret);
6962 goto out;
6963 }
6964
6965 ufs_fixup_device_setup(hba, &card);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006966 ufs_put_device_desc(&card);
6967
Yaniv Gardi37113102016-03-10 17:37:16 +02006968 ufshcd_tune_unipro_params(hba);
Yaniv Gardi60f01872016-03-10 17:37:11 +02006969
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006970 /* UFS device is also active now */
6971 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306972 ufshcd_force_reset_auto_bkops(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006973 hba->wlun_dev_clr_ua = true;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306974
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006975 if (ufshcd_get_max_pwr_mode(hba)) {
6976 dev_err(hba->dev,
6977 "%s: Failed getting max supported power mode\n",
6978 __func__);
6979 } else {
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05306980 /*
6981 * Set the right value to bRefClkFreq before attempting to
6982 * switch to HS gears.
6983 */
6984 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
6985 ufshcd_set_dev_ref_clk(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006986 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Dov Levenglick8643ae62016-10-17 17:10:14 -07006987 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006988 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6989 __func__, ret);
Dov Levenglick8643ae62016-10-17 17:10:14 -07006990 goto out;
6991 }
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006992 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006993
Yaniv Gardi53c12d02016-02-01 15:02:45 +02006994 /* set the state as operational after switching to desired gear */
6995 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006996
Can Guo71d848b2019-11-14 22:09:26 -08006997 /* Enable Auto-Hibernate if configured */
6998 ufshcd_auto_hibern8_enable(hba);
6999
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007000 /*
7001 * If we are in error handling context or in power management callbacks
7002 * context, no need to scan the host
7003 */
7004 if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
7005 bool flag;
7006
7007 /* clear any previous UFS device information */
7008 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02007009 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
7010 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007011 hba->dev_info.f_power_on_wp_en = flag;
7012
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007013 if (!hba->is_init_prefetch)
7014 ufshcd_init_icc_levels(hba);
7015
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007016 /* Add required well known logical units to scsi mid layer */
7017 if (ufshcd_scsi_add_wlus(hba))
7018 goto out;
7019
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007020 /* Initialize devfreq after UFS device is detected */
7021 if (ufshcd_is_clkscaling_supported(hba)) {
7022 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7023 &hba->pwr_info,
7024 sizeof(struct ufs_pa_layer_attr));
7025 hba->clk_scaling.saved_pwr_info.is_valid = true;
7026 if (!hba->devfreq) {
Bjorn Anderssondeac4442018-05-17 23:26:36 -07007027 ret = ufshcd_devfreq_init(hba);
7028 if (ret)
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007029 goto out;
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007030 }
7031 hba->clk_scaling.is_allowed = true;
7032 }
7033
Avri Altmandf032bf2018-10-07 17:30:35 +03007034 ufs_bsg_probe(hba);
7035
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307036 scsi_scan_host(hba->host);
7037 pm_runtime_put_sync(hba->dev);
7038 }
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007039
7040 if (!hba->is_init_prefetch)
7041 hba->is_init_prefetch = true;
7042
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307043out:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007044 /*
7045 * If we failed to initialize the device or the device is not
7046 * present, turn off the power/clocks etc.
7047 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007048 if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
7049 pm_runtime_put_sync(hba->dev);
Vivek Gautameebcc192018-08-07 23:17:39 +05307050 ufshcd_exit_clk_scaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007051 ufshcd_hba_exit(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007052 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007053
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007054 trace_ufshcd_init(dev_name(hba->dev), ret,
7055 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007056 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007057 return ret;
7058}
7059
7060/**
7061 * ufshcd_async_scan - asynchronous execution for probing hba
7062 * @data: data pointer to pass to this function
7063 * @cookie: cookie data
7064 */
7065static void ufshcd_async_scan(void *data, async_cookie_t cookie)
7066{
7067 struct ufs_hba *hba = (struct ufs_hba *)data;
7068
7069 ufshcd_probe_hba(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307070}
7071
Yaniv Gardif550c652016-03-10 17:37:07 +02007072static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
7073{
7074 unsigned long flags;
7075 struct Scsi_Host *host;
7076 struct ufs_hba *hba;
7077 int index;
7078 bool found = false;
7079
7080 if (!scmd || !scmd->device || !scmd->device->host)
Christoph Hellwig66005932018-05-29 15:52:29 +02007081 return BLK_EH_DONE;
Yaniv Gardif550c652016-03-10 17:37:07 +02007082
7083 host = scmd->device->host;
7084 hba = shost_priv(host);
7085 if (!hba)
Christoph Hellwig66005932018-05-29 15:52:29 +02007086 return BLK_EH_DONE;
Yaniv Gardif550c652016-03-10 17:37:07 +02007087
7088 spin_lock_irqsave(host->host_lock, flags);
7089
7090 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
7091 if (hba->lrb[index].cmd == scmd) {
7092 found = true;
7093 break;
7094 }
7095 }
7096
7097 spin_unlock_irqrestore(host->host_lock, flags);
7098
7099 /*
7100 * Bypass SCSI error handling and reset the block layer timer if this
7101 * SCSI command was not actually dispatched to UFS driver, otherwise
7102 * let SCSI layer handle the error as usual.
7103 */
Christoph Hellwig66005932018-05-29 15:52:29 +02007104 return found ? BLK_EH_DONE : BLK_EH_RESET_TIMER;
Yaniv Gardif550c652016-03-10 17:37:07 +02007105}
7106
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007107static const struct attribute_group *ufshcd_driver_groups[] = {
7108 &ufs_sysfs_unit_descriptor_group,
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02007109 &ufs_sysfs_lun_attributes_group,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007110 NULL,
7111};
7112
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307113static struct scsi_host_template ufshcd_driver_template = {
7114 .module = THIS_MODULE,
7115 .name = UFSHCD,
7116 .proc_name = UFSHCD,
7117 .queuecommand = ufshcd_queuecommand,
7118 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09007119 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307120 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03007121 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307122 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307123 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
7124 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Yaniv Gardif550c652016-03-10 17:37:07 +02007125 .eh_timed_out = ufshcd_eh_timed_out,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307126 .this_id = -1,
7127 .sg_tablesize = SG_ALL,
7128 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
7129 .can_queue = UFSHCD_CAN_QUEUE,
Christoph Hellwig552a9902019-06-17 14:19:55 +02007130 .max_segment_size = PRDT_DATA_BYTE_COUNT_MAX,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007131 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01007132 .track_queue_depth = 1,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007133 .sdev_groups = ufshcd_driver_groups,
Christoph Hellwig4af14d12018-12-13 16:17:09 +01007134 .dma_boundary = PAGE_SIZE - 1,
Stanley Chu49615ba2019-09-16 23:56:50 +08007135 .rpm_autosuspend_delay = RPM_AUTOSUSPEND_DELAY_MS,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307136};
7137
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007138static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
7139 int ua)
7140{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007141 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007142
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007143 if (!vreg)
7144 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007145
Stanley Chu0487fff2019-03-28 17:16:25 +08007146 /*
7147 * "set_load" operation shall be required on those regulators
7148 * which specifically configured current limitation. Otherwise
7149 * zero max_uA may cause unexpected behavior when regulator is
7150 * enabled or set as high power mode.
7151 */
7152 if (!vreg->max_uA)
7153 return 0;
7154
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007155 ret = regulator_set_load(vreg->reg, ua);
7156 if (ret < 0) {
7157 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
7158 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007159 }
7160
7161 return ret;
7162}
7163
7164static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7165 struct ufs_vreg *vreg)
7166{
Marc Gonzalez73067982019-02-27 11:41:45 +01007167 return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007168}
7169
7170static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7171 struct ufs_vreg *vreg)
7172{
Adrian Hunter7c7cfdc2019-08-14 15:59:50 +03007173 if (!vreg)
7174 return 0;
7175
Marc Gonzalez73067982019-02-27 11:41:45 +01007176 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007177}
7178
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007179static int ufshcd_config_vreg(struct device *dev,
7180 struct ufs_vreg *vreg, bool on)
7181{
7182 int ret = 0;
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007183 struct regulator *reg;
7184 const char *name;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007185 int min_uV, uA_load;
7186
7187 BUG_ON(!vreg);
7188
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007189 reg = vreg->reg;
7190 name = vreg->name;
7191
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007192 if (regulator_count_voltages(reg) > 0) {
Stanley Chu3b141e82019-03-28 17:16:24 +08007193 if (vreg->min_uV && vreg->max_uV) {
7194 min_uV = on ? vreg->min_uV : 0;
7195 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7196 if (ret) {
7197 dev_err(dev,
7198 "%s: %s set voltage failed, err=%d\n",
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007199 __func__, name, ret);
Stanley Chu3b141e82019-03-28 17:16:24 +08007200 goto out;
7201 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007202 }
7203
7204 uA_load = on ? vreg->max_uA : 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007205 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7206 if (ret)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007207 goto out;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007208 }
7209out:
7210 return ret;
7211}
7212
7213static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7214{
7215 int ret = 0;
7216
Marc Gonzalez73067982019-02-27 11:41:45 +01007217 if (!vreg || vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007218 goto out;
7219
7220 ret = ufshcd_config_vreg(dev, vreg, true);
7221 if (!ret)
7222 ret = regulator_enable(vreg->reg);
7223
7224 if (!ret)
7225 vreg->enabled = true;
7226 else
7227 dev_err(dev, "%s: %s enable failed, err=%d\n",
7228 __func__, vreg->name, ret);
7229out:
7230 return ret;
7231}
7232
7233static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7234{
7235 int ret = 0;
7236
Marc Gonzalez73067982019-02-27 11:41:45 +01007237 if (!vreg || !vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007238 goto out;
7239
7240 ret = regulator_disable(vreg->reg);
7241
7242 if (!ret) {
7243 /* ignore errors on applying disable config */
7244 ufshcd_config_vreg(dev, vreg, false);
7245 vreg->enabled = false;
7246 } else {
7247 dev_err(dev, "%s: %s disable failed, err=%d\n",
7248 __func__, vreg->name, ret);
7249 }
7250out:
7251 return ret;
7252}
7253
7254static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7255{
7256 int ret = 0;
7257 struct device *dev = hba->dev;
7258 struct ufs_vreg_info *info = &hba->vreg_info;
7259
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007260 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7261 if (ret)
7262 goto out;
7263
7264 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7265 if (ret)
7266 goto out;
7267
7268 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7269 if (ret)
7270 goto out;
7271
7272out:
7273 if (ret) {
7274 ufshcd_toggle_vreg(dev, info->vccq2, false);
7275 ufshcd_toggle_vreg(dev, info->vccq, false);
7276 ufshcd_toggle_vreg(dev, info->vcc, false);
7277 }
7278 return ret;
7279}
7280
Raviv Shvili6a771a62014-09-25 15:32:24 +03007281static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7282{
7283 struct ufs_vreg_info *info = &hba->vreg_info;
7284
Zeng Guangyue60b7b822019-03-30 17:03:13 +08007285 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007286}
7287
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007288static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7289{
7290 int ret = 0;
7291
7292 if (!vreg)
7293 goto out;
7294
7295 vreg->reg = devm_regulator_get(dev, vreg->name);
7296 if (IS_ERR(vreg->reg)) {
7297 ret = PTR_ERR(vreg->reg);
7298 dev_err(dev, "%s: %s get failed, err=%d\n",
7299 __func__, vreg->name, ret);
7300 }
7301out:
7302 return ret;
7303}
7304
7305static int ufshcd_init_vreg(struct ufs_hba *hba)
7306{
7307 int ret = 0;
7308 struct device *dev = hba->dev;
7309 struct ufs_vreg_info *info = &hba->vreg_info;
7310
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007311 ret = ufshcd_get_vreg(dev, info->vcc);
7312 if (ret)
7313 goto out;
7314
7315 ret = ufshcd_get_vreg(dev, info->vccq);
7316 if (ret)
7317 goto out;
7318
7319 ret = ufshcd_get_vreg(dev, info->vccq2);
7320out:
7321 return ret;
7322}
7323
Raviv Shvili6a771a62014-09-25 15:32:24 +03007324static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7325{
7326 struct ufs_vreg_info *info = &hba->vreg_info;
7327
7328 if (info)
7329 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7330
7331 return 0;
7332}
7333
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007334static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7335 bool skip_ref_clk)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007336{
7337 int ret = 0;
7338 struct ufs_clk_info *clki;
7339 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007340 unsigned long flags;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007341 ktime_t start = ktime_get();
7342 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007343
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007344 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007345 goto out;
7346
Subhash Jadavanib3344562018-05-03 16:37:17 +05307347 /*
7348 * vendor specific setup_clocks ops may depend on clocks managed by
7349 * this standard driver hence call the vendor specific setup_clocks
7350 * before disabling the clocks managed here.
7351 */
7352 if (!on) {
7353 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
7354 if (ret)
7355 return ret;
7356 }
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007357
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007358 list_for_each_entry(clki, head, list) {
7359 if (!IS_ERR_OR_NULL(clki->clk)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007360 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7361 continue;
7362
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007363 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007364 if (on && !clki->enabled) {
7365 ret = clk_prepare_enable(clki->clk);
7366 if (ret) {
7367 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7368 __func__, clki->name, ret);
7369 goto out;
7370 }
7371 } else if (!on && clki->enabled) {
7372 clk_disable_unprepare(clki->clk);
7373 }
7374 clki->enabled = on;
7375 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7376 clki->name, on ? "en" : "dis");
7377 }
7378 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007379
Subhash Jadavanib3344562018-05-03 16:37:17 +05307380 /*
7381 * vendor specific setup_clocks ops may depend on clocks managed by
7382 * this standard driver hence call the vendor specific setup_clocks
7383 * after enabling the clocks managed here.
7384 */
7385 if (on) {
7386 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
7387 if (ret)
7388 return ret;
7389 }
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007390
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007391out:
7392 if (ret) {
7393 list_for_each_entry(clki, head, list) {
7394 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7395 clk_disable_unprepare(clki->clk);
7396 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007397 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007398 spin_lock_irqsave(hba->host->host_lock, flags);
7399 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007400 trace_ufshcd_clk_gating(dev_name(hba->dev),
7401 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007402 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007403 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007404
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007405 if (clk_state_changed)
7406 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7407 (on ? "on" : "off"),
7408 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007409 return ret;
7410}
7411
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007412static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
7413{
7414 return __ufshcd_setup_clocks(hba, on, false);
7415}
7416
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007417static int ufshcd_init_clocks(struct ufs_hba *hba)
7418{
7419 int ret = 0;
7420 struct ufs_clk_info *clki;
7421 struct device *dev = hba->dev;
7422 struct list_head *head = &hba->clk_list_head;
7423
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007424 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007425 goto out;
7426
7427 list_for_each_entry(clki, head, list) {
7428 if (!clki->name)
7429 continue;
7430
7431 clki->clk = devm_clk_get(dev, clki->name);
7432 if (IS_ERR(clki->clk)) {
7433 ret = PTR_ERR(clki->clk);
7434 dev_err(dev, "%s: %s clk get failed, %d\n",
7435 __func__, clki->name, ret);
7436 goto out;
7437 }
7438
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307439 /*
7440 * Parse device ref clk freq as per device tree "ref_clk".
7441 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
7442 * in ufshcd_alloc_host().
7443 */
7444 if (!strcmp(clki->name, "ref_clk"))
7445 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
7446
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007447 if (clki->max_freq) {
7448 ret = clk_set_rate(clki->clk, clki->max_freq);
7449 if (ret) {
7450 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7451 __func__, clki->name,
7452 clki->max_freq, ret);
7453 goto out;
7454 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03007455 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007456 }
7457 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7458 clki->name, clk_get_rate(clki->clk));
7459 }
7460out:
7461 return ret;
7462}
7463
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007464static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7465{
7466 int err = 0;
7467
7468 if (!hba->vops)
7469 goto out;
7470
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007471 err = ufshcd_vops_init(hba);
7472 if (err)
7473 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007474
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007475 err = ufshcd_vops_setup_regulators(hba, true);
7476 if (err)
7477 goto out_exit;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007478
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007479 goto out;
7480
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007481out_exit:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007482 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007483out:
7484 if (err)
7485 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007486 __func__, ufshcd_get_var_name(hba), err);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007487 return err;
7488}
7489
7490static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7491{
7492 if (!hba->vops)
7493 return;
7494
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007495 ufshcd_vops_setup_regulators(hba, false);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007496
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007497 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007498}
7499
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007500static int ufshcd_hba_init(struct ufs_hba *hba)
7501{
7502 int err;
7503
Raviv Shvili6a771a62014-09-25 15:32:24 +03007504 /*
7505 * Handle host controller power separately from the UFS device power
7506 * rails as it will help controlling the UFS host controller power
7507 * collapse easily which is different than UFS device power collapse.
7508 * Also, enable the host controller power before we go ahead with rest
7509 * of the initialization here.
7510 */
7511 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007512 if (err)
7513 goto out;
7514
Raviv Shvili6a771a62014-09-25 15:32:24 +03007515 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007516 if (err)
7517 goto out;
7518
Raviv Shvili6a771a62014-09-25 15:32:24 +03007519 err = ufshcd_init_clocks(hba);
7520 if (err)
7521 goto out_disable_hba_vreg;
7522
7523 err = ufshcd_setup_clocks(hba, true);
7524 if (err)
7525 goto out_disable_hba_vreg;
7526
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007527 err = ufshcd_init_vreg(hba);
7528 if (err)
7529 goto out_disable_clks;
7530
7531 err = ufshcd_setup_vreg(hba, true);
7532 if (err)
7533 goto out_disable_clks;
7534
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007535 err = ufshcd_variant_hba_init(hba);
7536 if (err)
7537 goto out_disable_vreg;
7538
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007539 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007540 goto out;
7541
7542out_disable_vreg:
7543 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007544out_disable_clks:
7545 ufshcd_setup_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007546out_disable_hba_vreg:
7547 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007548out:
7549 return err;
7550}
7551
7552static void ufshcd_hba_exit(struct ufs_hba *hba)
7553{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007554 if (hba->is_powered) {
7555 ufshcd_variant_hba_exit(hba);
7556 ufshcd_setup_vreg(hba, false);
Gilad Bronera5082532016-10-17 17:10:00 -07007557 ufshcd_suspend_clkscaling(hba);
Vivek Gautameebcc192018-08-07 23:17:39 +05307558 if (ufshcd_is_clkscaling_supported(hba))
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007559 if (hba->devfreq)
7560 ufshcd_suspend_clkscaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007561 ufshcd_setup_clocks(hba, false);
7562 ufshcd_setup_hba_vreg(hba, false);
7563 hba->is_powered = false;
7564 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007565}
7566
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007567static int
7568ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307569{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007570 unsigned char cmd[6] = {REQUEST_SENSE,
7571 0,
7572 0,
7573 0,
Avri Altman09a5a242018-11-22 20:04:56 +02007574 UFS_SENSE_SIZE,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007575 0};
7576 char *buffer;
7577 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307578
Avri Altman09a5a242018-11-22 20:04:56 +02007579 buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007580 if (!buffer) {
7581 ret = -ENOMEM;
7582 goto out;
7583 }
7584
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007585 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
Avri Altman09a5a242018-11-22 20:04:56 +02007586 UFS_SENSE_SIZE, NULL, NULL,
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007587 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007588 if (ret)
7589 pr_err("%s: failed with err %d\n", __func__, ret);
7590
7591 kfree(buffer);
7592out:
7593 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307594}
7595
7596/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007597 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7598 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307599 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007600 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307601 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007602 * Returns 0 if requested power mode is set successfully
7603 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307604 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007605static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7606 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307607{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007608 unsigned char cmd[6] = { START_STOP };
7609 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007610 struct scsi_device *sdp;
7611 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007612 int ret;
7613
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007614 spin_lock_irqsave(hba->host->host_lock, flags);
7615 sdp = hba->sdev_ufs_device;
7616 if (sdp) {
7617 ret = scsi_device_get(sdp);
7618 if (!ret && !scsi_device_online(sdp)) {
7619 ret = -ENODEV;
7620 scsi_device_put(sdp);
7621 }
7622 } else {
7623 ret = -ENODEV;
7624 }
7625 spin_unlock_irqrestore(hba->host->host_lock, flags);
7626
7627 if (ret)
7628 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007629
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307630 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007631 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7632 * handling, which would wait for host to be resumed. Since we know
7633 * we are functional while we are here, skip host resume in error
7634 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307635 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007636 hba->host->eh_noresume = 1;
7637 if (hba->wlun_dev_clr_ua) {
7638 ret = ufshcd_send_request_sense(hba, sdp);
7639 if (ret)
7640 goto out;
7641 /* Unit attention condition is cleared now */
7642 hba->wlun_dev_clr_ua = false;
7643 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307644
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007645 cmd[4] = pwr_mode << 4;
7646
7647 /*
7648 * Current function would be generally called from the power management
Christoph Hellwige8064022016-10-20 15:12:13 +02007649 * callbacks hence set the RQF_PM flag so that it doesn't resume the
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007650 * already suspended childs.
7651 */
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007652 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7653 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007654 if (ret) {
7655 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02007656 "START_STOP failed for power mode: %d, result %x\n",
7657 pwr_mode, ret);
Johannes Thumshirnc65be1a2018-06-25 13:20:58 +02007658 if (driver_byte(ret) == DRIVER_SENSE)
Hannes Reinecke21045512015-01-08 07:43:46 +01007659 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007660 }
7661
7662 if (!ret)
7663 hba->curr_dev_pwr_mode = pwr_mode;
7664out:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007665 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007666 hba->host->eh_noresume = 0;
7667 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307668}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307669
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007670static int ufshcd_link_state_transition(struct ufs_hba *hba,
7671 enum uic_link_state req_link_state,
7672 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307673{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007674 int ret = 0;
7675
7676 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307677 return 0;
7678
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007679 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7680 ret = ufshcd_uic_hibern8_enter(hba);
7681 if (!ret)
7682 ufshcd_set_link_hibern8(hba);
7683 else
7684 goto out;
7685 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307686 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007687 * If autobkops is enabled, link can't be turned off because
7688 * turning off the link would also turn off the device.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307689 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007690 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
Dan Carpenterdc30c9e2019-12-13 13:49:35 +03007691 (!check_for_bkops || !hba->auto_bkops_enabled)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007692 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02007693 * Let's make sure that link is in low power mode, we are doing
7694 * this currently by putting the link in Hibern8. Otherway to
7695 * put the link in low power mode is to send the DME end point
7696 * to device and then send the DME reset command to local
7697 * unipro. But putting the link in hibern8 is much faster.
7698 */
7699 ret = ufshcd_uic_hibern8_enter(hba);
7700 if (ret)
7701 goto out;
7702 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007703 * Change controller state to "reset state" which
7704 * should also put the link in off/reset state
7705 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02007706 ufshcd_hba_stop(hba, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007707 /*
7708 * TODO: Check if we need any delay to make sure that
7709 * controller is reset
7710 */
7711 ufshcd_set_link_off(hba);
7712 }
7713
7714out:
7715 return ret;
7716}
7717
7718static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7719{
7720 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02007721 * It seems some UFS devices may keep drawing more than sleep current
7722 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7723 * To avoid this situation, add 2ms delay before putting these UFS
7724 * rails in LPM mode.
7725 */
7726 if (!ufshcd_is_link_active(hba) &&
7727 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7728 usleep_range(2000, 2100);
7729
7730 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007731 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7732 * power.
7733 *
7734 * If UFS device and link is in OFF state, all power supplies (VCC,
7735 * VCCQ, VCCQ2) can be turned off if power on write protect is not
7736 * required. If UFS link is inactive (Hibern8 or OFF state) and device
7737 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7738 *
7739 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7740 * in low power state which would save some power.
7741 */
7742 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7743 !hba->dev_info.is_lu_power_on_wp) {
7744 ufshcd_setup_vreg(hba, false);
7745 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7746 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7747 if (!ufshcd_is_link_active(hba)) {
7748 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7749 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7750 }
7751 }
7752}
7753
7754static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7755{
7756 int ret = 0;
7757
7758 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7759 !hba->dev_info.is_lu_power_on_wp) {
7760 ret = ufshcd_setup_vreg(hba, true);
7761 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007762 if (!ret && !ufshcd_is_link_active(hba)) {
7763 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7764 if (ret)
7765 goto vcc_disable;
7766 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7767 if (ret)
7768 goto vccq_lpm;
7769 }
Subhash Jadavani69d72ac2016-10-27 17:26:24 -07007770 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007771 }
7772 goto out;
7773
7774vccq_lpm:
7775 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7776vcc_disable:
7777 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7778out:
7779 return ret;
7780}
7781
7782static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7783{
7784 if (ufshcd_is_link_off(hba))
7785 ufshcd_setup_hba_vreg(hba, false);
7786}
7787
7788static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7789{
7790 if (ufshcd_is_link_off(hba))
7791 ufshcd_setup_hba_vreg(hba, true);
7792}
7793
7794/**
7795 * ufshcd_suspend - helper function for suspend operations
7796 * @hba: per adapter instance
7797 * @pm_op: desired low power operation type
7798 *
7799 * This function will try to put the UFS device and link into low power
7800 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7801 * (System PM level).
7802 *
7803 * If this function is called during shutdown, it will make sure that
7804 * both UFS device and UFS link is powered off.
7805 *
7806 * NOTE: UFS device & link must be active before we enter in this function.
7807 *
7808 * Returns 0 for success and non-zero for failure
7809 */
7810static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7811{
7812 int ret = 0;
7813 enum ufs_pm_level pm_lvl;
7814 enum ufs_dev_pwr_mode req_dev_pwr_mode;
7815 enum uic_link_state req_link_state;
7816
7817 hba->pm_op_in_progress = 1;
7818 if (!ufshcd_is_shutdown_pm(pm_op)) {
7819 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7820 hba->rpm_lvl : hba->spm_lvl;
7821 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7822 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7823 } else {
7824 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7825 req_link_state = UIC_LINK_OFF_STATE;
7826 }
7827
7828 /*
7829 * If we can't transition into any of the low power modes
7830 * just gate the clocks.
7831 */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007832 ufshcd_hold(hba, false);
7833 hba->clk_gating.is_suspended = true;
7834
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007835 if (hba->clk_scaling.is_allowed) {
7836 cancel_work_sync(&hba->clk_scaling.suspend_work);
7837 cancel_work_sync(&hba->clk_scaling.resume_work);
7838 ufshcd_suspend_clkscaling(hba);
7839 }
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007840
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007841 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7842 req_link_state == UIC_LINK_ACTIVE_STATE) {
7843 goto disable_clks;
7844 }
7845
7846 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7847 (req_link_state == hba->uic_link_state))
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007848 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007849
7850 /* UFS device & link must be active before we enter in this function */
7851 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7852 ret = -EINVAL;
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007853 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007854 }
7855
7856 if (ufshcd_is_runtime_pm(pm_op)) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03007857 if (ufshcd_can_autobkops_during_suspend(hba)) {
7858 /*
7859 * The device is idle with no requests in the queue,
7860 * allow background operations if bkops status shows
7861 * that performance might be impacted.
7862 */
7863 ret = ufshcd_urgent_bkops(hba);
7864 if (ret)
7865 goto enable_gating;
7866 } else {
7867 /* make sure that auto bkops is disabled */
7868 ufshcd_disable_auto_bkops(hba);
7869 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007870 }
7871
7872 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7873 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7874 !ufshcd_is_runtime_pm(pm_op))) {
7875 /* ensure that bkops is disabled */
7876 ufshcd_disable_auto_bkops(hba);
7877 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7878 if (ret)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007879 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007880 }
7881
7882 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7883 if (ret)
7884 goto set_dev_active;
7885
7886 ufshcd_vreg_set_lpm(hba);
7887
7888disable_clks:
7889 /*
7890 * Call vendor specific suspend callback. As these callbacks may access
7891 * vendor specific host controller register space call them before the
7892 * host clocks are ON.
7893 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007894 ret = ufshcd_vops_suspend(hba, pm_op);
7895 if (ret)
7896 goto set_link_active;
Stanley Chudcb6cec2019-12-07 20:22:00 +08007897 /*
7898 * Disable the host irq as host controller as there won't be any
7899 * host controller transaction expected till resume.
7900 */
7901 ufshcd_disable_irq(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007902
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007903 if (!ufshcd_is_link_active(hba))
7904 ufshcd_setup_clocks(hba, false);
7905 else
7906 /* If link is active, device ref_clk can't be switched off */
7907 __ufshcd_setup_clocks(hba, false, true);
7908
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007909 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007910 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Stanley Chudcb6cec2019-12-07 20:22:00 +08007911
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007912 /* Put the host controller in low power mode if possible */
7913 ufshcd_hba_vreg_set_lpm(hba);
7914 goto out;
7915
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007916set_link_active:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007917 if (hba->clk_scaling.is_allowed)
7918 ufshcd_resume_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007919 ufshcd_vreg_set_hpm(hba);
7920 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7921 ufshcd_set_link_active(hba);
7922 else if (ufshcd_is_link_off(hba))
7923 ufshcd_host_reset_and_restore(hba);
7924set_dev_active:
7925 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7926 ufshcd_disable_auto_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007927enable_gating:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007928 if (hba->clk_scaling.is_allowed)
7929 ufshcd_resume_clkscaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007930 hba->clk_gating.is_suspended = false;
7931 ufshcd_release(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007932out:
7933 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08007934 if (ret)
7935 ufshcd_update_reg_hist(&hba->ufs_stats.suspend_err, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007936 return ret;
7937}
7938
7939/**
7940 * ufshcd_resume - helper function for resume operations
7941 * @hba: per adapter instance
7942 * @pm_op: runtime PM or system PM
7943 *
7944 * This function basically brings the UFS device, UniPro link and controller
7945 * to active state.
7946 *
7947 * Returns 0 for success and non-zero for failure
7948 */
7949static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7950{
7951 int ret;
7952 enum uic_link_state old_link_state;
7953
7954 hba->pm_op_in_progress = 1;
7955 old_link_state = hba->uic_link_state;
7956
7957 ufshcd_hba_vreg_set_hpm(hba);
7958 /* Make sure clocks are enabled before accessing controller */
7959 ret = ufshcd_setup_clocks(hba, true);
7960 if (ret)
7961 goto out;
7962
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007963 /* enable the host irq as host controller would be active soon */
Can Guo5231d382019-12-05 02:14:46 +00007964 ufshcd_enable_irq(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007965
7966 ret = ufshcd_vreg_set_hpm(hba);
7967 if (ret)
7968 goto disable_irq_and_vops_clks;
7969
7970 /*
7971 * Call vendor specific resume callback. As these callbacks may access
7972 * vendor specific host controller register space call them when the
7973 * host clocks are ON.
7974 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007975 ret = ufshcd_vops_resume(hba, pm_op);
7976 if (ret)
7977 goto disable_vreg;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007978
7979 if (ufshcd_is_link_hibern8(hba)) {
7980 ret = ufshcd_uic_hibern8_exit(hba);
7981 if (!ret)
7982 ufshcd_set_link_active(hba);
7983 else
7984 goto vendor_suspend;
7985 } else if (ufshcd_is_link_off(hba)) {
7986 ret = ufshcd_host_reset_and_restore(hba);
7987 /*
7988 * ufshcd_host_reset_and_restore() should have already
7989 * set the link state as active
7990 */
7991 if (ret || !ufshcd_is_link_active(hba))
7992 goto vendor_suspend;
7993 }
7994
7995 if (!ufshcd_is_ufs_dev_active(hba)) {
7996 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
7997 if (ret)
7998 goto set_old_link_state;
7999 }
8000
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08008001 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
8002 ufshcd_enable_auto_bkops(hba);
8003 else
8004 /*
8005 * If BKOPs operations are urgently needed at this moment then
8006 * keep auto-bkops enabled or else disable it.
8007 */
8008 ufshcd_urgent_bkops(hba);
8009
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008010 hba->clk_gating.is_suspended = false;
8011
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08008012 if (hba->clk_scaling.is_allowed)
8013 ufshcd_resume_clkscaling(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03008014
Adrian Hunterad448372018-03-20 15:07:38 +02008015 /* Enable Auto-Hibernate if configured */
8016 ufshcd_auto_hibern8_enable(hba);
8017
Can Guo71d848b2019-11-14 22:09:26 -08008018 /* Schedule clock gating in case of no access to UFS device yet */
8019 ufshcd_release(hba);
8020
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008021 goto out;
8022
8023set_old_link_state:
8024 ufshcd_link_state_transition(hba, old_link_state, 0);
8025vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008026 ufshcd_vops_suspend(hba, pm_op);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008027disable_vreg:
8028 ufshcd_vreg_set_lpm(hba);
8029disable_irq_and_vops_clks:
8030 ufshcd_disable_irq(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08008031 if (hba->clk_scaling.is_allowed)
8032 ufshcd_suspend_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008033 ufshcd_setup_clocks(hba, false);
8034out:
8035 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08008036 if (ret)
8037 ufshcd_update_reg_hist(&hba->ufs_stats.resume_err, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008038 return ret;
8039}
8040
8041/**
8042 * ufshcd_system_suspend - system suspend routine
8043 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008044 *
8045 * Check the description of ufshcd_suspend() function for more details.
8046 *
8047 * Returns 0 for success and non-zero for failure
8048 */
8049int ufshcd_system_suspend(struct ufs_hba *hba)
8050{
8051 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008052 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008053
8054 if (!hba || !hba->is_powered)
Dolev Raviv233b5942014-10-23 13:25:14 +03008055 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008056
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008057 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
8058 hba->curr_dev_pwr_mode) &&
8059 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
8060 hba->uic_link_state))
8061 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008062
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008063 if (pm_runtime_suspended(hba->dev)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008064 /*
8065 * UFS device and/or UFS link low power states during runtime
8066 * suspend seems to be different than what is expected during
8067 * system suspend. Hence runtime resume the devic & link and
8068 * let the system suspend low power states to take effect.
8069 * TODO: If resume takes longer time, we might have optimize
8070 * it in future by not resuming everything if possible.
8071 */
8072 ret = ufshcd_runtime_resume(hba);
8073 if (ret)
8074 goto out;
8075 }
8076
8077 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
8078out:
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008079 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
8080 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008081 hba->curr_dev_pwr_mode, hba->uic_link_state);
Dolev Ravive7850602014-09-25 15:32:36 +03008082 if (!ret)
8083 hba->is_sys_suspended = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008084 return ret;
8085}
8086EXPORT_SYMBOL(ufshcd_system_suspend);
8087
8088/**
8089 * ufshcd_system_resume - system resume routine
8090 * @hba: per adapter instance
8091 *
8092 * Returns 0 for success and non-zero for failure
8093 */
8094
8095int ufshcd_system_resume(struct ufs_hba *hba)
8096{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008097 int ret = 0;
8098 ktime_t start = ktime_get();
8099
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008100 if (!hba)
8101 return -EINVAL;
8102
8103 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008104 /*
8105 * Let the runtime resume take care of resuming
8106 * if runtime suspended.
8107 */
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008108 goto out;
8109 else
8110 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
8111out:
8112 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
8113 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008114 hba->curr_dev_pwr_mode, hba->uic_link_state);
Stanley Chuce9e7bc2019-01-07 22:19:34 +08008115 if (!ret)
8116 hba->is_sys_suspended = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008117 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008118}
8119EXPORT_SYMBOL(ufshcd_system_resume);
8120
8121/**
8122 * ufshcd_runtime_suspend - runtime suspend routine
8123 * @hba: per adapter instance
8124 *
8125 * Check the description of ufshcd_suspend() function for more details.
8126 *
8127 * Returns 0 for success and non-zero for failure
8128 */
8129int ufshcd_runtime_suspend(struct ufs_hba *hba)
8130{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008131 int ret = 0;
8132 ktime_t start = ktime_get();
8133
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008134 if (!hba)
8135 return -EINVAL;
8136
8137 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008138 goto out;
8139 else
8140 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
8141out:
8142 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
8143 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008144 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008145 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308146}
8147EXPORT_SYMBOL(ufshcd_runtime_suspend);
8148
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008149/**
8150 * ufshcd_runtime_resume - runtime resume routine
8151 * @hba: per adapter instance
8152 *
8153 * This function basically brings the UFS device, UniPro link and controller
8154 * to active state. Following operations are done in this function:
8155 *
8156 * 1. Turn on all the controller related clocks
8157 * 2. Bring the UniPro link out of Hibernate state
8158 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
8159 * to active state.
8160 * 4. If auto-bkops is enabled on the device, disable it.
8161 *
8162 * So following would be the possible power state after this function return
8163 * successfully:
8164 * S1: UFS device in Active state with VCC rail ON
8165 * UniPro link in Active state
8166 * All the UFS/UniPro controller clocks are ON
8167 *
8168 * Returns 0 for success and non-zero for failure
8169 */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308170int ufshcd_runtime_resume(struct ufs_hba *hba)
8171{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008172 int ret = 0;
8173 ktime_t start = ktime_get();
8174
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008175 if (!hba)
8176 return -EINVAL;
8177
8178 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008179 goto out;
8180 else
8181 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8182out:
8183 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8184 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008185 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008186 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308187}
8188EXPORT_SYMBOL(ufshcd_runtime_resume);
8189
8190int ufshcd_runtime_idle(struct ufs_hba *hba)
8191{
8192 return 0;
8193}
8194EXPORT_SYMBOL(ufshcd_runtime_idle);
8195
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308196/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008197 * ufshcd_shutdown - shutdown routine
8198 * @hba: per adapter instance
8199 *
8200 * This function would power off both UFS device and UFS link.
8201 *
8202 * Returns 0 always to allow force shutdown even in case of errors.
8203 */
8204int ufshcd_shutdown(struct ufs_hba *hba)
8205{
8206 int ret = 0;
8207
Stanley Chuf51913e2019-09-18 12:20:38 +08008208 if (!hba->is_powered)
8209 goto out;
8210
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008211 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
8212 goto out;
8213
8214 if (pm_runtime_suspended(hba->dev)) {
8215 ret = ufshcd_runtime_resume(hba);
8216 if (ret)
8217 goto out;
8218 }
8219
8220 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
8221out:
8222 if (ret)
8223 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
8224 /* allow force shutdown even in case of errors */
8225 return 0;
8226}
8227EXPORT_SYMBOL(ufshcd_shutdown);
8228
8229/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308230 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308231 * data structure memory
Bart Van Assche8aa29f12018-03-01 15:07:20 -08008232 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308233 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308234void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308235{
Avri Altmandf032bf2018-10-07 17:30:35 +03008236 ufs_bsg_remove(hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008237 ufs_sysfs_remove_nodes(hba->dev);
Bart Van Assche69a6c262019-12-09 10:13:09 -08008238 blk_cleanup_queue(hba->tmf_queue);
8239 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08008240 blk_cleanup_queue(hba->cmd_queue);
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05308241 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308242 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308243 ufshcd_disable_intr(hba, hba->intr_mask);
Yaniv Gardi596585a2016-03-10 17:37:08 +02008244 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308245
Vivek Gautameebcc192018-08-07 23:17:39 +05308246 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008247 ufshcd_exit_clk_gating(hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08008248 if (ufshcd_is_clkscaling_supported(hba))
8249 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008250 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308251}
8252EXPORT_SYMBOL_GPL(ufshcd_remove);
8253
8254/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02008255 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8256 * @hba: pointer to Host Bus Adapter (HBA)
8257 */
8258void ufshcd_dealloc_host(struct ufs_hba *hba)
8259{
8260 scsi_host_put(hba->host);
8261}
8262EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8263
8264/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008265 * ufshcd_set_dma_mask - Set dma mask based on the controller
8266 * addressing capability
8267 * @hba: per adapter instance
8268 *
8269 * Returns 0 for success, non-zero for failure
8270 */
8271static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8272{
8273 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8274 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8275 return 0;
8276 }
8277 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8278}
8279
8280/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008281 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308282 * @dev: pointer to device handle
8283 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308284 * Returns 0 on success, non-zero value on failure
8285 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008286int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308287{
8288 struct Scsi_Host *host;
8289 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008290 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308291
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308292 if (!dev) {
8293 dev_err(dev,
8294 "Invalid memory reference for dev is NULL\n");
8295 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308296 goto out_error;
8297 }
8298
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308299 host = scsi_host_alloc(&ufshcd_driver_template,
8300 sizeof(struct ufs_hba));
8301 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308302 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308303 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308304 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308305 }
8306 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308307 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308308 hba->dev = dev;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008309 *hba_handle = hba;
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05308310 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008311
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03008312 INIT_LIST_HEAD(&hba->clk_list_head);
8313
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008314out_error:
8315 return err;
8316}
8317EXPORT_SYMBOL(ufshcd_alloc_host);
8318
Bart Van Assche69a6c262019-12-09 10:13:09 -08008319/* This function exists because blk_mq_alloc_tag_set() requires this. */
8320static blk_status_t ufshcd_queue_tmf(struct blk_mq_hw_ctx *hctx,
8321 const struct blk_mq_queue_data *qd)
8322{
8323 WARN_ON_ONCE(true);
8324 return BLK_STS_NOTSUPP;
8325}
8326
8327static const struct blk_mq_ops ufshcd_tmf_ops = {
8328 .queue_rq = ufshcd_queue_tmf,
8329};
8330
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008331/**
8332 * ufshcd_init - Driver initialization routine
8333 * @hba: per-adapter instance
8334 * @mmio_base: base register address
8335 * @irq: Interrupt line of device
8336 * Returns 0 on success, non-zero value on failure
8337 */
8338int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
8339{
8340 int err;
8341 struct Scsi_Host *host = hba->host;
8342 struct device *dev = hba->dev;
8343
8344 if (!mmio_base) {
8345 dev_err(hba->dev,
8346 "Invalid memory reference for mmio_base is NULL\n");
8347 err = -ENODEV;
8348 goto out_error;
8349 }
8350
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308351 hba->mmio_base = mmio_base;
8352 hba->irq = irq;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308353
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008354 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008355 if (err)
8356 goto out_error;
8357
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308358 /* Read capabilities registers */
8359 ufshcd_hba_capabilities(hba);
8360
8361 /* Get UFS version supported by the controller */
8362 hba->ufs_version = ufshcd_get_ufs_version(hba);
8363
Yaniv Gardic01848c2016-12-05 19:25:02 -08008364 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
8365 (hba->ufs_version != UFSHCI_VERSION_11) &&
8366 (hba->ufs_version != UFSHCI_VERSION_20) &&
8367 (hba->ufs_version != UFSHCI_VERSION_21))
8368 dev_err(hba->dev, "invalid UFS version 0x%x\n",
8369 hba->ufs_version);
8370
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308371 /* Get Interrupt bit mask per version */
8372 hba->intr_mask = ufshcd_get_intr_mask(hba);
8373
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008374 err = ufshcd_set_dma_mask(hba);
8375 if (err) {
8376 dev_err(hba->dev, "set dma mask failed\n");
8377 goto out_disable;
8378 }
8379
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308380 /* Allocate memory for host memory space */
8381 err = ufshcd_memory_alloc(hba);
8382 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308383 dev_err(hba->dev, "Memory allocation failed\n");
8384 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308385 }
8386
8387 /* Configure LRB */
8388 ufshcd_host_memory_configure(hba);
8389
8390 host->can_queue = hba->nutrs;
8391 host->cmd_per_lun = hba->nutrs;
8392 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03008393 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308394 host->max_channel = UFSHCD_MAX_CHANNEL;
8395 host->unique_id = host->host_no;
Avri Altmana851b2b2018-10-07 17:30:34 +03008396 host->max_cmd_len = UFS_CDB_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308397
Dolev Raviv7eb584d2014-09-25 15:32:31 +03008398 hba->max_pwr_info.is_valid = false;
8399
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308400 /* Initialize work queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05308401 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308402 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308403
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308404 /* Initialize UIC command mutex */
8405 mutex_init(&hba->uic_cmd_mutex);
8406
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308407 /* Initialize mutex for device management commands */
8408 mutex_init(&hba->dev_cmd.lock);
8409
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08008410 init_rwsem(&hba->clk_scaling_lock);
8411
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008412 ufshcd_init_clk_gating(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02008413
Vivek Gautameebcc192018-08-07 23:17:39 +05308414 ufshcd_init_clk_scaling(hba);
8415
Yaniv Gardi199ef132016-03-10 17:37:06 +02008416 /*
8417 * In order to avoid any spurious interrupt immediately after
8418 * registering UFS controller interrupt handler, clear any pending UFS
8419 * interrupt status and disable all the UFS interrupts.
8420 */
8421 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
8422 REG_INTERRUPT_STATUS);
8423 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
8424 /*
8425 * Make sure that UFS interrupts are disabled and any pending interrupt
8426 * status is cleared before registering UFS interrupt handler.
8427 */
8428 mb();
8429
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308430 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09008431 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308432 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308433 dev_err(hba->dev, "request irq failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008434 goto exit_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008435 } else {
8436 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308437 }
8438
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308439 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308440 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308441 dev_err(hba->dev, "scsi_add_host failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008442 goto exit_gating;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308443 }
8444
Bart Van Assche7252a362019-12-09 10:13:08 -08008445 hba->cmd_queue = blk_mq_init_queue(&hba->host->tag_set);
8446 if (IS_ERR(hba->cmd_queue)) {
8447 err = PTR_ERR(hba->cmd_queue);
8448 goto out_remove_scsi_host;
8449 }
8450
Bart Van Assche69a6c262019-12-09 10:13:09 -08008451 hba->tmf_tag_set = (struct blk_mq_tag_set) {
8452 .nr_hw_queues = 1,
8453 .queue_depth = hba->nutmrs,
8454 .ops = &ufshcd_tmf_ops,
8455 .flags = BLK_MQ_F_NO_SCHED,
8456 };
8457 err = blk_mq_alloc_tag_set(&hba->tmf_tag_set);
8458 if (err < 0)
8459 goto free_cmd_queue;
8460 hba->tmf_queue = blk_mq_init_queue(&hba->tmf_tag_set);
8461 if (IS_ERR(hba->tmf_queue)) {
8462 err = PTR_ERR(hba->tmf_queue);
8463 goto free_tmf_tag_set;
8464 }
8465
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07008466 /* Reset the attached device */
8467 ufshcd_vops_device_reset(hba);
8468
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308469 /* Host controller enable */
8470 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308471 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308472 dev_err(hba->dev, "Host controller enable failed\n");
Dolev Raviv66cc8202016-12-22 18:39:42 -08008473 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08008474 ufshcd_print_host_state(hba);
Bart Van Assche69a6c262019-12-09 10:13:09 -08008475 goto free_tmf_queue;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308476 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308477
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -08008478 /*
8479 * Set the default power management level for runtime and system PM.
8480 * Default power saving mode is to keep UFS link in Hibern8 state
8481 * and UFS device in sleep state.
8482 */
8483 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8484 UFS_SLEEP_PWR_MODE,
8485 UIC_LINK_HIBERN8_STATE);
8486 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8487 UFS_SLEEP_PWR_MODE,
8488 UIC_LINK_HIBERN8_STATE);
8489
Adrian Hunterad448372018-03-20 15:07:38 +02008490 /* Set the default auto-hiberate idle timer value to 150 ms */
Stanley Chuf571b372019-05-21 14:44:53 +08008491 if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
Adrian Hunterad448372018-03-20 15:07:38 +02008492 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8493 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8494 }
8495
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05308496 /* Hold auto suspend until async scan completes */
8497 pm_runtime_get_sync(dev);
Subhash Jadavani38135532018-05-03 16:37:18 +05308498 atomic_set(&hba->scsi_block_reqs_cnt, 0);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008499 /*
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008500 * We are assuming that device wasn't put in sleep/power-down
8501 * state exclusively during the boot stage before kernel.
8502 * This assumption helps avoid doing link startup twice during
8503 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008504 */
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008505 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008506
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308507 async_schedule(ufshcd_async_scan, hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008508 ufs_sysfs_add_nodes(hba->dev);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308509
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308510 return 0;
8511
Bart Van Assche69a6c262019-12-09 10:13:09 -08008512free_tmf_queue:
8513 blk_cleanup_queue(hba->tmf_queue);
8514free_tmf_tag_set:
8515 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08008516free_cmd_queue:
8517 blk_cleanup_queue(hba->cmd_queue);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308518out_remove_scsi_host:
8519 scsi_remove_host(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008520exit_gating:
Vivek Gautameebcc192018-08-07 23:17:39 +05308521 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008522 ufshcd_exit_clk_gating(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308523out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008524 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008525 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308526out_error:
8527 return err;
8528}
8529EXPORT_SYMBOL_GPL(ufshcd_init);
8530
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308531MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8532MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05308533MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308534MODULE_LICENSE("GPL");
8535MODULE_VERSION(UFSHCD_DRIVER_VERSION);