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Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05302 * Universal Flash Storage Host controller driver Core
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303 *
4 * This code is based on drivers/scsi/ufs/ufshcd.c
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053011 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053016 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053018 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053024 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030035 *
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053038 */
39
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053040#include <linux/async.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030041#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020042#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020043#include <linux/of.h>
Adrian Hunterad448372018-03-20 15:07:38 +020044#include <linux/bitfield.h>
Can Guofb276f72020-03-25 18:09:59 -070045#include <linux/blk-pm.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053046#include "ufshcd.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020047#include "ufs_quirks.h"
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +053048#include "unipro.h"
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +020049#include "ufs-sysfs.h"
Avri Altmandf032bf2018-10-07 17:30:35 +030050#include "ufs_bsg.h"
Asutosh Das3d17b9b2020-04-22 14:41:42 -070051#include <asm/unaligned.h>
52#include <linux/blkdev.h>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053053
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -080054#define CREATE_TRACE_POINTS
55#include <trace/events/ufs.h>
56
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053057#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
58 UTP_TASK_REQ_COMPL |\
59 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053060/* UIC command timeout, unit: ms */
61#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053062
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053063/* NOP OUT retries waiting for NOP IN response */
64#define NOP_OUT_RETRIES 10
65/* Timeout after 30 msecs if NOP OUT hangs without response */
66#define NOP_OUT_TIMEOUT 30 /* msecs */
67
Dolev Raviv68078d52013-07-30 00:35:58 +053068/* Query request retries */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080069#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +053070/* Query request timeout */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080071#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +053072
Sujit Reddy Thummae2933132014-05-26 10:59:12 +053073/* Task management command timeout */
74#define TM_CMD_TIMEOUT 100 /* msecs */
75
Yaniv Gardi64238fb2016-02-01 15:02:43 +020076/* maximum number of retries for a general UIC command */
77#define UFS_UIC_COMMAND_RETRIES 3
78
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030079/* maximum number of link-startup retries */
80#define DME_LINKSTARTUP_RETRIES 3
81
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +020082/* Maximum retries for Hibern8 enter */
83#define UIC_HIBERN8_ENTER_RETRIES 3
84
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030085/* maximum number of reset retries before giving up */
86#define MAX_HOST_RESET_RETRIES 5
87
Dolev Raviv68078d52013-07-30 00:35:58 +053088/* Expose the flag value from utp_upiu_query.value */
89#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
90
Seungwon Jeon7d568652013-08-31 21:40:20 +053091/* Interrupt aggregation default timeout, unit: 40us */
92#define INT_AGGR_DEF_TO 0x02
93
Stanley Chu49615ba2019-09-16 23:56:50 +080094/* default delay of autosuspend: 2000 ms */
95#define RPM_AUTOSUSPEND_DELAY_MS 2000
96
Can Guo09f17792020-02-10 19:40:49 -080097/* Default value of wait time before gating device ref clock */
98#define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */
99
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +0300100#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
101 ({ \
102 int _ret; \
103 if (_on) \
104 _ret = ufshcd_enable_vreg(_dev, _vreg); \
105 else \
106 _ret = ufshcd_disable_vreg(_dev, _vreg); \
107 _ret; \
108 })
109
Tomas Winklerba809172018-06-14 11:14:09 +0300110#define ufshcd_hex_dump(prefix_str, buf, len) do { \
111 size_t __len = (len); \
112 print_hex_dump(KERN_ERR, prefix_str, \
113 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
114 16, 4, buf, __len, false); \
115} while (0)
116
117int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
118 const char *prefix)
119{
Marc Gonzalezd6724752019-01-22 18:29:22 +0100120 u32 *regs;
121 size_t pos;
122
123 if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
124 return -EINVAL;
Tomas Winklerba809172018-06-14 11:14:09 +0300125
Can Guocddaeba2019-11-14 22:09:27 -0800126 regs = kzalloc(len, GFP_ATOMIC);
Tomas Winklerba809172018-06-14 11:14:09 +0300127 if (!regs)
128 return -ENOMEM;
129
Marc Gonzalezd6724752019-01-22 18:29:22 +0100130 for (pos = 0; pos < len; pos += 4)
131 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
132
Tomas Winklerba809172018-06-14 11:14:09 +0300133 ufshcd_hex_dump(prefix, regs, len);
134 kfree(regs);
135
136 return 0;
137}
138EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800139
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530140enum {
141 UFSHCD_MAX_CHANNEL = 0,
142 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530143 UFSHCD_CMD_PER_LUN = 32,
144 UFSHCD_CAN_QUEUE = 32,
145};
146
147/* UFSHCD states */
148enum {
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530149 UFSHCD_STATE_RESET,
150 UFSHCD_STATE_ERROR,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530151 UFSHCD_STATE_OPERATIONAL,
Zang Leigang141f8162016-11-16 11:29:37 +0800152 UFSHCD_STATE_EH_SCHEDULED,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530153};
154
155/* UFSHCD error handling flags */
156enum {
157 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530158};
159
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530160/* UFSHCD UIC layer error flags */
161enum {
162 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200163 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
164 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
165 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
166 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
167 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530168};
169
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530170#define ufshcd_set_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300171 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530172#define ufshcd_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300173 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530174#define ufshcd_clear_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300175 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530176
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +0200177struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300178 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
179 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
180 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
181 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
182 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
183 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
184};
185
186static inline enum ufs_dev_pwr_mode
187ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
188{
189 return ufs_pm_lvl_states[lvl].dev_state;
190}
191
192static inline enum uic_link_state
193ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
194{
195 return ufs_pm_lvl_states[lvl].link_state;
196}
197
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -0800198static inline enum ufs_pm_level
199ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
200 enum uic_link_state link_state)
201{
202 enum ufs_pm_level lvl;
203
204 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
205 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
206 (ufs_pm_lvl_states[lvl].link_state == link_state))
207 return lvl;
208 }
209
210 /* if no match found, return the level 0 */
211 return UFS_PM_LVL_0;
212}
213
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800214static struct ufs_dev_fix ufs_fixups[] = {
215 /* UFS cards deviations table */
216 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
217 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800218 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
219 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
220 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800221 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
222 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
223 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
224 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
225 UFS_DEVICE_QUIRK_PA_TACTIVATE),
226 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
227 UFS_DEVICE_QUIRK_PA_TACTIVATE),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800228 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
229 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
Wei Li8e4829c2018-11-08 09:08:29 -0800230 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
231 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800232
233 END_FIX
234};
235
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -0800236static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530237static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530238static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Dolev Ravive7d38252016-12-22 18:40:07 -0800239static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530240static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300241static void ufshcd_hba_exit(struct ufs_hba *hba);
Bean Huo1b9e2142020-01-20 14:08:15 +0100242static int ufshcd_probe_hba(struct ufs_hba *hba, bool async);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300243static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
244 bool skip_ref_clk);
245static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300246static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300247static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300248static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800249static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
250static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800251static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800252static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300253static irqreturn_t ufshcd_intr(int irq, void *__hba);
Yaniv Gardi874237f2015-05-17 18:55:03 +0300254static int ufshcd_change_power_mode(struct ufs_hba *hba,
255 struct ufs_pa_layer_attr *pwr_mode);
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700256static int ufshcd_wb_buf_flush_enable(struct ufs_hba *hba);
257static int ufshcd_wb_buf_flush_disable(struct ufs_hba *hba);
258static int ufshcd_wb_ctrl(struct ufs_hba *hba, bool enable);
259static int ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set);
260static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable);
261
Yaniv Gardi14497322016-02-01 15:02:39 +0200262static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
263{
264 return tag >= 0 && tag < hba->nutrs;
265}
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300266
Can Guo5231d382019-12-05 02:14:46 +0000267static inline void ufshcd_enable_irq(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300268{
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300269 if (!hba->is_irq_enabled) {
Can Guo5231d382019-12-05 02:14:46 +0000270 enable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300271 hba->is_irq_enabled = true;
272 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300273}
274
275static inline void ufshcd_disable_irq(struct ufs_hba *hba)
276{
277 if (hba->is_irq_enabled) {
Can Guo5231d382019-12-05 02:14:46 +0000278 disable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300279 hba->is_irq_enabled = false;
280 }
281}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530282
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700283static inline void ufshcd_wb_config(struct ufs_hba *hba)
284{
285 int ret;
286
Stanley Chu79e35202020-05-08 16:01:15 +0800287 if (!ufshcd_is_wb_allowed(hba))
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700288 return;
289
290 ret = ufshcd_wb_ctrl(hba, true);
291 if (ret)
292 dev_err(hba->dev, "%s: Enable WB failed: %d\n", __func__, ret);
293 else
294 dev_info(hba->dev, "%s: Write Booster Configured\n", __func__);
295 ret = ufshcd_wb_toggle_flush_during_h8(hba, true);
296 if (ret)
297 dev_err(hba->dev, "%s: En WB flush during H8: failed: %d\n",
298 __func__, ret);
299 ufshcd_wb_toggle_flush(hba, true);
300}
301
Subhash Jadavani38135532018-05-03 16:37:18 +0530302static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
303{
304 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
305 scsi_unblock_requests(hba->host);
306}
307
308static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
309{
310 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
311 scsi_block_requests(hba->host);
312}
313
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300314static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
315 const char *str)
316{
317 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
318
319 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
320}
321
322static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
323 const char *str)
324{
325 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
326
327 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
328}
329
330static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
331 const char *str)
332{
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300333 int off = (int)tag - hba->nutrs;
Christoph Hellwig391e3882018-10-07 17:30:32 +0300334 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300335
Christoph Hellwig391e3882018-10-07 17:30:32 +0300336 trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
337 &descp->input_param1);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300338}
339
Lee Susman1a07f2d2016-12-22 18:42:03 -0800340static void ufshcd_add_command_trace(struct ufs_hba *hba,
341 unsigned int tag, const char *str)
342{
343 sector_t lba = -1;
344 u8 opcode = 0;
345 u32 intr, doorbell;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300346 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800347 struct scsi_cmnd *cmd = lrbp->cmd;
Lee Susman1a07f2d2016-12-22 18:42:03 -0800348 int transfer_len = -1;
349
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300350 if (!trace_ufshcd_command_enabled()) {
351 /* trace UPIU W/O tracing command */
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800352 if (cmd)
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300353 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800354 return;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300355 }
Lee Susman1a07f2d2016-12-22 18:42:03 -0800356
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800357 if (cmd) { /* data phase exists */
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300358 /* trace UPIU also */
359 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800360 opcode = cmd->cmnd[0];
Lee Susman1a07f2d2016-12-22 18:42:03 -0800361 if ((opcode == READ_10) || (opcode == WRITE_10)) {
362 /*
363 * Currently we only fully trace read(10) and write(10)
364 * commands
365 */
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800366 if (cmd->request && cmd->request->bio)
367 lba = cmd->request->bio->bi_iter.bi_sector;
Lee Susman1a07f2d2016-12-22 18:42:03 -0800368 transfer_len = be32_to_cpu(
369 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
370 }
371 }
372
373 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
374 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
375 trace_ufshcd_command(dev_name(hba->dev), str, tag,
376 doorbell, transfer_len, intr, lba, opcode);
377}
378
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800379static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
380{
381 struct ufs_clk_info *clki;
382 struct list_head *head = &hba->clk_list_head;
383
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300384 if (list_empty(head))
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800385 return;
386
387 list_for_each_entry(clki, head, list) {
388 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
389 clki->max_freq)
390 dev_err(hba->dev, "clk: %s, rate: %u\n",
391 clki->name, clki->curr_freq);
392 }
393}
394
Stanley Chu48d5b972019-07-10 21:38:18 +0800395static void ufshcd_print_err_hist(struct ufs_hba *hba,
396 struct ufs_err_reg_hist *err_hist,
397 char *err_name)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800398{
399 int i;
Stanley Chu27752642019-01-28 22:04:26 +0800400 bool found = false;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800401
Stanley Chu48d5b972019-07-10 21:38:18 +0800402 for (i = 0; i < UFS_ERR_REG_HIST_LENGTH; i++) {
403 int p = (i + err_hist->pos) % UFS_ERR_REG_HIST_LENGTH;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800404
Stanley Chu645728a2020-01-04 22:26:06 +0800405 if (err_hist->tstamp[p] == 0)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800406 continue;
Stanley Chuc5397f12019-07-10 21:38:20 +0800407 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800408 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
Stanley Chu27752642019-01-28 22:04:26 +0800409 found = true;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800410 }
Stanley Chu27752642019-01-28 22:04:26 +0800411
412 if (!found)
Stanley Chufd1fb4d2020-01-04 22:26:08 +0800413 dev_err(hba->dev, "No record of %s\n", err_name);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800414}
415
Dolev Raviv66cc8202016-12-22 18:39:42 -0800416static void ufshcd_print_host_regs(struct ufs_hba *hba)
417{
Tomas Winklerba809172018-06-14 11:14:09 +0300418 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
Dolev Raviv66cc8202016-12-22 18:39:42 -0800419 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
420 hba->ufs_version, hba->capabilities);
421 dev_err(hba->dev,
422 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
423 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800424 dev_err(hba->dev,
425 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
426 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
427 hba->ufs_stats.hibern8_exit_cnt);
428
Stanley Chu48d5b972019-07-10 21:38:18 +0800429 ufshcd_print_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
430 ufshcd_print_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
431 ufshcd_print_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
432 ufshcd_print_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
433 ufshcd_print_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
Stanley Chud3c615b2019-07-10 21:38:19 +0800434 ufshcd_print_err_hist(hba, &hba->ufs_stats.auto_hibern8_err,
435 "auto_hibern8_err");
Stanley Chu8808b4e2019-07-10 21:38:21 +0800436 ufshcd_print_err_hist(hba, &hba->ufs_stats.fatal_err, "fatal_err");
437 ufshcd_print_err_hist(hba, &hba->ufs_stats.link_startup_err,
438 "link_startup_fail");
439 ufshcd_print_err_hist(hba, &hba->ufs_stats.resume_err, "resume_fail");
440 ufshcd_print_err_hist(hba, &hba->ufs_stats.suspend_err,
441 "suspend_fail");
442 ufshcd_print_err_hist(hba, &hba->ufs_stats.dev_reset, "dev_reset");
443 ufshcd_print_err_hist(hba, &hba->ufs_stats.host_reset, "host_reset");
444 ufshcd_print_err_hist(hba, &hba->ufs_stats.task_abort, "task_abort");
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800445
446 ufshcd_print_clk_freqs(hba);
447
Stanley Chu7c486d912019-12-24 21:01:06 +0800448 ufshcd_vops_dbg_register_dump(hba);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800449}
450
451static
452void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
453{
454 struct ufshcd_lrb *lrbp;
Gilad Broner7fabb772017-02-03 16:56:50 -0800455 int prdt_length;
Dolev Raviv66cc8202016-12-22 18:39:42 -0800456 int tag;
457
458 for_each_set_bit(tag, &bitmap, hba->nutrs) {
459 lrbp = &hba->lrb[tag];
460
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800461 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
462 tag, ktime_to_us(lrbp->issue_time_stamp));
Zang Leigang09017182017-09-27 10:06:06 +0800463 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
464 tag, ktime_to_us(lrbp->compl_time_stamp));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800465 dev_err(hba->dev,
466 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
467 tag, (u64)lrbp->utrd_dma_addr);
468
Dolev Raviv66cc8202016-12-22 18:39:42 -0800469 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
470 sizeof(struct utp_transfer_req_desc));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800471 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
472 (u64)lrbp->ucd_req_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800473 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
474 sizeof(struct utp_upiu_req));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800475 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
476 (u64)lrbp->ucd_rsp_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800477 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
478 sizeof(struct utp_upiu_rsp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800479
Gilad Broner7fabb772017-02-03 16:56:50 -0800480 prdt_length = le16_to_cpu(
481 lrbp->utr_descriptor_ptr->prd_table_length);
482 dev_err(hba->dev,
483 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
484 tag, prdt_length,
485 (u64)lrbp->ucd_prdt_dma_addr);
486
487 if (pr_prdt)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800488 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
Gilad Broner7fabb772017-02-03 16:56:50 -0800489 sizeof(struct ufshcd_sg_entry) * prdt_length);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800490 }
491}
492
493static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
494{
Dolev Raviv66cc8202016-12-22 18:39:42 -0800495 int tag;
496
497 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
Christoph Hellwig391e3882018-10-07 17:30:32 +0300498 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
499
Dolev Raviv66cc8202016-12-22 18:39:42 -0800500 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
Christoph Hellwig391e3882018-10-07 17:30:32 +0300501 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800502 }
503}
504
Gilad Broner6ba65582017-02-03 16:57:28 -0800505static void ufshcd_print_host_state(struct ufs_hba *hba)
506{
507 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
Bart Van Assche7252a362019-12-09 10:13:08 -0800508 dev_err(hba->dev, "outstanding reqs=0x%lx tasks=0x%lx\n",
509 hba->outstanding_reqs, hba->outstanding_tasks);
Gilad Broner6ba65582017-02-03 16:57:28 -0800510 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
511 hba->saved_err, hba->saved_uic_err);
512 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
513 hba->curr_dev_pwr_mode, hba->uic_link_state);
514 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
515 hba->pm_op_in_progress, hba->is_sys_suspended);
516 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
517 hba->auto_bkops_enabled, hba->host->host_self_blocked);
518 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
519 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
520 hba->eh_flags, hba->req_abort_count);
521 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
522 hba->capabilities, hba->caps);
523 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
524 hba->dev_quirks);
525}
526
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800527/**
528 * ufshcd_print_pwr_info - print power params as saved in hba
529 * power info
530 * @hba: per-adapter instance
531 */
532static void ufshcd_print_pwr_info(struct ufs_hba *hba)
533{
534 static const char * const names[] = {
535 "INVALID MODE",
536 "FAST MODE",
537 "SLOW_MODE",
538 "INVALID MODE",
539 "FASTAUTO_MODE",
540 "SLOWAUTO_MODE",
541 "INVALID MODE",
542 };
543
544 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
545 __func__,
546 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
547 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
548 names[hba->pwr_info.pwr_rx],
549 names[hba->pwr_info.pwr_tx],
550 hba->pwr_info.hs_rate);
551}
552
Stanley Chu5c955c12020-03-18 18:40:12 +0800553void ufshcd_delay_us(unsigned long us, unsigned long tolerance)
554{
555 if (!us)
556 return;
557
558 if (us < 10)
559 udelay(us);
560 else
561 usleep_range(us, us + tolerance);
562}
563EXPORT_SYMBOL_GPL(ufshcd_delay_us);
564
Bart Van Assche5cac1092020-05-07 15:27:50 -0700565/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530566 * ufshcd_wait_for_register - wait for register value to change
Bart Van Assche5cac1092020-05-07 15:27:50 -0700567 * @hba: per-adapter interface
568 * @reg: mmio register offset
569 * @mask: mask to apply to the read register value
570 * @val: value to wait for
571 * @interval_us: polling interval in microseconds
572 * @timeout_ms: timeout in milliseconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530573 *
Bart Van Assche5cac1092020-05-07 15:27:50 -0700574 * Return:
575 * -ETIMEDOUT on error, zero on success.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530576 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200577int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
578 u32 val, unsigned long interval_us,
Bart Van Assche5cac1092020-05-07 15:27:50 -0700579 unsigned long timeout_ms)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530580{
581 int err = 0;
582 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
583
584 /* ignore bits that we don't intend to wait on */
585 val = val & mask;
586
587 while ((ufshcd_readl(hba, reg) & mask) != val) {
Bart Van Assche5cac1092020-05-07 15:27:50 -0700588 usleep_range(interval_us, interval_us + 50);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530589 if (time_after(jiffies, timeout)) {
590 if ((ufshcd_readl(hba, reg) & mask) != val)
591 err = -ETIMEDOUT;
592 break;
593 }
594 }
595
596 return err;
597}
598
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530599/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530600 * ufshcd_get_intr_mask - Get the interrupt bit mask
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800601 * @hba: Pointer to adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530602 *
603 * Returns interrupt bit mask per version
604 */
605static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
606{
Yaniv Gardic01848c2016-12-05 19:25:02 -0800607 u32 intr_mask = 0;
608
609 switch (hba->ufs_version) {
610 case UFSHCI_VERSION_10:
611 intr_mask = INTERRUPT_MASK_ALL_VER_10;
612 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800613 case UFSHCI_VERSION_11:
614 case UFSHCI_VERSION_20:
615 intr_mask = INTERRUPT_MASK_ALL_VER_11;
616 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800617 case UFSHCI_VERSION_21:
618 default:
619 intr_mask = INTERRUPT_MASK_ALL_VER_21;
Tomohiro Kusumi031d1e02017-03-23 12:49:04 +0200620 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800621 }
622
623 return intr_mask;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530624}
625
626/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530627 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800628 * @hba: Pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530629 *
630 * Returns UFSHCI version supported by the controller
631 */
632static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
633{
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200634 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
635 return ufshcd_vops_get_ufs_hci_version(hba);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300636
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530637 return ufshcd_readl(hba, REG_UFS_VERSION);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530638}
639
640/**
641 * ufshcd_is_device_present - Check if any device connected to
642 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300643 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530644 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300645 * Returns true if device present, false if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530646 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300647static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530648{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300649 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300650 DEVICE_PRESENT) ? true : false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530651}
652
653/**
654 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800655 * @lrbp: pointer to local command reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530656 *
657 * This function is used to get the OCS field from UTRD
658 * Returns the OCS field in the UTRD
659 */
660static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
661{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530662 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530663}
664
665/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530666 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
667 * @hba: per adapter instance
668 * @pos: position of the bit to be cleared
669 */
670static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
671{
Christoph Hellwig492001992020-02-21 06:08:11 -0800672 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
Alim Akhtar1399c5b2018-05-06 15:44:15 +0530673}
674
675/**
676 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
677 * @hba: per adapter instance
678 * @pos: position of the bit to be cleared
679 */
680static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
681{
Christoph Hellwig492001992020-02-21 06:08:11 -0800682 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530683}
684
685/**
Yaniv Gardia48353f2016-02-01 15:02:40 +0200686 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
687 * @hba: per adapter instance
688 * @tag: position of the bit to be cleared
689 */
690static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
691{
692 __clear_bit(tag, &hba->outstanding_reqs);
693}
694
695/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530696 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
697 * @reg: Register value of host controller status
698 *
699 * Returns integer, 0 on Success and positive value if failed
700 */
701static inline int ufshcd_get_lists_status(u32 reg)
702{
Tomohiro Kusumi6cf16112017-04-26 20:28:58 +0300703 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530704}
705
706/**
707 * ufshcd_get_uic_cmd_result - Get the UIC command result
708 * @hba: Pointer to adapter instance
709 *
710 * This function gets the result of UIC command completion
711 * Returns 0 on success, non zero value on error
712 */
713static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
714{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530715 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530716 MASK_UIC_COMMAND_RESULT;
717}
718
719/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530720 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
721 * @hba: Pointer to adapter instance
722 *
723 * This function gets UIC command argument3
724 * Returns 0 on success, non zero value on error
725 */
726static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
727{
728 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
729}
730
731/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530732 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530733 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530734 */
735static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530736ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530737{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530738 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530739}
740
741/**
742 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
743 * @ucd_rsp_ptr: pointer to response UPIU
744 *
745 * This function gets the response status and scsi_status from response UPIU
746 * Returns the response result code.
747 */
748static inline int
749ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
750{
751 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
752}
753
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530754/*
755 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
756 * from response UPIU
757 * @ucd_rsp_ptr: pointer to response UPIU
758 *
759 * Return the data segment length.
760 */
761static inline unsigned int
762ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
763{
764 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
765 MASK_RSP_UPIU_DATA_SEG_LEN;
766}
767
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530768/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530769 * ufshcd_is_exception_event - Check if the device raised an exception event
770 * @ucd_rsp_ptr: pointer to response UPIU
771 *
772 * The function checks if the device raised an exception event indicated in
773 * the Device Information field of response UPIU.
774 *
775 * Returns true if exception is raised, false otherwise.
776 */
777static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
778{
779 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
780 MASK_RSP_EXCEPTION_EVENT ? true : false;
781}
782
783/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530784 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530785 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530786 */
787static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530788ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530789{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530790 ufshcd_writel(hba, INT_AGGR_ENABLE |
791 INT_AGGR_COUNTER_AND_TIMER_RESET,
792 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
793}
794
795/**
796 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
797 * @hba: per adapter instance
798 * @cnt: Interrupt aggregation counter threshold
799 * @tmout: Interrupt aggregation timeout value
800 */
801static inline void
802ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
803{
804 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
805 INT_AGGR_COUNTER_THLD_VAL(cnt) |
806 INT_AGGR_TIMEOUT_VAL(tmout),
807 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530808}
809
810/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300811 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
812 * @hba: per adapter instance
813 */
814static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
815{
816 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
817}
818
819/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530820 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
821 * When run-stop registers are set to 1, it indicates the
822 * host controller that it can process the requests
823 * @hba: per adapter instance
824 */
825static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
826{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530827 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
828 REG_UTP_TASK_REQ_LIST_RUN_STOP);
829 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
830 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530831}
832
833/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530834 * ufshcd_hba_start - Start controller initialization sequence
835 * @hba: per adapter instance
836 */
837static inline void ufshcd_hba_start(struct ufs_hba *hba)
838{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530839 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530840}
841
842/**
843 * ufshcd_is_hba_active - Get controller state
844 * @hba: per adapter instance
845 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300846 * Returns false if controller is active, true otherwise
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530847 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300848static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530849{
Tomohiro Kusumi4a8eec22017-03-28 16:49:25 +0300850 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
851 ? false : true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530852}
853
Yaniv Gardi37113102016-03-10 17:37:16 +0200854u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
855{
856 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
857 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
858 (hba->ufs_version == UFSHCI_VERSION_11))
859 return UFS_UNIPRO_VER_1_41;
860 else
861 return UFS_UNIPRO_VER_1_6;
862}
863EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
864
865static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
866{
867 /*
868 * If both host and device support UniPro ver1.6 or later, PA layer
869 * parameters tuning happens during link startup itself.
870 *
871 * We can manually tune PA layer parameters if either host or device
872 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
873 * logic simple, we will only do manual tuning if local unipro version
874 * doesn't support ver1.6 or later.
875 */
876 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
877 return true;
878 else
879 return false;
880}
881
Subhash Jadavani394b9492020-03-26 02:25:40 -0700882/**
883 * ufshcd_set_clk_freq - set UFS controller clock frequencies
884 * @hba: per adapter instance
885 * @scale_up: If True, set max possible frequency othewise set low frequency
886 *
887 * Returns 0 if successful
888 * Returns < 0 for any other errors
889 */
890static int ufshcd_set_clk_freq(struct ufs_hba *hba, bool scale_up)
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800891{
892 int ret = 0;
893 struct ufs_clk_info *clki;
894 struct list_head *head = &hba->clk_list_head;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800895
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300896 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800897 goto out;
898
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800899 list_for_each_entry(clki, head, list) {
900 if (!IS_ERR_OR_NULL(clki->clk)) {
901 if (scale_up && clki->max_freq) {
902 if (clki->curr_freq == clki->max_freq)
903 continue;
904
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800905 ret = clk_set_rate(clki->clk, clki->max_freq);
906 if (ret) {
907 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
908 __func__, clki->name,
909 clki->max_freq, ret);
910 break;
911 }
912 trace_ufshcd_clk_scaling(dev_name(hba->dev),
913 "scaled up", clki->name,
914 clki->curr_freq,
915 clki->max_freq);
916
917 clki->curr_freq = clki->max_freq;
918
919 } else if (!scale_up && clki->min_freq) {
920 if (clki->curr_freq == clki->min_freq)
921 continue;
922
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800923 ret = clk_set_rate(clki->clk, clki->min_freq);
924 if (ret) {
925 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
926 __func__, clki->name,
927 clki->min_freq, ret);
928 break;
929 }
930 trace_ufshcd_clk_scaling(dev_name(hba->dev),
931 "scaled down", clki->name,
932 clki->curr_freq,
933 clki->min_freq);
934 clki->curr_freq = clki->min_freq;
935 }
936 }
937 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
938 clki->name, clk_get_rate(clki->clk));
939 }
940
Subhash Jadavani394b9492020-03-26 02:25:40 -0700941out:
942 return ret;
943}
944
945/**
946 * ufshcd_scale_clks - scale up or scale down UFS controller clocks
947 * @hba: per adapter instance
948 * @scale_up: True if scaling up and false if scaling down
949 *
950 * Returns 0 if successful
951 * Returns < 0 for any other errors
952 */
953static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
954{
955 int ret = 0;
956 ktime_t start = ktime_get();
957
958 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
959 if (ret)
960 goto out;
961
962 ret = ufshcd_set_clk_freq(hba, scale_up);
963 if (ret)
964 goto out;
965
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800966 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
Subhash Jadavani394b9492020-03-26 02:25:40 -0700967 if (ret)
968 ufshcd_set_clk_freq(hba, !scale_up);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800969
970out:
Subhash Jadavani394b9492020-03-26 02:25:40 -0700971 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800972 (scale_up ? "up" : "down"),
973 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
974 return ret;
975}
976
977/**
978 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
979 * @hba: per adapter instance
980 * @scale_up: True if scaling up and false if scaling down
981 *
982 * Returns true if scaling is required, false otherwise.
983 */
984static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
985 bool scale_up)
986{
987 struct ufs_clk_info *clki;
988 struct list_head *head = &hba->clk_list_head;
989
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300990 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800991 return false;
992
993 list_for_each_entry(clki, head, list) {
994 if (!IS_ERR_OR_NULL(clki->clk)) {
995 if (scale_up && clki->max_freq) {
996 if (clki->curr_freq == clki->max_freq)
997 continue;
998 return true;
999 } else if (!scale_up && clki->min_freq) {
1000 if (clki->curr_freq == clki->min_freq)
1001 continue;
1002 return true;
1003 }
1004 }
1005 }
1006
1007 return false;
1008}
1009
1010static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
1011 u64 wait_timeout_us)
1012{
1013 unsigned long flags;
1014 int ret = 0;
1015 u32 tm_doorbell;
1016 u32 tr_doorbell;
1017 bool timeout = false, do_last_check = false;
1018 ktime_t start;
1019
1020 ufshcd_hold(hba, false);
1021 spin_lock_irqsave(hba->host->host_lock, flags);
1022 /*
1023 * Wait for all the outstanding tasks/transfer requests.
1024 * Verify by checking the doorbell registers are clear.
1025 */
1026 start = ktime_get();
1027 do {
1028 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1029 ret = -EBUSY;
1030 goto out;
1031 }
1032
1033 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1034 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1035 if (!tm_doorbell && !tr_doorbell) {
1036 timeout = false;
1037 break;
1038 } else if (do_last_check) {
1039 break;
1040 }
1041
1042 spin_unlock_irqrestore(hba->host->host_lock, flags);
1043 schedule();
1044 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1045 wait_timeout_us) {
1046 timeout = true;
1047 /*
1048 * We might have scheduled out for long time so make
1049 * sure to check if doorbells are cleared by this time
1050 * or not.
1051 */
1052 do_last_check = true;
1053 }
1054 spin_lock_irqsave(hba->host->host_lock, flags);
1055 } while (tm_doorbell || tr_doorbell);
1056
1057 if (timeout) {
1058 dev_err(hba->dev,
1059 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1060 __func__, tm_doorbell, tr_doorbell);
1061 ret = -EBUSY;
1062 }
1063out:
1064 spin_unlock_irqrestore(hba->host->host_lock, flags);
1065 ufshcd_release(hba);
1066 return ret;
1067}
1068
1069/**
1070 * ufshcd_scale_gear - scale up/down UFS gear
1071 * @hba: per adapter instance
1072 * @scale_up: True for scaling up gear and false for scaling down
1073 *
1074 * Returns 0 for success,
1075 * Returns -EBUSY if scaling can't happen at this time
1076 * Returns non-zero for any other errors
1077 */
1078static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1079{
1080 #define UFS_MIN_GEAR_TO_SCALE_DOWN UFS_HS_G1
1081 int ret = 0;
1082 struct ufs_pa_layer_attr new_pwr_info;
1083
1084 if (scale_up) {
1085 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1086 sizeof(struct ufs_pa_layer_attr));
1087 } else {
1088 memcpy(&new_pwr_info, &hba->pwr_info,
1089 sizeof(struct ufs_pa_layer_attr));
1090
1091 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1092 || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1093 /* save the current power mode */
1094 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1095 &hba->pwr_info,
1096 sizeof(struct ufs_pa_layer_attr));
1097
1098 /* scale down gear */
1099 new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1100 new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1101 }
1102 }
1103
1104 /* check if the power mode needs to be changed or not? */
Can Guo6a9df812020-02-11 21:38:28 -08001105 ret = ufshcd_config_pwr_mode(hba, &new_pwr_info);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001106 if (ret)
1107 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1108 __func__, ret,
1109 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1110 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1111
1112 return ret;
1113}
1114
1115static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1116{
1117 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1118 int ret = 0;
1119 /*
1120 * make sure that there are no outstanding requests when
1121 * clock scaling is in progress
1122 */
Subhash Jadavani38135532018-05-03 16:37:18 +05301123 ufshcd_scsi_block_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001124 down_write(&hba->clk_scaling_lock);
1125 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1126 ret = -EBUSY;
1127 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301128 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001129 }
1130
1131 return ret;
1132}
1133
1134static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1135{
1136 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301137 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001138}
1139
1140/**
1141 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1142 * @hba: per adapter instance
1143 * @scale_up: True for scaling up and false for scalin down
1144 *
1145 * Returns 0 for success,
1146 * Returns -EBUSY if scaling can't happen at this time
1147 * Returns non-zero for any other errors
1148 */
1149static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1150{
1151 int ret = 0;
1152
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001153 /* let's not get into low power until clock scaling is completed */
1154 ufshcd_hold(hba, false);
1155
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001156 ret = ufshcd_clock_scaling_prepare(hba);
1157 if (ret)
Subhash Jadavani394b9492020-03-26 02:25:40 -07001158 goto out;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001159
1160 /* scale down the gear before scaling down clocks */
1161 if (!scale_up) {
1162 ret = ufshcd_scale_gear(hba, false);
1163 if (ret)
Subhash Jadavani394b9492020-03-26 02:25:40 -07001164 goto out_unprepare;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001165 }
1166
1167 ret = ufshcd_scale_clks(hba, scale_up);
1168 if (ret) {
1169 if (!scale_up)
1170 ufshcd_scale_gear(hba, true);
Subhash Jadavani394b9492020-03-26 02:25:40 -07001171 goto out_unprepare;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001172 }
1173
1174 /* scale up the gear after scaling up clocks */
1175 if (scale_up) {
1176 ret = ufshcd_scale_gear(hba, true);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001177 if (ret) {
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001178 ufshcd_scale_clks(hba, false);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001179 goto out_unprepare;
1180 }
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001181 }
1182
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001183 /* Enable Write Booster if we have scaled up else disable it */
1184 up_write(&hba->clk_scaling_lock);
1185 ufshcd_wb_ctrl(hba, scale_up);
1186 down_write(&hba->clk_scaling_lock);
1187
Subhash Jadavani394b9492020-03-26 02:25:40 -07001188out_unprepare:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001189 ufshcd_clock_scaling_unprepare(hba);
Subhash Jadavani394b9492020-03-26 02:25:40 -07001190out:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001191 ufshcd_release(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001192 return ret;
1193}
1194
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001195static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1196{
1197 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1198 clk_scaling.suspend_work);
1199 unsigned long irq_flags;
1200
1201 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1202 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1203 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1204 return;
1205 }
1206 hba->clk_scaling.is_suspended = true;
1207 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1208
1209 __ufshcd_suspend_clkscaling(hba);
1210}
1211
1212static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1213{
1214 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1215 clk_scaling.resume_work);
1216 unsigned long irq_flags;
1217
1218 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1219 if (!hba->clk_scaling.is_suspended) {
1220 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1221 return;
1222 }
1223 hba->clk_scaling.is_suspended = false;
1224 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1225
1226 devfreq_resume_device(hba->devfreq);
1227}
1228
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001229static int ufshcd_devfreq_target(struct device *dev,
1230 unsigned long *freq, u32 flags)
1231{
1232 int ret = 0;
1233 struct ufs_hba *hba = dev_get_drvdata(dev);
1234 ktime_t start;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001235 bool scale_up, sched_clk_scaling_suspend_work = false;
Bjorn Andersson092b4552018-05-17 23:26:37 -07001236 struct list_head *clk_list = &hba->clk_list_head;
1237 struct ufs_clk_info *clki;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001238 unsigned long irq_flags;
1239
1240 if (!ufshcd_is_clkscaling_supported(hba))
1241 return -EINVAL;
1242
Asutosh Das91831d32020-03-25 11:29:00 -07001243 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1244 /* Override with the closest supported frequency */
1245 *freq = (unsigned long) clk_round_rate(clki->clk, *freq);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001246 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1247 if (ufshcd_eh_in_progress(hba)) {
1248 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1249 return 0;
1250 }
1251
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001252 if (!hba->clk_scaling.active_reqs)
1253 sched_clk_scaling_suspend_work = true;
1254
Bjorn Andersson092b4552018-05-17 23:26:37 -07001255 if (list_empty(clk_list)) {
1256 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1257 goto out;
1258 }
1259
Asutosh Das91831d32020-03-25 11:29:00 -07001260 /* Decide based on the rounded-off frequency and update */
Bjorn Andersson092b4552018-05-17 23:26:37 -07001261 scale_up = (*freq == clki->max_freq) ? true : false;
Asutosh Das91831d32020-03-25 11:29:00 -07001262 if (!scale_up)
1263 *freq = clki->min_freq;
1264 /* Update the frequency */
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001265 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1266 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1267 ret = 0;
1268 goto out; /* no state change required */
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001269 }
1270 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1271
1272 start = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001273 ret = ufshcd_devfreq_scale(hba, scale_up);
1274
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001275 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1276 (scale_up ? "up" : "down"),
1277 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1278
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001279out:
1280 if (sched_clk_scaling_suspend_work)
1281 queue_work(hba->clk_scaling.workq,
1282 &hba->clk_scaling.suspend_work);
1283
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001284 return ret;
1285}
1286
Bart Van Assche7252a362019-12-09 10:13:08 -08001287static bool ufshcd_is_busy(struct request *req, void *priv, bool reserved)
1288{
1289 int *busy = priv;
1290
1291 WARN_ON_ONCE(reserved);
1292 (*busy)++;
1293 return false;
1294}
1295
1296/* Whether or not any tag is in use by a request that is in progress. */
1297static bool ufshcd_any_tag_in_use(struct ufs_hba *hba)
1298{
1299 struct request_queue *q = hba->cmd_queue;
1300 int busy = 0;
1301
1302 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_is_busy, &busy);
1303 return busy;
1304}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001305
1306static int ufshcd_devfreq_get_dev_status(struct device *dev,
1307 struct devfreq_dev_status *stat)
1308{
1309 struct ufs_hba *hba = dev_get_drvdata(dev);
1310 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1311 unsigned long flags;
Asutosh Das91831d32020-03-25 11:29:00 -07001312 struct list_head *clk_list = &hba->clk_list_head;
1313 struct ufs_clk_info *clki;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001314
1315 if (!ufshcd_is_clkscaling_supported(hba))
1316 return -EINVAL;
1317
1318 memset(stat, 0, sizeof(*stat));
1319
1320 spin_lock_irqsave(hba->host->host_lock, flags);
1321 if (!scaling->window_start_t)
1322 goto start_window;
1323
Asutosh Das91831d32020-03-25 11:29:00 -07001324 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1325 /*
1326 * If current frequency is 0, then the ondemand governor considers
1327 * there's no initial frequency set. And it always requests to set
1328 * to max. frequency.
1329 */
1330 stat->current_frequency = clki->curr_freq;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001331 if (scaling->is_busy_started)
1332 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1333 scaling->busy_start_t));
1334
1335 stat->total_time = jiffies_to_usecs((long)jiffies -
1336 (long)scaling->window_start_t);
1337 stat->busy_time = scaling->tot_busy_t;
1338start_window:
1339 scaling->window_start_t = jiffies;
1340 scaling->tot_busy_t = 0;
1341
1342 if (hba->outstanding_reqs) {
1343 scaling->busy_start_t = ktime_get();
1344 scaling->is_busy_started = true;
1345 } else {
1346 scaling->busy_start_t = 0;
1347 scaling->is_busy_started = false;
1348 }
1349 spin_unlock_irqrestore(hba->host->host_lock, flags);
1350 return 0;
1351}
1352
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001353static int ufshcd_devfreq_init(struct ufs_hba *hba)
1354{
Bjorn Andersson092b4552018-05-17 23:26:37 -07001355 struct list_head *clk_list = &hba->clk_list_head;
1356 struct ufs_clk_info *clki;
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001357 struct devfreq *devfreq;
1358 int ret;
1359
Bjorn Andersson092b4552018-05-17 23:26:37 -07001360 /* Skip devfreq if we don't have any clocks in the list */
1361 if (list_empty(clk_list))
1362 return 0;
1363
1364 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1365 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1366 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1367
Stanley Chu90b84912020-05-09 17:37:13 +08001368 ufshcd_vops_config_scaling_param(hba, &hba->vps->devfreq_profile,
1369 &hba->vps->ondemand_data);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001370 devfreq = devfreq_add_device(hba->dev,
Stanley Chu90b84912020-05-09 17:37:13 +08001371 &hba->vps->devfreq_profile,
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001372 DEVFREQ_GOV_SIMPLE_ONDEMAND,
Stanley Chu90b84912020-05-09 17:37:13 +08001373 &hba->vps->ondemand_data);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001374 if (IS_ERR(devfreq)) {
1375 ret = PTR_ERR(devfreq);
1376 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001377
1378 dev_pm_opp_remove(hba->dev, clki->min_freq);
1379 dev_pm_opp_remove(hba->dev, clki->max_freq);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001380 return ret;
1381 }
1382
1383 hba->devfreq = devfreq;
1384
1385 return 0;
1386}
1387
Bjorn Andersson092b4552018-05-17 23:26:37 -07001388static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1389{
1390 struct list_head *clk_list = &hba->clk_list_head;
1391 struct ufs_clk_info *clki;
1392
1393 if (!hba->devfreq)
1394 return;
1395
1396 devfreq_remove_device(hba->devfreq);
1397 hba->devfreq = NULL;
1398
1399 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1400 dev_pm_opp_remove(hba->dev, clki->min_freq);
1401 dev_pm_opp_remove(hba->dev, clki->max_freq);
1402}
1403
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001404static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1405{
1406 unsigned long flags;
1407
1408 devfreq_suspend_device(hba->devfreq);
1409 spin_lock_irqsave(hba->host->host_lock, flags);
1410 hba->clk_scaling.window_start_t = 0;
1411 spin_unlock_irqrestore(hba->host->host_lock, flags);
1412}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001413
Gilad Bronera5082532016-10-17 17:10:00 -07001414static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1415{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001416 unsigned long flags;
1417 bool suspend = false;
1418
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001419 if (!ufshcd_is_clkscaling_supported(hba))
1420 return;
1421
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001422 spin_lock_irqsave(hba->host->host_lock, flags);
1423 if (!hba->clk_scaling.is_suspended) {
1424 suspend = true;
1425 hba->clk_scaling.is_suspended = true;
1426 }
1427 spin_unlock_irqrestore(hba->host->host_lock, flags);
1428
1429 if (suspend)
1430 __ufshcd_suspend_clkscaling(hba);
Gilad Bronera5082532016-10-17 17:10:00 -07001431}
1432
1433static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1434{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001435 unsigned long flags;
1436 bool resume = false;
1437
1438 if (!ufshcd_is_clkscaling_supported(hba))
1439 return;
1440
1441 spin_lock_irqsave(hba->host->host_lock, flags);
1442 if (hba->clk_scaling.is_suspended) {
1443 resume = true;
1444 hba->clk_scaling.is_suspended = false;
1445 }
1446 spin_unlock_irqrestore(hba->host->host_lock, flags);
1447
1448 if (resume)
1449 devfreq_resume_device(hba->devfreq);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001450}
1451
1452static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1453 struct device_attribute *attr, char *buf)
1454{
1455 struct ufs_hba *hba = dev_get_drvdata(dev);
1456
1457 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1458}
1459
1460static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1461 struct device_attribute *attr, const char *buf, size_t count)
1462{
1463 struct ufs_hba *hba = dev_get_drvdata(dev);
1464 u32 value;
1465 int err;
1466
1467 if (kstrtou32(buf, 0, &value))
1468 return -EINVAL;
1469
1470 value = !!value;
1471 if (value == hba->clk_scaling.is_allowed)
1472 goto out;
1473
1474 pm_runtime_get_sync(hba->dev);
1475 ufshcd_hold(hba, false);
1476
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001477 cancel_work_sync(&hba->clk_scaling.suspend_work);
1478 cancel_work_sync(&hba->clk_scaling.resume_work);
1479
1480 hba->clk_scaling.is_allowed = value;
1481
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001482 if (value) {
1483 ufshcd_resume_clkscaling(hba);
1484 } else {
1485 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001486 err = ufshcd_devfreq_scale(hba, true);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001487 if (err)
1488 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1489 __func__, err);
1490 }
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001491
1492 ufshcd_release(hba);
1493 pm_runtime_put_sync(hba->dev);
1494out:
1495 return count;
Gilad Bronera5082532016-10-17 17:10:00 -07001496}
1497
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001498static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1499{
1500 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1501 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1502 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1503 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1504 hba->clk_scaling.enable_attr.attr.mode = 0644;
1505 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1506 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1507}
1508
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001509static void ufshcd_ungate_work(struct work_struct *work)
1510{
1511 int ret;
1512 unsigned long flags;
1513 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1514 clk_gating.ungate_work);
1515
1516 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1517
1518 spin_lock_irqsave(hba->host->host_lock, flags);
1519 if (hba->clk_gating.state == CLKS_ON) {
1520 spin_unlock_irqrestore(hba->host->host_lock, flags);
1521 goto unblock_reqs;
1522 }
1523
1524 spin_unlock_irqrestore(hba->host->host_lock, flags);
1525 ufshcd_setup_clocks(hba, true);
1526
Stanley Chu8b0bbf02019-12-07 20:22:01 +08001527 ufshcd_enable_irq(hba);
1528
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001529 /* Exit from hibern8 */
1530 if (ufshcd_can_hibern8_during_gating(hba)) {
1531 /* Prevent gating in this path */
1532 hba->clk_gating.is_suspended = true;
1533 if (ufshcd_is_link_hibern8(hba)) {
1534 ret = ufshcd_uic_hibern8_exit(hba);
1535 if (ret)
1536 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1537 __func__, ret);
1538 else
1539 ufshcd_set_link_active(hba);
1540 }
1541 hba->clk_gating.is_suspended = false;
1542 }
1543unblock_reqs:
Subhash Jadavani38135532018-05-03 16:37:18 +05301544 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001545}
1546
1547/**
1548 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1549 * Also, exit from hibern8 mode and set the link as active.
1550 * @hba: per adapter instance
1551 * @async: This indicates whether caller should ungate clocks asynchronously.
1552 */
1553int ufshcd_hold(struct ufs_hba *hba, bool async)
1554{
1555 int rc = 0;
1556 unsigned long flags;
1557
1558 if (!ufshcd_is_clkgating_allowed(hba))
1559 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001560 spin_lock_irqsave(hba->host->host_lock, flags);
1561 hba->clk_gating.active_reqs++;
1562
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001563 if (ufshcd_eh_in_progress(hba)) {
1564 spin_unlock_irqrestore(hba->host->host_lock, flags);
1565 return 0;
1566 }
1567
Sahitya Tummala856b3482014-09-25 15:32:34 +03001568start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001569 switch (hba->clk_gating.state) {
1570 case CLKS_ON:
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001571 /*
1572 * Wait for the ungate work to complete if in progress.
1573 * Though the clocks may be in ON state, the link could
1574 * still be in hibner8 state if hibern8 is allowed
1575 * during clock gating.
1576 * Make sure we exit hibern8 state also in addition to
1577 * clocks being ON.
1578 */
1579 if (ufshcd_can_hibern8_during_gating(hba) &&
1580 ufshcd_is_link_hibern8(hba)) {
Can Guoc63d6092020-02-10 19:40:48 -08001581 if (async) {
1582 rc = -EAGAIN;
1583 hba->clk_gating.active_reqs--;
1584 break;
1585 }
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001586 spin_unlock_irqrestore(hba->host->host_lock, flags);
1587 flush_work(&hba->clk_gating.ungate_work);
1588 spin_lock_irqsave(hba->host->host_lock, flags);
1589 goto start;
1590 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001591 break;
1592 case REQ_CLKS_OFF:
1593 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1594 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001595 trace_ufshcd_clk_gating(dev_name(hba->dev),
1596 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001597 break;
1598 }
1599 /*
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +03001600 * If we are here, it means gating work is either done or
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001601 * currently running. Hence, fall through to cancel gating
1602 * work and to enable clocks.
1603 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001604 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001605 case CLKS_OFF:
Subhash Jadavani38135532018-05-03 16:37:18 +05301606 ufshcd_scsi_block_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001607 hba->clk_gating.state = REQ_CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001608 trace_ufshcd_clk_gating(dev_name(hba->dev),
1609 hba->clk_gating.state);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301610 queue_work(hba->clk_gating.clk_gating_workq,
1611 &hba->clk_gating.ungate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001612 /*
1613 * fall through to check if we should wait for this
1614 * work to be done or not.
1615 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001616 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001617 case REQ_CLKS_ON:
1618 if (async) {
1619 rc = -EAGAIN;
1620 hba->clk_gating.active_reqs--;
1621 break;
1622 }
1623
1624 spin_unlock_irqrestore(hba->host->host_lock, flags);
1625 flush_work(&hba->clk_gating.ungate_work);
1626 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001627 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001628 goto start;
1629 default:
1630 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1631 __func__, hba->clk_gating.state);
1632 break;
1633 }
1634 spin_unlock_irqrestore(hba->host->host_lock, flags);
1635out:
1636 return rc;
1637}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001638EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001639
1640static void ufshcd_gate_work(struct work_struct *work)
1641{
1642 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1643 clk_gating.gate_work.work);
1644 unsigned long flags;
1645
1646 spin_lock_irqsave(hba->host->host_lock, flags);
Venkat Gopalakrishnan3f0c06d2016-10-17 17:11:07 -07001647 /*
1648 * In case you are here to cancel this work the gating state
1649 * would be marked as REQ_CLKS_ON. In this case save time by
1650 * skipping the gating work and exit after changing the clock
1651 * state to CLKS_ON.
1652 */
1653 if (hba->clk_gating.is_suspended ||
Asutosh Das18f013742019-11-14 22:09:29 -08001654 (hba->clk_gating.state != REQ_CLKS_OFF)) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001655 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001656 trace_ufshcd_clk_gating(dev_name(hba->dev),
1657 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001658 goto rel_lock;
1659 }
1660
1661 if (hba->clk_gating.active_reqs
1662 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
Bart Van Assche7252a362019-12-09 10:13:08 -08001663 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001664 || hba->active_uic_cmd || hba->uic_async_done)
1665 goto rel_lock;
1666
1667 spin_unlock_irqrestore(hba->host->host_lock, flags);
1668
1669 /* put the link into hibern8 mode before turning off clocks */
1670 if (ufshcd_can_hibern8_during_gating(hba)) {
1671 if (ufshcd_uic_hibern8_enter(hba)) {
1672 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001673 trace_ufshcd_clk_gating(dev_name(hba->dev),
1674 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001675 goto out;
1676 }
1677 ufshcd_set_link_hibern8(hba);
1678 }
1679
Stanley Chu8b0bbf02019-12-07 20:22:01 +08001680 ufshcd_disable_irq(hba);
1681
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001682 if (!ufshcd_is_link_active(hba))
1683 ufshcd_setup_clocks(hba, false);
1684 else
1685 /* If link is active, device ref_clk can't be switched off */
1686 __ufshcd_setup_clocks(hba, false, true);
1687
1688 /*
1689 * In case you are here to cancel this work the gating state
1690 * would be marked as REQ_CLKS_ON. In this case keep the state
1691 * as REQ_CLKS_ON which would anyway imply that clocks are off
1692 * and a request to turn them on is pending. By doing this way,
1693 * we keep the state machine in tact and this would ultimately
1694 * prevent from doing cancel work multiple times when there are
1695 * new requests arriving before the current cancel work is done.
1696 */
1697 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001698 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001699 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001700 trace_ufshcd_clk_gating(dev_name(hba->dev),
1701 hba->clk_gating.state);
1702 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001703rel_lock:
1704 spin_unlock_irqrestore(hba->host->host_lock, flags);
1705out:
1706 return;
1707}
1708
1709/* host lock must be held before calling this variant */
1710static void __ufshcd_release(struct ufs_hba *hba)
1711{
1712 if (!ufshcd_is_clkgating_allowed(hba))
1713 return;
1714
1715 hba->clk_gating.active_reqs--;
1716
1717 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1718 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
Bart Van Assche7252a362019-12-09 10:13:08 -08001719 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001720 || hba->active_uic_cmd || hba->uic_async_done
1721 || ufshcd_eh_in_progress(hba))
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001722 return;
1723
1724 hba->clk_gating.state = REQ_CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001725 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Evan Greenf4bb7702018-10-05 10:27:32 -07001726 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1727 &hba->clk_gating.gate_work,
1728 msecs_to_jiffies(hba->clk_gating.delay_ms));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001729}
1730
1731void ufshcd_release(struct ufs_hba *hba)
1732{
1733 unsigned long flags;
1734
1735 spin_lock_irqsave(hba->host->host_lock, flags);
1736 __ufshcd_release(hba);
1737 spin_unlock_irqrestore(hba->host->host_lock, flags);
1738}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001739EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001740
1741static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1742 struct device_attribute *attr, char *buf)
1743{
1744 struct ufs_hba *hba = dev_get_drvdata(dev);
1745
1746 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1747}
1748
1749static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1750 struct device_attribute *attr, const char *buf, size_t count)
1751{
1752 struct ufs_hba *hba = dev_get_drvdata(dev);
1753 unsigned long flags, value;
1754
1755 if (kstrtoul(buf, 0, &value))
1756 return -EINVAL;
1757
1758 spin_lock_irqsave(hba->host->host_lock, flags);
1759 hba->clk_gating.delay_ms = value;
1760 spin_unlock_irqrestore(hba->host->host_lock, flags);
1761 return count;
1762}
1763
Sahitya Tummalab4274112016-12-22 18:40:39 -08001764static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1765 struct device_attribute *attr, char *buf)
1766{
1767 struct ufs_hba *hba = dev_get_drvdata(dev);
1768
1769 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1770}
1771
1772static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1773 struct device_attribute *attr, const char *buf, size_t count)
1774{
1775 struct ufs_hba *hba = dev_get_drvdata(dev);
1776 unsigned long flags;
1777 u32 value;
1778
1779 if (kstrtou32(buf, 0, &value))
1780 return -EINVAL;
1781
1782 value = !!value;
1783 if (value == hba->clk_gating.is_enabled)
1784 goto out;
1785
1786 if (value) {
1787 ufshcd_release(hba);
1788 } else {
1789 spin_lock_irqsave(hba->host->host_lock, flags);
1790 hba->clk_gating.active_reqs++;
1791 spin_unlock_irqrestore(hba->host->host_lock, flags);
1792 }
1793
1794 hba->clk_gating.is_enabled = value;
1795out:
1796 return count;
1797}
1798
Vivek Gautameebcc192018-08-07 23:17:39 +05301799static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1800{
1801 char wq_name[sizeof("ufs_clkscaling_00")];
1802
1803 if (!ufshcd_is_clkscaling_supported(hba))
1804 return;
1805
1806 INIT_WORK(&hba->clk_scaling.suspend_work,
1807 ufshcd_clk_scaling_suspend_work);
1808 INIT_WORK(&hba->clk_scaling.resume_work,
1809 ufshcd_clk_scaling_resume_work);
1810
1811 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1812 hba->host->host_no);
1813 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1814
1815 ufshcd_clkscaling_init_sysfs(hba);
1816}
1817
1818static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1819{
1820 if (!ufshcd_is_clkscaling_supported(hba))
1821 return;
1822
1823 destroy_workqueue(hba->clk_scaling.workq);
1824 ufshcd_devfreq_remove(hba);
1825}
1826
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001827static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1828{
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301829 char wq_name[sizeof("ufs_clk_gating_00")];
1830
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001831 if (!ufshcd_is_clkgating_allowed(hba))
1832 return;
1833
1834 hba->clk_gating.delay_ms = 150;
1835 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1836 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1837
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301838 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1839 hba->host->host_no);
1840 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1841 WQ_MEM_RECLAIM);
1842
Sahitya Tummalab4274112016-12-22 18:40:39 -08001843 hba->clk_gating.is_enabled = true;
1844
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001845 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1846 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1847 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1848 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
Sahitya Tummalab4274112016-12-22 18:40:39 -08001849 hba->clk_gating.delay_attr.attr.mode = 0644;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001850 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1851 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Sahitya Tummalab4274112016-12-22 18:40:39 -08001852
1853 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1854 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1855 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1856 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1857 hba->clk_gating.enable_attr.attr.mode = 0644;
1858 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1859 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001860}
1861
1862static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1863{
1864 if (!ufshcd_is_clkgating_allowed(hba))
1865 return;
1866 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001867 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001868 cancel_work_sync(&hba->clk_gating.ungate_work);
1869 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301870 destroy_workqueue(hba->clk_gating.clk_gating_workq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001871}
1872
Sahitya Tummala856b3482014-09-25 15:32:34 +03001873/* Must be called with host lock acquired */
1874static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1875{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001876 bool queue_resume_work = false;
1877
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001878 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001879 return;
1880
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001881 if (!hba->clk_scaling.active_reqs++)
1882 queue_resume_work = true;
1883
1884 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1885 return;
1886
1887 if (queue_resume_work)
1888 queue_work(hba->clk_scaling.workq,
1889 &hba->clk_scaling.resume_work);
1890
1891 if (!hba->clk_scaling.window_start_t) {
1892 hba->clk_scaling.window_start_t = jiffies;
1893 hba->clk_scaling.tot_busy_t = 0;
1894 hba->clk_scaling.is_busy_started = false;
1895 }
1896
Sahitya Tummala856b3482014-09-25 15:32:34 +03001897 if (!hba->clk_scaling.is_busy_started) {
1898 hba->clk_scaling.busy_start_t = ktime_get();
1899 hba->clk_scaling.is_busy_started = true;
1900 }
1901}
1902
1903static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1904{
1905 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1906
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001907 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001908 return;
1909
1910 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1911 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1912 scaling->busy_start_t));
Thomas Gleixner8b0e1952016-12-25 12:30:41 +01001913 scaling->busy_start_t = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03001914 scaling->is_busy_started = false;
1915 }
1916}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301917/**
1918 * ufshcd_send_command - Send SCSI or device management commands
1919 * @hba: per adapter instance
1920 * @task_tag: Task tag of the command
1921 */
1922static inline
1923void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1924{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08001925 hba->lrb[task_tag].issue_time_stamp = ktime_get();
Zang Leigang09017182017-09-27 10:06:06 +08001926 hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
Bart Van Asscheeacf36f2019-12-24 14:02:46 -08001927 ufshcd_add_command_trace(hba, task_tag, "send");
Sahitya Tummala856b3482014-09-25 15:32:34 +03001928 ufshcd_clk_scaling_start_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301929 __set_bit(task_tag, &hba->outstanding_reqs);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301930 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07001931 /* Make sure that doorbell is committed immediately */
1932 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301933}
1934
1935/**
1936 * ufshcd_copy_sense_data - Copy sense data in case of check condition
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001937 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301938 */
1939static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1940{
1941 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05301942 if (lrbp->sense_buffer &&
1943 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001944 int len_to_copy;
1945
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301946 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Avri Altman09a5a242018-11-22 20:04:56 +02001947 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001948
Avri Altman09a5a242018-11-22 20:04:56 +02001949 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
1950 len_to_copy);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301951 }
1952}
1953
1954/**
Dolev Raviv68078d52013-07-30 00:35:58 +05301955 * ufshcd_copy_query_response() - Copy the Query Response and the data
1956 * descriptor
1957 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001958 * @lrbp: pointer to local reference block
Dolev Raviv68078d52013-07-30 00:35:58 +05301959 */
1960static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001961int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05301962{
1963 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1964
Dolev Raviv68078d52013-07-30 00:35:58 +05301965 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05301966
Dolev Raviv68078d52013-07-30 00:35:58 +05301967 /* Get the descriptor */
Avri Altman1c908362019-05-21 11:24:22 +03001968 if (hba->dev_cmd.query.descriptor &&
1969 lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03001970 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05301971 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001972 u16 resp_len;
1973 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05301974
1975 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001976 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05301977 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03001978 buf_len = be16_to_cpu(
1979 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001980 if (likely(buf_len >= resp_len)) {
1981 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1982 } else {
1983 dev_warn(hba->dev,
Bean Huo3d4881d2019-11-12 23:34:35 +01001984 "%s: rsp size %d is bigger than buffer size %d",
1985 __func__, resp_len, buf_len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001986 return -EINVAL;
1987 }
Dolev Raviv68078d52013-07-30 00:35:58 +05301988 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001989
1990 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05301991}
1992
1993/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301994 * ufshcd_hba_capabilities - Read controller capabilities
1995 * @hba: per adapter instance
1996 */
1997static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1998{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301999 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302000
2001 /* nutrs and nutmrs are 0 based values */
2002 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
2003 hba->nutmrs =
2004 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
2005}
2006
2007/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302008 * ufshcd_ready_for_uic_cmd - Check if controller is ready
2009 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302010 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302011 * Return true on success, else false
2012 */
2013static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
2014{
2015 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
2016 return true;
2017 else
2018 return false;
2019}
2020
2021/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05302022 * ufshcd_get_upmcrs - Get the power mode change request status
2023 * @hba: Pointer to adapter instance
2024 *
2025 * This function gets the UPMCRS field of HCS register
2026 * Returns value of UPMCRS field
2027 */
2028static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
2029{
2030 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
2031}
2032
2033/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302034 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
2035 * @hba: per adapter instance
2036 * @uic_cmd: UIC command
2037 *
2038 * Mutex must be held.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302039 */
2040static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302041ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302042{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302043 WARN_ON(hba->active_uic_cmd);
2044
2045 hba->active_uic_cmd = uic_cmd;
2046
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302047 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302048 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2049 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2050 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302051
2052 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302053 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302054 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302055}
2056
2057/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302058 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2059 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002060 * @uic_cmd: UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302061 *
2062 * Must be called with mutex held.
2063 * Returns 0 only if success.
2064 */
2065static int
2066ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2067{
2068 int ret;
2069 unsigned long flags;
2070
2071 if (wait_for_completion_timeout(&uic_cmd->done,
2072 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2073 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2074 else
2075 ret = -ETIMEDOUT;
2076
2077 spin_lock_irqsave(hba->host->host_lock, flags);
2078 hba->active_uic_cmd = NULL;
2079 spin_unlock_irqrestore(hba->host->host_lock, flags);
2080
2081 return ret;
2082}
2083
2084/**
2085 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2086 * @hba: per adapter instance
2087 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002088 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302089 *
2090 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002091 * with mutex held and host_lock locked.
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302092 * Returns 0 only if success.
2093 */
2094static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002095__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2096 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302097{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302098 if (!ufshcd_ready_for_uic_cmd(hba)) {
2099 dev_err(hba->dev,
2100 "Controller not ready to accept UIC commands\n");
2101 return -EIO;
2102 }
2103
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002104 if (completion)
2105 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302106
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302107 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302108
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002109 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302110}
2111
2112/**
2113 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2114 * @hba: per adapter instance
2115 * @uic_cmd: UIC command
2116 *
2117 * Returns 0 only if success.
2118 */
Avri Altmane77044c52018-10-07 17:30:39 +03002119int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302120{
2121 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002122 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302123
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002124 ufshcd_hold(hba, false);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302125 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03002126 ufshcd_add_delay_before_dme_cmd(hba);
2127
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002128 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002129 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002130 spin_unlock_irqrestore(hba->host->host_lock, flags);
2131 if (!ret)
2132 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2133
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302134 mutex_unlock(&hba->uic_cmd_mutex);
2135
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002136 ufshcd_release(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302137 return ret;
2138}
2139
2140/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302141 * ufshcd_map_sg - Map scatter-gather list to prdt
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002142 * @hba: per adapter instance
2143 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302144 *
2145 * Returns 0 in case of success, non-zero value in case of failure
2146 */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002147static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302148{
2149 struct ufshcd_sg_entry *prd_table;
2150 struct scatterlist *sg;
2151 struct scsi_cmnd *cmd;
2152 int sg_segments;
2153 int i;
2154
2155 cmd = lrbp->cmd;
2156 sg_segments = scsi_dma_map(cmd);
2157 if (sg_segments < 0)
2158 return sg_segments;
2159
2160 if (sg_segments) {
Christoph Hellwig492001992020-02-21 06:08:11 -08002161 lrbp->utr_descriptor_ptr->prd_table_length =
2162 cpu_to_le16((u16)sg_segments);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302163
2164 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2165
2166 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2167 prd_table[i].size =
2168 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2169 prd_table[i].base_addr =
2170 cpu_to_le32(lower_32_bits(sg->dma_address));
2171 prd_table[i].upper_addr =
2172 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002173 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302174 }
2175 } else {
2176 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2177 }
2178
2179 return 0;
2180}
2181
2182/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302183 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302184 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302185 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302186 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302187static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302188{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302189 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2190
2191 if (hba->ufs_version == UFSHCI_VERSION_10) {
2192 u32 rw;
2193 rw = set & INTERRUPT_MASK_RW_VER_10;
2194 set = rw | ((set ^ intrs) & intrs);
2195 } else {
2196 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302197 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302198
2199 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2200}
2201
2202/**
2203 * ufshcd_disable_intr - disable interrupts
2204 * @hba: per adapter instance
2205 * @intrs: interrupt bits
2206 */
2207static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2208{
2209 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2210
2211 if (hba->ufs_version == UFSHCI_VERSION_10) {
2212 u32 rw;
2213 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2214 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2215 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2216
2217 } else {
2218 set &= ~intrs;
2219 }
2220
2221 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302222}
2223
2224/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302225 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2226 * descriptor according to request
2227 * @lrbp: pointer to local reference block
2228 * @upiu_flags: flags required in the header
2229 * @cmd_dir: requests data direction
2230 */
2231static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
Joao Pinto300bb132016-05-11 12:21:27 +01002232 u32 *upiu_flags, enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302233{
2234 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2235 u32 data_direction;
2236 u32 dword_0;
2237
2238 if (cmd_dir == DMA_FROM_DEVICE) {
2239 data_direction = UTP_DEVICE_TO_HOST;
2240 *upiu_flags = UPIU_CMD_FLAGS_READ;
2241 } else if (cmd_dir == DMA_TO_DEVICE) {
2242 data_direction = UTP_HOST_TO_DEVICE;
2243 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2244 } else {
2245 data_direction = UTP_NO_DATA_TRANSFER;
2246 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2247 }
2248
2249 dword_0 = data_direction | (lrbp->command_type
2250 << UPIU_COMMAND_TYPE_OFFSET);
2251 if (lrbp->intr_cmd)
2252 dword_0 |= UTP_REQ_DESC_INT_CMD;
2253
2254 /* Transfer request descriptor header fields */
2255 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002256 /* dword_1 is reserved, hence it is set to 0 */
2257 req_desc->header.dword_1 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302258 /*
2259 * assigning invalid value for command status. Controller
2260 * updates OCS on command completion, with the command
2261 * status
2262 */
2263 req_desc->header.dword_2 =
2264 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002265 /* dword_3 is reserved, hence it is set to 0 */
2266 req_desc->header.dword_3 = 0;
Yaniv Gardi51047262016-02-01 15:02:38 +02002267
2268 req_desc->prd_table_length = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302269}
2270
2271/**
2272 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2273 * for scsi commands
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002274 * @lrbp: local reference block pointer
2275 * @upiu_flags: flags
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302276 */
2277static
2278void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2279{
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002280 struct scsi_cmnd *cmd = lrbp->cmd;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302281 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002282 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302283
2284 /* command descriptor fields */
2285 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2286 UPIU_TRANSACTION_COMMAND, upiu_flags,
2287 lrbp->lun, lrbp->task_tag);
2288 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2289 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2290
2291 /* Total EHS length and Data segment length will be zero */
2292 ucd_req_ptr->header.dword_2 = 0;
2293
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002294 ucd_req_ptr->sc.exp_data_transfer_len = cpu_to_be32(cmd->sdb.length);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302295
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002296 cdb_len = min_t(unsigned short, cmd->cmd_len, UFS_CDB_SIZE);
Avri Altmana851b2b2018-10-07 17:30:34 +03002297 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002298 memcpy(ucd_req_ptr->sc.cdb, cmd->cmnd, cdb_len);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002299
2300 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302301}
2302
Dolev Raviv68078d52013-07-30 00:35:58 +05302303/**
2304 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2305 * for query requsts
2306 * @hba: UFS hba
2307 * @lrbp: local reference block pointer
2308 * @upiu_flags: flags
2309 */
2310static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2311 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2312{
2313 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2314 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302315 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302316
2317 /* Query request header */
2318 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2319 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2320 lrbp->lun, lrbp->task_tag);
2321 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2322 0, query->request.query_func, 0, 0);
2323
Zang Leigang68612852016-08-25 17:39:19 +08002324 /* Data segment length only need for WRITE_DESC */
2325 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2326 ucd_req_ptr->header.dword_2 =
2327 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2328 else
2329 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302330
2331 /* Copy the Query Request buffer as is */
2332 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2333 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302334
2335 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002336 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
Avri Altman220d17a62018-10-07 17:30:36 +03002337 memcpy(ucd_req_ptr + 1, query->descriptor, len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002338
Yaniv Gardi51047262016-02-01 15:02:38 +02002339 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302340}
2341
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302342static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2343{
2344 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2345
2346 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2347
2348 /* command descriptor fields */
2349 ucd_req_ptr->header.dword_0 =
2350 UPIU_HEADER_DWORD(
2351 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002352 /* clear rest of the fields of basic header */
2353 ucd_req_ptr->header.dword_1 = 0;
2354 ucd_req_ptr->header.dword_2 = 0;
2355
2356 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302357}
2358
2359/**
Joao Pinto300bb132016-05-11 12:21:27 +01002360 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2361 * for Device Management Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002362 * @hba: per adapter instance
2363 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302364 */
Joao Pinto300bb132016-05-11 12:21:27 +01002365static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302366{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302367 u32 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302368 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302369
kehuanlin83dc7e32017-09-06 17:58:39 +08002370 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2371 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002372 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
kehuanlin83dc7e32017-09-06 17:58:39 +08002373 else
2374 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002375
2376 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2377 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2378 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2379 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2380 ufshcd_prepare_utp_nop_upiu(lrbp);
2381 else
2382 ret = -EINVAL;
2383
2384 return ret;
2385}
2386
2387/**
2388 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2389 * for SCSI Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002390 * @hba: per adapter instance
2391 * @lrbp: pointer to local reference block
Joao Pinto300bb132016-05-11 12:21:27 +01002392 */
2393static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2394{
2395 u32 upiu_flags;
2396 int ret = 0;
2397
kehuanlin83dc7e32017-09-06 17:58:39 +08002398 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2399 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002400 lrbp->command_type = UTP_CMD_TYPE_SCSI;
kehuanlin83dc7e32017-09-06 17:58:39 +08002401 else
2402 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002403
2404 if (likely(lrbp->cmd)) {
2405 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2406 lrbp->cmd->sc_data_direction);
2407 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2408 } else {
2409 ret = -EINVAL;
2410 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302411
2412 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302413}
2414
2415/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002416 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002417 * @upiu_wlun_id: UPIU W-LUN id
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002418 *
2419 * Returns SCSI W-LUN id
2420 */
2421static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2422{
2423 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2424}
2425
Bart Van Assche4d2b8d42020-01-22 19:56:35 -08002426static void ufshcd_init_lrb(struct ufs_hba *hba, struct ufshcd_lrb *lrb, int i)
2427{
2428 struct utp_transfer_cmd_desc *cmd_descp = hba->ucdl_base_addr;
2429 struct utp_transfer_req_desc *utrdlp = hba->utrdl_base_addr;
2430 dma_addr_t cmd_desc_element_addr = hba->ucdl_dma_addr +
2431 i * sizeof(struct utp_transfer_cmd_desc);
2432 u16 response_offset = offsetof(struct utp_transfer_cmd_desc,
2433 response_upiu);
2434 u16 prdt_offset = offsetof(struct utp_transfer_cmd_desc, prd_table);
2435
2436 lrb->utr_descriptor_ptr = utrdlp + i;
2437 lrb->utrd_dma_addr = hba->utrdl_dma_addr +
2438 i * sizeof(struct utp_transfer_req_desc);
2439 lrb->ucd_req_ptr = (struct utp_upiu_req *)(cmd_descp + i);
2440 lrb->ucd_req_dma_addr = cmd_desc_element_addr;
2441 lrb->ucd_rsp_ptr = (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
2442 lrb->ucd_rsp_dma_addr = cmd_desc_element_addr + response_offset;
2443 lrb->ucd_prdt_ptr = (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
2444 lrb->ucd_prdt_dma_addr = cmd_desc_element_addr + prdt_offset;
2445}
2446
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002447/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302448 * ufshcd_queuecommand - main entry point for SCSI requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002449 * @host: SCSI host pointer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302450 * @cmd: command from SCSI Midlayer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302451 *
2452 * Returns 0 for success, non-zero in case of failure
2453 */
2454static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2455{
2456 struct ufshcd_lrb *lrbp;
2457 struct ufs_hba *hba;
2458 unsigned long flags;
2459 int tag;
2460 int err = 0;
2461
2462 hba = shost_priv(host);
2463
2464 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02002465 if (!ufshcd_valid_tag(hba, tag)) {
2466 dev_err(hba->dev,
2467 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2468 __func__, tag, cmd, cmd->request);
2469 BUG();
2470 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302471
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002472 if (!down_read_trylock(&hba->clk_scaling_lock))
2473 return SCSI_MLQUEUE_HOST_BUSY;
2474
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302475 spin_lock_irqsave(hba->host->host_lock, flags);
2476 switch (hba->ufshcd_state) {
2477 case UFSHCD_STATE_OPERATIONAL:
2478 break;
Zang Leigang141f8162016-11-16 11:29:37 +08002479 case UFSHCD_STATE_EH_SCHEDULED:
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302480 case UFSHCD_STATE_RESET:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302481 err = SCSI_MLQUEUE_HOST_BUSY;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302482 goto out_unlock;
2483 case UFSHCD_STATE_ERROR:
2484 set_host_byte(cmd, DID_ERROR);
2485 cmd->scsi_done(cmd);
2486 goto out_unlock;
2487 default:
2488 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2489 __func__, hba->ufshcd_state);
2490 set_host_byte(cmd, DID_BAD_TARGET);
2491 cmd->scsi_done(cmd);
2492 goto out_unlock;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302493 }
Yaniv Gardi53c12d02016-02-01 15:02:45 +02002494
2495 /* if error handling is in progress, don't issue commands */
2496 if (ufshcd_eh_in_progress(hba)) {
2497 set_host_byte(cmd, DID_ERROR);
2498 cmd->scsi_done(cmd);
2499 goto out_unlock;
2500 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302501 spin_unlock_irqrestore(hba->host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302502
Gilad Broner7fabb772017-02-03 16:56:50 -08002503 hba->req_abort_count = 0;
2504
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002505 err = ufshcd_hold(hba, true);
2506 if (err) {
2507 err = SCSI_MLQUEUE_HOST_BUSY;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002508 goto out;
2509 }
2510 WARN_ON(hba->clk_gating.state != CLKS_ON);
2511
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302512 lrbp = &hba->lrb[tag];
2513
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302514 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302515 lrbp->cmd = cmd;
Avri Altman09a5a242018-11-22 20:04:56 +02002516 lrbp->sense_bufflen = UFS_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302517 lrbp->sense_buffer = cmd->sense_buffer;
2518 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002519 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002520 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Gilad Bronere0b299e2017-02-03 16:56:40 -08002521 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302522
Joao Pinto300bb132016-05-11 12:21:27 +01002523 ufshcd_comp_scsi_upiu(hba, lrbp);
2524
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002525 err = ufshcd_map_sg(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302526 if (err) {
2527 lrbp->cmd = NULL;
Can Guo17c7d352019-12-05 02:14:33 +00002528 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302529 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302530 }
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002531 /* Make sure descriptors are ready before ringing the doorbell */
2532 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302533
2534 /* issue command to the controller */
2535 spin_lock_irqsave(hba->host->host_lock, flags);
Bart Van Assche5905d462020-01-22 19:56:36 -08002536 ufshcd_vops_setup_xfer_req(hba, tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302537 ufshcd_send_command(hba, tag);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302538out_unlock:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302539 spin_unlock_irqrestore(hba->host->host_lock, flags);
2540out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002541 up_read(&hba->clk_scaling_lock);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302542 return err;
2543}
2544
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302545static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2546 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2547{
2548 lrbp->cmd = NULL;
2549 lrbp->sense_bufflen = 0;
2550 lrbp->sense_buffer = NULL;
2551 lrbp->task_tag = tag;
2552 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302553 lrbp->intr_cmd = true; /* No interrupt aggregation */
2554 hba->dev_cmd.type = cmd_type;
2555
Joao Pinto300bb132016-05-11 12:21:27 +01002556 return ufshcd_comp_devman_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302557}
2558
2559static int
2560ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2561{
2562 int err = 0;
2563 unsigned long flags;
2564 u32 mask = 1 << tag;
2565
2566 /* clear outstanding transaction before retry */
2567 spin_lock_irqsave(hba->host->host_lock, flags);
2568 ufshcd_utrl_clear(hba, tag);
2569 spin_unlock_irqrestore(hba->host->host_lock, flags);
2570
2571 /*
2572 * wait for for h/w to clear corresponding bit in door-bell.
2573 * max. wait is 1 sec.
2574 */
2575 err = ufshcd_wait_for_register(hba,
2576 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Bart Van Assche5cac1092020-05-07 15:27:50 -07002577 mask, ~mask, 1000, 1000);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302578
2579 return err;
2580}
2581
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002582static int
2583ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2584{
2585 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2586
2587 /* Get the UPIU response */
2588 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2589 UPIU_RSP_CODE_OFFSET;
2590 return query_res->response;
2591}
2592
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302593/**
2594 * ufshcd_dev_cmd_completion() - handles device management command responses
2595 * @hba: per adapter instance
2596 * @lrbp: pointer to local reference block
2597 */
2598static int
2599ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2600{
2601 int resp;
2602 int err = 0;
2603
Dolev Ravivff8e20c2016-12-22 18:42:18 -08002604 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302605 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2606
2607 switch (resp) {
2608 case UPIU_TRANSACTION_NOP_IN:
2609 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2610 err = -EINVAL;
2611 dev_err(hba->dev, "%s: unexpected response %x\n",
2612 __func__, resp);
2613 }
2614 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302615 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002616 err = ufshcd_check_query_response(hba, lrbp);
2617 if (!err)
2618 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302619 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302620 case UPIU_TRANSACTION_REJECT_UPIU:
2621 /* TODO: handle Reject UPIU Response */
2622 err = -EPERM;
2623 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2624 __func__);
2625 break;
2626 default:
2627 err = -EINVAL;
2628 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2629 __func__, resp);
2630 break;
2631 }
2632
2633 return err;
2634}
2635
2636static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2637 struct ufshcd_lrb *lrbp, int max_timeout)
2638{
2639 int err = 0;
2640 unsigned long time_left;
2641 unsigned long flags;
2642
2643 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2644 msecs_to_jiffies(max_timeout));
2645
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002646 /* Make sure descriptors are ready before ringing the doorbell */
2647 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302648 spin_lock_irqsave(hba->host->host_lock, flags);
2649 hba->dev_cmd.complete = NULL;
2650 if (likely(time_left)) {
2651 err = ufshcd_get_tr_ocs(lrbp);
2652 if (!err)
2653 err = ufshcd_dev_cmd_completion(hba, lrbp);
2654 }
2655 spin_unlock_irqrestore(hba->host->host_lock, flags);
2656
2657 if (!time_left) {
2658 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002659 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2660 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302661 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002662 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302663 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002664 /*
2665 * in case of an error, after clearing the doorbell,
2666 * we also need to clear the outstanding_request
2667 * field in hba
2668 */
2669 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302670 }
2671
2672 return err;
2673}
2674
2675/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302676 * ufshcd_exec_dev_cmd - API for sending device management requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002677 * @hba: UFS hba
2678 * @cmd_type: specifies the type (NOP, Query...)
2679 * @timeout: time in seconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302680 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302681 * NOTE: Since there is only one available tag for device management commands,
2682 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302683 */
2684static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2685 enum dev_cmd_type cmd_type, int timeout)
2686{
Bart Van Assche7252a362019-12-09 10:13:08 -08002687 struct request_queue *q = hba->cmd_queue;
2688 struct request *req;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302689 struct ufshcd_lrb *lrbp;
2690 int err;
2691 int tag;
2692 struct completion wait;
2693 unsigned long flags;
2694
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002695 down_read(&hba->clk_scaling_lock);
2696
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302697 /*
2698 * Get free slot, sleep if slots are unavailable.
2699 * Even though we use wait_event() which sleeps indefinitely,
2700 * the maximum wait time is bounded by SCSI request timeout.
2701 */
Bart Van Assche7252a362019-12-09 10:13:08 -08002702 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03002703 if (IS_ERR(req)) {
2704 err = PTR_ERR(req);
2705 goto out_unlock;
2706 }
Bart Van Assche7252a362019-12-09 10:13:08 -08002707 tag = req->tag;
2708 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302709
2710 init_completion(&wait);
2711 lrbp = &hba->lrb[tag];
2712 WARN_ON(lrbp->cmd);
2713 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2714 if (unlikely(err))
2715 goto out_put_tag;
2716
2717 hba->dev_cmd.complete = &wait;
2718
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002719 ufshcd_add_query_upiu_trace(hba, tag, "query_send");
Yaniv Gardie3dfdc52016-02-01 15:02:49 +02002720 /* Make sure descriptors are ready before ringing the doorbell */
2721 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302722 spin_lock_irqsave(hba->host->host_lock, flags);
Bart Van Assche5905d462020-01-22 19:56:36 -08002723 ufshcd_vops_setup_xfer_req(hba, tag, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302724 ufshcd_send_command(hba, tag);
2725 spin_unlock_irqrestore(hba->host->host_lock, flags);
2726
2727 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2728
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002729 ufshcd_add_query_upiu_trace(hba, tag,
2730 err ? "query_complete_err" : "query_complete");
2731
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302732out_put_tag:
Bart Van Assche7252a362019-12-09 10:13:08 -08002733 blk_put_request(req);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03002734out_unlock:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002735 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302736 return err;
2737}
2738
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302739/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002740 * ufshcd_init_query() - init the query response and request parameters
2741 * @hba: per-adapter instance
2742 * @request: address of the request pointer to be initialized
2743 * @response: address of the response pointer to be initialized
2744 * @opcode: operation to perform
2745 * @idn: flag idn to access
2746 * @index: LU number to access
2747 * @selector: query/flag/descriptor further identification
2748 */
2749static inline void ufshcd_init_query(struct ufs_hba *hba,
2750 struct ufs_query_req **request, struct ufs_query_res **response,
2751 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2752{
2753 *request = &hba->dev_cmd.query.request;
2754 *response = &hba->dev_cmd.query.response;
2755 memset(*request, 0, sizeof(struct ufs_query_req));
2756 memset(*response, 0, sizeof(struct ufs_query_res));
2757 (*request)->upiu_req.opcode = opcode;
2758 (*request)->upiu_req.idn = idn;
2759 (*request)->upiu_req.index = index;
2760 (*request)->upiu_req.selector = selector;
2761}
2762
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002763static int ufshcd_query_flag_retry(struct ufs_hba *hba,
Stanley Chu1f34eed2020-05-08 16:01:12 +08002764 enum query_opcode opcode, enum flag_idn idn, u8 index, bool *flag_res)
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002765{
2766 int ret;
2767 int retries;
2768
2769 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
Stanley Chu1f34eed2020-05-08 16:01:12 +08002770 ret = ufshcd_query_flag(hba, opcode, idn, index, flag_res);
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002771 if (ret)
2772 dev_dbg(hba->dev,
2773 "%s: failed with error %d, retries %d\n",
2774 __func__, ret, retries);
2775 else
2776 break;
2777 }
2778
2779 if (ret)
2780 dev_err(hba->dev,
2781 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2782 __func__, opcode, idn, ret, retries);
2783 return ret;
2784}
2785
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002786/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302787 * ufshcd_query_flag() - API function for sending flag query requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002788 * @hba: per-adapter instance
2789 * @opcode: flag query to perform
2790 * @idn: flag idn to access
Stanley Chu1f34eed2020-05-08 16:01:12 +08002791 * @index: flag index to access
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002792 * @flag_res: the flag value after the query request completes
Dolev Raviv68078d52013-07-30 00:35:58 +05302793 *
2794 * Returns 0 for success, non-zero in case of failure
2795 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002796int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Stanley Chu1f34eed2020-05-08 16:01:12 +08002797 enum flag_idn idn, u8 index, bool *flag_res)
Dolev Raviv68078d52013-07-30 00:35:58 +05302798{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002799 struct ufs_query_req *request = NULL;
2800 struct ufs_query_res *response = NULL;
Stanley Chu1f34eed2020-05-08 16:01:12 +08002801 int err, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002802 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05302803
2804 BUG_ON(!hba);
2805
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002806 ufshcd_hold(hba, false);
Dolev Raviv68078d52013-07-30 00:35:58 +05302807 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002808 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2809 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05302810
2811 switch (opcode) {
2812 case UPIU_QUERY_OPCODE_SET_FLAG:
2813 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2814 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2815 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2816 break;
2817 case UPIU_QUERY_OPCODE_READ_FLAG:
2818 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2819 if (!flag_res) {
2820 /* No dummy reads */
2821 dev_err(hba->dev, "%s: Invalid argument for read request\n",
2822 __func__);
2823 err = -EINVAL;
2824 goto out_unlock;
2825 }
2826 break;
2827 default:
2828 dev_err(hba->dev,
2829 "%s: Expected query flag opcode but got = %d\n",
2830 __func__, opcode);
2831 err = -EINVAL;
2832 goto out_unlock;
2833 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302834
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002835 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05302836
2837 if (err) {
2838 dev_err(hba->dev,
2839 "%s: Sending flag query for idn %d failed, err = %d\n",
2840 __func__, idn, err);
2841 goto out_unlock;
2842 }
2843
2844 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302845 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302846 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2847
2848out_unlock:
2849 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002850 ufshcd_release(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05302851 return err;
2852}
2853
2854/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302855 * ufshcd_query_attr - API function for sending attribute requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002856 * @hba: per-adapter instance
2857 * @opcode: attribute opcode
2858 * @idn: attribute idn to access
2859 * @index: index field
2860 * @selector: selector field
2861 * @attr_val: the attribute value after the query request completes
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302862 *
2863 * Returns 0 for success, non-zero in case of failure
2864*/
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02002865int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2866 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302867{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002868 struct ufs_query_req *request = NULL;
2869 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302870 int err;
2871
2872 BUG_ON(!hba);
2873
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002874 ufshcd_hold(hba, false);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302875 if (!attr_val) {
2876 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2877 __func__, opcode);
2878 err = -EINVAL;
2879 goto out;
2880 }
2881
2882 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002883 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2884 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302885
2886 switch (opcode) {
2887 case UPIU_QUERY_OPCODE_WRITE_ATTR:
2888 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302889 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302890 break;
2891 case UPIU_QUERY_OPCODE_READ_ATTR:
2892 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2893 break;
2894 default:
2895 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2896 __func__, opcode);
2897 err = -EINVAL;
2898 goto out_unlock;
2899 }
2900
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002901 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302902
2903 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002904 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2905 __func__, opcode, idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302906 goto out_unlock;
2907 }
2908
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302909 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302910
2911out_unlock:
2912 mutex_unlock(&hba->dev_cmd.lock);
2913out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002914 ufshcd_release(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302915 return err;
2916}
2917
2918/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02002919 * ufshcd_query_attr_retry() - API function for sending query
2920 * attribute with retries
2921 * @hba: per-adapter instance
2922 * @opcode: attribute opcode
2923 * @idn: attribute idn to access
2924 * @index: index field
2925 * @selector: selector field
2926 * @attr_val: the attribute value after the query request
2927 * completes
2928 *
2929 * Returns 0 for success, non-zero in case of failure
2930*/
2931static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2932 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2933 u32 *attr_val)
2934{
2935 int ret = 0;
2936 u32 retries;
2937
Bart Van Assche68c9fcf2019-12-24 14:02:43 -08002938 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02002939 ret = ufshcd_query_attr(hba, opcode, idn, index,
2940 selector, attr_val);
2941 if (ret)
2942 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2943 __func__, ret, retries);
2944 else
2945 break;
2946 }
2947
2948 if (ret)
2949 dev_err(hba->dev,
2950 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2951 __func__, idn, ret, QUERY_REQ_RETRIES);
2952 return ret;
2953}
2954
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002955static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002956 enum query_opcode opcode, enum desc_idn idn, u8 index,
2957 u8 selector, u8 *desc_buf, int *buf_len)
2958{
2959 struct ufs_query_req *request = NULL;
2960 struct ufs_query_res *response = NULL;
2961 int err;
2962
2963 BUG_ON(!hba);
2964
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002965 ufshcd_hold(hba, false);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002966 if (!desc_buf) {
2967 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2968 __func__, opcode);
2969 err = -EINVAL;
2970 goto out;
2971 }
2972
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002973 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002974 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2975 __func__, *buf_len);
2976 err = -EINVAL;
2977 goto out;
2978 }
2979
2980 mutex_lock(&hba->dev_cmd.lock);
2981 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2982 selector);
2983 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002984 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002985
2986 switch (opcode) {
2987 case UPIU_QUERY_OPCODE_WRITE_DESC:
2988 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2989 break;
2990 case UPIU_QUERY_OPCODE_READ_DESC:
2991 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2992 break;
2993 default:
2994 dev_err(hba->dev,
2995 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2996 __func__, opcode);
2997 err = -EINVAL;
2998 goto out_unlock;
2999 }
3000
3001 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3002
3003 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08003004 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3005 __func__, opcode, idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003006 goto out_unlock;
3007 }
3008
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03003009 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003010
3011out_unlock:
Bean Huocfcbae32019-11-12 23:34:36 +01003012 hba->dev_cmd.query.descriptor = NULL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003013 mutex_unlock(&hba->dev_cmd.lock);
3014out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003015 ufshcd_release(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003016 return err;
3017}
3018
3019/**
Bart Van Assche8aa29f12018-03-01 15:07:20 -08003020 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
3021 * @hba: per-adapter instance
3022 * @opcode: attribute opcode
3023 * @idn: attribute idn to access
3024 * @index: index field
3025 * @selector: selector field
3026 * @desc_buf: the buffer that contains the descriptor
3027 * @buf_len: length parameter passed to the device
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003028 *
3029 * Returns 0 for success, non-zero in case of failure.
3030 * The buf_len parameter will contain, on return, the length parameter
3031 * received on the response.
3032 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02003033int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3034 enum query_opcode opcode,
3035 enum desc_idn idn, u8 index,
3036 u8 selector,
3037 u8 *desc_buf, int *buf_len)
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003038{
3039 int err;
3040 int retries;
3041
3042 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3043 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3044 selector, desc_buf, buf_len);
3045 if (!err || err == -EINVAL)
3046 break;
3047 }
3048
3049 return err;
3050}
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003051
3052/**
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003053 * ufshcd_read_desc_length - read the specified descriptor length from header
3054 * @hba: Pointer to adapter instance
3055 * @desc_id: descriptor idn value
3056 * @desc_index: descriptor index
3057 * @desc_length: pointer to variable to read the length of descriptor
3058 *
3059 * Return 0 in case of success, non-zero otherwise
3060 */
3061static int ufshcd_read_desc_length(struct ufs_hba *hba,
3062 enum desc_idn desc_id,
3063 int desc_index,
3064 int *desc_length)
3065{
3066 int ret;
3067 u8 header[QUERY_DESC_HDR_SIZE];
3068 int header_len = QUERY_DESC_HDR_SIZE;
3069
3070 if (desc_id >= QUERY_DESC_IDN_MAX)
3071 return -EINVAL;
3072
3073 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3074 desc_id, desc_index, 0, header,
3075 &header_len);
3076
3077 if (ret) {
3078 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
3079 __func__, desc_id);
3080 return ret;
3081 } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
3082 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
3083 __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3084 desc_id);
3085 ret = -EINVAL;
3086 }
3087
3088 *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3089 return ret;
3090
3091}
3092
3093/**
3094 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3095 * @hba: Pointer to adapter instance
3096 * @desc_id: descriptor idn value
3097 * @desc_len: mapped desc length (out)
3098 *
3099 * Return 0 in case of success, non-zero otherwise
3100 */
3101int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3102 enum desc_idn desc_id, int *desc_len)
3103{
3104 switch (desc_id) {
3105 case QUERY_DESC_IDN_DEVICE:
3106 *desc_len = hba->desc_size.dev_desc;
3107 break;
3108 case QUERY_DESC_IDN_POWER:
3109 *desc_len = hba->desc_size.pwr_desc;
3110 break;
3111 case QUERY_DESC_IDN_GEOMETRY:
3112 *desc_len = hba->desc_size.geom_desc;
3113 break;
3114 case QUERY_DESC_IDN_CONFIGURATION:
3115 *desc_len = hba->desc_size.conf_desc;
3116 break;
3117 case QUERY_DESC_IDN_UNIT:
3118 *desc_len = hba->desc_size.unit_desc;
3119 break;
3120 case QUERY_DESC_IDN_INTERCONNECT:
3121 *desc_len = hba->desc_size.interc_desc;
3122 break;
3123 case QUERY_DESC_IDN_STRING:
3124 *desc_len = QUERY_DESC_MAX_SIZE;
3125 break;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02003126 case QUERY_DESC_IDN_HEALTH:
3127 *desc_len = hba->desc_size.hlth_desc;
3128 break;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003129 case QUERY_DESC_IDN_RFU_0:
3130 case QUERY_DESC_IDN_RFU_1:
3131 *desc_len = 0;
3132 break;
3133 default:
3134 *desc_len = 0;
3135 return -EINVAL;
3136 }
3137 return 0;
3138}
3139EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3140
3141/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003142 * ufshcd_read_desc_param - read the specified descriptor parameter
3143 * @hba: Pointer to adapter instance
3144 * @desc_id: descriptor idn value
3145 * @desc_index: descriptor index
3146 * @param_offset: offset of the parameter to read
3147 * @param_read_buf: pointer to buffer where parameter would be read
3148 * @param_size: sizeof(param_read_buf)
3149 *
3150 * Return 0 in case of success, non-zero otherwise
3151 */
Stanislav Nijnikov45bced82018-02-15 14:14:02 +02003152int ufshcd_read_desc_param(struct ufs_hba *hba,
3153 enum desc_idn desc_id,
3154 int desc_index,
3155 u8 param_offset,
3156 u8 *param_read_buf,
3157 u8 param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003158{
3159 int ret;
3160 u8 *desc_buf;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003161 int buff_len;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003162 bool is_kmalloc = true;
3163
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003164 /* Safety check */
3165 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003166 return -EINVAL;
3167
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003168 /* Get the max length of descriptor from structure filled up at probe
3169 * time.
3170 */
3171 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003172
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003173 /* Sanity checks */
3174 if (ret || !buff_len) {
3175 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3176 __func__);
3177 return ret;
3178 }
3179
3180 /* Check whether we need temp memory */
3181 if (param_offset != 0 || param_size < buff_len) {
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003182 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3183 if (!desc_buf)
3184 return -ENOMEM;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003185 } else {
3186 desc_buf = param_read_buf;
3187 is_kmalloc = false;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003188 }
3189
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003190 /* Request for full descriptor */
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003191 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003192 desc_id, desc_index, 0,
3193 desc_buf, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003194
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003195 if (ret) {
3196 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3197 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003198 goto out;
3199 }
3200
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003201 /* Sanity check */
3202 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3203 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3204 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3205 ret = -EINVAL;
3206 goto out;
3207 }
3208
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003209 /* Check wherher we will not copy more data, than available */
3210 if (is_kmalloc && param_size > buff_len)
3211 param_size = buff_len;
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003212
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003213 if (is_kmalloc)
3214 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3215out:
3216 if (is_kmalloc)
3217 kfree(desc_buf);
3218 return ret;
3219}
3220
3221static inline int ufshcd_read_desc(struct ufs_hba *hba,
3222 enum desc_idn desc_id,
3223 int desc_index,
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003224 void *buf,
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003225 u32 size)
3226{
3227 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3228}
3229
Yaniv Gardib573d482016-03-10 17:37:09 +02003230
3231/**
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003232 * struct uc_string_id - unicode string
3233 *
3234 * @len: size of this descriptor inclusive
3235 * @type: descriptor type
3236 * @uc: unicode string character
3237 */
3238struct uc_string_id {
3239 u8 len;
3240 u8 type;
Gustavo A. R. Silvaec38c0a2020-05-07 14:25:50 -05003241 wchar_t uc[];
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003242} __packed;
3243
3244/* replace non-printable or non-ASCII characters with spaces */
3245static inline char ufshcd_remove_non_printable(u8 ch)
3246{
3247 return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3248}
3249
3250/**
Yaniv Gardib573d482016-03-10 17:37:09 +02003251 * ufshcd_read_string_desc - read string descriptor
3252 * @hba: pointer to adapter instance
3253 * @desc_index: descriptor index
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003254 * @buf: pointer to buffer where descriptor would be read,
3255 * the caller should free the memory.
Yaniv Gardib573d482016-03-10 17:37:09 +02003256 * @ascii: if true convert from unicode to ascii characters
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003257 * null terminated string.
Yaniv Gardib573d482016-03-10 17:37:09 +02003258 *
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003259 * Return:
3260 * * string size on success.
3261 * * -ENOMEM: on allocation failure
3262 * * -EINVAL: on a wrong parameter
Yaniv Gardib573d482016-03-10 17:37:09 +02003263 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003264int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3265 u8 **buf, bool ascii)
Yaniv Gardib573d482016-03-10 17:37:09 +02003266{
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003267 struct uc_string_id *uc_str;
3268 u8 *str;
3269 int ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003270
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003271 if (!buf)
3272 return -EINVAL;
Yaniv Gardib573d482016-03-10 17:37:09 +02003273
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003274 uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3275 if (!uc_str)
3276 return -ENOMEM;
3277
3278 ret = ufshcd_read_desc(hba, QUERY_DESC_IDN_STRING,
3279 desc_index, uc_str,
3280 QUERY_DESC_MAX_SIZE);
3281 if (ret < 0) {
3282 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3283 QUERY_REQ_RETRIES, ret);
3284 str = NULL;
3285 goto out;
3286 }
3287
3288 if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3289 dev_dbg(hba->dev, "String Desc is of zero length\n");
3290 str = NULL;
3291 ret = 0;
Yaniv Gardib573d482016-03-10 17:37:09 +02003292 goto out;
3293 }
3294
3295 if (ascii) {
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003296 ssize_t ascii_len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003297 int i;
Yaniv Gardib573d482016-03-10 17:37:09 +02003298 /* remove header and divide by 2 to move from UTF16 to UTF8 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003299 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3300 str = kzalloc(ascii_len, GFP_KERNEL);
3301 if (!str) {
3302 ret = -ENOMEM;
Tiezhu Yangfcbefc32016-06-25 12:35:22 +08003303 goto out;
Yaniv Gardib573d482016-03-10 17:37:09 +02003304 }
3305
3306 /*
3307 * the descriptor contains string in UTF16 format
3308 * we need to convert to utf-8 so it can be displayed
3309 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003310 ret = utf16s_to_utf8s(uc_str->uc,
3311 uc_str->len - QUERY_DESC_HDR_SIZE,
3312 UTF16_BIG_ENDIAN, str, ascii_len);
Yaniv Gardib573d482016-03-10 17:37:09 +02003313
3314 /* replace non-printable or non-ASCII characters with spaces */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003315 for (i = 0; i < ret; i++)
3316 str[i] = ufshcd_remove_non_printable(str[i]);
Yaniv Gardib573d482016-03-10 17:37:09 +02003317
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003318 str[ret++] = '\0';
3319
3320 } else {
YueHaibing5f577042019-08-31 12:44:24 +00003321 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003322 if (!str) {
3323 ret = -ENOMEM;
3324 goto out;
3325 }
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003326 ret = uc_str->len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003327 }
3328out:
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003329 *buf = str;
3330 kfree(uc_str);
3331 return ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003332}
Yaniv Gardib573d482016-03-10 17:37:09 +02003333
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003334/**
3335 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3336 * @hba: Pointer to adapter instance
3337 * @lun: lun id
3338 * @param_offset: offset of the parameter to read
3339 * @param_read_buf: pointer to buffer where parameter would be read
3340 * @param_size: sizeof(param_read_buf)
3341 *
3342 * Return 0 in case of success, non-zero otherwise
3343 */
3344static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3345 int lun,
3346 enum unit_desc_param param_offset,
3347 u8 *param_read_buf,
3348 u32 param_size)
3349{
3350 /*
3351 * Unit descriptors are only available for general purpose LUs (LUN id
3352 * from 0 to 7) and RPMB Well known LU.
3353 */
Bean Huo1baa8012020-01-20 14:08:20 +01003354 if (!ufs_is_valid_unit_desc_lun(&hba->dev_info, lun))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003355 return -EOPNOTSUPP;
3356
3357 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3358 param_offset, param_read_buf, param_size);
3359}
3360
Can Guo09f17792020-02-10 19:40:49 -08003361static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
3362{
3363 int err = 0;
3364 u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3365
3366 if (hba->dev_info.wspecversion >= 0x300) {
3367 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
3368 QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
3369 &gating_wait);
3370 if (err)
3371 dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",
3372 err, gating_wait);
3373
3374 if (gating_wait == 0) {
3375 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3376 dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",
3377 gating_wait);
3378 }
3379
3380 hba->dev_info.clk_gating_wait_us = gating_wait;
3381 }
3382
3383 return err;
3384}
3385
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003386/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303387 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3388 * @hba: per adapter instance
3389 *
3390 * 1. Allocate DMA memory for Command Descriptor array
3391 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3392 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3393 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3394 * (UTMRDL)
3395 * 4. Allocate memory for local reference block(lrb).
3396 *
3397 * Returns 0 for success, non-zero in case of failure
3398 */
3399static int ufshcd_memory_alloc(struct ufs_hba *hba)
3400{
3401 size_t utmrdl_size, utrdl_size, ucdl_size;
3402
3403 /* Allocate memory for UTP command descriptors */
3404 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003405 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3406 ucdl_size,
3407 &hba->ucdl_dma_addr,
3408 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303409
3410 /*
3411 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3412 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3413 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3414 * be aligned to 128 bytes as well
3415 */
3416 if (!hba->ucdl_base_addr ||
3417 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303418 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303419 "Command Descriptor Memory allocation failed\n");
3420 goto out;
3421 }
3422
3423 /*
3424 * Allocate memory for UTP Transfer descriptors
3425 * UFSHCI requires 1024 byte alignment of UTRD
3426 */
3427 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003428 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3429 utrdl_size,
3430 &hba->utrdl_dma_addr,
3431 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303432 if (!hba->utrdl_base_addr ||
3433 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303434 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303435 "Transfer Descriptor Memory allocation failed\n");
3436 goto out;
3437 }
3438
3439 /*
3440 * Allocate memory for UTP Task Management descriptors
3441 * UFSHCI requires 1024 byte alignment of UTMRD
3442 */
3443 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003444 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3445 utmrdl_size,
3446 &hba->utmrdl_dma_addr,
3447 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303448 if (!hba->utmrdl_base_addr ||
3449 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303450 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303451 "Task Management Descriptor Memory allocation failed\n");
3452 goto out;
3453 }
3454
3455 /* Allocate memory for local reference block */
Kees Cooka86854d2018-06-12 14:07:58 -07003456 hba->lrb = devm_kcalloc(hba->dev,
3457 hba->nutrs, sizeof(struct ufshcd_lrb),
Seungwon Jeon2953f852013-06-27 13:31:54 +09003458 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303459 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303460 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303461 goto out;
3462 }
3463 return 0;
3464out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303465 return -ENOMEM;
3466}
3467
3468/**
3469 * ufshcd_host_memory_configure - configure local reference block with
3470 * memory offsets
3471 * @hba: per adapter instance
3472 *
3473 * Configure Host memory space
3474 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3475 * address.
3476 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3477 * and PRDT offset.
3478 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3479 * into local reference block.
3480 */
3481static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3482{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303483 struct utp_transfer_req_desc *utrdlp;
3484 dma_addr_t cmd_desc_dma_addr;
3485 dma_addr_t cmd_desc_element_addr;
3486 u16 response_offset;
3487 u16 prdt_offset;
3488 int cmd_desc_size;
3489 int i;
3490
3491 utrdlp = hba->utrdl_base_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303492
3493 response_offset =
3494 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3495 prdt_offset =
3496 offsetof(struct utp_transfer_cmd_desc, prd_table);
3497
3498 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3499 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3500
3501 for (i = 0; i < hba->nutrs; i++) {
3502 /* Configure UTRD with command descriptor base address */
3503 cmd_desc_element_addr =
3504 (cmd_desc_dma_addr + (cmd_desc_size * i));
3505 utrdlp[i].command_desc_base_addr_lo =
3506 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3507 utrdlp[i].command_desc_base_addr_hi =
3508 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3509
3510 /* Response upiu and prdt offset should be in double words */
Christoph Hellwig492001992020-02-21 06:08:11 -08003511 utrdlp[i].response_upiu_offset =
3512 cpu_to_le16(response_offset >> 2);
3513 utrdlp[i].prd_table_offset = cpu_to_le16(prdt_offset >> 2);
3514 utrdlp[i].response_upiu_length =
3515 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303516
Bart Van Assche4d2b8d42020-01-22 19:56:35 -08003517 ufshcd_init_lrb(hba, &hba->lrb[i], i);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303518 }
3519}
3520
3521/**
3522 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3523 * @hba: per adapter instance
3524 *
3525 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3526 * in order to initialize the Unipro link startup procedure.
3527 * Once the Unipro links are up, the device connected to the controller
3528 * is detected.
3529 *
3530 * Returns 0 on success, non-zero value on failure
3531 */
3532static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3533{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303534 struct uic_command uic_cmd = {0};
3535 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303536
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303537 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3538
3539 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3540 if (ret)
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003541 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303542 "dme-link-startup: error code %d\n", ret);
3543 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303544}
3545
Yaniv Gardicad2e032015-03-31 17:37:14 +03003546static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3547{
3548 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3549 unsigned long min_sleep_time_us;
3550
3551 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3552 return;
3553
3554 /*
3555 * last_dme_cmd_tstamp will be 0 only for 1st call to
3556 * this function
3557 */
3558 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3559 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3560 } else {
3561 unsigned long delta =
3562 (unsigned long) ktime_to_us(
3563 ktime_sub(ktime_get(),
3564 hba->last_dme_cmd_tstamp));
3565
3566 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3567 min_sleep_time_us =
3568 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3569 else
3570 return; /* no more delay required */
3571 }
3572
3573 /* allow sleep for extra 50us if needed */
3574 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3575}
3576
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303577/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303578 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3579 * @hba: per adapter instance
3580 * @attr_sel: uic command argument1
3581 * @attr_set: attribute set type as uic command argument2
3582 * @mib_val: setting value as uic command argument3
3583 * @peer: indicate whether peer or local
3584 *
3585 * Returns 0 on success, non-zero value on failure
3586 */
3587int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3588 u8 attr_set, u32 mib_val, u8 peer)
3589{
3590 struct uic_command uic_cmd = {0};
3591 static const char *const action[] = {
3592 "dme-set",
3593 "dme-peer-set"
3594 };
3595 const char *set = action[!!peer];
3596 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003597 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303598
3599 uic_cmd.command = peer ?
3600 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3601 uic_cmd.argument1 = attr_sel;
3602 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3603 uic_cmd.argument3 = mib_val;
3604
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003605 do {
3606 /* for peer attributes we retry upon failure */
3607 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3608 if (ret)
3609 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3610 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3611 } while (ret && peer && --retries);
3612
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003613 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003614 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003615 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3616 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303617
3618 return ret;
3619}
3620EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3621
3622/**
3623 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3624 * @hba: per adapter instance
3625 * @attr_sel: uic command argument1
3626 * @mib_val: the value of the attribute as returned by the UIC command
3627 * @peer: indicate whether peer or local
3628 *
3629 * Returns 0 on success, non-zero value on failure
3630 */
3631int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3632 u32 *mib_val, u8 peer)
3633{
3634 struct uic_command uic_cmd = {0};
3635 static const char *const action[] = {
3636 "dme-get",
3637 "dme-peer-get"
3638 };
3639 const char *get = action[!!peer];
3640 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003641 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003642 struct ufs_pa_layer_attr orig_pwr_info;
3643 struct ufs_pa_layer_attr temp_pwr_info;
3644 bool pwr_mode_change = false;
3645
3646 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3647 orig_pwr_info = hba->pwr_info;
3648 temp_pwr_info = orig_pwr_info;
3649
3650 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3651 orig_pwr_info.pwr_rx == FAST_MODE) {
3652 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3653 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3654 pwr_mode_change = true;
3655 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3656 orig_pwr_info.pwr_rx == SLOW_MODE) {
3657 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3658 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3659 pwr_mode_change = true;
3660 }
3661 if (pwr_mode_change) {
3662 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3663 if (ret)
3664 goto out;
3665 }
3666 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303667
3668 uic_cmd.command = peer ?
3669 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3670 uic_cmd.argument1 = attr_sel;
3671
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003672 do {
3673 /* for peer attributes we retry upon failure */
3674 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3675 if (ret)
3676 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3677 get, UIC_GET_ATTR_ID(attr_sel), ret);
3678 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303679
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003680 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003681 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003682 get, UIC_GET_ATTR_ID(attr_sel),
3683 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003684
3685 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303686 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003687
3688 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3689 && pwr_mode_change)
3690 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303691out:
3692 return ret;
3693}
3694EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3695
3696/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003697 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3698 * state) and waits for it to take effect.
3699 *
3700 * @hba: per adapter instance
3701 * @cmd: UIC command to execute
3702 *
3703 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3704 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3705 * and device UniPro link and hence it's final completion would be indicated by
3706 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3707 * addition to normal UIC command completion Status (UCCS). This function only
3708 * returns after the relevant status bits indicate the completion.
3709 *
3710 * Returns 0 on success, non-zero value on failure
3711 */
3712static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3713{
3714 struct completion uic_async_done;
3715 unsigned long flags;
3716 u8 status;
3717 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003718 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003719
3720 mutex_lock(&hba->uic_cmd_mutex);
3721 init_completion(&uic_async_done);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003722 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003723
3724 spin_lock_irqsave(hba->host->host_lock, flags);
3725 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003726 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3727 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3728 /*
3729 * Make sure UIC command completion interrupt is disabled before
3730 * issuing UIC command.
3731 */
3732 wmb();
3733 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003734 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003735 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3736 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003737 if (ret) {
3738 dev_err(hba->dev,
3739 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3740 cmd->command, cmd->argument3, ret);
3741 goto out;
3742 }
3743
3744 if (!wait_for_completion_timeout(hba->uic_async_done,
3745 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3746 dev_err(hba->dev,
3747 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3748 cmd->command, cmd->argument3);
3749 ret = -ETIMEDOUT;
3750 goto out;
3751 }
3752
3753 status = ufshcd_get_upmcrs(hba);
3754 if (status != PWR_LOCAL) {
3755 dev_err(hba->dev,
Zang Leigang479da362017-09-19 16:50:30 +08003756 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003757 cmd->command, status);
3758 ret = (status != PWR_OK) ? status : -1;
3759 }
3760out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08003761 if (ret) {
3762 ufshcd_print_host_state(hba);
3763 ufshcd_print_pwr_info(hba);
3764 ufshcd_print_host_regs(hba);
3765 }
3766
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003767 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003768 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003769 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003770 if (reenable_intr)
3771 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003772 spin_unlock_irqrestore(hba->host->host_lock, flags);
3773 mutex_unlock(&hba->uic_cmd_mutex);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003774
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003775 return ret;
3776}
3777
3778/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303779 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3780 * using DME_SET primitives.
3781 * @hba: per adapter instance
3782 * @mode: powr mode value
3783 *
3784 * Returns 0 on success, non-zero value on failure
3785 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05303786static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303787{
3788 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003789 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303790
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003791 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3792 ret = ufshcd_dme_set(hba,
3793 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3794 if (ret) {
3795 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3796 __func__, ret);
3797 goto out;
3798 }
3799 }
3800
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303801 uic_cmd.command = UIC_CMD_DME_SET;
3802 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3803 uic_cmd.argument3 = mode;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003804 ufshcd_hold(hba, false);
3805 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3806 ufshcd_release(hba);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303807
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003808out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003809 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003810}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303811
Stanley Chu087c5ef2020-03-27 17:53:28 +08003812int ufshcd_link_recovery(struct ufs_hba *hba)
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003813{
3814 int ret;
3815 unsigned long flags;
3816
3817 spin_lock_irqsave(hba->host->host_lock, flags);
3818 hba->ufshcd_state = UFSHCD_STATE_RESET;
3819 ufshcd_set_eh_in_progress(hba);
3820 spin_unlock_irqrestore(hba->host->host_lock, flags);
3821
Can Guoebdd1df2019-11-14 22:09:24 -08003822 /* Reset the attached device */
3823 ufshcd_vops_device_reset(hba);
3824
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003825 ret = ufshcd_host_reset_and_restore(hba);
3826
3827 spin_lock_irqsave(hba->host->host_lock, flags);
3828 if (ret)
3829 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3830 ufshcd_clear_eh_in_progress(hba);
3831 spin_unlock_irqrestore(hba->host->host_lock, flags);
3832
3833 if (ret)
3834 dev_err(hba->dev, "%s: link recovery failed, err %d",
3835 __func__, ret);
3836
3837 return ret;
3838}
Stanley Chu087c5ef2020-03-27 17:53:28 +08003839EXPORT_SYMBOL_GPL(ufshcd_link_recovery);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003840
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003841static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003842{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003843 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003844 struct uic_command uic_cmd = {0};
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003845 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003846
Kiwoong Kimee32c902016-11-10 21:17:43 +09003847 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3848
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003849 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003850 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003851 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3852 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003853
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003854 if (ret) {
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003855 int err;
3856
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003857 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3858 __func__, ret);
3859
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003860 /*
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003861 * If link recovery fails then return error code returned from
3862 * ufshcd_link_recovery().
3863 * If link recovery succeeds then return -EAGAIN to attempt
3864 * hibern8 enter retry again.
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003865 */
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003866 err = ufshcd_link_recovery(hba);
3867 if (err) {
3868 dev_err(hba->dev, "%s: link recovery failed", __func__);
3869 ret = err;
3870 } else {
3871 ret = -EAGAIN;
3872 }
Kiwoong Kimee32c902016-11-10 21:17:43 +09003873 } else
3874 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3875 POST_CHANGE);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003876
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003877 return ret;
3878}
3879
3880static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3881{
3882 int ret = 0, retries;
3883
3884 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3885 ret = __ufshcd_uic_hibern8_enter(hba);
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003886 if (!ret)
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003887 goto out;
3888 }
3889out:
3890 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003891}
3892
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08003893int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003894{
3895 struct uic_command uic_cmd = {0};
3896 int ret;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003897 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003898
Kiwoong Kimee32c902016-11-10 21:17:43 +09003899 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3900
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003901 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3902 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003903 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3904 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3905
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303906 if (ret) {
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003907 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3908 __func__, ret);
3909 ret = ufshcd_link_recovery(hba);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003910 } else {
Kiwoong Kimee32c902016-11-10 21:17:43 +09003911 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3912 POST_CHANGE);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003913 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3914 hba->ufs_stats.hibern8_exit_cnt++;
3915 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303916
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303917 return ret;
3918}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08003919EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_exit);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303920
Stanley Chuba7af5e2019-12-30 13:32:28 +08003921void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit)
3922{
3923 unsigned long flags;
Can Guobe7594a2020-03-05 00:53:07 -08003924 bool update = false;
Stanley Chuba7af5e2019-12-30 13:32:28 +08003925
Can Guobe7594a2020-03-05 00:53:07 -08003926 if (!ufshcd_is_auto_hibern8_supported(hba))
Stanley Chuba7af5e2019-12-30 13:32:28 +08003927 return;
3928
3929 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guobe7594a2020-03-05 00:53:07 -08003930 if (hba->ahit != ahit) {
3931 hba->ahit = ahit;
3932 update = true;
3933 }
Stanley Chuba7af5e2019-12-30 13:32:28 +08003934 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guobe7594a2020-03-05 00:53:07 -08003935
3936 if (update && !pm_runtime_suspended(hba->dev)) {
3937 pm_runtime_get_sync(hba->dev);
3938 ufshcd_hold(hba, false);
3939 ufshcd_auto_hibern8_enable(hba);
3940 ufshcd_release(hba);
3941 pm_runtime_put(hba->dev);
3942 }
Stanley Chuba7af5e2019-12-30 13:32:28 +08003943}
3944EXPORT_SYMBOL_GPL(ufshcd_auto_hibern8_update);
3945
Can Guo71d848b2019-11-14 22:09:26 -08003946void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
Adrian Hunterad448372018-03-20 15:07:38 +02003947{
3948 unsigned long flags;
3949
Stanley Chuee5f1042019-05-21 14:44:52 +08003950 if (!ufshcd_is_auto_hibern8_supported(hba) || !hba->ahit)
Adrian Hunterad448372018-03-20 15:07:38 +02003951 return;
3952
3953 spin_lock_irqsave(hba->host->host_lock, flags);
3954 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3955 spin_unlock_irqrestore(hba->host->host_lock, flags);
3956}
3957
Yaniv Gardi50646362014-10-23 13:25:13 +03003958 /**
3959 * ufshcd_init_pwr_info - setting the POR (power on reset)
3960 * values in hba power info
3961 * @hba: per-adapter instance
3962 */
3963static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3964{
3965 hba->pwr_info.gear_rx = UFS_PWM_G1;
3966 hba->pwr_info.gear_tx = UFS_PWM_G1;
3967 hba->pwr_info.lane_rx = 1;
3968 hba->pwr_info.lane_tx = 1;
3969 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3970 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3971 hba->pwr_info.hs_rate = 0;
3972}
3973
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303974/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003975 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3976 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303977 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003978static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303979{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003980 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3981
3982 if (hba->max_pwr_info.is_valid)
3983 return 0;
3984
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003985 pwr_info->pwr_tx = FAST_MODE;
3986 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003987 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303988
3989 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003990 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3991 &pwr_info->lane_rx);
3992 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3993 &pwr_info->lane_tx);
3994
3995 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
3996 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
3997 __func__,
3998 pwr_info->lane_rx,
3999 pwr_info->lane_tx);
4000 return -EINVAL;
4001 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304002
4003 /*
4004 * First, get the maximum gears of HS speed.
4005 * If a zero value, it means there is no HSGEAR capability.
4006 * Then, get the maximum gears of PWM speed.
4007 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004008 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
4009 if (!pwr_info->gear_rx) {
4010 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4011 &pwr_info->gear_rx);
4012 if (!pwr_info->gear_rx) {
4013 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
4014 __func__, pwr_info->gear_rx);
4015 return -EINVAL;
4016 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004017 pwr_info->pwr_rx = SLOW_MODE;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304018 }
4019
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004020 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
4021 &pwr_info->gear_tx);
4022 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304023 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004024 &pwr_info->gear_tx);
4025 if (!pwr_info->gear_tx) {
4026 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
4027 __func__, pwr_info->gear_tx);
4028 return -EINVAL;
4029 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004030 pwr_info->pwr_tx = SLOW_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004031 }
4032
4033 hba->max_pwr_info.is_valid = true;
4034 return 0;
4035}
4036
4037static int ufshcd_change_power_mode(struct ufs_hba *hba,
4038 struct ufs_pa_layer_attr *pwr_mode)
4039{
4040 int ret;
4041
4042 /* if already configured to the requested pwr_mode */
4043 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4044 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4045 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4046 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4047 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4048 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4049 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4050 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4051 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304052 }
4053
4054 /*
4055 * Configure attributes for power mode change with below.
4056 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4057 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4058 * - PA_HSSERIES
4059 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004060 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4061 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4062 pwr_mode->lane_rx);
4063 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4064 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304065 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004066 else
4067 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304068
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004069 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4070 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4071 pwr_mode->lane_tx);
4072 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4073 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304074 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004075 else
4076 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304077
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004078 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4079 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4080 pwr_mode->pwr_rx == FAST_MODE ||
4081 pwr_mode->pwr_tx == FAST_MODE)
4082 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4083 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304084
Can Guo08342532019-12-05 02:14:42 +00004085 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
4086 DL_FC0ProtectionTimeOutVal_Default);
4087 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
4088 DL_TC0ReplayTimeOutVal_Default);
4089 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
4090 DL_AFC0ReqTimeOutVal_Default);
4091 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
4092 DL_FC1ProtectionTimeOutVal_Default);
4093 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
4094 DL_TC1ReplayTimeOutVal_Default);
4095 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
4096 DL_AFC1ReqTimeOutVal_Default);
4097
4098 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
4099 DL_FC0ProtectionTimeOutVal_Default);
4100 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
4101 DL_TC0ReplayTimeOutVal_Default);
4102 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
4103 DL_AFC0ReqTimeOutVal_Default);
4104
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004105 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4106 | pwr_mode->pwr_tx);
4107
4108 if (ret) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304109 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004110 "%s: power mode change failed %d\n", __func__, ret);
4111 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004112 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4113 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004114
4115 memcpy(&hba->pwr_info, pwr_mode,
4116 sizeof(struct ufs_pa_layer_attr));
4117 }
4118
4119 return ret;
4120}
4121
4122/**
4123 * ufshcd_config_pwr_mode - configure a new power mode
4124 * @hba: per-adapter instance
4125 * @desired_pwr_mode: desired power configuration
4126 */
Alim Akhtar0d846e72018-05-06 15:44:18 +05304127int ufshcd_config_pwr_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004128 struct ufs_pa_layer_attr *desired_pwr_mode)
4129{
4130 struct ufs_pa_layer_attr final_params = { 0 };
4131 int ret;
4132
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004133 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4134 desired_pwr_mode, &final_params);
4135
4136 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004137 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4138
4139 ret = ufshcd_change_power_mode(hba, &final_params);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304140
4141 return ret;
4142}
Alim Akhtar0d846e72018-05-06 15:44:18 +05304143EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304144
4145/**
Dolev Raviv68078d52013-07-30 00:35:58 +05304146 * ufshcd_complete_dev_init() - checks device readiness
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004147 * @hba: per-adapter instance
Dolev Raviv68078d52013-07-30 00:35:58 +05304148 *
4149 * Set fDeviceInit flag and poll until device toggles it.
4150 */
4151static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4152{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004153 int i;
4154 int err;
Jason Yan7dfdcc32020-04-26 17:43:05 +08004155 bool flag_res = true;
Dolev Raviv68078d52013-07-30 00:35:58 +05304156
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004157 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08004158 QUERY_FLAG_IDN_FDEVICEINIT, 0, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05304159 if (err) {
4160 dev_err(hba->dev,
4161 "%s setting fDeviceInit flag failed with error %d\n",
4162 __func__, err);
4163 goto out;
4164 }
4165
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004166 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4167 for (i = 0; i < 1000 && !err && flag_res; i++)
4168 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08004169 QUERY_FLAG_IDN_FDEVICEINIT, 0, &flag_res);
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004170
Dolev Raviv68078d52013-07-30 00:35:58 +05304171 if (err)
4172 dev_err(hba->dev,
4173 "%s reading fDeviceInit flag failed with error %d\n",
4174 __func__, err);
4175 else if (flag_res)
4176 dev_err(hba->dev,
4177 "%s fDeviceInit was not cleared by the device\n",
4178 __func__);
4179
4180out:
4181 return err;
4182}
4183
4184/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304185 * ufshcd_make_hba_operational - Make UFS controller operational
4186 * @hba: per adapter instance
4187 *
4188 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004189 * 1. Enable required interrupts
4190 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004191 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004192 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304193 *
4194 * Returns 0 on success, non-zero value on failure
4195 */
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004196int ufshcd_make_hba_operational(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304197{
4198 int err = 0;
4199 u32 reg;
4200
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304201 /* Enable required interrupts */
4202 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4203
4204 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004205 if (ufshcd_is_intr_aggr_allowed(hba))
4206 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4207 else
4208 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304209
4210 /* Configure UTRL and UTMRL base address registers */
4211 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4212 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4213 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4214 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4215 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4216 REG_UTP_TASK_REQ_LIST_BASE_L);
4217 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4218 REG_UTP_TASK_REQ_LIST_BASE_H);
4219
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304220 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004221 * Make sure base address and interrupt setup are updated before
4222 * enabling the run/stop registers below.
4223 */
4224 wmb();
4225
4226 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304227 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304228 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004229 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304230 if (!(ufshcd_get_lists_status(reg))) {
4231 ufshcd_enable_run_stop_reg(hba);
4232 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304233 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304234 "Host controller not ready to process requests");
4235 err = -EIO;
4236 goto out;
4237 }
4238
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304239out:
4240 return err;
4241}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004242EXPORT_SYMBOL_GPL(ufshcd_make_hba_operational);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304243
4244/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02004245 * ufshcd_hba_stop - Send controller to reset state
4246 * @hba: per adapter instance
Yaniv Gardi596585a2016-03-10 17:37:08 +02004247 */
Bart Van Assche5cac1092020-05-07 15:27:50 -07004248static inline void ufshcd_hba_stop(struct ufs_hba *hba)
Yaniv Gardi596585a2016-03-10 17:37:08 +02004249{
Bart Van Assche5cac1092020-05-07 15:27:50 -07004250 unsigned long flags;
Yaniv Gardi596585a2016-03-10 17:37:08 +02004251 int err;
4252
Bart Van Assche5cac1092020-05-07 15:27:50 -07004253 /*
4254 * Obtain the host lock to prevent that the controller is disabled
4255 * while the UFS interrupt handler is active on another CPU.
4256 */
4257 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02004258 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
Bart Van Assche5cac1092020-05-07 15:27:50 -07004259 spin_unlock_irqrestore(hba->host->host_lock, flags);
4260
Yaniv Gardi596585a2016-03-10 17:37:08 +02004261 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4262 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
Bart Van Assche5cac1092020-05-07 15:27:50 -07004263 10, 1);
Yaniv Gardi596585a2016-03-10 17:37:08 +02004264 if (err)
4265 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4266}
4267
4268/**
Christoph Hellwig492001992020-02-21 06:08:11 -08004269 * ufshcd_hba_enable - initialize the controller
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304270 * @hba: per adapter instance
4271 *
4272 * The controller resets itself and controller firmware initialization
4273 * sequence kicks off. When controller is ready it will set
4274 * the Host Controller Enable bit to 1.
4275 *
4276 * Returns 0 on success, non-zero value on failure
4277 */
Christoph Hellwig492001992020-02-21 06:08:11 -08004278int ufshcd_hba_enable(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304279{
4280 int retry;
4281
Yaniv Gardi596585a2016-03-10 17:37:08 +02004282 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304283 /* change controller state to "reset state" */
Bart Van Assche5cac1092020-05-07 15:27:50 -07004284 ufshcd_hba_stop(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304285
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004286 /* UniPro link is disabled at this point */
4287 ufshcd_set_link_off(hba);
4288
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004289 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004290
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304291 /* start controller initialization sequence */
4292 ufshcd_hba_start(hba);
4293
4294 /*
4295 * To initialize a UFS host controller HCE bit must be set to 1.
4296 * During initialization the HCE bit value changes from 1->0->1.
4297 * When the host controller completes initialization sequence
4298 * it sets the value of HCE bit to 1. The same HCE bit is read back
4299 * to check if the controller has completed initialization sequence.
4300 * So without this delay the value HCE = 1, set in the previous
4301 * instruction might be read back.
4302 * This delay can be changed based on the controller.
4303 */
Stanley Chu90b84912020-05-09 17:37:13 +08004304 ufshcd_delay_us(hba->vps->hba_enable_delay_us, 100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304305
4306 /* wait for the host controller to complete initialization */
Stanley Chu9fc305e2020-03-18 18:40:15 +08004307 retry = 50;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304308 while (ufshcd_is_hba_active(hba)) {
4309 if (retry) {
4310 retry--;
4311 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304312 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304313 "Controller enable failed\n");
4314 return -EIO;
4315 }
Stanley Chu9fc305e2020-03-18 18:40:15 +08004316 usleep_range(1000, 1100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304317 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004318
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004319 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004320 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004321
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004322 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004323
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304324 return 0;
4325}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004326EXPORT_SYMBOL_GPL(ufshcd_hba_enable);
4327
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004328static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4329{
Stanley Chuba0320f2020-03-18 18:40:10 +08004330 int tx_lanes = 0, i, err = 0;
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004331
4332 if (!peer)
4333 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4334 &tx_lanes);
4335 else
4336 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4337 &tx_lanes);
4338 for (i = 0; i < tx_lanes; i++) {
4339 if (!peer)
4340 err = ufshcd_dme_set(hba,
4341 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4342 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4343 0);
4344 else
4345 err = ufshcd_dme_peer_set(hba,
4346 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4347 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4348 0);
4349 if (err) {
4350 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4351 __func__, peer, i, err);
4352 break;
4353 }
4354 }
4355
4356 return err;
4357}
4358
4359static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4360{
4361 return ufshcd_disable_tx_lcc(hba, true);
4362}
4363
Stanley Chua5fe372d2020-01-04 22:26:07 +08004364void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist,
4365 u32 reg)
Stanley Chu8808b4e2019-07-10 21:38:21 +08004366{
4367 reg_hist->reg[reg_hist->pos] = reg;
4368 reg_hist->tstamp[reg_hist->pos] = ktime_get();
4369 reg_hist->pos = (reg_hist->pos + 1) % UFS_ERR_REG_HIST_LENGTH;
4370}
Stanley Chua5fe372d2020-01-04 22:26:07 +08004371EXPORT_SYMBOL_GPL(ufshcd_update_reg_hist);
Stanley Chu8808b4e2019-07-10 21:38:21 +08004372
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304373/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304374 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304375 * @hba: per adapter instance
4376 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304377 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304378 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304379static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304380{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304381 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004382 int retries = DME_LINKSTARTUP_RETRIES;
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004383 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304384
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004385 /*
4386 * If UFS device isn't active then we will have to issue link startup
4387 * 2 times to make sure the device state move to active.
4388 */
4389 if (!ufshcd_is_ufs_dev_active(hba))
4390 link_startup_again = true;
4391
4392link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004393 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004394 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304395
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004396 ret = ufshcd_dme_link_startup(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004397
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004398 /* check if device is detected by inter-connect layer */
4399 if (!ret && !ufshcd_is_device_present(hba)) {
Stanley Chu8808b4e2019-07-10 21:38:21 +08004400 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4401 0);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004402 dev_err(hba->dev, "%s: Device not present\n", __func__);
4403 ret = -ENXIO;
4404 goto out;
4405 }
4406
4407 /*
4408 * DME link lost indication is only received when link is up,
4409 * but we can't be sure if the link is up until link startup
4410 * succeeds. So reset the local Uni-Pro and try again.
4411 */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004412 if (ret && ufshcd_hba_enable(hba)) {
4413 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4414 (u32)ret);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004415 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004416 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004417 } while (ret && retries--);
4418
Stanley Chu8808b4e2019-07-10 21:38:21 +08004419 if (ret) {
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004420 /* failed to get the link up... retire */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004421 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4422 (u32)ret);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304423 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004424 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304425
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004426 if (link_startup_again) {
4427 link_startup_again = false;
4428 retries = DME_LINKSTARTUP_RETRIES;
4429 goto link_startup;
4430 }
4431
subhashj@codeaurora.orgd2aebb92016-12-22 18:41:33 -08004432 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4433 ufshcd_init_pwr_info(hba);
4434 ufshcd_print_pwr_info(hba);
4435
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004436 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4437 ret = ufshcd_disable_device_tx_lcc(hba);
4438 if (ret)
4439 goto out;
4440 }
4441
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004442 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004443 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4444 if (ret)
4445 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004446
4447 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304448out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004449 if (ret) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304450 dev_err(hba->dev, "link startup failed %d\n", ret);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004451 ufshcd_print_host_state(hba);
4452 ufshcd_print_pwr_info(hba);
4453 ufshcd_print_host_regs(hba);
4454 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304455 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304456}
4457
4458/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304459 * ufshcd_verify_dev_init() - Verify device initialization
4460 * @hba: per-adapter instance
4461 *
4462 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4463 * device Transport Protocol (UTP) layer is ready after a reset.
4464 * If the UTP layer at the device side is not initialized, it may
4465 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4466 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4467 */
4468static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4469{
4470 int err = 0;
4471 int retries;
4472
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004473 ufshcd_hold(hba, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304474 mutex_lock(&hba->dev_cmd.lock);
4475 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4476 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4477 NOP_OUT_TIMEOUT);
4478
4479 if (!err || err == -ETIMEDOUT)
4480 break;
4481
4482 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4483 }
4484 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004485 ufshcd_release(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304486
4487 if (err)
4488 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4489 return err;
4490}
4491
4492/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004493 * ufshcd_set_queue_depth - set lun queue depth
4494 * @sdev: pointer to SCSI device
4495 *
4496 * Read bLUQueueDepth value and activate scsi tagged command
4497 * queueing. For WLUN, queue depth is set to 1. For best-effort
4498 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4499 * value that host can queue.
4500 */
4501static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4502{
4503 int ret = 0;
4504 u8 lun_qdepth;
4505 struct ufs_hba *hba;
4506
4507 hba = shost_priv(sdev->host);
4508
4509 lun_qdepth = hba->nutrs;
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02004510 ret = ufshcd_read_unit_desc_param(hba,
4511 ufshcd_scsi_to_upiu_lun(sdev->lun),
4512 UNIT_DESC_PARAM_LU_Q_DEPTH,
4513 &lun_qdepth,
4514 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004515
4516 /* Some WLUN doesn't support unit descriptor */
4517 if (ret == -EOPNOTSUPP)
4518 lun_qdepth = 1;
4519 else if (!lun_qdepth)
4520 /* eventually, we can figure out the real queue depth */
4521 lun_qdepth = hba->nutrs;
4522 else
4523 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4524
4525 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4526 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004527 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004528}
4529
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004530/*
4531 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4532 * @hba: per-adapter instance
4533 * @lun: UFS device lun id
4534 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4535 *
4536 * Returns 0 in case of success and b_lu_write_protect status would be returned
4537 * @b_lu_write_protect parameter.
4538 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4539 * Returns -EINVAL in case of invalid parameters passed to this function.
4540 */
4541static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4542 u8 lun,
4543 u8 *b_lu_write_protect)
4544{
4545 int ret;
4546
4547 if (!b_lu_write_protect)
4548 ret = -EINVAL;
4549 /*
4550 * According to UFS device spec, RPMB LU can't be write
4551 * protected so skip reading bLUWriteProtect parameter for
4552 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4553 */
Bean Huo1baa8012020-01-20 14:08:20 +01004554 else if (lun >= hba->dev_info.max_lu_supported)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004555 ret = -ENOTSUPP;
4556 else
4557 ret = ufshcd_read_unit_desc_param(hba,
4558 lun,
4559 UNIT_DESC_PARAM_LU_WR_PROTECT,
4560 b_lu_write_protect,
4561 sizeof(*b_lu_write_protect));
4562 return ret;
4563}
4564
4565/**
4566 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4567 * status
4568 * @hba: per-adapter instance
4569 * @sdev: pointer to SCSI device
4570 *
4571 */
4572static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4573 struct scsi_device *sdev)
4574{
4575 if (hba->dev_info.f_power_on_wp_en &&
4576 !hba->dev_info.is_lu_power_on_wp) {
4577 u8 b_lu_write_protect;
4578
4579 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4580 &b_lu_write_protect) &&
4581 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4582 hba->dev_info.is_lu_power_on_wp = true;
4583 }
4584}
4585
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004586/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304587 * ufshcd_slave_alloc - handle initial SCSI device configurations
4588 * @sdev: pointer to SCSI device
4589 *
4590 * Returns success
4591 */
4592static int ufshcd_slave_alloc(struct scsi_device *sdev)
4593{
4594 struct ufs_hba *hba;
4595
4596 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304597
4598 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4599 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304600
Can Guoa3a76392019-12-05 02:14:30 +00004601 /* DBD field should be set to 1 in mode sense(10) */
4602 sdev->set_dbd_for_ms = 1;
4603
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304604 /* allow SCSI layer to restart the device in case of errors */
4605 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004606
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004607 /* REPORT SUPPORTED OPERATION CODES is not supported */
4608 sdev->no_report_opcodes = 1;
4609
Sujit Reddy Thumma84af7e82018-01-24 09:52:35 +05304610 /* WRITE_SAME command is not supported */
4611 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004612
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004613 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004614
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004615 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4616
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004617 return 0;
4618}
4619
4620/**
4621 * ufshcd_change_queue_depth - change queue depth
4622 * @sdev: pointer to SCSI device
4623 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004624 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004625 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004626 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004627static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004628{
4629 struct ufs_hba *hba = shost_priv(sdev->host);
4630
4631 if (depth > hba->nutrs)
4632 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004633 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304634}
4635
4636/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004637 * ufshcd_slave_configure - adjust SCSI device configurations
4638 * @sdev: pointer to SCSI device
4639 */
4640static int ufshcd_slave_configure(struct scsi_device *sdev)
4641{
Stanley Chu49615ba2019-09-16 23:56:50 +08004642 struct ufs_hba *hba = shost_priv(sdev->host);
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004643 struct request_queue *q = sdev->request_queue;
4644
4645 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
Stanley Chu49615ba2019-09-16 23:56:50 +08004646
4647 if (ufshcd_is_rpm_autosuspend_allowed(hba))
4648 sdev->rpm_autosuspend = 1;
4649
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004650 return 0;
4651}
4652
4653/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304654 * ufshcd_slave_destroy - remove SCSI device configurations
4655 * @sdev: pointer to SCSI device
4656 */
4657static void ufshcd_slave_destroy(struct scsi_device *sdev)
4658{
4659 struct ufs_hba *hba;
4660
4661 hba = shost_priv(sdev->host);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004662 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004663 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4664 unsigned long flags;
4665
4666 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004667 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004668 spin_unlock_irqrestore(hba->host->host_lock, flags);
4669 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304670}
4671
4672/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304673 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004674 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304675 * @scsi_status: SCSI command status
4676 *
4677 * Returns value base on SCSI command status
4678 */
4679static inline int
4680ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4681{
4682 int result = 0;
4683
4684 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304685 case SAM_STAT_CHECK_CONDITION:
4686 ufshcd_copy_sense_data(lrbp);
Tomas Winkler30eb2e42018-11-26 10:10:34 +02004687 /* fallthrough */
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304688 case SAM_STAT_GOOD:
4689 result |= DID_OK << 16 |
4690 COMMAND_COMPLETE << 8 |
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304691 scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304692 break;
4693 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304694 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304695 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304696 ufshcd_copy_sense_data(lrbp);
4697 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304698 break;
4699 default:
4700 result |= DID_ERROR << 16;
4701 break;
4702 } /* end of switch */
4703
4704 return result;
4705}
4706
4707/**
4708 * ufshcd_transfer_rsp_status - Get overall status of the response
4709 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004710 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304711 *
4712 * Returns result of the command to notify SCSI midlayer
4713 */
4714static inline int
4715ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4716{
4717 int result = 0;
4718 int scsi_status;
4719 int ocs;
4720
4721 /* overall command status of utrd */
4722 ocs = ufshcd_get_tr_ocs(lrbp);
4723
4724 switch (ocs) {
4725 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304726 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004727 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304728 switch (result) {
4729 case UPIU_TRANSACTION_RESPONSE:
4730 /*
4731 * get the response UPIU result to extract
4732 * the SCSI command status
4733 */
4734 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4735
4736 /*
4737 * get the result based on SCSI status response
4738 * to notify the SCSI midlayer of the command status
4739 */
4740 scsi_status = result & MASK_SCSI_STATUS;
4741 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304742
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02004743 /*
4744 * Currently we are only supporting BKOPs exception
4745 * events hence we can ignore BKOPs exception event
4746 * during power management callbacks. BKOPs exception
4747 * event is not expected to be raised in runtime suspend
4748 * callback as it allows the urgent bkops.
4749 * During system suspend, we are anyway forcefully
4750 * disabling the bkops and if urgent bkops is needed
4751 * it will be enabled on system resume. Long term
4752 * solution could be to abort the system suspend if
4753 * UFS device needs urgent BKOPs.
4754 */
4755 if (!hba->pm_op_in_progress &&
Sayali Lokhande2824ec92020-02-10 19:40:44 -08004756 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr) &&
4757 schedule_work(&hba->eeh_work)) {
4758 /*
4759 * Prevent suspend once eeh_work is scheduled
4760 * to avoid deadlock between ufshcd_suspend
4761 * and exception event handler.
4762 */
4763 pm_runtime_get_noresume(hba->dev);
4764 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304765 break;
4766 case UPIU_TRANSACTION_REJECT_UPIU:
4767 /* TODO: handle Reject UPIU Response */
4768 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304769 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304770 "Reject UPIU not fully implemented\n");
4771 break;
4772 default:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304773 dev_err(hba->dev,
4774 "Unexpected request response code = %x\n",
4775 result);
Stanley Chue0347d82019-04-15 20:23:38 +08004776 result = DID_ERROR << 16;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304777 break;
4778 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304779 break;
4780 case OCS_ABORTED:
4781 result |= DID_ABORT << 16;
4782 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304783 case OCS_INVALID_COMMAND_STATUS:
4784 result |= DID_REQUEUE << 16;
4785 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304786 case OCS_INVALID_CMD_TABLE_ATTR:
4787 case OCS_INVALID_PRDT_ATTR:
4788 case OCS_MISMATCH_DATA_BUF_SIZE:
4789 case OCS_MISMATCH_RESP_UPIU_SIZE:
4790 case OCS_PEER_COMM_FAILURE:
4791 case OCS_FATAL_ERROR:
4792 default:
4793 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304794 dev_err(hba->dev,
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004795 "OCS error from controller = %x for tag %d\n",
4796 ocs, lrbp->task_tag);
4797 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08004798 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304799 break;
4800 } /* end of switch */
4801
Can Guo2df74b62019-11-25 22:53:33 -08004802 if ((host_byte(result) != DID_OK) && !hba->silence_err_logs)
Dolev Raviv66cc8202016-12-22 18:39:42 -08004803 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304804 return result;
4805}
4806
4807/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304808 * ufshcd_uic_cmd_compl - handle completion of uic command
4809 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304810 * @intr_status: interrupt status generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004811 *
4812 * Returns
4813 * IRQ_HANDLED - If interrupt is valid
4814 * IRQ_NONE - If invalid interrupt
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304815 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004816static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304817{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004818 irqreturn_t retval = IRQ_NONE;
4819
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304820 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304821 hba->active_uic_cmd->argument2 |=
4822 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304823 hba->active_uic_cmd->argument3 =
4824 ufshcd_get_dme_attr_val(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304825 complete(&hba->active_uic_cmd->done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004826 retval = IRQ_HANDLED;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304827 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304828
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004829 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004830 complete(hba->uic_async_done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004831 retval = IRQ_HANDLED;
4832 }
4833 return retval;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304834}
4835
4836/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004837 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304838 * @hba: per adapter instance
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004839 * @completed_reqs: requests to complete
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304840 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004841static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4842 unsigned long completed_reqs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304843{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304844 struct ufshcd_lrb *lrbp;
4845 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304846 int result;
4847 int index;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004848
Dolev Ravive9d501b2014-07-01 12:22:37 +03004849 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4850 lrbp = &hba->lrb[index];
4851 cmd = lrbp->cmd;
4852 if (cmd) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004853 ufshcd_add_command_trace(hba, index, "complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004854 result = ufshcd_transfer_rsp_status(hba, lrbp);
4855 scsi_dma_unmap(cmd);
4856 cmd->result = result;
4857 /* Mark completed command as NULL in LRB */
4858 lrbp->cmd = NULL;
Can Guo74a527a2019-11-25 22:53:32 -08004859 lrbp->compl_time_stamp = ktime_get();
Dolev Ravive9d501b2014-07-01 12:22:37 +03004860 /* Do not touch lrbp after scsi done */
4861 cmd->scsi_done(cmd);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004862 __ufshcd_release(hba);
Joao Pinto300bb132016-05-11 12:21:27 +01004863 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4864 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
Can Guo74a527a2019-11-25 22:53:32 -08004865 lrbp->compl_time_stamp = ktime_get();
Lee Susman1a07f2d2016-12-22 18:42:03 -08004866 if (hba->dev_cmd.complete) {
4867 ufshcd_add_command_trace(hba, index,
4868 "dev_complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004869 complete(hba->dev_cmd.complete);
Lee Susman1a07f2d2016-12-22 18:42:03 -08004870 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03004871 }
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08004872 if (ufshcd_is_clkscaling_supported(hba))
4873 hba->clk_scaling.active_reqs--;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004874 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304875
4876 /* clear corresponding bits of completed commands */
4877 hba->outstanding_reqs ^= completed_reqs;
4878
Sahitya Tummala856b3482014-09-25 15:32:34 +03004879 ufshcd_clk_scaling_update_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304880}
4881
4882/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004883 * ufshcd_transfer_req_compl - handle SCSI and query command completion
4884 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004885 *
4886 * Returns
4887 * IRQ_HANDLED - If interrupt is valid
4888 * IRQ_NONE - If invalid interrupt
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004889 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004890static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba)
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004891{
4892 unsigned long completed_reqs;
4893 u32 tr_doorbell;
4894
4895 /* Resetting interrupt aggregation counters first and reading the
4896 * DOOR_BELL afterward allows us to handle all the completed requests.
4897 * In order to prevent other interrupts starvation the DB is read once
4898 * after reset. The down side of this solution is the possibility of
4899 * false interrupt if device completes another request after resetting
4900 * aggregation and before reading the DB.
4901 */
Christoph Hellwig492001992020-02-21 06:08:11 -08004902 if (ufshcd_is_intr_aggr_allowed(hba))
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004903 ufshcd_reset_intr_aggr(hba);
4904
4905 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4906 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4907
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004908 if (completed_reqs) {
4909 __ufshcd_transfer_req_compl(hba, completed_reqs);
4910 return IRQ_HANDLED;
4911 } else {
4912 return IRQ_NONE;
4913 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004914}
4915
4916/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304917 * ufshcd_disable_ee - disable exception event
4918 * @hba: per-adapter instance
4919 * @mask: exception event to disable
4920 *
4921 * Disables exception event in the device so that the EVENT_ALERT
4922 * bit is not set.
4923 *
4924 * Returns zero on success, non-zero error value on failure.
4925 */
4926static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4927{
4928 int err = 0;
4929 u32 val;
4930
4931 if (!(hba->ee_ctrl_mask & mask))
4932 goto out;
4933
4934 val = hba->ee_ctrl_mask & ~mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004935 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004936 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304937 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4938 if (!err)
4939 hba->ee_ctrl_mask &= ~mask;
4940out:
4941 return err;
4942}
4943
4944/**
4945 * ufshcd_enable_ee - enable exception event
4946 * @hba: per-adapter instance
4947 * @mask: exception event to enable
4948 *
4949 * Enable corresponding exception event in the device to allow
4950 * device to alert host in critical scenarios.
4951 *
4952 * Returns zero on success, non-zero error value on failure.
4953 */
4954static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4955{
4956 int err = 0;
4957 u32 val;
4958
4959 if (hba->ee_ctrl_mask & mask)
4960 goto out;
4961
4962 val = hba->ee_ctrl_mask | mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004963 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004964 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304965 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4966 if (!err)
4967 hba->ee_ctrl_mask |= mask;
4968out:
4969 return err;
4970}
4971
4972/**
4973 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4974 * @hba: per-adapter instance
4975 *
4976 * Allow device to manage background operations on its own. Enabling
4977 * this might lead to inconsistent latencies during normal data transfers
4978 * as the device is allowed to manage its own way of handling background
4979 * operations.
4980 *
4981 * Returns zero on success, non-zero on failure.
4982 */
4983static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4984{
4985 int err = 0;
4986
4987 if (hba->auto_bkops_enabled)
4988 goto out;
4989
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004990 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08004991 QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304992 if (err) {
4993 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4994 __func__, err);
4995 goto out;
4996 }
4997
4998 hba->auto_bkops_enabled = true;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08004999 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305000
5001 /* No need of URGENT_BKOPS exception from the device */
5002 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5003 if (err)
5004 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
5005 __func__, err);
5006out:
5007 return err;
5008}
5009
5010/**
5011 * ufshcd_disable_auto_bkops - block device in doing background operations
5012 * @hba: per-adapter instance
5013 *
5014 * Disabling background operations improves command response latency but
5015 * has drawback of device moving into critical state where the device is
5016 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
5017 * host is idle so that BKOPS are managed effectively without any negative
5018 * impacts.
5019 *
5020 * Returns zero on success, non-zero on failure.
5021 */
5022static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5023{
5024 int err = 0;
5025
5026 if (!hba->auto_bkops_enabled)
5027 goto out;
5028
5029 /*
5030 * If host assisted BKOPs is to be enabled, make sure
5031 * urgent bkops exception is allowed.
5032 */
5033 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5034 if (err) {
5035 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5036 __func__, err);
5037 goto out;
5038 }
5039
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005040 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08005041 QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305042 if (err) {
5043 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5044 __func__, err);
5045 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5046 goto out;
5047 }
5048
5049 hba->auto_bkops_enabled = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08005050 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
Asutosh Das24366c2a2019-11-25 22:53:30 -08005051 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305052out:
5053 return err;
5054}
5055
5056/**
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005057 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305058 * @hba: per adapter instance
5059 *
5060 * After a device reset the device may toggle the BKOPS_EN flag
5061 * to default value. The s/w tracking variables should be updated
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005062 * as well. This function would change the auto-bkops state based on
5063 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305064 */
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005065static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305066{
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005067 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5068 hba->auto_bkops_enabled = false;
5069 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5070 ufshcd_enable_auto_bkops(hba);
5071 } else {
5072 hba->auto_bkops_enabled = true;
5073 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5074 ufshcd_disable_auto_bkops(hba);
5075 }
Asutosh Das24366c2a2019-11-25 22:53:30 -08005076 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305077}
5078
5079static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5080{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005081 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305082 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5083}
5084
5085/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005086 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5087 * @hba: per-adapter instance
5088 * @status: bkops_status value
5089 *
5090 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5091 * flag in the device to permit background operations if the device
5092 * bkops_status is greater than or equal to "status" argument passed to
5093 * this function, disable otherwise.
5094 *
5095 * Returns 0 for success, non-zero in case of failure.
5096 *
5097 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5098 * to know whether auto bkops is enabled or disabled after this function
5099 * returns control to it.
5100 */
5101static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5102 enum bkops_status status)
5103{
5104 int err;
5105 u32 curr_status = 0;
5106
5107 err = ufshcd_get_bkops_status(hba, &curr_status);
5108 if (err) {
5109 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5110 __func__, err);
5111 goto out;
5112 } else if (curr_status > BKOPS_STATUS_MAX) {
5113 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5114 __func__, curr_status);
5115 err = -EINVAL;
5116 goto out;
5117 }
5118
5119 if (curr_status >= status)
5120 err = ufshcd_enable_auto_bkops(hba);
5121 else
5122 err = ufshcd_disable_auto_bkops(hba);
Asutosh Das24366c2a2019-11-25 22:53:30 -08005123 hba->urgent_bkops_lvl = curr_status;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005124out:
5125 return err;
5126}
5127
5128/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305129 * ufshcd_urgent_bkops - handle urgent bkops exception event
5130 * @hba: per-adapter instance
5131 *
5132 * Enable fBackgroundOpsEn flag in the device to permit background
5133 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005134 *
5135 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5136 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305137 */
5138static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5139{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005140 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305141}
5142
5143static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5144{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005145 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305146 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5147}
5148
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005149static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5150{
5151 int err;
5152 u32 curr_status = 0;
5153
5154 if (hba->is_urgent_bkops_lvl_checked)
5155 goto enable_auto_bkops;
5156
5157 err = ufshcd_get_bkops_status(hba, &curr_status);
5158 if (err) {
5159 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5160 __func__, err);
5161 goto out;
5162 }
5163
5164 /*
5165 * We are seeing that some devices are raising the urgent bkops
5166 * exception events even when BKOPS status doesn't indicate performace
5167 * impacted or critical. Handle these device by determining their urgent
5168 * bkops status at runtime.
5169 */
5170 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5171 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5172 __func__, curr_status);
5173 /* update the current status as the urgent bkops level */
5174 hba->urgent_bkops_lvl = curr_status;
5175 hba->is_urgent_bkops_lvl_checked = true;
5176 }
5177
5178enable_auto_bkops:
5179 err = ufshcd_enable_auto_bkops(hba);
5180out:
5181 if (err < 0)
5182 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5183 __func__, err);
5184}
5185
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005186static int ufshcd_wb_ctrl(struct ufs_hba *hba, bool enable)
5187{
5188 int ret;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005189 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005190 enum query_opcode opcode;
5191
Stanley Chu79e35202020-05-08 16:01:15 +08005192 if (!ufshcd_is_wb_allowed(hba))
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005193 return 0;
5194
5195 if (!(enable ^ hba->wb_enabled))
5196 return 0;
5197 if (enable)
5198 opcode = UPIU_QUERY_OPCODE_SET_FLAG;
5199 else
5200 opcode = UPIU_QUERY_OPCODE_CLEAR_FLAG;
5201
Stanley Chue31011a2020-05-22 16:32:11 +08005202 index = ufshcd_wb_get_query_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005203 ret = ufshcd_query_flag_retry(hba, opcode,
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005204 QUERY_FLAG_IDN_WB_EN, index, NULL);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005205 if (ret) {
5206 dev_err(hba->dev, "%s write booster %s failed %d\n",
5207 __func__, enable ? "enable" : "disable", ret);
5208 return ret;
5209 }
5210
5211 hba->wb_enabled = enable;
5212 dev_dbg(hba->dev, "%s write booster %s %d\n",
5213 __func__, enable ? "enable" : "disable", ret);
5214
5215 return ret;
5216}
5217
5218static int ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set)
5219{
5220 int val;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005221 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005222
5223 if (set)
5224 val = UPIU_QUERY_OPCODE_SET_FLAG;
5225 else
5226 val = UPIU_QUERY_OPCODE_CLEAR_FLAG;
5227
Stanley Chue31011a2020-05-22 16:32:11 +08005228 index = ufshcd_wb_get_query_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005229 return ufshcd_query_flag_retry(hba, val,
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005230 QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8,
5231 index, NULL);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005232}
5233
5234static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable)
5235{
5236 if (enable)
5237 ufshcd_wb_buf_flush_enable(hba);
5238 else
5239 ufshcd_wb_buf_flush_disable(hba);
5240
5241}
5242
5243static int ufshcd_wb_buf_flush_enable(struct ufs_hba *hba)
5244{
5245 int ret;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005246 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005247
Stanley Chu79e35202020-05-08 16:01:15 +08005248 if (!ufshcd_is_wb_allowed(hba) || hba->wb_buf_flush_enabled)
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005249 return 0;
5250
Stanley Chue31011a2020-05-22 16:32:11 +08005251 index = ufshcd_wb_get_query_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005252 ret = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08005253 QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN,
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005254 index, NULL);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005255 if (ret)
5256 dev_err(hba->dev, "%s WB - buf flush enable failed %d\n",
5257 __func__, ret);
5258 else
5259 hba->wb_buf_flush_enabled = true;
5260
5261 dev_dbg(hba->dev, "WB - Flush enabled: %d\n", ret);
5262 return ret;
5263}
5264
5265static int ufshcd_wb_buf_flush_disable(struct ufs_hba *hba)
5266{
5267 int ret;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005268 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005269
Stanley Chu79e35202020-05-08 16:01:15 +08005270 if (!ufshcd_is_wb_allowed(hba) || !hba->wb_buf_flush_enabled)
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005271 return 0;
5272
Stanley Chue31011a2020-05-22 16:32:11 +08005273 index = ufshcd_wb_get_query_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005274 ret = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005275 QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN,
5276 index, NULL);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005277 if (ret) {
5278 dev_warn(hba->dev, "%s: WB - buf flush disable failed %d\n",
5279 __func__, ret);
5280 } else {
5281 hba->wb_buf_flush_enabled = false;
5282 dev_dbg(hba->dev, "WB - Flush disabled: %d\n", ret);
5283 }
5284
5285 return ret;
5286}
5287
5288static bool ufshcd_wb_presrv_usrspc_keep_vcc_on(struct ufs_hba *hba,
5289 u32 avail_buf)
5290{
5291 u32 cur_buf;
5292 int ret;
Stanley Chue31011a2020-05-22 16:32:11 +08005293 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005294
Stanley Chue31011a2020-05-22 16:32:11 +08005295 index = ufshcd_wb_get_query_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005296 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5297 QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE,
Stanley Chue31011a2020-05-22 16:32:11 +08005298 index, 0, &cur_buf);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005299 if (ret) {
5300 dev_err(hba->dev, "%s dCurWriteBoosterBufferSize read failed %d\n",
5301 __func__, ret);
5302 return false;
5303 }
5304
5305 if (!cur_buf) {
5306 dev_info(hba->dev, "dCurWBBuf: %d WB disabled until free-space is available\n",
5307 cur_buf);
5308 return false;
5309 }
Stanley Chud14734ae2020-05-09 17:37:15 +08005310 /* Let it continue to flush when available buffer exceeds threshold */
5311 if (avail_buf < hba->vps->wb_flush_threshold)
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005312 return true;
5313
5314 return false;
5315}
5316
5317static bool ufshcd_wb_keep_vcc_on(struct ufs_hba *hba)
5318{
5319 int ret;
5320 u32 avail_buf;
Stanley Chue31011a2020-05-22 16:32:11 +08005321 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005322
Stanley Chu79e35202020-05-08 16:01:15 +08005323 if (!ufshcd_is_wb_allowed(hba))
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005324 return false;
5325 /*
5326 * The ufs device needs the vcc to be ON to flush.
5327 * With user-space reduction enabled, it's enough to enable flush
5328 * by checking only the available buffer. The threshold
5329 * defined here is > 90% full.
5330 * With user-space preserved enabled, the current-buffer
5331 * should be checked too because the wb buffer size can reduce
5332 * when disk tends to be full. This info is provided by current
5333 * buffer (dCurrentWriteBoosterBufferSize). There's no point in
5334 * keeping vcc on when current buffer is empty.
5335 */
Stanley Chue31011a2020-05-22 16:32:11 +08005336 index = ufshcd_wb_get_query_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005337 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5338 QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE,
Stanley Chue31011a2020-05-22 16:32:11 +08005339 index, 0, &avail_buf);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005340 if (ret) {
5341 dev_warn(hba->dev, "%s dAvailableWriteBoosterBufferSize read failed %d\n",
5342 __func__, ret);
5343 return false;
5344 }
5345
5346 if (!hba->dev_info.b_presrv_uspc_en) {
Stanley Chud14734ae2020-05-09 17:37:15 +08005347 if (avail_buf <= UFS_WB_BUF_REMAIN_PERCENT(10))
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005348 return true;
5349 return false;
5350 }
5351
5352 return ufshcd_wb_presrv_usrspc_keep_vcc_on(hba, avail_buf);
5353}
5354
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305355/**
5356 * ufshcd_exception_event_handler - handle exceptions raised by device
5357 * @work: pointer to work data
5358 *
5359 * Read bExceptionEventStatus attribute from the device and handle the
5360 * exception event accordingly.
5361 */
5362static void ufshcd_exception_event_handler(struct work_struct *work)
5363{
5364 struct ufs_hba *hba;
5365 int err;
5366 u32 status = 0;
5367 hba = container_of(work, struct ufs_hba, eeh_work);
5368
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305369 pm_runtime_get_sync(hba->dev);
Stanley Chu03e1d282019-12-24 21:01:05 +08005370 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305371 err = ufshcd_get_ee_status(hba, &status);
5372 if (err) {
5373 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5374 __func__, err);
5375 goto out;
5376 }
5377
5378 status &= hba->ee_ctrl_mask;
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005379
5380 if (status & MASK_EE_URGENT_BKOPS)
5381 ufshcd_bkops_exception_event_handler(hba);
5382
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305383out:
Stanley Chu03e1d282019-12-24 21:01:05 +08005384 ufshcd_scsi_unblock_requests(hba);
Sayali Lokhande2824ec92020-02-10 19:40:44 -08005385 /*
5386 * pm_runtime_get_noresume is called while scheduling
5387 * eeh_work to avoid suspend racing with exception work.
5388 * Hence decrement usage counter using pm_runtime_put_noidle
5389 * to allow suspend on completion of exception event handler.
5390 */
5391 pm_runtime_put_noidle(hba->dev);
5392 pm_runtime_put(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305393 return;
5394}
5395
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005396/* Complete requests that have door-bell cleared */
5397static void ufshcd_complete_requests(struct ufs_hba *hba)
5398{
5399 ufshcd_transfer_req_compl(hba);
5400 ufshcd_tmc_handler(hba);
5401}
5402
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305403/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02005404 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5405 * to recover from the DL NAC errors or not.
5406 * @hba: per-adapter instance
5407 *
5408 * Returns true if error handling is required, false otherwise
5409 */
5410static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5411{
5412 unsigned long flags;
5413 bool err_handling = true;
5414
5415 spin_lock_irqsave(hba->host->host_lock, flags);
5416 /*
5417 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5418 * device fatal error and/or DL NAC & REPLAY timeout errors.
5419 */
5420 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5421 goto out;
5422
5423 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5424 ((hba->saved_err & UIC_ERROR) &&
5425 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5426 goto out;
5427
5428 if ((hba->saved_err & UIC_ERROR) &&
5429 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5430 int err;
5431 /*
5432 * wait for 50ms to see if we can get any other errors or not.
5433 */
5434 spin_unlock_irqrestore(hba->host->host_lock, flags);
5435 msleep(50);
5436 spin_lock_irqsave(hba->host->host_lock, flags);
5437
5438 /*
5439 * now check if we have got any other severe errors other than
5440 * DL NAC error?
5441 */
5442 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5443 ((hba->saved_err & UIC_ERROR) &&
5444 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5445 goto out;
5446
5447 /*
5448 * As DL NAC is the only error received so far, send out NOP
5449 * command to confirm if link is still active or not.
5450 * - If we don't get any response then do error recovery.
5451 * - If we get response then clear the DL NAC error bit.
5452 */
5453
5454 spin_unlock_irqrestore(hba->host->host_lock, flags);
5455 err = ufshcd_verify_dev_init(hba);
5456 spin_lock_irqsave(hba->host->host_lock, flags);
5457
5458 if (err)
5459 goto out;
5460
5461 /* Link seems to be alive hence ignore the DL NAC errors */
5462 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5463 hba->saved_err &= ~UIC_ERROR;
5464 /* clear NAC error */
5465 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5466 if (!hba->saved_uic_err) {
5467 err_handling = false;
5468 goto out;
5469 }
5470 }
5471out:
5472 spin_unlock_irqrestore(hba->host->host_lock, flags);
5473 return err_handling;
5474}
5475
5476/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305477 * ufshcd_err_handler - handle UFS errors that require s/w attention
5478 * @work: pointer to work structure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305479 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305480static void ufshcd_err_handler(struct work_struct *work)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305481{
5482 struct ufs_hba *hba;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305483 unsigned long flags;
5484 u32 err_xfer = 0;
5485 u32 err_tm = 0;
5486 int err = 0;
5487 int tag;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005488 bool needs_reset = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305489
5490 hba = container_of(work, struct ufs_hba, eh_work);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305491
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305492 pm_runtime_get_sync(hba->dev);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005493 ufshcd_hold(hba, false);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305494
5495 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005496 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305497 goto out;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305498
5499 hba->ufshcd_state = UFSHCD_STATE_RESET;
5500 ufshcd_set_eh_in_progress(hba);
5501
5502 /* Complete requests that have door-bell cleared by h/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005503 ufshcd_complete_requests(hba);
Yaniv Gardi583fa622016-03-10 17:37:13 +02005504
5505 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5506 bool ret;
5507
5508 spin_unlock_irqrestore(hba->host->host_lock, flags);
5509 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5510 ret = ufshcd_quirk_dl_nac_errors(hba);
5511 spin_lock_irqsave(hba->host->host_lock, flags);
5512 if (!ret)
5513 goto skip_err_handling;
5514 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005515 if ((hba->saved_err & INT_FATAL_ERRORS) ||
Stanley Chu82174442019-05-21 14:44:54 +08005516 (hba->saved_err & UFSHCD_UIC_HIBERN8_MASK) ||
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005517 ((hba->saved_err & UIC_ERROR) &&
5518 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5519 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5520 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5521 needs_reset = true;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305522
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005523 /*
5524 * if host reset is required then skip clearing the pending
Can Guo2df74b62019-11-25 22:53:33 -08005525 * transfers forcefully because they will get cleared during
5526 * host reset and restore
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005527 */
5528 if (needs_reset)
5529 goto skip_pending_xfer_clear;
5530
5531 /* release lock as clear command might sleep */
5532 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305533 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005534 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5535 if (ufshcd_clear_cmd(hba, tag)) {
5536 err_xfer = true;
5537 goto lock_skip_pending_xfer_clear;
5538 }
5539 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305540
5541 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005542 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5543 if (ufshcd_clear_tm_cmd(hba, tag)) {
5544 err_tm = true;
5545 goto lock_skip_pending_xfer_clear;
5546 }
5547 }
5548
5549lock_skip_pending_xfer_clear:
5550 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305551
5552 /* Complete the requests that are cleared by s/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005553 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305554
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005555 if (err_xfer || err_tm)
5556 needs_reset = true;
5557
5558skip_pending_xfer_clear:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305559 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005560 if (needs_reset) {
5561 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5562
5563 /*
5564 * ufshcd_reset_and_restore() does the link reinitialization
5565 * which will need atleast one empty doorbell slot to send the
5566 * device management commands (NOP and query commands).
5567 * If there is no slot empty at this moment then free up last
5568 * slot forcefully.
5569 */
5570 if (hba->outstanding_reqs == max_doorbells)
5571 __ufshcd_transfer_req_compl(hba,
5572 (1UL << (hba->nutrs - 1)));
5573
5574 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305575 err = ufshcd_reset_and_restore(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005576 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305577 if (err) {
5578 dev_err(hba->dev, "%s: reset and restore failed\n",
5579 __func__);
5580 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5581 }
5582 /*
5583 * Inform scsi mid-layer that we did reset and allow to handle
5584 * Unit Attention properly.
5585 */
5586 scsi_report_bus_reset(hba->host, 0);
5587 hba->saved_err = 0;
5588 hba->saved_uic_err = 0;
5589 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005590
Yaniv Gardi583fa622016-03-10 17:37:13 +02005591skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005592 if (!needs_reset) {
5593 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5594 if (hba->saved_err || hba->saved_uic_err)
5595 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5596 __func__, hba->saved_err, hba->saved_uic_err);
5597 }
5598
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305599 ufshcd_clear_eh_in_progress(hba);
5600
5601out:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005602 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani38135532018-05-03 16:37:18 +05305603 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005604 ufshcd_release(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305605 pm_runtime_put_sync(hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305606}
5607
5608/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305609 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5610 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005611 *
5612 * Returns
5613 * IRQ_HANDLED - If interrupt is valid
5614 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305615 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005616static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305617{
5618 u32 reg;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005619 irqreturn_t retval = IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305620
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005621 /* PHY layer lane error */
5622 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5623 /* Ignore LINERESET indication, as this is not an error */
5624 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005625 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005626 /*
5627 * To know whether this error is fatal or not, DB timeout
5628 * must be checked but this error is handled separately.
5629 */
5630 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
Stanley Chu48d5b972019-07-10 21:38:18 +08005631 ufshcd_update_reg_hist(&hba->ufs_stats.pa_err, reg);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005632 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005633 }
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005634
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305635 /* PA_INIT_ERROR is fatal and needs UIC reset */
5636 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005637 if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
5638 (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005639 ufshcd_update_reg_hist(&hba->ufs_stats.dl_err, reg);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005640
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005641 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5642 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
5643 else if (hba->dev_quirks &
5644 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5645 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5646 hba->uic_error |=
5647 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5648 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5649 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5650 }
5651 retval |= IRQ_HANDLED;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005652 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305653
5654 /* UIC NL/TL/DME errors needs software retry */
5655 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005656 if ((reg & UIC_NETWORK_LAYER_ERROR) &&
5657 (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005658 ufshcd_update_reg_hist(&hba->ufs_stats.nl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305659 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005660 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005661 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305662
5663 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005664 if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
5665 (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005666 ufshcd_update_reg_hist(&hba->ufs_stats.tl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305667 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005668 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005669 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305670
5671 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005672 if ((reg & UIC_DME_ERROR) &&
5673 (reg & UIC_DME_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005674 ufshcd_update_reg_hist(&hba->ufs_stats.dme_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305675 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005676 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005677 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305678
5679 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5680 __func__, hba->uic_error);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005681 return retval;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305682}
5683
Stanley Chu82174442019-05-21 14:44:54 +08005684static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5685 u32 intr_mask)
5686{
Stanley Chu5a244e02020-01-29 18:52:50 +08005687 if (!ufshcd_is_auto_hibern8_supported(hba) ||
5688 !ufshcd_is_auto_hibern8_enabled(hba))
Stanley Chu82174442019-05-21 14:44:54 +08005689 return false;
5690
5691 if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5692 return false;
5693
5694 if (hba->active_uic_cmd &&
5695 (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5696 hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5697 return false;
5698
5699 return true;
5700}
5701
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305702/**
5703 * ufshcd_check_errors - Check for errors that need s/w attention
5704 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005705 *
5706 * Returns
5707 * IRQ_HANDLED - If interrupt is valid
5708 * IRQ_NONE - If invalid interrupt
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305709 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005710static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305711{
5712 bool queue_eh_work = false;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005713 irqreturn_t retval = IRQ_NONE;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305714
Stanley Chud3c615b2019-07-10 21:38:19 +08005715 if (hba->errors & INT_FATAL_ERRORS) {
5716 ufshcd_update_reg_hist(&hba->ufs_stats.fatal_err, hba->errors);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305717 queue_eh_work = true;
Stanley Chud3c615b2019-07-10 21:38:19 +08005718 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305719
5720 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305721 hba->uic_error = 0;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005722 retval = ufshcd_update_uic_error(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305723 if (hba->uic_error)
5724 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305725 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305726
Stanley Chu82174442019-05-21 14:44:54 +08005727 if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
5728 dev_err(hba->dev,
5729 "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
5730 __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
5731 "Enter" : "Exit",
5732 hba->errors, ufshcd_get_upmcrs(hba));
Stanley Chud3c615b2019-07-10 21:38:19 +08005733 ufshcd_update_reg_hist(&hba->ufs_stats.auto_hibern8_err,
5734 hba->errors);
Stanley Chu82174442019-05-21 14:44:54 +08005735 queue_eh_work = true;
5736 }
5737
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305738 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005739 /*
5740 * update the transfer error masks to sticky bits, let's do this
5741 * irrespective of current ufshcd_state.
5742 */
5743 hba->saved_err |= hba->errors;
5744 hba->saved_uic_err |= hba->uic_error;
5745
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305746 /* handle fatal errors only when link is functional */
5747 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5748 /* block commands from scsi mid-layer */
Subhash Jadavani38135532018-05-03 16:37:18 +05305749 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305750
Zang Leigang141f8162016-11-16 11:29:37 +08005751 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
Dolev Raviv66cc8202016-12-22 18:39:42 -08005752
5753 /* dump controller state before resetting */
5754 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5755 bool pr_prdt = !!(hba->saved_err &
5756 SYSTEM_BUS_FATAL_ERROR);
5757
5758 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5759 __func__, hba->saved_err,
5760 hba->saved_uic_err);
5761
5762 ufshcd_print_host_regs(hba);
5763 ufshcd_print_pwr_info(hba);
5764 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5765 ufshcd_print_trs(hba, hba->outstanding_reqs,
5766 pr_prdt);
5767 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305768 schedule_work(&hba->eh_work);
5769 }
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005770 retval |= IRQ_HANDLED;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305771 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305772 /*
5773 * if (!queue_eh_work) -
5774 * Other errors are either non-fatal where host recovers
5775 * itself without s/w intervention or errors that will be
5776 * handled by the SCSI core layer.
5777 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005778 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305779}
5780
Bart Van Assche69a6c262019-12-09 10:13:09 -08005781struct ctm_info {
5782 struct ufs_hba *hba;
5783 unsigned long pending;
5784 unsigned int ncpl;
5785};
5786
5787static bool ufshcd_compl_tm(struct request *req, void *priv, bool reserved)
5788{
5789 struct ctm_info *const ci = priv;
5790 struct completion *c;
5791
5792 WARN_ON_ONCE(reserved);
5793 if (test_bit(req->tag, &ci->pending))
5794 return true;
5795 ci->ncpl++;
5796 c = req->end_io_data;
5797 if (c)
5798 complete(c);
5799 return true;
5800}
5801
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305802/**
5803 * ufshcd_tmc_handler - handle task management function completion
5804 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005805 *
5806 * Returns
5807 * IRQ_HANDLED - If interrupt is valid
5808 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305809 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005810static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305811{
Bart Van Assche69a6c262019-12-09 10:13:09 -08005812 struct request_queue *q = hba->tmf_queue;
5813 struct ctm_info ci = {
5814 .hba = hba,
5815 .pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL),
5816 };
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305817
Bart Van Assche69a6c262019-12-09 10:13:09 -08005818 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_compl_tm, &ci);
5819 return ci.ncpl ? IRQ_HANDLED : IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305820}
5821
5822/**
5823 * ufshcd_sl_intr - Interrupt service routine
5824 * @hba: per adapter instance
5825 * @intr_status: contains interrupts generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005826 *
5827 * Returns
5828 * IRQ_HANDLED - If interrupt is valid
5829 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305830 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005831static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305832{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005833 irqreturn_t retval = IRQ_NONE;
5834
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305835 hba->errors = UFSHCD_ERROR_MASK & intr_status;
Stanley Chu82174442019-05-21 14:44:54 +08005836
5837 if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5838 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5839
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305840 if (hba->errors)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005841 retval |= ufshcd_check_errors(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305842
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305843 if (intr_status & UFSHCD_UIC_MASK)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005844 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305845
5846 if (intr_status & UTP_TASK_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005847 retval |= ufshcd_tmc_handler(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305848
5849 if (intr_status & UTP_TRANSFER_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005850 retval |= ufshcd_transfer_req_compl(hba);
5851
5852 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305853}
5854
5855/**
5856 * ufshcd_intr - Main interrupt service routine
5857 * @irq: irq number
5858 * @__hba: pointer to adapter instance
5859 *
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005860 * Returns
5861 * IRQ_HANDLED - If interrupt is valid
5862 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305863 */
5864static irqreturn_t ufshcd_intr(int irq, void *__hba)
5865{
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005866 u32 intr_status, enabled_intr_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305867 irqreturn_t retval = IRQ_NONE;
5868 struct ufs_hba *hba = __hba;
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305869 int retries = hba->nutrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305870
5871 spin_lock(hba->host->host_lock);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305872 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305873
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305874 /*
5875 * There could be max of hba->nutrs reqs in flight and in worst case
5876 * if the reqs get finished 1 by 1 after the interrupt status is
5877 * read, make sure we handle them by checking the interrupt status
5878 * again in a loop until we process all of the reqs before returning.
5879 */
5880 do {
5881 enabled_intr_status =
5882 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5883 if (intr_status)
5884 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005885 if (enabled_intr_status)
5886 retval |= ufshcd_sl_intr(hba, enabled_intr_status);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005887
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305888 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5889 } while (intr_status && --retries);
5890
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005891 if (retval == IRQ_NONE) {
5892 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x\n",
5893 __func__, intr_status);
5894 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
5895 }
5896
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305897 spin_unlock(hba->host->host_lock);
5898 return retval;
5899}
5900
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305901static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5902{
5903 int err = 0;
5904 u32 mask = 1 << tag;
5905 unsigned long flags;
5906
5907 if (!test_bit(tag, &hba->outstanding_tasks))
5908 goto out;
5909
5910 spin_lock_irqsave(hba->host->host_lock, flags);
Alim Akhtar1399c5b2018-05-06 15:44:15 +05305911 ufshcd_utmrl_clear(hba, tag);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305912 spin_unlock_irqrestore(hba->host->host_lock, flags);
5913
5914 /* poll for max. 1 sec to clear door bell register by h/w */
5915 err = ufshcd_wait_for_register(hba,
5916 REG_UTP_TASK_REQ_DOOR_BELL,
Bart Van Assche5cac1092020-05-07 15:27:50 -07005917 mask, 0, 1000, 1000);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305918out:
5919 return err;
5920}
5921
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005922static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
5923 struct utp_task_req_desc *treq, u8 tm_function)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305924{
Bart Van Assche69a6c262019-12-09 10:13:09 -08005925 struct request_queue *q = hba->tmf_queue;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005926 struct Scsi_Host *host = hba->host;
Bart Van Assche69a6c262019-12-09 10:13:09 -08005927 DECLARE_COMPLETION_ONSTACK(wait);
5928 struct request *req;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305929 unsigned long flags;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005930 int free_slot, task_tag, err;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305931
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305932 /*
5933 * Get free slot, sleep if slots are unavailable.
5934 * Even though we use wait_event() which sleeps indefinitely,
5935 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5936 */
Bart Van Assche69a6c262019-12-09 10:13:09 -08005937 req = blk_get_request(q, REQ_OP_DRV_OUT, BLK_MQ_REQ_RESERVED);
5938 req->end_io_data = &wait;
5939 free_slot = req->tag;
5940 WARN_ON_ONCE(free_slot < 0 || free_slot >= hba->nutmrs);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005941 ufshcd_hold(hba, false);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305942
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305943 spin_lock_irqsave(host->host_lock, flags);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305944 task_tag = hba->nutrs + free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305945
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005946 treq->req_header.dword_0 |= cpu_to_be32(task_tag);
5947
5948 memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
Kiwoong Kimd2877be2016-11-10 21:16:15 +09005949 ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5950
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305951 /* send command to the controller */
5952 __set_bit(free_slot, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02005953
5954 /* Make sure descriptors are ready before ringing the task doorbell */
5955 wmb();
5956
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305957 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07005958 /* Make sure that doorbell is committed immediately */
5959 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305960
5961 spin_unlock_irqrestore(host->host_lock, flags);
5962
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005963 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");
5964
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305965 /* wait until the task management command is completed */
Bart Van Assche69a6c262019-12-09 10:13:09 -08005966 err = wait_for_completion_io_timeout(&wait,
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305967 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305968 if (!err) {
Bart Van Assche69a6c262019-12-09 10:13:09 -08005969 /*
5970 * Make sure that ufshcd_compl_tm() does not trigger a
5971 * use-after-free.
5972 */
5973 req->end_io_data = NULL;
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005974 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305975 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5976 __func__, tm_function);
5977 if (ufshcd_clear_tm_cmd(hba, free_slot))
5978 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5979 __func__, free_slot);
5980 err = -ETIMEDOUT;
5981 } else {
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005982 err = 0;
5983 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));
5984
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005985 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305986 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305987
Stanley Chub5572172019-08-19 21:43:28 +08005988 spin_lock_irqsave(hba->host->host_lock, flags);
5989 __clear_bit(free_slot, &hba->outstanding_tasks);
5990 spin_unlock_irqrestore(hba->host->host_lock, flags);
5991
Bart Van Assche69a6c262019-12-09 10:13:09 -08005992 blk_put_request(req);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305993
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005994 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305995 return err;
5996}
5997
5998/**
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005999 * ufshcd_issue_tm_cmd - issues task management commands to controller
6000 * @hba: per adapter instance
6001 * @lun_id: LUN ID to which TM command is sent
6002 * @task_id: task ID to which the TM command is applicable
6003 * @tm_function: task management function opcode
6004 * @tm_response: task management service response return value
6005 *
6006 * Returns non-zero value on error, zero on success.
6007 */
6008static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
6009 u8 tm_function, u8 *tm_response)
6010{
6011 struct utp_task_req_desc treq = { { 0 }, };
6012 int ocs_value, err;
6013
6014 /* Configure task request descriptor */
6015 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6016 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6017
6018 /* Configure task request UPIU */
6019 treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
6020 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
6021 treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);
6022
6023 /*
6024 * The host shall provide the same value for LUN field in the basic
6025 * header and for Input Parameter.
6026 */
6027 treq.input_param1 = cpu_to_be32(lun_id);
6028 treq.input_param2 = cpu_to_be32(task_id);
6029
6030 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
6031 if (err == -ETIMEDOUT)
6032 return err;
6033
6034 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6035 if (ocs_value != OCS_SUCCESS)
6036 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
6037 __func__, ocs_value);
6038 else if (tm_response)
6039 *tm_response = be32_to_cpu(treq.output_param1) &
6040 MASK_TM_SERVICE_RESP;
6041 return err;
6042}
6043
6044/**
Avri Altman5e0a86e2018-10-07 17:30:37 +03006045 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
6046 * @hba: per-adapter instance
6047 * @req_upiu: upiu request
6048 * @rsp_upiu: upiu reply
Avri Altman5e0a86e2018-10-07 17:30:37 +03006049 * @desc_buff: pointer to descriptor buffer, NULL if NA
6050 * @buff_len: descriptor size, 0 if NA
Bart Van Assched0e97602019-10-29 16:07:08 -07006051 * @cmd_type: specifies the type (NOP, Query...)
Avri Altman5e0a86e2018-10-07 17:30:37 +03006052 * @desc_op: descriptor operation
6053 *
6054 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
6055 * Therefore, it "rides" the device management infrastructure: uses its tag and
6056 * tasks work queues.
6057 *
6058 * Since there is only one available tag for device management commands,
6059 * the caller is expected to hold the hba->dev_cmd.lock mutex.
6060 */
6061static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
6062 struct utp_upiu_req *req_upiu,
6063 struct utp_upiu_req *rsp_upiu,
6064 u8 *desc_buff, int *buff_len,
Bart Van Assche7f674c32019-10-29 16:07:09 -07006065 enum dev_cmd_type cmd_type,
Avri Altman5e0a86e2018-10-07 17:30:37 +03006066 enum query_opcode desc_op)
6067{
Bart Van Assche7252a362019-12-09 10:13:08 -08006068 struct request_queue *q = hba->cmd_queue;
6069 struct request *req;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006070 struct ufshcd_lrb *lrbp;
6071 int err = 0;
6072 int tag;
6073 struct completion wait;
6074 unsigned long flags;
6075 u32 upiu_flags;
6076
6077 down_read(&hba->clk_scaling_lock);
6078
Bart Van Assche7252a362019-12-09 10:13:08 -08006079 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03006080 if (IS_ERR(req)) {
6081 err = PTR_ERR(req);
6082 goto out_unlock;
6083 }
Bart Van Assche7252a362019-12-09 10:13:08 -08006084 tag = req->tag;
6085 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
Avri Altman5e0a86e2018-10-07 17:30:37 +03006086
6087 init_completion(&wait);
6088 lrbp = &hba->lrb[tag];
6089 WARN_ON(lrbp->cmd);
6090
6091 lrbp->cmd = NULL;
6092 lrbp->sense_bufflen = 0;
6093 lrbp->sense_buffer = NULL;
6094 lrbp->task_tag = tag;
6095 lrbp->lun = 0;
6096 lrbp->intr_cmd = true;
6097 hba->dev_cmd.type = cmd_type;
6098
6099 switch (hba->ufs_version) {
6100 case UFSHCI_VERSION_10:
6101 case UFSHCI_VERSION_11:
6102 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
6103 break;
6104 default:
6105 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
6106 break;
6107 }
6108
6109 /* update the task tag in the request upiu */
6110 req_upiu->header.dword_0 |= cpu_to_be32(tag);
6111
6112 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
6113
6114 /* just copy the upiu request as it is */
6115 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
6116 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
6117 /* The Data Segment Area is optional depending upon the query
6118 * function value. for WRITE DESCRIPTOR, the data segment
6119 * follows right after the tsf.
6120 */
6121 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
6122 *buff_len = 0;
6123 }
6124
6125 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
6126
6127 hba->dev_cmd.complete = &wait;
6128
6129 /* Make sure descriptors are ready before ringing the doorbell */
6130 wmb();
6131 spin_lock_irqsave(hba->host->host_lock, flags);
6132 ufshcd_send_command(hba, tag);
6133 spin_unlock_irqrestore(hba->host->host_lock, flags);
6134
6135 /*
6136 * ignore the returning value here - ufshcd_check_query_response is
6137 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
6138 * read the response directly ignoring all errors.
6139 */
6140 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
6141
6142 /* just copy the upiu response as it is */
6143 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
Avri Altman4bbbe242019-02-20 09:11:13 +02006144 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
6145 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
6146 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
6147 MASK_QUERY_DATA_SEG_LEN;
6148
6149 if (*buff_len >= resp_len) {
6150 memcpy(desc_buff, descp, resp_len);
6151 *buff_len = resp_len;
6152 } else {
Bean Huo3d4881d2019-11-12 23:34:35 +01006153 dev_warn(hba->dev,
6154 "%s: rsp size %d is bigger than buffer size %d",
6155 __func__, resp_len, *buff_len);
Avri Altman4bbbe242019-02-20 09:11:13 +02006156 *buff_len = 0;
6157 err = -EINVAL;
6158 }
6159 }
Avri Altman5e0a86e2018-10-07 17:30:37 +03006160
Bart Van Assche7252a362019-12-09 10:13:08 -08006161 blk_put_request(req);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03006162out_unlock:
Avri Altman5e0a86e2018-10-07 17:30:37 +03006163 up_read(&hba->clk_scaling_lock);
6164 return err;
6165}
6166
6167/**
6168 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
6169 * @hba: per-adapter instance
6170 * @req_upiu: upiu request
6171 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
6172 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
6173 * @desc_buff: pointer to descriptor buffer, NULL if NA
6174 * @buff_len: descriptor size, 0 if NA
6175 * @desc_op: descriptor operation
6176 *
6177 * Supports UTP Transfer requests (nop and query), and UTP Task
6178 * Management requests.
6179 * It is up to the caller to fill the upiu conent properly, as it will
6180 * be copied without any further input validations.
6181 */
6182int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
6183 struct utp_upiu_req *req_upiu,
6184 struct utp_upiu_req *rsp_upiu,
6185 int msgcode,
6186 u8 *desc_buff, int *buff_len,
6187 enum query_opcode desc_op)
6188{
6189 int err;
Bart Van Assche7f674c32019-10-29 16:07:09 -07006190 enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006191 struct utp_task_req_desc treq = { { 0 }, };
6192 int ocs_value;
6193 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
6194
Avri Altman5e0a86e2018-10-07 17:30:37 +03006195 switch (msgcode) {
6196 case UPIU_TRANSACTION_NOP_OUT:
6197 cmd_type = DEV_CMD_TYPE_NOP;
6198 /* fall through */
6199 case UPIU_TRANSACTION_QUERY_REQ:
6200 ufshcd_hold(hba, false);
6201 mutex_lock(&hba->dev_cmd.lock);
6202 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
6203 desc_buff, buff_len,
6204 cmd_type, desc_op);
6205 mutex_unlock(&hba->dev_cmd.lock);
6206 ufshcd_release(hba);
6207
6208 break;
6209 case UPIU_TRANSACTION_TASK_REQ:
6210 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6211 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6212
6213 memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));
6214
6215 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
6216 if (err == -ETIMEDOUT)
6217 break;
6218
6219 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6220 if (ocs_value != OCS_SUCCESS) {
6221 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
6222 ocs_value);
6223 break;
6224 }
6225
6226 memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));
6227
6228 break;
6229 default:
6230 err = -EINVAL;
6231
6232 break;
6233 }
6234
Avri Altman5e0a86e2018-10-07 17:30:37 +03006235 return err;
6236}
6237
6238/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306239 * ufshcd_eh_device_reset_handler - device reset handler registered to
6240 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306241 * @cmd: SCSI command pointer
6242 *
6243 * Returns SUCCESS/FAILED
6244 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306245static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306246{
6247 struct Scsi_Host *host;
6248 struct ufs_hba *hba;
6249 unsigned int tag;
6250 u32 pos;
6251 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306252 u8 resp = 0xF;
6253 struct ufshcd_lrb *lrbp;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306254 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306255
6256 host = cmd->device->host;
6257 hba = shost_priv(host);
6258 tag = cmd->request->tag;
6259
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306260 lrbp = &hba->lrb[tag];
6261 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
6262 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306263 if (!err)
6264 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306265 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306266 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306267
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306268 /* clear the commands that were pending for corresponding LUN */
6269 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6270 if (hba->lrb[pos].lun == lrbp->lun) {
6271 err = ufshcd_clear_cmd(hba, pos);
6272 if (err)
6273 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306274 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306275 }
6276 spin_lock_irqsave(host->host_lock, flags);
6277 ufshcd_transfer_req_compl(hba);
6278 spin_unlock_irqrestore(host->host_lock, flags);
Gilad Broner7fabb772017-02-03 16:56:50 -08006279
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306280out:
Gilad Broner7fabb772017-02-03 16:56:50 -08006281 hba->req_abort_count = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08006282 ufshcd_update_reg_hist(&hba->ufs_stats.dev_reset, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306283 if (!err) {
6284 err = SUCCESS;
6285 } else {
6286 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6287 err = FAILED;
6288 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306289 return err;
6290}
6291
Gilad Bronere0b299e2017-02-03 16:56:40 -08006292static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6293{
6294 struct ufshcd_lrb *lrbp;
6295 int tag;
6296
6297 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6298 lrbp = &hba->lrb[tag];
6299 lrbp->req_abort_skip = true;
6300 }
6301}
6302
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306303/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306304 * ufshcd_abort - abort a specific command
6305 * @cmd: SCSI command pointer
6306 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306307 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6308 * command, and in host controller by clearing the door-bell register. There can
6309 * be race between controller sending the command to the device while abort is
6310 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6311 * really issued and then try to abort it.
6312 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306313 * Returns SUCCESS/FAILED
6314 */
6315static int ufshcd_abort(struct scsi_cmnd *cmd)
6316{
6317 struct Scsi_Host *host;
6318 struct ufs_hba *hba;
6319 unsigned long flags;
6320 unsigned int tag;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306321 int err = 0;
6322 int poll_cnt;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306323 u8 resp = 0xF;
6324 struct ufshcd_lrb *lrbp;
Dolev Ravive9d501b2014-07-01 12:22:37 +03006325 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306326
6327 host = cmd->device->host;
6328 hba = shost_priv(host);
6329 tag = cmd->request->tag;
Dolev Ravive7d38252016-12-22 18:40:07 -08006330 lrbp = &hba->lrb[tag];
Yaniv Gardi14497322016-02-01 15:02:39 +02006331 if (!ufshcd_valid_tag(hba, tag)) {
6332 dev_err(hba->dev,
6333 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
6334 __func__, tag, cmd, cmd->request);
6335 BUG();
6336 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306337
Dolev Ravive7d38252016-12-22 18:40:07 -08006338 /*
6339 * Task abort to the device W-LUN is illegal. When this command
6340 * will fail, due to spec violation, scsi err handling next step
6341 * will be to send LU reset which, again, is a spec violation.
6342 * To avoid these unnecessary/illegal step we skip to the last error
6343 * handling stage: reset and restore.
6344 */
6345 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
6346 return ufshcd_eh_host_reset_handler(cmd);
6347
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006348 ufshcd_hold(hba, false);
Dolev Ravive9d501b2014-07-01 12:22:37 +03006349 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Yaniv Gardi14497322016-02-01 15:02:39 +02006350 /* If command is already aborted/completed, return SUCCESS */
6351 if (!(test_bit(tag, &hba->outstanding_reqs))) {
6352 dev_err(hba->dev,
6353 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
6354 __func__, tag, hba->outstanding_reqs, reg);
6355 goto out;
6356 }
6357
Dolev Ravive9d501b2014-07-01 12:22:37 +03006358 if (!(reg & (1 << tag))) {
6359 dev_err(hba->dev,
6360 "%s: cmd was completed, but without a notifying intr, tag = %d",
6361 __func__, tag);
6362 }
6363
Dolev Raviv66cc8202016-12-22 18:39:42 -08006364 /* Print Transfer Request of aborted task */
6365 dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
Dolev Raviv66cc8202016-12-22 18:39:42 -08006366
Gilad Broner7fabb772017-02-03 16:56:50 -08006367 /*
6368 * Print detailed info about aborted request.
6369 * As more than one request might get aborted at the same time,
6370 * print full information only for the first aborted request in order
6371 * to reduce repeated printouts. For other aborted requests only print
6372 * basic details.
6373 */
6374 scsi_print_command(hba->lrb[tag].cmd);
6375 if (!hba->req_abort_count) {
Stanley Chu8808b4e2019-07-10 21:38:21 +08006376 ufshcd_update_reg_hist(&hba->ufs_stats.task_abort, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08006377 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08006378 ufshcd_print_host_state(hba);
Gilad Broner7fabb772017-02-03 16:56:50 -08006379 ufshcd_print_pwr_info(hba);
6380 ufshcd_print_trs(hba, 1 << tag, true);
6381 } else {
6382 ufshcd_print_trs(hba, 1 << tag, false);
6383 }
6384 hba->req_abort_count++;
Gilad Bronere0b299e2017-02-03 16:56:40 -08006385
6386 /* Skip task abort in case previous aborts failed and report failure */
6387 if (lrbp->req_abort_skip) {
6388 err = -EIO;
6389 goto out;
6390 }
6391
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306392 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6393 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6394 UFS_QUERY_TASK, &resp);
6395 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6396 /* cmd pending in the device */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006397 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6398 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306399 break;
6400 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306401 /*
6402 * cmd not pending in the device, check if it is
6403 * in transition.
6404 */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006405 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6406 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306407 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6408 if (reg & (1 << tag)) {
6409 /* sleep for max. 200us to stabilize */
6410 usleep_range(100, 200);
6411 continue;
6412 }
6413 /* command completed already */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006414 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6415 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306416 goto out;
6417 } else {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006418 dev_err(hba->dev,
6419 "%s: no response from device. tag = %d, err %d\n",
6420 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306421 if (!err)
6422 err = resp; /* service response error */
6423 goto out;
6424 }
6425 }
6426
6427 if (!poll_cnt) {
6428 err = -EBUSY;
6429 goto out;
6430 }
6431
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306432 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6433 UFS_ABORT_TASK, &resp);
6434 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006435 if (!err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306436 err = resp; /* service response error */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006437 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6438 __func__, tag, err);
6439 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306440 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306441 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306442
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306443 err = ufshcd_clear_cmd(hba, tag);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006444 if (err) {
6445 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6446 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306447 goto out;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006448 }
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306449
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306450 scsi_dma_unmap(cmd);
6451
6452 spin_lock_irqsave(host->host_lock, flags);
Yaniv Gardia48353f2016-02-01 15:02:40 +02006453 ufshcd_outstanding_req_clear(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306454 hba->lrb[tag].cmd = NULL;
6455 spin_unlock_irqrestore(host->host_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306456
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306457out:
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306458 if (!err) {
6459 err = SUCCESS;
6460 } else {
6461 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Gilad Bronere0b299e2017-02-03 16:56:40 -08006462 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306463 err = FAILED;
6464 }
6465
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006466 /*
6467 * This ufshcd_release() corresponds to the original scsi cmd that got
6468 * aborted here (as we won't get any IRQ for it).
6469 */
6470 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306471 return err;
6472}
6473
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306474/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306475 * ufshcd_host_reset_and_restore - reset and restore host controller
6476 * @hba: per-adapter instance
6477 *
6478 * Note that host controller reset may issue DME_RESET to
6479 * local and remote (device) Uni-Pro stack and the attributes
6480 * are reset to default state.
6481 *
6482 * Returns zero on success, non-zero on failure
6483 */
6484static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6485{
6486 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306487 unsigned long flags;
6488
Can Guo2df74b62019-11-25 22:53:33 -08006489 /*
6490 * Stop the host controller and complete the requests
6491 * cleared by h/w
6492 */
Bart Van Assche5cac1092020-05-07 15:27:50 -07006493 ufshcd_hba_stop(hba);
6494
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306495 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo2df74b62019-11-25 22:53:33 -08006496 hba->silence_err_logs = true;
6497 ufshcd_complete_requests(hba);
6498 hba->silence_err_logs = false;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306499 spin_unlock_irqrestore(hba->host->host_lock, flags);
6500
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08006501 /* scale up clocks to max frequency before full reinitialization */
Subhash Jadavani394b9492020-03-26 02:25:40 -07006502 ufshcd_set_clk_freq(hba, true);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08006503
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306504 err = ufshcd_hba_enable(hba);
6505 if (err)
6506 goto out;
6507
6508 /* Establish the link again and restore the device */
Bean Huo1b9e2142020-01-20 14:08:15 +01006509 err = ufshcd_probe_hba(hba, false);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006510
6511 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306512 err = -EIO;
6513out:
6514 if (err)
6515 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
Stanley Chu8808b4e2019-07-10 21:38:21 +08006516 ufshcd_update_reg_hist(&hba->ufs_stats.host_reset, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306517 return err;
6518}
6519
6520/**
6521 * ufshcd_reset_and_restore - reset and re-initialize host/device
6522 * @hba: per-adapter instance
6523 *
6524 * Reset and recover device, host and re-establish link. This
6525 * is helpful to recover the communication in fatal error conditions.
6526 *
6527 * Returns zero on success, non-zero on failure
6528 */
6529static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6530{
6531 int err = 0;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006532 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306533
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006534 do {
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07006535 /* Reset the attached device */
6536 ufshcd_vops_device_reset(hba);
6537
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006538 err = ufshcd_host_reset_and_restore(hba);
6539 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306540
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306541 return err;
6542}
6543
6544/**
6545 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006546 * @cmd: SCSI command pointer
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306547 *
6548 * Returns SUCCESS/FAILED
6549 */
6550static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6551{
6552 int err;
6553 unsigned long flags;
6554 struct ufs_hba *hba;
6555
6556 hba = shost_priv(cmd->device->host);
6557
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006558 ufshcd_hold(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306559 /*
6560 * Check if there is any race with fatal error handling.
6561 * If so, wait for it to complete. Even though fatal error
6562 * handling does reset and restore in some cases, don't assume
6563 * anything out of it. We are just avoiding race here.
6564 */
6565 do {
6566 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306567 if (!(work_pending(&hba->eh_work) ||
Zang Leigang8dc0da72017-06-24 19:14:32 +08006568 hba->ufshcd_state == UFSHCD_STATE_RESET ||
6569 hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306570 break;
6571 spin_unlock_irqrestore(hba->host->host_lock, flags);
6572 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306573 flush_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306574 } while (1);
6575
6576 hba->ufshcd_state = UFSHCD_STATE_RESET;
6577 ufshcd_set_eh_in_progress(hba);
6578 spin_unlock_irqrestore(hba->host->host_lock, flags);
6579
6580 err = ufshcd_reset_and_restore(hba);
6581
6582 spin_lock_irqsave(hba->host->host_lock, flags);
6583 if (!err) {
6584 err = SUCCESS;
6585 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6586 } else {
6587 err = FAILED;
6588 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6589 }
6590 ufshcd_clear_eh_in_progress(hba);
6591 spin_unlock_irqrestore(hba->host->host_lock, flags);
6592
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006593 ufshcd_release(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306594 return err;
6595}
6596
6597/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006598 * ufshcd_get_max_icc_level - calculate the ICC level
6599 * @sup_curr_uA: max. current supported by the regulator
6600 * @start_scan: row at the desc table to start scan from
6601 * @buff: power descriptor buffer
6602 *
6603 * Returns calculated max ICC level for specific regulator
6604 */
6605static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6606{
6607 int i;
6608 int curr_uA;
6609 u16 data;
6610 u16 unit;
6611
6612 for (i = start_scan; i >= 0; i--) {
Tomas Winklerd79713f2017-01-05 10:45:11 +02006613 data = be16_to_cpup((__be16 *)&buff[2 * i]);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006614 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6615 ATTR_ICC_LVL_UNIT_OFFSET;
6616 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6617 switch (unit) {
6618 case UFSHCD_NANO_AMP:
6619 curr_uA = curr_uA / 1000;
6620 break;
6621 case UFSHCD_MILI_AMP:
6622 curr_uA = curr_uA * 1000;
6623 break;
6624 case UFSHCD_AMP:
6625 curr_uA = curr_uA * 1000 * 1000;
6626 break;
6627 case UFSHCD_MICRO_AMP:
6628 default:
6629 break;
6630 }
6631 if (sup_curr_uA >= curr_uA)
6632 break;
6633 }
6634 if (i < 0) {
6635 i = 0;
6636 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6637 }
6638
6639 return (u32)i;
6640}
6641
6642/**
6643 * ufshcd_calc_icc_level - calculate the max ICC level
6644 * In case regulators are not initialized we'll return 0
6645 * @hba: per-adapter instance
6646 * @desc_buf: power descriptor buffer to extract ICC levels from.
6647 * @len: length of desc_buff
6648 *
6649 * Returns calculated ICC level
6650 */
6651static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6652 u8 *desc_buf, int len)
6653{
6654 u32 icc_level = 0;
6655
6656 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6657 !hba->vreg_info.vccq2) {
6658 dev_err(hba->dev,
6659 "%s: Regulator capability was not set, actvIccLevel=%d",
6660 __func__, icc_level);
6661 goto out;
6662 }
6663
Stanley Chu0487fff2019-03-28 17:16:25 +08006664 if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006665 icc_level = ufshcd_get_max_icc_level(
6666 hba->vreg_info.vcc->max_uA,
6667 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6668 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6669
Stanley Chu0487fff2019-03-28 17:16:25 +08006670 if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006671 icc_level = ufshcd_get_max_icc_level(
6672 hba->vreg_info.vccq->max_uA,
6673 icc_level,
6674 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6675
Stanley Chu0487fff2019-03-28 17:16:25 +08006676 if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006677 icc_level = ufshcd_get_max_icc_level(
6678 hba->vreg_info.vccq2->max_uA,
6679 icc_level,
6680 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6681out:
6682 return icc_level;
6683}
6684
Can Guoe89860f2020-03-26 02:25:41 -07006685static void ufshcd_set_active_icc_lvl(struct ufs_hba *hba)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006686{
6687 int ret;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006688 int buff_len = hba->desc_size.pwr_desc;
Kees Cookbbe21d72018-05-02 16:58:09 -07006689 u8 *desc_buf;
Can Guoe89860f2020-03-26 02:25:41 -07006690 u32 icc_level;
Kees Cookbbe21d72018-05-02 16:58:09 -07006691
6692 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6693 if (!desc_buf)
6694 return;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006695
Bean Huo8c9a51b2020-01-20 14:08:17 +01006696 ret = ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0,
6697 desc_buf, buff_len);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006698 if (ret) {
6699 dev_err(hba->dev,
6700 "%s: Failed reading power descriptor.len = %d ret = %d",
6701 __func__, buff_len, ret);
Kees Cookbbe21d72018-05-02 16:58:09 -07006702 goto out;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006703 }
6704
Can Guoe89860f2020-03-26 02:25:41 -07006705 icc_level = ufshcd_find_max_sup_active_icc_level(hba, desc_buf,
6706 buff_len);
6707 dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006708
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02006709 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Can Guoe89860f2020-03-26 02:25:41 -07006710 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, &icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006711
6712 if (ret)
6713 dev_err(hba->dev,
6714 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
Can Guoe89860f2020-03-26 02:25:41 -07006715 __func__, icc_level, ret);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006716
Kees Cookbbe21d72018-05-02 16:58:09 -07006717out:
6718 kfree(desc_buf);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006719}
6720
Can Guofb276f72020-03-25 18:09:59 -07006721static inline void ufshcd_blk_pm_runtime_init(struct scsi_device *sdev)
6722{
6723 scsi_autopm_get_device(sdev);
6724 blk_pm_runtime_init(sdev->request_queue, &sdev->sdev_gendev);
6725 if (sdev->rpm_autosuspend)
6726 pm_runtime_set_autosuspend_delay(&sdev->sdev_gendev,
6727 RPM_AUTOSUSPEND_DELAY_MS);
6728 scsi_autopm_put_device(sdev);
6729}
6730
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006731/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006732 * ufshcd_scsi_add_wlus - Adds required W-LUs
6733 * @hba: per-adapter instance
6734 *
6735 * UFS device specification requires the UFS devices to support 4 well known
6736 * logical units:
6737 * "REPORT_LUNS" (address: 01h)
6738 * "UFS Device" (address: 50h)
6739 * "RPMB" (address: 44h)
6740 * "BOOT" (address: 30h)
6741 * UFS device's power management needs to be controlled by "POWER CONDITION"
6742 * field of SSU (START STOP UNIT) command. But this "power condition" field
6743 * will take effect only when its sent to "UFS device" well known logical unit
6744 * hence we require the scsi_device instance to represent this logical unit in
6745 * order for the UFS host driver to send the SSU command for power management.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006746 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006747 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6748 * Block) LU so user space process can control this LU. User space may also
6749 * want to have access to BOOT LU.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006750 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006751 * This function adds scsi device instances for each of all well known LUs
6752 * (except "REPORT LUNS" LU).
6753 *
6754 * Returns zero on success (all required W-LUs are added successfully),
6755 * non-zero error value on failure (if failed to add any of the required W-LU).
6756 */
6757static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6758{
6759 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006760 struct scsi_device *sdev_rpmb;
6761 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006762
6763 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6764 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6765 if (IS_ERR(hba->sdev_ufs_device)) {
6766 ret = PTR_ERR(hba->sdev_ufs_device);
6767 hba->sdev_ufs_device = NULL;
6768 goto out;
6769 }
Can Guofb276f72020-03-25 18:09:59 -07006770 ufshcd_blk_pm_runtime_init(hba->sdev_ufs_device);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006771 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006772
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006773 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006774 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006775 if (IS_ERR(sdev_rpmb)) {
6776 ret = PTR_ERR(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006777 goto remove_sdev_ufs_device;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006778 }
Can Guofb276f72020-03-25 18:09:59 -07006779 ufshcd_blk_pm_runtime_init(sdev_rpmb);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006780 scsi_device_put(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006781
6782 sdev_boot = __scsi_add_device(hba->host, 0, 0,
6783 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
Can Guofb276f72020-03-25 18:09:59 -07006784 if (IS_ERR(sdev_boot)) {
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006785 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
Can Guofb276f72020-03-25 18:09:59 -07006786 } else {
6787 ufshcd_blk_pm_runtime_init(sdev_boot);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006788 scsi_device_put(sdev_boot);
Can Guofb276f72020-03-25 18:09:59 -07006789 }
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006790 goto out;
6791
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006792remove_sdev_ufs_device:
6793 scsi_remove_device(hba->sdev_ufs_device);
6794out:
6795 return ret;
6796}
6797
Asutosh Das3d17b9b2020-04-22 14:41:42 -07006798static void ufshcd_wb_probe(struct ufs_hba *hba, u8 *desc_buf)
6799{
Stanley Chu6f8d5a62020-05-08 16:01:13 +08006800 u8 lun;
6801 u32 d_lu_wb_buf_alloc;
6802
Stanley Chu817d7e12020-05-08 16:01:08 +08006803 if (!ufshcd_is_wb_allowed(hba))
6804 return;
6805
6806 if (hba->desc_size.dev_desc < DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP + 4)
6807 goto wb_disabled;
6808
Asutosh Das3d17b9b2020-04-22 14:41:42 -07006809 hba->dev_info.d_ext_ufs_feature_sup =
6810 get_unaligned_be32(desc_buf +
6811 DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
Stanley Chu817d7e12020-05-08 16:01:08 +08006812
6813 if (!(hba->dev_info.d_ext_ufs_feature_sup & UFS_DEV_WRITE_BOOSTER_SUP))
6814 goto wb_disabled;
6815
Asutosh Das3d17b9b2020-04-22 14:41:42 -07006816 /*
6817 * WB may be supported but not configured while provisioning.
6818 * The spec says, in dedicated wb buffer mode,
6819 * a max of 1 lun would have wb buffer configured.
6820 * Now only shared buffer mode is supported.
6821 */
6822 hba->dev_info.b_wb_buffer_type =
6823 desc_buf[DEVICE_DESC_PARAM_WB_TYPE];
6824
Asutosh Das3d17b9b2020-04-22 14:41:42 -07006825 hba->dev_info.b_presrv_uspc_en =
6826 desc_buf[DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN];
6827
Stanley Chu6f8d5a62020-05-08 16:01:13 +08006828 if (hba->dev_info.b_wb_buffer_type == WB_BUF_MODE_SHARED) {
6829 hba->dev_info.d_wb_alloc_units =
6830 get_unaligned_be32(desc_buf +
6831 DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS);
6832 if (!hba->dev_info.d_wb_alloc_units)
6833 goto wb_disabled;
6834 } else {
6835 for (lun = 0; lun < UFS_UPIU_MAX_WB_LUN_ID; lun++) {
6836 d_lu_wb_buf_alloc = 0;
6837 ufshcd_read_unit_desc_param(hba,
6838 lun,
6839 UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS,
6840 (u8 *)&d_lu_wb_buf_alloc,
6841 sizeof(d_lu_wb_buf_alloc));
6842 if (d_lu_wb_buf_alloc) {
6843 hba->dev_info.wb_dedicated_lu = lun;
6844 break;
6845 }
6846 }
Stanley Chu817d7e12020-05-08 16:01:08 +08006847
Stanley Chu6f8d5a62020-05-08 16:01:13 +08006848 if (!d_lu_wb_buf_alloc)
6849 goto wb_disabled;
6850 }
Stanley Chu817d7e12020-05-08 16:01:08 +08006851 return;
6852
6853wb_disabled:
6854 hba->caps &= ~UFSHCD_CAP_WB_EN;
6855}
6856
Stanley Chu8db269a2020-05-08 16:01:10 +08006857void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups)
Stanley Chu817d7e12020-05-08 16:01:08 +08006858{
6859 struct ufs_dev_fix *f;
6860 struct ufs_dev_info *dev_info = &hba->dev_info;
6861
Stanley Chu8db269a2020-05-08 16:01:10 +08006862 if (!fixups)
6863 return;
6864
6865 for (f = fixups; f->quirk; f++) {
Stanley Chu817d7e12020-05-08 16:01:08 +08006866 if ((f->wmanufacturerid == dev_info->wmanufacturerid ||
6867 f->wmanufacturerid == UFS_ANY_VENDOR) &&
6868 ((dev_info->model &&
6869 STR_PRFX_EQUAL(f->model, dev_info->model)) ||
6870 !strcmp(f->model, UFS_ANY_MODEL)))
6871 hba->dev_quirks |= f->quirk;
6872 }
Asutosh Das3d17b9b2020-04-22 14:41:42 -07006873}
Stanley Chu8db269a2020-05-08 16:01:10 +08006874EXPORT_SYMBOL_GPL(ufshcd_fixup_dev_quirks);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07006875
Stanley Chuc28c00b2020-05-08 16:01:09 +08006876static void ufs_fixup_device_setup(struct ufs_hba *hba)
6877{
6878 /* fix by general quirk table */
Stanley Chu8db269a2020-05-08 16:01:10 +08006879 ufshcd_fixup_dev_quirks(hba, ufs_fixups);
Stanley Chuc28c00b2020-05-08 16:01:09 +08006880
6881 /* allow vendors to fix quirks */
6882 ufshcd_vops_fixup_dev_quirks(hba);
6883}
6884
Bean Huo09750062020-01-20 14:08:14 +01006885static int ufs_get_device_desc(struct ufs_hba *hba)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006886{
6887 int err;
Kees Cookbbe21d72018-05-02 16:58:09 -07006888 size_t buff_len;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006889 u8 model_index;
Kees Cookbbe21d72018-05-02 16:58:09 -07006890 u8 *desc_buf;
Bean Huo09750062020-01-20 14:08:14 +01006891 struct ufs_dev_info *dev_info = &hba->dev_info;
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006892
Kees Cookbbe21d72018-05-02 16:58:09 -07006893 buff_len = max_t(size_t, hba->desc_size.dev_desc,
6894 QUERY_DESC_MAX_SIZE + 1);
6895 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6896 if (!desc_buf) {
6897 err = -ENOMEM;
6898 goto out;
6899 }
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006900
Bean Huo8c9a51b2020-01-20 14:08:17 +01006901 err = ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, desc_buf,
6902 hba->desc_size.dev_desc);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006903 if (err) {
6904 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6905 __func__, err);
6906 goto out;
6907 }
6908
6909 /*
6910 * getting vendor (manufacturerID) and Bank Index in big endian
6911 * format
6912 */
Bean Huo09750062020-01-20 14:08:14 +01006913 dev_info->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006914 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6915
Can Guo09f17792020-02-10 19:40:49 -08006916 /* getting Specification Version in big endian format */
6917 dev_info->wspecversion = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
6918 desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];
6919
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006920 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
Asutosh Das3d17b9b2020-04-22 14:41:42 -07006921
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006922 err = ufshcd_read_string_desc(hba, model_index,
Bean Huo09750062020-01-20 14:08:14 +01006923 &dev_info->model, SD_ASCII_STD);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006924 if (err < 0) {
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006925 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6926 __func__, err);
6927 goto out;
6928 }
6929
Stanley Chu817d7e12020-05-08 16:01:08 +08006930 ufs_fixup_device_setup(hba);
6931
6932 /*
6933 * Probe WB only for UFS-3.1 devices or UFS devices with quirk
6934 * UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES enabled
6935 */
6936 if (dev_info->wspecversion >= 0x310 ||
Stanley Chuc7cee3e2020-05-22 16:32:10 +08006937 dev_info->wspecversion == 0x220 ||
Stanley Chu817d7e12020-05-08 16:01:08 +08006938 (hba->dev_quirks & UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES))
6939 ufshcd_wb_probe(hba, desc_buf);
6940
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006941 /*
6942 * ufshcd_read_string_desc returns size of the string
6943 * reset the error value
6944 */
6945 err = 0;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006946
6947out:
Kees Cookbbe21d72018-05-02 16:58:09 -07006948 kfree(desc_buf);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006949 return err;
6950}
6951
Bean Huo09750062020-01-20 14:08:14 +01006952static void ufs_put_device_desc(struct ufs_hba *hba)
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006953{
Bean Huo09750062020-01-20 14:08:14 +01006954 struct ufs_dev_info *dev_info = &hba->dev_info;
6955
6956 kfree(dev_info->model);
6957 dev_info->model = NULL;
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006958}
6959
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006960/**
Yaniv Gardi37113102016-03-10 17:37:16 +02006961 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6962 * @hba: per-adapter instance
6963 *
6964 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6965 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6966 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6967 * the hibern8 exit latency.
6968 *
6969 * Returns zero on success, non-zero error value on failure.
6970 */
6971static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6972{
6973 int ret = 0;
6974 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6975
6976 ret = ufshcd_dme_peer_get(hba,
6977 UIC_ARG_MIB_SEL(
6978 RX_MIN_ACTIVATETIME_CAPABILITY,
6979 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6980 &peer_rx_min_activatetime);
6981 if (ret)
6982 goto out;
6983
6984 /* make sure proper unit conversion is applied */
6985 tuned_pa_tactivate =
6986 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6987 / PA_TACTIVATE_TIME_UNIT_US);
6988 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6989 tuned_pa_tactivate);
6990
6991out:
6992 return ret;
6993}
6994
6995/**
6996 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6997 * @hba: per-adapter instance
6998 *
6999 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
7000 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
7001 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
7002 * This optimal value can help reduce the hibern8 exit latency.
7003 *
7004 * Returns zero on success, non-zero error value on failure.
7005 */
7006static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
7007{
7008 int ret = 0;
7009 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
7010 u32 max_hibern8_time, tuned_pa_hibern8time;
7011
7012 ret = ufshcd_dme_get(hba,
7013 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
7014 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
7015 &local_tx_hibern8_time_cap);
7016 if (ret)
7017 goto out;
7018
7019 ret = ufshcd_dme_peer_get(hba,
7020 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
7021 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7022 &peer_rx_hibern8_time_cap);
7023 if (ret)
7024 goto out;
7025
7026 max_hibern8_time = max(local_tx_hibern8_time_cap,
7027 peer_rx_hibern8_time_cap);
7028 /* make sure proper unit conversion is applied */
7029 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
7030 / PA_HIBERN8_TIME_UNIT_US);
7031 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
7032 tuned_pa_hibern8time);
7033out:
7034 return ret;
7035}
7036
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08007037/**
7038 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
7039 * less than device PA_TACTIVATE time.
7040 * @hba: per-adapter instance
7041 *
7042 * Some UFS devices require host PA_TACTIVATE to be lower than device
7043 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
7044 * for such devices.
7045 *
7046 * Returns zero on success, non-zero error value on failure.
7047 */
7048static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
7049{
7050 int ret = 0;
7051 u32 granularity, peer_granularity;
7052 u32 pa_tactivate, peer_pa_tactivate;
7053 u32 pa_tactivate_us, peer_pa_tactivate_us;
7054 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
7055
7056 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7057 &granularity);
7058 if (ret)
7059 goto out;
7060
7061 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7062 &peer_granularity);
7063 if (ret)
7064 goto out;
7065
7066 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
7067 (granularity > PA_GRANULARITY_MAX_VAL)) {
7068 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
7069 __func__, granularity);
7070 return -EINVAL;
7071 }
7072
7073 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
7074 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
7075 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
7076 __func__, peer_granularity);
7077 return -EINVAL;
7078 }
7079
7080 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
7081 if (ret)
7082 goto out;
7083
7084 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
7085 &peer_pa_tactivate);
7086 if (ret)
7087 goto out;
7088
7089 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
7090 peer_pa_tactivate_us = peer_pa_tactivate *
7091 gran_to_us_table[peer_granularity - 1];
7092
7093 if (pa_tactivate_us > peer_pa_tactivate_us) {
7094 u32 new_peer_pa_tactivate;
7095
7096 new_peer_pa_tactivate = pa_tactivate_us /
7097 gran_to_us_table[peer_granularity - 1];
7098 new_peer_pa_tactivate++;
7099 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7100 new_peer_pa_tactivate);
7101 }
7102
7103out:
7104 return ret;
7105}
7106
Bean Huo09750062020-01-20 14:08:14 +01007107static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
Yaniv Gardi37113102016-03-10 17:37:16 +02007108{
7109 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
7110 ufshcd_tune_pa_tactivate(hba);
7111 ufshcd_tune_pa_hibern8time(hba);
7112 }
7113
Can Guoe91ed9e2020-02-23 20:09:21 -08007114 ufshcd_vops_apply_dev_quirks(hba);
7115
Yaniv Gardi37113102016-03-10 17:37:16 +02007116 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
7117 /* set 1ms timeout for PA_TACTIVATE */
7118 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08007119
7120 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
7121 ufshcd_quirk_tune_host_pa_tactivate(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02007122}
7123
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007124static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
7125{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007126 hba->ufs_stats.hibern8_exit_cnt = 0;
7127 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08007128 hba->req_abort_count = 0;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007129}
7130
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00007131static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
7132{
7133 int err;
7134
7135 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
7136 &hba->desc_size.dev_desc);
7137 if (err)
7138 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
7139
7140 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
7141 &hba->desc_size.pwr_desc);
7142 if (err)
7143 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
7144
7145 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
7146 &hba->desc_size.interc_desc);
7147 if (err)
7148 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
7149
7150 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
7151 &hba->desc_size.conf_desc);
7152 if (err)
7153 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
7154
7155 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
7156 &hba->desc_size.unit_desc);
7157 if (err)
7158 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
7159
7160 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
7161 &hba->desc_size.geom_desc);
7162 if (err)
7163 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
Bean Huo059efd82019-10-29 14:22:45 +00007164
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02007165 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
7166 &hba->desc_size.hlth_desc);
7167 if (err)
7168 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00007169}
7170
Bean Huo731f0622020-01-20 14:08:19 +01007171static int ufshcd_device_geo_params_init(struct ufs_hba *hba)
7172{
7173 int err;
7174 size_t buff_len;
7175 u8 *desc_buf;
7176
7177 buff_len = hba->desc_size.geom_desc;
7178 desc_buf = kmalloc(buff_len, GFP_KERNEL);
7179 if (!desc_buf) {
7180 err = -ENOMEM;
7181 goto out;
7182 }
7183
7184 err = ufshcd_read_desc(hba, QUERY_DESC_IDN_GEOMETRY, 0,
7185 desc_buf, buff_len);
7186 if (err) {
7187 dev_err(hba->dev, "%s: Failed reading Geometry Desc. err = %d\n",
7188 __func__, err);
7189 goto out;
7190 }
7191
7192 if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 1)
7193 hba->dev_info.max_lu_supported = 32;
7194 else if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 0)
7195 hba->dev_info.max_lu_supported = 8;
7196
7197out:
7198 kfree(desc_buf);
7199 return err;
7200}
7201
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307202static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
7203 {19200000, REF_CLK_FREQ_19_2_MHZ},
7204 {26000000, REF_CLK_FREQ_26_MHZ},
7205 {38400000, REF_CLK_FREQ_38_4_MHZ},
7206 {52000000, REF_CLK_FREQ_52_MHZ},
7207 {0, REF_CLK_FREQ_INVAL},
7208};
7209
7210static enum ufs_ref_clk_freq
7211ufs_get_bref_clk_from_hz(unsigned long freq)
7212{
7213 int i;
7214
7215 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
7216 if (ufs_ref_clk_freqs[i].freq_hz == freq)
7217 return ufs_ref_clk_freqs[i].val;
7218
7219 return REF_CLK_FREQ_INVAL;
7220}
7221
7222void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
7223{
7224 unsigned long freq;
7225
7226 freq = clk_get_rate(refclk);
7227
7228 hba->dev_ref_clk_freq =
7229 ufs_get_bref_clk_from_hz(freq);
7230
7231 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
7232 dev_err(hba->dev,
7233 "invalid ref_clk setting = %ld\n", freq);
7234}
7235
7236static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
7237{
7238 int err;
7239 u32 ref_clk;
7240 u32 freq = hba->dev_ref_clk_freq;
7241
7242 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
7243 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
7244
7245 if (err) {
7246 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
7247 err);
7248 goto out;
7249 }
7250
7251 if (ref_clk == freq)
7252 goto out; /* nothing to update */
7253
7254 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
7255 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
7256
7257 if (err) {
7258 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
7259 ufs_ref_clk_freqs[freq].freq_hz);
7260 goto out;
7261 }
7262
7263 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
7264 ufs_ref_clk_freqs[freq].freq_hz);
7265
7266out:
7267 return err;
7268}
7269
Bean Huo1b9e2142020-01-20 14:08:15 +01007270static int ufshcd_device_params_init(struct ufs_hba *hba)
7271{
7272 bool flag;
7273 int ret;
7274
7275 /* Init check for device descriptor sizes */
7276 ufshcd_init_desc_sizes(hba);
7277
Bean Huo731f0622020-01-20 14:08:19 +01007278 /* Init UFS geometry descriptor related parameters */
7279 ret = ufshcd_device_geo_params_init(hba);
7280 if (ret)
7281 goto out;
7282
Bean Huo1b9e2142020-01-20 14:08:15 +01007283 /* Check and apply UFS device quirks */
7284 ret = ufs_get_device_desc(hba);
7285 if (ret) {
7286 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
7287 __func__, ret);
7288 goto out;
7289 }
7290
Can Guo09f17792020-02-10 19:40:49 -08007291 ufshcd_get_ref_clk_gating_wait(hba);
7292
Bean Huo1b9e2142020-01-20 14:08:15 +01007293 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08007294 QUERY_FLAG_IDN_PWR_ON_WPE, 0, &flag))
Bean Huo1b9e2142020-01-20 14:08:15 +01007295 hba->dev_info.f_power_on_wp_en = flag;
7296
Bean Huo2b35b2a2020-01-20 14:08:16 +01007297 /* Probe maximum power mode co-supported by both UFS host and device */
7298 if (ufshcd_get_max_pwr_mode(hba))
7299 dev_err(hba->dev,
7300 "%s: Failed getting max supported power mode\n",
7301 __func__);
Bean Huo1b9e2142020-01-20 14:08:15 +01007302out:
7303 return ret;
7304}
7305
7306/**
7307 * ufshcd_add_lus - probe and add UFS logical units
7308 * @hba: per-adapter instance
7309 */
7310static int ufshcd_add_lus(struct ufs_hba *hba)
7311{
7312 int ret;
7313
Bean Huo1b9e2142020-01-20 14:08:15 +01007314 /* Add required well known logical units to scsi mid layer */
7315 ret = ufshcd_scsi_add_wlus(hba);
7316 if (ret)
7317 goto out;
7318
7319 /* Initialize devfreq after UFS device is detected */
7320 if (ufshcd_is_clkscaling_supported(hba)) {
7321 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7322 &hba->pwr_info,
7323 sizeof(struct ufs_pa_layer_attr));
7324 hba->clk_scaling.saved_pwr_info.is_valid = true;
7325 if (!hba->devfreq) {
7326 ret = ufshcd_devfreq_init(hba);
7327 if (ret)
7328 goto out;
7329 }
7330
7331 hba->clk_scaling.is_allowed = true;
7332 }
7333
7334 ufs_bsg_probe(hba);
7335 scsi_scan_host(hba->host);
7336 pm_runtime_put_sync(hba->dev);
7337
Bean Huo1b9e2142020-01-20 14:08:15 +01007338out:
7339 return ret;
7340}
7341
Yaniv Gardi37113102016-03-10 17:37:16 +02007342/**
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007343 * ufshcd_probe_hba - probe hba to detect device and initialize
7344 * @hba: per-adapter instance
Bean Huo1b9e2142020-01-20 14:08:15 +01007345 * @async: asynchronous execution or not
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007346 *
7347 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307348 */
Bean Huo1b9e2142020-01-20 14:08:15 +01007349static int ufshcd_probe_hba(struct ufs_hba *hba, bool async)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307350{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307351 int ret;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007352 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307353
7354 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307355 if (ret)
7356 goto out;
7357
Yaniv Gardiafdfff52016-03-10 17:37:15 +02007358 /* set the default level for urgent bkops */
7359 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
7360 hba->is_urgent_bkops_lvl_checked = false;
7361
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007362 /* Debug counters initialization */
7363 ufshcd_clear_dbg_ufs_stats(hba);
7364
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007365 /* UniPro link is active now */
7366 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05307367
Bean Huo1b9e2142020-01-20 14:08:15 +01007368 /* Verify device initialization by sending NOP OUT UPIU */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307369 ret = ufshcd_verify_dev_init(hba);
7370 if (ret)
7371 goto out;
7372
Bean Huo1b9e2142020-01-20 14:08:15 +01007373 /* Initiate UFS initialization, and waiting until completion */
Dolev Raviv68078d52013-07-30 00:35:58 +05307374 ret = ufshcd_complete_dev_init(hba);
7375 if (ret)
7376 goto out;
7377
Bean Huo1b9e2142020-01-20 14:08:15 +01007378 /*
7379 * Initialize UFS device parameters used by driver, these
7380 * parameters are associated with UFS descriptors.
7381 */
7382 if (async) {
7383 ret = ufshcd_device_params_init(hba);
7384 if (ret)
7385 goto out;
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02007386 }
7387
Bean Huo09750062020-01-20 14:08:14 +01007388 ufshcd_tune_unipro_params(hba);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007389
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007390 /* UFS device is also active now */
7391 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307392 ufshcd_force_reset_auto_bkops(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007393 hba->wlun_dev_clr_ua = true;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307394
Bean Huo2b35b2a2020-01-20 14:08:16 +01007395 /* Gear up to HS gear if supported */
7396 if (hba->max_pwr_info.is_valid) {
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307397 /*
7398 * Set the right value to bRefClkFreq before attempting to
7399 * switch to HS gears.
7400 */
7401 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
7402 ufshcd_set_dev_ref_clk(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007403 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Dov Levenglick8643ae62016-10-17 17:10:14 -07007404 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007405 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
7406 __func__, ret);
Dov Levenglick8643ae62016-10-17 17:10:14 -07007407 goto out;
7408 }
Can Guo6a9df812020-02-11 21:38:28 -08007409 ufshcd_print_pwr_info(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007410 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007411
Can Guoe89860f2020-03-26 02:25:41 -07007412 /*
7413 * bActiveICCLevel is volatile for UFS device (as per latest v2.1 spec)
7414 * and for removable UFS card as well, hence always set the parameter.
7415 * Note: Error handler may issue the device reset hence resetting
7416 * bActiveICCLevel as well so it is always safe to set this here.
7417 */
7418 ufshcd_set_active_icc_lvl(hba);
7419
Yaniv Gardi53c12d02016-02-01 15:02:45 +02007420 /* set the state as operational after switching to desired gear */
7421 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00007422
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007423 ufshcd_wb_config(hba);
Can Guo71d848b2019-11-14 22:09:26 -08007424 /* Enable Auto-Hibernate if configured */
7425 ufshcd_auto_hibern8_enable(hba);
7426
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307427out:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007428
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007429 trace_ufshcd_init(dev_name(hba->dev), ret,
7430 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007431 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007432 return ret;
7433}
7434
7435/**
7436 * ufshcd_async_scan - asynchronous execution for probing hba
7437 * @data: data pointer to pass to this function
7438 * @cookie: cookie data
7439 */
7440static void ufshcd_async_scan(void *data, async_cookie_t cookie)
7441{
7442 struct ufs_hba *hba = (struct ufs_hba *)data;
Bean Huo1b9e2142020-01-20 14:08:15 +01007443 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007444
Bean Huo1b9e2142020-01-20 14:08:15 +01007445 /* Initialize hba, detect and initialize UFS device */
7446 ret = ufshcd_probe_hba(hba, true);
7447 if (ret)
7448 goto out;
7449
7450 /* Probe and add UFS logical units */
7451 ret = ufshcd_add_lus(hba);
7452out:
7453 /*
7454 * If we failed to initialize the device or the device is not
7455 * present, turn off the power/clocks etc.
7456 */
7457 if (ret) {
7458 pm_runtime_put_sync(hba->dev);
7459 ufshcd_exit_clk_scaling(hba);
7460 ufshcd_hba_exit(hba);
7461 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307462}
7463
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007464static const struct attribute_group *ufshcd_driver_groups[] = {
7465 &ufs_sysfs_unit_descriptor_group,
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02007466 &ufs_sysfs_lun_attributes_group,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007467 NULL,
7468};
7469
Stanley Chu90b84912020-05-09 17:37:13 +08007470static struct ufs_hba_variant_params ufs_hba_vps = {
7471 .hba_enable_delay_us = 1000,
Stanley Chud14734ae2020-05-09 17:37:15 +08007472 .wb_flush_threshold = UFS_WB_BUF_REMAIN_PERCENT(40),
Stanley Chu90b84912020-05-09 17:37:13 +08007473 .devfreq_profile.polling_ms = 100,
7474 .devfreq_profile.target = ufshcd_devfreq_target,
7475 .devfreq_profile.get_dev_status = ufshcd_devfreq_get_dev_status,
7476 .ondemand_data.upthreshold = 70,
7477 .ondemand_data.downdifferential = 5,
7478};
7479
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307480static struct scsi_host_template ufshcd_driver_template = {
7481 .module = THIS_MODULE,
7482 .name = UFSHCD,
7483 .proc_name = UFSHCD,
7484 .queuecommand = ufshcd_queuecommand,
7485 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09007486 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307487 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03007488 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307489 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307490 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
7491 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307492 .this_id = -1,
7493 .sg_tablesize = SG_ALL,
7494 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
7495 .can_queue = UFSHCD_CAN_QUEUE,
Christoph Hellwig552a9902019-06-17 14:19:55 +02007496 .max_segment_size = PRDT_DATA_BYTE_COUNT_MAX,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007497 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01007498 .track_queue_depth = 1,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007499 .sdev_groups = ufshcd_driver_groups,
Christoph Hellwig4af14d12018-12-13 16:17:09 +01007500 .dma_boundary = PAGE_SIZE - 1,
Stanley Chu49615ba2019-09-16 23:56:50 +08007501 .rpm_autosuspend_delay = RPM_AUTOSUSPEND_DELAY_MS,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307502};
7503
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007504static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
7505 int ua)
7506{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007507 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007508
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007509 if (!vreg)
7510 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007511
Stanley Chu0487fff2019-03-28 17:16:25 +08007512 /*
7513 * "set_load" operation shall be required on those regulators
7514 * which specifically configured current limitation. Otherwise
7515 * zero max_uA may cause unexpected behavior when regulator is
7516 * enabled or set as high power mode.
7517 */
7518 if (!vreg->max_uA)
7519 return 0;
7520
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007521 ret = regulator_set_load(vreg->reg, ua);
7522 if (ret < 0) {
7523 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
7524 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007525 }
7526
7527 return ret;
7528}
7529
7530static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7531 struct ufs_vreg *vreg)
7532{
Marc Gonzalez73067982019-02-27 11:41:45 +01007533 return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007534}
7535
7536static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7537 struct ufs_vreg *vreg)
7538{
Adrian Hunter7c7cfdc2019-08-14 15:59:50 +03007539 if (!vreg)
7540 return 0;
7541
Marc Gonzalez73067982019-02-27 11:41:45 +01007542 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007543}
7544
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007545static int ufshcd_config_vreg(struct device *dev,
7546 struct ufs_vreg *vreg, bool on)
7547{
7548 int ret = 0;
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007549 struct regulator *reg;
7550 const char *name;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007551 int min_uV, uA_load;
7552
7553 BUG_ON(!vreg);
7554
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007555 reg = vreg->reg;
7556 name = vreg->name;
7557
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007558 if (regulator_count_voltages(reg) > 0) {
Asutosh Das90d88f42020-02-10 19:40:45 -08007559 uA_load = on ? vreg->max_uA : 0;
7560 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7561 if (ret)
7562 goto out;
7563
Stanley Chu3b141e82019-03-28 17:16:24 +08007564 if (vreg->min_uV && vreg->max_uV) {
7565 min_uV = on ? vreg->min_uV : 0;
7566 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7567 if (ret) {
7568 dev_err(dev,
7569 "%s: %s set voltage failed, err=%d\n",
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007570 __func__, name, ret);
Stanley Chu3b141e82019-03-28 17:16:24 +08007571 goto out;
7572 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007573 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007574 }
7575out:
7576 return ret;
7577}
7578
7579static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7580{
7581 int ret = 0;
7582
Marc Gonzalez73067982019-02-27 11:41:45 +01007583 if (!vreg || vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007584 goto out;
7585
7586 ret = ufshcd_config_vreg(dev, vreg, true);
7587 if (!ret)
7588 ret = regulator_enable(vreg->reg);
7589
7590 if (!ret)
7591 vreg->enabled = true;
7592 else
7593 dev_err(dev, "%s: %s enable failed, err=%d\n",
7594 __func__, vreg->name, ret);
7595out:
7596 return ret;
7597}
7598
7599static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7600{
7601 int ret = 0;
7602
Marc Gonzalez73067982019-02-27 11:41:45 +01007603 if (!vreg || !vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007604 goto out;
7605
7606 ret = regulator_disable(vreg->reg);
7607
7608 if (!ret) {
7609 /* ignore errors on applying disable config */
7610 ufshcd_config_vreg(dev, vreg, false);
7611 vreg->enabled = false;
7612 } else {
7613 dev_err(dev, "%s: %s disable failed, err=%d\n",
7614 __func__, vreg->name, ret);
7615 }
7616out:
7617 return ret;
7618}
7619
7620static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7621{
7622 int ret = 0;
7623 struct device *dev = hba->dev;
7624 struct ufs_vreg_info *info = &hba->vreg_info;
7625
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007626 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7627 if (ret)
7628 goto out;
7629
7630 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7631 if (ret)
7632 goto out;
7633
7634 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7635 if (ret)
7636 goto out;
7637
7638out:
7639 if (ret) {
7640 ufshcd_toggle_vreg(dev, info->vccq2, false);
7641 ufshcd_toggle_vreg(dev, info->vccq, false);
7642 ufshcd_toggle_vreg(dev, info->vcc, false);
7643 }
7644 return ret;
7645}
7646
Raviv Shvili6a771a62014-09-25 15:32:24 +03007647static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7648{
7649 struct ufs_vreg_info *info = &hba->vreg_info;
7650
Zeng Guangyue60b7b822019-03-30 17:03:13 +08007651 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007652}
7653
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007654static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7655{
7656 int ret = 0;
7657
7658 if (!vreg)
7659 goto out;
7660
7661 vreg->reg = devm_regulator_get(dev, vreg->name);
7662 if (IS_ERR(vreg->reg)) {
7663 ret = PTR_ERR(vreg->reg);
7664 dev_err(dev, "%s: %s get failed, err=%d\n",
7665 __func__, vreg->name, ret);
7666 }
7667out:
7668 return ret;
7669}
7670
7671static int ufshcd_init_vreg(struct ufs_hba *hba)
7672{
7673 int ret = 0;
7674 struct device *dev = hba->dev;
7675 struct ufs_vreg_info *info = &hba->vreg_info;
7676
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007677 ret = ufshcd_get_vreg(dev, info->vcc);
7678 if (ret)
7679 goto out;
7680
7681 ret = ufshcd_get_vreg(dev, info->vccq);
7682 if (ret)
7683 goto out;
7684
7685 ret = ufshcd_get_vreg(dev, info->vccq2);
7686out:
7687 return ret;
7688}
7689
Raviv Shvili6a771a62014-09-25 15:32:24 +03007690static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7691{
7692 struct ufs_vreg_info *info = &hba->vreg_info;
7693
7694 if (info)
7695 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7696
7697 return 0;
7698}
7699
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007700static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7701 bool skip_ref_clk)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007702{
7703 int ret = 0;
7704 struct ufs_clk_info *clki;
7705 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007706 unsigned long flags;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007707 ktime_t start = ktime_get();
7708 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007709
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007710 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007711 goto out;
7712
Can Guo38f32422020-02-10 19:40:47 -08007713 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
7714 if (ret)
7715 return ret;
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007716
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007717 list_for_each_entry(clki, head, list) {
7718 if (!IS_ERR_OR_NULL(clki->clk)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007719 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7720 continue;
7721
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007722 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007723 if (on && !clki->enabled) {
7724 ret = clk_prepare_enable(clki->clk);
7725 if (ret) {
7726 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7727 __func__, clki->name, ret);
7728 goto out;
7729 }
7730 } else if (!on && clki->enabled) {
7731 clk_disable_unprepare(clki->clk);
7732 }
7733 clki->enabled = on;
7734 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7735 clki->name, on ? "en" : "dis");
7736 }
7737 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007738
Can Guo38f32422020-02-10 19:40:47 -08007739 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
7740 if (ret)
7741 return ret;
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007742
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007743out:
7744 if (ret) {
7745 list_for_each_entry(clki, head, list) {
7746 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7747 clk_disable_unprepare(clki->clk);
7748 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007749 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007750 spin_lock_irqsave(hba->host->host_lock, flags);
7751 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007752 trace_ufshcd_clk_gating(dev_name(hba->dev),
7753 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007754 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007755 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007756
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007757 if (clk_state_changed)
7758 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7759 (on ? "on" : "off"),
7760 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007761 return ret;
7762}
7763
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007764static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
7765{
7766 return __ufshcd_setup_clocks(hba, on, false);
7767}
7768
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007769static int ufshcd_init_clocks(struct ufs_hba *hba)
7770{
7771 int ret = 0;
7772 struct ufs_clk_info *clki;
7773 struct device *dev = hba->dev;
7774 struct list_head *head = &hba->clk_list_head;
7775
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007776 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007777 goto out;
7778
7779 list_for_each_entry(clki, head, list) {
7780 if (!clki->name)
7781 continue;
7782
7783 clki->clk = devm_clk_get(dev, clki->name);
7784 if (IS_ERR(clki->clk)) {
7785 ret = PTR_ERR(clki->clk);
7786 dev_err(dev, "%s: %s clk get failed, %d\n",
7787 __func__, clki->name, ret);
7788 goto out;
7789 }
7790
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307791 /*
7792 * Parse device ref clk freq as per device tree "ref_clk".
7793 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
7794 * in ufshcd_alloc_host().
7795 */
7796 if (!strcmp(clki->name, "ref_clk"))
7797 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
7798
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007799 if (clki->max_freq) {
7800 ret = clk_set_rate(clki->clk, clki->max_freq);
7801 if (ret) {
7802 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7803 __func__, clki->name,
7804 clki->max_freq, ret);
7805 goto out;
7806 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03007807 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007808 }
7809 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7810 clki->name, clk_get_rate(clki->clk));
7811 }
7812out:
7813 return ret;
7814}
7815
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007816static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7817{
7818 int err = 0;
7819
7820 if (!hba->vops)
7821 goto out;
7822
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007823 err = ufshcd_vops_init(hba);
7824 if (err)
7825 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007826
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007827 err = ufshcd_vops_setup_regulators(hba, true);
7828 if (err)
7829 goto out_exit;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007830
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007831 goto out;
7832
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007833out_exit:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007834 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007835out:
7836 if (err)
7837 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007838 __func__, ufshcd_get_var_name(hba), err);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007839 return err;
7840}
7841
7842static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7843{
7844 if (!hba->vops)
7845 return;
7846
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007847 ufshcd_vops_setup_regulators(hba, false);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007848
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007849 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007850}
7851
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007852static int ufshcd_hba_init(struct ufs_hba *hba)
7853{
7854 int err;
7855
Raviv Shvili6a771a62014-09-25 15:32:24 +03007856 /*
7857 * Handle host controller power separately from the UFS device power
7858 * rails as it will help controlling the UFS host controller power
7859 * collapse easily which is different than UFS device power collapse.
7860 * Also, enable the host controller power before we go ahead with rest
7861 * of the initialization here.
7862 */
7863 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007864 if (err)
7865 goto out;
7866
Raviv Shvili6a771a62014-09-25 15:32:24 +03007867 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007868 if (err)
7869 goto out;
7870
Raviv Shvili6a771a62014-09-25 15:32:24 +03007871 err = ufshcd_init_clocks(hba);
7872 if (err)
7873 goto out_disable_hba_vreg;
7874
7875 err = ufshcd_setup_clocks(hba, true);
7876 if (err)
7877 goto out_disable_hba_vreg;
7878
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007879 err = ufshcd_init_vreg(hba);
7880 if (err)
7881 goto out_disable_clks;
7882
7883 err = ufshcd_setup_vreg(hba, true);
7884 if (err)
7885 goto out_disable_clks;
7886
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007887 err = ufshcd_variant_hba_init(hba);
7888 if (err)
7889 goto out_disable_vreg;
7890
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007891 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007892 goto out;
7893
7894out_disable_vreg:
7895 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007896out_disable_clks:
7897 ufshcd_setup_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007898out_disable_hba_vreg:
7899 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007900out:
7901 return err;
7902}
7903
7904static void ufshcd_hba_exit(struct ufs_hba *hba)
7905{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007906 if (hba->is_powered) {
7907 ufshcd_variant_hba_exit(hba);
7908 ufshcd_setup_vreg(hba, false);
Gilad Bronera5082532016-10-17 17:10:00 -07007909 ufshcd_suspend_clkscaling(hba);
Vivek Gautameebcc192018-08-07 23:17:39 +05307910 if (ufshcd_is_clkscaling_supported(hba))
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007911 if (hba->devfreq)
7912 ufshcd_suspend_clkscaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007913 ufshcd_setup_clocks(hba, false);
7914 ufshcd_setup_hba_vreg(hba, false);
7915 hba->is_powered = false;
Bean Huo09750062020-01-20 14:08:14 +01007916 ufs_put_device_desc(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007917 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007918}
7919
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007920static int
7921ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307922{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007923 unsigned char cmd[6] = {REQUEST_SENSE,
7924 0,
7925 0,
7926 0,
Avri Altman09a5a242018-11-22 20:04:56 +02007927 UFS_SENSE_SIZE,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007928 0};
7929 char *buffer;
7930 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307931
Avri Altman09a5a242018-11-22 20:04:56 +02007932 buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007933 if (!buffer) {
7934 ret = -ENOMEM;
7935 goto out;
7936 }
7937
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007938 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
Avri Altman09a5a242018-11-22 20:04:56 +02007939 UFS_SENSE_SIZE, NULL, NULL,
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007940 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007941 if (ret)
7942 pr_err("%s: failed with err %d\n", __func__, ret);
7943
7944 kfree(buffer);
7945out:
7946 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307947}
7948
7949/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007950 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7951 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307952 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007953 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307954 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007955 * Returns 0 if requested power mode is set successfully
7956 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307957 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007958static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7959 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307960{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007961 unsigned char cmd[6] = { START_STOP };
7962 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007963 struct scsi_device *sdp;
7964 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007965 int ret;
7966
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007967 spin_lock_irqsave(hba->host->host_lock, flags);
7968 sdp = hba->sdev_ufs_device;
7969 if (sdp) {
7970 ret = scsi_device_get(sdp);
7971 if (!ret && !scsi_device_online(sdp)) {
7972 ret = -ENODEV;
7973 scsi_device_put(sdp);
7974 }
7975 } else {
7976 ret = -ENODEV;
7977 }
7978 spin_unlock_irqrestore(hba->host->host_lock, flags);
7979
7980 if (ret)
7981 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007982
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307983 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007984 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7985 * handling, which would wait for host to be resumed. Since we know
7986 * we are functional while we are here, skip host resume in error
7987 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307988 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007989 hba->host->eh_noresume = 1;
7990 if (hba->wlun_dev_clr_ua) {
7991 ret = ufshcd_send_request_sense(hba, sdp);
7992 if (ret)
7993 goto out;
7994 /* Unit attention condition is cleared now */
7995 hba->wlun_dev_clr_ua = false;
7996 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307997
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007998 cmd[4] = pwr_mode << 4;
7999
8000 /*
8001 * Current function would be generally called from the power management
Christoph Hellwige8064022016-10-20 15:12:13 +02008002 * callbacks hence set the RQF_PM flag so that it doesn't resume the
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008003 * already suspended childs.
8004 */
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01008005 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
8006 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008007 if (ret) {
8008 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02008009 "START_STOP failed for power mode: %d, result %x\n",
8010 pwr_mode, ret);
Johannes Thumshirnc65be1a2018-06-25 13:20:58 +02008011 if (driver_byte(ret) == DRIVER_SENSE)
Hannes Reinecke21045512015-01-08 07:43:46 +01008012 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008013 }
8014
8015 if (!ret)
8016 hba->curr_dev_pwr_mode = pwr_mode;
8017out:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03008018 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008019 hba->host->eh_noresume = 0;
8020 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308021}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308022
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008023static int ufshcd_link_state_transition(struct ufs_hba *hba,
8024 enum uic_link_state req_link_state,
8025 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308026{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008027 int ret = 0;
8028
8029 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308030 return 0;
8031
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008032 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
8033 ret = ufshcd_uic_hibern8_enter(hba);
8034 if (!ret)
8035 ufshcd_set_link_hibern8(hba);
8036 else
8037 goto out;
8038 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308039 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008040 * If autobkops is enabled, link can't be turned off because
8041 * turning off the link would also turn off the device.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308042 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008043 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
Dan Carpenterdc30c9e2019-12-13 13:49:35 +03008044 (!check_for_bkops || !hba->auto_bkops_enabled)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008045 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02008046 * Let's make sure that link is in low power mode, we are doing
8047 * this currently by putting the link in Hibern8. Otherway to
8048 * put the link in low power mode is to send the DME end point
8049 * to device and then send the DME reset command to local
8050 * unipro. But putting the link in hibern8 is much faster.
8051 */
8052 ret = ufshcd_uic_hibern8_enter(hba);
8053 if (ret)
8054 goto out;
8055 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008056 * Change controller state to "reset state" which
8057 * should also put the link in off/reset state
8058 */
Bart Van Assche5cac1092020-05-07 15:27:50 -07008059 ufshcd_hba_stop(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008060 /*
8061 * TODO: Check if we need any delay to make sure that
8062 * controller is reset
8063 */
8064 ufshcd_set_link_off(hba);
8065 }
8066
8067out:
8068 return ret;
8069}
8070
8071static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
8072{
8073 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02008074 * It seems some UFS devices may keep drawing more than sleep current
8075 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
8076 * To avoid this situation, add 2ms delay before putting these UFS
8077 * rails in LPM mode.
8078 */
8079 if (!ufshcd_is_link_active(hba) &&
8080 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
8081 usleep_range(2000, 2100);
8082
8083 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008084 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
8085 * power.
8086 *
8087 * If UFS device and link is in OFF state, all power supplies (VCC,
8088 * VCCQ, VCCQ2) can be turned off if power on write protect is not
8089 * required. If UFS link is inactive (Hibern8 or OFF state) and device
8090 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
8091 *
8092 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
8093 * in low power state which would save some power.
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008094 *
8095 * If Write Booster is enabled and the device needs to flush the WB
8096 * buffer OR if bkops status is urgent for WB, keep Vcc on.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008097 */
8098 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8099 !hba->dev_info.is_lu_power_on_wp) {
8100 ufshcd_setup_vreg(hba, false);
8101 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008102 if (!hba->dev_info.keep_vcc_on)
8103 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008104 if (!ufshcd_is_link_active(hba)) {
8105 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8106 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
8107 }
8108 }
8109}
8110
8111static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
8112{
8113 int ret = 0;
8114
8115 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8116 !hba->dev_info.is_lu_power_on_wp) {
8117 ret = ufshcd_setup_vreg(hba, true);
8118 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008119 if (!ret && !ufshcd_is_link_active(hba)) {
8120 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
8121 if (ret)
8122 goto vcc_disable;
8123 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
8124 if (ret)
8125 goto vccq_lpm;
8126 }
Subhash Jadavani69d72ac2016-10-27 17:26:24 -07008127 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008128 }
8129 goto out;
8130
8131vccq_lpm:
8132 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8133vcc_disable:
8134 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
8135out:
8136 return ret;
8137}
8138
8139static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
8140{
8141 if (ufshcd_is_link_off(hba))
8142 ufshcd_setup_hba_vreg(hba, false);
8143}
8144
8145static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
8146{
8147 if (ufshcd_is_link_off(hba))
8148 ufshcd_setup_hba_vreg(hba, true);
8149}
8150
8151/**
8152 * ufshcd_suspend - helper function for suspend operations
8153 * @hba: per adapter instance
8154 * @pm_op: desired low power operation type
8155 *
8156 * This function will try to put the UFS device and link into low power
8157 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
8158 * (System PM level).
8159 *
8160 * If this function is called during shutdown, it will make sure that
8161 * both UFS device and UFS link is powered off.
8162 *
8163 * NOTE: UFS device & link must be active before we enter in this function.
8164 *
8165 * Returns 0 for success and non-zero for failure
8166 */
8167static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8168{
8169 int ret = 0;
8170 enum ufs_pm_level pm_lvl;
8171 enum ufs_dev_pwr_mode req_dev_pwr_mode;
8172 enum uic_link_state req_link_state;
8173
8174 hba->pm_op_in_progress = 1;
8175 if (!ufshcd_is_shutdown_pm(pm_op)) {
8176 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
8177 hba->rpm_lvl : hba->spm_lvl;
8178 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
8179 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
8180 } else {
8181 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
8182 req_link_state = UIC_LINK_OFF_STATE;
8183 }
8184
8185 /*
8186 * If we can't transition into any of the low power modes
8187 * just gate the clocks.
8188 */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008189 ufshcd_hold(hba, false);
8190 hba->clk_gating.is_suspended = true;
8191
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08008192 if (hba->clk_scaling.is_allowed) {
8193 cancel_work_sync(&hba->clk_scaling.suspend_work);
8194 cancel_work_sync(&hba->clk_scaling.resume_work);
8195 ufshcd_suspend_clkscaling(hba);
8196 }
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07008197
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008198 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
8199 req_link_state == UIC_LINK_ACTIVE_STATE) {
8200 goto disable_clks;
8201 }
8202
8203 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
8204 (req_link_state == hba->uic_link_state))
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07008205 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008206
8207 /* UFS device & link must be active before we enter in this function */
8208 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
8209 ret = -EINVAL;
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07008210 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008211 }
8212
8213 if (ufshcd_is_runtime_pm(pm_op)) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03008214 if (ufshcd_can_autobkops_during_suspend(hba)) {
8215 /*
8216 * The device is idle with no requests in the queue,
8217 * allow background operations if bkops status shows
8218 * that performance might be impacted.
8219 */
8220 ret = ufshcd_urgent_bkops(hba);
8221 if (ret)
8222 goto enable_gating;
8223 } else {
8224 /* make sure that auto bkops is disabled */
8225 ufshcd_disable_auto_bkops(hba);
8226 }
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008227 /*
8228 * With wb enabled, if the bkops is enabled or if the
8229 * configured WB type is 70% full, keep vcc ON
8230 * for the device to flush the wb buffer
8231 */
Stanley Chu79e35202020-05-08 16:01:15 +08008232 if ((hba->auto_bkops_enabled && ufshcd_is_wb_allowed(hba)) ||
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008233 ufshcd_wb_keep_vcc_on(hba))
8234 hba->dev_info.keep_vcc_on = true;
8235 else
8236 hba->dev_info.keep_vcc_on = false;
Stanley Chu79e35202020-05-08 16:01:15 +08008237 } else {
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008238 hba->dev_info.keep_vcc_on = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008239 }
8240
8241 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008242 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
8243 !ufshcd_is_runtime_pm(pm_op))) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008244 /* ensure that bkops is disabled */
8245 ufshcd_disable_auto_bkops(hba);
8246 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
8247 if (ret)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008248 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008249 }
8250
Sayali Lokhande2824ec92020-02-10 19:40:44 -08008251 flush_work(&hba->eeh_work);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008252 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
8253 if (ret)
8254 goto set_dev_active;
8255
8256 ufshcd_vreg_set_lpm(hba);
8257
8258disable_clks:
8259 /*
8260 * Call vendor specific suspend callback. As these callbacks may access
8261 * vendor specific host controller register space call them before the
8262 * host clocks are ON.
8263 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008264 ret = ufshcd_vops_suspend(hba, pm_op);
8265 if (ret)
8266 goto set_link_active;
Stanley Chudcb6cec2019-12-07 20:22:00 +08008267 /*
8268 * Disable the host irq as host controller as there won't be any
8269 * host controller transaction expected till resume.
8270 */
8271 ufshcd_disable_irq(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008272
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008273 if (!ufshcd_is_link_active(hba))
8274 ufshcd_setup_clocks(hba, false);
8275 else
8276 /* If link is active, device ref_clk can't be switched off */
8277 __ufshcd_setup_clocks(hba, false, true);
8278
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008279 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008280 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Stanley Chudcb6cec2019-12-07 20:22:00 +08008281
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008282 /* Put the host controller in low power mode if possible */
8283 ufshcd_hba_vreg_set_lpm(hba);
8284 goto out;
8285
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008286set_link_active:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08008287 if (hba->clk_scaling.is_allowed)
8288 ufshcd_resume_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008289 ufshcd_vreg_set_hpm(hba);
8290 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
8291 ufshcd_set_link_active(hba);
8292 else if (ufshcd_is_link_off(hba))
8293 ufshcd_host_reset_and_restore(hba);
8294set_dev_active:
8295 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
8296 ufshcd_disable_auto_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008297enable_gating:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08008298 if (hba->clk_scaling.is_allowed)
8299 ufshcd_resume_clkscaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008300 hba->clk_gating.is_suspended = false;
8301 ufshcd_release(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008302out:
8303 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08008304 if (ret)
8305 ufshcd_update_reg_hist(&hba->ufs_stats.suspend_err, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008306 return ret;
8307}
8308
8309/**
8310 * ufshcd_resume - helper function for resume operations
8311 * @hba: per adapter instance
8312 * @pm_op: runtime PM or system PM
8313 *
8314 * This function basically brings the UFS device, UniPro link and controller
8315 * to active state.
8316 *
8317 * Returns 0 for success and non-zero for failure
8318 */
8319static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8320{
8321 int ret;
8322 enum uic_link_state old_link_state;
8323
8324 hba->pm_op_in_progress = 1;
8325 old_link_state = hba->uic_link_state;
8326
8327 ufshcd_hba_vreg_set_hpm(hba);
8328 /* Make sure clocks are enabled before accessing controller */
8329 ret = ufshcd_setup_clocks(hba, true);
8330 if (ret)
8331 goto out;
8332
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008333 /* enable the host irq as host controller would be active soon */
Can Guo5231d382019-12-05 02:14:46 +00008334 ufshcd_enable_irq(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008335
8336 ret = ufshcd_vreg_set_hpm(hba);
8337 if (ret)
8338 goto disable_irq_and_vops_clks;
8339
8340 /*
8341 * Call vendor specific resume callback. As these callbacks may access
8342 * vendor specific host controller register space call them when the
8343 * host clocks are ON.
8344 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008345 ret = ufshcd_vops_resume(hba, pm_op);
8346 if (ret)
8347 goto disable_vreg;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008348
8349 if (ufshcd_is_link_hibern8(hba)) {
8350 ret = ufshcd_uic_hibern8_exit(hba);
8351 if (!ret)
8352 ufshcd_set_link_active(hba);
8353 else
8354 goto vendor_suspend;
8355 } else if (ufshcd_is_link_off(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008356 /*
Asutosh Das089f5b62020-04-13 23:14:48 -07008357 * A full initialization of the host and the device is
8358 * required since the link was put to off during suspend.
8359 */
8360 ret = ufshcd_reset_and_restore(hba);
8361 /*
8362 * ufshcd_reset_and_restore() should have already
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008363 * set the link state as active
8364 */
8365 if (ret || !ufshcd_is_link_active(hba))
8366 goto vendor_suspend;
8367 }
8368
8369 if (!ufshcd_is_ufs_dev_active(hba)) {
8370 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
8371 if (ret)
8372 goto set_old_link_state;
8373 }
8374
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08008375 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
8376 ufshcd_enable_auto_bkops(hba);
8377 else
8378 /*
8379 * If BKOPs operations are urgently needed at this moment then
8380 * keep auto-bkops enabled or else disable it.
8381 */
8382 ufshcd_urgent_bkops(hba);
8383
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008384 hba->clk_gating.is_suspended = false;
8385
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08008386 if (hba->clk_scaling.is_allowed)
8387 ufshcd_resume_clkscaling(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03008388
Adrian Hunterad448372018-03-20 15:07:38 +02008389 /* Enable Auto-Hibernate if configured */
8390 ufshcd_auto_hibern8_enable(hba);
8391
Can Guo71d848b2019-11-14 22:09:26 -08008392 /* Schedule clock gating in case of no access to UFS device yet */
8393 ufshcd_release(hba);
8394
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008395 goto out;
8396
8397set_old_link_state:
8398 ufshcd_link_state_transition(hba, old_link_state, 0);
8399vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008400 ufshcd_vops_suspend(hba, pm_op);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008401disable_vreg:
8402 ufshcd_vreg_set_lpm(hba);
8403disable_irq_and_vops_clks:
8404 ufshcd_disable_irq(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08008405 if (hba->clk_scaling.is_allowed)
8406 ufshcd_suspend_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008407 ufshcd_setup_clocks(hba, false);
8408out:
8409 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08008410 if (ret)
8411 ufshcd_update_reg_hist(&hba->ufs_stats.resume_err, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008412 return ret;
8413}
8414
8415/**
8416 * ufshcd_system_suspend - system suspend routine
8417 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008418 *
8419 * Check the description of ufshcd_suspend() function for more details.
8420 *
8421 * Returns 0 for success and non-zero for failure
8422 */
8423int ufshcd_system_suspend(struct ufs_hba *hba)
8424{
8425 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008426 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008427
8428 if (!hba || !hba->is_powered)
Dolev Raviv233b5942014-10-23 13:25:14 +03008429 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008430
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008431 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
8432 hba->curr_dev_pwr_mode) &&
8433 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
8434 hba->uic_link_state))
8435 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008436
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008437 if (pm_runtime_suspended(hba->dev)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008438 /*
8439 * UFS device and/or UFS link low power states during runtime
8440 * suspend seems to be different than what is expected during
8441 * system suspend. Hence runtime resume the devic & link and
8442 * let the system suspend low power states to take effect.
8443 * TODO: If resume takes longer time, we might have optimize
8444 * it in future by not resuming everything if possible.
8445 */
8446 ret = ufshcd_runtime_resume(hba);
8447 if (ret)
8448 goto out;
8449 }
8450
8451 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
8452out:
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008453 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
8454 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008455 hba->curr_dev_pwr_mode, hba->uic_link_state);
Dolev Ravive7850602014-09-25 15:32:36 +03008456 if (!ret)
8457 hba->is_sys_suspended = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008458 return ret;
8459}
8460EXPORT_SYMBOL(ufshcd_system_suspend);
8461
8462/**
8463 * ufshcd_system_resume - system resume routine
8464 * @hba: per adapter instance
8465 *
8466 * Returns 0 for success and non-zero for failure
8467 */
8468
8469int ufshcd_system_resume(struct ufs_hba *hba)
8470{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008471 int ret = 0;
8472 ktime_t start = ktime_get();
8473
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008474 if (!hba)
8475 return -EINVAL;
8476
8477 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008478 /*
8479 * Let the runtime resume take care of resuming
8480 * if runtime suspended.
8481 */
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008482 goto out;
8483 else
8484 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
8485out:
8486 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
8487 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008488 hba->curr_dev_pwr_mode, hba->uic_link_state);
Stanley Chuce9e7bc2019-01-07 22:19:34 +08008489 if (!ret)
8490 hba->is_sys_suspended = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008491 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008492}
8493EXPORT_SYMBOL(ufshcd_system_resume);
8494
8495/**
8496 * ufshcd_runtime_suspend - runtime suspend routine
8497 * @hba: per adapter instance
8498 *
8499 * Check the description of ufshcd_suspend() function for more details.
8500 *
8501 * Returns 0 for success and non-zero for failure
8502 */
8503int ufshcd_runtime_suspend(struct ufs_hba *hba)
8504{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008505 int ret = 0;
8506 ktime_t start = ktime_get();
8507
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008508 if (!hba)
8509 return -EINVAL;
8510
8511 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008512 goto out;
8513 else
8514 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
8515out:
8516 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
8517 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008518 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008519 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308520}
8521EXPORT_SYMBOL(ufshcd_runtime_suspend);
8522
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008523/**
8524 * ufshcd_runtime_resume - runtime resume routine
8525 * @hba: per adapter instance
8526 *
8527 * This function basically brings the UFS device, UniPro link and controller
8528 * to active state. Following operations are done in this function:
8529 *
8530 * 1. Turn on all the controller related clocks
8531 * 2. Bring the UniPro link out of Hibernate state
8532 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
8533 * to active state.
8534 * 4. If auto-bkops is enabled on the device, disable it.
8535 *
8536 * So following would be the possible power state after this function return
8537 * successfully:
8538 * S1: UFS device in Active state with VCC rail ON
8539 * UniPro link in Active state
8540 * All the UFS/UniPro controller clocks are ON
8541 *
8542 * Returns 0 for success and non-zero for failure
8543 */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308544int ufshcd_runtime_resume(struct ufs_hba *hba)
8545{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008546 int ret = 0;
8547 ktime_t start = ktime_get();
8548
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008549 if (!hba)
8550 return -EINVAL;
8551
8552 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008553 goto out;
8554 else
8555 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8556out:
8557 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8558 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008559 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008560 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308561}
8562EXPORT_SYMBOL(ufshcd_runtime_resume);
8563
8564int ufshcd_runtime_idle(struct ufs_hba *hba)
8565{
8566 return 0;
8567}
8568EXPORT_SYMBOL(ufshcd_runtime_idle);
8569
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308570/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008571 * ufshcd_shutdown - shutdown routine
8572 * @hba: per adapter instance
8573 *
8574 * This function would power off both UFS device and UFS link.
8575 *
8576 * Returns 0 always to allow force shutdown even in case of errors.
8577 */
8578int ufshcd_shutdown(struct ufs_hba *hba)
8579{
8580 int ret = 0;
8581
Stanley Chuf51913e2019-09-18 12:20:38 +08008582 if (!hba->is_powered)
8583 goto out;
8584
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008585 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
8586 goto out;
8587
8588 if (pm_runtime_suspended(hba->dev)) {
8589 ret = ufshcd_runtime_resume(hba);
8590 if (ret)
8591 goto out;
8592 }
8593
8594 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
8595out:
8596 if (ret)
8597 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
8598 /* allow force shutdown even in case of errors */
8599 return 0;
8600}
8601EXPORT_SYMBOL(ufshcd_shutdown);
8602
8603/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308604 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308605 * data structure memory
Bart Van Assche8aa29f12018-03-01 15:07:20 -08008606 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308607 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308608void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308609{
Avri Altmandf032bf2018-10-07 17:30:35 +03008610 ufs_bsg_remove(hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008611 ufs_sysfs_remove_nodes(hba->dev);
Bart Van Assche69a6c262019-12-09 10:13:09 -08008612 blk_cleanup_queue(hba->tmf_queue);
8613 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08008614 blk_cleanup_queue(hba->cmd_queue);
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05308615 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308616 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308617 ufshcd_disable_intr(hba, hba->intr_mask);
Bart Van Assche5cac1092020-05-07 15:27:50 -07008618 ufshcd_hba_stop(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308619
Vivek Gautameebcc192018-08-07 23:17:39 +05308620 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008621 ufshcd_exit_clk_gating(hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08008622 if (ufshcd_is_clkscaling_supported(hba))
8623 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008624 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308625}
8626EXPORT_SYMBOL_GPL(ufshcd_remove);
8627
8628/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02008629 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8630 * @hba: pointer to Host Bus Adapter (HBA)
8631 */
8632void ufshcd_dealloc_host(struct ufs_hba *hba)
8633{
8634 scsi_host_put(hba->host);
8635}
8636EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8637
8638/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008639 * ufshcd_set_dma_mask - Set dma mask based on the controller
8640 * addressing capability
8641 * @hba: per adapter instance
8642 *
8643 * Returns 0 for success, non-zero for failure
8644 */
8645static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8646{
8647 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8648 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8649 return 0;
8650 }
8651 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8652}
8653
8654/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008655 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308656 * @dev: pointer to device handle
8657 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308658 * Returns 0 on success, non-zero value on failure
8659 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008660int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308661{
8662 struct Scsi_Host *host;
8663 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008664 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308665
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308666 if (!dev) {
8667 dev_err(dev,
8668 "Invalid memory reference for dev is NULL\n");
8669 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308670 goto out_error;
8671 }
8672
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308673 host = scsi_host_alloc(&ufshcd_driver_template,
8674 sizeof(struct ufs_hba));
8675 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308676 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308677 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308678 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308679 }
8680 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308681 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308682 hba->dev = dev;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008683 *hba_handle = hba;
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05308684 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008685
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03008686 INIT_LIST_HEAD(&hba->clk_list_head);
8687
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008688out_error:
8689 return err;
8690}
8691EXPORT_SYMBOL(ufshcd_alloc_host);
8692
Bart Van Assche69a6c262019-12-09 10:13:09 -08008693/* This function exists because blk_mq_alloc_tag_set() requires this. */
8694static blk_status_t ufshcd_queue_tmf(struct blk_mq_hw_ctx *hctx,
8695 const struct blk_mq_queue_data *qd)
8696{
8697 WARN_ON_ONCE(true);
8698 return BLK_STS_NOTSUPP;
8699}
8700
8701static const struct blk_mq_ops ufshcd_tmf_ops = {
8702 .queue_rq = ufshcd_queue_tmf,
8703};
8704
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008705/**
8706 * ufshcd_init - Driver initialization routine
8707 * @hba: per-adapter instance
8708 * @mmio_base: base register address
8709 * @irq: Interrupt line of device
8710 * Returns 0 on success, non-zero value on failure
8711 */
8712int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
8713{
8714 int err;
8715 struct Scsi_Host *host = hba->host;
8716 struct device *dev = hba->dev;
8717
8718 if (!mmio_base) {
8719 dev_err(hba->dev,
8720 "Invalid memory reference for mmio_base is NULL\n");
8721 err = -ENODEV;
8722 goto out_error;
8723 }
8724
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308725 hba->mmio_base = mmio_base;
8726 hba->irq = irq;
Stanley Chu90b84912020-05-09 17:37:13 +08008727 hba->vps = &ufs_hba_vps;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308728
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008729 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008730 if (err)
8731 goto out_error;
8732
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308733 /* Read capabilities registers */
8734 ufshcd_hba_capabilities(hba);
8735
8736 /* Get UFS version supported by the controller */
8737 hba->ufs_version = ufshcd_get_ufs_version(hba);
8738
Yaniv Gardic01848c2016-12-05 19:25:02 -08008739 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
8740 (hba->ufs_version != UFSHCI_VERSION_11) &&
8741 (hba->ufs_version != UFSHCI_VERSION_20) &&
8742 (hba->ufs_version != UFSHCI_VERSION_21))
8743 dev_err(hba->dev, "invalid UFS version 0x%x\n",
8744 hba->ufs_version);
8745
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308746 /* Get Interrupt bit mask per version */
8747 hba->intr_mask = ufshcd_get_intr_mask(hba);
8748
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008749 err = ufshcd_set_dma_mask(hba);
8750 if (err) {
8751 dev_err(hba->dev, "set dma mask failed\n");
8752 goto out_disable;
8753 }
8754
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308755 /* Allocate memory for host memory space */
8756 err = ufshcd_memory_alloc(hba);
8757 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308758 dev_err(hba->dev, "Memory allocation failed\n");
8759 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308760 }
8761
8762 /* Configure LRB */
8763 ufshcd_host_memory_configure(hba);
8764
8765 host->can_queue = hba->nutrs;
8766 host->cmd_per_lun = hba->nutrs;
8767 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03008768 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308769 host->max_channel = UFSHCD_MAX_CHANNEL;
8770 host->unique_id = host->host_no;
Avri Altmana851b2b2018-10-07 17:30:34 +03008771 host->max_cmd_len = UFS_CDB_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308772
Dolev Raviv7eb584d2014-09-25 15:32:31 +03008773 hba->max_pwr_info.is_valid = false;
8774
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308775 /* Initialize work queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05308776 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308777 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308778
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308779 /* Initialize UIC command mutex */
8780 mutex_init(&hba->uic_cmd_mutex);
8781
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308782 /* Initialize mutex for device management commands */
8783 mutex_init(&hba->dev_cmd.lock);
8784
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08008785 init_rwsem(&hba->clk_scaling_lock);
8786
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008787 ufshcd_init_clk_gating(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02008788
Vivek Gautameebcc192018-08-07 23:17:39 +05308789 ufshcd_init_clk_scaling(hba);
8790
Yaniv Gardi199ef132016-03-10 17:37:06 +02008791 /*
8792 * In order to avoid any spurious interrupt immediately after
8793 * registering UFS controller interrupt handler, clear any pending UFS
8794 * interrupt status and disable all the UFS interrupts.
8795 */
8796 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
8797 REG_INTERRUPT_STATUS);
8798 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
8799 /*
8800 * Make sure that UFS interrupts are disabled and any pending interrupt
8801 * status is cleared before registering UFS interrupt handler.
8802 */
8803 mb();
8804
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308805 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09008806 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308807 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308808 dev_err(hba->dev, "request irq failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008809 goto exit_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008810 } else {
8811 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308812 }
8813
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308814 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308815 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308816 dev_err(hba->dev, "scsi_add_host failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008817 goto exit_gating;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308818 }
8819
Bart Van Assche7252a362019-12-09 10:13:08 -08008820 hba->cmd_queue = blk_mq_init_queue(&hba->host->tag_set);
8821 if (IS_ERR(hba->cmd_queue)) {
8822 err = PTR_ERR(hba->cmd_queue);
8823 goto out_remove_scsi_host;
8824 }
8825
Bart Van Assche69a6c262019-12-09 10:13:09 -08008826 hba->tmf_tag_set = (struct blk_mq_tag_set) {
8827 .nr_hw_queues = 1,
8828 .queue_depth = hba->nutmrs,
8829 .ops = &ufshcd_tmf_ops,
8830 .flags = BLK_MQ_F_NO_SCHED,
8831 };
8832 err = blk_mq_alloc_tag_set(&hba->tmf_tag_set);
8833 if (err < 0)
8834 goto free_cmd_queue;
8835 hba->tmf_queue = blk_mq_init_queue(&hba->tmf_tag_set);
8836 if (IS_ERR(hba->tmf_queue)) {
8837 err = PTR_ERR(hba->tmf_queue);
8838 goto free_tmf_tag_set;
8839 }
8840
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07008841 /* Reset the attached device */
8842 ufshcd_vops_device_reset(hba);
8843
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308844 /* Host controller enable */
8845 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308846 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308847 dev_err(hba->dev, "Host controller enable failed\n");
Dolev Raviv66cc8202016-12-22 18:39:42 -08008848 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08008849 ufshcd_print_host_state(hba);
Bart Van Assche69a6c262019-12-09 10:13:09 -08008850 goto free_tmf_queue;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308851 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308852
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -08008853 /*
8854 * Set the default power management level for runtime and system PM.
8855 * Default power saving mode is to keep UFS link in Hibern8 state
8856 * and UFS device in sleep state.
8857 */
8858 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8859 UFS_SLEEP_PWR_MODE,
8860 UIC_LINK_HIBERN8_STATE);
8861 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8862 UFS_SLEEP_PWR_MODE,
8863 UIC_LINK_HIBERN8_STATE);
8864
Adrian Hunterad448372018-03-20 15:07:38 +02008865 /* Set the default auto-hiberate idle timer value to 150 ms */
Stanley Chuf571b372019-05-21 14:44:53 +08008866 if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
Adrian Hunterad448372018-03-20 15:07:38 +02008867 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8868 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8869 }
8870
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05308871 /* Hold auto suspend until async scan completes */
8872 pm_runtime_get_sync(dev);
Subhash Jadavani38135532018-05-03 16:37:18 +05308873 atomic_set(&hba->scsi_block_reqs_cnt, 0);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008874 /*
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008875 * We are assuming that device wasn't put in sleep/power-down
8876 * state exclusively during the boot stage before kernel.
8877 * This assumption helps avoid doing link startup twice during
8878 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008879 */
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008880 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008881
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308882 async_schedule(ufshcd_async_scan, hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008883 ufs_sysfs_add_nodes(hba->dev);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308884
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308885 return 0;
8886
Bart Van Assche69a6c262019-12-09 10:13:09 -08008887free_tmf_queue:
8888 blk_cleanup_queue(hba->tmf_queue);
8889free_tmf_tag_set:
8890 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08008891free_cmd_queue:
8892 blk_cleanup_queue(hba->cmd_queue);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308893out_remove_scsi_host:
8894 scsi_remove_host(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008895exit_gating:
Vivek Gautameebcc192018-08-07 23:17:39 +05308896 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008897 ufshcd_exit_clk_gating(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308898out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008899 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008900 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308901out_error:
8902 return err;
8903}
8904EXPORT_SYMBOL_GPL(ufshcd_init);
8905
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308906MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8907MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05308908MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308909MODULE_LICENSE("GPL");
8910MODULE_VERSION(UFSHCD_DRIVER_VERSION);