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Bean Huo67351112020-06-05 22:05:19 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05303 * Universal Flash Storage Host controller driver Core
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02005 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307 * Authors:
8 * Santosh Yaraganavi <santosh.sy@samsung.com>
9 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010 */
11
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053012#include <linux/async.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030013#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020014#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020015#include <linux/of.h>
Adrian Hunterad448372018-03-20 15:07:38 +020016#include <linux/bitfield.h>
Can Guofb276f72020-03-25 18:09:59 -070017#include <linux/blk-pm.h>
Can Guoc72e79c2020-08-09 05:15:52 -070018#include <linux/blkdev.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053019#include "ufshcd.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020020#include "ufs_quirks.h"
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +053021#include "unipro.h"
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +020022#include "ufs-sysfs.h"
Adrian Hunterb6cacaf2021-01-07 09:25:38 +020023#include "ufs-debugfs.h"
Avri Altmandf032bf2018-10-07 17:30:35 +030024#include "ufs_bsg.h"
Satya Tangiraladf043c742020-07-06 20:04:14 +000025#include "ufshcd-crypto.h"
Asutosh Das3d17b9b2020-04-22 14:41:42 -070026#include <asm/unaligned.h>
27#include <linux/blkdev.h>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053028
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -080029#define CREATE_TRACE_POINTS
30#include <trace/events/ufs.h>
31
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053032#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
33 UTP_TASK_REQ_COMPL |\
34 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053035/* UIC command timeout, unit: ms */
36#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053037
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053038/* NOP OUT retries waiting for NOP IN response */
39#define NOP_OUT_RETRIES 10
Daejun Park782e2ef2020-09-02 11:58:52 +090040/* Timeout after 50 msecs if NOP OUT hangs without response */
41#define NOP_OUT_TIMEOUT 50 /* msecs */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053042
Dolev Raviv68078d52013-07-30 00:35:58 +053043/* Query request retries */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080044#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +053045/* Query request timeout */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080046#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +053047
Sujit Reddy Thummae2933132014-05-26 10:59:12 +053048/* Task management command timeout */
49#define TM_CMD_TIMEOUT 100 /* msecs */
50
Yaniv Gardi64238fb2016-02-01 15:02:43 +020051/* maximum number of retries for a general UIC command */
52#define UFS_UIC_COMMAND_RETRIES 3
53
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030054/* maximum number of link-startup retries */
55#define DME_LINKSTARTUP_RETRIES 3
56
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +020057/* Maximum retries for Hibern8 enter */
58#define UIC_HIBERN8_ENTER_RETRIES 3
59
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030060/* maximum number of reset retries before giving up */
61#define MAX_HOST_RESET_RETRIES 5
62
Dolev Raviv68078d52013-07-30 00:35:58 +053063/* Expose the flag value from utp_upiu_query.value */
64#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
65
Seungwon Jeon7d568652013-08-31 21:40:20 +053066/* Interrupt aggregation default timeout, unit: 40us */
67#define INT_AGGR_DEF_TO 0x02
68
Stanley Chu49615ba2019-09-16 23:56:50 +080069/* default delay of autosuspend: 2000 ms */
70#define RPM_AUTOSUSPEND_DELAY_MS 2000
71
Stanley Chu51dd9052020-05-22 16:32:12 +080072/* Default delay of RPM device flush delayed work */
73#define RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS 5000
74
Can Guo09f17792020-02-10 19:40:49 -080075/* Default value of wait time before gating device ref clock */
76#define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */
77
Kiwoong Kim29707fa2020-08-10 19:02:27 +090078/* Polling time to wait for fDeviceInit */
79#define FDEVICEINIT_COMPL_TIMEOUT 1500 /* millisecs */
80
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030081#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
82 ({ \
83 int _ret; \
84 if (_on) \
85 _ret = ufshcd_enable_vreg(_dev, _vreg); \
86 else \
87 _ret = ufshcd_disable_vreg(_dev, _vreg); \
88 _ret; \
89 })
90
Tomas Winklerba809172018-06-14 11:14:09 +030091#define ufshcd_hex_dump(prefix_str, buf, len) do { \
92 size_t __len = (len); \
93 print_hex_dump(KERN_ERR, prefix_str, \
94 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
95 16, 4, buf, __len, false); \
96} while (0)
97
Can Guofb7afe22021-01-13 19:13:27 -080098static bool early_suspend;
99
Tomas Winklerba809172018-06-14 11:14:09 +0300100int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
101 const char *prefix)
102{
Marc Gonzalezd6724752019-01-22 18:29:22 +0100103 u32 *regs;
104 size_t pos;
105
106 if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
107 return -EINVAL;
Tomas Winklerba809172018-06-14 11:14:09 +0300108
Can Guocddaeba2019-11-14 22:09:27 -0800109 regs = kzalloc(len, GFP_ATOMIC);
Tomas Winklerba809172018-06-14 11:14:09 +0300110 if (!regs)
111 return -ENOMEM;
112
Marc Gonzalezd6724752019-01-22 18:29:22 +0100113 for (pos = 0; pos < len; pos += 4)
114 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
115
Tomas Winklerba809172018-06-14 11:14:09 +0300116 ufshcd_hex_dump(prefix, regs, len);
117 kfree(regs);
118
119 return 0;
120}
121EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800122
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530123enum {
124 UFSHCD_MAX_CHANNEL = 0,
125 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530126 UFSHCD_CMD_PER_LUN = 32,
127 UFSHCD_CAN_QUEUE = 32,
128};
129
130/* UFSHCD states */
131enum {
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530132 UFSHCD_STATE_RESET,
133 UFSHCD_STATE_ERROR,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530134 UFSHCD_STATE_OPERATIONAL,
Can Guo5586dd82020-08-09 05:15:54 -0700135 UFSHCD_STATE_EH_SCHEDULED_FATAL,
136 UFSHCD_STATE_EH_SCHEDULED_NON_FATAL,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530137};
138
139/* UFSHCD error handling flags */
140enum {
141 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530142};
143
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530144/* UFSHCD UIC layer error flags */
145enum {
146 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200147 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
148 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
149 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
150 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
151 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Can Guo2355b662020-08-24 19:07:06 -0700152 UFSHCD_UIC_PA_GENERIC_ERROR = (1 << 6), /* Generic PA error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530153};
154
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530155#define ufshcd_set_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300156 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530157#define ufshcd_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300158 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530159#define ufshcd_clear_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300160 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530161
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +0200162struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300163 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
164 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
165 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
166 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
167 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
168 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
Adrian Hunterfe1d4c22020-11-03 16:14:02 +0200169 /*
170 * For DeepSleep, the link is first put in hibern8 and then off.
171 * Leaving the link in hibern8 is not supported.
172 */
173 {UFS_DEEPSLEEP_PWR_MODE, UIC_LINK_OFF_STATE},
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300174};
175
176static inline enum ufs_dev_pwr_mode
177ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
178{
179 return ufs_pm_lvl_states[lvl].dev_state;
180}
181
182static inline enum uic_link_state
183ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
184{
185 return ufs_pm_lvl_states[lvl].link_state;
186}
187
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -0800188static inline enum ufs_pm_level
189ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
190 enum uic_link_state link_state)
191{
192 enum ufs_pm_level lvl;
193
194 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
195 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
196 (ufs_pm_lvl_states[lvl].link_state == link_state))
197 return lvl;
198 }
199
200 /* if no match found, return the level 0 */
201 return UFS_PM_LVL_0;
202}
203
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800204static struct ufs_dev_fix ufs_fixups[] = {
205 /* UFS cards deviations table */
Stanley Chuc0a18ee2020-06-12 09:26:24 +0800206 UFS_FIX(UFS_VENDOR_MICRON, UFS_ANY_MODEL,
207 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800208 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
Stanley Chued0b40f2020-06-12 09:26:25 +0800209 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM |
210 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE |
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800211 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
Stanley Chued0b40f2020-06-12 09:26:25 +0800212 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
213 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
214 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
215 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800216 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
217 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
218 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
219 UFS_DEVICE_QUIRK_PA_TACTIVATE),
220 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
221 UFS_DEVICE_QUIRK_PA_TACTIVATE),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800222 END_FIX
223};
224
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -0800225static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530226static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530227static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Dolev Ravive7d38252016-12-22 18:40:07 -0800228static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530229static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300230static void ufshcd_hba_exit(struct ufs_hba *hba);
Randall Huang19186512020-11-30 20:14:02 -0800231static int ufshcd_clear_ua_wluns(struct ufs_hba *hba);
Bean Huo1b9e2142020-01-20 14:08:15 +0100232static int ufshcd_probe_hba(struct ufs_hba *hba, bool async);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300233static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300234static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300235static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300236static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800237static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
238static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800239static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800240static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300241static irqreturn_t ufshcd_intr(int irq, void *__hba);
Yaniv Gardi874237f2015-05-17 18:55:03 +0300242static int ufshcd_change_power_mode(struct ufs_hba *hba,
243 struct ufs_pa_layer_attr *pwr_mode);
Can Guo4db7a232020-08-09 05:15:51 -0700244static void ufshcd_schedule_eh_work(struct ufs_hba *hba);
Can Guoc72e79c2020-08-09 05:15:52 -0700245static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on);
246static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on);
247static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
248 struct ufs_vreg *vreg);
Can Guo307348f2020-08-24 19:07:05 -0700249static int ufshcd_try_to_abort_task(struct ufs_hba *hba, int tag);
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700250static int ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set);
Bean Huod3ba6222021-01-21 19:57:36 +0100251static inline int ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable);
Can Guodd7143e2020-10-27 12:10:36 -0700252static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba);
253static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700254
Yaniv Gardi14497322016-02-01 15:02:39 +0200255static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
256{
257 return tag >= 0 && tag < hba->nutrs;
258}
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300259
Can Guo5231d382019-12-05 02:14:46 +0000260static inline void ufshcd_enable_irq(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300261{
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300262 if (!hba->is_irq_enabled) {
Can Guo5231d382019-12-05 02:14:46 +0000263 enable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300264 hba->is_irq_enabled = true;
265 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300266}
267
268static inline void ufshcd_disable_irq(struct ufs_hba *hba)
269{
270 if (hba->is_irq_enabled) {
Can Guo5231d382019-12-05 02:14:46 +0000271 disable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300272 hba->is_irq_enabled = false;
273 }
274}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530275
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700276static inline void ufshcd_wb_config(struct ufs_hba *hba)
277{
278 int ret;
279
Stanley Chu79e35202020-05-08 16:01:15 +0800280 if (!ufshcd_is_wb_allowed(hba))
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700281 return;
282
283 ret = ufshcd_wb_ctrl(hba, true);
284 if (ret)
285 dev_err(hba->dev, "%s: Enable WB failed: %d\n", __func__, ret);
286 else
287 dev_info(hba->dev, "%s: Write Booster Configured\n", __func__);
288 ret = ufshcd_wb_toggle_flush_during_h8(hba, true);
289 if (ret)
290 dev_err(hba->dev, "%s: En WB flush during H8: failed: %d\n",
291 __func__, ret);
Stanley Chu21acf462020-12-22 15:29:05 +0800292 if (!(hba->quirks & UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL))
293 ufshcd_wb_toggle_flush(hba, true);
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700294}
295
Subhash Jadavani38135532018-05-03 16:37:18 +0530296static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
297{
298 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
299 scsi_unblock_requests(hba->host);
300}
301
302static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
303{
304 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
305 scsi_block_requests(hba->host);
306}
307
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300308static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
Bean Huo28fa68f2021-01-05 12:34:42 +0100309 enum ufs_trace_str_t str_t)
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300310{
311 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
312
Bean Huo9d5095e2021-01-05 12:34:43 +0100313 if (!trace_ufshcd_upiu_enabled())
314 return;
315
Bean Huo867fdc22021-01-05 12:34:46 +0100316 trace_ufshcd_upiu(dev_name(hba->dev), str_t, &rq->header, &rq->sc.cdb,
317 UFS_TSF_CDB);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300318}
319
Avri Altmanfb475b72021-01-10 10:46:18 +0200320static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba,
321 enum ufs_trace_str_t str_t,
322 struct utp_upiu_req *rq_rsp)
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300323{
Bean Huo9d5095e2021-01-05 12:34:43 +0100324 if (!trace_ufshcd_upiu_enabled())
325 return;
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300326
Bean Huobe20b512021-01-05 12:34:44 +0100327 trace_ufshcd_upiu(dev_name(hba->dev), str_t, &rq_rsp->header,
Bean Huo867fdc22021-01-05 12:34:46 +0100328 &rq_rsp->qr, UFS_TSF_OSF);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300329}
330
331static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
Bean Huo28fa68f2021-01-05 12:34:42 +0100332 enum ufs_trace_str_t str_t)
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300333{
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300334 int off = (int)tag - hba->nutrs;
Christoph Hellwig391e3882018-10-07 17:30:32 +0300335 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300336
Bean Huo9d5095e2021-01-05 12:34:43 +0100337 if (!trace_ufshcd_upiu_enabled())
338 return;
339
Bean Huo0ed083e2021-01-05 12:34:45 +0100340 if (str_t == UFS_TM_SEND)
341 trace_ufshcd_upiu(dev_name(hba->dev), str_t, &descp->req_header,
Bean Huo867fdc22021-01-05 12:34:46 +0100342 &descp->input_param1, UFS_TSF_TM_INPUT);
Bean Huo0ed083e2021-01-05 12:34:45 +0100343 else
344 trace_ufshcd_upiu(dev_name(hba->dev), str_t, &descp->rsp_header,
Bean Huo867fdc22021-01-05 12:34:46 +0100345 &descp->output_param1, UFS_TSF_TM_OUTPUT);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300346}
347
Stanley Chuaa5c6972020-06-15 15:22:35 +0800348static void ufshcd_add_uic_command_trace(struct ufs_hba *hba,
349 struct uic_command *ucmd,
Bean Huo28fa68f2021-01-05 12:34:42 +0100350 enum ufs_trace_str_t str_t)
Stanley Chuaa5c6972020-06-15 15:22:35 +0800351{
352 u32 cmd;
353
354 if (!trace_ufshcd_uic_command_enabled())
355 return;
356
Bean Huo28fa68f2021-01-05 12:34:42 +0100357 if (str_t == UFS_CMD_SEND)
Stanley Chuaa5c6972020-06-15 15:22:35 +0800358 cmd = ucmd->command;
359 else
360 cmd = ufshcd_readl(hba, REG_UIC_COMMAND);
361
Bean Huo28fa68f2021-01-05 12:34:42 +0100362 trace_ufshcd_uic_command(dev_name(hba->dev), str_t, cmd,
Stanley Chuaa5c6972020-06-15 15:22:35 +0800363 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_1),
364 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2),
365 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3));
366}
367
Bean Huo28fa68f2021-01-05 12:34:42 +0100368static void ufshcd_add_command_trace(struct ufs_hba *hba, unsigned int tag,
369 enum ufs_trace_str_t str_t)
Lee Susman1a07f2d2016-12-22 18:42:03 -0800370{
371 sector_t lba = -1;
Jaegeuk Kim69a314d2020-11-17 08:58:37 -0800372 u8 opcode = 0, group_id = 0;
Lee Susman1a07f2d2016-12-22 18:42:03 -0800373 u32 intr, doorbell;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300374 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800375 struct scsi_cmnd *cmd = lrbp->cmd;
Lee Susman1a07f2d2016-12-22 18:42:03 -0800376 int transfer_len = -1;
377
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300378 if (!trace_ufshcd_command_enabled()) {
379 /* trace UPIU W/O tracing command */
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800380 if (cmd)
Bean Huo28fa68f2021-01-05 12:34:42 +0100381 ufshcd_add_cmd_upiu_trace(hba, tag, str_t);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800382 return;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300383 }
Lee Susman1a07f2d2016-12-22 18:42:03 -0800384
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800385 if (cmd) { /* data phase exists */
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300386 /* trace UPIU also */
Bean Huo28fa68f2021-01-05 12:34:42 +0100387 ufshcd_add_cmd_upiu_trace(hba, tag, str_t);
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800388 opcode = cmd->cmnd[0];
Lee Susman1a07f2d2016-12-22 18:42:03 -0800389 if ((opcode == READ_10) || (opcode == WRITE_10)) {
390 /*
391 * Currently we only fully trace read(10) and write(10)
392 * commands
393 */
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800394 if (cmd->request && cmd->request->bio)
395 lba = cmd->request->bio->bi_iter.bi_sector;
Lee Susman1a07f2d2016-12-22 18:42:03 -0800396 transfer_len = be32_to_cpu(
397 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
Jaegeuk Kim69a314d2020-11-17 08:58:37 -0800398 if (opcode == WRITE_10)
399 group_id = lrbp->cmd->cmnd[6];
Leo Liou3754cde2020-11-17 08:58:39 -0800400 } else if (opcode == UNMAP) {
401 if (cmd->request) {
402 lba = scsi_get_lba(cmd);
403 transfer_len = blk_rq_bytes(cmd->request);
404 }
Lee Susman1a07f2d2016-12-22 18:42:03 -0800405 }
406 }
407
408 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
409 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Bean Huo28fa68f2021-01-05 12:34:42 +0100410 trace_ufshcd_command(dev_name(hba->dev), str_t, tag,
Jaegeuk Kim69a314d2020-11-17 08:58:37 -0800411 doorbell, transfer_len, intr, lba, opcode, group_id);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800412}
413
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800414static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
415{
416 struct ufs_clk_info *clki;
417 struct list_head *head = &hba->clk_list_head;
418
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300419 if (list_empty(head))
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800420 return;
421
422 list_for_each_entry(clki, head, list) {
423 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
424 clki->max_freq)
425 dev_err(hba->dev, "clk: %s, rate: %u\n",
426 clki->name, clki->curr_freq);
427 }
428}
429
Stanley Chue965e5e2020-12-05 19:58:59 +0800430static void ufshcd_print_evt(struct ufs_hba *hba, u32 id,
431 char *err_name)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800432{
433 int i;
Stanley Chu27752642019-01-28 22:04:26 +0800434 bool found = false;
Stanley Chue965e5e2020-12-05 19:58:59 +0800435 struct ufs_event_hist *e;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800436
Stanley Chue965e5e2020-12-05 19:58:59 +0800437 if (id >= UFS_EVT_CNT)
438 return;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800439
Stanley Chue965e5e2020-12-05 19:58:59 +0800440 e = &hba->ufs_stats.event[id];
441
442 for (i = 0; i < UFS_EVENT_HIST_LENGTH; i++) {
443 int p = (i + e->pos) % UFS_EVENT_HIST_LENGTH;
444
445 if (e->tstamp[p] == 0)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800446 continue;
Stanley Chuc5397f12019-07-10 21:38:20 +0800447 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
Stanley Chue965e5e2020-12-05 19:58:59 +0800448 e->val[p], ktime_to_us(e->tstamp[p]));
Stanley Chu27752642019-01-28 22:04:26 +0800449 found = true;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800450 }
Stanley Chu27752642019-01-28 22:04:26 +0800451
452 if (!found)
Stanley Chufd1fb4d2020-01-04 22:26:08 +0800453 dev_err(hba->dev, "No record of %s\n", err_name);
DooHyun Hwangbafd09f2021-02-03 19:14:43 +0900454 else
455 dev_err(hba->dev, "%s: total cnt=%llu\n", err_name, e->cnt);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800456}
457
Stanley Chue965e5e2020-12-05 19:58:59 +0800458static void ufshcd_print_evt_hist(struct ufs_hba *hba)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800459{
Tomas Winklerba809172018-06-14 11:14:09 +0300460 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800461
Stanley Chue965e5e2020-12-05 19:58:59 +0800462 ufshcd_print_evt(hba, UFS_EVT_PA_ERR, "pa_err");
463 ufshcd_print_evt(hba, UFS_EVT_DL_ERR, "dl_err");
464 ufshcd_print_evt(hba, UFS_EVT_NL_ERR, "nl_err");
465 ufshcd_print_evt(hba, UFS_EVT_TL_ERR, "tl_err");
466 ufshcd_print_evt(hba, UFS_EVT_DME_ERR, "dme_err");
467 ufshcd_print_evt(hba, UFS_EVT_AUTO_HIBERN8_ERR,
468 "auto_hibern8_err");
469 ufshcd_print_evt(hba, UFS_EVT_FATAL_ERR, "fatal_err");
470 ufshcd_print_evt(hba, UFS_EVT_LINK_STARTUP_FAIL,
471 "link_startup_fail");
472 ufshcd_print_evt(hba, UFS_EVT_RESUME_ERR, "resume_fail");
473 ufshcd_print_evt(hba, UFS_EVT_SUSPEND_ERR,
474 "suspend_fail");
475 ufshcd_print_evt(hba, UFS_EVT_DEV_RESET, "dev_reset");
476 ufshcd_print_evt(hba, UFS_EVT_HOST_RESET, "host_reset");
477 ufshcd_print_evt(hba, UFS_EVT_ABORT, "task_abort");
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800478
Stanley Chu7c486d912019-12-24 21:01:06 +0800479 ufshcd_vops_dbg_register_dump(hba);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800480}
481
482static
483void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
484{
485 struct ufshcd_lrb *lrbp;
Gilad Broner7fabb772017-02-03 16:56:50 -0800486 int prdt_length;
Dolev Raviv66cc8202016-12-22 18:39:42 -0800487 int tag;
488
489 for_each_set_bit(tag, &bitmap, hba->nutrs) {
490 lrbp = &hba->lrb[tag];
491
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800492 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
493 tag, ktime_to_us(lrbp->issue_time_stamp));
Zang Leigang09017182017-09-27 10:06:06 +0800494 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
495 tag, ktime_to_us(lrbp->compl_time_stamp));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800496 dev_err(hba->dev,
497 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
498 tag, (u64)lrbp->utrd_dma_addr);
499
Dolev Raviv66cc8202016-12-22 18:39:42 -0800500 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
501 sizeof(struct utp_transfer_req_desc));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800502 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
503 (u64)lrbp->ucd_req_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800504 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
505 sizeof(struct utp_upiu_req));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800506 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
507 (u64)lrbp->ucd_rsp_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800508 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
509 sizeof(struct utp_upiu_rsp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800510
Gilad Broner7fabb772017-02-03 16:56:50 -0800511 prdt_length = le16_to_cpu(
512 lrbp->utr_descriptor_ptr->prd_table_length);
Eric Biggerscc770ce2020-08-25 19:10:40 -0700513 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
514 prdt_length /= sizeof(struct ufshcd_sg_entry);
515
Gilad Broner7fabb772017-02-03 16:56:50 -0800516 dev_err(hba->dev,
517 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
518 tag, prdt_length,
519 (u64)lrbp->ucd_prdt_dma_addr);
520
521 if (pr_prdt)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800522 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
Gilad Broner7fabb772017-02-03 16:56:50 -0800523 sizeof(struct ufshcd_sg_entry) * prdt_length);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800524 }
525}
526
527static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
528{
Dolev Raviv66cc8202016-12-22 18:39:42 -0800529 int tag;
530
531 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
Christoph Hellwig391e3882018-10-07 17:30:32 +0300532 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
533
Dolev Raviv66cc8202016-12-22 18:39:42 -0800534 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
Christoph Hellwig391e3882018-10-07 17:30:32 +0300535 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800536 }
537}
538
Gilad Broner6ba65582017-02-03 16:57:28 -0800539static void ufshcd_print_host_state(struct ufs_hba *hba)
540{
Can Guo3f8af602020-08-09 05:15:50 -0700541 struct scsi_device *sdev_ufs = hba->sdev_ufs_device;
542
Gilad Broner6ba65582017-02-03 16:57:28 -0800543 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
Bart Van Assche7252a362019-12-09 10:13:08 -0800544 dev_err(hba->dev, "outstanding reqs=0x%lx tasks=0x%lx\n",
545 hba->outstanding_reqs, hba->outstanding_tasks);
Gilad Broner6ba65582017-02-03 16:57:28 -0800546 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
547 hba->saved_err, hba->saved_uic_err);
548 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
549 hba->curr_dev_pwr_mode, hba->uic_link_state);
550 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
551 hba->pm_op_in_progress, hba->is_sys_suspended);
552 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
553 hba->auto_bkops_enabled, hba->host->host_self_blocked);
554 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
Can Guo3f8af602020-08-09 05:15:50 -0700555 dev_err(hba->dev,
556 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt=%d\n",
557 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
558 hba->ufs_stats.hibern8_exit_cnt);
559 dev_err(hba->dev, "last intr at %lld us, last intr status=0x%x\n",
560 ktime_to_us(hba->ufs_stats.last_intr_ts),
561 hba->ufs_stats.last_intr_status);
Gilad Broner6ba65582017-02-03 16:57:28 -0800562 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
563 hba->eh_flags, hba->req_abort_count);
Can Guo3f8af602020-08-09 05:15:50 -0700564 dev_err(hba->dev, "hba->ufs_version=0x%x, Host capabilities=0x%x, caps=0x%x\n",
565 hba->ufs_version, hba->capabilities, hba->caps);
Gilad Broner6ba65582017-02-03 16:57:28 -0800566 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
567 hba->dev_quirks);
Can Guo3f8af602020-08-09 05:15:50 -0700568 if (sdev_ufs)
569 dev_err(hba->dev, "UFS dev info: %.8s %.16s rev %.4s\n",
570 sdev_ufs->vendor, sdev_ufs->model, sdev_ufs->rev);
571
572 ufshcd_print_clk_freqs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -0800573}
574
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800575/**
576 * ufshcd_print_pwr_info - print power params as saved in hba
577 * power info
578 * @hba: per-adapter instance
579 */
580static void ufshcd_print_pwr_info(struct ufs_hba *hba)
581{
582 static const char * const names[] = {
583 "INVALID MODE",
584 "FAST MODE",
585 "SLOW_MODE",
586 "INVALID MODE",
587 "FASTAUTO_MODE",
588 "SLOWAUTO_MODE",
589 "INVALID MODE",
590 };
591
592 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
593 __func__,
594 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
595 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
596 names[hba->pwr_info.pwr_rx],
597 names[hba->pwr_info.pwr_tx],
598 hba->pwr_info.hs_rate);
599}
600
Stanley Chu31a5d9c2020-12-08 21:56:35 +0800601static void ufshcd_device_reset(struct ufs_hba *hba)
602{
603 int err;
604
605 err = ufshcd_vops_device_reset(hba);
606
607 if (!err) {
608 ufshcd_set_ufs_dev_active(hba);
609 if (ufshcd_is_wb_allowed(hba)) {
Bean Huo4cd48992021-01-19 17:38:46 +0100610 hba->dev_info.wb_enabled = false;
611 hba->dev_info.wb_buf_flush_enabled = false;
Stanley Chu31a5d9c2020-12-08 21:56:35 +0800612 }
613 }
614 if (err != -EOPNOTSUPP)
615 ufshcd_update_evt_hist(hba, UFS_EVT_DEV_RESET, err);
616}
617
Stanley Chu5c955c12020-03-18 18:40:12 +0800618void ufshcd_delay_us(unsigned long us, unsigned long tolerance)
619{
620 if (!us)
621 return;
622
623 if (us < 10)
624 udelay(us);
625 else
626 usleep_range(us, us + tolerance);
627}
628EXPORT_SYMBOL_GPL(ufshcd_delay_us);
629
Bart Van Assche5cac1092020-05-07 15:27:50 -0700630/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530631 * ufshcd_wait_for_register - wait for register value to change
Bart Van Assche5cac1092020-05-07 15:27:50 -0700632 * @hba: per-adapter interface
633 * @reg: mmio register offset
634 * @mask: mask to apply to the read register value
635 * @val: value to wait for
636 * @interval_us: polling interval in microseconds
637 * @timeout_ms: timeout in milliseconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530638 *
Bart Van Assche5cac1092020-05-07 15:27:50 -0700639 * Return:
640 * -ETIMEDOUT on error, zero on success.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530641 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200642int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
643 u32 val, unsigned long interval_us,
Bart Van Assche5cac1092020-05-07 15:27:50 -0700644 unsigned long timeout_ms)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530645{
646 int err = 0;
647 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
648
649 /* ignore bits that we don't intend to wait on */
650 val = val & mask;
651
652 while ((ufshcd_readl(hba, reg) & mask) != val) {
Bart Van Assche5cac1092020-05-07 15:27:50 -0700653 usleep_range(interval_us, interval_us + 50);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530654 if (time_after(jiffies, timeout)) {
655 if ((ufshcd_readl(hba, reg) & mask) != val)
656 err = -ETIMEDOUT;
657 break;
658 }
659 }
660
661 return err;
662}
663
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530664/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530665 * ufshcd_get_intr_mask - Get the interrupt bit mask
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800666 * @hba: Pointer to adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530667 *
668 * Returns interrupt bit mask per version
669 */
670static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
671{
Yaniv Gardic01848c2016-12-05 19:25:02 -0800672 u32 intr_mask = 0;
673
674 switch (hba->ufs_version) {
675 case UFSHCI_VERSION_10:
676 intr_mask = INTERRUPT_MASK_ALL_VER_10;
677 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800678 case UFSHCI_VERSION_11:
679 case UFSHCI_VERSION_20:
680 intr_mask = INTERRUPT_MASK_ALL_VER_11;
681 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800682 case UFSHCI_VERSION_21:
683 default:
684 intr_mask = INTERRUPT_MASK_ALL_VER_21;
Tomohiro Kusumi031d1e02017-03-23 12:49:04 +0200685 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800686 }
687
688 return intr_mask;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530689}
690
691/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530692 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800693 * @hba: Pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530694 *
695 * Returns UFSHCI version supported by the controller
696 */
697static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
698{
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200699 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
700 return ufshcd_vops_get_ufs_hci_version(hba);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300701
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530702 return ufshcd_readl(hba, REG_UFS_VERSION);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530703}
704
705/**
706 * ufshcd_is_device_present - Check if any device connected to
707 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300708 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530709 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300710 * Returns true if device present, false if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530711 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300712static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530713{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300714 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300715 DEVICE_PRESENT) ? true : false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530716}
717
718/**
719 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800720 * @lrbp: pointer to local command reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530721 *
722 * This function is used to get the OCS field from UTRD
723 * Returns the OCS field in the UTRD
724 */
725static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
726{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530727 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530728}
729
730/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530731 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
732 * @hba: per adapter instance
733 * @pos: position of the bit to be cleared
734 */
735static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
736{
Alim Akhtar87183842020-05-28 06:46:49 +0530737 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
738 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
739 else
740 ufshcd_writel(hba, ~(1 << pos),
741 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
Alim Akhtar1399c5b2018-05-06 15:44:15 +0530742}
743
744/**
745 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
746 * @hba: per adapter instance
747 * @pos: position of the bit to be cleared
748 */
749static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
750{
Alim Akhtar87183842020-05-28 06:46:49 +0530751 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
752 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
753 else
754 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530755}
756
757/**
Yaniv Gardia48353f2016-02-01 15:02:40 +0200758 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
759 * @hba: per adapter instance
760 * @tag: position of the bit to be cleared
761 */
762static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
763{
764 __clear_bit(tag, &hba->outstanding_reqs);
765}
766
767/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530768 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
769 * @reg: Register value of host controller status
770 *
771 * Returns integer, 0 on Success and positive value if failed
772 */
773static inline int ufshcd_get_lists_status(u32 reg)
774{
Tomohiro Kusumi6cf16112017-04-26 20:28:58 +0300775 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530776}
777
778/**
779 * ufshcd_get_uic_cmd_result - Get the UIC command result
780 * @hba: Pointer to adapter instance
781 *
782 * This function gets the result of UIC command completion
783 * Returns 0 on success, non zero value on error
784 */
785static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
786{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530787 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530788 MASK_UIC_COMMAND_RESULT;
789}
790
791/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530792 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
793 * @hba: Pointer to adapter instance
794 *
795 * This function gets UIC command argument3
796 * Returns 0 on success, non zero value on error
797 */
798static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
799{
800 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
801}
802
803/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530804 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530805 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530806 */
807static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530808ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530809{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530810 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530811}
812
813/**
814 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
815 * @ucd_rsp_ptr: pointer to response UPIU
816 *
817 * This function gets the response status and scsi_status from response UPIU
818 * Returns the response result code.
819 */
820static inline int
821ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
822{
823 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
824}
825
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530826/*
827 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
828 * from response UPIU
829 * @ucd_rsp_ptr: pointer to response UPIU
830 *
831 * Return the data segment length.
832 */
833static inline unsigned int
834ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
835{
836 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
837 MASK_RSP_UPIU_DATA_SEG_LEN;
838}
839
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530840/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530841 * ufshcd_is_exception_event - Check if the device raised an exception event
842 * @ucd_rsp_ptr: pointer to response UPIU
843 *
844 * The function checks if the device raised an exception event indicated in
845 * the Device Information field of response UPIU.
846 *
847 * Returns true if exception is raised, false otherwise.
848 */
849static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
850{
851 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
852 MASK_RSP_EXCEPTION_EVENT ? true : false;
853}
854
855/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530856 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530857 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530858 */
859static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530860ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530861{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530862 ufshcd_writel(hba, INT_AGGR_ENABLE |
863 INT_AGGR_COUNTER_AND_TIMER_RESET,
864 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
865}
866
867/**
868 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
869 * @hba: per adapter instance
870 * @cnt: Interrupt aggregation counter threshold
871 * @tmout: Interrupt aggregation timeout value
872 */
873static inline void
874ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
875{
876 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
877 INT_AGGR_COUNTER_THLD_VAL(cnt) |
878 INT_AGGR_TIMEOUT_VAL(tmout),
879 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530880}
881
882/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300883 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
884 * @hba: per adapter instance
885 */
886static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
887{
888 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
889}
890
891/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530892 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
893 * When run-stop registers are set to 1, it indicates the
894 * host controller that it can process the requests
895 * @hba: per adapter instance
896 */
897static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
898{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530899 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
900 REG_UTP_TASK_REQ_LIST_RUN_STOP);
901 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
902 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530903}
904
905/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530906 * ufshcd_hba_start - Start controller initialization sequence
907 * @hba: per adapter instance
908 */
909static inline void ufshcd_hba_start(struct ufs_hba *hba)
910{
Satya Tangiraladf043c742020-07-06 20:04:14 +0000911 u32 val = CONTROLLER_ENABLE;
912
913 if (ufshcd_crypto_enable(hba))
914 val |= CRYPTO_GENERAL_ENABLE;
915
916 ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530917}
918
919/**
920 * ufshcd_is_hba_active - Get controller state
921 * @hba: per adapter instance
922 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300923 * Returns false if controller is active, true otherwise
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530924 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300925static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530926{
Tomohiro Kusumi4a8eec22017-03-28 16:49:25 +0300927 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
928 ? false : true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530929}
930
Yaniv Gardi37113102016-03-10 17:37:16 +0200931u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
932{
933 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
934 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
935 (hba->ufs_version == UFSHCI_VERSION_11))
936 return UFS_UNIPRO_VER_1_41;
937 else
938 return UFS_UNIPRO_VER_1_6;
939}
940EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
941
942static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
943{
944 /*
945 * If both host and device support UniPro ver1.6 or later, PA layer
946 * parameters tuning happens during link startup itself.
947 *
948 * We can manually tune PA layer parameters if either host or device
949 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
950 * logic simple, we will only do manual tuning if local unipro version
951 * doesn't support ver1.6 or later.
952 */
953 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
954 return true;
955 else
956 return false;
957}
958
Subhash Jadavani394b9492020-03-26 02:25:40 -0700959/**
960 * ufshcd_set_clk_freq - set UFS controller clock frequencies
961 * @hba: per adapter instance
962 * @scale_up: If True, set max possible frequency othewise set low frequency
963 *
964 * Returns 0 if successful
965 * Returns < 0 for any other errors
966 */
967static int ufshcd_set_clk_freq(struct ufs_hba *hba, bool scale_up)
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800968{
969 int ret = 0;
970 struct ufs_clk_info *clki;
971 struct list_head *head = &hba->clk_list_head;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800972
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300973 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800974 goto out;
975
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800976 list_for_each_entry(clki, head, list) {
977 if (!IS_ERR_OR_NULL(clki->clk)) {
978 if (scale_up && clki->max_freq) {
979 if (clki->curr_freq == clki->max_freq)
980 continue;
981
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800982 ret = clk_set_rate(clki->clk, clki->max_freq);
983 if (ret) {
984 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
985 __func__, clki->name,
986 clki->max_freq, ret);
987 break;
988 }
989 trace_ufshcd_clk_scaling(dev_name(hba->dev),
990 "scaled up", clki->name,
991 clki->curr_freq,
992 clki->max_freq);
993
994 clki->curr_freq = clki->max_freq;
995
996 } else if (!scale_up && clki->min_freq) {
997 if (clki->curr_freq == clki->min_freq)
998 continue;
999
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001000 ret = clk_set_rate(clki->clk, clki->min_freq);
1001 if (ret) {
1002 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
1003 __func__, clki->name,
1004 clki->min_freq, ret);
1005 break;
1006 }
1007 trace_ufshcd_clk_scaling(dev_name(hba->dev),
1008 "scaled down", clki->name,
1009 clki->curr_freq,
1010 clki->min_freq);
1011 clki->curr_freq = clki->min_freq;
1012 }
1013 }
1014 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
1015 clki->name, clk_get_rate(clki->clk));
1016 }
1017
Subhash Jadavani394b9492020-03-26 02:25:40 -07001018out:
1019 return ret;
1020}
1021
1022/**
1023 * ufshcd_scale_clks - scale up or scale down UFS controller clocks
1024 * @hba: per adapter instance
1025 * @scale_up: True if scaling up and false if scaling down
1026 *
1027 * Returns 0 if successful
1028 * Returns < 0 for any other errors
1029 */
1030static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
1031{
1032 int ret = 0;
1033 ktime_t start = ktime_get();
1034
1035 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
1036 if (ret)
1037 goto out;
1038
1039 ret = ufshcd_set_clk_freq(hba, scale_up);
1040 if (ret)
1041 goto out;
1042
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001043 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
Subhash Jadavani394b9492020-03-26 02:25:40 -07001044 if (ret)
1045 ufshcd_set_clk_freq(hba, !scale_up);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001046
1047out:
Subhash Jadavani394b9492020-03-26 02:25:40 -07001048 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001049 (scale_up ? "up" : "down"),
1050 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1051 return ret;
1052}
1053
1054/**
1055 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
1056 * @hba: per adapter instance
1057 * @scale_up: True if scaling up and false if scaling down
1058 *
1059 * Returns true if scaling is required, false otherwise.
1060 */
1061static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
1062 bool scale_up)
1063{
1064 struct ufs_clk_info *clki;
1065 struct list_head *head = &hba->clk_list_head;
1066
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03001067 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001068 return false;
1069
1070 list_for_each_entry(clki, head, list) {
1071 if (!IS_ERR_OR_NULL(clki->clk)) {
1072 if (scale_up && clki->max_freq) {
1073 if (clki->curr_freq == clki->max_freq)
1074 continue;
1075 return true;
1076 } else if (!scale_up && clki->min_freq) {
1077 if (clki->curr_freq == clki->min_freq)
1078 continue;
1079 return true;
1080 }
1081 }
1082 }
1083
1084 return false;
1085}
1086
1087static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
1088 u64 wait_timeout_us)
1089{
1090 unsigned long flags;
1091 int ret = 0;
1092 u32 tm_doorbell;
1093 u32 tr_doorbell;
1094 bool timeout = false, do_last_check = false;
1095 ktime_t start;
1096
1097 ufshcd_hold(hba, false);
1098 spin_lock_irqsave(hba->host->host_lock, flags);
1099 /*
1100 * Wait for all the outstanding tasks/transfer requests.
1101 * Verify by checking the doorbell registers are clear.
1102 */
1103 start = ktime_get();
1104 do {
1105 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1106 ret = -EBUSY;
1107 goto out;
1108 }
1109
1110 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1111 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1112 if (!tm_doorbell && !tr_doorbell) {
1113 timeout = false;
1114 break;
1115 } else if (do_last_check) {
1116 break;
1117 }
1118
1119 spin_unlock_irqrestore(hba->host->host_lock, flags);
1120 schedule();
1121 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1122 wait_timeout_us) {
1123 timeout = true;
1124 /*
1125 * We might have scheduled out for long time so make
1126 * sure to check if doorbells are cleared by this time
1127 * or not.
1128 */
1129 do_last_check = true;
1130 }
1131 spin_lock_irqsave(hba->host->host_lock, flags);
1132 } while (tm_doorbell || tr_doorbell);
1133
1134 if (timeout) {
1135 dev_err(hba->dev,
1136 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1137 __func__, tm_doorbell, tr_doorbell);
1138 ret = -EBUSY;
1139 }
1140out:
1141 spin_unlock_irqrestore(hba->host->host_lock, flags);
1142 ufshcd_release(hba);
1143 return ret;
1144}
1145
1146/**
1147 * ufshcd_scale_gear - scale up/down UFS gear
1148 * @hba: per adapter instance
1149 * @scale_up: True for scaling up gear and false for scaling down
1150 *
1151 * Returns 0 for success,
1152 * Returns -EBUSY if scaling can't happen at this time
1153 * Returns non-zero for any other errors
1154 */
1155static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1156{
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001157 int ret = 0;
1158 struct ufs_pa_layer_attr new_pwr_info;
1159
1160 if (scale_up) {
1161 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1162 sizeof(struct ufs_pa_layer_attr));
1163 } else {
1164 memcpy(&new_pwr_info, &hba->pwr_info,
1165 sizeof(struct ufs_pa_layer_attr));
1166
Can Guo29b87e92020-11-26 17:58:48 -08001167 if (hba->pwr_info.gear_tx > hba->clk_scaling.min_gear ||
1168 hba->pwr_info.gear_rx > hba->clk_scaling.min_gear) {
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001169 /* save the current power mode */
1170 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1171 &hba->pwr_info,
1172 sizeof(struct ufs_pa_layer_attr));
1173
1174 /* scale down gear */
Can Guo29b87e92020-11-26 17:58:48 -08001175 new_pwr_info.gear_tx = hba->clk_scaling.min_gear;
1176 new_pwr_info.gear_rx = hba->clk_scaling.min_gear;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001177 }
1178 }
1179
1180 /* check if the power mode needs to be changed or not? */
Can Guo6a9df812020-02-11 21:38:28 -08001181 ret = ufshcd_config_pwr_mode(hba, &new_pwr_info);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001182 if (ret)
1183 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1184 __func__, ret,
1185 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1186 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1187
1188 return ret;
1189}
1190
1191static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1192{
1193 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1194 int ret = 0;
1195 /*
1196 * make sure that there are no outstanding requests when
1197 * clock scaling is in progress
1198 */
Subhash Jadavani38135532018-05-03 16:37:18 +05301199 ufshcd_scsi_block_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001200 down_write(&hba->clk_scaling_lock);
Can Guo0e9d4ca2021-01-20 02:04:21 -08001201
1202 if (!hba->clk_scaling.is_allowed ||
1203 ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001204 ret = -EBUSY;
1205 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301206 ufshcd_scsi_unblock_requests(hba);
Can Guo0e9d4ca2021-01-20 02:04:21 -08001207 goto out;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001208 }
1209
Can Guo0e9d4ca2021-01-20 02:04:21 -08001210 /* let's not get into low power until clock scaling is completed */
1211 ufshcd_hold(hba, false);
1212
1213out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001214 return ret;
1215}
1216
Can Guo0e9d4ca2021-01-20 02:04:21 -08001217static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba, bool writelock)
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001218{
Can Guo0e9d4ca2021-01-20 02:04:21 -08001219 if (writelock)
1220 up_write(&hba->clk_scaling_lock);
1221 else
1222 up_read(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301223 ufshcd_scsi_unblock_requests(hba);
Can Guo0e9d4ca2021-01-20 02:04:21 -08001224 ufshcd_release(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001225}
1226
1227/**
1228 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1229 * @hba: per adapter instance
1230 * @scale_up: True for scaling up and false for scalin down
1231 *
1232 * Returns 0 for success,
1233 * Returns -EBUSY if scaling can't happen at this time
1234 * Returns non-zero for any other errors
1235 */
1236static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1237{
1238 int ret = 0;
Can Guo0e9d4ca2021-01-20 02:04:21 -08001239 bool is_writelock = true;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001240
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001241 ret = ufshcd_clock_scaling_prepare(hba);
1242 if (ret)
Can Guo0e9d4ca2021-01-20 02:04:21 -08001243 return ret;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001244
1245 /* scale down the gear before scaling down clocks */
1246 if (!scale_up) {
1247 ret = ufshcd_scale_gear(hba, false);
1248 if (ret)
Subhash Jadavani394b9492020-03-26 02:25:40 -07001249 goto out_unprepare;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001250 }
1251
1252 ret = ufshcd_scale_clks(hba, scale_up);
1253 if (ret) {
1254 if (!scale_up)
1255 ufshcd_scale_gear(hba, true);
Subhash Jadavani394b9492020-03-26 02:25:40 -07001256 goto out_unprepare;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001257 }
1258
1259 /* scale up the gear after scaling up clocks */
1260 if (scale_up) {
1261 ret = ufshcd_scale_gear(hba, true);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001262 if (ret) {
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001263 ufshcd_scale_clks(hba, false);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001264 goto out_unprepare;
1265 }
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001266 }
1267
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001268 /* Enable Write Booster if we have scaled up else disable it */
Can Guo0e9d4ca2021-01-20 02:04:21 -08001269 downgrade_write(&hba->clk_scaling_lock);
1270 is_writelock = false;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001271 ufshcd_wb_ctrl(hba, scale_up);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001272
Subhash Jadavani394b9492020-03-26 02:25:40 -07001273out_unprepare:
Can Guo0e9d4ca2021-01-20 02:04:21 -08001274 ufshcd_clock_scaling_unprepare(hba, is_writelock);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001275 return ret;
1276}
1277
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001278static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1279{
1280 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1281 clk_scaling.suspend_work);
1282 unsigned long irq_flags;
1283
1284 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1285 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1286 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1287 return;
1288 }
1289 hba->clk_scaling.is_suspended = true;
1290 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1291
1292 __ufshcd_suspend_clkscaling(hba);
1293}
1294
1295static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1296{
1297 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1298 clk_scaling.resume_work);
1299 unsigned long irq_flags;
1300
1301 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1302 if (!hba->clk_scaling.is_suspended) {
1303 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1304 return;
1305 }
1306 hba->clk_scaling.is_suspended = false;
1307 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1308
1309 devfreq_resume_device(hba->devfreq);
1310}
1311
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001312static int ufshcd_devfreq_target(struct device *dev,
1313 unsigned long *freq, u32 flags)
1314{
1315 int ret = 0;
1316 struct ufs_hba *hba = dev_get_drvdata(dev);
1317 ktime_t start;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001318 bool scale_up, sched_clk_scaling_suspend_work = false;
Bjorn Andersson092b4552018-05-17 23:26:37 -07001319 struct list_head *clk_list = &hba->clk_list_head;
1320 struct ufs_clk_info *clki;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001321 unsigned long irq_flags;
1322
1323 if (!ufshcd_is_clkscaling_supported(hba))
1324 return -EINVAL;
1325
Asutosh Das91831d32020-03-25 11:29:00 -07001326 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1327 /* Override with the closest supported frequency */
1328 *freq = (unsigned long) clk_round_rate(clki->clk, *freq);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001329 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1330 if (ufshcd_eh_in_progress(hba)) {
1331 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1332 return 0;
1333 }
1334
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001335 if (!hba->clk_scaling.active_reqs)
1336 sched_clk_scaling_suspend_work = true;
1337
Bjorn Andersson092b4552018-05-17 23:26:37 -07001338 if (list_empty(clk_list)) {
1339 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1340 goto out;
1341 }
1342
Asutosh Das91831d32020-03-25 11:29:00 -07001343 /* Decide based on the rounded-off frequency and update */
Bjorn Andersson092b4552018-05-17 23:26:37 -07001344 scale_up = (*freq == clki->max_freq) ? true : false;
Asutosh Das91831d32020-03-25 11:29:00 -07001345 if (!scale_up)
1346 *freq = clki->min_freq;
1347 /* Update the frequency */
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001348 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1349 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1350 ret = 0;
1351 goto out; /* no state change required */
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001352 }
1353 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1354
1355 start = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001356 ret = ufshcd_devfreq_scale(hba, scale_up);
1357
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001358 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1359 (scale_up ? "up" : "down"),
1360 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1361
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001362out:
1363 if (sched_clk_scaling_suspend_work)
1364 queue_work(hba->clk_scaling.workq,
1365 &hba->clk_scaling.suspend_work);
1366
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001367 return ret;
1368}
1369
Bart Van Assche7252a362019-12-09 10:13:08 -08001370static bool ufshcd_is_busy(struct request *req, void *priv, bool reserved)
1371{
1372 int *busy = priv;
1373
1374 WARN_ON_ONCE(reserved);
1375 (*busy)++;
1376 return false;
1377}
1378
1379/* Whether or not any tag is in use by a request that is in progress. */
1380static bool ufshcd_any_tag_in_use(struct ufs_hba *hba)
1381{
1382 struct request_queue *q = hba->cmd_queue;
1383 int busy = 0;
1384
1385 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_is_busy, &busy);
1386 return busy;
1387}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001388
1389static int ufshcd_devfreq_get_dev_status(struct device *dev,
1390 struct devfreq_dev_status *stat)
1391{
1392 struct ufs_hba *hba = dev_get_drvdata(dev);
1393 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1394 unsigned long flags;
Asutosh Das91831d32020-03-25 11:29:00 -07001395 struct list_head *clk_list = &hba->clk_list_head;
1396 struct ufs_clk_info *clki;
Stanley Chub1bf66d2020-06-11 18:10:43 +08001397 ktime_t curr_t;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001398
1399 if (!ufshcd_is_clkscaling_supported(hba))
1400 return -EINVAL;
1401
1402 memset(stat, 0, sizeof(*stat));
1403
1404 spin_lock_irqsave(hba->host->host_lock, flags);
Stanley Chub1bf66d2020-06-11 18:10:43 +08001405 curr_t = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001406 if (!scaling->window_start_t)
1407 goto start_window;
1408
Asutosh Das91831d32020-03-25 11:29:00 -07001409 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1410 /*
1411 * If current frequency is 0, then the ondemand governor considers
1412 * there's no initial frequency set. And it always requests to set
1413 * to max. frequency.
1414 */
1415 stat->current_frequency = clki->curr_freq;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001416 if (scaling->is_busy_started)
Stanley Chub1bf66d2020-06-11 18:10:43 +08001417 scaling->tot_busy_t += ktime_us_delta(curr_t,
1418 scaling->busy_start_t);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001419
Stanley Chub1bf66d2020-06-11 18:10:43 +08001420 stat->total_time = ktime_us_delta(curr_t, scaling->window_start_t);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001421 stat->busy_time = scaling->tot_busy_t;
1422start_window:
Stanley Chub1bf66d2020-06-11 18:10:43 +08001423 scaling->window_start_t = curr_t;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001424 scaling->tot_busy_t = 0;
1425
1426 if (hba->outstanding_reqs) {
Stanley Chub1bf66d2020-06-11 18:10:43 +08001427 scaling->busy_start_t = curr_t;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001428 scaling->is_busy_started = true;
1429 } else {
1430 scaling->busy_start_t = 0;
1431 scaling->is_busy_started = false;
1432 }
1433 spin_unlock_irqrestore(hba->host->host_lock, flags);
1434 return 0;
1435}
1436
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001437static int ufshcd_devfreq_init(struct ufs_hba *hba)
1438{
Bjorn Andersson092b4552018-05-17 23:26:37 -07001439 struct list_head *clk_list = &hba->clk_list_head;
1440 struct ufs_clk_info *clki;
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001441 struct devfreq *devfreq;
1442 int ret;
1443
Bjorn Andersson092b4552018-05-17 23:26:37 -07001444 /* Skip devfreq if we don't have any clocks in the list */
1445 if (list_empty(clk_list))
1446 return 0;
1447
1448 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1449 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1450 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1451
Stanley Chu90b84912020-05-09 17:37:13 +08001452 ufshcd_vops_config_scaling_param(hba, &hba->vps->devfreq_profile,
1453 &hba->vps->ondemand_data);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001454 devfreq = devfreq_add_device(hba->dev,
Stanley Chu90b84912020-05-09 17:37:13 +08001455 &hba->vps->devfreq_profile,
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001456 DEVFREQ_GOV_SIMPLE_ONDEMAND,
Stanley Chu90b84912020-05-09 17:37:13 +08001457 &hba->vps->ondemand_data);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001458 if (IS_ERR(devfreq)) {
1459 ret = PTR_ERR(devfreq);
1460 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001461
1462 dev_pm_opp_remove(hba->dev, clki->min_freq);
1463 dev_pm_opp_remove(hba->dev, clki->max_freq);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001464 return ret;
1465 }
1466
1467 hba->devfreq = devfreq;
1468
1469 return 0;
1470}
1471
Bjorn Andersson092b4552018-05-17 23:26:37 -07001472static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1473{
1474 struct list_head *clk_list = &hba->clk_list_head;
1475 struct ufs_clk_info *clki;
1476
1477 if (!hba->devfreq)
1478 return;
1479
1480 devfreq_remove_device(hba->devfreq);
1481 hba->devfreq = NULL;
1482
1483 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1484 dev_pm_opp_remove(hba->dev, clki->min_freq);
1485 dev_pm_opp_remove(hba->dev, clki->max_freq);
1486}
1487
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001488static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1489{
1490 unsigned long flags;
1491
1492 devfreq_suspend_device(hba->devfreq);
1493 spin_lock_irqsave(hba->host->host_lock, flags);
1494 hba->clk_scaling.window_start_t = 0;
1495 spin_unlock_irqrestore(hba->host->host_lock, flags);
1496}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001497
Gilad Bronera5082532016-10-17 17:10:00 -07001498static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1499{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001500 unsigned long flags;
1501 bool suspend = false;
1502
Stanley Chuf9a7fa32021-01-20 23:01:40 +08001503 cancel_work_sync(&hba->clk_scaling.suspend_work);
1504 cancel_work_sync(&hba->clk_scaling.resume_work);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001505
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001506 spin_lock_irqsave(hba->host->host_lock, flags);
1507 if (!hba->clk_scaling.is_suspended) {
1508 suspend = true;
1509 hba->clk_scaling.is_suspended = true;
1510 }
1511 spin_unlock_irqrestore(hba->host->host_lock, flags);
1512
1513 if (suspend)
1514 __ufshcd_suspend_clkscaling(hba);
Gilad Bronera5082532016-10-17 17:10:00 -07001515}
1516
1517static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1518{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001519 unsigned long flags;
1520 bool resume = false;
1521
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001522 spin_lock_irqsave(hba->host->host_lock, flags);
1523 if (hba->clk_scaling.is_suspended) {
1524 resume = true;
1525 hba->clk_scaling.is_suspended = false;
1526 }
1527 spin_unlock_irqrestore(hba->host->host_lock, flags);
1528
1529 if (resume)
1530 devfreq_resume_device(hba->devfreq);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001531}
1532
1533static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1534 struct device_attribute *attr, char *buf)
1535{
1536 struct ufs_hba *hba = dev_get_drvdata(dev);
1537
Can Guo0e9d4ca2021-01-20 02:04:21 -08001538 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_enabled);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001539}
1540
1541static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1542 struct device_attribute *attr, const char *buf, size_t count)
1543{
1544 struct ufs_hba *hba = dev_get_drvdata(dev);
1545 u32 value;
Can Guo9cd20d32021-01-13 19:13:28 -08001546 int err = 0;
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001547
1548 if (kstrtou32(buf, 0, &value))
1549 return -EINVAL;
1550
Can Guo9cd20d32021-01-13 19:13:28 -08001551 down(&hba->host_sem);
1552 if (!ufshcd_is_user_access_allowed(hba)) {
1553 err = -EBUSY;
1554 goto out;
1555 }
1556
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001557 value = !!value;
Can Guo0e9d4ca2021-01-20 02:04:21 -08001558 if (value == hba->clk_scaling.is_enabled)
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001559 goto out;
1560
1561 pm_runtime_get_sync(hba->dev);
1562 ufshcd_hold(hba, false);
1563
Can Guo0e9d4ca2021-01-20 02:04:21 -08001564 hba->clk_scaling.is_enabled = value;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001565
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001566 if (value) {
1567 ufshcd_resume_clkscaling(hba);
1568 } else {
1569 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001570 err = ufshcd_devfreq_scale(hba, true);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001571 if (err)
1572 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1573 __func__, err);
1574 }
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001575
1576 ufshcd_release(hba);
1577 pm_runtime_put_sync(hba->dev);
1578out:
Can Guo9cd20d32021-01-13 19:13:28 -08001579 up(&hba->host_sem);
1580 return err ? err : count;
Gilad Bronera5082532016-10-17 17:10:00 -07001581}
1582
Can Guo4543d9d2021-01-20 02:04:22 -08001583static void ufshcd_init_clk_scaling_sysfs(struct ufs_hba *hba)
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001584{
1585 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1586 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1587 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1588 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1589 hba->clk_scaling.enable_attr.attr.mode = 0644;
1590 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1591 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1592}
1593
Can Guo4543d9d2021-01-20 02:04:22 -08001594static void ufshcd_remove_clk_scaling_sysfs(struct ufs_hba *hba)
1595{
1596 if (hba->clk_scaling.enable_attr.attr.name)
1597 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
1598}
1599
1600static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1601{
1602 char wq_name[sizeof("ufs_clkscaling_00")];
1603
1604 if (!ufshcd_is_clkscaling_supported(hba))
1605 return;
1606
Can Guo80d892f2021-01-27 18:49:27 -08001607 if (!hba->clk_scaling.min_gear)
1608 hba->clk_scaling.min_gear = UFS_HS_G1;
1609
Can Guo4543d9d2021-01-20 02:04:22 -08001610 INIT_WORK(&hba->clk_scaling.suspend_work,
1611 ufshcd_clk_scaling_suspend_work);
1612 INIT_WORK(&hba->clk_scaling.resume_work,
1613 ufshcd_clk_scaling_resume_work);
1614
1615 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1616 hba->host->host_no);
1617 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1618
1619 hba->clk_scaling.is_initialized = true;
1620}
1621
1622static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1623{
1624 if (!hba->clk_scaling.is_initialized)
1625 return;
1626
1627 ufshcd_remove_clk_scaling_sysfs(hba);
1628 destroy_workqueue(hba->clk_scaling.workq);
1629 ufshcd_devfreq_remove(hba);
1630 hba->clk_scaling.is_initialized = false;
1631}
1632
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001633static void ufshcd_ungate_work(struct work_struct *work)
1634{
1635 int ret;
1636 unsigned long flags;
1637 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1638 clk_gating.ungate_work);
1639
1640 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1641
1642 spin_lock_irqsave(hba->host->host_lock, flags);
1643 if (hba->clk_gating.state == CLKS_ON) {
1644 spin_unlock_irqrestore(hba->host->host_lock, flags);
1645 goto unblock_reqs;
1646 }
1647
1648 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guodd7143e2020-10-27 12:10:36 -07001649 ufshcd_hba_vreg_set_hpm(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001650 ufshcd_setup_clocks(hba, true);
1651
Stanley Chu8b0bbf02019-12-07 20:22:01 +08001652 ufshcd_enable_irq(hba);
1653
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001654 /* Exit from hibern8 */
1655 if (ufshcd_can_hibern8_during_gating(hba)) {
1656 /* Prevent gating in this path */
1657 hba->clk_gating.is_suspended = true;
1658 if (ufshcd_is_link_hibern8(hba)) {
1659 ret = ufshcd_uic_hibern8_exit(hba);
1660 if (ret)
1661 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1662 __func__, ret);
1663 else
1664 ufshcd_set_link_active(hba);
1665 }
1666 hba->clk_gating.is_suspended = false;
1667 }
1668unblock_reqs:
Subhash Jadavani38135532018-05-03 16:37:18 +05301669 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001670}
1671
1672/**
1673 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1674 * Also, exit from hibern8 mode and set the link as active.
1675 * @hba: per adapter instance
1676 * @async: This indicates whether caller should ungate clocks asynchronously.
1677 */
1678int ufshcd_hold(struct ufs_hba *hba, bool async)
1679{
1680 int rc = 0;
Stanley Chu93b6c5d2020-08-09 13:07:34 +08001681 bool flush_result;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001682 unsigned long flags;
1683
1684 if (!ufshcd_is_clkgating_allowed(hba))
1685 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001686 spin_lock_irqsave(hba->host->host_lock, flags);
1687 hba->clk_gating.active_reqs++;
1688
Sahitya Tummala856b3482014-09-25 15:32:34 +03001689start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001690 switch (hba->clk_gating.state) {
1691 case CLKS_ON:
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001692 /*
1693 * Wait for the ungate work to complete if in progress.
1694 * Though the clocks may be in ON state, the link could
1695 * still be in hibner8 state if hibern8 is allowed
1696 * during clock gating.
1697 * Make sure we exit hibern8 state also in addition to
1698 * clocks being ON.
1699 */
1700 if (ufshcd_can_hibern8_during_gating(hba) &&
1701 ufshcd_is_link_hibern8(hba)) {
Can Guoc63d6092020-02-10 19:40:48 -08001702 if (async) {
1703 rc = -EAGAIN;
1704 hba->clk_gating.active_reqs--;
1705 break;
1706 }
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001707 spin_unlock_irqrestore(hba->host->host_lock, flags);
Stanley Chu93b6c5d2020-08-09 13:07:34 +08001708 flush_result = flush_work(&hba->clk_gating.ungate_work);
1709 if (hba->clk_gating.is_suspended && !flush_result)
1710 goto out;
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001711 spin_lock_irqsave(hba->host->host_lock, flags);
1712 goto start;
1713 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001714 break;
1715 case REQ_CLKS_OFF:
1716 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1717 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001718 trace_ufshcd_clk_gating(dev_name(hba->dev),
1719 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001720 break;
1721 }
1722 /*
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +03001723 * If we are here, it means gating work is either done or
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001724 * currently running. Hence, fall through to cancel gating
1725 * work and to enable clocks.
1726 */
Gustavo A. R. Silvadf561f662020-08-23 17:36:59 -05001727 fallthrough;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001728 case CLKS_OFF:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001729 hba->clk_gating.state = REQ_CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001730 trace_ufshcd_clk_gating(dev_name(hba->dev),
1731 hba->clk_gating.state);
Can Guoda3fecb2020-11-02 22:24:39 -08001732 if (queue_work(hba->clk_gating.clk_gating_workq,
1733 &hba->clk_gating.ungate_work))
1734 ufshcd_scsi_block_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001735 /*
1736 * fall through to check if we should wait for this
1737 * work to be done or not.
1738 */
Gustavo A. R. Silvadf561f662020-08-23 17:36:59 -05001739 fallthrough;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001740 case REQ_CLKS_ON:
1741 if (async) {
1742 rc = -EAGAIN;
1743 hba->clk_gating.active_reqs--;
1744 break;
1745 }
1746
1747 spin_unlock_irqrestore(hba->host->host_lock, flags);
1748 flush_work(&hba->clk_gating.ungate_work);
1749 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001750 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001751 goto start;
1752 default:
1753 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1754 __func__, hba->clk_gating.state);
1755 break;
1756 }
1757 spin_unlock_irqrestore(hba->host->host_lock, flags);
1758out:
1759 return rc;
1760}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001761EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001762
1763static void ufshcd_gate_work(struct work_struct *work)
1764{
1765 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1766 clk_gating.gate_work.work);
1767 unsigned long flags;
Can Guo4db7a232020-08-09 05:15:51 -07001768 int ret;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001769
1770 spin_lock_irqsave(hba->host->host_lock, flags);
Venkat Gopalakrishnan3f0c06d2016-10-17 17:11:07 -07001771 /*
1772 * In case you are here to cancel this work the gating state
1773 * would be marked as REQ_CLKS_ON. In this case save time by
1774 * skipping the gating work and exit after changing the clock
1775 * state to CLKS_ON.
1776 */
1777 if (hba->clk_gating.is_suspended ||
Asutosh Das18f013742019-11-14 22:09:29 -08001778 (hba->clk_gating.state != REQ_CLKS_OFF)) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001779 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001780 trace_ufshcd_clk_gating(dev_name(hba->dev),
1781 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001782 goto rel_lock;
1783 }
1784
1785 if (hba->clk_gating.active_reqs
1786 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
Bart Van Assche7252a362019-12-09 10:13:08 -08001787 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001788 || hba->active_uic_cmd || hba->uic_async_done)
1789 goto rel_lock;
1790
1791 spin_unlock_irqrestore(hba->host->host_lock, flags);
1792
1793 /* put the link into hibern8 mode before turning off clocks */
1794 if (ufshcd_can_hibern8_during_gating(hba)) {
Can Guo4db7a232020-08-09 05:15:51 -07001795 ret = ufshcd_uic_hibern8_enter(hba);
1796 if (ret) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001797 hba->clk_gating.state = CLKS_ON;
Can Guo4db7a232020-08-09 05:15:51 -07001798 dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
1799 __func__, ret);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001800 trace_ufshcd_clk_gating(dev_name(hba->dev),
1801 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001802 goto out;
1803 }
1804 ufshcd_set_link_hibern8(hba);
1805 }
1806
Stanley Chu8b0bbf02019-12-07 20:22:01 +08001807 ufshcd_disable_irq(hba);
1808
Can Guo81309c22020-11-25 18:01:00 -08001809 ufshcd_setup_clocks(hba, false);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001810
Can Guodd7143e2020-10-27 12:10:36 -07001811 /* Put the host controller in low power mode if possible */
1812 ufshcd_hba_vreg_set_lpm(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001813 /*
1814 * In case you are here to cancel this work the gating state
1815 * would be marked as REQ_CLKS_ON. In this case keep the state
1816 * as REQ_CLKS_ON which would anyway imply that clocks are off
1817 * and a request to turn them on is pending. By doing this way,
1818 * we keep the state machine in tact and this would ultimately
1819 * prevent from doing cancel work multiple times when there are
1820 * new requests arriving before the current cancel work is done.
1821 */
1822 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001823 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001824 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001825 trace_ufshcd_clk_gating(dev_name(hba->dev),
1826 hba->clk_gating.state);
1827 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001828rel_lock:
1829 spin_unlock_irqrestore(hba->host->host_lock, flags);
1830out:
1831 return;
1832}
1833
1834/* host lock must be held before calling this variant */
1835static void __ufshcd_release(struct ufs_hba *hba)
1836{
1837 if (!ufshcd_is_clkgating_allowed(hba))
1838 return;
1839
1840 hba->clk_gating.active_reqs--;
1841
Can Guo4db7a232020-08-09 05:15:51 -07001842 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended ||
1843 hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL ||
Jaegeuk Kim8eb456b2020-11-17 08:58:38 -08001844 hba->outstanding_tasks ||
Jaegeuk Kimfd62de12020-11-17 08:58:33 -08001845 hba->active_uic_cmd || hba->uic_async_done ||
1846 hba->clk_gating.state == CLKS_OFF)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001847 return;
1848
1849 hba->clk_gating.state = REQ_CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001850 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Evan Greenf4bb7702018-10-05 10:27:32 -07001851 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1852 &hba->clk_gating.gate_work,
1853 msecs_to_jiffies(hba->clk_gating.delay_ms));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001854}
1855
1856void ufshcd_release(struct ufs_hba *hba)
1857{
1858 unsigned long flags;
1859
1860 spin_lock_irqsave(hba->host->host_lock, flags);
1861 __ufshcd_release(hba);
1862 spin_unlock_irqrestore(hba->host->host_lock, flags);
1863}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001864EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001865
1866static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1867 struct device_attribute *attr, char *buf)
1868{
1869 struct ufs_hba *hba = dev_get_drvdata(dev);
1870
DooHyun Hwangbafd09f2021-02-03 19:14:43 +09001871 return sysfs_emit(buf, "%lu\n", hba->clk_gating.delay_ms);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001872}
1873
1874static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1875 struct device_attribute *attr, const char *buf, size_t count)
1876{
1877 struct ufs_hba *hba = dev_get_drvdata(dev);
1878 unsigned long flags, value;
1879
1880 if (kstrtoul(buf, 0, &value))
1881 return -EINVAL;
1882
1883 spin_lock_irqsave(hba->host->host_lock, flags);
1884 hba->clk_gating.delay_ms = value;
1885 spin_unlock_irqrestore(hba->host->host_lock, flags);
1886 return count;
1887}
1888
Sahitya Tummalab4274112016-12-22 18:40:39 -08001889static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1890 struct device_attribute *attr, char *buf)
1891{
1892 struct ufs_hba *hba = dev_get_drvdata(dev);
1893
DooHyun Hwangbafd09f2021-02-03 19:14:43 +09001894 return sysfs_emit(buf, "%d\n", hba->clk_gating.is_enabled);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001895}
1896
1897static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1898 struct device_attribute *attr, const char *buf, size_t count)
1899{
1900 struct ufs_hba *hba = dev_get_drvdata(dev);
1901 unsigned long flags;
1902 u32 value;
1903
1904 if (kstrtou32(buf, 0, &value))
1905 return -EINVAL;
1906
1907 value = !!value;
Jaegeuk Kimb6645112020-11-17 08:58:34 -08001908
1909 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001910 if (value == hba->clk_gating.is_enabled)
1911 goto out;
1912
Jaegeuk Kimb6645112020-11-17 08:58:34 -08001913 if (value)
1914 __ufshcd_release(hba);
1915 else
Sahitya Tummalab4274112016-12-22 18:40:39 -08001916 hba->clk_gating.active_reqs++;
Sahitya Tummalab4274112016-12-22 18:40:39 -08001917
1918 hba->clk_gating.is_enabled = value;
1919out:
Jaegeuk Kimb6645112020-11-17 08:58:34 -08001920 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001921 return count;
1922}
1923
Can Guo4543d9d2021-01-20 02:04:22 -08001924static void ufshcd_init_clk_gating_sysfs(struct ufs_hba *hba)
Vivek Gautameebcc192018-08-07 23:17:39 +05301925{
Can Guo4543d9d2021-01-20 02:04:22 -08001926 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1927 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1928 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1929 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1930 hba->clk_gating.delay_attr.attr.mode = 0644;
1931 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1932 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Vivek Gautameebcc192018-08-07 23:17:39 +05301933
Can Guo4543d9d2021-01-20 02:04:22 -08001934 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1935 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1936 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1937 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1938 hba->clk_gating.enable_attr.attr.mode = 0644;
1939 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1940 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Vivek Gautameebcc192018-08-07 23:17:39 +05301941}
1942
Can Guo4543d9d2021-01-20 02:04:22 -08001943static void ufshcd_remove_clk_gating_sysfs(struct ufs_hba *hba)
Vivek Gautameebcc192018-08-07 23:17:39 +05301944{
Can Guo4543d9d2021-01-20 02:04:22 -08001945 if (hba->clk_gating.delay_attr.attr.name)
1946 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1947 if (hba->clk_gating.enable_attr.attr.name)
1948 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Vivek Gautameebcc192018-08-07 23:17:39 +05301949}
1950
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001951static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1952{
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301953 char wq_name[sizeof("ufs_clk_gating_00")];
1954
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001955 if (!ufshcd_is_clkgating_allowed(hba))
1956 return;
1957
Can Guo2dec9472020-08-09 05:15:47 -07001958 hba->clk_gating.state = CLKS_ON;
1959
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001960 hba->clk_gating.delay_ms = 150;
1961 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1962 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1963
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301964 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1965 hba->host->host_no);
1966 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
Jaegeuk Kime93e6e42020-11-17 08:58:36 -08001967 WQ_MEM_RECLAIM | WQ_HIGHPRI);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301968
Can Guo4543d9d2021-01-20 02:04:22 -08001969 ufshcd_init_clk_gating_sysfs(hba);
1970
Sahitya Tummalab4274112016-12-22 18:40:39 -08001971 hba->clk_gating.is_enabled = true;
Can Guo4543d9d2021-01-20 02:04:22 -08001972 hba->clk_gating.is_initialized = true;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001973}
1974
1975static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1976{
Can Guo4543d9d2021-01-20 02:04:22 -08001977 if (!hba->clk_gating.is_initialized)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001978 return;
Can Guo4543d9d2021-01-20 02:04:22 -08001979 ufshcd_remove_clk_gating_sysfs(hba);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001980 cancel_work_sync(&hba->clk_gating.ungate_work);
1981 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301982 destroy_workqueue(hba->clk_gating.clk_gating_workq);
Can Guo4543d9d2021-01-20 02:04:22 -08001983 hba->clk_gating.is_initialized = false;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001984}
1985
Sahitya Tummala856b3482014-09-25 15:32:34 +03001986/* Must be called with host lock acquired */
1987static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1988{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001989 bool queue_resume_work = false;
Stanley Chub1bf66d2020-06-11 18:10:43 +08001990 ktime_t curr_t = ktime_get();
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001991
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001992 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001993 return;
1994
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001995 if (!hba->clk_scaling.active_reqs++)
1996 queue_resume_work = true;
1997
Can Guo0e9d4ca2021-01-20 02:04:21 -08001998 if (!hba->clk_scaling.is_enabled || hba->pm_op_in_progress)
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001999 return;
2000
2001 if (queue_resume_work)
2002 queue_work(hba->clk_scaling.workq,
2003 &hba->clk_scaling.resume_work);
2004
2005 if (!hba->clk_scaling.window_start_t) {
Stanley Chub1bf66d2020-06-11 18:10:43 +08002006 hba->clk_scaling.window_start_t = curr_t;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08002007 hba->clk_scaling.tot_busy_t = 0;
2008 hba->clk_scaling.is_busy_started = false;
2009 }
2010
Sahitya Tummala856b3482014-09-25 15:32:34 +03002011 if (!hba->clk_scaling.is_busy_started) {
Stanley Chub1bf66d2020-06-11 18:10:43 +08002012 hba->clk_scaling.busy_start_t = curr_t;
Sahitya Tummala856b3482014-09-25 15:32:34 +03002013 hba->clk_scaling.is_busy_started = true;
2014 }
2015}
2016
2017static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
2018{
2019 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
2020
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08002021 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03002022 return;
2023
2024 if (!hba->outstanding_reqs && scaling->is_busy_started) {
2025 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
2026 scaling->busy_start_t));
Thomas Gleixner8b0e1952016-12-25 12:30:41 +01002027 scaling->busy_start_t = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03002028 scaling->is_busy_started = false;
2029 }
2030}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302031/**
2032 * ufshcd_send_command - Send SCSI or device management commands
2033 * @hba: per adapter instance
2034 * @task_tag: Task tag of the command
2035 */
2036static inline
2037void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
2038{
Stanley Chu6edfdcf2020-07-06 14:07:07 +08002039 struct ufshcd_lrb *lrbp = &hba->lrb[task_tag];
2040
2041 lrbp->issue_time_stamp = ktime_get();
2042 lrbp->compl_time_stamp = ktime_set(0, 0);
2043 ufshcd_vops_setup_xfer_req(hba, task_tag, (lrbp->cmd ? true : false));
Bean Huo28fa68f2021-01-05 12:34:42 +01002044 ufshcd_add_command_trace(hba, task_tag, UFS_CMD_SEND);
Sahitya Tummala856b3482014-09-25 15:32:34 +03002045 ufshcd_clk_scaling_start_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302046 __set_bit(task_tag, &hba->outstanding_reqs);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302047 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002048 /* Make sure that doorbell is committed immediately */
2049 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302050}
2051
2052/**
2053 * ufshcd_copy_sense_data - Copy sense data in case of check condition
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002054 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302055 */
2056static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
2057{
2058 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05302059 if (lrbp->sense_buffer &&
2060 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07002061 int len_to_copy;
2062
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302063 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Avri Altman09a5a242018-11-22 20:04:56 +02002064 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07002065
Avri Altman09a5a242018-11-22 20:04:56 +02002066 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
2067 len_to_copy);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302068 }
2069}
2070
2071/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302072 * ufshcd_copy_query_response() - Copy the Query Response and the data
2073 * descriptor
2074 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002075 * @lrbp: pointer to local reference block
Dolev Raviv68078d52013-07-30 00:35:58 +05302076 */
2077static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002078int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05302079{
2080 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2081
Dolev Raviv68078d52013-07-30 00:35:58 +05302082 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302083
Dolev Raviv68078d52013-07-30 00:35:58 +05302084 /* Get the descriptor */
Avri Altman1c908362019-05-21 11:24:22 +03002085 if (hba->dev_cmd.query.descriptor &&
2086 lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002087 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05302088 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002089 u16 resp_len;
2090 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05302091
2092 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002093 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302094 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002095 buf_len = be16_to_cpu(
2096 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002097 if (likely(buf_len >= resp_len)) {
2098 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
2099 } else {
2100 dev_warn(hba->dev,
Bean Huo3d4881d2019-11-12 23:34:35 +01002101 "%s: rsp size %d is bigger than buffer size %d",
2102 __func__, resp_len, buf_len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002103 return -EINVAL;
2104 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302105 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002106
2107 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302108}
2109
2110/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302111 * ufshcd_hba_capabilities - Read controller capabilities
2112 * @hba: per adapter instance
Satya Tangiraladf043c742020-07-06 20:04:14 +00002113 *
2114 * Return: 0 on success, negative on error.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302115 */
Satya Tangiraladf043c742020-07-06 20:04:14 +00002116static inline int ufshcd_hba_capabilities(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302117{
Satya Tangiraladf043c742020-07-06 20:04:14 +00002118 int err;
2119
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302120 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302121
2122 /* nutrs and nutmrs are 0 based values */
2123 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
2124 hba->nutmrs =
2125 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
Satya Tangiraladf043c742020-07-06 20:04:14 +00002126
2127 /* Read crypto capabilities */
2128 err = ufshcd_hba_init_crypto_capabilities(hba);
2129 if (err)
2130 dev_err(hba->dev, "crypto setup failed\n");
2131
2132 return err;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302133}
2134
2135/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302136 * ufshcd_ready_for_uic_cmd - Check if controller is ready
2137 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302138 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302139 * Return true on success, else false
2140 */
2141static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
2142{
2143 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
2144 return true;
2145 else
2146 return false;
2147}
2148
2149/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05302150 * ufshcd_get_upmcrs - Get the power mode change request status
2151 * @hba: Pointer to adapter instance
2152 *
2153 * This function gets the UPMCRS field of HCS register
2154 * Returns value of UPMCRS field
2155 */
2156static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
2157{
2158 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
2159}
2160
2161/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302162 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
2163 * @hba: per adapter instance
2164 * @uic_cmd: UIC command
2165 *
2166 * Mutex must be held.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302167 */
2168static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302169ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302170{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302171 WARN_ON(hba->active_uic_cmd);
2172
2173 hba->active_uic_cmd = uic_cmd;
2174
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302175 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302176 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2177 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2178 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302179
Bean Huo28fa68f2021-01-05 12:34:42 +01002180 ufshcd_add_uic_command_trace(hba, uic_cmd, UFS_CMD_SEND);
Stanley Chuaa5c6972020-06-15 15:22:35 +08002181
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302182 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302183 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302184 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302185}
2186
2187/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302188 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2189 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002190 * @uic_cmd: UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302191 *
2192 * Must be called with mutex held.
2193 * Returns 0 only if success.
2194 */
2195static int
2196ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2197{
2198 int ret;
2199 unsigned long flags;
2200
2201 if (wait_for_completion_timeout(&uic_cmd->done,
Can Guo0f52fcb92020-11-02 22:24:40 -08002202 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302203 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
Can Guo0f52fcb92020-11-02 22:24:40 -08002204 } else {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302205 ret = -ETIMEDOUT;
Can Guo0f52fcb92020-11-02 22:24:40 -08002206 dev_err(hba->dev,
2207 "uic cmd 0x%x with arg3 0x%x completion timeout\n",
2208 uic_cmd->command, uic_cmd->argument3);
2209
2210 if (!uic_cmd->cmd_active) {
2211 dev_err(hba->dev, "%s: UIC cmd has been completed, return the result\n",
2212 __func__);
2213 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2214 }
2215 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302216
2217 spin_lock_irqsave(hba->host->host_lock, flags);
2218 hba->active_uic_cmd = NULL;
2219 spin_unlock_irqrestore(hba->host->host_lock, flags);
2220
2221 return ret;
2222}
2223
2224/**
2225 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2226 * @hba: per adapter instance
2227 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002228 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302229 *
2230 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002231 * with mutex held and host_lock locked.
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302232 * Returns 0 only if success.
2233 */
2234static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002235__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2236 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302237{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302238 if (!ufshcd_ready_for_uic_cmd(hba)) {
2239 dev_err(hba->dev,
2240 "Controller not ready to accept UIC commands\n");
2241 return -EIO;
2242 }
2243
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002244 if (completion)
2245 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302246
Can Guo0f52fcb92020-11-02 22:24:40 -08002247 uic_cmd->cmd_active = 1;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302248 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302249
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002250 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302251}
2252
2253/**
2254 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2255 * @hba: per adapter instance
2256 * @uic_cmd: UIC command
2257 *
2258 * Returns 0 only if success.
2259 */
Avri Altmane77044c52018-10-07 17:30:39 +03002260int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302261{
2262 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002263 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302264
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002265 ufshcd_hold(hba, false);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302266 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03002267 ufshcd_add_delay_before_dme_cmd(hba);
2268
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002269 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002270 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002271 spin_unlock_irqrestore(hba->host->host_lock, flags);
2272 if (!ret)
2273 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2274
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302275 mutex_unlock(&hba->uic_cmd_mutex);
2276
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002277 ufshcd_release(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302278 return ret;
2279}
2280
2281/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302282 * ufshcd_map_sg - Map scatter-gather list to prdt
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002283 * @hba: per adapter instance
2284 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302285 *
2286 * Returns 0 in case of success, non-zero value in case of failure
2287 */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002288static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302289{
2290 struct ufshcd_sg_entry *prd_table;
2291 struct scatterlist *sg;
2292 struct scsi_cmnd *cmd;
2293 int sg_segments;
2294 int i;
2295
2296 cmd = lrbp->cmd;
2297 sg_segments = scsi_dma_map(cmd);
2298 if (sg_segments < 0)
2299 return sg_segments;
2300
2301 if (sg_segments) {
Alim Akhtar26f968d2020-05-28 06:46:52 +05302302
2303 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2304 lrbp->utr_descriptor_ptr->prd_table_length =
2305 cpu_to_le16((sg_segments *
2306 sizeof(struct ufshcd_sg_entry)));
2307 else
2308 lrbp->utr_descriptor_ptr->prd_table_length =
2309 cpu_to_le16((u16) (sg_segments));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302310
2311 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2312
2313 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2314 prd_table[i].size =
2315 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2316 prd_table[i].base_addr =
2317 cpu_to_le32(lower_32_bits(sg->dma_address));
2318 prd_table[i].upper_addr =
2319 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002320 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302321 }
2322 } else {
2323 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2324 }
2325
2326 return 0;
2327}
2328
2329/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302330 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302331 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302332 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302333 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302334static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302335{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302336 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2337
2338 if (hba->ufs_version == UFSHCI_VERSION_10) {
2339 u32 rw;
2340 rw = set & INTERRUPT_MASK_RW_VER_10;
2341 set = rw | ((set ^ intrs) & intrs);
2342 } else {
2343 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302344 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302345
2346 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2347}
2348
2349/**
2350 * ufshcd_disable_intr - disable interrupts
2351 * @hba: per adapter instance
2352 * @intrs: interrupt bits
2353 */
2354static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2355{
2356 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2357
2358 if (hba->ufs_version == UFSHCI_VERSION_10) {
2359 u32 rw;
2360 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2361 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2362 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2363
2364 } else {
2365 set &= ~intrs;
2366 }
2367
2368 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302369}
2370
2371/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302372 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2373 * descriptor according to request
2374 * @lrbp: pointer to local reference block
2375 * @upiu_flags: flags required in the header
2376 * @cmd_dir: requests data direction
2377 */
2378static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
Bean Huoa23064c2020-07-06 14:39:36 +02002379 u8 *upiu_flags, enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302380{
2381 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2382 u32 data_direction;
2383 u32 dword_0;
Satya Tangiraladf043c742020-07-06 20:04:14 +00002384 u32 dword_1 = 0;
2385 u32 dword_3 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302386
2387 if (cmd_dir == DMA_FROM_DEVICE) {
2388 data_direction = UTP_DEVICE_TO_HOST;
2389 *upiu_flags = UPIU_CMD_FLAGS_READ;
2390 } else if (cmd_dir == DMA_TO_DEVICE) {
2391 data_direction = UTP_HOST_TO_DEVICE;
2392 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2393 } else {
2394 data_direction = UTP_NO_DATA_TRANSFER;
2395 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2396 }
2397
2398 dword_0 = data_direction | (lrbp->command_type
2399 << UPIU_COMMAND_TYPE_OFFSET);
2400 if (lrbp->intr_cmd)
2401 dword_0 |= UTP_REQ_DESC_INT_CMD;
2402
Satya Tangiraladf043c742020-07-06 20:04:14 +00002403 /* Prepare crypto related dwords */
2404 ufshcd_prepare_req_desc_hdr_crypto(lrbp, &dword_0, &dword_1, &dword_3);
2405
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302406 /* Transfer request descriptor header fields */
2407 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Satya Tangiraladf043c742020-07-06 20:04:14 +00002408 req_desc->header.dword_1 = cpu_to_le32(dword_1);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302409 /*
2410 * assigning invalid value for command status. Controller
2411 * updates OCS on command completion, with the command
2412 * status
2413 */
2414 req_desc->header.dword_2 =
2415 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Satya Tangiraladf043c742020-07-06 20:04:14 +00002416 req_desc->header.dword_3 = cpu_to_le32(dword_3);
Yaniv Gardi51047262016-02-01 15:02:38 +02002417
2418 req_desc->prd_table_length = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302419}
2420
2421/**
2422 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2423 * for scsi commands
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002424 * @lrbp: local reference block pointer
2425 * @upiu_flags: flags
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302426 */
2427static
Bean Huoa23064c2020-07-06 14:39:36 +02002428void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u8 upiu_flags)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302429{
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002430 struct scsi_cmnd *cmd = lrbp->cmd;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302431 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002432 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302433
2434 /* command descriptor fields */
2435 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2436 UPIU_TRANSACTION_COMMAND, upiu_flags,
2437 lrbp->lun, lrbp->task_tag);
2438 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2439 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2440
2441 /* Total EHS length and Data segment length will be zero */
2442 ucd_req_ptr->header.dword_2 = 0;
2443
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002444 ucd_req_ptr->sc.exp_data_transfer_len = cpu_to_be32(cmd->sdb.length);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302445
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002446 cdb_len = min_t(unsigned short, cmd->cmd_len, UFS_CDB_SIZE);
Avri Altmana851b2b2018-10-07 17:30:34 +03002447 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002448 memcpy(ucd_req_ptr->sc.cdb, cmd->cmnd, cdb_len);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002449
2450 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302451}
2452
Dolev Raviv68078d52013-07-30 00:35:58 +05302453/**
2454 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2455 * for query requsts
2456 * @hba: UFS hba
2457 * @lrbp: local reference block pointer
2458 * @upiu_flags: flags
2459 */
2460static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
Bean Huoa23064c2020-07-06 14:39:36 +02002461 struct ufshcd_lrb *lrbp, u8 upiu_flags)
Dolev Raviv68078d52013-07-30 00:35:58 +05302462{
2463 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2464 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302465 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302466
2467 /* Query request header */
2468 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2469 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2470 lrbp->lun, lrbp->task_tag);
2471 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2472 0, query->request.query_func, 0, 0);
2473
Zang Leigang68612852016-08-25 17:39:19 +08002474 /* Data segment length only need for WRITE_DESC */
2475 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2476 ucd_req_ptr->header.dword_2 =
2477 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2478 else
2479 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302480
2481 /* Copy the Query Request buffer as is */
2482 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2483 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302484
2485 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002486 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
Avri Altman220d17a62018-10-07 17:30:36 +03002487 memcpy(ucd_req_ptr + 1, query->descriptor, len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002488
Yaniv Gardi51047262016-02-01 15:02:38 +02002489 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302490}
2491
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302492static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2493{
2494 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2495
2496 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2497
2498 /* command descriptor fields */
2499 ucd_req_ptr->header.dword_0 =
2500 UPIU_HEADER_DWORD(
2501 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002502 /* clear rest of the fields of basic header */
2503 ucd_req_ptr->header.dword_1 = 0;
2504 ucd_req_ptr->header.dword_2 = 0;
2505
2506 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302507}
2508
2509/**
Bean Huof273c542020-08-14 11:50:33 +02002510 * ufshcd_compose_devman_upiu - UFS Protocol Information Unit(UPIU)
Joao Pinto300bb132016-05-11 12:21:27 +01002511 * for Device Management Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002512 * @hba: per adapter instance
2513 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302514 */
Bean Huof273c542020-08-14 11:50:33 +02002515static int ufshcd_compose_devman_upiu(struct ufs_hba *hba,
2516 struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302517{
Bean Huoa23064c2020-07-06 14:39:36 +02002518 u8 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302519 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302520
kehuanlin83dc7e32017-09-06 17:58:39 +08002521 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2522 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002523 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
kehuanlin83dc7e32017-09-06 17:58:39 +08002524 else
2525 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002526
2527 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2528 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2529 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2530 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2531 ufshcd_prepare_utp_nop_upiu(lrbp);
2532 else
2533 ret = -EINVAL;
2534
2535 return ret;
2536}
2537
2538/**
2539 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2540 * for SCSI Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002541 * @hba: per adapter instance
2542 * @lrbp: pointer to local reference block
Joao Pinto300bb132016-05-11 12:21:27 +01002543 */
2544static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2545{
Bean Huoa23064c2020-07-06 14:39:36 +02002546 u8 upiu_flags;
Joao Pinto300bb132016-05-11 12:21:27 +01002547 int ret = 0;
2548
kehuanlin83dc7e32017-09-06 17:58:39 +08002549 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2550 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002551 lrbp->command_type = UTP_CMD_TYPE_SCSI;
kehuanlin83dc7e32017-09-06 17:58:39 +08002552 else
2553 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002554
2555 if (likely(lrbp->cmd)) {
2556 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2557 lrbp->cmd->sc_data_direction);
2558 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2559 } else {
2560 ret = -EINVAL;
2561 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302562
2563 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302564}
2565
2566/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002567 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002568 * @upiu_wlun_id: UPIU W-LUN id
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002569 *
2570 * Returns SCSI W-LUN id
2571 */
2572static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2573{
2574 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2575}
2576
Bart Van Assche4d2b8d42020-01-22 19:56:35 -08002577static void ufshcd_init_lrb(struct ufs_hba *hba, struct ufshcd_lrb *lrb, int i)
2578{
2579 struct utp_transfer_cmd_desc *cmd_descp = hba->ucdl_base_addr;
2580 struct utp_transfer_req_desc *utrdlp = hba->utrdl_base_addr;
2581 dma_addr_t cmd_desc_element_addr = hba->ucdl_dma_addr +
2582 i * sizeof(struct utp_transfer_cmd_desc);
2583 u16 response_offset = offsetof(struct utp_transfer_cmd_desc,
2584 response_upiu);
2585 u16 prdt_offset = offsetof(struct utp_transfer_cmd_desc, prd_table);
2586
2587 lrb->utr_descriptor_ptr = utrdlp + i;
2588 lrb->utrd_dma_addr = hba->utrdl_dma_addr +
2589 i * sizeof(struct utp_transfer_req_desc);
2590 lrb->ucd_req_ptr = (struct utp_upiu_req *)(cmd_descp + i);
2591 lrb->ucd_req_dma_addr = cmd_desc_element_addr;
2592 lrb->ucd_rsp_ptr = (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
2593 lrb->ucd_rsp_dma_addr = cmd_desc_element_addr + response_offset;
2594 lrb->ucd_prdt_ptr = (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
2595 lrb->ucd_prdt_dma_addr = cmd_desc_element_addr + prdt_offset;
2596}
2597
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002598/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302599 * ufshcd_queuecommand - main entry point for SCSI requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002600 * @host: SCSI host pointer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302601 * @cmd: command from SCSI Midlayer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302602 *
2603 * Returns 0 for success, non-zero in case of failure
2604 */
2605static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2606{
2607 struct ufshcd_lrb *lrbp;
2608 struct ufs_hba *hba;
2609 unsigned long flags;
2610 int tag;
2611 int err = 0;
2612
2613 hba = shost_priv(host);
2614
2615 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02002616 if (!ufshcd_valid_tag(hba, tag)) {
2617 dev_err(hba->dev,
2618 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2619 __func__, tag, cmd, cmd->request);
2620 BUG();
2621 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302622
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002623 if (!down_read_trylock(&hba->clk_scaling_lock))
2624 return SCSI_MLQUEUE_HOST_BUSY;
2625
Gilad Broner7fabb772017-02-03 16:56:50 -08002626 hba->req_abort_count = 0;
2627
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002628 err = ufshcd_hold(hba, true);
2629 if (err) {
2630 err = SCSI_MLQUEUE_HOST_BUSY;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002631 goto out;
2632 }
Can Guo2dec9472020-08-09 05:15:47 -07002633 WARN_ON(ufshcd_is_clkgating_allowed(hba) &&
2634 (hba->clk_gating.state != CLKS_ON));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002635
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302636 lrbp = &hba->lrb[tag];
Can Guo7a7e66c2020-12-02 04:04:02 -08002637 if (unlikely(lrbp->in_use)) {
2638 if (hba->pm_op_in_progress)
2639 set_host_byte(cmd, DID_BAD_TARGET);
2640 else
2641 err = SCSI_MLQUEUE_HOST_BUSY;
2642 ufshcd_release(hba);
2643 goto out;
2644 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302645
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302646 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302647 lrbp->cmd = cmd;
Avri Altman09a5a242018-11-22 20:04:56 +02002648 lrbp->sense_bufflen = UFS_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302649 lrbp->sense_buffer = cmd->sense_buffer;
2650 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002651 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002652 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Satya Tangiraladf043c742020-07-06 20:04:14 +00002653
2654 ufshcd_prepare_lrbp_crypto(cmd->request, lrbp);
2655
Gilad Bronere0b299e2017-02-03 16:56:40 -08002656 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302657
Joao Pinto300bb132016-05-11 12:21:27 +01002658 ufshcd_comp_scsi_upiu(hba, lrbp);
2659
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002660 err = ufshcd_map_sg(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302661 if (err) {
2662 lrbp->cmd = NULL;
Can Guo17c7d352019-12-05 02:14:33 +00002663 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302664 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302665 }
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002666 /* Make sure descriptors are ready before ringing the doorbell */
2667 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302668
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302669 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo5586dd82020-08-09 05:15:54 -07002670 switch (hba->ufshcd_state) {
2671 case UFSHCD_STATE_OPERATIONAL:
2672 case UFSHCD_STATE_EH_SCHEDULED_NON_FATAL:
2673 break;
2674 case UFSHCD_STATE_EH_SCHEDULED_FATAL:
2675 /*
2676 * pm_runtime_get_sync() is used at error handling preparation
2677 * stage. If a scsi cmd, e.g. the SSU cmd, is sent from hba's
2678 * PM ops, it can never be finished if we let SCSI layer keep
2679 * retrying it, which gets err handler stuck forever. Neither
2680 * can we let the scsi cmd pass through, because UFS is in bad
2681 * state, the scsi cmd may eventually time out, which will get
2682 * err handler blocked for too long. So, just fail the scsi cmd
2683 * sent from PM ops, err handler can recover PM error anyways.
2684 */
2685 if (hba->pm_op_in_progress) {
2686 hba->force_reset = true;
2687 set_host_byte(cmd, DID_BAD_TARGET);
2688 goto out_compl_cmd;
2689 }
2690 fallthrough;
2691 case UFSHCD_STATE_RESET:
2692 err = SCSI_MLQUEUE_HOST_BUSY;
2693 goto out_compl_cmd;
2694 case UFSHCD_STATE_ERROR:
2695 set_host_byte(cmd, DID_ERROR);
2696 goto out_compl_cmd;
2697 default:
2698 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2699 __func__, hba->ufshcd_state);
2700 set_host_byte(cmd, DID_BAD_TARGET);
2701 goto out_compl_cmd;
2702 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302703 ufshcd_send_command(hba, tag);
2704 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guo5586dd82020-08-09 05:15:54 -07002705 goto out;
2706
2707out_compl_cmd:
2708 scsi_dma_unmap(lrbp->cmd);
2709 lrbp->cmd = NULL;
2710 spin_unlock_irqrestore(hba->host->host_lock, flags);
2711 ufshcd_release(hba);
2712 if (!err)
2713 cmd->scsi_done(cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302714out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002715 up_read(&hba->clk_scaling_lock);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302716 return err;
2717}
2718
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302719static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2720 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2721{
2722 lrbp->cmd = NULL;
2723 lrbp->sense_bufflen = 0;
2724 lrbp->sense_buffer = NULL;
2725 lrbp->task_tag = tag;
2726 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302727 lrbp->intr_cmd = true; /* No interrupt aggregation */
Satya Tangiraladf043c742020-07-06 20:04:14 +00002728 ufshcd_prepare_lrbp_crypto(NULL, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302729 hba->dev_cmd.type = cmd_type;
2730
Bean Huof273c542020-08-14 11:50:33 +02002731 return ufshcd_compose_devman_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302732}
2733
2734static int
2735ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2736{
2737 int err = 0;
2738 unsigned long flags;
2739 u32 mask = 1 << tag;
2740
2741 /* clear outstanding transaction before retry */
2742 spin_lock_irqsave(hba->host->host_lock, flags);
2743 ufshcd_utrl_clear(hba, tag);
2744 spin_unlock_irqrestore(hba->host->host_lock, flags);
2745
2746 /*
2747 * wait for for h/w to clear corresponding bit in door-bell.
2748 * max. wait is 1 sec.
2749 */
2750 err = ufshcd_wait_for_register(hba,
2751 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Bart Van Assche5cac1092020-05-07 15:27:50 -07002752 mask, ~mask, 1000, 1000);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302753
2754 return err;
2755}
2756
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002757static int
2758ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2759{
2760 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2761
2762 /* Get the UPIU response */
2763 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2764 UPIU_RSP_CODE_OFFSET;
2765 return query_res->response;
2766}
2767
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302768/**
2769 * ufshcd_dev_cmd_completion() - handles device management command responses
2770 * @hba: per adapter instance
2771 * @lrbp: pointer to local reference block
2772 */
2773static int
2774ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2775{
2776 int resp;
2777 int err = 0;
2778
Dolev Ravivff8e20c2016-12-22 18:42:18 -08002779 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302780 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2781
2782 switch (resp) {
2783 case UPIU_TRANSACTION_NOP_IN:
2784 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2785 err = -EINVAL;
2786 dev_err(hba->dev, "%s: unexpected response %x\n",
2787 __func__, resp);
2788 }
2789 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302790 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002791 err = ufshcd_check_query_response(hba, lrbp);
2792 if (!err)
2793 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302794 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302795 case UPIU_TRANSACTION_REJECT_UPIU:
2796 /* TODO: handle Reject UPIU Response */
2797 err = -EPERM;
2798 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2799 __func__);
2800 break;
2801 default:
2802 err = -EINVAL;
2803 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2804 __func__, resp);
2805 break;
2806 }
2807
2808 return err;
2809}
2810
2811static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2812 struct ufshcd_lrb *lrbp, int max_timeout)
2813{
2814 int err = 0;
2815 unsigned long time_left;
2816 unsigned long flags;
2817
2818 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2819 msecs_to_jiffies(max_timeout));
2820
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002821 /* Make sure descriptors are ready before ringing the doorbell */
2822 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302823 spin_lock_irqsave(hba->host->host_lock, flags);
2824 hba->dev_cmd.complete = NULL;
2825 if (likely(time_left)) {
2826 err = ufshcd_get_tr_ocs(lrbp);
2827 if (!err)
2828 err = ufshcd_dev_cmd_completion(hba, lrbp);
2829 }
2830 spin_unlock_irqrestore(hba->host->host_lock, flags);
2831
2832 if (!time_left) {
2833 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002834 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2835 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302836 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002837 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302838 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002839 /*
2840 * in case of an error, after clearing the doorbell,
2841 * we also need to clear the outstanding_request
2842 * field in hba
2843 */
2844 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302845 }
2846
2847 return err;
2848}
2849
2850/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302851 * ufshcd_exec_dev_cmd - API for sending device management requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002852 * @hba: UFS hba
2853 * @cmd_type: specifies the type (NOP, Query...)
2854 * @timeout: time in seconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302855 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302856 * NOTE: Since there is only one available tag for device management commands,
2857 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302858 */
2859static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2860 enum dev_cmd_type cmd_type, int timeout)
2861{
Bart Van Assche7252a362019-12-09 10:13:08 -08002862 struct request_queue *q = hba->cmd_queue;
2863 struct request *req;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302864 struct ufshcd_lrb *lrbp;
2865 int err;
2866 int tag;
2867 struct completion wait;
2868 unsigned long flags;
2869
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002870 down_read(&hba->clk_scaling_lock);
2871
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302872 /*
2873 * Get free slot, sleep if slots are unavailable.
2874 * Even though we use wait_event() which sleeps indefinitely,
2875 * the maximum wait time is bounded by SCSI request timeout.
2876 */
Bart Van Assche7252a362019-12-09 10:13:08 -08002877 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03002878 if (IS_ERR(req)) {
2879 err = PTR_ERR(req);
2880 goto out_unlock;
2881 }
Bart Van Assche7252a362019-12-09 10:13:08 -08002882 tag = req->tag;
2883 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302884
2885 init_completion(&wait);
2886 lrbp = &hba->lrb[tag];
Can Guo7a7e66c2020-12-02 04:04:02 -08002887 if (unlikely(lrbp->in_use)) {
2888 err = -EBUSY;
2889 goto out;
2890 }
2891
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302892 WARN_ON(lrbp->cmd);
2893 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2894 if (unlikely(err))
2895 goto out_put_tag;
2896
2897 hba->dev_cmd.complete = &wait;
2898
Avri Altmanfb475b72021-01-10 10:46:18 +02002899 ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr);
Yaniv Gardie3dfdc52016-02-01 15:02:49 +02002900 /* Make sure descriptors are ready before ringing the doorbell */
2901 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302902 spin_lock_irqsave(hba->host->host_lock, flags);
2903 ufshcd_send_command(hba, tag);
2904 spin_unlock_irqrestore(hba->host->host_lock, flags);
2905
2906 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2907
Can Guo7a7e66c2020-12-02 04:04:02 -08002908out:
Avri Altmanfb475b72021-01-10 10:46:18 +02002909 ufshcd_add_query_upiu_trace(hba, err ? UFS_QUERY_ERR : UFS_QUERY_COMP,
2910 (struct utp_upiu_req *)lrbp->ucd_rsp_ptr);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002911
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302912out_put_tag:
Bart Van Assche7252a362019-12-09 10:13:08 -08002913 blk_put_request(req);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03002914out_unlock:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002915 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302916 return err;
2917}
2918
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302919/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002920 * ufshcd_init_query() - init the query response and request parameters
2921 * @hba: per-adapter instance
2922 * @request: address of the request pointer to be initialized
2923 * @response: address of the response pointer to be initialized
2924 * @opcode: operation to perform
2925 * @idn: flag idn to access
2926 * @index: LU number to access
2927 * @selector: query/flag/descriptor further identification
2928 */
2929static inline void ufshcd_init_query(struct ufs_hba *hba,
2930 struct ufs_query_req **request, struct ufs_query_res **response,
2931 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2932{
2933 *request = &hba->dev_cmd.query.request;
2934 *response = &hba->dev_cmd.query.response;
2935 memset(*request, 0, sizeof(struct ufs_query_req));
2936 memset(*response, 0, sizeof(struct ufs_query_res));
2937 (*request)->upiu_req.opcode = opcode;
2938 (*request)->upiu_req.idn = idn;
2939 (*request)->upiu_req.index = index;
2940 (*request)->upiu_req.selector = selector;
2941}
2942
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002943static int ufshcd_query_flag_retry(struct ufs_hba *hba,
Stanley Chu1f34eed2020-05-08 16:01:12 +08002944 enum query_opcode opcode, enum flag_idn idn, u8 index, bool *flag_res)
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002945{
2946 int ret;
2947 int retries;
2948
2949 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
Stanley Chu1f34eed2020-05-08 16:01:12 +08002950 ret = ufshcd_query_flag(hba, opcode, idn, index, flag_res);
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002951 if (ret)
2952 dev_dbg(hba->dev,
2953 "%s: failed with error %d, retries %d\n",
2954 __func__, ret, retries);
2955 else
2956 break;
2957 }
2958
2959 if (ret)
2960 dev_err(hba->dev,
2961 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2962 __func__, opcode, idn, ret, retries);
2963 return ret;
2964}
2965
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002966/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302967 * ufshcd_query_flag() - API function for sending flag query requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002968 * @hba: per-adapter instance
2969 * @opcode: flag query to perform
2970 * @idn: flag idn to access
Stanley Chu1f34eed2020-05-08 16:01:12 +08002971 * @index: flag index to access
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002972 * @flag_res: the flag value after the query request completes
Dolev Raviv68078d52013-07-30 00:35:58 +05302973 *
2974 * Returns 0 for success, non-zero in case of failure
2975 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002976int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Stanley Chu1f34eed2020-05-08 16:01:12 +08002977 enum flag_idn idn, u8 index, bool *flag_res)
Dolev Raviv68078d52013-07-30 00:35:58 +05302978{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002979 struct ufs_query_req *request = NULL;
2980 struct ufs_query_res *response = NULL;
Stanley Chu1f34eed2020-05-08 16:01:12 +08002981 int err, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002982 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05302983
2984 BUG_ON(!hba);
2985
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002986 ufshcd_hold(hba, false);
Dolev Raviv68078d52013-07-30 00:35:58 +05302987 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002988 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2989 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05302990
2991 switch (opcode) {
2992 case UPIU_QUERY_OPCODE_SET_FLAG:
2993 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2994 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2995 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2996 break;
2997 case UPIU_QUERY_OPCODE_READ_FLAG:
2998 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2999 if (!flag_res) {
3000 /* No dummy reads */
3001 dev_err(hba->dev, "%s: Invalid argument for read request\n",
3002 __func__);
3003 err = -EINVAL;
3004 goto out_unlock;
3005 }
3006 break;
3007 default:
3008 dev_err(hba->dev,
3009 "%s: Expected query flag opcode but got = %d\n",
3010 __func__, opcode);
3011 err = -EINVAL;
3012 goto out_unlock;
3013 }
Dolev Raviv68078d52013-07-30 00:35:58 +05303014
Yaniv Gardie5ad4062016-02-01 15:02:41 +02003015 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05303016
3017 if (err) {
3018 dev_err(hba->dev,
3019 "%s: Sending flag query for idn %d failed, err = %d\n",
3020 __func__, idn, err);
3021 goto out_unlock;
3022 }
3023
3024 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303025 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05303026 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
3027
3028out_unlock:
3029 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003030 ufshcd_release(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05303031 return err;
3032}
3033
3034/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303035 * ufshcd_query_attr - API function for sending attribute requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08003036 * @hba: per-adapter instance
3037 * @opcode: attribute opcode
3038 * @idn: attribute idn to access
3039 * @index: index field
3040 * @selector: selector field
3041 * @attr_val: the attribute value after the query request completes
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303042 *
3043 * Returns 0 for success, non-zero in case of failure
3044*/
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02003045int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
3046 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303047{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003048 struct ufs_query_req *request = NULL;
3049 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303050 int err;
3051
3052 BUG_ON(!hba);
3053
3054 if (!attr_val) {
3055 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
3056 __func__, opcode);
jintae jang8ca1a402020-12-03 14:25:32 +09003057 return -EINVAL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303058 }
3059
jintae jang8ca1a402020-12-03 14:25:32 +09003060 ufshcd_hold(hba, false);
3061
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303062 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003063 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3064 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303065
3066 switch (opcode) {
3067 case UPIU_QUERY_OPCODE_WRITE_ATTR:
3068 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303069 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303070 break;
3071 case UPIU_QUERY_OPCODE_READ_ATTR:
3072 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3073 break;
3074 default:
3075 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
3076 __func__, opcode);
3077 err = -EINVAL;
3078 goto out_unlock;
3079 }
3080
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003081 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303082
3083 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08003084 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3085 __func__, opcode, idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303086 goto out_unlock;
3087 }
3088
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303089 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303090
3091out_unlock:
3092 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003093 ufshcd_release(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303094 return err;
3095}
3096
3097/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02003098 * ufshcd_query_attr_retry() - API function for sending query
3099 * attribute with retries
3100 * @hba: per-adapter instance
3101 * @opcode: attribute opcode
3102 * @idn: attribute idn to access
3103 * @index: index field
3104 * @selector: selector field
3105 * @attr_val: the attribute value after the query request
3106 * completes
3107 *
3108 * Returns 0 for success, non-zero in case of failure
3109*/
3110static int ufshcd_query_attr_retry(struct ufs_hba *hba,
3111 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
3112 u32 *attr_val)
3113{
3114 int ret = 0;
3115 u32 retries;
3116
Bart Van Assche68c9fcf2019-12-24 14:02:43 -08003117 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02003118 ret = ufshcd_query_attr(hba, opcode, idn, index,
3119 selector, attr_val);
3120 if (ret)
3121 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
3122 __func__, ret, retries);
3123 else
3124 break;
3125 }
3126
3127 if (ret)
3128 dev_err(hba->dev,
3129 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
3130 __func__, idn, ret, QUERY_REQ_RETRIES);
3131 return ret;
3132}
3133
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003134static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003135 enum query_opcode opcode, enum desc_idn idn, u8 index,
3136 u8 selector, u8 *desc_buf, int *buf_len)
3137{
3138 struct ufs_query_req *request = NULL;
3139 struct ufs_query_res *response = NULL;
3140 int err;
3141
3142 BUG_ON(!hba);
3143
3144 if (!desc_buf) {
3145 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
3146 __func__, opcode);
jintae jang8ca1a402020-12-03 14:25:32 +09003147 return -EINVAL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003148 }
3149
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003150 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003151 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
3152 __func__, *buf_len);
jintae jang8ca1a402020-12-03 14:25:32 +09003153 return -EINVAL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003154 }
3155
jintae jang8ca1a402020-12-03 14:25:32 +09003156 ufshcd_hold(hba, false);
3157
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003158 mutex_lock(&hba->dev_cmd.lock);
3159 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3160 selector);
3161 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03003162 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003163
3164 switch (opcode) {
3165 case UPIU_QUERY_OPCODE_WRITE_DESC:
3166 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3167 break;
3168 case UPIU_QUERY_OPCODE_READ_DESC:
3169 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3170 break;
3171 default:
3172 dev_err(hba->dev,
3173 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
3174 __func__, opcode);
3175 err = -EINVAL;
3176 goto out_unlock;
3177 }
3178
3179 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3180
3181 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08003182 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3183 __func__, opcode, idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003184 goto out_unlock;
3185 }
3186
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03003187 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003188
3189out_unlock:
Bean Huocfcbae32019-11-12 23:34:36 +01003190 hba->dev_cmd.query.descriptor = NULL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003191 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003192 ufshcd_release(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003193 return err;
3194}
3195
3196/**
Bart Van Assche8aa29f12018-03-01 15:07:20 -08003197 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
3198 * @hba: per-adapter instance
3199 * @opcode: attribute opcode
3200 * @idn: attribute idn to access
3201 * @index: index field
3202 * @selector: selector field
3203 * @desc_buf: the buffer that contains the descriptor
3204 * @buf_len: length parameter passed to the device
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003205 *
3206 * Returns 0 for success, non-zero in case of failure.
3207 * The buf_len parameter will contain, on return, the length parameter
3208 * received on the response.
3209 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02003210int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3211 enum query_opcode opcode,
3212 enum desc_idn idn, u8 index,
3213 u8 selector,
3214 u8 *desc_buf, int *buf_len)
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003215{
3216 int err;
3217 int retries;
3218
3219 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3220 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3221 selector, desc_buf, buf_len);
3222 if (!err || err == -EINVAL)
3223 break;
3224 }
3225
3226 return err;
3227}
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003228
3229/**
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003230 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3231 * @hba: Pointer to adapter instance
3232 * @desc_id: descriptor idn value
3233 * @desc_len: mapped desc length (out)
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003234 */
Bean Huo7a0bf852020-06-03 11:19:58 +02003235void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
3236 int *desc_len)
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003237{
Bean Huo7a0bf852020-06-03 11:19:58 +02003238 if (desc_id >= QUERY_DESC_IDN_MAX || desc_id == QUERY_DESC_IDN_RFU_0 ||
3239 desc_id == QUERY_DESC_IDN_RFU_1)
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003240 *desc_len = 0;
Bean Huo7a0bf852020-06-03 11:19:58 +02003241 else
3242 *desc_len = hba->desc_size[desc_id];
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003243}
3244EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3245
Bean Huo7a0bf852020-06-03 11:19:58 +02003246static void ufshcd_update_desc_length(struct ufs_hba *hba,
Bean Huo72fb6902020-06-03 11:19:59 +02003247 enum desc_idn desc_id, int desc_index,
Bean Huo7a0bf852020-06-03 11:19:58 +02003248 unsigned char desc_len)
3249{
3250 if (hba->desc_size[desc_id] == QUERY_DESC_MAX_SIZE &&
Bean Huo72fb6902020-06-03 11:19:59 +02003251 desc_id != QUERY_DESC_IDN_STRING && desc_index != UFS_RPMB_UNIT)
3252 /* For UFS 3.1, the normal unit descriptor is 10 bytes larger
3253 * than the RPMB unit, however, both descriptors share the same
3254 * desc_idn, to cover both unit descriptors with one length, we
3255 * choose the normal unit descriptor length by desc_index.
3256 */
Bean Huo7a0bf852020-06-03 11:19:58 +02003257 hba->desc_size[desc_id] = desc_len;
3258}
3259
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003260/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003261 * ufshcd_read_desc_param - read the specified descriptor parameter
3262 * @hba: Pointer to adapter instance
3263 * @desc_id: descriptor idn value
3264 * @desc_index: descriptor index
3265 * @param_offset: offset of the parameter to read
3266 * @param_read_buf: pointer to buffer where parameter would be read
3267 * @param_size: sizeof(param_read_buf)
3268 *
3269 * Return 0 in case of success, non-zero otherwise
3270 */
Stanislav Nijnikov45bced82018-02-15 14:14:02 +02003271int ufshcd_read_desc_param(struct ufs_hba *hba,
3272 enum desc_idn desc_id,
3273 int desc_index,
3274 u8 param_offset,
3275 u8 *param_read_buf,
3276 u8 param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003277{
3278 int ret;
3279 u8 *desc_buf;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003280 int buff_len;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003281 bool is_kmalloc = true;
3282
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003283 /* Safety check */
3284 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003285 return -EINVAL;
3286
Bean Huo7a0bf852020-06-03 11:19:58 +02003287 /* Get the length of descriptor */
3288 ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
3289 if (!buff_len) {
Can Guo1699f982020-10-21 22:59:00 -07003290 dev_err(hba->dev, "%s: Failed to get desc length\n", __func__);
3291 return -EINVAL;
3292 }
3293
3294 if (param_offset >= buff_len) {
3295 dev_err(hba->dev, "%s: Invalid offset 0x%x in descriptor IDN 0x%x, length 0x%x\n",
3296 __func__, param_offset, desc_id, buff_len);
Bean Huo7a0bf852020-06-03 11:19:58 +02003297 return -EINVAL;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003298 }
3299
3300 /* Check whether we need temp memory */
3301 if (param_offset != 0 || param_size < buff_len) {
Can Guo1699f982020-10-21 22:59:00 -07003302 desc_buf = kzalloc(buff_len, GFP_KERNEL);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003303 if (!desc_buf)
3304 return -ENOMEM;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003305 } else {
3306 desc_buf = param_read_buf;
3307 is_kmalloc = false;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003308 }
3309
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003310 /* Request for full descriptor */
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003311 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003312 desc_id, desc_index, 0,
3313 desc_buf, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003314
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003315 if (ret) {
Can Guo1699f982020-10-21 22:59:00 -07003316 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d\n",
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003317 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003318 goto out;
3319 }
3320
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003321 /* Sanity check */
3322 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
Can Guo1699f982020-10-21 22:59:00 -07003323 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header\n",
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003324 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3325 ret = -EINVAL;
3326 goto out;
3327 }
3328
Bean Huo7a0bf852020-06-03 11:19:58 +02003329 /* Update descriptor length */
3330 buff_len = desc_buf[QUERY_DESC_LENGTH_OFFSET];
Bean Huo72fb6902020-06-03 11:19:59 +02003331 ufshcd_update_desc_length(hba, desc_id, desc_index, buff_len);
Bean Huo7a0bf852020-06-03 11:19:58 +02003332
Can Guo1699f982020-10-21 22:59:00 -07003333 if (is_kmalloc) {
3334 /* Make sure we don't copy more data than available */
3335 if (param_offset + param_size > buff_len)
3336 param_size = buff_len - param_offset;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003337 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
Can Guo1699f982020-10-21 22:59:00 -07003338 }
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003339out:
3340 if (is_kmalloc)
3341 kfree(desc_buf);
3342 return ret;
3343}
3344
Yaniv Gardib573d482016-03-10 17:37:09 +02003345/**
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003346 * struct uc_string_id - unicode string
3347 *
3348 * @len: size of this descriptor inclusive
3349 * @type: descriptor type
3350 * @uc: unicode string character
3351 */
3352struct uc_string_id {
3353 u8 len;
3354 u8 type;
Gustavo A. R. Silvaec38c0a2020-05-07 14:25:50 -05003355 wchar_t uc[];
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003356} __packed;
3357
3358/* replace non-printable or non-ASCII characters with spaces */
3359static inline char ufshcd_remove_non_printable(u8 ch)
3360{
3361 return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3362}
3363
3364/**
Yaniv Gardib573d482016-03-10 17:37:09 +02003365 * ufshcd_read_string_desc - read string descriptor
3366 * @hba: pointer to adapter instance
3367 * @desc_index: descriptor index
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003368 * @buf: pointer to buffer where descriptor would be read,
3369 * the caller should free the memory.
Yaniv Gardib573d482016-03-10 17:37:09 +02003370 * @ascii: if true convert from unicode to ascii characters
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003371 * null terminated string.
Yaniv Gardib573d482016-03-10 17:37:09 +02003372 *
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003373 * Return:
3374 * * string size on success.
3375 * * -ENOMEM: on allocation failure
3376 * * -EINVAL: on a wrong parameter
Yaniv Gardib573d482016-03-10 17:37:09 +02003377 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003378int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3379 u8 **buf, bool ascii)
Yaniv Gardib573d482016-03-10 17:37:09 +02003380{
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003381 struct uc_string_id *uc_str;
3382 u8 *str;
3383 int ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003384
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003385 if (!buf)
3386 return -EINVAL;
Yaniv Gardib573d482016-03-10 17:37:09 +02003387
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003388 uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3389 if (!uc_str)
3390 return -ENOMEM;
3391
Bean Huoc4607a02020-06-03 11:19:56 +02003392 ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_STRING, desc_index, 0,
3393 (u8 *)uc_str, QUERY_DESC_MAX_SIZE);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003394 if (ret < 0) {
3395 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3396 QUERY_REQ_RETRIES, ret);
3397 str = NULL;
3398 goto out;
3399 }
3400
3401 if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3402 dev_dbg(hba->dev, "String Desc is of zero length\n");
3403 str = NULL;
3404 ret = 0;
Yaniv Gardib573d482016-03-10 17:37:09 +02003405 goto out;
3406 }
3407
3408 if (ascii) {
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003409 ssize_t ascii_len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003410 int i;
Yaniv Gardib573d482016-03-10 17:37:09 +02003411 /* remove header and divide by 2 to move from UTF16 to UTF8 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003412 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3413 str = kzalloc(ascii_len, GFP_KERNEL);
3414 if (!str) {
3415 ret = -ENOMEM;
Tiezhu Yangfcbefc32016-06-25 12:35:22 +08003416 goto out;
Yaniv Gardib573d482016-03-10 17:37:09 +02003417 }
3418
3419 /*
3420 * the descriptor contains string in UTF16 format
3421 * we need to convert to utf-8 so it can be displayed
3422 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003423 ret = utf16s_to_utf8s(uc_str->uc,
3424 uc_str->len - QUERY_DESC_HDR_SIZE,
3425 UTF16_BIG_ENDIAN, str, ascii_len);
Yaniv Gardib573d482016-03-10 17:37:09 +02003426
3427 /* replace non-printable or non-ASCII characters with spaces */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003428 for (i = 0; i < ret; i++)
3429 str[i] = ufshcd_remove_non_printable(str[i]);
Yaniv Gardib573d482016-03-10 17:37:09 +02003430
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003431 str[ret++] = '\0';
3432
3433 } else {
YueHaibing5f577042019-08-31 12:44:24 +00003434 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003435 if (!str) {
3436 ret = -ENOMEM;
3437 goto out;
3438 }
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003439 ret = uc_str->len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003440 }
3441out:
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003442 *buf = str;
3443 kfree(uc_str);
3444 return ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003445}
Yaniv Gardib573d482016-03-10 17:37:09 +02003446
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003447/**
3448 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3449 * @hba: Pointer to adapter instance
3450 * @lun: lun id
3451 * @param_offset: offset of the parameter to read
3452 * @param_read_buf: pointer to buffer where parameter would be read
3453 * @param_size: sizeof(param_read_buf)
3454 *
3455 * Return 0 in case of success, non-zero otherwise
3456 */
3457static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3458 int lun,
3459 enum unit_desc_param param_offset,
3460 u8 *param_read_buf,
3461 u32 param_size)
3462{
3463 /*
3464 * Unit descriptors are only available for general purpose LUs (LUN id
3465 * from 0 to 7) and RPMB Well known LU.
3466 */
Jaegeuk Kima2fca522021-01-11 01:59:27 -08003467 if (!ufs_is_valid_unit_desc_lun(&hba->dev_info, lun, param_offset))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003468 return -EOPNOTSUPP;
3469
3470 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3471 param_offset, param_read_buf, param_size);
3472}
3473
Can Guo09f17792020-02-10 19:40:49 -08003474static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
3475{
3476 int err = 0;
3477 u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3478
3479 if (hba->dev_info.wspecversion >= 0x300) {
3480 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
3481 QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
3482 &gating_wait);
3483 if (err)
3484 dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",
3485 err, gating_wait);
3486
3487 if (gating_wait == 0) {
3488 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3489 dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",
3490 gating_wait);
3491 }
3492
3493 hba->dev_info.clk_gating_wait_us = gating_wait;
3494 }
3495
3496 return err;
3497}
3498
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003499/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303500 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3501 * @hba: per adapter instance
3502 *
3503 * 1. Allocate DMA memory for Command Descriptor array
3504 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3505 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3506 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3507 * (UTMRDL)
3508 * 4. Allocate memory for local reference block(lrb).
3509 *
3510 * Returns 0 for success, non-zero in case of failure
3511 */
3512static int ufshcd_memory_alloc(struct ufs_hba *hba)
3513{
3514 size_t utmrdl_size, utrdl_size, ucdl_size;
3515
3516 /* Allocate memory for UTP command descriptors */
3517 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003518 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3519 ucdl_size,
3520 &hba->ucdl_dma_addr,
3521 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303522
3523 /*
3524 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3525 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3526 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3527 * be aligned to 128 bytes as well
3528 */
3529 if (!hba->ucdl_base_addr ||
3530 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303531 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303532 "Command Descriptor Memory allocation failed\n");
3533 goto out;
3534 }
3535
3536 /*
3537 * Allocate memory for UTP Transfer descriptors
3538 * UFSHCI requires 1024 byte alignment of UTRD
3539 */
3540 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003541 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3542 utrdl_size,
3543 &hba->utrdl_dma_addr,
3544 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303545 if (!hba->utrdl_base_addr ||
3546 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303547 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303548 "Transfer Descriptor Memory allocation failed\n");
3549 goto out;
3550 }
3551
3552 /*
3553 * Allocate memory for UTP Task Management descriptors
3554 * UFSHCI requires 1024 byte alignment of UTMRD
3555 */
3556 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003557 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3558 utmrdl_size,
3559 &hba->utmrdl_dma_addr,
3560 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303561 if (!hba->utmrdl_base_addr ||
3562 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303563 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303564 "Task Management Descriptor Memory allocation failed\n");
3565 goto out;
3566 }
3567
3568 /* Allocate memory for local reference block */
Kees Cooka86854d2018-06-12 14:07:58 -07003569 hba->lrb = devm_kcalloc(hba->dev,
3570 hba->nutrs, sizeof(struct ufshcd_lrb),
Seungwon Jeon2953f852013-06-27 13:31:54 +09003571 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303572 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303573 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303574 goto out;
3575 }
3576 return 0;
3577out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303578 return -ENOMEM;
3579}
3580
3581/**
3582 * ufshcd_host_memory_configure - configure local reference block with
3583 * memory offsets
3584 * @hba: per adapter instance
3585 *
3586 * Configure Host memory space
3587 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3588 * address.
3589 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3590 * and PRDT offset.
3591 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3592 * into local reference block.
3593 */
3594static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3595{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303596 struct utp_transfer_req_desc *utrdlp;
3597 dma_addr_t cmd_desc_dma_addr;
3598 dma_addr_t cmd_desc_element_addr;
3599 u16 response_offset;
3600 u16 prdt_offset;
3601 int cmd_desc_size;
3602 int i;
3603
3604 utrdlp = hba->utrdl_base_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303605
3606 response_offset =
3607 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3608 prdt_offset =
3609 offsetof(struct utp_transfer_cmd_desc, prd_table);
3610
3611 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3612 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3613
3614 for (i = 0; i < hba->nutrs; i++) {
3615 /* Configure UTRD with command descriptor base address */
3616 cmd_desc_element_addr =
3617 (cmd_desc_dma_addr + (cmd_desc_size * i));
3618 utrdlp[i].command_desc_base_addr_lo =
3619 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3620 utrdlp[i].command_desc_base_addr_hi =
3621 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3622
3623 /* Response upiu and prdt offset should be in double words */
Alim Akhtar26f968d2020-05-28 06:46:52 +05303624 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3625 utrdlp[i].response_upiu_offset =
3626 cpu_to_le16(response_offset);
3627 utrdlp[i].prd_table_offset =
3628 cpu_to_le16(prdt_offset);
3629 utrdlp[i].response_upiu_length =
3630 cpu_to_le16(ALIGNED_UPIU_SIZE);
3631 } else {
3632 utrdlp[i].response_upiu_offset =
3633 cpu_to_le16(response_offset >> 2);
3634 utrdlp[i].prd_table_offset =
3635 cpu_to_le16(prdt_offset >> 2);
3636 utrdlp[i].response_upiu_length =
3637 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
3638 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303639
Bart Van Assche4d2b8d42020-01-22 19:56:35 -08003640 ufshcd_init_lrb(hba, &hba->lrb[i], i);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303641 }
3642}
3643
3644/**
3645 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3646 * @hba: per adapter instance
3647 *
3648 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3649 * in order to initialize the Unipro link startup procedure.
3650 * Once the Unipro links are up, the device connected to the controller
3651 * is detected.
3652 *
3653 * Returns 0 on success, non-zero value on failure
3654 */
3655static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3656{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303657 struct uic_command uic_cmd = {0};
3658 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303659
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303660 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3661
3662 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3663 if (ret)
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003664 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303665 "dme-link-startup: error code %d\n", ret);
3666 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303667}
Alim Akhtar39bf2d82020-05-28 06:46:51 +05303668/**
3669 * ufshcd_dme_reset - UIC command for DME_RESET
3670 * @hba: per adapter instance
3671 *
3672 * DME_RESET command is issued in order to reset UniPro stack.
3673 * This function now deals with cold reset.
3674 *
3675 * Returns 0 on success, non-zero value on failure
3676 */
3677static int ufshcd_dme_reset(struct ufs_hba *hba)
3678{
3679 struct uic_command uic_cmd = {0};
3680 int ret;
3681
3682 uic_cmd.command = UIC_CMD_DME_RESET;
3683
3684 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3685 if (ret)
3686 dev_err(hba->dev,
3687 "dme-reset: error code %d\n", ret);
3688
3689 return ret;
3690}
3691
Stanley Chufc85a742020-11-16 14:50:52 +08003692int ufshcd_dme_configure_adapt(struct ufs_hba *hba,
3693 int agreed_gear,
3694 int adapt_val)
3695{
3696 int ret;
3697
3698 if (agreed_gear != UFS_HS_G4)
Bjorn Andersson66df79c2020-11-20 20:48:10 -08003699 adapt_val = PA_NO_ADAPT;
Stanley Chufc85a742020-11-16 14:50:52 +08003700
3701 ret = ufshcd_dme_set(hba,
3702 UIC_ARG_MIB(PA_TXHSADAPTTYPE),
3703 adapt_val);
3704 return ret;
3705}
3706EXPORT_SYMBOL_GPL(ufshcd_dme_configure_adapt);
3707
Alim Akhtar39bf2d82020-05-28 06:46:51 +05303708/**
3709 * ufshcd_dme_enable - UIC command for DME_ENABLE
3710 * @hba: per adapter instance
3711 *
3712 * DME_ENABLE command is issued in order to enable UniPro stack.
3713 *
3714 * Returns 0 on success, non-zero value on failure
3715 */
3716static int ufshcd_dme_enable(struct ufs_hba *hba)
3717{
3718 struct uic_command uic_cmd = {0};
3719 int ret;
3720
3721 uic_cmd.command = UIC_CMD_DME_ENABLE;
3722
3723 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3724 if (ret)
3725 dev_err(hba->dev,
Bean Huo1fa05702020-12-07 20:01:37 +01003726 "dme-enable: error code %d\n", ret);
Alim Akhtar39bf2d82020-05-28 06:46:51 +05303727
3728 return ret;
3729}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303730
Yaniv Gardicad2e032015-03-31 17:37:14 +03003731static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3732{
3733 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3734 unsigned long min_sleep_time_us;
3735
3736 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3737 return;
3738
3739 /*
3740 * last_dme_cmd_tstamp will be 0 only for 1st call to
3741 * this function
3742 */
3743 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3744 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3745 } else {
3746 unsigned long delta =
3747 (unsigned long) ktime_to_us(
3748 ktime_sub(ktime_get(),
3749 hba->last_dme_cmd_tstamp));
3750
3751 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3752 min_sleep_time_us =
3753 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3754 else
3755 return; /* no more delay required */
3756 }
3757
3758 /* allow sleep for extra 50us if needed */
3759 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3760}
3761
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303762/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303763 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3764 * @hba: per adapter instance
3765 * @attr_sel: uic command argument1
3766 * @attr_set: attribute set type as uic command argument2
3767 * @mib_val: setting value as uic command argument3
3768 * @peer: indicate whether peer or local
3769 *
3770 * Returns 0 on success, non-zero value on failure
3771 */
3772int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3773 u8 attr_set, u32 mib_val, u8 peer)
3774{
3775 struct uic_command uic_cmd = {0};
3776 static const char *const action[] = {
3777 "dme-set",
3778 "dme-peer-set"
3779 };
3780 const char *set = action[!!peer];
3781 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003782 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303783
3784 uic_cmd.command = peer ?
3785 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3786 uic_cmd.argument1 = attr_sel;
3787 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3788 uic_cmd.argument3 = mib_val;
3789
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003790 do {
3791 /* for peer attributes we retry upon failure */
3792 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3793 if (ret)
3794 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3795 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3796 } while (ret && peer && --retries);
3797
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003798 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003799 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003800 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3801 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303802
3803 return ret;
3804}
3805EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3806
3807/**
3808 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3809 * @hba: per adapter instance
3810 * @attr_sel: uic command argument1
3811 * @mib_val: the value of the attribute as returned by the UIC command
3812 * @peer: indicate whether peer or local
3813 *
3814 * Returns 0 on success, non-zero value on failure
3815 */
3816int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3817 u32 *mib_val, u8 peer)
3818{
3819 struct uic_command uic_cmd = {0};
3820 static const char *const action[] = {
3821 "dme-get",
3822 "dme-peer-get"
3823 };
3824 const char *get = action[!!peer];
3825 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003826 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003827 struct ufs_pa_layer_attr orig_pwr_info;
3828 struct ufs_pa_layer_attr temp_pwr_info;
3829 bool pwr_mode_change = false;
3830
3831 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3832 orig_pwr_info = hba->pwr_info;
3833 temp_pwr_info = orig_pwr_info;
3834
3835 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3836 orig_pwr_info.pwr_rx == FAST_MODE) {
3837 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3838 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3839 pwr_mode_change = true;
3840 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3841 orig_pwr_info.pwr_rx == SLOW_MODE) {
3842 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3843 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3844 pwr_mode_change = true;
3845 }
3846 if (pwr_mode_change) {
3847 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3848 if (ret)
3849 goto out;
3850 }
3851 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303852
3853 uic_cmd.command = peer ?
3854 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3855 uic_cmd.argument1 = attr_sel;
3856
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003857 do {
3858 /* for peer attributes we retry upon failure */
3859 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3860 if (ret)
3861 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3862 get, UIC_GET_ATTR_ID(attr_sel), ret);
3863 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303864
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003865 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003866 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003867 get, UIC_GET_ATTR_ID(attr_sel),
3868 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003869
3870 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303871 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003872
3873 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3874 && pwr_mode_change)
3875 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303876out:
3877 return ret;
3878}
3879EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3880
3881/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003882 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3883 * state) and waits for it to take effect.
3884 *
3885 * @hba: per adapter instance
3886 * @cmd: UIC command to execute
3887 *
3888 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3889 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3890 * and device UniPro link and hence it's final completion would be indicated by
3891 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3892 * addition to normal UIC command completion Status (UCCS). This function only
3893 * returns after the relevant status bits indicate the completion.
3894 *
3895 * Returns 0 on success, non-zero value on failure
3896 */
3897static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3898{
3899 struct completion uic_async_done;
3900 unsigned long flags;
3901 u8 status;
3902 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003903 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003904
3905 mutex_lock(&hba->uic_cmd_mutex);
3906 init_completion(&uic_async_done);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003907 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003908
3909 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo4db7a232020-08-09 05:15:51 -07003910 if (ufshcd_is_link_broken(hba)) {
3911 ret = -ENOLINK;
3912 goto out_unlock;
3913 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003914 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003915 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3916 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3917 /*
3918 * Make sure UIC command completion interrupt is disabled before
3919 * issuing UIC command.
3920 */
3921 wmb();
3922 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003923 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003924 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3925 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003926 if (ret) {
3927 dev_err(hba->dev,
3928 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3929 cmd->command, cmd->argument3, ret);
3930 goto out;
3931 }
3932
3933 if (!wait_for_completion_timeout(hba->uic_async_done,
3934 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3935 dev_err(hba->dev,
3936 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3937 cmd->command, cmd->argument3);
Can Guo0f52fcb92020-11-02 22:24:40 -08003938
3939 if (!cmd->cmd_active) {
3940 dev_err(hba->dev, "%s: Power Mode Change operation has been completed, go check UPMCRS\n",
3941 __func__);
3942 goto check_upmcrs;
3943 }
3944
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003945 ret = -ETIMEDOUT;
3946 goto out;
3947 }
3948
Can Guo0f52fcb92020-11-02 22:24:40 -08003949check_upmcrs:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003950 status = ufshcd_get_upmcrs(hba);
3951 if (status != PWR_LOCAL) {
3952 dev_err(hba->dev,
Zang Leigang479da362017-09-19 16:50:30 +08003953 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003954 cmd->command, status);
3955 ret = (status != PWR_OK) ? status : -1;
3956 }
3957out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08003958 if (ret) {
3959 ufshcd_print_host_state(hba);
3960 ufshcd_print_pwr_info(hba);
Stanley Chue965e5e2020-12-05 19:58:59 +08003961 ufshcd_print_evt_hist(hba);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08003962 }
3963
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003964 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003965 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003966 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003967 if (reenable_intr)
3968 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Can Guo4db7a232020-08-09 05:15:51 -07003969 if (ret) {
3970 ufshcd_set_link_broken(hba);
3971 ufshcd_schedule_eh_work(hba);
3972 }
3973out_unlock:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003974 spin_unlock_irqrestore(hba->host->host_lock, flags);
3975 mutex_unlock(&hba->uic_cmd_mutex);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003976
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003977 return ret;
3978}
3979
3980/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303981 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3982 * using DME_SET primitives.
3983 * @hba: per adapter instance
3984 * @mode: powr mode value
3985 *
3986 * Returns 0 on success, non-zero value on failure
3987 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05303988static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303989{
3990 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003991 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303992
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003993 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3994 ret = ufshcd_dme_set(hba,
3995 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3996 if (ret) {
3997 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3998 __func__, ret);
3999 goto out;
4000 }
4001 }
4002
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304003 uic_cmd.command = UIC_CMD_DME_SET;
4004 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
4005 uic_cmd.argument3 = mode;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004006 ufshcd_hold(hba, false);
4007 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
4008 ufshcd_release(hba);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304009
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03004010out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004011 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004012}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304013
Stanley Chu087c5ef2020-03-27 17:53:28 +08004014int ufshcd_link_recovery(struct ufs_hba *hba)
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004015{
4016 int ret;
4017 unsigned long flags;
4018
4019 spin_lock_irqsave(hba->host->host_lock, flags);
4020 hba->ufshcd_state = UFSHCD_STATE_RESET;
4021 ufshcd_set_eh_in_progress(hba);
4022 spin_unlock_irqrestore(hba->host->host_lock, flags);
4023
Can Guoebdd1df2019-11-14 22:09:24 -08004024 /* Reset the attached device */
Stanley Chu31a5d9c2020-12-08 21:56:35 +08004025 ufshcd_device_reset(hba);
Can Guoebdd1df2019-11-14 22:09:24 -08004026
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004027 ret = ufshcd_host_reset_and_restore(hba);
4028
4029 spin_lock_irqsave(hba->host->host_lock, flags);
4030 if (ret)
4031 hba->ufshcd_state = UFSHCD_STATE_ERROR;
4032 ufshcd_clear_eh_in_progress(hba);
4033 spin_unlock_irqrestore(hba->host->host_lock, flags);
4034
4035 if (ret)
4036 dev_err(hba->dev, "%s: link recovery failed, err %d",
4037 __func__, ret);
Jaegeuk Kim4ee7ee52021-01-07 10:53:15 -08004038 else
4039 ufshcd_clear_ua_wluns(hba);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004040
4041 return ret;
4042}
Stanley Chu087c5ef2020-03-27 17:53:28 +08004043EXPORT_SYMBOL_GPL(ufshcd_link_recovery);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004044
Can Guo4db7a232020-08-09 05:15:51 -07004045static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004046{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004047 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004048 struct uic_command uic_cmd = {0};
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08004049 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004050
Kiwoong Kimee32c902016-11-10 21:17:43 +09004051 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
4052
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004053 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004054 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08004055 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
4056 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004057
Can Guo4db7a232020-08-09 05:15:51 -07004058 if (ret)
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004059 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
4060 __func__, ret);
Can Guo4db7a232020-08-09 05:15:51 -07004061 else
Kiwoong Kimee32c902016-11-10 21:17:43 +09004062 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
4063 POST_CHANGE);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004064
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004065 return ret;
4066}
4067
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004068int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004069{
4070 struct uic_command uic_cmd = {0};
4071 int ret;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08004072 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004073
Kiwoong Kimee32c902016-11-10 21:17:43 +09004074 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
4075
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004076 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
4077 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08004078 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
4079 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
4080
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304081 if (ret) {
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004082 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
4083 __func__, ret);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004084 } else {
Kiwoong Kimee32c902016-11-10 21:17:43 +09004085 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
4086 POST_CHANGE);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004087 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
4088 hba->ufs_stats.hibern8_exit_cnt++;
4089 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304090
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304091 return ret;
4092}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004093EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_exit);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304094
Stanley Chuba7af5e2019-12-30 13:32:28 +08004095void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit)
4096{
4097 unsigned long flags;
Can Guobe7594a2020-03-05 00:53:07 -08004098 bool update = false;
Stanley Chuba7af5e2019-12-30 13:32:28 +08004099
Can Guobe7594a2020-03-05 00:53:07 -08004100 if (!ufshcd_is_auto_hibern8_supported(hba))
Stanley Chuba7af5e2019-12-30 13:32:28 +08004101 return;
4102
4103 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guobe7594a2020-03-05 00:53:07 -08004104 if (hba->ahit != ahit) {
4105 hba->ahit = ahit;
4106 update = true;
4107 }
Stanley Chuba7af5e2019-12-30 13:32:28 +08004108 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guobe7594a2020-03-05 00:53:07 -08004109
4110 if (update && !pm_runtime_suspended(hba->dev)) {
4111 pm_runtime_get_sync(hba->dev);
4112 ufshcd_hold(hba, false);
4113 ufshcd_auto_hibern8_enable(hba);
4114 ufshcd_release(hba);
4115 pm_runtime_put(hba->dev);
4116 }
Stanley Chuba7af5e2019-12-30 13:32:28 +08004117}
4118EXPORT_SYMBOL_GPL(ufshcd_auto_hibern8_update);
4119
Can Guo71d848b2019-11-14 22:09:26 -08004120void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
Adrian Hunterad448372018-03-20 15:07:38 +02004121{
4122 unsigned long flags;
4123
Bao D. Nguyen499f7a92020-08-28 18:05:13 -07004124 if (!ufshcd_is_auto_hibern8_supported(hba))
Adrian Hunterad448372018-03-20 15:07:38 +02004125 return;
4126
4127 spin_lock_irqsave(hba->host->host_lock, flags);
4128 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
4129 spin_unlock_irqrestore(hba->host->host_lock, flags);
4130}
4131
Yaniv Gardi50646362014-10-23 13:25:13 +03004132 /**
4133 * ufshcd_init_pwr_info - setting the POR (power on reset)
4134 * values in hba power info
4135 * @hba: per-adapter instance
4136 */
4137static void ufshcd_init_pwr_info(struct ufs_hba *hba)
4138{
4139 hba->pwr_info.gear_rx = UFS_PWM_G1;
4140 hba->pwr_info.gear_tx = UFS_PWM_G1;
4141 hba->pwr_info.lane_rx = 1;
4142 hba->pwr_info.lane_tx = 1;
4143 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
4144 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
4145 hba->pwr_info.hs_rate = 0;
4146}
4147
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304148/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004149 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
4150 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304151 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004152static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304153{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004154 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
4155
4156 if (hba->max_pwr_info.is_valid)
4157 return 0;
4158
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004159 pwr_info->pwr_tx = FAST_MODE;
4160 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004161 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304162
4163 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004164 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
4165 &pwr_info->lane_rx);
4166 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4167 &pwr_info->lane_tx);
4168
4169 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
4170 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
4171 __func__,
4172 pwr_info->lane_rx,
4173 pwr_info->lane_tx);
4174 return -EINVAL;
4175 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304176
4177 /*
4178 * First, get the maximum gears of HS speed.
4179 * If a zero value, it means there is no HSGEAR capability.
4180 * Then, get the maximum gears of PWM speed.
4181 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004182 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
4183 if (!pwr_info->gear_rx) {
4184 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4185 &pwr_info->gear_rx);
4186 if (!pwr_info->gear_rx) {
4187 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
4188 __func__, pwr_info->gear_rx);
4189 return -EINVAL;
4190 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004191 pwr_info->pwr_rx = SLOW_MODE;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304192 }
4193
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004194 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
4195 &pwr_info->gear_tx);
4196 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304197 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004198 &pwr_info->gear_tx);
4199 if (!pwr_info->gear_tx) {
4200 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
4201 __func__, pwr_info->gear_tx);
4202 return -EINVAL;
4203 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004204 pwr_info->pwr_tx = SLOW_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004205 }
4206
4207 hba->max_pwr_info.is_valid = true;
4208 return 0;
4209}
4210
4211static int ufshcd_change_power_mode(struct ufs_hba *hba,
4212 struct ufs_pa_layer_attr *pwr_mode)
4213{
4214 int ret;
4215
4216 /* if already configured to the requested pwr_mode */
Can Guo2355b662020-08-24 19:07:06 -07004217 if (!hba->force_pmc &&
4218 pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004219 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4220 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4221 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4222 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4223 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4224 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4225 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4226 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304227 }
4228
4229 /*
4230 * Configure attributes for power mode change with below.
4231 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4232 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4233 * - PA_HSSERIES
4234 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004235 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4236 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4237 pwr_mode->lane_rx);
4238 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4239 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304240 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004241 else
4242 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304243
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004244 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4245 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4246 pwr_mode->lane_tx);
4247 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4248 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304249 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004250 else
4251 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304252
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004253 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4254 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4255 pwr_mode->pwr_rx == FAST_MODE ||
4256 pwr_mode->pwr_tx == FAST_MODE)
4257 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4258 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304259
Kiwoong Kimb1d0d2e2020-12-21 10:24:40 +09004260 if (!(hba->quirks & UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING)) {
4261 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
4262 DL_FC0ProtectionTimeOutVal_Default);
4263 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
4264 DL_TC0ReplayTimeOutVal_Default);
4265 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
4266 DL_AFC0ReqTimeOutVal_Default);
4267 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
4268 DL_FC1ProtectionTimeOutVal_Default);
4269 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
4270 DL_TC1ReplayTimeOutVal_Default);
4271 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
4272 DL_AFC1ReqTimeOutVal_Default);
Can Guo08342532019-12-05 02:14:42 +00004273
Kiwoong Kimb1d0d2e2020-12-21 10:24:40 +09004274 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
4275 DL_FC0ProtectionTimeOutVal_Default);
4276 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
4277 DL_TC0ReplayTimeOutVal_Default);
4278 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
4279 DL_AFC0ReqTimeOutVal_Default);
4280 }
Can Guo08342532019-12-05 02:14:42 +00004281
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004282 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4283 | pwr_mode->pwr_tx);
4284
4285 if (ret) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304286 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004287 "%s: power mode change failed %d\n", __func__, ret);
4288 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004289 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4290 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004291
4292 memcpy(&hba->pwr_info, pwr_mode,
4293 sizeof(struct ufs_pa_layer_attr));
4294 }
4295
4296 return ret;
4297}
4298
4299/**
4300 * ufshcd_config_pwr_mode - configure a new power mode
4301 * @hba: per-adapter instance
4302 * @desired_pwr_mode: desired power configuration
4303 */
Alim Akhtar0d846e72018-05-06 15:44:18 +05304304int ufshcd_config_pwr_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004305 struct ufs_pa_layer_attr *desired_pwr_mode)
4306{
4307 struct ufs_pa_layer_attr final_params = { 0 };
4308 int ret;
4309
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004310 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4311 desired_pwr_mode, &final_params);
4312
4313 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004314 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4315
4316 ret = ufshcd_change_power_mode(hba, &final_params);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304317
4318 return ret;
4319}
Alim Akhtar0d846e72018-05-06 15:44:18 +05304320EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304321
4322/**
Dolev Raviv68078d52013-07-30 00:35:58 +05304323 * ufshcd_complete_dev_init() - checks device readiness
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004324 * @hba: per-adapter instance
Dolev Raviv68078d52013-07-30 00:35:58 +05304325 *
4326 * Set fDeviceInit flag and poll until device toggles it.
4327 */
4328static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4329{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004330 int err;
Jason Yan7dfdcc32020-04-26 17:43:05 +08004331 bool flag_res = true;
Kiwoong Kim29707fa2020-08-10 19:02:27 +09004332 ktime_t timeout;
Dolev Raviv68078d52013-07-30 00:35:58 +05304333
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004334 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08004335 QUERY_FLAG_IDN_FDEVICEINIT, 0, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05304336 if (err) {
4337 dev_err(hba->dev,
4338 "%s setting fDeviceInit flag failed with error %d\n",
4339 __func__, err);
4340 goto out;
4341 }
4342
Kiwoong Kim29707fa2020-08-10 19:02:27 +09004343 /* Poll fDeviceInit flag to be cleared */
4344 timeout = ktime_add_ms(ktime_get(), FDEVICEINIT_COMPL_TIMEOUT);
4345 do {
4346 err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4347 QUERY_FLAG_IDN_FDEVICEINIT, 0, &flag_res);
4348 if (!flag_res)
4349 break;
4350 usleep_range(5000, 10000);
4351 } while (ktime_before(ktime_get(), timeout));
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004352
Kiwoong Kim29707fa2020-08-10 19:02:27 +09004353 if (err) {
Dolev Raviv68078d52013-07-30 00:35:58 +05304354 dev_err(hba->dev,
Kiwoong Kim29707fa2020-08-10 19:02:27 +09004355 "%s reading fDeviceInit flag failed with error %d\n",
4356 __func__, err);
4357 } else if (flag_res) {
Dolev Raviv68078d52013-07-30 00:35:58 +05304358 dev_err(hba->dev,
Kiwoong Kim29707fa2020-08-10 19:02:27 +09004359 "%s fDeviceInit was not cleared by the device\n",
4360 __func__);
4361 err = -EBUSY;
4362 }
Dolev Raviv68078d52013-07-30 00:35:58 +05304363out:
4364 return err;
4365}
4366
4367/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304368 * ufshcd_make_hba_operational - Make UFS controller operational
4369 * @hba: per adapter instance
4370 *
4371 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004372 * 1. Enable required interrupts
4373 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004374 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004375 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304376 *
4377 * Returns 0 on success, non-zero value on failure
4378 */
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004379int ufshcd_make_hba_operational(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304380{
4381 int err = 0;
4382 u32 reg;
4383
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304384 /* Enable required interrupts */
4385 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4386
4387 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004388 if (ufshcd_is_intr_aggr_allowed(hba))
4389 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4390 else
4391 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304392
4393 /* Configure UTRL and UTMRL base address registers */
4394 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4395 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4396 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4397 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4398 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4399 REG_UTP_TASK_REQ_LIST_BASE_L);
4400 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4401 REG_UTP_TASK_REQ_LIST_BASE_H);
4402
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304403 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004404 * Make sure base address and interrupt setup are updated before
4405 * enabling the run/stop registers below.
4406 */
4407 wmb();
4408
4409 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304410 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304411 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004412 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304413 if (!(ufshcd_get_lists_status(reg))) {
4414 ufshcd_enable_run_stop_reg(hba);
4415 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304416 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304417 "Host controller not ready to process requests");
4418 err = -EIO;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304419 }
4420
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304421 return err;
4422}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004423EXPORT_SYMBOL_GPL(ufshcd_make_hba_operational);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304424
4425/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02004426 * ufshcd_hba_stop - Send controller to reset state
4427 * @hba: per adapter instance
Yaniv Gardi596585a2016-03-10 17:37:08 +02004428 */
Bart Van Assche5cac1092020-05-07 15:27:50 -07004429static inline void ufshcd_hba_stop(struct ufs_hba *hba)
Yaniv Gardi596585a2016-03-10 17:37:08 +02004430{
Bart Van Assche5cac1092020-05-07 15:27:50 -07004431 unsigned long flags;
Yaniv Gardi596585a2016-03-10 17:37:08 +02004432 int err;
4433
Bart Van Assche5cac1092020-05-07 15:27:50 -07004434 /*
4435 * Obtain the host lock to prevent that the controller is disabled
4436 * while the UFS interrupt handler is active on another CPU.
4437 */
4438 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02004439 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
Bart Van Assche5cac1092020-05-07 15:27:50 -07004440 spin_unlock_irqrestore(hba->host->host_lock, flags);
4441
Yaniv Gardi596585a2016-03-10 17:37:08 +02004442 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4443 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
Bart Van Assche5cac1092020-05-07 15:27:50 -07004444 10, 1);
Yaniv Gardi596585a2016-03-10 17:37:08 +02004445 if (err)
4446 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4447}
4448
4449/**
Alim Akhtar39bf2d82020-05-28 06:46:51 +05304450 * ufshcd_hba_execute_hce - initialize the controller
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304451 * @hba: per adapter instance
4452 *
4453 * The controller resets itself and controller firmware initialization
4454 * sequence kicks off. When controller is ready it will set
4455 * the Host Controller Enable bit to 1.
4456 *
4457 * Returns 0 on success, non-zero value on failure
4458 */
Alim Akhtar39bf2d82020-05-28 06:46:51 +05304459static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304460{
Stanley Chu6081b122020-11-12 13:45:37 +08004461 int retry_outer = 3;
4462 int retry_inner;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304463
Stanley Chu6081b122020-11-12 13:45:37 +08004464start:
Yaniv Gardi596585a2016-03-10 17:37:08 +02004465 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304466 /* change controller state to "reset state" */
Bart Van Assche5cac1092020-05-07 15:27:50 -07004467 ufshcd_hba_stop(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304468
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004469 /* UniPro link is disabled at this point */
4470 ufshcd_set_link_off(hba);
4471
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004472 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004473
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304474 /* start controller initialization sequence */
4475 ufshcd_hba_start(hba);
4476
4477 /*
4478 * To initialize a UFS host controller HCE bit must be set to 1.
4479 * During initialization the HCE bit value changes from 1->0->1.
4480 * When the host controller completes initialization sequence
4481 * it sets the value of HCE bit to 1. The same HCE bit is read back
4482 * to check if the controller has completed initialization sequence.
4483 * So without this delay the value HCE = 1, set in the previous
4484 * instruction might be read back.
4485 * This delay can be changed based on the controller.
4486 */
Stanley Chu90b84912020-05-09 17:37:13 +08004487 ufshcd_delay_us(hba->vps->hba_enable_delay_us, 100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304488
4489 /* wait for the host controller to complete initialization */
Stanley Chu6081b122020-11-12 13:45:37 +08004490 retry_inner = 50;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304491 while (ufshcd_is_hba_active(hba)) {
Stanley Chu6081b122020-11-12 13:45:37 +08004492 if (retry_inner) {
4493 retry_inner--;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304494 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304495 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304496 "Controller enable failed\n");
Stanley Chu6081b122020-11-12 13:45:37 +08004497 if (retry_outer) {
4498 retry_outer--;
4499 goto start;
4500 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304501 return -EIO;
4502 }
Stanley Chu9fc305e2020-03-18 18:40:15 +08004503 usleep_range(1000, 1100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304504 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004505
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004506 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004507 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004508
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004509 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004510
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304511 return 0;
4512}
Alim Akhtar39bf2d82020-05-28 06:46:51 +05304513
4514int ufshcd_hba_enable(struct ufs_hba *hba)
4515{
4516 int ret;
4517
4518 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4519 ufshcd_set_link_off(hba);
4520 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4521
4522 /* enable UIC related interrupts */
4523 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4524 ret = ufshcd_dme_reset(hba);
4525 if (!ret) {
4526 ret = ufshcd_dme_enable(hba);
4527 if (!ret)
4528 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4529 if (ret)
4530 dev_err(hba->dev,
4531 "Host controller enable failed with non-hce\n");
4532 }
4533 } else {
4534 ret = ufshcd_hba_execute_hce(hba);
4535 }
4536
4537 return ret;
4538}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004539EXPORT_SYMBOL_GPL(ufshcd_hba_enable);
4540
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004541static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4542{
Stanley Chuba0320f2020-03-18 18:40:10 +08004543 int tx_lanes = 0, i, err = 0;
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004544
4545 if (!peer)
4546 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4547 &tx_lanes);
4548 else
4549 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4550 &tx_lanes);
4551 for (i = 0; i < tx_lanes; i++) {
4552 if (!peer)
4553 err = ufshcd_dme_set(hba,
4554 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4555 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4556 0);
4557 else
4558 err = ufshcd_dme_peer_set(hba,
4559 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4560 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4561 0);
4562 if (err) {
4563 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4564 __func__, peer, i, err);
4565 break;
4566 }
4567 }
4568
4569 return err;
4570}
4571
4572static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4573{
4574 return ufshcd_disable_tx_lcc(hba, true);
4575}
4576
Stanley Chue965e5e2020-12-05 19:58:59 +08004577void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val)
Stanley Chu8808b4e2019-07-10 21:38:21 +08004578{
Stanley Chue965e5e2020-12-05 19:58:59 +08004579 struct ufs_event_hist *e;
4580
4581 if (id >= UFS_EVT_CNT)
4582 return;
4583
4584 e = &hba->ufs_stats.event[id];
4585 e->val[e->pos] = val;
4586 e->tstamp[e->pos] = ktime_get();
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02004587 e->cnt += 1;
Stanley Chue965e5e2020-12-05 19:58:59 +08004588 e->pos = (e->pos + 1) % UFS_EVENT_HIST_LENGTH;
Stanley Chu172614a2020-12-05 19:59:00 +08004589
4590 ufshcd_vops_event_notify(hba, id, &val);
Stanley Chu8808b4e2019-07-10 21:38:21 +08004591}
Stanley Chue965e5e2020-12-05 19:58:59 +08004592EXPORT_SYMBOL_GPL(ufshcd_update_evt_hist);
Stanley Chu8808b4e2019-07-10 21:38:21 +08004593
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304594/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304595 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304596 * @hba: per adapter instance
4597 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304598 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304599 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304600static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304601{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304602 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004603 int retries = DME_LINKSTARTUP_RETRIES;
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004604 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304605
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004606 /*
4607 * If UFS device isn't active then we will have to issue link startup
4608 * 2 times to make sure the device state move to active.
4609 */
4610 if (!ufshcd_is_ufs_dev_active(hba))
4611 link_startup_again = true;
4612
4613link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004614 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004615 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304616
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004617 ret = ufshcd_dme_link_startup(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004618
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004619 /* check if device is detected by inter-connect layer */
4620 if (!ret && !ufshcd_is_device_present(hba)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08004621 ufshcd_update_evt_hist(hba,
4622 UFS_EVT_LINK_STARTUP_FAIL,
Stanley Chu8808b4e2019-07-10 21:38:21 +08004623 0);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004624 dev_err(hba->dev, "%s: Device not present\n", __func__);
4625 ret = -ENXIO;
4626 goto out;
4627 }
4628
4629 /*
4630 * DME link lost indication is only received when link is up,
4631 * but we can't be sure if the link is up until link startup
4632 * succeeds. So reset the local Uni-Pro and try again.
4633 */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004634 if (ret && ufshcd_hba_enable(hba)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08004635 ufshcd_update_evt_hist(hba,
4636 UFS_EVT_LINK_STARTUP_FAIL,
Stanley Chu8808b4e2019-07-10 21:38:21 +08004637 (u32)ret);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004638 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004639 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004640 } while (ret && retries--);
4641
Stanley Chu8808b4e2019-07-10 21:38:21 +08004642 if (ret) {
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004643 /* failed to get the link up... retire */
Stanley Chue965e5e2020-12-05 19:58:59 +08004644 ufshcd_update_evt_hist(hba,
4645 UFS_EVT_LINK_STARTUP_FAIL,
Stanley Chu8808b4e2019-07-10 21:38:21 +08004646 (u32)ret);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304647 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004648 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304649
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004650 if (link_startup_again) {
4651 link_startup_again = false;
4652 retries = DME_LINKSTARTUP_RETRIES;
4653 goto link_startup;
4654 }
4655
subhashj@codeaurora.orgd2aebb92016-12-22 18:41:33 -08004656 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4657 ufshcd_init_pwr_info(hba);
4658 ufshcd_print_pwr_info(hba);
4659
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004660 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4661 ret = ufshcd_disable_device_tx_lcc(hba);
4662 if (ret)
4663 goto out;
4664 }
4665
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004666 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004667 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4668 if (ret)
4669 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004670
Can Guo2355b662020-08-24 19:07:06 -07004671 /* Clear UECPA once due to LINERESET has happened during LINK_STARTUP */
4672 ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004673 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304674out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004675 if (ret) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304676 dev_err(hba->dev, "link startup failed %d\n", ret);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004677 ufshcd_print_host_state(hba);
4678 ufshcd_print_pwr_info(hba);
Stanley Chue965e5e2020-12-05 19:58:59 +08004679 ufshcd_print_evt_hist(hba);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004680 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304681 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304682}
4683
4684/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304685 * ufshcd_verify_dev_init() - Verify device initialization
4686 * @hba: per-adapter instance
4687 *
4688 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4689 * device Transport Protocol (UTP) layer is ready after a reset.
4690 * If the UTP layer at the device side is not initialized, it may
4691 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4692 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4693 */
4694static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4695{
4696 int err = 0;
4697 int retries;
4698
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004699 ufshcd_hold(hba, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304700 mutex_lock(&hba->dev_cmd.lock);
4701 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4702 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4703 NOP_OUT_TIMEOUT);
4704
4705 if (!err || err == -ETIMEDOUT)
4706 break;
4707
4708 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4709 }
4710 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004711 ufshcd_release(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304712
4713 if (err)
4714 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4715 return err;
4716}
4717
4718/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004719 * ufshcd_set_queue_depth - set lun queue depth
4720 * @sdev: pointer to SCSI device
4721 *
4722 * Read bLUQueueDepth value and activate scsi tagged command
4723 * queueing. For WLUN, queue depth is set to 1. For best-effort
4724 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4725 * value that host can queue.
4726 */
4727static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4728{
4729 int ret = 0;
4730 u8 lun_qdepth;
4731 struct ufs_hba *hba;
4732
4733 hba = shost_priv(sdev->host);
4734
4735 lun_qdepth = hba->nutrs;
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02004736 ret = ufshcd_read_unit_desc_param(hba,
4737 ufshcd_scsi_to_upiu_lun(sdev->lun),
4738 UNIT_DESC_PARAM_LU_Q_DEPTH,
4739 &lun_qdepth,
4740 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004741
4742 /* Some WLUN doesn't support unit descriptor */
4743 if (ret == -EOPNOTSUPP)
4744 lun_qdepth = 1;
4745 else if (!lun_qdepth)
4746 /* eventually, we can figure out the real queue depth */
4747 lun_qdepth = hba->nutrs;
4748 else
4749 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4750
4751 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4752 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004753 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004754}
4755
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004756/*
4757 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4758 * @hba: per-adapter instance
4759 * @lun: UFS device lun id
4760 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4761 *
4762 * Returns 0 in case of success and b_lu_write_protect status would be returned
4763 * @b_lu_write_protect parameter.
4764 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4765 * Returns -EINVAL in case of invalid parameters passed to this function.
4766 */
4767static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4768 u8 lun,
4769 u8 *b_lu_write_protect)
4770{
4771 int ret;
4772
4773 if (!b_lu_write_protect)
4774 ret = -EINVAL;
4775 /*
4776 * According to UFS device spec, RPMB LU can't be write
4777 * protected so skip reading bLUWriteProtect parameter for
4778 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4779 */
Bean Huo1baa8012020-01-20 14:08:20 +01004780 else if (lun >= hba->dev_info.max_lu_supported)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004781 ret = -ENOTSUPP;
4782 else
4783 ret = ufshcd_read_unit_desc_param(hba,
4784 lun,
4785 UNIT_DESC_PARAM_LU_WR_PROTECT,
4786 b_lu_write_protect,
4787 sizeof(*b_lu_write_protect));
4788 return ret;
4789}
4790
4791/**
4792 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4793 * status
4794 * @hba: per-adapter instance
4795 * @sdev: pointer to SCSI device
4796 *
4797 */
4798static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4799 struct scsi_device *sdev)
4800{
4801 if (hba->dev_info.f_power_on_wp_en &&
4802 !hba->dev_info.is_lu_power_on_wp) {
4803 u8 b_lu_write_protect;
4804
4805 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4806 &b_lu_write_protect) &&
4807 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4808 hba->dev_info.is_lu_power_on_wp = true;
4809 }
4810}
4811
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004812/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304813 * ufshcd_slave_alloc - handle initial SCSI device configurations
4814 * @sdev: pointer to SCSI device
4815 *
4816 * Returns success
4817 */
4818static int ufshcd_slave_alloc(struct scsi_device *sdev)
4819{
4820 struct ufs_hba *hba;
4821
4822 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304823
4824 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4825 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304826
Can Guoa3a76392019-12-05 02:14:30 +00004827 /* DBD field should be set to 1 in mode sense(10) */
4828 sdev->set_dbd_for_ms = 1;
4829
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304830 /* allow SCSI layer to restart the device in case of errors */
4831 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004832
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004833 /* REPORT SUPPORTED OPERATION CODES is not supported */
4834 sdev->no_report_opcodes = 1;
4835
Sujit Reddy Thumma84af7e82018-01-24 09:52:35 +05304836 /* WRITE_SAME command is not supported */
4837 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004838
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004839 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004840
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004841 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4842
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004843 return 0;
4844}
4845
4846/**
4847 * ufshcd_change_queue_depth - change queue depth
4848 * @sdev: pointer to SCSI device
4849 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004850 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004851 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004852 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004853static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004854{
4855 struct ufs_hba *hba = shost_priv(sdev->host);
4856
4857 if (depth > hba->nutrs)
4858 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004859 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304860}
4861
4862/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004863 * ufshcd_slave_configure - adjust SCSI device configurations
4864 * @sdev: pointer to SCSI device
4865 */
4866static int ufshcd_slave_configure(struct scsi_device *sdev)
4867{
Stanley Chu49615ba2019-09-16 23:56:50 +08004868 struct ufs_hba *hba = shost_priv(sdev->host);
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004869 struct request_queue *q = sdev->request_queue;
4870
4871 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
Kiwoong Kim2b2bfc8a2021-01-19 12:33:41 +09004872 if (hba->quirks & UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE)
4873 blk_queue_update_dma_alignment(q, PAGE_SIZE - 1);
Stanley Chu49615ba2019-09-16 23:56:50 +08004874
4875 if (ufshcd_is_rpm_autosuspend_allowed(hba))
4876 sdev->rpm_autosuspend = 1;
4877
Satya Tangiraladf043c742020-07-06 20:04:14 +00004878 ufshcd_crypto_setup_rq_keyslot_manager(hba, q);
4879
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004880 return 0;
4881}
4882
4883/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304884 * ufshcd_slave_destroy - remove SCSI device configurations
4885 * @sdev: pointer to SCSI device
4886 */
4887static void ufshcd_slave_destroy(struct scsi_device *sdev)
4888{
4889 struct ufs_hba *hba;
4890
4891 hba = shost_priv(sdev->host);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004892 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004893 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4894 unsigned long flags;
4895
4896 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004897 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004898 spin_unlock_irqrestore(hba->host->host_lock, flags);
4899 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304900}
4901
4902/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304903 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004904 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304905 * @scsi_status: SCSI command status
4906 *
4907 * Returns value base on SCSI command status
4908 */
4909static inline int
4910ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4911{
4912 int result = 0;
4913
4914 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304915 case SAM_STAT_CHECK_CONDITION:
4916 ufshcd_copy_sense_data(lrbp);
Gustavo A. R. Silvadf561f662020-08-23 17:36:59 -05004917 fallthrough;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304918 case SAM_STAT_GOOD:
Hannes Reineckedb83d8a2021-01-13 10:04:48 +01004919 result |= DID_OK << 16 | scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304920 break;
4921 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304922 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304923 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304924 ufshcd_copy_sense_data(lrbp);
4925 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304926 break;
4927 default:
4928 result |= DID_ERROR << 16;
4929 break;
4930 } /* end of switch */
4931
4932 return result;
4933}
4934
4935/**
4936 * ufshcd_transfer_rsp_status - Get overall status of the response
4937 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004938 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304939 *
4940 * Returns result of the command to notify SCSI midlayer
4941 */
4942static inline int
4943ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4944{
4945 int result = 0;
4946 int scsi_status;
4947 int ocs;
4948
4949 /* overall command status of utrd */
4950 ocs = ufshcd_get_tr_ocs(lrbp);
4951
Kiwoong Kimd779a6e2020-05-28 06:46:53 +05304952 if (hba->quirks & UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR) {
4953 if (be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_1) &
4954 MASK_RSP_UPIU_RESULT)
4955 ocs = OCS_SUCCESS;
4956 }
4957
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304958 switch (ocs) {
4959 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304960 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004961 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304962 switch (result) {
4963 case UPIU_TRANSACTION_RESPONSE:
4964 /*
4965 * get the response UPIU result to extract
4966 * the SCSI command status
4967 */
4968 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4969
4970 /*
4971 * get the result based on SCSI status response
4972 * to notify the SCSI midlayer of the command status
4973 */
4974 scsi_status = result & MASK_SCSI_STATUS;
4975 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304976
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02004977 /*
4978 * Currently we are only supporting BKOPs exception
4979 * events hence we can ignore BKOPs exception event
4980 * during power management callbacks. BKOPs exception
4981 * event is not expected to be raised in runtime suspend
4982 * callback as it allows the urgent bkops.
4983 * During system suspend, we are anyway forcefully
4984 * disabling the bkops and if urgent bkops is needed
4985 * it will be enabled on system resume. Long term
4986 * solution could be to abort the system suspend if
4987 * UFS device needs urgent BKOPs.
4988 */
4989 if (!hba->pm_op_in_progress &&
Sayali Lokhande2824ec92020-02-10 19:40:44 -08004990 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr) &&
4991 schedule_work(&hba->eeh_work)) {
4992 /*
4993 * Prevent suspend once eeh_work is scheduled
4994 * to avoid deadlock between ufshcd_suspend
4995 * and exception event handler.
4996 */
4997 pm_runtime_get_noresume(hba->dev);
4998 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304999 break;
5000 case UPIU_TRANSACTION_REJECT_UPIU:
5001 /* TODO: handle Reject UPIU Response */
5002 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305003 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305004 "Reject UPIU not fully implemented\n");
5005 break;
5006 default:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305007 dev_err(hba->dev,
5008 "Unexpected request response code = %x\n",
5009 result);
Stanley Chue0347d82019-04-15 20:23:38 +08005010 result = DID_ERROR << 16;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305011 break;
5012 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305013 break;
5014 case OCS_ABORTED:
5015 result |= DID_ABORT << 16;
5016 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305017 case OCS_INVALID_COMMAND_STATUS:
5018 result |= DID_REQUEUE << 16;
5019 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305020 case OCS_INVALID_CMD_TABLE_ATTR:
5021 case OCS_INVALID_PRDT_ATTR:
5022 case OCS_MISMATCH_DATA_BUF_SIZE:
5023 case OCS_MISMATCH_RESP_UPIU_SIZE:
5024 case OCS_PEER_COMM_FAILURE:
5025 case OCS_FATAL_ERROR:
Satya Tangirala5e7341e2020-07-06 20:04:12 +00005026 case OCS_DEVICE_FATAL_ERROR:
5027 case OCS_INVALID_CRYPTO_CONFIG:
5028 case OCS_GENERAL_CRYPTO_ERROR:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305029 default:
5030 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305031 dev_err(hba->dev,
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005032 "OCS error from controller = %x for tag %d\n",
5033 ocs, lrbp->task_tag);
Stanley Chue965e5e2020-12-05 19:58:59 +08005034 ufshcd_print_evt_hist(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08005035 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305036 break;
5037 } /* end of switch */
5038
Jaegeuk Kimeeb1b552021-01-07 10:53:16 -08005039 if ((host_byte(result) != DID_OK) &&
5040 (host_byte(result) != DID_REQUEUE) && !hba->silence_err_logs)
Dolev Raviv66cc8202016-12-22 18:39:42 -08005041 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305042 return result;
5043}
5044
5045/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305046 * ufshcd_uic_cmd_compl - handle completion of uic command
5047 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305048 * @intr_status: interrupt status generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005049 *
5050 * Returns
5051 * IRQ_HANDLED - If interrupt is valid
5052 * IRQ_NONE - If invalid interrupt
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305053 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005054static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305055{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005056 irqreturn_t retval = IRQ_NONE;
5057
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305058 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305059 hba->active_uic_cmd->argument2 |=
5060 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05305061 hba->active_uic_cmd->argument3 =
5062 ufshcd_get_dme_attr_val(hba);
Can Guo0f52fcb92020-11-02 22:24:40 -08005063 if (!hba->uic_async_done)
5064 hba->active_uic_cmd->cmd_active = 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305065 complete(&hba->active_uic_cmd->done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005066 retval = IRQ_HANDLED;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305067 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305068
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005069 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
Can Guo0f52fcb92020-11-02 22:24:40 -08005070 hba->active_uic_cmd->cmd_active = 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005071 complete(hba->uic_async_done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005072 retval = IRQ_HANDLED;
5073 }
Stanley Chuaa5c6972020-06-15 15:22:35 +08005074
5075 if (retval == IRQ_HANDLED)
5076 ufshcd_add_uic_command_trace(hba, hba->active_uic_cmd,
Bean Huo28fa68f2021-01-05 12:34:42 +01005077 UFS_CMD_COMP);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005078 return retval;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305079}
5080
5081/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005082 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305083 * @hba: per adapter instance
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005084 * @completed_reqs: requests to complete
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305085 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005086static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
5087 unsigned long completed_reqs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305088{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305089 struct ufshcd_lrb *lrbp;
5090 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305091 int result;
5092 int index;
Can Guo7a7e66c2020-12-02 04:04:02 -08005093 bool update_scaling = false;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005094
Dolev Ravive9d501b2014-07-01 12:22:37 +03005095 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
5096 lrbp = &hba->lrb[index];
Can Guo7a7e66c2020-12-02 04:04:02 -08005097 lrbp->in_use = false;
Stanley Chua3170372020-07-06 14:07:06 +08005098 lrbp->compl_time_stamp = ktime_get();
Dolev Ravive9d501b2014-07-01 12:22:37 +03005099 cmd = lrbp->cmd;
5100 if (cmd) {
Bean Huo28fa68f2021-01-05 12:34:42 +01005101 ufshcd_add_command_trace(hba, index, UFS_CMD_COMP);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005102 result = ufshcd_transfer_rsp_status(hba, lrbp);
5103 scsi_dma_unmap(cmd);
5104 cmd->result = result;
5105 /* Mark completed command as NULL in LRB */
5106 lrbp->cmd = NULL;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005107 /* Do not touch lrbp after scsi done */
5108 cmd->scsi_done(cmd);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005109 __ufshcd_release(hba);
Can Guo7a7e66c2020-12-02 04:04:02 -08005110 update_scaling = true;
Joao Pinto300bb132016-05-11 12:21:27 +01005111 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
5112 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08005113 if (hba->dev_cmd.complete) {
5114 ufshcd_add_command_trace(hba, index,
Bean Huo28fa68f2021-01-05 12:34:42 +01005115 UFS_DEV_COMP);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005116 complete(hba->dev_cmd.complete);
Can Guo7a7e66c2020-12-02 04:04:02 -08005117 update_scaling = true;
Lee Susman1a07f2d2016-12-22 18:42:03 -08005118 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03005119 }
Can Guo7a7e66c2020-12-02 04:04:02 -08005120 if (ufshcd_is_clkscaling_supported(hba) && update_scaling)
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08005121 hba->clk_scaling.active_reqs--;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005122 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305123
5124 /* clear corresponding bits of completed commands */
5125 hba->outstanding_reqs ^= completed_reqs;
5126
Sahitya Tummala856b3482014-09-25 15:32:34 +03005127 ufshcd_clk_scaling_update_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305128}
5129
5130/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005131 * ufshcd_transfer_req_compl - handle SCSI and query command completion
5132 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005133 *
5134 * Returns
5135 * IRQ_HANDLED - If interrupt is valid
5136 * IRQ_NONE - If invalid interrupt
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005137 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005138static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba)
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005139{
5140 unsigned long completed_reqs;
5141 u32 tr_doorbell;
5142
5143 /* Resetting interrupt aggregation counters first and reading the
5144 * DOOR_BELL afterward allows us to handle all the completed requests.
5145 * In order to prevent other interrupts starvation the DB is read once
5146 * after reset. The down side of this solution is the possibility of
5147 * false interrupt if device completes another request after resetting
5148 * aggregation and before reading the DB.
5149 */
Alim Akhtarb638b5e2020-05-28 06:46:50 +05305150 if (ufshcd_is_intr_aggr_allowed(hba) &&
5151 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005152 ufshcd_reset_intr_aggr(hba);
5153
5154 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
5155 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
5156
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005157 if (completed_reqs) {
5158 __ufshcd_transfer_req_compl(hba, completed_reqs);
5159 return IRQ_HANDLED;
5160 } else {
5161 return IRQ_NONE;
5162 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005163}
5164
5165/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305166 * ufshcd_disable_ee - disable exception event
5167 * @hba: per-adapter instance
5168 * @mask: exception event to disable
5169 *
5170 * Disables exception event in the device so that the EVENT_ALERT
5171 * bit is not set.
5172 *
5173 * Returns zero on success, non-zero error value on failure.
5174 */
5175static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
5176{
5177 int err = 0;
5178 u32 val;
5179
5180 if (!(hba->ee_ctrl_mask & mask))
5181 goto out;
5182
5183 val = hba->ee_ctrl_mask & ~mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03005184 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005185 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305186 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
5187 if (!err)
5188 hba->ee_ctrl_mask &= ~mask;
5189out:
5190 return err;
5191}
5192
5193/**
5194 * ufshcd_enable_ee - enable exception event
5195 * @hba: per-adapter instance
5196 * @mask: exception event to enable
5197 *
5198 * Enable corresponding exception event in the device to allow
5199 * device to alert host in critical scenarios.
5200 *
5201 * Returns zero on success, non-zero error value on failure.
5202 */
5203static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
5204{
5205 int err = 0;
5206 u32 val;
5207
5208 if (hba->ee_ctrl_mask & mask)
5209 goto out;
5210
5211 val = hba->ee_ctrl_mask | mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03005212 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005213 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305214 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
5215 if (!err)
5216 hba->ee_ctrl_mask |= mask;
5217out:
5218 return err;
5219}
5220
5221/**
5222 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
5223 * @hba: per-adapter instance
5224 *
5225 * Allow device to manage background operations on its own. Enabling
5226 * this might lead to inconsistent latencies during normal data transfers
5227 * as the device is allowed to manage its own way of handling background
5228 * operations.
5229 *
5230 * Returns zero on success, non-zero on failure.
5231 */
5232static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
5233{
5234 int err = 0;
5235
5236 if (hba->auto_bkops_enabled)
5237 goto out;
5238
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005239 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08005240 QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305241 if (err) {
5242 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
5243 __func__, err);
5244 goto out;
5245 }
5246
5247 hba->auto_bkops_enabled = true;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08005248 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305249
5250 /* No need of URGENT_BKOPS exception from the device */
5251 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5252 if (err)
5253 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
5254 __func__, err);
5255out:
5256 return err;
5257}
5258
5259/**
5260 * ufshcd_disable_auto_bkops - block device in doing background operations
5261 * @hba: per-adapter instance
5262 *
5263 * Disabling background operations improves command response latency but
5264 * has drawback of device moving into critical state where the device is
5265 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
5266 * host is idle so that BKOPS are managed effectively without any negative
5267 * impacts.
5268 *
5269 * Returns zero on success, non-zero on failure.
5270 */
5271static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5272{
5273 int err = 0;
5274
5275 if (!hba->auto_bkops_enabled)
5276 goto out;
5277
5278 /*
5279 * If host assisted BKOPs is to be enabled, make sure
5280 * urgent bkops exception is allowed.
5281 */
5282 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5283 if (err) {
5284 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5285 __func__, err);
5286 goto out;
5287 }
5288
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005289 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08005290 QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305291 if (err) {
5292 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5293 __func__, err);
5294 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5295 goto out;
5296 }
5297
5298 hba->auto_bkops_enabled = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08005299 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
Asutosh Das24366c2a2019-11-25 22:53:30 -08005300 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305301out:
5302 return err;
5303}
5304
5305/**
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005306 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305307 * @hba: per adapter instance
5308 *
5309 * After a device reset the device may toggle the BKOPS_EN flag
5310 * to default value. The s/w tracking variables should be updated
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005311 * as well. This function would change the auto-bkops state based on
5312 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305313 */
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005314static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305315{
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005316 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5317 hba->auto_bkops_enabled = false;
5318 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5319 ufshcd_enable_auto_bkops(hba);
5320 } else {
5321 hba->auto_bkops_enabled = true;
5322 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5323 ufshcd_disable_auto_bkops(hba);
5324 }
Stanley Chu7b6668d2020-05-30 22:12:00 +08005325 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
Asutosh Das24366c2a2019-11-25 22:53:30 -08005326 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305327}
5328
5329static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5330{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005331 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305332 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5333}
5334
5335/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005336 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5337 * @hba: per-adapter instance
5338 * @status: bkops_status value
5339 *
5340 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5341 * flag in the device to permit background operations if the device
5342 * bkops_status is greater than or equal to "status" argument passed to
5343 * this function, disable otherwise.
5344 *
5345 * Returns 0 for success, non-zero in case of failure.
5346 *
5347 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5348 * to know whether auto bkops is enabled or disabled after this function
5349 * returns control to it.
5350 */
5351static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5352 enum bkops_status status)
5353{
5354 int err;
5355 u32 curr_status = 0;
5356
5357 err = ufshcd_get_bkops_status(hba, &curr_status);
5358 if (err) {
5359 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5360 __func__, err);
5361 goto out;
5362 } else if (curr_status > BKOPS_STATUS_MAX) {
5363 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5364 __func__, curr_status);
5365 err = -EINVAL;
5366 goto out;
5367 }
5368
5369 if (curr_status >= status)
5370 err = ufshcd_enable_auto_bkops(hba);
5371 else
5372 err = ufshcd_disable_auto_bkops(hba);
5373out:
5374 return err;
5375}
5376
5377/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305378 * ufshcd_urgent_bkops - handle urgent bkops exception event
5379 * @hba: per-adapter instance
5380 *
5381 * Enable fBackgroundOpsEn flag in the device to permit background
5382 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005383 *
5384 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5385 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305386 */
5387static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5388{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005389 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305390}
5391
5392static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5393{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005394 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305395 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5396}
5397
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005398static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5399{
5400 int err;
5401 u32 curr_status = 0;
5402
5403 if (hba->is_urgent_bkops_lvl_checked)
5404 goto enable_auto_bkops;
5405
5406 err = ufshcd_get_bkops_status(hba, &curr_status);
5407 if (err) {
5408 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5409 __func__, err);
5410 goto out;
5411 }
5412
5413 /*
5414 * We are seeing that some devices are raising the urgent bkops
5415 * exception events even when BKOPS status doesn't indicate performace
5416 * impacted or critical. Handle these device by determining their urgent
5417 * bkops status at runtime.
5418 */
5419 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5420 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5421 __func__, curr_status);
5422 /* update the current status as the urgent bkops level */
5423 hba->urgent_bkops_lvl = curr_status;
5424 hba->is_urgent_bkops_lvl_checked = true;
5425 }
5426
5427enable_auto_bkops:
5428 err = ufshcd_enable_auto_bkops(hba);
5429out:
5430 if (err < 0)
5431 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5432 __func__, err);
5433}
5434
Bean Huo8e834ca2021-01-19 17:38:42 +01005435int ufshcd_wb_ctrl(struct ufs_hba *hba, bool enable)
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005436{
5437 int ret;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005438 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005439 enum query_opcode opcode;
5440
Stanley Chu79e35202020-05-08 16:01:15 +08005441 if (!ufshcd_is_wb_allowed(hba))
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005442 return 0;
5443
Bean Huo4cd48992021-01-19 17:38:46 +01005444 if (!(enable ^ hba->dev_info.wb_enabled))
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005445 return 0;
5446 if (enable)
5447 opcode = UPIU_QUERY_OPCODE_SET_FLAG;
5448 else
5449 opcode = UPIU_QUERY_OPCODE_CLEAR_FLAG;
5450
Stanley Chue31011a2020-05-22 16:32:11 +08005451 index = ufshcd_wb_get_query_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005452 ret = ufshcd_query_flag_retry(hba, opcode,
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005453 QUERY_FLAG_IDN_WB_EN, index, NULL);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005454 if (ret) {
5455 dev_err(hba->dev, "%s write booster %s failed %d\n",
5456 __func__, enable ? "enable" : "disable", ret);
5457 return ret;
5458 }
5459
Bean Huo4cd48992021-01-19 17:38:46 +01005460 hba->dev_info.wb_enabled = enable;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005461 dev_dbg(hba->dev, "%s write booster %s %d\n",
5462 __func__, enable ? "enable" : "disable", ret);
5463
5464 return ret;
5465}
5466
5467static int ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set)
5468{
5469 int val;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005470 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005471
5472 if (set)
5473 val = UPIU_QUERY_OPCODE_SET_FLAG;
5474 else
5475 val = UPIU_QUERY_OPCODE_CLEAR_FLAG;
5476
Stanley Chue31011a2020-05-22 16:32:11 +08005477 index = ufshcd_wb_get_query_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005478 return ufshcd_query_flag_retry(hba, val,
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005479 QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8,
5480 index, NULL);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005481}
5482
Bean Huod3ba6222021-01-21 19:57:36 +01005483static inline int ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable)
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005484{
Bean Huod3ba6222021-01-21 19:57:36 +01005485 int ret;
5486 u8 index;
5487 enum query_opcode opcode;
5488
5489 if (!ufshcd_is_wb_allowed(hba) ||
5490 hba->dev_info.wb_buf_flush_enabled == enable)
5491 return 0;
5492
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005493 if (enable)
Bean Huod3ba6222021-01-21 19:57:36 +01005494 opcode = UPIU_QUERY_OPCODE_SET_FLAG;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005495 else
Bean Huod3ba6222021-01-21 19:57:36 +01005496 opcode = UPIU_QUERY_OPCODE_CLEAR_FLAG;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005497
Stanley Chue31011a2020-05-22 16:32:11 +08005498 index = ufshcd_wb_get_query_index(hba);
Bean Huod3ba6222021-01-21 19:57:36 +01005499 ret = ufshcd_query_flag_retry(hba, opcode,
5500 QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN, index,
5501 NULL);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005502 if (ret) {
Bean Huod3ba6222021-01-21 19:57:36 +01005503 dev_err(hba->dev, "%s WB-Buf Flush %s failed %d\n", __func__,
5504 enable ? "enable" : "disable", ret);
5505 goto out;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005506 }
5507
Bean Huod3ba6222021-01-21 19:57:36 +01005508 hba->dev_info.wb_buf_flush_enabled = enable;
5509
5510 dev_dbg(hba->dev, "WB-Buf Flush %s\n", enable ? "enabled" : "disabled");
5511out:
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005512 return ret;
Bean Huod3ba6222021-01-21 19:57:36 +01005513
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005514}
5515
5516static bool ufshcd_wb_presrv_usrspc_keep_vcc_on(struct ufs_hba *hba,
5517 u32 avail_buf)
5518{
5519 u32 cur_buf;
5520 int ret;
Stanley Chue31011a2020-05-22 16:32:11 +08005521 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005522
Stanley Chue31011a2020-05-22 16:32:11 +08005523 index = ufshcd_wb_get_query_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005524 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5525 QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE,
Stanley Chue31011a2020-05-22 16:32:11 +08005526 index, 0, &cur_buf);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005527 if (ret) {
5528 dev_err(hba->dev, "%s dCurWriteBoosterBufferSize read failed %d\n",
5529 __func__, ret);
5530 return false;
5531 }
5532
5533 if (!cur_buf) {
5534 dev_info(hba->dev, "dCurWBBuf: %d WB disabled until free-space is available\n",
5535 cur_buf);
5536 return false;
5537 }
Stanley Chud14734ae2020-05-09 17:37:15 +08005538 /* Let it continue to flush when available buffer exceeds threshold */
5539 if (avail_buf < hba->vps->wb_flush_threshold)
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005540 return true;
5541
5542 return false;
5543}
5544
Stanley Chu51dd9052020-05-22 16:32:12 +08005545static bool ufshcd_wb_need_flush(struct ufs_hba *hba)
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005546{
5547 int ret;
5548 u32 avail_buf;
Stanley Chue31011a2020-05-22 16:32:11 +08005549 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005550
Stanley Chu79e35202020-05-08 16:01:15 +08005551 if (!ufshcd_is_wb_allowed(hba))
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005552 return false;
5553 /*
5554 * The ufs device needs the vcc to be ON to flush.
5555 * With user-space reduction enabled, it's enough to enable flush
5556 * by checking only the available buffer. The threshold
5557 * defined here is > 90% full.
5558 * With user-space preserved enabled, the current-buffer
5559 * should be checked too because the wb buffer size can reduce
5560 * when disk tends to be full. This info is provided by current
5561 * buffer (dCurrentWriteBoosterBufferSize). There's no point in
5562 * keeping vcc on when current buffer is empty.
5563 */
Stanley Chue31011a2020-05-22 16:32:11 +08005564 index = ufshcd_wb_get_query_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005565 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5566 QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE,
Stanley Chue31011a2020-05-22 16:32:11 +08005567 index, 0, &avail_buf);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005568 if (ret) {
5569 dev_warn(hba->dev, "%s dAvailableWriteBoosterBufferSize read failed %d\n",
5570 __func__, ret);
5571 return false;
5572 }
5573
5574 if (!hba->dev_info.b_presrv_uspc_en) {
Stanley Chud14734ae2020-05-09 17:37:15 +08005575 if (avail_buf <= UFS_WB_BUF_REMAIN_PERCENT(10))
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005576 return true;
5577 return false;
5578 }
5579
5580 return ufshcd_wb_presrv_usrspc_keep_vcc_on(hba, avail_buf);
5581}
5582
Stanley Chu51dd9052020-05-22 16:32:12 +08005583static void ufshcd_rpm_dev_flush_recheck_work(struct work_struct *work)
5584{
5585 struct ufs_hba *hba = container_of(to_delayed_work(work),
5586 struct ufs_hba,
5587 rpm_dev_flush_recheck_work);
5588 /*
5589 * To prevent unnecessary VCC power drain after device finishes
5590 * WriteBooster buffer flush or Auto BKOPs, force runtime resume
5591 * after a certain delay to recheck the threshold by next runtime
5592 * suspend.
5593 */
5594 pm_runtime_get_sync(hba->dev);
5595 pm_runtime_put_sync(hba->dev);
5596}
5597
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305598/**
5599 * ufshcd_exception_event_handler - handle exceptions raised by device
5600 * @work: pointer to work data
5601 *
5602 * Read bExceptionEventStatus attribute from the device and handle the
5603 * exception event accordingly.
5604 */
5605static void ufshcd_exception_event_handler(struct work_struct *work)
5606{
5607 struct ufs_hba *hba;
5608 int err;
5609 u32 status = 0;
5610 hba = container_of(work, struct ufs_hba, eeh_work);
5611
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305612 pm_runtime_get_sync(hba->dev);
Stanley Chu03e1d282019-12-24 21:01:05 +08005613 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305614 err = ufshcd_get_ee_status(hba, &status);
5615 if (err) {
5616 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5617 __func__, err);
5618 goto out;
5619 }
5620
Adrian Hunterf7733622021-02-09 08:24:34 +02005621 trace_ufshcd_exception_event(dev_name(hba->dev), status);
5622
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305623 status &= hba->ee_ctrl_mask;
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005624
5625 if (status & MASK_EE_URGENT_BKOPS)
5626 ufshcd_bkops_exception_event_handler(hba);
5627
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305628out:
Stanley Chu03e1d282019-12-24 21:01:05 +08005629 ufshcd_scsi_unblock_requests(hba);
Sayali Lokhande2824ec92020-02-10 19:40:44 -08005630 /*
5631 * pm_runtime_get_noresume is called while scheduling
5632 * eeh_work to avoid suspend racing with exception work.
5633 * Hence decrement usage counter using pm_runtime_put_noidle
5634 * to allow suspend on completion of exception event handler.
5635 */
5636 pm_runtime_put_noidle(hba->dev);
5637 pm_runtime_put(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305638 return;
5639}
5640
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005641/* Complete requests that have door-bell cleared */
5642static void ufshcd_complete_requests(struct ufs_hba *hba)
5643{
5644 ufshcd_transfer_req_compl(hba);
5645 ufshcd_tmc_handler(hba);
5646}
5647
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305648/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02005649 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5650 * to recover from the DL NAC errors or not.
5651 * @hba: per-adapter instance
5652 *
5653 * Returns true if error handling is required, false otherwise
5654 */
5655static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5656{
5657 unsigned long flags;
5658 bool err_handling = true;
5659
5660 spin_lock_irqsave(hba->host->host_lock, flags);
5661 /*
5662 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5663 * device fatal error and/or DL NAC & REPLAY timeout errors.
5664 */
5665 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5666 goto out;
5667
5668 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5669 ((hba->saved_err & UIC_ERROR) &&
5670 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5671 goto out;
5672
5673 if ((hba->saved_err & UIC_ERROR) &&
5674 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5675 int err;
5676 /*
5677 * wait for 50ms to see if we can get any other errors or not.
5678 */
5679 spin_unlock_irqrestore(hba->host->host_lock, flags);
5680 msleep(50);
5681 spin_lock_irqsave(hba->host->host_lock, flags);
5682
5683 /*
5684 * now check if we have got any other severe errors other than
5685 * DL NAC error?
5686 */
5687 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5688 ((hba->saved_err & UIC_ERROR) &&
5689 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5690 goto out;
5691
5692 /*
5693 * As DL NAC is the only error received so far, send out NOP
5694 * command to confirm if link is still active or not.
5695 * - If we don't get any response then do error recovery.
5696 * - If we get response then clear the DL NAC error bit.
5697 */
5698
5699 spin_unlock_irqrestore(hba->host->host_lock, flags);
5700 err = ufshcd_verify_dev_init(hba);
5701 spin_lock_irqsave(hba->host->host_lock, flags);
5702
5703 if (err)
5704 goto out;
5705
5706 /* Link seems to be alive hence ignore the DL NAC errors */
5707 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5708 hba->saved_err &= ~UIC_ERROR;
5709 /* clear NAC error */
5710 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
Bean Huob0008622020-08-14 11:50:34 +02005711 if (!hba->saved_uic_err)
Yaniv Gardi583fa622016-03-10 17:37:13 +02005712 err_handling = false;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005713 }
5714out:
5715 spin_unlock_irqrestore(hba->host->host_lock, flags);
5716 return err_handling;
5717}
5718
Can Guo4db7a232020-08-09 05:15:51 -07005719/* host lock must be held before calling this func */
5720static inline bool ufshcd_is_saved_err_fatal(struct ufs_hba *hba)
5721{
5722 return (hba->saved_uic_err & UFSHCD_UIC_DL_PA_INIT_ERROR) ||
5723 (hba->saved_err & (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK));
5724}
5725
5726/* host lock must be held before calling this func */
5727static inline void ufshcd_schedule_eh_work(struct ufs_hba *hba)
5728{
5729 /* handle fatal errors only when link is not in error state */
5730 if (hba->ufshcd_state != UFSHCD_STATE_ERROR) {
Can Guo5586dd82020-08-09 05:15:54 -07005731 if (hba->force_reset || ufshcd_is_link_broken(hba) ||
5732 ufshcd_is_saved_err_fatal(hba))
5733 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED_FATAL;
5734 else
5735 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED_NON_FATAL;
5736 queue_work(hba->eh_wq, &hba->eh_work);
Can Guo4db7a232020-08-09 05:15:51 -07005737 }
5738}
5739
Stanley Chu348e1bc2021-01-20 23:01:42 +08005740static void ufshcd_clk_scaling_allow(struct ufs_hba *hba, bool allow)
5741{
5742 down_write(&hba->clk_scaling_lock);
5743 hba->clk_scaling.is_allowed = allow;
5744 up_write(&hba->clk_scaling_lock);
5745}
5746
5747static void ufshcd_clk_scaling_suspend(struct ufs_hba *hba, bool suspend)
5748{
5749 if (suspend) {
5750 if (hba->clk_scaling.is_enabled)
5751 ufshcd_suspend_clkscaling(hba);
5752 ufshcd_clk_scaling_allow(hba, false);
5753 } else {
5754 ufshcd_clk_scaling_allow(hba, true);
5755 if (hba->clk_scaling.is_enabled)
5756 ufshcd_resume_clkscaling(hba);
5757 }
5758}
5759
Can Guoc72e79c2020-08-09 05:15:52 -07005760static void ufshcd_err_handling_prepare(struct ufs_hba *hba)
5761{
5762 pm_runtime_get_sync(hba->dev);
Can Guo88a92d62020-12-02 04:04:01 -08005763 if (pm_runtime_status_suspended(hba->dev) || hba->is_sys_suspended) {
5764 enum ufs_pm_op pm_op;
5765
Can Guoc72e79c2020-08-09 05:15:52 -07005766 /*
5767 * Don't assume anything of pm_runtime_get_sync(), if
5768 * resume fails, irq and clocks can be OFF, and powers
5769 * can be OFF or in LPM.
5770 */
5771 ufshcd_setup_hba_vreg(hba, true);
5772 ufshcd_enable_irq(hba);
5773 ufshcd_setup_vreg(hba, true);
5774 ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
5775 ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
5776 ufshcd_hold(hba, false);
5777 if (!ufshcd_is_clkgating_allowed(hba))
5778 ufshcd_setup_clocks(hba, true);
5779 ufshcd_release(hba);
Can Guo88a92d62020-12-02 04:04:01 -08005780 pm_op = hba->is_sys_suspended ? UFS_SYSTEM_PM : UFS_RUNTIME_PM;
5781 ufshcd_vops_resume(hba, pm_op);
Can Guoc72e79c2020-08-09 05:15:52 -07005782 } else {
5783 ufshcd_hold(hba, false);
Stanley Chu348e1bc2021-01-20 23:01:42 +08005784 if (ufshcd_is_clkscaling_supported(hba) &&
5785 hba->clk_scaling.is_enabled)
Can Guoc72e79c2020-08-09 05:15:52 -07005786 ufshcd_suspend_clkscaling(hba);
Stanley Chu348e1bc2021-01-20 23:01:42 +08005787 ufshcd_clk_scaling_allow(hba, false);
Can Guoc72e79c2020-08-09 05:15:52 -07005788 }
5789}
5790
5791static void ufshcd_err_handling_unprepare(struct ufs_hba *hba)
5792{
5793 ufshcd_release(hba);
Stanley Chu348e1bc2021-01-20 23:01:42 +08005794 if (ufshcd_is_clkscaling_supported(hba))
5795 ufshcd_clk_scaling_suspend(hba, false);
Can Guoc72e79c2020-08-09 05:15:52 -07005796 pm_runtime_put(hba->dev);
5797}
5798
5799static inline bool ufshcd_err_handling_should_stop(struct ufs_hba *hba)
5800{
Can Guo9cd20d32021-01-13 19:13:28 -08005801 return (!hba->is_powered || hba->shutting_down ||
5802 hba->ufshcd_state == UFSHCD_STATE_ERROR ||
Can Guoc72e79c2020-08-09 05:15:52 -07005803 (!(hba->saved_err || hba->saved_uic_err || hba->force_reset ||
Can Guo9cd20d32021-01-13 19:13:28 -08005804 ufshcd_is_link_broken(hba))));
Can Guoc72e79c2020-08-09 05:15:52 -07005805}
5806
5807#ifdef CONFIG_PM
5808static void ufshcd_recover_pm_error(struct ufs_hba *hba)
5809{
5810 struct Scsi_Host *shost = hba->host;
5811 struct scsi_device *sdev;
5812 struct request_queue *q;
5813 int ret;
5814
Can Guo88a92d62020-12-02 04:04:01 -08005815 hba->is_sys_suspended = false;
Can Guoc72e79c2020-08-09 05:15:52 -07005816 /*
5817 * Set RPM status of hba device to RPM_ACTIVE,
5818 * this also clears its runtime error.
5819 */
5820 ret = pm_runtime_set_active(hba->dev);
5821 /*
5822 * If hba device had runtime error, we also need to resume those
5823 * scsi devices under hba in case any of them has failed to be
5824 * resumed due to hba runtime resume failure. This is to unblock
5825 * blk_queue_enter in case there are bios waiting inside it.
5826 */
5827 if (!ret) {
5828 shost_for_each_device(sdev, shost) {
5829 q = sdev->request_queue;
5830 if (q->dev && (q->rpm_status == RPM_SUSPENDED ||
5831 q->rpm_status == RPM_SUSPENDING))
5832 pm_request_resume(q->dev);
5833 }
5834 }
5835}
5836#else
5837static inline void ufshcd_recover_pm_error(struct ufs_hba *hba)
5838{
5839}
5840#endif
5841
Can Guo2355b662020-08-24 19:07:06 -07005842static bool ufshcd_is_pwr_mode_restore_needed(struct ufs_hba *hba)
5843{
5844 struct ufs_pa_layer_attr *pwr_info = &hba->pwr_info;
5845 u32 mode;
5846
5847 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_PWRMODE), &mode);
5848
5849 if (pwr_info->pwr_rx != ((mode >> PWRMODE_RX_OFFSET) & PWRMODE_MASK))
5850 return true;
5851
5852 if (pwr_info->pwr_tx != (mode & PWRMODE_MASK))
5853 return true;
5854
5855 return false;
5856}
5857
Yaniv Gardi583fa622016-03-10 17:37:13 +02005858/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305859 * ufshcd_err_handler - handle UFS errors that require s/w attention
5860 * @work: pointer to work structure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305861 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305862static void ufshcd_err_handler(struct work_struct *work)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305863{
5864 struct ufs_hba *hba;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305865 unsigned long flags;
Can Guo307348f2020-08-24 19:07:05 -07005866 bool err_xfer = false;
5867 bool err_tm = false;
Can Guo2355b662020-08-24 19:07:06 -07005868 int err = 0, pmc_err;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305869 int tag;
Can Guo2355b662020-08-24 19:07:06 -07005870 bool needs_reset = false, needs_restore = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305871
5872 hba = container_of(work, struct ufs_hba, eh_work);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305873
Can Guo9cd20d32021-01-13 19:13:28 -08005874 down(&hba->host_sem);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305875 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guoc72e79c2020-08-09 05:15:52 -07005876 if (ufshcd_err_handling_should_stop(hba)) {
Can Guo4db7a232020-08-09 05:15:51 -07005877 if (hba->ufshcd_state != UFSHCD_STATE_ERROR)
5878 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5879 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guo9cd20d32021-01-13 19:13:28 -08005880 up(&hba->host_sem);
Can Guo4db7a232020-08-09 05:15:51 -07005881 return;
5882 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305883 ufshcd_set_eh_in_progress(hba);
Can Guo4db7a232020-08-09 05:15:51 -07005884 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guoc72e79c2020-08-09 05:15:52 -07005885 ufshcd_err_handling_prepare(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305886 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo5586dd82020-08-09 05:15:54 -07005887 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305888 hba->ufshcd_state = UFSHCD_STATE_RESET;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305889
5890 /* Complete requests that have door-bell cleared by h/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005891 ufshcd_complete_requests(hba);
Yaniv Gardi583fa622016-03-10 17:37:13 +02005892
Can Guo88a92d62020-12-02 04:04:01 -08005893 /*
5894 * A full reset and restore might have happened after preparation
5895 * is finished, double check whether we should stop.
5896 */
5897 if (ufshcd_err_handling_should_stop(hba))
5898 goto skip_err_handling;
5899
Yaniv Gardi583fa622016-03-10 17:37:13 +02005900 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5901 bool ret;
5902
5903 spin_unlock_irqrestore(hba->host->host_lock, flags);
5904 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5905 ret = ufshcd_quirk_dl_nac_errors(hba);
5906 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo88a92d62020-12-02 04:04:01 -08005907 if (!ret && ufshcd_err_handling_should_stop(hba))
Yaniv Gardi583fa622016-03-10 17:37:13 +02005908 goto skip_err_handling;
5909 }
Can Guo4db7a232020-08-09 05:15:51 -07005910
Can Guo2355b662020-08-24 19:07:06 -07005911 if ((hba->saved_err & (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK)) ||
5912 (hba->saved_uic_err &&
5913 (hba->saved_uic_err != UFSHCD_UIC_PA_GENERIC_ERROR))) {
Can Guoc3be8d1e2020-08-09 05:15:53 -07005914 bool pr_prdt = !!(hba->saved_err & SYSTEM_BUS_FATAL_ERROR);
5915
5916 spin_unlock_irqrestore(hba->host->host_lock, flags);
5917 ufshcd_print_host_state(hba);
5918 ufshcd_print_pwr_info(hba);
Stanley Chue965e5e2020-12-05 19:58:59 +08005919 ufshcd_print_evt_hist(hba);
Can Guoc3be8d1e2020-08-09 05:15:53 -07005920 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5921 ufshcd_print_trs(hba, hba->outstanding_reqs, pr_prdt);
5922 spin_lock_irqsave(hba->host->host_lock, flags);
5923 }
5924
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005925 /*
5926 * if host reset is required then skip clearing the pending
Can Guo2df74b62019-11-25 22:53:33 -08005927 * transfers forcefully because they will get cleared during
5928 * host reset and restore
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005929 */
Can Guo88a92d62020-12-02 04:04:01 -08005930 if (hba->force_reset || ufshcd_is_link_broken(hba) ||
5931 ufshcd_is_saved_err_fatal(hba) ||
5932 ((hba->saved_err & UIC_ERROR) &&
5933 (hba->saved_uic_err & (UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5934 UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))) {
5935 needs_reset = true;
Can Guo2355b662020-08-24 19:07:06 -07005936 goto do_reset;
Can Guo88a92d62020-12-02 04:04:01 -08005937 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005938
Can Guo2355b662020-08-24 19:07:06 -07005939 /*
5940 * If LINERESET was caught, UFS might have been put to PWM mode,
5941 * check if power mode restore is needed.
5942 */
5943 if (hba->saved_uic_err & UFSHCD_UIC_PA_GENERIC_ERROR) {
5944 hba->saved_uic_err &= ~UFSHCD_UIC_PA_GENERIC_ERROR;
5945 if (!hba->saved_uic_err)
5946 hba->saved_err &= ~UIC_ERROR;
5947 spin_unlock_irqrestore(hba->host->host_lock, flags);
5948 if (ufshcd_is_pwr_mode_restore_needed(hba))
5949 needs_restore = true;
5950 spin_lock_irqsave(hba->host->host_lock, flags);
5951 if (!hba->saved_err && !needs_restore)
5952 goto skip_err_handling;
5953 }
5954
5955 hba->silence_err_logs = true;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005956 /* release lock as clear command might sleep */
5957 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305958 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005959 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
Can Guo307348f2020-08-24 19:07:05 -07005960 if (ufshcd_try_to_abort_task(hba, tag)) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005961 err_xfer = true;
5962 goto lock_skip_pending_xfer_clear;
5963 }
5964 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305965
5966 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005967 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5968 if (ufshcd_clear_tm_cmd(hba, tag)) {
5969 err_tm = true;
5970 goto lock_skip_pending_xfer_clear;
5971 }
5972 }
5973
5974lock_skip_pending_xfer_clear:
5975 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305976
5977 /* Complete the requests that are cleared by s/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005978 ufshcd_complete_requests(hba);
Can Guo2355b662020-08-24 19:07:06 -07005979 hba->silence_err_logs = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305980
Can Guo2355b662020-08-24 19:07:06 -07005981 if (err_xfer || err_tm) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005982 needs_reset = true;
Can Guo2355b662020-08-24 19:07:06 -07005983 goto do_reset;
5984 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005985
Can Guo2355b662020-08-24 19:07:06 -07005986 /*
5987 * After all reqs and tasks are cleared from doorbell,
5988 * now it is safe to retore power mode.
5989 */
5990 if (needs_restore) {
5991 spin_unlock_irqrestore(hba->host->host_lock, flags);
5992 /*
5993 * Hold the scaling lock just in case dev cmds
5994 * are sent via bsg and/or sysfs.
5995 */
5996 down_write(&hba->clk_scaling_lock);
5997 hba->force_pmc = true;
5998 pmc_err = ufshcd_config_pwr_mode(hba, &(hba->pwr_info));
5999 if (pmc_err) {
6000 needs_reset = true;
6001 dev_err(hba->dev, "%s: Failed to restore power mode, err = %d\n",
6002 __func__, pmc_err);
6003 }
6004 hba->force_pmc = false;
6005 ufshcd_print_pwr_info(hba);
6006 up_write(&hba->clk_scaling_lock);
6007 spin_lock_irqsave(hba->host->host_lock, flags);
6008 }
6009
6010do_reset:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306011 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006012 if (needs_reset) {
6013 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
6014
6015 /*
6016 * ufshcd_reset_and_restore() does the link reinitialization
6017 * which will need atleast one empty doorbell slot to send the
6018 * device management commands (NOP and query commands).
6019 * If there is no slot empty at this moment then free up last
6020 * slot forcefully.
6021 */
6022 if (hba->outstanding_reqs == max_doorbells)
6023 __ufshcd_transfer_req_compl(hba,
6024 (1UL << (hba->nutrs - 1)));
6025
Can Guo4db7a232020-08-09 05:15:51 -07006026 hba->force_reset = false;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006027 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306028 err = ufshcd_reset_and_restore(hba);
Can Guo4db7a232020-08-09 05:15:51 -07006029 if (err)
6030 dev_err(hba->dev, "%s: reset and restore failed with err %d\n",
6031 __func__, err);
Can Guoc72e79c2020-08-09 05:15:52 -07006032 else
6033 ufshcd_recover_pm_error(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006034 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306035 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006036
Yaniv Gardi583fa622016-03-10 17:37:13 +02006037skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006038 if (!needs_reset) {
Can Guo4db7a232020-08-09 05:15:51 -07006039 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
6040 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006041 if (hba->saved_err || hba->saved_uic_err)
6042 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
6043 __func__, hba->saved_err, hba->saved_uic_err);
6044 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306045 ufshcd_clear_eh_in_progress(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006046 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani38135532018-05-03 16:37:18 +05306047 ufshcd_scsi_unblock_requests(hba);
Can Guoc72e79c2020-08-09 05:15:52 -07006048 ufshcd_err_handling_unprepare(hba);
Can Guo9cd20d32021-01-13 19:13:28 -08006049 up(&hba->host_sem);
Jaegeuk Kim4ee7ee52021-01-07 10:53:15 -08006050
6051 if (!err && needs_reset)
6052 ufshcd_clear_ua_wluns(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306053}
6054
6055/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306056 * ufshcd_update_uic_error - check and set fatal UIC error flags.
6057 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006058 *
6059 * Returns
6060 * IRQ_HANDLED - If interrupt is valid
6061 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306062 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006063static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306064{
6065 u32 reg;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006066 irqreturn_t retval = IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306067
Can Guo2355b662020-08-24 19:07:06 -07006068 /* PHY layer error */
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08006069 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08006070 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
Can Guo2355b662020-08-24 19:07:06 -07006071 (reg & UIC_PHY_ADAPTER_LAYER_ERROR_CODE_MASK)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006072 ufshcd_update_evt_hist(hba, UFS_EVT_PA_ERR, reg);
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08006073 /*
6074 * To know whether this error is fatal or not, DB timeout
6075 * must be checked but this error is handled separately.
6076 */
Can Guo2355b662020-08-24 19:07:06 -07006077 if (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)
6078 dev_dbg(hba->dev, "%s: UIC Lane error reported\n",
6079 __func__);
6080
6081 /* Got a LINERESET indication. */
6082 if (reg & UIC_PHY_ADAPTER_LAYER_GENERIC_ERROR) {
6083 struct uic_command *cmd = NULL;
6084
6085 hba->uic_error |= UFSHCD_UIC_PA_GENERIC_ERROR;
6086 if (hba->uic_async_done && hba->active_uic_cmd)
6087 cmd = hba->active_uic_cmd;
6088 /*
6089 * Ignore the LINERESET during power mode change
6090 * operation via DME_SET command.
6091 */
6092 if (cmd && (cmd->command == UIC_CMD_DME_SET))
6093 hba->uic_error &= ~UFSHCD_UIC_PA_GENERIC_ERROR;
6094 }
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006095 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006096 }
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08006097
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306098 /* PA_INIT_ERROR is fatal and needs UIC reset */
6099 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006100 if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
6101 (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006102 ufshcd_update_evt_hist(hba, UFS_EVT_DL_ERR, reg);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006103
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006104 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
6105 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
6106 else if (hba->dev_quirks &
6107 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
6108 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
6109 hba->uic_error |=
6110 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
6111 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
6112 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
6113 }
6114 retval |= IRQ_HANDLED;
Yaniv Gardi583fa622016-03-10 17:37:13 +02006115 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306116
6117 /* UIC NL/TL/DME errors needs software retry */
6118 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006119 if ((reg & UIC_NETWORK_LAYER_ERROR) &&
6120 (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006121 ufshcd_update_evt_hist(hba, UFS_EVT_NL_ERR, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306122 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006123 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006124 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306125
6126 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006127 if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
6128 (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006129 ufshcd_update_evt_hist(hba, UFS_EVT_TL_ERR, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306130 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006131 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006132 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306133
6134 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006135 if ((reg & UIC_DME_ERROR) &&
6136 (reg & UIC_DME_ERROR_CODE_MASK)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006137 ufshcd_update_evt_hist(hba, UFS_EVT_DME_ERR, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306138 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006139 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006140 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306141
6142 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
6143 __func__, hba->uic_error);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006144 return retval;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306145}
6146
Stanley Chu82174442019-05-21 14:44:54 +08006147static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
6148 u32 intr_mask)
6149{
Stanley Chu5a244e02020-01-29 18:52:50 +08006150 if (!ufshcd_is_auto_hibern8_supported(hba) ||
6151 !ufshcd_is_auto_hibern8_enabled(hba))
Stanley Chu82174442019-05-21 14:44:54 +08006152 return false;
6153
6154 if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
6155 return false;
6156
6157 if (hba->active_uic_cmd &&
6158 (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
6159 hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
6160 return false;
6161
6162 return true;
6163}
6164
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306165/**
6166 * ufshcd_check_errors - Check for errors that need s/w attention
6167 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006168 *
6169 * Returns
6170 * IRQ_HANDLED - If interrupt is valid
6171 * IRQ_NONE - If invalid interrupt
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306172 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006173static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306174{
6175 bool queue_eh_work = false;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006176 irqreturn_t retval = IRQ_NONE;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306177
Stanley Chud3c615b2019-07-10 21:38:19 +08006178 if (hba->errors & INT_FATAL_ERRORS) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006179 ufshcd_update_evt_hist(hba, UFS_EVT_FATAL_ERR,
6180 hba->errors);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306181 queue_eh_work = true;
Stanley Chud3c615b2019-07-10 21:38:19 +08006182 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306183
6184 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306185 hba->uic_error = 0;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006186 retval = ufshcd_update_uic_error(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306187 if (hba->uic_error)
6188 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306189 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306190
Stanley Chu82174442019-05-21 14:44:54 +08006191 if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
6192 dev_err(hba->dev,
6193 "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
6194 __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
6195 "Enter" : "Exit",
6196 hba->errors, ufshcd_get_upmcrs(hba));
Stanley Chue965e5e2020-12-05 19:58:59 +08006197 ufshcd_update_evt_hist(hba, UFS_EVT_AUTO_HIBERN8_ERR,
Stanley Chud3c615b2019-07-10 21:38:19 +08006198 hba->errors);
Can Guo4db7a232020-08-09 05:15:51 -07006199 ufshcd_set_link_broken(hba);
Stanley Chu82174442019-05-21 14:44:54 +08006200 queue_eh_work = true;
6201 }
6202
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306203 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006204 /*
6205 * update the transfer error masks to sticky bits, let's do this
6206 * irrespective of current ufshcd_state.
6207 */
6208 hba->saved_err |= hba->errors;
6209 hba->saved_uic_err |= hba->uic_error;
6210
Can Guo4db7a232020-08-09 05:15:51 -07006211 /* dump controller state before resetting */
Can Guoace38042020-12-02 04:04:03 -08006212 if ((hba->saved_err &
6213 (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK)) ||
Can Guo2355b662020-08-24 19:07:06 -07006214 (hba->saved_uic_err &&
6215 (hba->saved_uic_err != UFSHCD_UIC_PA_GENERIC_ERROR))) {
Can Guo4db7a232020-08-09 05:15:51 -07006216 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
Dolev Raviv66cc8202016-12-22 18:39:42 -08006217 __func__, hba->saved_err,
6218 hba->saved_uic_err);
Can Guoc3be8d1e2020-08-09 05:15:53 -07006219 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE,
6220 "host_regs: ");
Can Guo4db7a232020-08-09 05:15:51 -07006221 ufshcd_print_pwr_info(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306222 }
Can Guo4db7a232020-08-09 05:15:51 -07006223 ufshcd_schedule_eh_work(hba);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006224 retval |= IRQ_HANDLED;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306225 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306226 /*
6227 * if (!queue_eh_work) -
6228 * Other errors are either non-fatal where host recovers
6229 * itself without s/w intervention or errors that will be
6230 * handled by the SCSI core layer.
6231 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006232 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306233}
6234
Bart Van Assche69a6c262019-12-09 10:13:09 -08006235struct ctm_info {
6236 struct ufs_hba *hba;
6237 unsigned long pending;
6238 unsigned int ncpl;
6239};
6240
6241static bool ufshcd_compl_tm(struct request *req, void *priv, bool reserved)
6242{
6243 struct ctm_info *const ci = priv;
6244 struct completion *c;
6245
6246 WARN_ON_ONCE(reserved);
6247 if (test_bit(req->tag, &ci->pending))
6248 return true;
6249 ci->ncpl++;
6250 c = req->end_io_data;
6251 if (c)
6252 complete(c);
6253 return true;
6254}
6255
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306256/**
6257 * ufshcd_tmc_handler - handle task management function completion
6258 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006259 *
6260 * Returns
6261 * IRQ_HANDLED - If interrupt is valid
6262 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306263 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006264static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306265{
Bart Van Assche69a6c262019-12-09 10:13:09 -08006266 struct request_queue *q = hba->tmf_queue;
6267 struct ctm_info ci = {
6268 .hba = hba,
6269 .pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL),
6270 };
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306271
Bart Van Assche69a6c262019-12-09 10:13:09 -08006272 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_compl_tm, &ci);
6273 return ci.ncpl ? IRQ_HANDLED : IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306274}
6275
6276/**
6277 * ufshcd_sl_intr - Interrupt service routine
6278 * @hba: per adapter instance
6279 * @intr_status: contains interrupts generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006280 *
6281 * Returns
6282 * IRQ_HANDLED - If interrupt is valid
6283 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306284 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006285static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306286{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006287 irqreturn_t retval = IRQ_NONE;
6288
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306289 hba->errors = UFSHCD_ERROR_MASK & intr_status;
Stanley Chu82174442019-05-21 14:44:54 +08006290
6291 if (ufshcd_is_auto_hibern8_error(hba, intr_status))
6292 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
6293
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306294 if (hba->errors)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006295 retval |= ufshcd_check_errors(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306296
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05306297 if (intr_status & UFSHCD_UIC_MASK)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006298 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306299
6300 if (intr_status & UTP_TASK_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006301 retval |= ufshcd_tmc_handler(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306302
6303 if (intr_status & UTP_TRANSFER_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006304 retval |= ufshcd_transfer_req_compl(hba);
6305
6306 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306307}
6308
6309/**
6310 * ufshcd_intr - Main interrupt service routine
6311 * @irq: irq number
6312 * @__hba: pointer to adapter instance
6313 *
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006314 * Returns
6315 * IRQ_HANDLED - If interrupt is valid
6316 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306317 */
6318static irqreturn_t ufshcd_intr(int irq, void *__hba)
6319{
Adrian Hunter127d5f72020-08-11 16:39:36 +03006320 u32 intr_status, enabled_intr_status = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306321 irqreturn_t retval = IRQ_NONE;
6322 struct ufs_hba *hba = __hba;
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05306323 int retries = hba->nutrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306324
6325 spin_lock(hba->host->host_lock);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05306326 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Can Guo3f8af602020-08-09 05:15:50 -07006327 hba->ufs_stats.last_intr_status = intr_status;
6328 hba->ufs_stats.last_intr_ts = ktime_get();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306329
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05306330 /*
6331 * There could be max of hba->nutrs reqs in flight and in worst case
6332 * if the reqs get finished 1 by 1 after the interrupt status is
6333 * read, make sure we handle them by checking the interrupt status
6334 * again in a loop until we process all of the reqs before returning.
6335 */
Adrian Hunter127d5f72020-08-11 16:39:36 +03006336 while (intr_status && retries--) {
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05306337 enabled_intr_status =
6338 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
Bean Huo60ec3752021-01-18 21:12:33 +01006339 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006340 if (enabled_intr_status)
6341 retval |= ufshcd_sl_intr(hba, enabled_intr_status);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02006342
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05306343 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Adrian Hunter127d5f72020-08-11 16:39:36 +03006344 }
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05306345
Jaegeuk Kimeeb1b552021-01-07 10:53:16 -08006346 if (enabled_intr_status && retval == IRQ_NONE &&
6347 !ufshcd_eh_in_progress(hba)) {
6348 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x (0x%08x, 0x%08x)\n",
6349 __func__,
6350 intr_status,
6351 hba->ufs_stats.last_intr_status,
6352 enabled_intr_status);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006353 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
6354 }
6355
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306356 spin_unlock(hba->host->host_lock);
6357 return retval;
6358}
6359
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306360static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
6361{
6362 int err = 0;
6363 u32 mask = 1 << tag;
6364 unsigned long flags;
6365
6366 if (!test_bit(tag, &hba->outstanding_tasks))
6367 goto out;
6368
6369 spin_lock_irqsave(hba->host->host_lock, flags);
Alim Akhtar1399c5b2018-05-06 15:44:15 +05306370 ufshcd_utmrl_clear(hba, tag);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306371 spin_unlock_irqrestore(hba->host->host_lock, flags);
6372
6373 /* poll for max. 1 sec to clear door bell register by h/w */
6374 err = ufshcd_wait_for_register(hba,
6375 REG_UTP_TASK_REQ_DOOR_BELL,
Bart Van Assche5cac1092020-05-07 15:27:50 -07006376 mask, 0, 1000, 1000);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306377out:
6378 return err;
6379}
6380
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006381static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
6382 struct utp_task_req_desc *treq, u8 tm_function)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306383{
Bart Van Assche69a6c262019-12-09 10:13:09 -08006384 struct request_queue *q = hba->tmf_queue;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006385 struct Scsi_Host *host = hba->host;
Bart Van Assche69a6c262019-12-09 10:13:09 -08006386 DECLARE_COMPLETION_ONSTACK(wait);
6387 struct request *req;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306388 unsigned long flags;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006389 int free_slot, task_tag, err;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306390
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306391 /*
6392 * Get free slot, sleep if slots are unavailable.
6393 * Even though we use wait_event() which sleeps indefinitely,
6394 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
6395 */
Jaegeuk Kimeeb1b552021-01-07 10:53:16 -08006396 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
6397 if (IS_ERR(req))
6398 return PTR_ERR(req);
6399
Bart Van Assche69a6c262019-12-09 10:13:09 -08006400 req->end_io_data = &wait;
6401 free_slot = req->tag;
6402 WARN_ON_ONCE(free_slot < 0 || free_slot >= hba->nutmrs);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006403 ufshcd_hold(hba, false);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306404
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306405 spin_lock_irqsave(host->host_lock, flags);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306406 task_tag = hba->nutrs + free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306407
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006408 treq->req_header.dword_0 |= cpu_to_be32(task_tag);
6409
6410 memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
Kiwoong Kimd2877be2016-11-10 21:16:15 +09006411 ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
6412
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306413 /* send command to the controller */
6414 __set_bit(free_slot, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02006415
6416 /* Make sure descriptors are ready before ringing the task doorbell */
6417 wmb();
6418
Seungwon Jeonb873a2752013-06-26 22:39:26 +05306419 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07006420 /* Make sure that doorbell is committed immediately */
6421 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306422
6423 spin_unlock_irqrestore(host->host_lock, flags);
6424
Bean Huo28fa68f2021-01-05 12:34:42 +01006425 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_SEND);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03006426
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306427 /* wait until the task management command is completed */
Bart Van Assche69a6c262019-12-09 10:13:09 -08006428 err = wait_for_completion_io_timeout(&wait,
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306429 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306430 if (!err) {
Bart Van Assche69a6c262019-12-09 10:13:09 -08006431 /*
6432 * Make sure that ufshcd_compl_tm() does not trigger a
6433 * use-after-free.
6434 */
6435 req->end_io_data = NULL;
Bean Huo28fa68f2021-01-05 12:34:42 +01006436 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_ERR);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306437 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
6438 __func__, tm_function);
6439 if (ufshcd_clear_tm_cmd(hba, free_slot))
6440 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
6441 __func__, free_slot);
6442 err = -ETIMEDOUT;
6443 } else {
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006444 err = 0;
6445 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));
6446
Bean Huo28fa68f2021-01-05 12:34:42 +01006447 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_COMP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306448 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306449
Stanley Chub5572172019-08-19 21:43:28 +08006450 spin_lock_irqsave(hba->host->host_lock, flags);
6451 __clear_bit(free_slot, &hba->outstanding_tasks);
6452 spin_unlock_irqrestore(hba->host->host_lock, flags);
6453
Bart Van Assche69a6c262019-12-09 10:13:09 -08006454 blk_put_request(req);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306455
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006456 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306457 return err;
6458}
6459
6460/**
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006461 * ufshcd_issue_tm_cmd - issues task management commands to controller
6462 * @hba: per adapter instance
6463 * @lun_id: LUN ID to which TM command is sent
6464 * @task_id: task ID to which the TM command is applicable
6465 * @tm_function: task management function opcode
6466 * @tm_response: task management service response return value
6467 *
6468 * Returns non-zero value on error, zero on success.
6469 */
6470static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
6471 u8 tm_function, u8 *tm_response)
6472{
6473 struct utp_task_req_desc treq = { { 0 }, };
6474 int ocs_value, err;
6475
6476 /* Configure task request descriptor */
6477 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6478 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6479
6480 /* Configure task request UPIU */
6481 treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
6482 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
6483 treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);
6484
6485 /*
6486 * The host shall provide the same value for LUN field in the basic
6487 * header and for Input Parameter.
6488 */
6489 treq.input_param1 = cpu_to_be32(lun_id);
6490 treq.input_param2 = cpu_to_be32(task_id);
6491
6492 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
6493 if (err == -ETIMEDOUT)
6494 return err;
6495
6496 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6497 if (ocs_value != OCS_SUCCESS)
6498 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
6499 __func__, ocs_value);
6500 else if (tm_response)
6501 *tm_response = be32_to_cpu(treq.output_param1) &
6502 MASK_TM_SERVICE_RESP;
6503 return err;
6504}
6505
6506/**
Avri Altman5e0a86e2018-10-07 17:30:37 +03006507 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
6508 * @hba: per-adapter instance
6509 * @req_upiu: upiu request
6510 * @rsp_upiu: upiu reply
Avri Altman5e0a86e2018-10-07 17:30:37 +03006511 * @desc_buff: pointer to descriptor buffer, NULL if NA
6512 * @buff_len: descriptor size, 0 if NA
Bart Van Assched0e97602019-10-29 16:07:08 -07006513 * @cmd_type: specifies the type (NOP, Query...)
Avri Altman5e0a86e2018-10-07 17:30:37 +03006514 * @desc_op: descriptor operation
6515 *
6516 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
6517 * Therefore, it "rides" the device management infrastructure: uses its tag and
6518 * tasks work queues.
6519 *
6520 * Since there is only one available tag for device management commands,
6521 * the caller is expected to hold the hba->dev_cmd.lock mutex.
6522 */
6523static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
6524 struct utp_upiu_req *req_upiu,
6525 struct utp_upiu_req *rsp_upiu,
6526 u8 *desc_buff, int *buff_len,
Bart Van Assche7f674c32019-10-29 16:07:09 -07006527 enum dev_cmd_type cmd_type,
Avri Altman5e0a86e2018-10-07 17:30:37 +03006528 enum query_opcode desc_op)
6529{
Bart Van Assche7252a362019-12-09 10:13:08 -08006530 struct request_queue *q = hba->cmd_queue;
6531 struct request *req;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006532 struct ufshcd_lrb *lrbp;
6533 int err = 0;
6534 int tag;
6535 struct completion wait;
6536 unsigned long flags;
Bean Huoa23064c2020-07-06 14:39:36 +02006537 u8 upiu_flags;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006538
6539 down_read(&hba->clk_scaling_lock);
6540
Bart Van Assche7252a362019-12-09 10:13:08 -08006541 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03006542 if (IS_ERR(req)) {
6543 err = PTR_ERR(req);
6544 goto out_unlock;
6545 }
Bart Van Assche7252a362019-12-09 10:13:08 -08006546 tag = req->tag;
6547 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
Avri Altman5e0a86e2018-10-07 17:30:37 +03006548
6549 init_completion(&wait);
6550 lrbp = &hba->lrb[tag];
Can Guo7a7e66c2020-12-02 04:04:02 -08006551 if (unlikely(lrbp->in_use)) {
6552 err = -EBUSY;
6553 goto out;
6554 }
Avri Altman5e0a86e2018-10-07 17:30:37 +03006555
Can Guo7a7e66c2020-12-02 04:04:02 -08006556 WARN_ON(lrbp->cmd);
Avri Altman5e0a86e2018-10-07 17:30:37 +03006557 lrbp->cmd = NULL;
6558 lrbp->sense_bufflen = 0;
6559 lrbp->sense_buffer = NULL;
6560 lrbp->task_tag = tag;
6561 lrbp->lun = 0;
6562 lrbp->intr_cmd = true;
Satya Tangiraladf043c742020-07-06 20:04:14 +00006563 ufshcd_prepare_lrbp_crypto(NULL, lrbp);
Avri Altman5e0a86e2018-10-07 17:30:37 +03006564 hba->dev_cmd.type = cmd_type;
6565
6566 switch (hba->ufs_version) {
6567 case UFSHCI_VERSION_10:
6568 case UFSHCI_VERSION_11:
6569 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
6570 break;
6571 default:
6572 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
6573 break;
6574 }
6575
6576 /* update the task tag in the request upiu */
6577 req_upiu->header.dword_0 |= cpu_to_be32(tag);
6578
6579 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
6580
6581 /* just copy the upiu request as it is */
6582 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
6583 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
6584 /* The Data Segment Area is optional depending upon the query
6585 * function value. for WRITE DESCRIPTOR, the data segment
6586 * follows right after the tsf.
6587 */
6588 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
6589 *buff_len = 0;
6590 }
6591
6592 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
6593
6594 hba->dev_cmd.complete = &wait;
6595
6596 /* Make sure descriptors are ready before ringing the doorbell */
6597 wmb();
6598 spin_lock_irqsave(hba->host->host_lock, flags);
6599 ufshcd_send_command(hba, tag);
6600 spin_unlock_irqrestore(hba->host->host_lock, flags);
6601
6602 /*
6603 * ignore the returning value here - ufshcd_check_query_response is
6604 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
6605 * read the response directly ignoring all errors.
6606 */
6607 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
6608
6609 /* just copy the upiu response as it is */
6610 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
Avri Altman4bbbe242019-02-20 09:11:13 +02006611 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
6612 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
6613 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
6614 MASK_QUERY_DATA_SEG_LEN;
6615
6616 if (*buff_len >= resp_len) {
6617 memcpy(desc_buff, descp, resp_len);
6618 *buff_len = resp_len;
6619 } else {
Bean Huo3d4881d2019-11-12 23:34:35 +01006620 dev_warn(hba->dev,
6621 "%s: rsp size %d is bigger than buffer size %d",
6622 __func__, resp_len, *buff_len);
Avri Altman4bbbe242019-02-20 09:11:13 +02006623 *buff_len = 0;
6624 err = -EINVAL;
6625 }
6626 }
Avri Altman5e0a86e2018-10-07 17:30:37 +03006627
Can Guo7a7e66c2020-12-02 04:04:02 -08006628out:
Bart Van Assche7252a362019-12-09 10:13:08 -08006629 blk_put_request(req);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03006630out_unlock:
Avri Altman5e0a86e2018-10-07 17:30:37 +03006631 up_read(&hba->clk_scaling_lock);
6632 return err;
6633}
6634
6635/**
6636 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
6637 * @hba: per-adapter instance
6638 * @req_upiu: upiu request
6639 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
6640 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
6641 * @desc_buff: pointer to descriptor buffer, NULL if NA
6642 * @buff_len: descriptor size, 0 if NA
6643 * @desc_op: descriptor operation
6644 *
6645 * Supports UTP Transfer requests (nop and query), and UTP Task
6646 * Management requests.
6647 * It is up to the caller to fill the upiu conent properly, as it will
6648 * be copied without any further input validations.
6649 */
6650int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
6651 struct utp_upiu_req *req_upiu,
6652 struct utp_upiu_req *rsp_upiu,
6653 int msgcode,
6654 u8 *desc_buff, int *buff_len,
6655 enum query_opcode desc_op)
6656{
6657 int err;
Bart Van Assche7f674c32019-10-29 16:07:09 -07006658 enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006659 struct utp_task_req_desc treq = { { 0 }, };
6660 int ocs_value;
6661 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
6662
Avri Altman5e0a86e2018-10-07 17:30:37 +03006663 switch (msgcode) {
6664 case UPIU_TRANSACTION_NOP_OUT:
6665 cmd_type = DEV_CMD_TYPE_NOP;
Gustavo A. R. Silvadf561f662020-08-23 17:36:59 -05006666 fallthrough;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006667 case UPIU_TRANSACTION_QUERY_REQ:
6668 ufshcd_hold(hba, false);
6669 mutex_lock(&hba->dev_cmd.lock);
6670 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
6671 desc_buff, buff_len,
6672 cmd_type, desc_op);
6673 mutex_unlock(&hba->dev_cmd.lock);
6674 ufshcd_release(hba);
6675
6676 break;
6677 case UPIU_TRANSACTION_TASK_REQ:
6678 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6679 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6680
6681 memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));
6682
6683 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
6684 if (err == -ETIMEDOUT)
6685 break;
6686
6687 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6688 if (ocs_value != OCS_SUCCESS) {
6689 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
6690 ocs_value);
6691 break;
6692 }
6693
6694 memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));
6695
6696 break;
6697 default:
6698 err = -EINVAL;
6699
6700 break;
6701 }
6702
Avri Altman5e0a86e2018-10-07 17:30:37 +03006703 return err;
6704}
6705
6706/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306707 * ufshcd_eh_device_reset_handler - device reset handler registered to
6708 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306709 * @cmd: SCSI command pointer
6710 *
6711 * Returns SUCCESS/FAILED
6712 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306713static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306714{
6715 struct Scsi_Host *host;
6716 struct ufs_hba *hba;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306717 u32 pos;
6718 int err;
Can Guo35fc4cd2020-12-28 04:04:36 -08006719 u8 resp = 0xF, lun;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306720 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306721
6722 host = cmd->device->host;
6723 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306724
Can Guo35fc4cd2020-12-28 04:04:36 -08006725 lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
6726 err = ufshcd_issue_tm_cmd(hba, lun, 0, UFS_LOGICAL_RESET, &resp);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306727 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306728 if (!err)
6729 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306730 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306731 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306732
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306733 /* clear the commands that were pending for corresponding LUN */
6734 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
Can Guo35fc4cd2020-12-28 04:04:36 -08006735 if (hba->lrb[pos].lun == lun) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306736 err = ufshcd_clear_cmd(hba, pos);
6737 if (err)
6738 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306739 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306740 }
6741 spin_lock_irqsave(host->host_lock, flags);
6742 ufshcd_transfer_req_compl(hba);
6743 spin_unlock_irqrestore(host->host_lock, flags);
Gilad Broner7fabb772017-02-03 16:56:50 -08006744
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306745out:
Gilad Broner7fabb772017-02-03 16:56:50 -08006746 hba->req_abort_count = 0;
Stanley Chue965e5e2020-12-05 19:58:59 +08006747 ufshcd_update_evt_hist(hba, UFS_EVT_DEV_RESET, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306748 if (!err) {
6749 err = SUCCESS;
6750 } else {
6751 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6752 err = FAILED;
6753 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306754 return err;
6755}
6756
Gilad Bronere0b299e2017-02-03 16:56:40 -08006757static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6758{
6759 struct ufshcd_lrb *lrbp;
6760 int tag;
6761
6762 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6763 lrbp = &hba->lrb[tag];
6764 lrbp->req_abort_skip = true;
6765 }
6766}
6767
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306768/**
Can Guo307348f2020-08-24 19:07:05 -07006769 * ufshcd_try_to_abort_task - abort a specific task
Lee Jonesd23ec0b2020-11-02 14:23:51 +00006770 * @hba: Pointer to adapter instance
6771 * @tag: Task tag/index to be aborted
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306772 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306773 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6774 * command, and in host controller by clearing the door-bell register. There can
6775 * be race between controller sending the command to the device while abort is
6776 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6777 * really issued and then try to abort it.
6778 *
Can Guo307348f2020-08-24 19:07:05 -07006779 * Returns zero on success, non-zero on failure
6780 */
6781static int ufshcd_try_to_abort_task(struct ufs_hba *hba, int tag)
6782{
6783 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
6784 int err = 0;
6785 int poll_cnt;
6786 u8 resp = 0xF;
6787 u32 reg;
6788
6789 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6790 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6791 UFS_QUERY_TASK, &resp);
6792 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6793 /* cmd pending in the device */
6794 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6795 __func__, tag);
6796 break;
6797 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6798 /*
6799 * cmd not pending in the device, check if it is
6800 * in transition.
6801 */
6802 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6803 __func__, tag);
6804 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6805 if (reg & (1 << tag)) {
6806 /* sleep for max. 200us to stabilize */
6807 usleep_range(100, 200);
6808 continue;
6809 }
6810 /* command completed already */
6811 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6812 __func__, tag);
6813 goto out;
6814 } else {
6815 dev_err(hba->dev,
6816 "%s: no response from device. tag = %d, err %d\n",
6817 __func__, tag, err);
6818 if (!err)
6819 err = resp; /* service response error */
6820 goto out;
6821 }
6822 }
6823
6824 if (!poll_cnt) {
6825 err = -EBUSY;
6826 goto out;
6827 }
6828
6829 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6830 UFS_ABORT_TASK, &resp);
6831 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6832 if (!err) {
6833 err = resp; /* service response error */
6834 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6835 __func__, tag, err);
6836 }
6837 goto out;
6838 }
6839
6840 err = ufshcd_clear_cmd(hba, tag);
6841 if (err)
6842 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6843 __func__, tag, err);
6844
6845out:
6846 return err;
6847}
6848
6849/**
6850 * ufshcd_abort - scsi host template eh_abort_handler callback
6851 * @cmd: SCSI command pointer
6852 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306853 * Returns SUCCESS/FAILED
6854 */
6855static int ufshcd_abort(struct scsi_cmnd *cmd)
6856{
6857 struct Scsi_Host *host;
6858 struct ufs_hba *hba;
6859 unsigned long flags;
6860 unsigned int tag;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306861 int err = 0;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306862 struct ufshcd_lrb *lrbp;
Dolev Ravive9d501b2014-07-01 12:22:37 +03006863 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306864
6865 host = cmd->device->host;
6866 hba = shost_priv(host);
6867 tag = cmd->request->tag;
Dolev Ravive7d38252016-12-22 18:40:07 -08006868 lrbp = &hba->lrb[tag];
Yaniv Gardi14497322016-02-01 15:02:39 +02006869 if (!ufshcd_valid_tag(hba, tag)) {
6870 dev_err(hba->dev,
6871 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
6872 __func__, tag, cmd, cmd->request);
6873 BUG();
6874 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306875
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006876 ufshcd_hold(hba, false);
Dolev Ravive9d501b2014-07-01 12:22:37 +03006877 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Yaniv Gardi14497322016-02-01 15:02:39 +02006878 /* If command is already aborted/completed, return SUCCESS */
6879 if (!(test_bit(tag, &hba->outstanding_reqs))) {
6880 dev_err(hba->dev,
6881 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
6882 __func__, tag, hba->outstanding_reqs, reg);
6883 goto out;
6884 }
6885
Dolev Raviv66cc8202016-12-22 18:39:42 -08006886 /* Print Transfer Request of aborted task */
Bean Huod87a1f62020-08-11 16:18:59 +02006887 dev_info(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
Dolev Raviv66cc8202016-12-22 18:39:42 -08006888
Gilad Broner7fabb772017-02-03 16:56:50 -08006889 /*
6890 * Print detailed info about aborted request.
6891 * As more than one request might get aborted at the same time,
6892 * print full information only for the first aborted request in order
6893 * to reduce repeated printouts. For other aborted requests only print
6894 * basic details.
6895 */
Can Guo7a7e66c2020-12-02 04:04:02 -08006896 scsi_print_command(cmd);
Gilad Broner7fabb772017-02-03 16:56:50 -08006897 if (!hba->req_abort_count) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006898 ufshcd_update_evt_hist(hba, UFS_EVT_ABORT, tag);
6899 ufshcd_print_evt_hist(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08006900 ufshcd_print_host_state(hba);
Gilad Broner7fabb772017-02-03 16:56:50 -08006901 ufshcd_print_pwr_info(hba);
6902 ufshcd_print_trs(hba, 1 << tag, true);
6903 } else {
6904 ufshcd_print_trs(hba, 1 << tag, false);
6905 }
6906 hba->req_abort_count++;
Gilad Bronere0b299e2017-02-03 16:56:40 -08006907
Bean Huod87a1f62020-08-11 16:18:59 +02006908 if (!(reg & (1 << tag))) {
6909 dev_err(hba->dev,
6910 "%s: cmd was completed, but without a notifying intr, tag = %d",
6911 __func__, tag);
6912 goto cleanup;
6913 }
6914
Can Guo7a7e66c2020-12-02 04:04:02 -08006915 /*
6916 * Task abort to the device W-LUN is illegal. When this command
6917 * will fail, due to spec violation, scsi err handling next step
6918 * will be to send LU reset which, again, is a spec violation.
6919 * To avoid these unnecessary/illegal steps, first we clean up
6920 * the lrb taken by this cmd and mark the lrb as in_use, then
6921 * queue the eh_work and bail.
6922 */
6923 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN) {
6924 ufshcd_update_evt_hist(hba, UFS_EVT_ABORT, lrbp->lun);
6925 spin_lock_irqsave(host->host_lock, flags);
6926 if (lrbp->cmd) {
6927 __ufshcd_transfer_req_compl(hba, (1UL << tag));
6928 __set_bit(tag, &hba->outstanding_reqs);
6929 lrbp->in_use = true;
6930 hba->force_reset = true;
6931 ufshcd_schedule_eh_work(hba);
6932 }
6933
6934 spin_unlock_irqrestore(host->host_lock, flags);
6935 goto out;
6936 }
6937
Gilad Bronere0b299e2017-02-03 16:56:40 -08006938 /* Skip task abort in case previous aborts failed and report failure */
Martin K. Petersen02f74152020-09-15 11:24:32 -04006939 if (lrbp->req_abort_skip)
Gilad Bronere0b299e2017-02-03 16:56:40 -08006940 err = -EIO;
Martin K. Petersen02f74152020-09-15 11:24:32 -04006941 else
6942 err = ufshcd_try_to_abort_task(hba, tag);
Gilad Bronere0b299e2017-02-03 16:56:40 -08006943
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306944 if (!err) {
Martin K. Petersen02f74152020-09-15 11:24:32 -04006945cleanup:
6946 spin_lock_irqsave(host->host_lock, flags);
6947 __ufshcd_transfer_req_compl(hba, (1UL << tag));
6948 spin_unlock_irqrestore(host->host_lock, flags);
6949out:
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306950 err = SUCCESS;
6951 } else {
6952 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Gilad Bronere0b299e2017-02-03 16:56:40 -08006953 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306954 err = FAILED;
6955 }
6956
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006957 /*
6958 * This ufshcd_release() corresponds to the original scsi cmd that got
6959 * aborted here (as we won't get any IRQ for it).
6960 */
6961 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306962 return err;
6963}
6964
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306965/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306966 * ufshcd_host_reset_and_restore - reset and restore host controller
6967 * @hba: per-adapter instance
6968 *
6969 * Note that host controller reset may issue DME_RESET to
6970 * local and remote (device) Uni-Pro stack and the attributes
6971 * are reset to default state.
6972 *
6973 * Returns zero on success, non-zero on failure
6974 */
6975static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6976{
6977 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306978 unsigned long flags;
6979
Can Guo2df74b62019-11-25 22:53:33 -08006980 /*
6981 * Stop the host controller and complete the requests
6982 * cleared by h/w
6983 */
Bart Van Assche5cac1092020-05-07 15:27:50 -07006984 ufshcd_hba_stop(hba);
6985
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306986 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo2df74b62019-11-25 22:53:33 -08006987 hba->silence_err_logs = true;
6988 ufshcd_complete_requests(hba);
6989 hba->silence_err_logs = false;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306990 spin_unlock_irqrestore(hba->host->host_lock, flags);
6991
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08006992 /* scale up clocks to max frequency before full reinitialization */
Subhash Jadavani394b9492020-03-26 02:25:40 -07006993 ufshcd_set_clk_freq(hba, true);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08006994
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306995 err = ufshcd_hba_enable(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306996
6997 /* Establish the link again and restore the device */
Randall Huang19186512020-11-30 20:14:02 -08006998 if (!err)
Jaegeuk Kim4ee7ee52021-01-07 10:53:15 -08006999 err = ufshcd_probe_hba(hba, false);
7000
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307001 if (err)
7002 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
Stanley Chue965e5e2020-12-05 19:58:59 +08007003 ufshcd_update_evt_hist(hba, UFS_EVT_HOST_RESET, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307004 return err;
7005}
7006
7007/**
7008 * ufshcd_reset_and_restore - reset and re-initialize host/device
7009 * @hba: per-adapter instance
7010 *
7011 * Reset and recover device, host and re-establish link. This
7012 * is helpful to recover the communication in fatal error conditions.
7013 *
7014 * Returns zero on success, non-zero on failure
7015 */
7016static int ufshcd_reset_and_restore(struct ufs_hba *hba)
7017{
Can Guo4db7a232020-08-09 05:15:51 -07007018 u32 saved_err;
7019 u32 saved_uic_err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307020 int err = 0;
Can Guo4db7a232020-08-09 05:15:51 -07007021 unsigned long flags;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007022 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307023
Can Guo4db7a232020-08-09 05:15:51 -07007024 /*
7025 * This is a fresh start, cache and clear saved error first,
7026 * in case new error generated during reset and restore.
7027 */
7028 spin_lock_irqsave(hba->host->host_lock, flags);
7029 saved_err = hba->saved_err;
7030 saved_uic_err = hba->saved_uic_err;
7031 hba->saved_err = 0;
7032 hba->saved_uic_err = 0;
7033 spin_unlock_irqrestore(hba->host->host_lock, flags);
7034
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007035 do {
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07007036 /* Reset the attached device */
Stanley Chu31a5d9c2020-12-08 21:56:35 +08007037 ufshcd_device_reset(hba);
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07007038
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007039 err = ufshcd_host_reset_and_restore(hba);
7040 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307041
Can Guo4db7a232020-08-09 05:15:51 -07007042 spin_lock_irqsave(hba->host->host_lock, flags);
7043 /*
7044 * Inform scsi mid-layer that we did reset and allow to handle
7045 * Unit Attention properly.
7046 */
7047 scsi_report_bus_reset(hba->host, 0);
7048 if (err) {
Can Guo88a92d62020-12-02 04:04:01 -08007049 hba->ufshcd_state = UFSHCD_STATE_ERROR;
Can Guo4db7a232020-08-09 05:15:51 -07007050 hba->saved_err |= saved_err;
7051 hba->saved_uic_err |= saved_uic_err;
7052 }
7053 spin_unlock_irqrestore(hba->host->host_lock, flags);
7054
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307055 return err;
7056}
7057
7058/**
7059 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
Bart Van Assche8aa29f12018-03-01 15:07:20 -08007060 * @cmd: SCSI command pointer
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307061 *
7062 * Returns SUCCESS/FAILED
7063 */
7064static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
7065{
Can Guo4db7a232020-08-09 05:15:51 -07007066 int err = SUCCESS;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307067 unsigned long flags;
7068 struct ufs_hba *hba;
7069
7070 hba = shost_priv(cmd->device->host);
7071
Can Guo4db7a232020-08-09 05:15:51 -07007072 spin_lock_irqsave(hba->host->host_lock, flags);
7073 hba->force_reset = true;
7074 ufshcd_schedule_eh_work(hba);
7075 dev_err(hba->dev, "%s: reset in progress - 1\n", __func__);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307076 spin_unlock_irqrestore(hba->host->host_lock, flags);
7077
Can Guo4db7a232020-08-09 05:15:51 -07007078 flush_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307079
7080 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo4db7a232020-08-09 05:15:51 -07007081 if (hba->ufshcd_state == UFSHCD_STATE_ERROR)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307082 err = FAILED;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307083 spin_unlock_irqrestore(hba->host->host_lock, flags);
7084
7085 return err;
7086}
7087
7088/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007089 * ufshcd_get_max_icc_level - calculate the ICC level
7090 * @sup_curr_uA: max. current supported by the regulator
7091 * @start_scan: row at the desc table to start scan from
7092 * @buff: power descriptor buffer
7093 *
7094 * Returns calculated max ICC level for specific regulator
7095 */
7096static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
7097{
7098 int i;
7099 int curr_uA;
7100 u16 data;
7101 u16 unit;
7102
7103 for (i = start_scan; i >= 0; i--) {
Tomas Winklerd79713f2017-01-05 10:45:11 +02007104 data = be16_to_cpup((__be16 *)&buff[2 * i]);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007105 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
7106 ATTR_ICC_LVL_UNIT_OFFSET;
7107 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
7108 switch (unit) {
7109 case UFSHCD_NANO_AMP:
7110 curr_uA = curr_uA / 1000;
7111 break;
7112 case UFSHCD_MILI_AMP:
7113 curr_uA = curr_uA * 1000;
7114 break;
7115 case UFSHCD_AMP:
7116 curr_uA = curr_uA * 1000 * 1000;
7117 break;
7118 case UFSHCD_MICRO_AMP:
7119 default:
7120 break;
7121 }
7122 if (sup_curr_uA >= curr_uA)
7123 break;
7124 }
7125 if (i < 0) {
7126 i = 0;
7127 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
7128 }
7129
7130 return (u32)i;
7131}
7132
7133/**
7134 * ufshcd_calc_icc_level - calculate the max ICC level
7135 * In case regulators are not initialized we'll return 0
7136 * @hba: per-adapter instance
7137 * @desc_buf: power descriptor buffer to extract ICC levels from.
7138 * @len: length of desc_buff
7139 *
7140 * Returns calculated ICC level
7141 */
7142static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
7143 u8 *desc_buf, int len)
7144{
7145 u32 icc_level = 0;
7146
7147 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
7148 !hba->vreg_info.vccq2) {
7149 dev_err(hba->dev,
7150 "%s: Regulator capability was not set, actvIccLevel=%d",
7151 __func__, icc_level);
7152 goto out;
7153 }
7154
Stanley Chu0487fff2019-03-28 17:16:25 +08007155 if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007156 icc_level = ufshcd_get_max_icc_level(
7157 hba->vreg_info.vcc->max_uA,
7158 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
7159 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
7160
Stanley Chu0487fff2019-03-28 17:16:25 +08007161 if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007162 icc_level = ufshcd_get_max_icc_level(
7163 hba->vreg_info.vccq->max_uA,
7164 icc_level,
7165 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
7166
Stanley Chu0487fff2019-03-28 17:16:25 +08007167 if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007168 icc_level = ufshcd_get_max_icc_level(
7169 hba->vreg_info.vccq2->max_uA,
7170 icc_level,
7171 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
7172out:
7173 return icc_level;
7174}
7175
Can Guoe89860f2020-03-26 02:25:41 -07007176static void ufshcd_set_active_icc_lvl(struct ufs_hba *hba)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007177{
7178 int ret;
Bean Huo7a0bf852020-06-03 11:19:58 +02007179 int buff_len = hba->desc_size[QUERY_DESC_IDN_POWER];
Kees Cookbbe21d72018-05-02 16:58:09 -07007180 u8 *desc_buf;
Can Guoe89860f2020-03-26 02:25:41 -07007181 u32 icc_level;
Kees Cookbbe21d72018-05-02 16:58:09 -07007182
7183 desc_buf = kmalloc(buff_len, GFP_KERNEL);
7184 if (!desc_buf)
7185 return;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007186
Bean Huoc4607a02020-06-03 11:19:56 +02007187 ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_POWER, 0, 0,
7188 desc_buf, buff_len);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007189 if (ret) {
7190 dev_err(hba->dev,
7191 "%s: Failed reading power descriptor.len = %d ret = %d",
7192 __func__, buff_len, ret);
Kees Cookbbe21d72018-05-02 16:58:09 -07007193 goto out;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007194 }
7195
Can Guoe89860f2020-03-26 02:25:41 -07007196 icc_level = ufshcd_find_max_sup_active_icc_level(hba, desc_buf,
7197 buff_len);
7198 dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007199
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02007200 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Can Guoe89860f2020-03-26 02:25:41 -07007201 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, &icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007202
7203 if (ret)
7204 dev_err(hba->dev,
7205 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
Can Guoe89860f2020-03-26 02:25:41 -07007206 __func__, icc_level, ret);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007207
Kees Cookbbe21d72018-05-02 16:58:09 -07007208out:
7209 kfree(desc_buf);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007210}
7211
Can Guofb276f72020-03-25 18:09:59 -07007212static inline void ufshcd_blk_pm_runtime_init(struct scsi_device *sdev)
7213{
7214 scsi_autopm_get_device(sdev);
7215 blk_pm_runtime_init(sdev->request_queue, &sdev->sdev_gendev);
7216 if (sdev->rpm_autosuspend)
7217 pm_runtime_set_autosuspend_delay(&sdev->sdev_gendev,
7218 RPM_AUTOSUSPEND_DELAY_MS);
7219 scsi_autopm_put_device(sdev);
7220}
7221
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007222/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007223 * ufshcd_scsi_add_wlus - Adds required W-LUs
7224 * @hba: per-adapter instance
7225 *
7226 * UFS device specification requires the UFS devices to support 4 well known
7227 * logical units:
7228 * "REPORT_LUNS" (address: 01h)
7229 * "UFS Device" (address: 50h)
7230 * "RPMB" (address: 44h)
7231 * "BOOT" (address: 30h)
7232 * UFS device's power management needs to be controlled by "POWER CONDITION"
7233 * field of SSU (START STOP UNIT) command. But this "power condition" field
7234 * will take effect only when its sent to "UFS device" well known logical unit
7235 * hence we require the scsi_device instance to represent this logical unit in
7236 * order for the UFS host driver to send the SSU command for power management.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08007237 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007238 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
7239 * Block) LU so user space process can control this LU. User space may also
7240 * want to have access to BOOT LU.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08007241 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007242 * This function adds scsi device instances for each of all well known LUs
7243 * (except "REPORT LUNS" LU).
7244 *
7245 * Returns zero on success (all required W-LUs are added successfully),
7246 * non-zero error value on failure (if failed to add any of the required W-LU).
7247 */
7248static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
7249{
7250 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007251 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007252
7253 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
7254 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
7255 if (IS_ERR(hba->sdev_ufs_device)) {
7256 ret = PTR_ERR(hba->sdev_ufs_device);
7257 hba->sdev_ufs_device = NULL;
7258 goto out;
7259 }
Can Guofb276f72020-03-25 18:09:59 -07007260 ufshcd_blk_pm_runtime_init(hba->sdev_ufs_device);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007261 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007262
Jaegeuk Kim4f3e9002020-11-17 08:58:35 -08007263 hba->sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007264 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Jaegeuk Kim4f3e9002020-11-17 08:58:35 -08007265 if (IS_ERR(hba->sdev_rpmb)) {
7266 ret = PTR_ERR(hba->sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08007267 goto remove_sdev_ufs_device;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007268 }
Jaegeuk Kim4f3e9002020-11-17 08:58:35 -08007269 ufshcd_blk_pm_runtime_init(hba->sdev_rpmb);
7270 scsi_device_put(hba->sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08007271
7272 sdev_boot = __scsi_add_device(hba->host, 0, 0,
7273 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
Can Guofb276f72020-03-25 18:09:59 -07007274 if (IS_ERR(sdev_boot)) {
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08007275 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
Can Guofb276f72020-03-25 18:09:59 -07007276 } else {
7277 ufshcd_blk_pm_runtime_init(sdev_boot);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08007278 scsi_device_put(sdev_boot);
Can Guofb276f72020-03-25 18:09:59 -07007279 }
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007280 goto out;
7281
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007282remove_sdev_ufs_device:
7283 scsi_remove_device(hba->sdev_ufs_device);
7284out:
7285 return ret;
7286}
7287
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007288static void ufshcd_wb_probe(struct ufs_hba *hba, u8 *desc_buf)
7289{
Stanley Chua7f1e692020-06-25 11:04:30 +08007290 struct ufs_dev_info *dev_info = &hba->dev_info;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08007291 u8 lun;
7292 u32 d_lu_wb_buf_alloc;
Bean Huoe8d03812021-01-19 17:38:45 +01007293 u32 ext_ufs_feature;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08007294
Stanley Chu817d7e12020-05-08 16:01:08 +08007295 if (!ufshcd_is_wb_allowed(hba))
7296 return;
Stanley Chua7f1e692020-06-25 11:04:30 +08007297 /*
7298 * Probe WB only for UFS-2.2 and UFS-3.1 (and later) devices or
7299 * UFS devices with quirk UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES
7300 * enabled
7301 */
7302 if (!(dev_info->wspecversion >= 0x310 ||
7303 dev_info->wspecversion == 0x220 ||
7304 (hba->dev_quirks & UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES)))
7305 goto wb_disabled;
Stanley Chu817d7e12020-05-08 16:01:08 +08007306
Bean Huo7a0bf852020-06-03 11:19:58 +02007307 if (hba->desc_size[QUERY_DESC_IDN_DEVICE] <
7308 DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP + 4)
Stanley Chu817d7e12020-05-08 16:01:08 +08007309 goto wb_disabled;
7310
Bean Huoe8d03812021-01-19 17:38:45 +01007311 ext_ufs_feature = get_unaligned_be32(desc_buf +
7312 DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
Stanley Chu817d7e12020-05-08 16:01:08 +08007313
Bean Huoe8d03812021-01-19 17:38:45 +01007314 if (!(ext_ufs_feature & UFS_DEV_WRITE_BOOSTER_SUP))
Stanley Chu817d7e12020-05-08 16:01:08 +08007315 goto wb_disabled;
7316
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007317 /*
Bean Huoae1ce1f2021-01-19 17:38:44 +01007318 * WB may be supported but not configured while provisioning. The spec
7319 * says, in dedicated wb buffer mode, a max of 1 lun would have wb
7320 * buffer configured.
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007321 */
Bean Huo4cd48992021-01-19 17:38:46 +01007322 dev_info->wb_buffer_type = desc_buf[DEVICE_DESC_PARAM_WB_TYPE];
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007323
Stanley Chua7f1e692020-06-25 11:04:30 +08007324 dev_info->b_presrv_uspc_en =
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007325 desc_buf[DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN];
7326
Bean Huo4cd48992021-01-19 17:38:46 +01007327 if (dev_info->wb_buffer_type == WB_BUF_MODE_SHARED) {
Bean Huoe8d03812021-01-19 17:38:45 +01007328 if (!get_unaligned_be32(desc_buf +
7329 DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS))
Stanley Chu6f8d5a62020-05-08 16:01:13 +08007330 goto wb_disabled;
7331 } else {
7332 for (lun = 0; lun < UFS_UPIU_MAX_WB_LUN_ID; lun++) {
7333 d_lu_wb_buf_alloc = 0;
7334 ufshcd_read_unit_desc_param(hba,
7335 lun,
7336 UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS,
7337 (u8 *)&d_lu_wb_buf_alloc,
7338 sizeof(d_lu_wb_buf_alloc));
7339 if (d_lu_wb_buf_alloc) {
Stanley Chua7f1e692020-06-25 11:04:30 +08007340 dev_info->wb_dedicated_lu = lun;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08007341 break;
7342 }
7343 }
Stanley Chu817d7e12020-05-08 16:01:08 +08007344
Stanley Chu6f8d5a62020-05-08 16:01:13 +08007345 if (!d_lu_wb_buf_alloc)
7346 goto wb_disabled;
7347 }
Stanley Chu817d7e12020-05-08 16:01:08 +08007348 return;
7349
7350wb_disabled:
7351 hba->caps &= ~UFSHCD_CAP_WB_EN;
7352}
7353
Stanley Chu8db269a2020-05-08 16:01:10 +08007354void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups)
Stanley Chu817d7e12020-05-08 16:01:08 +08007355{
7356 struct ufs_dev_fix *f;
7357 struct ufs_dev_info *dev_info = &hba->dev_info;
7358
Stanley Chu8db269a2020-05-08 16:01:10 +08007359 if (!fixups)
7360 return;
7361
7362 for (f = fixups; f->quirk; f++) {
Stanley Chu817d7e12020-05-08 16:01:08 +08007363 if ((f->wmanufacturerid == dev_info->wmanufacturerid ||
7364 f->wmanufacturerid == UFS_ANY_VENDOR) &&
7365 ((dev_info->model &&
7366 STR_PRFX_EQUAL(f->model, dev_info->model)) ||
7367 !strcmp(f->model, UFS_ANY_MODEL)))
7368 hba->dev_quirks |= f->quirk;
7369 }
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007370}
Stanley Chu8db269a2020-05-08 16:01:10 +08007371EXPORT_SYMBOL_GPL(ufshcd_fixup_dev_quirks);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007372
Stanley Chuc28c00b2020-05-08 16:01:09 +08007373static void ufs_fixup_device_setup(struct ufs_hba *hba)
7374{
7375 /* fix by general quirk table */
Stanley Chu8db269a2020-05-08 16:01:10 +08007376 ufshcd_fixup_dev_quirks(hba, ufs_fixups);
Stanley Chuc28c00b2020-05-08 16:01:09 +08007377
7378 /* allow vendors to fix quirks */
7379 ufshcd_vops_fixup_dev_quirks(hba);
7380}
7381
Bean Huo09750062020-01-20 14:08:14 +01007382static int ufs_get_device_desc(struct ufs_hba *hba)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007383{
7384 int err;
7385 u8 model_index;
Kees Cookbbe21d72018-05-02 16:58:09 -07007386 u8 *desc_buf;
Bean Huo09750062020-01-20 14:08:14 +01007387 struct ufs_dev_info *dev_info = &hba->dev_info;
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007388
Bean Huo458a45f2020-06-03 11:19:55 +02007389 desc_buf = kmalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
Kees Cookbbe21d72018-05-02 16:58:09 -07007390 if (!desc_buf) {
7391 err = -ENOMEM;
7392 goto out;
7393 }
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007394
Bean Huoc4607a02020-06-03 11:19:56 +02007395 err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_DEVICE, 0, 0, desc_buf,
Bean Huo7a0bf852020-06-03 11:19:58 +02007396 hba->desc_size[QUERY_DESC_IDN_DEVICE]);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007397 if (err) {
7398 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
7399 __func__, err);
7400 goto out;
7401 }
7402
7403 /*
7404 * getting vendor (manufacturerID) and Bank Index in big endian
7405 * format
7406 */
Bean Huo09750062020-01-20 14:08:14 +01007407 dev_info->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007408 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
7409
Can Guo09f17792020-02-10 19:40:49 -08007410 /* getting Specification Version in big endian format */
7411 dev_info->wspecversion = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
7412 desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];
7413
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007414 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007415
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007416 err = ufshcd_read_string_desc(hba, model_index,
Bean Huo09750062020-01-20 14:08:14 +01007417 &dev_info->model, SD_ASCII_STD);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007418 if (err < 0) {
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007419 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
7420 __func__, err);
7421 goto out;
7422 }
7423
Stanley Chu817d7e12020-05-08 16:01:08 +08007424 ufs_fixup_device_setup(hba);
7425
Stanley Chua7f1e692020-06-25 11:04:30 +08007426 ufshcd_wb_probe(hba, desc_buf);
Stanley Chu817d7e12020-05-08 16:01:08 +08007427
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007428 /*
7429 * ufshcd_read_string_desc returns size of the string
7430 * reset the error value
7431 */
7432 err = 0;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007433
7434out:
Kees Cookbbe21d72018-05-02 16:58:09 -07007435 kfree(desc_buf);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007436 return err;
7437}
7438
Bean Huo09750062020-01-20 14:08:14 +01007439static void ufs_put_device_desc(struct ufs_hba *hba)
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007440{
Bean Huo09750062020-01-20 14:08:14 +01007441 struct ufs_dev_info *dev_info = &hba->dev_info;
7442
7443 kfree(dev_info->model);
7444 dev_info->model = NULL;
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007445}
7446
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007447/**
Yaniv Gardi37113102016-03-10 17:37:16 +02007448 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
7449 * @hba: per-adapter instance
7450 *
7451 * PA_TActivate parameter can be tuned manually if UniPro version is less than
7452 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
7453 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
7454 * the hibern8 exit latency.
7455 *
7456 * Returns zero on success, non-zero error value on failure.
7457 */
7458static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
7459{
7460 int ret = 0;
7461 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
7462
7463 ret = ufshcd_dme_peer_get(hba,
7464 UIC_ARG_MIB_SEL(
7465 RX_MIN_ACTIVATETIME_CAPABILITY,
7466 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7467 &peer_rx_min_activatetime);
7468 if (ret)
7469 goto out;
7470
7471 /* make sure proper unit conversion is applied */
7472 tuned_pa_tactivate =
7473 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
7474 / PA_TACTIVATE_TIME_UNIT_US);
7475 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7476 tuned_pa_tactivate);
7477
7478out:
7479 return ret;
7480}
7481
7482/**
7483 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
7484 * @hba: per-adapter instance
7485 *
7486 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
7487 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
7488 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
7489 * This optimal value can help reduce the hibern8 exit latency.
7490 *
7491 * Returns zero on success, non-zero error value on failure.
7492 */
7493static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
7494{
7495 int ret = 0;
7496 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
7497 u32 max_hibern8_time, tuned_pa_hibern8time;
7498
7499 ret = ufshcd_dme_get(hba,
7500 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
7501 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
7502 &local_tx_hibern8_time_cap);
7503 if (ret)
7504 goto out;
7505
7506 ret = ufshcd_dme_peer_get(hba,
7507 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
7508 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7509 &peer_rx_hibern8_time_cap);
7510 if (ret)
7511 goto out;
7512
7513 max_hibern8_time = max(local_tx_hibern8_time_cap,
7514 peer_rx_hibern8_time_cap);
7515 /* make sure proper unit conversion is applied */
7516 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
7517 / PA_HIBERN8_TIME_UNIT_US);
7518 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
7519 tuned_pa_hibern8time);
7520out:
7521 return ret;
7522}
7523
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08007524/**
7525 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
7526 * less than device PA_TACTIVATE time.
7527 * @hba: per-adapter instance
7528 *
7529 * Some UFS devices require host PA_TACTIVATE to be lower than device
7530 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
7531 * for such devices.
7532 *
7533 * Returns zero on success, non-zero error value on failure.
7534 */
7535static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
7536{
7537 int ret = 0;
7538 u32 granularity, peer_granularity;
7539 u32 pa_tactivate, peer_pa_tactivate;
7540 u32 pa_tactivate_us, peer_pa_tactivate_us;
7541 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
7542
7543 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7544 &granularity);
7545 if (ret)
7546 goto out;
7547
7548 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7549 &peer_granularity);
7550 if (ret)
7551 goto out;
7552
7553 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
7554 (granularity > PA_GRANULARITY_MAX_VAL)) {
7555 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
7556 __func__, granularity);
7557 return -EINVAL;
7558 }
7559
7560 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
7561 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
7562 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
7563 __func__, peer_granularity);
7564 return -EINVAL;
7565 }
7566
7567 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
7568 if (ret)
7569 goto out;
7570
7571 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
7572 &peer_pa_tactivate);
7573 if (ret)
7574 goto out;
7575
7576 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
7577 peer_pa_tactivate_us = peer_pa_tactivate *
7578 gran_to_us_table[peer_granularity - 1];
7579
7580 if (pa_tactivate_us > peer_pa_tactivate_us) {
7581 u32 new_peer_pa_tactivate;
7582
7583 new_peer_pa_tactivate = pa_tactivate_us /
7584 gran_to_us_table[peer_granularity - 1];
7585 new_peer_pa_tactivate++;
7586 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7587 new_peer_pa_tactivate);
7588 }
7589
7590out:
7591 return ret;
7592}
7593
Bean Huo09750062020-01-20 14:08:14 +01007594static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
Yaniv Gardi37113102016-03-10 17:37:16 +02007595{
7596 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
7597 ufshcd_tune_pa_tactivate(hba);
7598 ufshcd_tune_pa_hibern8time(hba);
7599 }
7600
Can Guoe91ed9e2020-02-23 20:09:21 -08007601 ufshcd_vops_apply_dev_quirks(hba);
7602
Yaniv Gardi37113102016-03-10 17:37:16 +02007603 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
7604 /* set 1ms timeout for PA_TACTIVATE */
7605 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08007606
7607 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
7608 ufshcd_quirk_tune_host_pa_tactivate(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02007609}
7610
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007611static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
7612{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007613 hba->ufs_stats.hibern8_exit_cnt = 0;
7614 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08007615 hba->req_abort_count = 0;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007616}
7617
Bean Huo731f0622020-01-20 14:08:19 +01007618static int ufshcd_device_geo_params_init(struct ufs_hba *hba)
7619{
7620 int err;
7621 size_t buff_len;
7622 u8 *desc_buf;
7623
Bean Huo7a0bf852020-06-03 11:19:58 +02007624 buff_len = hba->desc_size[QUERY_DESC_IDN_GEOMETRY];
Bean Huo731f0622020-01-20 14:08:19 +01007625 desc_buf = kmalloc(buff_len, GFP_KERNEL);
7626 if (!desc_buf) {
7627 err = -ENOMEM;
7628 goto out;
7629 }
7630
Bean Huoc4607a02020-06-03 11:19:56 +02007631 err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_GEOMETRY, 0, 0,
7632 desc_buf, buff_len);
Bean Huo731f0622020-01-20 14:08:19 +01007633 if (err) {
7634 dev_err(hba->dev, "%s: Failed reading Geometry Desc. err = %d\n",
7635 __func__, err);
7636 goto out;
7637 }
7638
7639 if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 1)
7640 hba->dev_info.max_lu_supported = 32;
7641 else if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 0)
7642 hba->dev_info.max_lu_supported = 8;
7643
7644out:
7645 kfree(desc_buf);
7646 return err;
7647}
7648
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307649static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
7650 {19200000, REF_CLK_FREQ_19_2_MHZ},
7651 {26000000, REF_CLK_FREQ_26_MHZ},
7652 {38400000, REF_CLK_FREQ_38_4_MHZ},
7653 {52000000, REF_CLK_FREQ_52_MHZ},
7654 {0, REF_CLK_FREQ_INVAL},
7655};
7656
7657static enum ufs_ref_clk_freq
7658ufs_get_bref_clk_from_hz(unsigned long freq)
7659{
7660 int i;
7661
7662 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
7663 if (ufs_ref_clk_freqs[i].freq_hz == freq)
7664 return ufs_ref_clk_freqs[i].val;
7665
7666 return REF_CLK_FREQ_INVAL;
7667}
7668
7669void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
7670{
7671 unsigned long freq;
7672
7673 freq = clk_get_rate(refclk);
7674
7675 hba->dev_ref_clk_freq =
7676 ufs_get_bref_clk_from_hz(freq);
7677
7678 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
7679 dev_err(hba->dev,
7680 "invalid ref_clk setting = %ld\n", freq);
7681}
7682
7683static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
7684{
7685 int err;
7686 u32 ref_clk;
7687 u32 freq = hba->dev_ref_clk_freq;
7688
7689 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
7690 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
7691
7692 if (err) {
7693 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
7694 err);
7695 goto out;
7696 }
7697
7698 if (ref_clk == freq)
7699 goto out; /* nothing to update */
7700
7701 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
7702 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
7703
7704 if (err) {
7705 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
7706 ufs_ref_clk_freqs[freq].freq_hz);
7707 goto out;
7708 }
7709
7710 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
7711 ufs_ref_clk_freqs[freq].freq_hz);
7712
7713out:
7714 return err;
7715}
7716
Bean Huo1b9e2142020-01-20 14:08:15 +01007717static int ufshcd_device_params_init(struct ufs_hba *hba)
7718{
7719 bool flag;
Bean Huo7a0bf852020-06-03 11:19:58 +02007720 int ret, i;
Bean Huo1b9e2142020-01-20 14:08:15 +01007721
Bean Huo7a0bf852020-06-03 11:19:58 +02007722 /* Init device descriptor sizes */
7723 for (i = 0; i < QUERY_DESC_IDN_MAX; i++)
7724 hba->desc_size[i] = QUERY_DESC_MAX_SIZE;
Bean Huo1b9e2142020-01-20 14:08:15 +01007725
Bean Huo731f0622020-01-20 14:08:19 +01007726 /* Init UFS geometry descriptor related parameters */
7727 ret = ufshcd_device_geo_params_init(hba);
7728 if (ret)
7729 goto out;
7730
Bean Huo1b9e2142020-01-20 14:08:15 +01007731 /* Check and apply UFS device quirks */
7732 ret = ufs_get_device_desc(hba);
7733 if (ret) {
7734 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
7735 __func__, ret);
7736 goto out;
7737 }
7738
Can Guo09f17792020-02-10 19:40:49 -08007739 ufshcd_get_ref_clk_gating_wait(hba);
7740
Bean Huo1b9e2142020-01-20 14:08:15 +01007741 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08007742 QUERY_FLAG_IDN_PWR_ON_WPE, 0, &flag))
Bean Huo1b9e2142020-01-20 14:08:15 +01007743 hba->dev_info.f_power_on_wp_en = flag;
7744
Bean Huo2b35b2a2020-01-20 14:08:16 +01007745 /* Probe maximum power mode co-supported by both UFS host and device */
7746 if (ufshcd_get_max_pwr_mode(hba))
7747 dev_err(hba->dev,
7748 "%s: Failed getting max supported power mode\n",
7749 __func__);
Bean Huo1b9e2142020-01-20 14:08:15 +01007750out:
7751 return ret;
7752}
7753
7754/**
7755 * ufshcd_add_lus - probe and add UFS logical units
7756 * @hba: per-adapter instance
7757 */
7758static int ufshcd_add_lus(struct ufs_hba *hba)
7759{
7760 int ret;
7761
Bean Huo1b9e2142020-01-20 14:08:15 +01007762 /* Add required well known logical units to scsi mid layer */
7763 ret = ufshcd_scsi_add_wlus(hba);
7764 if (ret)
7765 goto out;
7766
Jaegeuk Kim4ee7ee52021-01-07 10:53:15 -08007767 ufshcd_clear_ua_wluns(hba);
7768
Bean Huo1b9e2142020-01-20 14:08:15 +01007769 /* Initialize devfreq after UFS device is detected */
7770 if (ufshcd_is_clkscaling_supported(hba)) {
7771 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7772 &hba->pwr_info,
7773 sizeof(struct ufs_pa_layer_attr));
7774 hba->clk_scaling.saved_pwr_info.is_valid = true;
Bean Huo1b9e2142020-01-20 14:08:15 +01007775 hba->clk_scaling.is_allowed = true;
Bean Huo1b9e2142020-01-20 14:08:15 +01007776
Stanley Chub058fa82021-01-20 23:01:41 +08007777 ret = ufshcd_devfreq_init(hba);
7778 if (ret)
7779 goto out;
7780
7781 hba->clk_scaling.is_enabled = true;
7782 ufshcd_init_clk_scaling_sysfs(hba);
Bean Huo1b9e2142020-01-20 14:08:15 +01007783 }
7784
7785 ufs_bsg_probe(hba);
7786 scsi_scan_host(hba->host);
7787 pm_runtime_put_sync(hba->dev);
7788
Bean Huo1b9e2142020-01-20 14:08:15 +01007789out:
7790 return ret;
7791}
7792
Jaegeuk Kim4f3e9002020-11-17 08:58:35 -08007793static int
7794ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp);
7795
7796static int ufshcd_clear_ua_wlun(struct ufs_hba *hba, u8 wlun)
7797{
7798 struct scsi_device *sdp;
7799 unsigned long flags;
7800 int ret = 0;
7801
7802 spin_lock_irqsave(hba->host->host_lock, flags);
7803 if (wlun == UFS_UPIU_UFS_DEVICE_WLUN)
7804 sdp = hba->sdev_ufs_device;
7805 else if (wlun == UFS_UPIU_RPMB_WLUN)
7806 sdp = hba->sdev_rpmb;
7807 else
Arnd Bergmann4c602442020-12-03 23:31:26 +01007808 BUG();
Jaegeuk Kim4f3e9002020-11-17 08:58:35 -08007809 if (sdp) {
7810 ret = scsi_device_get(sdp);
7811 if (!ret && !scsi_device_online(sdp)) {
7812 ret = -ENODEV;
7813 scsi_device_put(sdp);
7814 }
7815 } else {
7816 ret = -ENODEV;
7817 }
7818 spin_unlock_irqrestore(hba->host->host_lock, flags);
7819 if (ret)
7820 goto out_err;
7821
7822 ret = ufshcd_send_request_sense(hba, sdp);
7823 scsi_device_put(sdp);
7824out_err:
7825 if (ret)
7826 dev_err(hba->dev, "%s: UAC clear LU=%x ret = %d\n",
7827 __func__, wlun, ret);
7828 return ret;
7829}
7830
7831static int ufshcd_clear_ua_wluns(struct ufs_hba *hba)
7832{
7833 int ret = 0;
7834
7835 if (!hba->wlun_dev_clr_ua)
7836 goto out;
7837
7838 ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_UFS_DEVICE_WLUN);
7839 if (!ret)
7840 ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_RPMB_WLUN);
7841 if (!ret)
7842 hba->wlun_dev_clr_ua = false;
7843out:
7844 if (ret)
7845 dev_err(hba->dev, "%s: Failed to clear UAC WLUNS ret = %d\n",
7846 __func__, ret);
7847 return ret;
7848}
7849
Yaniv Gardi37113102016-03-10 17:37:16 +02007850/**
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007851 * ufshcd_probe_hba - probe hba to detect device and initialize
7852 * @hba: per-adapter instance
Bean Huo1b9e2142020-01-20 14:08:15 +01007853 * @async: asynchronous execution or not
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007854 *
7855 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307856 */
Bean Huo1b9e2142020-01-20 14:08:15 +01007857static int ufshcd_probe_hba(struct ufs_hba *hba, bool async)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307858{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307859 int ret;
Can Guo4db7a232020-08-09 05:15:51 -07007860 unsigned long flags;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007861 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307862
7863 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307864 if (ret)
7865 goto out;
7866
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007867 /* Debug counters initialization */
7868 ufshcd_clear_dbg_ufs_stats(hba);
7869
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007870 /* UniPro link is active now */
7871 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05307872
Bean Huo1b9e2142020-01-20 14:08:15 +01007873 /* Verify device initialization by sending NOP OUT UPIU */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307874 ret = ufshcd_verify_dev_init(hba);
7875 if (ret)
7876 goto out;
7877
Bean Huo1b9e2142020-01-20 14:08:15 +01007878 /* Initiate UFS initialization, and waiting until completion */
Dolev Raviv68078d52013-07-30 00:35:58 +05307879 ret = ufshcd_complete_dev_init(hba);
7880 if (ret)
7881 goto out;
7882
Bean Huo1b9e2142020-01-20 14:08:15 +01007883 /*
7884 * Initialize UFS device parameters used by driver, these
7885 * parameters are associated with UFS descriptors.
7886 */
7887 if (async) {
7888 ret = ufshcd_device_params_init(hba);
7889 if (ret)
7890 goto out;
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02007891 }
7892
Bean Huo09750062020-01-20 14:08:14 +01007893 ufshcd_tune_unipro_params(hba);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007894
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007895 /* UFS device is also active now */
7896 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307897 ufshcd_force_reset_auto_bkops(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007898 hba->wlun_dev_clr_ua = true;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307899
Bean Huo2b35b2a2020-01-20 14:08:16 +01007900 /* Gear up to HS gear if supported */
7901 if (hba->max_pwr_info.is_valid) {
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307902 /*
7903 * Set the right value to bRefClkFreq before attempting to
7904 * switch to HS gears.
7905 */
7906 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
7907 ufshcd_set_dev_ref_clk(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007908 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Dov Levenglick8643ae62016-10-17 17:10:14 -07007909 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007910 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
7911 __func__, ret);
Dov Levenglick8643ae62016-10-17 17:10:14 -07007912 goto out;
7913 }
Can Guo6a9df812020-02-11 21:38:28 -08007914 ufshcd_print_pwr_info(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007915 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007916
Can Guoe89860f2020-03-26 02:25:41 -07007917 /*
7918 * bActiveICCLevel is volatile for UFS device (as per latest v2.1 spec)
7919 * and for removable UFS card as well, hence always set the parameter.
7920 * Note: Error handler may issue the device reset hence resetting
7921 * bActiveICCLevel as well so it is always safe to set this here.
7922 */
7923 ufshcd_set_active_icc_lvl(hba);
7924
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007925 ufshcd_wb_config(hba);
Can Guo71d848b2019-11-14 22:09:26 -08007926 /* Enable Auto-Hibernate if configured */
7927 ufshcd_auto_hibern8_enable(hba);
7928
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307929out:
Can Guo4db7a232020-08-09 05:15:51 -07007930 spin_lock_irqsave(hba->host->host_lock, flags);
7931 if (ret)
7932 hba->ufshcd_state = UFSHCD_STATE_ERROR;
7933 else if (hba->ufshcd_state == UFSHCD_STATE_RESET)
7934 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
7935 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007936
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007937 trace_ufshcd_init(dev_name(hba->dev), ret,
7938 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007939 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007940 return ret;
7941}
7942
7943/**
7944 * ufshcd_async_scan - asynchronous execution for probing hba
7945 * @data: data pointer to pass to this function
7946 * @cookie: cookie data
7947 */
7948static void ufshcd_async_scan(void *data, async_cookie_t cookie)
7949{
7950 struct ufs_hba *hba = (struct ufs_hba *)data;
Bean Huo1b9e2142020-01-20 14:08:15 +01007951 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007952
Can Guo9cd20d32021-01-13 19:13:28 -08007953 down(&hba->host_sem);
Bean Huo1b9e2142020-01-20 14:08:15 +01007954 /* Initialize hba, detect and initialize UFS device */
7955 ret = ufshcd_probe_hba(hba, true);
Can Guo9cd20d32021-01-13 19:13:28 -08007956 up(&hba->host_sem);
Bean Huo1b9e2142020-01-20 14:08:15 +01007957 if (ret)
7958 goto out;
7959
7960 /* Probe and add UFS logical units */
7961 ret = ufshcd_add_lus(hba);
7962out:
7963 /*
7964 * If we failed to initialize the device or the device is not
7965 * present, turn off the power/clocks etc.
7966 */
7967 if (ret) {
7968 pm_runtime_put_sync(hba->dev);
Bean Huo1b9e2142020-01-20 14:08:15 +01007969 ufshcd_hba_exit(hba);
7970 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307971}
7972
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007973static const struct attribute_group *ufshcd_driver_groups[] = {
7974 &ufs_sysfs_unit_descriptor_group,
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02007975 &ufs_sysfs_lun_attributes_group,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007976 NULL,
7977};
7978
Stanley Chu90b84912020-05-09 17:37:13 +08007979static struct ufs_hba_variant_params ufs_hba_vps = {
7980 .hba_enable_delay_us = 1000,
Stanley Chud14734ae2020-05-09 17:37:15 +08007981 .wb_flush_threshold = UFS_WB_BUF_REMAIN_PERCENT(40),
Stanley Chu90b84912020-05-09 17:37:13 +08007982 .devfreq_profile.polling_ms = 100,
7983 .devfreq_profile.target = ufshcd_devfreq_target,
7984 .devfreq_profile.get_dev_status = ufshcd_devfreq_get_dev_status,
7985 .ondemand_data.upthreshold = 70,
7986 .ondemand_data.downdifferential = 5,
7987};
7988
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307989static struct scsi_host_template ufshcd_driver_template = {
7990 .module = THIS_MODULE,
7991 .name = UFSHCD,
7992 .proc_name = UFSHCD,
7993 .queuecommand = ufshcd_queuecommand,
7994 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09007995 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307996 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03007997 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307998 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307999 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
8000 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308001 .this_id = -1,
8002 .sg_tablesize = SG_ALL,
8003 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
8004 .can_queue = UFSHCD_CAN_QUEUE,
Christoph Hellwig552a9902019-06-17 14:19:55 +02008005 .max_segment_size = PRDT_DATA_BYTE_COUNT_MAX,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008006 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01008007 .track_queue_depth = 1,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02008008 .sdev_groups = ufshcd_driver_groups,
Christoph Hellwig4af14d12018-12-13 16:17:09 +01008009 .dma_boundary = PAGE_SIZE - 1,
Stanley Chu49615ba2019-09-16 23:56:50 +08008010 .rpm_autosuspend_delay = RPM_AUTOSUSPEND_DELAY_MS,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308011};
8012
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008013static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
8014 int ua)
8015{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08008016 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008017
Bjorn Andersson7b16a072015-02-11 19:35:28 -08008018 if (!vreg)
8019 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008020
Stanley Chu0487fff2019-03-28 17:16:25 +08008021 /*
8022 * "set_load" operation shall be required on those regulators
8023 * which specifically configured current limitation. Otherwise
8024 * zero max_uA may cause unexpected behavior when regulator is
8025 * enabled or set as high power mode.
8026 */
8027 if (!vreg->max_uA)
8028 return 0;
8029
Bjorn Andersson7b16a072015-02-11 19:35:28 -08008030 ret = regulator_set_load(vreg->reg, ua);
8031 if (ret < 0) {
8032 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
8033 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008034 }
8035
8036 return ret;
8037}
8038
8039static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
8040 struct ufs_vreg *vreg)
8041{
Marc Gonzalez73067982019-02-27 11:41:45 +01008042 return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008043}
8044
8045static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
8046 struct ufs_vreg *vreg)
8047{
Adrian Hunter7c7cfdc2019-08-14 15:59:50 +03008048 if (!vreg)
8049 return 0;
8050
Marc Gonzalez73067982019-02-27 11:41:45 +01008051 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008052}
8053
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008054static int ufshcd_config_vreg(struct device *dev,
8055 struct ufs_vreg *vreg, bool on)
8056{
8057 int ret = 0;
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06008058 struct regulator *reg;
8059 const char *name;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008060 int min_uV, uA_load;
8061
8062 BUG_ON(!vreg);
8063
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06008064 reg = vreg->reg;
8065 name = vreg->name;
8066
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008067 if (regulator_count_voltages(reg) > 0) {
Asutosh Das90d88f42020-02-10 19:40:45 -08008068 uA_load = on ? vreg->max_uA : 0;
8069 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
8070 if (ret)
8071 goto out;
8072
Stanley Chu3b141e82019-03-28 17:16:24 +08008073 if (vreg->min_uV && vreg->max_uV) {
8074 min_uV = on ? vreg->min_uV : 0;
8075 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
Bean Huob0008622020-08-14 11:50:34 +02008076 if (ret)
Stanley Chu3b141e82019-03-28 17:16:24 +08008077 dev_err(dev,
8078 "%s: %s set voltage failed, err=%d\n",
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008079 __func__, name, ret);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008080 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008081 }
8082out:
8083 return ret;
8084}
8085
8086static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
8087{
8088 int ret = 0;
8089
Marc Gonzalez73067982019-02-27 11:41:45 +01008090 if (!vreg || vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008091 goto out;
8092
8093 ret = ufshcd_config_vreg(dev, vreg, true);
8094 if (!ret)
8095 ret = regulator_enable(vreg->reg);
8096
8097 if (!ret)
8098 vreg->enabled = true;
8099 else
8100 dev_err(dev, "%s: %s enable failed, err=%d\n",
8101 __func__, vreg->name, ret);
8102out:
8103 return ret;
8104}
8105
8106static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
8107{
8108 int ret = 0;
8109
Stanley Chuf8162ac2020-12-07 13:49:54 +08008110 if (!vreg || !vreg->enabled || vreg->always_on)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008111 goto out;
8112
8113 ret = regulator_disable(vreg->reg);
8114
8115 if (!ret) {
8116 /* ignore errors on applying disable config */
8117 ufshcd_config_vreg(dev, vreg, false);
8118 vreg->enabled = false;
8119 } else {
8120 dev_err(dev, "%s: %s disable failed, err=%d\n",
8121 __func__, vreg->name, ret);
8122 }
8123out:
8124 return ret;
8125}
8126
8127static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
8128{
8129 int ret = 0;
8130 struct device *dev = hba->dev;
8131 struct ufs_vreg_info *info = &hba->vreg_info;
8132
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008133 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
8134 if (ret)
8135 goto out;
8136
8137 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
8138 if (ret)
8139 goto out;
8140
8141 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008142
8143out:
8144 if (ret) {
8145 ufshcd_toggle_vreg(dev, info->vccq2, false);
8146 ufshcd_toggle_vreg(dev, info->vccq, false);
8147 ufshcd_toggle_vreg(dev, info->vcc, false);
8148 }
8149 return ret;
8150}
8151
Raviv Shvili6a771a62014-09-25 15:32:24 +03008152static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
8153{
8154 struct ufs_vreg_info *info = &hba->vreg_info;
8155
Zeng Guangyue60b7b822019-03-30 17:03:13 +08008156 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
Raviv Shvili6a771a62014-09-25 15:32:24 +03008157}
8158
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008159static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
8160{
8161 int ret = 0;
8162
8163 if (!vreg)
8164 goto out;
8165
8166 vreg->reg = devm_regulator_get(dev, vreg->name);
8167 if (IS_ERR(vreg->reg)) {
8168 ret = PTR_ERR(vreg->reg);
8169 dev_err(dev, "%s: %s get failed, err=%d\n",
8170 __func__, vreg->name, ret);
8171 }
8172out:
8173 return ret;
8174}
8175
8176static int ufshcd_init_vreg(struct ufs_hba *hba)
8177{
8178 int ret = 0;
8179 struct device *dev = hba->dev;
8180 struct ufs_vreg_info *info = &hba->vreg_info;
8181
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008182 ret = ufshcd_get_vreg(dev, info->vcc);
8183 if (ret)
8184 goto out;
8185
8186 ret = ufshcd_get_vreg(dev, info->vccq);
Bean Huob0008622020-08-14 11:50:34 +02008187 if (!ret)
8188 ret = ufshcd_get_vreg(dev, info->vccq2);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008189out:
8190 return ret;
8191}
8192
Raviv Shvili6a771a62014-09-25 15:32:24 +03008193static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
8194{
8195 struct ufs_vreg_info *info = &hba->vreg_info;
8196
8197 if (info)
8198 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
8199
8200 return 0;
8201}
8202
Can Guo81309c22020-11-25 18:01:00 -08008203static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008204{
8205 int ret = 0;
8206 struct ufs_clk_info *clki;
8207 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008208 unsigned long flags;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08008209 ktime_t start = ktime_get();
8210 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008211
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03008212 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008213 goto out;
8214
Can Guo38f32422020-02-10 19:40:47 -08008215 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
8216 if (ret)
8217 return ret;
Subhash Jadavani1e879e82016-10-06 21:48:22 -07008218
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008219 list_for_each_entry(clki, head, list) {
8220 if (!IS_ERR_OR_NULL(clki->clk)) {
Can Guo81309c22020-11-25 18:01:00 -08008221 /*
8222 * Don't disable clocks which are needed
8223 * to keep the link active.
8224 */
8225 if (ufshcd_is_link_active(hba) &&
8226 clki->keep_link_active)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008227 continue;
8228
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08008229 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008230 if (on && !clki->enabled) {
8231 ret = clk_prepare_enable(clki->clk);
8232 if (ret) {
8233 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
8234 __func__, clki->name, ret);
8235 goto out;
8236 }
8237 } else if (!on && clki->enabled) {
8238 clk_disable_unprepare(clki->clk);
8239 }
8240 clki->enabled = on;
8241 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
8242 clki->name, on ? "en" : "dis");
8243 }
8244 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008245
Can Guo38f32422020-02-10 19:40:47 -08008246 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
8247 if (ret)
8248 return ret;
Subhash Jadavani1e879e82016-10-06 21:48:22 -07008249
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008250out:
8251 if (ret) {
8252 list_for_each_entry(clki, head, list) {
8253 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
8254 clk_disable_unprepare(clki->clk);
8255 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008256 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008257 spin_lock_irqsave(hba->host->host_lock, flags);
8258 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008259 trace_ufshcd_clk_gating(dev_name(hba->dev),
8260 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008261 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008262 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008263
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08008264 if (clk_state_changed)
8265 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
8266 (on ? "on" : "off"),
8267 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008268 return ret;
8269}
8270
8271static int ufshcd_init_clocks(struct ufs_hba *hba)
8272{
8273 int ret = 0;
8274 struct ufs_clk_info *clki;
8275 struct device *dev = hba->dev;
8276 struct list_head *head = &hba->clk_list_head;
8277
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03008278 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008279 goto out;
8280
8281 list_for_each_entry(clki, head, list) {
8282 if (!clki->name)
8283 continue;
8284
8285 clki->clk = devm_clk_get(dev, clki->name);
8286 if (IS_ERR(clki->clk)) {
8287 ret = PTR_ERR(clki->clk);
8288 dev_err(dev, "%s: %s clk get failed, %d\n",
8289 __func__, clki->name, ret);
8290 goto out;
8291 }
8292
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05308293 /*
8294 * Parse device ref clk freq as per device tree "ref_clk".
8295 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
8296 * in ufshcd_alloc_host().
8297 */
8298 if (!strcmp(clki->name, "ref_clk"))
8299 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
8300
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008301 if (clki->max_freq) {
8302 ret = clk_set_rate(clki->clk, clki->max_freq);
8303 if (ret) {
8304 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
8305 __func__, clki->name,
8306 clki->max_freq, ret);
8307 goto out;
8308 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03008309 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008310 }
8311 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
8312 clki->name, clk_get_rate(clki->clk));
8313 }
8314out:
8315 return ret;
8316}
8317
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008318static int ufshcd_variant_hba_init(struct ufs_hba *hba)
8319{
8320 int err = 0;
8321
8322 if (!hba->vops)
8323 goto out;
8324
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008325 err = ufshcd_vops_init(hba);
8326 if (err)
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008327 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008328 __func__, ufshcd_get_var_name(hba), err);
Stanley Chuade921a2020-12-05 20:00:38 +08008329out:
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008330 return err;
8331}
8332
8333static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
8334{
8335 if (!hba->vops)
8336 return;
8337
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008338 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008339}
8340
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008341static int ufshcd_hba_init(struct ufs_hba *hba)
8342{
8343 int err;
8344
Raviv Shvili6a771a62014-09-25 15:32:24 +03008345 /*
8346 * Handle host controller power separately from the UFS device power
8347 * rails as it will help controlling the UFS host controller power
8348 * collapse easily which is different than UFS device power collapse.
8349 * Also, enable the host controller power before we go ahead with rest
8350 * of the initialization here.
8351 */
8352 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008353 if (err)
8354 goto out;
8355
Raviv Shvili6a771a62014-09-25 15:32:24 +03008356 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008357 if (err)
8358 goto out;
8359
Raviv Shvili6a771a62014-09-25 15:32:24 +03008360 err = ufshcd_init_clocks(hba);
8361 if (err)
8362 goto out_disable_hba_vreg;
8363
8364 err = ufshcd_setup_clocks(hba, true);
8365 if (err)
8366 goto out_disable_hba_vreg;
8367
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008368 err = ufshcd_init_vreg(hba);
8369 if (err)
8370 goto out_disable_clks;
8371
8372 err = ufshcd_setup_vreg(hba, true);
8373 if (err)
8374 goto out_disable_clks;
8375
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008376 err = ufshcd_variant_hba_init(hba);
8377 if (err)
8378 goto out_disable_vreg;
8379
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02008380 ufs_debugfs_hba_init(hba);
8381
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008382 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008383 goto out;
8384
8385out_disable_vreg:
8386 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008387out_disable_clks:
8388 ufshcd_setup_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03008389out_disable_hba_vreg:
8390 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008391out:
8392 return err;
8393}
8394
8395static void ufshcd_hba_exit(struct ufs_hba *hba)
8396{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008397 if (hba->is_powered) {
Can Guo4543d9d2021-01-20 02:04:22 -08008398 ufshcd_exit_clk_scaling(hba);
8399 ufshcd_exit_clk_gating(hba);
8400 if (hba->eh_wq)
8401 destroy_workqueue(hba->eh_wq);
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02008402 ufs_debugfs_hba_exit(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008403 ufshcd_variant_hba_exit(hba);
8404 ufshcd_setup_vreg(hba, false);
8405 ufshcd_setup_clocks(hba, false);
8406 ufshcd_setup_hba_vreg(hba, false);
8407 hba->is_powered = false;
Bean Huo09750062020-01-20 14:08:14 +01008408 ufs_put_device_desc(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008409 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008410}
8411
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008412static int
8413ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308414{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008415 unsigned char cmd[6] = {REQUEST_SENSE,
8416 0,
8417 0,
8418 0,
Avri Altman09a5a242018-11-22 20:04:56 +02008419 UFS_SENSE_SIZE,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008420 0};
8421 char *buffer;
8422 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308423
Avri Altman09a5a242018-11-22 20:04:56 +02008424 buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008425 if (!buffer) {
8426 ret = -ENOMEM;
8427 goto out;
8428 }
8429
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01008430 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
Avri Altman09a5a242018-11-22 20:04:56 +02008431 UFS_SENSE_SIZE, NULL, NULL,
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01008432 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008433 if (ret)
8434 pr_err("%s: failed with err %d\n", __func__, ret);
8435
8436 kfree(buffer);
8437out:
8438 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308439}
8440
8441/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008442 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
8443 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308444 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008445 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308446 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008447 * Returns 0 if requested power mode is set successfully
8448 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308449 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008450static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
8451 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308452{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008453 unsigned char cmd[6] = { START_STOP };
8454 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03008455 struct scsi_device *sdp;
8456 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008457 int ret;
8458
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03008459 spin_lock_irqsave(hba->host->host_lock, flags);
8460 sdp = hba->sdev_ufs_device;
8461 if (sdp) {
8462 ret = scsi_device_get(sdp);
8463 if (!ret && !scsi_device_online(sdp)) {
8464 ret = -ENODEV;
8465 scsi_device_put(sdp);
8466 }
8467 } else {
8468 ret = -ENODEV;
8469 }
8470 spin_unlock_irqrestore(hba->host->host_lock, flags);
8471
8472 if (ret)
8473 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008474
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308475 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008476 * If scsi commands fail, the scsi mid-layer schedules scsi error-
8477 * handling, which would wait for host to be resumed. Since we know
8478 * we are functional while we are here, skip host resume in error
8479 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308480 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008481 hba->host->eh_noresume = 1;
Randall Huang19186512020-11-30 20:14:02 -08008482 ufshcd_clear_ua_wluns(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308483
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008484 cmd[4] = pwr_mode << 4;
8485
8486 /*
8487 * Current function would be generally called from the power management
Christoph Hellwige8064022016-10-20 15:12:13 +02008488 * callbacks hence set the RQF_PM flag so that it doesn't resume the
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008489 * already suspended childs.
8490 */
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01008491 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
8492 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008493 if (ret) {
8494 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02008495 "START_STOP failed for power mode: %d, result %x\n",
8496 pwr_mode, ret);
Johannes Thumshirnc65be1a2018-06-25 13:20:58 +02008497 if (driver_byte(ret) == DRIVER_SENSE)
Hannes Reinecke21045512015-01-08 07:43:46 +01008498 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008499 }
8500
8501 if (!ret)
8502 hba->curr_dev_pwr_mode = pwr_mode;
Randall Huang19186512020-11-30 20:14:02 -08008503
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03008504 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008505 hba->host->eh_noresume = 0;
8506 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308507}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308508
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008509static int ufshcd_link_state_transition(struct ufs_hba *hba,
8510 enum uic_link_state req_link_state,
8511 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308512{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008513 int ret = 0;
8514
8515 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308516 return 0;
8517
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008518 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
8519 ret = ufshcd_uic_hibern8_enter(hba);
Can Guo4db7a232020-08-09 05:15:51 -07008520 if (!ret) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008521 ufshcd_set_link_hibern8(hba);
Can Guo4db7a232020-08-09 05:15:51 -07008522 } else {
8523 dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
8524 __func__, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008525 goto out;
Can Guo4db7a232020-08-09 05:15:51 -07008526 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008527 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308528 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008529 * If autobkops is enabled, link can't be turned off because
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008530 * turning off the link would also turn off the device, except in the
8531 * case of DeepSleep where the device is expected to remain powered.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308532 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008533 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
Dan Carpenterdc30c9e2019-12-13 13:49:35 +03008534 (!check_for_bkops || !hba->auto_bkops_enabled)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008535 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02008536 * Let's make sure that link is in low power mode, we are doing
8537 * this currently by putting the link in Hibern8. Otherway to
8538 * put the link in low power mode is to send the DME end point
8539 * to device and then send the DME reset command to local
8540 * unipro. But putting the link in hibern8 is much faster.
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008541 *
8542 * Note also that putting the link in Hibern8 is a requirement
8543 * for entering DeepSleep.
Yaniv Gardif3099fb2016-03-10 17:37:17 +02008544 */
8545 ret = ufshcd_uic_hibern8_enter(hba);
Can Guo4db7a232020-08-09 05:15:51 -07008546 if (ret) {
8547 dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
8548 __func__, ret);
Yaniv Gardif3099fb2016-03-10 17:37:17 +02008549 goto out;
Can Guo4db7a232020-08-09 05:15:51 -07008550 }
Yaniv Gardif3099fb2016-03-10 17:37:17 +02008551 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008552 * Change controller state to "reset state" which
8553 * should also put the link in off/reset state
8554 */
Bart Van Assche5cac1092020-05-07 15:27:50 -07008555 ufshcd_hba_stop(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008556 /*
8557 * TODO: Check if we need any delay to make sure that
8558 * controller is reset
8559 */
8560 ufshcd_set_link_off(hba);
8561 }
8562
8563out:
8564 return ret;
8565}
8566
8567static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
8568{
Stanley Chuc4df6ee2020-07-29 13:18:39 +08008569 bool vcc_off = false;
8570
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008571 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02008572 * It seems some UFS devices may keep drawing more than sleep current
8573 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
8574 * To avoid this situation, add 2ms delay before putting these UFS
8575 * rails in LPM mode.
8576 */
8577 if (!ufshcd_is_link_active(hba) &&
8578 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
8579 usleep_range(2000, 2100);
8580
8581 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008582 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
8583 * power.
8584 *
8585 * If UFS device and link is in OFF state, all power supplies (VCC,
8586 * VCCQ, VCCQ2) can be turned off if power on write protect is not
8587 * required. If UFS link is inactive (Hibern8 or OFF state) and device
8588 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
8589 *
8590 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
8591 * in low power state which would save some power.
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008592 *
8593 * If Write Booster is enabled and the device needs to flush the WB
8594 * buffer OR if bkops status is urgent for WB, keep Vcc on.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008595 */
8596 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8597 !hba->dev_info.is_lu_power_on_wp) {
8598 ufshcd_setup_vreg(hba, false);
Stanley Chuc4df6ee2020-07-29 13:18:39 +08008599 vcc_off = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008600 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Stanley Chu51dd9052020-05-22 16:32:12 +08008601 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
Stanley Chuc4df6ee2020-07-29 13:18:39 +08008602 vcc_off = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008603 if (!ufshcd_is_link_active(hba)) {
8604 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8605 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
8606 }
8607 }
Stanley Chuc4df6ee2020-07-29 13:18:39 +08008608
8609 /*
8610 * Some UFS devices require delay after VCC power rail is turned-off.
8611 */
8612 if (vcc_off && hba->vreg_info.vcc &&
8613 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_AFTER_LPM)
8614 usleep_range(5000, 5100);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008615}
8616
8617static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
8618{
8619 int ret = 0;
8620
8621 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8622 !hba->dev_info.is_lu_power_on_wp) {
8623 ret = ufshcd_setup_vreg(hba, true);
8624 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008625 if (!ret && !ufshcd_is_link_active(hba)) {
8626 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
8627 if (ret)
8628 goto vcc_disable;
8629 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
8630 if (ret)
8631 goto vccq_lpm;
8632 }
Subhash Jadavani69d72ac2016-10-27 17:26:24 -07008633 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008634 }
8635 goto out;
8636
8637vccq_lpm:
8638 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8639vcc_disable:
8640 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
8641out:
8642 return ret;
8643}
8644
8645static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
8646{
Can Guodd7143e2020-10-27 12:10:36 -07008647 if (ufshcd_is_link_off(hba) || ufshcd_can_aggressive_pc(hba))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008648 ufshcd_setup_hba_vreg(hba, false);
8649}
8650
8651static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
8652{
Can Guodd7143e2020-10-27 12:10:36 -07008653 if (ufshcd_is_link_off(hba) || ufshcd_can_aggressive_pc(hba))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008654 ufshcd_setup_hba_vreg(hba, true);
8655}
8656
8657/**
8658 * ufshcd_suspend - helper function for suspend operations
8659 * @hba: per adapter instance
8660 * @pm_op: desired low power operation type
8661 *
8662 * This function will try to put the UFS device and link into low power
8663 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
8664 * (System PM level).
8665 *
8666 * If this function is called during shutdown, it will make sure that
8667 * both UFS device and UFS link is powered off.
8668 *
8669 * NOTE: UFS device & link must be active before we enter in this function.
8670 *
8671 * Returns 0 for success and non-zero for failure
8672 */
8673static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8674{
8675 int ret = 0;
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008676 int check_for_bkops;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008677 enum ufs_pm_level pm_lvl;
8678 enum ufs_dev_pwr_mode req_dev_pwr_mode;
8679 enum uic_link_state req_link_state;
8680
8681 hba->pm_op_in_progress = 1;
8682 if (!ufshcd_is_shutdown_pm(pm_op)) {
8683 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
8684 hba->rpm_lvl : hba->spm_lvl;
8685 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
8686 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
8687 } else {
8688 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
8689 req_link_state = UIC_LINK_OFF_STATE;
8690 }
8691
8692 /*
8693 * If we can't transition into any of the low power modes
8694 * just gate the clocks.
8695 */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008696 ufshcd_hold(hba, false);
8697 hba->clk_gating.is_suspended = true;
8698
Stanley Chu348e1bc2021-01-20 23:01:42 +08008699 if (ufshcd_is_clkscaling_supported(hba))
8700 ufshcd_clk_scaling_suspend(hba, true);
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07008701
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008702 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
8703 req_link_state == UIC_LINK_ACTIVE_STATE) {
8704 goto disable_clks;
8705 }
8706
8707 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
8708 (req_link_state == hba->uic_link_state))
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07008709 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008710
8711 /* UFS device & link must be active before we enter in this function */
8712 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
8713 ret = -EINVAL;
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07008714 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008715 }
8716
8717 if (ufshcd_is_runtime_pm(pm_op)) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03008718 if (ufshcd_can_autobkops_during_suspend(hba)) {
8719 /*
8720 * The device is idle with no requests in the queue,
8721 * allow background operations if bkops status shows
8722 * that performance might be impacted.
8723 */
8724 ret = ufshcd_urgent_bkops(hba);
8725 if (ret)
8726 goto enable_gating;
8727 } else {
8728 /* make sure that auto bkops is disabled */
8729 ufshcd_disable_auto_bkops(hba);
8730 }
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008731 /*
Stanley Chu51dd9052020-05-22 16:32:12 +08008732 * If device needs to do BKOP or WB buffer flush during
8733 * Hibern8, keep device power mode as "active power mode"
8734 * and VCC supply.
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008735 */
Stanley Chu51dd9052020-05-22 16:32:12 +08008736 hba->dev_info.b_rpm_dev_flush_capable =
8737 hba->auto_bkops_enabled ||
8738 (((req_link_state == UIC_LINK_HIBERN8_STATE) ||
8739 ((req_link_state == UIC_LINK_ACTIVE_STATE) &&
8740 ufshcd_is_auto_hibern8_enabled(hba))) &&
8741 ufshcd_wb_need_flush(hba));
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008742 }
8743
Kiwoong Kim6948a962020-12-19 15:40:39 +09008744 flush_work(&hba->eeh_work);
8745
Stanley Chu51dd9052020-05-22 16:32:12 +08008746 if (req_dev_pwr_mode != hba->curr_dev_pwr_mode) {
Bean Huo939785d2020-11-25 19:53:00 +01008747 if (!ufshcd_is_runtime_pm(pm_op))
Stanley Chu51dd9052020-05-22 16:32:12 +08008748 /* ensure that bkops is disabled */
8749 ufshcd_disable_auto_bkops(hba);
Stanley Chu51dd9052020-05-22 16:32:12 +08008750
8751 if (!hba->dev_info.b_rpm_dev_flush_capable) {
8752 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
8753 if (ret)
8754 goto enable_gating;
8755 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008756 }
8757
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008758 /*
8759 * In the case of DeepSleep, the device is expected to remain powered
8760 * with the link off, so do not check for bkops.
8761 */
8762 check_for_bkops = !ufshcd_is_ufs_dev_deepsleep(hba);
8763 ret = ufshcd_link_state_transition(hba, req_link_state, check_for_bkops);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008764 if (ret)
8765 goto set_dev_active;
8766
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008767disable_clks:
8768 /*
8769 * Call vendor specific suspend callback. As these callbacks may access
8770 * vendor specific host controller register space call them before the
8771 * host clocks are ON.
8772 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008773 ret = ufshcd_vops_suspend(hba, pm_op);
8774 if (ret)
8775 goto set_link_active;
Stanley Chudcb6cec2019-12-07 20:22:00 +08008776 /*
8777 * Disable the host irq as host controller as there won't be any
8778 * host controller transaction expected till resume.
8779 */
8780 ufshcd_disable_irq(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008781
Can Guo81309c22020-11-25 18:01:00 -08008782 ufshcd_setup_clocks(hba, false);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008783
Can Guo2dec9472020-08-09 05:15:47 -07008784 if (ufshcd_is_clkgating_allowed(hba)) {
8785 hba->clk_gating.state = CLKS_OFF;
8786 trace_ufshcd_clk_gating(dev_name(hba->dev),
8787 hba->clk_gating.state);
8788 }
Stanley Chudcb6cec2019-12-07 20:22:00 +08008789
Ziqi Chen528db9e2021-01-08 18:56:24 +08008790 ufshcd_vreg_set_lpm(hba);
8791
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008792 /* Put the host controller in low power mode if possible */
8793 ufshcd_hba_vreg_set_lpm(hba);
8794 goto out;
8795
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008796set_link_active:
8797 ufshcd_vreg_set_hpm(hba);
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008798 /*
8799 * Device hardware reset is required to exit DeepSleep. Also, for
8800 * DeepSleep, the link is off so host reset and restore will be done
8801 * further below.
8802 */
8803 if (ufshcd_is_ufs_dev_deepsleep(hba)) {
Stanley Chu31a5d9c2020-12-08 21:56:35 +08008804 ufshcd_device_reset(hba);
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008805 WARN_ON(!ufshcd_is_link_off(hba));
8806 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008807 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
8808 ufshcd_set_link_active(hba);
8809 else if (ufshcd_is_link_off(hba))
8810 ufshcd_host_reset_and_restore(hba);
8811set_dev_active:
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008812 /* Can also get here needing to exit DeepSleep */
8813 if (ufshcd_is_ufs_dev_deepsleep(hba)) {
Stanley Chu31a5d9c2020-12-08 21:56:35 +08008814 ufshcd_device_reset(hba);
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008815 ufshcd_host_reset_and_restore(hba);
8816 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008817 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
8818 ufshcd_disable_auto_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008819enable_gating:
Stanley Chu348e1bc2021-01-20 23:01:42 +08008820 if (ufshcd_is_clkscaling_supported(hba))
8821 ufshcd_clk_scaling_suspend(hba, false);
8822
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008823 hba->clk_gating.is_suspended = false;
Stanley Chu51dd9052020-05-22 16:32:12 +08008824 hba->dev_info.b_rpm_dev_flush_capable = false;
Jaegeuk Kim4ee7ee52021-01-07 10:53:15 -08008825 ufshcd_clear_ua_wluns(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008826 ufshcd_release(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008827out:
Stanley Chu51dd9052020-05-22 16:32:12 +08008828 if (hba->dev_info.b_rpm_dev_flush_capable) {
8829 schedule_delayed_work(&hba->rpm_dev_flush_recheck_work,
8830 msecs_to_jiffies(RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS));
8831 }
8832
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008833 hba->pm_op_in_progress = 0;
Stanley Chu51dd9052020-05-22 16:32:12 +08008834
Stanley Chu8808b4e2019-07-10 21:38:21 +08008835 if (ret)
Stanley Chue965e5e2020-12-05 19:58:59 +08008836 ufshcd_update_evt_hist(hba, UFS_EVT_SUSPEND_ERR, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008837 return ret;
8838}
8839
8840/**
8841 * ufshcd_resume - helper function for resume operations
8842 * @hba: per adapter instance
8843 * @pm_op: runtime PM or system PM
8844 *
8845 * This function basically brings the UFS device, UniPro link and controller
8846 * to active state.
8847 *
8848 * Returns 0 for success and non-zero for failure
8849 */
8850static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8851{
8852 int ret;
8853 enum uic_link_state old_link_state;
8854
8855 hba->pm_op_in_progress = 1;
8856 old_link_state = hba->uic_link_state;
8857
8858 ufshcd_hba_vreg_set_hpm(hba);
Ziqi Chen528db9e2021-01-08 18:56:24 +08008859 ret = ufshcd_vreg_set_hpm(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008860 if (ret)
8861 goto out;
8862
Ziqi Chen528db9e2021-01-08 18:56:24 +08008863 /* Make sure clocks are enabled before accessing controller */
8864 ret = ufshcd_setup_clocks(hba, true);
8865 if (ret)
8866 goto disable_vreg;
8867
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008868 /* enable the host irq as host controller would be active soon */
Can Guo5231d382019-12-05 02:14:46 +00008869 ufshcd_enable_irq(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008870
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008871 /*
8872 * Call vendor specific resume callback. As these callbacks may access
8873 * vendor specific host controller register space call them when the
8874 * host clocks are ON.
8875 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008876 ret = ufshcd_vops_resume(hba, pm_op);
8877 if (ret)
Ziqi Chen528db9e2021-01-08 18:56:24 +08008878 goto disable_irq_and_vops_clks;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008879
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008880 /* For DeepSleep, the only supported option is to have the link off */
8881 WARN_ON(ufshcd_is_ufs_dev_deepsleep(hba) && !ufshcd_is_link_off(hba));
8882
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008883 if (ufshcd_is_link_hibern8(hba)) {
8884 ret = ufshcd_uic_hibern8_exit(hba);
Can Guo4db7a232020-08-09 05:15:51 -07008885 if (!ret) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008886 ufshcd_set_link_active(hba);
Can Guo4db7a232020-08-09 05:15:51 -07008887 } else {
8888 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
8889 __func__, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008890 goto vendor_suspend;
Can Guo4db7a232020-08-09 05:15:51 -07008891 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008892 } else if (ufshcd_is_link_off(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008893 /*
Asutosh Das089f5b62020-04-13 23:14:48 -07008894 * A full initialization of the host and the device is
8895 * required since the link was put to off during suspend.
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008896 * Note, in the case of DeepSleep, the device will exit
8897 * DeepSleep due to device reset.
Asutosh Das089f5b62020-04-13 23:14:48 -07008898 */
8899 ret = ufshcd_reset_and_restore(hba);
8900 /*
8901 * ufshcd_reset_and_restore() should have already
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008902 * set the link state as active
8903 */
8904 if (ret || !ufshcd_is_link_active(hba))
8905 goto vendor_suspend;
8906 }
8907
8908 if (!ufshcd_is_ufs_dev_active(hba)) {
8909 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
8910 if (ret)
8911 goto set_old_link_state;
8912 }
8913
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08008914 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
8915 ufshcd_enable_auto_bkops(hba);
8916 else
8917 /*
8918 * If BKOPs operations are urgently needed at this moment then
8919 * keep auto-bkops enabled or else disable it.
8920 */
8921 ufshcd_urgent_bkops(hba);
8922
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008923 hba->clk_gating.is_suspended = false;
8924
Stanley Chu348e1bc2021-01-20 23:01:42 +08008925 if (ufshcd_is_clkscaling_supported(hba))
8926 ufshcd_clk_scaling_suspend(hba, false);
Sahitya Tummala856b3482014-09-25 15:32:34 +03008927
Adrian Hunterad448372018-03-20 15:07:38 +02008928 /* Enable Auto-Hibernate if configured */
8929 ufshcd_auto_hibern8_enable(hba);
8930
Stanley Chu51dd9052020-05-22 16:32:12 +08008931 if (hba->dev_info.b_rpm_dev_flush_capable) {
8932 hba->dev_info.b_rpm_dev_flush_capable = false;
8933 cancel_delayed_work(&hba->rpm_dev_flush_recheck_work);
8934 }
8935
Jaegeuk Kim4ee7ee52021-01-07 10:53:15 -08008936 ufshcd_clear_ua_wluns(hba);
8937
Can Guo71d848b2019-11-14 22:09:26 -08008938 /* Schedule clock gating in case of no access to UFS device yet */
8939 ufshcd_release(hba);
8940
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008941 goto out;
8942
8943set_old_link_state:
8944 ufshcd_link_state_transition(hba, old_link_state, 0);
8945vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008946 ufshcd_vops_suspend(hba, pm_op);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008947disable_irq_and_vops_clks:
8948 ufshcd_disable_irq(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008949 ufshcd_setup_clocks(hba, false);
Can Guo2dec9472020-08-09 05:15:47 -07008950 if (ufshcd_is_clkgating_allowed(hba)) {
8951 hba->clk_gating.state = CLKS_OFF;
8952 trace_ufshcd_clk_gating(dev_name(hba->dev),
8953 hba->clk_gating.state);
8954 }
Ziqi Chen528db9e2021-01-08 18:56:24 +08008955disable_vreg:
8956 ufshcd_vreg_set_lpm(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008957out:
8958 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08008959 if (ret)
Stanley Chue965e5e2020-12-05 19:58:59 +08008960 ufshcd_update_evt_hist(hba, UFS_EVT_RESUME_ERR, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008961 return ret;
8962}
8963
8964/**
8965 * ufshcd_system_suspend - system suspend routine
8966 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008967 *
8968 * Check the description of ufshcd_suspend() function for more details.
8969 *
8970 * Returns 0 for success and non-zero for failure
8971 */
8972int ufshcd_system_suspend(struct ufs_hba *hba)
8973{
8974 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008975 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008976
Can Guofb7afe22021-01-13 19:13:27 -08008977 if (!hba) {
8978 early_suspend = true;
8979 return 0;
8980 }
8981
Can Guo9cd20d32021-01-13 19:13:28 -08008982 down(&hba->host_sem);
Can Guofb7afe22021-01-13 19:13:27 -08008983
8984 if (!hba->is_powered)
Dolev Raviv233b5942014-10-23 13:25:14 +03008985 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008986
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008987 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
8988 hba->curr_dev_pwr_mode) &&
8989 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
Stanley Chu1d538642020-12-22 15:29:04 +08008990 hba->uic_link_state) &&
8991 !hba->dev_info.b_rpm_dev_flush_capable)
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008992 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008993
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008994 if (pm_runtime_suspended(hba->dev)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008995 /*
8996 * UFS device and/or UFS link low power states during runtime
8997 * suspend seems to be different than what is expected during
8998 * system suspend. Hence runtime resume the devic & link and
8999 * let the system suspend low power states to take effect.
9000 * TODO: If resume takes longer time, we might have optimize
9001 * it in future by not resuming everything if possible.
9002 */
9003 ret = ufshcd_runtime_resume(hba);
9004 if (ret)
9005 goto out;
9006 }
9007
9008 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
9009out:
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009010 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
9011 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08009012 hba->curr_dev_pwr_mode, hba->uic_link_state);
Dolev Ravive7850602014-09-25 15:32:36 +03009013 if (!ret)
9014 hba->is_sys_suspended = true;
Can Guo88a92d62020-12-02 04:04:01 -08009015 else
Can Guo9cd20d32021-01-13 19:13:28 -08009016 up(&hba->host_sem);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009017 return ret;
9018}
9019EXPORT_SYMBOL(ufshcd_system_suspend);
9020
9021/**
9022 * ufshcd_system_resume - system resume routine
9023 * @hba: per adapter instance
9024 *
9025 * Returns 0 for success and non-zero for failure
9026 */
9027
9028int ufshcd_system_resume(struct ufs_hba *hba)
9029{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009030 int ret = 0;
9031 ktime_t start = ktime_get();
9032
Can Guofb7afe22021-01-13 19:13:27 -08009033 if (!hba)
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07009034 return -EINVAL;
Can Guofb7afe22021-01-13 19:13:27 -08009035
9036 if (unlikely(early_suspend)) {
9037 early_suspend = false;
Can Guo9cd20d32021-01-13 19:13:28 -08009038 down(&hba->host_sem);
Can Guo88a92d62020-12-02 04:04:01 -08009039 }
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07009040
9041 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009042 /*
9043 * Let the runtime resume take care of resuming
9044 * if runtime suspended.
9045 */
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009046 goto out;
9047 else
9048 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
9049out:
9050 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
9051 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08009052 hba->curr_dev_pwr_mode, hba->uic_link_state);
Stanley Chuce9e7bc2019-01-07 22:19:34 +08009053 if (!ret)
9054 hba->is_sys_suspended = false;
Can Guo9cd20d32021-01-13 19:13:28 -08009055 up(&hba->host_sem);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009056 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009057}
9058EXPORT_SYMBOL(ufshcd_system_resume);
9059
9060/**
9061 * ufshcd_runtime_suspend - runtime suspend routine
9062 * @hba: per adapter instance
9063 *
9064 * Check the description of ufshcd_suspend() function for more details.
9065 *
9066 * Returns 0 for success and non-zero for failure
9067 */
9068int ufshcd_runtime_suspend(struct ufs_hba *hba)
9069{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009070 int ret = 0;
9071 ktime_t start = ktime_get();
9072
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07009073 if (!hba)
9074 return -EINVAL;
9075
9076 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009077 goto out;
9078 else
9079 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
9080out:
9081 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
9082 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08009083 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009084 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309085}
9086EXPORT_SYMBOL(ufshcd_runtime_suspend);
9087
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009088/**
9089 * ufshcd_runtime_resume - runtime resume routine
9090 * @hba: per adapter instance
9091 *
9092 * This function basically brings the UFS device, UniPro link and controller
9093 * to active state. Following operations are done in this function:
9094 *
9095 * 1. Turn on all the controller related clocks
9096 * 2. Bring the UniPro link out of Hibernate state
9097 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
9098 * to active state.
9099 * 4. If auto-bkops is enabled on the device, disable it.
9100 *
9101 * So following would be the possible power state after this function return
9102 * successfully:
9103 * S1: UFS device in Active state with VCC rail ON
9104 * UniPro link in Active state
9105 * All the UFS/UniPro controller clocks are ON
9106 *
9107 * Returns 0 for success and non-zero for failure
9108 */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309109int ufshcd_runtime_resume(struct ufs_hba *hba)
9110{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009111 int ret = 0;
9112 ktime_t start = ktime_get();
9113
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07009114 if (!hba)
9115 return -EINVAL;
9116
9117 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009118 goto out;
9119 else
9120 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
9121out:
9122 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
9123 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08009124 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009125 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309126}
9127EXPORT_SYMBOL(ufshcd_runtime_resume);
9128
9129int ufshcd_runtime_idle(struct ufs_hba *hba)
9130{
9131 return 0;
9132}
9133EXPORT_SYMBOL(ufshcd_runtime_idle);
9134
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309135/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009136 * ufshcd_shutdown - shutdown routine
9137 * @hba: per adapter instance
9138 *
9139 * This function would power off both UFS device and UFS link.
9140 *
9141 * Returns 0 always to allow force shutdown even in case of errors.
9142 */
9143int ufshcd_shutdown(struct ufs_hba *hba)
9144{
9145 int ret = 0;
9146
Can Guo9cd20d32021-01-13 19:13:28 -08009147 down(&hba->host_sem);
9148 hba->shutting_down = true;
9149 up(&hba->host_sem);
9150
Stanley Chuf51913e2019-09-18 12:20:38 +08009151 if (!hba->is_powered)
9152 goto out;
9153
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009154 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
9155 goto out;
9156
Stanley Chue92643d2020-11-19 14:29:16 +08009157 pm_runtime_get_sync(hba->dev);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009158
9159 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
9160out:
9161 if (ret)
9162 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
Can Guo88a92d62020-12-02 04:04:01 -08009163 hba->is_powered = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009164 /* allow force shutdown even in case of errors */
9165 return 0;
9166}
9167EXPORT_SYMBOL(ufshcd_shutdown);
9168
9169/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309170 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309171 * data structure memory
Bart Van Assche8aa29f12018-03-01 15:07:20 -08009172 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309173 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309174void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309175{
Avri Altmandf032bf2018-10-07 17:30:35 +03009176 ufs_bsg_remove(hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02009177 ufs_sysfs_remove_nodes(hba->dev);
Bart Van Assche69a6c262019-12-09 10:13:09 -08009178 blk_cleanup_queue(hba->tmf_queue);
9179 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08009180 blk_cleanup_queue(hba->cmd_queue);
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05309181 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309182 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05309183 ufshcd_disable_intr(hba, hba->intr_mask);
Bart Van Assche5cac1092020-05-07 15:27:50 -07009184 ufshcd_hba_stop(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03009185 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309186}
9187EXPORT_SYMBOL_GPL(ufshcd_remove);
9188
9189/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02009190 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
9191 * @hba: pointer to Host Bus Adapter (HBA)
9192 */
9193void ufshcd_dealloc_host(struct ufs_hba *hba)
9194{
9195 scsi_host_put(hba->host);
9196}
9197EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
9198
9199/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09009200 * ufshcd_set_dma_mask - Set dma mask based on the controller
9201 * addressing capability
9202 * @hba: per adapter instance
9203 *
9204 * Returns 0 for success, non-zero for failure
9205 */
9206static int ufshcd_set_dma_mask(struct ufs_hba *hba)
9207{
9208 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
9209 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
9210 return 0;
9211 }
9212 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
9213}
9214
9215/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009216 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309217 * @dev: pointer to device handle
9218 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309219 * Returns 0 on success, non-zero value on failure
9220 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009221int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309222{
9223 struct Scsi_Host *host;
9224 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009225 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309226
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309227 if (!dev) {
9228 dev_err(dev,
9229 "Invalid memory reference for dev is NULL\n");
9230 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309231 goto out_error;
9232 }
9233
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309234 host = scsi_host_alloc(&ufshcd_driver_template,
9235 sizeof(struct ufs_hba));
9236 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309237 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309238 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309239 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309240 }
9241 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309242 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309243 hba->dev = dev;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009244 *hba_handle = hba;
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05309245 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009246
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03009247 INIT_LIST_HEAD(&hba->clk_list_head);
9248
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009249out_error:
9250 return err;
9251}
9252EXPORT_SYMBOL(ufshcd_alloc_host);
9253
Bart Van Assche69a6c262019-12-09 10:13:09 -08009254/* This function exists because blk_mq_alloc_tag_set() requires this. */
9255static blk_status_t ufshcd_queue_tmf(struct blk_mq_hw_ctx *hctx,
9256 const struct blk_mq_queue_data *qd)
9257{
9258 WARN_ON_ONCE(true);
9259 return BLK_STS_NOTSUPP;
9260}
9261
9262static const struct blk_mq_ops ufshcd_tmf_ops = {
9263 .queue_rq = ufshcd_queue_tmf,
9264};
9265
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009266/**
9267 * ufshcd_init - Driver initialization routine
9268 * @hba: per-adapter instance
9269 * @mmio_base: base register address
9270 * @irq: Interrupt line of device
9271 * Returns 0 on success, non-zero value on failure
9272 */
9273int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
9274{
9275 int err;
9276 struct Scsi_Host *host = hba->host;
9277 struct device *dev = hba->dev;
Can Guo4db7a232020-08-09 05:15:51 -07009278 char eh_wq_name[sizeof("ufs_eh_wq_00")];
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009279
9280 if (!mmio_base) {
9281 dev_err(hba->dev,
9282 "Invalid memory reference for mmio_base is NULL\n");
9283 err = -ENODEV;
9284 goto out_error;
9285 }
9286
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309287 hba->mmio_base = mmio_base;
9288 hba->irq = irq;
Stanley Chu90b84912020-05-09 17:37:13 +08009289 hba->vps = &ufs_hba_vps;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309290
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03009291 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009292 if (err)
9293 goto out_error;
9294
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309295 /* Read capabilities registers */
Satya Tangiraladf043c742020-07-06 20:04:14 +00009296 err = ufshcd_hba_capabilities(hba);
9297 if (err)
9298 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309299
9300 /* Get UFS version supported by the controller */
9301 hba->ufs_version = ufshcd_get_ufs_version(hba);
9302
Yaniv Gardic01848c2016-12-05 19:25:02 -08009303 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
9304 (hba->ufs_version != UFSHCI_VERSION_11) &&
9305 (hba->ufs_version != UFSHCI_VERSION_20) &&
9306 (hba->ufs_version != UFSHCI_VERSION_21))
9307 dev_err(hba->dev, "invalid UFS version 0x%x\n",
9308 hba->ufs_version);
9309
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05309310 /* Get Interrupt bit mask per version */
9311 hba->intr_mask = ufshcd_get_intr_mask(hba);
9312
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09009313 err = ufshcd_set_dma_mask(hba);
9314 if (err) {
9315 dev_err(hba->dev, "set dma mask failed\n");
9316 goto out_disable;
9317 }
9318
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309319 /* Allocate memory for host memory space */
9320 err = ufshcd_memory_alloc(hba);
9321 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309322 dev_err(hba->dev, "Memory allocation failed\n");
9323 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309324 }
9325
9326 /* Configure LRB */
9327 ufshcd_host_memory_configure(hba);
9328
9329 host->can_queue = hba->nutrs;
9330 host->cmd_per_lun = hba->nutrs;
9331 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03009332 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309333 host->max_channel = UFSHCD_MAX_CHANNEL;
9334 host->unique_id = host->host_no;
Avri Altmana851b2b2018-10-07 17:30:34 +03009335 host->max_cmd_len = UFS_CDB_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309336
Dolev Raviv7eb584d2014-09-25 15:32:31 +03009337 hba->max_pwr_info.is_valid = false;
9338
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309339 /* Initialize work queues */
Can Guo4db7a232020-08-09 05:15:51 -07009340 snprintf(eh_wq_name, sizeof(eh_wq_name), "ufs_eh_wq_%d",
9341 hba->host->host_no);
9342 hba->eh_wq = create_singlethread_workqueue(eh_wq_name);
9343 if (!hba->eh_wq) {
9344 dev_err(hba->dev, "%s: failed to create eh workqueue\n",
9345 __func__);
9346 err = -ENOMEM;
9347 goto out_disable;
9348 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05309349 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309350 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309351
Can Guo9cd20d32021-01-13 19:13:28 -08009352 sema_init(&hba->host_sem, 1);
Can Guo88a92d62020-12-02 04:04:01 -08009353
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309354 /* Initialize UIC command mutex */
9355 mutex_init(&hba->uic_cmd_mutex);
9356
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05309357 /* Initialize mutex for device management commands */
9358 mutex_init(&hba->dev_cmd.lock);
9359
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08009360 init_rwsem(&hba->clk_scaling_lock);
9361
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009362 ufshcd_init_clk_gating(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02009363
Vivek Gautameebcc192018-08-07 23:17:39 +05309364 ufshcd_init_clk_scaling(hba);
9365
Yaniv Gardi199ef132016-03-10 17:37:06 +02009366 /*
9367 * In order to avoid any spurious interrupt immediately after
9368 * registering UFS controller interrupt handler, clear any pending UFS
9369 * interrupt status and disable all the UFS interrupts.
9370 */
9371 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
9372 REG_INTERRUPT_STATUS);
9373 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
9374 /*
9375 * Make sure that UFS interrupts are disabled and any pending interrupt
9376 * status is cleared before registering UFS interrupt handler.
9377 */
9378 mb();
9379
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309380 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09009381 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309382 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309383 dev_err(hba->dev, "request irq failed\n");
Can Guo4543d9d2021-01-20 02:04:22 -08009384 goto out_disable;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009385 } else {
9386 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309387 }
9388
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309389 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309390 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309391 dev_err(hba->dev, "scsi_add_host failed\n");
Can Guo4543d9d2021-01-20 02:04:22 -08009392 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309393 }
9394
Bart Van Assche7252a362019-12-09 10:13:08 -08009395 hba->cmd_queue = blk_mq_init_queue(&hba->host->tag_set);
9396 if (IS_ERR(hba->cmd_queue)) {
9397 err = PTR_ERR(hba->cmd_queue);
9398 goto out_remove_scsi_host;
9399 }
9400
Bart Van Assche69a6c262019-12-09 10:13:09 -08009401 hba->tmf_tag_set = (struct blk_mq_tag_set) {
9402 .nr_hw_queues = 1,
9403 .queue_depth = hba->nutmrs,
9404 .ops = &ufshcd_tmf_ops,
9405 .flags = BLK_MQ_F_NO_SCHED,
9406 };
9407 err = blk_mq_alloc_tag_set(&hba->tmf_tag_set);
9408 if (err < 0)
9409 goto free_cmd_queue;
9410 hba->tmf_queue = blk_mq_init_queue(&hba->tmf_tag_set);
9411 if (IS_ERR(hba->tmf_queue)) {
9412 err = PTR_ERR(hba->tmf_queue);
9413 goto free_tmf_tag_set;
9414 }
9415
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07009416 /* Reset the attached device */
Stanley Chu31a5d9c2020-12-08 21:56:35 +08009417 ufshcd_device_reset(hba);
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07009418
Satya Tangiraladf043c742020-07-06 20:04:14 +00009419 ufshcd_init_crypto(hba);
9420
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309421 /* Host controller enable */
9422 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309423 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309424 dev_err(hba->dev, "Host controller enable failed\n");
Stanley Chue965e5e2020-12-05 19:58:59 +08009425 ufshcd_print_evt_hist(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08009426 ufshcd_print_host_state(hba);
Bart Van Assche69a6c262019-12-09 10:13:09 -08009427 goto free_tmf_queue;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309428 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309429
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -08009430 /*
9431 * Set the default power management level for runtime and system PM.
9432 * Default power saving mode is to keep UFS link in Hibern8 state
9433 * and UFS device in sleep state.
9434 */
9435 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9436 UFS_SLEEP_PWR_MODE,
9437 UIC_LINK_HIBERN8_STATE);
9438 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9439 UFS_SLEEP_PWR_MODE,
9440 UIC_LINK_HIBERN8_STATE);
9441
Stanley Chu51dd9052020-05-22 16:32:12 +08009442 INIT_DELAYED_WORK(&hba->rpm_dev_flush_recheck_work,
9443 ufshcd_rpm_dev_flush_recheck_work);
9444
Adrian Hunterad448372018-03-20 15:07:38 +02009445 /* Set the default auto-hiberate idle timer value to 150 ms */
Stanley Chuf571b372019-05-21 14:44:53 +08009446 if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
Adrian Hunterad448372018-03-20 15:07:38 +02009447 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
9448 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
9449 }
9450
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05309451 /* Hold auto suspend until async scan completes */
9452 pm_runtime_get_sync(dev);
Subhash Jadavani38135532018-05-03 16:37:18 +05309453 atomic_set(&hba->scsi_block_reqs_cnt, 0);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009454 /*
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08009455 * We are assuming that device wasn't put in sleep/power-down
9456 * state exclusively during the boot stage before kernel.
9457 * This assumption helps avoid doing link startup twice during
9458 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009459 */
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08009460 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009461
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309462 async_schedule(ufshcd_async_scan, hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02009463 ufs_sysfs_add_nodes(hba->dev);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309464
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309465 return 0;
9466
Bart Van Assche69a6c262019-12-09 10:13:09 -08009467free_tmf_queue:
9468 blk_cleanup_queue(hba->tmf_queue);
9469free_tmf_tag_set:
9470 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08009471free_cmd_queue:
9472 blk_cleanup_queue(hba->cmd_queue);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309473out_remove_scsi_host:
9474 scsi_remove_host(hba->host);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309475out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009476 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03009477 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309478out_error:
9479 return err;
9480}
9481EXPORT_SYMBOL_GPL(ufshcd_init);
9482
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02009483static int __init ufshcd_core_init(void)
9484{
9485 ufs_debugfs_init();
9486 return 0;
9487}
9488
9489static void __exit ufshcd_core_exit(void)
9490{
9491 ufs_debugfs_exit();
9492}
9493
9494module_init(ufshcd_core_init);
9495module_exit(ufshcd_core_exit);
9496
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309497MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
9498MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05309499MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309500MODULE_LICENSE("GPL");
9501MODULE_VERSION(UFSHCD_DRIVER_VERSION);