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Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05302 * Universal Flash Storage Host controller driver Core
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303 *
4 * This code is based on drivers/scsi/ufs/ufshcd.c
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053011 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053016 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053018 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053024 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030035 *
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053038 */
39
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053040#include <linux/async.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030041#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020042#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020043#include <linux/of.h>
Adrian Hunterad448372018-03-20 15:07:38 +020044#include <linux/bitfield.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053045#include "ufshcd.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020046#include "ufs_quirks.h"
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +053047#include "unipro.h"
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +020048#include "ufs-sysfs.h"
Avri Altmandf032bf2018-10-07 17:30:35 +030049#include "ufs_bsg.h"
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053050
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -080051#define CREATE_TRACE_POINTS
52#include <trace/events/ufs.h>
53
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053054#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
55 UTP_TASK_REQ_COMPL |\
56 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053057/* UIC command timeout, unit: ms */
58#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053059
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053060/* NOP OUT retries waiting for NOP IN response */
61#define NOP_OUT_RETRIES 10
62/* Timeout after 30 msecs if NOP OUT hangs without response */
63#define NOP_OUT_TIMEOUT 30 /* msecs */
64
Dolev Raviv68078d52013-07-30 00:35:58 +053065/* Query request retries */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080066#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +053067/* Query request timeout */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080068#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +053069
Sujit Reddy Thummae2933132014-05-26 10:59:12 +053070/* Task management command timeout */
71#define TM_CMD_TIMEOUT 100 /* msecs */
72
Yaniv Gardi64238fb2016-02-01 15:02:43 +020073/* maximum number of retries for a general UIC command */
74#define UFS_UIC_COMMAND_RETRIES 3
75
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030076/* maximum number of link-startup retries */
77#define DME_LINKSTARTUP_RETRIES 3
78
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +020079/* Maximum retries for Hibern8 enter */
80#define UIC_HIBERN8_ENTER_RETRIES 3
81
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030082/* maximum number of reset retries before giving up */
83#define MAX_HOST_RESET_RETRIES 5
84
Dolev Raviv68078d52013-07-30 00:35:58 +053085/* Expose the flag value from utp_upiu_query.value */
86#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
87
Seungwon Jeon7d568652013-08-31 21:40:20 +053088/* Interrupt aggregation default timeout, unit: 40us */
89#define INT_AGGR_DEF_TO 0x02
90
Stanley Chu49615ba2019-09-16 23:56:50 +080091/* default delay of autosuspend: 2000 ms */
92#define RPM_AUTOSUSPEND_DELAY_MS 2000
93
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030094#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
95 ({ \
96 int _ret; \
97 if (_on) \
98 _ret = ufshcd_enable_vreg(_dev, _vreg); \
99 else \
100 _ret = ufshcd_disable_vreg(_dev, _vreg); \
101 _ret; \
102 })
103
Tomas Winklerba809172018-06-14 11:14:09 +0300104#define ufshcd_hex_dump(prefix_str, buf, len) do { \
105 size_t __len = (len); \
106 print_hex_dump(KERN_ERR, prefix_str, \
107 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
108 16, 4, buf, __len, false); \
109} while (0)
110
111int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
112 const char *prefix)
113{
Marc Gonzalezd6724752019-01-22 18:29:22 +0100114 u32 *regs;
115 size_t pos;
116
117 if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
118 return -EINVAL;
Tomas Winklerba809172018-06-14 11:14:09 +0300119
Can Guocddaeba2019-11-14 22:09:27 -0800120 regs = kzalloc(len, GFP_ATOMIC);
Tomas Winklerba809172018-06-14 11:14:09 +0300121 if (!regs)
122 return -ENOMEM;
123
Marc Gonzalezd6724752019-01-22 18:29:22 +0100124 for (pos = 0; pos < len; pos += 4)
125 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
126
Tomas Winklerba809172018-06-14 11:14:09 +0300127 ufshcd_hex_dump(prefix, regs, len);
128 kfree(regs);
129
130 return 0;
131}
132EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800133
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530134enum {
135 UFSHCD_MAX_CHANNEL = 0,
136 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530137 UFSHCD_CMD_PER_LUN = 32,
138 UFSHCD_CAN_QUEUE = 32,
139};
140
141/* UFSHCD states */
142enum {
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530143 UFSHCD_STATE_RESET,
144 UFSHCD_STATE_ERROR,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530145 UFSHCD_STATE_OPERATIONAL,
Zang Leigang141f8162016-11-16 11:29:37 +0800146 UFSHCD_STATE_EH_SCHEDULED,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530147};
148
149/* UFSHCD error handling flags */
150enum {
151 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530152};
153
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530154/* UFSHCD UIC layer error flags */
155enum {
156 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200157 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
158 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
159 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
160 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
161 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530162};
163
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530164#define ufshcd_set_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300165 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530166#define ufshcd_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300167 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530168#define ufshcd_clear_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300169 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530170
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300171#define ufshcd_set_ufs_dev_active(h) \
172 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
173#define ufshcd_set_ufs_dev_sleep(h) \
174 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
175#define ufshcd_set_ufs_dev_poweroff(h) \
176 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
177#define ufshcd_is_ufs_dev_active(h) \
178 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
179#define ufshcd_is_ufs_dev_sleep(h) \
180 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
181#define ufshcd_is_ufs_dev_poweroff(h) \
182 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
183
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +0200184struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300185 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
186 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
187 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
188 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
189 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
190 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
191};
192
193static inline enum ufs_dev_pwr_mode
194ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
195{
196 return ufs_pm_lvl_states[lvl].dev_state;
197}
198
199static inline enum uic_link_state
200ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
201{
202 return ufs_pm_lvl_states[lvl].link_state;
203}
204
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -0800205static inline enum ufs_pm_level
206ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
207 enum uic_link_state link_state)
208{
209 enum ufs_pm_level lvl;
210
211 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
212 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
213 (ufs_pm_lvl_states[lvl].link_state == link_state))
214 return lvl;
215 }
216
217 /* if no match found, return the level 0 */
218 return UFS_PM_LVL_0;
219}
220
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800221static struct ufs_dev_fix ufs_fixups[] = {
222 /* UFS cards deviations table */
223 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
224 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800225 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
226 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
227 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800228 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
229 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
230 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
231 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
232 UFS_DEVICE_QUIRK_PA_TACTIVATE),
233 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
234 UFS_DEVICE_QUIRK_PA_TACTIVATE),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800235 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
236 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
Wei Li8e4829c2018-11-08 09:08:29 -0800237 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
238 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800239
240 END_FIX
241};
242
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -0800243static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530244static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530245static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Dolev Ravive7d38252016-12-22 18:40:07 -0800246static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530247static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300248static void ufshcd_hba_exit(struct ufs_hba *hba);
249static int ufshcd_probe_hba(struct ufs_hba *hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300250static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
251 bool skip_ref_clk);
252static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300253static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300254static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300255static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800256static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
257static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800258static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800259static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300260static irqreturn_t ufshcd_intr(int irq, void *__hba);
Yaniv Gardi874237f2015-05-17 18:55:03 +0300261static int ufshcd_change_power_mode(struct ufs_hba *hba,
262 struct ufs_pa_layer_attr *pwr_mode);
Yaniv Gardi14497322016-02-01 15:02:39 +0200263static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
264{
265 return tag >= 0 && tag < hba->nutrs;
266}
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300267
Can Guo5231d382019-12-05 02:14:46 +0000268static inline void ufshcd_enable_irq(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300269{
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300270 if (!hba->is_irq_enabled) {
Can Guo5231d382019-12-05 02:14:46 +0000271 enable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300272 hba->is_irq_enabled = true;
273 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300274}
275
276static inline void ufshcd_disable_irq(struct ufs_hba *hba)
277{
278 if (hba->is_irq_enabled) {
Can Guo5231d382019-12-05 02:14:46 +0000279 disable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300280 hba->is_irq_enabled = false;
281 }
282}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530283
Subhash Jadavani38135532018-05-03 16:37:18 +0530284static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
285{
286 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
287 scsi_unblock_requests(hba->host);
288}
289
290static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
291{
292 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
293 scsi_block_requests(hba->host);
294}
295
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300296static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
297 const char *str)
298{
299 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
300
301 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
302}
303
304static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
305 const char *str)
306{
307 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
308
309 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
310}
311
312static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
313 const char *str)
314{
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300315 int off = (int)tag - hba->nutrs;
Christoph Hellwig391e3882018-10-07 17:30:32 +0300316 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300317
Christoph Hellwig391e3882018-10-07 17:30:32 +0300318 trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
319 &descp->input_param1);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300320}
321
Lee Susman1a07f2d2016-12-22 18:42:03 -0800322static void ufshcd_add_command_trace(struct ufs_hba *hba,
323 unsigned int tag, const char *str)
324{
325 sector_t lba = -1;
326 u8 opcode = 0;
327 u32 intr, doorbell;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300328 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800329 struct scsi_cmnd *cmd = lrbp->cmd;
Lee Susman1a07f2d2016-12-22 18:42:03 -0800330 int transfer_len = -1;
331
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300332 if (!trace_ufshcd_command_enabled()) {
333 /* trace UPIU W/O tracing command */
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800334 if (cmd)
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300335 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800336 return;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300337 }
Lee Susman1a07f2d2016-12-22 18:42:03 -0800338
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800339 if (cmd) { /* data phase exists */
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300340 /* trace UPIU also */
341 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800342 opcode = cmd->cmnd[0];
Lee Susman1a07f2d2016-12-22 18:42:03 -0800343 if ((opcode == READ_10) || (opcode == WRITE_10)) {
344 /*
345 * Currently we only fully trace read(10) and write(10)
346 * commands
347 */
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800348 if (cmd->request && cmd->request->bio)
349 lba = cmd->request->bio->bi_iter.bi_sector;
Lee Susman1a07f2d2016-12-22 18:42:03 -0800350 transfer_len = be32_to_cpu(
351 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
352 }
353 }
354
355 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
356 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
357 trace_ufshcd_command(dev_name(hba->dev), str, tag,
358 doorbell, transfer_len, intr, lba, opcode);
359}
360
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800361static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
362{
363 struct ufs_clk_info *clki;
364 struct list_head *head = &hba->clk_list_head;
365
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300366 if (list_empty(head))
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800367 return;
368
369 list_for_each_entry(clki, head, list) {
370 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
371 clki->max_freq)
372 dev_err(hba->dev, "clk: %s, rate: %u\n",
373 clki->name, clki->curr_freq);
374 }
375}
376
Stanley Chu48d5b972019-07-10 21:38:18 +0800377static void ufshcd_print_err_hist(struct ufs_hba *hba,
378 struct ufs_err_reg_hist *err_hist,
379 char *err_name)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800380{
381 int i;
Stanley Chu27752642019-01-28 22:04:26 +0800382 bool found = false;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800383
Stanley Chu48d5b972019-07-10 21:38:18 +0800384 for (i = 0; i < UFS_ERR_REG_HIST_LENGTH; i++) {
385 int p = (i + err_hist->pos) % UFS_ERR_REG_HIST_LENGTH;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800386
Stanley Chu645728a2020-01-04 22:26:06 +0800387 if (err_hist->tstamp[p] == 0)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800388 continue;
Stanley Chuc5397f12019-07-10 21:38:20 +0800389 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800390 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
Stanley Chu27752642019-01-28 22:04:26 +0800391 found = true;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800392 }
Stanley Chu27752642019-01-28 22:04:26 +0800393
394 if (!found)
Stanley Chufd1fb4d2020-01-04 22:26:08 +0800395 dev_err(hba->dev, "No record of %s\n", err_name);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800396}
397
Dolev Raviv66cc8202016-12-22 18:39:42 -0800398static void ufshcd_print_host_regs(struct ufs_hba *hba)
399{
Tomas Winklerba809172018-06-14 11:14:09 +0300400 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
Dolev Raviv66cc8202016-12-22 18:39:42 -0800401 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
402 hba->ufs_version, hba->capabilities);
403 dev_err(hba->dev,
404 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
405 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800406 dev_err(hba->dev,
407 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
408 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
409 hba->ufs_stats.hibern8_exit_cnt);
410
Stanley Chu48d5b972019-07-10 21:38:18 +0800411 ufshcd_print_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
412 ufshcd_print_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
413 ufshcd_print_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
414 ufshcd_print_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
415 ufshcd_print_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
Stanley Chud3c615b2019-07-10 21:38:19 +0800416 ufshcd_print_err_hist(hba, &hba->ufs_stats.auto_hibern8_err,
417 "auto_hibern8_err");
Stanley Chu8808b4e2019-07-10 21:38:21 +0800418 ufshcd_print_err_hist(hba, &hba->ufs_stats.fatal_err, "fatal_err");
419 ufshcd_print_err_hist(hba, &hba->ufs_stats.link_startup_err,
420 "link_startup_fail");
421 ufshcd_print_err_hist(hba, &hba->ufs_stats.resume_err, "resume_fail");
422 ufshcd_print_err_hist(hba, &hba->ufs_stats.suspend_err,
423 "suspend_fail");
424 ufshcd_print_err_hist(hba, &hba->ufs_stats.dev_reset, "dev_reset");
425 ufshcd_print_err_hist(hba, &hba->ufs_stats.host_reset, "host_reset");
426 ufshcd_print_err_hist(hba, &hba->ufs_stats.task_abort, "task_abort");
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800427
428 ufshcd_print_clk_freqs(hba);
429
Stanley Chu7c486d912019-12-24 21:01:06 +0800430 ufshcd_vops_dbg_register_dump(hba);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800431}
432
433static
434void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
435{
436 struct ufshcd_lrb *lrbp;
Gilad Broner7fabb772017-02-03 16:56:50 -0800437 int prdt_length;
Dolev Raviv66cc8202016-12-22 18:39:42 -0800438 int tag;
439
440 for_each_set_bit(tag, &bitmap, hba->nutrs) {
441 lrbp = &hba->lrb[tag];
442
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800443 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
444 tag, ktime_to_us(lrbp->issue_time_stamp));
Zang Leigang09017182017-09-27 10:06:06 +0800445 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
446 tag, ktime_to_us(lrbp->compl_time_stamp));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800447 dev_err(hba->dev,
448 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
449 tag, (u64)lrbp->utrd_dma_addr);
450
Dolev Raviv66cc8202016-12-22 18:39:42 -0800451 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
452 sizeof(struct utp_transfer_req_desc));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800453 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
454 (u64)lrbp->ucd_req_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800455 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
456 sizeof(struct utp_upiu_req));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800457 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
458 (u64)lrbp->ucd_rsp_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800459 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
460 sizeof(struct utp_upiu_rsp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800461
Gilad Broner7fabb772017-02-03 16:56:50 -0800462 prdt_length = le16_to_cpu(
463 lrbp->utr_descriptor_ptr->prd_table_length);
464 dev_err(hba->dev,
465 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
466 tag, prdt_length,
467 (u64)lrbp->ucd_prdt_dma_addr);
468
469 if (pr_prdt)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800470 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
Gilad Broner7fabb772017-02-03 16:56:50 -0800471 sizeof(struct ufshcd_sg_entry) * prdt_length);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800472 }
473}
474
475static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
476{
Dolev Raviv66cc8202016-12-22 18:39:42 -0800477 int tag;
478
479 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
Christoph Hellwig391e3882018-10-07 17:30:32 +0300480 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
481
Dolev Raviv66cc8202016-12-22 18:39:42 -0800482 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
Christoph Hellwig391e3882018-10-07 17:30:32 +0300483 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800484 }
485}
486
Gilad Broner6ba65582017-02-03 16:57:28 -0800487static void ufshcd_print_host_state(struct ufs_hba *hba)
488{
489 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
Bart Van Assche7252a362019-12-09 10:13:08 -0800490 dev_err(hba->dev, "outstanding reqs=0x%lx tasks=0x%lx\n",
491 hba->outstanding_reqs, hba->outstanding_tasks);
Gilad Broner6ba65582017-02-03 16:57:28 -0800492 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
493 hba->saved_err, hba->saved_uic_err);
494 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
495 hba->curr_dev_pwr_mode, hba->uic_link_state);
496 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
497 hba->pm_op_in_progress, hba->is_sys_suspended);
498 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
499 hba->auto_bkops_enabled, hba->host->host_self_blocked);
500 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
501 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
502 hba->eh_flags, hba->req_abort_count);
503 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
504 hba->capabilities, hba->caps);
505 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
506 hba->dev_quirks);
507}
508
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800509/**
510 * ufshcd_print_pwr_info - print power params as saved in hba
511 * power info
512 * @hba: per-adapter instance
513 */
514static void ufshcd_print_pwr_info(struct ufs_hba *hba)
515{
516 static const char * const names[] = {
517 "INVALID MODE",
518 "FAST MODE",
519 "SLOW_MODE",
520 "INVALID MODE",
521 "FASTAUTO_MODE",
522 "SLOWAUTO_MODE",
523 "INVALID MODE",
524 };
525
526 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
527 __func__,
528 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
529 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
530 names[hba->pwr_info.pwr_rx],
531 names[hba->pwr_info.pwr_tx],
532 hba->pwr_info.hs_rate);
533}
534
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530535/*
536 * ufshcd_wait_for_register - wait for register value to change
537 * @hba - per-adapter interface
538 * @reg - mmio register offset
539 * @mask - mask to apply to read register value
540 * @val - wait condition
541 * @interval_us - polling interval in microsecs
542 * @timeout_ms - timeout in millisecs
Yaniv Gardi596585a2016-03-10 17:37:08 +0200543 * @can_sleep - perform sleep or just spin
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530544 *
545 * Returns -ETIMEDOUT on error, zero on success
546 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200547int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
548 u32 val, unsigned long interval_us,
549 unsigned long timeout_ms, bool can_sleep)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530550{
551 int err = 0;
552 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
553
554 /* ignore bits that we don't intend to wait on */
555 val = val & mask;
556
557 while ((ufshcd_readl(hba, reg) & mask) != val) {
Yaniv Gardi596585a2016-03-10 17:37:08 +0200558 if (can_sleep)
559 usleep_range(interval_us, interval_us + 50);
560 else
561 udelay(interval_us);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530562 if (time_after(jiffies, timeout)) {
563 if ((ufshcd_readl(hba, reg) & mask) != val)
564 err = -ETIMEDOUT;
565 break;
566 }
567 }
568
569 return err;
570}
571
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530572/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530573 * ufshcd_get_intr_mask - Get the interrupt bit mask
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800574 * @hba: Pointer to adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530575 *
576 * Returns interrupt bit mask per version
577 */
578static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
579{
Yaniv Gardic01848c2016-12-05 19:25:02 -0800580 u32 intr_mask = 0;
581
582 switch (hba->ufs_version) {
583 case UFSHCI_VERSION_10:
584 intr_mask = INTERRUPT_MASK_ALL_VER_10;
585 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800586 case UFSHCI_VERSION_11:
587 case UFSHCI_VERSION_20:
588 intr_mask = INTERRUPT_MASK_ALL_VER_11;
589 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800590 case UFSHCI_VERSION_21:
591 default:
592 intr_mask = INTERRUPT_MASK_ALL_VER_21;
Tomohiro Kusumi031d1e02017-03-23 12:49:04 +0200593 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800594 }
595
596 return intr_mask;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530597}
598
599/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530600 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800601 * @hba: Pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530602 *
603 * Returns UFSHCI version supported by the controller
604 */
605static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
606{
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200607 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
608 return ufshcd_vops_get_ufs_hci_version(hba);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300609
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530610 return ufshcd_readl(hba, REG_UFS_VERSION);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530611}
612
613/**
614 * ufshcd_is_device_present - Check if any device connected to
615 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300616 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530617 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300618 * Returns true if device present, false if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530619 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300620static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530621{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300622 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300623 DEVICE_PRESENT) ? true : false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530624}
625
626/**
627 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800628 * @lrbp: pointer to local command reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530629 *
630 * This function is used to get the OCS field from UTRD
631 * Returns the OCS field in the UTRD
632 */
633static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
634{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530635 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530636}
637
638/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530639 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
640 * @hba: per adapter instance
641 * @pos: position of the bit to be cleared
642 */
643static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
644{
Alim Akhtar1399c5b2018-05-06 15:44:15 +0530645 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
646 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
647 else
648 ufshcd_writel(hba, ~(1 << pos),
649 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
650}
651
652/**
653 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
654 * @hba: per adapter instance
655 * @pos: position of the bit to be cleared
656 */
657static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
658{
659 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
660 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
661 else
662 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530663}
664
665/**
Yaniv Gardia48353f2016-02-01 15:02:40 +0200666 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
667 * @hba: per adapter instance
668 * @tag: position of the bit to be cleared
669 */
670static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
671{
672 __clear_bit(tag, &hba->outstanding_reqs);
673}
674
675/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530676 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
677 * @reg: Register value of host controller status
678 *
679 * Returns integer, 0 on Success and positive value if failed
680 */
681static inline int ufshcd_get_lists_status(u32 reg)
682{
Tomohiro Kusumi6cf16112017-04-26 20:28:58 +0300683 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530684}
685
686/**
687 * ufshcd_get_uic_cmd_result - Get the UIC command result
688 * @hba: Pointer to adapter instance
689 *
690 * This function gets the result of UIC command completion
691 * Returns 0 on success, non zero value on error
692 */
693static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
694{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530695 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530696 MASK_UIC_COMMAND_RESULT;
697}
698
699/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530700 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
701 * @hba: Pointer to adapter instance
702 *
703 * This function gets UIC command argument3
704 * Returns 0 on success, non zero value on error
705 */
706static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
707{
708 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
709}
710
711/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530712 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530713 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530714 */
715static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530716ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530717{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530718 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530719}
720
721/**
722 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
723 * @ucd_rsp_ptr: pointer to response UPIU
724 *
725 * This function gets the response status and scsi_status from response UPIU
726 * Returns the response result code.
727 */
728static inline int
729ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
730{
731 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
732}
733
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530734/*
735 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
736 * from response UPIU
737 * @ucd_rsp_ptr: pointer to response UPIU
738 *
739 * Return the data segment length.
740 */
741static inline unsigned int
742ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
743{
744 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
745 MASK_RSP_UPIU_DATA_SEG_LEN;
746}
747
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530748/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530749 * ufshcd_is_exception_event - Check if the device raised an exception event
750 * @ucd_rsp_ptr: pointer to response UPIU
751 *
752 * The function checks if the device raised an exception event indicated in
753 * the Device Information field of response UPIU.
754 *
755 * Returns true if exception is raised, false otherwise.
756 */
757static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
758{
759 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
760 MASK_RSP_EXCEPTION_EVENT ? true : false;
761}
762
763/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530764 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530765 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530766 */
767static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530768ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530769{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530770 ufshcd_writel(hba, INT_AGGR_ENABLE |
771 INT_AGGR_COUNTER_AND_TIMER_RESET,
772 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
773}
774
775/**
776 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
777 * @hba: per adapter instance
778 * @cnt: Interrupt aggregation counter threshold
779 * @tmout: Interrupt aggregation timeout value
780 */
781static inline void
782ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
783{
784 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
785 INT_AGGR_COUNTER_THLD_VAL(cnt) |
786 INT_AGGR_TIMEOUT_VAL(tmout),
787 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530788}
789
790/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300791 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
792 * @hba: per adapter instance
793 */
794static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
795{
796 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
797}
798
799/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530800 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
801 * When run-stop registers are set to 1, it indicates the
802 * host controller that it can process the requests
803 * @hba: per adapter instance
804 */
805static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
806{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530807 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
808 REG_UTP_TASK_REQ_LIST_RUN_STOP);
809 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
810 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530811}
812
813/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530814 * ufshcd_hba_start - Start controller initialization sequence
815 * @hba: per adapter instance
816 */
817static inline void ufshcd_hba_start(struct ufs_hba *hba)
818{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530819 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530820}
821
822/**
823 * ufshcd_is_hba_active - Get controller state
824 * @hba: per adapter instance
825 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300826 * Returns false if controller is active, true otherwise
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530827 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300828static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530829{
Tomohiro Kusumi4a8eec22017-03-28 16:49:25 +0300830 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
831 ? false : true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530832}
833
Yaniv Gardi37113102016-03-10 17:37:16 +0200834u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
835{
836 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
837 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
838 (hba->ufs_version == UFSHCI_VERSION_11))
839 return UFS_UNIPRO_VER_1_41;
840 else
841 return UFS_UNIPRO_VER_1_6;
842}
843EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
844
845static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
846{
847 /*
848 * If both host and device support UniPro ver1.6 or later, PA layer
849 * parameters tuning happens during link startup itself.
850 *
851 * We can manually tune PA layer parameters if either host or device
852 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
853 * logic simple, we will only do manual tuning if local unipro version
854 * doesn't support ver1.6 or later.
855 */
856 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
857 return true;
858 else
859 return false;
860}
861
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800862static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
863{
864 int ret = 0;
865 struct ufs_clk_info *clki;
866 struct list_head *head = &hba->clk_list_head;
867 ktime_t start = ktime_get();
868 bool clk_state_changed = false;
869
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300870 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800871 goto out;
872
873 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
874 if (ret)
875 return ret;
876
877 list_for_each_entry(clki, head, list) {
878 if (!IS_ERR_OR_NULL(clki->clk)) {
879 if (scale_up && clki->max_freq) {
880 if (clki->curr_freq == clki->max_freq)
881 continue;
882
883 clk_state_changed = true;
884 ret = clk_set_rate(clki->clk, clki->max_freq);
885 if (ret) {
886 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
887 __func__, clki->name,
888 clki->max_freq, ret);
889 break;
890 }
891 trace_ufshcd_clk_scaling(dev_name(hba->dev),
892 "scaled up", clki->name,
893 clki->curr_freq,
894 clki->max_freq);
895
896 clki->curr_freq = clki->max_freq;
897
898 } else if (!scale_up && clki->min_freq) {
899 if (clki->curr_freq == clki->min_freq)
900 continue;
901
902 clk_state_changed = true;
903 ret = clk_set_rate(clki->clk, clki->min_freq);
904 if (ret) {
905 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
906 __func__, clki->name,
907 clki->min_freq, ret);
908 break;
909 }
910 trace_ufshcd_clk_scaling(dev_name(hba->dev),
911 "scaled down", clki->name,
912 clki->curr_freq,
913 clki->min_freq);
914 clki->curr_freq = clki->min_freq;
915 }
916 }
917 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
918 clki->name, clk_get_rate(clki->clk));
919 }
920
921 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
922
923out:
924 if (clk_state_changed)
925 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
926 (scale_up ? "up" : "down"),
927 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
928 return ret;
929}
930
931/**
932 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
933 * @hba: per adapter instance
934 * @scale_up: True if scaling up and false if scaling down
935 *
936 * Returns true if scaling is required, false otherwise.
937 */
938static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
939 bool scale_up)
940{
941 struct ufs_clk_info *clki;
942 struct list_head *head = &hba->clk_list_head;
943
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300944 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800945 return false;
946
947 list_for_each_entry(clki, head, list) {
948 if (!IS_ERR_OR_NULL(clki->clk)) {
949 if (scale_up && clki->max_freq) {
950 if (clki->curr_freq == clki->max_freq)
951 continue;
952 return true;
953 } else if (!scale_up && clki->min_freq) {
954 if (clki->curr_freq == clki->min_freq)
955 continue;
956 return true;
957 }
958 }
959 }
960
961 return false;
962}
963
964static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
965 u64 wait_timeout_us)
966{
967 unsigned long flags;
968 int ret = 0;
969 u32 tm_doorbell;
970 u32 tr_doorbell;
971 bool timeout = false, do_last_check = false;
972 ktime_t start;
973
974 ufshcd_hold(hba, false);
975 spin_lock_irqsave(hba->host->host_lock, flags);
976 /*
977 * Wait for all the outstanding tasks/transfer requests.
978 * Verify by checking the doorbell registers are clear.
979 */
980 start = ktime_get();
981 do {
982 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
983 ret = -EBUSY;
984 goto out;
985 }
986
987 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
988 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
989 if (!tm_doorbell && !tr_doorbell) {
990 timeout = false;
991 break;
992 } else if (do_last_check) {
993 break;
994 }
995
996 spin_unlock_irqrestore(hba->host->host_lock, flags);
997 schedule();
998 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
999 wait_timeout_us) {
1000 timeout = true;
1001 /*
1002 * We might have scheduled out for long time so make
1003 * sure to check if doorbells are cleared by this time
1004 * or not.
1005 */
1006 do_last_check = true;
1007 }
1008 spin_lock_irqsave(hba->host->host_lock, flags);
1009 } while (tm_doorbell || tr_doorbell);
1010
1011 if (timeout) {
1012 dev_err(hba->dev,
1013 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1014 __func__, tm_doorbell, tr_doorbell);
1015 ret = -EBUSY;
1016 }
1017out:
1018 spin_unlock_irqrestore(hba->host->host_lock, flags);
1019 ufshcd_release(hba);
1020 return ret;
1021}
1022
1023/**
1024 * ufshcd_scale_gear - scale up/down UFS gear
1025 * @hba: per adapter instance
1026 * @scale_up: True for scaling up gear and false for scaling down
1027 *
1028 * Returns 0 for success,
1029 * Returns -EBUSY if scaling can't happen at this time
1030 * Returns non-zero for any other errors
1031 */
1032static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1033{
1034 #define UFS_MIN_GEAR_TO_SCALE_DOWN UFS_HS_G1
1035 int ret = 0;
1036 struct ufs_pa_layer_attr new_pwr_info;
1037
1038 if (scale_up) {
1039 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1040 sizeof(struct ufs_pa_layer_attr));
1041 } else {
1042 memcpy(&new_pwr_info, &hba->pwr_info,
1043 sizeof(struct ufs_pa_layer_attr));
1044
1045 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1046 || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1047 /* save the current power mode */
1048 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1049 &hba->pwr_info,
1050 sizeof(struct ufs_pa_layer_attr));
1051
1052 /* scale down gear */
1053 new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1054 new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1055 }
1056 }
1057
1058 /* check if the power mode needs to be changed or not? */
1059 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1060
1061 if (ret)
1062 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1063 __func__, ret,
1064 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1065 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1066
1067 return ret;
1068}
1069
1070static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1071{
1072 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1073 int ret = 0;
1074 /*
1075 * make sure that there are no outstanding requests when
1076 * clock scaling is in progress
1077 */
Subhash Jadavani38135532018-05-03 16:37:18 +05301078 ufshcd_scsi_block_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001079 down_write(&hba->clk_scaling_lock);
1080 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1081 ret = -EBUSY;
1082 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301083 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001084 }
1085
1086 return ret;
1087}
1088
1089static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1090{
1091 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301092 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001093}
1094
1095/**
1096 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1097 * @hba: per adapter instance
1098 * @scale_up: True for scaling up and false for scalin down
1099 *
1100 * Returns 0 for success,
1101 * Returns -EBUSY if scaling can't happen at this time
1102 * Returns non-zero for any other errors
1103 */
1104static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1105{
1106 int ret = 0;
1107
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001108 /* let's not get into low power until clock scaling is completed */
1109 ufshcd_hold(hba, false);
1110
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001111 ret = ufshcd_clock_scaling_prepare(hba);
1112 if (ret)
1113 return ret;
1114
1115 /* scale down the gear before scaling down clocks */
1116 if (!scale_up) {
1117 ret = ufshcd_scale_gear(hba, false);
1118 if (ret)
1119 goto out;
1120 }
1121
1122 ret = ufshcd_scale_clks(hba, scale_up);
1123 if (ret) {
1124 if (!scale_up)
1125 ufshcd_scale_gear(hba, true);
1126 goto out;
1127 }
1128
1129 /* scale up the gear after scaling up clocks */
1130 if (scale_up) {
1131 ret = ufshcd_scale_gear(hba, true);
1132 if (ret) {
1133 ufshcd_scale_clks(hba, false);
1134 goto out;
1135 }
1136 }
1137
1138 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1139
1140out:
1141 ufshcd_clock_scaling_unprepare(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001142 ufshcd_release(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001143 return ret;
1144}
1145
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001146static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1147{
1148 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1149 clk_scaling.suspend_work);
1150 unsigned long irq_flags;
1151
1152 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1153 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1154 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1155 return;
1156 }
1157 hba->clk_scaling.is_suspended = true;
1158 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1159
1160 __ufshcd_suspend_clkscaling(hba);
1161}
1162
1163static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1164{
1165 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1166 clk_scaling.resume_work);
1167 unsigned long irq_flags;
1168
1169 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1170 if (!hba->clk_scaling.is_suspended) {
1171 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1172 return;
1173 }
1174 hba->clk_scaling.is_suspended = false;
1175 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1176
1177 devfreq_resume_device(hba->devfreq);
1178}
1179
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001180static int ufshcd_devfreq_target(struct device *dev,
1181 unsigned long *freq, u32 flags)
1182{
1183 int ret = 0;
1184 struct ufs_hba *hba = dev_get_drvdata(dev);
1185 ktime_t start;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001186 bool scale_up, sched_clk_scaling_suspend_work = false;
Bjorn Andersson092b4552018-05-17 23:26:37 -07001187 struct list_head *clk_list = &hba->clk_list_head;
1188 struct ufs_clk_info *clki;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001189 unsigned long irq_flags;
1190
1191 if (!ufshcd_is_clkscaling_supported(hba))
1192 return -EINVAL;
1193
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001194 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1195 if (ufshcd_eh_in_progress(hba)) {
1196 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1197 return 0;
1198 }
1199
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001200 if (!hba->clk_scaling.active_reqs)
1201 sched_clk_scaling_suspend_work = true;
1202
Bjorn Andersson092b4552018-05-17 23:26:37 -07001203 if (list_empty(clk_list)) {
1204 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1205 goto out;
1206 }
1207
1208 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1209 scale_up = (*freq == clki->max_freq) ? true : false;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001210 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1211 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1212 ret = 0;
1213 goto out; /* no state change required */
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001214 }
1215 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1216
1217 start = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001218 ret = ufshcd_devfreq_scale(hba, scale_up);
1219
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001220 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1221 (scale_up ? "up" : "down"),
1222 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1223
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001224out:
1225 if (sched_clk_scaling_suspend_work)
1226 queue_work(hba->clk_scaling.workq,
1227 &hba->clk_scaling.suspend_work);
1228
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001229 return ret;
1230}
1231
Bart Van Assche7252a362019-12-09 10:13:08 -08001232static bool ufshcd_is_busy(struct request *req, void *priv, bool reserved)
1233{
1234 int *busy = priv;
1235
1236 WARN_ON_ONCE(reserved);
1237 (*busy)++;
1238 return false;
1239}
1240
1241/* Whether or not any tag is in use by a request that is in progress. */
1242static bool ufshcd_any_tag_in_use(struct ufs_hba *hba)
1243{
1244 struct request_queue *q = hba->cmd_queue;
1245 int busy = 0;
1246
1247 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_is_busy, &busy);
1248 return busy;
1249}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001250
1251static int ufshcd_devfreq_get_dev_status(struct device *dev,
1252 struct devfreq_dev_status *stat)
1253{
1254 struct ufs_hba *hba = dev_get_drvdata(dev);
1255 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1256 unsigned long flags;
1257
1258 if (!ufshcd_is_clkscaling_supported(hba))
1259 return -EINVAL;
1260
1261 memset(stat, 0, sizeof(*stat));
1262
1263 spin_lock_irqsave(hba->host->host_lock, flags);
1264 if (!scaling->window_start_t)
1265 goto start_window;
1266
1267 if (scaling->is_busy_started)
1268 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1269 scaling->busy_start_t));
1270
1271 stat->total_time = jiffies_to_usecs((long)jiffies -
1272 (long)scaling->window_start_t);
1273 stat->busy_time = scaling->tot_busy_t;
1274start_window:
1275 scaling->window_start_t = jiffies;
1276 scaling->tot_busy_t = 0;
1277
1278 if (hba->outstanding_reqs) {
1279 scaling->busy_start_t = ktime_get();
1280 scaling->is_busy_started = true;
1281 } else {
1282 scaling->busy_start_t = 0;
1283 scaling->is_busy_started = false;
1284 }
1285 spin_unlock_irqrestore(hba->host->host_lock, flags);
1286 return 0;
1287}
1288
1289static struct devfreq_dev_profile ufs_devfreq_profile = {
1290 .polling_ms = 100,
1291 .target = ufshcd_devfreq_target,
1292 .get_dev_status = ufshcd_devfreq_get_dev_status,
1293};
1294
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001295static int ufshcd_devfreq_init(struct ufs_hba *hba)
1296{
Bjorn Andersson092b4552018-05-17 23:26:37 -07001297 struct list_head *clk_list = &hba->clk_list_head;
1298 struct ufs_clk_info *clki;
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001299 struct devfreq *devfreq;
1300 int ret;
1301
Bjorn Andersson092b4552018-05-17 23:26:37 -07001302 /* Skip devfreq if we don't have any clocks in the list */
1303 if (list_empty(clk_list))
1304 return 0;
1305
1306 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1307 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1308 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1309
1310 devfreq = devfreq_add_device(hba->dev,
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001311 &ufs_devfreq_profile,
1312 DEVFREQ_GOV_SIMPLE_ONDEMAND,
1313 NULL);
1314 if (IS_ERR(devfreq)) {
1315 ret = PTR_ERR(devfreq);
1316 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001317
1318 dev_pm_opp_remove(hba->dev, clki->min_freq);
1319 dev_pm_opp_remove(hba->dev, clki->max_freq);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001320 return ret;
1321 }
1322
1323 hba->devfreq = devfreq;
1324
1325 return 0;
1326}
1327
Bjorn Andersson092b4552018-05-17 23:26:37 -07001328static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1329{
1330 struct list_head *clk_list = &hba->clk_list_head;
1331 struct ufs_clk_info *clki;
1332
1333 if (!hba->devfreq)
1334 return;
1335
1336 devfreq_remove_device(hba->devfreq);
1337 hba->devfreq = NULL;
1338
1339 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1340 dev_pm_opp_remove(hba->dev, clki->min_freq);
1341 dev_pm_opp_remove(hba->dev, clki->max_freq);
1342}
1343
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001344static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1345{
1346 unsigned long flags;
1347
1348 devfreq_suspend_device(hba->devfreq);
1349 spin_lock_irqsave(hba->host->host_lock, flags);
1350 hba->clk_scaling.window_start_t = 0;
1351 spin_unlock_irqrestore(hba->host->host_lock, flags);
1352}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001353
Gilad Bronera5082532016-10-17 17:10:00 -07001354static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1355{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001356 unsigned long flags;
1357 bool suspend = false;
1358
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001359 if (!ufshcd_is_clkscaling_supported(hba))
1360 return;
1361
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001362 spin_lock_irqsave(hba->host->host_lock, flags);
1363 if (!hba->clk_scaling.is_suspended) {
1364 suspend = true;
1365 hba->clk_scaling.is_suspended = true;
1366 }
1367 spin_unlock_irqrestore(hba->host->host_lock, flags);
1368
1369 if (suspend)
1370 __ufshcd_suspend_clkscaling(hba);
Gilad Bronera5082532016-10-17 17:10:00 -07001371}
1372
1373static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1374{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001375 unsigned long flags;
1376 bool resume = false;
1377
1378 if (!ufshcd_is_clkscaling_supported(hba))
1379 return;
1380
1381 spin_lock_irqsave(hba->host->host_lock, flags);
1382 if (hba->clk_scaling.is_suspended) {
1383 resume = true;
1384 hba->clk_scaling.is_suspended = false;
1385 }
1386 spin_unlock_irqrestore(hba->host->host_lock, flags);
1387
1388 if (resume)
1389 devfreq_resume_device(hba->devfreq);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001390}
1391
1392static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1393 struct device_attribute *attr, char *buf)
1394{
1395 struct ufs_hba *hba = dev_get_drvdata(dev);
1396
1397 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1398}
1399
1400static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1401 struct device_attribute *attr, const char *buf, size_t count)
1402{
1403 struct ufs_hba *hba = dev_get_drvdata(dev);
1404 u32 value;
1405 int err;
1406
1407 if (kstrtou32(buf, 0, &value))
1408 return -EINVAL;
1409
1410 value = !!value;
1411 if (value == hba->clk_scaling.is_allowed)
1412 goto out;
1413
1414 pm_runtime_get_sync(hba->dev);
1415 ufshcd_hold(hba, false);
1416
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001417 cancel_work_sync(&hba->clk_scaling.suspend_work);
1418 cancel_work_sync(&hba->clk_scaling.resume_work);
1419
1420 hba->clk_scaling.is_allowed = value;
1421
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001422 if (value) {
1423 ufshcd_resume_clkscaling(hba);
1424 } else {
1425 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001426 err = ufshcd_devfreq_scale(hba, true);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001427 if (err)
1428 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1429 __func__, err);
1430 }
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001431
1432 ufshcd_release(hba);
1433 pm_runtime_put_sync(hba->dev);
1434out:
1435 return count;
Gilad Bronera5082532016-10-17 17:10:00 -07001436}
1437
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001438static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1439{
1440 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1441 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1442 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1443 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1444 hba->clk_scaling.enable_attr.attr.mode = 0644;
1445 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1446 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1447}
1448
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001449static void ufshcd_ungate_work(struct work_struct *work)
1450{
1451 int ret;
1452 unsigned long flags;
1453 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1454 clk_gating.ungate_work);
1455
1456 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1457
1458 spin_lock_irqsave(hba->host->host_lock, flags);
1459 if (hba->clk_gating.state == CLKS_ON) {
1460 spin_unlock_irqrestore(hba->host->host_lock, flags);
1461 goto unblock_reqs;
1462 }
1463
1464 spin_unlock_irqrestore(hba->host->host_lock, flags);
1465 ufshcd_setup_clocks(hba, true);
1466
Stanley Chu8b0bbf02019-12-07 20:22:01 +08001467 ufshcd_enable_irq(hba);
1468
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001469 /* Exit from hibern8 */
1470 if (ufshcd_can_hibern8_during_gating(hba)) {
1471 /* Prevent gating in this path */
1472 hba->clk_gating.is_suspended = true;
1473 if (ufshcd_is_link_hibern8(hba)) {
1474 ret = ufshcd_uic_hibern8_exit(hba);
1475 if (ret)
1476 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1477 __func__, ret);
1478 else
1479 ufshcd_set_link_active(hba);
1480 }
1481 hba->clk_gating.is_suspended = false;
1482 }
1483unblock_reqs:
Subhash Jadavani38135532018-05-03 16:37:18 +05301484 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001485}
1486
1487/**
1488 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1489 * Also, exit from hibern8 mode and set the link as active.
1490 * @hba: per adapter instance
1491 * @async: This indicates whether caller should ungate clocks asynchronously.
1492 */
1493int ufshcd_hold(struct ufs_hba *hba, bool async)
1494{
1495 int rc = 0;
1496 unsigned long flags;
1497
1498 if (!ufshcd_is_clkgating_allowed(hba))
1499 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001500 spin_lock_irqsave(hba->host->host_lock, flags);
1501 hba->clk_gating.active_reqs++;
1502
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001503 if (ufshcd_eh_in_progress(hba)) {
1504 spin_unlock_irqrestore(hba->host->host_lock, flags);
1505 return 0;
1506 }
1507
Sahitya Tummala856b3482014-09-25 15:32:34 +03001508start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001509 switch (hba->clk_gating.state) {
1510 case CLKS_ON:
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001511 /*
1512 * Wait for the ungate work to complete if in progress.
1513 * Though the clocks may be in ON state, the link could
1514 * still be in hibner8 state if hibern8 is allowed
1515 * during clock gating.
1516 * Make sure we exit hibern8 state also in addition to
1517 * clocks being ON.
1518 */
1519 if (ufshcd_can_hibern8_during_gating(hba) &&
1520 ufshcd_is_link_hibern8(hba)) {
1521 spin_unlock_irqrestore(hba->host->host_lock, flags);
1522 flush_work(&hba->clk_gating.ungate_work);
1523 spin_lock_irqsave(hba->host->host_lock, flags);
1524 goto start;
1525 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001526 break;
1527 case REQ_CLKS_OFF:
1528 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1529 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001530 trace_ufshcd_clk_gating(dev_name(hba->dev),
1531 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001532 break;
1533 }
1534 /*
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +03001535 * If we are here, it means gating work is either done or
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001536 * currently running. Hence, fall through to cancel gating
1537 * work and to enable clocks.
1538 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001539 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001540 case CLKS_OFF:
Subhash Jadavani38135532018-05-03 16:37:18 +05301541 ufshcd_scsi_block_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001542 hba->clk_gating.state = REQ_CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001543 trace_ufshcd_clk_gating(dev_name(hba->dev),
1544 hba->clk_gating.state);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301545 queue_work(hba->clk_gating.clk_gating_workq,
1546 &hba->clk_gating.ungate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001547 /*
1548 * fall through to check if we should wait for this
1549 * work to be done or not.
1550 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001551 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001552 case REQ_CLKS_ON:
1553 if (async) {
1554 rc = -EAGAIN;
1555 hba->clk_gating.active_reqs--;
1556 break;
1557 }
1558
1559 spin_unlock_irqrestore(hba->host->host_lock, flags);
1560 flush_work(&hba->clk_gating.ungate_work);
1561 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001562 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001563 goto start;
1564 default:
1565 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1566 __func__, hba->clk_gating.state);
1567 break;
1568 }
1569 spin_unlock_irqrestore(hba->host->host_lock, flags);
1570out:
1571 return rc;
1572}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001573EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001574
1575static void ufshcd_gate_work(struct work_struct *work)
1576{
1577 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1578 clk_gating.gate_work.work);
1579 unsigned long flags;
1580
1581 spin_lock_irqsave(hba->host->host_lock, flags);
Venkat Gopalakrishnan3f0c06d2016-10-17 17:11:07 -07001582 /*
1583 * In case you are here to cancel this work the gating state
1584 * would be marked as REQ_CLKS_ON. In this case save time by
1585 * skipping the gating work and exit after changing the clock
1586 * state to CLKS_ON.
1587 */
1588 if (hba->clk_gating.is_suspended ||
Asutosh Das18f013742019-11-14 22:09:29 -08001589 (hba->clk_gating.state != REQ_CLKS_OFF)) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001590 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001591 trace_ufshcd_clk_gating(dev_name(hba->dev),
1592 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001593 goto rel_lock;
1594 }
1595
1596 if (hba->clk_gating.active_reqs
1597 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
Bart Van Assche7252a362019-12-09 10:13:08 -08001598 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001599 || hba->active_uic_cmd || hba->uic_async_done)
1600 goto rel_lock;
1601
1602 spin_unlock_irqrestore(hba->host->host_lock, flags);
1603
1604 /* put the link into hibern8 mode before turning off clocks */
1605 if (ufshcd_can_hibern8_during_gating(hba)) {
1606 if (ufshcd_uic_hibern8_enter(hba)) {
1607 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001608 trace_ufshcd_clk_gating(dev_name(hba->dev),
1609 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001610 goto out;
1611 }
1612 ufshcd_set_link_hibern8(hba);
1613 }
1614
Stanley Chu8b0bbf02019-12-07 20:22:01 +08001615 ufshcd_disable_irq(hba);
1616
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001617 if (!ufshcd_is_link_active(hba))
1618 ufshcd_setup_clocks(hba, false);
1619 else
1620 /* If link is active, device ref_clk can't be switched off */
1621 __ufshcd_setup_clocks(hba, false, true);
1622
1623 /*
1624 * In case you are here to cancel this work the gating state
1625 * would be marked as REQ_CLKS_ON. In this case keep the state
1626 * as REQ_CLKS_ON which would anyway imply that clocks are off
1627 * and a request to turn them on is pending. By doing this way,
1628 * we keep the state machine in tact and this would ultimately
1629 * prevent from doing cancel work multiple times when there are
1630 * new requests arriving before the current cancel work is done.
1631 */
1632 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001633 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001634 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001635 trace_ufshcd_clk_gating(dev_name(hba->dev),
1636 hba->clk_gating.state);
1637 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001638rel_lock:
1639 spin_unlock_irqrestore(hba->host->host_lock, flags);
1640out:
1641 return;
1642}
1643
1644/* host lock must be held before calling this variant */
1645static void __ufshcd_release(struct ufs_hba *hba)
1646{
1647 if (!ufshcd_is_clkgating_allowed(hba))
1648 return;
1649
1650 hba->clk_gating.active_reqs--;
1651
1652 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1653 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
Bart Van Assche7252a362019-12-09 10:13:08 -08001654 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001655 || hba->active_uic_cmd || hba->uic_async_done
1656 || ufshcd_eh_in_progress(hba))
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001657 return;
1658
1659 hba->clk_gating.state = REQ_CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001660 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Evan Greenf4bb7702018-10-05 10:27:32 -07001661 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1662 &hba->clk_gating.gate_work,
1663 msecs_to_jiffies(hba->clk_gating.delay_ms));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001664}
1665
1666void ufshcd_release(struct ufs_hba *hba)
1667{
1668 unsigned long flags;
1669
1670 spin_lock_irqsave(hba->host->host_lock, flags);
1671 __ufshcd_release(hba);
1672 spin_unlock_irqrestore(hba->host->host_lock, flags);
1673}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001674EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001675
1676static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1677 struct device_attribute *attr, char *buf)
1678{
1679 struct ufs_hba *hba = dev_get_drvdata(dev);
1680
1681 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1682}
1683
1684static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1685 struct device_attribute *attr, const char *buf, size_t count)
1686{
1687 struct ufs_hba *hba = dev_get_drvdata(dev);
1688 unsigned long flags, value;
1689
1690 if (kstrtoul(buf, 0, &value))
1691 return -EINVAL;
1692
1693 spin_lock_irqsave(hba->host->host_lock, flags);
1694 hba->clk_gating.delay_ms = value;
1695 spin_unlock_irqrestore(hba->host->host_lock, flags);
1696 return count;
1697}
1698
Sahitya Tummalab4274112016-12-22 18:40:39 -08001699static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1700 struct device_attribute *attr, char *buf)
1701{
1702 struct ufs_hba *hba = dev_get_drvdata(dev);
1703
1704 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1705}
1706
1707static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1708 struct device_attribute *attr, const char *buf, size_t count)
1709{
1710 struct ufs_hba *hba = dev_get_drvdata(dev);
1711 unsigned long flags;
1712 u32 value;
1713
1714 if (kstrtou32(buf, 0, &value))
1715 return -EINVAL;
1716
1717 value = !!value;
1718 if (value == hba->clk_gating.is_enabled)
1719 goto out;
1720
1721 if (value) {
1722 ufshcd_release(hba);
1723 } else {
1724 spin_lock_irqsave(hba->host->host_lock, flags);
1725 hba->clk_gating.active_reqs++;
1726 spin_unlock_irqrestore(hba->host->host_lock, flags);
1727 }
1728
1729 hba->clk_gating.is_enabled = value;
1730out:
1731 return count;
1732}
1733
Vivek Gautameebcc192018-08-07 23:17:39 +05301734static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1735{
1736 char wq_name[sizeof("ufs_clkscaling_00")];
1737
1738 if (!ufshcd_is_clkscaling_supported(hba))
1739 return;
1740
1741 INIT_WORK(&hba->clk_scaling.suspend_work,
1742 ufshcd_clk_scaling_suspend_work);
1743 INIT_WORK(&hba->clk_scaling.resume_work,
1744 ufshcd_clk_scaling_resume_work);
1745
1746 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1747 hba->host->host_no);
1748 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1749
1750 ufshcd_clkscaling_init_sysfs(hba);
1751}
1752
1753static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1754{
1755 if (!ufshcd_is_clkscaling_supported(hba))
1756 return;
1757
1758 destroy_workqueue(hba->clk_scaling.workq);
1759 ufshcd_devfreq_remove(hba);
1760}
1761
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001762static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1763{
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301764 char wq_name[sizeof("ufs_clk_gating_00")];
1765
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001766 if (!ufshcd_is_clkgating_allowed(hba))
1767 return;
1768
1769 hba->clk_gating.delay_ms = 150;
1770 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1771 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1772
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301773 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1774 hba->host->host_no);
1775 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1776 WQ_MEM_RECLAIM);
1777
Sahitya Tummalab4274112016-12-22 18:40:39 -08001778 hba->clk_gating.is_enabled = true;
1779
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001780 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1781 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1782 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1783 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
Sahitya Tummalab4274112016-12-22 18:40:39 -08001784 hba->clk_gating.delay_attr.attr.mode = 0644;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001785 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1786 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Sahitya Tummalab4274112016-12-22 18:40:39 -08001787
1788 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1789 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1790 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1791 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1792 hba->clk_gating.enable_attr.attr.mode = 0644;
1793 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1794 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001795}
1796
1797static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1798{
1799 if (!ufshcd_is_clkgating_allowed(hba))
1800 return;
1801 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001802 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001803 cancel_work_sync(&hba->clk_gating.ungate_work);
1804 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301805 destroy_workqueue(hba->clk_gating.clk_gating_workq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001806}
1807
Sahitya Tummala856b3482014-09-25 15:32:34 +03001808/* Must be called with host lock acquired */
1809static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1810{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001811 bool queue_resume_work = false;
1812
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001813 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001814 return;
1815
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001816 if (!hba->clk_scaling.active_reqs++)
1817 queue_resume_work = true;
1818
1819 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1820 return;
1821
1822 if (queue_resume_work)
1823 queue_work(hba->clk_scaling.workq,
1824 &hba->clk_scaling.resume_work);
1825
1826 if (!hba->clk_scaling.window_start_t) {
1827 hba->clk_scaling.window_start_t = jiffies;
1828 hba->clk_scaling.tot_busy_t = 0;
1829 hba->clk_scaling.is_busy_started = false;
1830 }
1831
Sahitya Tummala856b3482014-09-25 15:32:34 +03001832 if (!hba->clk_scaling.is_busy_started) {
1833 hba->clk_scaling.busy_start_t = ktime_get();
1834 hba->clk_scaling.is_busy_started = true;
1835 }
1836}
1837
1838static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1839{
1840 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1841
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001842 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001843 return;
1844
1845 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1846 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1847 scaling->busy_start_t));
Thomas Gleixner8b0e1952016-12-25 12:30:41 +01001848 scaling->busy_start_t = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03001849 scaling->is_busy_started = false;
1850 }
1851}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301852/**
1853 * ufshcd_send_command - Send SCSI or device management commands
1854 * @hba: per adapter instance
1855 * @task_tag: Task tag of the command
1856 */
1857static inline
1858void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1859{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08001860 hba->lrb[task_tag].issue_time_stamp = ktime_get();
Zang Leigang09017182017-09-27 10:06:06 +08001861 hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
Bart Van Asscheeacf36f2019-12-24 14:02:46 -08001862 ufshcd_add_command_trace(hba, task_tag, "send");
Sahitya Tummala856b3482014-09-25 15:32:34 +03001863 ufshcd_clk_scaling_start_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301864 __set_bit(task_tag, &hba->outstanding_reqs);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301865 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07001866 /* Make sure that doorbell is committed immediately */
1867 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301868}
1869
1870/**
1871 * ufshcd_copy_sense_data - Copy sense data in case of check condition
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001872 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301873 */
1874static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1875{
1876 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05301877 if (lrbp->sense_buffer &&
1878 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001879 int len_to_copy;
1880
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301881 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Avri Altman09a5a242018-11-22 20:04:56 +02001882 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001883
Avri Altman09a5a242018-11-22 20:04:56 +02001884 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
1885 len_to_copy);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301886 }
1887}
1888
1889/**
Dolev Raviv68078d52013-07-30 00:35:58 +05301890 * ufshcd_copy_query_response() - Copy the Query Response and the data
1891 * descriptor
1892 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001893 * @lrbp: pointer to local reference block
Dolev Raviv68078d52013-07-30 00:35:58 +05301894 */
1895static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001896int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05301897{
1898 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1899
Dolev Raviv68078d52013-07-30 00:35:58 +05301900 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05301901
Dolev Raviv68078d52013-07-30 00:35:58 +05301902 /* Get the descriptor */
Avri Altman1c908362019-05-21 11:24:22 +03001903 if (hba->dev_cmd.query.descriptor &&
1904 lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03001905 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05301906 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001907 u16 resp_len;
1908 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05301909
1910 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001911 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05301912 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03001913 buf_len = be16_to_cpu(
1914 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001915 if (likely(buf_len >= resp_len)) {
1916 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1917 } else {
1918 dev_warn(hba->dev,
Bean Huo3d4881d2019-11-12 23:34:35 +01001919 "%s: rsp size %d is bigger than buffer size %d",
1920 __func__, resp_len, buf_len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001921 return -EINVAL;
1922 }
Dolev Raviv68078d52013-07-30 00:35:58 +05301923 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001924
1925 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05301926}
1927
1928/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301929 * ufshcd_hba_capabilities - Read controller capabilities
1930 * @hba: per adapter instance
1931 */
1932static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1933{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301934 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301935
1936 /* nutrs and nutmrs are 0 based values */
1937 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1938 hba->nutmrs =
1939 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1940}
1941
1942/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301943 * ufshcd_ready_for_uic_cmd - Check if controller is ready
1944 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301945 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301946 * Return true on success, else false
1947 */
1948static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1949{
1950 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1951 return true;
1952 else
1953 return false;
1954}
1955
1956/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05301957 * ufshcd_get_upmcrs - Get the power mode change request status
1958 * @hba: Pointer to adapter instance
1959 *
1960 * This function gets the UPMCRS field of HCS register
1961 * Returns value of UPMCRS field
1962 */
1963static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1964{
1965 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1966}
1967
1968/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301969 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1970 * @hba: per adapter instance
1971 * @uic_cmd: UIC command
1972 *
1973 * Mutex must be held.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301974 */
1975static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301976ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301977{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301978 WARN_ON(hba->active_uic_cmd);
1979
1980 hba->active_uic_cmd = uic_cmd;
1981
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301982 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301983 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
1984 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
1985 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301986
1987 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301988 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301989 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301990}
1991
1992/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301993 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
1994 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001995 * @uic_cmd: UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301996 *
1997 * Must be called with mutex held.
1998 * Returns 0 only if success.
1999 */
2000static int
2001ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2002{
2003 int ret;
2004 unsigned long flags;
2005
2006 if (wait_for_completion_timeout(&uic_cmd->done,
2007 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2008 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2009 else
2010 ret = -ETIMEDOUT;
2011
2012 spin_lock_irqsave(hba->host->host_lock, flags);
2013 hba->active_uic_cmd = NULL;
2014 spin_unlock_irqrestore(hba->host->host_lock, flags);
2015
2016 return ret;
2017}
2018
2019/**
2020 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2021 * @hba: per adapter instance
2022 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002023 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302024 *
2025 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002026 * with mutex held and host_lock locked.
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302027 * Returns 0 only if success.
2028 */
2029static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002030__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2031 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302032{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302033 if (!ufshcd_ready_for_uic_cmd(hba)) {
2034 dev_err(hba->dev,
2035 "Controller not ready to accept UIC commands\n");
2036 return -EIO;
2037 }
2038
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002039 if (completion)
2040 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302041
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302042 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302043
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002044 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302045}
2046
2047/**
2048 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2049 * @hba: per adapter instance
2050 * @uic_cmd: UIC command
2051 *
2052 * Returns 0 only if success.
2053 */
Avri Altmane77044c52018-10-07 17:30:39 +03002054int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302055{
2056 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002057 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302058
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002059 ufshcd_hold(hba, false);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302060 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03002061 ufshcd_add_delay_before_dme_cmd(hba);
2062
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002063 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002064 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002065 spin_unlock_irqrestore(hba->host->host_lock, flags);
2066 if (!ret)
2067 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2068
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302069 mutex_unlock(&hba->uic_cmd_mutex);
2070
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002071 ufshcd_release(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302072 return ret;
2073}
2074
2075/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302076 * ufshcd_map_sg - Map scatter-gather list to prdt
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002077 * @hba: per adapter instance
2078 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302079 *
2080 * Returns 0 in case of success, non-zero value in case of failure
2081 */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002082static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302083{
2084 struct ufshcd_sg_entry *prd_table;
2085 struct scatterlist *sg;
2086 struct scsi_cmnd *cmd;
2087 int sg_segments;
2088 int i;
2089
2090 cmd = lrbp->cmd;
2091 sg_segments = scsi_dma_map(cmd);
2092 if (sg_segments < 0)
2093 return sg_segments;
2094
2095 if (sg_segments) {
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002096 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2097 lrbp->utr_descriptor_ptr->prd_table_length =
2098 cpu_to_le16((u16)(sg_segments *
2099 sizeof(struct ufshcd_sg_entry)));
2100 else
2101 lrbp->utr_descriptor_ptr->prd_table_length =
2102 cpu_to_le16((u16) (sg_segments));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302103
2104 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2105
2106 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2107 prd_table[i].size =
2108 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2109 prd_table[i].base_addr =
2110 cpu_to_le32(lower_32_bits(sg->dma_address));
2111 prd_table[i].upper_addr =
2112 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002113 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302114 }
2115 } else {
2116 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2117 }
2118
2119 return 0;
2120}
2121
2122/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302123 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302124 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302125 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302126 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302127static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302128{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302129 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2130
2131 if (hba->ufs_version == UFSHCI_VERSION_10) {
2132 u32 rw;
2133 rw = set & INTERRUPT_MASK_RW_VER_10;
2134 set = rw | ((set ^ intrs) & intrs);
2135 } else {
2136 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302137 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302138
2139 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2140}
2141
2142/**
2143 * ufshcd_disable_intr - disable interrupts
2144 * @hba: per adapter instance
2145 * @intrs: interrupt bits
2146 */
2147static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2148{
2149 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2150
2151 if (hba->ufs_version == UFSHCI_VERSION_10) {
2152 u32 rw;
2153 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2154 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2155 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2156
2157 } else {
2158 set &= ~intrs;
2159 }
2160
2161 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302162}
2163
2164/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302165 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2166 * descriptor according to request
2167 * @lrbp: pointer to local reference block
2168 * @upiu_flags: flags required in the header
2169 * @cmd_dir: requests data direction
2170 */
2171static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
Joao Pinto300bb132016-05-11 12:21:27 +01002172 u32 *upiu_flags, enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302173{
2174 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2175 u32 data_direction;
2176 u32 dword_0;
2177
2178 if (cmd_dir == DMA_FROM_DEVICE) {
2179 data_direction = UTP_DEVICE_TO_HOST;
2180 *upiu_flags = UPIU_CMD_FLAGS_READ;
2181 } else if (cmd_dir == DMA_TO_DEVICE) {
2182 data_direction = UTP_HOST_TO_DEVICE;
2183 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2184 } else {
2185 data_direction = UTP_NO_DATA_TRANSFER;
2186 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2187 }
2188
2189 dword_0 = data_direction | (lrbp->command_type
2190 << UPIU_COMMAND_TYPE_OFFSET);
2191 if (lrbp->intr_cmd)
2192 dword_0 |= UTP_REQ_DESC_INT_CMD;
2193
2194 /* Transfer request descriptor header fields */
2195 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002196 /* dword_1 is reserved, hence it is set to 0 */
2197 req_desc->header.dword_1 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302198 /*
2199 * assigning invalid value for command status. Controller
2200 * updates OCS on command completion, with the command
2201 * status
2202 */
2203 req_desc->header.dword_2 =
2204 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002205 /* dword_3 is reserved, hence it is set to 0 */
2206 req_desc->header.dword_3 = 0;
Yaniv Gardi51047262016-02-01 15:02:38 +02002207
2208 req_desc->prd_table_length = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302209}
2210
2211/**
2212 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2213 * for scsi commands
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002214 * @lrbp: local reference block pointer
2215 * @upiu_flags: flags
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302216 */
2217static
2218void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2219{
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002220 struct scsi_cmnd *cmd = lrbp->cmd;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302221 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002222 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302223
2224 /* command descriptor fields */
2225 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2226 UPIU_TRANSACTION_COMMAND, upiu_flags,
2227 lrbp->lun, lrbp->task_tag);
2228 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2229 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2230
2231 /* Total EHS length and Data segment length will be zero */
2232 ucd_req_ptr->header.dword_2 = 0;
2233
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002234 ucd_req_ptr->sc.exp_data_transfer_len = cpu_to_be32(cmd->sdb.length);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302235
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002236 cdb_len = min_t(unsigned short, cmd->cmd_len, UFS_CDB_SIZE);
Avri Altmana851b2b2018-10-07 17:30:34 +03002237 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002238 memcpy(ucd_req_ptr->sc.cdb, cmd->cmnd, cdb_len);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002239
2240 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302241}
2242
Dolev Raviv68078d52013-07-30 00:35:58 +05302243/**
2244 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2245 * for query requsts
2246 * @hba: UFS hba
2247 * @lrbp: local reference block pointer
2248 * @upiu_flags: flags
2249 */
2250static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2251 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2252{
2253 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2254 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302255 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302256
2257 /* Query request header */
2258 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2259 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2260 lrbp->lun, lrbp->task_tag);
2261 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2262 0, query->request.query_func, 0, 0);
2263
Zang Leigang68612852016-08-25 17:39:19 +08002264 /* Data segment length only need for WRITE_DESC */
2265 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2266 ucd_req_ptr->header.dword_2 =
2267 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2268 else
2269 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302270
2271 /* Copy the Query Request buffer as is */
2272 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2273 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302274
2275 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002276 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
Avri Altman220d17a62018-10-07 17:30:36 +03002277 memcpy(ucd_req_ptr + 1, query->descriptor, len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002278
Yaniv Gardi51047262016-02-01 15:02:38 +02002279 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302280}
2281
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302282static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2283{
2284 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2285
2286 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2287
2288 /* command descriptor fields */
2289 ucd_req_ptr->header.dword_0 =
2290 UPIU_HEADER_DWORD(
2291 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002292 /* clear rest of the fields of basic header */
2293 ucd_req_ptr->header.dword_1 = 0;
2294 ucd_req_ptr->header.dword_2 = 0;
2295
2296 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302297}
2298
2299/**
Joao Pinto300bb132016-05-11 12:21:27 +01002300 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2301 * for Device Management Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002302 * @hba: per adapter instance
2303 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302304 */
Joao Pinto300bb132016-05-11 12:21:27 +01002305static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302306{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302307 u32 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302308 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302309
kehuanlin83dc7e32017-09-06 17:58:39 +08002310 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2311 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002312 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
kehuanlin83dc7e32017-09-06 17:58:39 +08002313 else
2314 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002315
2316 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2317 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2318 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2319 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2320 ufshcd_prepare_utp_nop_upiu(lrbp);
2321 else
2322 ret = -EINVAL;
2323
2324 return ret;
2325}
2326
2327/**
2328 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2329 * for SCSI Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002330 * @hba: per adapter instance
2331 * @lrbp: pointer to local reference block
Joao Pinto300bb132016-05-11 12:21:27 +01002332 */
2333static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2334{
2335 u32 upiu_flags;
2336 int ret = 0;
2337
kehuanlin83dc7e32017-09-06 17:58:39 +08002338 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2339 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002340 lrbp->command_type = UTP_CMD_TYPE_SCSI;
kehuanlin83dc7e32017-09-06 17:58:39 +08002341 else
2342 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002343
2344 if (likely(lrbp->cmd)) {
2345 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2346 lrbp->cmd->sc_data_direction);
2347 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2348 } else {
2349 ret = -EINVAL;
2350 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302351
2352 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302353}
2354
2355/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002356 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002357 * @upiu_wlun_id: UPIU W-LUN id
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002358 *
2359 * Returns SCSI W-LUN id
2360 */
2361static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2362{
2363 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2364}
2365
2366/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302367 * ufshcd_queuecommand - main entry point for SCSI requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002368 * @host: SCSI host pointer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302369 * @cmd: command from SCSI Midlayer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302370 *
2371 * Returns 0 for success, non-zero in case of failure
2372 */
2373static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2374{
2375 struct ufshcd_lrb *lrbp;
2376 struct ufs_hba *hba;
2377 unsigned long flags;
2378 int tag;
2379 int err = 0;
2380
2381 hba = shost_priv(host);
2382
2383 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02002384 if (!ufshcd_valid_tag(hba, tag)) {
2385 dev_err(hba->dev,
2386 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2387 __func__, tag, cmd, cmd->request);
2388 BUG();
2389 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302390
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002391 if (!down_read_trylock(&hba->clk_scaling_lock))
2392 return SCSI_MLQUEUE_HOST_BUSY;
2393
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302394 spin_lock_irqsave(hba->host->host_lock, flags);
2395 switch (hba->ufshcd_state) {
2396 case UFSHCD_STATE_OPERATIONAL:
2397 break;
Zang Leigang141f8162016-11-16 11:29:37 +08002398 case UFSHCD_STATE_EH_SCHEDULED:
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302399 case UFSHCD_STATE_RESET:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302400 err = SCSI_MLQUEUE_HOST_BUSY;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302401 goto out_unlock;
2402 case UFSHCD_STATE_ERROR:
2403 set_host_byte(cmd, DID_ERROR);
2404 cmd->scsi_done(cmd);
2405 goto out_unlock;
2406 default:
2407 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2408 __func__, hba->ufshcd_state);
2409 set_host_byte(cmd, DID_BAD_TARGET);
2410 cmd->scsi_done(cmd);
2411 goto out_unlock;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302412 }
Yaniv Gardi53c12d02016-02-01 15:02:45 +02002413
2414 /* if error handling is in progress, don't issue commands */
2415 if (ufshcd_eh_in_progress(hba)) {
2416 set_host_byte(cmd, DID_ERROR);
2417 cmd->scsi_done(cmd);
2418 goto out_unlock;
2419 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302420 spin_unlock_irqrestore(hba->host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302421
Gilad Broner7fabb772017-02-03 16:56:50 -08002422 hba->req_abort_count = 0;
2423
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002424 err = ufshcd_hold(hba, true);
2425 if (err) {
2426 err = SCSI_MLQUEUE_HOST_BUSY;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002427 goto out;
2428 }
2429 WARN_ON(hba->clk_gating.state != CLKS_ON);
2430
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302431 lrbp = &hba->lrb[tag];
2432
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302433 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302434 lrbp->cmd = cmd;
Avri Altman09a5a242018-11-22 20:04:56 +02002435 lrbp->sense_bufflen = UFS_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302436 lrbp->sense_buffer = cmd->sense_buffer;
2437 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002438 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002439 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Gilad Bronere0b299e2017-02-03 16:56:40 -08002440 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302441
Joao Pinto300bb132016-05-11 12:21:27 +01002442 ufshcd_comp_scsi_upiu(hba, lrbp);
2443
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002444 err = ufshcd_map_sg(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302445 if (err) {
2446 lrbp->cmd = NULL;
Can Guo17c7d352019-12-05 02:14:33 +00002447 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302448 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302449 }
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002450 /* Make sure descriptors are ready before ringing the doorbell */
2451 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302452
2453 /* issue command to the controller */
2454 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002455 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302456 ufshcd_send_command(hba, tag);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302457out_unlock:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302458 spin_unlock_irqrestore(hba->host->host_lock, flags);
2459out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002460 up_read(&hba->clk_scaling_lock);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302461 return err;
2462}
2463
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302464static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2465 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2466{
2467 lrbp->cmd = NULL;
2468 lrbp->sense_bufflen = 0;
2469 lrbp->sense_buffer = NULL;
2470 lrbp->task_tag = tag;
2471 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302472 lrbp->intr_cmd = true; /* No interrupt aggregation */
2473 hba->dev_cmd.type = cmd_type;
2474
Joao Pinto300bb132016-05-11 12:21:27 +01002475 return ufshcd_comp_devman_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302476}
2477
2478static int
2479ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2480{
2481 int err = 0;
2482 unsigned long flags;
2483 u32 mask = 1 << tag;
2484
2485 /* clear outstanding transaction before retry */
2486 spin_lock_irqsave(hba->host->host_lock, flags);
2487 ufshcd_utrl_clear(hba, tag);
2488 spin_unlock_irqrestore(hba->host->host_lock, flags);
2489
2490 /*
2491 * wait for for h/w to clear corresponding bit in door-bell.
2492 * max. wait is 1 sec.
2493 */
2494 err = ufshcd_wait_for_register(hba,
2495 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02002496 mask, ~mask, 1000, 1000, true);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302497
2498 return err;
2499}
2500
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002501static int
2502ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2503{
2504 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2505
2506 /* Get the UPIU response */
2507 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2508 UPIU_RSP_CODE_OFFSET;
2509 return query_res->response;
2510}
2511
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302512/**
2513 * ufshcd_dev_cmd_completion() - handles device management command responses
2514 * @hba: per adapter instance
2515 * @lrbp: pointer to local reference block
2516 */
2517static int
2518ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2519{
2520 int resp;
2521 int err = 0;
2522
Dolev Ravivff8e20c2016-12-22 18:42:18 -08002523 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302524 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2525
2526 switch (resp) {
2527 case UPIU_TRANSACTION_NOP_IN:
2528 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2529 err = -EINVAL;
2530 dev_err(hba->dev, "%s: unexpected response %x\n",
2531 __func__, resp);
2532 }
2533 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302534 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002535 err = ufshcd_check_query_response(hba, lrbp);
2536 if (!err)
2537 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302538 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302539 case UPIU_TRANSACTION_REJECT_UPIU:
2540 /* TODO: handle Reject UPIU Response */
2541 err = -EPERM;
2542 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2543 __func__);
2544 break;
2545 default:
2546 err = -EINVAL;
2547 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2548 __func__, resp);
2549 break;
2550 }
2551
2552 return err;
2553}
2554
2555static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2556 struct ufshcd_lrb *lrbp, int max_timeout)
2557{
2558 int err = 0;
2559 unsigned long time_left;
2560 unsigned long flags;
2561
2562 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2563 msecs_to_jiffies(max_timeout));
2564
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002565 /* Make sure descriptors are ready before ringing the doorbell */
2566 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302567 spin_lock_irqsave(hba->host->host_lock, flags);
2568 hba->dev_cmd.complete = NULL;
2569 if (likely(time_left)) {
2570 err = ufshcd_get_tr_ocs(lrbp);
2571 if (!err)
2572 err = ufshcd_dev_cmd_completion(hba, lrbp);
2573 }
2574 spin_unlock_irqrestore(hba->host->host_lock, flags);
2575
2576 if (!time_left) {
2577 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002578 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2579 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302580 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002581 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302582 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002583 /*
2584 * in case of an error, after clearing the doorbell,
2585 * we also need to clear the outstanding_request
2586 * field in hba
2587 */
2588 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302589 }
2590
2591 return err;
2592}
2593
2594/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302595 * ufshcd_exec_dev_cmd - API for sending device management requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002596 * @hba: UFS hba
2597 * @cmd_type: specifies the type (NOP, Query...)
2598 * @timeout: time in seconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302599 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302600 * NOTE: Since there is only one available tag for device management commands,
2601 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302602 */
2603static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2604 enum dev_cmd_type cmd_type, int timeout)
2605{
Bart Van Assche7252a362019-12-09 10:13:08 -08002606 struct request_queue *q = hba->cmd_queue;
2607 struct request *req;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302608 struct ufshcd_lrb *lrbp;
2609 int err;
2610 int tag;
2611 struct completion wait;
2612 unsigned long flags;
2613
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002614 down_read(&hba->clk_scaling_lock);
2615
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302616 /*
2617 * Get free slot, sleep if slots are unavailable.
2618 * Even though we use wait_event() which sleeps indefinitely,
2619 * the maximum wait time is bounded by SCSI request timeout.
2620 */
Bart Van Assche7252a362019-12-09 10:13:08 -08002621 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03002622 if (IS_ERR(req)) {
2623 err = PTR_ERR(req);
2624 goto out_unlock;
2625 }
Bart Van Assche7252a362019-12-09 10:13:08 -08002626 tag = req->tag;
2627 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302628
2629 init_completion(&wait);
2630 lrbp = &hba->lrb[tag];
2631 WARN_ON(lrbp->cmd);
2632 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2633 if (unlikely(err))
2634 goto out_put_tag;
2635
2636 hba->dev_cmd.complete = &wait;
2637
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002638 ufshcd_add_query_upiu_trace(hba, tag, "query_send");
Yaniv Gardie3dfdc52016-02-01 15:02:49 +02002639 /* Make sure descriptors are ready before ringing the doorbell */
2640 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302641 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002642 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302643 ufshcd_send_command(hba, tag);
2644 spin_unlock_irqrestore(hba->host->host_lock, flags);
2645
2646 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2647
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002648 ufshcd_add_query_upiu_trace(hba, tag,
2649 err ? "query_complete_err" : "query_complete");
2650
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302651out_put_tag:
Bart Van Assche7252a362019-12-09 10:13:08 -08002652 blk_put_request(req);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03002653out_unlock:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002654 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302655 return err;
2656}
2657
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302658/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002659 * ufshcd_init_query() - init the query response and request parameters
2660 * @hba: per-adapter instance
2661 * @request: address of the request pointer to be initialized
2662 * @response: address of the response pointer to be initialized
2663 * @opcode: operation to perform
2664 * @idn: flag idn to access
2665 * @index: LU number to access
2666 * @selector: query/flag/descriptor further identification
2667 */
2668static inline void ufshcd_init_query(struct ufs_hba *hba,
2669 struct ufs_query_req **request, struct ufs_query_res **response,
2670 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2671{
2672 *request = &hba->dev_cmd.query.request;
2673 *response = &hba->dev_cmd.query.response;
2674 memset(*request, 0, sizeof(struct ufs_query_req));
2675 memset(*response, 0, sizeof(struct ufs_query_res));
2676 (*request)->upiu_req.opcode = opcode;
2677 (*request)->upiu_req.idn = idn;
2678 (*request)->upiu_req.index = index;
2679 (*request)->upiu_req.selector = selector;
2680}
2681
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002682static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2683 enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2684{
2685 int ret;
2686 int retries;
2687
2688 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2689 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2690 if (ret)
2691 dev_dbg(hba->dev,
2692 "%s: failed with error %d, retries %d\n",
2693 __func__, ret, retries);
2694 else
2695 break;
2696 }
2697
2698 if (ret)
2699 dev_err(hba->dev,
2700 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2701 __func__, opcode, idn, ret, retries);
2702 return ret;
2703}
2704
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002705/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302706 * ufshcd_query_flag() - API function for sending flag query requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002707 * @hba: per-adapter instance
2708 * @opcode: flag query to perform
2709 * @idn: flag idn to access
2710 * @flag_res: the flag value after the query request completes
Dolev Raviv68078d52013-07-30 00:35:58 +05302711 *
2712 * Returns 0 for success, non-zero in case of failure
2713 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002714int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Dolev Raviv68078d52013-07-30 00:35:58 +05302715 enum flag_idn idn, bool *flag_res)
2716{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002717 struct ufs_query_req *request = NULL;
2718 struct ufs_query_res *response = NULL;
2719 int err, index = 0, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002720 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05302721
2722 BUG_ON(!hba);
2723
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002724 ufshcd_hold(hba, false);
Dolev Raviv68078d52013-07-30 00:35:58 +05302725 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002726 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2727 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05302728
2729 switch (opcode) {
2730 case UPIU_QUERY_OPCODE_SET_FLAG:
2731 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2732 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2733 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2734 break;
2735 case UPIU_QUERY_OPCODE_READ_FLAG:
2736 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2737 if (!flag_res) {
2738 /* No dummy reads */
2739 dev_err(hba->dev, "%s: Invalid argument for read request\n",
2740 __func__);
2741 err = -EINVAL;
2742 goto out_unlock;
2743 }
2744 break;
2745 default:
2746 dev_err(hba->dev,
2747 "%s: Expected query flag opcode but got = %d\n",
2748 __func__, opcode);
2749 err = -EINVAL;
2750 goto out_unlock;
2751 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302752
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002753 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05302754
2755 if (err) {
2756 dev_err(hba->dev,
2757 "%s: Sending flag query for idn %d failed, err = %d\n",
2758 __func__, idn, err);
2759 goto out_unlock;
2760 }
2761
2762 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302763 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302764 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2765
2766out_unlock:
2767 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002768 ufshcd_release(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05302769 return err;
2770}
2771
2772/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302773 * ufshcd_query_attr - API function for sending attribute requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002774 * @hba: per-adapter instance
2775 * @opcode: attribute opcode
2776 * @idn: attribute idn to access
2777 * @index: index field
2778 * @selector: selector field
2779 * @attr_val: the attribute value after the query request completes
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302780 *
2781 * Returns 0 for success, non-zero in case of failure
2782*/
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02002783int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2784 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302785{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002786 struct ufs_query_req *request = NULL;
2787 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302788 int err;
2789
2790 BUG_ON(!hba);
2791
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002792 ufshcd_hold(hba, false);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302793 if (!attr_val) {
2794 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2795 __func__, opcode);
2796 err = -EINVAL;
2797 goto out;
2798 }
2799
2800 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002801 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2802 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302803
2804 switch (opcode) {
2805 case UPIU_QUERY_OPCODE_WRITE_ATTR:
2806 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302807 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302808 break;
2809 case UPIU_QUERY_OPCODE_READ_ATTR:
2810 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2811 break;
2812 default:
2813 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2814 __func__, opcode);
2815 err = -EINVAL;
2816 goto out_unlock;
2817 }
2818
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002819 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302820
2821 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002822 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2823 __func__, opcode, idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302824 goto out_unlock;
2825 }
2826
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302827 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302828
2829out_unlock:
2830 mutex_unlock(&hba->dev_cmd.lock);
2831out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002832 ufshcd_release(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302833 return err;
2834}
2835
2836/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02002837 * ufshcd_query_attr_retry() - API function for sending query
2838 * attribute with retries
2839 * @hba: per-adapter instance
2840 * @opcode: attribute opcode
2841 * @idn: attribute idn to access
2842 * @index: index field
2843 * @selector: selector field
2844 * @attr_val: the attribute value after the query request
2845 * completes
2846 *
2847 * Returns 0 for success, non-zero in case of failure
2848*/
2849static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2850 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2851 u32 *attr_val)
2852{
2853 int ret = 0;
2854 u32 retries;
2855
Bart Van Assche68c9fcf2019-12-24 14:02:43 -08002856 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02002857 ret = ufshcd_query_attr(hba, opcode, idn, index,
2858 selector, attr_val);
2859 if (ret)
2860 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2861 __func__, ret, retries);
2862 else
2863 break;
2864 }
2865
2866 if (ret)
2867 dev_err(hba->dev,
2868 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2869 __func__, idn, ret, QUERY_REQ_RETRIES);
2870 return ret;
2871}
2872
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002873static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002874 enum query_opcode opcode, enum desc_idn idn, u8 index,
2875 u8 selector, u8 *desc_buf, int *buf_len)
2876{
2877 struct ufs_query_req *request = NULL;
2878 struct ufs_query_res *response = NULL;
2879 int err;
2880
2881 BUG_ON(!hba);
2882
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002883 ufshcd_hold(hba, false);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002884 if (!desc_buf) {
2885 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2886 __func__, opcode);
2887 err = -EINVAL;
2888 goto out;
2889 }
2890
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002891 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002892 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2893 __func__, *buf_len);
2894 err = -EINVAL;
2895 goto out;
2896 }
2897
2898 mutex_lock(&hba->dev_cmd.lock);
2899 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2900 selector);
2901 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002902 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002903
2904 switch (opcode) {
2905 case UPIU_QUERY_OPCODE_WRITE_DESC:
2906 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2907 break;
2908 case UPIU_QUERY_OPCODE_READ_DESC:
2909 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2910 break;
2911 default:
2912 dev_err(hba->dev,
2913 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2914 __func__, opcode);
2915 err = -EINVAL;
2916 goto out_unlock;
2917 }
2918
2919 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2920
2921 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002922 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2923 __func__, opcode, idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002924 goto out_unlock;
2925 }
2926
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002927 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002928
2929out_unlock:
Bean Huocfcbae32019-11-12 23:34:36 +01002930 hba->dev_cmd.query.descriptor = NULL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002931 mutex_unlock(&hba->dev_cmd.lock);
2932out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002933 ufshcd_release(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002934 return err;
2935}
2936
2937/**
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002938 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
2939 * @hba: per-adapter instance
2940 * @opcode: attribute opcode
2941 * @idn: attribute idn to access
2942 * @index: index field
2943 * @selector: selector field
2944 * @desc_buf: the buffer that contains the descriptor
2945 * @buf_len: length parameter passed to the device
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002946 *
2947 * Returns 0 for success, non-zero in case of failure.
2948 * The buf_len parameter will contain, on return, the length parameter
2949 * received on the response.
2950 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02002951int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
2952 enum query_opcode opcode,
2953 enum desc_idn idn, u8 index,
2954 u8 selector,
2955 u8 *desc_buf, int *buf_len)
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002956{
2957 int err;
2958 int retries;
2959
2960 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2961 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
2962 selector, desc_buf, buf_len);
2963 if (!err || err == -EINVAL)
2964 break;
2965 }
2966
2967 return err;
2968}
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002969
2970/**
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002971 * ufshcd_read_desc_length - read the specified descriptor length from header
2972 * @hba: Pointer to adapter instance
2973 * @desc_id: descriptor idn value
2974 * @desc_index: descriptor index
2975 * @desc_length: pointer to variable to read the length of descriptor
2976 *
2977 * Return 0 in case of success, non-zero otherwise
2978 */
2979static int ufshcd_read_desc_length(struct ufs_hba *hba,
2980 enum desc_idn desc_id,
2981 int desc_index,
2982 int *desc_length)
2983{
2984 int ret;
2985 u8 header[QUERY_DESC_HDR_SIZE];
2986 int header_len = QUERY_DESC_HDR_SIZE;
2987
2988 if (desc_id >= QUERY_DESC_IDN_MAX)
2989 return -EINVAL;
2990
2991 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
2992 desc_id, desc_index, 0, header,
2993 &header_len);
2994
2995 if (ret) {
2996 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
2997 __func__, desc_id);
2998 return ret;
2999 } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
3000 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
3001 __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3002 desc_id);
3003 ret = -EINVAL;
3004 }
3005
3006 *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3007 return ret;
3008
3009}
3010
3011/**
3012 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3013 * @hba: Pointer to adapter instance
3014 * @desc_id: descriptor idn value
3015 * @desc_len: mapped desc length (out)
3016 *
3017 * Return 0 in case of success, non-zero otherwise
3018 */
3019int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3020 enum desc_idn desc_id, int *desc_len)
3021{
3022 switch (desc_id) {
3023 case QUERY_DESC_IDN_DEVICE:
3024 *desc_len = hba->desc_size.dev_desc;
3025 break;
3026 case QUERY_DESC_IDN_POWER:
3027 *desc_len = hba->desc_size.pwr_desc;
3028 break;
3029 case QUERY_DESC_IDN_GEOMETRY:
3030 *desc_len = hba->desc_size.geom_desc;
3031 break;
3032 case QUERY_DESC_IDN_CONFIGURATION:
3033 *desc_len = hba->desc_size.conf_desc;
3034 break;
3035 case QUERY_DESC_IDN_UNIT:
3036 *desc_len = hba->desc_size.unit_desc;
3037 break;
3038 case QUERY_DESC_IDN_INTERCONNECT:
3039 *desc_len = hba->desc_size.interc_desc;
3040 break;
3041 case QUERY_DESC_IDN_STRING:
3042 *desc_len = QUERY_DESC_MAX_SIZE;
3043 break;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02003044 case QUERY_DESC_IDN_HEALTH:
3045 *desc_len = hba->desc_size.hlth_desc;
3046 break;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003047 case QUERY_DESC_IDN_RFU_0:
3048 case QUERY_DESC_IDN_RFU_1:
3049 *desc_len = 0;
3050 break;
3051 default:
3052 *desc_len = 0;
3053 return -EINVAL;
3054 }
3055 return 0;
3056}
3057EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3058
3059/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003060 * ufshcd_read_desc_param - read the specified descriptor parameter
3061 * @hba: Pointer to adapter instance
3062 * @desc_id: descriptor idn value
3063 * @desc_index: descriptor index
3064 * @param_offset: offset of the parameter to read
3065 * @param_read_buf: pointer to buffer where parameter would be read
3066 * @param_size: sizeof(param_read_buf)
3067 *
3068 * Return 0 in case of success, non-zero otherwise
3069 */
Stanislav Nijnikov45bced82018-02-15 14:14:02 +02003070int ufshcd_read_desc_param(struct ufs_hba *hba,
3071 enum desc_idn desc_id,
3072 int desc_index,
3073 u8 param_offset,
3074 u8 *param_read_buf,
3075 u8 param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003076{
3077 int ret;
3078 u8 *desc_buf;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003079 int buff_len;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003080 bool is_kmalloc = true;
3081
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003082 /* Safety check */
3083 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003084 return -EINVAL;
3085
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003086 /* Get the max length of descriptor from structure filled up at probe
3087 * time.
3088 */
3089 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003090
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003091 /* Sanity checks */
3092 if (ret || !buff_len) {
3093 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3094 __func__);
3095 return ret;
3096 }
3097
3098 /* Check whether we need temp memory */
3099 if (param_offset != 0 || param_size < buff_len) {
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003100 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3101 if (!desc_buf)
3102 return -ENOMEM;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003103 } else {
3104 desc_buf = param_read_buf;
3105 is_kmalloc = false;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003106 }
3107
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003108 /* Request for full descriptor */
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003109 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003110 desc_id, desc_index, 0,
3111 desc_buf, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003112
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003113 if (ret) {
3114 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3115 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003116 goto out;
3117 }
3118
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003119 /* Sanity check */
3120 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3121 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3122 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3123 ret = -EINVAL;
3124 goto out;
3125 }
3126
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003127 /* Check wherher we will not copy more data, than available */
3128 if (is_kmalloc && param_size > buff_len)
3129 param_size = buff_len;
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003130
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003131 if (is_kmalloc)
3132 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3133out:
3134 if (is_kmalloc)
3135 kfree(desc_buf);
3136 return ret;
3137}
3138
3139static inline int ufshcd_read_desc(struct ufs_hba *hba,
3140 enum desc_idn desc_id,
3141 int desc_index,
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003142 void *buf,
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003143 u32 size)
3144{
3145 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3146}
3147
3148static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3149 u8 *buf,
3150 u32 size)
3151{
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02003152 return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003153}
3154
Tomas Winkler8209b6d2017-01-05 10:45:10 +02003155static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
Yaniv Gardib573d482016-03-10 17:37:09 +02003156{
3157 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3158}
Yaniv Gardib573d482016-03-10 17:37:09 +02003159
3160/**
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003161 * struct uc_string_id - unicode string
3162 *
3163 * @len: size of this descriptor inclusive
3164 * @type: descriptor type
3165 * @uc: unicode string character
3166 */
3167struct uc_string_id {
3168 u8 len;
3169 u8 type;
3170 wchar_t uc[0];
3171} __packed;
3172
3173/* replace non-printable or non-ASCII characters with spaces */
3174static inline char ufshcd_remove_non_printable(u8 ch)
3175{
3176 return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3177}
3178
3179/**
Yaniv Gardib573d482016-03-10 17:37:09 +02003180 * ufshcd_read_string_desc - read string descriptor
3181 * @hba: pointer to adapter instance
3182 * @desc_index: descriptor index
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003183 * @buf: pointer to buffer where descriptor would be read,
3184 * the caller should free the memory.
Yaniv Gardib573d482016-03-10 17:37:09 +02003185 * @ascii: if true convert from unicode to ascii characters
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003186 * null terminated string.
Yaniv Gardib573d482016-03-10 17:37:09 +02003187 *
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003188 * Return:
3189 * * string size on success.
3190 * * -ENOMEM: on allocation failure
3191 * * -EINVAL: on a wrong parameter
Yaniv Gardib573d482016-03-10 17:37:09 +02003192 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003193int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3194 u8 **buf, bool ascii)
Yaniv Gardib573d482016-03-10 17:37:09 +02003195{
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003196 struct uc_string_id *uc_str;
3197 u8 *str;
3198 int ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003199
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003200 if (!buf)
3201 return -EINVAL;
Yaniv Gardib573d482016-03-10 17:37:09 +02003202
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003203 uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3204 if (!uc_str)
3205 return -ENOMEM;
3206
3207 ret = ufshcd_read_desc(hba, QUERY_DESC_IDN_STRING,
3208 desc_index, uc_str,
3209 QUERY_DESC_MAX_SIZE);
3210 if (ret < 0) {
3211 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3212 QUERY_REQ_RETRIES, ret);
3213 str = NULL;
3214 goto out;
3215 }
3216
3217 if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3218 dev_dbg(hba->dev, "String Desc is of zero length\n");
3219 str = NULL;
3220 ret = 0;
Yaniv Gardib573d482016-03-10 17:37:09 +02003221 goto out;
3222 }
3223
3224 if (ascii) {
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003225 ssize_t ascii_len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003226 int i;
Yaniv Gardib573d482016-03-10 17:37:09 +02003227 /* remove header and divide by 2 to move from UTF16 to UTF8 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003228 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3229 str = kzalloc(ascii_len, GFP_KERNEL);
3230 if (!str) {
3231 ret = -ENOMEM;
Tiezhu Yangfcbefc32016-06-25 12:35:22 +08003232 goto out;
Yaniv Gardib573d482016-03-10 17:37:09 +02003233 }
3234
3235 /*
3236 * the descriptor contains string in UTF16 format
3237 * we need to convert to utf-8 so it can be displayed
3238 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003239 ret = utf16s_to_utf8s(uc_str->uc,
3240 uc_str->len - QUERY_DESC_HDR_SIZE,
3241 UTF16_BIG_ENDIAN, str, ascii_len);
Yaniv Gardib573d482016-03-10 17:37:09 +02003242
3243 /* replace non-printable or non-ASCII characters with spaces */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003244 for (i = 0; i < ret; i++)
3245 str[i] = ufshcd_remove_non_printable(str[i]);
Yaniv Gardib573d482016-03-10 17:37:09 +02003246
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003247 str[ret++] = '\0';
3248
3249 } else {
YueHaibing5f577042019-08-31 12:44:24 +00003250 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003251 if (!str) {
3252 ret = -ENOMEM;
3253 goto out;
3254 }
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003255 ret = uc_str->len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003256 }
3257out:
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003258 *buf = str;
3259 kfree(uc_str);
3260 return ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003261}
Yaniv Gardib573d482016-03-10 17:37:09 +02003262
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003263/**
3264 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3265 * @hba: Pointer to adapter instance
3266 * @lun: lun id
3267 * @param_offset: offset of the parameter to read
3268 * @param_read_buf: pointer to buffer where parameter would be read
3269 * @param_size: sizeof(param_read_buf)
3270 *
3271 * Return 0 in case of success, non-zero otherwise
3272 */
3273static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3274 int lun,
3275 enum unit_desc_param param_offset,
3276 u8 *param_read_buf,
3277 u32 param_size)
3278{
3279 /*
3280 * Unit descriptors are only available for general purpose LUs (LUN id
3281 * from 0 to 7) and RPMB Well known LU.
3282 */
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02003283 if (!ufs_is_valid_unit_desc_lun(lun))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003284 return -EOPNOTSUPP;
3285
3286 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3287 param_offset, param_read_buf, param_size);
3288}
3289
3290/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303291 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3292 * @hba: per adapter instance
3293 *
3294 * 1. Allocate DMA memory for Command Descriptor array
3295 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3296 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3297 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3298 * (UTMRDL)
3299 * 4. Allocate memory for local reference block(lrb).
3300 *
3301 * Returns 0 for success, non-zero in case of failure
3302 */
3303static int ufshcd_memory_alloc(struct ufs_hba *hba)
3304{
3305 size_t utmrdl_size, utrdl_size, ucdl_size;
3306
3307 /* Allocate memory for UTP command descriptors */
3308 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003309 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3310 ucdl_size,
3311 &hba->ucdl_dma_addr,
3312 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303313
3314 /*
3315 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3316 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3317 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3318 * be aligned to 128 bytes as well
3319 */
3320 if (!hba->ucdl_base_addr ||
3321 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303322 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303323 "Command Descriptor Memory allocation failed\n");
3324 goto out;
3325 }
3326
3327 /*
3328 * Allocate memory for UTP Transfer descriptors
3329 * UFSHCI requires 1024 byte alignment of UTRD
3330 */
3331 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003332 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3333 utrdl_size,
3334 &hba->utrdl_dma_addr,
3335 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303336 if (!hba->utrdl_base_addr ||
3337 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303338 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303339 "Transfer Descriptor Memory allocation failed\n");
3340 goto out;
3341 }
3342
3343 /*
3344 * Allocate memory for UTP Task Management descriptors
3345 * UFSHCI requires 1024 byte alignment of UTMRD
3346 */
3347 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003348 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3349 utmrdl_size,
3350 &hba->utmrdl_dma_addr,
3351 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303352 if (!hba->utmrdl_base_addr ||
3353 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303354 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303355 "Task Management Descriptor Memory allocation failed\n");
3356 goto out;
3357 }
3358
3359 /* Allocate memory for local reference block */
Kees Cooka86854d2018-06-12 14:07:58 -07003360 hba->lrb = devm_kcalloc(hba->dev,
3361 hba->nutrs, sizeof(struct ufshcd_lrb),
Seungwon Jeon2953f852013-06-27 13:31:54 +09003362 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303363 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303364 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303365 goto out;
3366 }
3367 return 0;
3368out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303369 return -ENOMEM;
3370}
3371
3372/**
3373 * ufshcd_host_memory_configure - configure local reference block with
3374 * memory offsets
3375 * @hba: per adapter instance
3376 *
3377 * Configure Host memory space
3378 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3379 * address.
3380 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3381 * and PRDT offset.
3382 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3383 * into local reference block.
3384 */
3385static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3386{
3387 struct utp_transfer_cmd_desc *cmd_descp;
3388 struct utp_transfer_req_desc *utrdlp;
3389 dma_addr_t cmd_desc_dma_addr;
3390 dma_addr_t cmd_desc_element_addr;
3391 u16 response_offset;
3392 u16 prdt_offset;
3393 int cmd_desc_size;
3394 int i;
3395
3396 utrdlp = hba->utrdl_base_addr;
3397 cmd_descp = hba->ucdl_base_addr;
3398
3399 response_offset =
3400 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3401 prdt_offset =
3402 offsetof(struct utp_transfer_cmd_desc, prd_table);
3403
3404 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3405 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3406
3407 for (i = 0; i < hba->nutrs; i++) {
3408 /* Configure UTRD with command descriptor base address */
3409 cmd_desc_element_addr =
3410 (cmd_desc_dma_addr + (cmd_desc_size * i));
3411 utrdlp[i].command_desc_base_addr_lo =
3412 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3413 utrdlp[i].command_desc_base_addr_hi =
3414 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3415
3416 /* Response upiu and prdt offset should be in double words */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003417 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3418 utrdlp[i].response_upiu_offset =
3419 cpu_to_le16(response_offset);
3420 utrdlp[i].prd_table_offset =
3421 cpu_to_le16(prdt_offset);
3422 utrdlp[i].response_upiu_length =
3423 cpu_to_le16(ALIGNED_UPIU_SIZE);
3424 } else {
3425 utrdlp[i].response_upiu_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303426 cpu_to_le16((response_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003427 utrdlp[i].prd_table_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303428 cpu_to_le16((prdt_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003429 utrdlp[i].response_upiu_length =
Sujit Reddy Thumma3ca316c2013-06-26 22:39:30 +05303430 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003431 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303432
3433 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003434 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3435 (i * sizeof(struct utp_transfer_req_desc));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303436 hba->lrb[i].ucd_req_ptr =
3437 (struct utp_upiu_req *)(cmd_descp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003438 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303439 hba->lrb[i].ucd_rsp_ptr =
3440 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003441 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3442 response_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303443 hba->lrb[i].ucd_prdt_ptr =
3444 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003445 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3446 prdt_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303447 }
3448}
3449
3450/**
3451 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3452 * @hba: per adapter instance
3453 *
3454 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3455 * in order to initialize the Unipro link startup procedure.
3456 * Once the Unipro links are up, the device connected to the controller
3457 * is detected.
3458 *
3459 * Returns 0 on success, non-zero value on failure
3460 */
3461static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3462{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303463 struct uic_command uic_cmd = {0};
3464 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303465
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303466 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3467
3468 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3469 if (ret)
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003470 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303471 "dme-link-startup: error code %d\n", ret);
3472 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303473}
Alim Akhtar4404c5d2018-05-06 15:44:17 +05303474/**
3475 * ufshcd_dme_reset - UIC command for DME_RESET
3476 * @hba: per adapter instance
3477 *
3478 * DME_RESET command is issued in order to reset UniPro stack.
3479 * This function now deal with cold reset.
3480 *
3481 * Returns 0 on success, non-zero value on failure
3482 */
3483static int ufshcd_dme_reset(struct ufs_hba *hba)
3484{
3485 struct uic_command uic_cmd = {0};
3486 int ret;
3487
3488 uic_cmd.command = UIC_CMD_DME_RESET;
3489
3490 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3491 if (ret)
3492 dev_err(hba->dev,
3493 "dme-reset: error code %d\n", ret);
3494
3495 return ret;
3496}
3497
3498/**
3499 * ufshcd_dme_enable - UIC command for DME_ENABLE
3500 * @hba: per adapter instance
3501 *
3502 * DME_ENABLE command is issued in order to enable UniPro stack.
3503 *
3504 * Returns 0 on success, non-zero value on failure
3505 */
3506static int ufshcd_dme_enable(struct ufs_hba *hba)
3507{
3508 struct uic_command uic_cmd = {0};
3509 int ret;
3510
3511 uic_cmd.command = UIC_CMD_DME_ENABLE;
3512
3513 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3514 if (ret)
3515 dev_err(hba->dev,
3516 "dme-reset: error code %d\n", ret);
3517
3518 return ret;
3519}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303520
Yaniv Gardicad2e032015-03-31 17:37:14 +03003521static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3522{
3523 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3524 unsigned long min_sleep_time_us;
3525
3526 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3527 return;
3528
3529 /*
3530 * last_dme_cmd_tstamp will be 0 only for 1st call to
3531 * this function
3532 */
3533 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3534 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3535 } else {
3536 unsigned long delta =
3537 (unsigned long) ktime_to_us(
3538 ktime_sub(ktime_get(),
3539 hba->last_dme_cmd_tstamp));
3540
3541 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3542 min_sleep_time_us =
3543 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3544 else
3545 return; /* no more delay required */
3546 }
3547
3548 /* allow sleep for extra 50us if needed */
3549 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3550}
3551
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303552/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303553 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3554 * @hba: per adapter instance
3555 * @attr_sel: uic command argument1
3556 * @attr_set: attribute set type as uic command argument2
3557 * @mib_val: setting value as uic command argument3
3558 * @peer: indicate whether peer or local
3559 *
3560 * Returns 0 on success, non-zero value on failure
3561 */
3562int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3563 u8 attr_set, u32 mib_val, u8 peer)
3564{
3565 struct uic_command uic_cmd = {0};
3566 static const char *const action[] = {
3567 "dme-set",
3568 "dme-peer-set"
3569 };
3570 const char *set = action[!!peer];
3571 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003572 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303573
3574 uic_cmd.command = peer ?
3575 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3576 uic_cmd.argument1 = attr_sel;
3577 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3578 uic_cmd.argument3 = mib_val;
3579
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003580 do {
3581 /* for peer attributes we retry upon failure */
3582 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3583 if (ret)
3584 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3585 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3586 } while (ret && peer && --retries);
3587
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003588 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003589 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003590 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3591 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303592
3593 return ret;
3594}
3595EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3596
3597/**
3598 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3599 * @hba: per adapter instance
3600 * @attr_sel: uic command argument1
3601 * @mib_val: the value of the attribute as returned by the UIC command
3602 * @peer: indicate whether peer or local
3603 *
3604 * Returns 0 on success, non-zero value on failure
3605 */
3606int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3607 u32 *mib_val, u8 peer)
3608{
3609 struct uic_command uic_cmd = {0};
3610 static const char *const action[] = {
3611 "dme-get",
3612 "dme-peer-get"
3613 };
3614 const char *get = action[!!peer];
3615 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003616 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003617 struct ufs_pa_layer_attr orig_pwr_info;
3618 struct ufs_pa_layer_attr temp_pwr_info;
3619 bool pwr_mode_change = false;
3620
3621 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3622 orig_pwr_info = hba->pwr_info;
3623 temp_pwr_info = orig_pwr_info;
3624
3625 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3626 orig_pwr_info.pwr_rx == FAST_MODE) {
3627 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3628 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3629 pwr_mode_change = true;
3630 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3631 orig_pwr_info.pwr_rx == SLOW_MODE) {
3632 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3633 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3634 pwr_mode_change = true;
3635 }
3636 if (pwr_mode_change) {
3637 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3638 if (ret)
3639 goto out;
3640 }
3641 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303642
3643 uic_cmd.command = peer ?
3644 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3645 uic_cmd.argument1 = attr_sel;
3646
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003647 do {
3648 /* for peer attributes we retry upon failure */
3649 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3650 if (ret)
3651 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3652 get, UIC_GET_ATTR_ID(attr_sel), ret);
3653 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303654
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003655 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003656 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003657 get, UIC_GET_ATTR_ID(attr_sel),
3658 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003659
3660 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303661 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003662
3663 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3664 && pwr_mode_change)
3665 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303666out:
3667 return ret;
3668}
3669EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3670
3671/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003672 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3673 * state) and waits for it to take effect.
3674 *
3675 * @hba: per adapter instance
3676 * @cmd: UIC command to execute
3677 *
3678 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3679 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3680 * and device UniPro link and hence it's final completion would be indicated by
3681 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3682 * addition to normal UIC command completion Status (UCCS). This function only
3683 * returns after the relevant status bits indicate the completion.
3684 *
3685 * Returns 0 on success, non-zero value on failure
3686 */
3687static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3688{
3689 struct completion uic_async_done;
3690 unsigned long flags;
3691 u8 status;
3692 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003693 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003694
3695 mutex_lock(&hba->uic_cmd_mutex);
3696 init_completion(&uic_async_done);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003697 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003698
3699 spin_lock_irqsave(hba->host->host_lock, flags);
3700 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003701 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3702 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3703 /*
3704 * Make sure UIC command completion interrupt is disabled before
3705 * issuing UIC command.
3706 */
3707 wmb();
3708 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003709 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003710 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3711 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003712 if (ret) {
3713 dev_err(hba->dev,
3714 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3715 cmd->command, cmd->argument3, ret);
3716 goto out;
3717 }
3718
3719 if (!wait_for_completion_timeout(hba->uic_async_done,
3720 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3721 dev_err(hba->dev,
3722 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3723 cmd->command, cmd->argument3);
3724 ret = -ETIMEDOUT;
3725 goto out;
3726 }
3727
3728 status = ufshcd_get_upmcrs(hba);
3729 if (status != PWR_LOCAL) {
3730 dev_err(hba->dev,
Zang Leigang479da362017-09-19 16:50:30 +08003731 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003732 cmd->command, status);
3733 ret = (status != PWR_OK) ? status : -1;
3734 }
3735out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08003736 if (ret) {
3737 ufshcd_print_host_state(hba);
3738 ufshcd_print_pwr_info(hba);
3739 ufshcd_print_host_regs(hba);
3740 }
3741
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003742 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003743 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003744 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003745 if (reenable_intr)
3746 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003747 spin_unlock_irqrestore(hba->host->host_lock, flags);
3748 mutex_unlock(&hba->uic_cmd_mutex);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003749
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003750 return ret;
3751}
3752
3753/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303754 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3755 * using DME_SET primitives.
3756 * @hba: per adapter instance
3757 * @mode: powr mode value
3758 *
3759 * Returns 0 on success, non-zero value on failure
3760 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05303761static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303762{
3763 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003764 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303765
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003766 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3767 ret = ufshcd_dme_set(hba,
3768 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3769 if (ret) {
3770 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3771 __func__, ret);
3772 goto out;
3773 }
3774 }
3775
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303776 uic_cmd.command = UIC_CMD_DME_SET;
3777 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3778 uic_cmd.argument3 = mode;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003779 ufshcd_hold(hba, false);
3780 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3781 ufshcd_release(hba);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303782
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003783out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003784 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003785}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303786
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003787static int ufshcd_link_recovery(struct ufs_hba *hba)
3788{
3789 int ret;
3790 unsigned long flags;
3791
3792 spin_lock_irqsave(hba->host->host_lock, flags);
3793 hba->ufshcd_state = UFSHCD_STATE_RESET;
3794 ufshcd_set_eh_in_progress(hba);
3795 spin_unlock_irqrestore(hba->host->host_lock, flags);
3796
Can Guoebdd1df2019-11-14 22:09:24 -08003797 /* Reset the attached device */
3798 ufshcd_vops_device_reset(hba);
3799
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003800 ret = ufshcd_host_reset_and_restore(hba);
3801
3802 spin_lock_irqsave(hba->host->host_lock, flags);
3803 if (ret)
3804 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3805 ufshcd_clear_eh_in_progress(hba);
3806 spin_unlock_irqrestore(hba->host->host_lock, flags);
3807
3808 if (ret)
3809 dev_err(hba->dev, "%s: link recovery failed, err %d",
3810 __func__, ret);
3811
3812 return ret;
3813}
3814
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003815static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003816{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003817 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003818 struct uic_command uic_cmd = {0};
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003819 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003820
Kiwoong Kimee32c902016-11-10 21:17:43 +09003821 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3822
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003823 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003824 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003825 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3826 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003827
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003828 if (ret) {
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003829 int err;
3830
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003831 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3832 __func__, ret);
3833
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003834 /*
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003835 * If link recovery fails then return error code returned from
3836 * ufshcd_link_recovery().
3837 * If link recovery succeeds then return -EAGAIN to attempt
3838 * hibern8 enter retry again.
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003839 */
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003840 err = ufshcd_link_recovery(hba);
3841 if (err) {
3842 dev_err(hba->dev, "%s: link recovery failed", __func__);
3843 ret = err;
3844 } else {
3845 ret = -EAGAIN;
3846 }
Kiwoong Kimee32c902016-11-10 21:17:43 +09003847 } else
3848 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3849 POST_CHANGE);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003850
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003851 return ret;
3852}
3853
3854static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3855{
3856 int ret = 0, retries;
3857
3858 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3859 ret = __ufshcd_uic_hibern8_enter(hba);
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003860 if (!ret)
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003861 goto out;
3862 }
3863out:
3864 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003865}
3866
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08003867int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003868{
3869 struct uic_command uic_cmd = {0};
3870 int ret;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003871 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003872
Kiwoong Kimee32c902016-11-10 21:17:43 +09003873 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3874
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003875 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3876 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003877 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3878 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3879
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303880 if (ret) {
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003881 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3882 __func__, ret);
3883 ret = ufshcd_link_recovery(hba);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003884 } else {
Kiwoong Kimee32c902016-11-10 21:17:43 +09003885 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3886 POST_CHANGE);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003887 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3888 hba->ufs_stats.hibern8_exit_cnt++;
3889 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303890
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303891 return ret;
3892}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08003893EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_exit);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303894
Stanley Chuba7af5e2019-12-30 13:32:28 +08003895void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit)
3896{
3897 unsigned long flags;
3898
3899 if (!(hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT))
3900 return;
3901
3902 spin_lock_irqsave(hba->host->host_lock, flags);
3903 if (hba->ahit == ahit)
3904 goto out_unlock;
3905 hba->ahit = ahit;
3906 if (!pm_runtime_suspended(hba->dev))
3907 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3908out_unlock:
3909 spin_unlock_irqrestore(hba->host->host_lock, flags);
3910}
3911EXPORT_SYMBOL_GPL(ufshcd_auto_hibern8_update);
3912
Can Guo71d848b2019-11-14 22:09:26 -08003913void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
Adrian Hunterad448372018-03-20 15:07:38 +02003914{
3915 unsigned long flags;
3916
Stanley Chuee5f1042019-05-21 14:44:52 +08003917 if (!ufshcd_is_auto_hibern8_supported(hba) || !hba->ahit)
Adrian Hunterad448372018-03-20 15:07:38 +02003918 return;
3919
3920 spin_lock_irqsave(hba->host->host_lock, flags);
3921 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3922 spin_unlock_irqrestore(hba->host->host_lock, flags);
3923}
3924
Yaniv Gardi50646362014-10-23 13:25:13 +03003925 /**
3926 * ufshcd_init_pwr_info - setting the POR (power on reset)
3927 * values in hba power info
3928 * @hba: per-adapter instance
3929 */
3930static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3931{
3932 hba->pwr_info.gear_rx = UFS_PWM_G1;
3933 hba->pwr_info.gear_tx = UFS_PWM_G1;
3934 hba->pwr_info.lane_rx = 1;
3935 hba->pwr_info.lane_tx = 1;
3936 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3937 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3938 hba->pwr_info.hs_rate = 0;
3939}
3940
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303941/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003942 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3943 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303944 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003945static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303946{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003947 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3948
3949 if (hba->max_pwr_info.is_valid)
3950 return 0;
3951
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003952 pwr_info->pwr_tx = FAST_MODE;
3953 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003954 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303955
3956 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003957 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3958 &pwr_info->lane_rx);
3959 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3960 &pwr_info->lane_tx);
3961
3962 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
3963 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
3964 __func__,
3965 pwr_info->lane_rx,
3966 pwr_info->lane_tx);
3967 return -EINVAL;
3968 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303969
3970 /*
3971 * First, get the maximum gears of HS speed.
3972 * If a zero value, it means there is no HSGEAR capability.
3973 * Then, get the maximum gears of PWM speed.
3974 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003975 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
3976 if (!pwr_info->gear_rx) {
3977 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3978 &pwr_info->gear_rx);
3979 if (!pwr_info->gear_rx) {
3980 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
3981 __func__, pwr_info->gear_rx);
3982 return -EINVAL;
3983 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003984 pwr_info->pwr_rx = SLOW_MODE;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303985 }
3986
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003987 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
3988 &pwr_info->gear_tx);
3989 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303990 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003991 &pwr_info->gear_tx);
3992 if (!pwr_info->gear_tx) {
3993 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
3994 __func__, pwr_info->gear_tx);
3995 return -EINVAL;
3996 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003997 pwr_info->pwr_tx = SLOW_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003998 }
3999
4000 hba->max_pwr_info.is_valid = true;
4001 return 0;
4002}
4003
4004static int ufshcd_change_power_mode(struct ufs_hba *hba,
4005 struct ufs_pa_layer_attr *pwr_mode)
4006{
4007 int ret;
4008
4009 /* if already configured to the requested pwr_mode */
4010 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4011 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4012 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4013 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4014 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4015 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4016 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4017 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4018 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304019 }
4020
4021 /*
4022 * Configure attributes for power mode change with below.
4023 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4024 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4025 * - PA_HSSERIES
4026 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004027 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4028 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4029 pwr_mode->lane_rx);
4030 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4031 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304032 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004033 else
4034 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304035
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004036 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4037 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4038 pwr_mode->lane_tx);
4039 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4040 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304041 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004042 else
4043 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304044
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004045 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4046 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4047 pwr_mode->pwr_rx == FAST_MODE ||
4048 pwr_mode->pwr_tx == FAST_MODE)
4049 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4050 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304051
Can Guo08342532019-12-05 02:14:42 +00004052 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
4053 DL_FC0ProtectionTimeOutVal_Default);
4054 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
4055 DL_TC0ReplayTimeOutVal_Default);
4056 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
4057 DL_AFC0ReqTimeOutVal_Default);
4058 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
4059 DL_FC1ProtectionTimeOutVal_Default);
4060 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
4061 DL_TC1ReplayTimeOutVal_Default);
4062 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
4063 DL_AFC1ReqTimeOutVal_Default);
4064
4065 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
4066 DL_FC0ProtectionTimeOutVal_Default);
4067 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
4068 DL_TC0ReplayTimeOutVal_Default);
4069 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
4070 DL_AFC0ReqTimeOutVal_Default);
4071
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004072 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4073 | pwr_mode->pwr_tx);
4074
4075 if (ret) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304076 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004077 "%s: power mode change failed %d\n", __func__, ret);
4078 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004079 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4080 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004081
4082 memcpy(&hba->pwr_info, pwr_mode,
4083 sizeof(struct ufs_pa_layer_attr));
4084 }
4085
4086 return ret;
4087}
4088
4089/**
4090 * ufshcd_config_pwr_mode - configure a new power mode
4091 * @hba: per-adapter instance
4092 * @desired_pwr_mode: desired power configuration
4093 */
Alim Akhtar0d846e72018-05-06 15:44:18 +05304094int ufshcd_config_pwr_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004095 struct ufs_pa_layer_attr *desired_pwr_mode)
4096{
4097 struct ufs_pa_layer_attr final_params = { 0 };
4098 int ret;
4099
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004100 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4101 desired_pwr_mode, &final_params);
4102
4103 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004104 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4105
4106 ret = ufshcd_change_power_mode(hba, &final_params);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08004107 if (!ret)
4108 ufshcd_print_pwr_info(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304109
4110 return ret;
4111}
Alim Akhtar0d846e72018-05-06 15:44:18 +05304112EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304113
4114/**
Dolev Raviv68078d52013-07-30 00:35:58 +05304115 * ufshcd_complete_dev_init() - checks device readiness
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004116 * @hba: per-adapter instance
Dolev Raviv68078d52013-07-30 00:35:58 +05304117 *
4118 * Set fDeviceInit flag and poll until device toggles it.
4119 */
4120static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4121{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004122 int i;
4123 int err;
Dolev Raviv68078d52013-07-30 00:35:58 +05304124 bool flag_res = 1;
4125
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004126 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4127 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05304128 if (err) {
4129 dev_err(hba->dev,
4130 "%s setting fDeviceInit flag failed with error %d\n",
4131 __func__, err);
4132 goto out;
4133 }
4134
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004135 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4136 for (i = 0; i < 1000 && !err && flag_res; i++)
4137 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4138 QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4139
Dolev Raviv68078d52013-07-30 00:35:58 +05304140 if (err)
4141 dev_err(hba->dev,
4142 "%s reading fDeviceInit flag failed with error %d\n",
4143 __func__, err);
4144 else if (flag_res)
4145 dev_err(hba->dev,
4146 "%s fDeviceInit was not cleared by the device\n",
4147 __func__);
4148
4149out:
4150 return err;
4151}
4152
4153/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304154 * ufshcd_make_hba_operational - Make UFS controller operational
4155 * @hba: per adapter instance
4156 *
4157 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004158 * 1. Enable required interrupts
4159 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004160 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004161 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304162 *
4163 * Returns 0 on success, non-zero value on failure
4164 */
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004165int ufshcd_make_hba_operational(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304166{
4167 int err = 0;
4168 u32 reg;
4169
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304170 /* Enable required interrupts */
4171 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4172
4173 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004174 if (ufshcd_is_intr_aggr_allowed(hba))
4175 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4176 else
4177 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304178
4179 /* Configure UTRL and UTMRL base address registers */
4180 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4181 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4182 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4183 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4184 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4185 REG_UTP_TASK_REQ_LIST_BASE_L);
4186 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4187 REG_UTP_TASK_REQ_LIST_BASE_H);
4188
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304189 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004190 * Make sure base address and interrupt setup are updated before
4191 * enabling the run/stop registers below.
4192 */
4193 wmb();
4194
4195 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304196 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304197 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004198 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304199 if (!(ufshcd_get_lists_status(reg))) {
4200 ufshcd_enable_run_stop_reg(hba);
4201 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304202 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304203 "Host controller not ready to process requests");
4204 err = -EIO;
4205 goto out;
4206 }
4207
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304208out:
4209 return err;
4210}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004211EXPORT_SYMBOL_GPL(ufshcd_make_hba_operational);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304212
4213/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02004214 * ufshcd_hba_stop - Send controller to reset state
4215 * @hba: per adapter instance
4216 * @can_sleep: perform sleep or just spin
4217 */
4218static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4219{
4220 int err;
4221
4222 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4223 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4224 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4225 10, 1, can_sleep);
4226 if (err)
4227 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4228}
4229
4230/**
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304231 * ufshcd_hba_execute_hce - initialize the controller
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304232 * @hba: per adapter instance
4233 *
4234 * The controller resets itself and controller firmware initialization
4235 * sequence kicks off. When controller is ready it will set
4236 * the Host Controller Enable bit to 1.
4237 *
4238 * Returns 0 on success, non-zero value on failure
4239 */
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304240static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304241{
4242 int retry;
4243
Yaniv Gardi596585a2016-03-10 17:37:08 +02004244 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304245 /* change controller state to "reset state" */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004246 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304247
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004248 /* UniPro link is disabled at this point */
4249 ufshcd_set_link_off(hba);
4250
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004251 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004252
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304253 /* start controller initialization sequence */
4254 ufshcd_hba_start(hba);
4255
4256 /*
4257 * To initialize a UFS host controller HCE bit must be set to 1.
4258 * During initialization the HCE bit value changes from 1->0->1.
4259 * When the host controller completes initialization sequence
4260 * it sets the value of HCE bit to 1. The same HCE bit is read back
4261 * to check if the controller has completed initialization sequence.
4262 * So without this delay the value HCE = 1, set in the previous
4263 * instruction might be read back.
4264 * This delay can be changed based on the controller.
4265 */
Bean Huo838c1ef2019-07-15 11:21:10 +00004266 usleep_range(1000, 1100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304267
4268 /* wait for the host controller to complete initialization */
4269 retry = 10;
4270 while (ufshcd_is_hba_active(hba)) {
4271 if (retry) {
4272 retry--;
4273 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304274 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304275 "Controller enable failed\n");
4276 return -EIO;
4277 }
Bean Huo838c1ef2019-07-15 11:21:10 +00004278 usleep_range(5000, 5100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304279 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004280
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004281 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004282 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004283
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004284 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004285
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304286 return 0;
4287}
4288
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004289int ufshcd_hba_enable(struct ufs_hba *hba)
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304290{
4291 int ret;
4292
4293 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4294 ufshcd_set_link_off(hba);
4295 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4296
4297 /* enable UIC related interrupts */
4298 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4299 ret = ufshcd_dme_reset(hba);
4300 if (!ret) {
4301 ret = ufshcd_dme_enable(hba);
4302 if (!ret)
4303 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4304 if (ret)
4305 dev_err(hba->dev,
4306 "Host controller enable failed with non-hce\n");
4307 }
4308 } else {
4309 ret = ufshcd_hba_execute_hce(hba);
4310 }
4311
4312 return ret;
4313}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004314EXPORT_SYMBOL_GPL(ufshcd_hba_enable);
4315
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004316static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4317{
4318 int tx_lanes, i, err = 0;
4319
4320 if (!peer)
4321 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4322 &tx_lanes);
4323 else
4324 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4325 &tx_lanes);
4326 for (i = 0; i < tx_lanes; i++) {
4327 if (!peer)
4328 err = ufshcd_dme_set(hba,
4329 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4330 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4331 0);
4332 else
4333 err = ufshcd_dme_peer_set(hba,
4334 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4335 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4336 0);
4337 if (err) {
4338 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4339 __func__, peer, i, err);
4340 break;
4341 }
4342 }
4343
4344 return err;
4345}
4346
4347static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4348{
4349 return ufshcd_disable_tx_lcc(hba, true);
4350}
4351
Stanley Chua5fe372d2020-01-04 22:26:07 +08004352void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist,
4353 u32 reg)
Stanley Chu8808b4e2019-07-10 21:38:21 +08004354{
4355 reg_hist->reg[reg_hist->pos] = reg;
4356 reg_hist->tstamp[reg_hist->pos] = ktime_get();
4357 reg_hist->pos = (reg_hist->pos + 1) % UFS_ERR_REG_HIST_LENGTH;
4358}
Stanley Chua5fe372d2020-01-04 22:26:07 +08004359EXPORT_SYMBOL_GPL(ufshcd_update_reg_hist);
Stanley Chu8808b4e2019-07-10 21:38:21 +08004360
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304361/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304362 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304363 * @hba: per adapter instance
4364 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304365 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304366 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304367static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304368{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304369 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004370 int retries = DME_LINKSTARTUP_RETRIES;
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004371 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304372
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004373 /*
4374 * If UFS device isn't active then we will have to issue link startup
4375 * 2 times to make sure the device state move to active.
4376 */
4377 if (!ufshcd_is_ufs_dev_active(hba))
4378 link_startup_again = true;
4379
4380link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004381 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004382 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304383
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004384 ret = ufshcd_dme_link_startup(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004385
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004386 /* check if device is detected by inter-connect layer */
4387 if (!ret && !ufshcd_is_device_present(hba)) {
Stanley Chu8808b4e2019-07-10 21:38:21 +08004388 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4389 0);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004390 dev_err(hba->dev, "%s: Device not present\n", __func__);
4391 ret = -ENXIO;
4392 goto out;
4393 }
4394
4395 /*
4396 * DME link lost indication is only received when link is up,
4397 * but we can't be sure if the link is up until link startup
4398 * succeeds. So reset the local Uni-Pro and try again.
4399 */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004400 if (ret && ufshcd_hba_enable(hba)) {
4401 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4402 (u32)ret);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004403 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004404 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004405 } while (ret && retries--);
4406
Stanley Chu8808b4e2019-07-10 21:38:21 +08004407 if (ret) {
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004408 /* failed to get the link up... retire */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004409 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4410 (u32)ret);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304411 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004412 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304413
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004414 if (link_startup_again) {
4415 link_startup_again = false;
4416 retries = DME_LINKSTARTUP_RETRIES;
4417 goto link_startup;
4418 }
4419
subhashj@codeaurora.orgd2aebb92016-12-22 18:41:33 -08004420 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4421 ufshcd_init_pwr_info(hba);
4422 ufshcd_print_pwr_info(hba);
4423
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004424 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4425 ret = ufshcd_disable_device_tx_lcc(hba);
4426 if (ret)
4427 goto out;
4428 }
4429
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004430 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004431 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4432 if (ret)
4433 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004434
4435 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304436out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004437 if (ret) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304438 dev_err(hba->dev, "link startup failed %d\n", ret);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004439 ufshcd_print_host_state(hba);
4440 ufshcd_print_pwr_info(hba);
4441 ufshcd_print_host_regs(hba);
4442 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304443 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304444}
4445
4446/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304447 * ufshcd_verify_dev_init() - Verify device initialization
4448 * @hba: per-adapter instance
4449 *
4450 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4451 * device Transport Protocol (UTP) layer is ready after a reset.
4452 * If the UTP layer at the device side is not initialized, it may
4453 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4454 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4455 */
4456static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4457{
4458 int err = 0;
4459 int retries;
4460
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004461 ufshcd_hold(hba, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304462 mutex_lock(&hba->dev_cmd.lock);
4463 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4464 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4465 NOP_OUT_TIMEOUT);
4466
4467 if (!err || err == -ETIMEDOUT)
4468 break;
4469
4470 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4471 }
4472 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004473 ufshcd_release(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304474
4475 if (err)
4476 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4477 return err;
4478}
4479
4480/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004481 * ufshcd_set_queue_depth - set lun queue depth
4482 * @sdev: pointer to SCSI device
4483 *
4484 * Read bLUQueueDepth value and activate scsi tagged command
4485 * queueing. For WLUN, queue depth is set to 1. For best-effort
4486 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4487 * value that host can queue.
4488 */
4489static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4490{
4491 int ret = 0;
4492 u8 lun_qdepth;
4493 struct ufs_hba *hba;
4494
4495 hba = shost_priv(sdev->host);
4496
4497 lun_qdepth = hba->nutrs;
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02004498 ret = ufshcd_read_unit_desc_param(hba,
4499 ufshcd_scsi_to_upiu_lun(sdev->lun),
4500 UNIT_DESC_PARAM_LU_Q_DEPTH,
4501 &lun_qdepth,
4502 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004503
4504 /* Some WLUN doesn't support unit descriptor */
4505 if (ret == -EOPNOTSUPP)
4506 lun_qdepth = 1;
4507 else if (!lun_qdepth)
4508 /* eventually, we can figure out the real queue depth */
4509 lun_qdepth = hba->nutrs;
4510 else
4511 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4512
4513 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4514 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004515 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004516}
4517
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004518/*
4519 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4520 * @hba: per-adapter instance
4521 * @lun: UFS device lun id
4522 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4523 *
4524 * Returns 0 in case of success and b_lu_write_protect status would be returned
4525 * @b_lu_write_protect parameter.
4526 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4527 * Returns -EINVAL in case of invalid parameters passed to this function.
4528 */
4529static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4530 u8 lun,
4531 u8 *b_lu_write_protect)
4532{
4533 int ret;
4534
4535 if (!b_lu_write_protect)
4536 ret = -EINVAL;
4537 /*
4538 * According to UFS device spec, RPMB LU can't be write
4539 * protected so skip reading bLUWriteProtect parameter for
4540 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4541 */
4542 else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4543 ret = -ENOTSUPP;
4544 else
4545 ret = ufshcd_read_unit_desc_param(hba,
4546 lun,
4547 UNIT_DESC_PARAM_LU_WR_PROTECT,
4548 b_lu_write_protect,
4549 sizeof(*b_lu_write_protect));
4550 return ret;
4551}
4552
4553/**
4554 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4555 * status
4556 * @hba: per-adapter instance
4557 * @sdev: pointer to SCSI device
4558 *
4559 */
4560static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4561 struct scsi_device *sdev)
4562{
4563 if (hba->dev_info.f_power_on_wp_en &&
4564 !hba->dev_info.is_lu_power_on_wp) {
4565 u8 b_lu_write_protect;
4566
4567 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4568 &b_lu_write_protect) &&
4569 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4570 hba->dev_info.is_lu_power_on_wp = true;
4571 }
4572}
4573
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004574/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304575 * ufshcd_slave_alloc - handle initial SCSI device configurations
4576 * @sdev: pointer to SCSI device
4577 *
4578 * Returns success
4579 */
4580static int ufshcd_slave_alloc(struct scsi_device *sdev)
4581{
4582 struct ufs_hba *hba;
4583
4584 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304585
4586 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4587 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304588
Can Guoa3a76392019-12-05 02:14:30 +00004589 /* DBD field should be set to 1 in mode sense(10) */
4590 sdev->set_dbd_for_ms = 1;
4591
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304592 /* allow SCSI layer to restart the device in case of errors */
4593 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004594
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004595 /* REPORT SUPPORTED OPERATION CODES is not supported */
4596 sdev->no_report_opcodes = 1;
4597
Sujit Reddy Thumma84af7e82018-01-24 09:52:35 +05304598 /* WRITE_SAME command is not supported */
4599 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004600
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004601 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004602
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004603 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4604
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004605 return 0;
4606}
4607
4608/**
4609 * ufshcd_change_queue_depth - change queue depth
4610 * @sdev: pointer to SCSI device
4611 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004612 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004613 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004614 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004615static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004616{
4617 struct ufs_hba *hba = shost_priv(sdev->host);
4618
4619 if (depth > hba->nutrs)
4620 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004621 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304622}
4623
4624/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004625 * ufshcd_slave_configure - adjust SCSI device configurations
4626 * @sdev: pointer to SCSI device
4627 */
4628static int ufshcd_slave_configure(struct scsi_device *sdev)
4629{
Stanley Chu49615ba2019-09-16 23:56:50 +08004630 struct ufs_hba *hba = shost_priv(sdev->host);
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004631 struct request_queue *q = sdev->request_queue;
4632
4633 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
Stanley Chu49615ba2019-09-16 23:56:50 +08004634
4635 if (ufshcd_is_rpm_autosuspend_allowed(hba))
4636 sdev->rpm_autosuspend = 1;
4637
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004638 return 0;
4639}
4640
4641/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304642 * ufshcd_slave_destroy - remove SCSI device configurations
4643 * @sdev: pointer to SCSI device
4644 */
4645static void ufshcd_slave_destroy(struct scsi_device *sdev)
4646{
4647 struct ufs_hba *hba;
4648
4649 hba = shost_priv(sdev->host);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004650 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004651 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4652 unsigned long flags;
4653
4654 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004655 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004656 spin_unlock_irqrestore(hba->host->host_lock, flags);
4657 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304658}
4659
4660/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304661 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004662 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304663 * @scsi_status: SCSI command status
4664 *
4665 * Returns value base on SCSI command status
4666 */
4667static inline int
4668ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4669{
4670 int result = 0;
4671
4672 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304673 case SAM_STAT_CHECK_CONDITION:
4674 ufshcd_copy_sense_data(lrbp);
Tomas Winkler30eb2e42018-11-26 10:10:34 +02004675 /* fallthrough */
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304676 case SAM_STAT_GOOD:
4677 result |= DID_OK << 16 |
4678 COMMAND_COMPLETE << 8 |
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304679 scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304680 break;
4681 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304682 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304683 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304684 ufshcd_copy_sense_data(lrbp);
4685 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304686 break;
4687 default:
4688 result |= DID_ERROR << 16;
4689 break;
4690 } /* end of switch */
4691
4692 return result;
4693}
4694
4695/**
4696 * ufshcd_transfer_rsp_status - Get overall status of the response
4697 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004698 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304699 *
4700 * Returns result of the command to notify SCSI midlayer
4701 */
4702static inline int
4703ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4704{
4705 int result = 0;
4706 int scsi_status;
4707 int ocs;
4708
4709 /* overall command status of utrd */
4710 ocs = ufshcd_get_tr_ocs(lrbp);
4711
4712 switch (ocs) {
4713 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304714 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004715 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304716 switch (result) {
4717 case UPIU_TRANSACTION_RESPONSE:
4718 /*
4719 * get the response UPIU result to extract
4720 * the SCSI command status
4721 */
4722 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4723
4724 /*
4725 * get the result based on SCSI status response
4726 * to notify the SCSI midlayer of the command status
4727 */
4728 scsi_status = result & MASK_SCSI_STATUS;
4729 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304730
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02004731 /*
4732 * Currently we are only supporting BKOPs exception
4733 * events hence we can ignore BKOPs exception event
4734 * during power management callbacks. BKOPs exception
4735 * event is not expected to be raised in runtime suspend
4736 * callback as it allows the urgent bkops.
4737 * During system suspend, we are anyway forcefully
4738 * disabling the bkops and if urgent bkops is needed
4739 * it will be enabled on system resume. Long term
4740 * solution could be to abort the system suspend if
4741 * UFS device needs urgent BKOPs.
4742 */
4743 if (!hba->pm_op_in_progress &&
4744 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304745 schedule_work(&hba->eeh_work);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304746 break;
4747 case UPIU_TRANSACTION_REJECT_UPIU:
4748 /* TODO: handle Reject UPIU Response */
4749 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304750 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304751 "Reject UPIU not fully implemented\n");
4752 break;
4753 default:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304754 dev_err(hba->dev,
4755 "Unexpected request response code = %x\n",
4756 result);
Stanley Chue0347d82019-04-15 20:23:38 +08004757 result = DID_ERROR << 16;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304758 break;
4759 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304760 break;
4761 case OCS_ABORTED:
4762 result |= DID_ABORT << 16;
4763 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304764 case OCS_INVALID_COMMAND_STATUS:
4765 result |= DID_REQUEUE << 16;
4766 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304767 case OCS_INVALID_CMD_TABLE_ATTR:
4768 case OCS_INVALID_PRDT_ATTR:
4769 case OCS_MISMATCH_DATA_BUF_SIZE:
4770 case OCS_MISMATCH_RESP_UPIU_SIZE:
4771 case OCS_PEER_COMM_FAILURE:
4772 case OCS_FATAL_ERROR:
4773 default:
4774 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304775 dev_err(hba->dev,
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004776 "OCS error from controller = %x for tag %d\n",
4777 ocs, lrbp->task_tag);
4778 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08004779 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304780 break;
4781 } /* end of switch */
4782
Can Guo2df74b62019-11-25 22:53:33 -08004783 if ((host_byte(result) != DID_OK) && !hba->silence_err_logs)
Dolev Raviv66cc8202016-12-22 18:39:42 -08004784 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304785 return result;
4786}
4787
4788/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304789 * ufshcd_uic_cmd_compl - handle completion of uic command
4790 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304791 * @intr_status: interrupt status generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004792 *
4793 * Returns
4794 * IRQ_HANDLED - If interrupt is valid
4795 * IRQ_NONE - If invalid interrupt
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304796 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004797static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304798{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004799 irqreturn_t retval = IRQ_NONE;
4800
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304801 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304802 hba->active_uic_cmd->argument2 |=
4803 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304804 hba->active_uic_cmd->argument3 =
4805 ufshcd_get_dme_attr_val(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304806 complete(&hba->active_uic_cmd->done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004807 retval = IRQ_HANDLED;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304808 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304809
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004810 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004811 complete(hba->uic_async_done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004812 retval = IRQ_HANDLED;
4813 }
4814 return retval;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304815}
4816
4817/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004818 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304819 * @hba: per adapter instance
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004820 * @completed_reqs: requests to complete
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304821 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004822static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4823 unsigned long completed_reqs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304824{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304825 struct ufshcd_lrb *lrbp;
4826 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304827 int result;
4828 int index;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004829
Dolev Ravive9d501b2014-07-01 12:22:37 +03004830 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4831 lrbp = &hba->lrb[index];
4832 cmd = lrbp->cmd;
4833 if (cmd) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004834 ufshcd_add_command_trace(hba, index, "complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004835 result = ufshcd_transfer_rsp_status(hba, lrbp);
4836 scsi_dma_unmap(cmd);
4837 cmd->result = result;
4838 /* Mark completed command as NULL in LRB */
4839 lrbp->cmd = NULL;
Can Guo74a527a2019-11-25 22:53:32 -08004840 lrbp->compl_time_stamp = ktime_get();
Dolev Ravive9d501b2014-07-01 12:22:37 +03004841 /* Do not touch lrbp after scsi done */
4842 cmd->scsi_done(cmd);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004843 __ufshcd_release(hba);
Joao Pinto300bb132016-05-11 12:21:27 +01004844 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4845 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
Can Guo74a527a2019-11-25 22:53:32 -08004846 lrbp->compl_time_stamp = ktime_get();
Lee Susman1a07f2d2016-12-22 18:42:03 -08004847 if (hba->dev_cmd.complete) {
4848 ufshcd_add_command_trace(hba, index,
4849 "dev_complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004850 complete(hba->dev_cmd.complete);
Lee Susman1a07f2d2016-12-22 18:42:03 -08004851 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03004852 }
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08004853 if (ufshcd_is_clkscaling_supported(hba))
4854 hba->clk_scaling.active_reqs--;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004855 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304856
4857 /* clear corresponding bits of completed commands */
4858 hba->outstanding_reqs ^= completed_reqs;
4859
Sahitya Tummala856b3482014-09-25 15:32:34 +03004860 ufshcd_clk_scaling_update_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304861}
4862
4863/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004864 * ufshcd_transfer_req_compl - handle SCSI and query command completion
4865 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004866 *
4867 * Returns
4868 * IRQ_HANDLED - If interrupt is valid
4869 * IRQ_NONE - If invalid interrupt
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004870 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004871static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba)
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004872{
4873 unsigned long completed_reqs;
4874 u32 tr_doorbell;
4875
4876 /* Resetting interrupt aggregation counters first and reading the
4877 * DOOR_BELL afterward allows us to handle all the completed requests.
4878 * In order to prevent other interrupts starvation the DB is read once
4879 * after reset. The down side of this solution is the possibility of
4880 * false interrupt if device completes another request after resetting
4881 * aggregation and before reading the DB.
4882 */
Alim Akhtar5ac6abc2018-05-06 15:44:16 +05304883 if (ufshcd_is_intr_aggr_allowed(hba) &&
4884 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004885 ufshcd_reset_intr_aggr(hba);
4886
4887 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4888 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4889
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004890 if (completed_reqs) {
4891 __ufshcd_transfer_req_compl(hba, completed_reqs);
4892 return IRQ_HANDLED;
4893 } else {
4894 return IRQ_NONE;
4895 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004896}
4897
4898/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304899 * ufshcd_disable_ee - disable exception event
4900 * @hba: per-adapter instance
4901 * @mask: exception event to disable
4902 *
4903 * Disables exception event in the device so that the EVENT_ALERT
4904 * bit is not set.
4905 *
4906 * Returns zero on success, non-zero error value on failure.
4907 */
4908static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4909{
4910 int err = 0;
4911 u32 val;
4912
4913 if (!(hba->ee_ctrl_mask & mask))
4914 goto out;
4915
4916 val = hba->ee_ctrl_mask & ~mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004917 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004918 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304919 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4920 if (!err)
4921 hba->ee_ctrl_mask &= ~mask;
4922out:
4923 return err;
4924}
4925
4926/**
4927 * ufshcd_enable_ee - enable exception event
4928 * @hba: per-adapter instance
4929 * @mask: exception event to enable
4930 *
4931 * Enable corresponding exception event in the device to allow
4932 * device to alert host in critical scenarios.
4933 *
4934 * Returns zero on success, non-zero error value on failure.
4935 */
4936static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4937{
4938 int err = 0;
4939 u32 val;
4940
4941 if (hba->ee_ctrl_mask & mask)
4942 goto out;
4943
4944 val = hba->ee_ctrl_mask | mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004945 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004946 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304947 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4948 if (!err)
4949 hba->ee_ctrl_mask |= mask;
4950out:
4951 return err;
4952}
4953
4954/**
4955 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4956 * @hba: per-adapter instance
4957 *
4958 * Allow device to manage background operations on its own. Enabling
4959 * this might lead to inconsistent latencies during normal data transfers
4960 * as the device is allowed to manage its own way of handling background
4961 * operations.
4962 *
4963 * Returns zero on success, non-zero on failure.
4964 */
4965static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4966{
4967 int err = 0;
4968
4969 if (hba->auto_bkops_enabled)
4970 goto out;
4971
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004972 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304973 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4974 if (err) {
4975 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4976 __func__, err);
4977 goto out;
4978 }
4979
4980 hba->auto_bkops_enabled = true;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08004981 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304982
4983 /* No need of URGENT_BKOPS exception from the device */
4984 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4985 if (err)
4986 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
4987 __func__, err);
4988out:
4989 return err;
4990}
4991
4992/**
4993 * ufshcd_disable_auto_bkops - block device in doing background operations
4994 * @hba: per-adapter instance
4995 *
4996 * Disabling background operations improves command response latency but
4997 * has drawback of device moving into critical state where the device is
4998 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
4999 * host is idle so that BKOPS are managed effectively without any negative
5000 * impacts.
5001 *
5002 * Returns zero on success, non-zero on failure.
5003 */
5004static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5005{
5006 int err = 0;
5007
5008 if (!hba->auto_bkops_enabled)
5009 goto out;
5010
5011 /*
5012 * If host assisted BKOPs is to be enabled, make sure
5013 * urgent bkops exception is allowed.
5014 */
5015 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5016 if (err) {
5017 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5018 __func__, err);
5019 goto out;
5020 }
5021
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005022 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305023 QUERY_FLAG_IDN_BKOPS_EN, NULL);
5024 if (err) {
5025 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5026 __func__, err);
5027 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5028 goto out;
5029 }
5030
5031 hba->auto_bkops_enabled = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08005032 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
Asutosh Das24366c2a2019-11-25 22:53:30 -08005033 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305034out:
5035 return err;
5036}
5037
5038/**
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005039 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305040 * @hba: per adapter instance
5041 *
5042 * After a device reset the device may toggle the BKOPS_EN flag
5043 * to default value. The s/w tracking variables should be updated
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005044 * as well. This function would change the auto-bkops state based on
5045 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305046 */
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005047static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305048{
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005049 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5050 hba->auto_bkops_enabled = false;
5051 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5052 ufshcd_enable_auto_bkops(hba);
5053 } else {
5054 hba->auto_bkops_enabled = true;
5055 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5056 ufshcd_disable_auto_bkops(hba);
5057 }
Asutosh Das24366c2a2019-11-25 22:53:30 -08005058 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305059}
5060
5061static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5062{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005063 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305064 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5065}
5066
5067/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005068 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5069 * @hba: per-adapter instance
5070 * @status: bkops_status value
5071 *
5072 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5073 * flag in the device to permit background operations if the device
5074 * bkops_status is greater than or equal to "status" argument passed to
5075 * this function, disable otherwise.
5076 *
5077 * Returns 0 for success, non-zero in case of failure.
5078 *
5079 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5080 * to know whether auto bkops is enabled or disabled after this function
5081 * returns control to it.
5082 */
5083static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5084 enum bkops_status status)
5085{
5086 int err;
5087 u32 curr_status = 0;
5088
5089 err = ufshcd_get_bkops_status(hba, &curr_status);
5090 if (err) {
5091 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5092 __func__, err);
5093 goto out;
5094 } else if (curr_status > BKOPS_STATUS_MAX) {
5095 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5096 __func__, curr_status);
5097 err = -EINVAL;
5098 goto out;
5099 }
5100
5101 if (curr_status >= status)
5102 err = ufshcd_enable_auto_bkops(hba);
5103 else
5104 err = ufshcd_disable_auto_bkops(hba);
Asutosh Das24366c2a2019-11-25 22:53:30 -08005105 hba->urgent_bkops_lvl = curr_status;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005106out:
5107 return err;
5108}
5109
5110/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305111 * ufshcd_urgent_bkops - handle urgent bkops exception event
5112 * @hba: per-adapter instance
5113 *
5114 * Enable fBackgroundOpsEn flag in the device to permit background
5115 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005116 *
5117 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5118 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305119 */
5120static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5121{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005122 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305123}
5124
5125static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5126{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005127 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305128 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5129}
5130
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005131static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5132{
5133 int err;
5134 u32 curr_status = 0;
5135
5136 if (hba->is_urgent_bkops_lvl_checked)
5137 goto enable_auto_bkops;
5138
5139 err = ufshcd_get_bkops_status(hba, &curr_status);
5140 if (err) {
5141 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5142 __func__, err);
5143 goto out;
5144 }
5145
5146 /*
5147 * We are seeing that some devices are raising the urgent bkops
5148 * exception events even when BKOPS status doesn't indicate performace
5149 * impacted or critical. Handle these device by determining their urgent
5150 * bkops status at runtime.
5151 */
5152 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5153 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5154 __func__, curr_status);
5155 /* update the current status as the urgent bkops level */
5156 hba->urgent_bkops_lvl = curr_status;
5157 hba->is_urgent_bkops_lvl_checked = true;
5158 }
5159
5160enable_auto_bkops:
5161 err = ufshcd_enable_auto_bkops(hba);
5162out:
5163 if (err < 0)
5164 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5165 __func__, err);
5166}
5167
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305168/**
5169 * ufshcd_exception_event_handler - handle exceptions raised by device
5170 * @work: pointer to work data
5171 *
5172 * Read bExceptionEventStatus attribute from the device and handle the
5173 * exception event accordingly.
5174 */
5175static void ufshcd_exception_event_handler(struct work_struct *work)
5176{
5177 struct ufs_hba *hba;
5178 int err;
5179 u32 status = 0;
5180 hba = container_of(work, struct ufs_hba, eeh_work);
5181
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305182 pm_runtime_get_sync(hba->dev);
Stanley Chu03e1d282019-12-24 21:01:05 +08005183 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305184 err = ufshcd_get_ee_status(hba, &status);
5185 if (err) {
5186 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5187 __func__, err);
5188 goto out;
5189 }
5190
5191 status &= hba->ee_ctrl_mask;
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005192
5193 if (status & MASK_EE_URGENT_BKOPS)
5194 ufshcd_bkops_exception_event_handler(hba);
5195
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305196out:
Stanley Chu03e1d282019-12-24 21:01:05 +08005197 ufshcd_scsi_unblock_requests(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305198 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305199 return;
5200}
5201
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005202/* Complete requests that have door-bell cleared */
5203static void ufshcd_complete_requests(struct ufs_hba *hba)
5204{
5205 ufshcd_transfer_req_compl(hba);
5206 ufshcd_tmc_handler(hba);
5207}
5208
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305209/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02005210 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5211 * to recover from the DL NAC errors or not.
5212 * @hba: per-adapter instance
5213 *
5214 * Returns true if error handling is required, false otherwise
5215 */
5216static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5217{
5218 unsigned long flags;
5219 bool err_handling = true;
5220
5221 spin_lock_irqsave(hba->host->host_lock, flags);
5222 /*
5223 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5224 * device fatal error and/or DL NAC & REPLAY timeout errors.
5225 */
5226 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5227 goto out;
5228
5229 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5230 ((hba->saved_err & UIC_ERROR) &&
5231 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5232 goto out;
5233
5234 if ((hba->saved_err & UIC_ERROR) &&
5235 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5236 int err;
5237 /*
5238 * wait for 50ms to see if we can get any other errors or not.
5239 */
5240 spin_unlock_irqrestore(hba->host->host_lock, flags);
5241 msleep(50);
5242 spin_lock_irqsave(hba->host->host_lock, flags);
5243
5244 /*
5245 * now check if we have got any other severe errors other than
5246 * DL NAC error?
5247 */
5248 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5249 ((hba->saved_err & UIC_ERROR) &&
5250 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5251 goto out;
5252
5253 /*
5254 * As DL NAC is the only error received so far, send out NOP
5255 * command to confirm if link is still active or not.
5256 * - If we don't get any response then do error recovery.
5257 * - If we get response then clear the DL NAC error bit.
5258 */
5259
5260 spin_unlock_irqrestore(hba->host->host_lock, flags);
5261 err = ufshcd_verify_dev_init(hba);
5262 spin_lock_irqsave(hba->host->host_lock, flags);
5263
5264 if (err)
5265 goto out;
5266
5267 /* Link seems to be alive hence ignore the DL NAC errors */
5268 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5269 hba->saved_err &= ~UIC_ERROR;
5270 /* clear NAC error */
5271 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5272 if (!hba->saved_uic_err) {
5273 err_handling = false;
5274 goto out;
5275 }
5276 }
5277out:
5278 spin_unlock_irqrestore(hba->host->host_lock, flags);
5279 return err_handling;
5280}
5281
5282/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305283 * ufshcd_err_handler - handle UFS errors that require s/w attention
5284 * @work: pointer to work structure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305285 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305286static void ufshcd_err_handler(struct work_struct *work)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305287{
5288 struct ufs_hba *hba;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305289 unsigned long flags;
5290 u32 err_xfer = 0;
5291 u32 err_tm = 0;
5292 int err = 0;
5293 int tag;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005294 bool needs_reset = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305295
5296 hba = container_of(work, struct ufs_hba, eh_work);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305297
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305298 pm_runtime_get_sync(hba->dev);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005299 ufshcd_hold(hba, false);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305300
5301 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005302 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305303 goto out;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305304
5305 hba->ufshcd_state = UFSHCD_STATE_RESET;
5306 ufshcd_set_eh_in_progress(hba);
5307
5308 /* Complete requests that have door-bell cleared by h/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005309 ufshcd_complete_requests(hba);
Yaniv Gardi583fa622016-03-10 17:37:13 +02005310
5311 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5312 bool ret;
5313
5314 spin_unlock_irqrestore(hba->host->host_lock, flags);
5315 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5316 ret = ufshcd_quirk_dl_nac_errors(hba);
5317 spin_lock_irqsave(hba->host->host_lock, flags);
5318 if (!ret)
5319 goto skip_err_handling;
5320 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005321 if ((hba->saved_err & INT_FATAL_ERRORS) ||
Stanley Chu82174442019-05-21 14:44:54 +08005322 (hba->saved_err & UFSHCD_UIC_HIBERN8_MASK) ||
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005323 ((hba->saved_err & UIC_ERROR) &&
5324 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5325 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5326 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5327 needs_reset = true;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305328
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005329 /*
5330 * if host reset is required then skip clearing the pending
Can Guo2df74b62019-11-25 22:53:33 -08005331 * transfers forcefully because they will get cleared during
5332 * host reset and restore
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005333 */
5334 if (needs_reset)
5335 goto skip_pending_xfer_clear;
5336
5337 /* release lock as clear command might sleep */
5338 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305339 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005340 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5341 if (ufshcd_clear_cmd(hba, tag)) {
5342 err_xfer = true;
5343 goto lock_skip_pending_xfer_clear;
5344 }
5345 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305346
5347 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005348 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5349 if (ufshcd_clear_tm_cmd(hba, tag)) {
5350 err_tm = true;
5351 goto lock_skip_pending_xfer_clear;
5352 }
5353 }
5354
5355lock_skip_pending_xfer_clear:
5356 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305357
5358 /* Complete the requests that are cleared by s/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005359 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305360
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005361 if (err_xfer || err_tm)
5362 needs_reset = true;
5363
5364skip_pending_xfer_clear:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305365 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005366 if (needs_reset) {
5367 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5368
5369 /*
5370 * ufshcd_reset_and_restore() does the link reinitialization
5371 * which will need atleast one empty doorbell slot to send the
5372 * device management commands (NOP and query commands).
5373 * If there is no slot empty at this moment then free up last
5374 * slot forcefully.
5375 */
5376 if (hba->outstanding_reqs == max_doorbells)
5377 __ufshcd_transfer_req_compl(hba,
5378 (1UL << (hba->nutrs - 1)));
5379
5380 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305381 err = ufshcd_reset_and_restore(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005382 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305383 if (err) {
5384 dev_err(hba->dev, "%s: reset and restore failed\n",
5385 __func__);
5386 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5387 }
5388 /*
5389 * Inform scsi mid-layer that we did reset and allow to handle
5390 * Unit Attention properly.
5391 */
5392 scsi_report_bus_reset(hba->host, 0);
5393 hba->saved_err = 0;
5394 hba->saved_uic_err = 0;
5395 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005396
Yaniv Gardi583fa622016-03-10 17:37:13 +02005397skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005398 if (!needs_reset) {
5399 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5400 if (hba->saved_err || hba->saved_uic_err)
5401 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5402 __func__, hba->saved_err, hba->saved_uic_err);
5403 }
5404
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305405 ufshcd_clear_eh_in_progress(hba);
5406
5407out:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005408 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani38135532018-05-03 16:37:18 +05305409 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005410 ufshcd_release(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305411 pm_runtime_put_sync(hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305412}
5413
5414/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305415 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5416 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005417 *
5418 * Returns
5419 * IRQ_HANDLED - If interrupt is valid
5420 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305421 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005422static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305423{
5424 u32 reg;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005425 irqreturn_t retval = IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305426
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005427 /* PHY layer lane error */
5428 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5429 /* Ignore LINERESET indication, as this is not an error */
5430 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005431 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005432 /*
5433 * To know whether this error is fatal or not, DB timeout
5434 * must be checked but this error is handled separately.
5435 */
5436 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
Stanley Chu48d5b972019-07-10 21:38:18 +08005437 ufshcd_update_reg_hist(&hba->ufs_stats.pa_err, reg);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005438 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005439 }
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005440
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305441 /* PA_INIT_ERROR is fatal and needs UIC reset */
5442 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005443 if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
5444 (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005445 ufshcd_update_reg_hist(&hba->ufs_stats.dl_err, reg);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005446
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005447 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5448 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
5449 else if (hba->dev_quirks &
5450 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5451 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5452 hba->uic_error |=
5453 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5454 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5455 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5456 }
5457 retval |= IRQ_HANDLED;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005458 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305459
5460 /* UIC NL/TL/DME errors needs software retry */
5461 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005462 if ((reg & UIC_NETWORK_LAYER_ERROR) &&
5463 (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005464 ufshcd_update_reg_hist(&hba->ufs_stats.nl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305465 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005466 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005467 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305468
5469 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005470 if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
5471 (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005472 ufshcd_update_reg_hist(&hba->ufs_stats.tl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305473 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005474 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005475 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305476
5477 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005478 if ((reg & UIC_DME_ERROR) &&
5479 (reg & UIC_DME_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005480 ufshcd_update_reg_hist(&hba->ufs_stats.dme_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305481 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005482 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005483 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305484
5485 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5486 __func__, hba->uic_error);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005487 return retval;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305488}
5489
Stanley Chu82174442019-05-21 14:44:54 +08005490static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5491 u32 intr_mask)
5492{
5493 if (!ufshcd_is_auto_hibern8_supported(hba))
5494 return false;
5495
5496 if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5497 return false;
5498
5499 if (hba->active_uic_cmd &&
5500 (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5501 hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5502 return false;
5503
5504 return true;
5505}
5506
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305507/**
5508 * ufshcd_check_errors - Check for errors that need s/w attention
5509 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005510 *
5511 * Returns
5512 * IRQ_HANDLED - If interrupt is valid
5513 * IRQ_NONE - If invalid interrupt
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305514 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005515static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305516{
5517 bool queue_eh_work = false;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005518 irqreturn_t retval = IRQ_NONE;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305519
Stanley Chud3c615b2019-07-10 21:38:19 +08005520 if (hba->errors & INT_FATAL_ERRORS) {
5521 ufshcd_update_reg_hist(&hba->ufs_stats.fatal_err, hba->errors);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305522 queue_eh_work = true;
Stanley Chud3c615b2019-07-10 21:38:19 +08005523 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305524
5525 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305526 hba->uic_error = 0;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005527 retval = ufshcd_update_uic_error(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305528 if (hba->uic_error)
5529 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305530 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305531
Stanley Chu82174442019-05-21 14:44:54 +08005532 if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
5533 dev_err(hba->dev,
5534 "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
5535 __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
5536 "Enter" : "Exit",
5537 hba->errors, ufshcd_get_upmcrs(hba));
Stanley Chud3c615b2019-07-10 21:38:19 +08005538 ufshcd_update_reg_hist(&hba->ufs_stats.auto_hibern8_err,
5539 hba->errors);
Stanley Chu82174442019-05-21 14:44:54 +08005540 queue_eh_work = true;
5541 }
5542
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305543 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005544 /*
5545 * update the transfer error masks to sticky bits, let's do this
5546 * irrespective of current ufshcd_state.
5547 */
5548 hba->saved_err |= hba->errors;
5549 hba->saved_uic_err |= hba->uic_error;
5550
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305551 /* handle fatal errors only when link is functional */
5552 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5553 /* block commands from scsi mid-layer */
Subhash Jadavani38135532018-05-03 16:37:18 +05305554 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305555
Zang Leigang141f8162016-11-16 11:29:37 +08005556 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
Dolev Raviv66cc8202016-12-22 18:39:42 -08005557
5558 /* dump controller state before resetting */
5559 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5560 bool pr_prdt = !!(hba->saved_err &
5561 SYSTEM_BUS_FATAL_ERROR);
5562
5563 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5564 __func__, hba->saved_err,
5565 hba->saved_uic_err);
5566
5567 ufshcd_print_host_regs(hba);
5568 ufshcd_print_pwr_info(hba);
5569 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5570 ufshcd_print_trs(hba, hba->outstanding_reqs,
5571 pr_prdt);
5572 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305573 schedule_work(&hba->eh_work);
5574 }
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005575 retval |= IRQ_HANDLED;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305576 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305577 /*
5578 * if (!queue_eh_work) -
5579 * Other errors are either non-fatal where host recovers
5580 * itself without s/w intervention or errors that will be
5581 * handled by the SCSI core layer.
5582 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005583 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305584}
5585
Bart Van Assche69a6c262019-12-09 10:13:09 -08005586struct ctm_info {
5587 struct ufs_hba *hba;
5588 unsigned long pending;
5589 unsigned int ncpl;
5590};
5591
5592static bool ufshcd_compl_tm(struct request *req, void *priv, bool reserved)
5593{
5594 struct ctm_info *const ci = priv;
5595 struct completion *c;
5596
5597 WARN_ON_ONCE(reserved);
5598 if (test_bit(req->tag, &ci->pending))
5599 return true;
5600 ci->ncpl++;
5601 c = req->end_io_data;
5602 if (c)
5603 complete(c);
5604 return true;
5605}
5606
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305607/**
5608 * ufshcd_tmc_handler - handle task management function completion
5609 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005610 *
5611 * Returns
5612 * IRQ_HANDLED - If interrupt is valid
5613 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305614 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005615static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305616{
Bart Van Assche69a6c262019-12-09 10:13:09 -08005617 struct request_queue *q = hba->tmf_queue;
5618 struct ctm_info ci = {
5619 .hba = hba,
5620 .pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL),
5621 };
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305622
Bart Van Assche69a6c262019-12-09 10:13:09 -08005623 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_compl_tm, &ci);
5624 return ci.ncpl ? IRQ_HANDLED : IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305625}
5626
5627/**
5628 * ufshcd_sl_intr - Interrupt service routine
5629 * @hba: per adapter instance
5630 * @intr_status: contains interrupts generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005631 *
5632 * Returns
5633 * IRQ_HANDLED - If interrupt is valid
5634 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305635 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005636static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305637{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005638 irqreturn_t retval = IRQ_NONE;
5639
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305640 hba->errors = UFSHCD_ERROR_MASK & intr_status;
Stanley Chu82174442019-05-21 14:44:54 +08005641
5642 if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5643 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5644
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305645 if (hba->errors)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005646 retval |= ufshcd_check_errors(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305647
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305648 if (intr_status & UFSHCD_UIC_MASK)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005649 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305650
5651 if (intr_status & UTP_TASK_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005652 retval |= ufshcd_tmc_handler(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305653
5654 if (intr_status & UTP_TRANSFER_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005655 retval |= ufshcd_transfer_req_compl(hba);
5656
5657 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305658}
5659
5660/**
5661 * ufshcd_intr - Main interrupt service routine
5662 * @irq: irq number
5663 * @__hba: pointer to adapter instance
5664 *
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005665 * Returns
5666 * IRQ_HANDLED - If interrupt is valid
5667 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305668 */
5669static irqreturn_t ufshcd_intr(int irq, void *__hba)
5670{
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005671 u32 intr_status, enabled_intr_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305672 irqreturn_t retval = IRQ_NONE;
5673 struct ufs_hba *hba = __hba;
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305674 int retries = hba->nutrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305675
5676 spin_lock(hba->host->host_lock);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305677 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305678
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305679 /*
5680 * There could be max of hba->nutrs reqs in flight and in worst case
5681 * if the reqs get finished 1 by 1 after the interrupt status is
5682 * read, make sure we handle them by checking the interrupt status
5683 * again in a loop until we process all of the reqs before returning.
5684 */
5685 do {
5686 enabled_intr_status =
5687 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5688 if (intr_status)
5689 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005690 if (enabled_intr_status)
5691 retval |= ufshcd_sl_intr(hba, enabled_intr_status);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005692
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305693 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5694 } while (intr_status && --retries);
5695
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005696 if (retval == IRQ_NONE) {
5697 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x\n",
5698 __func__, intr_status);
5699 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
5700 }
5701
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305702 spin_unlock(hba->host->host_lock);
5703 return retval;
5704}
5705
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305706static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5707{
5708 int err = 0;
5709 u32 mask = 1 << tag;
5710 unsigned long flags;
5711
5712 if (!test_bit(tag, &hba->outstanding_tasks))
5713 goto out;
5714
5715 spin_lock_irqsave(hba->host->host_lock, flags);
Alim Akhtar1399c5b2018-05-06 15:44:15 +05305716 ufshcd_utmrl_clear(hba, tag);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305717 spin_unlock_irqrestore(hba->host->host_lock, flags);
5718
5719 /* poll for max. 1 sec to clear door bell register by h/w */
5720 err = ufshcd_wait_for_register(hba,
5721 REG_UTP_TASK_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02005722 mask, 0, 1000, 1000, true);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305723out:
5724 return err;
5725}
5726
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005727static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
5728 struct utp_task_req_desc *treq, u8 tm_function)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305729{
Bart Van Assche69a6c262019-12-09 10:13:09 -08005730 struct request_queue *q = hba->tmf_queue;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005731 struct Scsi_Host *host = hba->host;
Bart Van Assche69a6c262019-12-09 10:13:09 -08005732 DECLARE_COMPLETION_ONSTACK(wait);
5733 struct request *req;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305734 unsigned long flags;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005735 int free_slot, task_tag, err;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305736
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305737 /*
5738 * Get free slot, sleep if slots are unavailable.
5739 * Even though we use wait_event() which sleeps indefinitely,
5740 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5741 */
Bart Van Assche69a6c262019-12-09 10:13:09 -08005742 req = blk_get_request(q, REQ_OP_DRV_OUT, BLK_MQ_REQ_RESERVED);
5743 req->end_io_data = &wait;
5744 free_slot = req->tag;
5745 WARN_ON_ONCE(free_slot < 0 || free_slot >= hba->nutmrs);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005746 ufshcd_hold(hba, false);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305747
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305748 spin_lock_irqsave(host->host_lock, flags);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305749 task_tag = hba->nutrs + free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305750
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005751 treq->req_header.dword_0 |= cpu_to_be32(task_tag);
5752
5753 memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
Kiwoong Kimd2877be2016-11-10 21:16:15 +09005754 ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5755
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305756 /* send command to the controller */
5757 __set_bit(free_slot, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02005758
5759 /* Make sure descriptors are ready before ringing the task doorbell */
5760 wmb();
5761
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305762 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07005763 /* Make sure that doorbell is committed immediately */
5764 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305765
5766 spin_unlock_irqrestore(host->host_lock, flags);
5767
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005768 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");
5769
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305770 /* wait until the task management command is completed */
Bart Van Assche69a6c262019-12-09 10:13:09 -08005771 err = wait_for_completion_io_timeout(&wait,
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305772 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305773 if (!err) {
Bart Van Assche69a6c262019-12-09 10:13:09 -08005774 /*
5775 * Make sure that ufshcd_compl_tm() does not trigger a
5776 * use-after-free.
5777 */
5778 req->end_io_data = NULL;
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005779 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305780 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5781 __func__, tm_function);
5782 if (ufshcd_clear_tm_cmd(hba, free_slot))
5783 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5784 __func__, free_slot);
5785 err = -ETIMEDOUT;
5786 } else {
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005787 err = 0;
5788 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));
5789
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005790 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305791 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305792
Stanley Chub5572172019-08-19 21:43:28 +08005793 spin_lock_irqsave(hba->host->host_lock, flags);
5794 __clear_bit(free_slot, &hba->outstanding_tasks);
5795 spin_unlock_irqrestore(hba->host->host_lock, flags);
5796
Bart Van Assche69a6c262019-12-09 10:13:09 -08005797 blk_put_request(req);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305798
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005799 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305800 return err;
5801}
5802
5803/**
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005804 * ufshcd_issue_tm_cmd - issues task management commands to controller
5805 * @hba: per adapter instance
5806 * @lun_id: LUN ID to which TM command is sent
5807 * @task_id: task ID to which the TM command is applicable
5808 * @tm_function: task management function opcode
5809 * @tm_response: task management service response return value
5810 *
5811 * Returns non-zero value on error, zero on success.
5812 */
5813static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5814 u8 tm_function, u8 *tm_response)
5815{
5816 struct utp_task_req_desc treq = { { 0 }, };
5817 int ocs_value, err;
5818
5819 /* Configure task request descriptor */
5820 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5821 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5822
5823 /* Configure task request UPIU */
5824 treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
5825 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
5826 treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);
5827
5828 /*
5829 * The host shall provide the same value for LUN field in the basic
5830 * header and for Input Parameter.
5831 */
5832 treq.input_param1 = cpu_to_be32(lun_id);
5833 treq.input_param2 = cpu_to_be32(task_id);
5834
5835 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
5836 if (err == -ETIMEDOUT)
5837 return err;
5838
5839 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5840 if (ocs_value != OCS_SUCCESS)
5841 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
5842 __func__, ocs_value);
5843 else if (tm_response)
5844 *tm_response = be32_to_cpu(treq.output_param1) &
5845 MASK_TM_SERVICE_RESP;
5846 return err;
5847}
5848
5849/**
Avri Altman5e0a86e2018-10-07 17:30:37 +03005850 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
5851 * @hba: per-adapter instance
5852 * @req_upiu: upiu request
5853 * @rsp_upiu: upiu reply
Avri Altman5e0a86e2018-10-07 17:30:37 +03005854 * @desc_buff: pointer to descriptor buffer, NULL if NA
5855 * @buff_len: descriptor size, 0 if NA
Bart Van Assched0e97602019-10-29 16:07:08 -07005856 * @cmd_type: specifies the type (NOP, Query...)
Avri Altman5e0a86e2018-10-07 17:30:37 +03005857 * @desc_op: descriptor operation
5858 *
5859 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
5860 * Therefore, it "rides" the device management infrastructure: uses its tag and
5861 * tasks work queues.
5862 *
5863 * Since there is only one available tag for device management commands,
5864 * the caller is expected to hold the hba->dev_cmd.lock mutex.
5865 */
5866static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
5867 struct utp_upiu_req *req_upiu,
5868 struct utp_upiu_req *rsp_upiu,
5869 u8 *desc_buff, int *buff_len,
Bart Van Assche7f674c32019-10-29 16:07:09 -07005870 enum dev_cmd_type cmd_type,
Avri Altman5e0a86e2018-10-07 17:30:37 +03005871 enum query_opcode desc_op)
5872{
Bart Van Assche7252a362019-12-09 10:13:08 -08005873 struct request_queue *q = hba->cmd_queue;
5874 struct request *req;
Avri Altman5e0a86e2018-10-07 17:30:37 +03005875 struct ufshcd_lrb *lrbp;
5876 int err = 0;
5877 int tag;
5878 struct completion wait;
5879 unsigned long flags;
5880 u32 upiu_flags;
5881
5882 down_read(&hba->clk_scaling_lock);
5883
Bart Van Assche7252a362019-12-09 10:13:08 -08005884 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03005885 if (IS_ERR(req)) {
5886 err = PTR_ERR(req);
5887 goto out_unlock;
5888 }
Bart Van Assche7252a362019-12-09 10:13:08 -08005889 tag = req->tag;
5890 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
Avri Altman5e0a86e2018-10-07 17:30:37 +03005891
5892 init_completion(&wait);
5893 lrbp = &hba->lrb[tag];
5894 WARN_ON(lrbp->cmd);
5895
5896 lrbp->cmd = NULL;
5897 lrbp->sense_bufflen = 0;
5898 lrbp->sense_buffer = NULL;
5899 lrbp->task_tag = tag;
5900 lrbp->lun = 0;
5901 lrbp->intr_cmd = true;
5902 hba->dev_cmd.type = cmd_type;
5903
5904 switch (hba->ufs_version) {
5905 case UFSHCI_VERSION_10:
5906 case UFSHCI_VERSION_11:
5907 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
5908 break;
5909 default:
5910 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
5911 break;
5912 }
5913
5914 /* update the task tag in the request upiu */
5915 req_upiu->header.dword_0 |= cpu_to_be32(tag);
5916
5917 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
5918
5919 /* just copy the upiu request as it is */
5920 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
5921 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
5922 /* The Data Segment Area is optional depending upon the query
5923 * function value. for WRITE DESCRIPTOR, the data segment
5924 * follows right after the tsf.
5925 */
5926 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
5927 *buff_len = 0;
5928 }
5929
5930 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
5931
5932 hba->dev_cmd.complete = &wait;
5933
5934 /* Make sure descriptors are ready before ringing the doorbell */
5935 wmb();
5936 spin_lock_irqsave(hba->host->host_lock, flags);
5937 ufshcd_send_command(hba, tag);
5938 spin_unlock_irqrestore(hba->host->host_lock, flags);
5939
5940 /*
5941 * ignore the returning value here - ufshcd_check_query_response is
5942 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
5943 * read the response directly ignoring all errors.
5944 */
5945 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
5946
5947 /* just copy the upiu response as it is */
5948 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
Avri Altman4bbbe242019-02-20 09:11:13 +02005949 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
5950 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
5951 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
5952 MASK_QUERY_DATA_SEG_LEN;
5953
5954 if (*buff_len >= resp_len) {
5955 memcpy(desc_buff, descp, resp_len);
5956 *buff_len = resp_len;
5957 } else {
Bean Huo3d4881d2019-11-12 23:34:35 +01005958 dev_warn(hba->dev,
5959 "%s: rsp size %d is bigger than buffer size %d",
5960 __func__, resp_len, *buff_len);
Avri Altman4bbbe242019-02-20 09:11:13 +02005961 *buff_len = 0;
5962 err = -EINVAL;
5963 }
5964 }
Avri Altman5e0a86e2018-10-07 17:30:37 +03005965
Bart Van Assche7252a362019-12-09 10:13:08 -08005966 blk_put_request(req);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03005967out_unlock:
Avri Altman5e0a86e2018-10-07 17:30:37 +03005968 up_read(&hba->clk_scaling_lock);
5969 return err;
5970}
5971
5972/**
5973 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
5974 * @hba: per-adapter instance
5975 * @req_upiu: upiu request
5976 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
5977 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
5978 * @desc_buff: pointer to descriptor buffer, NULL if NA
5979 * @buff_len: descriptor size, 0 if NA
5980 * @desc_op: descriptor operation
5981 *
5982 * Supports UTP Transfer requests (nop and query), and UTP Task
5983 * Management requests.
5984 * It is up to the caller to fill the upiu conent properly, as it will
5985 * be copied without any further input validations.
5986 */
5987int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
5988 struct utp_upiu_req *req_upiu,
5989 struct utp_upiu_req *rsp_upiu,
5990 int msgcode,
5991 u8 *desc_buff, int *buff_len,
5992 enum query_opcode desc_op)
5993{
5994 int err;
Bart Van Assche7f674c32019-10-29 16:07:09 -07005995 enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
Avri Altman5e0a86e2018-10-07 17:30:37 +03005996 struct utp_task_req_desc treq = { { 0 }, };
5997 int ocs_value;
5998 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
5999
Avri Altman5e0a86e2018-10-07 17:30:37 +03006000 switch (msgcode) {
6001 case UPIU_TRANSACTION_NOP_OUT:
6002 cmd_type = DEV_CMD_TYPE_NOP;
6003 /* fall through */
6004 case UPIU_TRANSACTION_QUERY_REQ:
6005 ufshcd_hold(hba, false);
6006 mutex_lock(&hba->dev_cmd.lock);
6007 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
6008 desc_buff, buff_len,
6009 cmd_type, desc_op);
6010 mutex_unlock(&hba->dev_cmd.lock);
6011 ufshcd_release(hba);
6012
6013 break;
6014 case UPIU_TRANSACTION_TASK_REQ:
6015 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6016 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6017
6018 memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));
6019
6020 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
6021 if (err == -ETIMEDOUT)
6022 break;
6023
6024 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6025 if (ocs_value != OCS_SUCCESS) {
6026 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
6027 ocs_value);
6028 break;
6029 }
6030
6031 memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));
6032
6033 break;
6034 default:
6035 err = -EINVAL;
6036
6037 break;
6038 }
6039
Avri Altman5e0a86e2018-10-07 17:30:37 +03006040 return err;
6041}
6042
6043/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306044 * ufshcd_eh_device_reset_handler - device reset handler registered to
6045 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306046 * @cmd: SCSI command pointer
6047 *
6048 * Returns SUCCESS/FAILED
6049 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306050static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306051{
6052 struct Scsi_Host *host;
6053 struct ufs_hba *hba;
6054 unsigned int tag;
6055 u32 pos;
6056 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306057 u8 resp = 0xF;
6058 struct ufshcd_lrb *lrbp;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306059 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306060
6061 host = cmd->device->host;
6062 hba = shost_priv(host);
6063 tag = cmd->request->tag;
6064
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306065 lrbp = &hba->lrb[tag];
6066 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
6067 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306068 if (!err)
6069 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306070 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306071 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306072
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306073 /* clear the commands that were pending for corresponding LUN */
6074 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6075 if (hba->lrb[pos].lun == lrbp->lun) {
6076 err = ufshcd_clear_cmd(hba, pos);
6077 if (err)
6078 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306079 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306080 }
6081 spin_lock_irqsave(host->host_lock, flags);
6082 ufshcd_transfer_req_compl(hba);
6083 spin_unlock_irqrestore(host->host_lock, flags);
Gilad Broner7fabb772017-02-03 16:56:50 -08006084
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306085out:
Gilad Broner7fabb772017-02-03 16:56:50 -08006086 hba->req_abort_count = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08006087 ufshcd_update_reg_hist(&hba->ufs_stats.dev_reset, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306088 if (!err) {
6089 err = SUCCESS;
6090 } else {
6091 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6092 err = FAILED;
6093 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306094 return err;
6095}
6096
Gilad Bronere0b299e2017-02-03 16:56:40 -08006097static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6098{
6099 struct ufshcd_lrb *lrbp;
6100 int tag;
6101
6102 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6103 lrbp = &hba->lrb[tag];
6104 lrbp->req_abort_skip = true;
6105 }
6106}
6107
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306108/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306109 * ufshcd_abort - abort a specific command
6110 * @cmd: SCSI command pointer
6111 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306112 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6113 * command, and in host controller by clearing the door-bell register. There can
6114 * be race between controller sending the command to the device while abort is
6115 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6116 * really issued and then try to abort it.
6117 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306118 * Returns SUCCESS/FAILED
6119 */
6120static int ufshcd_abort(struct scsi_cmnd *cmd)
6121{
6122 struct Scsi_Host *host;
6123 struct ufs_hba *hba;
6124 unsigned long flags;
6125 unsigned int tag;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306126 int err = 0;
6127 int poll_cnt;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306128 u8 resp = 0xF;
6129 struct ufshcd_lrb *lrbp;
Dolev Ravive9d501b2014-07-01 12:22:37 +03006130 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306131
6132 host = cmd->device->host;
6133 hba = shost_priv(host);
6134 tag = cmd->request->tag;
Dolev Ravive7d38252016-12-22 18:40:07 -08006135 lrbp = &hba->lrb[tag];
Yaniv Gardi14497322016-02-01 15:02:39 +02006136 if (!ufshcd_valid_tag(hba, tag)) {
6137 dev_err(hba->dev,
6138 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
6139 __func__, tag, cmd, cmd->request);
6140 BUG();
6141 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306142
Dolev Ravive7d38252016-12-22 18:40:07 -08006143 /*
6144 * Task abort to the device W-LUN is illegal. When this command
6145 * will fail, due to spec violation, scsi err handling next step
6146 * will be to send LU reset which, again, is a spec violation.
6147 * To avoid these unnecessary/illegal step we skip to the last error
6148 * handling stage: reset and restore.
6149 */
6150 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
6151 return ufshcd_eh_host_reset_handler(cmd);
6152
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006153 ufshcd_hold(hba, false);
Dolev Ravive9d501b2014-07-01 12:22:37 +03006154 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Yaniv Gardi14497322016-02-01 15:02:39 +02006155 /* If command is already aborted/completed, return SUCCESS */
6156 if (!(test_bit(tag, &hba->outstanding_reqs))) {
6157 dev_err(hba->dev,
6158 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
6159 __func__, tag, hba->outstanding_reqs, reg);
6160 goto out;
6161 }
6162
Dolev Ravive9d501b2014-07-01 12:22:37 +03006163 if (!(reg & (1 << tag))) {
6164 dev_err(hba->dev,
6165 "%s: cmd was completed, but without a notifying intr, tag = %d",
6166 __func__, tag);
6167 }
6168
Dolev Raviv66cc8202016-12-22 18:39:42 -08006169 /* Print Transfer Request of aborted task */
6170 dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
Dolev Raviv66cc8202016-12-22 18:39:42 -08006171
Gilad Broner7fabb772017-02-03 16:56:50 -08006172 /*
6173 * Print detailed info about aborted request.
6174 * As more than one request might get aborted at the same time,
6175 * print full information only for the first aborted request in order
6176 * to reduce repeated printouts. For other aborted requests only print
6177 * basic details.
6178 */
6179 scsi_print_command(hba->lrb[tag].cmd);
6180 if (!hba->req_abort_count) {
Stanley Chu8808b4e2019-07-10 21:38:21 +08006181 ufshcd_update_reg_hist(&hba->ufs_stats.task_abort, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08006182 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08006183 ufshcd_print_host_state(hba);
Gilad Broner7fabb772017-02-03 16:56:50 -08006184 ufshcd_print_pwr_info(hba);
6185 ufshcd_print_trs(hba, 1 << tag, true);
6186 } else {
6187 ufshcd_print_trs(hba, 1 << tag, false);
6188 }
6189 hba->req_abort_count++;
Gilad Bronere0b299e2017-02-03 16:56:40 -08006190
6191 /* Skip task abort in case previous aborts failed and report failure */
6192 if (lrbp->req_abort_skip) {
6193 err = -EIO;
6194 goto out;
6195 }
6196
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306197 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6198 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6199 UFS_QUERY_TASK, &resp);
6200 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6201 /* cmd pending in the device */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006202 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6203 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306204 break;
6205 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306206 /*
6207 * cmd not pending in the device, check if it is
6208 * in transition.
6209 */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006210 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6211 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306212 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6213 if (reg & (1 << tag)) {
6214 /* sleep for max. 200us to stabilize */
6215 usleep_range(100, 200);
6216 continue;
6217 }
6218 /* command completed already */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006219 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6220 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306221 goto out;
6222 } else {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006223 dev_err(hba->dev,
6224 "%s: no response from device. tag = %d, err %d\n",
6225 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306226 if (!err)
6227 err = resp; /* service response error */
6228 goto out;
6229 }
6230 }
6231
6232 if (!poll_cnt) {
6233 err = -EBUSY;
6234 goto out;
6235 }
6236
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306237 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6238 UFS_ABORT_TASK, &resp);
6239 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006240 if (!err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306241 err = resp; /* service response error */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006242 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6243 __func__, tag, err);
6244 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306245 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306246 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306247
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306248 err = ufshcd_clear_cmd(hba, tag);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006249 if (err) {
6250 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6251 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306252 goto out;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006253 }
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306254
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306255 scsi_dma_unmap(cmd);
6256
6257 spin_lock_irqsave(host->host_lock, flags);
Yaniv Gardia48353f2016-02-01 15:02:40 +02006258 ufshcd_outstanding_req_clear(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306259 hba->lrb[tag].cmd = NULL;
6260 spin_unlock_irqrestore(host->host_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306261
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306262out:
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306263 if (!err) {
6264 err = SUCCESS;
6265 } else {
6266 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Gilad Bronere0b299e2017-02-03 16:56:40 -08006267 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306268 err = FAILED;
6269 }
6270
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006271 /*
6272 * This ufshcd_release() corresponds to the original scsi cmd that got
6273 * aborted here (as we won't get any IRQ for it).
6274 */
6275 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306276 return err;
6277}
6278
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306279/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306280 * ufshcd_host_reset_and_restore - reset and restore host controller
6281 * @hba: per-adapter instance
6282 *
6283 * Note that host controller reset may issue DME_RESET to
6284 * local and remote (device) Uni-Pro stack and the attributes
6285 * are reset to default state.
6286 *
6287 * Returns zero on success, non-zero on failure
6288 */
6289static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6290{
6291 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306292 unsigned long flags;
6293
Can Guo2df74b62019-11-25 22:53:33 -08006294 /*
6295 * Stop the host controller and complete the requests
6296 * cleared by h/w
6297 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306298 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02006299 ufshcd_hba_stop(hba, false);
Can Guo2df74b62019-11-25 22:53:33 -08006300 hba->silence_err_logs = true;
6301 ufshcd_complete_requests(hba);
6302 hba->silence_err_logs = false;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306303 spin_unlock_irqrestore(hba->host->host_lock, flags);
6304
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08006305 /* scale up clocks to max frequency before full reinitialization */
6306 ufshcd_scale_clks(hba, true);
6307
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306308 err = ufshcd_hba_enable(hba);
6309 if (err)
6310 goto out;
6311
6312 /* Establish the link again and restore the device */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006313 err = ufshcd_probe_hba(hba);
6314
6315 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306316 err = -EIO;
6317out:
6318 if (err)
6319 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
Stanley Chu8808b4e2019-07-10 21:38:21 +08006320 ufshcd_update_reg_hist(&hba->ufs_stats.host_reset, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306321 return err;
6322}
6323
6324/**
6325 * ufshcd_reset_and_restore - reset and re-initialize host/device
6326 * @hba: per-adapter instance
6327 *
6328 * Reset and recover device, host and re-establish link. This
6329 * is helpful to recover the communication in fatal error conditions.
6330 *
6331 * Returns zero on success, non-zero on failure
6332 */
6333static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6334{
6335 int err = 0;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006336 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306337
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006338 do {
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07006339 /* Reset the attached device */
6340 ufshcd_vops_device_reset(hba);
6341
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006342 err = ufshcd_host_reset_and_restore(hba);
6343 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306344
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306345 return err;
6346}
6347
6348/**
6349 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006350 * @cmd: SCSI command pointer
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306351 *
6352 * Returns SUCCESS/FAILED
6353 */
6354static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6355{
6356 int err;
6357 unsigned long flags;
6358 struct ufs_hba *hba;
6359
6360 hba = shost_priv(cmd->device->host);
6361
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006362 ufshcd_hold(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306363 /*
6364 * Check if there is any race with fatal error handling.
6365 * If so, wait for it to complete. Even though fatal error
6366 * handling does reset and restore in some cases, don't assume
6367 * anything out of it. We are just avoiding race here.
6368 */
6369 do {
6370 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306371 if (!(work_pending(&hba->eh_work) ||
Zang Leigang8dc0da72017-06-24 19:14:32 +08006372 hba->ufshcd_state == UFSHCD_STATE_RESET ||
6373 hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306374 break;
6375 spin_unlock_irqrestore(hba->host->host_lock, flags);
6376 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306377 flush_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306378 } while (1);
6379
6380 hba->ufshcd_state = UFSHCD_STATE_RESET;
6381 ufshcd_set_eh_in_progress(hba);
6382 spin_unlock_irqrestore(hba->host->host_lock, flags);
6383
6384 err = ufshcd_reset_and_restore(hba);
6385
6386 spin_lock_irqsave(hba->host->host_lock, flags);
6387 if (!err) {
6388 err = SUCCESS;
6389 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6390 } else {
6391 err = FAILED;
6392 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6393 }
6394 ufshcd_clear_eh_in_progress(hba);
6395 spin_unlock_irqrestore(hba->host->host_lock, flags);
6396
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006397 ufshcd_release(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306398 return err;
6399}
6400
6401/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006402 * ufshcd_get_max_icc_level - calculate the ICC level
6403 * @sup_curr_uA: max. current supported by the regulator
6404 * @start_scan: row at the desc table to start scan from
6405 * @buff: power descriptor buffer
6406 *
6407 * Returns calculated max ICC level for specific regulator
6408 */
6409static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6410{
6411 int i;
6412 int curr_uA;
6413 u16 data;
6414 u16 unit;
6415
6416 for (i = start_scan; i >= 0; i--) {
Tomas Winklerd79713f2017-01-05 10:45:11 +02006417 data = be16_to_cpup((__be16 *)&buff[2 * i]);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006418 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6419 ATTR_ICC_LVL_UNIT_OFFSET;
6420 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6421 switch (unit) {
6422 case UFSHCD_NANO_AMP:
6423 curr_uA = curr_uA / 1000;
6424 break;
6425 case UFSHCD_MILI_AMP:
6426 curr_uA = curr_uA * 1000;
6427 break;
6428 case UFSHCD_AMP:
6429 curr_uA = curr_uA * 1000 * 1000;
6430 break;
6431 case UFSHCD_MICRO_AMP:
6432 default:
6433 break;
6434 }
6435 if (sup_curr_uA >= curr_uA)
6436 break;
6437 }
6438 if (i < 0) {
6439 i = 0;
6440 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6441 }
6442
6443 return (u32)i;
6444}
6445
6446/**
6447 * ufshcd_calc_icc_level - calculate the max ICC level
6448 * In case regulators are not initialized we'll return 0
6449 * @hba: per-adapter instance
6450 * @desc_buf: power descriptor buffer to extract ICC levels from.
6451 * @len: length of desc_buff
6452 *
6453 * Returns calculated ICC level
6454 */
6455static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6456 u8 *desc_buf, int len)
6457{
6458 u32 icc_level = 0;
6459
6460 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6461 !hba->vreg_info.vccq2) {
6462 dev_err(hba->dev,
6463 "%s: Regulator capability was not set, actvIccLevel=%d",
6464 __func__, icc_level);
6465 goto out;
6466 }
6467
Stanley Chu0487fff2019-03-28 17:16:25 +08006468 if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006469 icc_level = ufshcd_get_max_icc_level(
6470 hba->vreg_info.vcc->max_uA,
6471 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6472 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6473
Stanley Chu0487fff2019-03-28 17:16:25 +08006474 if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006475 icc_level = ufshcd_get_max_icc_level(
6476 hba->vreg_info.vccq->max_uA,
6477 icc_level,
6478 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6479
Stanley Chu0487fff2019-03-28 17:16:25 +08006480 if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006481 icc_level = ufshcd_get_max_icc_level(
6482 hba->vreg_info.vccq2->max_uA,
6483 icc_level,
6484 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6485out:
6486 return icc_level;
6487}
6488
6489static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6490{
6491 int ret;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006492 int buff_len = hba->desc_size.pwr_desc;
Kees Cookbbe21d72018-05-02 16:58:09 -07006493 u8 *desc_buf;
6494
6495 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6496 if (!desc_buf)
6497 return;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006498
6499 ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6500 if (ret) {
6501 dev_err(hba->dev,
6502 "%s: Failed reading power descriptor.len = %d ret = %d",
6503 __func__, buff_len, ret);
Kees Cookbbe21d72018-05-02 16:58:09 -07006504 goto out;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006505 }
6506
6507 hba->init_prefetch_data.icc_level =
6508 ufshcd_find_max_sup_active_icc_level(hba,
6509 desc_buf, buff_len);
6510 dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6511 __func__, hba->init_prefetch_data.icc_level);
6512
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02006513 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6514 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6515 &hba->init_prefetch_data.icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006516
6517 if (ret)
6518 dev_err(hba->dev,
6519 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6520 __func__, hba->init_prefetch_data.icc_level , ret);
6521
Kees Cookbbe21d72018-05-02 16:58:09 -07006522out:
6523 kfree(desc_buf);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006524}
6525
6526/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006527 * ufshcd_scsi_add_wlus - Adds required W-LUs
6528 * @hba: per-adapter instance
6529 *
6530 * UFS device specification requires the UFS devices to support 4 well known
6531 * logical units:
6532 * "REPORT_LUNS" (address: 01h)
6533 * "UFS Device" (address: 50h)
6534 * "RPMB" (address: 44h)
6535 * "BOOT" (address: 30h)
6536 * UFS device's power management needs to be controlled by "POWER CONDITION"
6537 * field of SSU (START STOP UNIT) command. But this "power condition" field
6538 * will take effect only when its sent to "UFS device" well known logical unit
6539 * hence we require the scsi_device instance to represent this logical unit in
6540 * order for the UFS host driver to send the SSU command for power management.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006541 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006542 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6543 * Block) LU so user space process can control this LU. User space may also
6544 * want to have access to BOOT LU.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006545 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006546 * This function adds scsi device instances for each of all well known LUs
6547 * (except "REPORT LUNS" LU).
6548 *
6549 * Returns zero on success (all required W-LUs are added successfully),
6550 * non-zero error value on failure (if failed to add any of the required W-LU).
6551 */
6552static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6553{
6554 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006555 struct scsi_device *sdev_rpmb;
6556 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006557
6558 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6559 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6560 if (IS_ERR(hba->sdev_ufs_device)) {
6561 ret = PTR_ERR(hba->sdev_ufs_device);
6562 hba->sdev_ufs_device = NULL;
6563 goto out;
6564 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006565 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006566
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006567 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006568 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006569 if (IS_ERR(sdev_rpmb)) {
6570 ret = PTR_ERR(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006571 goto remove_sdev_ufs_device;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006572 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006573 scsi_device_put(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006574
6575 sdev_boot = __scsi_add_device(hba->host, 0, 0,
6576 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6577 if (IS_ERR(sdev_boot))
6578 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6579 else
6580 scsi_device_put(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006581 goto out;
6582
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006583remove_sdev_ufs_device:
6584 scsi_remove_device(hba->sdev_ufs_device);
6585out:
6586 return ret;
6587}
6588
Bean Huo09750062020-01-20 14:08:14 +01006589static int ufs_get_device_desc(struct ufs_hba *hba)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006590{
6591 int err;
Kees Cookbbe21d72018-05-02 16:58:09 -07006592 size_t buff_len;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006593 u8 model_index;
Kees Cookbbe21d72018-05-02 16:58:09 -07006594 u8 *desc_buf;
Bean Huo09750062020-01-20 14:08:14 +01006595 struct ufs_dev_info *dev_info = &hba->dev_info;
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006596
Kees Cookbbe21d72018-05-02 16:58:09 -07006597 buff_len = max_t(size_t, hba->desc_size.dev_desc,
6598 QUERY_DESC_MAX_SIZE + 1);
6599 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6600 if (!desc_buf) {
6601 err = -ENOMEM;
6602 goto out;
6603 }
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006604
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006605 err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006606 if (err) {
6607 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6608 __func__, err);
6609 goto out;
6610 }
6611
6612 /*
6613 * getting vendor (manufacturerID) and Bank Index in big endian
6614 * format
6615 */
Bean Huo09750062020-01-20 14:08:14 +01006616 dev_info->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006617 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6618
6619 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006620 err = ufshcd_read_string_desc(hba, model_index,
Bean Huo09750062020-01-20 14:08:14 +01006621 &dev_info->model, SD_ASCII_STD);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006622 if (err < 0) {
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006623 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6624 __func__, err);
6625 goto out;
6626 }
6627
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006628 /*
6629 * ufshcd_read_string_desc returns size of the string
6630 * reset the error value
6631 */
6632 err = 0;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006633
6634out:
Kees Cookbbe21d72018-05-02 16:58:09 -07006635 kfree(desc_buf);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006636 return err;
6637}
6638
Bean Huo09750062020-01-20 14:08:14 +01006639static void ufs_put_device_desc(struct ufs_hba *hba)
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006640{
Bean Huo09750062020-01-20 14:08:14 +01006641 struct ufs_dev_info *dev_info = &hba->dev_info;
6642
6643 kfree(dev_info->model);
6644 dev_info->model = NULL;
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006645}
6646
Bean Huo09750062020-01-20 14:08:14 +01006647static void ufs_fixup_device_setup(struct ufs_hba *hba)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006648{
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006649 struct ufs_dev_fix *f;
Bean Huo09750062020-01-20 14:08:14 +01006650 struct ufs_dev_info *dev_info = &hba->dev_info;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006651
6652 for (f = ufs_fixups; f->quirk; f++) {
Bean Huo09750062020-01-20 14:08:14 +01006653 if ((f->wmanufacturerid == dev_info->wmanufacturerid ||
6654 f->wmanufacturerid == UFS_ANY_VENDOR) &&
6655 ((dev_info->model &&
6656 STR_PRFX_EQUAL(f->model, dev_info->model)) ||
6657 !strcmp(f->model, UFS_ANY_MODEL)))
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006658 hba->dev_quirks |= f->quirk;
6659 }
6660}
6661
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006662/**
Yaniv Gardi37113102016-03-10 17:37:16 +02006663 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6664 * @hba: per-adapter instance
6665 *
6666 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6667 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6668 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6669 * the hibern8 exit latency.
6670 *
6671 * Returns zero on success, non-zero error value on failure.
6672 */
6673static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6674{
6675 int ret = 0;
6676 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6677
6678 ret = ufshcd_dme_peer_get(hba,
6679 UIC_ARG_MIB_SEL(
6680 RX_MIN_ACTIVATETIME_CAPABILITY,
6681 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6682 &peer_rx_min_activatetime);
6683 if (ret)
6684 goto out;
6685
6686 /* make sure proper unit conversion is applied */
6687 tuned_pa_tactivate =
6688 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6689 / PA_TACTIVATE_TIME_UNIT_US);
6690 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6691 tuned_pa_tactivate);
6692
6693out:
6694 return ret;
6695}
6696
6697/**
6698 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6699 * @hba: per-adapter instance
6700 *
6701 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6702 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6703 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6704 * This optimal value can help reduce the hibern8 exit latency.
6705 *
6706 * Returns zero on success, non-zero error value on failure.
6707 */
6708static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6709{
6710 int ret = 0;
6711 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6712 u32 max_hibern8_time, tuned_pa_hibern8time;
6713
6714 ret = ufshcd_dme_get(hba,
6715 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6716 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6717 &local_tx_hibern8_time_cap);
6718 if (ret)
6719 goto out;
6720
6721 ret = ufshcd_dme_peer_get(hba,
6722 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6723 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6724 &peer_rx_hibern8_time_cap);
6725 if (ret)
6726 goto out;
6727
6728 max_hibern8_time = max(local_tx_hibern8_time_cap,
6729 peer_rx_hibern8_time_cap);
6730 /* make sure proper unit conversion is applied */
6731 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6732 / PA_HIBERN8_TIME_UNIT_US);
6733 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6734 tuned_pa_hibern8time);
6735out:
6736 return ret;
6737}
6738
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006739/**
6740 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6741 * less than device PA_TACTIVATE time.
6742 * @hba: per-adapter instance
6743 *
6744 * Some UFS devices require host PA_TACTIVATE to be lower than device
6745 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6746 * for such devices.
6747 *
6748 * Returns zero on success, non-zero error value on failure.
6749 */
6750static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6751{
6752 int ret = 0;
6753 u32 granularity, peer_granularity;
6754 u32 pa_tactivate, peer_pa_tactivate;
6755 u32 pa_tactivate_us, peer_pa_tactivate_us;
6756 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6757
6758 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6759 &granularity);
6760 if (ret)
6761 goto out;
6762
6763 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6764 &peer_granularity);
6765 if (ret)
6766 goto out;
6767
6768 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6769 (granularity > PA_GRANULARITY_MAX_VAL)) {
6770 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6771 __func__, granularity);
6772 return -EINVAL;
6773 }
6774
6775 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6776 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6777 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6778 __func__, peer_granularity);
6779 return -EINVAL;
6780 }
6781
6782 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6783 if (ret)
6784 goto out;
6785
6786 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6787 &peer_pa_tactivate);
6788 if (ret)
6789 goto out;
6790
6791 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6792 peer_pa_tactivate_us = peer_pa_tactivate *
6793 gran_to_us_table[peer_granularity - 1];
6794
6795 if (pa_tactivate_us > peer_pa_tactivate_us) {
6796 u32 new_peer_pa_tactivate;
6797
6798 new_peer_pa_tactivate = pa_tactivate_us /
6799 gran_to_us_table[peer_granularity - 1];
6800 new_peer_pa_tactivate++;
6801 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6802 new_peer_pa_tactivate);
6803 }
6804
6805out:
6806 return ret;
6807}
6808
Bean Huo09750062020-01-20 14:08:14 +01006809static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
Yaniv Gardi37113102016-03-10 17:37:16 +02006810{
6811 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6812 ufshcd_tune_pa_tactivate(hba);
6813 ufshcd_tune_pa_hibern8time(hba);
6814 }
6815
6816 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6817 /* set 1ms timeout for PA_TACTIVATE */
6818 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006819
6820 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6821 ufshcd_quirk_tune_host_pa_tactivate(hba);
Subhash Jadavani56d4a182016-12-05 19:25:32 -08006822
Bean Huo09750062020-01-20 14:08:14 +01006823 ufshcd_vops_apply_dev_quirks(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02006824}
6825
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006826static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6827{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006828 hba->ufs_stats.hibern8_exit_cnt = 0;
6829 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08006830 hba->req_abort_count = 0;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006831}
6832
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006833static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6834{
6835 int err;
6836
6837 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6838 &hba->desc_size.dev_desc);
6839 if (err)
6840 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6841
6842 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6843 &hba->desc_size.pwr_desc);
6844 if (err)
6845 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6846
6847 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6848 &hba->desc_size.interc_desc);
6849 if (err)
6850 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6851
6852 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6853 &hba->desc_size.conf_desc);
6854 if (err)
6855 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6856
6857 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6858 &hba->desc_size.unit_desc);
6859 if (err)
6860 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6861
6862 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6863 &hba->desc_size.geom_desc);
6864 if (err)
6865 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
Bean Huo059efd82019-10-29 14:22:45 +00006866
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02006867 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
6868 &hba->desc_size.hlth_desc);
6869 if (err)
6870 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006871}
6872
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05306873static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
6874 {19200000, REF_CLK_FREQ_19_2_MHZ},
6875 {26000000, REF_CLK_FREQ_26_MHZ},
6876 {38400000, REF_CLK_FREQ_38_4_MHZ},
6877 {52000000, REF_CLK_FREQ_52_MHZ},
6878 {0, REF_CLK_FREQ_INVAL},
6879};
6880
6881static enum ufs_ref_clk_freq
6882ufs_get_bref_clk_from_hz(unsigned long freq)
6883{
6884 int i;
6885
6886 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
6887 if (ufs_ref_clk_freqs[i].freq_hz == freq)
6888 return ufs_ref_clk_freqs[i].val;
6889
6890 return REF_CLK_FREQ_INVAL;
6891}
6892
6893void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
6894{
6895 unsigned long freq;
6896
6897 freq = clk_get_rate(refclk);
6898
6899 hba->dev_ref_clk_freq =
6900 ufs_get_bref_clk_from_hz(freq);
6901
6902 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
6903 dev_err(hba->dev,
6904 "invalid ref_clk setting = %ld\n", freq);
6905}
6906
6907static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
6908{
6909 int err;
6910 u32 ref_clk;
6911 u32 freq = hba->dev_ref_clk_freq;
6912
6913 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
6914 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
6915
6916 if (err) {
6917 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
6918 err);
6919 goto out;
6920 }
6921
6922 if (ref_clk == freq)
6923 goto out; /* nothing to update */
6924
6925 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6926 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
6927
6928 if (err) {
6929 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
6930 ufs_ref_clk_freqs[freq].freq_hz);
6931 goto out;
6932 }
6933
6934 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
6935 ufs_ref_clk_freqs[freq].freq_hz);
6936
6937out:
6938 return err;
6939}
6940
Yaniv Gardi37113102016-03-10 17:37:16 +02006941/**
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006942 * ufshcd_probe_hba - probe hba to detect device and initialize
6943 * @hba: per-adapter instance
6944 *
6945 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306946 */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006947static int ufshcd_probe_hba(struct ufs_hba *hba)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306948{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306949 int ret;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006950 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306951
6952 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306953 if (ret)
6954 goto out;
6955
Yaniv Gardiafdfff52016-03-10 17:37:15 +02006956 /* set the default level for urgent bkops */
6957 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6958 hba->is_urgent_bkops_lvl_checked = false;
6959
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006960 /* Debug counters initialization */
6961 ufshcd_clear_dbg_ufs_stats(hba);
6962
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006963 /* UniPro link is active now */
6964 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05306965
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306966 ret = ufshcd_verify_dev_init(hba);
6967 if (ret)
6968 goto out;
6969
Dolev Raviv68078d52013-07-30 00:35:58 +05306970 ret = ufshcd_complete_dev_init(hba);
6971 if (ret)
6972 goto out;
6973
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006974 /* Init check for device descriptor sizes */
6975 ufshcd_init_desc_sizes(hba);
6976
Bean Huo09750062020-01-20 14:08:14 +01006977 ret = ufs_get_device_desc(hba);
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006978 if (ret) {
6979 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6980 __func__, ret);
6981 goto out;
6982 }
6983
Bean Huo09750062020-01-20 14:08:14 +01006984 ufs_fixup_device_setup(hba);
6985 ufshcd_tune_unipro_params(hba);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006986
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006987 /* UFS device is also active now */
6988 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306989 ufshcd_force_reset_auto_bkops(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006990 hba->wlun_dev_clr_ua = true;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306991
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006992 if (ufshcd_get_max_pwr_mode(hba)) {
6993 dev_err(hba->dev,
6994 "%s: Failed getting max supported power mode\n",
6995 __func__);
6996 } else {
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05306997 /*
6998 * Set the right value to bRefClkFreq before attempting to
6999 * switch to HS gears.
7000 */
7001 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
7002 ufshcd_set_dev_ref_clk(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007003 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Dov Levenglick8643ae62016-10-17 17:10:14 -07007004 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007005 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
7006 __func__, ret);
Dov Levenglick8643ae62016-10-17 17:10:14 -07007007 goto out;
7008 }
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007009 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007010
Yaniv Gardi53c12d02016-02-01 15:02:45 +02007011 /* set the state as operational after switching to desired gear */
7012 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00007013
Can Guo71d848b2019-11-14 22:09:26 -08007014 /* Enable Auto-Hibernate if configured */
7015 ufshcd_auto_hibern8_enable(hba);
7016
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007017 /*
7018 * If we are in error handling context or in power management callbacks
7019 * context, no need to scan the host
7020 */
7021 if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
7022 bool flag;
7023
7024 /* clear any previous UFS device information */
7025 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02007026 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
7027 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007028 hba->dev_info.f_power_on_wp_en = flag;
7029
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007030 if (!hba->is_init_prefetch)
7031 ufshcd_init_icc_levels(hba);
7032
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007033 /* Add required well known logical units to scsi mid layer */
Bean Huob9fc5322020-01-20 14:08:13 +01007034 ret = ufshcd_scsi_add_wlus(hba);
7035 if (ret)
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007036 goto out;
7037
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007038 /* Initialize devfreq after UFS device is detected */
7039 if (ufshcd_is_clkscaling_supported(hba)) {
7040 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7041 &hba->pwr_info,
7042 sizeof(struct ufs_pa_layer_attr));
7043 hba->clk_scaling.saved_pwr_info.is_valid = true;
7044 if (!hba->devfreq) {
Bjorn Anderssondeac4442018-05-17 23:26:36 -07007045 ret = ufshcd_devfreq_init(hba);
7046 if (ret)
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007047 goto out;
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007048 }
7049 hba->clk_scaling.is_allowed = true;
7050 }
7051
Avri Altmandf032bf2018-10-07 17:30:35 +03007052 ufs_bsg_probe(hba);
7053
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307054 scsi_scan_host(hba->host);
7055 pm_runtime_put_sync(hba->dev);
7056 }
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007057
7058 if (!hba->is_init_prefetch)
7059 hba->is_init_prefetch = true;
7060
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307061out:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007062 /*
7063 * If we failed to initialize the device or the device is not
7064 * present, turn off the power/clocks etc.
7065 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007066 if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
7067 pm_runtime_put_sync(hba->dev);
Vivek Gautameebcc192018-08-07 23:17:39 +05307068 ufshcd_exit_clk_scaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007069 ufshcd_hba_exit(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007070 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007071
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007072 trace_ufshcd_init(dev_name(hba->dev), ret,
7073 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007074 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007075 return ret;
7076}
7077
7078/**
7079 * ufshcd_async_scan - asynchronous execution for probing hba
7080 * @data: data pointer to pass to this function
7081 * @cookie: cookie data
7082 */
7083static void ufshcd_async_scan(void *data, async_cookie_t cookie)
7084{
7085 struct ufs_hba *hba = (struct ufs_hba *)data;
7086
7087 ufshcd_probe_hba(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307088}
7089
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007090static const struct attribute_group *ufshcd_driver_groups[] = {
7091 &ufs_sysfs_unit_descriptor_group,
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02007092 &ufs_sysfs_lun_attributes_group,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007093 NULL,
7094};
7095
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307096static struct scsi_host_template ufshcd_driver_template = {
7097 .module = THIS_MODULE,
7098 .name = UFSHCD,
7099 .proc_name = UFSHCD,
7100 .queuecommand = ufshcd_queuecommand,
7101 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09007102 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307103 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03007104 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307105 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307106 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
7107 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307108 .this_id = -1,
7109 .sg_tablesize = SG_ALL,
7110 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
7111 .can_queue = UFSHCD_CAN_QUEUE,
Christoph Hellwig552a9902019-06-17 14:19:55 +02007112 .max_segment_size = PRDT_DATA_BYTE_COUNT_MAX,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007113 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01007114 .track_queue_depth = 1,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007115 .sdev_groups = ufshcd_driver_groups,
Christoph Hellwig4af14d12018-12-13 16:17:09 +01007116 .dma_boundary = PAGE_SIZE - 1,
Stanley Chu49615ba2019-09-16 23:56:50 +08007117 .rpm_autosuspend_delay = RPM_AUTOSUSPEND_DELAY_MS,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307118};
7119
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007120static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
7121 int ua)
7122{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007123 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007124
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007125 if (!vreg)
7126 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007127
Stanley Chu0487fff2019-03-28 17:16:25 +08007128 /*
7129 * "set_load" operation shall be required on those regulators
7130 * which specifically configured current limitation. Otherwise
7131 * zero max_uA may cause unexpected behavior when regulator is
7132 * enabled or set as high power mode.
7133 */
7134 if (!vreg->max_uA)
7135 return 0;
7136
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007137 ret = regulator_set_load(vreg->reg, ua);
7138 if (ret < 0) {
7139 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
7140 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007141 }
7142
7143 return ret;
7144}
7145
7146static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7147 struct ufs_vreg *vreg)
7148{
Marc Gonzalez73067982019-02-27 11:41:45 +01007149 return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007150}
7151
7152static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7153 struct ufs_vreg *vreg)
7154{
Adrian Hunter7c7cfdc2019-08-14 15:59:50 +03007155 if (!vreg)
7156 return 0;
7157
Marc Gonzalez73067982019-02-27 11:41:45 +01007158 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007159}
7160
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007161static int ufshcd_config_vreg(struct device *dev,
7162 struct ufs_vreg *vreg, bool on)
7163{
7164 int ret = 0;
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007165 struct regulator *reg;
7166 const char *name;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007167 int min_uV, uA_load;
7168
7169 BUG_ON(!vreg);
7170
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007171 reg = vreg->reg;
7172 name = vreg->name;
7173
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007174 if (regulator_count_voltages(reg) > 0) {
Stanley Chu3b141e82019-03-28 17:16:24 +08007175 if (vreg->min_uV && vreg->max_uV) {
7176 min_uV = on ? vreg->min_uV : 0;
7177 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7178 if (ret) {
7179 dev_err(dev,
7180 "%s: %s set voltage failed, err=%d\n",
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007181 __func__, name, ret);
Stanley Chu3b141e82019-03-28 17:16:24 +08007182 goto out;
7183 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007184 }
7185
7186 uA_load = on ? vreg->max_uA : 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007187 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7188 if (ret)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007189 goto out;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007190 }
7191out:
7192 return ret;
7193}
7194
7195static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7196{
7197 int ret = 0;
7198
Marc Gonzalez73067982019-02-27 11:41:45 +01007199 if (!vreg || vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007200 goto out;
7201
7202 ret = ufshcd_config_vreg(dev, vreg, true);
7203 if (!ret)
7204 ret = regulator_enable(vreg->reg);
7205
7206 if (!ret)
7207 vreg->enabled = true;
7208 else
7209 dev_err(dev, "%s: %s enable failed, err=%d\n",
7210 __func__, vreg->name, ret);
7211out:
7212 return ret;
7213}
7214
7215static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7216{
7217 int ret = 0;
7218
Marc Gonzalez73067982019-02-27 11:41:45 +01007219 if (!vreg || !vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007220 goto out;
7221
7222 ret = regulator_disable(vreg->reg);
7223
7224 if (!ret) {
7225 /* ignore errors on applying disable config */
7226 ufshcd_config_vreg(dev, vreg, false);
7227 vreg->enabled = false;
7228 } else {
7229 dev_err(dev, "%s: %s disable failed, err=%d\n",
7230 __func__, vreg->name, ret);
7231 }
7232out:
7233 return ret;
7234}
7235
7236static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7237{
7238 int ret = 0;
7239 struct device *dev = hba->dev;
7240 struct ufs_vreg_info *info = &hba->vreg_info;
7241
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007242 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7243 if (ret)
7244 goto out;
7245
7246 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7247 if (ret)
7248 goto out;
7249
7250 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7251 if (ret)
7252 goto out;
7253
7254out:
7255 if (ret) {
7256 ufshcd_toggle_vreg(dev, info->vccq2, false);
7257 ufshcd_toggle_vreg(dev, info->vccq, false);
7258 ufshcd_toggle_vreg(dev, info->vcc, false);
7259 }
7260 return ret;
7261}
7262
Raviv Shvili6a771a62014-09-25 15:32:24 +03007263static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7264{
7265 struct ufs_vreg_info *info = &hba->vreg_info;
7266
Zeng Guangyue60b7b822019-03-30 17:03:13 +08007267 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007268}
7269
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007270static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7271{
7272 int ret = 0;
7273
7274 if (!vreg)
7275 goto out;
7276
7277 vreg->reg = devm_regulator_get(dev, vreg->name);
7278 if (IS_ERR(vreg->reg)) {
7279 ret = PTR_ERR(vreg->reg);
7280 dev_err(dev, "%s: %s get failed, err=%d\n",
7281 __func__, vreg->name, ret);
7282 }
7283out:
7284 return ret;
7285}
7286
7287static int ufshcd_init_vreg(struct ufs_hba *hba)
7288{
7289 int ret = 0;
7290 struct device *dev = hba->dev;
7291 struct ufs_vreg_info *info = &hba->vreg_info;
7292
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007293 ret = ufshcd_get_vreg(dev, info->vcc);
7294 if (ret)
7295 goto out;
7296
7297 ret = ufshcd_get_vreg(dev, info->vccq);
7298 if (ret)
7299 goto out;
7300
7301 ret = ufshcd_get_vreg(dev, info->vccq2);
7302out:
7303 return ret;
7304}
7305
Raviv Shvili6a771a62014-09-25 15:32:24 +03007306static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7307{
7308 struct ufs_vreg_info *info = &hba->vreg_info;
7309
7310 if (info)
7311 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7312
7313 return 0;
7314}
7315
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007316static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7317 bool skip_ref_clk)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007318{
7319 int ret = 0;
7320 struct ufs_clk_info *clki;
7321 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007322 unsigned long flags;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007323 ktime_t start = ktime_get();
7324 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007325
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007326 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007327 goto out;
7328
Subhash Jadavanib3344562018-05-03 16:37:17 +05307329 /*
7330 * vendor specific setup_clocks ops may depend on clocks managed by
7331 * this standard driver hence call the vendor specific setup_clocks
7332 * before disabling the clocks managed here.
7333 */
7334 if (!on) {
7335 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
7336 if (ret)
7337 return ret;
7338 }
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007339
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007340 list_for_each_entry(clki, head, list) {
7341 if (!IS_ERR_OR_NULL(clki->clk)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007342 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7343 continue;
7344
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007345 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007346 if (on && !clki->enabled) {
7347 ret = clk_prepare_enable(clki->clk);
7348 if (ret) {
7349 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7350 __func__, clki->name, ret);
7351 goto out;
7352 }
7353 } else if (!on && clki->enabled) {
7354 clk_disable_unprepare(clki->clk);
7355 }
7356 clki->enabled = on;
7357 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7358 clki->name, on ? "en" : "dis");
7359 }
7360 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007361
Subhash Jadavanib3344562018-05-03 16:37:17 +05307362 /*
7363 * vendor specific setup_clocks ops may depend on clocks managed by
7364 * this standard driver hence call the vendor specific setup_clocks
7365 * after enabling the clocks managed here.
7366 */
7367 if (on) {
7368 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
7369 if (ret)
7370 return ret;
7371 }
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007372
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007373out:
7374 if (ret) {
7375 list_for_each_entry(clki, head, list) {
7376 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7377 clk_disable_unprepare(clki->clk);
7378 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007379 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007380 spin_lock_irqsave(hba->host->host_lock, flags);
7381 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007382 trace_ufshcd_clk_gating(dev_name(hba->dev),
7383 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007384 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007385 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007386
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007387 if (clk_state_changed)
7388 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7389 (on ? "on" : "off"),
7390 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007391 return ret;
7392}
7393
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007394static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
7395{
7396 return __ufshcd_setup_clocks(hba, on, false);
7397}
7398
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007399static int ufshcd_init_clocks(struct ufs_hba *hba)
7400{
7401 int ret = 0;
7402 struct ufs_clk_info *clki;
7403 struct device *dev = hba->dev;
7404 struct list_head *head = &hba->clk_list_head;
7405
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007406 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007407 goto out;
7408
7409 list_for_each_entry(clki, head, list) {
7410 if (!clki->name)
7411 continue;
7412
7413 clki->clk = devm_clk_get(dev, clki->name);
7414 if (IS_ERR(clki->clk)) {
7415 ret = PTR_ERR(clki->clk);
7416 dev_err(dev, "%s: %s clk get failed, %d\n",
7417 __func__, clki->name, ret);
7418 goto out;
7419 }
7420
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307421 /*
7422 * Parse device ref clk freq as per device tree "ref_clk".
7423 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
7424 * in ufshcd_alloc_host().
7425 */
7426 if (!strcmp(clki->name, "ref_clk"))
7427 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
7428
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007429 if (clki->max_freq) {
7430 ret = clk_set_rate(clki->clk, clki->max_freq);
7431 if (ret) {
7432 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7433 __func__, clki->name,
7434 clki->max_freq, ret);
7435 goto out;
7436 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03007437 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007438 }
7439 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7440 clki->name, clk_get_rate(clki->clk));
7441 }
7442out:
7443 return ret;
7444}
7445
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007446static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7447{
7448 int err = 0;
7449
7450 if (!hba->vops)
7451 goto out;
7452
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007453 err = ufshcd_vops_init(hba);
7454 if (err)
7455 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007456
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007457 err = ufshcd_vops_setup_regulators(hba, true);
7458 if (err)
7459 goto out_exit;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007460
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007461 goto out;
7462
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007463out_exit:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007464 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007465out:
7466 if (err)
7467 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007468 __func__, ufshcd_get_var_name(hba), err);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007469 return err;
7470}
7471
7472static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7473{
7474 if (!hba->vops)
7475 return;
7476
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007477 ufshcd_vops_setup_regulators(hba, false);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007478
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007479 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007480}
7481
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007482static int ufshcd_hba_init(struct ufs_hba *hba)
7483{
7484 int err;
7485
Raviv Shvili6a771a62014-09-25 15:32:24 +03007486 /*
7487 * Handle host controller power separately from the UFS device power
7488 * rails as it will help controlling the UFS host controller power
7489 * collapse easily which is different than UFS device power collapse.
7490 * Also, enable the host controller power before we go ahead with rest
7491 * of the initialization here.
7492 */
7493 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007494 if (err)
7495 goto out;
7496
Raviv Shvili6a771a62014-09-25 15:32:24 +03007497 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007498 if (err)
7499 goto out;
7500
Raviv Shvili6a771a62014-09-25 15:32:24 +03007501 err = ufshcd_init_clocks(hba);
7502 if (err)
7503 goto out_disable_hba_vreg;
7504
7505 err = ufshcd_setup_clocks(hba, true);
7506 if (err)
7507 goto out_disable_hba_vreg;
7508
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007509 err = ufshcd_init_vreg(hba);
7510 if (err)
7511 goto out_disable_clks;
7512
7513 err = ufshcd_setup_vreg(hba, true);
7514 if (err)
7515 goto out_disable_clks;
7516
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007517 err = ufshcd_variant_hba_init(hba);
7518 if (err)
7519 goto out_disable_vreg;
7520
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007521 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007522 goto out;
7523
7524out_disable_vreg:
7525 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007526out_disable_clks:
7527 ufshcd_setup_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007528out_disable_hba_vreg:
7529 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007530out:
7531 return err;
7532}
7533
7534static void ufshcd_hba_exit(struct ufs_hba *hba)
7535{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007536 if (hba->is_powered) {
7537 ufshcd_variant_hba_exit(hba);
7538 ufshcd_setup_vreg(hba, false);
Gilad Bronera5082532016-10-17 17:10:00 -07007539 ufshcd_suspend_clkscaling(hba);
Vivek Gautameebcc192018-08-07 23:17:39 +05307540 if (ufshcd_is_clkscaling_supported(hba))
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007541 if (hba->devfreq)
7542 ufshcd_suspend_clkscaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007543 ufshcd_setup_clocks(hba, false);
7544 ufshcd_setup_hba_vreg(hba, false);
7545 hba->is_powered = false;
Bean Huo09750062020-01-20 14:08:14 +01007546 ufs_put_device_desc(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007547 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007548}
7549
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007550static int
7551ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307552{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007553 unsigned char cmd[6] = {REQUEST_SENSE,
7554 0,
7555 0,
7556 0,
Avri Altman09a5a242018-11-22 20:04:56 +02007557 UFS_SENSE_SIZE,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007558 0};
7559 char *buffer;
7560 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307561
Avri Altman09a5a242018-11-22 20:04:56 +02007562 buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007563 if (!buffer) {
7564 ret = -ENOMEM;
7565 goto out;
7566 }
7567
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007568 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
Avri Altman09a5a242018-11-22 20:04:56 +02007569 UFS_SENSE_SIZE, NULL, NULL,
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007570 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007571 if (ret)
7572 pr_err("%s: failed with err %d\n", __func__, ret);
7573
7574 kfree(buffer);
7575out:
7576 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307577}
7578
7579/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007580 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7581 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307582 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007583 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307584 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007585 * Returns 0 if requested power mode is set successfully
7586 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307587 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007588static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7589 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307590{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007591 unsigned char cmd[6] = { START_STOP };
7592 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007593 struct scsi_device *sdp;
7594 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007595 int ret;
7596
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007597 spin_lock_irqsave(hba->host->host_lock, flags);
7598 sdp = hba->sdev_ufs_device;
7599 if (sdp) {
7600 ret = scsi_device_get(sdp);
7601 if (!ret && !scsi_device_online(sdp)) {
7602 ret = -ENODEV;
7603 scsi_device_put(sdp);
7604 }
7605 } else {
7606 ret = -ENODEV;
7607 }
7608 spin_unlock_irqrestore(hba->host->host_lock, flags);
7609
7610 if (ret)
7611 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007612
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307613 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007614 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7615 * handling, which would wait for host to be resumed. Since we know
7616 * we are functional while we are here, skip host resume in error
7617 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307618 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007619 hba->host->eh_noresume = 1;
7620 if (hba->wlun_dev_clr_ua) {
7621 ret = ufshcd_send_request_sense(hba, sdp);
7622 if (ret)
7623 goto out;
7624 /* Unit attention condition is cleared now */
7625 hba->wlun_dev_clr_ua = false;
7626 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307627
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007628 cmd[4] = pwr_mode << 4;
7629
7630 /*
7631 * Current function would be generally called from the power management
Christoph Hellwige8064022016-10-20 15:12:13 +02007632 * callbacks hence set the RQF_PM flag so that it doesn't resume the
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007633 * already suspended childs.
7634 */
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007635 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7636 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007637 if (ret) {
7638 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02007639 "START_STOP failed for power mode: %d, result %x\n",
7640 pwr_mode, ret);
Johannes Thumshirnc65be1a2018-06-25 13:20:58 +02007641 if (driver_byte(ret) == DRIVER_SENSE)
Hannes Reinecke21045512015-01-08 07:43:46 +01007642 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007643 }
7644
7645 if (!ret)
7646 hba->curr_dev_pwr_mode = pwr_mode;
7647out:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007648 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007649 hba->host->eh_noresume = 0;
7650 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307651}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307652
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007653static int ufshcd_link_state_transition(struct ufs_hba *hba,
7654 enum uic_link_state req_link_state,
7655 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307656{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007657 int ret = 0;
7658
7659 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307660 return 0;
7661
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007662 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7663 ret = ufshcd_uic_hibern8_enter(hba);
7664 if (!ret)
7665 ufshcd_set_link_hibern8(hba);
7666 else
7667 goto out;
7668 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307669 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007670 * If autobkops is enabled, link can't be turned off because
7671 * turning off the link would also turn off the device.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307672 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007673 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
Dan Carpenterdc30c9e2019-12-13 13:49:35 +03007674 (!check_for_bkops || !hba->auto_bkops_enabled)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007675 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02007676 * Let's make sure that link is in low power mode, we are doing
7677 * this currently by putting the link in Hibern8. Otherway to
7678 * put the link in low power mode is to send the DME end point
7679 * to device and then send the DME reset command to local
7680 * unipro. But putting the link in hibern8 is much faster.
7681 */
7682 ret = ufshcd_uic_hibern8_enter(hba);
7683 if (ret)
7684 goto out;
7685 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007686 * Change controller state to "reset state" which
7687 * should also put the link in off/reset state
7688 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02007689 ufshcd_hba_stop(hba, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007690 /*
7691 * TODO: Check if we need any delay to make sure that
7692 * controller is reset
7693 */
7694 ufshcd_set_link_off(hba);
7695 }
7696
7697out:
7698 return ret;
7699}
7700
7701static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7702{
7703 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02007704 * It seems some UFS devices may keep drawing more than sleep current
7705 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7706 * To avoid this situation, add 2ms delay before putting these UFS
7707 * rails in LPM mode.
7708 */
7709 if (!ufshcd_is_link_active(hba) &&
7710 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7711 usleep_range(2000, 2100);
7712
7713 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007714 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7715 * power.
7716 *
7717 * If UFS device and link is in OFF state, all power supplies (VCC,
7718 * VCCQ, VCCQ2) can be turned off if power on write protect is not
7719 * required. If UFS link is inactive (Hibern8 or OFF state) and device
7720 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7721 *
7722 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7723 * in low power state which would save some power.
7724 */
7725 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7726 !hba->dev_info.is_lu_power_on_wp) {
7727 ufshcd_setup_vreg(hba, false);
7728 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7729 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7730 if (!ufshcd_is_link_active(hba)) {
7731 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7732 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7733 }
7734 }
7735}
7736
7737static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7738{
7739 int ret = 0;
7740
7741 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7742 !hba->dev_info.is_lu_power_on_wp) {
7743 ret = ufshcd_setup_vreg(hba, true);
7744 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007745 if (!ret && !ufshcd_is_link_active(hba)) {
7746 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7747 if (ret)
7748 goto vcc_disable;
7749 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7750 if (ret)
7751 goto vccq_lpm;
7752 }
Subhash Jadavani69d72ac2016-10-27 17:26:24 -07007753 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007754 }
7755 goto out;
7756
7757vccq_lpm:
7758 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7759vcc_disable:
7760 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7761out:
7762 return ret;
7763}
7764
7765static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7766{
7767 if (ufshcd_is_link_off(hba))
7768 ufshcd_setup_hba_vreg(hba, false);
7769}
7770
7771static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7772{
7773 if (ufshcd_is_link_off(hba))
7774 ufshcd_setup_hba_vreg(hba, true);
7775}
7776
7777/**
7778 * ufshcd_suspend - helper function for suspend operations
7779 * @hba: per adapter instance
7780 * @pm_op: desired low power operation type
7781 *
7782 * This function will try to put the UFS device and link into low power
7783 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7784 * (System PM level).
7785 *
7786 * If this function is called during shutdown, it will make sure that
7787 * both UFS device and UFS link is powered off.
7788 *
7789 * NOTE: UFS device & link must be active before we enter in this function.
7790 *
7791 * Returns 0 for success and non-zero for failure
7792 */
7793static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7794{
7795 int ret = 0;
7796 enum ufs_pm_level pm_lvl;
7797 enum ufs_dev_pwr_mode req_dev_pwr_mode;
7798 enum uic_link_state req_link_state;
7799
7800 hba->pm_op_in_progress = 1;
7801 if (!ufshcd_is_shutdown_pm(pm_op)) {
7802 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7803 hba->rpm_lvl : hba->spm_lvl;
7804 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7805 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7806 } else {
7807 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7808 req_link_state = UIC_LINK_OFF_STATE;
7809 }
7810
7811 /*
7812 * If we can't transition into any of the low power modes
7813 * just gate the clocks.
7814 */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007815 ufshcd_hold(hba, false);
7816 hba->clk_gating.is_suspended = true;
7817
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007818 if (hba->clk_scaling.is_allowed) {
7819 cancel_work_sync(&hba->clk_scaling.suspend_work);
7820 cancel_work_sync(&hba->clk_scaling.resume_work);
7821 ufshcd_suspend_clkscaling(hba);
7822 }
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007823
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007824 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7825 req_link_state == UIC_LINK_ACTIVE_STATE) {
7826 goto disable_clks;
7827 }
7828
7829 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7830 (req_link_state == hba->uic_link_state))
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007831 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007832
7833 /* UFS device & link must be active before we enter in this function */
7834 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7835 ret = -EINVAL;
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007836 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007837 }
7838
7839 if (ufshcd_is_runtime_pm(pm_op)) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03007840 if (ufshcd_can_autobkops_during_suspend(hba)) {
7841 /*
7842 * The device is idle with no requests in the queue,
7843 * allow background operations if bkops status shows
7844 * that performance might be impacted.
7845 */
7846 ret = ufshcd_urgent_bkops(hba);
7847 if (ret)
7848 goto enable_gating;
7849 } else {
7850 /* make sure that auto bkops is disabled */
7851 ufshcd_disable_auto_bkops(hba);
7852 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007853 }
7854
7855 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7856 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7857 !ufshcd_is_runtime_pm(pm_op))) {
7858 /* ensure that bkops is disabled */
7859 ufshcd_disable_auto_bkops(hba);
7860 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7861 if (ret)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007862 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007863 }
7864
7865 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7866 if (ret)
7867 goto set_dev_active;
7868
7869 ufshcd_vreg_set_lpm(hba);
7870
7871disable_clks:
7872 /*
7873 * Call vendor specific suspend callback. As these callbacks may access
7874 * vendor specific host controller register space call them before the
7875 * host clocks are ON.
7876 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007877 ret = ufshcd_vops_suspend(hba, pm_op);
7878 if (ret)
7879 goto set_link_active;
Stanley Chudcb6cec2019-12-07 20:22:00 +08007880 /*
7881 * Disable the host irq as host controller as there won't be any
7882 * host controller transaction expected till resume.
7883 */
7884 ufshcd_disable_irq(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007885
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007886 if (!ufshcd_is_link_active(hba))
7887 ufshcd_setup_clocks(hba, false);
7888 else
7889 /* If link is active, device ref_clk can't be switched off */
7890 __ufshcd_setup_clocks(hba, false, true);
7891
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007892 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007893 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Stanley Chudcb6cec2019-12-07 20:22:00 +08007894
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007895 /* Put the host controller in low power mode if possible */
7896 ufshcd_hba_vreg_set_lpm(hba);
7897 goto out;
7898
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007899set_link_active:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007900 if (hba->clk_scaling.is_allowed)
7901 ufshcd_resume_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007902 ufshcd_vreg_set_hpm(hba);
7903 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7904 ufshcd_set_link_active(hba);
7905 else if (ufshcd_is_link_off(hba))
7906 ufshcd_host_reset_and_restore(hba);
7907set_dev_active:
7908 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7909 ufshcd_disable_auto_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007910enable_gating:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007911 if (hba->clk_scaling.is_allowed)
7912 ufshcd_resume_clkscaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007913 hba->clk_gating.is_suspended = false;
7914 ufshcd_release(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007915out:
7916 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08007917 if (ret)
7918 ufshcd_update_reg_hist(&hba->ufs_stats.suspend_err, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007919 return ret;
7920}
7921
7922/**
7923 * ufshcd_resume - helper function for resume operations
7924 * @hba: per adapter instance
7925 * @pm_op: runtime PM or system PM
7926 *
7927 * This function basically brings the UFS device, UniPro link and controller
7928 * to active state.
7929 *
7930 * Returns 0 for success and non-zero for failure
7931 */
7932static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7933{
7934 int ret;
7935 enum uic_link_state old_link_state;
7936
7937 hba->pm_op_in_progress = 1;
7938 old_link_state = hba->uic_link_state;
7939
7940 ufshcd_hba_vreg_set_hpm(hba);
7941 /* Make sure clocks are enabled before accessing controller */
7942 ret = ufshcd_setup_clocks(hba, true);
7943 if (ret)
7944 goto out;
7945
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007946 /* enable the host irq as host controller would be active soon */
Can Guo5231d382019-12-05 02:14:46 +00007947 ufshcd_enable_irq(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007948
7949 ret = ufshcd_vreg_set_hpm(hba);
7950 if (ret)
7951 goto disable_irq_and_vops_clks;
7952
7953 /*
7954 * Call vendor specific resume callback. As these callbacks may access
7955 * vendor specific host controller register space call them when the
7956 * host clocks are ON.
7957 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007958 ret = ufshcd_vops_resume(hba, pm_op);
7959 if (ret)
7960 goto disable_vreg;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007961
7962 if (ufshcd_is_link_hibern8(hba)) {
7963 ret = ufshcd_uic_hibern8_exit(hba);
7964 if (!ret)
7965 ufshcd_set_link_active(hba);
7966 else
7967 goto vendor_suspend;
7968 } else if (ufshcd_is_link_off(hba)) {
7969 ret = ufshcd_host_reset_and_restore(hba);
7970 /*
7971 * ufshcd_host_reset_and_restore() should have already
7972 * set the link state as active
7973 */
7974 if (ret || !ufshcd_is_link_active(hba))
7975 goto vendor_suspend;
7976 }
7977
7978 if (!ufshcd_is_ufs_dev_active(hba)) {
7979 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
7980 if (ret)
7981 goto set_old_link_state;
7982 }
7983
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08007984 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
7985 ufshcd_enable_auto_bkops(hba);
7986 else
7987 /*
7988 * If BKOPs operations are urgently needed at this moment then
7989 * keep auto-bkops enabled or else disable it.
7990 */
7991 ufshcd_urgent_bkops(hba);
7992
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007993 hba->clk_gating.is_suspended = false;
7994
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08007995 if (hba->clk_scaling.is_allowed)
7996 ufshcd_resume_clkscaling(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03007997
Adrian Hunterad448372018-03-20 15:07:38 +02007998 /* Enable Auto-Hibernate if configured */
7999 ufshcd_auto_hibern8_enable(hba);
8000
Can Guo71d848b2019-11-14 22:09:26 -08008001 /* Schedule clock gating in case of no access to UFS device yet */
8002 ufshcd_release(hba);
8003
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008004 goto out;
8005
8006set_old_link_state:
8007 ufshcd_link_state_transition(hba, old_link_state, 0);
8008vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008009 ufshcd_vops_suspend(hba, pm_op);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008010disable_vreg:
8011 ufshcd_vreg_set_lpm(hba);
8012disable_irq_and_vops_clks:
8013 ufshcd_disable_irq(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08008014 if (hba->clk_scaling.is_allowed)
8015 ufshcd_suspend_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008016 ufshcd_setup_clocks(hba, false);
8017out:
8018 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08008019 if (ret)
8020 ufshcd_update_reg_hist(&hba->ufs_stats.resume_err, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008021 return ret;
8022}
8023
8024/**
8025 * ufshcd_system_suspend - system suspend routine
8026 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008027 *
8028 * Check the description of ufshcd_suspend() function for more details.
8029 *
8030 * Returns 0 for success and non-zero for failure
8031 */
8032int ufshcd_system_suspend(struct ufs_hba *hba)
8033{
8034 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008035 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008036
8037 if (!hba || !hba->is_powered)
Dolev Raviv233b5942014-10-23 13:25:14 +03008038 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008039
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008040 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
8041 hba->curr_dev_pwr_mode) &&
8042 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
8043 hba->uic_link_state))
8044 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008045
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008046 if (pm_runtime_suspended(hba->dev)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008047 /*
8048 * UFS device and/or UFS link low power states during runtime
8049 * suspend seems to be different than what is expected during
8050 * system suspend. Hence runtime resume the devic & link and
8051 * let the system suspend low power states to take effect.
8052 * TODO: If resume takes longer time, we might have optimize
8053 * it in future by not resuming everything if possible.
8054 */
8055 ret = ufshcd_runtime_resume(hba);
8056 if (ret)
8057 goto out;
8058 }
8059
8060 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
8061out:
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008062 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
8063 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008064 hba->curr_dev_pwr_mode, hba->uic_link_state);
Dolev Ravive7850602014-09-25 15:32:36 +03008065 if (!ret)
8066 hba->is_sys_suspended = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008067 return ret;
8068}
8069EXPORT_SYMBOL(ufshcd_system_suspend);
8070
8071/**
8072 * ufshcd_system_resume - system resume routine
8073 * @hba: per adapter instance
8074 *
8075 * Returns 0 for success and non-zero for failure
8076 */
8077
8078int ufshcd_system_resume(struct ufs_hba *hba)
8079{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008080 int ret = 0;
8081 ktime_t start = ktime_get();
8082
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008083 if (!hba)
8084 return -EINVAL;
8085
8086 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008087 /*
8088 * Let the runtime resume take care of resuming
8089 * if runtime suspended.
8090 */
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008091 goto out;
8092 else
8093 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
8094out:
8095 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
8096 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008097 hba->curr_dev_pwr_mode, hba->uic_link_state);
Stanley Chuce9e7bc2019-01-07 22:19:34 +08008098 if (!ret)
8099 hba->is_sys_suspended = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008100 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008101}
8102EXPORT_SYMBOL(ufshcd_system_resume);
8103
8104/**
8105 * ufshcd_runtime_suspend - runtime suspend routine
8106 * @hba: per adapter instance
8107 *
8108 * Check the description of ufshcd_suspend() function for more details.
8109 *
8110 * Returns 0 for success and non-zero for failure
8111 */
8112int ufshcd_runtime_suspend(struct ufs_hba *hba)
8113{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008114 int ret = 0;
8115 ktime_t start = ktime_get();
8116
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008117 if (!hba)
8118 return -EINVAL;
8119
8120 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008121 goto out;
8122 else
8123 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
8124out:
8125 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
8126 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008127 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008128 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308129}
8130EXPORT_SYMBOL(ufshcd_runtime_suspend);
8131
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008132/**
8133 * ufshcd_runtime_resume - runtime resume routine
8134 * @hba: per adapter instance
8135 *
8136 * This function basically brings the UFS device, UniPro link and controller
8137 * to active state. Following operations are done in this function:
8138 *
8139 * 1. Turn on all the controller related clocks
8140 * 2. Bring the UniPro link out of Hibernate state
8141 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
8142 * to active state.
8143 * 4. If auto-bkops is enabled on the device, disable it.
8144 *
8145 * So following would be the possible power state after this function return
8146 * successfully:
8147 * S1: UFS device in Active state with VCC rail ON
8148 * UniPro link in Active state
8149 * All the UFS/UniPro controller clocks are ON
8150 *
8151 * Returns 0 for success and non-zero for failure
8152 */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308153int ufshcd_runtime_resume(struct ufs_hba *hba)
8154{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008155 int ret = 0;
8156 ktime_t start = ktime_get();
8157
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008158 if (!hba)
8159 return -EINVAL;
8160
8161 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008162 goto out;
8163 else
8164 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8165out:
8166 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8167 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008168 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008169 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308170}
8171EXPORT_SYMBOL(ufshcd_runtime_resume);
8172
8173int ufshcd_runtime_idle(struct ufs_hba *hba)
8174{
8175 return 0;
8176}
8177EXPORT_SYMBOL(ufshcd_runtime_idle);
8178
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308179/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008180 * ufshcd_shutdown - shutdown routine
8181 * @hba: per adapter instance
8182 *
8183 * This function would power off both UFS device and UFS link.
8184 *
8185 * Returns 0 always to allow force shutdown even in case of errors.
8186 */
8187int ufshcd_shutdown(struct ufs_hba *hba)
8188{
8189 int ret = 0;
8190
Stanley Chuf51913e2019-09-18 12:20:38 +08008191 if (!hba->is_powered)
8192 goto out;
8193
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008194 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
8195 goto out;
8196
8197 if (pm_runtime_suspended(hba->dev)) {
8198 ret = ufshcd_runtime_resume(hba);
8199 if (ret)
8200 goto out;
8201 }
8202
8203 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
8204out:
8205 if (ret)
8206 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
8207 /* allow force shutdown even in case of errors */
8208 return 0;
8209}
8210EXPORT_SYMBOL(ufshcd_shutdown);
8211
8212/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308213 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308214 * data structure memory
Bart Van Assche8aa29f12018-03-01 15:07:20 -08008215 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308216 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308217void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308218{
Avri Altmandf032bf2018-10-07 17:30:35 +03008219 ufs_bsg_remove(hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008220 ufs_sysfs_remove_nodes(hba->dev);
Bart Van Assche69a6c262019-12-09 10:13:09 -08008221 blk_cleanup_queue(hba->tmf_queue);
8222 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08008223 blk_cleanup_queue(hba->cmd_queue);
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05308224 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308225 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308226 ufshcd_disable_intr(hba, hba->intr_mask);
Yaniv Gardi596585a2016-03-10 17:37:08 +02008227 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308228
Vivek Gautameebcc192018-08-07 23:17:39 +05308229 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008230 ufshcd_exit_clk_gating(hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08008231 if (ufshcd_is_clkscaling_supported(hba))
8232 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008233 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308234}
8235EXPORT_SYMBOL_GPL(ufshcd_remove);
8236
8237/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02008238 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8239 * @hba: pointer to Host Bus Adapter (HBA)
8240 */
8241void ufshcd_dealloc_host(struct ufs_hba *hba)
8242{
8243 scsi_host_put(hba->host);
8244}
8245EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8246
8247/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008248 * ufshcd_set_dma_mask - Set dma mask based on the controller
8249 * addressing capability
8250 * @hba: per adapter instance
8251 *
8252 * Returns 0 for success, non-zero for failure
8253 */
8254static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8255{
8256 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8257 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8258 return 0;
8259 }
8260 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8261}
8262
8263/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008264 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308265 * @dev: pointer to device handle
8266 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308267 * Returns 0 on success, non-zero value on failure
8268 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008269int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308270{
8271 struct Scsi_Host *host;
8272 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008273 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308274
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308275 if (!dev) {
8276 dev_err(dev,
8277 "Invalid memory reference for dev is NULL\n");
8278 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308279 goto out_error;
8280 }
8281
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308282 host = scsi_host_alloc(&ufshcd_driver_template,
8283 sizeof(struct ufs_hba));
8284 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308285 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308286 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308287 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308288 }
8289 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308290 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308291 hba->dev = dev;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008292 *hba_handle = hba;
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05308293 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008294
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03008295 INIT_LIST_HEAD(&hba->clk_list_head);
8296
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008297out_error:
8298 return err;
8299}
8300EXPORT_SYMBOL(ufshcd_alloc_host);
8301
Bart Van Assche69a6c262019-12-09 10:13:09 -08008302/* This function exists because blk_mq_alloc_tag_set() requires this. */
8303static blk_status_t ufshcd_queue_tmf(struct blk_mq_hw_ctx *hctx,
8304 const struct blk_mq_queue_data *qd)
8305{
8306 WARN_ON_ONCE(true);
8307 return BLK_STS_NOTSUPP;
8308}
8309
8310static const struct blk_mq_ops ufshcd_tmf_ops = {
8311 .queue_rq = ufshcd_queue_tmf,
8312};
8313
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008314/**
8315 * ufshcd_init - Driver initialization routine
8316 * @hba: per-adapter instance
8317 * @mmio_base: base register address
8318 * @irq: Interrupt line of device
8319 * Returns 0 on success, non-zero value on failure
8320 */
8321int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
8322{
8323 int err;
8324 struct Scsi_Host *host = hba->host;
8325 struct device *dev = hba->dev;
8326
8327 if (!mmio_base) {
8328 dev_err(hba->dev,
8329 "Invalid memory reference for mmio_base is NULL\n");
8330 err = -ENODEV;
8331 goto out_error;
8332 }
8333
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308334 hba->mmio_base = mmio_base;
8335 hba->irq = irq;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308336
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008337 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008338 if (err)
8339 goto out_error;
8340
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308341 /* Read capabilities registers */
8342 ufshcd_hba_capabilities(hba);
8343
8344 /* Get UFS version supported by the controller */
8345 hba->ufs_version = ufshcd_get_ufs_version(hba);
8346
Yaniv Gardic01848c2016-12-05 19:25:02 -08008347 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
8348 (hba->ufs_version != UFSHCI_VERSION_11) &&
8349 (hba->ufs_version != UFSHCI_VERSION_20) &&
8350 (hba->ufs_version != UFSHCI_VERSION_21))
8351 dev_err(hba->dev, "invalid UFS version 0x%x\n",
8352 hba->ufs_version);
8353
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308354 /* Get Interrupt bit mask per version */
8355 hba->intr_mask = ufshcd_get_intr_mask(hba);
8356
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008357 err = ufshcd_set_dma_mask(hba);
8358 if (err) {
8359 dev_err(hba->dev, "set dma mask failed\n");
8360 goto out_disable;
8361 }
8362
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308363 /* Allocate memory for host memory space */
8364 err = ufshcd_memory_alloc(hba);
8365 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308366 dev_err(hba->dev, "Memory allocation failed\n");
8367 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308368 }
8369
8370 /* Configure LRB */
8371 ufshcd_host_memory_configure(hba);
8372
8373 host->can_queue = hba->nutrs;
8374 host->cmd_per_lun = hba->nutrs;
8375 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03008376 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308377 host->max_channel = UFSHCD_MAX_CHANNEL;
8378 host->unique_id = host->host_no;
Avri Altmana851b2b2018-10-07 17:30:34 +03008379 host->max_cmd_len = UFS_CDB_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308380
Dolev Raviv7eb584d2014-09-25 15:32:31 +03008381 hba->max_pwr_info.is_valid = false;
8382
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308383 /* Initialize work queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05308384 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308385 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308386
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308387 /* Initialize UIC command mutex */
8388 mutex_init(&hba->uic_cmd_mutex);
8389
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308390 /* Initialize mutex for device management commands */
8391 mutex_init(&hba->dev_cmd.lock);
8392
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08008393 init_rwsem(&hba->clk_scaling_lock);
8394
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008395 ufshcd_init_clk_gating(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02008396
Vivek Gautameebcc192018-08-07 23:17:39 +05308397 ufshcd_init_clk_scaling(hba);
8398
Yaniv Gardi199ef132016-03-10 17:37:06 +02008399 /*
8400 * In order to avoid any spurious interrupt immediately after
8401 * registering UFS controller interrupt handler, clear any pending UFS
8402 * interrupt status and disable all the UFS interrupts.
8403 */
8404 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
8405 REG_INTERRUPT_STATUS);
8406 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
8407 /*
8408 * Make sure that UFS interrupts are disabled and any pending interrupt
8409 * status is cleared before registering UFS interrupt handler.
8410 */
8411 mb();
8412
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308413 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09008414 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308415 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308416 dev_err(hba->dev, "request irq failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008417 goto exit_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008418 } else {
8419 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308420 }
8421
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308422 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308423 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308424 dev_err(hba->dev, "scsi_add_host failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008425 goto exit_gating;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308426 }
8427
Bart Van Assche7252a362019-12-09 10:13:08 -08008428 hba->cmd_queue = blk_mq_init_queue(&hba->host->tag_set);
8429 if (IS_ERR(hba->cmd_queue)) {
8430 err = PTR_ERR(hba->cmd_queue);
8431 goto out_remove_scsi_host;
8432 }
8433
Bart Van Assche69a6c262019-12-09 10:13:09 -08008434 hba->tmf_tag_set = (struct blk_mq_tag_set) {
8435 .nr_hw_queues = 1,
8436 .queue_depth = hba->nutmrs,
8437 .ops = &ufshcd_tmf_ops,
8438 .flags = BLK_MQ_F_NO_SCHED,
8439 };
8440 err = blk_mq_alloc_tag_set(&hba->tmf_tag_set);
8441 if (err < 0)
8442 goto free_cmd_queue;
8443 hba->tmf_queue = blk_mq_init_queue(&hba->tmf_tag_set);
8444 if (IS_ERR(hba->tmf_queue)) {
8445 err = PTR_ERR(hba->tmf_queue);
8446 goto free_tmf_tag_set;
8447 }
8448
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07008449 /* Reset the attached device */
8450 ufshcd_vops_device_reset(hba);
8451
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308452 /* Host controller enable */
8453 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308454 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308455 dev_err(hba->dev, "Host controller enable failed\n");
Dolev Raviv66cc8202016-12-22 18:39:42 -08008456 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08008457 ufshcd_print_host_state(hba);
Bart Van Assche69a6c262019-12-09 10:13:09 -08008458 goto free_tmf_queue;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308459 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308460
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -08008461 /*
8462 * Set the default power management level for runtime and system PM.
8463 * Default power saving mode is to keep UFS link in Hibern8 state
8464 * and UFS device in sleep state.
8465 */
8466 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8467 UFS_SLEEP_PWR_MODE,
8468 UIC_LINK_HIBERN8_STATE);
8469 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8470 UFS_SLEEP_PWR_MODE,
8471 UIC_LINK_HIBERN8_STATE);
8472
Adrian Hunterad448372018-03-20 15:07:38 +02008473 /* Set the default auto-hiberate idle timer value to 150 ms */
Stanley Chuf571b372019-05-21 14:44:53 +08008474 if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
Adrian Hunterad448372018-03-20 15:07:38 +02008475 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8476 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8477 }
8478
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05308479 /* Hold auto suspend until async scan completes */
8480 pm_runtime_get_sync(dev);
Subhash Jadavani38135532018-05-03 16:37:18 +05308481 atomic_set(&hba->scsi_block_reqs_cnt, 0);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008482 /*
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008483 * We are assuming that device wasn't put in sleep/power-down
8484 * state exclusively during the boot stage before kernel.
8485 * This assumption helps avoid doing link startup twice during
8486 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008487 */
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008488 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008489
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308490 async_schedule(ufshcd_async_scan, hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008491 ufs_sysfs_add_nodes(hba->dev);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308492
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308493 return 0;
8494
Bart Van Assche69a6c262019-12-09 10:13:09 -08008495free_tmf_queue:
8496 blk_cleanup_queue(hba->tmf_queue);
8497free_tmf_tag_set:
8498 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08008499free_cmd_queue:
8500 blk_cleanup_queue(hba->cmd_queue);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308501out_remove_scsi_host:
8502 scsi_remove_host(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008503exit_gating:
Vivek Gautameebcc192018-08-07 23:17:39 +05308504 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008505 ufshcd_exit_clk_gating(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308506out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008507 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008508 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308509out_error:
8510 return err;
8511}
8512EXPORT_SYMBOL_GPL(ufshcd_init);
8513
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308514MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8515MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05308516MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308517MODULE_LICENSE("GPL");
8518MODULE_VERSION(UFSHCD_DRIVER_VERSION);