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Bean Huo67351112020-06-05 22:05:19 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05303 * Universal Flash Storage Host controller driver Core
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02005 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307 * Authors:
8 * Santosh Yaraganavi <santosh.sy@samsung.com>
9 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053010 */
11
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053012#include <linux/async.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030013#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020014#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020015#include <linux/of.h>
Adrian Hunterad448372018-03-20 15:07:38 +020016#include <linux/bitfield.h>
Can Guofb276f72020-03-25 18:09:59 -070017#include <linux/blk-pm.h>
Can Guoc72e79c2020-08-09 05:15:52 -070018#include <linux/blkdev.h>
Asutosh Dasb294ff32021-04-23 17:20:16 -070019#include <scsi/scsi_driver.h>
Bart Van Asschea113eaa2021-07-21 20:34:37 -070020#include <scsi/scsi_transport.h>
21#include "../scsi_transport_api.h"
Vinayak Holikattie0eca632013-02-25 21:44:33 +053022#include "ufshcd.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020023#include "ufs_quirks.h"
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +053024#include "unipro.h"
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +020025#include "ufs-sysfs.h"
Adrian Hunterb6cacaf2021-01-07 09:25:38 +020026#include "ufs-debugfs.h"
Bart Van Asschec11a1ae2021-07-21 20:34:39 -070027#include "ufs-fault-injection.h"
Avri Altmandf032bf2018-10-07 17:30:35 +030028#include "ufs_bsg.h"
Satya Tangiraladf043c742020-07-06 20:04:14 +000029#include "ufshcd-crypto.h"
Daejun Parkf02bc972021-07-12 17:58:30 +090030#include "ufshpb.h"
Asutosh Das3d17b9b2020-04-22 14:41:42 -070031#include <asm/unaligned.h>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053032
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -080033#define CREATE_TRACE_POINTS
34#include <trace/events/ufs.h>
35
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053036#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
37 UTP_TASK_REQ_COMPL |\
38 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053039/* UIC command timeout, unit: ms */
40#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053041
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053042/* NOP OUT retries waiting for NOP IN response */
43#define NOP_OUT_RETRIES 10
Daejun Park782e2ef2020-09-02 11:58:52 +090044/* Timeout after 50 msecs if NOP OUT hangs without response */
45#define NOP_OUT_TIMEOUT 50 /* msecs */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053046
Dolev Raviv68078d52013-07-30 00:35:58 +053047/* Query request retries */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080048#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +053049/* Query request timeout */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080050#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +053051
Sujit Reddy Thummae2933132014-05-26 10:59:12 +053052/* Task management command timeout */
53#define TM_CMD_TIMEOUT 100 /* msecs */
54
Yaniv Gardi64238fb2016-02-01 15:02:43 +020055/* maximum number of retries for a general UIC command */
56#define UFS_UIC_COMMAND_RETRIES 3
57
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030058/* maximum number of link-startup retries */
59#define DME_LINKSTARTUP_RETRIES 3
60
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +020061/* Maximum retries for Hibern8 enter */
62#define UIC_HIBERN8_ENTER_RETRIES 3
63
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030064/* maximum number of reset retries before giving up */
65#define MAX_HOST_RESET_RETRIES 5
66
Dolev Raviv68078d52013-07-30 00:35:58 +053067/* Expose the flag value from utp_upiu_query.value */
68#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
69
Seungwon Jeon7d568652013-08-31 21:40:20 +053070/* Interrupt aggregation default timeout, unit: 40us */
71#define INT_AGGR_DEF_TO 0x02
72
Stanley Chu49615ba2019-09-16 23:56:50 +080073/* default delay of autosuspend: 2000 ms */
74#define RPM_AUTOSUSPEND_DELAY_MS 2000
75
Stanley Chu51dd9052020-05-22 16:32:12 +080076/* Default delay of RPM device flush delayed work */
77#define RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS 5000
78
Can Guo09f17792020-02-10 19:40:49 -080079/* Default value of wait time before gating device ref clock */
80#define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */
81
Kiwoong Kim29707fa2020-08-10 19:02:27 +090082/* Polling time to wait for fDeviceInit */
83#define FDEVICEINIT_COMPL_TIMEOUT 1500 /* millisecs */
84
Asutosh Dasb294ff32021-04-23 17:20:16 -070085#define wlun_dev_to_hba(dv) shost_priv(to_scsi_device(dv)->host)
86
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030087#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
88 ({ \
89 int _ret; \
90 if (_on) \
91 _ret = ufshcd_enable_vreg(_dev, _vreg); \
92 else \
93 _ret = ufshcd_disable_vreg(_dev, _vreg); \
94 _ret; \
95 })
96
Tomas Winklerba809172018-06-14 11:14:09 +030097#define ufshcd_hex_dump(prefix_str, buf, len) do { \
98 size_t __len = (len); \
99 print_hex_dump(KERN_ERR, prefix_str, \
100 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
101 16, 4, buf, __len, false); \
102} while (0)
103
104int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
105 const char *prefix)
106{
Marc Gonzalezd6724752019-01-22 18:29:22 +0100107 u32 *regs;
108 size_t pos;
109
110 if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
111 return -EINVAL;
Tomas Winklerba809172018-06-14 11:14:09 +0300112
Can Guocddaeba2019-11-14 22:09:27 -0800113 regs = kzalloc(len, GFP_ATOMIC);
Tomas Winklerba809172018-06-14 11:14:09 +0300114 if (!regs)
115 return -ENOMEM;
116
Marc Gonzalezd6724752019-01-22 18:29:22 +0100117 for (pos = 0; pos < len; pos += 4)
118 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
119
Tomas Winklerba809172018-06-14 11:14:09 +0300120 ufshcd_hex_dump(prefix, regs, len);
121 kfree(regs);
122
123 return 0;
124}
125EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800126
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530127enum {
128 UFSHCD_MAX_CHANNEL = 0,
129 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530130 UFSHCD_CMD_PER_LUN = 32,
131 UFSHCD_CAN_QUEUE = 32,
132};
133
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530134/* UFSHCD error handling flags */
135enum {
136 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530137};
138
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530139/* UFSHCD UIC layer error flags */
140enum {
141 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200142 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
143 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
144 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
145 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
146 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Can Guo2355b662020-08-24 19:07:06 -0700147 UFSHCD_UIC_PA_GENERIC_ERROR = (1 << 6), /* Generic PA error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530148};
149
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530150#define ufshcd_set_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300151 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530152#define ufshcd_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300153 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530154#define ufshcd_clear_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300155 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530156
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +0200157struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
Bart Van Asschee2ac7ab2021-05-19 13:20:58 -0700158 [UFS_PM_LVL_0] = {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
159 [UFS_PM_LVL_1] = {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
160 [UFS_PM_LVL_2] = {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
161 [UFS_PM_LVL_3] = {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
162 [UFS_PM_LVL_4] = {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
163 [UFS_PM_LVL_5] = {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
Adrian Hunterfe1d4c22020-11-03 16:14:02 +0200164 /*
165 * For DeepSleep, the link is first put in hibern8 and then off.
166 * Leaving the link in hibern8 is not supported.
167 */
Bart Van Asschee2ac7ab2021-05-19 13:20:58 -0700168 [UFS_PM_LVL_6] = {UFS_DEEPSLEEP_PWR_MODE, UIC_LINK_OFF_STATE},
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300169};
170
171static inline enum ufs_dev_pwr_mode
172ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
173{
174 return ufs_pm_lvl_states[lvl].dev_state;
175}
176
177static inline enum uic_link_state
178ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
179{
180 return ufs_pm_lvl_states[lvl].link_state;
181}
182
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -0800183static inline enum ufs_pm_level
184ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
185 enum uic_link_state link_state)
186{
187 enum ufs_pm_level lvl;
188
189 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
190 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
191 (ufs_pm_lvl_states[lvl].link_state == link_state))
192 return lvl;
193 }
194
195 /* if no match found, return the level 0 */
196 return UFS_PM_LVL_0;
197}
198
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800199static struct ufs_dev_fix ufs_fixups[] = {
200 /* UFS cards deviations table */
Stanley Chuc0a18ee2020-06-12 09:26:24 +0800201 UFS_FIX(UFS_VENDOR_MICRON, UFS_ANY_MODEL,
Bean Huo63522bf2021-08-04 20:21:27 +0200202 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM |
203 UFS_DEVICE_QUIRK_SWAP_L2P_ENTRY_FOR_HPB_READ),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800204 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
Stanley Chued0b40f2020-06-12 09:26:25 +0800205 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM |
206 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE |
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800207 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
Stanley Chued0b40f2020-06-12 09:26:25 +0800208 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
209 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
210 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
211 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800212 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
213 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
214 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
215 UFS_DEVICE_QUIRK_PA_TACTIVATE),
216 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
217 UFS_DEVICE_QUIRK_PA_TACTIVATE),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800218 END_FIX
219};
220
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -0800221static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530222static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530223static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Dolev Ravive7d38252016-12-22 18:40:07 -0800224static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530225static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300226static void ufshcd_hba_exit(struct ufs_hba *hba);
Randall Huang19186512020-11-30 20:14:02 -0800227static int ufshcd_clear_ua_wluns(struct ufs_hba *hba);
Bean Huo68444d72021-09-29 22:06:39 +0200228static int ufshcd_probe_hba(struct ufs_hba *hba, bool init_dev_params);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300229static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300230static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300231static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800232static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
233static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800234static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800235static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300236static irqreturn_t ufshcd_intr(int irq, void *__hba);
Yaniv Gardi874237f2015-05-17 18:55:03 +0300237static int ufshcd_change_power_mode(struct ufs_hba *hba,
238 struct ufs_pa_layer_attr *pwr_mode);
Can Guoc72e79c2020-08-09 05:15:52 -0700239static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on);
240static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on);
241static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
242 struct ufs_vreg *vreg);
Can Guo307348f2020-08-24 19:07:05 -0700243static int ufshcd_try_to_abort_task(struct ufs_hba *hba, int tag);
Yue Hu3b5f3c02021-03-18 17:55:36 +0800244static void ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set);
245static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable);
Can Guodd7143e2020-10-27 12:10:36 -0700246static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba);
247static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700248
Can Guo5231d382019-12-05 02:14:46 +0000249static inline void ufshcd_enable_irq(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300250{
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300251 if (!hba->is_irq_enabled) {
Can Guo5231d382019-12-05 02:14:46 +0000252 enable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300253 hba->is_irq_enabled = true;
254 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300255}
256
257static inline void ufshcd_disable_irq(struct ufs_hba *hba)
258{
259 if (hba->is_irq_enabled) {
Can Guo5231d382019-12-05 02:14:46 +0000260 disable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300261 hba->is_irq_enabled = false;
262 }
263}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530264
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700265static inline void ufshcd_wb_config(struct ufs_hba *hba)
266{
Stanley Chu79e35202020-05-08 16:01:15 +0800267 if (!ufshcd_is_wb_allowed(hba))
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700268 return;
269
Yue Hu3b5f3c02021-03-18 17:55:36 +0800270 ufshcd_wb_toggle(hba, true);
271
272 ufshcd_wb_toggle_flush_during_h8(hba, true);
Stanley Chu21acf462020-12-22 15:29:05 +0800273 if (!(hba->quirks & UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL))
274 ufshcd_wb_toggle_flush(hba, true);
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700275}
276
Subhash Jadavani38135532018-05-03 16:37:18 +0530277static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
278{
279 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
280 scsi_unblock_requests(hba->host);
281}
282
283static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
284{
285 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
286 scsi_block_requests(hba->host);
287}
288
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300289static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
Bean Huo28fa68f2021-01-05 12:34:42 +0100290 enum ufs_trace_str_t str_t)
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300291{
292 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
Bean Huo89ac2c3b2021-05-31 12:43:06 +0200293 struct utp_upiu_header *header;
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300294
Bean Huo9d5095e2021-01-05 12:34:43 +0100295 if (!trace_ufshcd_upiu_enabled())
296 return;
297
Bean Huo89ac2c3b2021-05-31 12:43:06 +0200298 if (str_t == UFS_CMD_SEND)
299 header = &rq->header;
300 else
301 header = &hba->lrb[tag].ucd_rsp_ptr->header;
302
303 trace_ufshcd_upiu(dev_name(hba->dev), str_t, header, &rq->sc.cdb,
Bean Huo867fdc22021-01-05 12:34:46 +0100304 UFS_TSF_CDB);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300305}
306
Avri Altmanfb475b72021-01-10 10:46:18 +0200307static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba,
308 enum ufs_trace_str_t str_t,
309 struct utp_upiu_req *rq_rsp)
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300310{
Bean Huo9d5095e2021-01-05 12:34:43 +0100311 if (!trace_ufshcd_upiu_enabled())
312 return;
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300313
Bean Huobe20b512021-01-05 12:34:44 +0100314 trace_ufshcd_upiu(dev_name(hba->dev), str_t, &rq_rsp->header,
Bean Huo867fdc22021-01-05 12:34:46 +0100315 &rq_rsp->qr, UFS_TSF_OSF);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300316}
317
318static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
Bean Huo28fa68f2021-01-05 12:34:42 +0100319 enum ufs_trace_str_t str_t)
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300320{
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300321 int off = (int)tag - hba->nutrs;
Christoph Hellwig391e3882018-10-07 17:30:32 +0300322 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300323
Bean Huo9d5095e2021-01-05 12:34:43 +0100324 if (!trace_ufshcd_upiu_enabled())
325 return;
326
Bean Huo0ed083e2021-01-05 12:34:45 +0100327 if (str_t == UFS_TM_SEND)
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -0500328 trace_ufshcd_upiu(dev_name(hba->dev), str_t,
329 &descp->upiu_req.req_header,
330 &descp->upiu_req.input_param1,
331 UFS_TSF_TM_INPUT);
Bean Huo0ed083e2021-01-05 12:34:45 +0100332 else
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -0500333 trace_ufshcd_upiu(dev_name(hba->dev), str_t,
334 &descp->upiu_rsp.rsp_header,
335 &descp->upiu_rsp.output_param1,
336 UFS_TSF_TM_OUTPUT);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300337}
338
Stanley Chuaa5c6972020-06-15 15:22:35 +0800339static void ufshcd_add_uic_command_trace(struct ufs_hba *hba,
340 struct uic_command *ucmd,
Bean Huo28fa68f2021-01-05 12:34:42 +0100341 enum ufs_trace_str_t str_t)
Stanley Chuaa5c6972020-06-15 15:22:35 +0800342{
343 u32 cmd;
344
345 if (!trace_ufshcd_uic_command_enabled())
346 return;
347
Bean Huo28fa68f2021-01-05 12:34:42 +0100348 if (str_t == UFS_CMD_SEND)
Stanley Chuaa5c6972020-06-15 15:22:35 +0800349 cmd = ucmd->command;
350 else
351 cmd = ufshcd_readl(hba, REG_UIC_COMMAND);
352
Bean Huo28fa68f2021-01-05 12:34:42 +0100353 trace_ufshcd_uic_command(dev_name(hba->dev), str_t, cmd,
Stanley Chuaa5c6972020-06-15 15:22:35 +0800354 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_1),
355 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2),
356 ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3));
357}
358
Bean Huo28fa68f2021-01-05 12:34:42 +0100359static void ufshcd_add_command_trace(struct ufs_hba *hba, unsigned int tag,
360 enum ufs_trace_str_t str_t)
Lee Susman1a07f2d2016-12-22 18:42:03 -0800361{
Colin Ian King102851f2021-08-04 14:32:41 +0100362 u64 lba;
Jaegeuk Kim69a314d2020-11-17 08:58:37 -0800363 u8 opcode = 0, group_id = 0;
Lee Susman1a07f2d2016-12-22 18:42:03 -0800364 u32 intr, doorbell;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300365 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800366 struct scsi_cmnd *cmd = lrbp->cmd;
Bart Van Assche3f2c1002021-08-09 16:03:50 -0700367 struct request *rq = scsi_cmd_to_rq(cmd);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800368 int transfer_len = -1;
369
Bean Huo44b5de32021-05-31 12:43:07 +0200370 if (!cmd)
371 return;
372
Bean Huo44b5de32021-05-31 12:43:07 +0200373 /* trace UPIU also */
374 ufshcd_add_cmd_upiu_trace(hba, tag, str_t);
Bean Huof0101af2021-08-02 20:08:03 +0200375 if (!trace_ufshcd_command_enabled())
376 return;
377
Bean Huo44b5de32021-05-31 12:43:07 +0200378 opcode = cmd->cmnd[0];
Martin K. Petersen54815082021-06-08 23:39:29 -0400379 lba = scsi_get_lba(cmd);
Bean Huo04c073f2021-05-31 12:43:05 +0200380
Bean Huo44b5de32021-05-31 12:43:07 +0200381 if (opcode == READ_10 || opcode == WRITE_10) {
382 /*
383 * Currently we only fully trace read(10) and write(10) commands
384 */
385 transfer_len =
386 be32_to_cpu(lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
387 if (opcode == WRITE_10)
388 group_id = lrbp->cmd->cmnd[6];
389 } else if (opcode == UNMAP) {
390 /*
391 * The number of Bytes to be unmapped beginning with the lba.
392 */
Bart Van Assche3f2c1002021-08-09 16:03:50 -0700393 transfer_len = blk_rq_bytes(rq);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800394 }
395
396 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
397 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Bean Huo28fa68f2021-01-05 12:34:42 +0100398 trace_ufshcd_command(dev_name(hba->dev), str_t, tag,
Jaegeuk Kim69a314d2020-11-17 08:58:37 -0800399 doorbell, transfer_len, intr, lba, opcode, group_id);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800400}
401
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800402static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
403{
404 struct ufs_clk_info *clki;
405 struct list_head *head = &hba->clk_list_head;
406
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300407 if (list_empty(head))
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800408 return;
409
410 list_for_each_entry(clki, head, list) {
411 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
412 clki->max_freq)
413 dev_err(hba->dev, "clk: %s, rate: %u\n",
414 clki->name, clki->curr_freq);
415 }
416}
417
Stanley Chue965e5e2020-12-05 19:58:59 +0800418static void ufshcd_print_evt(struct ufs_hba *hba, u32 id,
419 char *err_name)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800420{
421 int i;
Stanley Chu27752642019-01-28 22:04:26 +0800422 bool found = false;
Stanley Chue965e5e2020-12-05 19:58:59 +0800423 struct ufs_event_hist *e;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800424
Stanley Chue965e5e2020-12-05 19:58:59 +0800425 if (id >= UFS_EVT_CNT)
426 return;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800427
Stanley Chue965e5e2020-12-05 19:58:59 +0800428 e = &hba->ufs_stats.event[id];
429
430 for (i = 0; i < UFS_EVENT_HIST_LENGTH; i++) {
431 int p = (i + e->pos) % UFS_EVENT_HIST_LENGTH;
432
433 if (e->tstamp[p] == 0)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800434 continue;
Stanley Chuc5397f12019-07-10 21:38:20 +0800435 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
Stanley Chue965e5e2020-12-05 19:58:59 +0800436 e->val[p], ktime_to_us(e->tstamp[p]));
Stanley Chu27752642019-01-28 22:04:26 +0800437 found = true;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800438 }
Stanley Chu27752642019-01-28 22:04:26 +0800439
440 if (!found)
Stanley Chufd1fb4d2020-01-04 22:26:08 +0800441 dev_err(hba->dev, "No record of %s\n", err_name);
DooHyun Hwangbafd09f2021-02-03 19:14:43 +0900442 else
443 dev_err(hba->dev, "%s: total cnt=%llu\n", err_name, e->cnt);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800444}
445
Stanley Chue965e5e2020-12-05 19:58:59 +0800446static void ufshcd_print_evt_hist(struct ufs_hba *hba)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800447{
Tomas Winklerba809172018-06-14 11:14:09 +0300448 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800449
Stanley Chue965e5e2020-12-05 19:58:59 +0800450 ufshcd_print_evt(hba, UFS_EVT_PA_ERR, "pa_err");
451 ufshcd_print_evt(hba, UFS_EVT_DL_ERR, "dl_err");
452 ufshcd_print_evt(hba, UFS_EVT_NL_ERR, "nl_err");
453 ufshcd_print_evt(hba, UFS_EVT_TL_ERR, "tl_err");
454 ufshcd_print_evt(hba, UFS_EVT_DME_ERR, "dme_err");
455 ufshcd_print_evt(hba, UFS_EVT_AUTO_HIBERN8_ERR,
456 "auto_hibern8_err");
457 ufshcd_print_evt(hba, UFS_EVT_FATAL_ERR, "fatal_err");
458 ufshcd_print_evt(hba, UFS_EVT_LINK_STARTUP_FAIL,
459 "link_startup_fail");
460 ufshcd_print_evt(hba, UFS_EVT_RESUME_ERR, "resume_fail");
461 ufshcd_print_evt(hba, UFS_EVT_SUSPEND_ERR,
462 "suspend_fail");
463 ufshcd_print_evt(hba, UFS_EVT_DEV_RESET, "dev_reset");
464 ufshcd_print_evt(hba, UFS_EVT_HOST_RESET, "host_reset");
465 ufshcd_print_evt(hba, UFS_EVT_ABORT, "task_abort");
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800466
Stanley Chu7c486d912019-12-24 21:01:06 +0800467 ufshcd_vops_dbg_register_dump(hba);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800468}
469
470static
471void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
472{
473 struct ufshcd_lrb *lrbp;
Gilad Broner7fabb772017-02-03 16:56:50 -0800474 int prdt_length;
Dolev Raviv66cc8202016-12-22 18:39:42 -0800475 int tag;
476
477 for_each_set_bit(tag, &bitmap, hba->nutrs) {
478 lrbp = &hba->lrb[tag];
479
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800480 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
481 tag, ktime_to_us(lrbp->issue_time_stamp));
Zang Leigang09017182017-09-27 10:06:06 +0800482 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
483 tag, ktime_to_us(lrbp->compl_time_stamp));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800484 dev_err(hba->dev,
485 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
486 tag, (u64)lrbp->utrd_dma_addr);
487
Dolev Raviv66cc8202016-12-22 18:39:42 -0800488 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
489 sizeof(struct utp_transfer_req_desc));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800490 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
491 (u64)lrbp->ucd_req_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800492 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
493 sizeof(struct utp_upiu_req));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800494 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
495 (u64)lrbp->ucd_rsp_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800496 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
497 sizeof(struct utp_upiu_rsp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800498
Gilad Broner7fabb772017-02-03 16:56:50 -0800499 prdt_length = le16_to_cpu(
500 lrbp->utr_descriptor_ptr->prd_table_length);
Eric Biggerscc770ce2020-08-25 19:10:40 -0700501 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
502 prdt_length /= sizeof(struct ufshcd_sg_entry);
503
Gilad Broner7fabb772017-02-03 16:56:50 -0800504 dev_err(hba->dev,
505 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
506 tag, prdt_length,
507 (u64)lrbp->ucd_prdt_dma_addr);
508
509 if (pr_prdt)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800510 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
Gilad Broner7fabb772017-02-03 16:56:50 -0800511 sizeof(struct ufshcd_sg_entry) * prdt_length);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800512 }
513}
514
515static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
516{
Dolev Raviv66cc8202016-12-22 18:39:42 -0800517 int tag;
518
519 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
Christoph Hellwig391e3882018-10-07 17:30:32 +0300520 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
521
Dolev Raviv66cc8202016-12-22 18:39:42 -0800522 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
Christoph Hellwig391e3882018-10-07 17:30:32 +0300523 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800524 }
525}
526
Gilad Broner6ba65582017-02-03 16:57:28 -0800527static void ufshcd_print_host_state(struct ufs_hba *hba)
528{
Can Guo3f8af602020-08-09 05:15:50 -0700529 struct scsi_device *sdev_ufs = hba->sdev_ufs_device;
530
Gilad Broner6ba65582017-02-03 16:57:28 -0800531 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
Bart Van Assche7252a362019-12-09 10:13:08 -0800532 dev_err(hba->dev, "outstanding reqs=0x%lx tasks=0x%lx\n",
533 hba->outstanding_reqs, hba->outstanding_tasks);
Gilad Broner6ba65582017-02-03 16:57:28 -0800534 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
535 hba->saved_err, hba->saved_uic_err);
536 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
537 hba->curr_dev_pwr_mode, hba->uic_link_state);
538 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
539 hba->pm_op_in_progress, hba->is_sys_suspended);
540 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
541 hba->auto_bkops_enabled, hba->host->host_self_blocked);
542 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
Can Guo3f8af602020-08-09 05:15:50 -0700543 dev_err(hba->dev,
544 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt=%d\n",
545 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
546 hba->ufs_stats.hibern8_exit_cnt);
547 dev_err(hba->dev, "last intr at %lld us, last intr status=0x%x\n",
548 ktime_to_us(hba->ufs_stats.last_intr_ts),
549 hba->ufs_stats.last_intr_status);
Gilad Broner6ba65582017-02-03 16:57:28 -0800550 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
551 hba->eh_flags, hba->req_abort_count);
Can Guo3f8af602020-08-09 05:15:50 -0700552 dev_err(hba->dev, "hba->ufs_version=0x%x, Host capabilities=0x%x, caps=0x%x\n",
553 hba->ufs_version, hba->capabilities, hba->caps);
Gilad Broner6ba65582017-02-03 16:57:28 -0800554 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
555 hba->dev_quirks);
Can Guo3f8af602020-08-09 05:15:50 -0700556 if (sdev_ufs)
557 dev_err(hba->dev, "UFS dev info: %.8s %.16s rev %.4s\n",
558 sdev_ufs->vendor, sdev_ufs->model, sdev_ufs->rev);
559
560 ufshcd_print_clk_freqs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -0800561}
562
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800563/**
564 * ufshcd_print_pwr_info - print power params as saved in hba
565 * power info
566 * @hba: per-adapter instance
567 */
568static void ufshcd_print_pwr_info(struct ufs_hba *hba)
569{
570 static const char * const names[] = {
571 "INVALID MODE",
572 "FAST MODE",
573 "SLOW_MODE",
574 "INVALID MODE",
575 "FASTAUTO_MODE",
576 "SLOWAUTO_MODE",
577 "INVALID MODE",
578 };
579
580 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
581 __func__,
582 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
583 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
584 names[hba->pwr_info.pwr_rx],
585 names[hba->pwr_info.pwr_tx],
586 hba->pwr_info.hs_rate);
587}
588
Stanley Chu31a5d9c2020-12-08 21:56:35 +0800589static void ufshcd_device_reset(struct ufs_hba *hba)
590{
591 int err;
592
593 err = ufshcd_vops_device_reset(hba);
594
595 if (!err) {
596 ufshcd_set_ufs_dev_active(hba);
597 if (ufshcd_is_wb_allowed(hba)) {
Bean Huo4cd48992021-01-19 17:38:46 +0100598 hba->dev_info.wb_enabled = false;
599 hba->dev_info.wb_buf_flush_enabled = false;
Stanley Chu31a5d9c2020-12-08 21:56:35 +0800600 }
601 }
602 if (err != -EOPNOTSUPP)
603 ufshcd_update_evt_hist(hba, UFS_EVT_DEV_RESET, err);
604}
605
Stanley Chu5c955c12020-03-18 18:40:12 +0800606void ufshcd_delay_us(unsigned long us, unsigned long tolerance)
607{
608 if (!us)
609 return;
610
611 if (us < 10)
612 udelay(us);
613 else
614 usleep_range(us, us + tolerance);
615}
616EXPORT_SYMBOL_GPL(ufshcd_delay_us);
617
Bart Van Assche5cac1092020-05-07 15:27:50 -0700618/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530619 * ufshcd_wait_for_register - wait for register value to change
Bart Van Assche5cac1092020-05-07 15:27:50 -0700620 * @hba: per-adapter interface
621 * @reg: mmio register offset
622 * @mask: mask to apply to the read register value
623 * @val: value to wait for
624 * @interval_us: polling interval in microseconds
625 * @timeout_ms: timeout in milliseconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530626 *
Bart Van Assche5cac1092020-05-07 15:27:50 -0700627 * Return:
628 * -ETIMEDOUT on error, zero on success.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530629 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200630int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
631 u32 val, unsigned long interval_us,
Bart Van Assche5cac1092020-05-07 15:27:50 -0700632 unsigned long timeout_ms)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530633{
634 int err = 0;
635 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
636
637 /* ignore bits that we don't intend to wait on */
638 val = val & mask;
639
640 while ((ufshcd_readl(hba, reg) & mask) != val) {
Bart Van Assche5cac1092020-05-07 15:27:50 -0700641 usleep_range(interval_us, interval_us + 50);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530642 if (time_after(jiffies, timeout)) {
643 if ((ufshcd_readl(hba, reg) & mask) != val)
644 err = -ETIMEDOUT;
645 break;
646 }
647 }
648
649 return err;
650}
651
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530652/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530653 * ufshcd_get_intr_mask - Get the interrupt bit mask
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800654 * @hba: Pointer to adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530655 *
656 * Returns interrupt bit mask per version
657 */
658static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
659{
Caleb Connolly51428812021-03-10 15:33:42 +0000660 if (hba->ufs_version == ufshci_version(1, 0))
661 return INTERRUPT_MASK_ALL_VER_10;
662 if (hba->ufs_version <= ufshci_version(2, 0))
663 return INTERRUPT_MASK_ALL_VER_11;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800664
Caleb Connolly51428812021-03-10 15:33:42 +0000665 return INTERRUPT_MASK_ALL_VER_21;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530666}
667
668/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530669 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800670 * @hba: Pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530671 *
672 * Returns UFSHCI version supported by the controller
673 */
674static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
675{
Caleb Connolly51428812021-03-10 15:33:42 +0000676 u32 ufshci_ver;
Yaniv Gardi9949e702015-05-17 18:55:05 +0300677
Caleb Connolly51428812021-03-10 15:33:42 +0000678 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
679 ufshci_ver = ufshcd_vops_get_ufs_hci_version(hba);
680 else
681 ufshci_ver = ufshcd_readl(hba, REG_UFS_VERSION);
682
683 /*
684 * UFSHCI v1.x uses a different version scheme, in order
685 * to allow the use of comparisons with the ufshci_version
686 * function, we convert it to the same scheme as ufs 2.0+.
687 */
688 if (ufshci_ver & 0x00010000)
689 return ufshci_version(1, ufshci_ver & 0x00000100);
690
691 return ufshci_ver;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530692}
693
694/**
695 * ufshcd_is_device_present - Check if any device connected to
696 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300697 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530698 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300699 * Returns true if device present, false if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530700 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300701static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530702{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300703 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300704 DEVICE_PRESENT) ? true : false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530705}
706
707/**
708 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800709 * @lrbp: pointer to local command reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530710 *
711 * This function is used to get the OCS field from UTRD
712 * Returns the OCS field in the UTRD
713 */
714static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
715{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530716 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530717}
718
719/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530720 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
721 * @hba: per adapter instance
722 * @pos: position of the bit to be cleared
723 */
724static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
725{
Alim Akhtar87183842020-05-28 06:46:49 +0530726 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
727 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
728 else
729 ufshcd_writel(hba, ~(1 << pos),
730 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
Alim Akhtar1399c5b2018-05-06 15:44:15 +0530731}
732
733/**
734 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
735 * @hba: per adapter instance
736 * @pos: position of the bit to be cleared
737 */
738static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
739{
Alim Akhtar87183842020-05-28 06:46:49 +0530740 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
741 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
742 else
743 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530744}
745
746/**
747 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
748 * @reg: Register value of host controller status
749 *
750 * Returns integer, 0 on Success and positive value if failed
751 */
752static inline int ufshcd_get_lists_status(u32 reg)
753{
Tomohiro Kusumi6cf16112017-04-26 20:28:58 +0300754 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530755}
756
757/**
758 * ufshcd_get_uic_cmd_result - Get the UIC command result
759 * @hba: Pointer to adapter instance
760 *
761 * This function gets the result of UIC command completion
762 * Returns 0 on success, non zero value on error
763 */
764static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
765{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530766 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530767 MASK_UIC_COMMAND_RESULT;
768}
769
770/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530771 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
772 * @hba: Pointer to adapter instance
773 *
774 * This function gets UIC command argument3
775 * Returns 0 on success, non zero value on error
776 */
777static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
778{
779 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
780}
781
782/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530783 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530784 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530785 */
786static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530787ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530788{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530789 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530790}
791
792/**
793 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
794 * @ucd_rsp_ptr: pointer to response UPIU
795 *
796 * This function gets the response status and scsi_status from response UPIU
797 * Returns the response result code.
798 */
799static inline int
800ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
801{
802 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
803}
804
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530805/*
806 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
807 * from response UPIU
808 * @ucd_rsp_ptr: pointer to response UPIU
809 *
810 * Return the data segment length.
811 */
812static inline unsigned int
813ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
814{
815 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
816 MASK_RSP_UPIU_DATA_SEG_LEN;
817}
818
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530819/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530820 * ufshcd_is_exception_event - Check if the device raised an exception event
821 * @ucd_rsp_ptr: pointer to response UPIU
822 *
823 * The function checks if the device raised an exception event indicated in
824 * the Device Information field of response UPIU.
825 *
826 * Returns true if exception is raised, false otherwise.
827 */
828static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
829{
830 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
831 MASK_RSP_EXCEPTION_EVENT ? true : false;
832}
833
834/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530835 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530836 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530837 */
838static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530839ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530840{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530841 ufshcd_writel(hba, INT_AGGR_ENABLE |
842 INT_AGGR_COUNTER_AND_TIMER_RESET,
843 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
844}
845
846/**
847 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
848 * @hba: per adapter instance
849 * @cnt: Interrupt aggregation counter threshold
850 * @tmout: Interrupt aggregation timeout value
851 */
852static inline void
853ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
854{
855 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
856 INT_AGGR_COUNTER_THLD_VAL(cnt) |
857 INT_AGGR_TIMEOUT_VAL(tmout),
858 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530859}
860
861/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300862 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
863 * @hba: per adapter instance
864 */
865static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
866{
867 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
868}
869
870/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530871 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
872 * When run-stop registers are set to 1, it indicates the
873 * host controller that it can process the requests
874 * @hba: per adapter instance
875 */
876static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
877{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530878 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
879 REG_UTP_TASK_REQ_LIST_RUN_STOP);
880 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
881 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530882}
883
884/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530885 * ufshcd_hba_start - Start controller initialization sequence
886 * @hba: per adapter instance
887 */
888static inline void ufshcd_hba_start(struct ufs_hba *hba)
889{
Satya Tangiraladf043c742020-07-06 20:04:14 +0000890 u32 val = CONTROLLER_ENABLE;
891
892 if (ufshcd_crypto_enable(hba))
893 val |= CRYPTO_GENERAL_ENABLE;
894
895 ufshcd_writel(hba, val, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530896}
897
898/**
899 * ufshcd_is_hba_active - Get controller state
900 * @hba: per adapter instance
901 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300902 * Returns false if controller is active, true otherwise
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530903 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300904static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530905{
Tomohiro Kusumi4a8eec22017-03-28 16:49:25 +0300906 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
907 ? false : true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530908}
909
Yaniv Gardi37113102016-03-10 17:37:16 +0200910u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
911{
912 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
Caleb Connolly51428812021-03-10 15:33:42 +0000913 if (hba->ufs_version <= ufshci_version(1, 1))
Yaniv Gardi37113102016-03-10 17:37:16 +0200914 return UFS_UNIPRO_VER_1_41;
915 else
916 return UFS_UNIPRO_VER_1_6;
917}
918EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
919
920static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
921{
922 /*
923 * If both host and device support UniPro ver1.6 or later, PA layer
924 * parameters tuning happens during link startup itself.
925 *
926 * We can manually tune PA layer parameters if either host or device
927 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
928 * logic simple, we will only do manual tuning if local unipro version
929 * doesn't support ver1.6 or later.
930 */
931 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
932 return true;
933 else
934 return false;
935}
936
Subhash Jadavani394b9492020-03-26 02:25:40 -0700937/**
938 * ufshcd_set_clk_freq - set UFS controller clock frequencies
939 * @hba: per adapter instance
940 * @scale_up: If True, set max possible frequency othewise set low frequency
941 *
942 * Returns 0 if successful
943 * Returns < 0 for any other errors
944 */
945static int ufshcd_set_clk_freq(struct ufs_hba *hba, bool scale_up)
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800946{
947 int ret = 0;
948 struct ufs_clk_info *clki;
949 struct list_head *head = &hba->clk_list_head;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800950
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300951 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800952 goto out;
953
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800954 list_for_each_entry(clki, head, list) {
955 if (!IS_ERR_OR_NULL(clki->clk)) {
956 if (scale_up && clki->max_freq) {
957 if (clki->curr_freq == clki->max_freq)
958 continue;
959
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800960 ret = clk_set_rate(clki->clk, clki->max_freq);
961 if (ret) {
962 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
963 __func__, clki->name,
964 clki->max_freq, ret);
965 break;
966 }
967 trace_ufshcd_clk_scaling(dev_name(hba->dev),
968 "scaled up", clki->name,
969 clki->curr_freq,
970 clki->max_freq);
971
972 clki->curr_freq = clki->max_freq;
973
974 } else if (!scale_up && clki->min_freq) {
975 if (clki->curr_freq == clki->min_freq)
976 continue;
977
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800978 ret = clk_set_rate(clki->clk, clki->min_freq);
979 if (ret) {
980 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
981 __func__, clki->name,
982 clki->min_freq, ret);
983 break;
984 }
985 trace_ufshcd_clk_scaling(dev_name(hba->dev),
986 "scaled down", clki->name,
987 clki->curr_freq,
988 clki->min_freq);
989 clki->curr_freq = clki->min_freq;
990 }
991 }
992 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
993 clki->name, clk_get_rate(clki->clk));
994 }
995
Subhash Jadavani394b9492020-03-26 02:25:40 -0700996out:
997 return ret;
998}
999
1000/**
1001 * ufshcd_scale_clks - scale up or scale down UFS controller clocks
1002 * @hba: per adapter instance
1003 * @scale_up: True if scaling up and false if scaling down
1004 *
1005 * Returns 0 if successful
1006 * Returns < 0 for any other errors
1007 */
1008static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
1009{
1010 int ret = 0;
1011 ktime_t start = ktime_get();
1012
1013 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
1014 if (ret)
1015 goto out;
1016
1017 ret = ufshcd_set_clk_freq(hba, scale_up);
1018 if (ret)
1019 goto out;
1020
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001021 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
Subhash Jadavani394b9492020-03-26 02:25:40 -07001022 if (ret)
1023 ufshcd_set_clk_freq(hba, !scale_up);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001024
1025out:
Subhash Jadavani394b9492020-03-26 02:25:40 -07001026 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001027 (scale_up ? "up" : "down"),
1028 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1029 return ret;
1030}
1031
1032/**
1033 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
1034 * @hba: per adapter instance
1035 * @scale_up: True if scaling up and false if scaling down
1036 *
1037 * Returns true if scaling is required, false otherwise.
1038 */
1039static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
1040 bool scale_up)
1041{
1042 struct ufs_clk_info *clki;
1043 struct list_head *head = &hba->clk_list_head;
1044
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03001045 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001046 return false;
1047
1048 list_for_each_entry(clki, head, list) {
1049 if (!IS_ERR_OR_NULL(clki->clk)) {
1050 if (scale_up && clki->max_freq) {
1051 if (clki->curr_freq == clki->max_freq)
1052 continue;
1053 return true;
1054 } else if (!scale_up && clki->min_freq) {
1055 if (clki->curr_freq == clki->min_freq)
1056 continue;
1057 return true;
1058 }
1059 }
1060 }
1061
1062 return false;
1063}
1064
1065static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
1066 u64 wait_timeout_us)
1067{
1068 unsigned long flags;
1069 int ret = 0;
1070 u32 tm_doorbell;
1071 u32 tr_doorbell;
1072 bool timeout = false, do_last_check = false;
1073 ktime_t start;
1074
1075 ufshcd_hold(hba, false);
1076 spin_lock_irqsave(hba->host->host_lock, flags);
1077 /*
1078 * Wait for all the outstanding tasks/transfer requests.
1079 * Verify by checking the doorbell registers are clear.
1080 */
1081 start = ktime_get();
1082 do {
1083 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1084 ret = -EBUSY;
1085 goto out;
1086 }
1087
1088 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1089 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1090 if (!tm_doorbell && !tr_doorbell) {
1091 timeout = false;
1092 break;
1093 } else if (do_last_check) {
1094 break;
1095 }
1096
1097 spin_unlock_irqrestore(hba->host->host_lock, flags);
1098 schedule();
1099 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1100 wait_timeout_us) {
1101 timeout = true;
1102 /*
1103 * We might have scheduled out for long time so make
1104 * sure to check if doorbells are cleared by this time
1105 * or not.
1106 */
1107 do_last_check = true;
1108 }
1109 spin_lock_irqsave(hba->host->host_lock, flags);
1110 } while (tm_doorbell || tr_doorbell);
1111
1112 if (timeout) {
1113 dev_err(hba->dev,
1114 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1115 __func__, tm_doorbell, tr_doorbell);
1116 ret = -EBUSY;
1117 }
1118out:
1119 spin_unlock_irqrestore(hba->host->host_lock, flags);
1120 ufshcd_release(hba);
1121 return ret;
1122}
1123
1124/**
1125 * ufshcd_scale_gear - scale up/down UFS gear
1126 * @hba: per adapter instance
1127 * @scale_up: True for scaling up gear and false for scaling down
1128 *
1129 * Returns 0 for success,
1130 * Returns -EBUSY if scaling can't happen at this time
1131 * Returns non-zero for any other errors
1132 */
1133static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1134{
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001135 int ret = 0;
1136 struct ufs_pa_layer_attr new_pwr_info;
1137
1138 if (scale_up) {
1139 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1140 sizeof(struct ufs_pa_layer_attr));
1141 } else {
1142 memcpy(&new_pwr_info, &hba->pwr_info,
1143 sizeof(struct ufs_pa_layer_attr));
1144
Can Guo29b87e92020-11-26 17:58:48 -08001145 if (hba->pwr_info.gear_tx > hba->clk_scaling.min_gear ||
1146 hba->pwr_info.gear_rx > hba->clk_scaling.min_gear) {
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001147 /* save the current power mode */
1148 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1149 &hba->pwr_info,
1150 sizeof(struct ufs_pa_layer_attr));
1151
1152 /* scale down gear */
Can Guo29b87e92020-11-26 17:58:48 -08001153 new_pwr_info.gear_tx = hba->clk_scaling.min_gear;
1154 new_pwr_info.gear_rx = hba->clk_scaling.min_gear;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001155 }
1156 }
1157
1158 /* check if the power mode needs to be changed or not? */
Can Guo6a9df812020-02-11 21:38:28 -08001159 ret = ufshcd_config_pwr_mode(hba, &new_pwr_info);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001160 if (ret)
1161 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1162 __func__, ret,
1163 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1164 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1165
1166 return ret;
1167}
1168
1169static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1170{
1171 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1172 int ret = 0;
1173 /*
1174 * make sure that there are no outstanding requests when
1175 * clock scaling is in progress
1176 */
Subhash Jadavani38135532018-05-03 16:37:18 +05301177 ufshcd_scsi_block_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001178 down_write(&hba->clk_scaling_lock);
Can Guo0e9d4ca2021-01-20 02:04:21 -08001179
1180 if (!hba->clk_scaling.is_allowed ||
1181 ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001182 ret = -EBUSY;
1183 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301184 ufshcd_scsi_unblock_requests(hba);
Can Guo0e9d4ca2021-01-20 02:04:21 -08001185 goto out;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001186 }
1187
Can Guo0e9d4ca2021-01-20 02:04:21 -08001188 /* let's not get into low power until clock scaling is completed */
1189 ufshcd_hold(hba, false);
1190
1191out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001192 return ret;
1193}
1194
Can Guo0e9d4ca2021-01-20 02:04:21 -08001195static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba, bool writelock)
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001196{
Can Guo0e9d4ca2021-01-20 02:04:21 -08001197 if (writelock)
1198 up_write(&hba->clk_scaling_lock);
1199 else
1200 up_read(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301201 ufshcd_scsi_unblock_requests(hba);
Can Guo0e9d4ca2021-01-20 02:04:21 -08001202 ufshcd_release(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001203}
1204
1205/**
1206 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1207 * @hba: per adapter instance
1208 * @scale_up: True for scaling up and false for scalin down
1209 *
1210 * Returns 0 for success,
1211 * Returns -EBUSY if scaling can't happen at this time
1212 * Returns non-zero for any other errors
1213 */
1214static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1215{
1216 int ret = 0;
Can Guo0e9d4ca2021-01-20 02:04:21 -08001217 bool is_writelock = true;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001218
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001219 ret = ufshcd_clock_scaling_prepare(hba);
1220 if (ret)
Can Guo0e9d4ca2021-01-20 02:04:21 -08001221 return ret;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001222
1223 /* scale down the gear before scaling down clocks */
1224 if (!scale_up) {
1225 ret = ufshcd_scale_gear(hba, false);
1226 if (ret)
Subhash Jadavani394b9492020-03-26 02:25:40 -07001227 goto out_unprepare;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001228 }
1229
1230 ret = ufshcd_scale_clks(hba, scale_up);
1231 if (ret) {
1232 if (!scale_up)
1233 ufshcd_scale_gear(hba, true);
Subhash Jadavani394b9492020-03-26 02:25:40 -07001234 goto out_unprepare;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001235 }
1236
1237 /* scale up the gear after scaling up clocks */
1238 if (scale_up) {
1239 ret = ufshcd_scale_gear(hba, true);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001240 if (ret) {
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001241 ufshcd_scale_clks(hba, false);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001242 goto out_unprepare;
1243 }
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001244 }
1245
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001246 /* Enable Write Booster if we have scaled up else disable it */
Can Guo0e9d4ca2021-01-20 02:04:21 -08001247 downgrade_write(&hba->clk_scaling_lock);
1248 is_writelock = false;
Yue Hu3b5f3c02021-03-18 17:55:36 +08001249 ufshcd_wb_toggle(hba, scale_up);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001250
Subhash Jadavani394b9492020-03-26 02:25:40 -07001251out_unprepare:
Can Guo0e9d4ca2021-01-20 02:04:21 -08001252 ufshcd_clock_scaling_unprepare(hba, is_writelock);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001253 return ret;
1254}
1255
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001256static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1257{
1258 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1259 clk_scaling.suspend_work);
1260 unsigned long irq_flags;
1261
1262 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1263 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1264 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1265 return;
1266 }
1267 hba->clk_scaling.is_suspended = true;
1268 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1269
1270 __ufshcd_suspend_clkscaling(hba);
1271}
1272
1273static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1274{
1275 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1276 clk_scaling.resume_work);
1277 unsigned long irq_flags;
1278
1279 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1280 if (!hba->clk_scaling.is_suspended) {
1281 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1282 return;
1283 }
1284 hba->clk_scaling.is_suspended = false;
1285 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1286
1287 devfreq_resume_device(hba->devfreq);
1288}
1289
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001290static int ufshcd_devfreq_target(struct device *dev,
1291 unsigned long *freq, u32 flags)
1292{
1293 int ret = 0;
1294 struct ufs_hba *hba = dev_get_drvdata(dev);
1295 ktime_t start;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001296 bool scale_up, sched_clk_scaling_suspend_work = false;
Bjorn Andersson092b4552018-05-17 23:26:37 -07001297 struct list_head *clk_list = &hba->clk_list_head;
1298 struct ufs_clk_info *clki;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001299 unsigned long irq_flags;
1300
1301 if (!ufshcd_is_clkscaling_supported(hba))
1302 return -EINVAL;
1303
Asutosh Das91831d32020-03-25 11:29:00 -07001304 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1305 /* Override with the closest supported frequency */
1306 *freq = (unsigned long) clk_round_rate(clki->clk, *freq);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001307 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1308 if (ufshcd_eh_in_progress(hba)) {
1309 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1310 return 0;
1311 }
1312
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001313 if (!hba->clk_scaling.active_reqs)
1314 sched_clk_scaling_suspend_work = true;
1315
Bjorn Andersson092b4552018-05-17 23:26:37 -07001316 if (list_empty(clk_list)) {
1317 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1318 goto out;
1319 }
1320
Asutosh Das91831d32020-03-25 11:29:00 -07001321 /* Decide based on the rounded-off frequency and update */
Bjorn Andersson092b4552018-05-17 23:26:37 -07001322 scale_up = (*freq == clki->max_freq) ? true : false;
Asutosh Das91831d32020-03-25 11:29:00 -07001323 if (!scale_up)
1324 *freq = clki->min_freq;
1325 /* Update the frequency */
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001326 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1327 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1328 ret = 0;
1329 goto out; /* no state change required */
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001330 }
1331 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1332
1333 start = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001334 ret = ufshcd_devfreq_scale(hba, scale_up);
1335
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001336 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1337 (scale_up ? "up" : "down"),
1338 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1339
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001340out:
1341 if (sched_clk_scaling_suspend_work)
1342 queue_work(hba->clk_scaling.workq,
1343 &hba->clk_scaling.suspend_work);
1344
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001345 return ret;
1346}
1347
Bart Van Assche7252a362019-12-09 10:13:08 -08001348static bool ufshcd_is_busy(struct request *req, void *priv, bool reserved)
1349{
1350 int *busy = priv;
1351
1352 WARN_ON_ONCE(reserved);
1353 (*busy)++;
1354 return false;
1355}
1356
1357/* Whether or not any tag is in use by a request that is in progress. */
1358static bool ufshcd_any_tag_in_use(struct ufs_hba *hba)
1359{
1360 struct request_queue *q = hba->cmd_queue;
1361 int busy = 0;
1362
1363 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_is_busy, &busy);
1364 return busy;
1365}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001366
1367static int ufshcd_devfreq_get_dev_status(struct device *dev,
1368 struct devfreq_dev_status *stat)
1369{
1370 struct ufs_hba *hba = dev_get_drvdata(dev);
1371 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1372 unsigned long flags;
Asutosh Das91831d32020-03-25 11:29:00 -07001373 struct list_head *clk_list = &hba->clk_list_head;
1374 struct ufs_clk_info *clki;
Stanley Chub1bf66d2020-06-11 18:10:43 +08001375 ktime_t curr_t;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001376
1377 if (!ufshcd_is_clkscaling_supported(hba))
1378 return -EINVAL;
1379
1380 memset(stat, 0, sizeof(*stat));
1381
1382 spin_lock_irqsave(hba->host->host_lock, flags);
Stanley Chub1bf66d2020-06-11 18:10:43 +08001383 curr_t = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001384 if (!scaling->window_start_t)
1385 goto start_window;
1386
Asutosh Das91831d32020-03-25 11:29:00 -07001387 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1388 /*
1389 * If current frequency is 0, then the ondemand governor considers
1390 * there's no initial frequency set. And it always requests to set
1391 * to max. frequency.
1392 */
1393 stat->current_frequency = clki->curr_freq;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001394 if (scaling->is_busy_started)
Stanley Chub1bf66d2020-06-11 18:10:43 +08001395 scaling->tot_busy_t += ktime_us_delta(curr_t,
1396 scaling->busy_start_t);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001397
Stanley Chub1bf66d2020-06-11 18:10:43 +08001398 stat->total_time = ktime_us_delta(curr_t, scaling->window_start_t);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001399 stat->busy_time = scaling->tot_busy_t;
1400start_window:
Stanley Chub1bf66d2020-06-11 18:10:43 +08001401 scaling->window_start_t = curr_t;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001402 scaling->tot_busy_t = 0;
1403
1404 if (hba->outstanding_reqs) {
Stanley Chub1bf66d2020-06-11 18:10:43 +08001405 scaling->busy_start_t = curr_t;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001406 scaling->is_busy_started = true;
1407 } else {
1408 scaling->busy_start_t = 0;
1409 scaling->is_busy_started = false;
1410 }
1411 spin_unlock_irqrestore(hba->host->host_lock, flags);
1412 return 0;
1413}
1414
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001415static int ufshcd_devfreq_init(struct ufs_hba *hba)
1416{
Bjorn Andersson092b4552018-05-17 23:26:37 -07001417 struct list_head *clk_list = &hba->clk_list_head;
1418 struct ufs_clk_info *clki;
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001419 struct devfreq *devfreq;
1420 int ret;
1421
Bjorn Andersson092b4552018-05-17 23:26:37 -07001422 /* Skip devfreq if we don't have any clocks in the list */
1423 if (list_empty(clk_list))
1424 return 0;
1425
1426 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1427 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1428 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1429
Stanley Chu90b84912020-05-09 17:37:13 +08001430 ufshcd_vops_config_scaling_param(hba, &hba->vps->devfreq_profile,
1431 &hba->vps->ondemand_data);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001432 devfreq = devfreq_add_device(hba->dev,
Stanley Chu90b84912020-05-09 17:37:13 +08001433 &hba->vps->devfreq_profile,
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001434 DEVFREQ_GOV_SIMPLE_ONDEMAND,
Stanley Chu90b84912020-05-09 17:37:13 +08001435 &hba->vps->ondemand_data);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001436 if (IS_ERR(devfreq)) {
1437 ret = PTR_ERR(devfreq);
1438 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001439
1440 dev_pm_opp_remove(hba->dev, clki->min_freq);
1441 dev_pm_opp_remove(hba->dev, clki->max_freq);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001442 return ret;
1443 }
1444
1445 hba->devfreq = devfreq;
1446
1447 return 0;
1448}
1449
Bjorn Andersson092b4552018-05-17 23:26:37 -07001450static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1451{
1452 struct list_head *clk_list = &hba->clk_list_head;
1453 struct ufs_clk_info *clki;
1454
1455 if (!hba->devfreq)
1456 return;
1457
1458 devfreq_remove_device(hba->devfreq);
1459 hba->devfreq = NULL;
1460
1461 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1462 dev_pm_opp_remove(hba->dev, clki->min_freq);
1463 dev_pm_opp_remove(hba->dev, clki->max_freq);
1464}
1465
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001466static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1467{
1468 unsigned long flags;
1469
1470 devfreq_suspend_device(hba->devfreq);
1471 spin_lock_irqsave(hba->host->host_lock, flags);
1472 hba->clk_scaling.window_start_t = 0;
1473 spin_unlock_irqrestore(hba->host->host_lock, flags);
1474}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001475
Gilad Bronera5082532016-10-17 17:10:00 -07001476static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1477{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001478 unsigned long flags;
1479 bool suspend = false;
1480
Stanley Chuf9a7fa32021-01-20 23:01:40 +08001481 cancel_work_sync(&hba->clk_scaling.suspend_work);
1482 cancel_work_sync(&hba->clk_scaling.resume_work);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001483
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001484 spin_lock_irqsave(hba->host->host_lock, flags);
1485 if (!hba->clk_scaling.is_suspended) {
1486 suspend = true;
1487 hba->clk_scaling.is_suspended = true;
1488 }
1489 spin_unlock_irqrestore(hba->host->host_lock, flags);
1490
1491 if (suspend)
1492 __ufshcd_suspend_clkscaling(hba);
Gilad Bronera5082532016-10-17 17:10:00 -07001493}
1494
1495static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1496{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001497 unsigned long flags;
1498 bool resume = false;
1499
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001500 spin_lock_irqsave(hba->host->host_lock, flags);
1501 if (hba->clk_scaling.is_suspended) {
1502 resume = true;
1503 hba->clk_scaling.is_suspended = false;
1504 }
1505 spin_unlock_irqrestore(hba->host->host_lock, flags);
1506
1507 if (resume)
1508 devfreq_resume_device(hba->devfreq);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001509}
1510
1511static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1512 struct device_attribute *attr, char *buf)
1513{
1514 struct ufs_hba *hba = dev_get_drvdata(dev);
1515
Jiapeng Chong1481b7f2021-03-02 14:08:18 +08001516 return sysfs_emit(buf, "%d\n", hba->clk_scaling.is_enabled);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001517}
1518
1519static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1520 struct device_attribute *attr, const char *buf, size_t count)
1521{
1522 struct ufs_hba *hba = dev_get_drvdata(dev);
1523 u32 value;
Can Guo9cd20d32021-01-13 19:13:28 -08001524 int err = 0;
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001525
1526 if (kstrtou32(buf, 0, &value))
1527 return -EINVAL;
1528
Can Guo9cd20d32021-01-13 19:13:28 -08001529 down(&hba->host_sem);
1530 if (!ufshcd_is_user_access_allowed(hba)) {
1531 err = -EBUSY;
1532 goto out;
1533 }
1534
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001535 value = !!value;
Can Guo0e9d4ca2021-01-20 02:04:21 -08001536 if (value == hba->clk_scaling.is_enabled)
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001537 goto out;
1538
Asutosh Dasb294ff32021-04-23 17:20:16 -07001539 ufshcd_rpm_get_sync(hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001540 ufshcd_hold(hba, false);
1541
Can Guo0e9d4ca2021-01-20 02:04:21 -08001542 hba->clk_scaling.is_enabled = value;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001543
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001544 if (value) {
1545 ufshcd_resume_clkscaling(hba);
1546 } else {
1547 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001548 err = ufshcd_devfreq_scale(hba, true);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001549 if (err)
1550 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1551 __func__, err);
1552 }
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001553
1554 ufshcd_release(hba);
Asutosh Dasb294ff32021-04-23 17:20:16 -07001555 ufshcd_rpm_put_sync(hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001556out:
Can Guo9cd20d32021-01-13 19:13:28 -08001557 up(&hba->host_sem);
1558 return err ? err : count;
Gilad Bronera5082532016-10-17 17:10:00 -07001559}
1560
Can Guo4543d9d2021-01-20 02:04:22 -08001561static void ufshcd_init_clk_scaling_sysfs(struct ufs_hba *hba)
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001562{
1563 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1564 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1565 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1566 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1567 hba->clk_scaling.enable_attr.attr.mode = 0644;
1568 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1569 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1570}
1571
Can Guo4543d9d2021-01-20 02:04:22 -08001572static void ufshcd_remove_clk_scaling_sysfs(struct ufs_hba *hba)
1573{
1574 if (hba->clk_scaling.enable_attr.attr.name)
1575 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
1576}
1577
1578static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1579{
1580 char wq_name[sizeof("ufs_clkscaling_00")];
1581
1582 if (!ufshcd_is_clkscaling_supported(hba))
1583 return;
1584
Can Guo80d892f2021-01-27 18:49:27 -08001585 if (!hba->clk_scaling.min_gear)
1586 hba->clk_scaling.min_gear = UFS_HS_G1;
1587
Can Guo4543d9d2021-01-20 02:04:22 -08001588 INIT_WORK(&hba->clk_scaling.suspend_work,
1589 ufshcd_clk_scaling_suspend_work);
1590 INIT_WORK(&hba->clk_scaling.resume_work,
1591 ufshcd_clk_scaling_resume_work);
1592
1593 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1594 hba->host->host_no);
1595 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1596
1597 hba->clk_scaling.is_initialized = true;
1598}
1599
1600static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1601{
1602 if (!hba->clk_scaling.is_initialized)
1603 return;
1604
1605 ufshcd_remove_clk_scaling_sysfs(hba);
1606 destroy_workqueue(hba->clk_scaling.workq);
1607 ufshcd_devfreq_remove(hba);
1608 hba->clk_scaling.is_initialized = false;
1609}
1610
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001611static void ufshcd_ungate_work(struct work_struct *work)
1612{
1613 int ret;
1614 unsigned long flags;
1615 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1616 clk_gating.ungate_work);
1617
1618 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1619
1620 spin_lock_irqsave(hba->host->host_lock, flags);
1621 if (hba->clk_gating.state == CLKS_ON) {
1622 spin_unlock_irqrestore(hba->host->host_lock, flags);
1623 goto unblock_reqs;
1624 }
1625
1626 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guodd7143e2020-10-27 12:10:36 -07001627 ufshcd_hba_vreg_set_hpm(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001628 ufshcd_setup_clocks(hba, true);
1629
Stanley Chu8b0bbf02019-12-07 20:22:01 +08001630 ufshcd_enable_irq(hba);
1631
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001632 /* Exit from hibern8 */
1633 if (ufshcd_can_hibern8_during_gating(hba)) {
1634 /* Prevent gating in this path */
1635 hba->clk_gating.is_suspended = true;
1636 if (ufshcd_is_link_hibern8(hba)) {
1637 ret = ufshcd_uic_hibern8_exit(hba);
1638 if (ret)
1639 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1640 __func__, ret);
1641 else
1642 ufshcd_set_link_active(hba);
1643 }
1644 hba->clk_gating.is_suspended = false;
1645 }
1646unblock_reqs:
Subhash Jadavani38135532018-05-03 16:37:18 +05301647 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001648}
1649
1650/**
1651 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1652 * Also, exit from hibern8 mode and set the link as active.
1653 * @hba: per adapter instance
1654 * @async: This indicates whether caller should ungate clocks asynchronously.
1655 */
1656int ufshcd_hold(struct ufs_hba *hba, bool async)
1657{
1658 int rc = 0;
Stanley Chu93b6c5d2020-08-09 13:07:34 +08001659 bool flush_result;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001660 unsigned long flags;
1661
1662 if (!ufshcd_is_clkgating_allowed(hba))
1663 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001664 spin_lock_irqsave(hba->host->host_lock, flags);
1665 hba->clk_gating.active_reqs++;
1666
Sahitya Tummala856b3482014-09-25 15:32:34 +03001667start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001668 switch (hba->clk_gating.state) {
1669 case CLKS_ON:
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001670 /*
1671 * Wait for the ungate work to complete if in progress.
1672 * Though the clocks may be in ON state, the link could
1673 * still be in hibner8 state if hibern8 is allowed
1674 * during clock gating.
1675 * Make sure we exit hibern8 state also in addition to
1676 * clocks being ON.
1677 */
1678 if (ufshcd_can_hibern8_during_gating(hba) &&
1679 ufshcd_is_link_hibern8(hba)) {
Can Guoc63d6092020-02-10 19:40:48 -08001680 if (async) {
1681 rc = -EAGAIN;
1682 hba->clk_gating.active_reqs--;
1683 break;
1684 }
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001685 spin_unlock_irqrestore(hba->host->host_lock, flags);
Stanley Chu93b6c5d2020-08-09 13:07:34 +08001686 flush_result = flush_work(&hba->clk_gating.ungate_work);
1687 if (hba->clk_gating.is_suspended && !flush_result)
1688 goto out;
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001689 spin_lock_irqsave(hba->host->host_lock, flags);
1690 goto start;
1691 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001692 break;
1693 case REQ_CLKS_OFF:
1694 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1695 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001696 trace_ufshcd_clk_gating(dev_name(hba->dev),
1697 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001698 break;
1699 }
1700 /*
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +03001701 * If we are here, it means gating work is either done or
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001702 * currently running. Hence, fall through to cancel gating
1703 * work and to enable clocks.
1704 */
Gustavo A. R. Silvadf561f662020-08-23 17:36:59 -05001705 fallthrough;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001706 case CLKS_OFF:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001707 hba->clk_gating.state = REQ_CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001708 trace_ufshcd_clk_gating(dev_name(hba->dev),
1709 hba->clk_gating.state);
Can Guoda3fecb2020-11-02 22:24:39 -08001710 if (queue_work(hba->clk_gating.clk_gating_workq,
1711 &hba->clk_gating.ungate_work))
1712 ufshcd_scsi_block_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001713 /*
1714 * fall through to check if we should wait for this
1715 * work to be done or not.
1716 */
Gustavo A. R. Silvadf561f662020-08-23 17:36:59 -05001717 fallthrough;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001718 case REQ_CLKS_ON:
1719 if (async) {
1720 rc = -EAGAIN;
1721 hba->clk_gating.active_reqs--;
1722 break;
1723 }
1724
1725 spin_unlock_irqrestore(hba->host->host_lock, flags);
1726 flush_work(&hba->clk_gating.ungate_work);
1727 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001728 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001729 goto start;
1730 default:
1731 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1732 __func__, hba->clk_gating.state);
1733 break;
1734 }
1735 spin_unlock_irqrestore(hba->host->host_lock, flags);
1736out:
1737 return rc;
1738}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001739EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001740
1741static void ufshcd_gate_work(struct work_struct *work)
1742{
1743 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1744 clk_gating.gate_work.work);
1745 unsigned long flags;
Can Guo4db7a232020-08-09 05:15:51 -07001746 int ret;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001747
1748 spin_lock_irqsave(hba->host->host_lock, flags);
Venkat Gopalakrishnan3f0c06d2016-10-17 17:11:07 -07001749 /*
1750 * In case you are here to cancel this work the gating state
1751 * would be marked as REQ_CLKS_ON. In this case save time by
1752 * skipping the gating work and exit after changing the clock
1753 * state to CLKS_ON.
1754 */
1755 if (hba->clk_gating.is_suspended ||
Asutosh Das18f013742019-11-14 22:09:29 -08001756 (hba->clk_gating.state != REQ_CLKS_OFF)) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001757 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001758 trace_ufshcd_clk_gating(dev_name(hba->dev),
1759 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001760 goto rel_lock;
1761 }
1762
1763 if (hba->clk_gating.active_reqs
1764 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
Bart Van Assche7252a362019-12-09 10:13:08 -08001765 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001766 || hba->active_uic_cmd || hba->uic_async_done)
1767 goto rel_lock;
1768
1769 spin_unlock_irqrestore(hba->host->host_lock, flags);
1770
1771 /* put the link into hibern8 mode before turning off clocks */
1772 if (ufshcd_can_hibern8_during_gating(hba)) {
Can Guo4db7a232020-08-09 05:15:51 -07001773 ret = ufshcd_uic_hibern8_enter(hba);
1774 if (ret) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001775 hba->clk_gating.state = CLKS_ON;
Can Guo4db7a232020-08-09 05:15:51 -07001776 dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
1777 __func__, ret);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001778 trace_ufshcd_clk_gating(dev_name(hba->dev),
1779 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001780 goto out;
1781 }
1782 ufshcd_set_link_hibern8(hba);
1783 }
1784
Stanley Chu8b0bbf02019-12-07 20:22:01 +08001785 ufshcd_disable_irq(hba);
1786
Can Guo81309c22020-11-25 18:01:00 -08001787 ufshcd_setup_clocks(hba, false);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001788
Can Guodd7143e2020-10-27 12:10:36 -07001789 /* Put the host controller in low power mode if possible */
1790 ufshcd_hba_vreg_set_lpm(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001791 /*
1792 * In case you are here to cancel this work the gating state
1793 * would be marked as REQ_CLKS_ON. In this case keep the state
1794 * as REQ_CLKS_ON which would anyway imply that clocks are off
1795 * and a request to turn them on is pending. By doing this way,
1796 * we keep the state machine in tact and this would ultimately
1797 * prevent from doing cancel work multiple times when there are
1798 * new requests arriving before the current cancel work is done.
1799 */
1800 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001801 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001802 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001803 trace_ufshcd_clk_gating(dev_name(hba->dev),
1804 hba->clk_gating.state);
1805 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001806rel_lock:
1807 spin_unlock_irqrestore(hba->host->host_lock, flags);
1808out:
1809 return;
1810}
1811
1812/* host lock must be held before calling this variant */
1813static void __ufshcd_release(struct ufs_hba *hba)
1814{
1815 if (!ufshcd_is_clkgating_allowed(hba))
1816 return;
1817
1818 hba->clk_gating.active_reqs--;
1819
Can Guo4db7a232020-08-09 05:15:51 -07001820 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended ||
1821 hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL ||
Jaegeuk Kim8eb456b2020-11-17 08:58:38 -08001822 hba->outstanding_tasks ||
Jaegeuk Kimfd62de12020-11-17 08:58:33 -08001823 hba->active_uic_cmd || hba->uic_async_done ||
1824 hba->clk_gating.state == CLKS_OFF)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001825 return;
1826
1827 hba->clk_gating.state = REQ_CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001828 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Evan Greenf4bb7702018-10-05 10:27:32 -07001829 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1830 &hba->clk_gating.gate_work,
1831 msecs_to_jiffies(hba->clk_gating.delay_ms));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001832}
1833
1834void ufshcd_release(struct ufs_hba *hba)
1835{
1836 unsigned long flags;
1837
1838 spin_lock_irqsave(hba->host->host_lock, flags);
1839 __ufshcd_release(hba);
1840 spin_unlock_irqrestore(hba->host->host_lock, flags);
1841}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001842EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001843
1844static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1845 struct device_attribute *attr, char *buf)
1846{
1847 struct ufs_hba *hba = dev_get_drvdata(dev);
1848
DooHyun Hwangbafd09f2021-02-03 19:14:43 +09001849 return sysfs_emit(buf, "%lu\n", hba->clk_gating.delay_ms);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001850}
1851
1852static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1853 struct device_attribute *attr, const char *buf, size_t count)
1854{
1855 struct ufs_hba *hba = dev_get_drvdata(dev);
1856 unsigned long flags, value;
1857
1858 if (kstrtoul(buf, 0, &value))
1859 return -EINVAL;
1860
1861 spin_lock_irqsave(hba->host->host_lock, flags);
1862 hba->clk_gating.delay_ms = value;
1863 spin_unlock_irqrestore(hba->host->host_lock, flags);
1864 return count;
1865}
1866
Sahitya Tummalab4274112016-12-22 18:40:39 -08001867static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1868 struct device_attribute *attr, char *buf)
1869{
1870 struct ufs_hba *hba = dev_get_drvdata(dev);
1871
DooHyun Hwangbafd09f2021-02-03 19:14:43 +09001872 return sysfs_emit(buf, "%d\n", hba->clk_gating.is_enabled);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001873}
1874
1875static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1876 struct device_attribute *attr, const char *buf, size_t count)
1877{
1878 struct ufs_hba *hba = dev_get_drvdata(dev);
1879 unsigned long flags;
1880 u32 value;
1881
1882 if (kstrtou32(buf, 0, &value))
1883 return -EINVAL;
1884
1885 value = !!value;
Jaegeuk Kimb6645112020-11-17 08:58:34 -08001886
1887 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001888 if (value == hba->clk_gating.is_enabled)
1889 goto out;
1890
Jaegeuk Kimb6645112020-11-17 08:58:34 -08001891 if (value)
1892 __ufshcd_release(hba);
1893 else
Sahitya Tummalab4274112016-12-22 18:40:39 -08001894 hba->clk_gating.active_reqs++;
Sahitya Tummalab4274112016-12-22 18:40:39 -08001895
1896 hba->clk_gating.is_enabled = value;
1897out:
Jaegeuk Kimb6645112020-11-17 08:58:34 -08001898 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001899 return count;
1900}
1901
Can Guo4543d9d2021-01-20 02:04:22 -08001902static void ufshcd_init_clk_gating_sysfs(struct ufs_hba *hba)
Vivek Gautameebcc192018-08-07 23:17:39 +05301903{
Can Guo4543d9d2021-01-20 02:04:22 -08001904 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1905 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1906 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1907 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1908 hba->clk_gating.delay_attr.attr.mode = 0644;
1909 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1910 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Vivek Gautameebcc192018-08-07 23:17:39 +05301911
Can Guo4543d9d2021-01-20 02:04:22 -08001912 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1913 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1914 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1915 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1916 hba->clk_gating.enable_attr.attr.mode = 0644;
1917 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1918 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Vivek Gautameebcc192018-08-07 23:17:39 +05301919}
1920
Can Guo4543d9d2021-01-20 02:04:22 -08001921static void ufshcd_remove_clk_gating_sysfs(struct ufs_hba *hba)
Vivek Gautameebcc192018-08-07 23:17:39 +05301922{
Can Guo4543d9d2021-01-20 02:04:22 -08001923 if (hba->clk_gating.delay_attr.attr.name)
1924 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1925 if (hba->clk_gating.enable_attr.attr.name)
1926 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Vivek Gautameebcc192018-08-07 23:17:39 +05301927}
1928
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001929static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1930{
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301931 char wq_name[sizeof("ufs_clk_gating_00")];
1932
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001933 if (!ufshcd_is_clkgating_allowed(hba))
1934 return;
1935
Can Guo2dec9472020-08-09 05:15:47 -07001936 hba->clk_gating.state = CLKS_ON;
1937
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001938 hba->clk_gating.delay_ms = 150;
1939 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1940 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1941
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301942 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1943 hba->host->host_no);
1944 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
Jaegeuk Kime93e6e42020-11-17 08:58:36 -08001945 WQ_MEM_RECLAIM | WQ_HIGHPRI);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301946
Can Guo4543d9d2021-01-20 02:04:22 -08001947 ufshcd_init_clk_gating_sysfs(hba);
1948
Sahitya Tummalab4274112016-12-22 18:40:39 -08001949 hba->clk_gating.is_enabled = true;
Can Guo4543d9d2021-01-20 02:04:22 -08001950 hba->clk_gating.is_initialized = true;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001951}
1952
1953static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1954{
Can Guo4543d9d2021-01-20 02:04:22 -08001955 if (!hba->clk_gating.is_initialized)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001956 return;
Can Guo4543d9d2021-01-20 02:04:22 -08001957 ufshcd_remove_clk_gating_sysfs(hba);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001958 cancel_work_sync(&hba->clk_gating.ungate_work);
1959 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301960 destroy_workqueue(hba->clk_gating.clk_gating_workq);
Can Guo4543d9d2021-01-20 02:04:22 -08001961 hba->clk_gating.is_initialized = false;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001962}
1963
Sahitya Tummala856b3482014-09-25 15:32:34 +03001964/* Must be called with host lock acquired */
1965static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1966{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001967 bool queue_resume_work = false;
Stanley Chub1bf66d2020-06-11 18:10:43 +08001968 ktime_t curr_t = ktime_get();
Can Guoa45f9372021-05-24 01:36:57 -07001969 unsigned long flags;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001970
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001971 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001972 return;
1973
Can Guoa45f9372021-05-24 01:36:57 -07001974 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001975 if (!hba->clk_scaling.active_reqs++)
1976 queue_resume_work = true;
1977
Can Guoa45f9372021-05-24 01:36:57 -07001978 if (!hba->clk_scaling.is_enabled || hba->pm_op_in_progress) {
1979 spin_unlock_irqrestore(hba->host->host_lock, flags);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001980 return;
Can Guoa45f9372021-05-24 01:36:57 -07001981 }
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001982
1983 if (queue_resume_work)
1984 queue_work(hba->clk_scaling.workq,
1985 &hba->clk_scaling.resume_work);
1986
1987 if (!hba->clk_scaling.window_start_t) {
Stanley Chub1bf66d2020-06-11 18:10:43 +08001988 hba->clk_scaling.window_start_t = curr_t;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001989 hba->clk_scaling.tot_busy_t = 0;
1990 hba->clk_scaling.is_busy_started = false;
1991 }
1992
Sahitya Tummala856b3482014-09-25 15:32:34 +03001993 if (!hba->clk_scaling.is_busy_started) {
Stanley Chub1bf66d2020-06-11 18:10:43 +08001994 hba->clk_scaling.busy_start_t = curr_t;
Sahitya Tummala856b3482014-09-25 15:32:34 +03001995 hba->clk_scaling.is_busy_started = true;
1996 }
Can Guoa45f9372021-05-24 01:36:57 -07001997 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sahitya Tummala856b3482014-09-25 15:32:34 +03001998}
1999
2000static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
2001{
2002 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
Can Guoa45f9372021-05-24 01:36:57 -07002003 unsigned long flags;
Sahitya Tummala856b3482014-09-25 15:32:34 +03002004
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08002005 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03002006 return;
2007
Can Guoa45f9372021-05-24 01:36:57 -07002008 spin_lock_irqsave(hba->host->host_lock, flags);
2009 hba->clk_scaling.active_reqs--;
Sahitya Tummala856b3482014-09-25 15:32:34 +03002010 if (!hba->outstanding_reqs && scaling->is_busy_started) {
2011 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
2012 scaling->busy_start_t));
Thomas Gleixner8b0e1952016-12-25 12:30:41 +01002013 scaling->busy_start_t = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03002014 scaling->is_busy_started = false;
2015 }
Can Guoa45f9372021-05-24 01:36:57 -07002016 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sahitya Tummala856b3482014-09-25 15:32:34 +03002017}
Can Guo1d8613a2021-04-21 19:28:39 -07002018
2019static inline int ufshcd_monitor_opcode2dir(u8 opcode)
2020{
2021 if (opcode == READ_6 || opcode == READ_10 || opcode == READ_16)
2022 return READ;
2023 else if (opcode == WRITE_6 || opcode == WRITE_10 || opcode == WRITE_16)
2024 return WRITE;
2025 else
2026 return -EINVAL;
2027}
2028
2029static inline bool ufshcd_should_inform_monitor(struct ufs_hba *hba,
2030 struct ufshcd_lrb *lrbp)
2031{
2032 struct ufs_hba_monitor *m = &hba->monitor;
2033
2034 return (m->enabled && lrbp && lrbp->cmd &&
2035 (!m->chunk_size || m->chunk_size == lrbp->cmd->sdb.length) &&
2036 ktime_before(hba->monitor.enabled_ts, lrbp->issue_time_stamp));
2037}
2038
2039static void ufshcd_start_monitor(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2040{
2041 int dir = ufshcd_monitor_opcode2dir(*lrbp->cmd->cmnd);
Can Guoa45f9372021-05-24 01:36:57 -07002042 unsigned long flags;
Can Guo1d8613a2021-04-21 19:28:39 -07002043
Can Guoa45f9372021-05-24 01:36:57 -07002044 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo1d8613a2021-04-21 19:28:39 -07002045 if (dir >= 0 && hba->monitor.nr_queued[dir]++ == 0)
2046 hba->monitor.busy_start_ts[dir] = ktime_get();
Can Guoa45f9372021-05-24 01:36:57 -07002047 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guo1d8613a2021-04-21 19:28:39 -07002048}
2049
2050static void ufshcd_update_monitor(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2051{
2052 int dir = ufshcd_monitor_opcode2dir(*lrbp->cmd->cmnd);
Can Guoa45f9372021-05-24 01:36:57 -07002053 unsigned long flags;
Can Guo1d8613a2021-04-21 19:28:39 -07002054
Can Guoa45f9372021-05-24 01:36:57 -07002055 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo1d8613a2021-04-21 19:28:39 -07002056 if (dir >= 0 && hba->monitor.nr_queued[dir] > 0) {
Bart Van Assche3f2c1002021-08-09 16:03:50 -07002057 struct request *req = scsi_cmd_to_rq(lrbp->cmd);
Can Guo1d8613a2021-04-21 19:28:39 -07002058 struct ufs_hba_monitor *m = &hba->monitor;
2059 ktime_t now, inc, lat;
2060
2061 now = lrbp->compl_time_stamp;
2062 inc = ktime_sub(now, m->busy_start_ts[dir]);
2063 m->total_busy[dir] = ktime_add(m->total_busy[dir], inc);
2064 m->nr_sec_rw[dir] += blk_rq_sectors(req);
2065
2066 /* Update latencies */
2067 m->nr_req[dir]++;
2068 lat = ktime_sub(now, lrbp->issue_time_stamp);
2069 m->lat_sum[dir] += lat;
2070 if (m->lat_max[dir] < lat || !m->lat_max[dir])
2071 m->lat_max[dir] = lat;
2072 if (m->lat_min[dir] > lat || !m->lat_min[dir])
2073 m->lat_min[dir] = lat;
2074
2075 m->nr_queued[dir]--;
2076 /* Push forward the busy start of monitor */
2077 m->busy_start_ts[dir] = now;
2078 }
Can Guoa45f9372021-05-24 01:36:57 -07002079 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guo1d8613a2021-04-21 19:28:39 -07002080}
2081
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302082/**
2083 * ufshcd_send_command - Send SCSI or device management commands
2084 * @hba: per adapter instance
2085 * @task_tag: Task tag of the command
2086 */
2087static inline
2088void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
2089{
Stanley Chu6edfdcf2020-07-06 14:07:07 +08002090 struct ufshcd_lrb *lrbp = &hba->lrb[task_tag];
Bart Van Assche1f522c52021-07-21 20:34:32 -07002091 unsigned long flags;
Stanley Chu6edfdcf2020-07-06 14:07:07 +08002092
2093 lrbp->issue_time_stamp = ktime_get();
2094 lrbp->compl_time_stamp = ktime_set(0, 0);
Bean Huo28fa68f2021-01-05 12:34:42 +01002095 ufshcd_add_command_trace(hba, task_tag, UFS_CMD_SEND);
Sahitya Tummala856b3482014-09-25 15:32:34 +03002096 ufshcd_clk_scaling_start_busy(hba);
Can Guo1d8613a2021-04-21 19:28:39 -07002097 if (unlikely(ufshcd_should_inform_monitor(hba, lrbp)))
2098 ufshcd_start_monitor(hba, lrbp);
Bart Van Assche169f5eb2021-07-21 20:34:34 -07002099
2100 spin_lock_irqsave(&hba->outstanding_lock, flags);
Bart Van Asschea024ad02021-07-21 20:34:33 -07002101 if (hba->vops && hba->vops->setup_xfer_req)
2102 hba->vops->setup_xfer_req(hba, task_tag, !!lrbp->cmd);
Bart Van Assche169f5eb2021-07-21 20:34:34 -07002103 __set_bit(task_tag, &hba->outstanding_reqs);
Bart Van Assche1f522c52021-07-21 20:34:32 -07002104 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Bart Van Assche169f5eb2021-07-21 20:34:34 -07002105 spin_unlock_irqrestore(&hba->outstanding_lock, flags);
2106
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002107 /* Make sure that doorbell is committed immediately */
2108 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302109}
2110
2111/**
2112 * ufshcd_copy_sense_data - Copy sense data in case of check condition
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002113 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302114 */
2115static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
2116{
2117 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05302118 if (lrbp->sense_buffer &&
2119 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07002120 int len_to_copy;
2121
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302122 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Avri Altman09a5a242018-11-22 20:04:56 +02002123 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07002124
Avri Altman09a5a242018-11-22 20:04:56 +02002125 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
2126 len_to_copy);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302127 }
2128}
2129
2130/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302131 * ufshcd_copy_query_response() - Copy the Query Response and the data
2132 * descriptor
2133 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002134 * @lrbp: pointer to local reference block
Dolev Raviv68078d52013-07-30 00:35:58 +05302135 */
2136static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002137int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05302138{
2139 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2140
Dolev Raviv68078d52013-07-30 00:35:58 +05302141 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302142
Dolev Raviv68078d52013-07-30 00:35:58 +05302143 /* Get the descriptor */
Avri Altman1c908362019-05-21 11:24:22 +03002144 if (hba->dev_cmd.query.descriptor &&
2145 lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002146 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05302147 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002148 u16 resp_len;
2149 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05302150
2151 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002152 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302153 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002154 buf_len = be16_to_cpu(
2155 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002156 if (likely(buf_len >= resp_len)) {
2157 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
2158 } else {
2159 dev_warn(hba->dev,
Bean Huo3d4881d2019-11-12 23:34:35 +01002160 "%s: rsp size %d is bigger than buffer size %d",
2161 __func__, resp_len, buf_len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002162 return -EINVAL;
2163 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302164 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002165
2166 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302167}
2168
2169/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302170 * ufshcd_hba_capabilities - Read controller capabilities
2171 * @hba: per adapter instance
Satya Tangiraladf043c742020-07-06 20:04:14 +00002172 *
2173 * Return: 0 on success, negative on error.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302174 */
Satya Tangiraladf043c742020-07-06 20:04:14 +00002175static inline int ufshcd_hba_capabilities(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302176{
Satya Tangiraladf043c742020-07-06 20:04:14 +00002177 int err;
2178
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302179 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302180
2181 /* nutrs and nutmrs are 0 based values */
2182 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
2183 hba->nutmrs =
2184 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
Satya Tangiraladf043c742020-07-06 20:04:14 +00002185
2186 /* Read crypto capabilities */
2187 err = ufshcd_hba_init_crypto_capabilities(hba);
2188 if (err)
2189 dev_err(hba->dev, "crypto setup failed\n");
2190
2191 return err;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302192}
2193
2194/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302195 * ufshcd_ready_for_uic_cmd - Check if controller is ready
2196 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302197 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302198 * Return true on success, else false
2199 */
2200static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
2201{
2202 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
2203 return true;
2204 else
2205 return false;
2206}
2207
2208/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05302209 * ufshcd_get_upmcrs - Get the power mode change request status
2210 * @hba: Pointer to adapter instance
2211 *
2212 * This function gets the UPMCRS field of HCS register
2213 * Returns value of UPMCRS field
2214 */
2215static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
2216{
2217 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
2218}
2219
2220/**
Bart Van Assche35c7d872021-07-21 20:34:28 -07002221 * ufshcd_dispatch_uic_cmd - Dispatch an UIC command to the Unipro layer
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302222 * @hba: per adapter instance
2223 * @uic_cmd: UIC command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302224 */
2225static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302226ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302227{
Bart Van Assche35c7d872021-07-21 20:34:28 -07002228 lockdep_assert_held(&hba->uic_cmd_mutex);
2229
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302230 WARN_ON(hba->active_uic_cmd);
2231
2232 hba->active_uic_cmd = uic_cmd;
2233
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302234 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302235 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2236 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2237 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302238
Bean Huo28fa68f2021-01-05 12:34:42 +01002239 ufshcd_add_uic_command_trace(hba, uic_cmd, UFS_CMD_SEND);
Stanley Chuaa5c6972020-06-15 15:22:35 +08002240
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302241 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302242 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302243 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302244}
2245
2246/**
Bart Van Assche35c7d872021-07-21 20:34:28 -07002247 * ufshcd_wait_for_uic_cmd - Wait for completion of an UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302248 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002249 * @uic_cmd: UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302250 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302251 * Returns 0 only if success.
2252 */
2253static int
2254ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2255{
2256 int ret;
2257 unsigned long flags;
2258
Bart Van Assche35c7d872021-07-21 20:34:28 -07002259 lockdep_assert_held(&hba->uic_cmd_mutex);
2260
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302261 if (wait_for_completion_timeout(&uic_cmd->done,
Can Guo0f52fcb92020-11-02 22:24:40 -08002262 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302263 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
Can Guo0f52fcb92020-11-02 22:24:40 -08002264 } else {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302265 ret = -ETIMEDOUT;
Can Guo0f52fcb92020-11-02 22:24:40 -08002266 dev_err(hba->dev,
2267 "uic cmd 0x%x with arg3 0x%x completion timeout\n",
2268 uic_cmd->command, uic_cmd->argument3);
2269
2270 if (!uic_cmd->cmd_active) {
2271 dev_err(hba->dev, "%s: UIC cmd has been completed, return the result\n",
2272 __func__);
2273 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2274 }
2275 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302276
2277 spin_lock_irqsave(hba->host->host_lock, flags);
2278 hba->active_uic_cmd = NULL;
2279 spin_unlock_irqrestore(hba->host->host_lock, flags);
2280
2281 return ret;
2282}
2283
2284/**
2285 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2286 * @hba: per adapter instance
2287 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002288 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302289 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302290 * Returns 0 only if success.
2291 */
2292static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002293__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2294 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302295{
Bart Van Assche35c7d872021-07-21 20:34:28 -07002296 lockdep_assert_held(&hba->uic_cmd_mutex);
2297 lockdep_assert_held(hba->host->host_lock);
2298
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302299 if (!ufshcd_ready_for_uic_cmd(hba)) {
2300 dev_err(hba->dev,
2301 "Controller not ready to accept UIC commands\n");
2302 return -EIO;
2303 }
2304
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002305 if (completion)
2306 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302307
Can Guo0f52fcb92020-11-02 22:24:40 -08002308 uic_cmd->cmd_active = 1;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302309 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302310
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002311 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302312}
2313
2314/**
2315 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2316 * @hba: per adapter instance
2317 * @uic_cmd: UIC command
2318 *
2319 * Returns 0 only if success.
2320 */
Avri Altmane77044c52018-10-07 17:30:39 +03002321int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302322{
2323 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002324 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302325
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002326 ufshcd_hold(hba, false);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302327 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03002328 ufshcd_add_delay_before_dme_cmd(hba);
2329
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002330 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002331 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002332 spin_unlock_irqrestore(hba->host->host_lock, flags);
2333 if (!ret)
2334 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2335
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302336 mutex_unlock(&hba->uic_cmd_mutex);
2337
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002338 ufshcd_release(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302339 return ret;
2340}
2341
2342/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302343 * ufshcd_map_sg - Map scatter-gather list to prdt
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002344 * @hba: per adapter instance
2345 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302346 *
2347 * Returns 0 in case of success, non-zero value in case of failure
2348 */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002349static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302350{
2351 struct ufshcd_sg_entry *prd_table;
2352 struct scatterlist *sg;
2353 struct scsi_cmnd *cmd;
2354 int sg_segments;
2355 int i;
2356
2357 cmd = lrbp->cmd;
2358 sg_segments = scsi_dma_map(cmd);
2359 if (sg_segments < 0)
2360 return sg_segments;
2361
2362 if (sg_segments) {
Alim Akhtar26f968d2020-05-28 06:46:52 +05302363
2364 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2365 lrbp->utr_descriptor_ptr->prd_table_length =
2366 cpu_to_le16((sg_segments *
2367 sizeof(struct ufshcd_sg_entry)));
2368 else
2369 lrbp->utr_descriptor_ptr->prd_table_length =
2370 cpu_to_le16((u16) (sg_segments));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302371
2372 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2373
2374 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2375 prd_table[i].size =
2376 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2377 prd_table[i].base_addr =
2378 cpu_to_le32(lower_32_bits(sg->dma_address));
2379 prd_table[i].upper_addr =
2380 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002381 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302382 }
2383 } else {
2384 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2385 }
2386
2387 return 0;
2388}
2389
2390/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302391 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302392 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302393 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302394 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302395static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302396{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302397 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2398
Caleb Connolly51428812021-03-10 15:33:42 +00002399 if (hba->ufs_version == ufshci_version(1, 0)) {
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302400 u32 rw;
2401 rw = set & INTERRUPT_MASK_RW_VER_10;
2402 set = rw | ((set ^ intrs) & intrs);
2403 } else {
2404 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302405 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302406
2407 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2408}
2409
2410/**
2411 * ufshcd_disable_intr - disable interrupts
2412 * @hba: per adapter instance
2413 * @intrs: interrupt bits
2414 */
2415static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2416{
2417 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2418
Caleb Connolly51428812021-03-10 15:33:42 +00002419 if (hba->ufs_version == ufshci_version(1, 0)) {
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302420 u32 rw;
2421 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2422 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2423 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2424
2425 } else {
2426 set &= ~intrs;
2427 }
2428
2429 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302430}
2431
2432/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302433 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2434 * descriptor according to request
2435 * @lrbp: pointer to local reference block
2436 * @upiu_flags: flags required in the header
2437 * @cmd_dir: requests data direction
2438 */
2439static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
Bean Huoa23064c2020-07-06 14:39:36 +02002440 u8 *upiu_flags, enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302441{
2442 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2443 u32 data_direction;
2444 u32 dword_0;
Satya Tangiraladf043c742020-07-06 20:04:14 +00002445 u32 dword_1 = 0;
2446 u32 dword_3 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302447
2448 if (cmd_dir == DMA_FROM_DEVICE) {
2449 data_direction = UTP_DEVICE_TO_HOST;
2450 *upiu_flags = UPIU_CMD_FLAGS_READ;
2451 } else if (cmd_dir == DMA_TO_DEVICE) {
2452 data_direction = UTP_HOST_TO_DEVICE;
2453 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2454 } else {
2455 data_direction = UTP_NO_DATA_TRANSFER;
2456 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2457 }
2458
2459 dword_0 = data_direction | (lrbp->command_type
2460 << UPIU_COMMAND_TYPE_OFFSET);
2461 if (lrbp->intr_cmd)
2462 dword_0 |= UTP_REQ_DESC_INT_CMD;
2463
Satya Tangiraladf043c742020-07-06 20:04:14 +00002464 /* Prepare crypto related dwords */
2465 ufshcd_prepare_req_desc_hdr_crypto(lrbp, &dword_0, &dword_1, &dword_3);
2466
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302467 /* Transfer request descriptor header fields */
2468 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Satya Tangiraladf043c742020-07-06 20:04:14 +00002469 req_desc->header.dword_1 = cpu_to_le32(dword_1);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302470 /*
2471 * assigning invalid value for command status. Controller
2472 * updates OCS on command completion, with the command
2473 * status
2474 */
2475 req_desc->header.dword_2 =
2476 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Satya Tangiraladf043c742020-07-06 20:04:14 +00002477 req_desc->header.dword_3 = cpu_to_le32(dword_3);
Yaniv Gardi51047262016-02-01 15:02:38 +02002478
2479 req_desc->prd_table_length = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302480}
2481
2482/**
2483 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2484 * for scsi commands
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002485 * @lrbp: local reference block pointer
2486 * @upiu_flags: flags
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302487 */
2488static
Bean Huoa23064c2020-07-06 14:39:36 +02002489void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u8 upiu_flags)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302490{
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002491 struct scsi_cmnd *cmd = lrbp->cmd;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302492 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002493 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302494
2495 /* command descriptor fields */
2496 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2497 UPIU_TRANSACTION_COMMAND, upiu_flags,
2498 lrbp->lun, lrbp->task_tag);
2499 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2500 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2501
2502 /* Total EHS length and Data segment length will be zero */
2503 ucd_req_ptr->header.dword_2 = 0;
2504
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002505 ucd_req_ptr->sc.exp_data_transfer_len = cpu_to_be32(cmd->sdb.length);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302506
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002507 cdb_len = min_t(unsigned short, cmd->cmd_len, UFS_CDB_SIZE);
Avri Altmana851b2b2018-10-07 17:30:34 +03002508 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002509 memcpy(ucd_req_ptr->sc.cdb, cmd->cmnd, cdb_len);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002510
2511 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302512}
2513
Dolev Raviv68078d52013-07-30 00:35:58 +05302514/**
2515 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2516 * for query requsts
2517 * @hba: UFS hba
2518 * @lrbp: local reference block pointer
2519 * @upiu_flags: flags
2520 */
2521static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
Bean Huoa23064c2020-07-06 14:39:36 +02002522 struct ufshcd_lrb *lrbp, u8 upiu_flags)
Dolev Raviv68078d52013-07-30 00:35:58 +05302523{
2524 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2525 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302526 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302527
2528 /* Query request header */
2529 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2530 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2531 lrbp->lun, lrbp->task_tag);
2532 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2533 0, query->request.query_func, 0, 0);
2534
Zang Leigang68612852016-08-25 17:39:19 +08002535 /* Data segment length only need for WRITE_DESC */
2536 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2537 ucd_req_ptr->header.dword_2 =
2538 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2539 else
2540 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302541
2542 /* Copy the Query Request buffer as is */
2543 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2544 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302545
2546 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002547 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
Avri Altman220d17a62018-10-07 17:30:36 +03002548 memcpy(ucd_req_ptr + 1, query->descriptor, len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002549
Yaniv Gardi51047262016-02-01 15:02:38 +02002550 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302551}
2552
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302553static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2554{
2555 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2556
2557 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2558
2559 /* command descriptor fields */
2560 ucd_req_ptr->header.dword_0 =
2561 UPIU_HEADER_DWORD(
2562 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002563 /* clear rest of the fields of basic header */
2564 ucd_req_ptr->header.dword_1 = 0;
2565 ucd_req_ptr->header.dword_2 = 0;
2566
2567 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302568}
2569
2570/**
Bean Huof273c542020-08-14 11:50:33 +02002571 * ufshcd_compose_devman_upiu - UFS Protocol Information Unit(UPIU)
Joao Pinto300bb132016-05-11 12:21:27 +01002572 * for Device Management Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002573 * @hba: per adapter instance
2574 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302575 */
Bean Huof273c542020-08-14 11:50:33 +02002576static int ufshcd_compose_devman_upiu(struct ufs_hba *hba,
2577 struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302578{
Bean Huoa23064c2020-07-06 14:39:36 +02002579 u8 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302580 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302581
Caleb Connolly51428812021-03-10 15:33:42 +00002582 if (hba->ufs_version <= ufshci_version(1, 1))
Joao Pinto300bb132016-05-11 12:21:27 +01002583 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
kehuanlin83dc7e32017-09-06 17:58:39 +08002584 else
2585 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002586
2587 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2588 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2589 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2590 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2591 ufshcd_prepare_utp_nop_upiu(lrbp);
2592 else
2593 ret = -EINVAL;
2594
2595 return ret;
2596}
2597
2598/**
2599 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2600 * for SCSI Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002601 * @hba: per adapter instance
2602 * @lrbp: pointer to local reference block
Joao Pinto300bb132016-05-11 12:21:27 +01002603 */
2604static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2605{
Bean Huoa23064c2020-07-06 14:39:36 +02002606 u8 upiu_flags;
Joao Pinto300bb132016-05-11 12:21:27 +01002607 int ret = 0;
2608
Caleb Connolly51428812021-03-10 15:33:42 +00002609 if (hba->ufs_version <= ufshci_version(1, 1))
Joao Pinto300bb132016-05-11 12:21:27 +01002610 lrbp->command_type = UTP_CMD_TYPE_SCSI;
kehuanlin83dc7e32017-09-06 17:58:39 +08002611 else
2612 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002613
2614 if (likely(lrbp->cmd)) {
2615 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2616 lrbp->cmd->sc_data_direction);
2617 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2618 } else {
2619 ret = -EINVAL;
2620 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302621
2622 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302623}
2624
2625/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002626 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002627 * @upiu_wlun_id: UPIU W-LUN id
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002628 *
2629 * Returns SCSI W-LUN id
2630 */
2631static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2632{
2633 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2634}
2635
Asutosh Dasb294ff32021-04-23 17:20:16 -07002636static inline bool is_rpmb_wlun(struct scsi_device *sdev)
2637{
2638 return sdev->lun == ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN);
2639}
2640
2641static inline bool is_device_wlun(struct scsi_device *sdev)
2642{
2643 return sdev->lun ==
2644 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN);
2645}
2646
Bart Van Assche4d2b8d42020-01-22 19:56:35 -08002647static void ufshcd_init_lrb(struct ufs_hba *hba, struct ufshcd_lrb *lrb, int i)
2648{
2649 struct utp_transfer_cmd_desc *cmd_descp = hba->ucdl_base_addr;
2650 struct utp_transfer_req_desc *utrdlp = hba->utrdl_base_addr;
2651 dma_addr_t cmd_desc_element_addr = hba->ucdl_dma_addr +
2652 i * sizeof(struct utp_transfer_cmd_desc);
2653 u16 response_offset = offsetof(struct utp_transfer_cmd_desc,
2654 response_upiu);
2655 u16 prdt_offset = offsetof(struct utp_transfer_cmd_desc, prd_table);
2656
2657 lrb->utr_descriptor_ptr = utrdlp + i;
2658 lrb->utrd_dma_addr = hba->utrdl_dma_addr +
2659 i * sizeof(struct utp_transfer_req_desc);
2660 lrb->ucd_req_ptr = (struct utp_upiu_req *)(cmd_descp + i);
2661 lrb->ucd_req_dma_addr = cmd_desc_element_addr;
2662 lrb->ucd_rsp_ptr = (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
2663 lrb->ucd_rsp_dma_addr = cmd_desc_element_addr + response_offset;
2664 lrb->ucd_prdt_ptr = (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
2665 lrb->ucd_prdt_dma_addr = cmd_desc_element_addr + prdt_offset;
2666}
2667
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002668/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302669 * ufshcd_queuecommand - main entry point for SCSI requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002670 * @host: SCSI host pointer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302671 * @cmd: command from SCSI Midlayer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302672 *
2673 * Returns 0 for success, non-zero in case of failure
2674 */
2675static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2676{
Bart Van Assche4728ab42021-07-21 20:34:27 -07002677 struct ufs_hba *hba = shost_priv(host);
Bart Van Assche3f2c1002021-08-09 16:03:50 -07002678 int tag = scsi_cmd_to_rq(cmd)->tag;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302679 struct ufshcd_lrb *lrbp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302680 int err = 0;
2681
Bart Van Assche4728ab42021-07-21 20:34:27 -07002682 WARN_ONCE(tag < 0, "Invalid tag %d\n", tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302683
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002684 if (!down_read_trylock(&hba->clk_scaling_lock))
2685 return SCSI_MLQUEUE_HOST_BUSY;
2686
Can Guoa45f9372021-05-24 01:36:57 -07002687 switch (hba->ufshcd_state) {
2688 case UFSHCD_STATE_OPERATIONAL:
2689 case UFSHCD_STATE_EH_SCHEDULED_NON_FATAL:
2690 break;
2691 case UFSHCD_STATE_EH_SCHEDULED_FATAL:
2692 /*
2693 * pm_runtime_get_sync() is used at error handling preparation
2694 * stage. If a scsi cmd, e.g. the SSU cmd, is sent from hba's
2695 * PM ops, it can never be finished if we let SCSI layer keep
2696 * retrying it, which gets err handler stuck forever. Neither
2697 * can we let the scsi cmd pass through, because UFS is in bad
2698 * state, the scsi cmd may eventually time out, which will get
2699 * err handler blocked for too long. So, just fail the scsi cmd
2700 * sent from PM ops, err handler can recover PM error anyways.
2701 */
2702 if (hba->pm_op_in_progress) {
2703 hba->force_reset = true;
2704 set_host_byte(cmd, DID_BAD_TARGET);
2705 cmd->scsi_done(cmd);
2706 goto out;
2707 }
2708 fallthrough;
2709 case UFSHCD_STATE_RESET:
2710 err = SCSI_MLQUEUE_HOST_BUSY;
2711 goto out;
2712 case UFSHCD_STATE_ERROR:
2713 set_host_byte(cmd, DID_ERROR);
2714 cmd->scsi_done(cmd);
2715 goto out;
Can Guoa45f9372021-05-24 01:36:57 -07002716 }
2717
Gilad Broner7fabb772017-02-03 16:56:50 -08002718 hba->req_abort_count = 0;
2719
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002720 err = ufshcd_hold(hba, true);
2721 if (err) {
2722 err = SCSI_MLQUEUE_HOST_BUSY;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002723 goto out;
2724 }
Can Guo2dec9472020-08-09 05:15:47 -07002725 WARN_ON(ufshcd_is_clkgating_allowed(hba) &&
2726 (hba->clk_gating.state != CLKS_ON));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002727
Can Guoa45f9372021-05-24 01:36:57 -07002728 lrbp = &hba->lrb[tag];
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302729 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302730 lrbp->cmd = cmd;
Avri Altman09a5a242018-11-22 20:04:56 +02002731 lrbp->sense_bufflen = UFS_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302732 lrbp->sense_buffer = cmd->sense_buffer;
2733 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002734 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002735 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Satya Tangiraladf043c742020-07-06 20:04:14 +00002736
Bart Van Assche3f2c1002021-08-09 16:03:50 -07002737 ufshcd_prepare_lrbp_crypto(scsi_cmd_to_rq(cmd), lrbp);
Satya Tangiraladf043c742020-07-06 20:04:14 +00002738
Gilad Bronere0b299e2017-02-03 16:56:40 -08002739 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302740
Daejun Park41d8a932021-07-12 18:00:25 +09002741 err = ufshpb_prep(hba, lrbp);
2742 if (err == -EAGAIN) {
2743 lrbp->cmd = NULL;
2744 ufshcd_release(hba);
2745 goto out;
2746 }
Daejun Park2fff76f2021-07-12 17:59:36 +09002747
Joao Pinto300bb132016-05-11 12:21:27 +01002748 ufshcd_comp_scsi_upiu(hba, lrbp);
2749
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002750 err = ufshcd_map_sg(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302751 if (err) {
2752 lrbp->cmd = NULL;
Can Guo17c7d352019-12-05 02:14:33 +00002753 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302754 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302755 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302756
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302757 ufshcd_send_command(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302758out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002759 up_read(&hba->clk_scaling_lock);
Bart Van Asschec11a1ae2021-07-21 20:34:39 -07002760
2761 if (ufs_trigger_eh())
2762 scsi_schedule_eh(hba->host);
2763
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302764 return err;
2765}
2766
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302767static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2768 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2769{
2770 lrbp->cmd = NULL;
2771 lrbp->sense_bufflen = 0;
2772 lrbp->sense_buffer = NULL;
2773 lrbp->task_tag = tag;
2774 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302775 lrbp->intr_cmd = true; /* No interrupt aggregation */
Satya Tangiraladf043c742020-07-06 20:04:14 +00002776 ufshcd_prepare_lrbp_crypto(NULL, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302777 hba->dev_cmd.type = cmd_type;
2778
Bean Huof273c542020-08-14 11:50:33 +02002779 return ufshcd_compose_devman_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302780}
2781
2782static int
2783ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2784{
2785 int err = 0;
2786 unsigned long flags;
2787 u32 mask = 1 << tag;
2788
2789 /* clear outstanding transaction before retry */
2790 spin_lock_irqsave(hba->host->host_lock, flags);
2791 ufshcd_utrl_clear(hba, tag);
2792 spin_unlock_irqrestore(hba->host->host_lock, flags);
2793
2794 /*
Keoseong Park32424902021-06-04 11:40:38 +09002795 * wait for h/w to clear corresponding bit in door-bell.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302796 * max. wait is 1 sec.
2797 */
2798 err = ufshcd_wait_for_register(hba,
2799 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Bart Van Assche5cac1092020-05-07 15:27:50 -07002800 mask, ~mask, 1000, 1000);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302801
2802 return err;
2803}
2804
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002805static int
2806ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2807{
2808 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2809
2810 /* Get the UPIU response */
2811 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2812 UPIU_RSP_CODE_OFFSET;
2813 return query_res->response;
2814}
2815
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302816/**
2817 * ufshcd_dev_cmd_completion() - handles device management command responses
2818 * @hba: per adapter instance
2819 * @lrbp: pointer to local reference block
2820 */
2821static int
2822ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2823{
2824 int resp;
2825 int err = 0;
2826
Dolev Ravivff8e20c2016-12-22 18:42:18 -08002827 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302828 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2829
2830 switch (resp) {
2831 case UPIU_TRANSACTION_NOP_IN:
2832 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2833 err = -EINVAL;
2834 dev_err(hba->dev, "%s: unexpected response %x\n",
2835 __func__, resp);
2836 }
2837 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302838 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002839 err = ufshcd_check_query_response(hba, lrbp);
2840 if (!err)
2841 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302842 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302843 case UPIU_TRANSACTION_REJECT_UPIU:
2844 /* TODO: handle Reject UPIU Response */
2845 err = -EPERM;
2846 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2847 __func__);
2848 break;
2849 default:
2850 err = -EINVAL;
2851 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2852 __func__, resp);
2853 break;
2854 }
2855
2856 return err;
2857}
2858
2859static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2860 struct ufshcd_lrb *lrbp, int max_timeout)
2861{
2862 int err = 0;
2863 unsigned long time_left;
2864 unsigned long flags;
2865
2866 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2867 msecs_to_jiffies(max_timeout));
2868
2869 spin_lock_irqsave(hba->host->host_lock, flags);
2870 hba->dev_cmd.complete = NULL;
2871 if (likely(time_left)) {
2872 err = ufshcd_get_tr_ocs(lrbp);
2873 if (!err)
2874 err = ufshcd_dev_cmd_completion(hba, lrbp);
2875 }
2876 spin_unlock_irqrestore(hba->host->host_lock, flags);
2877
2878 if (!time_left) {
2879 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002880 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2881 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302882 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002883 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302884 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002885 /*
2886 * in case of an error, after clearing the doorbell,
2887 * we also need to clear the outstanding_request
2888 * field in hba
2889 */
Bart Van Assche169f5eb2021-07-21 20:34:34 -07002890 spin_lock_irqsave(&hba->outstanding_lock, flags);
2891 __clear_bit(lrbp->task_tag, &hba->outstanding_reqs);
2892 spin_unlock_irqrestore(&hba->outstanding_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302893 }
2894
2895 return err;
2896}
2897
2898/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302899 * ufshcd_exec_dev_cmd - API for sending device management requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002900 * @hba: UFS hba
2901 * @cmd_type: specifies the type (NOP, Query...)
Bart Van Assched0b2b702021-05-13 09:49:12 -07002902 * @timeout: timeout in milliseconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302903 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302904 * NOTE: Since there is only one available tag for device management commands,
2905 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302906 */
2907static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2908 enum dev_cmd_type cmd_type, int timeout)
2909{
Bart Van Assche7252a362019-12-09 10:13:08 -08002910 struct request_queue *q = hba->cmd_queue;
Bart Van Assche8a686f22021-07-21 20:34:26 -07002911 DECLARE_COMPLETION_ONSTACK(wait);
Bart Van Assche7252a362019-12-09 10:13:08 -08002912 struct request *req;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302913 struct ufshcd_lrb *lrbp;
2914 int err;
2915 int tag;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302916
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002917 down_read(&hba->clk_scaling_lock);
2918
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302919 /*
2920 * Get free slot, sleep if slots are unavailable.
2921 * Even though we use wait_event() which sleeps indefinitely,
2922 * the maximum wait time is bounded by SCSI request timeout.
2923 */
Bart Van Assche7252a362019-12-09 10:13:08 -08002924 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03002925 if (IS_ERR(req)) {
2926 err = PTR_ERR(req);
2927 goto out_unlock;
2928 }
Bart Van Assche7252a362019-12-09 10:13:08 -08002929 tag = req->tag;
Bart Van Assche4728ab42021-07-21 20:34:27 -07002930 WARN_ONCE(tag < 0, "Invalid tag %d\n", tag);
Bart Van Assched0b2b702021-05-13 09:49:12 -07002931 /* Set the timeout such that the SCSI error handler is not activated. */
2932 req->timeout = msecs_to_jiffies(2 * timeout);
2933 blk_mq_start_request(req);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302934
Can Guoa45f9372021-05-24 01:36:57 -07002935 lrbp = &hba->lrb[tag];
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302936 WARN_ON(lrbp->cmd);
2937 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2938 if (unlikely(err))
Can Guoeb783bb2021-06-09 01:24:00 -07002939 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302940
2941 hba->dev_cmd.complete = &wait;
2942
Avri Altmanfb475b72021-01-10 10:46:18 +02002943 ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr);
Can Guoa45f9372021-05-24 01:36:57 -07002944
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302945 ufshcd_send_command(hba, tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302946 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
Avri Altmanfb475b72021-01-10 10:46:18 +02002947 ufshcd_add_query_upiu_trace(hba, err ? UFS_QUERY_ERR : UFS_QUERY_COMP,
2948 (struct utp_upiu_req *)lrbp->ucd_rsp_ptr);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002949
Can Guoeb783bb2021-06-09 01:24:00 -07002950out:
Bart Van Assche7252a362019-12-09 10:13:08 -08002951 blk_put_request(req);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03002952out_unlock:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002953 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302954 return err;
2955}
2956
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302957/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002958 * ufshcd_init_query() - init the query response and request parameters
2959 * @hba: per-adapter instance
2960 * @request: address of the request pointer to be initialized
2961 * @response: address of the response pointer to be initialized
2962 * @opcode: operation to perform
2963 * @idn: flag idn to access
2964 * @index: LU number to access
2965 * @selector: query/flag/descriptor further identification
2966 */
2967static inline void ufshcd_init_query(struct ufs_hba *hba,
2968 struct ufs_query_req **request, struct ufs_query_res **response,
2969 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2970{
2971 *request = &hba->dev_cmd.query.request;
2972 *response = &hba->dev_cmd.query.response;
2973 memset(*request, 0, sizeof(struct ufs_query_req));
2974 memset(*response, 0, sizeof(struct ufs_query_res));
2975 (*request)->upiu_req.opcode = opcode;
2976 (*request)->upiu_req.idn = idn;
2977 (*request)->upiu_req.index = index;
2978 (*request)->upiu_req.selector = selector;
2979}
2980
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002981static int ufshcd_query_flag_retry(struct ufs_hba *hba,
Stanley Chu1f34eed2020-05-08 16:01:12 +08002982 enum query_opcode opcode, enum flag_idn idn, u8 index, bool *flag_res)
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002983{
2984 int ret;
2985 int retries;
2986
2987 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
Stanley Chu1f34eed2020-05-08 16:01:12 +08002988 ret = ufshcd_query_flag(hba, opcode, idn, index, flag_res);
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002989 if (ret)
2990 dev_dbg(hba->dev,
2991 "%s: failed with error %d, retries %d\n",
2992 __func__, ret, retries);
2993 else
2994 break;
2995 }
2996
2997 if (ret)
2998 dev_err(hba->dev,
2999 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
3000 __func__, opcode, idn, ret, retries);
3001 return ret;
3002}
3003
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003004/**
Dolev Raviv68078d52013-07-30 00:35:58 +05303005 * ufshcd_query_flag() - API function for sending flag query requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08003006 * @hba: per-adapter instance
3007 * @opcode: flag query to perform
3008 * @idn: flag idn to access
Stanley Chu1f34eed2020-05-08 16:01:12 +08003009 * @index: flag index to access
Bart Van Assche8aa29f12018-03-01 15:07:20 -08003010 * @flag_res: the flag value after the query request completes
Dolev Raviv68078d52013-07-30 00:35:58 +05303011 *
3012 * Returns 0 for success, non-zero in case of failure
3013 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02003014int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Stanley Chu1f34eed2020-05-08 16:01:12 +08003015 enum flag_idn idn, u8 index, bool *flag_res)
Dolev Raviv68078d52013-07-30 00:35:58 +05303016{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003017 struct ufs_query_req *request = NULL;
3018 struct ufs_query_res *response = NULL;
Stanley Chu1f34eed2020-05-08 16:01:12 +08003019 int err, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02003020 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05303021
3022 BUG_ON(!hba);
3023
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003024 ufshcd_hold(hba, false);
Dolev Raviv68078d52013-07-30 00:35:58 +05303025 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003026 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3027 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05303028
3029 switch (opcode) {
3030 case UPIU_QUERY_OPCODE_SET_FLAG:
3031 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
3032 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
3033 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3034 break;
3035 case UPIU_QUERY_OPCODE_READ_FLAG:
3036 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3037 if (!flag_res) {
3038 /* No dummy reads */
3039 dev_err(hba->dev, "%s: Invalid argument for read request\n",
3040 __func__);
3041 err = -EINVAL;
3042 goto out_unlock;
3043 }
3044 break;
3045 default:
3046 dev_err(hba->dev,
3047 "%s: Expected query flag opcode but got = %d\n",
3048 __func__, opcode);
3049 err = -EINVAL;
3050 goto out_unlock;
3051 }
Dolev Raviv68078d52013-07-30 00:35:58 +05303052
Yaniv Gardie5ad4062016-02-01 15:02:41 +02003053 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05303054
3055 if (err) {
3056 dev_err(hba->dev,
3057 "%s: Sending flag query for idn %d failed, err = %d\n",
3058 __func__, idn, err);
3059 goto out_unlock;
3060 }
3061
3062 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303063 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05303064 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
3065
3066out_unlock:
3067 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003068 ufshcd_release(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05303069 return err;
3070}
3071
3072/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303073 * ufshcd_query_attr - API function for sending attribute requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08003074 * @hba: per-adapter instance
3075 * @opcode: attribute opcode
3076 * @idn: attribute idn to access
3077 * @index: index field
3078 * @selector: selector field
3079 * @attr_val: the attribute value after the query request completes
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303080 *
3081 * Returns 0 for success, non-zero in case of failure
3082*/
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02003083int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
3084 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303085{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003086 struct ufs_query_req *request = NULL;
3087 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303088 int err;
3089
3090 BUG_ON(!hba);
3091
3092 if (!attr_val) {
3093 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
3094 __func__, opcode);
jintae jang8ca1a402020-12-03 14:25:32 +09003095 return -EINVAL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303096 }
3097
jintae jang8ca1a402020-12-03 14:25:32 +09003098 ufshcd_hold(hba, false);
3099
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303100 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003101 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3102 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303103
3104 switch (opcode) {
3105 case UPIU_QUERY_OPCODE_WRITE_ATTR:
3106 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303107 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303108 break;
3109 case UPIU_QUERY_OPCODE_READ_ATTR:
3110 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3111 break;
3112 default:
3113 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
3114 __func__, opcode);
3115 err = -EINVAL;
3116 goto out_unlock;
3117 }
3118
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003119 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303120
3121 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08003122 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3123 __func__, opcode, idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303124 goto out_unlock;
3125 }
3126
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05303127 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303128
3129out_unlock:
3130 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003131 ufshcd_release(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05303132 return err;
3133}
3134
3135/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02003136 * ufshcd_query_attr_retry() - API function for sending query
3137 * attribute with retries
3138 * @hba: per-adapter instance
3139 * @opcode: attribute opcode
3140 * @idn: attribute idn to access
3141 * @index: index field
3142 * @selector: selector field
3143 * @attr_val: the attribute value after the query request
3144 * completes
3145 *
3146 * Returns 0 for success, non-zero in case of failure
3147*/
Daejun Park41d8a932021-07-12 18:00:25 +09003148int ufshcd_query_attr_retry(struct ufs_hba *hba,
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02003149 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
3150 u32 *attr_val)
3151{
3152 int ret = 0;
3153 u32 retries;
3154
Bart Van Assche68c9fcf2019-12-24 14:02:43 -08003155 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02003156 ret = ufshcd_query_attr(hba, opcode, idn, index,
3157 selector, attr_val);
3158 if (ret)
3159 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
3160 __func__, ret, retries);
3161 else
3162 break;
3163 }
3164
3165 if (ret)
3166 dev_err(hba->dev,
3167 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
3168 __func__, idn, ret, QUERY_REQ_RETRIES);
3169 return ret;
3170}
3171
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003172static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003173 enum query_opcode opcode, enum desc_idn idn, u8 index,
3174 u8 selector, u8 *desc_buf, int *buf_len)
3175{
3176 struct ufs_query_req *request = NULL;
3177 struct ufs_query_res *response = NULL;
3178 int err;
3179
3180 BUG_ON(!hba);
3181
3182 if (!desc_buf) {
3183 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
3184 __func__, opcode);
jintae jang8ca1a402020-12-03 14:25:32 +09003185 return -EINVAL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003186 }
3187
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003188 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003189 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
3190 __func__, *buf_len);
jintae jang8ca1a402020-12-03 14:25:32 +09003191 return -EINVAL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003192 }
3193
jintae jang8ca1a402020-12-03 14:25:32 +09003194 ufshcd_hold(hba, false);
3195
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003196 mutex_lock(&hba->dev_cmd.lock);
3197 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3198 selector);
3199 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03003200 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003201
3202 switch (opcode) {
3203 case UPIU_QUERY_OPCODE_WRITE_DESC:
3204 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3205 break;
3206 case UPIU_QUERY_OPCODE_READ_DESC:
3207 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3208 break;
3209 default:
3210 dev_err(hba->dev,
3211 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
3212 __func__, opcode);
3213 err = -EINVAL;
3214 goto out_unlock;
3215 }
3216
3217 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3218
3219 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08003220 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3221 __func__, opcode, idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003222 goto out_unlock;
3223 }
3224
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03003225 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003226
3227out_unlock:
Bean Huocfcbae32019-11-12 23:34:36 +01003228 hba->dev_cmd.query.descriptor = NULL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003229 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003230 ufshcd_release(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003231 return err;
3232}
3233
3234/**
Bart Van Assche8aa29f12018-03-01 15:07:20 -08003235 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
3236 * @hba: per-adapter instance
3237 * @opcode: attribute opcode
3238 * @idn: attribute idn to access
3239 * @index: index field
3240 * @selector: selector field
3241 * @desc_buf: the buffer that contains the descriptor
3242 * @buf_len: length parameter passed to the device
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003243 *
3244 * Returns 0 for success, non-zero in case of failure.
3245 * The buf_len parameter will contain, on return, the length parameter
3246 * received on the response.
3247 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02003248int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3249 enum query_opcode opcode,
3250 enum desc_idn idn, u8 index,
3251 u8 selector,
3252 u8 *desc_buf, int *buf_len)
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003253{
3254 int err;
3255 int retries;
3256
3257 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3258 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3259 selector, desc_buf, buf_len);
3260 if (!err || err == -EINVAL)
3261 break;
3262 }
3263
3264 return err;
3265}
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003266
3267/**
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003268 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3269 * @hba: Pointer to adapter instance
3270 * @desc_id: descriptor idn value
3271 * @desc_len: mapped desc length (out)
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003272 */
Bean Huo7a0bf852020-06-03 11:19:58 +02003273void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
3274 int *desc_len)
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003275{
Bean Huo7a0bf852020-06-03 11:19:58 +02003276 if (desc_id >= QUERY_DESC_IDN_MAX || desc_id == QUERY_DESC_IDN_RFU_0 ||
3277 desc_id == QUERY_DESC_IDN_RFU_1)
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003278 *desc_len = 0;
Bean Huo7a0bf852020-06-03 11:19:58 +02003279 else
3280 *desc_len = hba->desc_size[desc_id];
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003281}
3282EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3283
Bean Huo7a0bf852020-06-03 11:19:58 +02003284static void ufshcd_update_desc_length(struct ufs_hba *hba,
Bean Huo72fb6902020-06-03 11:19:59 +02003285 enum desc_idn desc_id, int desc_index,
Bean Huo7a0bf852020-06-03 11:19:58 +02003286 unsigned char desc_len)
3287{
3288 if (hba->desc_size[desc_id] == QUERY_DESC_MAX_SIZE &&
Bean Huo72fb6902020-06-03 11:19:59 +02003289 desc_id != QUERY_DESC_IDN_STRING && desc_index != UFS_RPMB_UNIT)
3290 /* For UFS 3.1, the normal unit descriptor is 10 bytes larger
3291 * than the RPMB unit, however, both descriptors share the same
3292 * desc_idn, to cover both unit descriptors with one length, we
3293 * choose the normal unit descriptor length by desc_index.
3294 */
Bean Huo7a0bf852020-06-03 11:19:58 +02003295 hba->desc_size[desc_id] = desc_len;
3296}
3297
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003298/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003299 * ufshcd_read_desc_param - read the specified descriptor parameter
3300 * @hba: Pointer to adapter instance
3301 * @desc_id: descriptor idn value
3302 * @desc_index: descriptor index
3303 * @param_offset: offset of the parameter to read
3304 * @param_read_buf: pointer to buffer where parameter would be read
3305 * @param_size: sizeof(param_read_buf)
3306 *
3307 * Return 0 in case of success, non-zero otherwise
3308 */
Stanislav Nijnikov45bced82018-02-15 14:14:02 +02003309int ufshcd_read_desc_param(struct ufs_hba *hba,
3310 enum desc_idn desc_id,
3311 int desc_index,
3312 u8 param_offset,
3313 u8 *param_read_buf,
3314 u8 param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003315{
3316 int ret;
3317 u8 *desc_buf;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003318 int buff_len;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003319 bool is_kmalloc = true;
3320
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003321 /* Safety check */
3322 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003323 return -EINVAL;
3324
Bean Huo7a0bf852020-06-03 11:19:58 +02003325 /* Get the length of descriptor */
3326 ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
3327 if (!buff_len) {
Can Guo1699f982020-10-21 22:59:00 -07003328 dev_err(hba->dev, "%s: Failed to get desc length\n", __func__);
3329 return -EINVAL;
3330 }
3331
3332 if (param_offset >= buff_len) {
3333 dev_err(hba->dev, "%s: Invalid offset 0x%x in descriptor IDN 0x%x, length 0x%x\n",
3334 __func__, param_offset, desc_id, buff_len);
Bean Huo7a0bf852020-06-03 11:19:58 +02003335 return -EINVAL;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003336 }
3337
3338 /* Check whether we need temp memory */
3339 if (param_offset != 0 || param_size < buff_len) {
Can Guo1699f982020-10-21 22:59:00 -07003340 desc_buf = kzalloc(buff_len, GFP_KERNEL);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003341 if (!desc_buf)
3342 return -ENOMEM;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003343 } else {
3344 desc_buf = param_read_buf;
3345 is_kmalloc = false;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003346 }
3347
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003348 /* Request for full descriptor */
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003349 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003350 desc_id, desc_index, 0,
3351 desc_buf, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003352
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003353 if (ret) {
Can Guo1699f982020-10-21 22:59:00 -07003354 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d\n",
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003355 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003356 goto out;
3357 }
3358
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003359 /* Sanity check */
3360 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
Can Guo1699f982020-10-21 22:59:00 -07003361 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header\n",
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003362 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3363 ret = -EINVAL;
3364 goto out;
3365 }
3366
Bean Huo7a0bf852020-06-03 11:19:58 +02003367 /* Update descriptor length */
3368 buff_len = desc_buf[QUERY_DESC_LENGTH_OFFSET];
Bean Huo72fb6902020-06-03 11:19:59 +02003369 ufshcd_update_desc_length(hba, desc_id, desc_index, buff_len);
Bean Huo7a0bf852020-06-03 11:19:58 +02003370
Can Guo1699f982020-10-21 22:59:00 -07003371 if (is_kmalloc) {
3372 /* Make sure we don't copy more data than available */
Bart Van Assched3d9c452021-07-21 20:34:22 -07003373 if (param_offset >= buff_len)
3374 ret = -EINVAL;
3375 else
3376 memcpy(param_read_buf, &desc_buf[param_offset],
3377 min_t(u32, param_size, buff_len - param_offset));
Can Guo1699f982020-10-21 22:59:00 -07003378 }
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003379out:
3380 if (is_kmalloc)
3381 kfree(desc_buf);
3382 return ret;
3383}
3384
Yaniv Gardib573d482016-03-10 17:37:09 +02003385/**
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003386 * struct uc_string_id - unicode string
3387 *
3388 * @len: size of this descriptor inclusive
3389 * @type: descriptor type
3390 * @uc: unicode string character
3391 */
3392struct uc_string_id {
3393 u8 len;
3394 u8 type;
Gustavo A. R. Silvaec38c0a2020-05-07 14:25:50 -05003395 wchar_t uc[];
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003396} __packed;
3397
3398/* replace non-printable or non-ASCII characters with spaces */
3399static inline char ufshcd_remove_non_printable(u8 ch)
3400{
3401 return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3402}
3403
3404/**
Yaniv Gardib573d482016-03-10 17:37:09 +02003405 * ufshcd_read_string_desc - read string descriptor
3406 * @hba: pointer to adapter instance
3407 * @desc_index: descriptor index
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003408 * @buf: pointer to buffer where descriptor would be read,
3409 * the caller should free the memory.
Yaniv Gardib573d482016-03-10 17:37:09 +02003410 * @ascii: if true convert from unicode to ascii characters
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003411 * null terminated string.
Yaniv Gardib573d482016-03-10 17:37:09 +02003412 *
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003413 * Return:
3414 * * string size on success.
3415 * * -ENOMEM: on allocation failure
3416 * * -EINVAL: on a wrong parameter
Yaniv Gardib573d482016-03-10 17:37:09 +02003417 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003418int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3419 u8 **buf, bool ascii)
Yaniv Gardib573d482016-03-10 17:37:09 +02003420{
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003421 struct uc_string_id *uc_str;
3422 u8 *str;
3423 int ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003424
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003425 if (!buf)
3426 return -EINVAL;
Yaniv Gardib573d482016-03-10 17:37:09 +02003427
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003428 uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3429 if (!uc_str)
3430 return -ENOMEM;
3431
Bean Huoc4607a02020-06-03 11:19:56 +02003432 ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_STRING, desc_index, 0,
3433 (u8 *)uc_str, QUERY_DESC_MAX_SIZE);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003434 if (ret < 0) {
3435 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3436 QUERY_REQ_RETRIES, ret);
3437 str = NULL;
3438 goto out;
3439 }
3440
3441 if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3442 dev_dbg(hba->dev, "String Desc is of zero length\n");
3443 str = NULL;
3444 ret = 0;
Yaniv Gardib573d482016-03-10 17:37:09 +02003445 goto out;
3446 }
3447
3448 if (ascii) {
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003449 ssize_t ascii_len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003450 int i;
Yaniv Gardib573d482016-03-10 17:37:09 +02003451 /* remove header and divide by 2 to move from UTF16 to UTF8 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003452 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3453 str = kzalloc(ascii_len, GFP_KERNEL);
3454 if (!str) {
3455 ret = -ENOMEM;
Tiezhu Yangfcbefc32016-06-25 12:35:22 +08003456 goto out;
Yaniv Gardib573d482016-03-10 17:37:09 +02003457 }
3458
3459 /*
3460 * the descriptor contains string in UTF16 format
3461 * we need to convert to utf-8 so it can be displayed
3462 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003463 ret = utf16s_to_utf8s(uc_str->uc,
3464 uc_str->len - QUERY_DESC_HDR_SIZE,
3465 UTF16_BIG_ENDIAN, str, ascii_len);
Yaniv Gardib573d482016-03-10 17:37:09 +02003466
3467 /* replace non-printable or non-ASCII characters with spaces */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003468 for (i = 0; i < ret; i++)
3469 str[i] = ufshcd_remove_non_printable(str[i]);
Yaniv Gardib573d482016-03-10 17:37:09 +02003470
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003471 str[ret++] = '\0';
3472
3473 } else {
YueHaibing5f577042019-08-31 12:44:24 +00003474 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003475 if (!str) {
3476 ret = -ENOMEM;
3477 goto out;
3478 }
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003479 ret = uc_str->len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003480 }
3481out:
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003482 *buf = str;
3483 kfree(uc_str);
3484 return ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003485}
Yaniv Gardib573d482016-03-10 17:37:09 +02003486
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003487/**
3488 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3489 * @hba: Pointer to adapter instance
3490 * @lun: lun id
3491 * @param_offset: offset of the parameter to read
3492 * @param_read_buf: pointer to buffer where parameter would be read
3493 * @param_size: sizeof(param_read_buf)
3494 *
3495 * Return 0 in case of success, non-zero otherwise
3496 */
3497static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3498 int lun,
3499 enum unit_desc_param param_offset,
3500 u8 *param_read_buf,
3501 u32 param_size)
3502{
3503 /*
3504 * Unit descriptors are only available for general purpose LUs (LUN id
3505 * from 0 to 7) and RPMB Well known LU.
3506 */
Jaegeuk Kima2fca522021-01-11 01:59:27 -08003507 if (!ufs_is_valid_unit_desc_lun(&hba->dev_info, lun, param_offset))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003508 return -EOPNOTSUPP;
3509
3510 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3511 param_offset, param_read_buf, param_size);
3512}
3513
Can Guo09f17792020-02-10 19:40:49 -08003514static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
3515{
3516 int err = 0;
3517 u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3518
3519 if (hba->dev_info.wspecversion >= 0x300) {
3520 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
3521 QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
3522 &gating_wait);
3523 if (err)
3524 dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",
3525 err, gating_wait);
3526
3527 if (gating_wait == 0) {
3528 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3529 dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",
3530 gating_wait);
3531 }
3532
3533 hba->dev_info.clk_gating_wait_us = gating_wait;
3534 }
3535
3536 return err;
3537}
3538
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003539/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303540 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3541 * @hba: per adapter instance
3542 *
3543 * 1. Allocate DMA memory for Command Descriptor array
3544 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3545 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3546 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3547 * (UTMRDL)
3548 * 4. Allocate memory for local reference block(lrb).
3549 *
3550 * Returns 0 for success, non-zero in case of failure
3551 */
3552static int ufshcd_memory_alloc(struct ufs_hba *hba)
3553{
3554 size_t utmrdl_size, utrdl_size, ucdl_size;
3555
3556 /* Allocate memory for UTP command descriptors */
3557 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003558 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3559 ucdl_size,
3560 &hba->ucdl_dma_addr,
3561 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303562
3563 /*
3564 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3565 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3566 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3567 * be aligned to 128 bytes as well
3568 */
3569 if (!hba->ucdl_base_addr ||
3570 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303571 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303572 "Command Descriptor Memory allocation failed\n");
3573 goto out;
3574 }
3575
3576 /*
3577 * Allocate memory for UTP Transfer descriptors
3578 * UFSHCI requires 1024 byte alignment of UTRD
3579 */
3580 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003581 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3582 utrdl_size,
3583 &hba->utrdl_dma_addr,
3584 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303585 if (!hba->utrdl_base_addr ||
3586 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303587 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303588 "Transfer Descriptor Memory allocation failed\n");
3589 goto out;
3590 }
3591
3592 /*
3593 * Allocate memory for UTP Task Management descriptors
3594 * UFSHCI requires 1024 byte alignment of UTMRD
3595 */
3596 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003597 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3598 utmrdl_size,
3599 &hba->utmrdl_dma_addr,
3600 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303601 if (!hba->utmrdl_base_addr ||
3602 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303603 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303604 "Task Management Descriptor Memory allocation failed\n");
3605 goto out;
3606 }
3607
3608 /* Allocate memory for local reference block */
Kees Cooka86854d2018-06-12 14:07:58 -07003609 hba->lrb = devm_kcalloc(hba->dev,
3610 hba->nutrs, sizeof(struct ufshcd_lrb),
Seungwon Jeon2953f852013-06-27 13:31:54 +09003611 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303612 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303613 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303614 goto out;
3615 }
3616 return 0;
3617out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303618 return -ENOMEM;
3619}
3620
3621/**
3622 * ufshcd_host_memory_configure - configure local reference block with
3623 * memory offsets
3624 * @hba: per adapter instance
3625 *
3626 * Configure Host memory space
3627 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3628 * address.
3629 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3630 * and PRDT offset.
3631 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3632 * into local reference block.
3633 */
3634static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3635{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303636 struct utp_transfer_req_desc *utrdlp;
3637 dma_addr_t cmd_desc_dma_addr;
3638 dma_addr_t cmd_desc_element_addr;
3639 u16 response_offset;
3640 u16 prdt_offset;
3641 int cmd_desc_size;
3642 int i;
3643
3644 utrdlp = hba->utrdl_base_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303645
3646 response_offset =
3647 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3648 prdt_offset =
3649 offsetof(struct utp_transfer_cmd_desc, prd_table);
3650
3651 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3652 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3653
3654 for (i = 0; i < hba->nutrs; i++) {
3655 /* Configure UTRD with command descriptor base address */
3656 cmd_desc_element_addr =
3657 (cmd_desc_dma_addr + (cmd_desc_size * i));
3658 utrdlp[i].command_desc_base_addr_lo =
3659 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3660 utrdlp[i].command_desc_base_addr_hi =
3661 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3662
3663 /* Response upiu and prdt offset should be in double words */
Alim Akhtar26f968d2020-05-28 06:46:52 +05303664 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3665 utrdlp[i].response_upiu_offset =
3666 cpu_to_le16(response_offset);
3667 utrdlp[i].prd_table_offset =
3668 cpu_to_le16(prdt_offset);
3669 utrdlp[i].response_upiu_length =
3670 cpu_to_le16(ALIGNED_UPIU_SIZE);
3671 } else {
3672 utrdlp[i].response_upiu_offset =
3673 cpu_to_le16(response_offset >> 2);
3674 utrdlp[i].prd_table_offset =
3675 cpu_to_le16(prdt_offset >> 2);
3676 utrdlp[i].response_upiu_length =
3677 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
3678 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303679
Bart Van Assche4d2b8d42020-01-22 19:56:35 -08003680 ufshcd_init_lrb(hba, &hba->lrb[i], i);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303681 }
3682}
3683
3684/**
3685 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3686 * @hba: per adapter instance
3687 *
3688 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3689 * in order to initialize the Unipro link startup procedure.
3690 * Once the Unipro links are up, the device connected to the controller
3691 * is detected.
3692 *
3693 * Returns 0 on success, non-zero value on failure
3694 */
3695static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3696{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303697 struct uic_command uic_cmd = {0};
3698 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303699
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303700 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3701
3702 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3703 if (ret)
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003704 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303705 "dme-link-startup: error code %d\n", ret);
3706 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303707}
Alim Akhtar39bf2d82020-05-28 06:46:51 +05303708/**
3709 * ufshcd_dme_reset - UIC command for DME_RESET
3710 * @hba: per adapter instance
3711 *
3712 * DME_RESET command is issued in order to reset UniPro stack.
3713 * This function now deals with cold reset.
3714 *
3715 * Returns 0 on success, non-zero value on failure
3716 */
3717static int ufshcd_dme_reset(struct ufs_hba *hba)
3718{
3719 struct uic_command uic_cmd = {0};
3720 int ret;
3721
3722 uic_cmd.command = UIC_CMD_DME_RESET;
3723
3724 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3725 if (ret)
3726 dev_err(hba->dev,
3727 "dme-reset: error code %d\n", ret);
3728
3729 return ret;
3730}
3731
Stanley Chufc85a742020-11-16 14:50:52 +08003732int ufshcd_dme_configure_adapt(struct ufs_hba *hba,
3733 int agreed_gear,
3734 int adapt_val)
3735{
3736 int ret;
3737
3738 if (agreed_gear != UFS_HS_G4)
Bjorn Andersson66df79c2020-11-20 20:48:10 -08003739 adapt_val = PA_NO_ADAPT;
Stanley Chufc85a742020-11-16 14:50:52 +08003740
3741 ret = ufshcd_dme_set(hba,
3742 UIC_ARG_MIB(PA_TXHSADAPTTYPE),
3743 adapt_val);
3744 return ret;
3745}
3746EXPORT_SYMBOL_GPL(ufshcd_dme_configure_adapt);
3747
Alim Akhtar39bf2d82020-05-28 06:46:51 +05303748/**
3749 * ufshcd_dme_enable - UIC command for DME_ENABLE
3750 * @hba: per adapter instance
3751 *
3752 * DME_ENABLE command is issued in order to enable UniPro stack.
3753 *
3754 * Returns 0 on success, non-zero value on failure
3755 */
3756static int ufshcd_dme_enable(struct ufs_hba *hba)
3757{
3758 struct uic_command uic_cmd = {0};
3759 int ret;
3760
3761 uic_cmd.command = UIC_CMD_DME_ENABLE;
3762
3763 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3764 if (ret)
3765 dev_err(hba->dev,
Bean Huo1fa05702020-12-07 20:01:37 +01003766 "dme-enable: error code %d\n", ret);
Alim Akhtar39bf2d82020-05-28 06:46:51 +05303767
3768 return ret;
3769}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303770
Yaniv Gardicad2e032015-03-31 17:37:14 +03003771static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3772{
3773 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3774 unsigned long min_sleep_time_us;
3775
3776 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3777 return;
3778
3779 /*
3780 * last_dme_cmd_tstamp will be 0 only for 1st call to
3781 * this function
3782 */
3783 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3784 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3785 } else {
3786 unsigned long delta =
3787 (unsigned long) ktime_to_us(
3788 ktime_sub(ktime_get(),
3789 hba->last_dme_cmd_tstamp));
3790
3791 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3792 min_sleep_time_us =
3793 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3794 else
3795 return; /* no more delay required */
3796 }
3797
3798 /* allow sleep for extra 50us if needed */
3799 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3800}
3801
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303802/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303803 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3804 * @hba: per adapter instance
3805 * @attr_sel: uic command argument1
3806 * @attr_set: attribute set type as uic command argument2
3807 * @mib_val: setting value as uic command argument3
3808 * @peer: indicate whether peer or local
3809 *
3810 * Returns 0 on success, non-zero value on failure
3811 */
3812int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3813 u8 attr_set, u32 mib_val, u8 peer)
3814{
3815 struct uic_command uic_cmd = {0};
3816 static const char *const action[] = {
3817 "dme-set",
3818 "dme-peer-set"
3819 };
3820 const char *set = action[!!peer];
3821 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003822 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303823
3824 uic_cmd.command = peer ?
3825 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3826 uic_cmd.argument1 = attr_sel;
3827 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3828 uic_cmd.argument3 = mib_val;
3829
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003830 do {
3831 /* for peer attributes we retry upon failure */
3832 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3833 if (ret)
3834 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3835 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3836 } while (ret && peer && --retries);
3837
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003838 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003839 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003840 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3841 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303842
3843 return ret;
3844}
3845EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3846
3847/**
3848 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3849 * @hba: per adapter instance
3850 * @attr_sel: uic command argument1
3851 * @mib_val: the value of the attribute as returned by the UIC command
3852 * @peer: indicate whether peer or local
3853 *
3854 * Returns 0 on success, non-zero value on failure
3855 */
3856int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3857 u32 *mib_val, u8 peer)
3858{
3859 struct uic_command uic_cmd = {0};
3860 static const char *const action[] = {
3861 "dme-get",
3862 "dme-peer-get"
3863 };
3864 const char *get = action[!!peer];
3865 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003866 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003867 struct ufs_pa_layer_attr orig_pwr_info;
3868 struct ufs_pa_layer_attr temp_pwr_info;
3869 bool pwr_mode_change = false;
3870
3871 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3872 orig_pwr_info = hba->pwr_info;
3873 temp_pwr_info = orig_pwr_info;
3874
3875 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3876 orig_pwr_info.pwr_rx == FAST_MODE) {
3877 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3878 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3879 pwr_mode_change = true;
3880 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3881 orig_pwr_info.pwr_rx == SLOW_MODE) {
3882 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3883 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3884 pwr_mode_change = true;
3885 }
3886 if (pwr_mode_change) {
3887 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3888 if (ret)
3889 goto out;
3890 }
3891 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303892
3893 uic_cmd.command = peer ?
3894 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3895 uic_cmd.argument1 = attr_sel;
3896
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003897 do {
3898 /* for peer attributes we retry upon failure */
3899 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3900 if (ret)
3901 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3902 get, UIC_GET_ATTR_ID(attr_sel), ret);
3903 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303904
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003905 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003906 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003907 get, UIC_GET_ATTR_ID(attr_sel),
3908 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003909
3910 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303911 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003912
3913 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3914 && pwr_mode_change)
3915 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303916out:
3917 return ret;
3918}
3919EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3920
Bart Van Asschea113eaa2021-07-21 20:34:37 -07003921static inline bool ufshcd_is_saved_err_fatal(struct ufs_hba *hba)
3922{
3923 lockdep_assert_held(hba->host->host_lock);
3924
3925 return (hba->saved_uic_err & UFSHCD_UIC_DL_PA_INIT_ERROR) ||
3926 (hba->saved_err & (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK));
3927}
3928
3929static void ufshcd_schedule_eh(struct ufs_hba *hba)
3930{
3931 bool schedule_eh = false;
3932 unsigned long flags;
3933
3934 spin_lock_irqsave(hba->host->host_lock, flags);
3935 /* handle fatal errors only when link is not in error state */
3936 if (hba->ufshcd_state != UFSHCD_STATE_ERROR) {
3937 if (hba->force_reset || ufshcd_is_link_broken(hba) ||
3938 ufshcd_is_saved_err_fatal(hba))
3939 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED_FATAL;
3940 else
3941 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED_NON_FATAL;
3942 schedule_eh = true;
3943 }
3944 spin_unlock_irqrestore(hba->host->host_lock, flags);
3945
3946 if (schedule_eh)
3947 scsi_schedule_eh(hba->host);
3948}
3949
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303950/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003951 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3952 * state) and waits for it to take effect.
3953 *
3954 * @hba: per adapter instance
3955 * @cmd: UIC command to execute
3956 *
3957 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3958 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3959 * and device UniPro link and hence it's final completion would be indicated by
3960 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3961 * addition to normal UIC command completion Status (UCCS). This function only
3962 * returns after the relevant status bits indicate the completion.
3963 *
3964 * Returns 0 on success, non-zero value on failure
3965 */
3966static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3967{
Bart Van Assche8a686f22021-07-21 20:34:26 -07003968 DECLARE_COMPLETION_ONSTACK(uic_async_done);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003969 unsigned long flags;
Bart Van Asschea113eaa2021-07-21 20:34:37 -07003970 bool schedule_eh = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003971 u8 status;
3972 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003973 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003974
3975 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003976 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003977
3978 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo4db7a232020-08-09 05:15:51 -07003979 if (ufshcd_is_link_broken(hba)) {
3980 ret = -ENOLINK;
3981 goto out_unlock;
3982 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003983 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003984 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3985 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3986 /*
3987 * Make sure UIC command completion interrupt is disabled before
3988 * issuing UIC command.
3989 */
3990 wmb();
3991 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003992 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003993 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3994 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003995 if (ret) {
3996 dev_err(hba->dev,
3997 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3998 cmd->command, cmd->argument3, ret);
3999 goto out;
4000 }
4001
4002 if (!wait_for_completion_timeout(hba->uic_async_done,
4003 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
4004 dev_err(hba->dev,
4005 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
4006 cmd->command, cmd->argument3);
Can Guo0f52fcb92020-11-02 22:24:40 -08004007
4008 if (!cmd->cmd_active) {
4009 dev_err(hba->dev, "%s: Power Mode Change operation has been completed, go check UPMCRS\n",
4010 __func__);
4011 goto check_upmcrs;
4012 }
4013
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004014 ret = -ETIMEDOUT;
4015 goto out;
4016 }
4017
Can Guo0f52fcb92020-11-02 22:24:40 -08004018check_upmcrs:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004019 status = ufshcd_get_upmcrs(hba);
4020 if (status != PWR_LOCAL) {
4021 dev_err(hba->dev,
Zang Leigang479da362017-09-19 16:50:30 +08004022 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004023 cmd->command, status);
4024 ret = (status != PWR_OK) ? status : -1;
4025 }
4026out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004027 if (ret) {
4028 ufshcd_print_host_state(hba);
4029 ufshcd_print_pwr_info(hba);
Stanley Chue965e5e2020-12-05 19:58:59 +08004030 ufshcd_print_evt_hist(hba);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004031 }
4032
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004033 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02004034 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004035 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02004036 if (reenable_intr)
4037 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Can Guo4db7a232020-08-09 05:15:51 -07004038 if (ret) {
4039 ufshcd_set_link_broken(hba);
Bart Van Asschea113eaa2021-07-21 20:34:37 -07004040 schedule_eh = true;
Can Guo4db7a232020-08-09 05:15:51 -07004041 }
Bart Van Asschea113eaa2021-07-21 20:34:37 -07004042
Can Guo4db7a232020-08-09 05:15:51 -07004043out_unlock:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004044 spin_unlock_irqrestore(hba->host->host_lock, flags);
Bart Van Asschea113eaa2021-07-21 20:34:37 -07004045
4046 if (schedule_eh)
4047 ufshcd_schedule_eh(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004048 mutex_unlock(&hba->uic_cmd_mutex);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004049
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004050 return ret;
4051}
4052
4053/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304054 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
4055 * using DME_SET primitives.
4056 * @hba: per adapter instance
4057 * @mode: powr mode value
4058 *
4059 * Returns 0 on success, non-zero value on failure
4060 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05304061static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304062{
4063 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004064 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304065
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03004066 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
4067 ret = ufshcd_dme_set(hba,
4068 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
4069 if (ret) {
4070 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
4071 __func__, ret);
4072 goto out;
4073 }
4074 }
4075
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304076 uic_cmd.command = UIC_CMD_DME_SET;
4077 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
4078 uic_cmd.argument3 = mode;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004079 ufshcd_hold(hba, false);
4080 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
4081 ufshcd_release(hba);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304082
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03004083out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004084 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004085}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304086
Stanley Chu087c5ef2020-03-27 17:53:28 +08004087int ufshcd_link_recovery(struct ufs_hba *hba)
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004088{
4089 int ret;
4090 unsigned long flags;
4091
4092 spin_lock_irqsave(hba->host->host_lock, flags);
4093 hba->ufshcd_state = UFSHCD_STATE_RESET;
4094 ufshcd_set_eh_in_progress(hba);
4095 spin_unlock_irqrestore(hba->host->host_lock, flags);
4096
Can Guoebdd1df2019-11-14 22:09:24 -08004097 /* Reset the attached device */
Stanley Chu31a5d9c2020-12-08 21:56:35 +08004098 ufshcd_device_reset(hba);
Can Guoebdd1df2019-11-14 22:09:24 -08004099
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004100 ret = ufshcd_host_reset_and_restore(hba);
4101
4102 spin_lock_irqsave(hba->host->host_lock, flags);
4103 if (ret)
4104 hba->ufshcd_state = UFSHCD_STATE_ERROR;
4105 ufshcd_clear_eh_in_progress(hba);
4106 spin_unlock_irqrestore(hba->host->host_lock, flags);
4107
4108 if (ret)
4109 dev_err(hba->dev, "%s: link recovery failed, err %d",
4110 __func__, ret);
Jaegeuk Kim4ee7ee52021-01-07 10:53:15 -08004111 else
4112 ufshcd_clear_ua_wluns(hba);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004113
4114 return ret;
4115}
Stanley Chu087c5ef2020-03-27 17:53:28 +08004116EXPORT_SYMBOL_GPL(ufshcd_link_recovery);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004117
Asutosh Das525943a2021-09-28 02:06:12 -07004118int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004119{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004120 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004121 struct uic_command uic_cmd = {0};
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08004122 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004123
Kiwoong Kimee32c902016-11-10 21:17:43 +09004124 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
4125
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004126 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004127 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08004128 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
4129 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004130
Can Guo4db7a232020-08-09 05:15:51 -07004131 if (ret)
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004132 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
4133 __func__, ret);
Can Guo4db7a232020-08-09 05:15:51 -07004134 else
Kiwoong Kimee32c902016-11-10 21:17:43 +09004135 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
4136 POST_CHANGE);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004137
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004138 return ret;
4139}
Asutosh Das525943a2021-09-28 02:06:12 -07004140EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_enter);
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02004141
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004142int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004143{
4144 struct uic_command uic_cmd = {0};
4145 int ret;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08004146 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004147
Kiwoong Kimee32c902016-11-10 21:17:43 +09004148 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
4149
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004150 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
4151 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08004152 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
4153 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
4154
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304155 if (ret) {
Yaniv Gardi53c12d02016-02-01 15:02:45 +02004156 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
4157 __func__, ret);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004158 } else {
Kiwoong Kimee32c902016-11-10 21:17:43 +09004159 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
4160 POST_CHANGE);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004161 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
4162 hba->ufs_stats.hibern8_exit_cnt++;
4163 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304164
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304165 return ret;
4166}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004167EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_exit);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304168
Stanley Chuba7af5e2019-12-30 13:32:28 +08004169void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit)
4170{
4171 unsigned long flags;
Can Guobe7594a2020-03-05 00:53:07 -08004172 bool update = false;
Stanley Chuba7af5e2019-12-30 13:32:28 +08004173
Can Guobe7594a2020-03-05 00:53:07 -08004174 if (!ufshcd_is_auto_hibern8_supported(hba))
Stanley Chuba7af5e2019-12-30 13:32:28 +08004175 return;
4176
4177 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guobe7594a2020-03-05 00:53:07 -08004178 if (hba->ahit != ahit) {
4179 hba->ahit = ahit;
4180 update = true;
4181 }
Stanley Chuba7af5e2019-12-30 13:32:28 +08004182 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guobe7594a2020-03-05 00:53:07 -08004183
Asutosh Dasb294ff32021-04-23 17:20:16 -07004184 if (update &&
4185 !pm_runtime_suspended(&hba->sdev_ufs_device->sdev_gendev)) {
4186 ufshcd_rpm_get_sync(hba);
Can Guobe7594a2020-03-05 00:53:07 -08004187 ufshcd_hold(hba, false);
4188 ufshcd_auto_hibern8_enable(hba);
4189 ufshcd_release(hba);
Asutosh Dasb294ff32021-04-23 17:20:16 -07004190 ufshcd_rpm_put_sync(hba);
Can Guobe7594a2020-03-05 00:53:07 -08004191 }
Stanley Chuba7af5e2019-12-30 13:32:28 +08004192}
4193EXPORT_SYMBOL_GPL(ufshcd_auto_hibern8_update);
4194
Can Guo71d848b2019-11-14 22:09:26 -08004195void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
Adrian Hunterad448372018-03-20 15:07:38 +02004196{
4197 unsigned long flags;
4198
Bao D. Nguyen499f7a92020-08-28 18:05:13 -07004199 if (!ufshcd_is_auto_hibern8_supported(hba))
Adrian Hunterad448372018-03-20 15:07:38 +02004200 return;
4201
4202 spin_lock_irqsave(hba->host->host_lock, flags);
4203 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
4204 spin_unlock_irqrestore(hba->host->host_lock, flags);
4205}
4206
Yaniv Gardi50646362014-10-23 13:25:13 +03004207 /**
4208 * ufshcd_init_pwr_info - setting the POR (power on reset)
4209 * values in hba power info
4210 * @hba: per-adapter instance
4211 */
4212static void ufshcd_init_pwr_info(struct ufs_hba *hba)
4213{
4214 hba->pwr_info.gear_rx = UFS_PWM_G1;
4215 hba->pwr_info.gear_tx = UFS_PWM_G1;
4216 hba->pwr_info.lane_rx = 1;
4217 hba->pwr_info.lane_tx = 1;
4218 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
4219 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
4220 hba->pwr_info.hs_rate = 0;
4221}
4222
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304223/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004224 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
4225 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304226 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004227static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304228{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004229 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
4230
4231 if (hba->max_pwr_info.is_valid)
4232 return 0;
4233
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004234 pwr_info->pwr_tx = FAST_MODE;
4235 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004236 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304237
4238 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004239 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
4240 &pwr_info->lane_rx);
4241 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4242 &pwr_info->lane_tx);
4243
4244 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
4245 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
4246 __func__,
4247 pwr_info->lane_rx,
4248 pwr_info->lane_tx);
4249 return -EINVAL;
4250 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304251
4252 /*
4253 * First, get the maximum gears of HS speed.
4254 * If a zero value, it means there is no HSGEAR capability.
4255 * Then, get the maximum gears of PWM speed.
4256 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004257 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
4258 if (!pwr_info->gear_rx) {
4259 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4260 &pwr_info->gear_rx);
4261 if (!pwr_info->gear_rx) {
4262 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
4263 __func__, pwr_info->gear_rx);
4264 return -EINVAL;
4265 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004266 pwr_info->pwr_rx = SLOW_MODE;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304267 }
4268
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004269 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
4270 &pwr_info->gear_tx);
4271 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304272 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004273 &pwr_info->gear_tx);
4274 if (!pwr_info->gear_tx) {
4275 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
4276 __func__, pwr_info->gear_tx);
4277 return -EINVAL;
4278 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004279 pwr_info->pwr_tx = SLOW_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004280 }
4281
4282 hba->max_pwr_info.is_valid = true;
4283 return 0;
4284}
4285
4286static int ufshcd_change_power_mode(struct ufs_hba *hba,
4287 struct ufs_pa_layer_attr *pwr_mode)
4288{
4289 int ret;
4290
4291 /* if already configured to the requested pwr_mode */
Can Guo2355b662020-08-24 19:07:06 -07004292 if (!hba->force_pmc &&
4293 pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004294 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4295 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4296 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4297 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4298 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4299 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4300 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4301 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304302 }
4303
4304 /*
4305 * Configure attributes for power mode change with below.
4306 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4307 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4308 * - PA_HSSERIES
4309 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004310 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4311 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4312 pwr_mode->lane_rx);
4313 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4314 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304315 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004316 else
4317 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304318
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004319 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4320 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4321 pwr_mode->lane_tx);
4322 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4323 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304324 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004325 else
4326 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304327
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004328 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4329 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4330 pwr_mode->pwr_rx == FAST_MODE ||
4331 pwr_mode->pwr_tx == FAST_MODE)
4332 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4333 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304334
Kiwoong Kimb1d0d2e2020-12-21 10:24:40 +09004335 if (!(hba->quirks & UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING)) {
4336 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
4337 DL_FC0ProtectionTimeOutVal_Default);
4338 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
4339 DL_TC0ReplayTimeOutVal_Default);
4340 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
4341 DL_AFC0ReqTimeOutVal_Default);
4342 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
4343 DL_FC1ProtectionTimeOutVal_Default);
4344 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
4345 DL_TC1ReplayTimeOutVal_Default);
4346 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
4347 DL_AFC1ReqTimeOutVal_Default);
Can Guo08342532019-12-05 02:14:42 +00004348
Kiwoong Kimb1d0d2e2020-12-21 10:24:40 +09004349 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
4350 DL_FC0ProtectionTimeOutVal_Default);
4351 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
4352 DL_TC0ReplayTimeOutVal_Default);
4353 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
4354 DL_AFC0ReqTimeOutVal_Default);
4355 }
Can Guo08342532019-12-05 02:14:42 +00004356
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004357 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4358 | pwr_mode->pwr_tx);
4359
4360 if (ret) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304361 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004362 "%s: power mode change failed %d\n", __func__, ret);
4363 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004364 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4365 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004366
4367 memcpy(&hba->pwr_info, pwr_mode,
4368 sizeof(struct ufs_pa_layer_attr));
4369 }
4370
4371 return ret;
4372}
4373
4374/**
4375 * ufshcd_config_pwr_mode - configure a new power mode
4376 * @hba: per-adapter instance
4377 * @desired_pwr_mode: desired power configuration
4378 */
Alim Akhtar0d846e72018-05-06 15:44:18 +05304379int ufshcd_config_pwr_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004380 struct ufs_pa_layer_attr *desired_pwr_mode)
4381{
4382 struct ufs_pa_layer_attr final_params = { 0 };
4383 int ret;
4384
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004385 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4386 desired_pwr_mode, &final_params);
4387
4388 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004389 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4390
4391 ret = ufshcd_change_power_mode(hba, &final_params);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304392
4393 return ret;
4394}
Alim Akhtar0d846e72018-05-06 15:44:18 +05304395EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304396
4397/**
Dolev Raviv68078d52013-07-30 00:35:58 +05304398 * ufshcd_complete_dev_init() - checks device readiness
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004399 * @hba: per-adapter instance
Dolev Raviv68078d52013-07-30 00:35:58 +05304400 *
4401 * Set fDeviceInit flag and poll until device toggles it.
4402 */
4403static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4404{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004405 int err;
Jason Yan7dfdcc32020-04-26 17:43:05 +08004406 bool flag_res = true;
Kiwoong Kim29707fa2020-08-10 19:02:27 +09004407 ktime_t timeout;
Dolev Raviv68078d52013-07-30 00:35:58 +05304408
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004409 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08004410 QUERY_FLAG_IDN_FDEVICEINIT, 0, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05304411 if (err) {
4412 dev_err(hba->dev,
4413 "%s setting fDeviceInit flag failed with error %d\n",
4414 __func__, err);
4415 goto out;
4416 }
4417
Kiwoong Kim29707fa2020-08-10 19:02:27 +09004418 /* Poll fDeviceInit flag to be cleared */
4419 timeout = ktime_add_ms(ktime_get(), FDEVICEINIT_COMPL_TIMEOUT);
4420 do {
4421 err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4422 QUERY_FLAG_IDN_FDEVICEINIT, 0, &flag_res);
4423 if (!flag_res)
4424 break;
4425 usleep_range(5000, 10000);
4426 } while (ktime_before(ktime_get(), timeout));
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004427
Kiwoong Kim29707fa2020-08-10 19:02:27 +09004428 if (err) {
Dolev Raviv68078d52013-07-30 00:35:58 +05304429 dev_err(hba->dev,
Kiwoong Kim29707fa2020-08-10 19:02:27 +09004430 "%s reading fDeviceInit flag failed with error %d\n",
4431 __func__, err);
4432 } else if (flag_res) {
Dolev Raviv68078d52013-07-30 00:35:58 +05304433 dev_err(hba->dev,
Kiwoong Kim29707fa2020-08-10 19:02:27 +09004434 "%s fDeviceInit was not cleared by the device\n",
4435 __func__);
4436 err = -EBUSY;
4437 }
Dolev Raviv68078d52013-07-30 00:35:58 +05304438out:
4439 return err;
4440}
4441
4442/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304443 * ufshcd_make_hba_operational - Make UFS controller operational
4444 * @hba: per adapter instance
4445 *
4446 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004447 * 1. Enable required interrupts
4448 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004449 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004450 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304451 *
4452 * Returns 0 on success, non-zero value on failure
4453 */
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004454int ufshcd_make_hba_operational(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304455{
4456 int err = 0;
4457 u32 reg;
4458
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304459 /* Enable required interrupts */
4460 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4461
4462 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004463 if (ufshcd_is_intr_aggr_allowed(hba))
4464 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4465 else
4466 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304467
4468 /* Configure UTRL and UTMRL base address registers */
4469 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4470 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4471 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4472 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4473 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4474 REG_UTP_TASK_REQ_LIST_BASE_L);
4475 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4476 REG_UTP_TASK_REQ_LIST_BASE_H);
4477
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304478 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004479 * Make sure base address and interrupt setup are updated before
4480 * enabling the run/stop registers below.
4481 */
4482 wmb();
4483
4484 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304485 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304486 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004487 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304488 if (!(ufshcd_get_lists_status(reg))) {
4489 ufshcd_enable_run_stop_reg(hba);
4490 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304491 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304492 "Host controller not ready to process requests");
4493 err = -EIO;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304494 }
4495
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304496 return err;
4497}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004498EXPORT_SYMBOL_GPL(ufshcd_make_hba_operational);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304499
4500/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02004501 * ufshcd_hba_stop - Send controller to reset state
4502 * @hba: per adapter instance
Yaniv Gardi596585a2016-03-10 17:37:08 +02004503 */
Alice.Chao3a95f5b2021-05-28 11:36:21 +08004504void ufshcd_hba_stop(struct ufs_hba *hba)
Yaniv Gardi596585a2016-03-10 17:37:08 +02004505{
Bart Van Assche5cac1092020-05-07 15:27:50 -07004506 unsigned long flags;
Yaniv Gardi596585a2016-03-10 17:37:08 +02004507 int err;
4508
Bart Van Assche5cac1092020-05-07 15:27:50 -07004509 /*
4510 * Obtain the host lock to prevent that the controller is disabled
4511 * while the UFS interrupt handler is active on another CPU.
4512 */
4513 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02004514 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
Bart Van Assche5cac1092020-05-07 15:27:50 -07004515 spin_unlock_irqrestore(hba->host->host_lock, flags);
4516
Yaniv Gardi596585a2016-03-10 17:37:08 +02004517 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4518 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
Bart Van Assche5cac1092020-05-07 15:27:50 -07004519 10, 1);
Yaniv Gardi596585a2016-03-10 17:37:08 +02004520 if (err)
4521 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4522}
Alice.Chao3a95f5b2021-05-28 11:36:21 +08004523EXPORT_SYMBOL_GPL(ufshcd_hba_stop);
Yaniv Gardi596585a2016-03-10 17:37:08 +02004524
4525/**
Alim Akhtar39bf2d82020-05-28 06:46:51 +05304526 * ufshcd_hba_execute_hce - initialize the controller
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304527 * @hba: per adapter instance
4528 *
4529 * The controller resets itself and controller firmware initialization
4530 * sequence kicks off. When controller is ready it will set
4531 * the Host Controller Enable bit to 1.
4532 *
4533 * Returns 0 on success, non-zero value on failure
4534 */
Alim Akhtar39bf2d82020-05-28 06:46:51 +05304535static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304536{
Stanley Chu6081b122020-11-12 13:45:37 +08004537 int retry_outer = 3;
4538 int retry_inner;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304539
Stanley Chu6081b122020-11-12 13:45:37 +08004540start:
Yaniv Gardi596585a2016-03-10 17:37:08 +02004541 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304542 /* change controller state to "reset state" */
Bart Van Assche5cac1092020-05-07 15:27:50 -07004543 ufshcd_hba_stop(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304544
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004545 /* UniPro link is disabled at this point */
4546 ufshcd_set_link_off(hba);
4547
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004548 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004549
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304550 /* start controller initialization sequence */
4551 ufshcd_hba_start(hba);
4552
4553 /*
4554 * To initialize a UFS host controller HCE bit must be set to 1.
4555 * During initialization the HCE bit value changes from 1->0->1.
4556 * When the host controller completes initialization sequence
4557 * it sets the value of HCE bit to 1. The same HCE bit is read back
4558 * to check if the controller has completed initialization sequence.
4559 * So without this delay the value HCE = 1, set in the previous
4560 * instruction might be read back.
4561 * This delay can be changed based on the controller.
4562 */
Stanley Chu90b84912020-05-09 17:37:13 +08004563 ufshcd_delay_us(hba->vps->hba_enable_delay_us, 100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304564
4565 /* wait for the host controller to complete initialization */
Stanley Chu6081b122020-11-12 13:45:37 +08004566 retry_inner = 50;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304567 while (ufshcd_is_hba_active(hba)) {
Stanley Chu6081b122020-11-12 13:45:37 +08004568 if (retry_inner) {
4569 retry_inner--;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304570 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304571 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304572 "Controller enable failed\n");
Stanley Chu6081b122020-11-12 13:45:37 +08004573 if (retry_outer) {
4574 retry_outer--;
4575 goto start;
4576 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304577 return -EIO;
4578 }
Stanley Chu9fc305e2020-03-18 18:40:15 +08004579 usleep_range(1000, 1100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304580 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004581
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004582 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004583 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004584
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004585 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004586
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304587 return 0;
4588}
Alim Akhtar39bf2d82020-05-28 06:46:51 +05304589
4590int ufshcd_hba_enable(struct ufs_hba *hba)
4591{
4592 int ret;
4593
4594 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4595 ufshcd_set_link_off(hba);
4596 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4597
4598 /* enable UIC related interrupts */
4599 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4600 ret = ufshcd_dme_reset(hba);
4601 if (!ret) {
4602 ret = ufshcd_dme_enable(hba);
4603 if (!ret)
4604 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4605 if (ret)
4606 dev_err(hba->dev,
4607 "Host controller enable failed with non-hce\n");
4608 }
4609 } else {
4610 ret = ufshcd_hba_execute_hce(hba);
4611 }
4612
4613 return ret;
4614}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004615EXPORT_SYMBOL_GPL(ufshcd_hba_enable);
4616
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004617static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4618{
Stanley Chuba0320f2020-03-18 18:40:10 +08004619 int tx_lanes = 0, i, err = 0;
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004620
4621 if (!peer)
4622 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4623 &tx_lanes);
4624 else
4625 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4626 &tx_lanes);
4627 for (i = 0; i < tx_lanes; i++) {
4628 if (!peer)
4629 err = ufshcd_dme_set(hba,
4630 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4631 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4632 0);
4633 else
4634 err = ufshcd_dme_peer_set(hba,
4635 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4636 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4637 0);
4638 if (err) {
4639 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4640 __func__, peer, i, err);
4641 break;
4642 }
4643 }
4644
4645 return err;
4646}
4647
4648static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4649{
4650 return ufshcd_disable_tx_lcc(hba, true);
4651}
4652
Stanley Chue965e5e2020-12-05 19:58:59 +08004653void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val)
Stanley Chu8808b4e2019-07-10 21:38:21 +08004654{
Stanley Chue965e5e2020-12-05 19:58:59 +08004655 struct ufs_event_hist *e;
4656
4657 if (id >= UFS_EVT_CNT)
4658 return;
4659
4660 e = &hba->ufs_stats.event[id];
4661 e->val[e->pos] = val;
4662 e->tstamp[e->pos] = ktime_get();
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02004663 e->cnt += 1;
Stanley Chue965e5e2020-12-05 19:58:59 +08004664 e->pos = (e->pos + 1) % UFS_EVENT_HIST_LENGTH;
Stanley Chu172614a2020-12-05 19:59:00 +08004665
4666 ufshcd_vops_event_notify(hba, id, &val);
Stanley Chu8808b4e2019-07-10 21:38:21 +08004667}
Stanley Chue965e5e2020-12-05 19:58:59 +08004668EXPORT_SYMBOL_GPL(ufshcd_update_evt_hist);
Stanley Chu8808b4e2019-07-10 21:38:21 +08004669
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304670/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304671 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304672 * @hba: per adapter instance
4673 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304674 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304675 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304676static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304677{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304678 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004679 int retries = DME_LINKSTARTUP_RETRIES;
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004680 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304681
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004682 /*
4683 * If UFS device isn't active then we will have to issue link startup
4684 * 2 times to make sure the device state move to active.
4685 */
4686 if (!ufshcd_is_ufs_dev_active(hba))
4687 link_startup_again = true;
4688
4689link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004690 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004691 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304692
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004693 ret = ufshcd_dme_link_startup(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004694
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004695 /* check if device is detected by inter-connect layer */
4696 if (!ret && !ufshcd_is_device_present(hba)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08004697 ufshcd_update_evt_hist(hba,
4698 UFS_EVT_LINK_STARTUP_FAIL,
Stanley Chu8808b4e2019-07-10 21:38:21 +08004699 0);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004700 dev_err(hba->dev, "%s: Device not present\n", __func__);
4701 ret = -ENXIO;
4702 goto out;
4703 }
4704
4705 /*
4706 * DME link lost indication is only received when link is up,
4707 * but we can't be sure if the link is up until link startup
4708 * succeeds. So reset the local Uni-Pro and try again.
4709 */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004710 if (ret && ufshcd_hba_enable(hba)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08004711 ufshcd_update_evt_hist(hba,
4712 UFS_EVT_LINK_STARTUP_FAIL,
Stanley Chu8808b4e2019-07-10 21:38:21 +08004713 (u32)ret);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004714 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004715 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004716 } while (ret && retries--);
4717
Stanley Chu8808b4e2019-07-10 21:38:21 +08004718 if (ret) {
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004719 /* failed to get the link up... retire */
Stanley Chue965e5e2020-12-05 19:58:59 +08004720 ufshcd_update_evt_hist(hba,
4721 UFS_EVT_LINK_STARTUP_FAIL,
Stanley Chu8808b4e2019-07-10 21:38:21 +08004722 (u32)ret);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304723 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004724 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304725
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004726 if (link_startup_again) {
4727 link_startup_again = false;
4728 retries = DME_LINKSTARTUP_RETRIES;
4729 goto link_startup;
4730 }
4731
subhashj@codeaurora.orgd2aebb92016-12-22 18:41:33 -08004732 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4733 ufshcd_init_pwr_info(hba);
4734 ufshcd_print_pwr_info(hba);
4735
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004736 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4737 ret = ufshcd_disable_device_tx_lcc(hba);
4738 if (ret)
4739 goto out;
4740 }
4741
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004742 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004743 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4744 if (ret)
4745 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004746
Can Guo2355b662020-08-24 19:07:06 -07004747 /* Clear UECPA once due to LINERESET has happened during LINK_STARTUP */
4748 ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004749 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304750out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004751 if (ret) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304752 dev_err(hba->dev, "link startup failed %d\n", ret);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004753 ufshcd_print_host_state(hba);
4754 ufshcd_print_pwr_info(hba);
Stanley Chue965e5e2020-12-05 19:58:59 +08004755 ufshcd_print_evt_hist(hba);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004756 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304757 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304758}
4759
4760/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304761 * ufshcd_verify_dev_init() - Verify device initialization
4762 * @hba: per-adapter instance
4763 *
4764 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4765 * device Transport Protocol (UTP) layer is ready after a reset.
4766 * If the UTP layer at the device side is not initialized, it may
4767 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4768 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4769 */
4770static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4771{
4772 int err = 0;
4773 int retries;
4774
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004775 ufshcd_hold(hba, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304776 mutex_lock(&hba->dev_cmd.lock);
4777 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4778 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4779 NOP_OUT_TIMEOUT);
4780
4781 if (!err || err == -ETIMEDOUT)
4782 break;
4783
4784 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4785 }
4786 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004787 ufshcd_release(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304788
4789 if (err)
4790 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4791 return err;
4792}
4793
4794/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004795 * ufshcd_set_queue_depth - set lun queue depth
4796 * @sdev: pointer to SCSI device
4797 *
4798 * Read bLUQueueDepth value and activate scsi tagged command
4799 * queueing. For WLUN, queue depth is set to 1. For best-effort
4800 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4801 * value that host can queue.
4802 */
4803static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4804{
4805 int ret = 0;
4806 u8 lun_qdepth;
4807 struct ufs_hba *hba;
4808
4809 hba = shost_priv(sdev->host);
4810
4811 lun_qdepth = hba->nutrs;
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02004812 ret = ufshcd_read_unit_desc_param(hba,
4813 ufshcd_scsi_to_upiu_lun(sdev->lun),
4814 UNIT_DESC_PARAM_LU_Q_DEPTH,
4815 &lun_qdepth,
4816 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004817
4818 /* Some WLUN doesn't support unit descriptor */
4819 if (ret == -EOPNOTSUPP)
4820 lun_qdepth = 1;
4821 else if (!lun_qdepth)
4822 /* eventually, we can figure out the real queue depth */
4823 lun_qdepth = hba->nutrs;
4824 else
4825 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4826
4827 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4828 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004829 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004830}
4831
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004832/*
4833 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4834 * @hba: per-adapter instance
4835 * @lun: UFS device lun id
4836 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4837 *
4838 * Returns 0 in case of success and b_lu_write_protect status would be returned
4839 * @b_lu_write_protect parameter.
4840 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4841 * Returns -EINVAL in case of invalid parameters passed to this function.
4842 */
4843static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4844 u8 lun,
4845 u8 *b_lu_write_protect)
4846{
4847 int ret;
4848
4849 if (!b_lu_write_protect)
4850 ret = -EINVAL;
4851 /*
4852 * According to UFS device spec, RPMB LU can't be write
4853 * protected so skip reading bLUWriteProtect parameter for
4854 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4855 */
Bean Huo1baa8012020-01-20 14:08:20 +01004856 else if (lun >= hba->dev_info.max_lu_supported)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004857 ret = -ENOTSUPP;
4858 else
4859 ret = ufshcd_read_unit_desc_param(hba,
4860 lun,
4861 UNIT_DESC_PARAM_LU_WR_PROTECT,
4862 b_lu_write_protect,
4863 sizeof(*b_lu_write_protect));
4864 return ret;
4865}
4866
4867/**
4868 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4869 * status
4870 * @hba: per-adapter instance
4871 * @sdev: pointer to SCSI device
4872 *
4873 */
4874static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4875 struct scsi_device *sdev)
4876{
4877 if (hba->dev_info.f_power_on_wp_en &&
4878 !hba->dev_info.is_lu_power_on_wp) {
4879 u8 b_lu_write_protect;
4880
4881 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4882 &b_lu_write_protect) &&
4883 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4884 hba->dev_info.is_lu_power_on_wp = true;
4885 }
4886}
4887
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004888/**
Asutosh Dasb294ff32021-04-23 17:20:16 -07004889 * ufshcd_setup_links - associate link b/w device wlun and other luns
4890 * @sdev: pointer to SCSI device
4891 * @hba: pointer to ufs hba
4892 */
4893static void ufshcd_setup_links(struct ufs_hba *hba, struct scsi_device *sdev)
4894{
4895 struct device_link *link;
4896
4897 /*
4898 * Device wlun is the supplier & rest of the luns are consumers.
4899 * This ensures that device wlun suspends after all other luns.
4900 */
4901 if (hba->sdev_ufs_device) {
4902 link = device_link_add(&sdev->sdev_gendev,
4903 &hba->sdev_ufs_device->sdev_gendev,
4904 DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE);
4905 if (!link) {
4906 dev_err(&sdev->sdev_gendev, "Failed establishing link - %s\n",
4907 dev_name(&hba->sdev_ufs_device->sdev_gendev));
4908 return;
4909 }
4910 hba->luns_avail--;
4911 /* Ignore REPORT_LUN wlun probing */
4912 if (hba->luns_avail == 1) {
4913 ufshcd_rpm_put(hba);
4914 return;
4915 }
4916 } else {
4917 /*
4918 * Device wlun is probed. The assumption is that WLUNs are
4919 * scanned before other LUNs.
4920 */
4921 hba->luns_avail--;
4922 }
4923}
4924
4925/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304926 * ufshcd_slave_alloc - handle initial SCSI device configurations
4927 * @sdev: pointer to SCSI device
4928 *
4929 * Returns success
4930 */
4931static int ufshcd_slave_alloc(struct scsi_device *sdev)
4932{
4933 struct ufs_hba *hba;
4934
4935 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304936
4937 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4938 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304939
Can Guoa3a76392019-12-05 02:14:30 +00004940 /* DBD field should be set to 1 in mode sense(10) */
4941 sdev->set_dbd_for_ms = 1;
4942
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304943 /* allow SCSI layer to restart the device in case of errors */
4944 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004945
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004946 /* REPORT SUPPORTED OPERATION CODES is not supported */
4947 sdev->no_report_opcodes = 1;
4948
Sujit Reddy Thumma84af7e82018-01-24 09:52:35 +05304949 /* WRITE_SAME command is not supported */
4950 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004951
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004952 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004953
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004954 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4955
Asutosh Dasb294ff32021-04-23 17:20:16 -07004956 ufshcd_setup_links(hba, sdev);
4957
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004958 return 0;
4959}
4960
4961/**
4962 * ufshcd_change_queue_depth - change queue depth
4963 * @sdev: pointer to SCSI device
4964 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004965 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004966 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004967 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004968static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004969{
4970 struct ufs_hba *hba = shost_priv(sdev->host);
4971
4972 if (depth > hba->nutrs)
4973 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004974 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304975}
4976
Daejun Parkf02bc972021-07-12 17:58:30 +09004977static void ufshcd_hpb_destroy(struct ufs_hba *hba, struct scsi_device *sdev)
4978{
4979 /* skip well-known LU */
Daejun Park41d8a932021-07-12 18:00:25 +09004980 if ((sdev->lun >= UFS_UPIU_MAX_UNIT_NUM_ID) ||
4981 !(hba->dev_info.hpb_enabled) || !ufshpb_is_allowed(hba))
Daejun Parkf02bc972021-07-12 17:58:30 +09004982 return;
4983
4984 ufshpb_destroy_lu(hba, sdev);
4985}
4986
4987static void ufshcd_hpb_configure(struct ufs_hba *hba, struct scsi_device *sdev)
4988{
4989 /* skip well-known LU */
4990 if ((sdev->lun >= UFS_UPIU_MAX_UNIT_NUM_ID) ||
4991 !(hba->dev_info.hpb_enabled) || !ufshpb_is_allowed(hba))
4992 return;
4993
4994 ufshpb_init_hpb_lu(hba, sdev);
4995}
4996
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304997/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004998 * ufshcd_slave_configure - adjust SCSI device configurations
4999 * @sdev: pointer to SCSI device
5000 */
5001static int ufshcd_slave_configure(struct scsi_device *sdev)
5002{
Stanley Chu49615ba2019-09-16 23:56:50 +08005003 struct ufs_hba *hba = shost_priv(sdev->host);
Akinobu Mitaeeda4742014-07-01 23:00:32 +09005004 struct request_queue *q = sdev->request_queue;
5005
Daejun Parkf02bc972021-07-12 17:58:30 +09005006 ufshcd_hpb_configure(hba, sdev);
5007
Akinobu Mitaeeda4742014-07-01 23:00:32 +09005008 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
Kiwoong Kim2b2bfc8a2021-01-19 12:33:41 +09005009 if (hba->quirks & UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE)
5010 blk_queue_update_dma_alignment(q, PAGE_SIZE - 1);
Asutosh Dasb294ff32021-04-23 17:20:16 -07005011 /*
5012 * Block runtime-pm until all consumers are added.
5013 * Refer ufshcd_setup_links().
5014 */
5015 if (is_device_wlun(sdev))
5016 pm_runtime_get_noresume(&sdev->sdev_gendev);
5017 else if (ufshcd_is_rpm_autosuspend_allowed(hba))
Stanley Chu49615ba2019-09-16 23:56:50 +08005018 sdev->rpm_autosuspend = 1;
5019
Satya Tangiraladf043c742020-07-06 20:04:14 +00005020 ufshcd_crypto_setup_rq_keyslot_manager(hba, q);
5021
Akinobu Mitaeeda4742014-07-01 23:00:32 +09005022 return 0;
5023}
5024
5025/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305026 * ufshcd_slave_destroy - remove SCSI device configurations
5027 * @sdev: pointer to SCSI device
5028 */
5029static void ufshcd_slave_destroy(struct scsi_device *sdev)
5030{
5031 struct ufs_hba *hba;
Adrian Hunterbf259672021-08-06 16:04:41 +03005032 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305033
5034 hba = shost_priv(sdev->host);
Daejun Parkf02bc972021-07-12 17:58:30 +09005035
5036 ufshcd_hpb_destroy(hba, sdev);
5037
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03005038 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03005039 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03005040 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03005041 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03005042 spin_unlock_irqrestore(hba->host->host_lock, flags);
Adrian Hunterbf259672021-08-06 16:04:41 +03005043 } else if (hba->sdev_ufs_device) {
5044 struct device *supplier = NULL;
5045
5046 /* Ensure UFS Device WLUN exists and does not disappear */
5047 spin_lock_irqsave(hba->host->host_lock, flags);
5048 if (hba->sdev_ufs_device) {
5049 supplier = &hba->sdev_ufs_device->sdev_gendev;
5050 get_device(supplier);
5051 }
5052 spin_unlock_irqrestore(hba->host->host_lock, flags);
5053
5054 if (supplier) {
5055 /*
5056 * If a LUN fails to probe (e.g. absent BOOT WLUN), the
5057 * device will not have been registered but can still
5058 * have a device link holding a reference to the device.
5059 */
5060 device_link_remove(&sdev->sdev_gendev, supplier);
5061 put_device(supplier);
5062 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03005063 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305064}
5065
5066/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305067 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
Bart Van Assche8aa29f12018-03-01 15:07:20 -08005068 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305069 * @scsi_status: SCSI command status
5070 *
5071 * Returns value base on SCSI command status
5072 */
5073static inline int
5074ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
5075{
5076 int result = 0;
5077
5078 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05305079 case SAM_STAT_CHECK_CONDITION:
5080 ufshcd_copy_sense_data(lrbp);
Gustavo A. R. Silvadf561f662020-08-23 17:36:59 -05005081 fallthrough;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305082 case SAM_STAT_GOOD:
Hannes Reineckedb83d8a2021-01-13 10:04:48 +01005083 result |= DID_OK << 16 | scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305084 break;
5085 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05305086 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305087 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05305088 ufshcd_copy_sense_data(lrbp);
5089 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305090 break;
5091 default:
5092 result |= DID_ERROR << 16;
5093 break;
5094 } /* end of switch */
5095
5096 return result;
5097}
5098
5099/**
5100 * ufshcd_transfer_rsp_status - Get overall status of the response
5101 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08005102 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305103 *
5104 * Returns result of the command to notify SCSI midlayer
5105 */
5106static inline int
5107ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
5108{
5109 int result = 0;
5110 int scsi_status;
5111 int ocs;
5112
5113 /* overall command status of utrd */
5114 ocs = ufshcd_get_tr_ocs(lrbp);
5115
Kiwoong Kimd779a6e2020-05-28 06:46:53 +05305116 if (hba->quirks & UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR) {
5117 if (be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_1) &
5118 MASK_RSP_UPIU_RESULT)
5119 ocs = OCS_SUCCESS;
5120 }
5121
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305122 switch (ocs) {
5123 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305124 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005125 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305126 switch (result) {
5127 case UPIU_TRANSACTION_RESPONSE:
5128 /*
5129 * get the response UPIU result to extract
5130 * the SCSI command status
5131 */
5132 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
5133
5134 /*
5135 * get the result based on SCSI status response
5136 * to notify the SCSI midlayer of the command status
5137 */
5138 scsi_status = result & MASK_SCSI_STATUS;
5139 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305140
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02005141 /*
5142 * Currently we are only supporting BKOPs exception
5143 * events hence we can ignore BKOPs exception event
5144 * during power management callbacks. BKOPs exception
5145 * event is not expected to be raised in runtime suspend
5146 * callback as it allows the urgent bkops.
5147 * During system suspend, we are anyway forcefully
5148 * disabling the bkops and if urgent bkops is needed
5149 * it will be enabled on system resume. Long term
5150 * solution could be to abort the system suspend if
5151 * UFS device needs urgent BKOPs.
5152 */
5153 if (!hba->pm_op_in_progress &&
Can Guoaa53f582021-02-23 21:36:47 -08005154 !ufshcd_eh_in_progress(hba) &&
Asutosh Dasb294ff32021-04-23 17:20:16 -07005155 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
5156 /* Flushed in suspend */
5157 schedule_work(&hba->eeh_work);
Daejun Park4b5f4902021-07-12 17:58:59 +09005158
5159 if (scsi_status == SAM_STAT_GOOD)
5160 ufshpb_rsp_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305161 break;
5162 case UPIU_TRANSACTION_REJECT_UPIU:
5163 /* TODO: handle Reject UPIU Response */
5164 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305165 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305166 "Reject UPIU not fully implemented\n");
5167 break;
5168 default:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305169 dev_err(hba->dev,
5170 "Unexpected request response code = %x\n",
5171 result);
Stanley Chue0347d82019-04-15 20:23:38 +08005172 result = DID_ERROR << 16;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305173 break;
5174 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305175 break;
5176 case OCS_ABORTED:
5177 result |= DID_ABORT << 16;
5178 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305179 case OCS_INVALID_COMMAND_STATUS:
5180 result |= DID_REQUEUE << 16;
5181 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305182 case OCS_INVALID_CMD_TABLE_ATTR:
5183 case OCS_INVALID_PRDT_ATTR:
5184 case OCS_MISMATCH_DATA_BUF_SIZE:
5185 case OCS_MISMATCH_RESP_UPIU_SIZE:
5186 case OCS_PEER_COMM_FAILURE:
5187 case OCS_FATAL_ERROR:
Satya Tangirala5e7341e2020-07-06 20:04:12 +00005188 case OCS_DEVICE_FATAL_ERROR:
5189 case OCS_INVALID_CRYPTO_CONFIG:
5190 case OCS_GENERAL_CRYPTO_ERROR:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305191 default:
5192 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305193 dev_err(hba->dev,
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005194 "OCS error from controller = %x for tag %d\n",
5195 ocs, lrbp->task_tag);
Stanley Chue965e5e2020-12-05 19:58:59 +08005196 ufshcd_print_evt_hist(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08005197 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305198 break;
5199 } /* end of switch */
5200
Jaegeuk Kimeeb1b552021-01-07 10:53:16 -08005201 if ((host_byte(result) != DID_OK) &&
5202 (host_byte(result) != DID_REQUEUE) && !hba->silence_err_logs)
Dolev Raviv66cc8202016-12-22 18:39:42 -08005203 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305204 return result;
5205}
5206
Can Guoa45f9372021-05-24 01:36:57 -07005207static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5208 u32 intr_mask)
5209{
5210 if (!ufshcd_is_auto_hibern8_supported(hba) ||
5211 !ufshcd_is_auto_hibern8_enabled(hba))
5212 return false;
5213
5214 if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5215 return false;
5216
5217 if (hba->active_uic_cmd &&
5218 (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5219 hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5220 return false;
5221
5222 return true;
5223}
5224
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305225/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305226 * ufshcd_uic_cmd_compl - handle completion of uic command
5227 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305228 * @intr_status: interrupt status generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005229 *
5230 * Returns
5231 * IRQ_HANDLED - If interrupt is valid
5232 * IRQ_NONE - If invalid interrupt
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305233 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005234static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305235{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005236 irqreturn_t retval = IRQ_NONE;
5237
Can Guoa45f9372021-05-24 01:36:57 -07005238 spin_lock(hba->host->host_lock);
5239 if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5240 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5241
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305242 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305243 hba->active_uic_cmd->argument2 |=
5244 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05305245 hba->active_uic_cmd->argument3 =
5246 ufshcd_get_dme_attr_val(hba);
Can Guo0f52fcb92020-11-02 22:24:40 -08005247 if (!hba->uic_async_done)
5248 hba->active_uic_cmd->cmd_active = 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305249 complete(&hba->active_uic_cmd->done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005250 retval = IRQ_HANDLED;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305251 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305252
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005253 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
Can Guo0f52fcb92020-11-02 22:24:40 -08005254 hba->active_uic_cmd->cmd_active = 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005255 complete(hba->uic_async_done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005256 retval = IRQ_HANDLED;
5257 }
Stanley Chuaa5c6972020-06-15 15:22:35 +08005258
5259 if (retval == IRQ_HANDLED)
5260 ufshcd_add_uic_command_trace(hba, hba->active_uic_cmd,
Bean Huo28fa68f2021-01-05 12:34:42 +01005261 UFS_CMD_COMP);
Can Guoa45f9372021-05-24 01:36:57 -07005262 spin_unlock(hba->host->host_lock);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005263 return retval;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05305264}
5265
5266/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005267 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305268 * @hba: per adapter instance
Bart Van Assche73dc3c42021-07-21 20:34:38 -07005269 * @completed_reqs: bitmask that indicates which requests to complete
5270 * @retry_requests: whether to ask the SCSI core to retry completed requests
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305271 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005272static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
Bart Van Assche73dc3c42021-07-21 20:34:38 -07005273 unsigned long completed_reqs,
5274 bool retry_requests)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305275{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05305276 struct ufshcd_lrb *lrbp;
5277 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305278 int result;
5279 int index;
Can Guo7a7e66c2020-12-02 04:04:02 -08005280 bool update_scaling = false;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005281
Dolev Ravive9d501b2014-07-01 12:22:37 +03005282 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
5283 lrbp = &hba->lrb[index];
Stanley Chua3170372020-07-06 14:07:06 +08005284 lrbp->compl_time_stamp = ktime_get();
Dolev Ravive9d501b2014-07-01 12:22:37 +03005285 cmd = lrbp->cmd;
5286 if (cmd) {
Can Guo1d8613a2021-04-21 19:28:39 -07005287 if (unlikely(ufshcd_should_inform_monitor(hba, lrbp)))
5288 ufshcd_update_monitor(hba, lrbp);
Bean Huo28fa68f2021-01-05 12:34:42 +01005289 ufshcd_add_command_trace(hba, index, UFS_CMD_COMP);
Bart Van Assche73dc3c42021-07-21 20:34:38 -07005290 result = retry_requests ? DID_BUS_BUSY << 16 :
5291 ufshcd_transfer_rsp_status(hba, lrbp);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005292 scsi_dma_unmap(cmd);
5293 cmd->result = result;
5294 /* Mark completed command as NULL in LRB */
5295 lrbp->cmd = NULL;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005296 /* Do not touch lrbp after scsi done */
5297 cmd->scsi_done(cmd);
Can Guoa45f9372021-05-24 01:36:57 -07005298 ufshcd_release(hba);
Can Guo7a7e66c2020-12-02 04:04:02 -08005299 update_scaling = true;
Joao Pinto300bb132016-05-11 12:21:27 +01005300 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
5301 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08005302 if (hba->dev_cmd.complete) {
5303 ufshcd_add_command_trace(hba, index,
Bean Huo28fa68f2021-01-05 12:34:42 +01005304 UFS_DEV_COMP);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005305 complete(hba->dev_cmd.complete);
Can Guo7a7e66c2020-12-02 04:04:02 -08005306 update_scaling = true;
Lee Susman1a07f2d2016-12-22 18:42:03 -08005307 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03005308 }
Can Guoa45f9372021-05-24 01:36:57 -07005309 if (update_scaling)
5310 ufshcd_clk_scaling_update_busy(hba);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005311 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305312}
5313
5314/**
Bart Van Assche1f522c52021-07-21 20:34:32 -07005315 * ufshcd_transfer_req_compl - handle SCSI and query command completion
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005316 * @hba: per adapter instance
Bart Van Assche73dc3c42021-07-21 20:34:38 -07005317 * @retry_requests: whether or not to ask to retry requests
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005318 *
5319 * Returns
5320 * IRQ_HANDLED - If interrupt is valid
5321 * IRQ_NONE - If invalid interrupt
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005322 */
Bart Van Assche73dc3c42021-07-21 20:34:38 -07005323static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba,
5324 bool retry_requests)
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005325{
Bart Van Assche1f522c52021-07-21 20:34:32 -07005326 unsigned long completed_reqs, flags;
5327 u32 tr_doorbell;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005328
5329 /* Resetting interrupt aggregation counters first and reading the
5330 * DOOR_BELL afterward allows us to handle all the completed requests.
5331 * In order to prevent other interrupts starvation the DB is read once
5332 * after reset. The down side of this solution is the possibility of
5333 * false interrupt if device completes another request after resetting
5334 * aggregation and before reading the DB.
5335 */
Alim Akhtarb638b5e2020-05-28 06:46:50 +05305336 if (ufshcd_is_intr_aggr_allowed(hba) &&
5337 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005338 ufshcd_reset_intr_aggr(hba);
5339
Bart Van Asschec11a1ae2021-07-21 20:34:39 -07005340 if (ufs_fail_completion())
5341 return IRQ_HANDLED;
5342
Bart Van Assche169f5eb2021-07-21 20:34:34 -07005343 spin_lock_irqsave(&hba->outstanding_lock, flags);
Bart Van Assche1f522c52021-07-21 20:34:32 -07005344 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Bart Van Assche169f5eb2021-07-21 20:34:34 -07005345 completed_reqs = ~tr_doorbell & hba->outstanding_reqs;
5346 WARN_ONCE(completed_reqs & ~hba->outstanding_reqs,
5347 "completed: %#lx; outstanding: %#lx\n", completed_reqs,
5348 hba->outstanding_reqs);
5349 hba->outstanding_reqs &= ~completed_reqs;
5350 spin_unlock_irqrestore(&hba->outstanding_lock, flags);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005351
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005352 if (completed_reqs) {
Bart Van Assche73dc3c42021-07-21 20:34:38 -07005353 __ufshcd_transfer_req_compl(hba, completed_reqs,
5354 retry_requests);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005355 return IRQ_HANDLED;
5356 } else {
5357 return IRQ_NONE;
5358 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005359}
5360
Adrian Hunter7deedfd2021-02-09 08:24:37 +02005361int __ufshcd_write_ee_control(struct ufs_hba *hba, u32 ee_ctrl_mask)
Adrian Huntercd469472021-02-09 08:24:36 +02005362{
5363 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
5364 QUERY_ATTR_IDN_EE_CONTROL, 0, 0,
5365 &ee_ctrl_mask);
5366}
5367
Adrian Hunter7deedfd2021-02-09 08:24:37 +02005368int ufshcd_write_ee_control(struct ufs_hba *hba)
Adrian Huntercd469472021-02-09 08:24:36 +02005369{
5370 int err;
5371
5372 mutex_lock(&hba->ee_ctrl_mutex);
5373 err = __ufshcd_write_ee_control(hba, hba->ee_ctrl_mask);
5374 mutex_unlock(&hba->ee_ctrl_mutex);
5375 if (err)
5376 dev_err(hba->dev, "%s: failed to write ee control %d\n",
5377 __func__, err);
5378 return err;
5379}
5380
5381int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask, u16 *other_mask,
5382 u16 set, u16 clr)
5383{
5384 u16 new_mask, ee_ctrl_mask;
5385 int err = 0;
5386
5387 mutex_lock(&hba->ee_ctrl_mutex);
5388 new_mask = (*mask & ~clr) | set;
5389 ee_ctrl_mask = new_mask | *other_mask;
5390 if (ee_ctrl_mask != hba->ee_ctrl_mask)
5391 err = __ufshcd_write_ee_control(hba, ee_ctrl_mask);
5392 /* Still need to update 'mask' even if 'ee_ctrl_mask' was unchanged */
5393 if (!err) {
5394 hba->ee_ctrl_mask = ee_ctrl_mask;
5395 *mask = new_mask;
5396 }
5397 mutex_unlock(&hba->ee_ctrl_mutex);
5398 return err;
5399}
5400
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005401/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305402 * ufshcd_disable_ee - disable exception event
5403 * @hba: per-adapter instance
5404 * @mask: exception event to disable
5405 *
5406 * Disables exception event in the device so that the EVENT_ALERT
5407 * bit is not set.
5408 *
5409 * Returns zero on success, non-zero error value on failure.
5410 */
Adrian Huntercd469472021-02-09 08:24:36 +02005411static inline int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305412{
Adrian Huntercd469472021-02-09 08:24:36 +02005413 return ufshcd_update_ee_drv_mask(hba, 0, mask);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305414}
5415
5416/**
5417 * ufshcd_enable_ee - enable exception event
5418 * @hba: per-adapter instance
5419 * @mask: exception event to enable
5420 *
5421 * Enable corresponding exception event in the device to allow
5422 * device to alert host in critical scenarios.
5423 *
5424 * Returns zero on success, non-zero error value on failure.
5425 */
Adrian Huntercd469472021-02-09 08:24:36 +02005426static inline int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305427{
Adrian Huntercd469472021-02-09 08:24:36 +02005428 return ufshcd_update_ee_drv_mask(hba, mask, 0);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305429}
5430
5431/**
5432 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
5433 * @hba: per-adapter instance
5434 *
5435 * Allow device to manage background operations on its own. Enabling
5436 * this might lead to inconsistent latencies during normal data transfers
5437 * as the device is allowed to manage its own way of handling background
5438 * operations.
5439 *
5440 * Returns zero on success, non-zero on failure.
5441 */
5442static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
5443{
5444 int err = 0;
5445
5446 if (hba->auto_bkops_enabled)
5447 goto out;
5448
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005449 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08005450 QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305451 if (err) {
5452 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
5453 __func__, err);
5454 goto out;
5455 }
5456
5457 hba->auto_bkops_enabled = true;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08005458 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305459
5460 /* No need of URGENT_BKOPS exception from the device */
5461 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5462 if (err)
5463 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
5464 __func__, err);
5465out:
5466 return err;
5467}
5468
5469/**
5470 * ufshcd_disable_auto_bkops - block device in doing background operations
5471 * @hba: per-adapter instance
5472 *
5473 * Disabling background operations improves command response latency but
5474 * has drawback of device moving into critical state where the device is
5475 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
5476 * host is idle so that BKOPS are managed effectively without any negative
5477 * impacts.
5478 *
5479 * Returns zero on success, non-zero on failure.
5480 */
5481static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5482{
5483 int err = 0;
5484
5485 if (!hba->auto_bkops_enabled)
5486 goto out;
5487
5488 /*
5489 * If host assisted BKOPs is to be enabled, make sure
5490 * urgent bkops exception is allowed.
5491 */
5492 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5493 if (err) {
5494 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5495 __func__, err);
5496 goto out;
5497 }
5498
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005499 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08005500 QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305501 if (err) {
5502 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5503 __func__, err);
5504 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5505 goto out;
5506 }
5507
5508 hba->auto_bkops_enabled = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08005509 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
Asutosh Das24366c2a2019-11-25 22:53:30 -08005510 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305511out:
5512 return err;
5513}
5514
5515/**
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005516 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305517 * @hba: per adapter instance
5518 *
5519 * After a device reset the device may toggle the BKOPS_EN flag
5520 * to default value. The s/w tracking variables should be updated
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005521 * as well. This function would change the auto-bkops state based on
5522 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305523 */
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005524static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305525{
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005526 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5527 hba->auto_bkops_enabled = false;
5528 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5529 ufshcd_enable_auto_bkops(hba);
5530 } else {
5531 hba->auto_bkops_enabled = true;
5532 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5533 ufshcd_disable_auto_bkops(hba);
5534 }
Stanley Chu7b6668d2020-05-30 22:12:00 +08005535 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
Asutosh Das24366c2a2019-11-25 22:53:30 -08005536 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305537}
5538
5539static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5540{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005541 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305542 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5543}
5544
5545/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005546 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5547 * @hba: per-adapter instance
5548 * @status: bkops_status value
5549 *
5550 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5551 * flag in the device to permit background operations if the device
5552 * bkops_status is greater than or equal to "status" argument passed to
5553 * this function, disable otherwise.
5554 *
5555 * Returns 0 for success, non-zero in case of failure.
5556 *
5557 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5558 * to know whether auto bkops is enabled or disabled after this function
5559 * returns control to it.
5560 */
5561static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5562 enum bkops_status status)
5563{
5564 int err;
5565 u32 curr_status = 0;
5566
5567 err = ufshcd_get_bkops_status(hba, &curr_status);
5568 if (err) {
5569 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5570 __func__, err);
5571 goto out;
5572 } else if (curr_status > BKOPS_STATUS_MAX) {
5573 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5574 __func__, curr_status);
5575 err = -EINVAL;
5576 goto out;
5577 }
5578
5579 if (curr_status >= status)
5580 err = ufshcd_enable_auto_bkops(hba);
5581 else
5582 err = ufshcd_disable_auto_bkops(hba);
5583out:
5584 return err;
5585}
5586
5587/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305588 * ufshcd_urgent_bkops - handle urgent bkops exception event
5589 * @hba: per-adapter instance
5590 *
5591 * Enable fBackgroundOpsEn flag in the device to permit background
5592 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005593 *
5594 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5595 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305596 */
5597static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5598{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005599 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305600}
5601
5602static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5603{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005604 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305605 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5606}
5607
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005608static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5609{
5610 int err;
5611 u32 curr_status = 0;
5612
5613 if (hba->is_urgent_bkops_lvl_checked)
5614 goto enable_auto_bkops;
5615
5616 err = ufshcd_get_bkops_status(hba, &curr_status);
5617 if (err) {
5618 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5619 __func__, err);
5620 goto out;
5621 }
5622
5623 /*
5624 * We are seeing that some devices are raising the urgent bkops
5625 * exception events even when BKOPS status doesn't indicate performace
5626 * impacted or critical. Handle these device by determining their urgent
5627 * bkops status at runtime.
5628 */
5629 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5630 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5631 __func__, curr_status);
5632 /* update the current status as the urgent bkops level */
5633 hba->urgent_bkops_lvl = curr_status;
5634 hba->is_urgent_bkops_lvl_checked = true;
5635 }
5636
5637enable_auto_bkops:
5638 err = ufshcd_enable_auto_bkops(hba);
5639out:
5640 if (err < 0)
5641 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5642 __func__, err);
5643}
5644
Avri Altman322c4b22021-09-15 09:04:07 +03005645static void ufshcd_temp_exception_event_handler(struct ufs_hba *hba, u16 status)
5646{
5647 u32 value;
5648
5649 if (ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5650 QUERY_ATTR_IDN_CASE_ROUGH_TEMP, 0, 0, &value))
5651 return;
5652
5653 dev_info(hba->dev, "exception Tcase %d\n", value - 80);
5654
5655 ufs_hwmon_notify_event(hba, status & MASK_EE_URGENT_TEMP);
5656
5657 /*
5658 * A placeholder for the platform vendors to add whatever additional
5659 * steps required
5660 */
5661}
5662
Yue Hu3b5f3c02021-03-18 17:55:36 +08005663static int __ufshcd_wb_toggle(struct ufs_hba *hba, bool set, enum flag_idn idn)
5664{
5665 u8 index;
5666 enum query_opcode opcode = set ? UPIU_QUERY_OPCODE_SET_FLAG :
5667 UPIU_QUERY_OPCODE_CLEAR_FLAG;
5668
5669 index = ufshcd_wb_get_query_index(hba);
5670 return ufshcd_query_flag_retry(hba, opcode, idn, index, NULL);
5671}
5672
5673int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable)
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005674{
5675 int ret;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005676
Stanley Chu79e35202020-05-08 16:01:15 +08005677 if (!ufshcd_is_wb_allowed(hba))
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005678 return 0;
5679
Bean Huo4cd48992021-01-19 17:38:46 +01005680 if (!(enable ^ hba->dev_info.wb_enabled))
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005681 return 0;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005682
Yue Hu3b5f3c02021-03-18 17:55:36 +08005683 ret = __ufshcd_wb_toggle(hba, enable, QUERY_FLAG_IDN_WB_EN);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005684 if (ret) {
Yue Hu3b5f3c02021-03-18 17:55:36 +08005685 dev_err(hba->dev, "%s Write Booster %s failed %d\n",
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005686 __func__, enable ? "enable" : "disable", ret);
5687 return ret;
5688 }
5689
Bean Huo4cd48992021-01-19 17:38:46 +01005690 hba->dev_info.wb_enabled = enable;
Yue Hu3b5f3c02021-03-18 17:55:36 +08005691 dev_info(hba->dev, "%s Write Booster %s\n",
5692 __func__, enable ? "enabled" : "disabled");
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005693
5694 return ret;
5695}
5696
Yue Hu3b5f3c02021-03-18 17:55:36 +08005697static void ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set)
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005698{
Bean Huod3ba6222021-01-21 19:57:36 +01005699 int ret;
Yue Hu3b5f3c02021-03-18 17:55:36 +08005700
5701 ret = __ufshcd_wb_toggle(hba, set,
5702 QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8);
5703 if (ret) {
5704 dev_err(hba->dev, "%s: WB-Buf Flush during H8 %s failed: %d\n",
5705 __func__, set ? "enable" : "disable", ret);
5706 return;
5707 }
5708 dev_dbg(hba->dev, "%s WB-Buf Flush during H8 %s\n",
5709 __func__, set ? "enabled" : "disabled");
5710}
5711
5712static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable)
5713{
5714 int ret;
Bean Huod3ba6222021-01-21 19:57:36 +01005715
5716 if (!ufshcd_is_wb_allowed(hba) ||
5717 hba->dev_info.wb_buf_flush_enabled == enable)
Yue Hu3b5f3c02021-03-18 17:55:36 +08005718 return;
Bean Huod3ba6222021-01-21 19:57:36 +01005719
Yue Hu3b5f3c02021-03-18 17:55:36 +08005720 ret = __ufshcd_wb_toggle(hba, enable, QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005721 if (ret) {
Bean Huod3ba6222021-01-21 19:57:36 +01005722 dev_err(hba->dev, "%s WB-Buf Flush %s failed %d\n", __func__,
5723 enable ? "enable" : "disable", ret);
Yue Hu3b5f3c02021-03-18 17:55:36 +08005724 return;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005725 }
5726
Bean Huod3ba6222021-01-21 19:57:36 +01005727 hba->dev_info.wb_buf_flush_enabled = enable;
5728
Yue Hu3b5f3c02021-03-18 17:55:36 +08005729 dev_dbg(hba->dev, "%s WB-Buf Flush %s\n",
5730 __func__, enable ? "enabled" : "disabled");
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005731}
5732
5733static bool ufshcd_wb_presrv_usrspc_keep_vcc_on(struct ufs_hba *hba,
5734 u32 avail_buf)
5735{
5736 u32 cur_buf;
5737 int ret;
Stanley Chue31011a2020-05-22 16:32:11 +08005738 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005739
Stanley Chue31011a2020-05-22 16:32:11 +08005740 index = ufshcd_wb_get_query_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005741 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5742 QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE,
Stanley Chue31011a2020-05-22 16:32:11 +08005743 index, 0, &cur_buf);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005744 if (ret) {
5745 dev_err(hba->dev, "%s dCurWriteBoosterBufferSize read failed %d\n",
5746 __func__, ret);
5747 return false;
5748 }
5749
5750 if (!cur_buf) {
5751 dev_info(hba->dev, "dCurWBBuf: %d WB disabled until free-space is available\n",
5752 cur_buf);
5753 return false;
5754 }
Stanley Chud14734ae2020-05-09 17:37:15 +08005755 /* Let it continue to flush when available buffer exceeds threshold */
5756 if (avail_buf < hba->vps->wb_flush_threshold)
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005757 return true;
5758
5759 return false;
5760}
5761
Stanley Chu51dd9052020-05-22 16:32:12 +08005762static bool ufshcd_wb_need_flush(struct ufs_hba *hba)
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005763{
5764 int ret;
5765 u32 avail_buf;
Stanley Chue31011a2020-05-22 16:32:11 +08005766 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005767
Stanley Chu79e35202020-05-08 16:01:15 +08005768 if (!ufshcd_is_wb_allowed(hba))
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005769 return false;
5770 /*
5771 * The ufs device needs the vcc to be ON to flush.
5772 * With user-space reduction enabled, it's enough to enable flush
5773 * by checking only the available buffer. The threshold
5774 * defined here is > 90% full.
5775 * With user-space preserved enabled, the current-buffer
5776 * should be checked too because the wb buffer size can reduce
5777 * when disk tends to be full. This info is provided by current
5778 * buffer (dCurrentWriteBoosterBufferSize). There's no point in
5779 * keeping vcc on when current buffer is empty.
5780 */
Stanley Chue31011a2020-05-22 16:32:11 +08005781 index = ufshcd_wb_get_query_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005782 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5783 QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE,
Stanley Chue31011a2020-05-22 16:32:11 +08005784 index, 0, &avail_buf);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005785 if (ret) {
5786 dev_warn(hba->dev, "%s dAvailableWriteBoosterBufferSize read failed %d\n",
5787 __func__, ret);
5788 return false;
5789 }
5790
5791 if (!hba->dev_info.b_presrv_uspc_en) {
Stanley Chud14734ae2020-05-09 17:37:15 +08005792 if (avail_buf <= UFS_WB_BUF_REMAIN_PERCENT(10))
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005793 return true;
5794 return false;
5795 }
5796
5797 return ufshcd_wb_presrv_usrspc_keep_vcc_on(hba, avail_buf);
5798}
5799
Stanley Chu51dd9052020-05-22 16:32:12 +08005800static void ufshcd_rpm_dev_flush_recheck_work(struct work_struct *work)
5801{
5802 struct ufs_hba *hba = container_of(to_delayed_work(work),
5803 struct ufs_hba,
5804 rpm_dev_flush_recheck_work);
5805 /*
5806 * To prevent unnecessary VCC power drain after device finishes
5807 * WriteBooster buffer flush or Auto BKOPs, force runtime resume
5808 * after a certain delay to recheck the threshold by next runtime
5809 * suspend.
5810 */
Asutosh Dasb294ff32021-04-23 17:20:16 -07005811 ufshcd_rpm_get_sync(hba);
5812 ufshcd_rpm_put_sync(hba);
Stanley Chu51dd9052020-05-22 16:32:12 +08005813}
5814
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305815/**
5816 * ufshcd_exception_event_handler - handle exceptions raised by device
5817 * @work: pointer to work data
5818 *
5819 * Read bExceptionEventStatus attribute from the device and handle the
5820 * exception event accordingly.
5821 */
5822static void ufshcd_exception_event_handler(struct work_struct *work)
5823{
5824 struct ufs_hba *hba;
5825 int err;
5826 u32 status = 0;
5827 hba = container_of(work, struct ufs_hba, eeh_work);
5828
Stanley Chu03e1d282019-12-24 21:01:05 +08005829 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305830 err = ufshcd_get_ee_status(hba, &status);
5831 if (err) {
5832 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5833 __func__, err);
5834 goto out;
5835 }
5836
Adrian Hunterf7733622021-02-09 08:24:34 +02005837 trace_ufshcd_exception_event(dev_name(hba->dev), status);
5838
Adrian Huntercd469472021-02-09 08:24:36 +02005839 if (status & hba->ee_drv_mask & MASK_EE_URGENT_BKOPS)
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005840 ufshcd_bkops_exception_event_handler(hba);
5841
Avri Altman322c4b22021-09-15 09:04:07 +03005842 if (status & hba->ee_drv_mask & MASK_EE_URGENT_TEMP)
5843 ufshcd_temp_exception_event_handler(hba, status);
5844
Adrian Hunter7deedfd2021-02-09 08:24:37 +02005845 ufs_debugfs_exception_event(hba, status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305846out:
Stanley Chu03e1d282019-12-24 21:01:05 +08005847 ufshcd_scsi_unblock_requests(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305848 return;
5849}
5850
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005851/* Complete requests that have door-bell cleared */
5852static void ufshcd_complete_requests(struct ufs_hba *hba)
5853{
Bart Van Assche73dc3c42021-07-21 20:34:38 -07005854 ufshcd_transfer_req_compl(hba, /*retry_requests=*/false);
5855 ufshcd_tmc_handler(hba);
5856}
5857
5858static void ufshcd_retry_aborted_requests(struct ufs_hba *hba)
5859{
5860 ufshcd_transfer_req_compl(hba, /*retry_requests=*/true);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005861 ufshcd_tmc_handler(hba);
5862}
5863
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305864/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02005865 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5866 * to recover from the DL NAC errors or not.
5867 * @hba: per-adapter instance
5868 *
5869 * Returns true if error handling is required, false otherwise
5870 */
5871static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5872{
5873 unsigned long flags;
5874 bool err_handling = true;
5875
5876 spin_lock_irqsave(hba->host->host_lock, flags);
5877 /*
5878 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5879 * device fatal error and/or DL NAC & REPLAY timeout errors.
5880 */
5881 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5882 goto out;
5883
5884 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5885 ((hba->saved_err & UIC_ERROR) &&
5886 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5887 goto out;
5888
5889 if ((hba->saved_err & UIC_ERROR) &&
5890 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5891 int err;
5892 /*
5893 * wait for 50ms to see if we can get any other errors or not.
5894 */
5895 spin_unlock_irqrestore(hba->host->host_lock, flags);
5896 msleep(50);
5897 spin_lock_irqsave(hba->host->host_lock, flags);
5898
5899 /*
5900 * now check if we have got any other severe errors other than
5901 * DL NAC error?
5902 */
5903 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5904 ((hba->saved_err & UIC_ERROR) &&
5905 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5906 goto out;
5907
5908 /*
5909 * As DL NAC is the only error received so far, send out NOP
5910 * command to confirm if link is still active or not.
5911 * - If we don't get any response then do error recovery.
5912 * - If we get response then clear the DL NAC error bit.
5913 */
5914
5915 spin_unlock_irqrestore(hba->host->host_lock, flags);
5916 err = ufshcd_verify_dev_init(hba);
5917 spin_lock_irqsave(hba->host->host_lock, flags);
5918
5919 if (err)
5920 goto out;
5921
5922 /* Link seems to be alive hence ignore the DL NAC errors */
5923 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5924 hba->saved_err &= ~UIC_ERROR;
5925 /* clear NAC error */
5926 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
Bean Huob0008622020-08-14 11:50:34 +02005927 if (!hba->saved_uic_err)
Yaniv Gardi583fa622016-03-10 17:37:13 +02005928 err_handling = false;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005929 }
5930out:
5931 spin_unlock_irqrestore(hba->host->host_lock, flags);
5932 return err_handling;
5933}
5934
Stanley Chu348e1bc2021-01-20 23:01:42 +08005935static void ufshcd_clk_scaling_allow(struct ufs_hba *hba, bool allow)
5936{
5937 down_write(&hba->clk_scaling_lock);
5938 hba->clk_scaling.is_allowed = allow;
5939 up_write(&hba->clk_scaling_lock);
5940}
5941
5942static void ufshcd_clk_scaling_suspend(struct ufs_hba *hba, bool suspend)
5943{
5944 if (suspend) {
5945 if (hba->clk_scaling.is_enabled)
5946 ufshcd_suspend_clkscaling(hba);
5947 ufshcd_clk_scaling_allow(hba, false);
5948 } else {
5949 ufshcd_clk_scaling_allow(hba, true);
5950 if (hba->clk_scaling.is_enabled)
5951 ufshcd_resume_clkscaling(hba);
5952 }
5953}
5954
Can Guoc72e79c2020-08-09 05:15:52 -07005955static void ufshcd_err_handling_prepare(struct ufs_hba *hba)
5956{
Asutosh Dasb294ff32021-04-23 17:20:16 -07005957 ufshcd_rpm_get_sync(hba);
5958 if (pm_runtime_status_suspended(&hba->sdev_ufs_device->sdev_gendev) ||
5959 hba->is_sys_suspended) {
Can Guo88a92d62020-12-02 04:04:01 -08005960 enum ufs_pm_op pm_op;
5961
Can Guoc72e79c2020-08-09 05:15:52 -07005962 /*
Asutosh Dasb294ff32021-04-23 17:20:16 -07005963 * Don't assume anything of resume, if
Can Guoc72e79c2020-08-09 05:15:52 -07005964 * resume fails, irq and clocks can be OFF, and powers
5965 * can be OFF or in LPM.
5966 */
5967 ufshcd_setup_hba_vreg(hba, true);
5968 ufshcd_enable_irq(hba);
5969 ufshcd_setup_vreg(hba, true);
5970 ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
5971 ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
5972 ufshcd_hold(hba, false);
5973 if (!ufshcd_is_clkgating_allowed(hba))
5974 ufshcd_setup_clocks(hba, true);
5975 ufshcd_release(hba);
Can Guo88a92d62020-12-02 04:04:01 -08005976 pm_op = hba->is_sys_suspended ? UFS_SYSTEM_PM : UFS_RUNTIME_PM;
5977 ufshcd_vops_resume(hba, pm_op);
Can Guoc72e79c2020-08-09 05:15:52 -07005978 } else {
5979 ufshcd_hold(hba, false);
Stanley Chu348e1bc2021-01-20 23:01:42 +08005980 if (ufshcd_is_clkscaling_supported(hba) &&
5981 hba->clk_scaling.is_enabled)
Can Guoc72e79c2020-08-09 05:15:52 -07005982 ufshcd_suspend_clkscaling(hba);
Stanley Chu348e1bc2021-01-20 23:01:42 +08005983 ufshcd_clk_scaling_allow(hba, false);
Can Guoc72e79c2020-08-09 05:15:52 -07005984 }
Can Guoaa53f582021-02-23 21:36:47 -08005985 ufshcd_scsi_block_requests(hba);
5986 /* Drain ufshcd_queuecommand() */
5987 down_write(&hba->clk_scaling_lock);
5988 up_write(&hba->clk_scaling_lock);
5989 cancel_work_sync(&hba->eeh_work);
Can Guoc72e79c2020-08-09 05:15:52 -07005990}
5991
5992static void ufshcd_err_handling_unprepare(struct ufs_hba *hba)
5993{
Can Guoaa53f582021-02-23 21:36:47 -08005994 ufshcd_scsi_unblock_requests(hba);
Can Guoc72e79c2020-08-09 05:15:52 -07005995 ufshcd_release(hba);
Stanley Chu348e1bc2021-01-20 23:01:42 +08005996 if (ufshcd_is_clkscaling_supported(hba))
5997 ufshcd_clk_scaling_suspend(hba, false);
Can Guoaa53f582021-02-23 21:36:47 -08005998 ufshcd_clear_ua_wluns(hba);
Asutosh Dasb294ff32021-04-23 17:20:16 -07005999 ufshcd_rpm_put(hba);
Can Guoc72e79c2020-08-09 05:15:52 -07006000}
6001
6002static inline bool ufshcd_err_handling_should_stop(struct ufs_hba *hba)
6003{
Can Guo9cd20d32021-01-13 19:13:28 -08006004 return (!hba->is_powered || hba->shutting_down ||
Asutosh Dasb294ff32021-04-23 17:20:16 -07006005 !hba->sdev_ufs_device ||
Can Guo9cd20d32021-01-13 19:13:28 -08006006 hba->ufshcd_state == UFSHCD_STATE_ERROR ||
Can Guoc72e79c2020-08-09 05:15:52 -07006007 (!(hba->saved_err || hba->saved_uic_err || hba->force_reset ||
Can Guo9cd20d32021-01-13 19:13:28 -08006008 ufshcd_is_link_broken(hba))));
Can Guoc72e79c2020-08-09 05:15:52 -07006009}
6010
6011#ifdef CONFIG_PM
6012static void ufshcd_recover_pm_error(struct ufs_hba *hba)
6013{
6014 struct Scsi_Host *shost = hba->host;
6015 struct scsi_device *sdev;
6016 struct request_queue *q;
6017 int ret;
6018
Can Guo88a92d62020-12-02 04:04:01 -08006019 hba->is_sys_suspended = false;
Can Guoc72e79c2020-08-09 05:15:52 -07006020 /*
Asutosh Dasb294ff32021-04-23 17:20:16 -07006021 * Set RPM status of wlun device to RPM_ACTIVE,
Can Guoc72e79c2020-08-09 05:15:52 -07006022 * this also clears its runtime error.
6023 */
Asutosh Dasb294ff32021-04-23 17:20:16 -07006024 ret = pm_runtime_set_active(&hba->sdev_ufs_device->sdev_gendev);
6025
6026 /* hba device might have a runtime error otherwise */
6027 if (ret)
6028 ret = pm_runtime_set_active(hba->dev);
Can Guoc72e79c2020-08-09 05:15:52 -07006029 /*
Asutosh Dasb294ff32021-04-23 17:20:16 -07006030 * If wlun device had runtime error, we also need to resume those
6031 * consumer scsi devices in case any of them has failed to be
6032 * resumed due to supplier runtime resume failure. This is to unblock
Can Guoc72e79c2020-08-09 05:15:52 -07006033 * blk_queue_enter in case there are bios waiting inside it.
6034 */
6035 if (!ret) {
6036 shost_for_each_device(sdev, shost) {
6037 q = sdev->request_queue;
6038 if (q->dev && (q->rpm_status == RPM_SUSPENDED ||
6039 q->rpm_status == RPM_SUSPENDING))
6040 pm_request_resume(q->dev);
6041 }
6042 }
6043}
6044#else
6045static inline void ufshcd_recover_pm_error(struct ufs_hba *hba)
6046{
6047}
6048#endif
6049
Can Guo2355b662020-08-24 19:07:06 -07006050static bool ufshcd_is_pwr_mode_restore_needed(struct ufs_hba *hba)
6051{
6052 struct ufs_pa_layer_attr *pwr_info = &hba->pwr_info;
6053 u32 mode;
6054
6055 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_PWRMODE), &mode);
6056
6057 if (pwr_info->pwr_rx != ((mode >> PWRMODE_RX_OFFSET) & PWRMODE_MASK))
6058 return true;
6059
6060 if (pwr_info->pwr_tx != (mode & PWRMODE_MASK))
6061 return true;
6062
6063 return false;
6064}
6065
Yaniv Gardi583fa622016-03-10 17:37:13 +02006066/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306067 * ufshcd_err_handler - handle UFS errors that require s/w attention
Bart Van Asschea113eaa2021-07-21 20:34:37 -07006068 * @host: SCSI host pointer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306069 */
Bart Van Asschea113eaa2021-07-21 20:34:37 -07006070static void ufshcd_err_handler(struct Scsi_Host *host)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306071{
Bart Van Asschea113eaa2021-07-21 20:34:37 -07006072 struct ufs_hba *hba = shost_priv(host);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306073 unsigned long flags;
Can Guo307348f2020-08-24 19:07:05 -07006074 bool err_xfer = false;
6075 bool err_tm = false;
Can Guo2355b662020-08-24 19:07:06 -07006076 int err = 0, pmc_err;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306077 int tag;
Can Guo2355b662020-08-24 19:07:06 -07006078 bool needs_reset = false, needs_restore = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306079
Can Guo9cd20d32021-01-13 19:13:28 -08006080 down(&hba->host_sem);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306081 spin_lock_irqsave(hba->host->host_lock, flags);
Bart Van Asschea113eaa2021-07-21 20:34:37 -07006082 hba->host->host_eh_scheduled = 0;
Can Guoc72e79c2020-08-09 05:15:52 -07006083 if (ufshcd_err_handling_should_stop(hba)) {
Can Guo4db7a232020-08-09 05:15:51 -07006084 if (hba->ufshcd_state != UFSHCD_STATE_ERROR)
6085 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6086 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guo9cd20d32021-01-13 19:13:28 -08006087 up(&hba->host_sem);
Can Guo4db7a232020-08-09 05:15:51 -07006088 return;
6089 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306090 ufshcd_set_eh_in_progress(hba);
Can Guo4db7a232020-08-09 05:15:51 -07006091 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guoc72e79c2020-08-09 05:15:52 -07006092 ufshcd_err_handling_prepare(hba);
Can Guoa45f9372021-05-24 01:36:57 -07006093 /* Complete requests that have door-bell cleared by h/w */
6094 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306095 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guoaa53f582021-02-23 21:36:47 -08006096 if (hba->ufshcd_state != UFSHCD_STATE_ERROR)
6097 hba->ufshcd_state = UFSHCD_STATE_RESET;
Can Guo88a92d62020-12-02 04:04:01 -08006098 /*
6099 * A full reset and restore might have happened after preparation
6100 * is finished, double check whether we should stop.
6101 */
6102 if (ufshcd_err_handling_should_stop(hba))
6103 goto skip_err_handling;
6104
Yaniv Gardi583fa622016-03-10 17:37:13 +02006105 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
6106 bool ret;
6107
6108 spin_unlock_irqrestore(hba->host->host_lock, flags);
6109 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
6110 ret = ufshcd_quirk_dl_nac_errors(hba);
6111 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo88a92d62020-12-02 04:04:01 -08006112 if (!ret && ufshcd_err_handling_should_stop(hba))
Yaniv Gardi583fa622016-03-10 17:37:13 +02006113 goto skip_err_handling;
6114 }
Can Guo4db7a232020-08-09 05:15:51 -07006115
Can Guo2355b662020-08-24 19:07:06 -07006116 if ((hba->saved_err & (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK)) ||
6117 (hba->saved_uic_err &&
6118 (hba->saved_uic_err != UFSHCD_UIC_PA_GENERIC_ERROR))) {
Can Guoc3be8d1e2020-08-09 05:15:53 -07006119 bool pr_prdt = !!(hba->saved_err & SYSTEM_BUS_FATAL_ERROR);
6120
6121 spin_unlock_irqrestore(hba->host->host_lock, flags);
6122 ufshcd_print_host_state(hba);
6123 ufshcd_print_pwr_info(hba);
Stanley Chue965e5e2020-12-05 19:58:59 +08006124 ufshcd_print_evt_hist(hba);
Can Guoc3be8d1e2020-08-09 05:15:53 -07006125 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
6126 ufshcd_print_trs(hba, hba->outstanding_reqs, pr_prdt);
6127 spin_lock_irqsave(hba->host->host_lock, flags);
6128 }
6129
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006130 /*
6131 * if host reset is required then skip clearing the pending
Can Guo2df74b62019-11-25 22:53:33 -08006132 * transfers forcefully because they will get cleared during
6133 * host reset and restore
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006134 */
Can Guo88a92d62020-12-02 04:04:01 -08006135 if (hba->force_reset || ufshcd_is_link_broken(hba) ||
6136 ufshcd_is_saved_err_fatal(hba) ||
6137 ((hba->saved_err & UIC_ERROR) &&
6138 (hba->saved_uic_err & (UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
6139 UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))) {
6140 needs_reset = true;
Can Guo2355b662020-08-24 19:07:06 -07006141 goto do_reset;
Can Guo88a92d62020-12-02 04:04:01 -08006142 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006143
Can Guo2355b662020-08-24 19:07:06 -07006144 /*
6145 * If LINERESET was caught, UFS might have been put to PWM mode,
6146 * check if power mode restore is needed.
6147 */
6148 if (hba->saved_uic_err & UFSHCD_UIC_PA_GENERIC_ERROR) {
6149 hba->saved_uic_err &= ~UFSHCD_UIC_PA_GENERIC_ERROR;
6150 if (!hba->saved_uic_err)
6151 hba->saved_err &= ~UIC_ERROR;
6152 spin_unlock_irqrestore(hba->host->host_lock, flags);
6153 if (ufshcd_is_pwr_mode_restore_needed(hba))
6154 needs_restore = true;
6155 spin_lock_irqsave(hba->host->host_lock, flags);
6156 if (!hba->saved_err && !needs_restore)
6157 goto skip_err_handling;
6158 }
6159
6160 hba->silence_err_logs = true;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006161 /* release lock as clear command might sleep */
6162 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306163 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006164 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
Can Guo307348f2020-08-24 19:07:05 -07006165 if (ufshcd_try_to_abort_task(hba, tag)) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006166 err_xfer = true;
6167 goto lock_skip_pending_xfer_clear;
6168 }
6169 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306170
6171 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006172 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
6173 if (ufshcd_clear_tm_cmd(hba, tag)) {
6174 err_tm = true;
6175 goto lock_skip_pending_xfer_clear;
6176 }
6177 }
6178
6179lock_skip_pending_xfer_clear:
Bart Van Assche73dc3c42021-07-21 20:34:38 -07006180 ufshcd_retry_aborted_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306181
Can Guoa45f9372021-05-24 01:36:57 -07006182 spin_lock_irqsave(hba->host->host_lock, flags);
6183 hba->silence_err_logs = false;
Can Guo2355b662020-08-24 19:07:06 -07006184 if (err_xfer || err_tm) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006185 needs_reset = true;
Can Guo2355b662020-08-24 19:07:06 -07006186 goto do_reset;
6187 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006188
Can Guo2355b662020-08-24 19:07:06 -07006189 /*
6190 * After all reqs and tasks are cleared from doorbell,
6191 * now it is safe to retore power mode.
6192 */
6193 if (needs_restore) {
6194 spin_unlock_irqrestore(hba->host->host_lock, flags);
6195 /*
6196 * Hold the scaling lock just in case dev cmds
6197 * are sent via bsg and/or sysfs.
6198 */
6199 down_write(&hba->clk_scaling_lock);
6200 hba->force_pmc = true;
6201 pmc_err = ufshcd_config_pwr_mode(hba, &(hba->pwr_info));
6202 if (pmc_err) {
6203 needs_reset = true;
6204 dev_err(hba->dev, "%s: Failed to restore power mode, err = %d\n",
6205 __func__, pmc_err);
6206 }
6207 hba->force_pmc = false;
6208 ufshcd_print_pwr_info(hba);
6209 up_write(&hba->clk_scaling_lock);
6210 spin_lock_irqsave(hba->host->host_lock, flags);
6211 }
6212
6213do_reset:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306214 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006215 if (needs_reset) {
Can Guo4db7a232020-08-09 05:15:51 -07006216 hba->force_reset = false;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006217 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306218 err = ufshcd_reset_and_restore(hba);
Can Guo4db7a232020-08-09 05:15:51 -07006219 if (err)
6220 dev_err(hba->dev, "%s: reset and restore failed with err %d\n",
6221 __func__, err);
Can Guoc72e79c2020-08-09 05:15:52 -07006222 else
6223 ufshcd_recover_pm_error(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006224 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306225 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006226
Yaniv Gardi583fa622016-03-10 17:37:13 +02006227skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006228 if (!needs_reset) {
Can Guo4db7a232020-08-09 05:15:51 -07006229 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
6230 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006231 if (hba->saved_err || hba->saved_uic_err)
6232 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
6233 __func__, hba->saved_err, hba->saved_uic_err);
6234 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306235 ufshcd_clear_eh_in_progress(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006236 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guoc72e79c2020-08-09 05:15:52 -07006237 ufshcd_err_handling_unprepare(hba);
Can Guo9cd20d32021-01-13 19:13:28 -08006238 up(&hba->host_sem);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306239}
6240
6241/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306242 * ufshcd_update_uic_error - check and set fatal UIC error flags.
6243 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006244 *
6245 * Returns
6246 * IRQ_HANDLED - If interrupt is valid
6247 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306248 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006249static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306250{
6251 u32 reg;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006252 irqreturn_t retval = IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306253
Can Guo2355b662020-08-24 19:07:06 -07006254 /* PHY layer error */
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08006255 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08006256 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
Can Guo2355b662020-08-24 19:07:06 -07006257 (reg & UIC_PHY_ADAPTER_LAYER_ERROR_CODE_MASK)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006258 ufshcd_update_evt_hist(hba, UFS_EVT_PA_ERR, reg);
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08006259 /*
6260 * To know whether this error is fatal or not, DB timeout
6261 * must be checked but this error is handled separately.
6262 */
Can Guo2355b662020-08-24 19:07:06 -07006263 if (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)
6264 dev_dbg(hba->dev, "%s: UIC Lane error reported\n",
6265 __func__);
6266
6267 /* Got a LINERESET indication. */
6268 if (reg & UIC_PHY_ADAPTER_LAYER_GENERIC_ERROR) {
6269 struct uic_command *cmd = NULL;
6270
6271 hba->uic_error |= UFSHCD_UIC_PA_GENERIC_ERROR;
6272 if (hba->uic_async_done && hba->active_uic_cmd)
6273 cmd = hba->active_uic_cmd;
6274 /*
6275 * Ignore the LINERESET during power mode change
6276 * operation via DME_SET command.
6277 */
6278 if (cmd && (cmd->command == UIC_CMD_DME_SET))
6279 hba->uic_error &= ~UFSHCD_UIC_PA_GENERIC_ERROR;
6280 }
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006281 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006282 }
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08006283
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306284 /* PA_INIT_ERROR is fatal and needs UIC reset */
6285 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006286 if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
6287 (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006288 ufshcd_update_evt_hist(hba, UFS_EVT_DL_ERR, reg);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006289
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006290 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
6291 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
6292 else if (hba->dev_quirks &
6293 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
6294 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
6295 hba->uic_error |=
6296 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
6297 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
6298 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
6299 }
6300 retval |= IRQ_HANDLED;
Yaniv Gardi583fa622016-03-10 17:37:13 +02006301 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306302
6303 /* UIC NL/TL/DME errors needs software retry */
6304 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006305 if ((reg & UIC_NETWORK_LAYER_ERROR) &&
6306 (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006307 ufshcd_update_evt_hist(hba, UFS_EVT_NL_ERR, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306308 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006309 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006310 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306311
6312 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006313 if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
6314 (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006315 ufshcd_update_evt_hist(hba, UFS_EVT_TL_ERR, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306316 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006317 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006318 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306319
6320 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006321 if ((reg & UIC_DME_ERROR) &&
6322 (reg & UIC_DME_ERROR_CODE_MASK)) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006323 ufshcd_update_evt_hist(hba, UFS_EVT_DME_ERR, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306324 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006325 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006326 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306327
6328 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
6329 __func__, hba->uic_error);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006330 return retval;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306331}
6332
6333/**
6334 * ufshcd_check_errors - Check for errors that need s/w attention
6335 * @hba: per-adapter instance
Can Guoa45f9372021-05-24 01:36:57 -07006336 * @intr_status: interrupt status generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006337 *
6338 * Returns
6339 * IRQ_HANDLED - If interrupt is valid
6340 * IRQ_NONE - If invalid interrupt
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306341 */
Can Guoa45f9372021-05-24 01:36:57 -07006342static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba, u32 intr_status)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306343{
6344 bool queue_eh_work = false;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006345 irqreturn_t retval = IRQ_NONE;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306346
Can Guoa45f9372021-05-24 01:36:57 -07006347 spin_lock(hba->host->host_lock);
6348 hba->errors |= UFSHCD_ERROR_MASK & intr_status;
6349
Stanley Chud3c615b2019-07-10 21:38:19 +08006350 if (hba->errors & INT_FATAL_ERRORS) {
Stanley Chue965e5e2020-12-05 19:58:59 +08006351 ufshcd_update_evt_hist(hba, UFS_EVT_FATAL_ERR,
6352 hba->errors);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306353 queue_eh_work = true;
Stanley Chud3c615b2019-07-10 21:38:19 +08006354 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306355
6356 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306357 hba->uic_error = 0;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006358 retval = ufshcd_update_uic_error(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306359 if (hba->uic_error)
6360 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306361 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306362
Stanley Chu82174442019-05-21 14:44:54 +08006363 if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
6364 dev_err(hba->dev,
6365 "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
6366 __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
6367 "Enter" : "Exit",
6368 hba->errors, ufshcd_get_upmcrs(hba));
Stanley Chue965e5e2020-12-05 19:58:59 +08006369 ufshcd_update_evt_hist(hba, UFS_EVT_AUTO_HIBERN8_ERR,
Stanley Chud3c615b2019-07-10 21:38:19 +08006370 hba->errors);
Can Guo4db7a232020-08-09 05:15:51 -07006371 ufshcd_set_link_broken(hba);
Stanley Chu82174442019-05-21 14:44:54 +08006372 queue_eh_work = true;
6373 }
6374
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306375 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02006376 /*
6377 * update the transfer error masks to sticky bits, let's do this
6378 * irrespective of current ufshcd_state.
6379 */
6380 hba->saved_err |= hba->errors;
6381 hba->saved_uic_err |= hba->uic_error;
6382
Can Guo4db7a232020-08-09 05:15:51 -07006383 /* dump controller state before resetting */
Can Guoace38042020-12-02 04:04:03 -08006384 if ((hba->saved_err &
6385 (INT_FATAL_ERRORS | UFSHCD_UIC_HIBERN8_MASK)) ||
Can Guo2355b662020-08-24 19:07:06 -07006386 (hba->saved_uic_err &&
6387 (hba->saved_uic_err != UFSHCD_UIC_PA_GENERIC_ERROR))) {
Can Guo4db7a232020-08-09 05:15:51 -07006388 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
Dolev Raviv66cc8202016-12-22 18:39:42 -08006389 __func__, hba->saved_err,
6390 hba->saved_uic_err);
Can Guoc3be8d1e2020-08-09 05:15:53 -07006391 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE,
6392 "host_regs: ");
Can Guo4db7a232020-08-09 05:15:51 -07006393 ufshcd_print_pwr_info(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306394 }
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006395 retval |= IRQ_HANDLED;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306396 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306397 /*
6398 * if (!queue_eh_work) -
6399 * Other errors are either non-fatal where host recovers
6400 * itself without s/w intervention or errors that will be
6401 * handled by the SCSI core layer.
6402 */
Can Guoa45f9372021-05-24 01:36:57 -07006403 hba->errors = 0;
6404 hba->uic_error = 0;
6405 spin_unlock(hba->host->host_lock);
Bart Van Asschea113eaa2021-07-21 20:34:37 -07006406
6407 if (queue_eh_work)
6408 ufshcd_schedule_eh(hba);
6409
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006410 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306411}
6412
Bart Van Assche69a6c262019-12-09 10:13:09 -08006413struct ctm_info {
6414 struct ufs_hba *hba;
6415 unsigned long pending;
6416 unsigned int ncpl;
6417};
6418
6419static bool ufshcd_compl_tm(struct request *req, void *priv, bool reserved)
6420{
6421 struct ctm_info *const ci = priv;
6422 struct completion *c;
6423
6424 WARN_ON_ONCE(reserved);
6425 if (test_bit(req->tag, &ci->pending))
6426 return true;
6427 ci->ncpl++;
6428 c = req->end_io_data;
6429 if (c)
6430 complete(c);
6431 return true;
6432}
6433
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306434/**
6435 * ufshcd_tmc_handler - handle task management function completion
6436 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006437 *
6438 * Returns
6439 * IRQ_HANDLED - If interrupt is valid
6440 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306441 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006442static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306443{
Can Guoa45f9372021-05-24 01:36:57 -07006444 unsigned long flags;
Bart Van Assche69a6c262019-12-09 10:13:09 -08006445 struct request_queue *q = hba->tmf_queue;
6446 struct ctm_info ci = {
6447 .hba = hba,
Bart Van Assche69a6c262019-12-09 10:13:09 -08006448 };
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306449
Can Guoa45f9372021-05-24 01:36:57 -07006450 spin_lock_irqsave(hba->host->host_lock, flags);
6451 ci.pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
Bart Van Assche69a6c262019-12-09 10:13:09 -08006452 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_compl_tm, &ci);
Can Guoa45f9372021-05-24 01:36:57 -07006453 spin_unlock_irqrestore(hba->host->host_lock, flags);
6454
Bart Van Assche69a6c262019-12-09 10:13:09 -08006455 return ci.ncpl ? IRQ_HANDLED : IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306456}
6457
6458/**
6459 * ufshcd_sl_intr - Interrupt service routine
6460 * @hba: per adapter instance
6461 * @intr_status: contains interrupts generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006462 *
6463 * Returns
6464 * IRQ_HANDLED - If interrupt is valid
6465 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306466 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006467static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306468{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006469 irqreturn_t retval = IRQ_NONE;
6470
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05306471 if (intr_status & UFSHCD_UIC_MASK)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006472 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306473
Can Guoa45f9372021-05-24 01:36:57 -07006474 if (intr_status & UFSHCD_ERROR_MASK || hba->errors)
6475 retval |= ufshcd_check_errors(hba, intr_status);
6476
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306477 if (intr_status & UTP_TASK_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006478 retval |= ufshcd_tmc_handler(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306479
6480 if (intr_status & UTP_TRANSFER_REQ_COMPL)
Bart Van Assche73dc3c42021-07-21 20:34:38 -07006481 retval |= ufshcd_transfer_req_compl(hba, /*retry_requests=*/false);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006482
6483 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306484}
6485
6486/**
6487 * ufshcd_intr - Main interrupt service routine
6488 * @irq: irq number
6489 * @__hba: pointer to adapter instance
6490 *
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006491 * Returns
6492 * IRQ_HANDLED - If interrupt is valid
6493 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306494 */
6495static irqreturn_t ufshcd_intr(int irq, void *__hba)
6496{
Adrian Hunter127d5f72020-08-11 16:39:36 +03006497 u32 intr_status, enabled_intr_status = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306498 irqreturn_t retval = IRQ_NONE;
6499 struct ufs_hba *hba = __hba;
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05306500 int retries = hba->nutrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306501
Seungwon Jeonb873a2752013-06-26 22:39:26 +05306502 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Can Guo3f8af602020-08-09 05:15:50 -07006503 hba->ufs_stats.last_intr_status = intr_status;
6504 hba->ufs_stats.last_intr_ts = ktime_get();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306505
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05306506 /*
6507 * There could be max of hba->nutrs reqs in flight and in worst case
6508 * if the reqs get finished 1 by 1 after the interrupt status is
6509 * read, make sure we handle them by checking the interrupt status
6510 * again in a loop until we process all of the reqs before returning.
6511 */
Adrian Hunter127d5f72020-08-11 16:39:36 +03006512 while (intr_status && retries--) {
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05306513 enabled_intr_status =
6514 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
Bean Huo60ec3752021-01-18 21:12:33 +01006515 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006516 if (enabled_intr_status)
6517 retval |= ufshcd_sl_intr(hba, enabled_intr_status);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02006518
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05306519 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Adrian Hunter127d5f72020-08-11 16:39:36 +03006520 }
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05306521
Jaegeuk Kimeeb1b552021-01-07 10:53:16 -08006522 if (enabled_intr_status && retval == IRQ_NONE &&
Bart Van Assche40d2fd02021-05-19 13:20:57 -07006523 (!(enabled_intr_status & UTP_TRANSFER_REQ_COMPL) ||
6524 hba->outstanding_reqs) && !ufshcd_eh_in_progress(hba)) {
Jaegeuk Kimeeb1b552021-01-07 10:53:16 -08006525 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x (0x%08x, 0x%08x)\n",
6526 __func__,
6527 intr_status,
6528 hba->ufs_stats.last_intr_status,
6529 enabled_intr_status);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08006530 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
6531 }
6532
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306533 return retval;
6534}
6535
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306536static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
6537{
6538 int err = 0;
6539 u32 mask = 1 << tag;
6540 unsigned long flags;
6541
6542 if (!test_bit(tag, &hba->outstanding_tasks))
6543 goto out;
6544
6545 spin_lock_irqsave(hba->host->host_lock, flags);
Alim Akhtar1399c5b2018-05-06 15:44:15 +05306546 ufshcd_utmrl_clear(hba, tag);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306547 spin_unlock_irqrestore(hba->host->host_lock, flags);
6548
6549 /* poll for max. 1 sec to clear door bell register by h/w */
6550 err = ufshcd_wait_for_register(hba,
6551 REG_UTP_TASK_REQ_DOOR_BELL,
Bart Van Assche5cac1092020-05-07 15:27:50 -07006552 mask, 0, 1000, 1000);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306553out:
6554 return err;
6555}
6556
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006557static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
6558 struct utp_task_req_desc *treq, u8 tm_function)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306559{
Bart Van Assche69a6c262019-12-09 10:13:09 -08006560 struct request_queue *q = hba->tmf_queue;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006561 struct Scsi_Host *host = hba->host;
Bart Van Assche69a6c262019-12-09 10:13:09 -08006562 DECLARE_COMPLETION_ONSTACK(wait);
6563 struct request *req;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306564 unsigned long flags;
Can Guo4b42d5572021-04-01 00:39:09 -07006565 int task_tag, err;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306566
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306567 /*
Can Guo4b42d5572021-04-01 00:39:09 -07006568 * blk_get_request() is used here only to get a free tag.
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306569 */
Jaegeuk Kimeeb1b552021-01-07 10:53:16 -08006570 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
6571 if (IS_ERR(req))
6572 return PTR_ERR(req);
6573
Bart Van Assche69a6c262019-12-09 10:13:09 -08006574 req->end_io_data = &wait;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006575 ufshcd_hold(hba, false);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306576
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306577 spin_lock_irqsave(host->host_lock, flags);
Can Guo1235fc52021-04-01 00:39:08 -07006578 blk_mq_start_request(req);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306579
Can Guo4b42d5572021-04-01 00:39:09 -07006580 task_tag = req->tag;
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -05006581 treq->upiu_req.req_header.dword_0 |= cpu_to_be32(task_tag);
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006582
Can Guo4b42d5572021-04-01 00:39:09 -07006583 memcpy(hba->utmrdl_base_addr + task_tag, treq, sizeof(*treq));
6584 ufshcd_vops_setup_task_mgmt(hba, task_tag, tm_function);
Kiwoong Kimd2877be2016-11-10 21:16:15 +09006585
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306586 /* send command to the controller */
Can Guo4b42d5572021-04-01 00:39:09 -07006587 __set_bit(task_tag, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02006588
Can Guo4b42d5572021-04-01 00:39:09 -07006589 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TASK_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07006590 /* Make sure that doorbell is committed immediately */
6591 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306592
6593 spin_unlock_irqrestore(host->host_lock, flags);
6594
Bean Huo28fa68f2021-01-05 12:34:42 +01006595 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_SEND);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03006596
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306597 /* wait until the task management command is completed */
Bart Van Assche69a6c262019-12-09 10:13:09 -08006598 err = wait_for_completion_io_timeout(&wait,
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306599 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306600 if (!err) {
Bart Van Assche69a6c262019-12-09 10:13:09 -08006601 /*
6602 * Make sure that ufshcd_compl_tm() does not trigger a
6603 * use-after-free.
6604 */
6605 req->end_io_data = NULL;
Bean Huo28fa68f2021-01-05 12:34:42 +01006606 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_ERR);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306607 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
6608 __func__, tm_function);
Can Guo4b42d5572021-04-01 00:39:09 -07006609 if (ufshcd_clear_tm_cmd(hba, task_tag))
6610 dev_WARN(hba->dev, "%s: unable to clear tm cmd (slot %d) after timeout\n",
6611 __func__, task_tag);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306612 err = -ETIMEDOUT;
6613 } else {
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006614 err = 0;
Can Guo4b42d5572021-04-01 00:39:09 -07006615 memcpy(treq, hba->utmrdl_base_addr + task_tag, sizeof(*treq));
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006616
Bean Huo28fa68f2021-01-05 12:34:42 +01006617 ufshcd_add_tm_upiu_trace(hba, task_tag, UFS_TM_COMP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306618 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306619
Stanley Chub5572172019-08-19 21:43:28 +08006620 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo4b42d5572021-04-01 00:39:09 -07006621 __clear_bit(task_tag, &hba->outstanding_tasks);
Stanley Chub5572172019-08-19 21:43:28 +08006622 spin_unlock_irqrestore(hba->host->host_lock, flags);
6623
Can Guo4b42d5572021-04-01 00:39:09 -07006624 ufshcd_release(hba);
Bart Van Assche69a6c262019-12-09 10:13:09 -08006625 blk_put_request(req);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306626
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306627 return err;
6628}
6629
6630/**
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006631 * ufshcd_issue_tm_cmd - issues task management commands to controller
6632 * @hba: per adapter instance
6633 * @lun_id: LUN ID to which TM command is sent
6634 * @task_id: task ID to which the TM command is applicable
6635 * @tm_function: task management function opcode
6636 * @tm_response: task management service response return value
6637 *
6638 * Returns non-zero value on error, zero on success.
6639 */
6640static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
6641 u8 tm_function, u8 *tm_response)
6642{
6643 struct utp_task_req_desc treq = { { 0 }, };
6644 int ocs_value, err;
6645
6646 /* Configure task request descriptor */
6647 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6648 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6649
6650 /* Configure task request UPIU */
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -05006651 treq.upiu_req.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006652 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -05006653 treq.upiu_req.req_header.dword_1 = cpu_to_be32(tm_function << 16);
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006654
6655 /*
6656 * The host shall provide the same value for LUN field in the basic
6657 * header and for Input Parameter.
6658 */
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -05006659 treq.upiu_req.input_param1 = cpu_to_be32(lun_id);
6660 treq.upiu_req.input_param2 = cpu_to_be32(task_id);
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006661
6662 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
6663 if (err == -ETIMEDOUT)
6664 return err;
6665
6666 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6667 if (ocs_value != OCS_SUCCESS)
6668 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
6669 __func__, ocs_value);
6670 else if (tm_response)
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -05006671 *tm_response = be32_to_cpu(treq.upiu_rsp.output_param1) &
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006672 MASK_TM_SERVICE_RESP;
6673 return err;
6674}
6675
6676/**
Avri Altman5e0a86e2018-10-07 17:30:37 +03006677 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
6678 * @hba: per-adapter instance
6679 * @req_upiu: upiu request
6680 * @rsp_upiu: upiu reply
Avri Altman5e0a86e2018-10-07 17:30:37 +03006681 * @desc_buff: pointer to descriptor buffer, NULL if NA
6682 * @buff_len: descriptor size, 0 if NA
Bart Van Assched0e97602019-10-29 16:07:08 -07006683 * @cmd_type: specifies the type (NOP, Query...)
Avri Altman5e0a86e2018-10-07 17:30:37 +03006684 * @desc_op: descriptor operation
6685 *
6686 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
6687 * Therefore, it "rides" the device management infrastructure: uses its tag and
6688 * tasks work queues.
6689 *
6690 * Since there is only one available tag for device management commands,
6691 * the caller is expected to hold the hba->dev_cmd.lock mutex.
6692 */
6693static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
6694 struct utp_upiu_req *req_upiu,
6695 struct utp_upiu_req *rsp_upiu,
6696 u8 *desc_buff, int *buff_len,
Bart Van Assche7f674c32019-10-29 16:07:09 -07006697 enum dev_cmd_type cmd_type,
Avri Altman5e0a86e2018-10-07 17:30:37 +03006698 enum query_opcode desc_op)
6699{
Bart Van Assche7252a362019-12-09 10:13:08 -08006700 struct request_queue *q = hba->cmd_queue;
Bart Van Assche8a686f22021-07-21 20:34:26 -07006701 DECLARE_COMPLETION_ONSTACK(wait);
Bart Van Assche7252a362019-12-09 10:13:08 -08006702 struct request *req;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006703 struct ufshcd_lrb *lrbp;
6704 int err = 0;
6705 int tag;
Bean Huoa23064c2020-07-06 14:39:36 +02006706 u8 upiu_flags;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006707
6708 down_read(&hba->clk_scaling_lock);
6709
Bart Van Assche7252a362019-12-09 10:13:08 -08006710 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03006711 if (IS_ERR(req)) {
6712 err = PTR_ERR(req);
6713 goto out_unlock;
6714 }
Bart Van Assche7252a362019-12-09 10:13:08 -08006715 tag = req->tag;
Bart Van Assche4728ab42021-07-21 20:34:27 -07006716 WARN_ONCE(tag < 0, "Invalid tag %d\n", tag);
Avri Altman5e0a86e2018-10-07 17:30:37 +03006717
Can Guoa45f9372021-05-24 01:36:57 -07006718 if (unlikely(test_bit(tag, &hba->outstanding_reqs))) {
Can Guo7a7e66c2020-12-02 04:04:02 -08006719 err = -EBUSY;
6720 goto out;
6721 }
Avri Altman5e0a86e2018-10-07 17:30:37 +03006722
Can Guoa45f9372021-05-24 01:36:57 -07006723 lrbp = &hba->lrb[tag];
Can Guo7a7e66c2020-12-02 04:04:02 -08006724 WARN_ON(lrbp->cmd);
Avri Altman5e0a86e2018-10-07 17:30:37 +03006725 lrbp->cmd = NULL;
6726 lrbp->sense_bufflen = 0;
6727 lrbp->sense_buffer = NULL;
6728 lrbp->task_tag = tag;
6729 lrbp->lun = 0;
6730 lrbp->intr_cmd = true;
Satya Tangiraladf043c742020-07-06 20:04:14 +00006731 ufshcd_prepare_lrbp_crypto(NULL, lrbp);
Avri Altman5e0a86e2018-10-07 17:30:37 +03006732 hba->dev_cmd.type = cmd_type;
6733
Caleb Connolly51428812021-03-10 15:33:42 +00006734 if (hba->ufs_version <= ufshci_version(1, 1))
Avri Altman5e0a86e2018-10-07 17:30:37 +03006735 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
Caleb Connolly51428812021-03-10 15:33:42 +00006736 else
Avri Altman5e0a86e2018-10-07 17:30:37 +03006737 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006738
6739 /* update the task tag in the request upiu */
6740 req_upiu->header.dword_0 |= cpu_to_be32(tag);
6741
6742 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
6743
6744 /* just copy the upiu request as it is */
6745 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
6746 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
6747 /* The Data Segment Area is optional depending upon the query
6748 * function value. for WRITE DESCRIPTOR, the data segment
6749 * follows right after the tsf.
6750 */
6751 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
6752 *buff_len = 0;
6753 }
6754
6755 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
6756
6757 hba->dev_cmd.complete = &wait;
6758
Bean Huo10542482021-05-31 12:43:08 +02006759 ufshcd_add_query_upiu_trace(hba, UFS_QUERY_SEND, lrbp->ucd_req_ptr);
Avri Altman5e0a86e2018-10-07 17:30:37 +03006760
Can Guoa45f9372021-05-24 01:36:57 -07006761 ufshcd_send_command(hba, tag);
Avri Altman5e0a86e2018-10-07 17:30:37 +03006762 /*
6763 * ignore the returning value here - ufshcd_check_query_response is
6764 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
6765 * read the response directly ignoring all errors.
6766 */
6767 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
6768
6769 /* just copy the upiu response as it is */
6770 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
Avri Altman4bbbe242019-02-20 09:11:13 +02006771 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
6772 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
6773 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
6774 MASK_QUERY_DATA_SEG_LEN;
6775
6776 if (*buff_len >= resp_len) {
6777 memcpy(desc_buff, descp, resp_len);
6778 *buff_len = resp_len;
6779 } else {
Bean Huo3d4881d2019-11-12 23:34:35 +01006780 dev_warn(hba->dev,
6781 "%s: rsp size %d is bigger than buffer size %d",
6782 __func__, resp_len, *buff_len);
Avri Altman4bbbe242019-02-20 09:11:13 +02006783 *buff_len = 0;
6784 err = -EINVAL;
6785 }
6786 }
Bean Huo10542482021-05-31 12:43:08 +02006787 ufshcd_add_query_upiu_trace(hba, err ? UFS_QUERY_ERR : UFS_QUERY_COMP,
6788 (struct utp_upiu_req *)lrbp->ucd_rsp_ptr);
Avri Altman5e0a86e2018-10-07 17:30:37 +03006789
Can Guo7a7e66c2020-12-02 04:04:02 -08006790out:
Bart Van Assche7252a362019-12-09 10:13:08 -08006791 blk_put_request(req);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03006792out_unlock:
Avri Altman5e0a86e2018-10-07 17:30:37 +03006793 up_read(&hba->clk_scaling_lock);
6794 return err;
6795}
6796
6797/**
6798 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
6799 * @hba: per-adapter instance
6800 * @req_upiu: upiu request
6801 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
6802 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
6803 * @desc_buff: pointer to descriptor buffer, NULL if NA
6804 * @buff_len: descriptor size, 0 if NA
6805 * @desc_op: descriptor operation
6806 *
6807 * Supports UTP Transfer requests (nop and query), and UTP Task
6808 * Management requests.
6809 * It is up to the caller to fill the upiu conent properly, as it will
6810 * be copied without any further input validations.
6811 */
6812int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
6813 struct utp_upiu_req *req_upiu,
6814 struct utp_upiu_req *rsp_upiu,
6815 int msgcode,
6816 u8 *desc_buff, int *buff_len,
6817 enum query_opcode desc_op)
6818{
6819 int err;
Bart Van Assche7f674c32019-10-29 16:07:09 -07006820 enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006821 struct utp_task_req_desc treq = { { 0 }, };
6822 int ocs_value;
6823 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
6824
Avri Altman5e0a86e2018-10-07 17:30:37 +03006825 switch (msgcode) {
6826 case UPIU_TRANSACTION_NOP_OUT:
6827 cmd_type = DEV_CMD_TYPE_NOP;
Gustavo A. R. Silvadf561f662020-08-23 17:36:59 -05006828 fallthrough;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006829 case UPIU_TRANSACTION_QUERY_REQ:
6830 ufshcd_hold(hba, false);
6831 mutex_lock(&hba->dev_cmd.lock);
6832 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
6833 desc_buff, buff_len,
6834 cmd_type, desc_op);
6835 mutex_unlock(&hba->dev_cmd.lock);
6836 ufshcd_release(hba);
6837
6838 break;
6839 case UPIU_TRANSACTION_TASK_REQ:
6840 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6841 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6842
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -05006843 memcpy(&treq.upiu_req, req_upiu, sizeof(*req_upiu));
Avri Altman5e0a86e2018-10-07 17:30:37 +03006844
6845 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
6846 if (err == -ETIMEDOUT)
6847 break;
6848
6849 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6850 if (ocs_value != OCS_SUCCESS) {
6851 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
6852 ocs_value);
6853 break;
6854 }
6855
Gustavo A. R. Silva1352eec2021-03-31 17:43:38 -05006856 memcpy(rsp_upiu, &treq.upiu_rsp, sizeof(*rsp_upiu));
Avri Altman5e0a86e2018-10-07 17:30:37 +03006857
6858 break;
6859 default:
6860 err = -EINVAL;
6861
6862 break;
6863 }
6864
Avri Altman5e0a86e2018-10-07 17:30:37 +03006865 return err;
6866}
6867
6868/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306869 * ufshcd_eh_device_reset_handler - device reset handler registered to
6870 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306871 * @cmd: SCSI command pointer
6872 *
6873 * Returns SUCCESS/FAILED
6874 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306875static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306876{
6877 struct Scsi_Host *host;
6878 struct ufs_hba *hba;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306879 u32 pos;
6880 int err;
Can Guo35fc4cd2020-12-28 04:04:36 -08006881 u8 resp = 0xF, lun;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306882
6883 host = cmd->device->host;
6884 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306885
Can Guo35fc4cd2020-12-28 04:04:36 -08006886 lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
6887 err = ufshcd_issue_tm_cmd(hba, lun, 0, UFS_LOGICAL_RESET, &resp);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306888 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306889 if (!err)
6890 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306891 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306892 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306893
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306894 /* clear the commands that were pending for corresponding LUN */
6895 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
Can Guo35fc4cd2020-12-28 04:04:36 -08006896 if (hba->lrb[pos].lun == lun) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306897 err = ufshcd_clear_cmd(hba, pos);
6898 if (err)
6899 break;
Bart Van Assche73dc3c42021-07-21 20:34:38 -07006900 __ufshcd_transfer_req_compl(hba, pos, /*retry_requests=*/true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306901 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306902 }
Gilad Broner7fabb772017-02-03 16:56:50 -08006903
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306904out:
Gilad Broner7fabb772017-02-03 16:56:50 -08006905 hba->req_abort_count = 0;
Stanley Chue965e5e2020-12-05 19:58:59 +08006906 ufshcd_update_evt_hist(hba, UFS_EVT_DEV_RESET, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306907 if (!err) {
6908 err = SUCCESS;
6909 } else {
6910 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6911 err = FAILED;
6912 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306913 return err;
6914}
6915
Gilad Bronere0b299e2017-02-03 16:56:40 -08006916static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6917{
6918 struct ufshcd_lrb *lrbp;
6919 int tag;
6920
6921 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6922 lrbp = &hba->lrb[tag];
6923 lrbp->req_abort_skip = true;
6924 }
6925}
6926
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306927/**
Can Guo307348f2020-08-24 19:07:05 -07006928 * ufshcd_try_to_abort_task - abort a specific task
Lee Jonesd23ec0b2020-11-02 14:23:51 +00006929 * @hba: Pointer to adapter instance
6930 * @tag: Task tag/index to be aborted
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306931 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306932 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6933 * command, and in host controller by clearing the door-bell register. There can
6934 * be race between controller sending the command to the device while abort is
6935 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6936 * really issued and then try to abort it.
6937 *
Can Guo307348f2020-08-24 19:07:05 -07006938 * Returns zero on success, non-zero on failure
6939 */
6940static int ufshcd_try_to_abort_task(struct ufs_hba *hba, int tag)
6941{
6942 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
6943 int err = 0;
6944 int poll_cnt;
6945 u8 resp = 0xF;
6946 u32 reg;
6947
6948 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6949 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6950 UFS_QUERY_TASK, &resp);
6951 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6952 /* cmd pending in the device */
6953 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6954 __func__, tag);
6955 break;
6956 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6957 /*
6958 * cmd not pending in the device, check if it is
6959 * in transition.
6960 */
6961 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6962 __func__, tag);
6963 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6964 if (reg & (1 << tag)) {
6965 /* sleep for max. 200us to stabilize */
6966 usleep_range(100, 200);
6967 continue;
6968 }
6969 /* command completed already */
6970 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6971 __func__, tag);
6972 goto out;
6973 } else {
6974 dev_err(hba->dev,
6975 "%s: no response from device. tag = %d, err %d\n",
6976 __func__, tag, err);
6977 if (!err)
6978 err = resp; /* service response error */
6979 goto out;
6980 }
6981 }
6982
6983 if (!poll_cnt) {
6984 err = -EBUSY;
6985 goto out;
6986 }
6987
6988 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6989 UFS_ABORT_TASK, &resp);
6990 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6991 if (!err) {
6992 err = resp; /* service response error */
6993 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6994 __func__, tag, err);
6995 }
6996 goto out;
6997 }
6998
6999 err = ufshcd_clear_cmd(hba, tag);
7000 if (err)
7001 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
7002 __func__, tag, err);
7003
7004out:
7005 return err;
7006}
7007
7008/**
7009 * ufshcd_abort - scsi host template eh_abort_handler callback
7010 * @cmd: SCSI command pointer
7011 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307012 * Returns SUCCESS/FAILED
7013 */
7014static int ufshcd_abort(struct scsi_cmnd *cmd)
7015{
Bart Van Assche4728ab42021-07-21 20:34:27 -07007016 struct Scsi_Host *host = cmd->device->host;
7017 struct ufs_hba *hba = shost_priv(host);
Bart Van Assche3f2c1002021-08-09 16:03:50 -07007018 int tag = scsi_cmd_to_rq(cmd)->tag;
Bart Van Assche4728ab42021-07-21 20:34:27 -07007019 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307020 unsigned long flags;
Bart Van Assche64180742021-07-21 20:34:35 -07007021 int err = FAILED;
Dolev Ravive9d501b2014-07-01 12:22:37 +03007022 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307023
Bart Van Assche4728ab42021-07-21 20:34:27 -07007024 WARN_ONCE(tag < 0, "Invalid tag %d\n", tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307025
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007026 ufshcd_hold(hba, false);
Dolev Ravive9d501b2014-07-01 12:22:37 +03007027 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Bart Van Assche64180742021-07-21 20:34:35 -07007028 /* If command is already aborted/completed, return FAILED. */
Yaniv Gardi14497322016-02-01 15:02:39 +02007029 if (!(test_bit(tag, &hba->outstanding_reqs))) {
7030 dev_err(hba->dev,
7031 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
7032 __func__, tag, hba->outstanding_reqs, reg);
Bart Van Assche64180742021-07-21 20:34:35 -07007033 goto release;
Yaniv Gardi14497322016-02-01 15:02:39 +02007034 }
7035
Dolev Raviv66cc8202016-12-22 18:39:42 -08007036 /* Print Transfer Request of aborted task */
Bean Huod87a1f62020-08-11 16:18:59 +02007037 dev_info(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
Dolev Raviv66cc8202016-12-22 18:39:42 -08007038
Gilad Broner7fabb772017-02-03 16:56:50 -08007039 /*
7040 * Print detailed info about aborted request.
7041 * As more than one request might get aborted at the same time,
7042 * print full information only for the first aborted request in order
7043 * to reduce repeated printouts. For other aborted requests only print
7044 * basic details.
7045 */
Can Guo7a7e66c2020-12-02 04:04:02 -08007046 scsi_print_command(cmd);
Gilad Broner7fabb772017-02-03 16:56:50 -08007047 if (!hba->req_abort_count) {
Stanley Chue965e5e2020-12-05 19:58:59 +08007048 ufshcd_update_evt_hist(hba, UFS_EVT_ABORT, tag);
7049 ufshcd_print_evt_hist(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08007050 ufshcd_print_host_state(hba);
Gilad Broner7fabb772017-02-03 16:56:50 -08007051 ufshcd_print_pwr_info(hba);
7052 ufshcd_print_trs(hba, 1 << tag, true);
7053 } else {
7054 ufshcd_print_trs(hba, 1 << tag, false);
7055 }
7056 hba->req_abort_count++;
Gilad Bronere0b299e2017-02-03 16:56:40 -08007057
Bean Huod87a1f62020-08-11 16:18:59 +02007058 if (!(reg & (1 << tag))) {
7059 dev_err(hba->dev,
7060 "%s: cmd was completed, but without a notifying intr, tag = %d",
7061 __func__, tag);
Bart Van Assche73dc3c42021-07-21 20:34:38 -07007062 __ufshcd_transfer_req_compl(hba, 1UL << tag, /*retry_requests=*/false);
Bart Van Assche64180742021-07-21 20:34:35 -07007063 goto release;
Bean Huod87a1f62020-08-11 16:18:59 +02007064 }
7065
Can Guo7a7e66c2020-12-02 04:04:02 -08007066 /*
7067 * Task abort to the device W-LUN is illegal. When this command
7068 * will fail, due to spec violation, scsi err handling next step
7069 * will be to send LU reset which, again, is a spec violation.
7070 * To avoid these unnecessary/illegal steps, first we clean up
Can Guoa45f9372021-05-24 01:36:57 -07007071 * the lrb taken by this cmd and re-set it in outstanding_reqs,
Bart Van Asschea113eaa2021-07-21 20:34:37 -07007072 * then queue the error handler and bail.
Can Guo7a7e66c2020-12-02 04:04:02 -08007073 */
7074 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN) {
7075 ufshcd_update_evt_hist(hba, UFS_EVT_ABORT, lrbp->lun);
Bart Van Assche64180742021-07-21 20:34:35 -07007076
Can Guo7a7e66c2020-12-02 04:04:02 -08007077 spin_lock_irqsave(host->host_lock, flags);
Can Guoa45f9372021-05-24 01:36:57 -07007078 hba->force_reset = true;
Can Guo7a7e66c2020-12-02 04:04:02 -08007079 spin_unlock_irqrestore(host->host_lock, flags);
Bart Van Asschea113eaa2021-07-21 20:34:37 -07007080
7081 ufshcd_schedule_eh(hba);
7082
Bart Van Assche64180742021-07-21 20:34:35 -07007083 goto release;
Can Guo7a7e66c2020-12-02 04:04:02 -08007084 }
7085
Gilad Bronere0b299e2017-02-03 16:56:40 -08007086 /* Skip task abort in case previous aborts failed and report failure */
Bart Van Assche64180742021-07-21 20:34:35 -07007087 if (lrbp->req_abort_skip) {
7088 dev_err(hba->dev, "%s: skipping abort\n", __func__);
7089 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
7090 goto release;
7091 }
Gilad Bronere0b299e2017-02-03 16:56:40 -08007092
Bart Van Assche64180742021-07-21 20:34:35 -07007093 err = ufshcd_try_to_abort_task(hba, tag);
7094 if (err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307095 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Gilad Bronere0b299e2017-02-03 16:56:40 -08007096 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307097 err = FAILED;
Bart Van Assche64180742021-07-21 20:34:35 -07007098 goto release;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05307099 }
7100
Bart Van Assche64180742021-07-21 20:34:35 -07007101 err = SUCCESS;
7102
7103release:
7104 /* Matches the ufshcd_hold() call at the start of this function. */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007105 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307106 return err;
7107}
7108
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307109/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307110 * ufshcd_host_reset_and_restore - reset and restore host controller
7111 * @hba: per-adapter instance
7112 *
7113 * Note that host controller reset may issue DME_RESET to
7114 * local and remote (device) Uni-Pro stack and the attributes
7115 * are reset to default state.
7116 *
7117 * Returns zero on success, non-zero on failure
7118 */
7119static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
7120{
7121 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307122
Can Guo2df74b62019-11-25 22:53:33 -08007123 /*
7124 * Stop the host controller and complete the requests
7125 * cleared by h/w
7126 */
Daejun Parkf02bc972021-07-12 17:58:30 +09007127 ufshpb_reset_host(hba);
Bart Van Assche5cac1092020-05-07 15:27:50 -07007128 ufshcd_hba_stop(hba);
Can Guo2df74b62019-11-25 22:53:33 -08007129 hba->silence_err_logs = true;
Bart Van Assche73dc3c42021-07-21 20:34:38 -07007130 ufshcd_retry_aborted_requests(hba);
Can Guo2df74b62019-11-25 22:53:33 -08007131 hba->silence_err_logs = false;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307132
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08007133 /* scale up clocks to max frequency before full reinitialization */
Subhash Jadavani394b9492020-03-26 02:25:40 -07007134 ufshcd_set_clk_freq(hba, true);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08007135
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307136 err = ufshcd_hba_enable(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307137
7138 /* Establish the link again and restore the device */
Randall Huang19186512020-11-30 20:14:02 -08007139 if (!err)
Jaegeuk Kim4ee7ee52021-01-07 10:53:15 -08007140 err = ufshcd_probe_hba(hba, false);
7141
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307142 if (err)
7143 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
Stanley Chue965e5e2020-12-05 19:58:59 +08007144 ufshcd_update_evt_hist(hba, UFS_EVT_HOST_RESET, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307145 return err;
7146}
7147
7148/**
7149 * ufshcd_reset_and_restore - reset and re-initialize host/device
7150 * @hba: per-adapter instance
7151 *
7152 * Reset and recover device, host and re-establish link. This
7153 * is helpful to recover the communication in fatal error conditions.
7154 *
7155 * Returns zero on success, non-zero on failure
7156 */
7157static int ufshcd_reset_and_restore(struct ufs_hba *hba)
7158{
Can Guo4db7a232020-08-09 05:15:51 -07007159 u32 saved_err;
7160 u32 saved_uic_err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307161 int err = 0;
Can Guo4db7a232020-08-09 05:15:51 -07007162 unsigned long flags;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007163 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307164
Can Guo4db7a232020-08-09 05:15:51 -07007165 /*
7166 * This is a fresh start, cache and clear saved error first,
7167 * in case new error generated during reset and restore.
7168 */
7169 spin_lock_irqsave(hba->host->host_lock, flags);
7170 saved_err = hba->saved_err;
7171 saved_uic_err = hba->saved_uic_err;
7172 hba->saved_err = 0;
7173 hba->saved_uic_err = 0;
7174 spin_unlock_irqrestore(hba->host->host_lock, flags);
7175
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007176 do {
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07007177 /* Reset the attached device */
Stanley Chu31a5d9c2020-12-08 21:56:35 +08007178 ufshcd_device_reset(hba);
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07007179
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007180 err = ufshcd_host_reset_and_restore(hba);
7181 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307182
Can Guo4db7a232020-08-09 05:15:51 -07007183 spin_lock_irqsave(hba->host->host_lock, flags);
7184 /*
7185 * Inform scsi mid-layer that we did reset and allow to handle
7186 * Unit Attention properly.
7187 */
7188 scsi_report_bus_reset(hba->host, 0);
7189 if (err) {
Can Guo88a92d62020-12-02 04:04:01 -08007190 hba->ufshcd_state = UFSHCD_STATE_ERROR;
Can Guo4db7a232020-08-09 05:15:51 -07007191 hba->saved_err |= saved_err;
7192 hba->saved_uic_err |= saved_uic_err;
7193 }
7194 spin_unlock_irqrestore(hba->host->host_lock, flags);
7195
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307196 return err;
7197}
7198
7199/**
7200 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
Bart Van Assche8aa29f12018-03-01 15:07:20 -08007201 * @cmd: SCSI command pointer
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307202 *
7203 * Returns SUCCESS/FAILED
7204 */
7205static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
7206{
Can Guo4db7a232020-08-09 05:15:51 -07007207 int err = SUCCESS;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307208 unsigned long flags;
7209 struct ufs_hba *hba;
7210
7211 hba = shost_priv(cmd->device->host);
7212
Can Guo4db7a232020-08-09 05:15:51 -07007213 spin_lock_irqsave(hba->host->host_lock, flags);
7214 hba->force_reset = true;
Can Guo4db7a232020-08-09 05:15:51 -07007215 dev_err(hba->dev, "%s: reset in progress - 1\n", __func__);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307216 spin_unlock_irqrestore(hba->host->host_lock, flags);
7217
Bart Van Asschea113eaa2021-07-21 20:34:37 -07007218 ufshcd_err_handler(hba->host);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307219
7220 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guo4db7a232020-08-09 05:15:51 -07007221 if (hba->ufshcd_state == UFSHCD_STATE_ERROR)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307222 err = FAILED;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307223 spin_unlock_irqrestore(hba->host->host_lock, flags);
7224
7225 return err;
7226}
7227
7228/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007229 * ufshcd_get_max_icc_level - calculate the ICC level
7230 * @sup_curr_uA: max. current supported by the regulator
7231 * @start_scan: row at the desc table to start scan from
7232 * @buff: power descriptor buffer
7233 *
7234 * Returns calculated max ICC level for specific regulator
7235 */
7236static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
7237{
7238 int i;
7239 int curr_uA;
7240 u16 data;
7241 u16 unit;
7242
7243 for (i = start_scan; i >= 0; i--) {
Tomas Winklerd79713f2017-01-05 10:45:11 +02007244 data = be16_to_cpup((__be16 *)&buff[2 * i]);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007245 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
7246 ATTR_ICC_LVL_UNIT_OFFSET;
7247 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
7248 switch (unit) {
7249 case UFSHCD_NANO_AMP:
7250 curr_uA = curr_uA / 1000;
7251 break;
7252 case UFSHCD_MILI_AMP:
7253 curr_uA = curr_uA * 1000;
7254 break;
7255 case UFSHCD_AMP:
7256 curr_uA = curr_uA * 1000 * 1000;
7257 break;
7258 case UFSHCD_MICRO_AMP:
7259 default:
7260 break;
7261 }
7262 if (sup_curr_uA >= curr_uA)
7263 break;
7264 }
7265 if (i < 0) {
7266 i = 0;
7267 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
7268 }
7269
7270 return (u32)i;
7271}
7272
7273/**
Lee Jones11eea9b2021-03-12 09:47:10 +00007274 * ufshcd_find_max_sup_active_icc_level - calculate the max ICC level
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007275 * In case regulators are not initialized we'll return 0
7276 * @hba: per-adapter instance
7277 * @desc_buf: power descriptor buffer to extract ICC levels from.
7278 * @len: length of desc_buff
7279 *
7280 * Returns calculated ICC level
7281 */
7282static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
7283 u8 *desc_buf, int len)
7284{
7285 u32 icc_level = 0;
7286
7287 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
7288 !hba->vreg_info.vccq2) {
7289 dev_err(hba->dev,
7290 "%s: Regulator capability was not set, actvIccLevel=%d",
7291 __func__, icc_level);
7292 goto out;
7293 }
7294
Yue Hu08730452021-03-19 15:09:16 +08007295 if (hba->vreg_info.vcc->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007296 icc_level = ufshcd_get_max_icc_level(
7297 hba->vreg_info.vcc->max_uA,
7298 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
7299 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
7300
Yue Hu08730452021-03-19 15:09:16 +08007301 if (hba->vreg_info.vccq->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007302 icc_level = ufshcd_get_max_icc_level(
7303 hba->vreg_info.vccq->max_uA,
7304 icc_level,
7305 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
7306
Yue Hu08730452021-03-19 15:09:16 +08007307 if (hba->vreg_info.vccq2->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007308 icc_level = ufshcd_get_max_icc_level(
7309 hba->vreg_info.vccq2->max_uA,
7310 icc_level,
7311 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
7312out:
7313 return icc_level;
7314}
7315
Can Guoe89860f2020-03-26 02:25:41 -07007316static void ufshcd_set_active_icc_lvl(struct ufs_hba *hba)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007317{
7318 int ret;
Bean Huo7a0bf852020-06-03 11:19:58 +02007319 int buff_len = hba->desc_size[QUERY_DESC_IDN_POWER];
Kees Cookbbe21d72018-05-02 16:58:09 -07007320 u8 *desc_buf;
Can Guoe89860f2020-03-26 02:25:41 -07007321 u32 icc_level;
Kees Cookbbe21d72018-05-02 16:58:09 -07007322
7323 desc_buf = kmalloc(buff_len, GFP_KERNEL);
7324 if (!desc_buf)
7325 return;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007326
Bean Huoc4607a02020-06-03 11:19:56 +02007327 ret = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_POWER, 0, 0,
7328 desc_buf, buff_len);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007329 if (ret) {
7330 dev_err(hba->dev,
7331 "%s: Failed reading power descriptor.len = %d ret = %d",
7332 __func__, buff_len, ret);
Kees Cookbbe21d72018-05-02 16:58:09 -07007333 goto out;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007334 }
7335
Can Guoe89860f2020-03-26 02:25:41 -07007336 icc_level = ufshcd_find_max_sup_active_icc_level(hba, desc_buf,
7337 buff_len);
7338 dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007339
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02007340 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Can Guoe89860f2020-03-26 02:25:41 -07007341 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, &icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007342
7343 if (ret)
7344 dev_err(hba->dev,
7345 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
Can Guoe89860f2020-03-26 02:25:41 -07007346 __func__, icc_level, ret);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007347
Kees Cookbbe21d72018-05-02 16:58:09 -07007348out:
7349 kfree(desc_buf);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007350}
7351
Can Guofb276f72020-03-25 18:09:59 -07007352static inline void ufshcd_blk_pm_runtime_init(struct scsi_device *sdev)
7353{
7354 scsi_autopm_get_device(sdev);
7355 blk_pm_runtime_init(sdev->request_queue, &sdev->sdev_gendev);
7356 if (sdev->rpm_autosuspend)
7357 pm_runtime_set_autosuspend_delay(&sdev->sdev_gendev,
7358 RPM_AUTOSUSPEND_DELAY_MS);
7359 scsi_autopm_put_device(sdev);
7360}
7361
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007362/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007363 * ufshcd_scsi_add_wlus - Adds required W-LUs
7364 * @hba: per-adapter instance
7365 *
7366 * UFS device specification requires the UFS devices to support 4 well known
7367 * logical units:
7368 * "REPORT_LUNS" (address: 01h)
7369 * "UFS Device" (address: 50h)
7370 * "RPMB" (address: 44h)
7371 * "BOOT" (address: 30h)
7372 * UFS device's power management needs to be controlled by "POWER CONDITION"
7373 * field of SSU (START STOP UNIT) command. But this "power condition" field
7374 * will take effect only when its sent to "UFS device" well known logical unit
7375 * hence we require the scsi_device instance to represent this logical unit in
7376 * order for the UFS host driver to send the SSU command for power management.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08007377 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007378 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
7379 * Block) LU so user space process can control this LU. User space may also
7380 * want to have access to BOOT LU.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08007381 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007382 * This function adds scsi device instances for each of all well known LUs
7383 * (except "REPORT LUNS" LU).
7384 *
7385 * Returns zero on success (all required W-LUs are added successfully),
7386 * non-zero error value on failure (if failed to add any of the required W-LU).
7387 */
7388static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
7389{
7390 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007391 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007392
7393 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
7394 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
7395 if (IS_ERR(hba->sdev_ufs_device)) {
7396 ret = PTR_ERR(hba->sdev_ufs_device);
7397 hba->sdev_ufs_device = NULL;
7398 goto out;
7399 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007400 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007401
Jaegeuk Kim4f3e9002020-11-17 08:58:35 -08007402 hba->sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007403 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Jaegeuk Kim4f3e9002020-11-17 08:58:35 -08007404 if (IS_ERR(hba->sdev_rpmb)) {
7405 ret = PTR_ERR(hba->sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08007406 goto remove_sdev_ufs_device;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007407 }
Jaegeuk Kim4f3e9002020-11-17 08:58:35 -08007408 ufshcd_blk_pm_runtime_init(hba->sdev_rpmb);
7409 scsi_device_put(hba->sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08007410
7411 sdev_boot = __scsi_add_device(hba->host, 0, 0,
7412 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
Can Guofb276f72020-03-25 18:09:59 -07007413 if (IS_ERR(sdev_boot)) {
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08007414 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
Can Guofb276f72020-03-25 18:09:59 -07007415 } else {
7416 ufshcd_blk_pm_runtime_init(sdev_boot);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08007417 scsi_device_put(sdev_boot);
Can Guofb276f72020-03-25 18:09:59 -07007418 }
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007419 goto out;
7420
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007421remove_sdev_ufs_device:
7422 scsi_remove_device(hba->sdev_ufs_device);
7423out:
7424 return ret;
7425}
7426
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007427static void ufshcd_wb_probe(struct ufs_hba *hba, u8 *desc_buf)
7428{
Stanley Chua7f1e692020-06-25 11:04:30 +08007429 struct ufs_dev_info *dev_info = &hba->dev_info;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08007430 u8 lun;
7431 u32 d_lu_wb_buf_alloc;
Bean Huoe8d03812021-01-19 17:38:45 +01007432 u32 ext_ufs_feature;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08007433
Stanley Chu817d7e12020-05-08 16:01:08 +08007434 if (!ufshcd_is_wb_allowed(hba))
7435 return;
Stanley Chua7f1e692020-06-25 11:04:30 +08007436 /*
7437 * Probe WB only for UFS-2.2 and UFS-3.1 (and later) devices or
7438 * UFS devices with quirk UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES
7439 * enabled
7440 */
7441 if (!(dev_info->wspecversion >= 0x310 ||
7442 dev_info->wspecversion == 0x220 ||
7443 (hba->dev_quirks & UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES)))
7444 goto wb_disabled;
Stanley Chu817d7e12020-05-08 16:01:08 +08007445
Bean Huo7a0bf852020-06-03 11:19:58 +02007446 if (hba->desc_size[QUERY_DESC_IDN_DEVICE] <
7447 DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP + 4)
Stanley Chu817d7e12020-05-08 16:01:08 +08007448 goto wb_disabled;
7449
Bean Huoe8d03812021-01-19 17:38:45 +01007450 ext_ufs_feature = get_unaligned_be32(desc_buf +
7451 DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
Stanley Chu817d7e12020-05-08 16:01:08 +08007452
Bean Huoe8d03812021-01-19 17:38:45 +01007453 if (!(ext_ufs_feature & UFS_DEV_WRITE_BOOSTER_SUP))
Stanley Chu817d7e12020-05-08 16:01:08 +08007454 goto wb_disabled;
7455
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007456 /*
Bean Huoae1ce1f2021-01-19 17:38:44 +01007457 * WB may be supported but not configured while provisioning. The spec
7458 * says, in dedicated wb buffer mode, a max of 1 lun would have wb
7459 * buffer configured.
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007460 */
Bean Huo4cd48992021-01-19 17:38:46 +01007461 dev_info->wb_buffer_type = desc_buf[DEVICE_DESC_PARAM_WB_TYPE];
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007462
Stanley Chua7f1e692020-06-25 11:04:30 +08007463 dev_info->b_presrv_uspc_en =
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007464 desc_buf[DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN];
7465
Bean Huo4cd48992021-01-19 17:38:46 +01007466 if (dev_info->wb_buffer_type == WB_BUF_MODE_SHARED) {
Bean Huoe8d03812021-01-19 17:38:45 +01007467 if (!get_unaligned_be32(desc_buf +
7468 DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS))
Stanley Chu6f8d5a62020-05-08 16:01:13 +08007469 goto wb_disabled;
7470 } else {
7471 for (lun = 0; lun < UFS_UPIU_MAX_WB_LUN_ID; lun++) {
7472 d_lu_wb_buf_alloc = 0;
7473 ufshcd_read_unit_desc_param(hba,
7474 lun,
7475 UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS,
7476 (u8 *)&d_lu_wb_buf_alloc,
7477 sizeof(d_lu_wb_buf_alloc));
7478 if (d_lu_wb_buf_alloc) {
Stanley Chua7f1e692020-06-25 11:04:30 +08007479 dev_info->wb_dedicated_lu = lun;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08007480 break;
7481 }
7482 }
Stanley Chu817d7e12020-05-08 16:01:08 +08007483
Stanley Chu6f8d5a62020-05-08 16:01:13 +08007484 if (!d_lu_wb_buf_alloc)
7485 goto wb_disabled;
7486 }
Stanley Chu817d7e12020-05-08 16:01:08 +08007487 return;
7488
7489wb_disabled:
7490 hba->caps &= ~UFSHCD_CAP_WB_EN;
7491}
7492
Avri Altmane88e2d32021-09-15 09:04:06 +03007493static void ufshcd_temp_notif_probe(struct ufs_hba *hba, u8 *desc_buf)
7494{
7495 struct ufs_dev_info *dev_info = &hba->dev_info;
7496 u32 ext_ufs_feature;
7497 u8 mask = 0;
7498
7499 if (!(hba->caps & UFSHCD_CAP_TEMP_NOTIF) || dev_info->wspecversion < 0x300)
7500 return;
7501
7502 ext_ufs_feature = get_unaligned_be32(desc_buf + DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
7503
7504 if (ext_ufs_feature & UFS_DEV_LOW_TEMP_NOTIF)
7505 mask |= MASK_EE_TOO_LOW_TEMP;
7506
7507 if (ext_ufs_feature & UFS_DEV_HIGH_TEMP_NOTIF)
7508 mask |= MASK_EE_TOO_HIGH_TEMP;
7509
7510 if (mask) {
7511 ufshcd_enable_ee(hba, mask);
7512 ufs_hwmon_probe(hba, mask);
7513 }
7514}
7515
Stanley Chu8db269a2020-05-08 16:01:10 +08007516void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups)
Stanley Chu817d7e12020-05-08 16:01:08 +08007517{
7518 struct ufs_dev_fix *f;
7519 struct ufs_dev_info *dev_info = &hba->dev_info;
7520
Stanley Chu8db269a2020-05-08 16:01:10 +08007521 if (!fixups)
7522 return;
7523
7524 for (f = fixups; f->quirk; f++) {
Stanley Chu817d7e12020-05-08 16:01:08 +08007525 if ((f->wmanufacturerid == dev_info->wmanufacturerid ||
7526 f->wmanufacturerid == UFS_ANY_VENDOR) &&
7527 ((dev_info->model &&
7528 STR_PRFX_EQUAL(f->model, dev_info->model)) ||
7529 !strcmp(f->model, UFS_ANY_MODEL)))
7530 hba->dev_quirks |= f->quirk;
7531 }
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007532}
Stanley Chu8db269a2020-05-08 16:01:10 +08007533EXPORT_SYMBOL_GPL(ufshcd_fixup_dev_quirks);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007534
Stanley Chuc28c00b2020-05-08 16:01:09 +08007535static void ufs_fixup_device_setup(struct ufs_hba *hba)
7536{
7537 /* fix by general quirk table */
Stanley Chu8db269a2020-05-08 16:01:10 +08007538 ufshcd_fixup_dev_quirks(hba, ufs_fixups);
Stanley Chuc28c00b2020-05-08 16:01:09 +08007539
7540 /* allow vendors to fix quirks */
7541 ufshcd_vops_fixup_dev_quirks(hba);
7542}
7543
Bean Huo09750062020-01-20 14:08:14 +01007544static int ufs_get_device_desc(struct ufs_hba *hba)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007545{
7546 int err;
7547 u8 model_index;
Daejun Parkf02bc972021-07-12 17:58:30 +09007548 u8 b_ufs_feature_sup;
Kees Cookbbe21d72018-05-02 16:58:09 -07007549 u8 *desc_buf;
Bean Huo09750062020-01-20 14:08:14 +01007550 struct ufs_dev_info *dev_info = &hba->dev_info;
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007551
Bean Huo458a45f2020-06-03 11:19:55 +02007552 desc_buf = kmalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
Kees Cookbbe21d72018-05-02 16:58:09 -07007553 if (!desc_buf) {
7554 err = -ENOMEM;
7555 goto out;
7556 }
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007557
Bean Huoc4607a02020-06-03 11:19:56 +02007558 err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_DEVICE, 0, 0, desc_buf,
Bean Huo7a0bf852020-06-03 11:19:58 +02007559 hba->desc_size[QUERY_DESC_IDN_DEVICE]);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007560 if (err) {
7561 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
7562 __func__, err);
7563 goto out;
7564 }
7565
7566 /*
7567 * getting vendor (manufacturerID) and Bank Index in big endian
7568 * format
7569 */
Bean Huo09750062020-01-20 14:08:14 +01007570 dev_info->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007571 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
7572
Can Guo09f17792020-02-10 19:40:49 -08007573 /* getting Specification Version in big endian format */
7574 dev_info->wspecversion = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
7575 desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];
Daejun Parkf02bc972021-07-12 17:58:30 +09007576 b_ufs_feature_sup = desc_buf[DEVICE_DESC_PARAM_UFS_FEAT];
Can Guo09f17792020-02-10 19:40:49 -08007577
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007578 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007579
Daejun Parkf02bc972021-07-12 17:58:30 +09007580 if (dev_info->wspecversion >= UFS_DEV_HPB_SUPPORT_VERSION &&
7581 (b_ufs_feature_sup & UFS_DEV_HPB_SUPPORT)) {
Daejun Park41d8a932021-07-12 18:00:25 +09007582 bool hpb_en = false;
7583
Daejun Parkf02bc972021-07-12 17:58:30 +09007584 ufshpb_get_dev_info(hba, desc_buf);
Daejun Park41d8a932021-07-12 18:00:25 +09007585
7586 if (!ufshpb_is_legacy(hba))
7587 err = ufshcd_query_flag_retry(hba,
7588 UPIU_QUERY_OPCODE_READ_FLAG,
7589 QUERY_FLAG_IDN_HPB_EN, 0,
7590 &hpb_en);
7591
7592 if (ufshpb_is_legacy(hba) || (!err && hpb_en))
7593 dev_info->hpb_enabled = true;
Daejun Parkf02bc972021-07-12 17:58:30 +09007594 }
7595
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007596 err = ufshcd_read_string_desc(hba, model_index,
Bean Huo09750062020-01-20 14:08:14 +01007597 &dev_info->model, SD_ASCII_STD);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007598 if (err < 0) {
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007599 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
7600 __func__, err);
7601 goto out;
7602 }
7603
Asutosh Dasb294ff32021-04-23 17:20:16 -07007604 hba->luns_avail = desc_buf[DEVICE_DESC_PARAM_NUM_LU] +
7605 desc_buf[DEVICE_DESC_PARAM_NUM_WLU];
7606
Stanley Chu817d7e12020-05-08 16:01:08 +08007607 ufs_fixup_device_setup(hba);
7608
Stanley Chua7f1e692020-06-25 11:04:30 +08007609 ufshcd_wb_probe(hba, desc_buf);
Stanley Chu817d7e12020-05-08 16:01:08 +08007610
Avri Altmane88e2d32021-09-15 09:04:06 +03007611 ufshcd_temp_notif_probe(hba, desc_buf);
7612
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007613 /*
7614 * ufshcd_read_string_desc returns size of the string
7615 * reset the error value
7616 */
7617 err = 0;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007618
7619out:
Kees Cookbbe21d72018-05-02 16:58:09 -07007620 kfree(desc_buf);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02007621 return err;
7622}
7623
Bean Huo09750062020-01-20 14:08:14 +01007624static void ufs_put_device_desc(struct ufs_hba *hba)
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007625{
Bean Huo09750062020-01-20 14:08:14 +01007626 struct ufs_dev_info *dev_info = &hba->dev_info;
7627
7628 kfree(dev_info->model);
7629 dev_info->model = NULL;
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007630}
7631
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03007632/**
Yaniv Gardi37113102016-03-10 17:37:16 +02007633 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
7634 * @hba: per-adapter instance
7635 *
7636 * PA_TActivate parameter can be tuned manually if UniPro version is less than
7637 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
7638 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
7639 * the hibern8 exit latency.
7640 *
7641 * Returns zero on success, non-zero error value on failure.
7642 */
7643static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
7644{
7645 int ret = 0;
7646 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
7647
7648 ret = ufshcd_dme_peer_get(hba,
7649 UIC_ARG_MIB_SEL(
7650 RX_MIN_ACTIVATETIME_CAPABILITY,
7651 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7652 &peer_rx_min_activatetime);
7653 if (ret)
7654 goto out;
7655
7656 /* make sure proper unit conversion is applied */
7657 tuned_pa_tactivate =
7658 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
7659 / PA_TACTIVATE_TIME_UNIT_US);
7660 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7661 tuned_pa_tactivate);
7662
7663out:
7664 return ret;
7665}
7666
7667/**
7668 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
7669 * @hba: per-adapter instance
7670 *
7671 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
7672 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
7673 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
7674 * This optimal value can help reduce the hibern8 exit latency.
7675 *
7676 * Returns zero on success, non-zero error value on failure.
7677 */
7678static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
7679{
7680 int ret = 0;
7681 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
7682 u32 max_hibern8_time, tuned_pa_hibern8time;
7683
7684 ret = ufshcd_dme_get(hba,
7685 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
7686 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
7687 &local_tx_hibern8_time_cap);
7688 if (ret)
7689 goto out;
7690
7691 ret = ufshcd_dme_peer_get(hba,
7692 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
7693 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7694 &peer_rx_hibern8_time_cap);
7695 if (ret)
7696 goto out;
7697
7698 max_hibern8_time = max(local_tx_hibern8_time_cap,
7699 peer_rx_hibern8_time_cap);
7700 /* make sure proper unit conversion is applied */
7701 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
7702 / PA_HIBERN8_TIME_UNIT_US);
7703 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
7704 tuned_pa_hibern8time);
7705out:
7706 return ret;
7707}
7708
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08007709/**
7710 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
7711 * less than device PA_TACTIVATE time.
7712 * @hba: per-adapter instance
7713 *
7714 * Some UFS devices require host PA_TACTIVATE to be lower than device
7715 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
7716 * for such devices.
7717 *
7718 * Returns zero on success, non-zero error value on failure.
7719 */
7720static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
7721{
7722 int ret = 0;
7723 u32 granularity, peer_granularity;
7724 u32 pa_tactivate, peer_pa_tactivate;
7725 u32 pa_tactivate_us, peer_pa_tactivate_us;
7726 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
7727
7728 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7729 &granularity);
7730 if (ret)
7731 goto out;
7732
7733 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7734 &peer_granularity);
7735 if (ret)
7736 goto out;
7737
7738 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
7739 (granularity > PA_GRANULARITY_MAX_VAL)) {
7740 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
7741 __func__, granularity);
7742 return -EINVAL;
7743 }
7744
7745 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
7746 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
7747 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
7748 __func__, peer_granularity);
7749 return -EINVAL;
7750 }
7751
7752 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
7753 if (ret)
7754 goto out;
7755
7756 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
7757 &peer_pa_tactivate);
7758 if (ret)
7759 goto out;
7760
7761 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
7762 peer_pa_tactivate_us = peer_pa_tactivate *
7763 gran_to_us_table[peer_granularity - 1];
7764
7765 if (pa_tactivate_us > peer_pa_tactivate_us) {
7766 u32 new_peer_pa_tactivate;
7767
7768 new_peer_pa_tactivate = pa_tactivate_us /
7769 gran_to_us_table[peer_granularity - 1];
7770 new_peer_pa_tactivate++;
7771 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7772 new_peer_pa_tactivate);
7773 }
7774
7775out:
7776 return ret;
7777}
7778
Bean Huo09750062020-01-20 14:08:14 +01007779static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
Yaniv Gardi37113102016-03-10 17:37:16 +02007780{
7781 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
7782 ufshcd_tune_pa_tactivate(hba);
7783 ufshcd_tune_pa_hibern8time(hba);
7784 }
7785
Can Guoe91ed9e2020-02-23 20:09:21 -08007786 ufshcd_vops_apply_dev_quirks(hba);
7787
Yaniv Gardi37113102016-03-10 17:37:16 +02007788 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
7789 /* set 1ms timeout for PA_TACTIVATE */
7790 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08007791
7792 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
7793 ufshcd_quirk_tune_host_pa_tactivate(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02007794}
7795
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007796static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
7797{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007798 hba->ufs_stats.hibern8_exit_cnt = 0;
7799 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08007800 hba->req_abort_count = 0;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007801}
7802
Bean Huo731f0622020-01-20 14:08:19 +01007803static int ufshcd_device_geo_params_init(struct ufs_hba *hba)
7804{
7805 int err;
7806 size_t buff_len;
7807 u8 *desc_buf;
7808
Bean Huo7a0bf852020-06-03 11:19:58 +02007809 buff_len = hba->desc_size[QUERY_DESC_IDN_GEOMETRY];
Bean Huo731f0622020-01-20 14:08:19 +01007810 desc_buf = kmalloc(buff_len, GFP_KERNEL);
7811 if (!desc_buf) {
7812 err = -ENOMEM;
7813 goto out;
7814 }
7815
Bean Huoc4607a02020-06-03 11:19:56 +02007816 err = ufshcd_read_desc_param(hba, QUERY_DESC_IDN_GEOMETRY, 0, 0,
7817 desc_buf, buff_len);
Bean Huo731f0622020-01-20 14:08:19 +01007818 if (err) {
7819 dev_err(hba->dev, "%s: Failed reading Geometry Desc. err = %d\n",
7820 __func__, err);
7821 goto out;
7822 }
7823
7824 if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 1)
7825 hba->dev_info.max_lu_supported = 32;
7826 else if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 0)
7827 hba->dev_info.max_lu_supported = 8;
7828
Daejun Parkf02bc972021-07-12 17:58:30 +09007829 if (hba->desc_size[QUERY_DESC_IDN_GEOMETRY] >=
7830 GEOMETRY_DESC_PARAM_HPB_MAX_ACTIVE_REGS)
7831 ufshpb_get_geo_info(hba, desc_buf);
7832
Bean Huo731f0622020-01-20 14:08:19 +01007833out:
7834 kfree(desc_buf);
7835 return err;
7836}
7837
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307838static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
7839 {19200000, REF_CLK_FREQ_19_2_MHZ},
7840 {26000000, REF_CLK_FREQ_26_MHZ},
7841 {38400000, REF_CLK_FREQ_38_4_MHZ},
7842 {52000000, REF_CLK_FREQ_52_MHZ},
7843 {0, REF_CLK_FREQ_INVAL},
7844};
7845
7846static enum ufs_ref_clk_freq
7847ufs_get_bref_clk_from_hz(unsigned long freq)
7848{
7849 int i;
7850
7851 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
7852 if (ufs_ref_clk_freqs[i].freq_hz == freq)
7853 return ufs_ref_clk_freqs[i].val;
7854
7855 return REF_CLK_FREQ_INVAL;
7856}
7857
7858void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
7859{
7860 unsigned long freq;
7861
7862 freq = clk_get_rate(refclk);
7863
7864 hba->dev_ref_clk_freq =
7865 ufs_get_bref_clk_from_hz(freq);
7866
7867 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
7868 dev_err(hba->dev,
7869 "invalid ref_clk setting = %ld\n", freq);
7870}
7871
7872static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
7873{
7874 int err;
7875 u32 ref_clk;
7876 u32 freq = hba->dev_ref_clk_freq;
7877
7878 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
7879 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
7880
7881 if (err) {
7882 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
7883 err);
7884 goto out;
7885 }
7886
7887 if (ref_clk == freq)
7888 goto out; /* nothing to update */
7889
7890 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
7891 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
7892
7893 if (err) {
7894 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
7895 ufs_ref_clk_freqs[freq].freq_hz);
7896 goto out;
7897 }
7898
7899 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
7900 ufs_ref_clk_freqs[freq].freq_hz);
7901
7902out:
7903 return err;
7904}
7905
Bean Huo1b9e2142020-01-20 14:08:15 +01007906static int ufshcd_device_params_init(struct ufs_hba *hba)
7907{
7908 bool flag;
Bean Huo7a0bf852020-06-03 11:19:58 +02007909 int ret, i;
Bean Huo1b9e2142020-01-20 14:08:15 +01007910
Bean Huo7a0bf852020-06-03 11:19:58 +02007911 /* Init device descriptor sizes */
7912 for (i = 0; i < QUERY_DESC_IDN_MAX; i++)
7913 hba->desc_size[i] = QUERY_DESC_MAX_SIZE;
Bean Huo1b9e2142020-01-20 14:08:15 +01007914
Bean Huo731f0622020-01-20 14:08:19 +01007915 /* Init UFS geometry descriptor related parameters */
7916 ret = ufshcd_device_geo_params_init(hba);
7917 if (ret)
7918 goto out;
7919
Bean Huo1b9e2142020-01-20 14:08:15 +01007920 /* Check and apply UFS device quirks */
7921 ret = ufs_get_device_desc(hba);
7922 if (ret) {
7923 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
7924 __func__, ret);
7925 goto out;
7926 }
7927
Can Guo09f17792020-02-10 19:40:49 -08007928 ufshcd_get_ref_clk_gating_wait(hba);
7929
Bean Huo1b9e2142020-01-20 14:08:15 +01007930 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08007931 QUERY_FLAG_IDN_PWR_ON_WPE, 0, &flag))
Bean Huo1b9e2142020-01-20 14:08:15 +01007932 hba->dev_info.f_power_on_wp_en = flag;
7933
Bean Huo2b35b2a2020-01-20 14:08:16 +01007934 /* Probe maximum power mode co-supported by both UFS host and device */
7935 if (ufshcd_get_max_pwr_mode(hba))
7936 dev_err(hba->dev,
7937 "%s: Failed getting max supported power mode\n",
7938 __func__);
Bean Huo1b9e2142020-01-20 14:08:15 +01007939out:
7940 return ret;
7941}
7942
7943/**
7944 * ufshcd_add_lus - probe and add UFS logical units
7945 * @hba: per-adapter instance
7946 */
7947static int ufshcd_add_lus(struct ufs_hba *hba)
7948{
7949 int ret;
7950
Bean Huo1b9e2142020-01-20 14:08:15 +01007951 /* Add required well known logical units to scsi mid layer */
7952 ret = ufshcd_scsi_add_wlus(hba);
7953 if (ret)
7954 goto out;
7955
Jaegeuk Kim4ee7ee52021-01-07 10:53:15 -08007956 ufshcd_clear_ua_wluns(hba);
7957
Bean Huo1b9e2142020-01-20 14:08:15 +01007958 /* Initialize devfreq after UFS device is detected */
7959 if (ufshcd_is_clkscaling_supported(hba)) {
7960 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7961 &hba->pwr_info,
7962 sizeof(struct ufs_pa_layer_attr));
7963 hba->clk_scaling.saved_pwr_info.is_valid = true;
Bean Huo1b9e2142020-01-20 14:08:15 +01007964 hba->clk_scaling.is_allowed = true;
Bean Huo1b9e2142020-01-20 14:08:15 +01007965
Stanley Chub058fa82021-01-20 23:01:41 +08007966 ret = ufshcd_devfreq_init(hba);
7967 if (ret)
7968 goto out;
7969
7970 hba->clk_scaling.is_enabled = true;
7971 ufshcd_init_clk_scaling_sysfs(hba);
Bean Huo1b9e2142020-01-20 14:08:15 +01007972 }
7973
7974 ufs_bsg_probe(hba);
Daejun Parkf02bc972021-07-12 17:58:30 +09007975 ufshpb_init(hba);
Bean Huo1b9e2142020-01-20 14:08:15 +01007976 scsi_scan_host(hba->host);
7977 pm_runtime_put_sync(hba->dev);
7978
Bean Huo1b9e2142020-01-20 14:08:15 +01007979out:
7980 return ret;
7981}
7982
Bart Van Asscheac1bc2b2021-07-21 20:34:36 -07007983static void ufshcd_request_sense_done(struct request *rq, blk_status_t error)
7984{
7985 if (error != BLK_STS_OK)
Adrian Hunter9b5ac8a2021-08-24 14:41:50 +03007986 pr_err("%s: REQUEST SENSE failed (%d)\n", __func__, error);
7987 kfree(rq->end_io_data);
Bart Van Asscheac1bc2b2021-07-21 20:34:36 -07007988 blk_put_request(rq);
7989}
7990
Jaegeuk Kim4f3e9002020-11-17 08:58:35 -08007991static int
Bart Van Asscheac1bc2b2021-07-21 20:34:36 -07007992ufshcd_request_sense_async(struct ufs_hba *hba, struct scsi_device *sdev)
7993{
7994 /*
Adrian Hunter9b5ac8a2021-08-24 14:41:50 +03007995 * Some UFS devices clear unit attention condition only if the sense
7996 * size used (UFS_SENSE_SIZE in this case) is non-zero.
Bart Van Asscheac1bc2b2021-07-21 20:34:36 -07007997 */
Adrian Hunter9b5ac8a2021-08-24 14:41:50 +03007998 static const u8 cmd[6] = {REQUEST_SENSE, 0, 0, 0, UFS_SENSE_SIZE, 0};
Bart Van Asscheac1bc2b2021-07-21 20:34:36 -07007999 struct scsi_request *rq;
8000 struct request *req;
Adrian Hunter9b5ac8a2021-08-24 14:41:50 +03008001 char *buffer;
8002 int ret;
Bart Van Asscheac1bc2b2021-07-21 20:34:36 -07008003
Adrian Hunter9b5ac8a2021-08-24 14:41:50 +03008004 buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
8005 if (!buffer)
8006 return -ENOMEM;
8007
8008 req = blk_get_request(sdev->request_queue, REQ_OP_DRV_IN,
8009 /*flags=*/BLK_MQ_REQ_PM);
8010 if (IS_ERR(req)) {
8011 ret = PTR_ERR(req);
8012 goto out_free;
8013 }
8014
8015 ret = blk_rq_map_kern(sdev->request_queue, req,
8016 buffer, UFS_SENSE_SIZE, GFP_NOIO);
8017 if (ret)
8018 goto out_put;
Bart Van Asscheac1bc2b2021-07-21 20:34:36 -07008019
8020 rq = scsi_req(req);
8021 rq->cmd_len = ARRAY_SIZE(cmd);
8022 memcpy(rq->cmd, cmd, rq->cmd_len);
8023 rq->retries = 3;
8024 req->timeout = 1 * HZ;
8025 req->rq_flags |= RQF_PM | RQF_QUIET;
Adrian Hunter9b5ac8a2021-08-24 14:41:50 +03008026 req->end_io_data = buffer;
Bart Van Asscheac1bc2b2021-07-21 20:34:36 -07008027
8028 blk_execute_rq_nowait(/*bd_disk=*/NULL, req, /*at_head=*/true,
8029 ufshcd_request_sense_done);
8030 return 0;
Adrian Hunter9b5ac8a2021-08-24 14:41:50 +03008031
8032out_put:
8033 blk_put_request(req);
8034out_free:
8035 kfree(buffer);
8036 return ret;
Bart Van Asscheac1bc2b2021-07-21 20:34:36 -07008037}
Jaegeuk Kim4f3e9002020-11-17 08:58:35 -08008038
8039static int ufshcd_clear_ua_wlun(struct ufs_hba *hba, u8 wlun)
8040{
8041 struct scsi_device *sdp;
8042 unsigned long flags;
8043 int ret = 0;
8044
8045 spin_lock_irqsave(hba->host->host_lock, flags);
8046 if (wlun == UFS_UPIU_UFS_DEVICE_WLUN)
8047 sdp = hba->sdev_ufs_device;
8048 else if (wlun == UFS_UPIU_RPMB_WLUN)
8049 sdp = hba->sdev_rpmb;
8050 else
Arnd Bergmann4c602442020-12-03 23:31:26 +01008051 BUG();
Jaegeuk Kim4f3e9002020-11-17 08:58:35 -08008052 if (sdp) {
8053 ret = scsi_device_get(sdp);
8054 if (!ret && !scsi_device_online(sdp)) {
8055 ret = -ENODEV;
8056 scsi_device_put(sdp);
8057 }
8058 } else {
8059 ret = -ENODEV;
8060 }
8061 spin_unlock_irqrestore(hba->host->host_lock, flags);
8062 if (ret)
8063 goto out_err;
8064
Bart Van Asscheac1bc2b2021-07-21 20:34:36 -07008065 ret = ufshcd_request_sense_async(hba, sdp);
Jaegeuk Kim4f3e9002020-11-17 08:58:35 -08008066 scsi_device_put(sdp);
8067out_err:
8068 if (ret)
8069 dev_err(hba->dev, "%s: UAC clear LU=%x ret = %d\n",
8070 __func__, wlun, ret);
8071 return ret;
8072}
8073
8074static int ufshcd_clear_ua_wluns(struct ufs_hba *hba)
8075{
8076 int ret = 0;
8077
8078 if (!hba->wlun_dev_clr_ua)
8079 goto out;
8080
8081 ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_UFS_DEVICE_WLUN);
8082 if (!ret)
8083 ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_RPMB_WLUN);
8084 if (!ret)
8085 hba->wlun_dev_clr_ua = false;
8086out:
8087 if (ret)
8088 dev_err(hba->dev, "%s: Failed to clear UAC WLUNS ret = %d\n",
8089 __func__, ret);
8090 return ret;
8091}
8092
Yaniv Gardi37113102016-03-10 17:37:16 +02008093/**
Bart Van Assche568dd992021-07-21 20:34:25 -07008094 * ufshcd_probe_hba - probe hba to detect device and initialize it
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008095 * @hba: per-adapter instance
Bart Van Assche568dd992021-07-21 20:34:25 -07008096 * @init_dev_params: whether or not to call ufshcd_device_params_init().
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008097 *
8098 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308099 */
Bart Van Assche568dd992021-07-21 20:34:25 -07008100static int ufshcd_probe_hba(struct ufs_hba *hba, bool init_dev_params)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308101{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308102 int ret;
Can Guo4db7a232020-08-09 05:15:51 -07008103 unsigned long flags;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008104 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308105
Can Guoaa53f582021-02-23 21:36:47 -08008106 hba->ufshcd_state = UFSHCD_STATE_RESET;
8107
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308108 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308109 if (ret)
8110 goto out;
8111
Dolev Ravivff8e20c2016-12-22 18:42:18 -08008112 /* Debug counters initialization */
8113 ufshcd_clear_dbg_ufs_stats(hba);
8114
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008115 /* UniPro link is active now */
8116 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05308117
Bean Huo1b9e2142020-01-20 14:08:15 +01008118 /* Verify device initialization by sending NOP OUT UPIU */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308119 ret = ufshcd_verify_dev_init(hba);
8120 if (ret)
8121 goto out;
8122
Bean Huo1b9e2142020-01-20 14:08:15 +01008123 /* Initiate UFS initialization, and waiting until completion */
Dolev Raviv68078d52013-07-30 00:35:58 +05308124 ret = ufshcd_complete_dev_init(hba);
8125 if (ret)
8126 goto out;
8127
Bean Huo1b9e2142020-01-20 14:08:15 +01008128 /*
8129 * Initialize UFS device parameters used by driver, these
8130 * parameters are associated with UFS descriptors.
8131 */
Bart Van Assche568dd992021-07-21 20:34:25 -07008132 if (init_dev_params) {
Bean Huo1b9e2142020-01-20 14:08:15 +01008133 ret = ufshcd_device_params_init(hba);
8134 if (ret)
8135 goto out;
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02008136 }
8137
Bean Huo09750062020-01-20 14:08:14 +01008138 ufshcd_tune_unipro_params(hba);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03008139
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008140 /* UFS device is also active now */
8141 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308142 ufshcd_force_reset_auto_bkops(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008143 hba->wlun_dev_clr_ua = true;
Asutosh Dasb294ff32021-04-23 17:20:16 -07008144 hba->wlun_rpmb_clr_ua = true;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05308145
Bean Huo2b35b2a2020-01-20 14:08:16 +01008146 /* Gear up to HS gear if supported */
8147 if (hba->max_pwr_info.is_valid) {
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05308148 /*
8149 * Set the right value to bRefClkFreq before attempting to
8150 * switch to HS gears.
8151 */
8152 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
8153 ufshcd_set_dev_ref_clk(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03008154 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Dov Levenglick8643ae62016-10-17 17:10:14 -07008155 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03008156 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
8157 __func__, ret);
Dov Levenglick8643ae62016-10-17 17:10:14 -07008158 goto out;
8159 }
Can Guo6a9df812020-02-11 21:38:28 -08008160 ufshcd_print_pwr_info(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03008161 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008162
Can Guoe89860f2020-03-26 02:25:41 -07008163 /*
8164 * bActiveICCLevel is volatile for UFS device (as per latest v2.1 spec)
8165 * and for removable UFS card as well, hence always set the parameter.
8166 * Note: Error handler may issue the device reset hence resetting
8167 * bActiveICCLevel as well so it is always safe to set this here.
8168 */
8169 ufshcd_set_active_icc_lvl(hba);
8170
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008171 ufshcd_wb_config(hba);
Adrian Huntercd469472021-02-09 08:24:36 +02008172 if (hba->ee_usr_mask)
8173 ufshcd_write_ee_control(hba);
Can Guo71d848b2019-11-14 22:09:26 -08008174 /* Enable Auto-Hibernate if configured */
8175 ufshcd_auto_hibern8_enable(hba);
8176
Daejun Parkf02bc972021-07-12 17:58:30 +09008177 ufshpb_reset(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308178out:
Can Guo4db7a232020-08-09 05:15:51 -07008179 spin_lock_irqsave(hba->host->host_lock, flags);
8180 if (ret)
8181 hba->ufshcd_state = UFSHCD_STATE_ERROR;
8182 else if (hba->ufshcd_state == UFSHCD_STATE_RESET)
8183 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
8184 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008185
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008186 trace_ufshcd_init(dev_name(hba->dev), ret,
8187 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008188 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008189 return ret;
8190}
8191
8192/**
8193 * ufshcd_async_scan - asynchronous execution for probing hba
8194 * @data: data pointer to pass to this function
8195 * @cookie: cookie data
8196 */
8197static void ufshcd_async_scan(void *data, async_cookie_t cookie)
8198{
8199 struct ufs_hba *hba = (struct ufs_hba *)data;
Bean Huo1b9e2142020-01-20 14:08:15 +01008200 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008201
Can Guo9cd20d32021-01-13 19:13:28 -08008202 down(&hba->host_sem);
Bean Huo1b9e2142020-01-20 14:08:15 +01008203 /* Initialize hba, detect and initialize UFS device */
8204 ret = ufshcd_probe_hba(hba, true);
Can Guo9cd20d32021-01-13 19:13:28 -08008205 up(&hba->host_sem);
Bean Huo1b9e2142020-01-20 14:08:15 +01008206 if (ret)
8207 goto out;
8208
8209 /* Probe and add UFS logical units */
8210 ret = ufshcd_add_lus(hba);
8211out:
8212 /*
8213 * If we failed to initialize the device or the device is not
8214 * present, turn off the power/clocks etc.
8215 */
8216 if (ret) {
8217 pm_runtime_put_sync(hba->dev);
Bean Huo1b9e2142020-01-20 14:08:15 +01008218 ufshcd_hba_exit(hba);
8219 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308220}
8221
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02008222static const struct attribute_group *ufshcd_driver_groups[] = {
8223 &ufs_sysfs_unit_descriptor_group,
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02008224 &ufs_sysfs_lun_attributes_group,
Daejun Parkf02bc972021-07-12 17:58:30 +09008225#ifdef CONFIG_SCSI_UFS_HPB
8226 &ufs_sysfs_hpb_stat_group,
Daejun Park41d8a932021-07-12 18:00:25 +09008227 &ufs_sysfs_hpb_param_group,
Daejun Parkf02bc972021-07-12 17:58:30 +09008228#endif
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02008229 NULL,
8230};
8231
Stanley Chu90b84912020-05-09 17:37:13 +08008232static struct ufs_hba_variant_params ufs_hba_vps = {
8233 .hba_enable_delay_us = 1000,
Stanley Chud14734ae2020-05-09 17:37:15 +08008234 .wb_flush_threshold = UFS_WB_BUF_REMAIN_PERCENT(40),
Stanley Chu90b84912020-05-09 17:37:13 +08008235 .devfreq_profile.polling_ms = 100,
8236 .devfreq_profile.target = ufshcd_devfreq_target,
8237 .devfreq_profile.get_dev_status = ufshcd_devfreq_get_dev_status,
8238 .ondemand_data.upthreshold = 70,
8239 .ondemand_data.downdifferential = 5,
8240};
8241
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308242static struct scsi_host_template ufshcd_driver_template = {
8243 .module = THIS_MODULE,
8244 .name = UFSHCD,
8245 .proc_name = UFSHCD,
8246 .queuecommand = ufshcd_queuecommand,
8247 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09008248 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308249 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03008250 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308251 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05308252 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
8253 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308254 .this_id = -1,
8255 .sg_tablesize = SG_ALL,
8256 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
8257 .can_queue = UFSHCD_CAN_QUEUE,
Christoph Hellwig552a9902019-06-17 14:19:55 +02008258 .max_segment_size = PRDT_DATA_BYTE_COUNT_MAX,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008259 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01008260 .track_queue_depth = 1,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02008261 .sdev_groups = ufshcd_driver_groups,
Christoph Hellwig4af14d12018-12-13 16:17:09 +01008262 .dma_boundary = PAGE_SIZE - 1,
Stanley Chu49615ba2019-09-16 23:56:50 +08008263 .rpm_autosuspend_delay = RPM_AUTOSUSPEND_DELAY_MS,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308264};
8265
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008266static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
8267 int ua)
8268{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08008269 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008270
Bjorn Andersson7b16a072015-02-11 19:35:28 -08008271 if (!vreg)
8272 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008273
Stanley Chu0487fff2019-03-28 17:16:25 +08008274 /*
8275 * "set_load" operation shall be required on those regulators
8276 * which specifically configured current limitation. Otherwise
8277 * zero max_uA may cause unexpected behavior when regulator is
8278 * enabled or set as high power mode.
8279 */
8280 if (!vreg->max_uA)
8281 return 0;
8282
Bjorn Andersson7b16a072015-02-11 19:35:28 -08008283 ret = regulator_set_load(vreg->reg, ua);
8284 if (ret < 0) {
8285 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
8286 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008287 }
8288
8289 return ret;
8290}
8291
8292static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
8293 struct ufs_vreg *vreg)
8294{
Marc Gonzalez73067982019-02-27 11:41:45 +01008295 return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008296}
8297
8298static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
8299 struct ufs_vreg *vreg)
8300{
Adrian Hunter7c7cfdc2019-08-14 15:59:50 +03008301 if (!vreg)
8302 return 0;
8303
Marc Gonzalez73067982019-02-27 11:41:45 +01008304 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008305}
8306
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008307static int ufshcd_config_vreg(struct device *dev,
8308 struct ufs_vreg *vreg, bool on)
8309{
8310 int ret = 0;
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06008311 struct regulator *reg;
8312 const char *name;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008313 int min_uV, uA_load;
8314
8315 BUG_ON(!vreg);
8316
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06008317 reg = vreg->reg;
8318 name = vreg->name;
8319
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008320 if (regulator_count_voltages(reg) > 0) {
Asutosh Das90d88f42020-02-10 19:40:45 -08008321 uA_load = on ? vreg->max_uA : 0;
8322 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
8323 if (ret)
8324 goto out;
8325
Stanley Chu3b141e82019-03-28 17:16:24 +08008326 if (vreg->min_uV && vreg->max_uV) {
8327 min_uV = on ? vreg->min_uV : 0;
8328 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
Bean Huob0008622020-08-14 11:50:34 +02008329 if (ret)
Stanley Chu3b141e82019-03-28 17:16:24 +08008330 dev_err(dev,
8331 "%s: %s set voltage failed, err=%d\n",
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008332 __func__, name, ret);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008333 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008334 }
8335out:
8336 return ret;
8337}
8338
8339static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
8340{
8341 int ret = 0;
8342
Marc Gonzalez73067982019-02-27 11:41:45 +01008343 if (!vreg || vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008344 goto out;
8345
8346 ret = ufshcd_config_vreg(dev, vreg, true);
8347 if (!ret)
8348 ret = regulator_enable(vreg->reg);
8349
8350 if (!ret)
8351 vreg->enabled = true;
8352 else
8353 dev_err(dev, "%s: %s enable failed, err=%d\n",
8354 __func__, vreg->name, ret);
8355out:
8356 return ret;
8357}
8358
8359static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
8360{
8361 int ret = 0;
8362
Stanley Chuf8162ac2020-12-07 13:49:54 +08008363 if (!vreg || !vreg->enabled || vreg->always_on)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008364 goto out;
8365
8366 ret = regulator_disable(vreg->reg);
8367
8368 if (!ret) {
8369 /* ignore errors on applying disable config */
8370 ufshcd_config_vreg(dev, vreg, false);
8371 vreg->enabled = false;
8372 } else {
8373 dev_err(dev, "%s: %s disable failed, err=%d\n",
8374 __func__, vreg->name, ret);
8375 }
8376out:
8377 return ret;
8378}
8379
8380static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
8381{
8382 int ret = 0;
8383 struct device *dev = hba->dev;
8384 struct ufs_vreg_info *info = &hba->vreg_info;
8385
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008386 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
8387 if (ret)
8388 goto out;
8389
8390 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
8391 if (ret)
8392 goto out;
8393
8394 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008395
8396out:
8397 if (ret) {
8398 ufshcd_toggle_vreg(dev, info->vccq2, false);
8399 ufshcd_toggle_vreg(dev, info->vccq, false);
8400 ufshcd_toggle_vreg(dev, info->vcc, false);
8401 }
8402 return ret;
8403}
8404
Raviv Shvili6a771a62014-09-25 15:32:24 +03008405static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
8406{
8407 struct ufs_vreg_info *info = &hba->vreg_info;
8408
Zeng Guangyue60b7b822019-03-30 17:03:13 +08008409 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
Raviv Shvili6a771a62014-09-25 15:32:24 +03008410}
8411
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008412static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
8413{
8414 int ret = 0;
8415
8416 if (!vreg)
8417 goto out;
8418
8419 vreg->reg = devm_regulator_get(dev, vreg->name);
8420 if (IS_ERR(vreg->reg)) {
8421 ret = PTR_ERR(vreg->reg);
8422 dev_err(dev, "%s: %s get failed, err=%d\n",
8423 __func__, vreg->name, ret);
8424 }
8425out:
8426 return ret;
8427}
8428
8429static int ufshcd_init_vreg(struct ufs_hba *hba)
8430{
8431 int ret = 0;
8432 struct device *dev = hba->dev;
8433 struct ufs_vreg_info *info = &hba->vreg_info;
8434
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008435 ret = ufshcd_get_vreg(dev, info->vcc);
8436 if (ret)
8437 goto out;
8438
8439 ret = ufshcd_get_vreg(dev, info->vccq);
Bean Huob0008622020-08-14 11:50:34 +02008440 if (!ret)
8441 ret = ufshcd_get_vreg(dev, info->vccq2);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008442out:
8443 return ret;
8444}
8445
Raviv Shvili6a771a62014-09-25 15:32:24 +03008446static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
8447{
8448 struct ufs_vreg_info *info = &hba->vreg_info;
8449
8450 if (info)
8451 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
8452
8453 return 0;
8454}
8455
Can Guo81309c22020-11-25 18:01:00 -08008456static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008457{
8458 int ret = 0;
8459 struct ufs_clk_info *clki;
8460 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008461 unsigned long flags;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08008462 ktime_t start = ktime_get();
8463 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008464
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03008465 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008466 goto out;
8467
Can Guo38f32422020-02-10 19:40:47 -08008468 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
8469 if (ret)
8470 return ret;
Subhash Jadavani1e879e82016-10-06 21:48:22 -07008471
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008472 list_for_each_entry(clki, head, list) {
8473 if (!IS_ERR_OR_NULL(clki->clk)) {
Can Guo81309c22020-11-25 18:01:00 -08008474 /*
8475 * Don't disable clocks which are needed
8476 * to keep the link active.
8477 */
8478 if (ufshcd_is_link_active(hba) &&
8479 clki->keep_link_active)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008480 continue;
8481
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08008482 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008483 if (on && !clki->enabled) {
8484 ret = clk_prepare_enable(clki->clk);
8485 if (ret) {
8486 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
8487 __func__, clki->name, ret);
8488 goto out;
8489 }
8490 } else if (!on && clki->enabled) {
8491 clk_disable_unprepare(clki->clk);
8492 }
8493 clki->enabled = on;
8494 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
8495 clki->name, on ? "en" : "dis");
8496 }
8497 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008498
Can Guo38f32422020-02-10 19:40:47 -08008499 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
8500 if (ret)
8501 return ret;
Subhash Jadavani1e879e82016-10-06 21:48:22 -07008502
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008503out:
8504 if (ret) {
8505 list_for_each_entry(clki, head, list) {
8506 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
8507 clk_disable_unprepare(clki->clk);
8508 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008509 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008510 spin_lock_irqsave(hba->host->host_lock, flags);
8511 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008512 trace_ufshcd_clk_gating(dev_name(hba->dev),
8513 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008514 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008515 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008516
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08008517 if (clk_state_changed)
8518 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
8519 (on ? "on" : "off"),
8520 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008521 return ret;
8522}
8523
8524static int ufshcd_init_clocks(struct ufs_hba *hba)
8525{
8526 int ret = 0;
8527 struct ufs_clk_info *clki;
8528 struct device *dev = hba->dev;
8529 struct list_head *head = &hba->clk_list_head;
8530
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03008531 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008532 goto out;
8533
8534 list_for_each_entry(clki, head, list) {
8535 if (!clki->name)
8536 continue;
8537
8538 clki->clk = devm_clk_get(dev, clki->name);
8539 if (IS_ERR(clki->clk)) {
8540 ret = PTR_ERR(clki->clk);
8541 dev_err(dev, "%s: %s clk get failed, %d\n",
8542 __func__, clki->name, ret);
8543 goto out;
8544 }
8545
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05308546 /*
8547 * Parse device ref clk freq as per device tree "ref_clk".
8548 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
8549 * in ufshcd_alloc_host().
8550 */
8551 if (!strcmp(clki->name, "ref_clk"))
8552 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
8553
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008554 if (clki->max_freq) {
8555 ret = clk_set_rate(clki->clk, clki->max_freq);
8556 if (ret) {
8557 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
8558 __func__, clki->name,
8559 clki->max_freq, ret);
8560 goto out;
8561 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03008562 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008563 }
8564 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
8565 clki->name, clk_get_rate(clki->clk));
8566 }
8567out:
8568 return ret;
8569}
8570
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008571static int ufshcd_variant_hba_init(struct ufs_hba *hba)
8572{
8573 int err = 0;
8574
8575 if (!hba->vops)
8576 goto out;
8577
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008578 err = ufshcd_vops_init(hba);
8579 if (err)
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008580 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008581 __func__, ufshcd_get_var_name(hba), err);
Stanley Chuade921a2020-12-05 20:00:38 +08008582out:
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008583 return err;
8584}
8585
8586static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
8587{
8588 if (!hba->vops)
8589 return;
8590
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008591 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008592}
8593
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008594static int ufshcd_hba_init(struct ufs_hba *hba)
8595{
8596 int err;
8597
Raviv Shvili6a771a62014-09-25 15:32:24 +03008598 /*
8599 * Handle host controller power separately from the UFS device power
8600 * rails as it will help controlling the UFS host controller power
8601 * collapse easily which is different than UFS device power collapse.
8602 * Also, enable the host controller power before we go ahead with rest
8603 * of the initialization here.
8604 */
8605 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008606 if (err)
8607 goto out;
8608
Raviv Shvili6a771a62014-09-25 15:32:24 +03008609 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008610 if (err)
8611 goto out;
8612
Raviv Shvili6a771a62014-09-25 15:32:24 +03008613 err = ufshcd_init_clocks(hba);
8614 if (err)
8615 goto out_disable_hba_vreg;
8616
8617 err = ufshcd_setup_clocks(hba, true);
8618 if (err)
8619 goto out_disable_hba_vreg;
8620
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008621 err = ufshcd_init_vreg(hba);
8622 if (err)
8623 goto out_disable_clks;
8624
8625 err = ufshcd_setup_vreg(hba, true);
8626 if (err)
8627 goto out_disable_clks;
8628
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008629 err = ufshcd_variant_hba_init(hba);
8630 if (err)
8631 goto out_disable_vreg;
8632
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02008633 ufs_debugfs_hba_init(hba);
8634
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008635 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008636 goto out;
8637
8638out_disable_vreg:
8639 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03008640out_disable_clks:
8641 ufshcd_setup_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03008642out_disable_hba_vreg:
8643 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008644out:
8645 return err;
8646}
8647
8648static void ufshcd_hba_exit(struct ufs_hba *hba)
8649{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008650 if (hba->is_powered) {
Can Guo4543d9d2021-01-20 02:04:22 -08008651 ufshcd_exit_clk_scaling(hba);
8652 ufshcd_exit_clk_gating(hba);
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02008653 ufs_debugfs_hba_exit(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008654 ufshcd_variant_hba_exit(hba);
8655 ufshcd_setup_vreg(hba, false);
8656 ufshcd_setup_clocks(hba, false);
8657 ufshcd_setup_hba_vreg(hba, false);
8658 hba->is_powered = false;
Bean Huo09750062020-01-20 14:08:14 +01008659 ufs_put_device_desc(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03008660 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008661}
8662
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308663/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008664 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
8665 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308666 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008667 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308668 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008669 * Returns 0 if requested power mode is set successfully
8670 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308671 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008672static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
8673 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308674{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008675 unsigned char cmd[6] = { START_STOP };
8676 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03008677 struct scsi_device *sdp;
8678 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008679 int ret;
8680
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03008681 spin_lock_irqsave(hba->host->host_lock, flags);
8682 sdp = hba->sdev_ufs_device;
8683 if (sdp) {
8684 ret = scsi_device_get(sdp);
8685 if (!ret && !scsi_device_online(sdp)) {
8686 ret = -ENODEV;
8687 scsi_device_put(sdp);
8688 }
8689 } else {
8690 ret = -ENODEV;
8691 }
8692 spin_unlock_irqrestore(hba->host->host_lock, flags);
8693
8694 if (ret)
8695 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008696
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308697 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008698 * If scsi commands fail, the scsi mid-layer schedules scsi error-
8699 * handling, which would wait for host to be resumed. Since we know
8700 * we are functional while we are here, skip host resume in error
8701 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308702 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008703 hba->host->eh_noresume = 1;
Asutosh Dasb294ff32021-04-23 17:20:16 -07008704 if (hba->wlun_dev_clr_ua)
8705 ufshcd_clear_ua_wlun(hba, UFS_UPIU_UFS_DEVICE_WLUN);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308706
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008707 cmd[4] = pwr_mode << 4;
8708
8709 /*
8710 * Current function would be generally called from the power management
Christoph Hellwige8064022016-10-20 15:12:13 +02008711 * callbacks hence set the RQF_PM flag so that it doesn't resume the
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008712 * already suspended childs.
8713 */
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01008714 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
8715 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008716 if (ret) {
8717 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02008718 "START_STOP failed for power mode: %d, result %x\n",
8719 pwr_mode, ret);
Hannes Reinecke464a00c2021-04-27 10:30:15 +02008720 if (ret > 0 && scsi_sense_valid(&sshdr))
Hannes Reinecke21045512015-01-08 07:43:46 +01008721 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008722 }
8723
8724 if (!ret)
8725 hba->curr_dev_pwr_mode = pwr_mode;
Randall Huang19186512020-11-30 20:14:02 -08008726
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03008727 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008728 hba->host->eh_noresume = 0;
8729 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308730}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308731
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008732static int ufshcd_link_state_transition(struct ufs_hba *hba,
8733 enum uic_link_state req_link_state,
8734 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308735{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008736 int ret = 0;
8737
8738 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308739 return 0;
8740
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008741 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
8742 ret = ufshcd_uic_hibern8_enter(hba);
Can Guo4db7a232020-08-09 05:15:51 -07008743 if (!ret) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008744 ufshcd_set_link_hibern8(hba);
Can Guo4db7a232020-08-09 05:15:51 -07008745 } else {
8746 dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
8747 __func__, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008748 goto out;
Can Guo4db7a232020-08-09 05:15:51 -07008749 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008750 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308751 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008752 * If autobkops is enabled, link can't be turned off because
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008753 * turning off the link would also turn off the device, except in the
8754 * case of DeepSleep where the device is expected to remain powered.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308755 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008756 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
Dan Carpenterdc30c9e2019-12-13 13:49:35 +03008757 (!check_for_bkops || !hba->auto_bkops_enabled)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008758 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02008759 * Let's make sure that link is in low power mode, we are doing
8760 * this currently by putting the link in Hibern8. Otherway to
8761 * put the link in low power mode is to send the DME end point
8762 * to device and then send the DME reset command to local
8763 * unipro. But putting the link in hibern8 is much faster.
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008764 *
8765 * Note also that putting the link in Hibern8 is a requirement
8766 * for entering DeepSleep.
Yaniv Gardif3099fb2016-03-10 17:37:17 +02008767 */
8768 ret = ufshcd_uic_hibern8_enter(hba);
Can Guo4db7a232020-08-09 05:15:51 -07008769 if (ret) {
8770 dev_err(hba->dev, "%s: hibern8 enter failed %d\n",
8771 __func__, ret);
Yaniv Gardif3099fb2016-03-10 17:37:17 +02008772 goto out;
Can Guo4db7a232020-08-09 05:15:51 -07008773 }
Yaniv Gardif3099fb2016-03-10 17:37:17 +02008774 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008775 * Change controller state to "reset state" which
8776 * should also put the link in off/reset state
8777 */
Bart Van Assche5cac1092020-05-07 15:27:50 -07008778 ufshcd_hba_stop(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008779 /*
8780 * TODO: Check if we need any delay to make sure that
8781 * controller is reset
8782 */
8783 ufshcd_set_link_off(hba);
8784 }
8785
8786out:
8787 return ret;
8788}
8789
8790static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
8791{
Stanley Chuc4df6ee2020-07-29 13:18:39 +08008792 bool vcc_off = false;
8793
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008794 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02008795 * It seems some UFS devices may keep drawing more than sleep current
8796 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
8797 * To avoid this situation, add 2ms delay before putting these UFS
8798 * rails in LPM mode.
8799 */
8800 if (!ufshcd_is_link_active(hba) &&
8801 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
8802 usleep_range(2000, 2100);
8803
8804 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008805 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
8806 * power.
8807 *
8808 * If UFS device and link is in OFF state, all power supplies (VCC,
8809 * VCCQ, VCCQ2) can be turned off if power on write protect is not
8810 * required. If UFS link is inactive (Hibern8 or OFF state) and device
8811 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
8812 *
8813 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
8814 * in low power state which would save some power.
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008815 *
8816 * If Write Booster is enabled and the device needs to flush the WB
8817 * buffer OR if bkops status is urgent for WB, keep Vcc on.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008818 */
8819 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8820 !hba->dev_info.is_lu_power_on_wp) {
8821 ufshcd_setup_vreg(hba, false);
Stanley Chuc4df6ee2020-07-29 13:18:39 +08008822 vcc_off = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008823 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Stanley Chu51dd9052020-05-22 16:32:12 +08008824 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
Stanley Chuc4df6ee2020-07-29 13:18:39 +08008825 vcc_off = true;
Can Guo23043dd2021-04-25 20:48:38 -07008826 if (ufshcd_is_link_hibern8(hba) || ufshcd_is_link_off(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008827 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8828 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
8829 }
8830 }
Stanley Chuc4df6ee2020-07-29 13:18:39 +08008831
8832 /*
8833 * Some UFS devices require delay after VCC power rail is turned-off.
8834 */
8835 if (vcc_off && hba->vreg_info.vcc &&
8836 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_AFTER_LPM)
8837 usleep_range(5000, 5100);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008838}
8839
Bart Van Assche9bb25e52021-07-21 20:34:24 -07008840#ifdef CONFIG_PM
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008841static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
8842{
8843 int ret = 0;
8844
8845 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8846 !hba->dev_info.is_lu_power_on_wp) {
8847 ret = ufshcd_setup_vreg(hba, true);
8848 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Can Guo23043dd2021-04-25 20:48:38 -07008849 if (!ufshcd_is_link_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008850 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
8851 if (ret)
8852 goto vcc_disable;
8853 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
8854 if (ret)
8855 goto vccq_lpm;
8856 }
Subhash Jadavani69d72ac2016-10-27 17:26:24 -07008857 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008858 }
8859 goto out;
8860
8861vccq_lpm:
8862 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8863vcc_disable:
8864 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
8865out:
8866 return ret;
8867}
Bart Van Assche9bb25e52021-07-21 20:34:24 -07008868#endif /* CONFIG_PM */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008869
8870static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
8871{
Can Guodd7143e2020-10-27 12:10:36 -07008872 if (ufshcd_is_link_off(hba) || ufshcd_can_aggressive_pc(hba))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008873 ufshcd_setup_hba_vreg(hba, false);
8874}
8875
8876static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
8877{
Can Guodd7143e2020-10-27 12:10:36 -07008878 if (ufshcd_is_link_off(hba) || ufshcd_can_aggressive_pc(hba))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008879 ufshcd_setup_hba_vreg(hba, true);
8880}
8881
Asutosh Dasb294ff32021-04-23 17:20:16 -07008882static int __ufshcd_wl_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008883{
8884 int ret = 0;
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008885 int check_for_bkops;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008886 enum ufs_pm_level pm_lvl;
8887 enum ufs_dev_pwr_mode req_dev_pwr_mode;
8888 enum uic_link_state req_link_state;
8889
Asutosh Dasb294ff32021-04-23 17:20:16 -07008890 hba->pm_op_in_progress = true;
Bart Van Assche4c6cb9e2021-05-13 10:12:29 -07008891 if (pm_op != UFS_SHUTDOWN_PM) {
8892 pm_lvl = pm_op == UFS_RUNTIME_PM ?
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008893 hba->rpm_lvl : hba->spm_lvl;
8894 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
8895 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
8896 } else {
8897 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
8898 req_link_state = UIC_LINK_OFF_STATE;
8899 }
8900
Daejun Parkf02bc972021-07-12 17:58:30 +09008901 ufshpb_suspend(hba);
8902
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008903 /*
8904 * If we can't transition into any of the low power modes
8905 * just gate the clocks.
8906 */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008907 ufshcd_hold(hba, false);
8908 hba->clk_gating.is_suspended = true;
8909
Stanley Chu348e1bc2021-01-20 23:01:42 +08008910 if (ufshcd_is_clkscaling_supported(hba))
8911 ufshcd_clk_scaling_suspend(hba, true);
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07008912
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008913 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
8914 req_link_state == UIC_LINK_ACTIVE_STATE) {
Asutosh Dasb294ff32021-04-23 17:20:16 -07008915 goto vops_suspend;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008916 }
8917
8918 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
8919 (req_link_state == hba->uic_link_state))
Asutosh Dasb294ff32021-04-23 17:20:16 -07008920 goto enable_scaling;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008921
8922 /* UFS device & link must be active before we enter in this function */
8923 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
8924 ret = -EINVAL;
Asutosh Dasb294ff32021-04-23 17:20:16 -07008925 goto enable_scaling;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008926 }
8927
Bart Van Assche4c6cb9e2021-05-13 10:12:29 -07008928 if (pm_op == UFS_RUNTIME_PM) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03008929 if (ufshcd_can_autobkops_during_suspend(hba)) {
8930 /*
8931 * The device is idle with no requests in the queue,
8932 * allow background operations if bkops status shows
8933 * that performance might be impacted.
8934 */
8935 ret = ufshcd_urgent_bkops(hba);
8936 if (ret)
Asutosh Dasb294ff32021-04-23 17:20:16 -07008937 goto enable_scaling;
Subhash Jadavani374a2462014-09-25 15:32:35 +03008938 } else {
8939 /* make sure that auto bkops is disabled */
8940 ufshcd_disable_auto_bkops(hba);
8941 }
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008942 /*
Stanley Chu51dd9052020-05-22 16:32:12 +08008943 * If device needs to do BKOP or WB buffer flush during
8944 * Hibern8, keep device power mode as "active power mode"
8945 * and VCC supply.
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008946 */
Stanley Chu51dd9052020-05-22 16:32:12 +08008947 hba->dev_info.b_rpm_dev_flush_capable =
8948 hba->auto_bkops_enabled ||
8949 (((req_link_state == UIC_LINK_HIBERN8_STATE) ||
8950 ((req_link_state == UIC_LINK_ACTIVE_STATE) &&
8951 ufshcd_is_auto_hibern8_enabled(hba))) &&
8952 ufshcd_wb_need_flush(hba));
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008953 }
8954
Kiwoong Kim6948a962020-12-19 15:40:39 +09008955 flush_work(&hba->eeh_work);
8956
Stanley Chu51dd9052020-05-22 16:32:12 +08008957 if (req_dev_pwr_mode != hba->curr_dev_pwr_mode) {
Bart Van Assche4c6cb9e2021-05-13 10:12:29 -07008958 if (pm_op != UFS_RUNTIME_PM)
Stanley Chu51dd9052020-05-22 16:32:12 +08008959 /* ensure that bkops is disabled */
8960 ufshcd_disable_auto_bkops(hba);
Stanley Chu51dd9052020-05-22 16:32:12 +08008961
8962 if (!hba->dev_info.b_rpm_dev_flush_capable) {
8963 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
8964 if (ret)
Asutosh Dasb294ff32021-04-23 17:20:16 -07008965 goto enable_scaling;
Stanley Chu51dd9052020-05-22 16:32:12 +08008966 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008967 }
8968
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008969 /*
8970 * In the case of DeepSleep, the device is expected to remain powered
8971 * with the link off, so do not check for bkops.
8972 */
8973 check_for_bkops = !ufshcd_is_ufs_dev_deepsleep(hba);
8974 ret = ufshcd_link_state_transition(hba, req_link_state, check_for_bkops);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008975 if (ret)
8976 goto set_dev_active;
8977
Asutosh Dasb294ff32021-04-23 17:20:16 -07008978vops_suspend:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008979 /*
8980 * Call vendor specific suspend callback. As these callbacks may access
8981 * vendor specific host controller register space call them before the
8982 * host clocks are ON.
8983 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008984 ret = ufshcd_vops_suspend(hba, pm_op);
8985 if (ret)
8986 goto set_link_active;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008987 goto out;
8988
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008989set_link_active:
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008990 /*
8991 * Device hardware reset is required to exit DeepSleep. Also, for
8992 * DeepSleep, the link is off so host reset and restore will be done
8993 * further below.
8994 */
8995 if (ufshcd_is_ufs_dev_deepsleep(hba)) {
Stanley Chu31a5d9c2020-12-08 21:56:35 +08008996 ufshcd_device_reset(hba);
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02008997 WARN_ON(!ufshcd_is_link_off(hba));
8998 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008999 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
9000 ufshcd_set_link_active(hba);
9001 else if (ufshcd_is_link_off(hba))
9002 ufshcd_host_reset_and_restore(hba);
9003set_dev_active:
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02009004 /* Can also get here needing to exit DeepSleep */
9005 if (ufshcd_is_ufs_dev_deepsleep(hba)) {
Stanley Chu31a5d9c2020-12-08 21:56:35 +08009006 ufshcd_device_reset(hba);
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02009007 ufshcd_host_reset_and_restore(hba);
9008 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009009 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
9010 ufshcd_disable_auto_bkops(hba);
Asutosh Dasb294ff32021-04-23 17:20:16 -07009011enable_scaling:
Stanley Chu348e1bc2021-01-20 23:01:42 +08009012 if (ufshcd_is_clkscaling_supported(hba))
9013 ufshcd_clk_scaling_suspend(hba, false);
9014
Stanley Chu51dd9052020-05-22 16:32:12 +08009015 hba->dev_info.b_rpm_dev_flush_capable = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009016out:
Stanley Chu51dd9052020-05-22 16:32:12 +08009017 if (hba->dev_info.b_rpm_dev_flush_capable) {
9018 schedule_delayed_work(&hba->rpm_dev_flush_recheck_work,
9019 msecs_to_jiffies(RPM_DEV_FLUSH_RECHECK_WORK_DELAY_MS));
9020 }
9021
Asutosh Dasb294ff32021-04-23 17:20:16 -07009022 if (ret) {
9023 ufshcd_update_evt_hist(hba, UFS_EVT_WL_SUSP_ERR, (u32)ret);
9024 hba->clk_gating.is_suspended = false;
9025 ufshcd_release(hba);
Daejun Parkf02bc972021-07-12 17:58:30 +09009026 ufshpb_resume(hba);
Asutosh Dasb294ff32021-04-23 17:20:16 -07009027 }
9028 hba->pm_op_in_progress = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009029 return ret;
9030}
9031
YueHaibing75d645a2021-06-17 11:13:26 +08009032#ifdef CONFIG_PM
Asutosh Dasb294ff32021-04-23 17:20:16 -07009033static int __ufshcd_wl_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009034{
9035 int ret;
Asutosh Dasb294ff32021-04-23 17:20:16 -07009036 enum uic_link_state old_link_state = hba->uic_link_state;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009037
Asutosh Dasb294ff32021-04-23 17:20:16 -07009038 hba->pm_op_in_progress = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009039
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009040 /*
9041 * Call vendor specific resume callback. As these callbacks may access
9042 * vendor specific host controller register space call them when the
9043 * host clocks are ON.
9044 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02009045 ret = ufshcd_vops_resume(hba, pm_op);
9046 if (ret)
Asutosh Dasb294ff32021-04-23 17:20:16 -07009047 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009048
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02009049 /* For DeepSleep, the only supported option is to have the link off */
9050 WARN_ON(ufshcd_is_ufs_dev_deepsleep(hba) && !ufshcd_is_link_off(hba));
9051
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009052 if (ufshcd_is_link_hibern8(hba)) {
9053 ret = ufshcd_uic_hibern8_exit(hba);
Can Guo4db7a232020-08-09 05:15:51 -07009054 if (!ret) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009055 ufshcd_set_link_active(hba);
Can Guo4db7a232020-08-09 05:15:51 -07009056 } else {
9057 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
9058 __func__, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009059 goto vendor_suspend;
Can Guo4db7a232020-08-09 05:15:51 -07009060 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009061 } else if (ufshcd_is_link_off(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009062 /*
Asutosh Das089f5b62020-04-13 23:14:48 -07009063 * A full initialization of the host and the device is
9064 * required since the link was put to off during suspend.
Adrian Hunterfe1d4c22020-11-03 16:14:02 +02009065 * Note, in the case of DeepSleep, the device will exit
9066 * DeepSleep due to device reset.
Asutosh Das089f5b62020-04-13 23:14:48 -07009067 */
9068 ret = ufshcd_reset_and_restore(hba);
9069 /*
9070 * ufshcd_reset_and_restore() should have already
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009071 * set the link state as active
9072 */
9073 if (ret || !ufshcd_is_link_active(hba))
9074 goto vendor_suspend;
9075 }
9076
9077 if (!ufshcd_is_ufs_dev_active(hba)) {
9078 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
9079 if (ret)
9080 goto set_old_link_state;
9081 }
9082
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08009083 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
9084 ufshcd_enable_auto_bkops(hba);
9085 else
9086 /*
9087 * If BKOPs operations are urgently needed at this moment then
9088 * keep auto-bkops enabled or else disable it.
9089 */
9090 ufshcd_urgent_bkops(hba);
9091
Adrian Huntercd469472021-02-09 08:24:36 +02009092 if (hba->ee_usr_mask)
9093 ufshcd_write_ee_control(hba);
9094
Stanley Chu348e1bc2021-01-20 23:01:42 +08009095 if (ufshcd_is_clkscaling_supported(hba))
9096 ufshcd_clk_scaling_suspend(hba, false);
Sahitya Tummala856b3482014-09-25 15:32:34 +03009097
Stanley Chu51dd9052020-05-22 16:32:12 +08009098 if (hba->dev_info.b_rpm_dev_flush_capable) {
9099 hba->dev_info.b_rpm_dev_flush_capable = false;
9100 cancel_delayed_work(&hba->rpm_dev_flush_recheck_work);
9101 }
9102
Asutosh Dasb294ff32021-04-23 17:20:16 -07009103 /* Enable Auto-Hibernate if configured */
9104 ufshcd_auto_hibern8_enable(hba);
Daejun Parkf02bc972021-07-12 17:58:30 +09009105
9106 ufshpb_resume(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009107 goto out;
9108
9109set_old_link_state:
9110 ufshcd_link_state_transition(hba, old_link_state, 0);
9111vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02009112 ufshcd_vops_suspend(hba, pm_op);
Asutosh Dasb294ff32021-04-23 17:20:16 -07009113out:
9114 if (ret)
9115 ufshcd_update_evt_hist(hba, UFS_EVT_WL_RES_ERR, (u32)ret);
9116 hba->clk_gating.is_suspended = false;
9117 ufshcd_release(hba);
9118 hba->pm_op_in_progress = false;
9119 return ret;
9120}
9121
9122static int ufshcd_wl_runtime_suspend(struct device *dev)
9123{
9124 struct scsi_device *sdev = to_scsi_device(dev);
9125 struct ufs_hba *hba;
9126 int ret;
9127 ktime_t start = ktime_get();
9128
9129 hba = shost_priv(sdev->host);
9130
9131 ret = __ufshcd_wl_suspend(hba, UFS_RUNTIME_PM);
9132 if (ret)
9133 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9134
9135 trace_ufshcd_wl_runtime_suspend(dev_name(dev), ret,
9136 ktime_to_us(ktime_sub(ktime_get(), start)),
9137 hba->curr_dev_pwr_mode, hba->uic_link_state);
9138
9139 return ret;
9140}
9141
9142static int ufshcd_wl_runtime_resume(struct device *dev)
9143{
9144 struct scsi_device *sdev = to_scsi_device(dev);
9145 struct ufs_hba *hba;
9146 int ret = 0;
9147 ktime_t start = ktime_get();
9148
9149 hba = shost_priv(sdev->host);
9150
9151 ret = __ufshcd_wl_resume(hba, UFS_RUNTIME_PM);
9152 if (ret)
9153 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9154
9155 trace_ufshcd_wl_runtime_resume(dev_name(dev), ret,
9156 ktime_to_us(ktime_sub(ktime_get(), start)),
9157 hba->curr_dev_pwr_mode, hba->uic_link_state);
9158
9159 return ret;
9160}
YueHaibing75d645a2021-06-17 11:13:26 +08009161#endif
Asutosh Dasb294ff32021-04-23 17:20:16 -07009162
9163#ifdef CONFIG_PM_SLEEP
9164static int ufshcd_wl_suspend(struct device *dev)
9165{
9166 struct scsi_device *sdev = to_scsi_device(dev);
9167 struct ufs_hba *hba;
9168 int ret = 0;
9169 ktime_t start = ktime_get();
9170
9171 hba = shost_priv(sdev->host);
9172 down(&hba->host_sem);
9173
9174 if (pm_runtime_suspended(dev))
9175 goto out;
9176
9177 ret = __ufshcd_wl_suspend(hba, UFS_SYSTEM_PM);
9178 if (ret) {
9179 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9180 up(&hba->host_sem);
9181 }
9182
9183out:
9184 if (!ret)
9185 hba->is_sys_suspended = true;
9186 trace_ufshcd_wl_suspend(dev_name(dev), ret,
9187 ktime_to_us(ktime_sub(ktime_get(), start)),
9188 hba->curr_dev_pwr_mode, hba->uic_link_state);
9189
9190 return ret;
9191}
9192
9193static int ufshcd_wl_resume(struct device *dev)
9194{
9195 struct scsi_device *sdev = to_scsi_device(dev);
9196 struct ufs_hba *hba;
9197 int ret = 0;
9198 ktime_t start = ktime_get();
9199
9200 hba = shost_priv(sdev->host);
9201
9202 if (pm_runtime_suspended(dev))
9203 goto out;
9204
9205 ret = __ufshcd_wl_resume(hba, UFS_SYSTEM_PM);
9206 if (ret)
9207 dev_err(&sdev->sdev_gendev, "%s failed: %d\n", __func__, ret);
9208out:
9209 trace_ufshcd_wl_resume(dev_name(dev), ret,
9210 ktime_to_us(ktime_sub(ktime_get(), start)),
9211 hba->curr_dev_pwr_mode, hba->uic_link_state);
9212 if (!ret)
9213 hba->is_sys_suspended = false;
9214 up(&hba->host_sem);
9215 return ret;
9216}
9217#endif
9218
9219static void ufshcd_wl_shutdown(struct device *dev)
9220{
9221 struct scsi_device *sdev = to_scsi_device(dev);
9222 struct ufs_hba *hba;
9223
9224 hba = shost_priv(sdev->host);
9225
9226 down(&hba->host_sem);
9227 hba->shutting_down = true;
9228 up(&hba->host_sem);
9229
9230 /* Turn on everything while shutting down */
9231 ufshcd_rpm_get_sync(hba);
9232 scsi_device_quiesce(sdev);
9233 shost_for_each_device(sdev, hba->host) {
9234 if (sdev == hba->sdev_ufs_device)
9235 continue;
9236 scsi_device_quiesce(sdev);
9237 }
9238 __ufshcd_wl_suspend(hba, UFS_SHUTDOWN_PM);
9239}
9240
9241/**
9242 * ufshcd_suspend - helper function for suspend operations
9243 * @hba: per adapter instance
9244 *
9245 * This function will put disable irqs, turn off clocks
9246 * and set vreg and hba-vreg in lpm mode.
Asutosh Dasb294ff32021-04-23 17:20:16 -07009247 */
9248static int ufshcd_suspend(struct ufs_hba *hba)
9249{
9250 int ret;
9251
9252 if (!hba->is_powered)
9253 return 0;
9254 /*
9255 * Disable the host irq as host controller as there won't be any
9256 * host controller transaction expected till resume.
9257 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009258 ufshcd_disable_irq(hba);
Asutosh Dasb294ff32021-04-23 17:20:16 -07009259 ret = ufshcd_setup_clocks(hba, false);
9260 if (ret) {
9261 ufshcd_enable_irq(hba);
9262 return ret;
9263 }
Can Guo2dec9472020-08-09 05:15:47 -07009264 if (ufshcd_is_clkgating_allowed(hba)) {
9265 hba->clk_gating.state = CLKS_OFF;
9266 trace_ufshcd_clk_gating(dev_name(hba->dev),
9267 hba->clk_gating.state);
9268 }
Asutosh Dasb294ff32021-04-23 17:20:16 -07009269
9270 ufshcd_vreg_set_lpm(hba);
9271 /* Put the host controller in low power mode if possible */
9272 ufshcd_hba_vreg_set_lpm(hba);
9273 return ret;
9274}
9275
Bart Van Assche9bb25e52021-07-21 20:34:24 -07009276#ifdef CONFIG_PM
Asutosh Dasb294ff32021-04-23 17:20:16 -07009277/**
9278 * ufshcd_resume - helper function for resume operations
9279 * @hba: per adapter instance
9280 *
9281 * This function basically turns on the regulators, clocks and
9282 * irqs of the hba.
Asutosh Dasb294ff32021-04-23 17:20:16 -07009283 *
9284 * Returns 0 for success and non-zero for failure
9285 */
9286static int ufshcd_resume(struct ufs_hba *hba)
9287{
9288 int ret;
9289
9290 if (!hba->is_powered)
9291 return 0;
9292
9293 ufshcd_hba_vreg_set_hpm(hba);
9294 ret = ufshcd_vreg_set_hpm(hba);
9295 if (ret)
9296 goto out;
9297
9298 /* Make sure clocks are enabled before accessing controller */
9299 ret = ufshcd_setup_clocks(hba, true);
9300 if (ret)
9301 goto disable_vreg;
9302
9303 /* enable the host irq as host controller would be active soon */
9304 ufshcd_enable_irq(hba);
9305 goto out;
9306
Ziqi Chen528db9e2021-01-08 18:56:24 +08009307disable_vreg:
9308 ufshcd_vreg_set_lpm(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009309out:
Stanley Chu8808b4e2019-07-10 21:38:21 +08009310 if (ret)
Stanley Chue965e5e2020-12-05 19:58:59 +08009311 ufshcd_update_evt_hist(hba, UFS_EVT_RESUME_ERR, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009312 return ret;
9313}
Bart Van Assche9bb25e52021-07-21 20:34:24 -07009314#endif /* CONFIG_PM */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009315
Bart Van Assche9bb25e52021-07-21 20:34:24 -07009316#ifdef CONFIG_PM_SLEEP
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009317/**
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009318 * ufshcd_system_suspend - system suspend callback
9319 * @dev: Device associated with the UFS controller.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009320 *
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009321 * Executed before putting the system into a sleep state in which the contents
9322 * of main memory are preserved.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009323 *
9324 * Returns 0 for success and non-zero for failure
9325 */
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009326int ufshcd_system_suspend(struct device *dev)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009327{
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009328 struct ufs_hba *hba = dev_get_drvdata(dev);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009329 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009330 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009331
Asutosh Dasb294ff32021-04-23 17:20:16 -07009332 if (pm_runtime_suspended(hba->dev))
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08009333 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009334
Asutosh Dasb294ff32021-04-23 17:20:16 -07009335 ret = ufshcd_suspend(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009336out:
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009337 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
9338 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08009339 hba->curr_dev_pwr_mode, hba->uic_link_state);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009340 return ret;
9341}
9342EXPORT_SYMBOL(ufshcd_system_suspend);
9343
9344/**
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009345 * ufshcd_system_resume - system resume callback
9346 * @dev: Device associated with the UFS controller.
9347 *
9348 * Executed after waking the system up from a sleep state in which the contents
9349 * of main memory were preserved.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009350 *
9351 * Returns 0 for success and non-zero for failure
9352 */
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009353int ufshcd_system_resume(struct device *dev)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009354{
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009355 struct ufs_hba *hba = dev_get_drvdata(dev);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009356 ktime_t start = ktime_get();
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009357 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009358
Asutosh Dasb294ff32021-04-23 17:20:16 -07009359 if (pm_runtime_suspended(hba->dev))
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009360 goto out;
Asutosh Dasb294ff32021-04-23 17:20:16 -07009361
9362 ret = ufshcd_resume(hba);
9363
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009364out:
9365 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
9366 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08009367 hba->curr_dev_pwr_mode, hba->uic_link_state);
Asutosh Dasb294ff32021-04-23 17:20:16 -07009368
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009369 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009370}
9371EXPORT_SYMBOL(ufshcd_system_resume);
Bart Van Assche9bb25e52021-07-21 20:34:24 -07009372#endif /* CONFIG_PM_SLEEP */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009373
Bart Van Assche9bb25e52021-07-21 20:34:24 -07009374#ifdef CONFIG_PM
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009375/**
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009376 * ufshcd_runtime_suspend - runtime suspend callback
9377 * @dev: Device associated with the UFS controller.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009378 *
9379 * Check the description of ufshcd_suspend() function for more details.
9380 *
9381 * Returns 0 for success and non-zero for failure
9382 */
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009383int ufshcd_runtime_suspend(struct device *dev)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009384{
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009385 struct ufs_hba *hba = dev_get_drvdata(dev);
Asutosh Dasb294ff32021-04-23 17:20:16 -07009386 int ret;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009387 ktime_t start = ktime_get();
9388
Asutosh Dasb294ff32021-04-23 17:20:16 -07009389 ret = ufshcd_suspend(hba);
9390
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009391 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
9392 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08009393 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009394 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309395}
9396EXPORT_SYMBOL(ufshcd_runtime_suspend);
9397
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009398/**
9399 * ufshcd_runtime_resume - runtime resume routine
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009400 * @dev: Device associated with the UFS controller.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009401 *
Asutosh Dasb294ff32021-04-23 17:20:16 -07009402 * This function basically brings controller
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009403 * to active state. Following operations are done in this function:
9404 *
9405 * 1. Turn on all the controller related clocks
Asutosh Dasb294ff32021-04-23 17:20:16 -07009406 * 2. Turn ON VCC rail
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009407 */
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009408int ufshcd_runtime_resume(struct device *dev)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309409{
Bart Van Asschef1ecbe12021-07-21 20:34:23 -07009410 struct ufs_hba *hba = dev_get_drvdata(dev);
Asutosh Dasb294ff32021-04-23 17:20:16 -07009411 int ret;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009412 ktime_t start = ktime_get();
9413
Asutosh Dasb294ff32021-04-23 17:20:16 -07009414 ret = ufshcd_resume(hba);
9415
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009416 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
9417 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08009418 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08009419 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309420}
9421EXPORT_SYMBOL(ufshcd_runtime_resume);
Bart Van Assche9bb25e52021-07-21 20:34:24 -07009422#endif /* CONFIG_PM */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309423
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309424/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009425 * ufshcd_shutdown - shutdown routine
9426 * @hba: per adapter instance
9427 *
Asutosh Dasb294ff32021-04-23 17:20:16 -07009428 * This function would turn off both UFS device and UFS hba
9429 * regulators. It would also disable clocks.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009430 *
9431 * Returns 0 always to allow force shutdown even in case of errors.
9432 */
9433int ufshcd_shutdown(struct ufs_hba *hba)
9434{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009435 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
9436 goto out;
9437
Stanley Chue92643d2020-11-19 14:29:16 +08009438 pm_runtime_get_sync(hba->dev);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009439
Asutosh Dasb294ff32021-04-23 17:20:16 -07009440 ufshcd_suspend(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009441out:
Can Guo88a92d62020-12-02 04:04:01 -08009442 hba->is_powered = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009443 /* allow force shutdown even in case of errors */
9444 return 0;
9445}
9446EXPORT_SYMBOL(ufshcd_shutdown);
9447
9448/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309449 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309450 * data structure memory
Bart Van Assche8aa29f12018-03-01 15:07:20 -08009451 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309452 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309453void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309454{
Asutosh Dasb294ff32021-04-23 17:20:16 -07009455 if (hba->sdev_ufs_device)
9456 ufshcd_rpm_get_sync(hba);
Avri Altmane88e2d32021-09-15 09:04:06 +03009457 ufs_hwmon_remove(hba);
Avri Altmandf032bf2018-10-07 17:30:35 +03009458 ufs_bsg_remove(hba);
Daejun Park4b5f4902021-07-12 17:58:59 +09009459 ufshpb_remove(hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02009460 ufs_sysfs_remove_nodes(hba->dev);
Bart Van Assche69a6c262019-12-09 10:13:09 -08009461 blk_cleanup_queue(hba->tmf_queue);
9462 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08009463 blk_cleanup_queue(hba->cmd_queue);
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05309464 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309465 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05309466 ufshcd_disable_intr(hba, hba->intr_mask);
Bart Van Assche5cac1092020-05-07 15:27:50 -07009467 ufshcd_hba_stop(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03009468 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309469}
9470EXPORT_SYMBOL_GPL(ufshcd_remove);
9471
9472/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02009473 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
9474 * @hba: pointer to Host Bus Adapter (HBA)
9475 */
9476void ufshcd_dealloc_host(struct ufs_hba *hba)
9477{
9478 scsi_host_put(hba->host);
9479}
9480EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
9481
9482/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09009483 * ufshcd_set_dma_mask - Set dma mask based on the controller
9484 * addressing capability
9485 * @hba: per adapter instance
9486 *
9487 * Returns 0 for success, non-zero for failure
9488 */
9489static int ufshcd_set_dma_mask(struct ufs_hba *hba)
9490{
9491 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
9492 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
9493 return 0;
9494 }
9495 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
9496}
9497
Bart Van Asschea113eaa2021-07-21 20:34:37 -07009498static struct scsi_transport_template ufshcd_transport_template = {
9499 .eh_strategy_handler = ufshcd_err_handler,
9500};
9501
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09009502/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009503 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309504 * @dev: pointer to device handle
9505 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309506 * Returns 0 on success, non-zero value on failure
9507 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009508int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309509{
9510 struct Scsi_Host *host;
9511 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009512 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309513
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309514 if (!dev) {
9515 dev_err(dev,
9516 "Invalid memory reference for dev is NULL\n");
9517 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309518 goto out_error;
9519 }
9520
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309521 host = scsi_host_alloc(&ufshcd_driver_template,
9522 sizeof(struct ufs_hba));
9523 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309524 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309525 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309526 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309527 }
Bart Van Asschea113eaa2021-07-21 20:34:37 -07009528 host->transportt = &ufshcd_transport_template;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309529 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309530 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309531 hba->dev = dev;
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05309532 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03009533 INIT_LIST_HEAD(&hba->clk_list_head);
Bart Van Assche169f5eb2021-07-21 20:34:34 -07009534 spin_lock_init(&hba->outstanding_lock);
9535
9536 *hba_handle = hba;
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03009537
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009538out_error:
9539 return err;
9540}
9541EXPORT_SYMBOL(ufshcd_alloc_host);
9542
Bart Van Assche69a6c262019-12-09 10:13:09 -08009543/* This function exists because blk_mq_alloc_tag_set() requires this. */
9544static blk_status_t ufshcd_queue_tmf(struct blk_mq_hw_ctx *hctx,
9545 const struct blk_mq_queue_data *qd)
9546{
9547 WARN_ON_ONCE(true);
9548 return BLK_STS_NOTSUPP;
9549}
9550
9551static const struct blk_mq_ops ufshcd_tmf_ops = {
9552 .queue_rq = ufshcd_queue_tmf,
9553};
9554
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009555/**
9556 * ufshcd_init - Driver initialization routine
9557 * @hba: per-adapter instance
9558 * @mmio_base: base register address
9559 * @irq: Interrupt line of device
9560 * Returns 0 on success, non-zero value on failure
9561 */
9562int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
9563{
9564 int err;
9565 struct Scsi_Host *host = hba->host;
9566 struct device *dev = hba->dev;
9567
9568 if (!mmio_base) {
9569 dev_err(hba->dev,
9570 "Invalid memory reference for mmio_base is NULL\n");
9571 err = -ENODEV;
9572 goto out_error;
9573 }
9574
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309575 hba->mmio_base = mmio_base;
9576 hba->irq = irq;
Stanley Chu90b84912020-05-09 17:37:13 +08009577 hba->vps = &ufs_hba_vps;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309578
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03009579 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03009580 if (err)
9581 goto out_error;
9582
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309583 /* Read capabilities registers */
Satya Tangiraladf043c742020-07-06 20:04:14 +00009584 err = ufshcd_hba_capabilities(hba);
9585 if (err)
9586 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309587
9588 /* Get UFS version supported by the controller */
9589 hba->ufs_version = ufshcd_get_ufs_version(hba);
9590
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05309591 /* Get Interrupt bit mask per version */
9592 hba->intr_mask = ufshcd_get_intr_mask(hba);
9593
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09009594 err = ufshcd_set_dma_mask(hba);
9595 if (err) {
9596 dev_err(hba->dev, "set dma mask failed\n");
9597 goto out_disable;
9598 }
9599
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309600 /* Allocate memory for host memory space */
9601 err = ufshcd_memory_alloc(hba);
9602 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309603 dev_err(hba->dev, "Memory allocation failed\n");
9604 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309605 }
9606
9607 /* Configure LRB */
9608 ufshcd_host_memory_configure(hba);
9609
9610 host->can_queue = hba->nutrs;
9611 host->cmd_per_lun = hba->nutrs;
9612 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03009613 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309614 host->max_channel = UFSHCD_MAX_CHANNEL;
9615 host->unique_id = host->host_no;
Avri Altmana851b2b2018-10-07 17:30:34 +03009616 host->max_cmd_len = UFS_CDB_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309617
Dolev Raviv7eb584d2014-09-25 15:32:31 +03009618 hba->max_pwr_info.is_valid = false;
9619
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05309620 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309621
Can Guo9cd20d32021-01-13 19:13:28 -08009622 sema_init(&hba->host_sem, 1);
Can Guo88a92d62020-12-02 04:04:01 -08009623
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309624 /* Initialize UIC command mutex */
9625 mutex_init(&hba->uic_cmd_mutex);
9626
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05309627 /* Initialize mutex for device management commands */
9628 mutex_init(&hba->dev_cmd.lock);
9629
Adrian Huntercd469472021-02-09 08:24:36 +02009630 /* Initialize mutex for exception event control */
9631 mutex_init(&hba->ee_ctrl_mutex);
9632
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08009633 init_rwsem(&hba->clk_scaling_lock);
9634
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03009635 ufshcd_init_clk_gating(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02009636
Vivek Gautameebcc192018-08-07 23:17:39 +05309637 ufshcd_init_clk_scaling(hba);
9638
Yaniv Gardi199ef132016-03-10 17:37:06 +02009639 /*
9640 * In order to avoid any spurious interrupt immediately after
9641 * registering UFS controller interrupt handler, clear any pending UFS
9642 * interrupt status and disable all the UFS interrupts.
9643 */
9644 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
9645 REG_INTERRUPT_STATUS);
9646 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
9647 /*
9648 * Make sure that UFS interrupts are disabled and any pending interrupt
9649 * status is cleared before registering UFS interrupt handler.
9650 */
9651 mb();
9652
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309653 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09009654 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309655 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309656 dev_err(hba->dev, "request irq failed\n");
Can Guo4543d9d2021-01-20 02:04:22 -08009657 goto out_disable;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009658 } else {
9659 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309660 }
9661
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309662 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309663 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309664 dev_err(hba->dev, "scsi_add_host failed\n");
Can Guo4543d9d2021-01-20 02:04:22 -08009665 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309666 }
9667
Bart Van Assche7252a362019-12-09 10:13:08 -08009668 hba->cmd_queue = blk_mq_init_queue(&hba->host->tag_set);
9669 if (IS_ERR(hba->cmd_queue)) {
9670 err = PTR_ERR(hba->cmd_queue);
9671 goto out_remove_scsi_host;
9672 }
9673
Bart Van Assche69a6c262019-12-09 10:13:09 -08009674 hba->tmf_tag_set = (struct blk_mq_tag_set) {
9675 .nr_hw_queues = 1,
9676 .queue_depth = hba->nutmrs,
9677 .ops = &ufshcd_tmf_ops,
9678 .flags = BLK_MQ_F_NO_SCHED,
9679 };
9680 err = blk_mq_alloc_tag_set(&hba->tmf_tag_set);
9681 if (err < 0)
9682 goto free_cmd_queue;
9683 hba->tmf_queue = blk_mq_init_queue(&hba->tmf_tag_set);
9684 if (IS_ERR(hba->tmf_queue)) {
9685 err = PTR_ERR(hba->tmf_queue);
9686 goto free_tmf_tag_set;
9687 }
9688
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07009689 /* Reset the attached device */
Stanley Chu31a5d9c2020-12-08 21:56:35 +08009690 ufshcd_device_reset(hba);
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07009691
Satya Tangiraladf043c742020-07-06 20:04:14 +00009692 ufshcd_init_crypto(hba);
9693
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309694 /* Host controller enable */
9695 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309696 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309697 dev_err(hba->dev, "Host controller enable failed\n");
Stanley Chue965e5e2020-12-05 19:58:59 +08009698 ufshcd_print_evt_hist(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08009699 ufshcd_print_host_state(hba);
Bart Van Assche69a6c262019-12-09 10:13:09 -08009700 goto free_tmf_queue;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309701 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309702
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -08009703 /*
9704 * Set the default power management level for runtime and system PM.
9705 * Default power saving mode is to keep UFS link in Hibern8 state
9706 * and UFS device in sleep state.
9707 */
9708 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9709 UFS_SLEEP_PWR_MODE,
9710 UIC_LINK_HIBERN8_STATE);
9711 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
9712 UFS_SLEEP_PWR_MODE,
9713 UIC_LINK_HIBERN8_STATE);
9714
Stanley Chu51dd9052020-05-22 16:32:12 +08009715 INIT_DELAYED_WORK(&hba->rpm_dev_flush_recheck_work,
9716 ufshcd_rpm_dev_flush_recheck_work);
9717
Adrian Hunterad448372018-03-20 15:07:38 +02009718 /* Set the default auto-hiberate idle timer value to 150 ms */
Stanley Chuf571b372019-05-21 14:44:53 +08009719 if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
Adrian Hunterad448372018-03-20 15:07:38 +02009720 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
9721 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
9722 }
9723
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05309724 /* Hold auto suspend until async scan completes */
9725 pm_runtime_get_sync(dev);
Subhash Jadavani38135532018-05-03 16:37:18 +05309726 atomic_set(&hba->scsi_block_reqs_cnt, 0);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009727 /*
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08009728 * We are assuming that device wasn't put in sleep/power-down
9729 * state exclusively during the boot stage before kernel.
9730 * This assumption helps avoid doing link startup twice during
9731 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009732 */
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08009733 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009734
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309735 async_schedule(ufshcd_async_scan, hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02009736 ufs_sysfs_add_nodes(hba->dev);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05309737
Vincent Palomares10845142021-07-27 18:27:43 -07009738 device_enable_async_suspend(dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309739 return 0;
9740
Bart Van Assche69a6c262019-12-09 10:13:09 -08009741free_tmf_queue:
9742 blk_cleanup_queue(hba->tmf_queue);
9743free_tmf_tag_set:
9744 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08009745free_cmd_queue:
9746 blk_cleanup_queue(hba->cmd_queue);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309747out_remove_scsi_host:
9748 scsi_remove_host(hba->host);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309749out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03009750 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03009751 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309752out_error:
9753 return err;
9754}
9755EXPORT_SYMBOL_GPL(ufshcd_init);
9756
Asutosh Dasb294ff32021-04-23 17:20:16 -07009757void ufshcd_resume_complete(struct device *dev)
9758{
9759 struct ufs_hba *hba = dev_get_drvdata(dev);
9760
9761 if (hba->complete_put) {
9762 ufshcd_rpm_put(hba);
9763 hba->complete_put = false;
9764 }
9765 if (hba->rpmb_complete_put) {
9766 ufshcd_rpmb_rpm_put(hba);
9767 hba->rpmb_complete_put = false;
9768 }
9769}
9770EXPORT_SYMBOL_GPL(ufshcd_resume_complete);
9771
9772int ufshcd_suspend_prepare(struct device *dev)
9773{
9774 struct ufs_hba *hba = dev_get_drvdata(dev);
9775 int ret;
9776
9777 /*
9778 * SCSI assumes that runtime-pm and system-pm for scsi drivers
9779 * are same. And it doesn't wake up the device for system-suspend
9780 * if it's runtime suspended. But ufs doesn't follow that.
9781 * Refer ufshcd_resume_complete()
9782 */
9783 if (hba->sdev_ufs_device) {
9784 ret = ufshcd_rpm_get_sync(hba);
9785 if (ret < 0 && ret != -EACCES) {
9786 ufshcd_rpm_put(hba);
9787 return ret;
9788 }
9789 hba->complete_put = true;
9790 }
9791 if (hba->sdev_rpmb) {
9792 ufshcd_rpmb_rpm_get_sync(hba);
9793 hba->rpmb_complete_put = true;
9794 }
9795 return 0;
9796}
9797EXPORT_SYMBOL_GPL(ufshcd_suspend_prepare);
9798
9799#ifdef CONFIG_PM_SLEEP
9800static int ufshcd_wl_poweroff(struct device *dev)
9801{
9802 struct scsi_device *sdev = to_scsi_device(dev);
9803 struct ufs_hba *hba = shost_priv(sdev->host);
9804
9805 __ufshcd_wl_suspend(hba, UFS_SHUTDOWN_PM);
9806 return 0;
9807}
9808#endif
9809
9810static int ufshcd_wl_probe(struct device *dev)
9811{
9812 struct scsi_device *sdev = to_scsi_device(dev);
9813
9814 if (!is_device_wlun(sdev))
9815 return -ENODEV;
9816
9817 blk_pm_runtime_init(sdev->request_queue, dev);
9818 pm_runtime_set_autosuspend_delay(dev, 0);
9819 pm_runtime_allow(dev);
9820
9821 return 0;
9822}
9823
9824static int ufshcd_wl_remove(struct device *dev)
9825{
9826 pm_runtime_forbid(dev);
9827 return 0;
9828}
9829
9830static const struct dev_pm_ops ufshcd_wl_pm_ops = {
9831#ifdef CONFIG_PM_SLEEP
9832 .suspend = ufshcd_wl_suspend,
9833 .resume = ufshcd_wl_resume,
9834 .freeze = ufshcd_wl_suspend,
9835 .thaw = ufshcd_wl_resume,
9836 .poweroff = ufshcd_wl_poweroff,
9837 .restore = ufshcd_wl_resume,
9838#endif
9839 SET_RUNTIME_PM_OPS(ufshcd_wl_runtime_suspend, ufshcd_wl_runtime_resume, NULL)
9840};
9841
9842/*
9843 * ufs_dev_wlun_template - describes ufs device wlun
9844 * ufs-device wlun - used to send pm commands
9845 * All luns are consumers of ufs-device wlun.
9846 *
9847 * Currently, no sd driver is present for wluns.
9848 * Hence the no specific pm operations are performed.
9849 * With ufs design, SSU should be sent to ufs-device wlun.
9850 * Hence register a scsi driver for ufs wluns only.
9851 */
9852static struct scsi_driver ufs_dev_wlun_template = {
9853 .gendrv = {
9854 .name = "ufs_device_wlun",
9855 .owner = THIS_MODULE,
9856 .probe = ufshcd_wl_probe,
9857 .remove = ufshcd_wl_remove,
9858 .pm = &ufshcd_wl_pm_ops,
9859 .shutdown = ufshcd_wl_shutdown,
9860 },
9861};
9862
9863static int ufshcd_rpmb_probe(struct device *dev)
9864{
9865 return is_rpmb_wlun(to_scsi_device(dev)) ? 0 : -ENODEV;
9866}
9867
9868static inline int ufshcd_clear_rpmb_uac(struct ufs_hba *hba)
9869{
9870 int ret = 0;
9871
9872 if (!hba->wlun_rpmb_clr_ua)
9873 return 0;
9874 ret = ufshcd_clear_ua_wlun(hba, UFS_UPIU_RPMB_WLUN);
9875 if (!ret)
9876 hba->wlun_rpmb_clr_ua = 0;
9877 return ret;
9878}
9879
YueHaibing75d645a2021-06-17 11:13:26 +08009880#ifdef CONFIG_PM
Asutosh Dasb294ff32021-04-23 17:20:16 -07009881static int ufshcd_rpmb_resume(struct device *dev)
9882{
9883 struct ufs_hba *hba = wlun_dev_to_hba(dev);
9884
9885 if (hba->sdev_rpmb)
9886 ufshcd_clear_rpmb_uac(hba);
9887 return 0;
9888}
YueHaibing75d645a2021-06-17 11:13:26 +08009889#endif
Asutosh Dasb294ff32021-04-23 17:20:16 -07009890
9891static const struct dev_pm_ops ufs_rpmb_pm_ops = {
9892 SET_RUNTIME_PM_OPS(NULL, ufshcd_rpmb_resume, NULL)
9893 SET_SYSTEM_SLEEP_PM_OPS(NULL, ufshcd_rpmb_resume)
9894};
9895
Bean Huof6b41422021-05-31 18:31:22 +02009896/* ufs_rpmb_wlun_template - Describes UFS RPMB WLUN. Used only to send UAC. */
Asutosh Dasb294ff32021-04-23 17:20:16 -07009897static struct scsi_driver ufs_rpmb_wlun_template = {
9898 .gendrv = {
9899 .name = "ufs_rpmb_wlun",
9900 .owner = THIS_MODULE,
9901 .probe = ufshcd_rpmb_probe,
9902 .pm = &ufs_rpmb_pm_ops,
9903 },
9904};
9905
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02009906static int __init ufshcd_core_init(void)
9907{
Asutosh Dasb294ff32021-04-23 17:20:16 -07009908 int ret;
9909
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02009910 ufs_debugfs_init();
Asutosh Dasb294ff32021-04-23 17:20:16 -07009911
9912 ret = scsi_register_driver(&ufs_dev_wlun_template.gendrv);
9913 if (ret)
9914 goto debugfs_exit;
9915
9916 ret = scsi_register_driver(&ufs_rpmb_wlun_template.gendrv);
9917 if (ret)
9918 goto unregister;
9919
9920 return ret;
9921unregister:
9922 scsi_unregister_driver(&ufs_dev_wlun_template.gendrv);
9923debugfs_exit:
9924 ufs_debugfs_exit();
9925 return ret;
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02009926}
9927
9928static void __exit ufshcd_core_exit(void)
9929{
9930 ufs_debugfs_exit();
Asutosh Dasb294ff32021-04-23 17:20:16 -07009931 scsi_unregister_driver(&ufs_rpmb_wlun_template.gendrv);
9932 scsi_unregister_driver(&ufs_dev_wlun_template.gendrv);
Adrian Hunterb6cacaf2021-01-07 09:25:38 +02009933}
9934
9935module_init(ufshcd_core_init);
9936module_exit(ufshcd_core_exit);
9937
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05309938MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
9939MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05309940MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05309941MODULE_LICENSE("GPL");
9942MODULE_VERSION(UFSHCD_DRIVER_VERSION);