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Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05302 * Universal Flash Storage Host controller driver Core
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303 *
4 * This code is based on drivers/scsi/ufs/ufshcd.c
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053011 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053016 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053018 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053024 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030035 *
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053038 */
39
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053040#include <linux/async.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030041#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020042#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020043#include <linux/of.h>
Adrian Hunterad448372018-03-20 15:07:38 +020044#include <linux/bitfield.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053045#include "ufshcd.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020046#include "ufs_quirks.h"
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +053047#include "unipro.h"
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +020048#include "ufs-sysfs.h"
Avri Altmandf032bf2018-10-07 17:30:35 +030049#include "ufs_bsg.h"
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053050
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -080051#define CREATE_TRACE_POINTS
52#include <trace/events/ufs.h>
53
Gilad Bronerdcea0bf2016-10-17 17:09:48 -070054#define UFSHCD_REQ_SENSE_SIZE 18
55
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053056#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
57 UTP_TASK_REQ_COMPL |\
58 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053059/* UIC command timeout, unit: ms */
60#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053061
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053062/* NOP OUT retries waiting for NOP IN response */
63#define NOP_OUT_RETRIES 10
64/* Timeout after 30 msecs if NOP OUT hangs without response */
65#define NOP_OUT_TIMEOUT 30 /* msecs */
66
Dolev Raviv68078d52013-07-30 00:35:58 +053067/* Query request retries */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080068#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +053069/* Query request timeout */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080070#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +053071
Sujit Reddy Thummae2933132014-05-26 10:59:12 +053072/* Task management command timeout */
73#define TM_CMD_TIMEOUT 100 /* msecs */
74
Yaniv Gardi64238fb2016-02-01 15:02:43 +020075/* maximum number of retries for a general UIC command */
76#define UFS_UIC_COMMAND_RETRIES 3
77
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030078/* maximum number of link-startup retries */
79#define DME_LINKSTARTUP_RETRIES 3
80
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +020081/* Maximum retries for Hibern8 enter */
82#define UIC_HIBERN8_ENTER_RETRIES 3
83
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030084/* maximum number of reset retries before giving up */
85#define MAX_HOST_RESET_RETRIES 5
86
Dolev Raviv68078d52013-07-30 00:35:58 +053087/* Expose the flag value from utp_upiu_query.value */
88#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
89
Seungwon Jeon7d568652013-08-31 21:40:20 +053090/* Interrupt aggregation default timeout, unit: 40us */
91#define INT_AGGR_DEF_TO 0x02
92
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030093#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
94 ({ \
95 int _ret; \
96 if (_on) \
97 _ret = ufshcd_enable_vreg(_dev, _vreg); \
98 else \
99 _ret = ufshcd_disable_vreg(_dev, _vreg); \
100 _ret; \
101 })
102
Tomas Winklerba809172018-06-14 11:14:09 +0300103#define ufshcd_hex_dump(prefix_str, buf, len) do { \
104 size_t __len = (len); \
105 print_hex_dump(KERN_ERR, prefix_str, \
106 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
107 16, 4, buf, __len, false); \
108} while (0)
109
110int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
111 const char *prefix)
112{
113 u8 *regs;
114
115 regs = kzalloc(len, GFP_KERNEL);
116 if (!regs)
117 return -ENOMEM;
118
119 memcpy_fromio(regs, hba->mmio_base + offset, len);
120 ufshcd_hex_dump(prefix, regs, len);
121 kfree(regs);
122
123 return 0;
124}
125EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800126
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530127enum {
128 UFSHCD_MAX_CHANNEL = 0,
129 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530130 UFSHCD_CMD_PER_LUN = 32,
131 UFSHCD_CAN_QUEUE = 32,
132};
133
134/* UFSHCD states */
135enum {
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530136 UFSHCD_STATE_RESET,
137 UFSHCD_STATE_ERROR,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530138 UFSHCD_STATE_OPERATIONAL,
Zang Leigang141f8162016-11-16 11:29:37 +0800139 UFSHCD_STATE_EH_SCHEDULED,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530140};
141
142/* UFSHCD error handling flags */
143enum {
144 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530145};
146
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530147/* UFSHCD UIC layer error flags */
148enum {
149 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200150 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
151 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
152 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
153 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
154 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530155};
156
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530157#define ufshcd_set_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300158 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530159#define ufshcd_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300160 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530161#define ufshcd_clear_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300162 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530163
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300164#define ufshcd_set_ufs_dev_active(h) \
165 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
166#define ufshcd_set_ufs_dev_sleep(h) \
167 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
168#define ufshcd_set_ufs_dev_poweroff(h) \
169 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
170#define ufshcd_is_ufs_dev_active(h) \
171 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
172#define ufshcd_is_ufs_dev_sleep(h) \
173 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
174#define ufshcd_is_ufs_dev_poweroff(h) \
175 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
176
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +0200177struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300178 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
179 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
180 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
181 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
182 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
183 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
184};
185
186static inline enum ufs_dev_pwr_mode
187ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
188{
189 return ufs_pm_lvl_states[lvl].dev_state;
190}
191
192static inline enum uic_link_state
193ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
194{
195 return ufs_pm_lvl_states[lvl].link_state;
196}
197
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -0800198static inline enum ufs_pm_level
199ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
200 enum uic_link_state link_state)
201{
202 enum ufs_pm_level lvl;
203
204 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
205 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
206 (ufs_pm_lvl_states[lvl].link_state == link_state))
207 return lvl;
208 }
209
210 /* if no match found, return the level 0 */
211 return UFS_PM_LVL_0;
212}
213
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800214static struct ufs_dev_fix ufs_fixups[] = {
215 /* UFS cards deviations table */
216 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
217 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
218 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
219 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
220 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
221 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
222 UFS_DEVICE_NO_FASTAUTO),
223 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
224 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
225 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
226 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
227 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
228 UFS_DEVICE_QUIRK_PA_TACTIVATE),
229 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
230 UFS_DEVICE_QUIRK_PA_TACTIVATE),
231 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
232 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
233 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
234
235 END_FIX
236};
237
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530238static void ufshcd_tmc_handler(struct ufs_hba *hba);
239static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530240static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Dolev Ravive7d38252016-12-22 18:40:07 -0800241static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530242static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300243static void ufshcd_hba_exit(struct ufs_hba *hba);
244static int ufshcd_probe_hba(struct ufs_hba *hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300245static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
246 bool skip_ref_clk);
247static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
Yaniv Gardi60f01872016-03-10 17:37:11 +0200248static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300249static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
250static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300251static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300252static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800253static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
254static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800255static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800256static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300257static irqreturn_t ufshcd_intr(int irq, void *__hba);
Yaniv Gardi874237f2015-05-17 18:55:03 +0300258static int ufshcd_change_power_mode(struct ufs_hba *hba,
259 struct ufs_pa_layer_attr *pwr_mode);
Yaniv Gardi14497322016-02-01 15:02:39 +0200260static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
261{
262 return tag >= 0 && tag < hba->nutrs;
263}
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300264
265static inline int ufshcd_enable_irq(struct ufs_hba *hba)
266{
267 int ret = 0;
268
269 if (!hba->is_irq_enabled) {
270 ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
271 hba);
272 if (ret)
273 dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
274 __func__, ret);
275 hba->is_irq_enabled = true;
276 }
277
278 return ret;
279}
280
281static inline void ufshcd_disable_irq(struct ufs_hba *hba)
282{
283 if (hba->is_irq_enabled) {
284 free_irq(hba->irq, hba);
285 hba->is_irq_enabled = false;
286 }
287}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530288
Subhash Jadavani38135532018-05-03 16:37:18 +0530289static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
290{
291 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
292 scsi_unblock_requests(hba->host);
293}
294
295static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
296{
297 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
298 scsi_block_requests(hba->host);
299}
300
Yaniv Gardib573d482016-03-10 17:37:09 +0200301/* replace non-printable or non-ASCII characters with spaces */
302static inline void ufshcd_remove_non_printable(char *val)
303{
304 if (!val)
305 return;
306
307 if (*val < 0x20 || *val > 0x7e)
308 *val = ' ';
309}
310
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300311static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
312 const char *str)
313{
314 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
315
316 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
317}
318
319static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
320 const char *str)
321{
322 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
323
324 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
325}
326
327static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
328 const char *str)
329{
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300330 int off = (int)tag - hba->nutrs;
Christoph Hellwig391e3882018-10-07 17:30:32 +0300331 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300332
Christoph Hellwig391e3882018-10-07 17:30:32 +0300333 trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
334 &descp->input_param1);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300335}
336
Lee Susman1a07f2d2016-12-22 18:42:03 -0800337static void ufshcd_add_command_trace(struct ufs_hba *hba,
338 unsigned int tag, const char *str)
339{
340 sector_t lba = -1;
341 u8 opcode = 0;
342 u32 intr, doorbell;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300343 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
Lee Susman1a07f2d2016-12-22 18:42:03 -0800344 int transfer_len = -1;
345
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300346 if (!trace_ufshcd_command_enabled()) {
347 /* trace UPIU W/O tracing command */
348 if (lrbp->cmd)
349 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800350 return;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300351 }
Lee Susman1a07f2d2016-12-22 18:42:03 -0800352
353 if (lrbp->cmd) { /* data phase exists */
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300354 /* trace UPIU also */
355 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800356 opcode = (u8)(*lrbp->cmd->cmnd);
357 if ((opcode == READ_10) || (opcode == WRITE_10)) {
358 /*
359 * Currently we only fully trace read(10) and write(10)
360 * commands
361 */
362 if (lrbp->cmd->request && lrbp->cmd->request->bio)
363 lba =
364 lrbp->cmd->request->bio->bi_iter.bi_sector;
365 transfer_len = be32_to_cpu(
366 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
367 }
368 }
369
370 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
371 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
372 trace_ufshcd_command(dev_name(hba->dev), str, tag,
373 doorbell, transfer_len, intr, lba, opcode);
374}
375
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800376static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
377{
378 struct ufs_clk_info *clki;
379 struct list_head *head = &hba->clk_list_head;
380
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300381 if (list_empty(head))
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800382 return;
383
384 list_for_each_entry(clki, head, list) {
385 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
386 clki->max_freq)
387 dev_err(hba->dev, "clk: %s, rate: %u\n",
388 clki->name, clki->curr_freq);
389 }
390}
391
392static void ufshcd_print_uic_err_hist(struct ufs_hba *hba,
393 struct ufs_uic_err_reg_hist *err_hist, char *err_name)
394{
395 int i;
396
397 for (i = 0; i < UIC_ERR_REG_HIST_LENGTH; i++) {
398 int p = (i + err_hist->pos - 1) % UIC_ERR_REG_HIST_LENGTH;
399
400 if (err_hist->reg[p] == 0)
401 continue;
402 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, i,
403 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
404 }
405}
406
Dolev Raviv66cc8202016-12-22 18:39:42 -0800407static void ufshcd_print_host_regs(struct ufs_hba *hba)
408{
Tomas Winklerba809172018-06-14 11:14:09 +0300409 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
Dolev Raviv66cc8202016-12-22 18:39:42 -0800410 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
411 hba->ufs_version, hba->capabilities);
412 dev_err(hba->dev,
413 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
414 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800415 dev_err(hba->dev,
416 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
417 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
418 hba->ufs_stats.hibern8_exit_cnt);
419
420 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
421 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
422 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
423 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
424 ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
425
426 ufshcd_print_clk_freqs(hba);
427
428 if (hba->vops && hba->vops->dbg_register_dump)
429 hba->vops->dbg_register_dump(hba);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800430}
431
432static
433void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
434{
435 struct ufshcd_lrb *lrbp;
Gilad Broner7fabb772017-02-03 16:56:50 -0800436 int prdt_length;
Dolev Raviv66cc8202016-12-22 18:39:42 -0800437 int tag;
438
439 for_each_set_bit(tag, &bitmap, hba->nutrs) {
440 lrbp = &hba->lrb[tag];
441
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800442 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
443 tag, ktime_to_us(lrbp->issue_time_stamp));
Zang Leigang09017182017-09-27 10:06:06 +0800444 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
445 tag, ktime_to_us(lrbp->compl_time_stamp));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800446 dev_err(hba->dev,
447 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
448 tag, (u64)lrbp->utrd_dma_addr);
449
Dolev Raviv66cc8202016-12-22 18:39:42 -0800450 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
451 sizeof(struct utp_transfer_req_desc));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800452 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
453 (u64)lrbp->ucd_req_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800454 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
455 sizeof(struct utp_upiu_req));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800456 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
457 (u64)lrbp->ucd_rsp_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800458 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
459 sizeof(struct utp_upiu_rsp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800460
Gilad Broner7fabb772017-02-03 16:56:50 -0800461 prdt_length = le16_to_cpu(
462 lrbp->utr_descriptor_ptr->prd_table_length);
463 dev_err(hba->dev,
464 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
465 tag, prdt_length,
466 (u64)lrbp->ucd_prdt_dma_addr);
467
468 if (pr_prdt)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800469 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
Gilad Broner7fabb772017-02-03 16:56:50 -0800470 sizeof(struct ufshcd_sg_entry) * prdt_length);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800471 }
472}
473
474static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
475{
Dolev Raviv66cc8202016-12-22 18:39:42 -0800476 int tag;
477
478 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
Christoph Hellwig391e3882018-10-07 17:30:32 +0300479 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
480
Dolev Raviv66cc8202016-12-22 18:39:42 -0800481 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
Christoph Hellwig391e3882018-10-07 17:30:32 +0300482 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800483 }
484}
485
Gilad Broner6ba65582017-02-03 16:57:28 -0800486static void ufshcd_print_host_state(struct ufs_hba *hba)
487{
488 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
489 dev_err(hba->dev, "lrb in use=0x%lx, outstanding reqs=0x%lx tasks=0x%lx\n",
Zang Leigange002e652017-08-24 10:57:15 +0800490 hba->lrb_in_use, hba->outstanding_reqs, hba->outstanding_tasks);
Gilad Broner6ba65582017-02-03 16:57:28 -0800491 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
492 hba->saved_err, hba->saved_uic_err);
493 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
494 hba->curr_dev_pwr_mode, hba->uic_link_state);
495 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
496 hba->pm_op_in_progress, hba->is_sys_suspended);
497 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
498 hba->auto_bkops_enabled, hba->host->host_self_blocked);
499 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
500 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
501 hba->eh_flags, hba->req_abort_count);
502 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
503 hba->capabilities, hba->caps);
504 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
505 hba->dev_quirks);
506}
507
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800508/**
509 * ufshcd_print_pwr_info - print power params as saved in hba
510 * power info
511 * @hba: per-adapter instance
512 */
513static void ufshcd_print_pwr_info(struct ufs_hba *hba)
514{
515 static const char * const names[] = {
516 "INVALID MODE",
517 "FAST MODE",
518 "SLOW_MODE",
519 "INVALID MODE",
520 "FASTAUTO_MODE",
521 "SLOWAUTO_MODE",
522 "INVALID MODE",
523 };
524
525 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
526 __func__,
527 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
528 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
529 names[hba->pwr_info.pwr_rx],
530 names[hba->pwr_info.pwr_tx],
531 hba->pwr_info.hs_rate);
532}
533
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530534/*
535 * ufshcd_wait_for_register - wait for register value to change
536 * @hba - per-adapter interface
537 * @reg - mmio register offset
538 * @mask - mask to apply to read register value
539 * @val - wait condition
540 * @interval_us - polling interval in microsecs
541 * @timeout_ms - timeout in millisecs
Yaniv Gardi596585a2016-03-10 17:37:08 +0200542 * @can_sleep - perform sleep or just spin
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530543 *
544 * Returns -ETIMEDOUT on error, zero on success
545 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200546int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
547 u32 val, unsigned long interval_us,
548 unsigned long timeout_ms, bool can_sleep)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530549{
550 int err = 0;
551 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
552
553 /* ignore bits that we don't intend to wait on */
554 val = val & mask;
555
556 while ((ufshcd_readl(hba, reg) & mask) != val) {
Yaniv Gardi596585a2016-03-10 17:37:08 +0200557 if (can_sleep)
558 usleep_range(interval_us, interval_us + 50);
559 else
560 udelay(interval_us);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530561 if (time_after(jiffies, timeout)) {
562 if ((ufshcd_readl(hba, reg) & mask) != val)
563 err = -ETIMEDOUT;
564 break;
565 }
566 }
567
568 return err;
569}
570
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530571/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530572 * ufshcd_get_intr_mask - Get the interrupt bit mask
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800573 * @hba: Pointer to adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530574 *
575 * Returns interrupt bit mask per version
576 */
577static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
578{
Yaniv Gardic01848c2016-12-05 19:25:02 -0800579 u32 intr_mask = 0;
580
581 switch (hba->ufs_version) {
582 case UFSHCI_VERSION_10:
583 intr_mask = INTERRUPT_MASK_ALL_VER_10;
584 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800585 case UFSHCI_VERSION_11:
586 case UFSHCI_VERSION_20:
587 intr_mask = INTERRUPT_MASK_ALL_VER_11;
588 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800589 case UFSHCI_VERSION_21:
590 default:
591 intr_mask = INTERRUPT_MASK_ALL_VER_21;
Tomohiro Kusumi031d1e02017-03-23 12:49:04 +0200592 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800593 }
594
595 return intr_mask;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530596}
597
598/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530599 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800600 * @hba: Pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530601 *
602 * Returns UFSHCI version supported by the controller
603 */
604static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
605{
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200606 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
607 return ufshcd_vops_get_ufs_hci_version(hba);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300608
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530609 return ufshcd_readl(hba, REG_UFS_VERSION);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530610}
611
612/**
613 * ufshcd_is_device_present - Check if any device connected to
614 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300615 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530616 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300617 * Returns true if device present, false if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530618 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300619static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530620{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300621 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300622 DEVICE_PRESENT) ? true : false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530623}
624
625/**
626 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800627 * @lrbp: pointer to local command reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530628 *
629 * This function is used to get the OCS field from UTRD
630 * Returns the OCS field in the UTRD
631 */
632static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
633{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530634 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530635}
636
637/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530638 * ufshcd_get_tm_free_slot - get a free slot for task management request
639 * @hba: per adapter instance
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530640 * @free_slot: pointer to variable with available slot value
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530641 *
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530642 * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
643 * Returns 0 if free slot is not available, else return 1 with tag value
644 * in @free_slot.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530645 */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530646static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530647{
Sujit Reddy Thummae2933132014-05-26 10:59:12 +0530648 int tag;
649 bool ret = false;
650
651 if (!free_slot)
652 goto out;
653
654 do {
655 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
656 if (tag >= hba->nutmrs)
657 goto out;
658 } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
659
660 *free_slot = tag;
661 ret = true;
662out:
663 return ret;
664}
665
666static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
667{
668 clear_bit_unlock(slot, &hba->tm_slots_in_use);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530669}
670
671/**
672 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
673 * @hba: per adapter instance
674 * @pos: position of the bit to be cleared
675 */
676static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
677{
Alim Akhtar1399c5b2018-05-06 15:44:15 +0530678 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
679 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
680 else
681 ufshcd_writel(hba, ~(1 << pos),
682 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
683}
684
685/**
686 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
687 * @hba: per adapter instance
688 * @pos: position of the bit to be cleared
689 */
690static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
691{
692 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
693 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
694 else
695 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530696}
697
698/**
Yaniv Gardia48353f2016-02-01 15:02:40 +0200699 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
700 * @hba: per adapter instance
701 * @tag: position of the bit to be cleared
702 */
703static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
704{
705 __clear_bit(tag, &hba->outstanding_reqs);
706}
707
708/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530709 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
710 * @reg: Register value of host controller status
711 *
712 * Returns integer, 0 on Success and positive value if failed
713 */
714static inline int ufshcd_get_lists_status(u32 reg)
715{
Tomohiro Kusumi6cf16112017-04-26 20:28:58 +0300716 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530717}
718
719/**
720 * ufshcd_get_uic_cmd_result - Get the UIC command result
721 * @hba: Pointer to adapter instance
722 *
723 * This function gets the result of UIC command completion
724 * Returns 0 on success, non zero value on error
725 */
726static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
727{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530728 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530729 MASK_UIC_COMMAND_RESULT;
730}
731
732/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530733 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
734 * @hba: Pointer to adapter instance
735 *
736 * This function gets UIC command argument3
737 * Returns 0 on success, non zero value on error
738 */
739static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
740{
741 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
742}
743
744/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530745 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530746 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530747 */
748static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530749ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530750{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530751 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530752}
753
754/**
755 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
756 * @ucd_rsp_ptr: pointer to response UPIU
757 *
758 * This function gets the response status and scsi_status from response UPIU
759 * Returns the response result code.
760 */
761static inline int
762ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
763{
764 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
765}
766
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530767/*
768 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
769 * from response UPIU
770 * @ucd_rsp_ptr: pointer to response UPIU
771 *
772 * Return the data segment length.
773 */
774static inline unsigned int
775ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
776{
777 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
778 MASK_RSP_UPIU_DATA_SEG_LEN;
779}
780
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530781/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530782 * ufshcd_is_exception_event - Check if the device raised an exception event
783 * @ucd_rsp_ptr: pointer to response UPIU
784 *
785 * The function checks if the device raised an exception event indicated in
786 * the Device Information field of response UPIU.
787 *
788 * Returns true if exception is raised, false otherwise.
789 */
790static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
791{
792 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
793 MASK_RSP_EXCEPTION_EVENT ? true : false;
794}
795
796/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530797 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530798 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530799 */
800static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530801ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530802{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530803 ufshcd_writel(hba, INT_AGGR_ENABLE |
804 INT_AGGR_COUNTER_AND_TIMER_RESET,
805 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
806}
807
808/**
809 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
810 * @hba: per adapter instance
811 * @cnt: Interrupt aggregation counter threshold
812 * @tmout: Interrupt aggregation timeout value
813 */
814static inline void
815ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
816{
817 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
818 INT_AGGR_COUNTER_THLD_VAL(cnt) |
819 INT_AGGR_TIMEOUT_VAL(tmout),
820 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530821}
822
823/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300824 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
825 * @hba: per adapter instance
826 */
827static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
828{
829 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
830}
831
832/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530833 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
834 * When run-stop registers are set to 1, it indicates the
835 * host controller that it can process the requests
836 * @hba: per adapter instance
837 */
838static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
839{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530840 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
841 REG_UTP_TASK_REQ_LIST_RUN_STOP);
842 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
843 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530844}
845
846/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530847 * ufshcd_hba_start - Start controller initialization sequence
848 * @hba: per adapter instance
849 */
850static inline void ufshcd_hba_start(struct ufs_hba *hba)
851{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530852 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530853}
854
855/**
856 * ufshcd_is_hba_active - Get controller state
857 * @hba: per adapter instance
858 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300859 * Returns false if controller is active, true otherwise
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530860 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300861static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530862{
Tomohiro Kusumi4a8eec22017-03-28 16:49:25 +0300863 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
864 ? false : true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530865}
866
Yaniv Gardi37113102016-03-10 17:37:16 +0200867u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
868{
869 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
870 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
871 (hba->ufs_version == UFSHCI_VERSION_11))
872 return UFS_UNIPRO_VER_1_41;
873 else
874 return UFS_UNIPRO_VER_1_6;
875}
876EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
877
878static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
879{
880 /*
881 * If both host and device support UniPro ver1.6 or later, PA layer
882 * parameters tuning happens during link startup itself.
883 *
884 * We can manually tune PA layer parameters if either host or device
885 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
886 * logic simple, we will only do manual tuning if local unipro version
887 * doesn't support ver1.6 or later.
888 */
889 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
890 return true;
891 else
892 return false;
893}
894
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800895static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
896{
897 int ret = 0;
898 struct ufs_clk_info *clki;
899 struct list_head *head = &hba->clk_list_head;
900 ktime_t start = ktime_get();
901 bool clk_state_changed = false;
902
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300903 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800904 goto out;
905
906 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
907 if (ret)
908 return ret;
909
910 list_for_each_entry(clki, head, list) {
911 if (!IS_ERR_OR_NULL(clki->clk)) {
912 if (scale_up && clki->max_freq) {
913 if (clki->curr_freq == clki->max_freq)
914 continue;
915
916 clk_state_changed = true;
917 ret = clk_set_rate(clki->clk, clki->max_freq);
918 if (ret) {
919 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
920 __func__, clki->name,
921 clki->max_freq, ret);
922 break;
923 }
924 trace_ufshcd_clk_scaling(dev_name(hba->dev),
925 "scaled up", clki->name,
926 clki->curr_freq,
927 clki->max_freq);
928
929 clki->curr_freq = clki->max_freq;
930
931 } else if (!scale_up && clki->min_freq) {
932 if (clki->curr_freq == clki->min_freq)
933 continue;
934
935 clk_state_changed = true;
936 ret = clk_set_rate(clki->clk, clki->min_freq);
937 if (ret) {
938 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
939 __func__, clki->name,
940 clki->min_freq, ret);
941 break;
942 }
943 trace_ufshcd_clk_scaling(dev_name(hba->dev),
944 "scaled down", clki->name,
945 clki->curr_freq,
946 clki->min_freq);
947 clki->curr_freq = clki->min_freq;
948 }
949 }
950 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
951 clki->name, clk_get_rate(clki->clk));
952 }
953
954 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
955
956out:
957 if (clk_state_changed)
958 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
959 (scale_up ? "up" : "down"),
960 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
961 return ret;
962}
963
964/**
965 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
966 * @hba: per adapter instance
967 * @scale_up: True if scaling up and false if scaling down
968 *
969 * Returns true if scaling is required, false otherwise.
970 */
971static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
972 bool scale_up)
973{
974 struct ufs_clk_info *clki;
975 struct list_head *head = &hba->clk_list_head;
976
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300977 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800978 return false;
979
980 list_for_each_entry(clki, head, list) {
981 if (!IS_ERR_OR_NULL(clki->clk)) {
982 if (scale_up && clki->max_freq) {
983 if (clki->curr_freq == clki->max_freq)
984 continue;
985 return true;
986 } else if (!scale_up && clki->min_freq) {
987 if (clki->curr_freq == clki->min_freq)
988 continue;
989 return true;
990 }
991 }
992 }
993
994 return false;
995}
996
997static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
998 u64 wait_timeout_us)
999{
1000 unsigned long flags;
1001 int ret = 0;
1002 u32 tm_doorbell;
1003 u32 tr_doorbell;
1004 bool timeout = false, do_last_check = false;
1005 ktime_t start;
1006
1007 ufshcd_hold(hba, false);
1008 spin_lock_irqsave(hba->host->host_lock, flags);
1009 /*
1010 * Wait for all the outstanding tasks/transfer requests.
1011 * Verify by checking the doorbell registers are clear.
1012 */
1013 start = ktime_get();
1014 do {
1015 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1016 ret = -EBUSY;
1017 goto out;
1018 }
1019
1020 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1021 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1022 if (!tm_doorbell && !tr_doorbell) {
1023 timeout = false;
1024 break;
1025 } else if (do_last_check) {
1026 break;
1027 }
1028
1029 spin_unlock_irqrestore(hba->host->host_lock, flags);
1030 schedule();
1031 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1032 wait_timeout_us) {
1033 timeout = true;
1034 /*
1035 * We might have scheduled out for long time so make
1036 * sure to check if doorbells are cleared by this time
1037 * or not.
1038 */
1039 do_last_check = true;
1040 }
1041 spin_lock_irqsave(hba->host->host_lock, flags);
1042 } while (tm_doorbell || tr_doorbell);
1043
1044 if (timeout) {
1045 dev_err(hba->dev,
1046 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1047 __func__, tm_doorbell, tr_doorbell);
1048 ret = -EBUSY;
1049 }
1050out:
1051 spin_unlock_irqrestore(hba->host->host_lock, flags);
1052 ufshcd_release(hba);
1053 return ret;
1054}
1055
1056/**
1057 * ufshcd_scale_gear - scale up/down UFS gear
1058 * @hba: per adapter instance
1059 * @scale_up: True for scaling up gear and false for scaling down
1060 *
1061 * Returns 0 for success,
1062 * Returns -EBUSY if scaling can't happen at this time
1063 * Returns non-zero for any other errors
1064 */
1065static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1066{
1067 #define UFS_MIN_GEAR_TO_SCALE_DOWN UFS_HS_G1
1068 int ret = 0;
1069 struct ufs_pa_layer_attr new_pwr_info;
1070
1071 if (scale_up) {
1072 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1073 sizeof(struct ufs_pa_layer_attr));
1074 } else {
1075 memcpy(&new_pwr_info, &hba->pwr_info,
1076 sizeof(struct ufs_pa_layer_attr));
1077
1078 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1079 || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1080 /* save the current power mode */
1081 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1082 &hba->pwr_info,
1083 sizeof(struct ufs_pa_layer_attr));
1084
1085 /* scale down gear */
1086 new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1087 new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1088 }
1089 }
1090
1091 /* check if the power mode needs to be changed or not? */
1092 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1093
1094 if (ret)
1095 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1096 __func__, ret,
1097 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1098 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1099
1100 return ret;
1101}
1102
1103static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1104{
1105 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1106 int ret = 0;
1107 /*
1108 * make sure that there are no outstanding requests when
1109 * clock scaling is in progress
1110 */
Subhash Jadavani38135532018-05-03 16:37:18 +05301111 ufshcd_scsi_block_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001112 down_write(&hba->clk_scaling_lock);
1113 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1114 ret = -EBUSY;
1115 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301116 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001117 }
1118
1119 return ret;
1120}
1121
1122static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1123{
1124 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301125 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001126}
1127
1128/**
1129 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1130 * @hba: per adapter instance
1131 * @scale_up: True for scaling up and false for scalin down
1132 *
1133 * Returns 0 for success,
1134 * Returns -EBUSY if scaling can't happen at this time
1135 * Returns non-zero for any other errors
1136 */
1137static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1138{
1139 int ret = 0;
1140
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001141 /* let's not get into low power until clock scaling is completed */
1142 ufshcd_hold(hba, false);
1143
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001144 ret = ufshcd_clock_scaling_prepare(hba);
1145 if (ret)
1146 return ret;
1147
1148 /* scale down the gear before scaling down clocks */
1149 if (!scale_up) {
1150 ret = ufshcd_scale_gear(hba, false);
1151 if (ret)
1152 goto out;
1153 }
1154
1155 ret = ufshcd_scale_clks(hba, scale_up);
1156 if (ret) {
1157 if (!scale_up)
1158 ufshcd_scale_gear(hba, true);
1159 goto out;
1160 }
1161
1162 /* scale up the gear after scaling up clocks */
1163 if (scale_up) {
1164 ret = ufshcd_scale_gear(hba, true);
1165 if (ret) {
1166 ufshcd_scale_clks(hba, false);
1167 goto out;
1168 }
1169 }
1170
1171 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1172
1173out:
1174 ufshcd_clock_scaling_unprepare(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001175 ufshcd_release(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001176 return ret;
1177}
1178
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001179static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1180{
1181 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1182 clk_scaling.suspend_work);
1183 unsigned long irq_flags;
1184
1185 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1186 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1187 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1188 return;
1189 }
1190 hba->clk_scaling.is_suspended = true;
1191 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1192
1193 __ufshcd_suspend_clkscaling(hba);
1194}
1195
1196static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1197{
1198 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1199 clk_scaling.resume_work);
1200 unsigned long irq_flags;
1201
1202 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1203 if (!hba->clk_scaling.is_suspended) {
1204 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1205 return;
1206 }
1207 hba->clk_scaling.is_suspended = false;
1208 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1209
1210 devfreq_resume_device(hba->devfreq);
1211}
1212
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001213static int ufshcd_devfreq_target(struct device *dev,
1214 unsigned long *freq, u32 flags)
1215{
1216 int ret = 0;
1217 struct ufs_hba *hba = dev_get_drvdata(dev);
1218 ktime_t start;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001219 bool scale_up, sched_clk_scaling_suspend_work = false;
Bjorn Andersson092b4552018-05-17 23:26:37 -07001220 struct list_head *clk_list = &hba->clk_list_head;
1221 struct ufs_clk_info *clki;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001222 unsigned long irq_flags;
1223
1224 if (!ufshcd_is_clkscaling_supported(hba))
1225 return -EINVAL;
1226
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001227 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1228 if (ufshcd_eh_in_progress(hba)) {
1229 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1230 return 0;
1231 }
1232
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001233 if (!hba->clk_scaling.active_reqs)
1234 sched_clk_scaling_suspend_work = true;
1235
Bjorn Andersson092b4552018-05-17 23:26:37 -07001236 if (list_empty(clk_list)) {
1237 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1238 goto out;
1239 }
1240
1241 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1242 scale_up = (*freq == clki->max_freq) ? true : false;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001243 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1244 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1245 ret = 0;
1246 goto out; /* no state change required */
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001247 }
1248 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1249
1250 start = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001251 ret = ufshcd_devfreq_scale(hba, scale_up);
1252
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001253 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1254 (scale_up ? "up" : "down"),
1255 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1256
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001257out:
1258 if (sched_clk_scaling_suspend_work)
1259 queue_work(hba->clk_scaling.workq,
1260 &hba->clk_scaling.suspend_work);
1261
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001262 return ret;
1263}
1264
1265
1266static int ufshcd_devfreq_get_dev_status(struct device *dev,
1267 struct devfreq_dev_status *stat)
1268{
1269 struct ufs_hba *hba = dev_get_drvdata(dev);
1270 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1271 unsigned long flags;
1272
1273 if (!ufshcd_is_clkscaling_supported(hba))
1274 return -EINVAL;
1275
1276 memset(stat, 0, sizeof(*stat));
1277
1278 spin_lock_irqsave(hba->host->host_lock, flags);
1279 if (!scaling->window_start_t)
1280 goto start_window;
1281
1282 if (scaling->is_busy_started)
1283 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1284 scaling->busy_start_t));
1285
1286 stat->total_time = jiffies_to_usecs((long)jiffies -
1287 (long)scaling->window_start_t);
1288 stat->busy_time = scaling->tot_busy_t;
1289start_window:
1290 scaling->window_start_t = jiffies;
1291 scaling->tot_busy_t = 0;
1292
1293 if (hba->outstanding_reqs) {
1294 scaling->busy_start_t = ktime_get();
1295 scaling->is_busy_started = true;
1296 } else {
1297 scaling->busy_start_t = 0;
1298 scaling->is_busy_started = false;
1299 }
1300 spin_unlock_irqrestore(hba->host->host_lock, flags);
1301 return 0;
1302}
1303
1304static struct devfreq_dev_profile ufs_devfreq_profile = {
1305 .polling_ms = 100,
1306 .target = ufshcd_devfreq_target,
1307 .get_dev_status = ufshcd_devfreq_get_dev_status,
1308};
1309
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001310static int ufshcd_devfreq_init(struct ufs_hba *hba)
1311{
Bjorn Andersson092b4552018-05-17 23:26:37 -07001312 struct list_head *clk_list = &hba->clk_list_head;
1313 struct ufs_clk_info *clki;
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001314 struct devfreq *devfreq;
1315 int ret;
1316
Bjorn Andersson092b4552018-05-17 23:26:37 -07001317 /* Skip devfreq if we don't have any clocks in the list */
1318 if (list_empty(clk_list))
1319 return 0;
1320
1321 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1322 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1323 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1324
1325 devfreq = devfreq_add_device(hba->dev,
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001326 &ufs_devfreq_profile,
1327 DEVFREQ_GOV_SIMPLE_ONDEMAND,
1328 NULL);
1329 if (IS_ERR(devfreq)) {
1330 ret = PTR_ERR(devfreq);
1331 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001332
1333 dev_pm_opp_remove(hba->dev, clki->min_freq);
1334 dev_pm_opp_remove(hba->dev, clki->max_freq);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001335 return ret;
1336 }
1337
1338 hba->devfreq = devfreq;
1339
1340 return 0;
1341}
1342
Bjorn Andersson092b4552018-05-17 23:26:37 -07001343static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1344{
1345 struct list_head *clk_list = &hba->clk_list_head;
1346 struct ufs_clk_info *clki;
1347
1348 if (!hba->devfreq)
1349 return;
1350
1351 devfreq_remove_device(hba->devfreq);
1352 hba->devfreq = NULL;
1353
1354 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1355 dev_pm_opp_remove(hba->dev, clki->min_freq);
1356 dev_pm_opp_remove(hba->dev, clki->max_freq);
1357}
1358
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001359static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1360{
1361 unsigned long flags;
1362
1363 devfreq_suspend_device(hba->devfreq);
1364 spin_lock_irqsave(hba->host->host_lock, flags);
1365 hba->clk_scaling.window_start_t = 0;
1366 spin_unlock_irqrestore(hba->host->host_lock, flags);
1367}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001368
Gilad Bronera5082532016-10-17 17:10:00 -07001369static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1370{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001371 unsigned long flags;
1372 bool suspend = false;
1373
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001374 if (!ufshcd_is_clkscaling_supported(hba))
1375 return;
1376
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001377 spin_lock_irqsave(hba->host->host_lock, flags);
1378 if (!hba->clk_scaling.is_suspended) {
1379 suspend = true;
1380 hba->clk_scaling.is_suspended = true;
1381 }
1382 spin_unlock_irqrestore(hba->host->host_lock, flags);
1383
1384 if (suspend)
1385 __ufshcd_suspend_clkscaling(hba);
Gilad Bronera5082532016-10-17 17:10:00 -07001386}
1387
1388static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1389{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001390 unsigned long flags;
1391 bool resume = false;
1392
1393 if (!ufshcd_is_clkscaling_supported(hba))
1394 return;
1395
1396 spin_lock_irqsave(hba->host->host_lock, flags);
1397 if (hba->clk_scaling.is_suspended) {
1398 resume = true;
1399 hba->clk_scaling.is_suspended = false;
1400 }
1401 spin_unlock_irqrestore(hba->host->host_lock, flags);
1402
1403 if (resume)
1404 devfreq_resume_device(hba->devfreq);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001405}
1406
1407static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1408 struct device_attribute *attr, char *buf)
1409{
1410 struct ufs_hba *hba = dev_get_drvdata(dev);
1411
1412 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1413}
1414
1415static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1416 struct device_attribute *attr, const char *buf, size_t count)
1417{
1418 struct ufs_hba *hba = dev_get_drvdata(dev);
1419 u32 value;
1420 int err;
1421
1422 if (kstrtou32(buf, 0, &value))
1423 return -EINVAL;
1424
1425 value = !!value;
1426 if (value == hba->clk_scaling.is_allowed)
1427 goto out;
1428
1429 pm_runtime_get_sync(hba->dev);
1430 ufshcd_hold(hba, false);
1431
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001432 cancel_work_sync(&hba->clk_scaling.suspend_work);
1433 cancel_work_sync(&hba->clk_scaling.resume_work);
1434
1435 hba->clk_scaling.is_allowed = value;
1436
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001437 if (value) {
1438 ufshcd_resume_clkscaling(hba);
1439 } else {
1440 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001441 err = ufshcd_devfreq_scale(hba, true);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001442 if (err)
1443 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1444 __func__, err);
1445 }
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001446
1447 ufshcd_release(hba);
1448 pm_runtime_put_sync(hba->dev);
1449out:
1450 return count;
Gilad Bronera5082532016-10-17 17:10:00 -07001451}
1452
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001453static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1454{
1455 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1456 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1457 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1458 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1459 hba->clk_scaling.enable_attr.attr.mode = 0644;
1460 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1461 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1462}
1463
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001464static void ufshcd_ungate_work(struct work_struct *work)
1465{
1466 int ret;
1467 unsigned long flags;
1468 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1469 clk_gating.ungate_work);
1470
1471 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1472
1473 spin_lock_irqsave(hba->host->host_lock, flags);
1474 if (hba->clk_gating.state == CLKS_ON) {
1475 spin_unlock_irqrestore(hba->host->host_lock, flags);
1476 goto unblock_reqs;
1477 }
1478
1479 spin_unlock_irqrestore(hba->host->host_lock, flags);
1480 ufshcd_setup_clocks(hba, true);
1481
1482 /* Exit from hibern8 */
1483 if (ufshcd_can_hibern8_during_gating(hba)) {
1484 /* Prevent gating in this path */
1485 hba->clk_gating.is_suspended = true;
1486 if (ufshcd_is_link_hibern8(hba)) {
1487 ret = ufshcd_uic_hibern8_exit(hba);
1488 if (ret)
1489 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1490 __func__, ret);
1491 else
1492 ufshcd_set_link_active(hba);
1493 }
1494 hba->clk_gating.is_suspended = false;
1495 }
1496unblock_reqs:
Subhash Jadavani38135532018-05-03 16:37:18 +05301497 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001498}
1499
1500/**
1501 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1502 * Also, exit from hibern8 mode and set the link as active.
1503 * @hba: per adapter instance
1504 * @async: This indicates whether caller should ungate clocks asynchronously.
1505 */
1506int ufshcd_hold(struct ufs_hba *hba, bool async)
1507{
1508 int rc = 0;
1509 unsigned long flags;
1510
1511 if (!ufshcd_is_clkgating_allowed(hba))
1512 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001513 spin_lock_irqsave(hba->host->host_lock, flags);
1514 hba->clk_gating.active_reqs++;
1515
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001516 if (ufshcd_eh_in_progress(hba)) {
1517 spin_unlock_irqrestore(hba->host->host_lock, flags);
1518 return 0;
1519 }
1520
Sahitya Tummala856b3482014-09-25 15:32:34 +03001521start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001522 switch (hba->clk_gating.state) {
1523 case CLKS_ON:
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001524 /*
1525 * Wait for the ungate work to complete if in progress.
1526 * Though the clocks may be in ON state, the link could
1527 * still be in hibner8 state if hibern8 is allowed
1528 * during clock gating.
1529 * Make sure we exit hibern8 state also in addition to
1530 * clocks being ON.
1531 */
1532 if (ufshcd_can_hibern8_during_gating(hba) &&
1533 ufshcd_is_link_hibern8(hba)) {
1534 spin_unlock_irqrestore(hba->host->host_lock, flags);
1535 flush_work(&hba->clk_gating.ungate_work);
1536 spin_lock_irqsave(hba->host->host_lock, flags);
1537 goto start;
1538 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001539 break;
1540 case REQ_CLKS_OFF:
1541 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1542 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001543 trace_ufshcd_clk_gating(dev_name(hba->dev),
1544 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001545 break;
1546 }
1547 /*
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +03001548 * If we are here, it means gating work is either done or
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001549 * currently running. Hence, fall through to cancel gating
1550 * work and to enable clocks.
1551 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001552 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001553 case CLKS_OFF:
Subhash Jadavani38135532018-05-03 16:37:18 +05301554 ufshcd_scsi_block_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001555 hba->clk_gating.state = REQ_CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001556 trace_ufshcd_clk_gating(dev_name(hba->dev),
1557 hba->clk_gating.state);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301558 queue_work(hba->clk_gating.clk_gating_workq,
1559 &hba->clk_gating.ungate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001560 /*
1561 * fall through to check if we should wait for this
1562 * work to be done or not.
1563 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001564 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001565 case REQ_CLKS_ON:
1566 if (async) {
1567 rc = -EAGAIN;
1568 hba->clk_gating.active_reqs--;
1569 break;
1570 }
1571
1572 spin_unlock_irqrestore(hba->host->host_lock, flags);
1573 flush_work(&hba->clk_gating.ungate_work);
1574 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001575 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001576 goto start;
1577 default:
1578 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1579 __func__, hba->clk_gating.state);
1580 break;
1581 }
1582 spin_unlock_irqrestore(hba->host->host_lock, flags);
1583out:
1584 return rc;
1585}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001586EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001587
1588static void ufshcd_gate_work(struct work_struct *work)
1589{
1590 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1591 clk_gating.gate_work.work);
1592 unsigned long flags;
1593
1594 spin_lock_irqsave(hba->host->host_lock, flags);
Venkat Gopalakrishnan3f0c06d2016-10-17 17:11:07 -07001595 /*
1596 * In case you are here to cancel this work the gating state
1597 * would be marked as REQ_CLKS_ON. In this case save time by
1598 * skipping the gating work and exit after changing the clock
1599 * state to CLKS_ON.
1600 */
1601 if (hba->clk_gating.is_suspended ||
1602 (hba->clk_gating.state == REQ_CLKS_ON)) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001603 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001604 trace_ufshcd_clk_gating(dev_name(hba->dev),
1605 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001606 goto rel_lock;
1607 }
1608
1609 if (hba->clk_gating.active_reqs
1610 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1611 || hba->lrb_in_use || hba->outstanding_tasks
1612 || hba->active_uic_cmd || hba->uic_async_done)
1613 goto rel_lock;
1614
1615 spin_unlock_irqrestore(hba->host->host_lock, flags);
1616
1617 /* put the link into hibern8 mode before turning off clocks */
1618 if (ufshcd_can_hibern8_during_gating(hba)) {
1619 if (ufshcd_uic_hibern8_enter(hba)) {
1620 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001621 trace_ufshcd_clk_gating(dev_name(hba->dev),
1622 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001623 goto out;
1624 }
1625 ufshcd_set_link_hibern8(hba);
1626 }
1627
1628 if (!ufshcd_is_link_active(hba))
1629 ufshcd_setup_clocks(hba, false);
1630 else
1631 /* If link is active, device ref_clk can't be switched off */
1632 __ufshcd_setup_clocks(hba, false, true);
1633
1634 /*
1635 * In case you are here to cancel this work the gating state
1636 * would be marked as REQ_CLKS_ON. In this case keep the state
1637 * as REQ_CLKS_ON which would anyway imply that clocks are off
1638 * and a request to turn them on is pending. By doing this way,
1639 * we keep the state machine in tact and this would ultimately
1640 * prevent from doing cancel work multiple times when there are
1641 * new requests arriving before the current cancel work is done.
1642 */
1643 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001644 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001645 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001646 trace_ufshcd_clk_gating(dev_name(hba->dev),
1647 hba->clk_gating.state);
1648 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001649rel_lock:
1650 spin_unlock_irqrestore(hba->host->host_lock, flags);
1651out:
1652 return;
1653}
1654
1655/* host lock must be held before calling this variant */
1656static void __ufshcd_release(struct ufs_hba *hba)
1657{
1658 if (!ufshcd_is_clkgating_allowed(hba))
1659 return;
1660
1661 hba->clk_gating.active_reqs--;
1662
1663 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1664 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1665 || hba->lrb_in_use || hba->outstanding_tasks
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001666 || hba->active_uic_cmd || hba->uic_async_done
1667 || ufshcd_eh_in_progress(hba))
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001668 return;
1669
1670 hba->clk_gating.state = REQ_CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001671 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Evan Greenf4bb7702018-10-05 10:27:32 -07001672 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1673 &hba->clk_gating.gate_work,
1674 msecs_to_jiffies(hba->clk_gating.delay_ms));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001675}
1676
1677void ufshcd_release(struct ufs_hba *hba)
1678{
1679 unsigned long flags;
1680
1681 spin_lock_irqsave(hba->host->host_lock, flags);
1682 __ufshcd_release(hba);
1683 spin_unlock_irqrestore(hba->host->host_lock, flags);
1684}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001685EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001686
1687static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1688 struct device_attribute *attr, char *buf)
1689{
1690 struct ufs_hba *hba = dev_get_drvdata(dev);
1691
1692 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1693}
1694
1695static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1696 struct device_attribute *attr, const char *buf, size_t count)
1697{
1698 struct ufs_hba *hba = dev_get_drvdata(dev);
1699 unsigned long flags, value;
1700
1701 if (kstrtoul(buf, 0, &value))
1702 return -EINVAL;
1703
1704 spin_lock_irqsave(hba->host->host_lock, flags);
1705 hba->clk_gating.delay_ms = value;
1706 spin_unlock_irqrestore(hba->host->host_lock, flags);
1707 return count;
1708}
1709
Sahitya Tummalab4274112016-12-22 18:40:39 -08001710static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1711 struct device_attribute *attr, char *buf)
1712{
1713 struct ufs_hba *hba = dev_get_drvdata(dev);
1714
1715 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1716}
1717
1718static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1719 struct device_attribute *attr, const char *buf, size_t count)
1720{
1721 struct ufs_hba *hba = dev_get_drvdata(dev);
1722 unsigned long flags;
1723 u32 value;
1724
1725 if (kstrtou32(buf, 0, &value))
1726 return -EINVAL;
1727
1728 value = !!value;
1729 if (value == hba->clk_gating.is_enabled)
1730 goto out;
1731
1732 if (value) {
1733 ufshcd_release(hba);
1734 } else {
1735 spin_lock_irqsave(hba->host->host_lock, flags);
1736 hba->clk_gating.active_reqs++;
1737 spin_unlock_irqrestore(hba->host->host_lock, flags);
1738 }
1739
1740 hba->clk_gating.is_enabled = value;
1741out:
1742 return count;
1743}
1744
Vivek Gautameebcc192018-08-07 23:17:39 +05301745static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1746{
1747 char wq_name[sizeof("ufs_clkscaling_00")];
1748
1749 if (!ufshcd_is_clkscaling_supported(hba))
1750 return;
1751
1752 INIT_WORK(&hba->clk_scaling.suspend_work,
1753 ufshcd_clk_scaling_suspend_work);
1754 INIT_WORK(&hba->clk_scaling.resume_work,
1755 ufshcd_clk_scaling_resume_work);
1756
1757 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1758 hba->host->host_no);
1759 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1760
1761 ufshcd_clkscaling_init_sysfs(hba);
1762}
1763
1764static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1765{
1766 if (!ufshcd_is_clkscaling_supported(hba))
1767 return;
1768
1769 destroy_workqueue(hba->clk_scaling.workq);
1770 ufshcd_devfreq_remove(hba);
1771}
1772
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001773static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1774{
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301775 char wq_name[sizeof("ufs_clk_gating_00")];
1776
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001777 if (!ufshcd_is_clkgating_allowed(hba))
1778 return;
1779
1780 hba->clk_gating.delay_ms = 150;
1781 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1782 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1783
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301784 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1785 hba->host->host_no);
1786 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1787 WQ_MEM_RECLAIM);
1788
Sahitya Tummalab4274112016-12-22 18:40:39 -08001789 hba->clk_gating.is_enabled = true;
1790
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001791 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1792 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1793 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1794 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
Sahitya Tummalab4274112016-12-22 18:40:39 -08001795 hba->clk_gating.delay_attr.attr.mode = 0644;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001796 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1797 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Sahitya Tummalab4274112016-12-22 18:40:39 -08001798
1799 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1800 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1801 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1802 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1803 hba->clk_gating.enable_attr.attr.mode = 0644;
1804 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1805 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001806}
1807
1808static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1809{
1810 if (!ufshcd_is_clkgating_allowed(hba))
1811 return;
1812 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001813 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001814 cancel_work_sync(&hba->clk_gating.ungate_work);
1815 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301816 destroy_workqueue(hba->clk_gating.clk_gating_workq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001817}
1818
Sahitya Tummala856b3482014-09-25 15:32:34 +03001819/* Must be called with host lock acquired */
1820static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1821{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001822 bool queue_resume_work = false;
1823
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001824 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001825 return;
1826
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001827 if (!hba->clk_scaling.active_reqs++)
1828 queue_resume_work = true;
1829
1830 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1831 return;
1832
1833 if (queue_resume_work)
1834 queue_work(hba->clk_scaling.workq,
1835 &hba->clk_scaling.resume_work);
1836
1837 if (!hba->clk_scaling.window_start_t) {
1838 hba->clk_scaling.window_start_t = jiffies;
1839 hba->clk_scaling.tot_busy_t = 0;
1840 hba->clk_scaling.is_busy_started = false;
1841 }
1842
Sahitya Tummala856b3482014-09-25 15:32:34 +03001843 if (!hba->clk_scaling.is_busy_started) {
1844 hba->clk_scaling.busy_start_t = ktime_get();
1845 hba->clk_scaling.is_busy_started = true;
1846 }
1847}
1848
1849static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1850{
1851 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1852
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001853 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001854 return;
1855
1856 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1857 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1858 scaling->busy_start_t));
Thomas Gleixner8b0e1952016-12-25 12:30:41 +01001859 scaling->busy_start_t = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03001860 scaling->is_busy_started = false;
1861 }
1862}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301863/**
1864 * ufshcd_send_command - Send SCSI or device management commands
1865 * @hba: per adapter instance
1866 * @task_tag: Task tag of the command
1867 */
1868static inline
1869void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1870{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08001871 hba->lrb[task_tag].issue_time_stamp = ktime_get();
Zang Leigang09017182017-09-27 10:06:06 +08001872 hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
Sahitya Tummala856b3482014-09-25 15:32:34 +03001873 ufshcd_clk_scaling_start_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301874 __set_bit(task_tag, &hba->outstanding_reqs);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301875 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07001876 /* Make sure that doorbell is committed immediately */
1877 wmb();
Lee Susman1a07f2d2016-12-22 18:42:03 -08001878 ufshcd_add_command_trace(hba, task_tag, "send");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301879}
1880
1881/**
1882 * ufshcd_copy_sense_data - Copy sense data in case of check condition
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001883 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301884 */
1885static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1886{
1887 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05301888 if (lrbp->sense_buffer &&
1889 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001890 int len_to_copy;
1891
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301892 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001893 len_to_copy = min_t(int, RESPONSE_UPIU_SENSE_DATA_LENGTH, len);
1894
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301895 memcpy(lrbp->sense_buffer,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301896 lrbp->ucd_rsp_ptr->sr.sense_data,
Gilad Bronerdcea0bf2016-10-17 17:09:48 -07001897 min_t(int, len_to_copy, UFSHCD_REQ_SENSE_SIZE));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301898 }
1899}
1900
1901/**
Dolev Raviv68078d52013-07-30 00:35:58 +05301902 * ufshcd_copy_query_response() - Copy the Query Response and the data
1903 * descriptor
1904 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001905 * @lrbp: pointer to local reference block
Dolev Raviv68078d52013-07-30 00:35:58 +05301906 */
1907static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001908int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05301909{
1910 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1911
Dolev Raviv68078d52013-07-30 00:35:58 +05301912 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05301913
Dolev Raviv68078d52013-07-30 00:35:58 +05301914 /* Get the descriptor */
1915 if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03001916 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05301917 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001918 u16 resp_len;
1919 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05301920
1921 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001922 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05301923 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03001924 buf_len = be16_to_cpu(
1925 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001926 if (likely(buf_len >= resp_len)) {
1927 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1928 } else {
1929 dev_warn(hba->dev,
1930 "%s: Response size is bigger than buffer",
1931 __func__);
1932 return -EINVAL;
1933 }
Dolev Raviv68078d52013-07-30 00:35:58 +05301934 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001935
1936 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05301937}
1938
1939/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301940 * ufshcd_hba_capabilities - Read controller capabilities
1941 * @hba: per adapter instance
1942 */
1943static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1944{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301945 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301946
1947 /* nutrs and nutmrs are 0 based values */
1948 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1949 hba->nutmrs =
1950 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1951}
1952
1953/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301954 * ufshcd_ready_for_uic_cmd - Check if controller is ready
1955 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301956 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301957 * Return true on success, else false
1958 */
1959static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1960{
1961 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1962 return true;
1963 else
1964 return false;
1965}
1966
1967/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05301968 * ufshcd_get_upmcrs - Get the power mode change request status
1969 * @hba: Pointer to adapter instance
1970 *
1971 * This function gets the UPMCRS field of HCS register
1972 * Returns value of UPMCRS field
1973 */
1974static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1975{
1976 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1977}
1978
1979/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301980 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1981 * @hba: per adapter instance
1982 * @uic_cmd: UIC command
1983 *
1984 * Mutex must be held.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301985 */
1986static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301987ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301988{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301989 WARN_ON(hba->active_uic_cmd);
1990
1991 hba->active_uic_cmd = uic_cmd;
1992
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301993 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301994 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
1995 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
1996 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301997
1998 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301999 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302000 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302001}
2002
2003/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302004 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2005 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002006 * @uic_cmd: UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302007 *
2008 * Must be called with mutex held.
2009 * Returns 0 only if success.
2010 */
2011static int
2012ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2013{
2014 int ret;
2015 unsigned long flags;
2016
2017 if (wait_for_completion_timeout(&uic_cmd->done,
2018 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2019 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2020 else
2021 ret = -ETIMEDOUT;
2022
2023 spin_lock_irqsave(hba->host->host_lock, flags);
2024 hba->active_uic_cmd = NULL;
2025 spin_unlock_irqrestore(hba->host->host_lock, flags);
2026
2027 return ret;
2028}
2029
2030/**
2031 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2032 * @hba: per adapter instance
2033 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002034 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302035 *
2036 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002037 * with mutex held and host_lock locked.
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302038 * Returns 0 only if success.
2039 */
2040static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002041__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2042 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302043{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302044 if (!ufshcd_ready_for_uic_cmd(hba)) {
2045 dev_err(hba->dev,
2046 "Controller not ready to accept UIC commands\n");
2047 return -EIO;
2048 }
2049
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002050 if (completion)
2051 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302052
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302053 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302054
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002055 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302056}
2057
2058/**
2059 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2060 * @hba: per adapter instance
2061 * @uic_cmd: UIC command
2062 *
2063 * Returns 0 only if success.
2064 */
Avri Altmane77044c52018-10-07 17:30:39 +03002065int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302066{
2067 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002068 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302069
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002070 ufshcd_hold(hba, false);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302071 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03002072 ufshcd_add_delay_before_dme_cmd(hba);
2073
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002074 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002075 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002076 spin_unlock_irqrestore(hba->host->host_lock, flags);
2077 if (!ret)
2078 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2079
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302080 mutex_unlock(&hba->uic_cmd_mutex);
2081
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002082 ufshcd_release(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302083 return ret;
2084}
2085
2086/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302087 * ufshcd_map_sg - Map scatter-gather list to prdt
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002088 * @hba: per adapter instance
2089 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302090 *
2091 * Returns 0 in case of success, non-zero value in case of failure
2092 */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002093static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302094{
2095 struct ufshcd_sg_entry *prd_table;
2096 struct scatterlist *sg;
2097 struct scsi_cmnd *cmd;
2098 int sg_segments;
2099 int i;
2100
2101 cmd = lrbp->cmd;
2102 sg_segments = scsi_dma_map(cmd);
2103 if (sg_segments < 0)
2104 return sg_segments;
2105
2106 if (sg_segments) {
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002107 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2108 lrbp->utr_descriptor_ptr->prd_table_length =
2109 cpu_to_le16((u16)(sg_segments *
2110 sizeof(struct ufshcd_sg_entry)));
2111 else
2112 lrbp->utr_descriptor_ptr->prd_table_length =
2113 cpu_to_le16((u16) (sg_segments));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302114
2115 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2116
2117 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2118 prd_table[i].size =
2119 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2120 prd_table[i].base_addr =
2121 cpu_to_le32(lower_32_bits(sg->dma_address));
2122 prd_table[i].upper_addr =
2123 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002124 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302125 }
2126 } else {
2127 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2128 }
2129
2130 return 0;
2131}
2132
2133/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302134 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302135 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302136 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302137 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302138static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302139{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302140 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2141
2142 if (hba->ufs_version == UFSHCI_VERSION_10) {
2143 u32 rw;
2144 rw = set & INTERRUPT_MASK_RW_VER_10;
2145 set = rw | ((set ^ intrs) & intrs);
2146 } else {
2147 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302148 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302149
2150 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2151}
2152
2153/**
2154 * ufshcd_disable_intr - disable interrupts
2155 * @hba: per adapter instance
2156 * @intrs: interrupt bits
2157 */
2158static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2159{
2160 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2161
2162 if (hba->ufs_version == UFSHCI_VERSION_10) {
2163 u32 rw;
2164 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2165 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2166 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2167
2168 } else {
2169 set &= ~intrs;
2170 }
2171
2172 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302173}
2174
2175/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302176 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2177 * descriptor according to request
2178 * @lrbp: pointer to local reference block
2179 * @upiu_flags: flags required in the header
2180 * @cmd_dir: requests data direction
2181 */
2182static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
Joao Pinto300bb132016-05-11 12:21:27 +01002183 u32 *upiu_flags, enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302184{
2185 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2186 u32 data_direction;
2187 u32 dword_0;
2188
2189 if (cmd_dir == DMA_FROM_DEVICE) {
2190 data_direction = UTP_DEVICE_TO_HOST;
2191 *upiu_flags = UPIU_CMD_FLAGS_READ;
2192 } else if (cmd_dir == DMA_TO_DEVICE) {
2193 data_direction = UTP_HOST_TO_DEVICE;
2194 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2195 } else {
2196 data_direction = UTP_NO_DATA_TRANSFER;
2197 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2198 }
2199
2200 dword_0 = data_direction | (lrbp->command_type
2201 << UPIU_COMMAND_TYPE_OFFSET);
2202 if (lrbp->intr_cmd)
2203 dword_0 |= UTP_REQ_DESC_INT_CMD;
2204
2205 /* Transfer request descriptor header fields */
2206 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002207 /* dword_1 is reserved, hence it is set to 0 */
2208 req_desc->header.dword_1 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302209 /*
2210 * assigning invalid value for command status. Controller
2211 * updates OCS on command completion, with the command
2212 * status
2213 */
2214 req_desc->header.dword_2 =
2215 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002216 /* dword_3 is reserved, hence it is set to 0 */
2217 req_desc->header.dword_3 = 0;
Yaniv Gardi51047262016-02-01 15:02:38 +02002218
2219 req_desc->prd_table_length = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302220}
2221
2222/**
2223 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2224 * for scsi commands
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002225 * @lrbp: local reference block pointer
2226 * @upiu_flags: flags
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302227 */
2228static
2229void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2230{
2231 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002232 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302233
2234 /* command descriptor fields */
2235 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2236 UPIU_TRANSACTION_COMMAND, upiu_flags,
2237 lrbp->lun, lrbp->task_tag);
2238 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2239 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2240
2241 /* Total EHS length and Data segment length will be zero */
2242 ucd_req_ptr->header.dword_2 = 0;
2243
2244 ucd_req_ptr->sc.exp_data_transfer_len =
2245 cpu_to_be32(lrbp->cmd->sdb.length);
2246
Avri Altmana851b2b2018-10-07 17:30:34 +03002247 cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, UFS_CDB_SIZE);
2248 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002249 memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
2250
2251 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302252}
2253
Dolev Raviv68078d52013-07-30 00:35:58 +05302254/**
2255 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2256 * for query requsts
2257 * @hba: UFS hba
2258 * @lrbp: local reference block pointer
2259 * @upiu_flags: flags
2260 */
2261static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2262 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2263{
2264 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2265 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302266 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302267
2268 /* Query request header */
2269 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2270 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2271 lrbp->lun, lrbp->task_tag);
2272 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2273 0, query->request.query_func, 0, 0);
2274
Zang Leigang68612852016-08-25 17:39:19 +08002275 /* Data segment length only need for WRITE_DESC */
2276 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2277 ucd_req_ptr->header.dword_2 =
2278 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2279 else
2280 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302281
2282 /* Copy the Query Request buffer as is */
2283 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2284 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302285
2286 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002287 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
Avri Altman220d17a62018-10-07 17:30:36 +03002288 memcpy(ucd_req_ptr + 1, query->descriptor, len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002289
Yaniv Gardi51047262016-02-01 15:02:38 +02002290 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302291}
2292
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302293static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2294{
2295 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2296
2297 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2298
2299 /* command descriptor fields */
2300 ucd_req_ptr->header.dword_0 =
2301 UPIU_HEADER_DWORD(
2302 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002303 /* clear rest of the fields of basic header */
2304 ucd_req_ptr->header.dword_1 = 0;
2305 ucd_req_ptr->header.dword_2 = 0;
2306
2307 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302308}
2309
2310/**
Joao Pinto300bb132016-05-11 12:21:27 +01002311 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2312 * for Device Management Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002313 * @hba: per adapter instance
2314 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302315 */
Joao Pinto300bb132016-05-11 12:21:27 +01002316static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302317{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302318 u32 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302319 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302320
kehuanlin83dc7e32017-09-06 17:58:39 +08002321 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2322 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002323 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
kehuanlin83dc7e32017-09-06 17:58:39 +08002324 else
2325 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002326
2327 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2328 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2329 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2330 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2331 ufshcd_prepare_utp_nop_upiu(lrbp);
2332 else
2333 ret = -EINVAL;
2334
2335 return ret;
2336}
2337
2338/**
2339 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2340 * for SCSI Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002341 * @hba: per adapter instance
2342 * @lrbp: pointer to local reference block
Joao Pinto300bb132016-05-11 12:21:27 +01002343 */
2344static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2345{
2346 u32 upiu_flags;
2347 int ret = 0;
2348
kehuanlin83dc7e32017-09-06 17:58:39 +08002349 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2350 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002351 lrbp->command_type = UTP_CMD_TYPE_SCSI;
kehuanlin83dc7e32017-09-06 17:58:39 +08002352 else
2353 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002354
2355 if (likely(lrbp->cmd)) {
2356 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2357 lrbp->cmd->sc_data_direction);
2358 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2359 } else {
2360 ret = -EINVAL;
2361 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302362
2363 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302364}
2365
2366/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002367 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002368 * @upiu_wlun_id: UPIU W-LUN id
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002369 *
2370 * Returns SCSI W-LUN id
2371 */
2372static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2373{
2374 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2375}
2376
2377/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302378 * ufshcd_queuecommand - main entry point for SCSI requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002379 * @host: SCSI host pointer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302380 * @cmd: command from SCSI Midlayer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302381 *
2382 * Returns 0 for success, non-zero in case of failure
2383 */
2384static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2385{
2386 struct ufshcd_lrb *lrbp;
2387 struct ufs_hba *hba;
2388 unsigned long flags;
2389 int tag;
2390 int err = 0;
2391
2392 hba = shost_priv(host);
2393
2394 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02002395 if (!ufshcd_valid_tag(hba, tag)) {
2396 dev_err(hba->dev,
2397 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2398 __func__, tag, cmd, cmd->request);
2399 BUG();
2400 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302401
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002402 if (!down_read_trylock(&hba->clk_scaling_lock))
2403 return SCSI_MLQUEUE_HOST_BUSY;
2404
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302405 spin_lock_irqsave(hba->host->host_lock, flags);
2406 switch (hba->ufshcd_state) {
2407 case UFSHCD_STATE_OPERATIONAL:
2408 break;
Zang Leigang141f8162016-11-16 11:29:37 +08002409 case UFSHCD_STATE_EH_SCHEDULED:
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302410 case UFSHCD_STATE_RESET:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302411 err = SCSI_MLQUEUE_HOST_BUSY;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302412 goto out_unlock;
2413 case UFSHCD_STATE_ERROR:
2414 set_host_byte(cmd, DID_ERROR);
2415 cmd->scsi_done(cmd);
2416 goto out_unlock;
2417 default:
2418 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2419 __func__, hba->ufshcd_state);
2420 set_host_byte(cmd, DID_BAD_TARGET);
2421 cmd->scsi_done(cmd);
2422 goto out_unlock;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302423 }
Yaniv Gardi53c12d02016-02-01 15:02:45 +02002424
2425 /* if error handling is in progress, don't issue commands */
2426 if (ufshcd_eh_in_progress(hba)) {
2427 set_host_byte(cmd, DID_ERROR);
2428 cmd->scsi_done(cmd);
2429 goto out_unlock;
2430 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302431 spin_unlock_irqrestore(hba->host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302432
Gilad Broner7fabb772017-02-03 16:56:50 -08002433 hba->req_abort_count = 0;
2434
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302435 /* acquire the tag to make sure device cmds don't use it */
2436 if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
2437 /*
2438 * Dev manage command in progress, requeue the command.
2439 * Requeuing the command helps in cases where the request *may*
2440 * find different tag instead of waiting for dev manage command
2441 * completion.
2442 */
2443 err = SCSI_MLQUEUE_HOST_BUSY;
2444 goto out;
2445 }
2446
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002447 err = ufshcd_hold(hba, true);
2448 if (err) {
2449 err = SCSI_MLQUEUE_HOST_BUSY;
2450 clear_bit_unlock(tag, &hba->lrb_in_use);
2451 goto out;
2452 }
2453 WARN_ON(hba->clk_gating.state != CLKS_ON);
2454
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302455 lrbp = &hba->lrb[tag];
2456
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302457 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302458 lrbp->cmd = cmd;
Gilad Bronerdcea0bf2016-10-17 17:09:48 -07002459 lrbp->sense_bufflen = UFSHCD_REQ_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302460 lrbp->sense_buffer = cmd->sense_buffer;
2461 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002462 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002463 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Gilad Bronere0b299e2017-02-03 16:56:40 -08002464 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302465
Joao Pinto300bb132016-05-11 12:21:27 +01002466 ufshcd_comp_scsi_upiu(hba, lrbp);
2467
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002468 err = ufshcd_map_sg(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302469 if (err) {
2470 lrbp->cmd = NULL;
2471 clear_bit_unlock(tag, &hba->lrb_in_use);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302472 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302473 }
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002474 /* Make sure descriptors are ready before ringing the doorbell */
2475 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302476
2477 /* issue command to the controller */
2478 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002479 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302480 ufshcd_send_command(hba, tag);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302481out_unlock:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302482 spin_unlock_irqrestore(hba->host->host_lock, flags);
2483out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002484 up_read(&hba->clk_scaling_lock);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302485 return err;
2486}
2487
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302488static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2489 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2490{
2491 lrbp->cmd = NULL;
2492 lrbp->sense_bufflen = 0;
2493 lrbp->sense_buffer = NULL;
2494 lrbp->task_tag = tag;
2495 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302496 lrbp->intr_cmd = true; /* No interrupt aggregation */
2497 hba->dev_cmd.type = cmd_type;
2498
Joao Pinto300bb132016-05-11 12:21:27 +01002499 return ufshcd_comp_devman_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302500}
2501
2502static int
2503ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2504{
2505 int err = 0;
2506 unsigned long flags;
2507 u32 mask = 1 << tag;
2508
2509 /* clear outstanding transaction before retry */
2510 spin_lock_irqsave(hba->host->host_lock, flags);
2511 ufshcd_utrl_clear(hba, tag);
2512 spin_unlock_irqrestore(hba->host->host_lock, flags);
2513
2514 /*
2515 * wait for for h/w to clear corresponding bit in door-bell.
2516 * max. wait is 1 sec.
2517 */
2518 err = ufshcd_wait_for_register(hba,
2519 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02002520 mask, ~mask, 1000, 1000, true);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302521
2522 return err;
2523}
2524
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002525static int
2526ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2527{
2528 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2529
2530 /* Get the UPIU response */
2531 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2532 UPIU_RSP_CODE_OFFSET;
2533 return query_res->response;
2534}
2535
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302536/**
2537 * ufshcd_dev_cmd_completion() - handles device management command responses
2538 * @hba: per adapter instance
2539 * @lrbp: pointer to local reference block
2540 */
2541static int
2542ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2543{
2544 int resp;
2545 int err = 0;
2546
Dolev Ravivff8e20c2016-12-22 18:42:18 -08002547 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302548 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2549
2550 switch (resp) {
2551 case UPIU_TRANSACTION_NOP_IN:
2552 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2553 err = -EINVAL;
2554 dev_err(hba->dev, "%s: unexpected response %x\n",
2555 __func__, resp);
2556 }
2557 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302558 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002559 err = ufshcd_check_query_response(hba, lrbp);
2560 if (!err)
2561 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302562 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302563 case UPIU_TRANSACTION_REJECT_UPIU:
2564 /* TODO: handle Reject UPIU Response */
2565 err = -EPERM;
2566 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2567 __func__);
2568 break;
2569 default:
2570 err = -EINVAL;
2571 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2572 __func__, resp);
2573 break;
2574 }
2575
2576 return err;
2577}
2578
2579static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2580 struct ufshcd_lrb *lrbp, int max_timeout)
2581{
2582 int err = 0;
2583 unsigned long time_left;
2584 unsigned long flags;
2585
2586 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2587 msecs_to_jiffies(max_timeout));
2588
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002589 /* Make sure descriptors are ready before ringing the doorbell */
2590 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302591 spin_lock_irqsave(hba->host->host_lock, flags);
2592 hba->dev_cmd.complete = NULL;
2593 if (likely(time_left)) {
2594 err = ufshcd_get_tr_ocs(lrbp);
2595 if (!err)
2596 err = ufshcd_dev_cmd_completion(hba, lrbp);
2597 }
2598 spin_unlock_irqrestore(hba->host->host_lock, flags);
2599
2600 if (!time_left) {
2601 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002602 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2603 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302604 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002605 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302606 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002607 /*
2608 * in case of an error, after clearing the doorbell,
2609 * we also need to clear the outstanding_request
2610 * field in hba
2611 */
2612 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302613 }
2614
2615 return err;
2616}
2617
2618/**
2619 * ufshcd_get_dev_cmd_tag - Get device management command tag
2620 * @hba: per-adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002621 * @tag_out: pointer to variable with available slot value
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302622 *
2623 * Get a free slot and lock it until device management command
2624 * completes.
2625 *
2626 * Returns false if free slot is unavailable for locking, else
2627 * return true with tag value in @tag.
2628 */
2629static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
2630{
2631 int tag;
2632 bool ret = false;
2633 unsigned long tmp;
2634
2635 if (!tag_out)
2636 goto out;
2637
2638 do {
2639 tmp = ~hba->lrb_in_use;
2640 tag = find_last_bit(&tmp, hba->nutrs);
2641 if (tag >= hba->nutrs)
2642 goto out;
2643 } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
2644
2645 *tag_out = tag;
2646 ret = true;
2647out:
2648 return ret;
2649}
2650
2651static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
2652{
2653 clear_bit_unlock(tag, &hba->lrb_in_use);
2654}
2655
2656/**
2657 * ufshcd_exec_dev_cmd - API for sending device management requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002658 * @hba: UFS hba
2659 * @cmd_type: specifies the type (NOP, Query...)
2660 * @timeout: time in seconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302661 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302662 * NOTE: Since there is only one available tag for device management commands,
2663 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302664 */
2665static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2666 enum dev_cmd_type cmd_type, int timeout)
2667{
2668 struct ufshcd_lrb *lrbp;
2669 int err;
2670 int tag;
2671 struct completion wait;
2672 unsigned long flags;
2673
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002674 down_read(&hba->clk_scaling_lock);
2675
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302676 /*
2677 * Get free slot, sleep if slots are unavailable.
2678 * Even though we use wait_event() which sleeps indefinitely,
2679 * the maximum wait time is bounded by SCSI request timeout.
2680 */
2681 wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
2682
2683 init_completion(&wait);
2684 lrbp = &hba->lrb[tag];
2685 WARN_ON(lrbp->cmd);
2686 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2687 if (unlikely(err))
2688 goto out_put_tag;
2689
2690 hba->dev_cmd.complete = &wait;
2691
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002692 ufshcd_add_query_upiu_trace(hba, tag, "query_send");
Yaniv Gardie3dfdc52016-02-01 15:02:49 +02002693 /* Make sure descriptors are ready before ringing the doorbell */
2694 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302695 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002696 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302697 ufshcd_send_command(hba, tag);
2698 spin_unlock_irqrestore(hba->host->host_lock, flags);
2699
2700 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2701
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002702 ufshcd_add_query_upiu_trace(hba, tag,
2703 err ? "query_complete_err" : "query_complete");
2704
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302705out_put_tag:
2706 ufshcd_put_dev_cmd_tag(hba, tag);
2707 wake_up(&hba->dev_cmd.tag_wq);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002708 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302709 return err;
2710}
2711
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302712/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002713 * ufshcd_init_query() - init the query response and request parameters
2714 * @hba: per-adapter instance
2715 * @request: address of the request pointer to be initialized
2716 * @response: address of the response pointer to be initialized
2717 * @opcode: operation to perform
2718 * @idn: flag idn to access
2719 * @index: LU number to access
2720 * @selector: query/flag/descriptor further identification
2721 */
2722static inline void ufshcd_init_query(struct ufs_hba *hba,
2723 struct ufs_query_req **request, struct ufs_query_res **response,
2724 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2725{
2726 *request = &hba->dev_cmd.query.request;
2727 *response = &hba->dev_cmd.query.response;
2728 memset(*request, 0, sizeof(struct ufs_query_req));
2729 memset(*response, 0, sizeof(struct ufs_query_res));
2730 (*request)->upiu_req.opcode = opcode;
2731 (*request)->upiu_req.idn = idn;
2732 (*request)->upiu_req.index = index;
2733 (*request)->upiu_req.selector = selector;
2734}
2735
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002736static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2737 enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2738{
2739 int ret;
2740 int retries;
2741
2742 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2743 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2744 if (ret)
2745 dev_dbg(hba->dev,
2746 "%s: failed with error %d, retries %d\n",
2747 __func__, ret, retries);
2748 else
2749 break;
2750 }
2751
2752 if (ret)
2753 dev_err(hba->dev,
2754 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2755 __func__, opcode, idn, ret, retries);
2756 return ret;
2757}
2758
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002759/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302760 * ufshcd_query_flag() - API function for sending flag query requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002761 * @hba: per-adapter instance
2762 * @opcode: flag query to perform
2763 * @idn: flag idn to access
2764 * @flag_res: the flag value after the query request completes
Dolev Raviv68078d52013-07-30 00:35:58 +05302765 *
2766 * Returns 0 for success, non-zero in case of failure
2767 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002768int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Dolev Raviv68078d52013-07-30 00:35:58 +05302769 enum flag_idn idn, bool *flag_res)
2770{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002771 struct ufs_query_req *request = NULL;
2772 struct ufs_query_res *response = NULL;
2773 int err, index = 0, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002774 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05302775
2776 BUG_ON(!hba);
2777
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002778 ufshcd_hold(hba, false);
Dolev Raviv68078d52013-07-30 00:35:58 +05302779 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002780 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2781 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05302782
2783 switch (opcode) {
2784 case UPIU_QUERY_OPCODE_SET_FLAG:
2785 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2786 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2787 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2788 break;
2789 case UPIU_QUERY_OPCODE_READ_FLAG:
2790 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2791 if (!flag_res) {
2792 /* No dummy reads */
2793 dev_err(hba->dev, "%s: Invalid argument for read request\n",
2794 __func__);
2795 err = -EINVAL;
2796 goto out_unlock;
2797 }
2798 break;
2799 default:
2800 dev_err(hba->dev,
2801 "%s: Expected query flag opcode but got = %d\n",
2802 __func__, opcode);
2803 err = -EINVAL;
2804 goto out_unlock;
2805 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302806
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002807 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05302808
2809 if (err) {
2810 dev_err(hba->dev,
2811 "%s: Sending flag query for idn %d failed, err = %d\n",
2812 __func__, idn, err);
2813 goto out_unlock;
2814 }
2815
2816 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302817 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302818 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2819
2820out_unlock:
2821 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002822 ufshcd_release(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05302823 return err;
2824}
2825
2826/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302827 * ufshcd_query_attr - API function for sending attribute requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002828 * @hba: per-adapter instance
2829 * @opcode: attribute opcode
2830 * @idn: attribute idn to access
2831 * @index: index field
2832 * @selector: selector field
2833 * @attr_val: the attribute value after the query request completes
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302834 *
2835 * Returns 0 for success, non-zero in case of failure
2836*/
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02002837int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2838 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302839{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002840 struct ufs_query_req *request = NULL;
2841 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302842 int err;
2843
2844 BUG_ON(!hba);
2845
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002846 ufshcd_hold(hba, false);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302847 if (!attr_val) {
2848 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2849 __func__, opcode);
2850 err = -EINVAL;
2851 goto out;
2852 }
2853
2854 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002855 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2856 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302857
2858 switch (opcode) {
2859 case UPIU_QUERY_OPCODE_WRITE_ATTR:
2860 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302861 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302862 break;
2863 case UPIU_QUERY_OPCODE_READ_ATTR:
2864 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2865 break;
2866 default:
2867 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2868 __func__, opcode);
2869 err = -EINVAL;
2870 goto out_unlock;
2871 }
2872
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002873 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302874
2875 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002876 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2877 __func__, opcode, idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302878 goto out_unlock;
2879 }
2880
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302881 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302882
2883out_unlock:
2884 mutex_unlock(&hba->dev_cmd.lock);
2885out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002886 ufshcd_release(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302887 return err;
2888}
2889
2890/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02002891 * ufshcd_query_attr_retry() - API function for sending query
2892 * attribute with retries
2893 * @hba: per-adapter instance
2894 * @opcode: attribute opcode
2895 * @idn: attribute idn to access
2896 * @index: index field
2897 * @selector: selector field
2898 * @attr_val: the attribute value after the query request
2899 * completes
2900 *
2901 * Returns 0 for success, non-zero in case of failure
2902*/
2903static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2904 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2905 u32 *attr_val)
2906{
2907 int ret = 0;
2908 u32 retries;
2909
2910 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2911 ret = ufshcd_query_attr(hba, opcode, idn, index,
2912 selector, attr_val);
2913 if (ret)
2914 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2915 __func__, ret, retries);
2916 else
2917 break;
2918 }
2919
2920 if (ret)
2921 dev_err(hba->dev,
2922 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2923 __func__, idn, ret, QUERY_REQ_RETRIES);
2924 return ret;
2925}
2926
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002927static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002928 enum query_opcode opcode, enum desc_idn idn, u8 index,
2929 u8 selector, u8 *desc_buf, int *buf_len)
2930{
2931 struct ufs_query_req *request = NULL;
2932 struct ufs_query_res *response = NULL;
2933 int err;
2934
2935 BUG_ON(!hba);
2936
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002937 ufshcd_hold(hba, false);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002938 if (!desc_buf) {
2939 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2940 __func__, opcode);
2941 err = -EINVAL;
2942 goto out;
2943 }
2944
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002945 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002946 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2947 __func__, *buf_len);
2948 err = -EINVAL;
2949 goto out;
2950 }
2951
2952 mutex_lock(&hba->dev_cmd.lock);
2953 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2954 selector);
2955 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002956 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002957
2958 switch (opcode) {
2959 case UPIU_QUERY_OPCODE_WRITE_DESC:
2960 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2961 break;
2962 case UPIU_QUERY_OPCODE_READ_DESC:
2963 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2964 break;
2965 default:
2966 dev_err(hba->dev,
2967 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2968 __func__, opcode);
2969 err = -EINVAL;
2970 goto out_unlock;
2971 }
2972
2973 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2974
2975 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002976 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2977 __func__, opcode, idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002978 goto out_unlock;
2979 }
2980
2981 hba->dev_cmd.query.descriptor = NULL;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002982 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002983
2984out_unlock:
2985 mutex_unlock(&hba->dev_cmd.lock);
2986out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002987 ufshcd_release(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002988 return err;
2989}
2990
2991/**
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002992 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
2993 * @hba: per-adapter instance
2994 * @opcode: attribute opcode
2995 * @idn: attribute idn to access
2996 * @index: index field
2997 * @selector: selector field
2998 * @desc_buf: the buffer that contains the descriptor
2999 * @buf_len: length parameter passed to the device
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003000 *
3001 * Returns 0 for success, non-zero in case of failure.
3002 * The buf_len parameter will contain, on return, the length parameter
3003 * received on the response.
3004 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02003005int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3006 enum query_opcode opcode,
3007 enum desc_idn idn, u8 index,
3008 u8 selector,
3009 u8 *desc_buf, int *buf_len)
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003010{
3011 int err;
3012 int retries;
3013
3014 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3015 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3016 selector, desc_buf, buf_len);
3017 if (!err || err == -EINVAL)
3018 break;
3019 }
3020
3021 return err;
3022}
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003023
3024/**
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003025 * ufshcd_read_desc_length - read the specified descriptor length from header
3026 * @hba: Pointer to adapter instance
3027 * @desc_id: descriptor idn value
3028 * @desc_index: descriptor index
3029 * @desc_length: pointer to variable to read the length of descriptor
3030 *
3031 * Return 0 in case of success, non-zero otherwise
3032 */
3033static int ufshcd_read_desc_length(struct ufs_hba *hba,
3034 enum desc_idn desc_id,
3035 int desc_index,
3036 int *desc_length)
3037{
3038 int ret;
3039 u8 header[QUERY_DESC_HDR_SIZE];
3040 int header_len = QUERY_DESC_HDR_SIZE;
3041
3042 if (desc_id >= QUERY_DESC_IDN_MAX)
3043 return -EINVAL;
3044
3045 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3046 desc_id, desc_index, 0, header,
3047 &header_len);
3048
3049 if (ret) {
3050 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
3051 __func__, desc_id);
3052 return ret;
3053 } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
3054 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
3055 __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3056 desc_id);
3057 ret = -EINVAL;
3058 }
3059
3060 *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3061 return ret;
3062
3063}
3064
3065/**
3066 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3067 * @hba: Pointer to adapter instance
3068 * @desc_id: descriptor idn value
3069 * @desc_len: mapped desc length (out)
3070 *
3071 * Return 0 in case of success, non-zero otherwise
3072 */
3073int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3074 enum desc_idn desc_id, int *desc_len)
3075{
3076 switch (desc_id) {
3077 case QUERY_DESC_IDN_DEVICE:
3078 *desc_len = hba->desc_size.dev_desc;
3079 break;
3080 case QUERY_DESC_IDN_POWER:
3081 *desc_len = hba->desc_size.pwr_desc;
3082 break;
3083 case QUERY_DESC_IDN_GEOMETRY:
3084 *desc_len = hba->desc_size.geom_desc;
3085 break;
3086 case QUERY_DESC_IDN_CONFIGURATION:
3087 *desc_len = hba->desc_size.conf_desc;
3088 break;
3089 case QUERY_DESC_IDN_UNIT:
3090 *desc_len = hba->desc_size.unit_desc;
3091 break;
3092 case QUERY_DESC_IDN_INTERCONNECT:
3093 *desc_len = hba->desc_size.interc_desc;
3094 break;
3095 case QUERY_DESC_IDN_STRING:
3096 *desc_len = QUERY_DESC_MAX_SIZE;
3097 break;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02003098 case QUERY_DESC_IDN_HEALTH:
3099 *desc_len = hba->desc_size.hlth_desc;
3100 break;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003101 case QUERY_DESC_IDN_RFU_0:
3102 case QUERY_DESC_IDN_RFU_1:
3103 *desc_len = 0;
3104 break;
3105 default:
3106 *desc_len = 0;
3107 return -EINVAL;
3108 }
3109 return 0;
3110}
3111EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3112
3113/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003114 * ufshcd_read_desc_param - read the specified descriptor parameter
3115 * @hba: Pointer to adapter instance
3116 * @desc_id: descriptor idn value
3117 * @desc_index: descriptor index
3118 * @param_offset: offset of the parameter to read
3119 * @param_read_buf: pointer to buffer where parameter would be read
3120 * @param_size: sizeof(param_read_buf)
3121 *
3122 * Return 0 in case of success, non-zero otherwise
3123 */
Stanislav Nijnikov45bced82018-02-15 14:14:02 +02003124int ufshcd_read_desc_param(struct ufs_hba *hba,
3125 enum desc_idn desc_id,
3126 int desc_index,
3127 u8 param_offset,
3128 u8 *param_read_buf,
3129 u8 param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003130{
3131 int ret;
3132 u8 *desc_buf;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003133 int buff_len;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003134 bool is_kmalloc = true;
3135
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003136 /* Safety check */
3137 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003138 return -EINVAL;
3139
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003140 /* Get the max length of descriptor from structure filled up at probe
3141 * time.
3142 */
3143 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003144
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003145 /* Sanity checks */
3146 if (ret || !buff_len) {
3147 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3148 __func__);
3149 return ret;
3150 }
3151
3152 /* Check whether we need temp memory */
3153 if (param_offset != 0 || param_size < buff_len) {
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003154 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3155 if (!desc_buf)
3156 return -ENOMEM;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003157 } else {
3158 desc_buf = param_read_buf;
3159 is_kmalloc = false;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003160 }
3161
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003162 /* Request for full descriptor */
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003163 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003164 desc_id, desc_index, 0,
3165 desc_buf, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003166
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003167 if (ret) {
3168 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3169 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003170 goto out;
3171 }
3172
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003173 /* Sanity check */
3174 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3175 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3176 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3177 ret = -EINVAL;
3178 goto out;
3179 }
3180
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003181 /* Check wherher we will not copy more data, than available */
3182 if (is_kmalloc && param_size > buff_len)
3183 param_size = buff_len;
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003184
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003185 if (is_kmalloc)
3186 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3187out:
3188 if (is_kmalloc)
3189 kfree(desc_buf);
3190 return ret;
3191}
3192
3193static inline int ufshcd_read_desc(struct ufs_hba *hba,
3194 enum desc_idn desc_id,
3195 int desc_index,
3196 u8 *buf,
3197 u32 size)
3198{
3199 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3200}
3201
3202static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3203 u8 *buf,
3204 u32 size)
3205{
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02003206 return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003207}
3208
Tomas Winkler8209b6d2017-01-05 10:45:10 +02003209static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
Yaniv Gardib573d482016-03-10 17:37:09 +02003210{
3211 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3212}
Yaniv Gardib573d482016-03-10 17:37:09 +02003213
3214/**
3215 * ufshcd_read_string_desc - read string descriptor
3216 * @hba: pointer to adapter instance
3217 * @desc_index: descriptor index
3218 * @buf: pointer to buffer where descriptor would be read
3219 * @size: size of buf
3220 * @ascii: if true convert from unicode to ascii characters
3221 *
3222 * Return 0 in case of success, non-zero otherwise
3223 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02003224int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index,
3225 u8 *buf, u32 size, bool ascii)
Yaniv Gardib573d482016-03-10 17:37:09 +02003226{
3227 int err = 0;
3228
3229 err = ufshcd_read_desc(hba,
3230 QUERY_DESC_IDN_STRING, desc_index, buf, size);
3231
3232 if (err) {
3233 dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n",
3234 __func__, QUERY_REQ_RETRIES, err);
3235 goto out;
3236 }
3237
3238 if (ascii) {
3239 int desc_len;
3240 int ascii_len;
3241 int i;
3242 char *buff_ascii;
3243
3244 desc_len = buf[0];
3245 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3246 ascii_len = (desc_len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3247 if (size < ascii_len + QUERY_DESC_HDR_SIZE) {
3248 dev_err(hba->dev, "%s: buffer allocated size is too small\n",
3249 __func__);
3250 err = -ENOMEM;
3251 goto out;
3252 }
3253
3254 buff_ascii = kmalloc(ascii_len, GFP_KERNEL);
3255 if (!buff_ascii) {
3256 err = -ENOMEM;
Tiezhu Yangfcbefc32016-06-25 12:35:22 +08003257 goto out;
Yaniv Gardib573d482016-03-10 17:37:09 +02003258 }
3259
3260 /*
3261 * the descriptor contains string in UTF16 format
3262 * we need to convert to utf-8 so it can be displayed
3263 */
3264 utf16s_to_utf8s((wchar_t *)&buf[QUERY_DESC_HDR_SIZE],
3265 desc_len - QUERY_DESC_HDR_SIZE,
3266 UTF16_BIG_ENDIAN, buff_ascii, ascii_len);
3267
3268 /* replace non-printable or non-ASCII characters with spaces */
3269 for (i = 0; i < ascii_len; i++)
3270 ufshcd_remove_non_printable(&buff_ascii[i]);
3271
3272 memset(buf + QUERY_DESC_HDR_SIZE, 0,
3273 size - QUERY_DESC_HDR_SIZE);
3274 memcpy(buf + QUERY_DESC_HDR_SIZE, buff_ascii, ascii_len);
3275 buf[QUERY_DESC_LENGTH_OFFSET] = ascii_len + QUERY_DESC_HDR_SIZE;
Yaniv Gardib573d482016-03-10 17:37:09 +02003276 kfree(buff_ascii);
3277 }
3278out:
3279 return err;
3280}
Yaniv Gardib573d482016-03-10 17:37:09 +02003281
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003282/**
3283 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3284 * @hba: Pointer to adapter instance
3285 * @lun: lun id
3286 * @param_offset: offset of the parameter to read
3287 * @param_read_buf: pointer to buffer where parameter would be read
3288 * @param_size: sizeof(param_read_buf)
3289 *
3290 * Return 0 in case of success, non-zero otherwise
3291 */
3292static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3293 int lun,
3294 enum unit_desc_param param_offset,
3295 u8 *param_read_buf,
3296 u32 param_size)
3297{
3298 /*
3299 * Unit descriptors are only available for general purpose LUs (LUN id
3300 * from 0 to 7) and RPMB Well known LU.
3301 */
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02003302 if (!ufs_is_valid_unit_desc_lun(lun))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003303 return -EOPNOTSUPP;
3304
3305 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3306 param_offset, param_read_buf, param_size);
3307}
3308
3309/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303310 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3311 * @hba: per adapter instance
3312 *
3313 * 1. Allocate DMA memory for Command Descriptor array
3314 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3315 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3316 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3317 * (UTMRDL)
3318 * 4. Allocate memory for local reference block(lrb).
3319 *
3320 * Returns 0 for success, non-zero in case of failure
3321 */
3322static int ufshcd_memory_alloc(struct ufs_hba *hba)
3323{
3324 size_t utmrdl_size, utrdl_size, ucdl_size;
3325
3326 /* Allocate memory for UTP command descriptors */
3327 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003328 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3329 ucdl_size,
3330 &hba->ucdl_dma_addr,
3331 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303332
3333 /*
3334 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3335 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3336 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3337 * be aligned to 128 bytes as well
3338 */
3339 if (!hba->ucdl_base_addr ||
3340 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303341 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303342 "Command Descriptor Memory allocation failed\n");
3343 goto out;
3344 }
3345
3346 /*
3347 * Allocate memory for UTP Transfer descriptors
3348 * UFSHCI requires 1024 byte alignment of UTRD
3349 */
3350 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003351 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3352 utrdl_size,
3353 &hba->utrdl_dma_addr,
3354 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303355 if (!hba->utrdl_base_addr ||
3356 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303357 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303358 "Transfer Descriptor Memory allocation failed\n");
3359 goto out;
3360 }
3361
3362 /*
3363 * Allocate memory for UTP Task Management descriptors
3364 * UFSHCI requires 1024 byte alignment of UTMRD
3365 */
3366 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003367 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3368 utmrdl_size,
3369 &hba->utmrdl_dma_addr,
3370 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303371 if (!hba->utmrdl_base_addr ||
3372 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303373 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303374 "Task Management Descriptor Memory allocation failed\n");
3375 goto out;
3376 }
3377
3378 /* Allocate memory for local reference block */
Kees Cooka86854d2018-06-12 14:07:58 -07003379 hba->lrb = devm_kcalloc(hba->dev,
3380 hba->nutrs, sizeof(struct ufshcd_lrb),
Seungwon Jeon2953f852013-06-27 13:31:54 +09003381 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303382 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303383 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303384 goto out;
3385 }
3386 return 0;
3387out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303388 return -ENOMEM;
3389}
3390
3391/**
3392 * ufshcd_host_memory_configure - configure local reference block with
3393 * memory offsets
3394 * @hba: per adapter instance
3395 *
3396 * Configure Host memory space
3397 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3398 * address.
3399 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3400 * and PRDT offset.
3401 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3402 * into local reference block.
3403 */
3404static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3405{
3406 struct utp_transfer_cmd_desc *cmd_descp;
3407 struct utp_transfer_req_desc *utrdlp;
3408 dma_addr_t cmd_desc_dma_addr;
3409 dma_addr_t cmd_desc_element_addr;
3410 u16 response_offset;
3411 u16 prdt_offset;
3412 int cmd_desc_size;
3413 int i;
3414
3415 utrdlp = hba->utrdl_base_addr;
3416 cmd_descp = hba->ucdl_base_addr;
3417
3418 response_offset =
3419 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3420 prdt_offset =
3421 offsetof(struct utp_transfer_cmd_desc, prd_table);
3422
3423 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3424 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3425
3426 for (i = 0; i < hba->nutrs; i++) {
3427 /* Configure UTRD with command descriptor base address */
3428 cmd_desc_element_addr =
3429 (cmd_desc_dma_addr + (cmd_desc_size * i));
3430 utrdlp[i].command_desc_base_addr_lo =
3431 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3432 utrdlp[i].command_desc_base_addr_hi =
3433 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3434
3435 /* Response upiu and prdt offset should be in double words */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003436 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3437 utrdlp[i].response_upiu_offset =
3438 cpu_to_le16(response_offset);
3439 utrdlp[i].prd_table_offset =
3440 cpu_to_le16(prdt_offset);
3441 utrdlp[i].response_upiu_length =
3442 cpu_to_le16(ALIGNED_UPIU_SIZE);
3443 } else {
3444 utrdlp[i].response_upiu_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303445 cpu_to_le16((response_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003446 utrdlp[i].prd_table_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303447 cpu_to_le16((prdt_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003448 utrdlp[i].response_upiu_length =
Sujit Reddy Thumma3ca316c2013-06-26 22:39:30 +05303449 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003450 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303451
3452 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003453 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3454 (i * sizeof(struct utp_transfer_req_desc));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303455 hba->lrb[i].ucd_req_ptr =
3456 (struct utp_upiu_req *)(cmd_descp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003457 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303458 hba->lrb[i].ucd_rsp_ptr =
3459 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003460 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3461 response_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303462 hba->lrb[i].ucd_prdt_ptr =
3463 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003464 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3465 prdt_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303466 }
3467}
3468
3469/**
3470 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3471 * @hba: per adapter instance
3472 *
3473 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3474 * in order to initialize the Unipro link startup procedure.
3475 * Once the Unipro links are up, the device connected to the controller
3476 * is detected.
3477 *
3478 * Returns 0 on success, non-zero value on failure
3479 */
3480static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3481{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303482 struct uic_command uic_cmd = {0};
3483 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303484
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303485 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3486
3487 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3488 if (ret)
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003489 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303490 "dme-link-startup: error code %d\n", ret);
3491 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303492}
Alim Akhtar4404c5d2018-05-06 15:44:17 +05303493/**
3494 * ufshcd_dme_reset - UIC command for DME_RESET
3495 * @hba: per adapter instance
3496 *
3497 * DME_RESET command is issued in order to reset UniPro stack.
3498 * This function now deal with cold reset.
3499 *
3500 * Returns 0 on success, non-zero value on failure
3501 */
3502static int ufshcd_dme_reset(struct ufs_hba *hba)
3503{
3504 struct uic_command uic_cmd = {0};
3505 int ret;
3506
3507 uic_cmd.command = UIC_CMD_DME_RESET;
3508
3509 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3510 if (ret)
3511 dev_err(hba->dev,
3512 "dme-reset: error code %d\n", ret);
3513
3514 return ret;
3515}
3516
3517/**
3518 * ufshcd_dme_enable - UIC command for DME_ENABLE
3519 * @hba: per adapter instance
3520 *
3521 * DME_ENABLE command is issued in order to enable UniPro stack.
3522 *
3523 * Returns 0 on success, non-zero value on failure
3524 */
3525static int ufshcd_dme_enable(struct ufs_hba *hba)
3526{
3527 struct uic_command uic_cmd = {0};
3528 int ret;
3529
3530 uic_cmd.command = UIC_CMD_DME_ENABLE;
3531
3532 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3533 if (ret)
3534 dev_err(hba->dev,
3535 "dme-reset: error code %d\n", ret);
3536
3537 return ret;
3538}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303539
Yaniv Gardicad2e032015-03-31 17:37:14 +03003540static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3541{
3542 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3543 unsigned long min_sleep_time_us;
3544
3545 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3546 return;
3547
3548 /*
3549 * last_dme_cmd_tstamp will be 0 only for 1st call to
3550 * this function
3551 */
3552 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3553 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3554 } else {
3555 unsigned long delta =
3556 (unsigned long) ktime_to_us(
3557 ktime_sub(ktime_get(),
3558 hba->last_dme_cmd_tstamp));
3559
3560 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3561 min_sleep_time_us =
3562 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3563 else
3564 return; /* no more delay required */
3565 }
3566
3567 /* allow sleep for extra 50us if needed */
3568 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3569}
3570
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303571/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303572 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3573 * @hba: per adapter instance
3574 * @attr_sel: uic command argument1
3575 * @attr_set: attribute set type as uic command argument2
3576 * @mib_val: setting value as uic command argument3
3577 * @peer: indicate whether peer or local
3578 *
3579 * Returns 0 on success, non-zero value on failure
3580 */
3581int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3582 u8 attr_set, u32 mib_val, u8 peer)
3583{
3584 struct uic_command uic_cmd = {0};
3585 static const char *const action[] = {
3586 "dme-set",
3587 "dme-peer-set"
3588 };
3589 const char *set = action[!!peer];
3590 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003591 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303592
3593 uic_cmd.command = peer ?
3594 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3595 uic_cmd.argument1 = attr_sel;
3596 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3597 uic_cmd.argument3 = mib_val;
3598
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003599 do {
3600 /* for peer attributes we retry upon failure */
3601 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3602 if (ret)
3603 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3604 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3605 } while (ret && peer && --retries);
3606
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003607 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003608 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003609 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3610 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303611
3612 return ret;
3613}
3614EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3615
3616/**
3617 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3618 * @hba: per adapter instance
3619 * @attr_sel: uic command argument1
3620 * @mib_val: the value of the attribute as returned by the UIC command
3621 * @peer: indicate whether peer or local
3622 *
3623 * Returns 0 on success, non-zero value on failure
3624 */
3625int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3626 u32 *mib_val, u8 peer)
3627{
3628 struct uic_command uic_cmd = {0};
3629 static const char *const action[] = {
3630 "dme-get",
3631 "dme-peer-get"
3632 };
3633 const char *get = action[!!peer];
3634 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003635 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003636 struct ufs_pa_layer_attr orig_pwr_info;
3637 struct ufs_pa_layer_attr temp_pwr_info;
3638 bool pwr_mode_change = false;
3639
3640 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3641 orig_pwr_info = hba->pwr_info;
3642 temp_pwr_info = orig_pwr_info;
3643
3644 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3645 orig_pwr_info.pwr_rx == FAST_MODE) {
3646 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3647 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3648 pwr_mode_change = true;
3649 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3650 orig_pwr_info.pwr_rx == SLOW_MODE) {
3651 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3652 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3653 pwr_mode_change = true;
3654 }
3655 if (pwr_mode_change) {
3656 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3657 if (ret)
3658 goto out;
3659 }
3660 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303661
3662 uic_cmd.command = peer ?
3663 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3664 uic_cmd.argument1 = attr_sel;
3665
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003666 do {
3667 /* for peer attributes we retry upon failure */
3668 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3669 if (ret)
3670 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3671 get, UIC_GET_ATTR_ID(attr_sel), ret);
3672 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303673
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003674 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003675 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003676 get, UIC_GET_ATTR_ID(attr_sel),
3677 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003678
3679 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303680 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003681
3682 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3683 && pwr_mode_change)
3684 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303685out:
3686 return ret;
3687}
3688EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3689
3690/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003691 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3692 * state) and waits for it to take effect.
3693 *
3694 * @hba: per adapter instance
3695 * @cmd: UIC command to execute
3696 *
3697 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3698 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3699 * and device UniPro link and hence it's final completion would be indicated by
3700 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3701 * addition to normal UIC command completion Status (UCCS). This function only
3702 * returns after the relevant status bits indicate the completion.
3703 *
3704 * Returns 0 on success, non-zero value on failure
3705 */
3706static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3707{
3708 struct completion uic_async_done;
3709 unsigned long flags;
3710 u8 status;
3711 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003712 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003713
3714 mutex_lock(&hba->uic_cmd_mutex);
3715 init_completion(&uic_async_done);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003716 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003717
3718 spin_lock_irqsave(hba->host->host_lock, flags);
3719 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003720 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3721 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3722 /*
3723 * Make sure UIC command completion interrupt is disabled before
3724 * issuing UIC command.
3725 */
3726 wmb();
3727 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003728 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003729 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3730 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003731 if (ret) {
3732 dev_err(hba->dev,
3733 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3734 cmd->command, cmd->argument3, ret);
3735 goto out;
3736 }
3737
3738 if (!wait_for_completion_timeout(hba->uic_async_done,
3739 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3740 dev_err(hba->dev,
3741 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3742 cmd->command, cmd->argument3);
3743 ret = -ETIMEDOUT;
3744 goto out;
3745 }
3746
3747 status = ufshcd_get_upmcrs(hba);
3748 if (status != PWR_LOCAL) {
3749 dev_err(hba->dev,
Zang Leigang479da362017-09-19 16:50:30 +08003750 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003751 cmd->command, status);
3752 ret = (status != PWR_OK) ? status : -1;
3753 }
3754out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08003755 if (ret) {
3756 ufshcd_print_host_state(hba);
3757 ufshcd_print_pwr_info(hba);
3758 ufshcd_print_host_regs(hba);
3759 }
3760
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003761 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003762 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003763 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003764 if (reenable_intr)
3765 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003766 spin_unlock_irqrestore(hba->host->host_lock, flags);
3767 mutex_unlock(&hba->uic_cmd_mutex);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003768
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003769 return ret;
3770}
3771
3772/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303773 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3774 * using DME_SET primitives.
3775 * @hba: per adapter instance
3776 * @mode: powr mode value
3777 *
3778 * Returns 0 on success, non-zero value on failure
3779 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05303780static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303781{
3782 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003783 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303784
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003785 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3786 ret = ufshcd_dme_set(hba,
3787 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3788 if (ret) {
3789 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3790 __func__, ret);
3791 goto out;
3792 }
3793 }
3794
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303795 uic_cmd.command = UIC_CMD_DME_SET;
3796 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3797 uic_cmd.argument3 = mode;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003798 ufshcd_hold(hba, false);
3799 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3800 ufshcd_release(hba);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303801
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003802out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003803 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003804}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303805
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003806static int ufshcd_link_recovery(struct ufs_hba *hba)
3807{
3808 int ret;
3809 unsigned long flags;
3810
3811 spin_lock_irqsave(hba->host->host_lock, flags);
3812 hba->ufshcd_state = UFSHCD_STATE_RESET;
3813 ufshcd_set_eh_in_progress(hba);
3814 spin_unlock_irqrestore(hba->host->host_lock, flags);
3815
3816 ret = ufshcd_host_reset_and_restore(hba);
3817
3818 spin_lock_irqsave(hba->host->host_lock, flags);
3819 if (ret)
3820 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3821 ufshcd_clear_eh_in_progress(hba);
3822 spin_unlock_irqrestore(hba->host->host_lock, flags);
3823
3824 if (ret)
3825 dev_err(hba->dev, "%s: link recovery failed, err %d",
3826 __func__, ret);
3827
3828 return ret;
3829}
3830
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003831static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003832{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003833 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003834 struct uic_command uic_cmd = {0};
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003835 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003836
Kiwoong Kimee32c902016-11-10 21:17:43 +09003837 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3838
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003839 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003840 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003841 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3842 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003843
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003844 if (ret) {
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003845 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3846 __func__, ret);
3847
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003848 /*
3849 * If link recovery fails then return error so that caller
3850 * don't retry the hibern8 enter again.
3851 */
3852 if (ufshcd_link_recovery(hba))
3853 ret = -ENOLINK;
Kiwoong Kimee32c902016-11-10 21:17:43 +09003854 } else
3855 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3856 POST_CHANGE);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003857
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003858 return ret;
3859}
3860
3861static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3862{
3863 int ret = 0, retries;
3864
3865 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3866 ret = __ufshcd_uic_hibern8_enter(hba);
3867 if (!ret || ret == -ENOLINK)
3868 goto out;
3869 }
3870out:
3871 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003872}
3873
3874static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3875{
3876 struct uic_command uic_cmd = {0};
3877 int ret;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003878 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003879
Kiwoong Kimee32c902016-11-10 21:17:43 +09003880 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3881
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003882 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3883 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003884 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3885 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3886
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303887 if (ret) {
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003888 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3889 __func__, ret);
3890 ret = ufshcd_link_recovery(hba);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003891 } else {
Kiwoong Kimee32c902016-11-10 21:17:43 +09003892 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3893 POST_CHANGE);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003894 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3895 hba->ufs_stats.hibern8_exit_cnt++;
3896 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303897
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303898 return ret;
3899}
3900
Adrian Hunterad448372018-03-20 15:07:38 +02003901static void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
3902{
3903 unsigned long flags;
3904
3905 if (!(hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) || !hba->ahit)
3906 return;
3907
3908 spin_lock_irqsave(hba->host->host_lock, flags);
3909 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3910 spin_unlock_irqrestore(hba->host->host_lock, flags);
3911}
3912
Yaniv Gardi50646362014-10-23 13:25:13 +03003913 /**
3914 * ufshcd_init_pwr_info - setting the POR (power on reset)
3915 * values in hba power info
3916 * @hba: per-adapter instance
3917 */
3918static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3919{
3920 hba->pwr_info.gear_rx = UFS_PWM_G1;
3921 hba->pwr_info.gear_tx = UFS_PWM_G1;
3922 hba->pwr_info.lane_rx = 1;
3923 hba->pwr_info.lane_tx = 1;
3924 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3925 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3926 hba->pwr_info.hs_rate = 0;
3927}
3928
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303929/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003930 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3931 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303932 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003933static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303934{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003935 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3936
3937 if (hba->max_pwr_info.is_valid)
3938 return 0;
3939
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003940 pwr_info->pwr_tx = FAST_MODE;
3941 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003942 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303943
3944 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003945 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3946 &pwr_info->lane_rx);
3947 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3948 &pwr_info->lane_tx);
3949
3950 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
3951 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
3952 __func__,
3953 pwr_info->lane_rx,
3954 pwr_info->lane_tx);
3955 return -EINVAL;
3956 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303957
3958 /*
3959 * First, get the maximum gears of HS speed.
3960 * If a zero value, it means there is no HSGEAR capability.
3961 * Then, get the maximum gears of PWM speed.
3962 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003963 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
3964 if (!pwr_info->gear_rx) {
3965 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3966 &pwr_info->gear_rx);
3967 if (!pwr_info->gear_rx) {
3968 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
3969 __func__, pwr_info->gear_rx);
3970 return -EINVAL;
3971 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003972 pwr_info->pwr_rx = SLOW_MODE;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303973 }
3974
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003975 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
3976 &pwr_info->gear_tx);
3977 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303978 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003979 &pwr_info->gear_tx);
3980 if (!pwr_info->gear_tx) {
3981 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
3982 __func__, pwr_info->gear_tx);
3983 return -EINVAL;
3984 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003985 pwr_info->pwr_tx = SLOW_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003986 }
3987
3988 hba->max_pwr_info.is_valid = true;
3989 return 0;
3990}
3991
3992static int ufshcd_change_power_mode(struct ufs_hba *hba,
3993 struct ufs_pa_layer_attr *pwr_mode)
3994{
3995 int ret;
3996
3997 /* if already configured to the requested pwr_mode */
3998 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
3999 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4000 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4001 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4002 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4003 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4004 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4005 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4006 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304007 }
4008
4009 /*
4010 * Configure attributes for power mode change with below.
4011 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4012 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4013 * - PA_HSSERIES
4014 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004015 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4016 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4017 pwr_mode->lane_rx);
4018 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4019 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304020 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004021 else
4022 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304023
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004024 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4025 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4026 pwr_mode->lane_tx);
4027 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4028 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304029 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004030 else
4031 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304032
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004033 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4034 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4035 pwr_mode->pwr_rx == FAST_MODE ||
4036 pwr_mode->pwr_tx == FAST_MODE)
4037 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4038 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304039
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004040 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4041 | pwr_mode->pwr_tx);
4042
4043 if (ret) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304044 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004045 "%s: power mode change failed %d\n", __func__, ret);
4046 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004047 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4048 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004049
4050 memcpy(&hba->pwr_info, pwr_mode,
4051 sizeof(struct ufs_pa_layer_attr));
4052 }
4053
4054 return ret;
4055}
4056
4057/**
4058 * ufshcd_config_pwr_mode - configure a new power mode
4059 * @hba: per-adapter instance
4060 * @desired_pwr_mode: desired power configuration
4061 */
Alim Akhtar0d846e72018-05-06 15:44:18 +05304062int ufshcd_config_pwr_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004063 struct ufs_pa_layer_attr *desired_pwr_mode)
4064{
4065 struct ufs_pa_layer_attr final_params = { 0 };
4066 int ret;
4067
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004068 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4069 desired_pwr_mode, &final_params);
4070
4071 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004072 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4073
4074 ret = ufshcd_change_power_mode(hba, &final_params);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08004075 if (!ret)
4076 ufshcd_print_pwr_info(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304077
4078 return ret;
4079}
Alim Akhtar0d846e72018-05-06 15:44:18 +05304080EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304081
4082/**
Dolev Raviv68078d52013-07-30 00:35:58 +05304083 * ufshcd_complete_dev_init() - checks device readiness
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004084 * @hba: per-adapter instance
Dolev Raviv68078d52013-07-30 00:35:58 +05304085 *
4086 * Set fDeviceInit flag and poll until device toggles it.
4087 */
4088static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4089{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004090 int i;
4091 int err;
Dolev Raviv68078d52013-07-30 00:35:58 +05304092 bool flag_res = 1;
4093
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004094 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4095 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05304096 if (err) {
4097 dev_err(hba->dev,
4098 "%s setting fDeviceInit flag failed with error %d\n",
4099 __func__, err);
4100 goto out;
4101 }
4102
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004103 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4104 for (i = 0; i < 1000 && !err && flag_res; i++)
4105 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4106 QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4107
Dolev Raviv68078d52013-07-30 00:35:58 +05304108 if (err)
4109 dev_err(hba->dev,
4110 "%s reading fDeviceInit flag failed with error %d\n",
4111 __func__, err);
4112 else if (flag_res)
4113 dev_err(hba->dev,
4114 "%s fDeviceInit was not cleared by the device\n",
4115 __func__);
4116
4117out:
4118 return err;
4119}
4120
4121/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304122 * ufshcd_make_hba_operational - Make UFS controller operational
4123 * @hba: per adapter instance
4124 *
4125 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004126 * 1. Enable required interrupts
4127 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004128 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004129 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304130 *
4131 * Returns 0 on success, non-zero value on failure
4132 */
4133static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4134{
4135 int err = 0;
4136 u32 reg;
4137
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304138 /* Enable required interrupts */
4139 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4140
4141 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004142 if (ufshcd_is_intr_aggr_allowed(hba))
4143 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4144 else
4145 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304146
4147 /* Configure UTRL and UTMRL base address registers */
4148 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4149 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4150 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4151 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4152 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4153 REG_UTP_TASK_REQ_LIST_BASE_L);
4154 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4155 REG_UTP_TASK_REQ_LIST_BASE_H);
4156
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304157 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004158 * Make sure base address and interrupt setup are updated before
4159 * enabling the run/stop registers below.
4160 */
4161 wmb();
4162
4163 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304164 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304165 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004166 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304167 if (!(ufshcd_get_lists_status(reg))) {
4168 ufshcd_enable_run_stop_reg(hba);
4169 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304170 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304171 "Host controller not ready to process requests");
4172 err = -EIO;
4173 goto out;
4174 }
4175
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304176out:
4177 return err;
4178}
4179
4180/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02004181 * ufshcd_hba_stop - Send controller to reset state
4182 * @hba: per adapter instance
4183 * @can_sleep: perform sleep or just spin
4184 */
4185static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4186{
4187 int err;
4188
4189 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4190 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4191 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4192 10, 1, can_sleep);
4193 if (err)
4194 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4195}
4196
4197/**
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304198 * ufshcd_hba_execute_hce - initialize the controller
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304199 * @hba: per adapter instance
4200 *
4201 * The controller resets itself and controller firmware initialization
4202 * sequence kicks off. When controller is ready it will set
4203 * the Host Controller Enable bit to 1.
4204 *
4205 * Returns 0 on success, non-zero value on failure
4206 */
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304207static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304208{
4209 int retry;
4210
4211 /*
4212 * msleep of 1 and 5 used in this function might result in msleep(20),
4213 * but it was necessary to send the UFS FPGA to reset mode during
4214 * development and testing of this driver. msleep can be changed to
4215 * mdelay and retry count can be reduced based on the controller.
4216 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004217 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304218 /* change controller state to "reset state" */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004219 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304220
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004221 /* UniPro link is disabled at this point */
4222 ufshcd_set_link_off(hba);
4223
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004224 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004225
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304226 /* start controller initialization sequence */
4227 ufshcd_hba_start(hba);
4228
4229 /*
4230 * To initialize a UFS host controller HCE bit must be set to 1.
4231 * During initialization the HCE bit value changes from 1->0->1.
4232 * When the host controller completes initialization sequence
4233 * it sets the value of HCE bit to 1. The same HCE bit is read back
4234 * to check if the controller has completed initialization sequence.
4235 * So without this delay the value HCE = 1, set in the previous
4236 * instruction might be read back.
4237 * This delay can be changed based on the controller.
4238 */
4239 msleep(1);
4240
4241 /* wait for the host controller to complete initialization */
4242 retry = 10;
4243 while (ufshcd_is_hba_active(hba)) {
4244 if (retry) {
4245 retry--;
4246 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304247 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304248 "Controller enable failed\n");
4249 return -EIO;
4250 }
4251 msleep(5);
4252 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004253
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004254 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004255 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004256
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004257 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004258
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304259 return 0;
4260}
4261
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304262static int ufshcd_hba_enable(struct ufs_hba *hba)
4263{
4264 int ret;
4265
4266 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4267 ufshcd_set_link_off(hba);
4268 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4269
4270 /* enable UIC related interrupts */
4271 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4272 ret = ufshcd_dme_reset(hba);
4273 if (!ret) {
4274 ret = ufshcd_dme_enable(hba);
4275 if (!ret)
4276 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4277 if (ret)
4278 dev_err(hba->dev,
4279 "Host controller enable failed with non-hce\n");
4280 }
4281 } else {
4282 ret = ufshcd_hba_execute_hce(hba);
4283 }
4284
4285 return ret;
4286}
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004287static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4288{
4289 int tx_lanes, i, err = 0;
4290
4291 if (!peer)
4292 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4293 &tx_lanes);
4294 else
4295 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4296 &tx_lanes);
4297 for (i = 0; i < tx_lanes; i++) {
4298 if (!peer)
4299 err = ufshcd_dme_set(hba,
4300 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4301 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4302 0);
4303 else
4304 err = ufshcd_dme_peer_set(hba,
4305 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4306 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4307 0);
4308 if (err) {
4309 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4310 __func__, peer, i, err);
4311 break;
4312 }
4313 }
4314
4315 return err;
4316}
4317
4318static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4319{
4320 return ufshcd_disable_tx_lcc(hba, true);
4321}
4322
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304323/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304324 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304325 * @hba: per adapter instance
4326 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304327 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304328 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304329static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304330{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304331 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004332 int retries = DME_LINKSTARTUP_RETRIES;
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004333 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304334
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004335 /*
4336 * If UFS device isn't active then we will have to issue link startup
4337 * 2 times to make sure the device state move to active.
4338 */
4339 if (!ufshcd_is_ufs_dev_active(hba))
4340 link_startup_again = true;
4341
4342link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004343 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004344 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304345
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004346 ret = ufshcd_dme_link_startup(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004347
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004348 /* check if device is detected by inter-connect layer */
4349 if (!ret && !ufshcd_is_device_present(hba)) {
4350 dev_err(hba->dev, "%s: Device not present\n", __func__);
4351 ret = -ENXIO;
4352 goto out;
4353 }
4354
4355 /*
4356 * DME link lost indication is only received when link is up,
4357 * but we can't be sure if the link is up until link startup
4358 * succeeds. So reset the local Uni-Pro and try again.
4359 */
4360 if (ret && ufshcd_hba_enable(hba))
4361 goto out;
4362 } while (ret && retries--);
4363
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304364 if (ret)
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004365 /* failed to get the link up... retire */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304366 goto out;
4367
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004368 if (link_startup_again) {
4369 link_startup_again = false;
4370 retries = DME_LINKSTARTUP_RETRIES;
4371 goto link_startup;
4372 }
4373
subhashj@codeaurora.orgd2aebb92016-12-22 18:41:33 -08004374 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4375 ufshcd_init_pwr_info(hba);
4376 ufshcd_print_pwr_info(hba);
4377
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004378 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4379 ret = ufshcd_disable_device_tx_lcc(hba);
4380 if (ret)
4381 goto out;
4382 }
4383
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004384 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004385 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4386 if (ret)
4387 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004388
4389 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304390out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004391 if (ret) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304392 dev_err(hba->dev, "link startup failed %d\n", ret);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004393 ufshcd_print_host_state(hba);
4394 ufshcd_print_pwr_info(hba);
4395 ufshcd_print_host_regs(hba);
4396 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304397 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304398}
4399
4400/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304401 * ufshcd_verify_dev_init() - Verify device initialization
4402 * @hba: per-adapter instance
4403 *
4404 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4405 * device Transport Protocol (UTP) layer is ready after a reset.
4406 * If the UTP layer at the device side is not initialized, it may
4407 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4408 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4409 */
4410static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4411{
4412 int err = 0;
4413 int retries;
4414
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004415 ufshcd_hold(hba, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304416 mutex_lock(&hba->dev_cmd.lock);
4417 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4418 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4419 NOP_OUT_TIMEOUT);
4420
4421 if (!err || err == -ETIMEDOUT)
4422 break;
4423
4424 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4425 }
4426 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004427 ufshcd_release(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304428
4429 if (err)
4430 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4431 return err;
4432}
4433
4434/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004435 * ufshcd_set_queue_depth - set lun queue depth
4436 * @sdev: pointer to SCSI device
4437 *
4438 * Read bLUQueueDepth value and activate scsi tagged command
4439 * queueing. For WLUN, queue depth is set to 1. For best-effort
4440 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4441 * value that host can queue.
4442 */
4443static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4444{
4445 int ret = 0;
4446 u8 lun_qdepth;
4447 struct ufs_hba *hba;
4448
4449 hba = shost_priv(sdev->host);
4450
4451 lun_qdepth = hba->nutrs;
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02004452 ret = ufshcd_read_unit_desc_param(hba,
4453 ufshcd_scsi_to_upiu_lun(sdev->lun),
4454 UNIT_DESC_PARAM_LU_Q_DEPTH,
4455 &lun_qdepth,
4456 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004457
4458 /* Some WLUN doesn't support unit descriptor */
4459 if (ret == -EOPNOTSUPP)
4460 lun_qdepth = 1;
4461 else if (!lun_qdepth)
4462 /* eventually, we can figure out the real queue depth */
4463 lun_qdepth = hba->nutrs;
4464 else
4465 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4466
4467 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4468 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004469 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004470}
4471
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004472/*
4473 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4474 * @hba: per-adapter instance
4475 * @lun: UFS device lun id
4476 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4477 *
4478 * Returns 0 in case of success and b_lu_write_protect status would be returned
4479 * @b_lu_write_protect parameter.
4480 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4481 * Returns -EINVAL in case of invalid parameters passed to this function.
4482 */
4483static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4484 u8 lun,
4485 u8 *b_lu_write_protect)
4486{
4487 int ret;
4488
4489 if (!b_lu_write_protect)
4490 ret = -EINVAL;
4491 /*
4492 * According to UFS device spec, RPMB LU can't be write
4493 * protected so skip reading bLUWriteProtect parameter for
4494 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4495 */
4496 else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4497 ret = -ENOTSUPP;
4498 else
4499 ret = ufshcd_read_unit_desc_param(hba,
4500 lun,
4501 UNIT_DESC_PARAM_LU_WR_PROTECT,
4502 b_lu_write_protect,
4503 sizeof(*b_lu_write_protect));
4504 return ret;
4505}
4506
4507/**
4508 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4509 * status
4510 * @hba: per-adapter instance
4511 * @sdev: pointer to SCSI device
4512 *
4513 */
4514static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4515 struct scsi_device *sdev)
4516{
4517 if (hba->dev_info.f_power_on_wp_en &&
4518 !hba->dev_info.is_lu_power_on_wp) {
4519 u8 b_lu_write_protect;
4520
4521 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4522 &b_lu_write_protect) &&
4523 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4524 hba->dev_info.is_lu_power_on_wp = true;
4525 }
4526}
4527
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004528/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304529 * ufshcd_slave_alloc - handle initial SCSI device configurations
4530 * @sdev: pointer to SCSI device
4531 *
4532 * Returns success
4533 */
4534static int ufshcd_slave_alloc(struct scsi_device *sdev)
4535{
4536 struct ufs_hba *hba;
4537
4538 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304539
4540 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4541 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304542
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304543 /* allow SCSI layer to restart the device in case of errors */
4544 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004545
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004546 /* REPORT SUPPORTED OPERATION CODES is not supported */
4547 sdev->no_report_opcodes = 1;
4548
Sujit Reddy Thumma84af7e82018-01-24 09:52:35 +05304549 /* WRITE_SAME command is not supported */
4550 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004551
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004552 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004553
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004554 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4555
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004556 return 0;
4557}
4558
4559/**
4560 * ufshcd_change_queue_depth - change queue depth
4561 * @sdev: pointer to SCSI device
4562 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004563 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004564 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004565 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004566static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004567{
4568 struct ufs_hba *hba = shost_priv(sdev->host);
4569
4570 if (depth > hba->nutrs)
4571 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004572 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304573}
4574
4575/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004576 * ufshcd_slave_configure - adjust SCSI device configurations
4577 * @sdev: pointer to SCSI device
4578 */
4579static int ufshcd_slave_configure(struct scsi_device *sdev)
4580{
4581 struct request_queue *q = sdev->request_queue;
4582
4583 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
4584 blk_queue_max_segment_size(q, PRDT_DATA_BYTE_COUNT_MAX);
4585
4586 return 0;
4587}
4588
4589/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304590 * ufshcd_slave_destroy - remove SCSI device configurations
4591 * @sdev: pointer to SCSI device
4592 */
4593static void ufshcd_slave_destroy(struct scsi_device *sdev)
4594{
4595 struct ufs_hba *hba;
4596
4597 hba = shost_priv(sdev->host);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004598 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004599 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4600 unsigned long flags;
4601
4602 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004603 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004604 spin_unlock_irqrestore(hba->host->host_lock, flags);
4605 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304606}
4607
4608/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304609 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004610 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304611 * @scsi_status: SCSI command status
4612 *
4613 * Returns value base on SCSI command status
4614 */
4615static inline int
4616ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4617{
4618 int result = 0;
4619
4620 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304621 case SAM_STAT_CHECK_CONDITION:
4622 ufshcd_copy_sense_data(lrbp);
Tomas Winkler30eb2e42018-11-26 10:10:34 +02004623 /* fallthrough */
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304624 case SAM_STAT_GOOD:
4625 result |= DID_OK << 16 |
4626 COMMAND_COMPLETE << 8 |
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304627 scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304628 break;
4629 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304630 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304631 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304632 ufshcd_copy_sense_data(lrbp);
4633 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304634 break;
4635 default:
4636 result |= DID_ERROR << 16;
4637 break;
4638 } /* end of switch */
4639
4640 return result;
4641}
4642
4643/**
4644 * ufshcd_transfer_rsp_status - Get overall status of the response
4645 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004646 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304647 *
4648 * Returns result of the command to notify SCSI midlayer
4649 */
4650static inline int
4651ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4652{
4653 int result = 0;
4654 int scsi_status;
4655 int ocs;
4656
4657 /* overall command status of utrd */
4658 ocs = ufshcd_get_tr_ocs(lrbp);
4659
4660 switch (ocs) {
4661 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304662 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004663 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304664 switch (result) {
4665 case UPIU_TRANSACTION_RESPONSE:
4666 /*
4667 * get the response UPIU result to extract
4668 * the SCSI command status
4669 */
4670 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4671
4672 /*
4673 * get the result based on SCSI status response
4674 * to notify the SCSI midlayer of the command status
4675 */
4676 scsi_status = result & MASK_SCSI_STATUS;
4677 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304678
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02004679 /*
4680 * Currently we are only supporting BKOPs exception
4681 * events hence we can ignore BKOPs exception event
4682 * during power management callbacks. BKOPs exception
4683 * event is not expected to be raised in runtime suspend
4684 * callback as it allows the urgent bkops.
4685 * During system suspend, we are anyway forcefully
4686 * disabling the bkops and if urgent bkops is needed
4687 * it will be enabled on system resume. Long term
4688 * solution could be to abort the system suspend if
4689 * UFS device needs urgent BKOPs.
4690 */
4691 if (!hba->pm_op_in_progress &&
4692 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304693 schedule_work(&hba->eeh_work);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304694 break;
4695 case UPIU_TRANSACTION_REJECT_UPIU:
4696 /* TODO: handle Reject UPIU Response */
4697 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304698 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304699 "Reject UPIU not fully implemented\n");
4700 break;
4701 default:
4702 result = DID_ERROR << 16;
4703 dev_err(hba->dev,
4704 "Unexpected request response code = %x\n",
4705 result);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304706 break;
4707 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304708 break;
4709 case OCS_ABORTED:
4710 result |= DID_ABORT << 16;
4711 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304712 case OCS_INVALID_COMMAND_STATUS:
4713 result |= DID_REQUEUE << 16;
4714 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304715 case OCS_INVALID_CMD_TABLE_ATTR:
4716 case OCS_INVALID_PRDT_ATTR:
4717 case OCS_MISMATCH_DATA_BUF_SIZE:
4718 case OCS_MISMATCH_RESP_UPIU_SIZE:
4719 case OCS_PEER_COMM_FAILURE:
4720 case OCS_FATAL_ERROR:
4721 default:
4722 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304723 dev_err(hba->dev,
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004724 "OCS error from controller = %x for tag %d\n",
4725 ocs, lrbp->task_tag);
4726 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08004727 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304728 break;
4729 } /* end of switch */
4730
Dolev Raviv66cc8202016-12-22 18:39:42 -08004731 if (host_byte(result) != DID_OK)
4732 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304733 return result;
4734}
4735
4736/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304737 * ufshcd_uic_cmd_compl - handle completion of uic command
4738 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304739 * @intr_status: interrupt status generated by the controller
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304740 */
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304741static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304742{
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304743 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304744 hba->active_uic_cmd->argument2 |=
4745 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304746 hba->active_uic_cmd->argument3 =
4747 ufshcd_get_dme_attr_val(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304748 complete(&hba->active_uic_cmd->done);
4749 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304750
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004751 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done)
4752 complete(hba->uic_async_done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304753}
4754
4755/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004756 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304757 * @hba: per adapter instance
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004758 * @completed_reqs: requests to complete
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304759 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004760static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4761 unsigned long completed_reqs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304762{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304763 struct ufshcd_lrb *lrbp;
4764 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304765 int result;
4766 int index;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004767
Dolev Ravive9d501b2014-07-01 12:22:37 +03004768 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4769 lrbp = &hba->lrb[index];
4770 cmd = lrbp->cmd;
4771 if (cmd) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004772 ufshcd_add_command_trace(hba, index, "complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004773 result = ufshcd_transfer_rsp_status(hba, lrbp);
4774 scsi_dma_unmap(cmd);
4775 cmd->result = result;
4776 /* Mark completed command as NULL in LRB */
4777 lrbp->cmd = NULL;
4778 clear_bit_unlock(index, &hba->lrb_in_use);
4779 /* Do not touch lrbp after scsi done */
4780 cmd->scsi_done(cmd);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004781 __ufshcd_release(hba);
Joao Pinto300bb132016-05-11 12:21:27 +01004782 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4783 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004784 if (hba->dev_cmd.complete) {
4785 ufshcd_add_command_trace(hba, index,
4786 "dev_complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004787 complete(hba->dev_cmd.complete);
Lee Susman1a07f2d2016-12-22 18:42:03 -08004788 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03004789 }
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08004790 if (ufshcd_is_clkscaling_supported(hba))
4791 hba->clk_scaling.active_reqs--;
Zang Leigang09017182017-09-27 10:06:06 +08004792
4793 lrbp->compl_time_stamp = ktime_get();
Dolev Ravive9d501b2014-07-01 12:22:37 +03004794 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304795
4796 /* clear corresponding bits of completed commands */
4797 hba->outstanding_reqs ^= completed_reqs;
4798
Sahitya Tummala856b3482014-09-25 15:32:34 +03004799 ufshcd_clk_scaling_update_busy(hba);
4800
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304801 /* we might have free'd some tags above */
4802 wake_up(&hba->dev_cmd.tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304803}
4804
4805/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004806 * ufshcd_transfer_req_compl - handle SCSI and query command completion
4807 * @hba: per adapter instance
4808 */
4809static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
4810{
4811 unsigned long completed_reqs;
4812 u32 tr_doorbell;
4813
4814 /* Resetting interrupt aggregation counters first and reading the
4815 * DOOR_BELL afterward allows us to handle all the completed requests.
4816 * In order to prevent other interrupts starvation the DB is read once
4817 * after reset. The down side of this solution is the possibility of
4818 * false interrupt if device completes another request after resetting
4819 * aggregation and before reading the DB.
4820 */
Alim Akhtar5ac6abc2018-05-06 15:44:16 +05304821 if (ufshcd_is_intr_aggr_allowed(hba) &&
4822 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004823 ufshcd_reset_intr_aggr(hba);
4824
4825 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4826 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4827
4828 __ufshcd_transfer_req_compl(hba, completed_reqs);
4829}
4830
4831/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304832 * ufshcd_disable_ee - disable exception event
4833 * @hba: per-adapter instance
4834 * @mask: exception event to disable
4835 *
4836 * Disables exception event in the device so that the EVENT_ALERT
4837 * bit is not set.
4838 *
4839 * Returns zero on success, non-zero error value on failure.
4840 */
4841static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4842{
4843 int err = 0;
4844 u32 val;
4845
4846 if (!(hba->ee_ctrl_mask & mask))
4847 goto out;
4848
4849 val = hba->ee_ctrl_mask & ~mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004850 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004851 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304852 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4853 if (!err)
4854 hba->ee_ctrl_mask &= ~mask;
4855out:
4856 return err;
4857}
4858
4859/**
4860 * ufshcd_enable_ee - enable exception event
4861 * @hba: per-adapter instance
4862 * @mask: exception event to enable
4863 *
4864 * Enable corresponding exception event in the device to allow
4865 * device to alert host in critical scenarios.
4866 *
4867 * Returns zero on success, non-zero error value on failure.
4868 */
4869static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4870{
4871 int err = 0;
4872 u32 val;
4873
4874 if (hba->ee_ctrl_mask & mask)
4875 goto out;
4876
4877 val = hba->ee_ctrl_mask | mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004878 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004879 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304880 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4881 if (!err)
4882 hba->ee_ctrl_mask |= mask;
4883out:
4884 return err;
4885}
4886
4887/**
4888 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4889 * @hba: per-adapter instance
4890 *
4891 * Allow device to manage background operations on its own. Enabling
4892 * this might lead to inconsistent latencies during normal data transfers
4893 * as the device is allowed to manage its own way of handling background
4894 * operations.
4895 *
4896 * Returns zero on success, non-zero on failure.
4897 */
4898static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4899{
4900 int err = 0;
4901
4902 if (hba->auto_bkops_enabled)
4903 goto out;
4904
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004905 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304906 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4907 if (err) {
4908 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4909 __func__, err);
4910 goto out;
4911 }
4912
4913 hba->auto_bkops_enabled = true;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08004914 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304915
4916 /* No need of URGENT_BKOPS exception from the device */
4917 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4918 if (err)
4919 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
4920 __func__, err);
4921out:
4922 return err;
4923}
4924
4925/**
4926 * ufshcd_disable_auto_bkops - block device in doing background operations
4927 * @hba: per-adapter instance
4928 *
4929 * Disabling background operations improves command response latency but
4930 * has drawback of device moving into critical state where the device is
4931 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
4932 * host is idle so that BKOPS are managed effectively without any negative
4933 * impacts.
4934 *
4935 * Returns zero on success, non-zero on failure.
4936 */
4937static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
4938{
4939 int err = 0;
4940
4941 if (!hba->auto_bkops_enabled)
4942 goto out;
4943
4944 /*
4945 * If host assisted BKOPs is to be enabled, make sure
4946 * urgent bkops exception is allowed.
4947 */
4948 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
4949 if (err) {
4950 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
4951 __func__, err);
4952 goto out;
4953 }
4954
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004955 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304956 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4957 if (err) {
4958 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
4959 __func__, err);
4960 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4961 goto out;
4962 }
4963
4964 hba->auto_bkops_enabled = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08004965 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304966out:
4967 return err;
4968}
4969
4970/**
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004971 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304972 * @hba: per adapter instance
4973 *
4974 * After a device reset the device may toggle the BKOPS_EN flag
4975 * to default value. The s/w tracking variables should be updated
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004976 * as well. This function would change the auto-bkops state based on
4977 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304978 */
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004979static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304980{
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004981 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
4982 hba->auto_bkops_enabled = false;
4983 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
4984 ufshcd_enable_auto_bkops(hba);
4985 } else {
4986 hba->auto_bkops_enabled = true;
4987 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
4988 ufshcd_disable_auto_bkops(hba);
4989 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304990}
4991
4992static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
4993{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004994 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304995 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
4996}
4997
4998/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004999 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5000 * @hba: per-adapter instance
5001 * @status: bkops_status value
5002 *
5003 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5004 * flag in the device to permit background operations if the device
5005 * bkops_status is greater than or equal to "status" argument passed to
5006 * this function, disable otherwise.
5007 *
5008 * Returns 0 for success, non-zero in case of failure.
5009 *
5010 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5011 * to know whether auto bkops is enabled or disabled after this function
5012 * returns control to it.
5013 */
5014static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5015 enum bkops_status status)
5016{
5017 int err;
5018 u32 curr_status = 0;
5019
5020 err = ufshcd_get_bkops_status(hba, &curr_status);
5021 if (err) {
5022 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5023 __func__, err);
5024 goto out;
5025 } else if (curr_status > BKOPS_STATUS_MAX) {
5026 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5027 __func__, curr_status);
5028 err = -EINVAL;
5029 goto out;
5030 }
5031
5032 if (curr_status >= status)
5033 err = ufshcd_enable_auto_bkops(hba);
5034 else
5035 err = ufshcd_disable_auto_bkops(hba);
5036out:
5037 return err;
5038}
5039
5040/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305041 * ufshcd_urgent_bkops - handle urgent bkops exception event
5042 * @hba: per-adapter instance
5043 *
5044 * Enable fBackgroundOpsEn flag in the device to permit background
5045 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005046 *
5047 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5048 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305049 */
5050static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5051{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005052 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305053}
5054
5055static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5056{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005057 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305058 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5059}
5060
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005061static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5062{
5063 int err;
5064 u32 curr_status = 0;
5065
5066 if (hba->is_urgent_bkops_lvl_checked)
5067 goto enable_auto_bkops;
5068
5069 err = ufshcd_get_bkops_status(hba, &curr_status);
5070 if (err) {
5071 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5072 __func__, err);
5073 goto out;
5074 }
5075
5076 /*
5077 * We are seeing that some devices are raising the urgent bkops
5078 * exception events even when BKOPS status doesn't indicate performace
5079 * impacted or critical. Handle these device by determining their urgent
5080 * bkops status at runtime.
5081 */
5082 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5083 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5084 __func__, curr_status);
5085 /* update the current status as the urgent bkops level */
5086 hba->urgent_bkops_lvl = curr_status;
5087 hba->is_urgent_bkops_lvl_checked = true;
5088 }
5089
5090enable_auto_bkops:
5091 err = ufshcd_enable_auto_bkops(hba);
5092out:
5093 if (err < 0)
5094 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5095 __func__, err);
5096}
5097
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305098/**
5099 * ufshcd_exception_event_handler - handle exceptions raised by device
5100 * @work: pointer to work data
5101 *
5102 * Read bExceptionEventStatus attribute from the device and handle the
5103 * exception event accordingly.
5104 */
5105static void ufshcd_exception_event_handler(struct work_struct *work)
5106{
5107 struct ufs_hba *hba;
5108 int err;
5109 u32 status = 0;
5110 hba = container_of(work, struct ufs_hba, eeh_work);
5111
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305112 pm_runtime_get_sync(hba->dev);
Maya Erez2e3611e92018-05-03 16:37:16 +05305113 scsi_block_requests(hba->host);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305114 err = ufshcd_get_ee_status(hba, &status);
5115 if (err) {
5116 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5117 __func__, err);
5118 goto out;
5119 }
5120
5121 status &= hba->ee_ctrl_mask;
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005122
5123 if (status & MASK_EE_URGENT_BKOPS)
5124 ufshcd_bkops_exception_event_handler(hba);
5125
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305126out:
Maya Erez2e3611e92018-05-03 16:37:16 +05305127 scsi_unblock_requests(hba->host);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305128 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305129 return;
5130}
5131
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005132/* Complete requests that have door-bell cleared */
5133static void ufshcd_complete_requests(struct ufs_hba *hba)
5134{
5135 ufshcd_transfer_req_compl(hba);
5136 ufshcd_tmc_handler(hba);
5137}
5138
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305139/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02005140 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5141 * to recover from the DL NAC errors or not.
5142 * @hba: per-adapter instance
5143 *
5144 * Returns true if error handling is required, false otherwise
5145 */
5146static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5147{
5148 unsigned long flags;
5149 bool err_handling = true;
5150
5151 spin_lock_irqsave(hba->host->host_lock, flags);
5152 /*
5153 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5154 * device fatal error and/or DL NAC & REPLAY timeout errors.
5155 */
5156 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5157 goto out;
5158
5159 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5160 ((hba->saved_err & UIC_ERROR) &&
5161 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5162 goto out;
5163
5164 if ((hba->saved_err & UIC_ERROR) &&
5165 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5166 int err;
5167 /*
5168 * wait for 50ms to see if we can get any other errors or not.
5169 */
5170 spin_unlock_irqrestore(hba->host->host_lock, flags);
5171 msleep(50);
5172 spin_lock_irqsave(hba->host->host_lock, flags);
5173
5174 /*
5175 * now check if we have got any other severe errors other than
5176 * DL NAC error?
5177 */
5178 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5179 ((hba->saved_err & UIC_ERROR) &&
5180 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5181 goto out;
5182
5183 /*
5184 * As DL NAC is the only error received so far, send out NOP
5185 * command to confirm if link is still active or not.
5186 * - If we don't get any response then do error recovery.
5187 * - If we get response then clear the DL NAC error bit.
5188 */
5189
5190 spin_unlock_irqrestore(hba->host->host_lock, flags);
5191 err = ufshcd_verify_dev_init(hba);
5192 spin_lock_irqsave(hba->host->host_lock, flags);
5193
5194 if (err)
5195 goto out;
5196
5197 /* Link seems to be alive hence ignore the DL NAC errors */
5198 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5199 hba->saved_err &= ~UIC_ERROR;
5200 /* clear NAC error */
5201 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5202 if (!hba->saved_uic_err) {
5203 err_handling = false;
5204 goto out;
5205 }
5206 }
5207out:
5208 spin_unlock_irqrestore(hba->host->host_lock, flags);
5209 return err_handling;
5210}
5211
5212/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305213 * ufshcd_err_handler - handle UFS errors that require s/w attention
5214 * @work: pointer to work structure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305215 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305216static void ufshcd_err_handler(struct work_struct *work)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305217{
5218 struct ufs_hba *hba;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305219 unsigned long flags;
5220 u32 err_xfer = 0;
5221 u32 err_tm = 0;
5222 int err = 0;
5223 int tag;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005224 bool needs_reset = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305225
5226 hba = container_of(work, struct ufs_hba, eh_work);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305227
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305228 pm_runtime_get_sync(hba->dev);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005229 ufshcd_hold(hba, false);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305230
5231 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005232 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305233 goto out;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305234
5235 hba->ufshcd_state = UFSHCD_STATE_RESET;
5236 ufshcd_set_eh_in_progress(hba);
5237
5238 /* Complete requests that have door-bell cleared by h/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005239 ufshcd_complete_requests(hba);
Yaniv Gardi583fa622016-03-10 17:37:13 +02005240
5241 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5242 bool ret;
5243
5244 spin_unlock_irqrestore(hba->host->host_lock, flags);
5245 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5246 ret = ufshcd_quirk_dl_nac_errors(hba);
5247 spin_lock_irqsave(hba->host->host_lock, flags);
5248 if (!ret)
5249 goto skip_err_handling;
5250 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005251 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5252 ((hba->saved_err & UIC_ERROR) &&
5253 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5254 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5255 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5256 needs_reset = true;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305257
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005258 /*
5259 * if host reset is required then skip clearing the pending
5260 * transfers forcefully because they will automatically get
5261 * cleared after link startup.
5262 */
5263 if (needs_reset)
5264 goto skip_pending_xfer_clear;
5265
5266 /* release lock as clear command might sleep */
5267 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305268 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005269 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5270 if (ufshcd_clear_cmd(hba, tag)) {
5271 err_xfer = true;
5272 goto lock_skip_pending_xfer_clear;
5273 }
5274 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305275
5276 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005277 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5278 if (ufshcd_clear_tm_cmd(hba, tag)) {
5279 err_tm = true;
5280 goto lock_skip_pending_xfer_clear;
5281 }
5282 }
5283
5284lock_skip_pending_xfer_clear:
5285 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305286
5287 /* Complete the requests that are cleared by s/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005288 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305289
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005290 if (err_xfer || err_tm)
5291 needs_reset = true;
5292
5293skip_pending_xfer_clear:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305294 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005295 if (needs_reset) {
5296 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5297
5298 /*
5299 * ufshcd_reset_and_restore() does the link reinitialization
5300 * which will need atleast one empty doorbell slot to send the
5301 * device management commands (NOP and query commands).
5302 * If there is no slot empty at this moment then free up last
5303 * slot forcefully.
5304 */
5305 if (hba->outstanding_reqs == max_doorbells)
5306 __ufshcd_transfer_req_compl(hba,
5307 (1UL << (hba->nutrs - 1)));
5308
5309 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305310 err = ufshcd_reset_and_restore(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005311 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305312 if (err) {
5313 dev_err(hba->dev, "%s: reset and restore failed\n",
5314 __func__);
5315 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5316 }
5317 /*
5318 * Inform scsi mid-layer that we did reset and allow to handle
5319 * Unit Attention properly.
5320 */
5321 scsi_report_bus_reset(hba->host, 0);
5322 hba->saved_err = 0;
5323 hba->saved_uic_err = 0;
5324 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005325
Yaniv Gardi583fa622016-03-10 17:37:13 +02005326skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005327 if (!needs_reset) {
5328 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5329 if (hba->saved_err || hba->saved_uic_err)
5330 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5331 __func__, hba->saved_err, hba->saved_uic_err);
5332 }
5333
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305334 ufshcd_clear_eh_in_progress(hba);
5335
5336out:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005337 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani38135532018-05-03 16:37:18 +05305338 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005339 ufshcd_release(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305340 pm_runtime_put_sync(hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305341}
5342
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005343static void ufshcd_update_uic_reg_hist(struct ufs_uic_err_reg_hist *reg_hist,
5344 u32 reg)
5345{
5346 reg_hist->reg[reg_hist->pos] = reg;
5347 reg_hist->tstamp[reg_hist->pos] = ktime_get();
5348 reg_hist->pos = (reg_hist->pos + 1) % UIC_ERR_REG_HIST_LENGTH;
5349}
5350
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305351/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305352 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5353 * @hba: per-adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305354 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305355static void ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305356{
5357 u32 reg;
5358
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005359 /* PHY layer lane error */
5360 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5361 /* Ignore LINERESET indication, as this is not an error */
5362 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005363 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005364 /*
5365 * To know whether this error is fatal or not, DB timeout
5366 * must be checked but this error is handled separately.
5367 */
5368 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005369 ufshcd_update_uic_reg_hist(&hba->ufs_stats.pa_err, reg);
5370 }
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005371
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305372 /* PA_INIT_ERROR is fatal and needs UIC reset */
5373 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005374 if (reg)
5375 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dl_err, reg);
5376
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305377 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5378 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005379 else if (hba->dev_quirks &
5380 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5381 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5382 hba->uic_error |=
5383 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5384 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5385 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5386 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305387
5388 /* UIC NL/TL/DME errors needs software retry */
5389 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005390 if (reg) {
5391 ufshcd_update_uic_reg_hist(&hba->ufs_stats.nl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305392 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005393 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305394
5395 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005396 if (reg) {
5397 ufshcd_update_uic_reg_hist(&hba->ufs_stats.tl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305398 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005399 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305400
5401 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005402 if (reg) {
5403 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dme_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305404 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005405 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305406
5407 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5408 __func__, hba->uic_error);
5409}
5410
5411/**
5412 * ufshcd_check_errors - Check for errors that need s/w attention
5413 * @hba: per-adapter instance
5414 */
5415static void ufshcd_check_errors(struct ufs_hba *hba)
5416{
5417 bool queue_eh_work = false;
5418
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305419 if (hba->errors & INT_FATAL_ERRORS)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305420 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305421
5422 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305423 hba->uic_error = 0;
5424 ufshcd_update_uic_error(hba);
5425 if (hba->uic_error)
5426 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305427 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305428
5429 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005430 /*
5431 * update the transfer error masks to sticky bits, let's do this
5432 * irrespective of current ufshcd_state.
5433 */
5434 hba->saved_err |= hba->errors;
5435 hba->saved_uic_err |= hba->uic_error;
5436
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305437 /* handle fatal errors only when link is functional */
5438 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5439 /* block commands from scsi mid-layer */
Subhash Jadavani38135532018-05-03 16:37:18 +05305440 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305441
Zang Leigang141f8162016-11-16 11:29:37 +08005442 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
Dolev Raviv66cc8202016-12-22 18:39:42 -08005443
5444 /* dump controller state before resetting */
5445 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5446 bool pr_prdt = !!(hba->saved_err &
5447 SYSTEM_BUS_FATAL_ERROR);
5448
5449 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5450 __func__, hba->saved_err,
5451 hba->saved_uic_err);
5452
5453 ufshcd_print_host_regs(hba);
5454 ufshcd_print_pwr_info(hba);
5455 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5456 ufshcd_print_trs(hba, hba->outstanding_reqs,
5457 pr_prdt);
5458 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305459 schedule_work(&hba->eh_work);
5460 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305461 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305462 /*
5463 * if (!queue_eh_work) -
5464 * Other errors are either non-fatal where host recovers
5465 * itself without s/w intervention or errors that will be
5466 * handled by the SCSI core layer.
5467 */
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305468}
5469
5470/**
5471 * ufshcd_tmc_handler - handle task management function completion
5472 * @hba: per adapter instance
5473 */
5474static void ufshcd_tmc_handler(struct ufs_hba *hba)
5475{
5476 u32 tm_doorbell;
5477
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305478 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305479 hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305480 wake_up(&hba->tm_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305481}
5482
5483/**
5484 * ufshcd_sl_intr - Interrupt service routine
5485 * @hba: per adapter instance
5486 * @intr_status: contains interrupts generated by the controller
5487 */
5488static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
5489{
5490 hba->errors = UFSHCD_ERROR_MASK & intr_status;
5491 if (hba->errors)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305492 ufshcd_check_errors(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305493
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305494 if (intr_status & UFSHCD_UIC_MASK)
5495 ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305496
5497 if (intr_status & UTP_TASK_REQ_COMPL)
5498 ufshcd_tmc_handler(hba);
5499
5500 if (intr_status & UTP_TRANSFER_REQ_COMPL)
5501 ufshcd_transfer_req_compl(hba);
5502}
5503
5504/**
5505 * ufshcd_intr - Main interrupt service routine
5506 * @irq: irq number
5507 * @__hba: pointer to adapter instance
5508 *
5509 * Returns IRQ_HANDLED - If interrupt is valid
5510 * IRQ_NONE - If invalid interrupt
5511 */
5512static irqreturn_t ufshcd_intr(int irq, void *__hba)
5513{
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005514 u32 intr_status, enabled_intr_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305515 irqreturn_t retval = IRQ_NONE;
5516 struct ufs_hba *hba = __hba;
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305517 int retries = hba->nutrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305518
5519 spin_lock(hba->host->host_lock);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305520 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305521
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305522 /*
5523 * There could be max of hba->nutrs reqs in flight and in worst case
5524 * if the reqs get finished 1 by 1 after the interrupt status is
5525 * read, make sure we handle them by checking the interrupt status
5526 * again in a loop until we process all of the reqs before returning.
5527 */
5528 do {
5529 enabled_intr_status =
5530 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5531 if (intr_status)
5532 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
5533 if (enabled_intr_status) {
5534 ufshcd_sl_intr(hba, enabled_intr_status);
5535 retval = IRQ_HANDLED;
5536 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005537
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305538 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5539 } while (intr_status && --retries);
5540
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305541 spin_unlock(hba->host->host_lock);
5542 return retval;
5543}
5544
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305545static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5546{
5547 int err = 0;
5548 u32 mask = 1 << tag;
5549 unsigned long flags;
5550
5551 if (!test_bit(tag, &hba->outstanding_tasks))
5552 goto out;
5553
5554 spin_lock_irqsave(hba->host->host_lock, flags);
Alim Akhtar1399c5b2018-05-06 15:44:15 +05305555 ufshcd_utmrl_clear(hba, tag);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305556 spin_unlock_irqrestore(hba->host->host_lock, flags);
5557
5558 /* poll for max. 1 sec to clear door bell register by h/w */
5559 err = ufshcd_wait_for_register(hba,
5560 REG_UTP_TASK_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02005561 mask, 0, 1000, 1000, true);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305562out:
5563 return err;
5564}
5565
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005566static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
5567 struct utp_task_req_desc *treq, u8 tm_function)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305568{
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005569 struct Scsi_Host *host = hba->host;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305570 unsigned long flags;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005571 int free_slot, task_tag, err;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305572
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305573 /*
5574 * Get free slot, sleep if slots are unavailable.
5575 * Even though we use wait_event() which sleeps indefinitely,
5576 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5577 */
5578 wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005579 ufshcd_hold(hba, false);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305580
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305581 spin_lock_irqsave(host->host_lock, flags);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305582 task_tag = hba->nutrs + free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305583
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005584 treq->req_header.dword_0 |= cpu_to_be32(task_tag);
5585
5586 memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
Kiwoong Kimd2877be2016-11-10 21:16:15 +09005587 ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5588
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305589 /* send command to the controller */
5590 __set_bit(free_slot, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02005591
5592 /* Make sure descriptors are ready before ringing the task doorbell */
5593 wmb();
5594
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305595 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07005596 /* Make sure that doorbell is committed immediately */
5597 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305598
5599 spin_unlock_irqrestore(host->host_lock, flags);
5600
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005601 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");
5602
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305603 /* wait until the task management command is completed */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305604 err = wait_event_timeout(hba->tm_wq,
5605 test_bit(free_slot, &hba->tm_condition),
5606 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305607 if (!err) {
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005608 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305609 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5610 __func__, tm_function);
5611 if (ufshcd_clear_tm_cmd(hba, free_slot))
5612 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5613 __func__, free_slot);
5614 err = -ETIMEDOUT;
5615 } else {
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005616 err = 0;
5617 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));
5618
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005619 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005620
5621 spin_lock_irqsave(hba->host->host_lock, flags);
5622 __clear_bit(free_slot, &hba->outstanding_tasks);
5623 spin_unlock_irqrestore(hba->host->host_lock, flags);
5624
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305625 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305626
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305627 clear_bit(free_slot, &hba->tm_condition);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305628 ufshcd_put_tm_slot(hba, free_slot);
5629 wake_up(&hba->tm_tag_wq);
5630
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005631 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305632 return err;
5633}
5634
5635/**
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005636 * ufshcd_issue_tm_cmd - issues task management commands to controller
5637 * @hba: per adapter instance
5638 * @lun_id: LUN ID to which TM command is sent
5639 * @task_id: task ID to which the TM command is applicable
5640 * @tm_function: task management function opcode
5641 * @tm_response: task management service response return value
5642 *
5643 * Returns non-zero value on error, zero on success.
5644 */
5645static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5646 u8 tm_function, u8 *tm_response)
5647{
5648 struct utp_task_req_desc treq = { { 0 }, };
5649 int ocs_value, err;
5650
5651 /* Configure task request descriptor */
5652 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5653 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5654
5655 /* Configure task request UPIU */
5656 treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
5657 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
5658 treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);
5659
5660 /*
5661 * The host shall provide the same value for LUN field in the basic
5662 * header and for Input Parameter.
5663 */
5664 treq.input_param1 = cpu_to_be32(lun_id);
5665 treq.input_param2 = cpu_to_be32(task_id);
5666
5667 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
5668 if (err == -ETIMEDOUT)
5669 return err;
5670
5671 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5672 if (ocs_value != OCS_SUCCESS)
5673 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
5674 __func__, ocs_value);
5675 else if (tm_response)
5676 *tm_response = be32_to_cpu(treq.output_param1) &
5677 MASK_TM_SERVICE_RESP;
5678 return err;
5679}
5680
5681/**
Avri Altman5e0a86e2018-10-07 17:30:37 +03005682 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
5683 * @hba: per-adapter instance
5684 * @req_upiu: upiu request
5685 * @rsp_upiu: upiu reply
5686 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
5687 * @desc_buff: pointer to descriptor buffer, NULL if NA
5688 * @buff_len: descriptor size, 0 if NA
5689 * @desc_op: descriptor operation
5690 *
5691 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
5692 * Therefore, it "rides" the device management infrastructure: uses its tag and
5693 * tasks work queues.
5694 *
5695 * Since there is only one available tag for device management commands,
5696 * the caller is expected to hold the hba->dev_cmd.lock mutex.
5697 */
5698static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
5699 struct utp_upiu_req *req_upiu,
5700 struct utp_upiu_req *rsp_upiu,
5701 u8 *desc_buff, int *buff_len,
5702 int cmd_type,
5703 enum query_opcode desc_op)
5704{
5705 struct ufshcd_lrb *lrbp;
5706 int err = 0;
5707 int tag;
5708 struct completion wait;
5709 unsigned long flags;
5710 u32 upiu_flags;
5711
5712 down_read(&hba->clk_scaling_lock);
5713
5714 wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
5715
5716 init_completion(&wait);
5717 lrbp = &hba->lrb[tag];
5718 WARN_ON(lrbp->cmd);
5719
5720 lrbp->cmd = NULL;
5721 lrbp->sense_bufflen = 0;
5722 lrbp->sense_buffer = NULL;
5723 lrbp->task_tag = tag;
5724 lrbp->lun = 0;
5725 lrbp->intr_cmd = true;
5726 hba->dev_cmd.type = cmd_type;
5727
5728 switch (hba->ufs_version) {
5729 case UFSHCI_VERSION_10:
5730 case UFSHCI_VERSION_11:
5731 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
5732 break;
5733 default:
5734 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
5735 break;
5736 }
5737
5738 /* update the task tag in the request upiu */
5739 req_upiu->header.dword_0 |= cpu_to_be32(tag);
5740
5741 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
5742
5743 /* just copy the upiu request as it is */
5744 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
5745 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
5746 /* The Data Segment Area is optional depending upon the query
5747 * function value. for WRITE DESCRIPTOR, the data segment
5748 * follows right after the tsf.
5749 */
5750 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
5751 *buff_len = 0;
5752 }
5753
5754 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
5755
5756 hba->dev_cmd.complete = &wait;
5757
5758 /* Make sure descriptors are ready before ringing the doorbell */
5759 wmb();
5760 spin_lock_irqsave(hba->host->host_lock, flags);
5761 ufshcd_send_command(hba, tag);
5762 spin_unlock_irqrestore(hba->host->host_lock, flags);
5763
5764 /*
5765 * ignore the returning value here - ufshcd_check_query_response is
5766 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
5767 * read the response directly ignoring all errors.
5768 */
5769 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
5770
5771 /* just copy the upiu response as it is */
5772 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
5773
5774 ufshcd_put_dev_cmd_tag(hba, tag);
5775 wake_up(&hba->dev_cmd.tag_wq);
5776 up_read(&hba->clk_scaling_lock);
5777 return err;
5778}
5779
5780/**
5781 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
5782 * @hba: per-adapter instance
5783 * @req_upiu: upiu request
5784 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
5785 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
5786 * @desc_buff: pointer to descriptor buffer, NULL if NA
5787 * @buff_len: descriptor size, 0 if NA
5788 * @desc_op: descriptor operation
5789 *
5790 * Supports UTP Transfer requests (nop and query), and UTP Task
5791 * Management requests.
5792 * It is up to the caller to fill the upiu conent properly, as it will
5793 * be copied without any further input validations.
5794 */
5795int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
5796 struct utp_upiu_req *req_upiu,
5797 struct utp_upiu_req *rsp_upiu,
5798 int msgcode,
5799 u8 *desc_buff, int *buff_len,
5800 enum query_opcode desc_op)
5801{
5802 int err;
5803 int cmd_type = DEV_CMD_TYPE_QUERY;
5804 struct utp_task_req_desc treq = { { 0 }, };
5805 int ocs_value;
5806 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
5807
5808 if (desc_buff && desc_op != UPIU_QUERY_OPCODE_WRITE_DESC) {
5809 err = -ENOTSUPP;
5810 goto out;
5811 }
5812
5813 switch (msgcode) {
5814 case UPIU_TRANSACTION_NOP_OUT:
5815 cmd_type = DEV_CMD_TYPE_NOP;
5816 /* fall through */
5817 case UPIU_TRANSACTION_QUERY_REQ:
5818 ufshcd_hold(hba, false);
5819 mutex_lock(&hba->dev_cmd.lock);
5820 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
5821 desc_buff, buff_len,
5822 cmd_type, desc_op);
5823 mutex_unlock(&hba->dev_cmd.lock);
5824 ufshcd_release(hba);
5825
5826 break;
5827 case UPIU_TRANSACTION_TASK_REQ:
5828 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5829 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5830
5831 memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));
5832
5833 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
5834 if (err == -ETIMEDOUT)
5835 break;
5836
5837 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5838 if (ocs_value != OCS_SUCCESS) {
5839 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
5840 ocs_value);
5841 break;
5842 }
5843
5844 memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));
5845
5846 break;
5847 default:
5848 err = -EINVAL;
5849
5850 break;
5851 }
5852
5853out:
5854 return err;
5855}
5856
5857/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305858 * ufshcd_eh_device_reset_handler - device reset handler registered to
5859 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305860 * @cmd: SCSI command pointer
5861 *
5862 * Returns SUCCESS/FAILED
5863 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305864static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305865{
5866 struct Scsi_Host *host;
5867 struct ufs_hba *hba;
5868 unsigned int tag;
5869 u32 pos;
5870 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305871 u8 resp = 0xF;
5872 struct ufshcd_lrb *lrbp;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305873 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305874
5875 host = cmd->device->host;
5876 hba = shost_priv(host);
5877 tag = cmd->request->tag;
5878
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305879 lrbp = &hba->lrb[tag];
5880 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
5881 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305882 if (!err)
5883 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305884 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305885 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305886
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305887 /* clear the commands that were pending for corresponding LUN */
5888 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
5889 if (hba->lrb[pos].lun == lrbp->lun) {
5890 err = ufshcd_clear_cmd(hba, pos);
5891 if (err)
5892 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305893 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305894 }
5895 spin_lock_irqsave(host->host_lock, flags);
5896 ufshcd_transfer_req_compl(hba);
5897 spin_unlock_irqrestore(host->host_lock, flags);
Gilad Broner7fabb772017-02-03 16:56:50 -08005898
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305899out:
Gilad Broner7fabb772017-02-03 16:56:50 -08005900 hba->req_abort_count = 0;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305901 if (!err) {
5902 err = SUCCESS;
5903 } else {
5904 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
5905 err = FAILED;
5906 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305907 return err;
5908}
5909
Gilad Bronere0b299e2017-02-03 16:56:40 -08005910static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
5911{
5912 struct ufshcd_lrb *lrbp;
5913 int tag;
5914
5915 for_each_set_bit(tag, &bitmap, hba->nutrs) {
5916 lrbp = &hba->lrb[tag];
5917 lrbp->req_abort_skip = true;
5918 }
5919}
5920
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305921/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305922 * ufshcd_abort - abort a specific command
5923 * @cmd: SCSI command pointer
5924 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305925 * Abort the pending command in device by sending UFS_ABORT_TASK task management
5926 * command, and in host controller by clearing the door-bell register. There can
5927 * be race between controller sending the command to the device while abort is
5928 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
5929 * really issued and then try to abort it.
5930 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305931 * Returns SUCCESS/FAILED
5932 */
5933static int ufshcd_abort(struct scsi_cmnd *cmd)
5934{
5935 struct Scsi_Host *host;
5936 struct ufs_hba *hba;
5937 unsigned long flags;
5938 unsigned int tag;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05305939 int err = 0;
5940 int poll_cnt;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305941 u8 resp = 0xF;
5942 struct ufshcd_lrb *lrbp;
Dolev Ravive9d501b2014-07-01 12:22:37 +03005943 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305944
5945 host = cmd->device->host;
5946 hba = shost_priv(host);
5947 tag = cmd->request->tag;
Dolev Ravive7d38252016-12-22 18:40:07 -08005948 lrbp = &hba->lrb[tag];
Yaniv Gardi14497322016-02-01 15:02:39 +02005949 if (!ufshcd_valid_tag(hba, tag)) {
5950 dev_err(hba->dev,
5951 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
5952 __func__, tag, cmd, cmd->request);
5953 BUG();
5954 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305955
Dolev Ravive7d38252016-12-22 18:40:07 -08005956 /*
5957 * Task abort to the device W-LUN is illegal. When this command
5958 * will fail, due to spec violation, scsi err handling next step
5959 * will be to send LU reset which, again, is a spec violation.
5960 * To avoid these unnecessary/illegal step we skip to the last error
5961 * handling stage: reset and restore.
5962 */
5963 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
5964 return ufshcd_eh_host_reset_handler(cmd);
5965
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005966 ufshcd_hold(hba, false);
Dolev Ravive9d501b2014-07-01 12:22:37 +03005967 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Yaniv Gardi14497322016-02-01 15:02:39 +02005968 /* If command is already aborted/completed, return SUCCESS */
5969 if (!(test_bit(tag, &hba->outstanding_reqs))) {
5970 dev_err(hba->dev,
5971 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
5972 __func__, tag, hba->outstanding_reqs, reg);
5973 goto out;
5974 }
5975
Dolev Ravive9d501b2014-07-01 12:22:37 +03005976 if (!(reg & (1 << tag))) {
5977 dev_err(hba->dev,
5978 "%s: cmd was completed, but without a notifying intr, tag = %d",
5979 __func__, tag);
5980 }
5981
Dolev Raviv66cc8202016-12-22 18:39:42 -08005982 /* Print Transfer Request of aborted task */
5983 dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
Dolev Raviv66cc8202016-12-22 18:39:42 -08005984
Gilad Broner7fabb772017-02-03 16:56:50 -08005985 /*
5986 * Print detailed info about aborted request.
5987 * As more than one request might get aborted at the same time,
5988 * print full information only for the first aborted request in order
5989 * to reduce repeated printouts. For other aborted requests only print
5990 * basic details.
5991 */
5992 scsi_print_command(hba->lrb[tag].cmd);
5993 if (!hba->req_abort_count) {
5994 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08005995 ufshcd_print_host_state(hba);
Gilad Broner7fabb772017-02-03 16:56:50 -08005996 ufshcd_print_pwr_info(hba);
5997 ufshcd_print_trs(hba, 1 << tag, true);
5998 } else {
5999 ufshcd_print_trs(hba, 1 << tag, false);
6000 }
6001 hba->req_abort_count++;
Gilad Bronere0b299e2017-02-03 16:56:40 -08006002
6003 /* Skip task abort in case previous aborts failed and report failure */
6004 if (lrbp->req_abort_skip) {
6005 err = -EIO;
6006 goto out;
6007 }
6008
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306009 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6010 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6011 UFS_QUERY_TASK, &resp);
6012 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6013 /* cmd pending in the device */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006014 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6015 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306016 break;
6017 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306018 /*
6019 * cmd not pending in the device, check if it is
6020 * in transition.
6021 */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006022 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6023 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306024 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6025 if (reg & (1 << tag)) {
6026 /* sleep for max. 200us to stabilize */
6027 usleep_range(100, 200);
6028 continue;
6029 }
6030 /* command completed already */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006031 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6032 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306033 goto out;
6034 } else {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006035 dev_err(hba->dev,
6036 "%s: no response from device. tag = %d, err %d\n",
6037 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306038 if (!err)
6039 err = resp; /* service response error */
6040 goto out;
6041 }
6042 }
6043
6044 if (!poll_cnt) {
6045 err = -EBUSY;
6046 goto out;
6047 }
6048
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306049 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6050 UFS_ABORT_TASK, &resp);
6051 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006052 if (!err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306053 err = resp; /* service response error */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006054 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6055 __func__, tag, err);
6056 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306057 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306058 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306059
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306060 err = ufshcd_clear_cmd(hba, tag);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006061 if (err) {
6062 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6063 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306064 goto out;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006065 }
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306066
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306067 scsi_dma_unmap(cmd);
6068
6069 spin_lock_irqsave(host->host_lock, flags);
Yaniv Gardia48353f2016-02-01 15:02:40 +02006070 ufshcd_outstanding_req_clear(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306071 hba->lrb[tag].cmd = NULL;
6072 spin_unlock_irqrestore(host->host_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306073
6074 clear_bit_unlock(tag, &hba->lrb_in_use);
6075 wake_up(&hba->dev_cmd.tag_wq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006076
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306077out:
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306078 if (!err) {
6079 err = SUCCESS;
6080 } else {
6081 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Gilad Bronere0b299e2017-02-03 16:56:40 -08006082 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306083 err = FAILED;
6084 }
6085
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006086 /*
6087 * This ufshcd_release() corresponds to the original scsi cmd that got
6088 * aborted here (as we won't get any IRQ for it).
6089 */
6090 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306091 return err;
6092}
6093
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306094/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306095 * ufshcd_host_reset_and_restore - reset and restore host controller
6096 * @hba: per-adapter instance
6097 *
6098 * Note that host controller reset may issue DME_RESET to
6099 * local and remote (device) Uni-Pro stack and the attributes
6100 * are reset to default state.
6101 *
6102 * Returns zero on success, non-zero on failure
6103 */
6104static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6105{
6106 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306107 unsigned long flags;
6108
6109 /* Reset the host controller */
6110 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02006111 ufshcd_hba_stop(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306112 spin_unlock_irqrestore(hba->host->host_lock, flags);
6113
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08006114 /* scale up clocks to max frequency before full reinitialization */
6115 ufshcd_scale_clks(hba, true);
6116
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306117 err = ufshcd_hba_enable(hba);
6118 if (err)
6119 goto out;
6120
6121 /* Establish the link again and restore the device */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006122 err = ufshcd_probe_hba(hba);
6123
6124 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306125 err = -EIO;
6126out:
6127 if (err)
6128 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
6129
6130 return err;
6131}
6132
6133/**
6134 * ufshcd_reset_and_restore - reset and re-initialize host/device
6135 * @hba: per-adapter instance
6136 *
6137 * Reset and recover device, host and re-establish link. This
6138 * is helpful to recover the communication in fatal error conditions.
6139 *
6140 * Returns zero on success, non-zero on failure
6141 */
6142static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6143{
6144 int err = 0;
6145 unsigned long flags;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006146 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306147
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006148 do {
6149 err = ufshcd_host_reset_and_restore(hba);
6150 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306151
6152 /*
6153 * After reset the door-bell might be cleared, complete
6154 * outstanding requests in s/w here.
6155 */
6156 spin_lock_irqsave(hba->host->host_lock, flags);
6157 ufshcd_transfer_req_compl(hba);
6158 ufshcd_tmc_handler(hba);
6159 spin_unlock_irqrestore(hba->host->host_lock, flags);
6160
6161 return err;
6162}
6163
6164/**
6165 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006166 * @cmd: SCSI command pointer
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306167 *
6168 * Returns SUCCESS/FAILED
6169 */
6170static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6171{
6172 int err;
6173 unsigned long flags;
6174 struct ufs_hba *hba;
6175
6176 hba = shost_priv(cmd->device->host);
6177
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006178 ufshcd_hold(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306179 /*
6180 * Check if there is any race with fatal error handling.
6181 * If so, wait for it to complete. Even though fatal error
6182 * handling does reset and restore in some cases, don't assume
6183 * anything out of it. We are just avoiding race here.
6184 */
6185 do {
6186 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306187 if (!(work_pending(&hba->eh_work) ||
Zang Leigang8dc0da72017-06-24 19:14:32 +08006188 hba->ufshcd_state == UFSHCD_STATE_RESET ||
6189 hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306190 break;
6191 spin_unlock_irqrestore(hba->host->host_lock, flags);
6192 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306193 flush_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306194 } while (1);
6195
6196 hba->ufshcd_state = UFSHCD_STATE_RESET;
6197 ufshcd_set_eh_in_progress(hba);
6198 spin_unlock_irqrestore(hba->host->host_lock, flags);
6199
6200 err = ufshcd_reset_and_restore(hba);
6201
6202 spin_lock_irqsave(hba->host->host_lock, flags);
6203 if (!err) {
6204 err = SUCCESS;
6205 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6206 } else {
6207 err = FAILED;
6208 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6209 }
6210 ufshcd_clear_eh_in_progress(hba);
6211 spin_unlock_irqrestore(hba->host->host_lock, flags);
6212
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006213 ufshcd_release(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306214 return err;
6215}
6216
6217/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006218 * ufshcd_get_max_icc_level - calculate the ICC level
6219 * @sup_curr_uA: max. current supported by the regulator
6220 * @start_scan: row at the desc table to start scan from
6221 * @buff: power descriptor buffer
6222 *
6223 * Returns calculated max ICC level for specific regulator
6224 */
6225static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6226{
6227 int i;
6228 int curr_uA;
6229 u16 data;
6230 u16 unit;
6231
6232 for (i = start_scan; i >= 0; i--) {
Tomas Winklerd79713f2017-01-05 10:45:11 +02006233 data = be16_to_cpup((__be16 *)&buff[2 * i]);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006234 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6235 ATTR_ICC_LVL_UNIT_OFFSET;
6236 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6237 switch (unit) {
6238 case UFSHCD_NANO_AMP:
6239 curr_uA = curr_uA / 1000;
6240 break;
6241 case UFSHCD_MILI_AMP:
6242 curr_uA = curr_uA * 1000;
6243 break;
6244 case UFSHCD_AMP:
6245 curr_uA = curr_uA * 1000 * 1000;
6246 break;
6247 case UFSHCD_MICRO_AMP:
6248 default:
6249 break;
6250 }
6251 if (sup_curr_uA >= curr_uA)
6252 break;
6253 }
6254 if (i < 0) {
6255 i = 0;
6256 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6257 }
6258
6259 return (u32)i;
6260}
6261
6262/**
6263 * ufshcd_calc_icc_level - calculate the max ICC level
6264 * In case regulators are not initialized we'll return 0
6265 * @hba: per-adapter instance
6266 * @desc_buf: power descriptor buffer to extract ICC levels from.
6267 * @len: length of desc_buff
6268 *
6269 * Returns calculated ICC level
6270 */
6271static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6272 u8 *desc_buf, int len)
6273{
6274 u32 icc_level = 0;
6275
6276 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6277 !hba->vreg_info.vccq2) {
6278 dev_err(hba->dev,
6279 "%s: Regulator capability was not set, actvIccLevel=%d",
6280 __func__, icc_level);
6281 goto out;
6282 }
6283
6284 if (hba->vreg_info.vcc)
6285 icc_level = ufshcd_get_max_icc_level(
6286 hba->vreg_info.vcc->max_uA,
6287 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6288 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6289
6290 if (hba->vreg_info.vccq)
6291 icc_level = ufshcd_get_max_icc_level(
6292 hba->vreg_info.vccq->max_uA,
6293 icc_level,
6294 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6295
6296 if (hba->vreg_info.vccq2)
6297 icc_level = ufshcd_get_max_icc_level(
6298 hba->vreg_info.vccq2->max_uA,
6299 icc_level,
6300 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6301out:
6302 return icc_level;
6303}
6304
6305static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6306{
6307 int ret;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006308 int buff_len = hba->desc_size.pwr_desc;
Kees Cookbbe21d72018-05-02 16:58:09 -07006309 u8 *desc_buf;
6310
6311 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6312 if (!desc_buf)
6313 return;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006314
6315 ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6316 if (ret) {
6317 dev_err(hba->dev,
6318 "%s: Failed reading power descriptor.len = %d ret = %d",
6319 __func__, buff_len, ret);
Kees Cookbbe21d72018-05-02 16:58:09 -07006320 goto out;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006321 }
6322
6323 hba->init_prefetch_data.icc_level =
6324 ufshcd_find_max_sup_active_icc_level(hba,
6325 desc_buf, buff_len);
6326 dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6327 __func__, hba->init_prefetch_data.icc_level);
6328
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02006329 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6330 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6331 &hba->init_prefetch_data.icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006332
6333 if (ret)
6334 dev_err(hba->dev,
6335 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6336 __func__, hba->init_prefetch_data.icc_level , ret);
6337
Kees Cookbbe21d72018-05-02 16:58:09 -07006338out:
6339 kfree(desc_buf);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006340}
6341
6342/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006343 * ufshcd_scsi_add_wlus - Adds required W-LUs
6344 * @hba: per-adapter instance
6345 *
6346 * UFS device specification requires the UFS devices to support 4 well known
6347 * logical units:
6348 * "REPORT_LUNS" (address: 01h)
6349 * "UFS Device" (address: 50h)
6350 * "RPMB" (address: 44h)
6351 * "BOOT" (address: 30h)
6352 * UFS device's power management needs to be controlled by "POWER CONDITION"
6353 * field of SSU (START STOP UNIT) command. But this "power condition" field
6354 * will take effect only when its sent to "UFS device" well known logical unit
6355 * hence we require the scsi_device instance to represent this logical unit in
6356 * order for the UFS host driver to send the SSU command for power management.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006357 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006358 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6359 * Block) LU so user space process can control this LU. User space may also
6360 * want to have access to BOOT LU.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006361 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006362 * This function adds scsi device instances for each of all well known LUs
6363 * (except "REPORT LUNS" LU).
6364 *
6365 * Returns zero on success (all required W-LUs are added successfully),
6366 * non-zero error value on failure (if failed to add any of the required W-LU).
6367 */
6368static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6369{
6370 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006371 struct scsi_device *sdev_rpmb;
6372 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006373
6374 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6375 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6376 if (IS_ERR(hba->sdev_ufs_device)) {
6377 ret = PTR_ERR(hba->sdev_ufs_device);
6378 hba->sdev_ufs_device = NULL;
6379 goto out;
6380 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006381 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006382
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006383 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006384 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006385 if (IS_ERR(sdev_rpmb)) {
6386 ret = PTR_ERR(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006387 goto remove_sdev_ufs_device;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006388 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006389 scsi_device_put(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006390
6391 sdev_boot = __scsi_add_device(hba->host, 0, 0,
6392 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6393 if (IS_ERR(sdev_boot))
6394 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6395 else
6396 scsi_device_put(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006397 goto out;
6398
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006399remove_sdev_ufs_device:
6400 scsi_remove_device(hba->sdev_ufs_device);
6401out:
6402 return ret;
6403}
6404
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006405static int ufs_get_device_desc(struct ufs_hba *hba,
6406 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006407{
6408 int err;
Kees Cookbbe21d72018-05-02 16:58:09 -07006409 size_t buff_len;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006410 u8 model_index;
Kees Cookbbe21d72018-05-02 16:58:09 -07006411 u8 *desc_buf;
6412
6413 buff_len = max_t(size_t, hba->desc_size.dev_desc,
6414 QUERY_DESC_MAX_SIZE + 1);
6415 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6416 if (!desc_buf) {
6417 err = -ENOMEM;
6418 goto out;
6419 }
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006420
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006421 err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006422 if (err) {
6423 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6424 __func__, err);
6425 goto out;
6426 }
6427
6428 /*
6429 * getting vendor (manufacturerID) and Bank Index in big endian
6430 * format
6431 */
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006432 dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006433 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6434
6435 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
6436
Kees Cookbbe21d72018-05-02 16:58:09 -07006437 /* Zero-pad entire buffer for string termination. */
6438 memset(desc_buf, 0, buff_len);
6439
6440 err = ufshcd_read_string_desc(hba, model_index, desc_buf,
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006441 QUERY_DESC_MAX_SIZE, true/*ASCII*/);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006442 if (err) {
6443 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6444 __func__, err);
6445 goto out;
6446 }
6447
Kees Cookbbe21d72018-05-02 16:58:09 -07006448 desc_buf[QUERY_DESC_MAX_SIZE] = '\0';
6449 strlcpy(dev_desc->model, (desc_buf + QUERY_DESC_HDR_SIZE),
6450 min_t(u8, desc_buf[QUERY_DESC_LENGTH_OFFSET],
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006451 MAX_MODEL_LEN));
6452
6453 /* Null terminate the model string */
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006454 dev_desc->model[MAX_MODEL_LEN] = '\0';
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006455
6456out:
Kees Cookbbe21d72018-05-02 16:58:09 -07006457 kfree(desc_buf);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006458 return err;
6459}
6460
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006461static void ufs_fixup_device_setup(struct ufs_hba *hba,
6462 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006463{
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006464 struct ufs_dev_fix *f;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006465
6466 for (f = ufs_fixups; f->quirk; f++) {
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006467 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
6468 f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
6469 (STR_PRFX_EQUAL(f->card.model, dev_desc->model) ||
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006470 !strcmp(f->card.model, UFS_ANY_MODEL)))
6471 hba->dev_quirks |= f->quirk;
6472 }
6473}
6474
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006475/**
Yaniv Gardi37113102016-03-10 17:37:16 +02006476 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6477 * @hba: per-adapter instance
6478 *
6479 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6480 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6481 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6482 * the hibern8 exit latency.
6483 *
6484 * Returns zero on success, non-zero error value on failure.
6485 */
6486static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6487{
6488 int ret = 0;
6489 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6490
6491 ret = ufshcd_dme_peer_get(hba,
6492 UIC_ARG_MIB_SEL(
6493 RX_MIN_ACTIVATETIME_CAPABILITY,
6494 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6495 &peer_rx_min_activatetime);
6496 if (ret)
6497 goto out;
6498
6499 /* make sure proper unit conversion is applied */
6500 tuned_pa_tactivate =
6501 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6502 / PA_TACTIVATE_TIME_UNIT_US);
6503 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6504 tuned_pa_tactivate);
6505
6506out:
6507 return ret;
6508}
6509
6510/**
6511 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6512 * @hba: per-adapter instance
6513 *
6514 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6515 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6516 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6517 * This optimal value can help reduce the hibern8 exit latency.
6518 *
6519 * Returns zero on success, non-zero error value on failure.
6520 */
6521static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6522{
6523 int ret = 0;
6524 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6525 u32 max_hibern8_time, tuned_pa_hibern8time;
6526
6527 ret = ufshcd_dme_get(hba,
6528 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6529 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6530 &local_tx_hibern8_time_cap);
6531 if (ret)
6532 goto out;
6533
6534 ret = ufshcd_dme_peer_get(hba,
6535 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6536 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6537 &peer_rx_hibern8_time_cap);
6538 if (ret)
6539 goto out;
6540
6541 max_hibern8_time = max(local_tx_hibern8_time_cap,
6542 peer_rx_hibern8_time_cap);
6543 /* make sure proper unit conversion is applied */
6544 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6545 / PA_HIBERN8_TIME_UNIT_US);
6546 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6547 tuned_pa_hibern8time);
6548out:
6549 return ret;
6550}
6551
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006552/**
6553 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6554 * less than device PA_TACTIVATE time.
6555 * @hba: per-adapter instance
6556 *
6557 * Some UFS devices require host PA_TACTIVATE to be lower than device
6558 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6559 * for such devices.
6560 *
6561 * Returns zero on success, non-zero error value on failure.
6562 */
6563static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6564{
6565 int ret = 0;
6566 u32 granularity, peer_granularity;
6567 u32 pa_tactivate, peer_pa_tactivate;
6568 u32 pa_tactivate_us, peer_pa_tactivate_us;
6569 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6570
6571 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6572 &granularity);
6573 if (ret)
6574 goto out;
6575
6576 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6577 &peer_granularity);
6578 if (ret)
6579 goto out;
6580
6581 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6582 (granularity > PA_GRANULARITY_MAX_VAL)) {
6583 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6584 __func__, granularity);
6585 return -EINVAL;
6586 }
6587
6588 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6589 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6590 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6591 __func__, peer_granularity);
6592 return -EINVAL;
6593 }
6594
6595 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6596 if (ret)
6597 goto out;
6598
6599 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6600 &peer_pa_tactivate);
6601 if (ret)
6602 goto out;
6603
6604 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6605 peer_pa_tactivate_us = peer_pa_tactivate *
6606 gran_to_us_table[peer_granularity - 1];
6607
6608 if (pa_tactivate_us > peer_pa_tactivate_us) {
6609 u32 new_peer_pa_tactivate;
6610
6611 new_peer_pa_tactivate = pa_tactivate_us /
6612 gran_to_us_table[peer_granularity - 1];
6613 new_peer_pa_tactivate++;
6614 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6615 new_peer_pa_tactivate);
6616 }
6617
6618out:
6619 return ret;
6620}
6621
Yaniv Gardi37113102016-03-10 17:37:16 +02006622static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6623{
6624 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6625 ufshcd_tune_pa_tactivate(hba);
6626 ufshcd_tune_pa_hibern8time(hba);
6627 }
6628
6629 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6630 /* set 1ms timeout for PA_TACTIVATE */
6631 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006632
6633 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6634 ufshcd_quirk_tune_host_pa_tactivate(hba);
Subhash Jadavani56d4a182016-12-05 19:25:32 -08006635
6636 ufshcd_vops_apply_dev_quirks(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02006637}
6638
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006639static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6640{
6641 int err_reg_hist_size = sizeof(struct ufs_uic_err_reg_hist);
6642
6643 hba->ufs_stats.hibern8_exit_cnt = 0;
6644 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
6645
6646 memset(&hba->ufs_stats.pa_err, 0, err_reg_hist_size);
6647 memset(&hba->ufs_stats.dl_err, 0, err_reg_hist_size);
6648 memset(&hba->ufs_stats.nl_err, 0, err_reg_hist_size);
6649 memset(&hba->ufs_stats.tl_err, 0, err_reg_hist_size);
6650 memset(&hba->ufs_stats.dme_err, 0, err_reg_hist_size);
Gilad Broner7fabb772017-02-03 16:56:50 -08006651
6652 hba->req_abort_count = 0;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006653}
6654
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006655static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6656{
6657 int err;
6658
6659 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6660 &hba->desc_size.dev_desc);
6661 if (err)
6662 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6663
6664 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6665 &hba->desc_size.pwr_desc);
6666 if (err)
6667 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6668
6669 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6670 &hba->desc_size.interc_desc);
6671 if (err)
6672 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6673
6674 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6675 &hba->desc_size.conf_desc);
6676 if (err)
6677 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6678
6679 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6680 &hba->desc_size.unit_desc);
6681 if (err)
6682 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6683
6684 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6685 &hba->desc_size.geom_desc);
6686 if (err)
6687 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02006688 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
6689 &hba->desc_size.hlth_desc);
6690 if (err)
6691 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006692}
6693
6694static void ufshcd_def_desc_sizes(struct ufs_hba *hba)
6695{
6696 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6697 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6698 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6699 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6700 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6701 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02006702 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006703}
6704
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05306705static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
6706 {19200000, REF_CLK_FREQ_19_2_MHZ},
6707 {26000000, REF_CLK_FREQ_26_MHZ},
6708 {38400000, REF_CLK_FREQ_38_4_MHZ},
6709 {52000000, REF_CLK_FREQ_52_MHZ},
6710 {0, REF_CLK_FREQ_INVAL},
6711};
6712
6713static enum ufs_ref_clk_freq
6714ufs_get_bref_clk_from_hz(unsigned long freq)
6715{
6716 int i;
6717
6718 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
6719 if (ufs_ref_clk_freqs[i].freq_hz == freq)
6720 return ufs_ref_clk_freqs[i].val;
6721
6722 return REF_CLK_FREQ_INVAL;
6723}
6724
6725void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
6726{
6727 unsigned long freq;
6728
6729 freq = clk_get_rate(refclk);
6730
6731 hba->dev_ref_clk_freq =
6732 ufs_get_bref_clk_from_hz(freq);
6733
6734 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
6735 dev_err(hba->dev,
6736 "invalid ref_clk setting = %ld\n", freq);
6737}
6738
6739static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
6740{
6741 int err;
6742 u32 ref_clk;
6743 u32 freq = hba->dev_ref_clk_freq;
6744
6745 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
6746 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
6747
6748 if (err) {
6749 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
6750 err);
6751 goto out;
6752 }
6753
6754 if (ref_clk == freq)
6755 goto out; /* nothing to update */
6756
6757 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6758 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
6759
6760 if (err) {
6761 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
6762 ufs_ref_clk_freqs[freq].freq_hz);
6763 goto out;
6764 }
6765
6766 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
6767 ufs_ref_clk_freqs[freq].freq_hz);
6768
6769out:
6770 return err;
6771}
6772
Yaniv Gardi37113102016-03-10 17:37:16 +02006773/**
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006774 * ufshcd_probe_hba - probe hba to detect device and initialize
6775 * @hba: per-adapter instance
6776 *
6777 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306778 */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006779static int ufshcd_probe_hba(struct ufs_hba *hba)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306780{
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006781 struct ufs_dev_desc card = {0};
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306782 int ret;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006783 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306784
6785 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306786 if (ret)
6787 goto out;
6788
Yaniv Gardiafdfff52016-03-10 17:37:15 +02006789 /* set the default level for urgent bkops */
6790 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6791 hba->is_urgent_bkops_lvl_checked = false;
6792
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006793 /* Debug counters initialization */
6794 ufshcd_clear_dbg_ufs_stats(hba);
6795
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006796 /* UniPro link is active now */
6797 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05306798
Adrian Hunterad448372018-03-20 15:07:38 +02006799 /* Enable Auto-Hibernate if configured */
6800 ufshcd_auto_hibern8_enable(hba);
6801
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306802 ret = ufshcd_verify_dev_init(hba);
6803 if (ret)
6804 goto out;
6805
Dolev Raviv68078d52013-07-30 00:35:58 +05306806 ret = ufshcd_complete_dev_init(hba);
6807 if (ret)
6808 goto out;
6809
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006810 /* Init check for device descriptor sizes */
6811 ufshcd_init_desc_sizes(hba);
6812
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006813 ret = ufs_get_device_desc(hba, &card);
6814 if (ret) {
6815 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6816 __func__, ret);
6817 goto out;
6818 }
6819
6820 ufs_fixup_device_setup(hba, &card);
Yaniv Gardi37113102016-03-10 17:37:16 +02006821 ufshcd_tune_unipro_params(hba);
Yaniv Gardi60f01872016-03-10 17:37:11 +02006822
6823 ret = ufshcd_set_vccq_rail_unused(hba,
6824 (hba->dev_quirks & UFS_DEVICE_NO_VCCQ) ? true : false);
6825 if (ret)
6826 goto out;
6827
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006828 /* UFS device is also active now */
6829 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306830 ufshcd_force_reset_auto_bkops(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006831 hba->wlun_dev_clr_ua = true;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306832
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006833 if (ufshcd_get_max_pwr_mode(hba)) {
6834 dev_err(hba->dev,
6835 "%s: Failed getting max supported power mode\n",
6836 __func__);
6837 } else {
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05306838 /*
6839 * Set the right value to bRefClkFreq before attempting to
6840 * switch to HS gears.
6841 */
6842 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
6843 ufshcd_set_dev_ref_clk(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006844 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Dov Levenglick8643ae62016-10-17 17:10:14 -07006845 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006846 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6847 __func__, ret);
Dov Levenglick8643ae62016-10-17 17:10:14 -07006848 goto out;
6849 }
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006850 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006851
Yaniv Gardi53c12d02016-02-01 15:02:45 +02006852 /* set the state as operational after switching to desired gear */
6853 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006854
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006855 /*
6856 * If we are in error handling context or in power management callbacks
6857 * context, no need to scan the host
6858 */
6859 if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6860 bool flag;
6861
6862 /* clear any previous UFS device information */
6863 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02006864 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
6865 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006866 hba->dev_info.f_power_on_wp_en = flag;
6867
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006868 if (!hba->is_init_prefetch)
6869 ufshcd_init_icc_levels(hba);
6870
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006871 /* Add required well known logical units to scsi mid layer */
6872 if (ufshcd_scsi_add_wlus(hba))
6873 goto out;
6874
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08006875 /* Initialize devfreq after UFS device is detected */
6876 if (ufshcd_is_clkscaling_supported(hba)) {
6877 memcpy(&hba->clk_scaling.saved_pwr_info.info,
6878 &hba->pwr_info,
6879 sizeof(struct ufs_pa_layer_attr));
6880 hba->clk_scaling.saved_pwr_info.is_valid = true;
6881 if (!hba->devfreq) {
Bjorn Anderssondeac4442018-05-17 23:26:36 -07006882 ret = ufshcd_devfreq_init(hba);
6883 if (ret)
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08006884 goto out;
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08006885 }
6886 hba->clk_scaling.is_allowed = true;
6887 }
6888
Avri Altmandf032bf2018-10-07 17:30:35 +03006889 ufs_bsg_probe(hba);
6890
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306891 scsi_scan_host(hba->host);
6892 pm_runtime_put_sync(hba->dev);
6893 }
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006894
6895 if (!hba->is_init_prefetch)
6896 hba->is_init_prefetch = true;
6897
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306898out:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006899 /*
6900 * If we failed to initialize the device or the device is not
6901 * present, turn off the power/clocks etc.
6902 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006903 if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6904 pm_runtime_put_sync(hba->dev);
Vivek Gautameebcc192018-08-07 23:17:39 +05306905 ufshcd_exit_clk_scaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006906 ufshcd_hba_exit(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006907 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006908
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006909 trace_ufshcd_init(dev_name(hba->dev), ret,
6910 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08006911 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006912 return ret;
6913}
6914
6915/**
6916 * ufshcd_async_scan - asynchronous execution for probing hba
6917 * @data: data pointer to pass to this function
6918 * @cookie: cookie data
6919 */
6920static void ufshcd_async_scan(void *data, async_cookie_t cookie)
6921{
6922 struct ufs_hba *hba = (struct ufs_hba *)data;
6923
6924 ufshcd_probe_hba(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306925}
6926
Yaniv Gardif550c652016-03-10 17:37:07 +02006927static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
6928{
6929 unsigned long flags;
6930 struct Scsi_Host *host;
6931 struct ufs_hba *hba;
6932 int index;
6933 bool found = false;
6934
6935 if (!scmd || !scmd->device || !scmd->device->host)
Christoph Hellwig66005932018-05-29 15:52:29 +02006936 return BLK_EH_DONE;
Yaniv Gardif550c652016-03-10 17:37:07 +02006937
6938 host = scmd->device->host;
6939 hba = shost_priv(host);
6940 if (!hba)
Christoph Hellwig66005932018-05-29 15:52:29 +02006941 return BLK_EH_DONE;
Yaniv Gardif550c652016-03-10 17:37:07 +02006942
6943 spin_lock_irqsave(host->host_lock, flags);
6944
6945 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
6946 if (hba->lrb[index].cmd == scmd) {
6947 found = true;
6948 break;
6949 }
6950 }
6951
6952 spin_unlock_irqrestore(host->host_lock, flags);
6953
6954 /*
6955 * Bypass SCSI error handling and reset the block layer timer if this
6956 * SCSI command was not actually dispatched to UFS driver, otherwise
6957 * let SCSI layer handle the error as usual.
6958 */
Christoph Hellwig66005932018-05-29 15:52:29 +02006959 return found ? BLK_EH_DONE : BLK_EH_RESET_TIMER;
Yaniv Gardif550c652016-03-10 17:37:07 +02006960}
6961
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02006962static const struct attribute_group *ufshcd_driver_groups[] = {
6963 &ufs_sysfs_unit_descriptor_group,
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02006964 &ufs_sysfs_lun_attributes_group,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02006965 NULL,
6966};
6967
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306968static struct scsi_host_template ufshcd_driver_template = {
6969 .module = THIS_MODULE,
6970 .name = UFSHCD,
6971 .proc_name = UFSHCD,
6972 .queuecommand = ufshcd_queuecommand,
6973 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09006974 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306975 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03006976 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306977 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306978 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
6979 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Yaniv Gardif550c652016-03-10 17:37:07 +02006980 .eh_timed_out = ufshcd_eh_timed_out,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306981 .this_id = -1,
6982 .sg_tablesize = SG_ALL,
6983 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
6984 .can_queue = UFSHCD_CAN_QUEUE,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006985 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01006986 .track_queue_depth = 1,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02006987 .sdev_groups = ufshcd_driver_groups,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306988};
6989
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006990static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
6991 int ua)
6992{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08006993 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006994
Bjorn Andersson7b16a072015-02-11 19:35:28 -08006995 if (!vreg)
6996 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006997
Bjorn Andersson7b16a072015-02-11 19:35:28 -08006998 ret = regulator_set_load(vreg->reg, ua);
6999 if (ret < 0) {
7000 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
7001 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007002 }
7003
7004 return ret;
7005}
7006
7007static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7008 struct ufs_vreg *vreg)
7009{
Yaniv Gardi60f01872016-03-10 17:37:11 +02007010 if (!vreg)
7011 return 0;
7012 else if (vreg->unused)
7013 return 0;
7014 else
7015 return ufshcd_config_vreg_load(hba->dev, vreg,
7016 UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007017}
7018
7019static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7020 struct ufs_vreg *vreg)
7021{
Yaniv Gardi60f01872016-03-10 17:37:11 +02007022 if (!vreg)
7023 return 0;
7024 else if (vreg->unused)
7025 return 0;
7026 else
7027 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007028}
7029
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007030static int ufshcd_config_vreg(struct device *dev,
7031 struct ufs_vreg *vreg, bool on)
7032{
7033 int ret = 0;
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007034 struct regulator *reg;
7035 const char *name;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007036 int min_uV, uA_load;
7037
7038 BUG_ON(!vreg);
7039
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007040 reg = vreg->reg;
7041 name = vreg->name;
7042
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007043 if (regulator_count_voltages(reg) > 0) {
7044 min_uV = on ? vreg->min_uV : 0;
7045 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7046 if (ret) {
7047 dev_err(dev, "%s: %s set voltage failed, err=%d\n",
7048 __func__, name, ret);
7049 goto out;
7050 }
7051
7052 uA_load = on ? vreg->max_uA : 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007053 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7054 if (ret)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007055 goto out;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007056 }
7057out:
7058 return ret;
7059}
7060
7061static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7062{
7063 int ret = 0;
7064
Yaniv Gardi60f01872016-03-10 17:37:11 +02007065 if (!vreg)
7066 goto out;
7067 else if (vreg->enabled || vreg->unused)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007068 goto out;
7069
7070 ret = ufshcd_config_vreg(dev, vreg, true);
7071 if (!ret)
7072 ret = regulator_enable(vreg->reg);
7073
7074 if (!ret)
7075 vreg->enabled = true;
7076 else
7077 dev_err(dev, "%s: %s enable failed, err=%d\n",
7078 __func__, vreg->name, ret);
7079out:
7080 return ret;
7081}
7082
7083static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7084{
7085 int ret = 0;
7086
Yaniv Gardi60f01872016-03-10 17:37:11 +02007087 if (!vreg)
7088 goto out;
7089 else if (!vreg->enabled || vreg->unused)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007090 goto out;
7091
7092 ret = regulator_disable(vreg->reg);
7093
7094 if (!ret) {
7095 /* ignore errors on applying disable config */
7096 ufshcd_config_vreg(dev, vreg, false);
7097 vreg->enabled = false;
7098 } else {
7099 dev_err(dev, "%s: %s disable failed, err=%d\n",
7100 __func__, vreg->name, ret);
7101 }
7102out:
7103 return ret;
7104}
7105
7106static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7107{
7108 int ret = 0;
7109 struct device *dev = hba->dev;
7110 struct ufs_vreg_info *info = &hba->vreg_info;
7111
7112 if (!info)
7113 goto out;
7114
7115 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7116 if (ret)
7117 goto out;
7118
7119 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7120 if (ret)
7121 goto out;
7122
7123 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7124 if (ret)
7125 goto out;
7126
7127out:
7128 if (ret) {
7129 ufshcd_toggle_vreg(dev, info->vccq2, false);
7130 ufshcd_toggle_vreg(dev, info->vccq, false);
7131 ufshcd_toggle_vreg(dev, info->vcc, false);
7132 }
7133 return ret;
7134}
7135
Raviv Shvili6a771a62014-09-25 15:32:24 +03007136static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7137{
7138 struct ufs_vreg_info *info = &hba->vreg_info;
7139
7140 if (info)
7141 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
7142
7143 return 0;
7144}
7145
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007146static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7147{
7148 int ret = 0;
7149
7150 if (!vreg)
7151 goto out;
7152
7153 vreg->reg = devm_regulator_get(dev, vreg->name);
7154 if (IS_ERR(vreg->reg)) {
7155 ret = PTR_ERR(vreg->reg);
7156 dev_err(dev, "%s: %s get failed, err=%d\n",
7157 __func__, vreg->name, ret);
7158 }
7159out:
7160 return ret;
7161}
7162
7163static int ufshcd_init_vreg(struct ufs_hba *hba)
7164{
7165 int ret = 0;
7166 struct device *dev = hba->dev;
7167 struct ufs_vreg_info *info = &hba->vreg_info;
7168
7169 if (!info)
7170 goto out;
7171
7172 ret = ufshcd_get_vreg(dev, info->vcc);
7173 if (ret)
7174 goto out;
7175
7176 ret = ufshcd_get_vreg(dev, info->vccq);
7177 if (ret)
7178 goto out;
7179
7180 ret = ufshcd_get_vreg(dev, info->vccq2);
7181out:
7182 return ret;
7183}
7184
Raviv Shvili6a771a62014-09-25 15:32:24 +03007185static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7186{
7187 struct ufs_vreg_info *info = &hba->vreg_info;
7188
7189 if (info)
7190 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7191
7192 return 0;
7193}
7194
Yaniv Gardi60f01872016-03-10 17:37:11 +02007195static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused)
7196{
7197 int ret = 0;
7198 struct ufs_vreg_info *info = &hba->vreg_info;
7199
7200 if (!info)
7201 goto out;
7202 else if (!info->vccq)
7203 goto out;
7204
7205 if (unused) {
7206 /* shut off the rail here */
7207 ret = ufshcd_toggle_vreg(hba->dev, info->vccq, false);
7208 /*
7209 * Mark this rail as no longer used, so it doesn't get enabled
7210 * later by mistake
7211 */
7212 if (!ret)
7213 info->vccq->unused = true;
7214 } else {
7215 /*
7216 * rail should have been already enabled hence just make sure
7217 * that unused flag is cleared.
7218 */
7219 info->vccq->unused = false;
7220 }
7221out:
7222 return ret;
7223}
7224
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007225static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7226 bool skip_ref_clk)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007227{
7228 int ret = 0;
7229 struct ufs_clk_info *clki;
7230 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007231 unsigned long flags;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007232 ktime_t start = ktime_get();
7233 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007234
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007235 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007236 goto out;
7237
Subhash Jadavanib3344562018-05-03 16:37:17 +05307238 /*
7239 * vendor specific setup_clocks ops may depend on clocks managed by
7240 * this standard driver hence call the vendor specific setup_clocks
7241 * before disabling the clocks managed here.
7242 */
7243 if (!on) {
7244 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
7245 if (ret)
7246 return ret;
7247 }
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007248
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007249 list_for_each_entry(clki, head, list) {
7250 if (!IS_ERR_OR_NULL(clki->clk)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007251 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7252 continue;
7253
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007254 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007255 if (on && !clki->enabled) {
7256 ret = clk_prepare_enable(clki->clk);
7257 if (ret) {
7258 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7259 __func__, clki->name, ret);
7260 goto out;
7261 }
7262 } else if (!on && clki->enabled) {
7263 clk_disable_unprepare(clki->clk);
7264 }
7265 clki->enabled = on;
7266 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7267 clki->name, on ? "en" : "dis");
7268 }
7269 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007270
Subhash Jadavanib3344562018-05-03 16:37:17 +05307271 /*
7272 * vendor specific setup_clocks ops may depend on clocks managed by
7273 * this standard driver hence call the vendor specific setup_clocks
7274 * after enabling the clocks managed here.
7275 */
7276 if (on) {
7277 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
7278 if (ret)
7279 return ret;
7280 }
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007281
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007282out:
7283 if (ret) {
7284 list_for_each_entry(clki, head, list) {
7285 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7286 clk_disable_unprepare(clki->clk);
7287 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007288 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007289 spin_lock_irqsave(hba->host->host_lock, flags);
7290 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007291 trace_ufshcd_clk_gating(dev_name(hba->dev),
7292 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007293 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007294 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007295
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007296 if (clk_state_changed)
7297 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7298 (on ? "on" : "off"),
7299 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007300 return ret;
7301}
7302
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007303static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
7304{
7305 return __ufshcd_setup_clocks(hba, on, false);
7306}
7307
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007308static int ufshcd_init_clocks(struct ufs_hba *hba)
7309{
7310 int ret = 0;
7311 struct ufs_clk_info *clki;
7312 struct device *dev = hba->dev;
7313 struct list_head *head = &hba->clk_list_head;
7314
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007315 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007316 goto out;
7317
7318 list_for_each_entry(clki, head, list) {
7319 if (!clki->name)
7320 continue;
7321
7322 clki->clk = devm_clk_get(dev, clki->name);
7323 if (IS_ERR(clki->clk)) {
7324 ret = PTR_ERR(clki->clk);
7325 dev_err(dev, "%s: %s clk get failed, %d\n",
7326 __func__, clki->name, ret);
7327 goto out;
7328 }
7329
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307330 /*
7331 * Parse device ref clk freq as per device tree "ref_clk".
7332 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
7333 * in ufshcd_alloc_host().
7334 */
7335 if (!strcmp(clki->name, "ref_clk"))
7336 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
7337
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007338 if (clki->max_freq) {
7339 ret = clk_set_rate(clki->clk, clki->max_freq);
7340 if (ret) {
7341 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7342 __func__, clki->name,
7343 clki->max_freq, ret);
7344 goto out;
7345 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03007346 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007347 }
7348 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7349 clki->name, clk_get_rate(clki->clk));
7350 }
7351out:
7352 return ret;
7353}
7354
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007355static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7356{
7357 int err = 0;
7358
7359 if (!hba->vops)
7360 goto out;
7361
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007362 err = ufshcd_vops_init(hba);
7363 if (err)
7364 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007365
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007366 err = ufshcd_vops_setup_regulators(hba, true);
7367 if (err)
7368 goto out_exit;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007369
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007370 goto out;
7371
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007372out_exit:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007373 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007374out:
7375 if (err)
7376 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007377 __func__, ufshcd_get_var_name(hba), err);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007378 return err;
7379}
7380
7381static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7382{
7383 if (!hba->vops)
7384 return;
7385
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007386 ufshcd_vops_setup_regulators(hba, false);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007387
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007388 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007389}
7390
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007391static int ufshcd_hba_init(struct ufs_hba *hba)
7392{
7393 int err;
7394
Raviv Shvili6a771a62014-09-25 15:32:24 +03007395 /*
7396 * Handle host controller power separately from the UFS device power
7397 * rails as it will help controlling the UFS host controller power
7398 * collapse easily which is different than UFS device power collapse.
7399 * Also, enable the host controller power before we go ahead with rest
7400 * of the initialization here.
7401 */
7402 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007403 if (err)
7404 goto out;
7405
Raviv Shvili6a771a62014-09-25 15:32:24 +03007406 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007407 if (err)
7408 goto out;
7409
Raviv Shvili6a771a62014-09-25 15:32:24 +03007410 err = ufshcd_init_clocks(hba);
7411 if (err)
7412 goto out_disable_hba_vreg;
7413
7414 err = ufshcd_setup_clocks(hba, true);
7415 if (err)
7416 goto out_disable_hba_vreg;
7417
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007418 err = ufshcd_init_vreg(hba);
7419 if (err)
7420 goto out_disable_clks;
7421
7422 err = ufshcd_setup_vreg(hba, true);
7423 if (err)
7424 goto out_disable_clks;
7425
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007426 err = ufshcd_variant_hba_init(hba);
7427 if (err)
7428 goto out_disable_vreg;
7429
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007430 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007431 goto out;
7432
7433out_disable_vreg:
7434 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007435out_disable_clks:
7436 ufshcd_setup_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007437out_disable_hba_vreg:
7438 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007439out:
7440 return err;
7441}
7442
7443static void ufshcd_hba_exit(struct ufs_hba *hba)
7444{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007445 if (hba->is_powered) {
7446 ufshcd_variant_hba_exit(hba);
7447 ufshcd_setup_vreg(hba, false);
Gilad Bronera5082532016-10-17 17:10:00 -07007448 ufshcd_suspend_clkscaling(hba);
Vivek Gautameebcc192018-08-07 23:17:39 +05307449 if (ufshcd_is_clkscaling_supported(hba))
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007450 if (hba->devfreq)
7451 ufshcd_suspend_clkscaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007452 ufshcd_setup_clocks(hba, false);
7453 ufshcd_setup_hba_vreg(hba, false);
7454 hba->is_powered = false;
7455 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007456}
7457
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007458static int
7459ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307460{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007461 unsigned char cmd[6] = {REQUEST_SENSE,
7462 0,
7463 0,
7464 0,
Gilad Bronerdcea0bf2016-10-17 17:09:48 -07007465 UFSHCD_REQ_SENSE_SIZE,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007466 0};
7467 char *buffer;
7468 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307469
Gilad Bronerdcea0bf2016-10-17 17:09:48 -07007470 buffer = kzalloc(UFSHCD_REQ_SENSE_SIZE, GFP_KERNEL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007471 if (!buffer) {
7472 ret = -ENOMEM;
7473 goto out;
7474 }
7475
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007476 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
7477 UFSHCD_REQ_SENSE_SIZE, NULL, NULL,
7478 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007479 if (ret)
7480 pr_err("%s: failed with err %d\n", __func__, ret);
7481
7482 kfree(buffer);
7483out:
7484 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307485}
7486
7487/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007488 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7489 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307490 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007491 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307492 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007493 * Returns 0 if requested power mode is set successfully
7494 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307495 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007496static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7497 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307498{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007499 unsigned char cmd[6] = { START_STOP };
7500 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007501 struct scsi_device *sdp;
7502 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007503 int ret;
7504
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007505 spin_lock_irqsave(hba->host->host_lock, flags);
7506 sdp = hba->sdev_ufs_device;
7507 if (sdp) {
7508 ret = scsi_device_get(sdp);
7509 if (!ret && !scsi_device_online(sdp)) {
7510 ret = -ENODEV;
7511 scsi_device_put(sdp);
7512 }
7513 } else {
7514 ret = -ENODEV;
7515 }
7516 spin_unlock_irqrestore(hba->host->host_lock, flags);
7517
7518 if (ret)
7519 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007520
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307521 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007522 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7523 * handling, which would wait for host to be resumed. Since we know
7524 * we are functional while we are here, skip host resume in error
7525 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307526 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007527 hba->host->eh_noresume = 1;
7528 if (hba->wlun_dev_clr_ua) {
7529 ret = ufshcd_send_request_sense(hba, sdp);
7530 if (ret)
7531 goto out;
7532 /* Unit attention condition is cleared now */
7533 hba->wlun_dev_clr_ua = false;
7534 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307535
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007536 cmd[4] = pwr_mode << 4;
7537
7538 /*
7539 * Current function would be generally called from the power management
Christoph Hellwige8064022016-10-20 15:12:13 +02007540 * callbacks hence set the RQF_PM flag so that it doesn't resume the
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007541 * already suspended childs.
7542 */
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007543 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7544 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007545 if (ret) {
7546 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02007547 "START_STOP failed for power mode: %d, result %x\n",
7548 pwr_mode, ret);
Johannes Thumshirnc65be1a2018-06-25 13:20:58 +02007549 if (driver_byte(ret) == DRIVER_SENSE)
Hannes Reinecke21045512015-01-08 07:43:46 +01007550 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007551 }
7552
7553 if (!ret)
7554 hba->curr_dev_pwr_mode = pwr_mode;
7555out:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007556 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007557 hba->host->eh_noresume = 0;
7558 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307559}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307560
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007561static int ufshcd_link_state_transition(struct ufs_hba *hba,
7562 enum uic_link_state req_link_state,
7563 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307564{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007565 int ret = 0;
7566
7567 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307568 return 0;
7569
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007570 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7571 ret = ufshcd_uic_hibern8_enter(hba);
7572 if (!ret)
7573 ufshcd_set_link_hibern8(hba);
7574 else
7575 goto out;
7576 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307577 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007578 * If autobkops is enabled, link can't be turned off because
7579 * turning off the link would also turn off the device.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307580 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007581 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
7582 (!check_for_bkops || (check_for_bkops &&
7583 !hba->auto_bkops_enabled))) {
7584 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02007585 * Let's make sure that link is in low power mode, we are doing
7586 * this currently by putting the link in Hibern8. Otherway to
7587 * put the link in low power mode is to send the DME end point
7588 * to device and then send the DME reset command to local
7589 * unipro. But putting the link in hibern8 is much faster.
7590 */
7591 ret = ufshcd_uic_hibern8_enter(hba);
7592 if (ret)
7593 goto out;
7594 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007595 * Change controller state to "reset state" which
7596 * should also put the link in off/reset state
7597 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02007598 ufshcd_hba_stop(hba, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007599 /*
7600 * TODO: Check if we need any delay to make sure that
7601 * controller is reset
7602 */
7603 ufshcd_set_link_off(hba);
7604 }
7605
7606out:
7607 return ret;
7608}
7609
7610static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7611{
7612 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02007613 * It seems some UFS devices may keep drawing more than sleep current
7614 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7615 * To avoid this situation, add 2ms delay before putting these UFS
7616 * rails in LPM mode.
7617 */
7618 if (!ufshcd_is_link_active(hba) &&
7619 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7620 usleep_range(2000, 2100);
7621
7622 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007623 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7624 * power.
7625 *
7626 * If UFS device and link is in OFF state, all power supplies (VCC,
7627 * VCCQ, VCCQ2) can be turned off if power on write protect is not
7628 * required. If UFS link is inactive (Hibern8 or OFF state) and device
7629 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7630 *
7631 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7632 * in low power state which would save some power.
7633 */
7634 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7635 !hba->dev_info.is_lu_power_on_wp) {
7636 ufshcd_setup_vreg(hba, false);
7637 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7638 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7639 if (!ufshcd_is_link_active(hba)) {
7640 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7641 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7642 }
7643 }
7644}
7645
7646static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7647{
7648 int ret = 0;
7649
7650 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7651 !hba->dev_info.is_lu_power_on_wp) {
7652 ret = ufshcd_setup_vreg(hba, true);
7653 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007654 if (!ret && !ufshcd_is_link_active(hba)) {
7655 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7656 if (ret)
7657 goto vcc_disable;
7658 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7659 if (ret)
7660 goto vccq_lpm;
7661 }
Subhash Jadavani69d72ac2016-10-27 17:26:24 -07007662 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007663 }
7664 goto out;
7665
7666vccq_lpm:
7667 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7668vcc_disable:
7669 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7670out:
7671 return ret;
7672}
7673
7674static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7675{
7676 if (ufshcd_is_link_off(hba))
7677 ufshcd_setup_hba_vreg(hba, false);
7678}
7679
7680static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7681{
7682 if (ufshcd_is_link_off(hba))
7683 ufshcd_setup_hba_vreg(hba, true);
7684}
7685
7686/**
7687 * ufshcd_suspend - helper function for suspend operations
7688 * @hba: per adapter instance
7689 * @pm_op: desired low power operation type
7690 *
7691 * This function will try to put the UFS device and link into low power
7692 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7693 * (System PM level).
7694 *
7695 * If this function is called during shutdown, it will make sure that
7696 * both UFS device and UFS link is powered off.
7697 *
7698 * NOTE: UFS device & link must be active before we enter in this function.
7699 *
7700 * Returns 0 for success and non-zero for failure
7701 */
7702static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7703{
7704 int ret = 0;
7705 enum ufs_pm_level pm_lvl;
7706 enum ufs_dev_pwr_mode req_dev_pwr_mode;
7707 enum uic_link_state req_link_state;
7708
7709 hba->pm_op_in_progress = 1;
7710 if (!ufshcd_is_shutdown_pm(pm_op)) {
7711 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7712 hba->rpm_lvl : hba->spm_lvl;
7713 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7714 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7715 } else {
7716 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7717 req_link_state = UIC_LINK_OFF_STATE;
7718 }
7719
7720 /*
7721 * If we can't transition into any of the low power modes
7722 * just gate the clocks.
7723 */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007724 ufshcd_hold(hba, false);
7725 hba->clk_gating.is_suspended = true;
7726
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007727 if (hba->clk_scaling.is_allowed) {
7728 cancel_work_sync(&hba->clk_scaling.suspend_work);
7729 cancel_work_sync(&hba->clk_scaling.resume_work);
7730 ufshcd_suspend_clkscaling(hba);
7731 }
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007732
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007733 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7734 req_link_state == UIC_LINK_ACTIVE_STATE) {
7735 goto disable_clks;
7736 }
7737
7738 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7739 (req_link_state == hba->uic_link_state))
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007740 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007741
7742 /* UFS device & link must be active before we enter in this function */
7743 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7744 ret = -EINVAL;
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007745 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007746 }
7747
7748 if (ufshcd_is_runtime_pm(pm_op)) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03007749 if (ufshcd_can_autobkops_during_suspend(hba)) {
7750 /*
7751 * The device is idle with no requests in the queue,
7752 * allow background operations if bkops status shows
7753 * that performance might be impacted.
7754 */
7755 ret = ufshcd_urgent_bkops(hba);
7756 if (ret)
7757 goto enable_gating;
7758 } else {
7759 /* make sure that auto bkops is disabled */
7760 ufshcd_disable_auto_bkops(hba);
7761 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007762 }
7763
7764 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7765 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7766 !ufshcd_is_runtime_pm(pm_op))) {
7767 /* ensure that bkops is disabled */
7768 ufshcd_disable_auto_bkops(hba);
7769 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7770 if (ret)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007771 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007772 }
7773
7774 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7775 if (ret)
7776 goto set_dev_active;
7777
7778 ufshcd_vreg_set_lpm(hba);
7779
7780disable_clks:
7781 /*
7782 * Call vendor specific suspend callback. As these callbacks may access
7783 * vendor specific host controller register space call them before the
7784 * host clocks are ON.
7785 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007786 ret = ufshcd_vops_suspend(hba, pm_op);
7787 if (ret)
7788 goto set_link_active;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007789
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007790 if (!ufshcd_is_link_active(hba))
7791 ufshcd_setup_clocks(hba, false);
7792 else
7793 /* If link is active, device ref_clk can't be switched off */
7794 __ufshcd_setup_clocks(hba, false, true);
7795
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007796 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007797 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007798 /*
7799 * Disable the host irq as host controller as there won't be any
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007800 * host controller transaction expected till resume.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007801 */
7802 ufshcd_disable_irq(hba);
7803 /* Put the host controller in low power mode if possible */
7804 ufshcd_hba_vreg_set_lpm(hba);
7805 goto out;
7806
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007807set_link_active:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007808 if (hba->clk_scaling.is_allowed)
7809 ufshcd_resume_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007810 ufshcd_vreg_set_hpm(hba);
7811 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7812 ufshcd_set_link_active(hba);
7813 else if (ufshcd_is_link_off(hba))
7814 ufshcd_host_reset_and_restore(hba);
7815set_dev_active:
7816 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7817 ufshcd_disable_auto_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007818enable_gating:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007819 if (hba->clk_scaling.is_allowed)
7820 ufshcd_resume_clkscaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007821 hba->clk_gating.is_suspended = false;
7822 ufshcd_release(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007823out:
7824 hba->pm_op_in_progress = 0;
7825 return ret;
7826}
7827
7828/**
7829 * ufshcd_resume - helper function for resume operations
7830 * @hba: per adapter instance
7831 * @pm_op: runtime PM or system PM
7832 *
7833 * This function basically brings the UFS device, UniPro link and controller
7834 * to active state.
7835 *
7836 * Returns 0 for success and non-zero for failure
7837 */
7838static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7839{
7840 int ret;
7841 enum uic_link_state old_link_state;
7842
7843 hba->pm_op_in_progress = 1;
7844 old_link_state = hba->uic_link_state;
7845
7846 ufshcd_hba_vreg_set_hpm(hba);
7847 /* Make sure clocks are enabled before accessing controller */
7848 ret = ufshcd_setup_clocks(hba, true);
7849 if (ret)
7850 goto out;
7851
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007852 /* enable the host irq as host controller would be active soon */
7853 ret = ufshcd_enable_irq(hba);
7854 if (ret)
7855 goto disable_irq_and_vops_clks;
7856
7857 ret = ufshcd_vreg_set_hpm(hba);
7858 if (ret)
7859 goto disable_irq_and_vops_clks;
7860
7861 /*
7862 * Call vendor specific resume callback. As these callbacks may access
7863 * vendor specific host controller register space call them when the
7864 * host clocks are ON.
7865 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007866 ret = ufshcd_vops_resume(hba, pm_op);
7867 if (ret)
7868 goto disable_vreg;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007869
7870 if (ufshcd_is_link_hibern8(hba)) {
7871 ret = ufshcd_uic_hibern8_exit(hba);
7872 if (!ret)
7873 ufshcd_set_link_active(hba);
7874 else
7875 goto vendor_suspend;
7876 } else if (ufshcd_is_link_off(hba)) {
7877 ret = ufshcd_host_reset_and_restore(hba);
7878 /*
7879 * ufshcd_host_reset_and_restore() should have already
7880 * set the link state as active
7881 */
7882 if (ret || !ufshcd_is_link_active(hba))
7883 goto vendor_suspend;
7884 }
7885
7886 if (!ufshcd_is_ufs_dev_active(hba)) {
7887 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
7888 if (ret)
7889 goto set_old_link_state;
7890 }
7891
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08007892 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
7893 ufshcd_enable_auto_bkops(hba);
7894 else
7895 /*
7896 * If BKOPs operations are urgently needed at this moment then
7897 * keep auto-bkops enabled or else disable it.
7898 */
7899 ufshcd_urgent_bkops(hba);
7900
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007901 hba->clk_gating.is_suspended = false;
7902
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08007903 if (hba->clk_scaling.is_allowed)
7904 ufshcd_resume_clkscaling(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03007905
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007906 /* Schedule clock gating in case of no access to UFS device yet */
7907 ufshcd_release(hba);
Adrian Hunterad448372018-03-20 15:07:38 +02007908
7909 /* Enable Auto-Hibernate if configured */
7910 ufshcd_auto_hibern8_enable(hba);
7911
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007912 goto out;
7913
7914set_old_link_state:
7915 ufshcd_link_state_transition(hba, old_link_state, 0);
7916vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007917 ufshcd_vops_suspend(hba, pm_op);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007918disable_vreg:
7919 ufshcd_vreg_set_lpm(hba);
7920disable_irq_and_vops_clks:
7921 ufshcd_disable_irq(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007922 if (hba->clk_scaling.is_allowed)
7923 ufshcd_suspend_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007924 ufshcd_setup_clocks(hba, false);
7925out:
7926 hba->pm_op_in_progress = 0;
7927 return ret;
7928}
7929
7930/**
7931 * ufshcd_system_suspend - system suspend routine
7932 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007933 *
7934 * Check the description of ufshcd_suspend() function for more details.
7935 *
7936 * Returns 0 for success and non-zero for failure
7937 */
7938int ufshcd_system_suspend(struct ufs_hba *hba)
7939{
7940 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007941 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007942
7943 if (!hba || !hba->is_powered)
Dolev Raviv233b5942014-10-23 13:25:14 +03007944 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007945
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08007946 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
7947 hba->curr_dev_pwr_mode) &&
7948 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
7949 hba->uic_link_state))
7950 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007951
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08007952 if (pm_runtime_suspended(hba->dev)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007953 /*
7954 * UFS device and/or UFS link low power states during runtime
7955 * suspend seems to be different than what is expected during
7956 * system suspend. Hence runtime resume the devic & link and
7957 * let the system suspend low power states to take effect.
7958 * TODO: If resume takes longer time, we might have optimize
7959 * it in future by not resuming everything if possible.
7960 */
7961 ret = ufshcd_runtime_resume(hba);
7962 if (ret)
7963 goto out;
7964 }
7965
7966 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
7967out:
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007968 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
7969 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007970 hba->curr_dev_pwr_mode, hba->uic_link_state);
Dolev Ravive7850602014-09-25 15:32:36 +03007971 if (!ret)
7972 hba->is_sys_suspended = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007973 return ret;
7974}
7975EXPORT_SYMBOL(ufshcd_system_suspend);
7976
7977/**
7978 * ufshcd_system_resume - system resume routine
7979 * @hba: per adapter instance
7980 *
7981 * Returns 0 for success and non-zero for failure
7982 */
7983
7984int ufshcd_system_resume(struct ufs_hba *hba)
7985{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007986 int ret = 0;
7987 ktime_t start = ktime_get();
7988
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07007989 if (!hba)
7990 return -EINVAL;
7991
7992 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007993 /*
7994 * Let the runtime resume take care of resuming
7995 * if runtime suspended.
7996 */
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007997 goto out;
7998 else
7999 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
8000out:
8001 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
8002 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008003 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008004 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008005}
8006EXPORT_SYMBOL(ufshcd_system_resume);
8007
8008/**
8009 * ufshcd_runtime_suspend - runtime suspend routine
8010 * @hba: per adapter instance
8011 *
8012 * Check the description of ufshcd_suspend() function for more details.
8013 *
8014 * Returns 0 for success and non-zero for failure
8015 */
8016int ufshcd_runtime_suspend(struct ufs_hba *hba)
8017{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008018 int ret = 0;
8019 ktime_t start = ktime_get();
8020
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008021 if (!hba)
8022 return -EINVAL;
8023
8024 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008025 goto out;
8026 else
8027 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
8028out:
8029 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
8030 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008031 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008032 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308033}
8034EXPORT_SYMBOL(ufshcd_runtime_suspend);
8035
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008036/**
8037 * ufshcd_runtime_resume - runtime resume routine
8038 * @hba: per adapter instance
8039 *
8040 * This function basically brings the UFS device, UniPro link and controller
8041 * to active state. Following operations are done in this function:
8042 *
8043 * 1. Turn on all the controller related clocks
8044 * 2. Bring the UniPro link out of Hibernate state
8045 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
8046 * to active state.
8047 * 4. If auto-bkops is enabled on the device, disable it.
8048 *
8049 * So following would be the possible power state after this function return
8050 * successfully:
8051 * S1: UFS device in Active state with VCC rail ON
8052 * UniPro link in Active state
8053 * All the UFS/UniPro controller clocks are ON
8054 *
8055 * Returns 0 for success and non-zero for failure
8056 */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308057int ufshcd_runtime_resume(struct ufs_hba *hba)
8058{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008059 int ret = 0;
8060 ktime_t start = ktime_get();
8061
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008062 if (!hba)
8063 return -EINVAL;
8064
8065 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008066 goto out;
8067 else
8068 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8069out:
8070 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8071 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008072 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008073 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308074}
8075EXPORT_SYMBOL(ufshcd_runtime_resume);
8076
8077int ufshcd_runtime_idle(struct ufs_hba *hba)
8078{
8079 return 0;
8080}
8081EXPORT_SYMBOL(ufshcd_runtime_idle);
8082
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308083/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008084 * ufshcd_shutdown - shutdown routine
8085 * @hba: per adapter instance
8086 *
8087 * This function would power off both UFS device and UFS link.
8088 *
8089 * Returns 0 always to allow force shutdown even in case of errors.
8090 */
8091int ufshcd_shutdown(struct ufs_hba *hba)
8092{
8093 int ret = 0;
8094
8095 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
8096 goto out;
8097
8098 if (pm_runtime_suspended(hba->dev)) {
8099 ret = ufshcd_runtime_resume(hba);
8100 if (ret)
8101 goto out;
8102 }
8103
8104 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
8105out:
8106 if (ret)
8107 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
8108 /* allow force shutdown even in case of errors */
8109 return 0;
8110}
8111EXPORT_SYMBOL(ufshcd_shutdown);
8112
8113/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308114 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308115 * data structure memory
Bart Van Assche8aa29f12018-03-01 15:07:20 -08008116 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308117 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308118void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308119{
Avri Altmandf032bf2018-10-07 17:30:35 +03008120 ufs_bsg_remove(hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008121 ufs_sysfs_remove_nodes(hba->dev);
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05308122 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308123 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308124 ufshcd_disable_intr(hba, hba->intr_mask);
Yaniv Gardi596585a2016-03-10 17:37:08 +02008125 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308126
Vivek Gautameebcc192018-08-07 23:17:39 +05308127 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008128 ufshcd_exit_clk_gating(hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08008129 if (ufshcd_is_clkscaling_supported(hba))
8130 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008131 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308132}
8133EXPORT_SYMBOL_GPL(ufshcd_remove);
8134
8135/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02008136 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8137 * @hba: pointer to Host Bus Adapter (HBA)
8138 */
8139void ufshcd_dealloc_host(struct ufs_hba *hba)
8140{
8141 scsi_host_put(hba->host);
8142}
8143EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8144
8145/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008146 * ufshcd_set_dma_mask - Set dma mask based on the controller
8147 * addressing capability
8148 * @hba: per adapter instance
8149 *
8150 * Returns 0 for success, non-zero for failure
8151 */
8152static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8153{
8154 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8155 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8156 return 0;
8157 }
8158 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8159}
8160
8161/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008162 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308163 * @dev: pointer to device handle
8164 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308165 * Returns 0 on success, non-zero value on failure
8166 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008167int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308168{
8169 struct Scsi_Host *host;
8170 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008171 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308172
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308173 if (!dev) {
8174 dev_err(dev,
8175 "Invalid memory reference for dev is NULL\n");
8176 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308177 goto out_error;
8178 }
8179
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308180 host = scsi_host_alloc(&ufshcd_driver_template,
8181 sizeof(struct ufs_hba));
8182 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308183 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308184 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308185 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308186 }
Adrian Hunterd87161b2018-09-13 14:28:48 +03008187
8188 /*
8189 * Do not use blk-mq at this time because blk-mq does not support
8190 * runtime pm.
8191 */
8192 host->use_blk_mq = false;
8193
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308194 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308195 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308196 hba->dev = dev;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008197 *hba_handle = hba;
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05308198 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008199
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03008200 INIT_LIST_HEAD(&hba->clk_list_head);
8201
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008202out_error:
8203 return err;
8204}
8205EXPORT_SYMBOL(ufshcd_alloc_host);
8206
8207/**
8208 * ufshcd_init - Driver initialization routine
8209 * @hba: per-adapter instance
8210 * @mmio_base: base register address
8211 * @irq: Interrupt line of device
8212 * Returns 0 on success, non-zero value on failure
8213 */
8214int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
8215{
8216 int err;
8217 struct Scsi_Host *host = hba->host;
8218 struct device *dev = hba->dev;
8219
8220 if (!mmio_base) {
8221 dev_err(hba->dev,
8222 "Invalid memory reference for mmio_base is NULL\n");
8223 err = -ENODEV;
8224 goto out_error;
8225 }
8226
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308227 hba->mmio_base = mmio_base;
8228 hba->irq = irq;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308229
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00008230 /* Set descriptor lengths to specification defaults */
8231 ufshcd_def_desc_sizes(hba);
8232
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008233 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008234 if (err)
8235 goto out_error;
8236
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308237 /* Read capabilities registers */
8238 ufshcd_hba_capabilities(hba);
8239
8240 /* Get UFS version supported by the controller */
8241 hba->ufs_version = ufshcd_get_ufs_version(hba);
8242
Yaniv Gardic01848c2016-12-05 19:25:02 -08008243 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
8244 (hba->ufs_version != UFSHCI_VERSION_11) &&
8245 (hba->ufs_version != UFSHCI_VERSION_20) &&
8246 (hba->ufs_version != UFSHCI_VERSION_21))
8247 dev_err(hba->dev, "invalid UFS version 0x%x\n",
8248 hba->ufs_version);
8249
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308250 /* Get Interrupt bit mask per version */
8251 hba->intr_mask = ufshcd_get_intr_mask(hba);
8252
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008253 err = ufshcd_set_dma_mask(hba);
8254 if (err) {
8255 dev_err(hba->dev, "set dma mask failed\n");
8256 goto out_disable;
8257 }
8258
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308259 /* Allocate memory for host memory space */
8260 err = ufshcd_memory_alloc(hba);
8261 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308262 dev_err(hba->dev, "Memory allocation failed\n");
8263 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308264 }
8265
8266 /* Configure LRB */
8267 ufshcd_host_memory_configure(hba);
8268
8269 host->can_queue = hba->nutrs;
8270 host->cmd_per_lun = hba->nutrs;
8271 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03008272 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308273 host->max_channel = UFSHCD_MAX_CHANNEL;
8274 host->unique_id = host->host_no;
Avri Altmana851b2b2018-10-07 17:30:34 +03008275 host->max_cmd_len = UFS_CDB_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308276
Dolev Raviv7eb584d2014-09-25 15:32:31 +03008277 hba->max_pwr_info.is_valid = false;
8278
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308279 /* Initailize wait queue for task management */
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05308280 init_waitqueue_head(&hba->tm_wq);
8281 init_waitqueue_head(&hba->tm_tag_wq);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308282
8283 /* Initialize work queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05308284 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308285 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308286
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308287 /* Initialize UIC command mutex */
8288 mutex_init(&hba->uic_cmd_mutex);
8289
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308290 /* Initialize mutex for device management commands */
8291 mutex_init(&hba->dev_cmd.lock);
8292
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08008293 init_rwsem(&hba->clk_scaling_lock);
8294
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308295 /* Initialize device management tag acquire wait queue */
8296 init_waitqueue_head(&hba->dev_cmd.tag_wq);
8297
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008298 ufshcd_init_clk_gating(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02008299
Vivek Gautameebcc192018-08-07 23:17:39 +05308300 ufshcd_init_clk_scaling(hba);
8301
Yaniv Gardi199ef132016-03-10 17:37:06 +02008302 /*
8303 * In order to avoid any spurious interrupt immediately after
8304 * registering UFS controller interrupt handler, clear any pending UFS
8305 * interrupt status and disable all the UFS interrupts.
8306 */
8307 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
8308 REG_INTERRUPT_STATUS);
8309 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
8310 /*
8311 * Make sure that UFS interrupts are disabled and any pending interrupt
8312 * status is cleared before registering UFS interrupt handler.
8313 */
8314 mb();
8315
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308316 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09008317 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308318 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308319 dev_err(hba->dev, "request irq failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008320 goto exit_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008321 } else {
8322 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308323 }
8324
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308325 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308326 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308327 dev_err(hba->dev, "scsi_add_host failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008328 goto exit_gating;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308329 }
8330
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308331 /* Host controller enable */
8332 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308333 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308334 dev_err(hba->dev, "Host controller enable failed\n");
Dolev Raviv66cc8202016-12-22 18:39:42 -08008335 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08008336 ufshcd_print_host_state(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308337 goto out_remove_scsi_host;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308338 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308339
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -08008340 /*
8341 * Set the default power management level for runtime and system PM.
8342 * Default power saving mode is to keep UFS link in Hibern8 state
8343 * and UFS device in sleep state.
8344 */
8345 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8346 UFS_SLEEP_PWR_MODE,
8347 UIC_LINK_HIBERN8_STATE);
8348 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8349 UFS_SLEEP_PWR_MODE,
8350 UIC_LINK_HIBERN8_STATE);
8351
Adrian Hunterad448372018-03-20 15:07:38 +02008352 /* Set the default auto-hiberate idle timer value to 150 ms */
8353 if (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) {
8354 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8355 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8356 }
8357
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05308358 /* Hold auto suspend until async scan completes */
8359 pm_runtime_get_sync(dev);
Subhash Jadavani38135532018-05-03 16:37:18 +05308360 atomic_set(&hba->scsi_block_reqs_cnt, 0);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008361 /*
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008362 * We are assuming that device wasn't put in sleep/power-down
8363 * state exclusively during the boot stage before kernel.
8364 * This assumption helps avoid doing link startup twice during
8365 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008366 */
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008367 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008368
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308369 async_schedule(ufshcd_async_scan, hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008370 ufs_sysfs_add_nodes(hba->dev);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308371
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308372 return 0;
8373
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308374out_remove_scsi_host:
8375 scsi_remove_host(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008376exit_gating:
Vivek Gautameebcc192018-08-07 23:17:39 +05308377 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008378 ufshcd_exit_clk_gating(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308379out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008380 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008381 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308382out_error:
8383 return err;
8384}
8385EXPORT_SYMBOL_GPL(ufshcd_init);
8386
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308387MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8388MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05308389MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308390MODULE_LICENSE("GPL");
8391MODULE_VERSION(UFSHCD_DRIVER_VERSION);