blob: e91dc574a08af7288b6c2628c47fee6d263fbb02 [file] [log] [blame]
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05302 * Universal Flash Storage Host controller driver Core
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303 *
4 * This code is based on drivers/scsi/ufs/ufshcd.c
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053011 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053016 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053018 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053024 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030035 *
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053038 */
39
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053040#include <linux/async.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030041#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020042#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020043#include <linux/of.h>
Adrian Hunterad448372018-03-20 15:07:38 +020044#include <linux/bitfield.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053045#include "ufshcd.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020046#include "ufs_quirks.h"
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +053047#include "unipro.h"
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +020048#include "ufs-sysfs.h"
Avri Altmandf032bf2018-10-07 17:30:35 +030049#include "ufs_bsg.h"
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053050
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -080051#define CREATE_TRACE_POINTS
52#include <trace/events/ufs.h>
53
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053054#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
55 UTP_TASK_REQ_COMPL |\
56 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053057/* UIC command timeout, unit: ms */
58#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053059
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053060/* NOP OUT retries waiting for NOP IN response */
61#define NOP_OUT_RETRIES 10
62/* Timeout after 30 msecs if NOP OUT hangs without response */
63#define NOP_OUT_TIMEOUT 30 /* msecs */
64
Dolev Raviv68078d52013-07-30 00:35:58 +053065/* Query request retries */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080066#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +053067/* Query request timeout */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080068#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +053069
Sujit Reddy Thummae2933132014-05-26 10:59:12 +053070/* Task management command timeout */
71#define TM_CMD_TIMEOUT 100 /* msecs */
72
Yaniv Gardi64238fb2016-02-01 15:02:43 +020073/* maximum number of retries for a general UIC command */
74#define UFS_UIC_COMMAND_RETRIES 3
75
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030076/* maximum number of link-startup retries */
77#define DME_LINKSTARTUP_RETRIES 3
78
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +020079/* Maximum retries for Hibern8 enter */
80#define UIC_HIBERN8_ENTER_RETRIES 3
81
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030082/* maximum number of reset retries before giving up */
83#define MAX_HOST_RESET_RETRIES 5
84
Dolev Raviv68078d52013-07-30 00:35:58 +053085/* Expose the flag value from utp_upiu_query.value */
86#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
87
Seungwon Jeon7d568652013-08-31 21:40:20 +053088/* Interrupt aggregation default timeout, unit: 40us */
89#define INT_AGGR_DEF_TO 0x02
90
Stanley Chu49615ba2019-09-16 23:56:50 +080091/* default delay of autosuspend: 2000 ms */
92#define RPM_AUTOSUSPEND_DELAY_MS 2000
93
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +030094#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
95 ({ \
96 int _ret; \
97 if (_on) \
98 _ret = ufshcd_enable_vreg(_dev, _vreg); \
99 else \
100 _ret = ufshcd_disable_vreg(_dev, _vreg); \
101 _ret; \
102 })
103
Tomas Winklerba809172018-06-14 11:14:09 +0300104#define ufshcd_hex_dump(prefix_str, buf, len) do { \
105 size_t __len = (len); \
106 print_hex_dump(KERN_ERR, prefix_str, \
107 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
108 16, 4, buf, __len, false); \
109} while (0)
110
111int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
112 const char *prefix)
113{
Marc Gonzalezd6724752019-01-22 18:29:22 +0100114 u32 *regs;
115 size_t pos;
116
117 if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
118 return -EINVAL;
Tomas Winklerba809172018-06-14 11:14:09 +0300119
Can Guocddaeba2019-11-14 22:09:27 -0800120 regs = kzalloc(len, GFP_ATOMIC);
Tomas Winklerba809172018-06-14 11:14:09 +0300121 if (!regs)
122 return -ENOMEM;
123
Marc Gonzalezd6724752019-01-22 18:29:22 +0100124 for (pos = 0; pos < len; pos += 4)
125 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
126
Tomas Winklerba809172018-06-14 11:14:09 +0300127 ufshcd_hex_dump(prefix, regs, len);
128 kfree(regs);
129
130 return 0;
131}
132EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800133
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530134enum {
135 UFSHCD_MAX_CHANNEL = 0,
136 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530137 UFSHCD_CMD_PER_LUN = 32,
138 UFSHCD_CAN_QUEUE = 32,
139};
140
141/* UFSHCD states */
142enum {
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530143 UFSHCD_STATE_RESET,
144 UFSHCD_STATE_ERROR,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530145 UFSHCD_STATE_OPERATIONAL,
Zang Leigang141f8162016-11-16 11:29:37 +0800146 UFSHCD_STATE_EH_SCHEDULED,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530147};
148
149/* UFSHCD error handling flags */
150enum {
151 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530152};
153
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530154/* UFSHCD UIC layer error flags */
155enum {
156 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200157 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
158 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
159 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
160 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
161 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530162};
163
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530164#define ufshcd_set_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300165 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530166#define ufshcd_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300167 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530168#define ufshcd_clear_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300169 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530170
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300171#define ufshcd_set_ufs_dev_active(h) \
172 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
173#define ufshcd_set_ufs_dev_sleep(h) \
174 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
175#define ufshcd_set_ufs_dev_poweroff(h) \
176 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
177#define ufshcd_is_ufs_dev_active(h) \
178 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
179#define ufshcd_is_ufs_dev_sleep(h) \
180 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
181#define ufshcd_is_ufs_dev_poweroff(h) \
182 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
183
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +0200184struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300185 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
186 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
187 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
188 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
189 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
190 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
191};
192
193static inline enum ufs_dev_pwr_mode
194ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
195{
196 return ufs_pm_lvl_states[lvl].dev_state;
197}
198
199static inline enum uic_link_state
200ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
201{
202 return ufs_pm_lvl_states[lvl].link_state;
203}
204
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -0800205static inline enum ufs_pm_level
206ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
207 enum uic_link_state link_state)
208{
209 enum ufs_pm_level lvl;
210
211 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
212 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
213 (ufs_pm_lvl_states[lvl].link_state == link_state))
214 return lvl;
215 }
216
217 /* if no match found, return the level 0 */
218 return UFS_PM_LVL_0;
219}
220
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800221static struct ufs_dev_fix ufs_fixups[] = {
222 /* UFS cards deviations table */
223 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
224 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800225 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
226 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
227 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800228 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
229 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
230 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
231 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
232 UFS_DEVICE_QUIRK_PA_TACTIVATE),
233 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
234 UFS_DEVICE_QUIRK_PA_TACTIVATE),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800235 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
236 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
Wei Li8e4829c2018-11-08 09:08:29 -0800237 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
238 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800239
240 END_FIX
241};
242
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -0800243static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530244static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530245static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Dolev Ravive7d38252016-12-22 18:40:07 -0800246static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530247static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300248static void ufshcd_hba_exit(struct ufs_hba *hba);
249static int ufshcd_probe_hba(struct ufs_hba *hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300250static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
251 bool skip_ref_clk);
252static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
253static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
254static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300255static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300256static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800257static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
258static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800259static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800260static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300261static irqreturn_t ufshcd_intr(int irq, void *__hba);
Yaniv Gardi874237f2015-05-17 18:55:03 +0300262static int ufshcd_change_power_mode(struct ufs_hba *hba,
263 struct ufs_pa_layer_attr *pwr_mode);
Yaniv Gardi14497322016-02-01 15:02:39 +0200264static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
265{
266 return tag >= 0 && tag < hba->nutrs;
267}
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300268
269static inline int ufshcd_enable_irq(struct ufs_hba *hba)
270{
271 int ret = 0;
272
273 if (!hba->is_irq_enabled) {
274 ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
275 hba);
276 if (ret)
277 dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
278 __func__, ret);
279 hba->is_irq_enabled = true;
280 }
281
282 return ret;
283}
284
285static inline void ufshcd_disable_irq(struct ufs_hba *hba)
286{
287 if (hba->is_irq_enabled) {
288 free_irq(hba->irq, hba);
289 hba->is_irq_enabled = false;
290 }
291}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530292
Subhash Jadavani38135532018-05-03 16:37:18 +0530293static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
294{
295 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
296 scsi_unblock_requests(hba->host);
297}
298
299static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
300{
301 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
302 scsi_block_requests(hba->host);
303}
304
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300305static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
306 const char *str)
307{
308 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
309
310 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
311}
312
313static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
314 const char *str)
315{
316 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
317
318 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
319}
320
321static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
322 const char *str)
323{
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300324 int off = (int)tag - hba->nutrs;
Christoph Hellwig391e3882018-10-07 17:30:32 +0300325 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300326
Christoph Hellwig391e3882018-10-07 17:30:32 +0300327 trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
328 &descp->input_param1);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300329}
330
Lee Susman1a07f2d2016-12-22 18:42:03 -0800331static void ufshcd_add_command_trace(struct ufs_hba *hba,
332 unsigned int tag, const char *str)
333{
334 sector_t lba = -1;
335 u8 opcode = 0;
336 u32 intr, doorbell;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300337 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
Lee Susman1a07f2d2016-12-22 18:42:03 -0800338 int transfer_len = -1;
339
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300340 if (!trace_ufshcd_command_enabled()) {
341 /* trace UPIU W/O tracing command */
342 if (lrbp->cmd)
343 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800344 return;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300345 }
Lee Susman1a07f2d2016-12-22 18:42:03 -0800346
347 if (lrbp->cmd) { /* data phase exists */
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300348 /* trace UPIU also */
349 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800350 opcode = (u8)(*lrbp->cmd->cmnd);
351 if ((opcode == READ_10) || (opcode == WRITE_10)) {
352 /*
353 * Currently we only fully trace read(10) and write(10)
354 * commands
355 */
356 if (lrbp->cmd->request && lrbp->cmd->request->bio)
357 lba =
358 lrbp->cmd->request->bio->bi_iter.bi_sector;
359 transfer_len = be32_to_cpu(
360 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
361 }
362 }
363
364 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
365 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
366 trace_ufshcd_command(dev_name(hba->dev), str, tag,
367 doorbell, transfer_len, intr, lba, opcode);
368}
369
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800370static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
371{
372 struct ufs_clk_info *clki;
373 struct list_head *head = &hba->clk_list_head;
374
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300375 if (list_empty(head))
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800376 return;
377
378 list_for_each_entry(clki, head, list) {
379 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
380 clki->max_freq)
381 dev_err(hba->dev, "clk: %s, rate: %u\n",
382 clki->name, clki->curr_freq);
383 }
384}
385
Stanley Chu48d5b972019-07-10 21:38:18 +0800386static void ufshcd_print_err_hist(struct ufs_hba *hba,
387 struct ufs_err_reg_hist *err_hist,
388 char *err_name)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800389{
390 int i;
Stanley Chu27752642019-01-28 22:04:26 +0800391 bool found = false;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800392
Stanley Chu48d5b972019-07-10 21:38:18 +0800393 for (i = 0; i < UFS_ERR_REG_HIST_LENGTH; i++) {
394 int p = (i + err_hist->pos) % UFS_ERR_REG_HIST_LENGTH;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800395
396 if (err_hist->reg[p] == 0)
397 continue;
Stanley Chuc5397f12019-07-10 21:38:20 +0800398 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800399 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
Stanley Chu27752642019-01-28 22:04:26 +0800400 found = true;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800401 }
Stanley Chu27752642019-01-28 22:04:26 +0800402
403 if (!found)
Stanley Chu48d5b972019-07-10 21:38:18 +0800404 dev_err(hba->dev, "No record of %s errors\n", err_name);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800405}
406
Dolev Raviv66cc8202016-12-22 18:39:42 -0800407static void ufshcd_print_host_regs(struct ufs_hba *hba)
408{
Tomas Winklerba809172018-06-14 11:14:09 +0300409 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
Dolev Raviv66cc8202016-12-22 18:39:42 -0800410 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
411 hba->ufs_version, hba->capabilities);
412 dev_err(hba->dev,
413 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
414 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800415 dev_err(hba->dev,
416 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
417 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
418 hba->ufs_stats.hibern8_exit_cnt);
419
Stanley Chu48d5b972019-07-10 21:38:18 +0800420 ufshcd_print_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
421 ufshcd_print_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
422 ufshcd_print_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
423 ufshcd_print_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
424 ufshcd_print_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
Stanley Chud3c615b2019-07-10 21:38:19 +0800425 ufshcd_print_err_hist(hba, &hba->ufs_stats.auto_hibern8_err,
426 "auto_hibern8_err");
Stanley Chu8808b4e2019-07-10 21:38:21 +0800427 ufshcd_print_err_hist(hba, &hba->ufs_stats.fatal_err, "fatal_err");
428 ufshcd_print_err_hist(hba, &hba->ufs_stats.link_startup_err,
429 "link_startup_fail");
430 ufshcd_print_err_hist(hba, &hba->ufs_stats.resume_err, "resume_fail");
431 ufshcd_print_err_hist(hba, &hba->ufs_stats.suspend_err,
432 "suspend_fail");
433 ufshcd_print_err_hist(hba, &hba->ufs_stats.dev_reset, "dev_reset");
434 ufshcd_print_err_hist(hba, &hba->ufs_stats.host_reset, "host_reset");
435 ufshcd_print_err_hist(hba, &hba->ufs_stats.task_abort, "task_abort");
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800436
437 ufshcd_print_clk_freqs(hba);
438
439 if (hba->vops && hba->vops->dbg_register_dump)
440 hba->vops->dbg_register_dump(hba);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800441}
442
443static
444void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
445{
446 struct ufshcd_lrb *lrbp;
Gilad Broner7fabb772017-02-03 16:56:50 -0800447 int prdt_length;
Dolev Raviv66cc8202016-12-22 18:39:42 -0800448 int tag;
449
450 for_each_set_bit(tag, &bitmap, hba->nutrs) {
451 lrbp = &hba->lrb[tag];
452
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800453 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
454 tag, ktime_to_us(lrbp->issue_time_stamp));
Zang Leigang09017182017-09-27 10:06:06 +0800455 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
456 tag, ktime_to_us(lrbp->compl_time_stamp));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800457 dev_err(hba->dev,
458 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
459 tag, (u64)lrbp->utrd_dma_addr);
460
Dolev Raviv66cc8202016-12-22 18:39:42 -0800461 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
462 sizeof(struct utp_transfer_req_desc));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800463 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
464 (u64)lrbp->ucd_req_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800465 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
466 sizeof(struct utp_upiu_req));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800467 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
468 (u64)lrbp->ucd_rsp_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800469 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
470 sizeof(struct utp_upiu_rsp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800471
Gilad Broner7fabb772017-02-03 16:56:50 -0800472 prdt_length = le16_to_cpu(
473 lrbp->utr_descriptor_ptr->prd_table_length);
474 dev_err(hba->dev,
475 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
476 tag, prdt_length,
477 (u64)lrbp->ucd_prdt_dma_addr);
478
479 if (pr_prdt)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800480 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
Gilad Broner7fabb772017-02-03 16:56:50 -0800481 sizeof(struct ufshcd_sg_entry) * prdt_length);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800482 }
483}
484
485static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
486{
Dolev Raviv66cc8202016-12-22 18:39:42 -0800487 int tag;
488
489 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
Christoph Hellwig391e3882018-10-07 17:30:32 +0300490 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
491
Dolev Raviv66cc8202016-12-22 18:39:42 -0800492 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
Christoph Hellwig391e3882018-10-07 17:30:32 +0300493 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800494 }
495}
496
Gilad Broner6ba65582017-02-03 16:57:28 -0800497static void ufshcd_print_host_state(struct ufs_hba *hba)
498{
499 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
Bart Van Assche7252a362019-12-09 10:13:08 -0800500 dev_err(hba->dev, "outstanding reqs=0x%lx tasks=0x%lx\n",
501 hba->outstanding_reqs, hba->outstanding_tasks);
Gilad Broner6ba65582017-02-03 16:57:28 -0800502 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
503 hba->saved_err, hba->saved_uic_err);
504 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
505 hba->curr_dev_pwr_mode, hba->uic_link_state);
506 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
507 hba->pm_op_in_progress, hba->is_sys_suspended);
508 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
509 hba->auto_bkops_enabled, hba->host->host_self_blocked);
510 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
511 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
512 hba->eh_flags, hba->req_abort_count);
513 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
514 hba->capabilities, hba->caps);
515 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
516 hba->dev_quirks);
517}
518
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800519/**
520 * ufshcd_print_pwr_info - print power params as saved in hba
521 * power info
522 * @hba: per-adapter instance
523 */
524static void ufshcd_print_pwr_info(struct ufs_hba *hba)
525{
526 static const char * const names[] = {
527 "INVALID MODE",
528 "FAST MODE",
529 "SLOW_MODE",
530 "INVALID MODE",
531 "FASTAUTO_MODE",
532 "SLOWAUTO_MODE",
533 "INVALID MODE",
534 };
535
536 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
537 __func__,
538 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
539 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
540 names[hba->pwr_info.pwr_rx],
541 names[hba->pwr_info.pwr_tx],
542 hba->pwr_info.hs_rate);
543}
544
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530545/*
546 * ufshcd_wait_for_register - wait for register value to change
547 * @hba - per-adapter interface
548 * @reg - mmio register offset
549 * @mask - mask to apply to read register value
550 * @val - wait condition
551 * @interval_us - polling interval in microsecs
552 * @timeout_ms - timeout in millisecs
Yaniv Gardi596585a2016-03-10 17:37:08 +0200553 * @can_sleep - perform sleep or just spin
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530554 *
555 * Returns -ETIMEDOUT on error, zero on success
556 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200557int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
558 u32 val, unsigned long interval_us,
559 unsigned long timeout_ms, bool can_sleep)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530560{
561 int err = 0;
562 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
563
564 /* ignore bits that we don't intend to wait on */
565 val = val & mask;
566
567 while ((ufshcd_readl(hba, reg) & mask) != val) {
Yaniv Gardi596585a2016-03-10 17:37:08 +0200568 if (can_sleep)
569 usleep_range(interval_us, interval_us + 50);
570 else
571 udelay(interval_us);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530572 if (time_after(jiffies, timeout)) {
573 if ((ufshcd_readl(hba, reg) & mask) != val)
574 err = -ETIMEDOUT;
575 break;
576 }
577 }
578
579 return err;
580}
581
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530582/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530583 * ufshcd_get_intr_mask - Get the interrupt bit mask
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800584 * @hba: Pointer to adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530585 *
586 * Returns interrupt bit mask per version
587 */
588static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
589{
Yaniv Gardic01848c2016-12-05 19:25:02 -0800590 u32 intr_mask = 0;
591
592 switch (hba->ufs_version) {
593 case UFSHCI_VERSION_10:
594 intr_mask = INTERRUPT_MASK_ALL_VER_10;
595 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800596 case UFSHCI_VERSION_11:
597 case UFSHCI_VERSION_20:
598 intr_mask = INTERRUPT_MASK_ALL_VER_11;
599 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800600 case UFSHCI_VERSION_21:
601 default:
602 intr_mask = INTERRUPT_MASK_ALL_VER_21;
Tomohiro Kusumi031d1e02017-03-23 12:49:04 +0200603 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800604 }
605
606 return intr_mask;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530607}
608
609/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530610 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800611 * @hba: Pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530612 *
613 * Returns UFSHCI version supported by the controller
614 */
615static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
616{
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200617 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
618 return ufshcd_vops_get_ufs_hci_version(hba);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300619
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530620 return ufshcd_readl(hba, REG_UFS_VERSION);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530621}
622
623/**
624 * ufshcd_is_device_present - Check if any device connected to
625 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300626 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530627 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300628 * Returns true if device present, false if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530629 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300630static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530631{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300632 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300633 DEVICE_PRESENT) ? true : false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530634}
635
636/**
637 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800638 * @lrbp: pointer to local command reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530639 *
640 * This function is used to get the OCS field from UTRD
641 * Returns the OCS field in the UTRD
642 */
643static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
644{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530645 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530646}
647
648/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530649 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
650 * @hba: per adapter instance
651 * @pos: position of the bit to be cleared
652 */
653static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
654{
Alim Akhtar1399c5b2018-05-06 15:44:15 +0530655 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
656 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
657 else
658 ufshcd_writel(hba, ~(1 << pos),
659 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
660}
661
662/**
663 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
664 * @hba: per adapter instance
665 * @pos: position of the bit to be cleared
666 */
667static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
668{
669 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
670 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
671 else
672 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530673}
674
675/**
Yaniv Gardia48353f2016-02-01 15:02:40 +0200676 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
677 * @hba: per adapter instance
678 * @tag: position of the bit to be cleared
679 */
680static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
681{
682 __clear_bit(tag, &hba->outstanding_reqs);
683}
684
685/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530686 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
687 * @reg: Register value of host controller status
688 *
689 * Returns integer, 0 on Success and positive value if failed
690 */
691static inline int ufshcd_get_lists_status(u32 reg)
692{
Tomohiro Kusumi6cf16112017-04-26 20:28:58 +0300693 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530694}
695
696/**
697 * ufshcd_get_uic_cmd_result - Get the UIC command result
698 * @hba: Pointer to adapter instance
699 *
700 * This function gets the result of UIC command completion
701 * Returns 0 on success, non zero value on error
702 */
703static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
704{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530705 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530706 MASK_UIC_COMMAND_RESULT;
707}
708
709/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530710 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
711 * @hba: Pointer to adapter instance
712 *
713 * This function gets UIC command argument3
714 * Returns 0 on success, non zero value on error
715 */
716static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
717{
718 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
719}
720
721/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530722 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530723 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530724 */
725static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530726ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530727{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530728 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530729}
730
731/**
732 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
733 * @ucd_rsp_ptr: pointer to response UPIU
734 *
735 * This function gets the response status and scsi_status from response UPIU
736 * Returns the response result code.
737 */
738static inline int
739ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
740{
741 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
742}
743
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530744/*
745 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
746 * from response UPIU
747 * @ucd_rsp_ptr: pointer to response UPIU
748 *
749 * Return the data segment length.
750 */
751static inline unsigned int
752ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
753{
754 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
755 MASK_RSP_UPIU_DATA_SEG_LEN;
756}
757
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530758/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530759 * ufshcd_is_exception_event - Check if the device raised an exception event
760 * @ucd_rsp_ptr: pointer to response UPIU
761 *
762 * The function checks if the device raised an exception event indicated in
763 * the Device Information field of response UPIU.
764 *
765 * Returns true if exception is raised, false otherwise.
766 */
767static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
768{
769 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
770 MASK_RSP_EXCEPTION_EVENT ? true : false;
771}
772
773/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530774 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530775 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530776 */
777static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530778ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530779{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530780 ufshcd_writel(hba, INT_AGGR_ENABLE |
781 INT_AGGR_COUNTER_AND_TIMER_RESET,
782 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
783}
784
785/**
786 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
787 * @hba: per adapter instance
788 * @cnt: Interrupt aggregation counter threshold
789 * @tmout: Interrupt aggregation timeout value
790 */
791static inline void
792ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
793{
794 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
795 INT_AGGR_COUNTER_THLD_VAL(cnt) |
796 INT_AGGR_TIMEOUT_VAL(tmout),
797 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530798}
799
800/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300801 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
802 * @hba: per adapter instance
803 */
804static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
805{
806 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
807}
808
809/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530810 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
811 * When run-stop registers are set to 1, it indicates the
812 * host controller that it can process the requests
813 * @hba: per adapter instance
814 */
815static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
816{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530817 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
818 REG_UTP_TASK_REQ_LIST_RUN_STOP);
819 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
820 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530821}
822
823/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530824 * ufshcd_hba_start - Start controller initialization sequence
825 * @hba: per adapter instance
826 */
827static inline void ufshcd_hba_start(struct ufs_hba *hba)
828{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530829 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530830}
831
832/**
833 * ufshcd_is_hba_active - Get controller state
834 * @hba: per adapter instance
835 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300836 * Returns false if controller is active, true otherwise
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530837 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300838static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530839{
Tomohiro Kusumi4a8eec22017-03-28 16:49:25 +0300840 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
841 ? false : true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530842}
843
Yaniv Gardi37113102016-03-10 17:37:16 +0200844u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
845{
846 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
847 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
848 (hba->ufs_version == UFSHCI_VERSION_11))
849 return UFS_UNIPRO_VER_1_41;
850 else
851 return UFS_UNIPRO_VER_1_6;
852}
853EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
854
855static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
856{
857 /*
858 * If both host and device support UniPro ver1.6 or later, PA layer
859 * parameters tuning happens during link startup itself.
860 *
861 * We can manually tune PA layer parameters if either host or device
862 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
863 * logic simple, we will only do manual tuning if local unipro version
864 * doesn't support ver1.6 or later.
865 */
866 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
867 return true;
868 else
869 return false;
870}
871
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800872static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
873{
874 int ret = 0;
875 struct ufs_clk_info *clki;
876 struct list_head *head = &hba->clk_list_head;
877 ktime_t start = ktime_get();
878 bool clk_state_changed = false;
879
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300880 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800881 goto out;
882
883 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
884 if (ret)
885 return ret;
886
887 list_for_each_entry(clki, head, list) {
888 if (!IS_ERR_OR_NULL(clki->clk)) {
889 if (scale_up && clki->max_freq) {
890 if (clki->curr_freq == clki->max_freq)
891 continue;
892
893 clk_state_changed = true;
894 ret = clk_set_rate(clki->clk, clki->max_freq);
895 if (ret) {
896 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
897 __func__, clki->name,
898 clki->max_freq, ret);
899 break;
900 }
901 trace_ufshcd_clk_scaling(dev_name(hba->dev),
902 "scaled up", clki->name,
903 clki->curr_freq,
904 clki->max_freq);
905
906 clki->curr_freq = clki->max_freq;
907
908 } else if (!scale_up && clki->min_freq) {
909 if (clki->curr_freq == clki->min_freq)
910 continue;
911
912 clk_state_changed = true;
913 ret = clk_set_rate(clki->clk, clki->min_freq);
914 if (ret) {
915 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
916 __func__, clki->name,
917 clki->min_freq, ret);
918 break;
919 }
920 trace_ufshcd_clk_scaling(dev_name(hba->dev),
921 "scaled down", clki->name,
922 clki->curr_freq,
923 clki->min_freq);
924 clki->curr_freq = clki->min_freq;
925 }
926 }
927 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
928 clki->name, clk_get_rate(clki->clk));
929 }
930
931 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
932
933out:
934 if (clk_state_changed)
935 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
936 (scale_up ? "up" : "down"),
937 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
938 return ret;
939}
940
941/**
942 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
943 * @hba: per adapter instance
944 * @scale_up: True if scaling up and false if scaling down
945 *
946 * Returns true if scaling is required, false otherwise.
947 */
948static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
949 bool scale_up)
950{
951 struct ufs_clk_info *clki;
952 struct list_head *head = &hba->clk_list_head;
953
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300954 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800955 return false;
956
957 list_for_each_entry(clki, head, list) {
958 if (!IS_ERR_OR_NULL(clki->clk)) {
959 if (scale_up && clki->max_freq) {
960 if (clki->curr_freq == clki->max_freq)
961 continue;
962 return true;
963 } else if (!scale_up && clki->min_freq) {
964 if (clki->curr_freq == clki->min_freq)
965 continue;
966 return true;
967 }
968 }
969 }
970
971 return false;
972}
973
974static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
975 u64 wait_timeout_us)
976{
977 unsigned long flags;
978 int ret = 0;
979 u32 tm_doorbell;
980 u32 tr_doorbell;
981 bool timeout = false, do_last_check = false;
982 ktime_t start;
983
984 ufshcd_hold(hba, false);
985 spin_lock_irqsave(hba->host->host_lock, flags);
986 /*
987 * Wait for all the outstanding tasks/transfer requests.
988 * Verify by checking the doorbell registers are clear.
989 */
990 start = ktime_get();
991 do {
992 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
993 ret = -EBUSY;
994 goto out;
995 }
996
997 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
998 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
999 if (!tm_doorbell && !tr_doorbell) {
1000 timeout = false;
1001 break;
1002 } else if (do_last_check) {
1003 break;
1004 }
1005
1006 spin_unlock_irqrestore(hba->host->host_lock, flags);
1007 schedule();
1008 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1009 wait_timeout_us) {
1010 timeout = true;
1011 /*
1012 * We might have scheduled out for long time so make
1013 * sure to check if doorbells are cleared by this time
1014 * or not.
1015 */
1016 do_last_check = true;
1017 }
1018 spin_lock_irqsave(hba->host->host_lock, flags);
1019 } while (tm_doorbell || tr_doorbell);
1020
1021 if (timeout) {
1022 dev_err(hba->dev,
1023 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1024 __func__, tm_doorbell, tr_doorbell);
1025 ret = -EBUSY;
1026 }
1027out:
1028 spin_unlock_irqrestore(hba->host->host_lock, flags);
1029 ufshcd_release(hba);
1030 return ret;
1031}
1032
1033/**
1034 * ufshcd_scale_gear - scale up/down UFS gear
1035 * @hba: per adapter instance
1036 * @scale_up: True for scaling up gear and false for scaling down
1037 *
1038 * Returns 0 for success,
1039 * Returns -EBUSY if scaling can't happen at this time
1040 * Returns non-zero for any other errors
1041 */
1042static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1043{
1044 #define UFS_MIN_GEAR_TO_SCALE_DOWN UFS_HS_G1
1045 int ret = 0;
1046 struct ufs_pa_layer_attr new_pwr_info;
1047
1048 if (scale_up) {
1049 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1050 sizeof(struct ufs_pa_layer_attr));
1051 } else {
1052 memcpy(&new_pwr_info, &hba->pwr_info,
1053 sizeof(struct ufs_pa_layer_attr));
1054
1055 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1056 || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1057 /* save the current power mode */
1058 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1059 &hba->pwr_info,
1060 sizeof(struct ufs_pa_layer_attr));
1061
1062 /* scale down gear */
1063 new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1064 new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1065 }
1066 }
1067
1068 /* check if the power mode needs to be changed or not? */
1069 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1070
1071 if (ret)
1072 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1073 __func__, ret,
1074 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1075 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1076
1077 return ret;
1078}
1079
1080static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1081{
1082 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1083 int ret = 0;
1084 /*
1085 * make sure that there are no outstanding requests when
1086 * clock scaling is in progress
1087 */
Subhash Jadavani38135532018-05-03 16:37:18 +05301088 ufshcd_scsi_block_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001089 down_write(&hba->clk_scaling_lock);
1090 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1091 ret = -EBUSY;
1092 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301093 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001094 }
1095
1096 return ret;
1097}
1098
1099static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1100{
1101 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301102 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001103}
1104
1105/**
1106 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1107 * @hba: per adapter instance
1108 * @scale_up: True for scaling up and false for scalin down
1109 *
1110 * Returns 0 for success,
1111 * Returns -EBUSY if scaling can't happen at this time
1112 * Returns non-zero for any other errors
1113 */
1114static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1115{
1116 int ret = 0;
1117
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001118 /* let's not get into low power until clock scaling is completed */
1119 ufshcd_hold(hba, false);
1120
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001121 ret = ufshcd_clock_scaling_prepare(hba);
1122 if (ret)
1123 return ret;
1124
1125 /* scale down the gear before scaling down clocks */
1126 if (!scale_up) {
1127 ret = ufshcd_scale_gear(hba, false);
1128 if (ret)
1129 goto out;
1130 }
1131
1132 ret = ufshcd_scale_clks(hba, scale_up);
1133 if (ret) {
1134 if (!scale_up)
1135 ufshcd_scale_gear(hba, true);
1136 goto out;
1137 }
1138
1139 /* scale up the gear after scaling up clocks */
1140 if (scale_up) {
1141 ret = ufshcd_scale_gear(hba, true);
1142 if (ret) {
1143 ufshcd_scale_clks(hba, false);
1144 goto out;
1145 }
1146 }
1147
1148 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1149
1150out:
1151 ufshcd_clock_scaling_unprepare(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001152 ufshcd_release(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001153 return ret;
1154}
1155
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001156static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1157{
1158 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1159 clk_scaling.suspend_work);
1160 unsigned long irq_flags;
1161
1162 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1163 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1164 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1165 return;
1166 }
1167 hba->clk_scaling.is_suspended = true;
1168 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1169
1170 __ufshcd_suspend_clkscaling(hba);
1171}
1172
1173static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1174{
1175 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1176 clk_scaling.resume_work);
1177 unsigned long irq_flags;
1178
1179 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1180 if (!hba->clk_scaling.is_suspended) {
1181 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1182 return;
1183 }
1184 hba->clk_scaling.is_suspended = false;
1185 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1186
1187 devfreq_resume_device(hba->devfreq);
1188}
1189
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001190static int ufshcd_devfreq_target(struct device *dev,
1191 unsigned long *freq, u32 flags)
1192{
1193 int ret = 0;
1194 struct ufs_hba *hba = dev_get_drvdata(dev);
1195 ktime_t start;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001196 bool scale_up, sched_clk_scaling_suspend_work = false;
Bjorn Andersson092b4552018-05-17 23:26:37 -07001197 struct list_head *clk_list = &hba->clk_list_head;
1198 struct ufs_clk_info *clki;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001199 unsigned long irq_flags;
1200
1201 if (!ufshcd_is_clkscaling_supported(hba))
1202 return -EINVAL;
1203
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001204 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1205 if (ufshcd_eh_in_progress(hba)) {
1206 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1207 return 0;
1208 }
1209
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001210 if (!hba->clk_scaling.active_reqs)
1211 sched_clk_scaling_suspend_work = true;
1212
Bjorn Andersson092b4552018-05-17 23:26:37 -07001213 if (list_empty(clk_list)) {
1214 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1215 goto out;
1216 }
1217
1218 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1219 scale_up = (*freq == clki->max_freq) ? true : false;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001220 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1221 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1222 ret = 0;
1223 goto out; /* no state change required */
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001224 }
1225 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1226
1227 start = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001228 ret = ufshcd_devfreq_scale(hba, scale_up);
1229
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001230 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1231 (scale_up ? "up" : "down"),
1232 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1233
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001234out:
1235 if (sched_clk_scaling_suspend_work)
1236 queue_work(hba->clk_scaling.workq,
1237 &hba->clk_scaling.suspend_work);
1238
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001239 return ret;
1240}
1241
Bart Van Assche7252a362019-12-09 10:13:08 -08001242static bool ufshcd_is_busy(struct request *req, void *priv, bool reserved)
1243{
1244 int *busy = priv;
1245
1246 WARN_ON_ONCE(reserved);
1247 (*busy)++;
1248 return false;
1249}
1250
1251/* Whether or not any tag is in use by a request that is in progress. */
1252static bool ufshcd_any_tag_in_use(struct ufs_hba *hba)
1253{
1254 struct request_queue *q = hba->cmd_queue;
1255 int busy = 0;
1256
1257 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_is_busy, &busy);
1258 return busy;
1259}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001260
1261static int ufshcd_devfreq_get_dev_status(struct device *dev,
1262 struct devfreq_dev_status *stat)
1263{
1264 struct ufs_hba *hba = dev_get_drvdata(dev);
1265 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1266 unsigned long flags;
1267
1268 if (!ufshcd_is_clkscaling_supported(hba))
1269 return -EINVAL;
1270
1271 memset(stat, 0, sizeof(*stat));
1272
1273 spin_lock_irqsave(hba->host->host_lock, flags);
1274 if (!scaling->window_start_t)
1275 goto start_window;
1276
1277 if (scaling->is_busy_started)
1278 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1279 scaling->busy_start_t));
1280
1281 stat->total_time = jiffies_to_usecs((long)jiffies -
1282 (long)scaling->window_start_t);
1283 stat->busy_time = scaling->tot_busy_t;
1284start_window:
1285 scaling->window_start_t = jiffies;
1286 scaling->tot_busy_t = 0;
1287
1288 if (hba->outstanding_reqs) {
1289 scaling->busy_start_t = ktime_get();
1290 scaling->is_busy_started = true;
1291 } else {
1292 scaling->busy_start_t = 0;
1293 scaling->is_busy_started = false;
1294 }
1295 spin_unlock_irqrestore(hba->host->host_lock, flags);
1296 return 0;
1297}
1298
1299static struct devfreq_dev_profile ufs_devfreq_profile = {
1300 .polling_ms = 100,
1301 .target = ufshcd_devfreq_target,
1302 .get_dev_status = ufshcd_devfreq_get_dev_status,
1303};
1304
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001305static int ufshcd_devfreq_init(struct ufs_hba *hba)
1306{
Bjorn Andersson092b4552018-05-17 23:26:37 -07001307 struct list_head *clk_list = &hba->clk_list_head;
1308 struct ufs_clk_info *clki;
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001309 struct devfreq *devfreq;
1310 int ret;
1311
Bjorn Andersson092b4552018-05-17 23:26:37 -07001312 /* Skip devfreq if we don't have any clocks in the list */
1313 if (list_empty(clk_list))
1314 return 0;
1315
1316 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1317 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1318 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1319
1320 devfreq = devfreq_add_device(hba->dev,
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001321 &ufs_devfreq_profile,
1322 DEVFREQ_GOV_SIMPLE_ONDEMAND,
1323 NULL);
1324 if (IS_ERR(devfreq)) {
1325 ret = PTR_ERR(devfreq);
1326 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001327
1328 dev_pm_opp_remove(hba->dev, clki->min_freq);
1329 dev_pm_opp_remove(hba->dev, clki->max_freq);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001330 return ret;
1331 }
1332
1333 hba->devfreq = devfreq;
1334
1335 return 0;
1336}
1337
Bjorn Andersson092b4552018-05-17 23:26:37 -07001338static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1339{
1340 struct list_head *clk_list = &hba->clk_list_head;
1341 struct ufs_clk_info *clki;
1342
1343 if (!hba->devfreq)
1344 return;
1345
1346 devfreq_remove_device(hba->devfreq);
1347 hba->devfreq = NULL;
1348
1349 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1350 dev_pm_opp_remove(hba->dev, clki->min_freq);
1351 dev_pm_opp_remove(hba->dev, clki->max_freq);
1352}
1353
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001354static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1355{
1356 unsigned long flags;
1357
1358 devfreq_suspend_device(hba->devfreq);
1359 spin_lock_irqsave(hba->host->host_lock, flags);
1360 hba->clk_scaling.window_start_t = 0;
1361 spin_unlock_irqrestore(hba->host->host_lock, flags);
1362}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001363
Gilad Bronera5082532016-10-17 17:10:00 -07001364static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1365{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001366 unsigned long flags;
1367 bool suspend = false;
1368
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001369 if (!ufshcd_is_clkscaling_supported(hba))
1370 return;
1371
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001372 spin_lock_irqsave(hba->host->host_lock, flags);
1373 if (!hba->clk_scaling.is_suspended) {
1374 suspend = true;
1375 hba->clk_scaling.is_suspended = true;
1376 }
1377 spin_unlock_irqrestore(hba->host->host_lock, flags);
1378
1379 if (suspend)
1380 __ufshcd_suspend_clkscaling(hba);
Gilad Bronera5082532016-10-17 17:10:00 -07001381}
1382
1383static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1384{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001385 unsigned long flags;
1386 bool resume = false;
1387
1388 if (!ufshcd_is_clkscaling_supported(hba))
1389 return;
1390
1391 spin_lock_irqsave(hba->host->host_lock, flags);
1392 if (hba->clk_scaling.is_suspended) {
1393 resume = true;
1394 hba->clk_scaling.is_suspended = false;
1395 }
1396 spin_unlock_irqrestore(hba->host->host_lock, flags);
1397
1398 if (resume)
1399 devfreq_resume_device(hba->devfreq);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001400}
1401
1402static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1403 struct device_attribute *attr, char *buf)
1404{
1405 struct ufs_hba *hba = dev_get_drvdata(dev);
1406
1407 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1408}
1409
1410static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1411 struct device_attribute *attr, const char *buf, size_t count)
1412{
1413 struct ufs_hba *hba = dev_get_drvdata(dev);
1414 u32 value;
1415 int err;
1416
1417 if (kstrtou32(buf, 0, &value))
1418 return -EINVAL;
1419
1420 value = !!value;
1421 if (value == hba->clk_scaling.is_allowed)
1422 goto out;
1423
1424 pm_runtime_get_sync(hba->dev);
1425 ufshcd_hold(hba, false);
1426
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001427 cancel_work_sync(&hba->clk_scaling.suspend_work);
1428 cancel_work_sync(&hba->clk_scaling.resume_work);
1429
1430 hba->clk_scaling.is_allowed = value;
1431
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001432 if (value) {
1433 ufshcd_resume_clkscaling(hba);
1434 } else {
1435 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001436 err = ufshcd_devfreq_scale(hba, true);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001437 if (err)
1438 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1439 __func__, err);
1440 }
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001441
1442 ufshcd_release(hba);
1443 pm_runtime_put_sync(hba->dev);
1444out:
1445 return count;
Gilad Bronera5082532016-10-17 17:10:00 -07001446}
1447
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001448static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1449{
1450 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1451 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1452 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1453 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1454 hba->clk_scaling.enable_attr.attr.mode = 0644;
1455 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1456 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1457}
1458
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001459static void ufshcd_ungate_work(struct work_struct *work)
1460{
1461 int ret;
1462 unsigned long flags;
1463 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1464 clk_gating.ungate_work);
1465
1466 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1467
1468 spin_lock_irqsave(hba->host->host_lock, flags);
1469 if (hba->clk_gating.state == CLKS_ON) {
1470 spin_unlock_irqrestore(hba->host->host_lock, flags);
1471 goto unblock_reqs;
1472 }
1473
1474 spin_unlock_irqrestore(hba->host->host_lock, flags);
1475 ufshcd_setup_clocks(hba, true);
1476
1477 /* Exit from hibern8 */
1478 if (ufshcd_can_hibern8_during_gating(hba)) {
1479 /* Prevent gating in this path */
1480 hba->clk_gating.is_suspended = true;
1481 if (ufshcd_is_link_hibern8(hba)) {
1482 ret = ufshcd_uic_hibern8_exit(hba);
1483 if (ret)
1484 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1485 __func__, ret);
1486 else
1487 ufshcd_set_link_active(hba);
1488 }
1489 hba->clk_gating.is_suspended = false;
1490 }
1491unblock_reqs:
Subhash Jadavani38135532018-05-03 16:37:18 +05301492 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001493}
1494
1495/**
1496 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1497 * Also, exit from hibern8 mode and set the link as active.
1498 * @hba: per adapter instance
1499 * @async: This indicates whether caller should ungate clocks asynchronously.
1500 */
1501int ufshcd_hold(struct ufs_hba *hba, bool async)
1502{
1503 int rc = 0;
1504 unsigned long flags;
1505
1506 if (!ufshcd_is_clkgating_allowed(hba))
1507 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001508 spin_lock_irqsave(hba->host->host_lock, flags);
1509 hba->clk_gating.active_reqs++;
1510
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001511 if (ufshcd_eh_in_progress(hba)) {
1512 spin_unlock_irqrestore(hba->host->host_lock, flags);
1513 return 0;
1514 }
1515
Sahitya Tummala856b3482014-09-25 15:32:34 +03001516start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001517 switch (hba->clk_gating.state) {
1518 case CLKS_ON:
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001519 /*
1520 * Wait for the ungate work to complete if in progress.
1521 * Though the clocks may be in ON state, the link could
1522 * still be in hibner8 state if hibern8 is allowed
1523 * during clock gating.
1524 * Make sure we exit hibern8 state also in addition to
1525 * clocks being ON.
1526 */
1527 if (ufshcd_can_hibern8_during_gating(hba) &&
1528 ufshcd_is_link_hibern8(hba)) {
1529 spin_unlock_irqrestore(hba->host->host_lock, flags);
1530 flush_work(&hba->clk_gating.ungate_work);
1531 spin_lock_irqsave(hba->host->host_lock, flags);
1532 goto start;
1533 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001534 break;
1535 case REQ_CLKS_OFF:
1536 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1537 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001538 trace_ufshcd_clk_gating(dev_name(hba->dev),
1539 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001540 break;
1541 }
1542 /*
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +03001543 * If we are here, it means gating work is either done or
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001544 * currently running. Hence, fall through to cancel gating
1545 * work and to enable clocks.
1546 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001547 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001548 case CLKS_OFF:
Subhash Jadavani38135532018-05-03 16:37:18 +05301549 ufshcd_scsi_block_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001550 hba->clk_gating.state = REQ_CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001551 trace_ufshcd_clk_gating(dev_name(hba->dev),
1552 hba->clk_gating.state);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301553 queue_work(hba->clk_gating.clk_gating_workq,
1554 &hba->clk_gating.ungate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001555 /*
1556 * fall through to check if we should wait for this
1557 * work to be done or not.
1558 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001559 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001560 case REQ_CLKS_ON:
1561 if (async) {
1562 rc = -EAGAIN;
1563 hba->clk_gating.active_reqs--;
1564 break;
1565 }
1566
1567 spin_unlock_irqrestore(hba->host->host_lock, flags);
1568 flush_work(&hba->clk_gating.ungate_work);
1569 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001570 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001571 goto start;
1572 default:
1573 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1574 __func__, hba->clk_gating.state);
1575 break;
1576 }
1577 spin_unlock_irqrestore(hba->host->host_lock, flags);
1578out:
1579 return rc;
1580}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001581EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001582
1583static void ufshcd_gate_work(struct work_struct *work)
1584{
1585 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1586 clk_gating.gate_work.work);
1587 unsigned long flags;
1588
1589 spin_lock_irqsave(hba->host->host_lock, flags);
Venkat Gopalakrishnan3f0c06d2016-10-17 17:11:07 -07001590 /*
1591 * In case you are here to cancel this work the gating state
1592 * would be marked as REQ_CLKS_ON. In this case save time by
1593 * skipping the gating work and exit after changing the clock
1594 * state to CLKS_ON.
1595 */
1596 if (hba->clk_gating.is_suspended ||
Asutosh Das18f013742019-11-14 22:09:29 -08001597 (hba->clk_gating.state != REQ_CLKS_OFF)) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001598 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001599 trace_ufshcd_clk_gating(dev_name(hba->dev),
1600 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001601 goto rel_lock;
1602 }
1603
1604 if (hba->clk_gating.active_reqs
1605 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
Bart Van Assche7252a362019-12-09 10:13:08 -08001606 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001607 || hba->active_uic_cmd || hba->uic_async_done)
1608 goto rel_lock;
1609
1610 spin_unlock_irqrestore(hba->host->host_lock, flags);
1611
1612 /* put the link into hibern8 mode before turning off clocks */
1613 if (ufshcd_can_hibern8_during_gating(hba)) {
1614 if (ufshcd_uic_hibern8_enter(hba)) {
1615 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001616 trace_ufshcd_clk_gating(dev_name(hba->dev),
1617 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001618 goto out;
1619 }
1620 ufshcd_set_link_hibern8(hba);
1621 }
1622
1623 if (!ufshcd_is_link_active(hba))
1624 ufshcd_setup_clocks(hba, false);
1625 else
1626 /* If link is active, device ref_clk can't be switched off */
1627 __ufshcd_setup_clocks(hba, false, true);
1628
1629 /*
1630 * In case you are here to cancel this work the gating state
1631 * would be marked as REQ_CLKS_ON. In this case keep the state
1632 * as REQ_CLKS_ON which would anyway imply that clocks are off
1633 * and a request to turn them on is pending. By doing this way,
1634 * we keep the state machine in tact and this would ultimately
1635 * prevent from doing cancel work multiple times when there are
1636 * new requests arriving before the current cancel work is done.
1637 */
1638 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001639 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001640 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001641 trace_ufshcd_clk_gating(dev_name(hba->dev),
1642 hba->clk_gating.state);
1643 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001644rel_lock:
1645 spin_unlock_irqrestore(hba->host->host_lock, flags);
1646out:
1647 return;
1648}
1649
1650/* host lock must be held before calling this variant */
1651static void __ufshcd_release(struct ufs_hba *hba)
1652{
1653 if (!ufshcd_is_clkgating_allowed(hba))
1654 return;
1655
1656 hba->clk_gating.active_reqs--;
1657
1658 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1659 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
Bart Van Assche7252a362019-12-09 10:13:08 -08001660 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001661 || hba->active_uic_cmd || hba->uic_async_done
1662 || ufshcd_eh_in_progress(hba))
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001663 return;
1664
1665 hba->clk_gating.state = REQ_CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001666 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Evan Greenf4bb7702018-10-05 10:27:32 -07001667 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1668 &hba->clk_gating.gate_work,
1669 msecs_to_jiffies(hba->clk_gating.delay_ms));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001670}
1671
1672void ufshcd_release(struct ufs_hba *hba)
1673{
1674 unsigned long flags;
1675
1676 spin_lock_irqsave(hba->host->host_lock, flags);
1677 __ufshcd_release(hba);
1678 spin_unlock_irqrestore(hba->host->host_lock, flags);
1679}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001680EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001681
1682static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1683 struct device_attribute *attr, char *buf)
1684{
1685 struct ufs_hba *hba = dev_get_drvdata(dev);
1686
1687 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1688}
1689
1690static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1691 struct device_attribute *attr, const char *buf, size_t count)
1692{
1693 struct ufs_hba *hba = dev_get_drvdata(dev);
1694 unsigned long flags, value;
1695
1696 if (kstrtoul(buf, 0, &value))
1697 return -EINVAL;
1698
1699 spin_lock_irqsave(hba->host->host_lock, flags);
1700 hba->clk_gating.delay_ms = value;
1701 spin_unlock_irqrestore(hba->host->host_lock, flags);
1702 return count;
1703}
1704
Sahitya Tummalab4274112016-12-22 18:40:39 -08001705static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1706 struct device_attribute *attr, char *buf)
1707{
1708 struct ufs_hba *hba = dev_get_drvdata(dev);
1709
1710 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1711}
1712
1713static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1714 struct device_attribute *attr, const char *buf, size_t count)
1715{
1716 struct ufs_hba *hba = dev_get_drvdata(dev);
1717 unsigned long flags;
1718 u32 value;
1719
1720 if (kstrtou32(buf, 0, &value))
1721 return -EINVAL;
1722
1723 value = !!value;
1724 if (value == hba->clk_gating.is_enabled)
1725 goto out;
1726
1727 if (value) {
1728 ufshcd_release(hba);
1729 } else {
1730 spin_lock_irqsave(hba->host->host_lock, flags);
1731 hba->clk_gating.active_reqs++;
1732 spin_unlock_irqrestore(hba->host->host_lock, flags);
1733 }
1734
1735 hba->clk_gating.is_enabled = value;
1736out:
1737 return count;
1738}
1739
Vivek Gautameebcc192018-08-07 23:17:39 +05301740static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1741{
1742 char wq_name[sizeof("ufs_clkscaling_00")];
1743
1744 if (!ufshcd_is_clkscaling_supported(hba))
1745 return;
1746
1747 INIT_WORK(&hba->clk_scaling.suspend_work,
1748 ufshcd_clk_scaling_suspend_work);
1749 INIT_WORK(&hba->clk_scaling.resume_work,
1750 ufshcd_clk_scaling_resume_work);
1751
1752 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1753 hba->host->host_no);
1754 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1755
1756 ufshcd_clkscaling_init_sysfs(hba);
1757}
1758
1759static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1760{
1761 if (!ufshcd_is_clkscaling_supported(hba))
1762 return;
1763
1764 destroy_workqueue(hba->clk_scaling.workq);
1765 ufshcd_devfreq_remove(hba);
1766}
1767
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001768static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1769{
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301770 char wq_name[sizeof("ufs_clk_gating_00")];
1771
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001772 if (!ufshcd_is_clkgating_allowed(hba))
1773 return;
1774
1775 hba->clk_gating.delay_ms = 150;
1776 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1777 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1778
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301779 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1780 hba->host->host_no);
1781 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1782 WQ_MEM_RECLAIM);
1783
Sahitya Tummalab4274112016-12-22 18:40:39 -08001784 hba->clk_gating.is_enabled = true;
1785
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001786 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1787 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1788 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1789 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
Sahitya Tummalab4274112016-12-22 18:40:39 -08001790 hba->clk_gating.delay_attr.attr.mode = 0644;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001791 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1792 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Sahitya Tummalab4274112016-12-22 18:40:39 -08001793
1794 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1795 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1796 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1797 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1798 hba->clk_gating.enable_attr.attr.mode = 0644;
1799 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1800 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001801}
1802
1803static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1804{
1805 if (!ufshcd_is_clkgating_allowed(hba))
1806 return;
1807 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001808 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001809 cancel_work_sync(&hba->clk_gating.ungate_work);
1810 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301811 destroy_workqueue(hba->clk_gating.clk_gating_workq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001812}
1813
Sahitya Tummala856b3482014-09-25 15:32:34 +03001814/* Must be called with host lock acquired */
1815static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1816{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001817 bool queue_resume_work = false;
1818
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001819 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001820 return;
1821
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001822 if (!hba->clk_scaling.active_reqs++)
1823 queue_resume_work = true;
1824
1825 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1826 return;
1827
1828 if (queue_resume_work)
1829 queue_work(hba->clk_scaling.workq,
1830 &hba->clk_scaling.resume_work);
1831
1832 if (!hba->clk_scaling.window_start_t) {
1833 hba->clk_scaling.window_start_t = jiffies;
1834 hba->clk_scaling.tot_busy_t = 0;
1835 hba->clk_scaling.is_busy_started = false;
1836 }
1837
Sahitya Tummala856b3482014-09-25 15:32:34 +03001838 if (!hba->clk_scaling.is_busy_started) {
1839 hba->clk_scaling.busy_start_t = ktime_get();
1840 hba->clk_scaling.is_busy_started = true;
1841 }
1842}
1843
1844static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1845{
1846 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1847
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001848 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001849 return;
1850
1851 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1852 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1853 scaling->busy_start_t));
Thomas Gleixner8b0e1952016-12-25 12:30:41 +01001854 scaling->busy_start_t = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03001855 scaling->is_busy_started = false;
1856 }
1857}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301858/**
1859 * ufshcd_send_command - Send SCSI or device management commands
1860 * @hba: per adapter instance
1861 * @task_tag: Task tag of the command
1862 */
1863static inline
1864void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1865{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08001866 hba->lrb[task_tag].issue_time_stamp = ktime_get();
Zang Leigang09017182017-09-27 10:06:06 +08001867 hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
Sahitya Tummala856b3482014-09-25 15:32:34 +03001868 ufshcd_clk_scaling_start_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301869 __set_bit(task_tag, &hba->outstanding_reqs);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301870 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07001871 /* Make sure that doorbell is committed immediately */
1872 wmb();
Lee Susman1a07f2d2016-12-22 18:42:03 -08001873 ufshcd_add_command_trace(hba, task_tag, "send");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301874}
1875
1876/**
1877 * ufshcd_copy_sense_data - Copy sense data in case of check condition
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001878 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301879 */
1880static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1881{
1882 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05301883 if (lrbp->sense_buffer &&
1884 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001885 int len_to_copy;
1886
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301887 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Avri Altman09a5a242018-11-22 20:04:56 +02001888 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001889
Avri Altman09a5a242018-11-22 20:04:56 +02001890 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
1891 len_to_copy);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301892 }
1893}
1894
1895/**
Dolev Raviv68078d52013-07-30 00:35:58 +05301896 * ufshcd_copy_query_response() - Copy the Query Response and the data
1897 * descriptor
1898 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001899 * @lrbp: pointer to local reference block
Dolev Raviv68078d52013-07-30 00:35:58 +05301900 */
1901static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001902int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05301903{
1904 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1905
Dolev Raviv68078d52013-07-30 00:35:58 +05301906 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05301907
Dolev Raviv68078d52013-07-30 00:35:58 +05301908 /* Get the descriptor */
Avri Altman1c908362019-05-21 11:24:22 +03001909 if (hba->dev_cmd.query.descriptor &&
1910 lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03001911 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05301912 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001913 u16 resp_len;
1914 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05301915
1916 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001917 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05301918 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03001919 buf_len = be16_to_cpu(
1920 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001921 if (likely(buf_len >= resp_len)) {
1922 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1923 } else {
1924 dev_warn(hba->dev,
Bean Huo3d4881d2019-11-12 23:34:35 +01001925 "%s: rsp size %d is bigger than buffer size %d",
1926 __func__, resp_len, buf_len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001927 return -EINVAL;
1928 }
Dolev Raviv68078d52013-07-30 00:35:58 +05301929 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001930
1931 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05301932}
1933
1934/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301935 * ufshcd_hba_capabilities - Read controller capabilities
1936 * @hba: per adapter instance
1937 */
1938static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1939{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301940 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301941
1942 /* nutrs and nutmrs are 0 based values */
1943 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1944 hba->nutmrs =
1945 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1946}
1947
1948/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301949 * ufshcd_ready_for_uic_cmd - Check if controller is ready
1950 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301951 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301952 * Return true on success, else false
1953 */
1954static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1955{
1956 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1957 return true;
1958 else
1959 return false;
1960}
1961
1962/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05301963 * ufshcd_get_upmcrs - Get the power mode change request status
1964 * @hba: Pointer to adapter instance
1965 *
1966 * This function gets the UPMCRS field of HCS register
1967 * Returns value of UPMCRS field
1968 */
1969static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1970{
1971 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1972}
1973
1974/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301975 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1976 * @hba: per adapter instance
1977 * @uic_cmd: UIC command
1978 *
1979 * Mutex must be held.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301980 */
1981static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301982ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301983{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301984 WARN_ON(hba->active_uic_cmd);
1985
1986 hba->active_uic_cmd = uic_cmd;
1987
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301988 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301989 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
1990 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
1991 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301992
1993 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301994 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301995 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301996}
1997
1998/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05301999 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2000 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002001 * @uic_cmd: UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302002 *
2003 * Must be called with mutex held.
2004 * Returns 0 only if success.
2005 */
2006static int
2007ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2008{
2009 int ret;
2010 unsigned long flags;
2011
2012 if (wait_for_completion_timeout(&uic_cmd->done,
2013 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2014 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2015 else
2016 ret = -ETIMEDOUT;
2017
2018 spin_lock_irqsave(hba->host->host_lock, flags);
2019 hba->active_uic_cmd = NULL;
2020 spin_unlock_irqrestore(hba->host->host_lock, flags);
2021
2022 return ret;
2023}
2024
2025/**
2026 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2027 * @hba: per adapter instance
2028 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002029 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302030 *
2031 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002032 * with mutex held and host_lock locked.
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302033 * Returns 0 only if success.
2034 */
2035static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002036__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2037 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302038{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302039 if (!ufshcd_ready_for_uic_cmd(hba)) {
2040 dev_err(hba->dev,
2041 "Controller not ready to accept UIC commands\n");
2042 return -EIO;
2043 }
2044
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002045 if (completion)
2046 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302047
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302048 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302049
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002050 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302051}
2052
2053/**
2054 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2055 * @hba: per adapter instance
2056 * @uic_cmd: UIC command
2057 *
2058 * Returns 0 only if success.
2059 */
Avri Altmane77044c52018-10-07 17:30:39 +03002060int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302061{
2062 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002063 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302064
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002065 ufshcd_hold(hba, false);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302066 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03002067 ufshcd_add_delay_before_dme_cmd(hba);
2068
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002069 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002070 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002071 spin_unlock_irqrestore(hba->host->host_lock, flags);
2072 if (!ret)
2073 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2074
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302075 mutex_unlock(&hba->uic_cmd_mutex);
2076
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002077 ufshcd_release(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302078 return ret;
2079}
2080
2081/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302082 * ufshcd_map_sg - Map scatter-gather list to prdt
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002083 * @hba: per adapter instance
2084 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302085 *
2086 * Returns 0 in case of success, non-zero value in case of failure
2087 */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002088static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302089{
2090 struct ufshcd_sg_entry *prd_table;
2091 struct scatterlist *sg;
2092 struct scsi_cmnd *cmd;
2093 int sg_segments;
2094 int i;
2095
2096 cmd = lrbp->cmd;
2097 sg_segments = scsi_dma_map(cmd);
2098 if (sg_segments < 0)
2099 return sg_segments;
2100
2101 if (sg_segments) {
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002102 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2103 lrbp->utr_descriptor_ptr->prd_table_length =
2104 cpu_to_le16((u16)(sg_segments *
2105 sizeof(struct ufshcd_sg_entry)));
2106 else
2107 lrbp->utr_descriptor_ptr->prd_table_length =
2108 cpu_to_le16((u16) (sg_segments));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302109
2110 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2111
2112 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2113 prd_table[i].size =
2114 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2115 prd_table[i].base_addr =
2116 cpu_to_le32(lower_32_bits(sg->dma_address));
2117 prd_table[i].upper_addr =
2118 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002119 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302120 }
2121 } else {
2122 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2123 }
2124
2125 return 0;
2126}
2127
2128/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302129 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302130 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302131 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302132 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302133static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302134{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302135 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2136
2137 if (hba->ufs_version == UFSHCI_VERSION_10) {
2138 u32 rw;
2139 rw = set & INTERRUPT_MASK_RW_VER_10;
2140 set = rw | ((set ^ intrs) & intrs);
2141 } else {
2142 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302143 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302144
2145 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2146}
2147
2148/**
2149 * ufshcd_disable_intr - disable interrupts
2150 * @hba: per adapter instance
2151 * @intrs: interrupt bits
2152 */
2153static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2154{
2155 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2156
2157 if (hba->ufs_version == UFSHCI_VERSION_10) {
2158 u32 rw;
2159 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2160 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2161 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2162
2163 } else {
2164 set &= ~intrs;
2165 }
2166
2167 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302168}
2169
2170/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302171 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2172 * descriptor according to request
2173 * @lrbp: pointer to local reference block
2174 * @upiu_flags: flags required in the header
2175 * @cmd_dir: requests data direction
2176 */
2177static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
Joao Pinto300bb132016-05-11 12:21:27 +01002178 u32 *upiu_flags, enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302179{
2180 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2181 u32 data_direction;
2182 u32 dword_0;
2183
2184 if (cmd_dir == DMA_FROM_DEVICE) {
2185 data_direction = UTP_DEVICE_TO_HOST;
2186 *upiu_flags = UPIU_CMD_FLAGS_READ;
2187 } else if (cmd_dir == DMA_TO_DEVICE) {
2188 data_direction = UTP_HOST_TO_DEVICE;
2189 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2190 } else {
2191 data_direction = UTP_NO_DATA_TRANSFER;
2192 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2193 }
2194
2195 dword_0 = data_direction | (lrbp->command_type
2196 << UPIU_COMMAND_TYPE_OFFSET);
2197 if (lrbp->intr_cmd)
2198 dword_0 |= UTP_REQ_DESC_INT_CMD;
2199
2200 /* Transfer request descriptor header fields */
2201 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002202 /* dword_1 is reserved, hence it is set to 0 */
2203 req_desc->header.dword_1 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302204 /*
2205 * assigning invalid value for command status. Controller
2206 * updates OCS on command completion, with the command
2207 * status
2208 */
2209 req_desc->header.dword_2 =
2210 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002211 /* dword_3 is reserved, hence it is set to 0 */
2212 req_desc->header.dword_3 = 0;
Yaniv Gardi51047262016-02-01 15:02:38 +02002213
2214 req_desc->prd_table_length = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302215}
2216
2217/**
2218 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2219 * for scsi commands
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002220 * @lrbp: local reference block pointer
2221 * @upiu_flags: flags
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302222 */
2223static
2224void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2225{
2226 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002227 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302228
2229 /* command descriptor fields */
2230 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2231 UPIU_TRANSACTION_COMMAND, upiu_flags,
2232 lrbp->lun, lrbp->task_tag);
2233 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2234 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2235
2236 /* Total EHS length and Data segment length will be zero */
2237 ucd_req_ptr->header.dword_2 = 0;
2238
2239 ucd_req_ptr->sc.exp_data_transfer_len =
2240 cpu_to_be32(lrbp->cmd->sdb.length);
2241
Avri Altmana851b2b2018-10-07 17:30:34 +03002242 cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, UFS_CDB_SIZE);
2243 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002244 memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
2245
2246 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302247}
2248
Dolev Raviv68078d52013-07-30 00:35:58 +05302249/**
2250 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2251 * for query requsts
2252 * @hba: UFS hba
2253 * @lrbp: local reference block pointer
2254 * @upiu_flags: flags
2255 */
2256static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2257 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2258{
2259 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2260 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302261 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302262
2263 /* Query request header */
2264 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2265 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2266 lrbp->lun, lrbp->task_tag);
2267 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2268 0, query->request.query_func, 0, 0);
2269
Zang Leigang68612852016-08-25 17:39:19 +08002270 /* Data segment length only need for WRITE_DESC */
2271 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2272 ucd_req_ptr->header.dword_2 =
2273 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2274 else
2275 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302276
2277 /* Copy the Query Request buffer as is */
2278 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2279 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302280
2281 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002282 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
Avri Altman220d17a62018-10-07 17:30:36 +03002283 memcpy(ucd_req_ptr + 1, query->descriptor, len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002284
Yaniv Gardi51047262016-02-01 15:02:38 +02002285 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302286}
2287
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302288static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2289{
2290 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2291
2292 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2293
2294 /* command descriptor fields */
2295 ucd_req_ptr->header.dword_0 =
2296 UPIU_HEADER_DWORD(
2297 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002298 /* clear rest of the fields of basic header */
2299 ucd_req_ptr->header.dword_1 = 0;
2300 ucd_req_ptr->header.dword_2 = 0;
2301
2302 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302303}
2304
2305/**
Joao Pinto300bb132016-05-11 12:21:27 +01002306 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2307 * for Device Management Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002308 * @hba: per adapter instance
2309 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302310 */
Joao Pinto300bb132016-05-11 12:21:27 +01002311static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302312{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302313 u32 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302314 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302315
kehuanlin83dc7e32017-09-06 17:58:39 +08002316 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2317 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002318 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
kehuanlin83dc7e32017-09-06 17:58:39 +08002319 else
2320 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002321
2322 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2323 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2324 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2325 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2326 ufshcd_prepare_utp_nop_upiu(lrbp);
2327 else
2328 ret = -EINVAL;
2329
2330 return ret;
2331}
2332
2333/**
2334 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2335 * for SCSI Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002336 * @hba: per adapter instance
2337 * @lrbp: pointer to local reference block
Joao Pinto300bb132016-05-11 12:21:27 +01002338 */
2339static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2340{
2341 u32 upiu_flags;
2342 int ret = 0;
2343
kehuanlin83dc7e32017-09-06 17:58:39 +08002344 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2345 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002346 lrbp->command_type = UTP_CMD_TYPE_SCSI;
kehuanlin83dc7e32017-09-06 17:58:39 +08002347 else
2348 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002349
2350 if (likely(lrbp->cmd)) {
2351 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2352 lrbp->cmd->sc_data_direction);
2353 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2354 } else {
2355 ret = -EINVAL;
2356 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302357
2358 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302359}
2360
2361/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002362 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002363 * @upiu_wlun_id: UPIU W-LUN id
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002364 *
2365 * Returns SCSI W-LUN id
2366 */
2367static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2368{
2369 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2370}
2371
2372/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302373 * ufshcd_queuecommand - main entry point for SCSI requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002374 * @host: SCSI host pointer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302375 * @cmd: command from SCSI Midlayer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302376 *
2377 * Returns 0 for success, non-zero in case of failure
2378 */
2379static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2380{
2381 struct ufshcd_lrb *lrbp;
2382 struct ufs_hba *hba;
2383 unsigned long flags;
2384 int tag;
2385 int err = 0;
2386
2387 hba = shost_priv(host);
2388
2389 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02002390 if (!ufshcd_valid_tag(hba, tag)) {
2391 dev_err(hba->dev,
2392 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2393 __func__, tag, cmd, cmd->request);
2394 BUG();
2395 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302396
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002397 if (!down_read_trylock(&hba->clk_scaling_lock))
2398 return SCSI_MLQUEUE_HOST_BUSY;
2399
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302400 spin_lock_irqsave(hba->host->host_lock, flags);
2401 switch (hba->ufshcd_state) {
2402 case UFSHCD_STATE_OPERATIONAL:
2403 break;
Zang Leigang141f8162016-11-16 11:29:37 +08002404 case UFSHCD_STATE_EH_SCHEDULED:
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302405 case UFSHCD_STATE_RESET:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302406 err = SCSI_MLQUEUE_HOST_BUSY;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302407 goto out_unlock;
2408 case UFSHCD_STATE_ERROR:
2409 set_host_byte(cmd, DID_ERROR);
2410 cmd->scsi_done(cmd);
2411 goto out_unlock;
2412 default:
2413 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2414 __func__, hba->ufshcd_state);
2415 set_host_byte(cmd, DID_BAD_TARGET);
2416 cmd->scsi_done(cmd);
2417 goto out_unlock;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302418 }
Yaniv Gardi53c12d02016-02-01 15:02:45 +02002419
2420 /* if error handling is in progress, don't issue commands */
2421 if (ufshcd_eh_in_progress(hba)) {
2422 set_host_byte(cmd, DID_ERROR);
2423 cmd->scsi_done(cmd);
2424 goto out_unlock;
2425 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302426 spin_unlock_irqrestore(hba->host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302427
Gilad Broner7fabb772017-02-03 16:56:50 -08002428 hba->req_abort_count = 0;
2429
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002430 err = ufshcd_hold(hba, true);
2431 if (err) {
2432 err = SCSI_MLQUEUE_HOST_BUSY;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002433 goto out;
2434 }
2435 WARN_ON(hba->clk_gating.state != CLKS_ON);
2436
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302437 lrbp = &hba->lrb[tag];
2438
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302439 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302440 lrbp->cmd = cmd;
Avri Altman09a5a242018-11-22 20:04:56 +02002441 lrbp->sense_bufflen = UFS_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302442 lrbp->sense_buffer = cmd->sense_buffer;
2443 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002444 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002445 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Gilad Bronere0b299e2017-02-03 16:56:40 -08002446 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302447
Joao Pinto300bb132016-05-11 12:21:27 +01002448 ufshcd_comp_scsi_upiu(hba, lrbp);
2449
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002450 err = ufshcd_map_sg(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302451 if (err) {
2452 lrbp->cmd = NULL;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302453 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302454 }
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002455 /* Make sure descriptors are ready before ringing the doorbell */
2456 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302457
2458 /* issue command to the controller */
2459 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002460 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302461 ufshcd_send_command(hba, tag);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302462out_unlock:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302463 spin_unlock_irqrestore(hba->host->host_lock, flags);
2464out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002465 up_read(&hba->clk_scaling_lock);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302466 return err;
2467}
2468
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302469static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2470 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2471{
2472 lrbp->cmd = NULL;
2473 lrbp->sense_bufflen = 0;
2474 lrbp->sense_buffer = NULL;
2475 lrbp->task_tag = tag;
2476 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302477 lrbp->intr_cmd = true; /* No interrupt aggregation */
2478 hba->dev_cmd.type = cmd_type;
2479
Joao Pinto300bb132016-05-11 12:21:27 +01002480 return ufshcd_comp_devman_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302481}
2482
2483static int
2484ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2485{
2486 int err = 0;
2487 unsigned long flags;
2488 u32 mask = 1 << tag;
2489
2490 /* clear outstanding transaction before retry */
2491 spin_lock_irqsave(hba->host->host_lock, flags);
2492 ufshcd_utrl_clear(hba, tag);
2493 spin_unlock_irqrestore(hba->host->host_lock, flags);
2494
2495 /*
2496 * wait for for h/w to clear corresponding bit in door-bell.
2497 * max. wait is 1 sec.
2498 */
2499 err = ufshcd_wait_for_register(hba,
2500 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02002501 mask, ~mask, 1000, 1000, true);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302502
2503 return err;
2504}
2505
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002506static int
2507ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2508{
2509 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2510
2511 /* Get the UPIU response */
2512 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2513 UPIU_RSP_CODE_OFFSET;
2514 return query_res->response;
2515}
2516
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302517/**
2518 * ufshcd_dev_cmd_completion() - handles device management command responses
2519 * @hba: per adapter instance
2520 * @lrbp: pointer to local reference block
2521 */
2522static int
2523ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2524{
2525 int resp;
2526 int err = 0;
2527
Dolev Ravivff8e20c2016-12-22 18:42:18 -08002528 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302529 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2530
2531 switch (resp) {
2532 case UPIU_TRANSACTION_NOP_IN:
2533 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2534 err = -EINVAL;
2535 dev_err(hba->dev, "%s: unexpected response %x\n",
2536 __func__, resp);
2537 }
2538 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302539 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002540 err = ufshcd_check_query_response(hba, lrbp);
2541 if (!err)
2542 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302543 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302544 case UPIU_TRANSACTION_REJECT_UPIU:
2545 /* TODO: handle Reject UPIU Response */
2546 err = -EPERM;
2547 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2548 __func__);
2549 break;
2550 default:
2551 err = -EINVAL;
2552 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2553 __func__, resp);
2554 break;
2555 }
2556
2557 return err;
2558}
2559
2560static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2561 struct ufshcd_lrb *lrbp, int max_timeout)
2562{
2563 int err = 0;
2564 unsigned long time_left;
2565 unsigned long flags;
2566
2567 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2568 msecs_to_jiffies(max_timeout));
2569
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002570 /* Make sure descriptors are ready before ringing the doorbell */
2571 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302572 spin_lock_irqsave(hba->host->host_lock, flags);
2573 hba->dev_cmd.complete = NULL;
2574 if (likely(time_left)) {
2575 err = ufshcd_get_tr_ocs(lrbp);
2576 if (!err)
2577 err = ufshcd_dev_cmd_completion(hba, lrbp);
2578 }
2579 spin_unlock_irqrestore(hba->host->host_lock, flags);
2580
2581 if (!time_left) {
2582 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002583 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2584 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302585 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002586 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302587 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002588 /*
2589 * in case of an error, after clearing the doorbell,
2590 * we also need to clear the outstanding_request
2591 * field in hba
2592 */
2593 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302594 }
2595
2596 return err;
2597}
2598
2599/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302600 * ufshcd_exec_dev_cmd - API for sending device management requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002601 * @hba: UFS hba
2602 * @cmd_type: specifies the type (NOP, Query...)
2603 * @timeout: time in seconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302604 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302605 * NOTE: Since there is only one available tag for device management commands,
2606 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302607 */
2608static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2609 enum dev_cmd_type cmd_type, int timeout)
2610{
Bart Van Assche7252a362019-12-09 10:13:08 -08002611 struct request_queue *q = hba->cmd_queue;
2612 struct request *req;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302613 struct ufshcd_lrb *lrbp;
2614 int err;
2615 int tag;
2616 struct completion wait;
2617 unsigned long flags;
2618
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002619 down_read(&hba->clk_scaling_lock);
2620
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302621 /*
2622 * Get free slot, sleep if slots are unavailable.
2623 * Even though we use wait_event() which sleeps indefinitely,
2624 * the maximum wait time is bounded by SCSI request timeout.
2625 */
Bart Van Assche7252a362019-12-09 10:13:08 -08002626 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
2627 if (IS_ERR(req))
2628 return PTR_ERR(req);
2629 tag = req->tag;
2630 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302631
2632 init_completion(&wait);
2633 lrbp = &hba->lrb[tag];
2634 WARN_ON(lrbp->cmd);
2635 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2636 if (unlikely(err))
2637 goto out_put_tag;
2638
2639 hba->dev_cmd.complete = &wait;
2640
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002641 ufshcd_add_query_upiu_trace(hba, tag, "query_send");
Yaniv Gardie3dfdc52016-02-01 15:02:49 +02002642 /* Make sure descriptors are ready before ringing the doorbell */
2643 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302644 spin_lock_irqsave(hba->host->host_lock, flags);
Kiwoong Kim0e675ef2016-11-10 21:14:36 +09002645 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302646 ufshcd_send_command(hba, tag);
2647 spin_unlock_irqrestore(hba->host->host_lock, flags);
2648
2649 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2650
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002651 ufshcd_add_query_upiu_trace(hba, tag,
2652 err ? "query_complete_err" : "query_complete");
2653
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302654out_put_tag:
Bart Van Assche7252a362019-12-09 10:13:08 -08002655 blk_put_request(req);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002656 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302657 return err;
2658}
2659
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302660/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002661 * ufshcd_init_query() - init the query response and request parameters
2662 * @hba: per-adapter instance
2663 * @request: address of the request pointer to be initialized
2664 * @response: address of the response pointer to be initialized
2665 * @opcode: operation to perform
2666 * @idn: flag idn to access
2667 * @index: LU number to access
2668 * @selector: query/flag/descriptor further identification
2669 */
2670static inline void ufshcd_init_query(struct ufs_hba *hba,
2671 struct ufs_query_req **request, struct ufs_query_res **response,
2672 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2673{
2674 *request = &hba->dev_cmd.query.request;
2675 *response = &hba->dev_cmd.query.response;
2676 memset(*request, 0, sizeof(struct ufs_query_req));
2677 memset(*response, 0, sizeof(struct ufs_query_res));
2678 (*request)->upiu_req.opcode = opcode;
2679 (*request)->upiu_req.idn = idn;
2680 (*request)->upiu_req.index = index;
2681 (*request)->upiu_req.selector = selector;
2682}
2683
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002684static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2685 enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2686{
2687 int ret;
2688 int retries;
2689
2690 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2691 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2692 if (ret)
2693 dev_dbg(hba->dev,
2694 "%s: failed with error %d, retries %d\n",
2695 __func__, ret, retries);
2696 else
2697 break;
2698 }
2699
2700 if (ret)
2701 dev_err(hba->dev,
2702 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2703 __func__, opcode, idn, ret, retries);
2704 return ret;
2705}
2706
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002707/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302708 * ufshcd_query_flag() - API function for sending flag query requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002709 * @hba: per-adapter instance
2710 * @opcode: flag query to perform
2711 * @idn: flag idn to access
2712 * @flag_res: the flag value after the query request completes
Dolev Raviv68078d52013-07-30 00:35:58 +05302713 *
2714 * Returns 0 for success, non-zero in case of failure
2715 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002716int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Dolev Raviv68078d52013-07-30 00:35:58 +05302717 enum flag_idn idn, bool *flag_res)
2718{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002719 struct ufs_query_req *request = NULL;
2720 struct ufs_query_res *response = NULL;
2721 int err, index = 0, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002722 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05302723
2724 BUG_ON(!hba);
2725
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002726 ufshcd_hold(hba, false);
Dolev Raviv68078d52013-07-30 00:35:58 +05302727 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002728 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2729 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05302730
2731 switch (opcode) {
2732 case UPIU_QUERY_OPCODE_SET_FLAG:
2733 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2734 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2735 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2736 break;
2737 case UPIU_QUERY_OPCODE_READ_FLAG:
2738 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2739 if (!flag_res) {
2740 /* No dummy reads */
2741 dev_err(hba->dev, "%s: Invalid argument for read request\n",
2742 __func__);
2743 err = -EINVAL;
2744 goto out_unlock;
2745 }
2746 break;
2747 default:
2748 dev_err(hba->dev,
2749 "%s: Expected query flag opcode but got = %d\n",
2750 __func__, opcode);
2751 err = -EINVAL;
2752 goto out_unlock;
2753 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302754
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002755 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05302756
2757 if (err) {
2758 dev_err(hba->dev,
2759 "%s: Sending flag query for idn %d failed, err = %d\n",
2760 __func__, idn, err);
2761 goto out_unlock;
2762 }
2763
2764 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302765 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302766 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2767
2768out_unlock:
2769 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002770 ufshcd_release(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05302771 return err;
2772}
2773
2774/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302775 * ufshcd_query_attr - API function for sending attribute requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002776 * @hba: per-adapter instance
2777 * @opcode: attribute opcode
2778 * @idn: attribute idn to access
2779 * @index: index field
2780 * @selector: selector field
2781 * @attr_val: the attribute value after the query request completes
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302782 *
2783 * Returns 0 for success, non-zero in case of failure
2784*/
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02002785int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2786 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302787{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002788 struct ufs_query_req *request = NULL;
2789 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302790 int err;
2791
2792 BUG_ON(!hba);
2793
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002794 ufshcd_hold(hba, false);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302795 if (!attr_val) {
2796 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2797 __func__, opcode);
2798 err = -EINVAL;
2799 goto out;
2800 }
2801
2802 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002803 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2804 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302805
2806 switch (opcode) {
2807 case UPIU_QUERY_OPCODE_WRITE_ATTR:
2808 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302809 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302810 break;
2811 case UPIU_QUERY_OPCODE_READ_ATTR:
2812 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2813 break;
2814 default:
2815 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2816 __func__, opcode);
2817 err = -EINVAL;
2818 goto out_unlock;
2819 }
2820
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002821 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302822
2823 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002824 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2825 __func__, opcode, idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302826 goto out_unlock;
2827 }
2828
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302829 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302830
2831out_unlock:
2832 mutex_unlock(&hba->dev_cmd.lock);
2833out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002834 ufshcd_release(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302835 return err;
2836}
2837
2838/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02002839 * ufshcd_query_attr_retry() - API function for sending query
2840 * attribute with retries
2841 * @hba: per-adapter instance
2842 * @opcode: attribute opcode
2843 * @idn: attribute idn to access
2844 * @index: index field
2845 * @selector: selector field
2846 * @attr_val: the attribute value after the query request
2847 * completes
2848 *
2849 * Returns 0 for success, non-zero in case of failure
2850*/
2851static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2852 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2853 u32 *attr_val)
2854{
2855 int ret = 0;
2856 u32 retries;
2857
2858 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2859 ret = ufshcd_query_attr(hba, opcode, idn, index,
2860 selector, attr_val);
2861 if (ret)
2862 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2863 __func__, ret, retries);
2864 else
2865 break;
2866 }
2867
2868 if (ret)
2869 dev_err(hba->dev,
2870 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2871 __func__, idn, ret, QUERY_REQ_RETRIES);
2872 return ret;
2873}
2874
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002875static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002876 enum query_opcode opcode, enum desc_idn idn, u8 index,
2877 u8 selector, u8 *desc_buf, int *buf_len)
2878{
2879 struct ufs_query_req *request = NULL;
2880 struct ufs_query_res *response = NULL;
2881 int err;
2882
2883 BUG_ON(!hba);
2884
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002885 ufshcd_hold(hba, false);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002886 if (!desc_buf) {
2887 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2888 __func__, opcode);
2889 err = -EINVAL;
2890 goto out;
2891 }
2892
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002893 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002894 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2895 __func__, *buf_len);
2896 err = -EINVAL;
2897 goto out;
2898 }
2899
2900 mutex_lock(&hba->dev_cmd.lock);
2901 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2902 selector);
2903 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002904 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002905
2906 switch (opcode) {
2907 case UPIU_QUERY_OPCODE_WRITE_DESC:
2908 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2909 break;
2910 case UPIU_QUERY_OPCODE_READ_DESC:
2911 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2912 break;
2913 default:
2914 dev_err(hba->dev,
2915 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2916 __func__, opcode);
2917 err = -EINVAL;
2918 goto out_unlock;
2919 }
2920
2921 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2922
2923 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002924 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2925 __func__, opcode, idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002926 goto out_unlock;
2927 }
2928
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03002929 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002930
2931out_unlock:
Bean Huocfcbae32019-11-12 23:34:36 +01002932 hba->dev_cmd.query.descriptor = NULL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002933 mutex_unlock(&hba->dev_cmd.lock);
2934out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002935 ufshcd_release(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002936 return err;
2937}
2938
2939/**
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002940 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
2941 * @hba: per-adapter instance
2942 * @opcode: attribute opcode
2943 * @idn: attribute idn to access
2944 * @index: index field
2945 * @selector: selector field
2946 * @desc_buf: the buffer that contains the descriptor
2947 * @buf_len: length parameter passed to the device
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002948 *
2949 * Returns 0 for success, non-zero in case of failure.
2950 * The buf_len parameter will contain, on return, the length parameter
2951 * received on the response.
2952 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02002953int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
2954 enum query_opcode opcode,
2955 enum desc_idn idn, u8 index,
2956 u8 selector,
2957 u8 *desc_buf, int *buf_len)
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002958{
2959 int err;
2960 int retries;
2961
2962 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2963 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
2964 selector, desc_buf, buf_len);
2965 if (!err || err == -EINVAL)
2966 break;
2967 }
2968
2969 return err;
2970}
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002971
2972/**
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002973 * ufshcd_read_desc_length - read the specified descriptor length from header
2974 * @hba: Pointer to adapter instance
2975 * @desc_id: descriptor idn value
2976 * @desc_index: descriptor index
2977 * @desc_length: pointer to variable to read the length of descriptor
2978 *
2979 * Return 0 in case of success, non-zero otherwise
2980 */
2981static int ufshcd_read_desc_length(struct ufs_hba *hba,
2982 enum desc_idn desc_id,
2983 int desc_index,
2984 int *desc_length)
2985{
2986 int ret;
2987 u8 header[QUERY_DESC_HDR_SIZE];
2988 int header_len = QUERY_DESC_HDR_SIZE;
2989
2990 if (desc_id >= QUERY_DESC_IDN_MAX)
2991 return -EINVAL;
2992
2993 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
2994 desc_id, desc_index, 0, header,
2995 &header_len);
2996
2997 if (ret) {
2998 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
2999 __func__, desc_id);
3000 return ret;
3001 } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
3002 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
3003 __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3004 desc_id);
3005 ret = -EINVAL;
3006 }
3007
3008 *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3009 return ret;
3010
3011}
3012
3013/**
3014 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3015 * @hba: Pointer to adapter instance
3016 * @desc_id: descriptor idn value
3017 * @desc_len: mapped desc length (out)
3018 *
3019 * Return 0 in case of success, non-zero otherwise
3020 */
3021int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3022 enum desc_idn desc_id, int *desc_len)
3023{
3024 switch (desc_id) {
3025 case QUERY_DESC_IDN_DEVICE:
3026 *desc_len = hba->desc_size.dev_desc;
3027 break;
3028 case QUERY_DESC_IDN_POWER:
3029 *desc_len = hba->desc_size.pwr_desc;
3030 break;
3031 case QUERY_DESC_IDN_GEOMETRY:
3032 *desc_len = hba->desc_size.geom_desc;
3033 break;
3034 case QUERY_DESC_IDN_CONFIGURATION:
3035 *desc_len = hba->desc_size.conf_desc;
3036 break;
3037 case QUERY_DESC_IDN_UNIT:
3038 *desc_len = hba->desc_size.unit_desc;
3039 break;
3040 case QUERY_DESC_IDN_INTERCONNECT:
3041 *desc_len = hba->desc_size.interc_desc;
3042 break;
3043 case QUERY_DESC_IDN_STRING:
3044 *desc_len = QUERY_DESC_MAX_SIZE;
3045 break;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02003046 case QUERY_DESC_IDN_HEALTH:
3047 *desc_len = hba->desc_size.hlth_desc;
3048 break;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003049 case QUERY_DESC_IDN_RFU_0:
3050 case QUERY_DESC_IDN_RFU_1:
3051 *desc_len = 0;
3052 break;
3053 default:
3054 *desc_len = 0;
3055 return -EINVAL;
3056 }
3057 return 0;
3058}
3059EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3060
3061/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003062 * ufshcd_read_desc_param - read the specified descriptor parameter
3063 * @hba: Pointer to adapter instance
3064 * @desc_id: descriptor idn value
3065 * @desc_index: descriptor index
3066 * @param_offset: offset of the parameter to read
3067 * @param_read_buf: pointer to buffer where parameter would be read
3068 * @param_size: sizeof(param_read_buf)
3069 *
3070 * Return 0 in case of success, non-zero otherwise
3071 */
Stanislav Nijnikov45bced82018-02-15 14:14:02 +02003072int ufshcd_read_desc_param(struct ufs_hba *hba,
3073 enum desc_idn desc_id,
3074 int desc_index,
3075 u8 param_offset,
3076 u8 *param_read_buf,
3077 u8 param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003078{
3079 int ret;
3080 u8 *desc_buf;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003081 int buff_len;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003082 bool is_kmalloc = true;
3083
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003084 /* Safety check */
3085 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003086 return -EINVAL;
3087
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003088 /* Get the max length of descriptor from structure filled up at probe
3089 * time.
3090 */
3091 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003092
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003093 /* Sanity checks */
3094 if (ret || !buff_len) {
3095 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3096 __func__);
3097 return ret;
3098 }
3099
3100 /* Check whether we need temp memory */
3101 if (param_offset != 0 || param_size < buff_len) {
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003102 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3103 if (!desc_buf)
3104 return -ENOMEM;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003105 } else {
3106 desc_buf = param_read_buf;
3107 is_kmalloc = false;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003108 }
3109
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003110 /* Request for full descriptor */
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003111 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003112 desc_id, desc_index, 0,
3113 desc_buf, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003114
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003115 if (ret) {
3116 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3117 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003118 goto out;
3119 }
3120
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003121 /* Sanity check */
3122 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3123 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3124 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3125 ret = -EINVAL;
3126 goto out;
3127 }
3128
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003129 /* Check wherher we will not copy more data, than available */
3130 if (is_kmalloc && param_size > buff_len)
3131 param_size = buff_len;
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003132
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003133 if (is_kmalloc)
3134 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3135out:
3136 if (is_kmalloc)
3137 kfree(desc_buf);
3138 return ret;
3139}
3140
3141static inline int ufshcd_read_desc(struct ufs_hba *hba,
3142 enum desc_idn desc_id,
3143 int desc_index,
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003144 void *buf,
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003145 u32 size)
3146{
3147 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3148}
3149
3150static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3151 u8 *buf,
3152 u32 size)
3153{
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02003154 return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003155}
3156
Tomas Winkler8209b6d2017-01-05 10:45:10 +02003157static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
Yaniv Gardib573d482016-03-10 17:37:09 +02003158{
3159 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3160}
Yaniv Gardib573d482016-03-10 17:37:09 +02003161
3162/**
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003163 * struct uc_string_id - unicode string
3164 *
3165 * @len: size of this descriptor inclusive
3166 * @type: descriptor type
3167 * @uc: unicode string character
3168 */
3169struct uc_string_id {
3170 u8 len;
3171 u8 type;
3172 wchar_t uc[0];
3173} __packed;
3174
3175/* replace non-printable or non-ASCII characters with spaces */
3176static inline char ufshcd_remove_non_printable(u8 ch)
3177{
3178 return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3179}
3180
3181/**
Yaniv Gardib573d482016-03-10 17:37:09 +02003182 * ufshcd_read_string_desc - read string descriptor
3183 * @hba: pointer to adapter instance
3184 * @desc_index: descriptor index
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003185 * @buf: pointer to buffer where descriptor would be read,
3186 * the caller should free the memory.
Yaniv Gardib573d482016-03-10 17:37:09 +02003187 * @ascii: if true convert from unicode to ascii characters
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003188 * null terminated string.
Yaniv Gardib573d482016-03-10 17:37:09 +02003189 *
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003190 * Return:
3191 * * string size on success.
3192 * * -ENOMEM: on allocation failure
3193 * * -EINVAL: on a wrong parameter
Yaniv Gardib573d482016-03-10 17:37:09 +02003194 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003195int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3196 u8 **buf, bool ascii)
Yaniv Gardib573d482016-03-10 17:37:09 +02003197{
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003198 struct uc_string_id *uc_str;
3199 u8 *str;
3200 int ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003201
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003202 if (!buf)
3203 return -EINVAL;
Yaniv Gardib573d482016-03-10 17:37:09 +02003204
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003205 uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3206 if (!uc_str)
3207 return -ENOMEM;
3208
3209 ret = ufshcd_read_desc(hba, QUERY_DESC_IDN_STRING,
3210 desc_index, uc_str,
3211 QUERY_DESC_MAX_SIZE);
3212 if (ret < 0) {
3213 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3214 QUERY_REQ_RETRIES, ret);
3215 str = NULL;
3216 goto out;
3217 }
3218
3219 if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3220 dev_dbg(hba->dev, "String Desc is of zero length\n");
3221 str = NULL;
3222 ret = 0;
Yaniv Gardib573d482016-03-10 17:37:09 +02003223 goto out;
3224 }
3225
3226 if (ascii) {
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003227 ssize_t ascii_len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003228 int i;
Yaniv Gardib573d482016-03-10 17:37:09 +02003229 /* remove header and divide by 2 to move from UTF16 to UTF8 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003230 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3231 str = kzalloc(ascii_len, GFP_KERNEL);
3232 if (!str) {
3233 ret = -ENOMEM;
Tiezhu Yangfcbefc32016-06-25 12:35:22 +08003234 goto out;
Yaniv Gardib573d482016-03-10 17:37:09 +02003235 }
3236
3237 /*
3238 * the descriptor contains string in UTF16 format
3239 * we need to convert to utf-8 so it can be displayed
3240 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003241 ret = utf16s_to_utf8s(uc_str->uc,
3242 uc_str->len - QUERY_DESC_HDR_SIZE,
3243 UTF16_BIG_ENDIAN, str, ascii_len);
Yaniv Gardib573d482016-03-10 17:37:09 +02003244
3245 /* replace non-printable or non-ASCII characters with spaces */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003246 for (i = 0; i < ret; i++)
3247 str[i] = ufshcd_remove_non_printable(str[i]);
Yaniv Gardib573d482016-03-10 17:37:09 +02003248
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003249 str[ret++] = '\0';
3250
3251 } else {
YueHaibing5f577042019-08-31 12:44:24 +00003252 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003253 if (!str) {
3254 ret = -ENOMEM;
3255 goto out;
3256 }
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003257 ret = uc_str->len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003258 }
3259out:
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003260 *buf = str;
3261 kfree(uc_str);
3262 return ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003263}
Yaniv Gardib573d482016-03-10 17:37:09 +02003264
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003265/**
3266 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3267 * @hba: Pointer to adapter instance
3268 * @lun: lun id
3269 * @param_offset: offset of the parameter to read
3270 * @param_read_buf: pointer to buffer where parameter would be read
3271 * @param_size: sizeof(param_read_buf)
3272 *
3273 * Return 0 in case of success, non-zero otherwise
3274 */
3275static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3276 int lun,
3277 enum unit_desc_param param_offset,
3278 u8 *param_read_buf,
3279 u32 param_size)
3280{
3281 /*
3282 * Unit descriptors are only available for general purpose LUs (LUN id
3283 * from 0 to 7) and RPMB Well known LU.
3284 */
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02003285 if (!ufs_is_valid_unit_desc_lun(lun))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003286 return -EOPNOTSUPP;
3287
3288 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3289 param_offset, param_read_buf, param_size);
3290}
3291
3292/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303293 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3294 * @hba: per adapter instance
3295 *
3296 * 1. Allocate DMA memory for Command Descriptor array
3297 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3298 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3299 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3300 * (UTMRDL)
3301 * 4. Allocate memory for local reference block(lrb).
3302 *
3303 * Returns 0 for success, non-zero in case of failure
3304 */
3305static int ufshcd_memory_alloc(struct ufs_hba *hba)
3306{
3307 size_t utmrdl_size, utrdl_size, ucdl_size;
3308
3309 /* Allocate memory for UTP command descriptors */
3310 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003311 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3312 ucdl_size,
3313 &hba->ucdl_dma_addr,
3314 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303315
3316 /*
3317 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3318 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3319 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3320 * be aligned to 128 bytes as well
3321 */
3322 if (!hba->ucdl_base_addr ||
3323 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303324 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303325 "Command Descriptor Memory allocation failed\n");
3326 goto out;
3327 }
3328
3329 /*
3330 * Allocate memory for UTP Transfer descriptors
3331 * UFSHCI requires 1024 byte alignment of UTRD
3332 */
3333 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003334 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3335 utrdl_size,
3336 &hba->utrdl_dma_addr,
3337 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303338 if (!hba->utrdl_base_addr ||
3339 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303340 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303341 "Transfer Descriptor Memory allocation failed\n");
3342 goto out;
3343 }
3344
3345 /*
3346 * Allocate memory for UTP Task Management descriptors
3347 * UFSHCI requires 1024 byte alignment of UTMRD
3348 */
3349 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003350 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3351 utmrdl_size,
3352 &hba->utmrdl_dma_addr,
3353 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303354 if (!hba->utmrdl_base_addr ||
3355 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303356 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303357 "Task Management Descriptor Memory allocation failed\n");
3358 goto out;
3359 }
3360
3361 /* Allocate memory for local reference block */
Kees Cooka86854d2018-06-12 14:07:58 -07003362 hba->lrb = devm_kcalloc(hba->dev,
3363 hba->nutrs, sizeof(struct ufshcd_lrb),
Seungwon Jeon2953f852013-06-27 13:31:54 +09003364 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303365 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303366 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303367 goto out;
3368 }
3369 return 0;
3370out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303371 return -ENOMEM;
3372}
3373
3374/**
3375 * ufshcd_host_memory_configure - configure local reference block with
3376 * memory offsets
3377 * @hba: per adapter instance
3378 *
3379 * Configure Host memory space
3380 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3381 * address.
3382 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3383 * and PRDT offset.
3384 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3385 * into local reference block.
3386 */
3387static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3388{
3389 struct utp_transfer_cmd_desc *cmd_descp;
3390 struct utp_transfer_req_desc *utrdlp;
3391 dma_addr_t cmd_desc_dma_addr;
3392 dma_addr_t cmd_desc_element_addr;
3393 u16 response_offset;
3394 u16 prdt_offset;
3395 int cmd_desc_size;
3396 int i;
3397
3398 utrdlp = hba->utrdl_base_addr;
3399 cmd_descp = hba->ucdl_base_addr;
3400
3401 response_offset =
3402 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3403 prdt_offset =
3404 offsetof(struct utp_transfer_cmd_desc, prd_table);
3405
3406 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3407 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3408
3409 for (i = 0; i < hba->nutrs; i++) {
3410 /* Configure UTRD with command descriptor base address */
3411 cmd_desc_element_addr =
3412 (cmd_desc_dma_addr + (cmd_desc_size * i));
3413 utrdlp[i].command_desc_base_addr_lo =
3414 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3415 utrdlp[i].command_desc_base_addr_hi =
3416 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3417
3418 /* Response upiu and prdt offset should be in double words */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003419 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3420 utrdlp[i].response_upiu_offset =
3421 cpu_to_le16(response_offset);
3422 utrdlp[i].prd_table_offset =
3423 cpu_to_le16(prdt_offset);
3424 utrdlp[i].response_upiu_length =
3425 cpu_to_le16(ALIGNED_UPIU_SIZE);
3426 } else {
3427 utrdlp[i].response_upiu_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303428 cpu_to_le16((response_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003429 utrdlp[i].prd_table_offset =
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303430 cpu_to_le16((prdt_offset >> 2));
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003431 utrdlp[i].response_upiu_length =
Sujit Reddy Thumma3ca316c2013-06-26 22:39:30 +05303432 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09003433 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303434
3435 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003436 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3437 (i * sizeof(struct utp_transfer_req_desc));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05303438 hba->lrb[i].ucd_req_ptr =
3439 (struct utp_upiu_req *)(cmd_descp + i);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003440 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303441 hba->lrb[i].ucd_rsp_ptr =
3442 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003443 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3444 response_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303445 hba->lrb[i].ucd_prdt_ptr =
3446 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003447 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3448 prdt_offset;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303449 }
3450}
3451
3452/**
3453 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3454 * @hba: per adapter instance
3455 *
3456 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3457 * in order to initialize the Unipro link startup procedure.
3458 * Once the Unipro links are up, the device connected to the controller
3459 * is detected.
3460 *
3461 * Returns 0 on success, non-zero value on failure
3462 */
3463static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3464{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303465 struct uic_command uic_cmd = {0};
3466 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303467
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303468 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3469
3470 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3471 if (ret)
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003472 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303473 "dme-link-startup: error code %d\n", ret);
3474 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303475}
Alim Akhtar4404c5d2018-05-06 15:44:17 +05303476/**
3477 * ufshcd_dme_reset - UIC command for DME_RESET
3478 * @hba: per adapter instance
3479 *
3480 * DME_RESET command is issued in order to reset UniPro stack.
3481 * This function now deal with cold reset.
3482 *
3483 * Returns 0 on success, non-zero value on failure
3484 */
3485static int ufshcd_dme_reset(struct ufs_hba *hba)
3486{
3487 struct uic_command uic_cmd = {0};
3488 int ret;
3489
3490 uic_cmd.command = UIC_CMD_DME_RESET;
3491
3492 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3493 if (ret)
3494 dev_err(hba->dev,
3495 "dme-reset: error code %d\n", ret);
3496
3497 return ret;
3498}
3499
3500/**
3501 * ufshcd_dme_enable - UIC command for DME_ENABLE
3502 * @hba: per adapter instance
3503 *
3504 * DME_ENABLE command is issued in order to enable UniPro stack.
3505 *
3506 * Returns 0 on success, non-zero value on failure
3507 */
3508static int ufshcd_dme_enable(struct ufs_hba *hba)
3509{
3510 struct uic_command uic_cmd = {0};
3511 int ret;
3512
3513 uic_cmd.command = UIC_CMD_DME_ENABLE;
3514
3515 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3516 if (ret)
3517 dev_err(hba->dev,
3518 "dme-reset: error code %d\n", ret);
3519
3520 return ret;
3521}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303522
Yaniv Gardicad2e032015-03-31 17:37:14 +03003523static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3524{
3525 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3526 unsigned long min_sleep_time_us;
3527
3528 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3529 return;
3530
3531 /*
3532 * last_dme_cmd_tstamp will be 0 only for 1st call to
3533 * this function
3534 */
3535 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3536 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3537 } else {
3538 unsigned long delta =
3539 (unsigned long) ktime_to_us(
3540 ktime_sub(ktime_get(),
3541 hba->last_dme_cmd_tstamp));
3542
3543 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3544 min_sleep_time_us =
3545 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3546 else
3547 return; /* no more delay required */
3548 }
3549
3550 /* allow sleep for extra 50us if needed */
3551 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3552}
3553
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303554/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303555 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3556 * @hba: per adapter instance
3557 * @attr_sel: uic command argument1
3558 * @attr_set: attribute set type as uic command argument2
3559 * @mib_val: setting value as uic command argument3
3560 * @peer: indicate whether peer or local
3561 *
3562 * Returns 0 on success, non-zero value on failure
3563 */
3564int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3565 u8 attr_set, u32 mib_val, u8 peer)
3566{
3567 struct uic_command uic_cmd = {0};
3568 static const char *const action[] = {
3569 "dme-set",
3570 "dme-peer-set"
3571 };
3572 const char *set = action[!!peer];
3573 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003574 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303575
3576 uic_cmd.command = peer ?
3577 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3578 uic_cmd.argument1 = attr_sel;
3579 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3580 uic_cmd.argument3 = mib_val;
3581
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003582 do {
3583 /* for peer attributes we retry upon failure */
3584 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3585 if (ret)
3586 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3587 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3588 } while (ret && peer && --retries);
3589
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003590 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003591 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003592 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3593 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303594
3595 return ret;
3596}
3597EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3598
3599/**
3600 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3601 * @hba: per adapter instance
3602 * @attr_sel: uic command argument1
3603 * @mib_val: the value of the attribute as returned by the UIC command
3604 * @peer: indicate whether peer or local
3605 *
3606 * Returns 0 on success, non-zero value on failure
3607 */
3608int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3609 u32 *mib_val, u8 peer)
3610{
3611 struct uic_command uic_cmd = {0};
3612 static const char *const action[] = {
3613 "dme-get",
3614 "dme-peer-get"
3615 };
3616 const char *get = action[!!peer];
3617 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003618 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003619 struct ufs_pa_layer_attr orig_pwr_info;
3620 struct ufs_pa_layer_attr temp_pwr_info;
3621 bool pwr_mode_change = false;
3622
3623 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3624 orig_pwr_info = hba->pwr_info;
3625 temp_pwr_info = orig_pwr_info;
3626
3627 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3628 orig_pwr_info.pwr_rx == FAST_MODE) {
3629 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3630 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3631 pwr_mode_change = true;
3632 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3633 orig_pwr_info.pwr_rx == SLOW_MODE) {
3634 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3635 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3636 pwr_mode_change = true;
3637 }
3638 if (pwr_mode_change) {
3639 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3640 if (ret)
3641 goto out;
3642 }
3643 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303644
3645 uic_cmd.command = peer ?
3646 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3647 uic_cmd.argument1 = attr_sel;
3648
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003649 do {
3650 /* for peer attributes we retry upon failure */
3651 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3652 if (ret)
3653 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3654 get, UIC_GET_ATTR_ID(attr_sel), ret);
3655 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303656
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003657 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003658 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003659 get, UIC_GET_ATTR_ID(attr_sel),
3660 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003661
3662 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303663 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003664
3665 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3666 && pwr_mode_change)
3667 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303668out:
3669 return ret;
3670}
3671EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3672
3673/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003674 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3675 * state) and waits for it to take effect.
3676 *
3677 * @hba: per adapter instance
3678 * @cmd: UIC command to execute
3679 *
3680 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3681 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3682 * and device UniPro link and hence it's final completion would be indicated by
3683 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3684 * addition to normal UIC command completion Status (UCCS). This function only
3685 * returns after the relevant status bits indicate the completion.
3686 *
3687 * Returns 0 on success, non-zero value on failure
3688 */
3689static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3690{
3691 struct completion uic_async_done;
3692 unsigned long flags;
3693 u8 status;
3694 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003695 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003696
3697 mutex_lock(&hba->uic_cmd_mutex);
3698 init_completion(&uic_async_done);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003699 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003700
3701 spin_lock_irqsave(hba->host->host_lock, flags);
3702 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003703 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3704 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3705 /*
3706 * Make sure UIC command completion interrupt is disabled before
3707 * issuing UIC command.
3708 */
3709 wmb();
3710 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003711 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003712 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3713 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003714 if (ret) {
3715 dev_err(hba->dev,
3716 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3717 cmd->command, cmd->argument3, ret);
3718 goto out;
3719 }
3720
3721 if (!wait_for_completion_timeout(hba->uic_async_done,
3722 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3723 dev_err(hba->dev,
3724 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3725 cmd->command, cmd->argument3);
3726 ret = -ETIMEDOUT;
3727 goto out;
3728 }
3729
3730 status = ufshcd_get_upmcrs(hba);
3731 if (status != PWR_LOCAL) {
3732 dev_err(hba->dev,
Zang Leigang479da362017-09-19 16:50:30 +08003733 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003734 cmd->command, status);
3735 ret = (status != PWR_OK) ? status : -1;
3736 }
3737out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08003738 if (ret) {
3739 ufshcd_print_host_state(hba);
3740 ufshcd_print_pwr_info(hba);
3741 ufshcd_print_host_regs(hba);
3742 }
3743
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003744 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003745 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003746 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003747 if (reenable_intr)
3748 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003749 spin_unlock_irqrestore(hba->host->host_lock, flags);
3750 mutex_unlock(&hba->uic_cmd_mutex);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003751
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003752 return ret;
3753}
3754
3755/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303756 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3757 * using DME_SET primitives.
3758 * @hba: per adapter instance
3759 * @mode: powr mode value
3760 *
3761 * Returns 0 on success, non-zero value on failure
3762 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05303763static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303764{
3765 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003766 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303767
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003768 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3769 ret = ufshcd_dme_set(hba,
3770 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3771 if (ret) {
3772 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3773 __func__, ret);
3774 goto out;
3775 }
3776 }
3777
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303778 uic_cmd.command = UIC_CMD_DME_SET;
3779 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3780 uic_cmd.argument3 = mode;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003781 ufshcd_hold(hba, false);
3782 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3783 ufshcd_release(hba);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303784
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003785out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003786 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003787}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303788
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003789static int ufshcd_link_recovery(struct ufs_hba *hba)
3790{
3791 int ret;
3792 unsigned long flags;
3793
3794 spin_lock_irqsave(hba->host->host_lock, flags);
3795 hba->ufshcd_state = UFSHCD_STATE_RESET;
3796 ufshcd_set_eh_in_progress(hba);
3797 spin_unlock_irqrestore(hba->host->host_lock, flags);
3798
Can Guoebdd1df2019-11-14 22:09:24 -08003799 /* Reset the attached device */
3800 ufshcd_vops_device_reset(hba);
3801
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003802 ret = ufshcd_host_reset_and_restore(hba);
3803
3804 spin_lock_irqsave(hba->host->host_lock, flags);
3805 if (ret)
3806 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3807 ufshcd_clear_eh_in_progress(hba);
3808 spin_unlock_irqrestore(hba->host->host_lock, flags);
3809
3810 if (ret)
3811 dev_err(hba->dev, "%s: link recovery failed, err %d",
3812 __func__, ret);
3813
3814 return ret;
3815}
3816
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003817static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003818{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003819 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003820 struct uic_command uic_cmd = {0};
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003821 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003822
Kiwoong Kimee32c902016-11-10 21:17:43 +09003823 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3824
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003825 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003826 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003827 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3828 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003829
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003830 if (ret) {
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003831 int err;
3832
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003833 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3834 __func__, ret);
3835
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003836 /*
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003837 * If link recovery fails then return error code returned from
3838 * ufshcd_link_recovery().
3839 * If link recovery succeeds then return -EAGAIN to attempt
3840 * hibern8 enter retry again.
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003841 */
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003842 err = ufshcd_link_recovery(hba);
3843 if (err) {
3844 dev_err(hba->dev, "%s: link recovery failed", __func__);
3845 ret = err;
3846 } else {
3847 ret = -EAGAIN;
3848 }
Kiwoong Kimee32c902016-11-10 21:17:43 +09003849 } else
3850 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3851 POST_CHANGE);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003852
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003853 return ret;
3854}
3855
3856static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3857{
3858 int ret = 0, retries;
3859
3860 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3861 ret = __ufshcd_uic_hibern8_enter(hba);
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003862 if (!ret)
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003863 goto out;
3864 }
3865out:
3866 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003867}
3868
3869static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3870{
3871 struct uic_command uic_cmd = {0};
3872 int ret;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003873 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003874
Kiwoong Kimee32c902016-11-10 21:17:43 +09003875 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3876
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003877 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3878 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003879 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3880 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3881
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303882 if (ret) {
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003883 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3884 __func__, ret);
3885 ret = ufshcd_link_recovery(hba);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003886 } else {
Kiwoong Kimee32c902016-11-10 21:17:43 +09003887 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3888 POST_CHANGE);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003889 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3890 hba->ufs_stats.hibern8_exit_cnt++;
3891 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303892
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303893 return ret;
3894}
3895
Can Guo71d848b2019-11-14 22:09:26 -08003896void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
Adrian Hunterad448372018-03-20 15:07:38 +02003897{
3898 unsigned long flags;
3899
Stanley Chuee5f1042019-05-21 14:44:52 +08003900 if (!ufshcd_is_auto_hibern8_supported(hba) || !hba->ahit)
Adrian Hunterad448372018-03-20 15:07:38 +02003901 return;
3902
3903 spin_lock_irqsave(hba->host->host_lock, flags);
3904 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3905 spin_unlock_irqrestore(hba->host->host_lock, flags);
3906}
3907
Yaniv Gardi50646362014-10-23 13:25:13 +03003908 /**
3909 * ufshcd_init_pwr_info - setting the POR (power on reset)
3910 * values in hba power info
3911 * @hba: per-adapter instance
3912 */
3913static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3914{
3915 hba->pwr_info.gear_rx = UFS_PWM_G1;
3916 hba->pwr_info.gear_tx = UFS_PWM_G1;
3917 hba->pwr_info.lane_rx = 1;
3918 hba->pwr_info.lane_tx = 1;
3919 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3920 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3921 hba->pwr_info.hs_rate = 0;
3922}
3923
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303924/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003925 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3926 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303927 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003928static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303929{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003930 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3931
3932 if (hba->max_pwr_info.is_valid)
3933 return 0;
3934
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003935 pwr_info->pwr_tx = FAST_MODE;
3936 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003937 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303938
3939 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003940 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3941 &pwr_info->lane_rx);
3942 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3943 &pwr_info->lane_tx);
3944
3945 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
3946 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
3947 __func__,
3948 pwr_info->lane_rx,
3949 pwr_info->lane_tx);
3950 return -EINVAL;
3951 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303952
3953 /*
3954 * First, get the maximum gears of HS speed.
3955 * If a zero value, it means there is no HSGEAR capability.
3956 * Then, get the maximum gears of PWM speed.
3957 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003958 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
3959 if (!pwr_info->gear_rx) {
3960 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3961 &pwr_info->gear_rx);
3962 if (!pwr_info->gear_rx) {
3963 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
3964 __func__, pwr_info->gear_rx);
3965 return -EINVAL;
3966 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003967 pwr_info->pwr_rx = SLOW_MODE;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303968 }
3969
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003970 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
3971 &pwr_info->gear_tx);
3972 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303973 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003974 &pwr_info->gear_tx);
3975 if (!pwr_info->gear_tx) {
3976 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
3977 __func__, pwr_info->gear_tx);
3978 return -EINVAL;
3979 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08003980 pwr_info->pwr_tx = SLOW_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003981 }
3982
3983 hba->max_pwr_info.is_valid = true;
3984 return 0;
3985}
3986
3987static int ufshcd_change_power_mode(struct ufs_hba *hba,
3988 struct ufs_pa_layer_attr *pwr_mode)
3989{
3990 int ret;
3991
3992 /* if already configured to the requested pwr_mode */
3993 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
3994 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
3995 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
3996 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
3997 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
3998 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
3999 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4000 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4001 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304002 }
4003
4004 /*
4005 * Configure attributes for power mode change with below.
4006 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4007 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4008 * - PA_HSSERIES
4009 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004010 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4011 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4012 pwr_mode->lane_rx);
4013 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4014 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304015 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004016 else
4017 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304018
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004019 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4020 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4021 pwr_mode->lane_tx);
4022 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4023 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304024 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004025 else
4026 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304027
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004028 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4029 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4030 pwr_mode->pwr_rx == FAST_MODE ||
4031 pwr_mode->pwr_tx == FAST_MODE)
4032 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4033 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304034
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004035 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4036 | pwr_mode->pwr_tx);
4037
4038 if (ret) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304039 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004040 "%s: power mode change failed %d\n", __func__, ret);
4041 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004042 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4043 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004044
4045 memcpy(&hba->pwr_info, pwr_mode,
4046 sizeof(struct ufs_pa_layer_attr));
4047 }
4048
4049 return ret;
4050}
4051
4052/**
4053 * ufshcd_config_pwr_mode - configure a new power mode
4054 * @hba: per-adapter instance
4055 * @desired_pwr_mode: desired power configuration
4056 */
Alim Akhtar0d846e72018-05-06 15:44:18 +05304057int ufshcd_config_pwr_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004058 struct ufs_pa_layer_attr *desired_pwr_mode)
4059{
4060 struct ufs_pa_layer_attr final_params = { 0 };
4061 int ret;
4062
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004063 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4064 desired_pwr_mode, &final_params);
4065
4066 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004067 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4068
4069 ret = ufshcd_change_power_mode(hba, &final_params);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08004070 if (!ret)
4071 ufshcd_print_pwr_info(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304072
4073 return ret;
4074}
Alim Akhtar0d846e72018-05-06 15:44:18 +05304075EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304076
4077/**
Dolev Raviv68078d52013-07-30 00:35:58 +05304078 * ufshcd_complete_dev_init() - checks device readiness
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004079 * @hba: per-adapter instance
Dolev Raviv68078d52013-07-30 00:35:58 +05304080 *
4081 * Set fDeviceInit flag and poll until device toggles it.
4082 */
4083static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4084{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004085 int i;
4086 int err;
Dolev Raviv68078d52013-07-30 00:35:58 +05304087 bool flag_res = 1;
4088
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004089 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4090 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05304091 if (err) {
4092 dev_err(hba->dev,
4093 "%s setting fDeviceInit flag failed with error %d\n",
4094 __func__, err);
4095 goto out;
4096 }
4097
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004098 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4099 for (i = 0; i < 1000 && !err && flag_res; i++)
4100 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4101 QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4102
Dolev Raviv68078d52013-07-30 00:35:58 +05304103 if (err)
4104 dev_err(hba->dev,
4105 "%s reading fDeviceInit flag failed with error %d\n",
4106 __func__, err);
4107 else if (flag_res)
4108 dev_err(hba->dev,
4109 "%s fDeviceInit was not cleared by the device\n",
4110 __func__);
4111
4112out:
4113 return err;
4114}
4115
4116/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304117 * ufshcd_make_hba_operational - Make UFS controller operational
4118 * @hba: per adapter instance
4119 *
4120 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004121 * 1. Enable required interrupts
4122 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004123 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004124 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304125 *
4126 * Returns 0 on success, non-zero value on failure
4127 */
4128static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4129{
4130 int err = 0;
4131 u32 reg;
4132
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304133 /* Enable required interrupts */
4134 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4135
4136 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004137 if (ufshcd_is_intr_aggr_allowed(hba))
4138 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4139 else
4140 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304141
4142 /* Configure UTRL and UTMRL base address registers */
4143 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4144 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4145 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4146 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4147 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4148 REG_UTP_TASK_REQ_LIST_BASE_L);
4149 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4150 REG_UTP_TASK_REQ_LIST_BASE_H);
4151
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304152 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004153 * Make sure base address and interrupt setup are updated before
4154 * enabling the run/stop registers below.
4155 */
4156 wmb();
4157
4158 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304159 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304160 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004161 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304162 if (!(ufshcd_get_lists_status(reg))) {
4163 ufshcd_enable_run_stop_reg(hba);
4164 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304165 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304166 "Host controller not ready to process requests");
4167 err = -EIO;
4168 goto out;
4169 }
4170
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304171out:
4172 return err;
4173}
4174
4175/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02004176 * ufshcd_hba_stop - Send controller to reset state
4177 * @hba: per adapter instance
4178 * @can_sleep: perform sleep or just spin
4179 */
4180static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4181{
4182 int err;
4183
4184 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4185 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4186 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4187 10, 1, can_sleep);
4188 if (err)
4189 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4190}
4191
4192/**
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304193 * ufshcd_hba_execute_hce - initialize the controller
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304194 * @hba: per adapter instance
4195 *
4196 * The controller resets itself and controller firmware initialization
4197 * sequence kicks off. When controller is ready it will set
4198 * the Host Controller Enable bit to 1.
4199 *
4200 * Returns 0 on success, non-zero value on failure
4201 */
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304202static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304203{
4204 int retry;
4205
Yaniv Gardi596585a2016-03-10 17:37:08 +02004206 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304207 /* change controller state to "reset state" */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004208 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304209
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004210 /* UniPro link is disabled at this point */
4211 ufshcd_set_link_off(hba);
4212
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004213 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004214
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304215 /* start controller initialization sequence */
4216 ufshcd_hba_start(hba);
4217
4218 /*
4219 * To initialize a UFS host controller HCE bit must be set to 1.
4220 * During initialization the HCE bit value changes from 1->0->1.
4221 * When the host controller completes initialization sequence
4222 * it sets the value of HCE bit to 1. The same HCE bit is read back
4223 * to check if the controller has completed initialization sequence.
4224 * So without this delay the value HCE = 1, set in the previous
4225 * instruction might be read back.
4226 * This delay can be changed based on the controller.
4227 */
Bean Huo838c1ef2019-07-15 11:21:10 +00004228 usleep_range(1000, 1100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304229
4230 /* wait for the host controller to complete initialization */
4231 retry = 10;
4232 while (ufshcd_is_hba_active(hba)) {
4233 if (retry) {
4234 retry--;
4235 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304236 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304237 "Controller enable failed\n");
4238 return -EIO;
4239 }
Bean Huo838c1ef2019-07-15 11:21:10 +00004240 usleep_range(5000, 5100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304241 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004242
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004243 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004244 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004245
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004246 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004247
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304248 return 0;
4249}
4250
Alim Akhtar4404c5d2018-05-06 15:44:17 +05304251static int ufshcd_hba_enable(struct ufs_hba *hba)
4252{
4253 int ret;
4254
4255 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4256 ufshcd_set_link_off(hba);
4257 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4258
4259 /* enable UIC related interrupts */
4260 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4261 ret = ufshcd_dme_reset(hba);
4262 if (!ret) {
4263 ret = ufshcd_dme_enable(hba);
4264 if (!ret)
4265 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4266 if (ret)
4267 dev_err(hba->dev,
4268 "Host controller enable failed with non-hce\n");
4269 }
4270 } else {
4271 ret = ufshcd_hba_execute_hce(hba);
4272 }
4273
4274 return ret;
4275}
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004276static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4277{
4278 int tx_lanes, i, err = 0;
4279
4280 if (!peer)
4281 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4282 &tx_lanes);
4283 else
4284 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4285 &tx_lanes);
4286 for (i = 0; i < tx_lanes; i++) {
4287 if (!peer)
4288 err = ufshcd_dme_set(hba,
4289 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4290 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4291 0);
4292 else
4293 err = ufshcd_dme_peer_set(hba,
4294 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4295 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4296 0);
4297 if (err) {
4298 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4299 __func__, peer, i, err);
4300 break;
4301 }
4302 }
4303
4304 return err;
4305}
4306
4307static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4308{
4309 return ufshcd_disable_tx_lcc(hba, true);
4310}
4311
Stanley Chu8808b4e2019-07-10 21:38:21 +08004312static void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist,
4313 u32 reg)
4314{
4315 reg_hist->reg[reg_hist->pos] = reg;
4316 reg_hist->tstamp[reg_hist->pos] = ktime_get();
4317 reg_hist->pos = (reg_hist->pos + 1) % UFS_ERR_REG_HIST_LENGTH;
4318}
4319
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304320/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304321 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304322 * @hba: per adapter instance
4323 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304324 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304325 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304326static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304327{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304328 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004329 int retries = DME_LINKSTARTUP_RETRIES;
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004330 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304331
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004332 /*
4333 * If UFS device isn't active then we will have to issue link startup
4334 * 2 times to make sure the device state move to active.
4335 */
4336 if (!ufshcd_is_ufs_dev_active(hba))
4337 link_startup_again = true;
4338
4339link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004340 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004341 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304342
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004343 ret = ufshcd_dme_link_startup(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004344
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004345 /* check if device is detected by inter-connect layer */
4346 if (!ret && !ufshcd_is_device_present(hba)) {
Stanley Chu8808b4e2019-07-10 21:38:21 +08004347 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4348 0);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004349 dev_err(hba->dev, "%s: Device not present\n", __func__);
4350 ret = -ENXIO;
4351 goto out;
4352 }
4353
4354 /*
4355 * DME link lost indication is only received when link is up,
4356 * but we can't be sure if the link is up until link startup
4357 * succeeds. So reset the local Uni-Pro and try again.
4358 */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004359 if (ret && ufshcd_hba_enable(hba)) {
4360 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4361 (u32)ret);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004362 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004363 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004364 } while (ret && retries--);
4365
Stanley Chu8808b4e2019-07-10 21:38:21 +08004366 if (ret) {
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004367 /* failed to get the link up... retire */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004368 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4369 (u32)ret);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304370 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004371 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304372
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004373 if (link_startup_again) {
4374 link_startup_again = false;
4375 retries = DME_LINKSTARTUP_RETRIES;
4376 goto link_startup;
4377 }
4378
subhashj@codeaurora.orgd2aebb92016-12-22 18:41:33 -08004379 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4380 ufshcd_init_pwr_info(hba);
4381 ufshcd_print_pwr_info(hba);
4382
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004383 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4384 ret = ufshcd_disable_device_tx_lcc(hba);
4385 if (ret)
4386 goto out;
4387 }
4388
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004389 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004390 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4391 if (ret)
4392 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004393
4394 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304395out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004396 if (ret) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304397 dev_err(hba->dev, "link startup failed %d\n", ret);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004398 ufshcd_print_host_state(hba);
4399 ufshcd_print_pwr_info(hba);
4400 ufshcd_print_host_regs(hba);
4401 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304402 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304403}
4404
4405/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304406 * ufshcd_verify_dev_init() - Verify device initialization
4407 * @hba: per-adapter instance
4408 *
4409 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4410 * device Transport Protocol (UTP) layer is ready after a reset.
4411 * If the UTP layer at the device side is not initialized, it may
4412 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4413 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4414 */
4415static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4416{
4417 int err = 0;
4418 int retries;
4419
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004420 ufshcd_hold(hba, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304421 mutex_lock(&hba->dev_cmd.lock);
4422 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4423 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4424 NOP_OUT_TIMEOUT);
4425
4426 if (!err || err == -ETIMEDOUT)
4427 break;
4428
4429 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4430 }
4431 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004432 ufshcd_release(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304433
4434 if (err)
4435 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4436 return err;
4437}
4438
4439/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004440 * ufshcd_set_queue_depth - set lun queue depth
4441 * @sdev: pointer to SCSI device
4442 *
4443 * Read bLUQueueDepth value and activate scsi tagged command
4444 * queueing. For WLUN, queue depth is set to 1. For best-effort
4445 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4446 * value that host can queue.
4447 */
4448static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4449{
4450 int ret = 0;
4451 u8 lun_qdepth;
4452 struct ufs_hba *hba;
4453
4454 hba = shost_priv(sdev->host);
4455
4456 lun_qdepth = hba->nutrs;
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02004457 ret = ufshcd_read_unit_desc_param(hba,
4458 ufshcd_scsi_to_upiu_lun(sdev->lun),
4459 UNIT_DESC_PARAM_LU_Q_DEPTH,
4460 &lun_qdepth,
4461 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004462
4463 /* Some WLUN doesn't support unit descriptor */
4464 if (ret == -EOPNOTSUPP)
4465 lun_qdepth = 1;
4466 else if (!lun_qdepth)
4467 /* eventually, we can figure out the real queue depth */
4468 lun_qdepth = hba->nutrs;
4469 else
4470 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4471
4472 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4473 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004474 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004475}
4476
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004477/*
4478 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4479 * @hba: per-adapter instance
4480 * @lun: UFS device lun id
4481 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4482 *
4483 * Returns 0 in case of success and b_lu_write_protect status would be returned
4484 * @b_lu_write_protect parameter.
4485 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4486 * Returns -EINVAL in case of invalid parameters passed to this function.
4487 */
4488static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4489 u8 lun,
4490 u8 *b_lu_write_protect)
4491{
4492 int ret;
4493
4494 if (!b_lu_write_protect)
4495 ret = -EINVAL;
4496 /*
4497 * According to UFS device spec, RPMB LU can't be write
4498 * protected so skip reading bLUWriteProtect parameter for
4499 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4500 */
4501 else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4502 ret = -ENOTSUPP;
4503 else
4504 ret = ufshcd_read_unit_desc_param(hba,
4505 lun,
4506 UNIT_DESC_PARAM_LU_WR_PROTECT,
4507 b_lu_write_protect,
4508 sizeof(*b_lu_write_protect));
4509 return ret;
4510}
4511
4512/**
4513 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4514 * status
4515 * @hba: per-adapter instance
4516 * @sdev: pointer to SCSI device
4517 *
4518 */
4519static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4520 struct scsi_device *sdev)
4521{
4522 if (hba->dev_info.f_power_on_wp_en &&
4523 !hba->dev_info.is_lu_power_on_wp) {
4524 u8 b_lu_write_protect;
4525
4526 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4527 &b_lu_write_protect) &&
4528 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4529 hba->dev_info.is_lu_power_on_wp = true;
4530 }
4531}
4532
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004533/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304534 * ufshcd_slave_alloc - handle initial SCSI device configurations
4535 * @sdev: pointer to SCSI device
4536 *
4537 * Returns success
4538 */
4539static int ufshcd_slave_alloc(struct scsi_device *sdev)
4540{
4541 struct ufs_hba *hba;
4542
4543 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304544
4545 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4546 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304547
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304548 /* allow SCSI layer to restart the device in case of errors */
4549 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004550
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004551 /* REPORT SUPPORTED OPERATION CODES is not supported */
4552 sdev->no_report_opcodes = 1;
4553
Sujit Reddy Thumma84af7e82018-01-24 09:52:35 +05304554 /* WRITE_SAME command is not supported */
4555 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004556
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004557 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004558
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004559 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4560
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004561 return 0;
4562}
4563
4564/**
4565 * ufshcd_change_queue_depth - change queue depth
4566 * @sdev: pointer to SCSI device
4567 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004568 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004569 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004570 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004571static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004572{
4573 struct ufs_hba *hba = shost_priv(sdev->host);
4574
4575 if (depth > hba->nutrs)
4576 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004577 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304578}
4579
4580/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004581 * ufshcd_slave_configure - adjust SCSI device configurations
4582 * @sdev: pointer to SCSI device
4583 */
4584static int ufshcd_slave_configure(struct scsi_device *sdev)
4585{
Stanley Chu49615ba2019-09-16 23:56:50 +08004586 struct ufs_hba *hba = shost_priv(sdev->host);
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004587 struct request_queue *q = sdev->request_queue;
4588
4589 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
Stanley Chu49615ba2019-09-16 23:56:50 +08004590
4591 if (ufshcd_is_rpm_autosuspend_allowed(hba))
4592 sdev->rpm_autosuspend = 1;
4593
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004594 return 0;
4595}
4596
4597/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304598 * ufshcd_slave_destroy - remove SCSI device configurations
4599 * @sdev: pointer to SCSI device
4600 */
4601static void ufshcd_slave_destroy(struct scsi_device *sdev)
4602{
4603 struct ufs_hba *hba;
4604
4605 hba = shost_priv(sdev->host);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004606 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004607 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4608 unsigned long flags;
4609
4610 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004611 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004612 spin_unlock_irqrestore(hba->host->host_lock, flags);
4613 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304614}
4615
4616/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304617 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004618 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304619 * @scsi_status: SCSI command status
4620 *
4621 * Returns value base on SCSI command status
4622 */
4623static inline int
4624ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4625{
4626 int result = 0;
4627
4628 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304629 case SAM_STAT_CHECK_CONDITION:
4630 ufshcd_copy_sense_data(lrbp);
Tomas Winkler30eb2e42018-11-26 10:10:34 +02004631 /* fallthrough */
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304632 case SAM_STAT_GOOD:
4633 result |= DID_OK << 16 |
4634 COMMAND_COMPLETE << 8 |
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304635 scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304636 break;
4637 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304638 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304639 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304640 ufshcd_copy_sense_data(lrbp);
4641 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304642 break;
4643 default:
4644 result |= DID_ERROR << 16;
4645 break;
4646 } /* end of switch */
4647
4648 return result;
4649}
4650
4651/**
4652 * ufshcd_transfer_rsp_status - Get overall status of the response
4653 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004654 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304655 *
4656 * Returns result of the command to notify SCSI midlayer
4657 */
4658static inline int
4659ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4660{
4661 int result = 0;
4662 int scsi_status;
4663 int ocs;
4664
4665 /* overall command status of utrd */
4666 ocs = ufshcd_get_tr_ocs(lrbp);
4667
4668 switch (ocs) {
4669 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304670 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004671 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304672 switch (result) {
4673 case UPIU_TRANSACTION_RESPONSE:
4674 /*
4675 * get the response UPIU result to extract
4676 * the SCSI command status
4677 */
4678 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4679
4680 /*
4681 * get the result based on SCSI status response
4682 * to notify the SCSI midlayer of the command status
4683 */
4684 scsi_status = result & MASK_SCSI_STATUS;
4685 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304686
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02004687 /*
4688 * Currently we are only supporting BKOPs exception
4689 * events hence we can ignore BKOPs exception event
4690 * during power management callbacks. BKOPs exception
4691 * event is not expected to be raised in runtime suspend
4692 * callback as it allows the urgent bkops.
4693 * During system suspend, we are anyway forcefully
4694 * disabling the bkops and if urgent bkops is needed
4695 * it will be enabled on system resume. Long term
4696 * solution could be to abort the system suspend if
4697 * UFS device needs urgent BKOPs.
4698 */
4699 if (!hba->pm_op_in_progress &&
4700 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304701 schedule_work(&hba->eeh_work);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304702 break;
4703 case UPIU_TRANSACTION_REJECT_UPIU:
4704 /* TODO: handle Reject UPIU Response */
4705 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304706 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304707 "Reject UPIU not fully implemented\n");
4708 break;
4709 default:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304710 dev_err(hba->dev,
4711 "Unexpected request response code = %x\n",
4712 result);
Stanley Chue0347d82019-04-15 20:23:38 +08004713 result = DID_ERROR << 16;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304714 break;
4715 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304716 break;
4717 case OCS_ABORTED:
4718 result |= DID_ABORT << 16;
4719 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304720 case OCS_INVALID_COMMAND_STATUS:
4721 result |= DID_REQUEUE << 16;
4722 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304723 case OCS_INVALID_CMD_TABLE_ATTR:
4724 case OCS_INVALID_PRDT_ATTR:
4725 case OCS_MISMATCH_DATA_BUF_SIZE:
4726 case OCS_MISMATCH_RESP_UPIU_SIZE:
4727 case OCS_PEER_COMM_FAILURE:
4728 case OCS_FATAL_ERROR:
4729 default:
4730 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304731 dev_err(hba->dev,
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004732 "OCS error from controller = %x for tag %d\n",
4733 ocs, lrbp->task_tag);
4734 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08004735 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304736 break;
4737 } /* end of switch */
4738
Dolev Raviv66cc8202016-12-22 18:39:42 -08004739 if (host_byte(result) != DID_OK)
4740 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304741 return result;
4742}
4743
4744/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304745 * ufshcd_uic_cmd_compl - handle completion of uic command
4746 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304747 * @intr_status: interrupt status generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004748 *
4749 * Returns
4750 * IRQ_HANDLED - If interrupt is valid
4751 * IRQ_NONE - If invalid interrupt
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304752 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004753static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304754{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004755 irqreturn_t retval = IRQ_NONE;
4756
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304757 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304758 hba->active_uic_cmd->argument2 |=
4759 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304760 hba->active_uic_cmd->argument3 =
4761 ufshcd_get_dme_attr_val(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304762 complete(&hba->active_uic_cmd->done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004763 retval = IRQ_HANDLED;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304764 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304765
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004766 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004767 complete(hba->uic_async_done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004768 retval = IRQ_HANDLED;
4769 }
4770 return retval;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304771}
4772
4773/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004774 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304775 * @hba: per adapter instance
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004776 * @completed_reqs: requests to complete
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304777 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004778static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4779 unsigned long completed_reqs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304780{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304781 struct ufshcd_lrb *lrbp;
4782 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304783 int result;
4784 int index;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004785
Dolev Ravive9d501b2014-07-01 12:22:37 +03004786 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4787 lrbp = &hba->lrb[index];
4788 cmd = lrbp->cmd;
4789 if (cmd) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004790 ufshcd_add_command_trace(hba, index, "complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004791 result = ufshcd_transfer_rsp_status(hba, lrbp);
4792 scsi_dma_unmap(cmd);
4793 cmd->result = result;
4794 /* Mark completed command as NULL in LRB */
4795 lrbp->cmd = NULL;
Can Guo74a527a2019-11-25 22:53:32 -08004796 lrbp->compl_time_stamp = ktime_get();
Dolev Ravive9d501b2014-07-01 12:22:37 +03004797 /* Do not touch lrbp after scsi done */
4798 cmd->scsi_done(cmd);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004799 __ufshcd_release(hba);
Joao Pinto300bb132016-05-11 12:21:27 +01004800 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4801 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
Can Guo74a527a2019-11-25 22:53:32 -08004802 lrbp->compl_time_stamp = ktime_get();
Lee Susman1a07f2d2016-12-22 18:42:03 -08004803 if (hba->dev_cmd.complete) {
4804 ufshcd_add_command_trace(hba, index,
4805 "dev_complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004806 complete(hba->dev_cmd.complete);
Lee Susman1a07f2d2016-12-22 18:42:03 -08004807 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03004808 }
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08004809 if (ufshcd_is_clkscaling_supported(hba))
4810 hba->clk_scaling.active_reqs--;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004811 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304812
4813 /* clear corresponding bits of completed commands */
4814 hba->outstanding_reqs ^= completed_reqs;
4815
Sahitya Tummala856b3482014-09-25 15:32:34 +03004816 ufshcd_clk_scaling_update_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304817}
4818
4819/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004820 * ufshcd_transfer_req_compl - handle SCSI and query command completion
4821 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004822 *
4823 * Returns
4824 * IRQ_HANDLED - If interrupt is valid
4825 * IRQ_NONE - If invalid interrupt
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004826 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004827static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba)
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004828{
4829 unsigned long completed_reqs;
4830 u32 tr_doorbell;
4831
4832 /* Resetting interrupt aggregation counters first and reading the
4833 * DOOR_BELL afterward allows us to handle all the completed requests.
4834 * In order to prevent other interrupts starvation the DB is read once
4835 * after reset. The down side of this solution is the possibility of
4836 * false interrupt if device completes another request after resetting
4837 * aggregation and before reading the DB.
4838 */
Alim Akhtar5ac6abc2018-05-06 15:44:16 +05304839 if (ufshcd_is_intr_aggr_allowed(hba) &&
4840 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004841 ufshcd_reset_intr_aggr(hba);
4842
4843 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4844 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4845
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004846 if (completed_reqs) {
4847 __ufshcd_transfer_req_compl(hba, completed_reqs);
4848 return IRQ_HANDLED;
4849 } else {
4850 return IRQ_NONE;
4851 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004852}
4853
4854/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304855 * ufshcd_disable_ee - disable exception event
4856 * @hba: per-adapter instance
4857 * @mask: exception event to disable
4858 *
4859 * Disables exception event in the device so that the EVENT_ALERT
4860 * bit is not set.
4861 *
4862 * Returns zero on success, non-zero error value on failure.
4863 */
4864static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4865{
4866 int err = 0;
4867 u32 val;
4868
4869 if (!(hba->ee_ctrl_mask & mask))
4870 goto out;
4871
4872 val = hba->ee_ctrl_mask & ~mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004873 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004874 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304875 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4876 if (!err)
4877 hba->ee_ctrl_mask &= ~mask;
4878out:
4879 return err;
4880}
4881
4882/**
4883 * ufshcd_enable_ee - enable exception event
4884 * @hba: per-adapter instance
4885 * @mask: exception event to enable
4886 *
4887 * Enable corresponding exception event in the device to allow
4888 * device to alert host in critical scenarios.
4889 *
4890 * Returns zero on success, non-zero error value on failure.
4891 */
4892static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4893{
4894 int err = 0;
4895 u32 val;
4896
4897 if (hba->ee_ctrl_mask & mask)
4898 goto out;
4899
4900 val = hba->ee_ctrl_mask | mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004901 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004902 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304903 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4904 if (!err)
4905 hba->ee_ctrl_mask |= mask;
4906out:
4907 return err;
4908}
4909
4910/**
4911 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4912 * @hba: per-adapter instance
4913 *
4914 * Allow device to manage background operations on its own. Enabling
4915 * this might lead to inconsistent latencies during normal data transfers
4916 * as the device is allowed to manage its own way of handling background
4917 * operations.
4918 *
4919 * Returns zero on success, non-zero on failure.
4920 */
4921static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4922{
4923 int err = 0;
4924
4925 if (hba->auto_bkops_enabled)
4926 goto out;
4927
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004928 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304929 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4930 if (err) {
4931 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4932 __func__, err);
4933 goto out;
4934 }
4935
4936 hba->auto_bkops_enabled = true;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08004937 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304938
4939 /* No need of URGENT_BKOPS exception from the device */
4940 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4941 if (err)
4942 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
4943 __func__, err);
4944out:
4945 return err;
4946}
4947
4948/**
4949 * ufshcd_disable_auto_bkops - block device in doing background operations
4950 * @hba: per-adapter instance
4951 *
4952 * Disabling background operations improves command response latency but
4953 * has drawback of device moving into critical state where the device is
4954 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
4955 * host is idle so that BKOPS are managed effectively without any negative
4956 * impacts.
4957 *
4958 * Returns zero on success, non-zero on failure.
4959 */
4960static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
4961{
4962 int err = 0;
4963
4964 if (!hba->auto_bkops_enabled)
4965 goto out;
4966
4967 /*
4968 * If host assisted BKOPs is to be enabled, make sure
4969 * urgent bkops exception is allowed.
4970 */
4971 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
4972 if (err) {
4973 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
4974 __func__, err);
4975 goto out;
4976 }
4977
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004978 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304979 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4980 if (err) {
4981 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
4982 __func__, err);
4983 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4984 goto out;
4985 }
4986
4987 hba->auto_bkops_enabled = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08004988 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
Asutosh Das24366c2a2019-11-25 22:53:30 -08004989 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304990out:
4991 return err;
4992}
4993
4994/**
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08004995 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304996 * @hba: per adapter instance
4997 *
4998 * After a device reset the device may toggle the BKOPS_EN flag
4999 * to default value. The s/w tracking variables should be updated
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005000 * as well. This function would change the auto-bkops state based on
5001 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305002 */
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005003static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305004{
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005005 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5006 hba->auto_bkops_enabled = false;
5007 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5008 ufshcd_enable_auto_bkops(hba);
5009 } else {
5010 hba->auto_bkops_enabled = true;
5011 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5012 ufshcd_disable_auto_bkops(hba);
5013 }
Asutosh Das24366c2a2019-11-25 22:53:30 -08005014 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305015}
5016
5017static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5018{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005019 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305020 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5021}
5022
5023/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005024 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5025 * @hba: per-adapter instance
5026 * @status: bkops_status value
5027 *
5028 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5029 * flag in the device to permit background operations if the device
5030 * bkops_status is greater than or equal to "status" argument passed to
5031 * this function, disable otherwise.
5032 *
5033 * Returns 0 for success, non-zero in case of failure.
5034 *
5035 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5036 * to know whether auto bkops is enabled or disabled after this function
5037 * returns control to it.
5038 */
5039static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5040 enum bkops_status status)
5041{
5042 int err;
5043 u32 curr_status = 0;
5044
5045 err = ufshcd_get_bkops_status(hba, &curr_status);
5046 if (err) {
5047 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5048 __func__, err);
5049 goto out;
5050 } else if (curr_status > BKOPS_STATUS_MAX) {
5051 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5052 __func__, curr_status);
5053 err = -EINVAL;
5054 goto out;
5055 }
5056
5057 if (curr_status >= status)
5058 err = ufshcd_enable_auto_bkops(hba);
5059 else
5060 err = ufshcd_disable_auto_bkops(hba);
Asutosh Das24366c2a2019-11-25 22:53:30 -08005061 hba->urgent_bkops_lvl = curr_status;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005062out:
5063 return err;
5064}
5065
5066/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305067 * ufshcd_urgent_bkops - handle urgent bkops exception event
5068 * @hba: per-adapter instance
5069 *
5070 * Enable fBackgroundOpsEn flag in the device to permit background
5071 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005072 *
5073 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5074 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305075 */
5076static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5077{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005078 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305079}
5080
5081static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5082{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005083 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305084 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5085}
5086
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005087static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5088{
5089 int err;
5090 u32 curr_status = 0;
5091
5092 if (hba->is_urgent_bkops_lvl_checked)
5093 goto enable_auto_bkops;
5094
5095 err = ufshcd_get_bkops_status(hba, &curr_status);
5096 if (err) {
5097 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5098 __func__, err);
5099 goto out;
5100 }
5101
5102 /*
5103 * We are seeing that some devices are raising the urgent bkops
5104 * exception events even when BKOPS status doesn't indicate performace
5105 * impacted or critical. Handle these device by determining their urgent
5106 * bkops status at runtime.
5107 */
5108 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5109 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5110 __func__, curr_status);
5111 /* update the current status as the urgent bkops level */
5112 hba->urgent_bkops_lvl = curr_status;
5113 hba->is_urgent_bkops_lvl_checked = true;
5114 }
5115
5116enable_auto_bkops:
5117 err = ufshcd_enable_auto_bkops(hba);
5118out:
5119 if (err < 0)
5120 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5121 __func__, err);
5122}
5123
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305124/**
5125 * ufshcd_exception_event_handler - handle exceptions raised by device
5126 * @work: pointer to work data
5127 *
5128 * Read bExceptionEventStatus attribute from the device and handle the
5129 * exception event accordingly.
5130 */
5131static void ufshcd_exception_event_handler(struct work_struct *work)
5132{
5133 struct ufs_hba *hba;
5134 int err;
5135 u32 status = 0;
5136 hba = container_of(work, struct ufs_hba, eeh_work);
5137
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305138 pm_runtime_get_sync(hba->dev);
Maya Erez2e3611e92018-05-03 16:37:16 +05305139 scsi_block_requests(hba->host);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305140 err = ufshcd_get_ee_status(hba, &status);
5141 if (err) {
5142 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5143 __func__, err);
5144 goto out;
5145 }
5146
5147 status &= hba->ee_ctrl_mask;
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005148
5149 if (status & MASK_EE_URGENT_BKOPS)
5150 ufshcd_bkops_exception_event_handler(hba);
5151
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305152out:
Maya Erez2e3611e92018-05-03 16:37:16 +05305153 scsi_unblock_requests(hba->host);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305154 pm_runtime_put_sync(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305155 return;
5156}
5157
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005158/* Complete requests that have door-bell cleared */
5159static void ufshcd_complete_requests(struct ufs_hba *hba)
5160{
5161 ufshcd_transfer_req_compl(hba);
5162 ufshcd_tmc_handler(hba);
5163}
5164
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305165/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02005166 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5167 * to recover from the DL NAC errors or not.
5168 * @hba: per-adapter instance
5169 *
5170 * Returns true if error handling is required, false otherwise
5171 */
5172static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5173{
5174 unsigned long flags;
5175 bool err_handling = true;
5176
5177 spin_lock_irqsave(hba->host->host_lock, flags);
5178 /*
5179 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5180 * device fatal error and/or DL NAC & REPLAY timeout errors.
5181 */
5182 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5183 goto out;
5184
5185 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5186 ((hba->saved_err & UIC_ERROR) &&
5187 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5188 goto out;
5189
5190 if ((hba->saved_err & UIC_ERROR) &&
5191 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5192 int err;
5193 /*
5194 * wait for 50ms to see if we can get any other errors or not.
5195 */
5196 spin_unlock_irqrestore(hba->host->host_lock, flags);
5197 msleep(50);
5198 spin_lock_irqsave(hba->host->host_lock, flags);
5199
5200 /*
5201 * now check if we have got any other severe errors other than
5202 * DL NAC error?
5203 */
5204 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5205 ((hba->saved_err & UIC_ERROR) &&
5206 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5207 goto out;
5208
5209 /*
5210 * As DL NAC is the only error received so far, send out NOP
5211 * command to confirm if link is still active or not.
5212 * - If we don't get any response then do error recovery.
5213 * - If we get response then clear the DL NAC error bit.
5214 */
5215
5216 spin_unlock_irqrestore(hba->host->host_lock, flags);
5217 err = ufshcd_verify_dev_init(hba);
5218 spin_lock_irqsave(hba->host->host_lock, flags);
5219
5220 if (err)
5221 goto out;
5222
5223 /* Link seems to be alive hence ignore the DL NAC errors */
5224 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5225 hba->saved_err &= ~UIC_ERROR;
5226 /* clear NAC error */
5227 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5228 if (!hba->saved_uic_err) {
5229 err_handling = false;
5230 goto out;
5231 }
5232 }
5233out:
5234 spin_unlock_irqrestore(hba->host->host_lock, flags);
5235 return err_handling;
5236}
5237
5238/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305239 * ufshcd_err_handler - handle UFS errors that require s/w attention
5240 * @work: pointer to work structure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305241 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305242static void ufshcd_err_handler(struct work_struct *work)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305243{
5244 struct ufs_hba *hba;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305245 unsigned long flags;
5246 u32 err_xfer = 0;
5247 u32 err_tm = 0;
5248 int err = 0;
5249 int tag;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005250 bool needs_reset = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305251
5252 hba = container_of(work, struct ufs_hba, eh_work);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305253
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305254 pm_runtime_get_sync(hba->dev);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005255 ufshcd_hold(hba, false);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305256
5257 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005258 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305259 goto out;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305260
5261 hba->ufshcd_state = UFSHCD_STATE_RESET;
5262 ufshcd_set_eh_in_progress(hba);
5263
5264 /* Complete requests that have door-bell cleared by h/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005265 ufshcd_complete_requests(hba);
Yaniv Gardi583fa622016-03-10 17:37:13 +02005266
5267 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5268 bool ret;
5269
5270 spin_unlock_irqrestore(hba->host->host_lock, flags);
5271 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5272 ret = ufshcd_quirk_dl_nac_errors(hba);
5273 spin_lock_irqsave(hba->host->host_lock, flags);
5274 if (!ret)
5275 goto skip_err_handling;
5276 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005277 if ((hba->saved_err & INT_FATAL_ERRORS) ||
Stanley Chu82174442019-05-21 14:44:54 +08005278 (hba->saved_err & UFSHCD_UIC_HIBERN8_MASK) ||
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005279 ((hba->saved_err & UIC_ERROR) &&
5280 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5281 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5282 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5283 needs_reset = true;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305284
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005285 /*
5286 * if host reset is required then skip clearing the pending
5287 * transfers forcefully because they will automatically get
5288 * cleared after link startup.
5289 */
5290 if (needs_reset)
5291 goto skip_pending_xfer_clear;
5292
5293 /* release lock as clear command might sleep */
5294 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305295 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005296 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5297 if (ufshcd_clear_cmd(hba, tag)) {
5298 err_xfer = true;
5299 goto lock_skip_pending_xfer_clear;
5300 }
5301 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305302
5303 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005304 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5305 if (ufshcd_clear_tm_cmd(hba, tag)) {
5306 err_tm = true;
5307 goto lock_skip_pending_xfer_clear;
5308 }
5309 }
5310
5311lock_skip_pending_xfer_clear:
5312 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305313
5314 /* Complete the requests that are cleared by s/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005315 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305316
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005317 if (err_xfer || err_tm)
5318 needs_reset = true;
5319
5320skip_pending_xfer_clear:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305321 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005322 if (needs_reset) {
5323 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5324
5325 /*
5326 * ufshcd_reset_and_restore() does the link reinitialization
5327 * which will need atleast one empty doorbell slot to send the
5328 * device management commands (NOP and query commands).
5329 * If there is no slot empty at this moment then free up last
5330 * slot forcefully.
5331 */
5332 if (hba->outstanding_reqs == max_doorbells)
5333 __ufshcd_transfer_req_compl(hba,
5334 (1UL << (hba->nutrs - 1)));
5335
5336 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305337 err = ufshcd_reset_and_restore(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005338 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305339 if (err) {
5340 dev_err(hba->dev, "%s: reset and restore failed\n",
5341 __func__);
5342 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5343 }
5344 /*
5345 * Inform scsi mid-layer that we did reset and allow to handle
5346 * Unit Attention properly.
5347 */
5348 scsi_report_bus_reset(hba->host, 0);
5349 hba->saved_err = 0;
5350 hba->saved_uic_err = 0;
5351 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005352
Yaniv Gardi583fa622016-03-10 17:37:13 +02005353skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005354 if (!needs_reset) {
5355 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5356 if (hba->saved_err || hba->saved_uic_err)
5357 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5358 __func__, hba->saved_err, hba->saved_uic_err);
5359 }
5360
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305361 ufshcd_clear_eh_in_progress(hba);
5362
5363out:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005364 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani38135532018-05-03 16:37:18 +05305365 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005366 ufshcd_release(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305367 pm_runtime_put_sync(hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305368}
5369
5370/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305371 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5372 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005373 *
5374 * Returns
5375 * IRQ_HANDLED - If interrupt is valid
5376 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305377 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005378static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305379{
5380 u32 reg;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005381 irqreturn_t retval = IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305382
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005383 /* PHY layer lane error */
5384 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5385 /* Ignore LINERESET indication, as this is not an error */
5386 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005387 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005388 /*
5389 * To know whether this error is fatal or not, DB timeout
5390 * must be checked but this error is handled separately.
5391 */
5392 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
Stanley Chu48d5b972019-07-10 21:38:18 +08005393 ufshcd_update_reg_hist(&hba->ufs_stats.pa_err, reg);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005394 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005395 }
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005396
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305397 /* PA_INIT_ERROR is fatal and needs UIC reset */
5398 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005399 if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
5400 (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005401 ufshcd_update_reg_hist(&hba->ufs_stats.dl_err, reg);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005402
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005403 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5404 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
5405 else if (hba->dev_quirks &
5406 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5407 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5408 hba->uic_error |=
5409 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5410 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5411 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5412 }
5413 retval |= IRQ_HANDLED;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005414 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305415
5416 /* UIC NL/TL/DME errors needs software retry */
5417 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005418 if ((reg & UIC_NETWORK_LAYER_ERROR) &&
5419 (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005420 ufshcd_update_reg_hist(&hba->ufs_stats.nl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305421 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005422 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005423 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305424
5425 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005426 if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
5427 (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005428 ufshcd_update_reg_hist(&hba->ufs_stats.tl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305429 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005430 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005431 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305432
5433 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005434 if ((reg & UIC_DME_ERROR) &&
5435 (reg & UIC_DME_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005436 ufshcd_update_reg_hist(&hba->ufs_stats.dme_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305437 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005438 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005439 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305440
5441 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5442 __func__, hba->uic_error);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005443 return retval;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305444}
5445
Stanley Chu82174442019-05-21 14:44:54 +08005446static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5447 u32 intr_mask)
5448{
5449 if (!ufshcd_is_auto_hibern8_supported(hba))
5450 return false;
5451
5452 if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5453 return false;
5454
5455 if (hba->active_uic_cmd &&
5456 (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5457 hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5458 return false;
5459
5460 return true;
5461}
5462
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305463/**
5464 * ufshcd_check_errors - Check for errors that need s/w attention
5465 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005466 *
5467 * Returns
5468 * IRQ_HANDLED - If interrupt is valid
5469 * IRQ_NONE - If invalid interrupt
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305470 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005471static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305472{
5473 bool queue_eh_work = false;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005474 irqreturn_t retval = IRQ_NONE;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305475
Stanley Chud3c615b2019-07-10 21:38:19 +08005476 if (hba->errors & INT_FATAL_ERRORS) {
5477 ufshcd_update_reg_hist(&hba->ufs_stats.fatal_err, hba->errors);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305478 queue_eh_work = true;
Stanley Chud3c615b2019-07-10 21:38:19 +08005479 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305480
5481 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305482 hba->uic_error = 0;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005483 retval = ufshcd_update_uic_error(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305484 if (hba->uic_error)
5485 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305486 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305487
Stanley Chu82174442019-05-21 14:44:54 +08005488 if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
5489 dev_err(hba->dev,
5490 "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
5491 __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
5492 "Enter" : "Exit",
5493 hba->errors, ufshcd_get_upmcrs(hba));
Stanley Chud3c615b2019-07-10 21:38:19 +08005494 ufshcd_update_reg_hist(&hba->ufs_stats.auto_hibern8_err,
5495 hba->errors);
Stanley Chu82174442019-05-21 14:44:54 +08005496 queue_eh_work = true;
5497 }
5498
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305499 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005500 /*
5501 * update the transfer error masks to sticky bits, let's do this
5502 * irrespective of current ufshcd_state.
5503 */
5504 hba->saved_err |= hba->errors;
5505 hba->saved_uic_err |= hba->uic_error;
5506
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305507 /* handle fatal errors only when link is functional */
5508 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5509 /* block commands from scsi mid-layer */
Subhash Jadavani38135532018-05-03 16:37:18 +05305510 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305511
Zang Leigang141f8162016-11-16 11:29:37 +08005512 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
Dolev Raviv66cc8202016-12-22 18:39:42 -08005513
5514 /* dump controller state before resetting */
5515 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5516 bool pr_prdt = !!(hba->saved_err &
5517 SYSTEM_BUS_FATAL_ERROR);
5518
5519 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5520 __func__, hba->saved_err,
5521 hba->saved_uic_err);
5522
5523 ufshcd_print_host_regs(hba);
5524 ufshcd_print_pwr_info(hba);
5525 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5526 ufshcd_print_trs(hba, hba->outstanding_reqs,
5527 pr_prdt);
5528 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305529 schedule_work(&hba->eh_work);
5530 }
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005531 retval |= IRQ_HANDLED;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305532 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305533 /*
5534 * if (!queue_eh_work) -
5535 * Other errors are either non-fatal where host recovers
5536 * itself without s/w intervention or errors that will be
5537 * handled by the SCSI core layer.
5538 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005539 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305540}
5541
Bart Van Assche69a6c262019-12-09 10:13:09 -08005542struct ctm_info {
5543 struct ufs_hba *hba;
5544 unsigned long pending;
5545 unsigned int ncpl;
5546};
5547
5548static bool ufshcd_compl_tm(struct request *req, void *priv, bool reserved)
5549{
5550 struct ctm_info *const ci = priv;
5551 struct completion *c;
5552
5553 WARN_ON_ONCE(reserved);
5554 if (test_bit(req->tag, &ci->pending))
5555 return true;
5556 ci->ncpl++;
5557 c = req->end_io_data;
5558 if (c)
5559 complete(c);
5560 return true;
5561}
5562
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305563/**
5564 * ufshcd_tmc_handler - handle task management function completion
5565 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005566 *
5567 * Returns
5568 * IRQ_HANDLED - If interrupt is valid
5569 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305570 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005571static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305572{
Bart Van Assche69a6c262019-12-09 10:13:09 -08005573 struct request_queue *q = hba->tmf_queue;
5574 struct ctm_info ci = {
5575 .hba = hba,
5576 .pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL),
5577 };
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305578
Bart Van Assche69a6c262019-12-09 10:13:09 -08005579 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_compl_tm, &ci);
5580 return ci.ncpl ? IRQ_HANDLED : IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305581}
5582
5583/**
5584 * ufshcd_sl_intr - Interrupt service routine
5585 * @hba: per adapter instance
5586 * @intr_status: contains interrupts generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005587 *
5588 * Returns
5589 * IRQ_HANDLED - If interrupt is valid
5590 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305591 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005592static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305593{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005594 irqreturn_t retval = IRQ_NONE;
5595
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305596 hba->errors = UFSHCD_ERROR_MASK & intr_status;
Stanley Chu82174442019-05-21 14:44:54 +08005597
5598 if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5599 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5600
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305601 if (hba->errors)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005602 retval |= ufshcd_check_errors(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305603
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305604 if (intr_status & UFSHCD_UIC_MASK)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005605 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305606
5607 if (intr_status & UTP_TASK_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005608 retval |= ufshcd_tmc_handler(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305609
5610 if (intr_status & UTP_TRANSFER_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005611 retval |= ufshcd_transfer_req_compl(hba);
5612
5613 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305614}
5615
5616/**
5617 * ufshcd_intr - Main interrupt service routine
5618 * @irq: irq number
5619 * @__hba: pointer to adapter instance
5620 *
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005621 * Returns
5622 * IRQ_HANDLED - If interrupt is valid
5623 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305624 */
5625static irqreturn_t ufshcd_intr(int irq, void *__hba)
5626{
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005627 u32 intr_status, enabled_intr_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305628 irqreturn_t retval = IRQ_NONE;
5629 struct ufs_hba *hba = __hba;
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305630 int retries = hba->nutrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305631
5632 spin_lock(hba->host->host_lock);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305633 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305634
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305635 /*
5636 * There could be max of hba->nutrs reqs in flight and in worst case
5637 * if the reqs get finished 1 by 1 after the interrupt status is
5638 * read, make sure we handle them by checking the interrupt status
5639 * again in a loop until we process all of the reqs before returning.
5640 */
5641 do {
5642 enabled_intr_status =
5643 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5644 if (intr_status)
5645 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005646 if (enabled_intr_status)
5647 retval |= ufshcd_sl_intr(hba, enabled_intr_status);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005648
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305649 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5650 } while (intr_status && --retries);
5651
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005652 if (retval == IRQ_NONE) {
5653 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x\n",
5654 __func__, intr_status);
5655 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
5656 }
5657
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305658 spin_unlock(hba->host->host_lock);
5659 return retval;
5660}
5661
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305662static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5663{
5664 int err = 0;
5665 u32 mask = 1 << tag;
5666 unsigned long flags;
5667
5668 if (!test_bit(tag, &hba->outstanding_tasks))
5669 goto out;
5670
5671 spin_lock_irqsave(hba->host->host_lock, flags);
Alim Akhtar1399c5b2018-05-06 15:44:15 +05305672 ufshcd_utmrl_clear(hba, tag);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305673 spin_unlock_irqrestore(hba->host->host_lock, flags);
5674
5675 /* poll for max. 1 sec to clear door bell register by h/w */
5676 err = ufshcd_wait_for_register(hba,
5677 REG_UTP_TASK_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02005678 mask, 0, 1000, 1000, true);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305679out:
5680 return err;
5681}
5682
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005683static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
5684 struct utp_task_req_desc *treq, u8 tm_function)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305685{
Bart Van Assche69a6c262019-12-09 10:13:09 -08005686 struct request_queue *q = hba->tmf_queue;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005687 struct Scsi_Host *host = hba->host;
Bart Van Assche69a6c262019-12-09 10:13:09 -08005688 DECLARE_COMPLETION_ONSTACK(wait);
5689 struct request *req;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305690 unsigned long flags;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005691 int free_slot, task_tag, err;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305692
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305693 /*
5694 * Get free slot, sleep if slots are unavailable.
5695 * Even though we use wait_event() which sleeps indefinitely,
5696 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5697 */
Bart Van Assche69a6c262019-12-09 10:13:09 -08005698 req = blk_get_request(q, REQ_OP_DRV_OUT, BLK_MQ_REQ_RESERVED);
5699 req->end_io_data = &wait;
5700 free_slot = req->tag;
5701 WARN_ON_ONCE(free_slot < 0 || free_slot >= hba->nutmrs);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005702 ufshcd_hold(hba, false);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305703
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305704 spin_lock_irqsave(host->host_lock, flags);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305705 task_tag = hba->nutrs + free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305706
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005707 treq->req_header.dword_0 |= cpu_to_be32(task_tag);
5708
5709 memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
Kiwoong Kimd2877be2016-11-10 21:16:15 +09005710 ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5711
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305712 /* send command to the controller */
5713 __set_bit(free_slot, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02005714
5715 /* Make sure descriptors are ready before ringing the task doorbell */
5716 wmb();
5717
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305718 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07005719 /* Make sure that doorbell is committed immediately */
5720 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305721
5722 spin_unlock_irqrestore(host->host_lock, flags);
5723
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005724 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");
5725
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305726 /* wait until the task management command is completed */
Bart Van Assche69a6c262019-12-09 10:13:09 -08005727 err = wait_for_completion_io_timeout(&wait,
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305728 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305729 if (!err) {
Bart Van Assche69a6c262019-12-09 10:13:09 -08005730 /*
5731 * Make sure that ufshcd_compl_tm() does not trigger a
5732 * use-after-free.
5733 */
5734 req->end_io_data = NULL;
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005735 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305736 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5737 __func__, tm_function);
5738 if (ufshcd_clear_tm_cmd(hba, free_slot))
5739 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5740 __func__, free_slot);
5741 err = -ETIMEDOUT;
5742 } else {
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005743 err = 0;
5744 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));
5745
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005746 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305747 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305748
Stanley Chub5572172019-08-19 21:43:28 +08005749 spin_lock_irqsave(hba->host->host_lock, flags);
5750 __clear_bit(free_slot, &hba->outstanding_tasks);
5751 spin_unlock_irqrestore(hba->host->host_lock, flags);
5752
Bart Van Assche69a6c262019-12-09 10:13:09 -08005753 blk_put_request(req);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305754
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005755 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305756 return err;
5757}
5758
5759/**
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005760 * ufshcd_issue_tm_cmd - issues task management commands to controller
5761 * @hba: per adapter instance
5762 * @lun_id: LUN ID to which TM command is sent
5763 * @task_id: task ID to which the TM command is applicable
5764 * @tm_function: task management function opcode
5765 * @tm_response: task management service response return value
5766 *
5767 * Returns non-zero value on error, zero on success.
5768 */
5769static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5770 u8 tm_function, u8 *tm_response)
5771{
5772 struct utp_task_req_desc treq = { { 0 }, };
5773 int ocs_value, err;
5774
5775 /* Configure task request descriptor */
5776 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5777 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5778
5779 /* Configure task request UPIU */
5780 treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
5781 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
5782 treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);
5783
5784 /*
5785 * The host shall provide the same value for LUN field in the basic
5786 * header and for Input Parameter.
5787 */
5788 treq.input_param1 = cpu_to_be32(lun_id);
5789 treq.input_param2 = cpu_to_be32(task_id);
5790
5791 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
5792 if (err == -ETIMEDOUT)
5793 return err;
5794
5795 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5796 if (ocs_value != OCS_SUCCESS)
5797 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
5798 __func__, ocs_value);
5799 else if (tm_response)
5800 *tm_response = be32_to_cpu(treq.output_param1) &
5801 MASK_TM_SERVICE_RESP;
5802 return err;
5803}
5804
5805/**
Avri Altman5e0a86e2018-10-07 17:30:37 +03005806 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
5807 * @hba: per-adapter instance
5808 * @req_upiu: upiu request
5809 * @rsp_upiu: upiu reply
Avri Altman5e0a86e2018-10-07 17:30:37 +03005810 * @desc_buff: pointer to descriptor buffer, NULL if NA
5811 * @buff_len: descriptor size, 0 if NA
Bart Van Assched0e97602019-10-29 16:07:08 -07005812 * @cmd_type: specifies the type (NOP, Query...)
Avri Altman5e0a86e2018-10-07 17:30:37 +03005813 * @desc_op: descriptor operation
5814 *
5815 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
5816 * Therefore, it "rides" the device management infrastructure: uses its tag and
5817 * tasks work queues.
5818 *
5819 * Since there is only one available tag for device management commands,
5820 * the caller is expected to hold the hba->dev_cmd.lock mutex.
5821 */
5822static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
5823 struct utp_upiu_req *req_upiu,
5824 struct utp_upiu_req *rsp_upiu,
5825 u8 *desc_buff, int *buff_len,
Bart Van Assche7f674c32019-10-29 16:07:09 -07005826 enum dev_cmd_type cmd_type,
Avri Altman5e0a86e2018-10-07 17:30:37 +03005827 enum query_opcode desc_op)
5828{
Bart Van Assche7252a362019-12-09 10:13:08 -08005829 struct request_queue *q = hba->cmd_queue;
5830 struct request *req;
Avri Altman5e0a86e2018-10-07 17:30:37 +03005831 struct ufshcd_lrb *lrbp;
5832 int err = 0;
5833 int tag;
5834 struct completion wait;
5835 unsigned long flags;
5836 u32 upiu_flags;
5837
5838 down_read(&hba->clk_scaling_lock);
5839
Bart Van Assche7252a362019-12-09 10:13:08 -08005840 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
5841 if (IS_ERR(req))
5842 return PTR_ERR(req);
5843 tag = req->tag;
5844 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
Avri Altman5e0a86e2018-10-07 17:30:37 +03005845
5846 init_completion(&wait);
5847 lrbp = &hba->lrb[tag];
5848 WARN_ON(lrbp->cmd);
5849
5850 lrbp->cmd = NULL;
5851 lrbp->sense_bufflen = 0;
5852 lrbp->sense_buffer = NULL;
5853 lrbp->task_tag = tag;
5854 lrbp->lun = 0;
5855 lrbp->intr_cmd = true;
5856 hba->dev_cmd.type = cmd_type;
5857
5858 switch (hba->ufs_version) {
5859 case UFSHCI_VERSION_10:
5860 case UFSHCI_VERSION_11:
5861 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
5862 break;
5863 default:
5864 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
5865 break;
5866 }
5867
5868 /* update the task tag in the request upiu */
5869 req_upiu->header.dword_0 |= cpu_to_be32(tag);
5870
5871 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
5872
5873 /* just copy the upiu request as it is */
5874 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
5875 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
5876 /* The Data Segment Area is optional depending upon the query
5877 * function value. for WRITE DESCRIPTOR, the data segment
5878 * follows right after the tsf.
5879 */
5880 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
5881 *buff_len = 0;
5882 }
5883
5884 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
5885
5886 hba->dev_cmd.complete = &wait;
5887
5888 /* Make sure descriptors are ready before ringing the doorbell */
5889 wmb();
5890 spin_lock_irqsave(hba->host->host_lock, flags);
5891 ufshcd_send_command(hba, tag);
5892 spin_unlock_irqrestore(hba->host->host_lock, flags);
5893
5894 /*
5895 * ignore the returning value here - ufshcd_check_query_response is
5896 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
5897 * read the response directly ignoring all errors.
5898 */
5899 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
5900
5901 /* just copy the upiu response as it is */
5902 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
Avri Altman4bbbe242019-02-20 09:11:13 +02005903 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
5904 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
5905 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
5906 MASK_QUERY_DATA_SEG_LEN;
5907
5908 if (*buff_len >= resp_len) {
5909 memcpy(desc_buff, descp, resp_len);
5910 *buff_len = resp_len;
5911 } else {
Bean Huo3d4881d2019-11-12 23:34:35 +01005912 dev_warn(hba->dev,
5913 "%s: rsp size %d is bigger than buffer size %d",
5914 __func__, resp_len, *buff_len);
Avri Altman4bbbe242019-02-20 09:11:13 +02005915 *buff_len = 0;
5916 err = -EINVAL;
5917 }
5918 }
Avri Altman5e0a86e2018-10-07 17:30:37 +03005919
Bart Van Assche7252a362019-12-09 10:13:08 -08005920 blk_put_request(req);
Avri Altman5e0a86e2018-10-07 17:30:37 +03005921 up_read(&hba->clk_scaling_lock);
5922 return err;
5923}
5924
5925/**
5926 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
5927 * @hba: per-adapter instance
5928 * @req_upiu: upiu request
5929 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
5930 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
5931 * @desc_buff: pointer to descriptor buffer, NULL if NA
5932 * @buff_len: descriptor size, 0 if NA
5933 * @desc_op: descriptor operation
5934 *
5935 * Supports UTP Transfer requests (nop and query), and UTP Task
5936 * Management requests.
5937 * It is up to the caller to fill the upiu conent properly, as it will
5938 * be copied without any further input validations.
5939 */
5940int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
5941 struct utp_upiu_req *req_upiu,
5942 struct utp_upiu_req *rsp_upiu,
5943 int msgcode,
5944 u8 *desc_buff, int *buff_len,
5945 enum query_opcode desc_op)
5946{
5947 int err;
Bart Van Assche7f674c32019-10-29 16:07:09 -07005948 enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
Avri Altman5e0a86e2018-10-07 17:30:37 +03005949 struct utp_task_req_desc treq = { { 0 }, };
5950 int ocs_value;
5951 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
5952
Avri Altman5e0a86e2018-10-07 17:30:37 +03005953 switch (msgcode) {
5954 case UPIU_TRANSACTION_NOP_OUT:
5955 cmd_type = DEV_CMD_TYPE_NOP;
5956 /* fall through */
5957 case UPIU_TRANSACTION_QUERY_REQ:
5958 ufshcd_hold(hba, false);
5959 mutex_lock(&hba->dev_cmd.lock);
5960 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
5961 desc_buff, buff_len,
5962 cmd_type, desc_op);
5963 mutex_unlock(&hba->dev_cmd.lock);
5964 ufshcd_release(hba);
5965
5966 break;
5967 case UPIU_TRANSACTION_TASK_REQ:
5968 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5969 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5970
5971 memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));
5972
5973 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
5974 if (err == -ETIMEDOUT)
5975 break;
5976
5977 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5978 if (ocs_value != OCS_SUCCESS) {
5979 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
5980 ocs_value);
5981 break;
5982 }
5983
5984 memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));
5985
5986 break;
5987 default:
5988 err = -EINVAL;
5989
5990 break;
5991 }
5992
Avri Altman5e0a86e2018-10-07 17:30:37 +03005993 return err;
5994}
5995
5996/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305997 * ufshcd_eh_device_reset_handler - device reset handler registered to
5998 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305999 * @cmd: SCSI command pointer
6000 *
6001 * Returns SUCCESS/FAILED
6002 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306003static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306004{
6005 struct Scsi_Host *host;
6006 struct ufs_hba *hba;
6007 unsigned int tag;
6008 u32 pos;
6009 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306010 u8 resp = 0xF;
6011 struct ufshcd_lrb *lrbp;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306012 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306013
6014 host = cmd->device->host;
6015 hba = shost_priv(host);
6016 tag = cmd->request->tag;
6017
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306018 lrbp = &hba->lrb[tag];
6019 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
6020 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306021 if (!err)
6022 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306023 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306024 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306025
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306026 /* clear the commands that were pending for corresponding LUN */
6027 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6028 if (hba->lrb[pos].lun == lrbp->lun) {
6029 err = ufshcd_clear_cmd(hba, pos);
6030 if (err)
6031 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306032 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306033 }
6034 spin_lock_irqsave(host->host_lock, flags);
6035 ufshcd_transfer_req_compl(hba);
6036 spin_unlock_irqrestore(host->host_lock, flags);
Gilad Broner7fabb772017-02-03 16:56:50 -08006037
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306038out:
Gilad Broner7fabb772017-02-03 16:56:50 -08006039 hba->req_abort_count = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08006040 ufshcd_update_reg_hist(&hba->ufs_stats.dev_reset, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306041 if (!err) {
6042 err = SUCCESS;
6043 } else {
6044 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6045 err = FAILED;
6046 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306047 return err;
6048}
6049
Gilad Bronere0b299e2017-02-03 16:56:40 -08006050static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6051{
6052 struct ufshcd_lrb *lrbp;
6053 int tag;
6054
6055 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6056 lrbp = &hba->lrb[tag];
6057 lrbp->req_abort_skip = true;
6058 }
6059}
6060
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306061/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306062 * ufshcd_abort - abort a specific command
6063 * @cmd: SCSI command pointer
6064 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306065 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6066 * command, and in host controller by clearing the door-bell register. There can
6067 * be race between controller sending the command to the device while abort is
6068 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6069 * really issued and then try to abort it.
6070 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306071 * Returns SUCCESS/FAILED
6072 */
6073static int ufshcd_abort(struct scsi_cmnd *cmd)
6074{
6075 struct Scsi_Host *host;
6076 struct ufs_hba *hba;
6077 unsigned long flags;
6078 unsigned int tag;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306079 int err = 0;
6080 int poll_cnt;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306081 u8 resp = 0xF;
6082 struct ufshcd_lrb *lrbp;
Dolev Ravive9d501b2014-07-01 12:22:37 +03006083 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306084
6085 host = cmd->device->host;
6086 hba = shost_priv(host);
6087 tag = cmd->request->tag;
Dolev Ravive7d38252016-12-22 18:40:07 -08006088 lrbp = &hba->lrb[tag];
Yaniv Gardi14497322016-02-01 15:02:39 +02006089 if (!ufshcd_valid_tag(hba, tag)) {
6090 dev_err(hba->dev,
6091 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
6092 __func__, tag, cmd, cmd->request);
6093 BUG();
6094 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306095
Dolev Ravive7d38252016-12-22 18:40:07 -08006096 /*
6097 * Task abort to the device W-LUN is illegal. When this command
6098 * will fail, due to spec violation, scsi err handling next step
6099 * will be to send LU reset which, again, is a spec violation.
6100 * To avoid these unnecessary/illegal step we skip to the last error
6101 * handling stage: reset and restore.
6102 */
6103 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
6104 return ufshcd_eh_host_reset_handler(cmd);
6105
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006106 ufshcd_hold(hba, false);
Dolev Ravive9d501b2014-07-01 12:22:37 +03006107 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Yaniv Gardi14497322016-02-01 15:02:39 +02006108 /* If command is already aborted/completed, return SUCCESS */
6109 if (!(test_bit(tag, &hba->outstanding_reqs))) {
6110 dev_err(hba->dev,
6111 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
6112 __func__, tag, hba->outstanding_reqs, reg);
6113 goto out;
6114 }
6115
Dolev Ravive9d501b2014-07-01 12:22:37 +03006116 if (!(reg & (1 << tag))) {
6117 dev_err(hba->dev,
6118 "%s: cmd was completed, but without a notifying intr, tag = %d",
6119 __func__, tag);
6120 }
6121
Dolev Raviv66cc8202016-12-22 18:39:42 -08006122 /* Print Transfer Request of aborted task */
6123 dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
Dolev Raviv66cc8202016-12-22 18:39:42 -08006124
Gilad Broner7fabb772017-02-03 16:56:50 -08006125 /*
6126 * Print detailed info about aborted request.
6127 * As more than one request might get aborted at the same time,
6128 * print full information only for the first aborted request in order
6129 * to reduce repeated printouts. For other aborted requests only print
6130 * basic details.
6131 */
6132 scsi_print_command(hba->lrb[tag].cmd);
6133 if (!hba->req_abort_count) {
Stanley Chu8808b4e2019-07-10 21:38:21 +08006134 ufshcd_update_reg_hist(&hba->ufs_stats.task_abort, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08006135 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08006136 ufshcd_print_host_state(hba);
Gilad Broner7fabb772017-02-03 16:56:50 -08006137 ufshcd_print_pwr_info(hba);
6138 ufshcd_print_trs(hba, 1 << tag, true);
6139 } else {
6140 ufshcd_print_trs(hba, 1 << tag, false);
6141 }
6142 hba->req_abort_count++;
Gilad Bronere0b299e2017-02-03 16:56:40 -08006143
6144 /* Skip task abort in case previous aborts failed and report failure */
6145 if (lrbp->req_abort_skip) {
6146 err = -EIO;
6147 goto out;
6148 }
6149
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306150 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6151 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6152 UFS_QUERY_TASK, &resp);
6153 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6154 /* cmd pending in the device */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006155 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6156 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306157 break;
6158 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306159 /*
6160 * cmd not pending in the device, check if it is
6161 * in transition.
6162 */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006163 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6164 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306165 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6166 if (reg & (1 << tag)) {
6167 /* sleep for max. 200us to stabilize */
6168 usleep_range(100, 200);
6169 continue;
6170 }
6171 /* command completed already */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006172 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6173 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306174 goto out;
6175 } else {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006176 dev_err(hba->dev,
6177 "%s: no response from device. tag = %d, err %d\n",
6178 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306179 if (!err)
6180 err = resp; /* service response error */
6181 goto out;
6182 }
6183 }
6184
6185 if (!poll_cnt) {
6186 err = -EBUSY;
6187 goto out;
6188 }
6189
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306190 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6191 UFS_ABORT_TASK, &resp);
6192 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006193 if (!err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306194 err = resp; /* service response error */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006195 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6196 __func__, tag, err);
6197 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306198 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306199 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306200
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306201 err = ufshcd_clear_cmd(hba, tag);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006202 if (err) {
6203 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6204 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306205 goto out;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006206 }
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306207
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306208 scsi_dma_unmap(cmd);
6209
6210 spin_lock_irqsave(host->host_lock, flags);
Yaniv Gardia48353f2016-02-01 15:02:40 +02006211 ufshcd_outstanding_req_clear(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306212 hba->lrb[tag].cmd = NULL;
6213 spin_unlock_irqrestore(host->host_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306214
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306215out:
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306216 if (!err) {
6217 err = SUCCESS;
6218 } else {
6219 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Gilad Bronere0b299e2017-02-03 16:56:40 -08006220 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306221 err = FAILED;
6222 }
6223
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006224 /*
6225 * This ufshcd_release() corresponds to the original scsi cmd that got
6226 * aborted here (as we won't get any IRQ for it).
6227 */
6228 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306229 return err;
6230}
6231
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306232/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306233 * ufshcd_host_reset_and_restore - reset and restore host controller
6234 * @hba: per-adapter instance
6235 *
6236 * Note that host controller reset may issue DME_RESET to
6237 * local and remote (device) Uni-Pro stack and the attributes
6238 * are reset to default state.
6239 *
6240 * Returns zero on success, non-zero on failure
6241 */
6242static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6243{
6244 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306245 unsigned long flags;
6246
6247 /* Reset the host controller */
6248 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02006249 ufshcd_hba_stop(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306250 spin_unlock_irqrestore(hba->host->host_lock, flags);
6251
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08006252 /* scale up clocks to max frequency before full reinitialization */
6253 ufshcd_scale_clks(hba, true);
6254
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306255 err = ufshcd_hba_enable(hba);
6256 if (err)
6257 goto out;
6258
6259 /* Establish the link again and restore the device */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006260 err = ufshcd_probe_hba(hba);
6261
6262 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306263 err = -EIO;
6264out:
6265 if (err)
6266 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
Stanley Chu8808b4e2019-07-10 21:38:21 +08006267 ufshcd_update_reg_hist(&hba->ufs_stats.host_reset, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306268 return err;
6269}
6270
6271/**
6272 * ufshcd_reset_and_restore - reset and re-initialize host/device
6273 * @hba: per-adapter instance
6274 *
6275 * Reset and recover device, host and re-establish link. This
6276 * is helpful to recover the communication in fatal error conditions.
6277 *
6278 * Returns zero on success, non-zero on failure
6279 */
6280static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6281{
6282 int err = 0;
6283 unsigned long flags;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006284 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306285
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006286 do {
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07006287 /* Reset the attached device */
6288 ufshcd_vops_device_reset(hba);
6289
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006290 err = ufshcd_host_reset_and_restore(hba);
6291 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306292
6293 /*
6294 * After reset the door-bell might be cleared, complete
6295 * outstanding requests in s/w here.
6296 */
6297 spin_lock_irqsave(hba->host->host_lock, flags);
6298 ufshcd_transfer_req_compl(hba);
6299 ufshcd_tmc_handler(hba);
6300 spin_unlock_irqrestore(hba->host->host_lock, flags);
6301
6302 return err;
6303}
6304
6305/**
6306 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006307 * @cmd: SCSI command pointer
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306308 *
6309 * Returns SUCCESS/FAILED
6310 */
6311static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6312{
6313 int err;
6314 unsigned long flags;
6315 struct ufs_hba *hba;
6316
6317 hba = shost_priv(cmd->device->host);
6318
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006319 ufshcd_hold(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306320 /*
6321 * Check if there is any race with fatal error handling.
6322 * If so, wait for it to complete. Even though fatal error
6323 * handling does reset and restore in some cases, don't assume
6324 * anything out of it. We are just avoiding race here.
6325 */
6326 do {
6327 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306328 if (!(work_pending(&hba->eh_work) ||
Zang Leigang8dc0da72017-06-24 19:14:32 +08006329 hba->ufshcd_state == UFSHCD_STATE_RESET ||
6330 hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306331 break;
6332 spin_unlock_irqrestore(hba->host->host_lock, flags);
6333 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306334 flush_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306335 } while (1);
6336
6337 hba->ufshcd_state = UFSHCD_STATE_RESET;
6338 ufshcd_set_eh_in_progress(hba);
6339 spin_unlock_irqrestore(hba->host->host_lock, flags);
6340
6341 err = ufshcd_reset_and_restore(hba);
6342
6343 spin_lock_irqsave(hba->host->host_lock, flags);
6344 if (!err) {
6345 err = SUCCESS;
6346 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6347 } else {
6348 err = FAILED;
6349 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6350 }
6351 ufshcd_clear_eh_in_progress(hba);
6352 spin_unlock_irqrestore(hba->host->host_lock, flags);
6353
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006354 ufshcd_release(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306355 return err;
6356}
6357
6358/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006359 * ufshcd_get_max_icc_level - calculate the ICC level
6360 * @sup_curr_uA: max. current supported by the regulator
6361 * @start_scan: row at the desc table to start scan from
6362 * @buff: power descriptor buffer
6363 *
6364 * Returns calculated max ICC level for specific regulator
6365 */
6366static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6367{
6368 int i;
6369 int curr_uA;
6370 u16 data;
6371 u16 unit;
6372
6373 for (i = start_scan; i >= 0; i--) {
Tomas Winklerd79713f2017-01-05 10:45:11 +02006374 data = be16_to_cpup((__be16 *)&buff[2 * i]);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006375 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6376 ATTR_ICC_LVL_UNIT_OFFSET;
6377 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6378 switch (unit) {
6379 case UFSHCD_NANO_AMP:
6380 curr_uA = curr_uA / 1000;
6381 break;
6382 case UFSHCD_MILI_AMP:
6383 curr_uA = curr_uA * 1000;
6384 break;
6385 case UFSHCD_AMP:
6386 curr_uA = curr_uA * 1000 * 1000;
6387 break;
6388 case UFSHCD_MICRO_AMP:
6389 default:
6390 break;
6391 }
6392 if (sup_curr_uA >= curr_uA)
6393 break;
6394 }
6395 if (i < 0) {
6396 i = 0;
6397 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6398 }
6399
6400 return (u32)i;
6401}
6402
6403/**
6404 * ufshcd_calc_icc_level - calculate the max ICC level
6405 * In case regulators are not initialized we'll return 0
6406 * @hba: per-adapter instance
6407 * @desc_buf: power descriptor buffer to extract ICC levels from.
6408 * @len: length of desc_buff
6409 *
6410 * Returns calculated ICC level
6411 */
6412static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6413 u8 *desc_buf, int len)
6414{
6415 u32 icc_level = 0;
6416
6417 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6418 !hba->vreg_info.vccq2) {
6419 dev_err(hba->dev,
6420 "%s: Regulator capability was not set, actvIccLevel=%d",
6421 __func__, icc_level);
6422 goto out;
6423 }
6424
Stanley Chu0487fff2019-03-28 17:16:25 +08006425 if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006426 icc_level = ufshcd_get_max_icc_level(
6427 hba->vreg_info.vcc->max_uA,
6428 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6429 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6430
Stanley Chu0487fff2019-03-28 17:16:25 +08006431 if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006432 icc_level = ufshcd_get_max_icc_level(
6433 hba->vreg_info.vccq->max_uA,
6434 icc_level,
6435 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6436
Stanley Chu0487fff2019-03-28 17:16:25 +08006437 if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006438 icc_level = ufshcd_get_max_icc_level(
6439 hba->vreg_info.vccq2->max_uA,
6440 icc_level,
6441 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6442out:
6443 return icc_level;
6444}
6445
6446static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6447{
6448 int ret;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006449 int buff_len = hba->desc_size.pwr_desc;
Kees Cookbbe21d72018-05-02 16:58:09 -07006450 u8 *desc_buf;
6451
6452 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6453 if (!desc_buf)
6454 return;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006455
6456 ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6457 if (ret) {
6458 dev_err(hba->dev,
6459 "%s: Failed reading power descriptor.len = %d ret = %d",
6460 __func__, buff_len, ret);
Kees Cookbbe21d72018-05-02 16:58:09 -07006461 goto out;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006462 }
6463
6464 hba->init_prefetch_data.icc_level =
6465 ufshcd_find_max_sup_active_icc_level(hba,
6466 desc_buf, buff_len);
6467 dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6468 __func__, hba->init_prefetch_data.icc_level);
6469
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02006470 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6471 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6472 &hba->init_prefetch_data.icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006473
6474 if (ret)
6475 dev_err(hba->dev,
6476 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6477 __func__, hba->init_prefetch_data.icc_level , ret);
6478
Kees Cookbbe21d72018-05-02 16:58:09 -07006479out:
6480 kfree(desc_buf);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006481}
6482
6483/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006484 * ufshcd_scsi_add_wlus - Adds required W-LUs
6485 * @hba: per-adapter instance
6486 *
6487 * UFS device specification requires the UFS devices to support 4 well known
6488 * logical units:
6489 * "REPORT_LUNS" (address: 01h)
6490 * "UFS Device" (address: 50h)
6491 * "RPMB" (address: 44h)
6492 * "BOOT" (address: 30h)
6493 * UFS device's power management needs to be controlled by "POWER CONDITION"
6494 * field of SSU (START STOP UNIT) command. But this "power condition" field
6495 * will take effect only when its sent to "UFS device" well known logical unit
6496 * hence we require the scsi_device instance to represent this logical unit in
6497 * order for the UFS host driver to send the SSU command for power management.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006498 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006499 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6500 * Block) LU so user space process can control this LU. User space may also
6501 * want to have access to BOOT LU.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006502 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006503 * This function adds scsi device instances for each of all well known LUs
6504 * (except "REPORT LUNS" LU).
6505 *
6506 * Returns zero on success (all required W-LUs are added successfully),
6507 * non-zero error value on failure (if failed to add any of the required W-LU).
6508 */
6509static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6510{
6511 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006512 struct scsi_device *sdev_rpmb;
6513 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006514
6515 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6516 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6517 if (IS_ERR(hba->sdev_ufs_device)) {
6518 ret = PTR_ERR(hba->sdev_ufs_device);
6519 hba->sdev_ufs_device = NULL;
6520 goto out;
6521 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006522 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006523
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006524 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006525 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006526 if (IS_ERR(sdev_rpmb)) {
6527 ret = PTR_ERR(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006528 goto remove_sdev_ufs_device;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006529 }
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006530 scsi_device_put(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006531
6532 sdev_boot = __scsi_add_device(hba->host, 0, 0,
6533 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6534 if (IS_ERR(sdev_boot))
6535 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6536 else
6537 scsi_device_put(sdev_boot);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006538 goto out;
6539
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006540remove_sdev_ufs_device:
6541 scsi_remove_device(hba->sdev_ufs_device);
6542out:
6543 return ret;
6544}
6545
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006546static int ufs_get_device_desc(struct ufs_hba *hba,
6547 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006548{
6549 int err;
Kees Cookbbe21d72018-05-02 16:58:09 -07006550 size_t buff_len;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006551 u8 model_index;
Kees Cookbbe21d72018-05-02 16:58:09 -07006552 u8 *desc_buf;
6553
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006554 if (!dev_desc)
6555 return -EINVAL;
6556
Kees Cookbbe21d72018-05-02 16:58:09 -07006557 buff_len = max_t(size_t, hba->desc_size.dev_desc,
6558 QUERY_DESC_MAX_SIZE + 1);
6559 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6560 if (!desc_buf) {
6561 err = -ENOMEM;
6562 goto out;
6563 }
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006564
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006565 err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006566 if (err) {
6567 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6568 __func__, err);
6569 goto out;
6570 }
6571
6572 /*
6573 * getting vendor (manufacturerID) and Bank Index in big endian
6574 * format
6575 */
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006576 dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006577 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6578
6579 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006580 err = ufshcd_read_string_desc(hba, model_index,
6581 &dev_desc->model, SD_ASCII_STD);
6582 if (err < 0) {
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006583 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6584 __func__, err);
6585 goto out;
6586 }
6587
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006588 /*
6589 * ufshcd_read_string_desc returns size of the string
6590 * reset the error value
6591 */
6592 err = 0;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006593
6594out:
Kees Cookbbe21d72018-05-02 16:58:09 -07006595 kfree(desc_buf);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006596 return err;
6597}
6598
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006599static void ufs_put_device_desc(struct ufs_dev_desc *dev_desc)
6600{
6601 kfree(dev_desc->model);
6602 dev_desc->model = NULL;
6603}
6604
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006605static void ufs_fixup_device_setup(struct ufs_hba *hba,
6606 struct ufs_dev_desc *dev_desc)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006607{
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006608 struct ufs_dev_fix *f;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006609
6610 for (f = ufs_fixups; f->quirk; f++) {
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006611 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
6612 f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006613 ((dev_desc->model &&
6614 STR_PRFX_EQUAL(f->card.model, dev_desc->model)) ||
6615 !strcmp(f->card.model, UFS_ANY_MODEL)))
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006616 hba->dev_quirks |= f->quirk;
6617 }
6618}
6619
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006620/**
Yaniv Gardi37113102016-03-10 17:37:16 +02006621 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6622 * @hba: per-adapter instance
6623 *
6624 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6625 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6626 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6627 * the hibern8 exit latency.
6628 *
6629 * Returns zero on success, non-zero error value on failure.
6630 */
6631static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6632{
6633 int ret = 0;
6634 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6635
6636 ret = ufshcd_dme_peer_get(hba,
6637 UIC_ARG_MIB_SEL(
6638 RX_MIN_ACTIVATETIME_CAPABILITY,
6639 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6640 &peer_rx_min_activatetime);
6641 if (ret)
6642 goto out;
6643
6644 /* make sure proper unit conversion is applied */
6645 tuned_pa_tactivate =
6646 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6647 / PA_TACTIVATE_TIME_UNIT_US);
6648 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6649 tuned_pa_tactivate);
6650
6651out:
6652 return ret;
6653}
6654
6655/**
6656 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6657 * @hba: per-adapter instance
6658 *
6659 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6660 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6661 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6662 * This optimal value can help reduce the hibern8 exit latency.
6663 *
6664 * Returns zero on success, non-zero error value on failure.
6665 */
6666static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6667{
6668 int ret = 0;
6669 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6670 u32 max_hibern8_time, tuned_pa_hibern8time;
6671
6672 ret = ufshcd_dme_get(hba,
6673 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6674 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6675 &local_tx_hibern8_time_cap);
6676 if (ret)
6677 goto out;
6678
6679 ret = ufshcd_dme_peer_get(hba,
6680 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6681 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6682 &peer_rx_hibern8_time_cap);
6683 if (ret)
6684 goto out;
6685
6686 max_hibern8_time = max(local_tx_hibern8_time_cap,
6687 peer_rx_hibern8_time_cap);
6688 /* make sure proper unit conversion is applied */
6689 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6690 / PA_HIBERN8_TIME_UNIT_US);
6691 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6692 tuned_pa_hibern8time);
6693out:
6694 return ret;
6695}
6696
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006697/**
6698 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6699 * less than device PA_TACTIVATE time.
6700 * @hba: per-adapter instance
6701 *
6702 * Some UFS devices require host PA_TACTIVATE to be lower than device
6703 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6704 * for such devices.
6705 *
6706 * Returns zero on success, non-zero error value on failure.
6707 */
6708static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6709{
6710 int ret = 0;
6711 u32 granularity, peer_granularity;
6712 u32 pa_tactivate, peer_pa_tactivate;
6713 u32 pa_tactivate_us, peer_pa_tactivate_us;
6714 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6715
6716 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6717 &granularity);
6718 if (ret)
6719 goto out;
6720
6721 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6722 &peer_granularity);
6723 if (ret)
6724 goto out;
6725
6726 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6727 (granularity > PA_GRANULARITY_MAX_VAL)) {
6728 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6729 __func__, granularity);
6730 return -EINVAL;
6731 }
6732
6733 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6734 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6735 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6736 __func__, peer_granularity);
6737 return -EINVAL;
6738 }
6739
6740 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6741 if (ret)
6742 goto out;
6743
6744 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6745 &peer_pa_tactivate);
6746 if (ret)
6747 goto out;
6748
6749 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6750 peer_pa_tactivate_us = peer_pa_tactivate *
6751 gran_to_us_table[peer_granularity - 1];
6752
6753 if (pa_tactivate_us > peer_pa_tactivate_us) {
6754 u32 new_peer_pa_tactivate;
6755
6756 new_peer_pa_tactivate = pa_tactivate_us /
6757 gran_to_us_table[peer_granularity - 1];
6758 new_peer_pa_tactivate++;
6759 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6760 new_peer_pa_tactivate);
6761 }
6762
6763out:
6764 return ret;
6765}
6766
Yaniv Gardi37113102016-03-10 17:37:16 +02006767static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6768{
6769 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6770 ufshcd_tune_pa_tactivate(hba);
6771 ufshcd_tune_pa_hibern8time(hba);
6772 }
6773
6774 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6775 /* set 1ms timeout for PA_TACTIVATE */
6776 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08006777
6778 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6779 ufshcd_quirk_tune_host_pa_tactivate(hba);
Subhash Jadavani56d4a182016-12-05 19:25:32 -08006780
6781 ufshcd_vops_apply_dev_quirks(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02006782}
6783
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006784static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6785{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006786 hba->ufs_stats.hibern8_exit_cnt = 0;
6787 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08006788 hba->req_abort_count = 0;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006789}
6790
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006791static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6792{
6793 int err;
6794
6795 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6796 &hba->desc_size.dev_desc);
6797 if (err)
6798 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6799
6800 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6801 &hba->desc_size.pwr_desc);
6802 if (err)
6803 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6804
6805 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6806 &hba->desc_size.interc_desc);
6807 if (err)
6808 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6809
6810 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6811 &hba->desc_size.conf_desc);
6812 if (err)
6813 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6814
6815 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6816 &hba->desc_size.unit_desc);
6817 if (err)
6818 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6819
6820 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6821 &hba->desc_size.geom_desc);
6822 if (err)
6823 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
Bean Huo059efd82019-10-29 14:22:45 +00006824
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02006825 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
6826 &hba->desc_size.hlth_desc);
6827 if (err)
6828 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006829}
6830
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05306831static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
6832 {19200000, REF_CLK_FREQ_19_2_MHZ},
6833 {26000000, REF_CLK_FREQ_26_MHZ},
6834 {38400000, REF_CLK_FREQ_38_4_MHZ},
6835 {52000000, REF_CLK_FREQ_52_MHZ},
6836 {0, REF_CLK_FREQ_INVAL},
6837};
6838
6839static enum ufs_ref_clk_freq
6840ufs_get_bref_clk_from_hz(unsigned long freq)
6841{
6842 int i;
6843
6844 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
6845 if (ufs_ref_clk_freqs[i].freq_hz == freq)
6846 return ufs_ref_clk_freqs[i].val;
6847
6848 return REF_CLK_FREQ_INVAL;
6849}
6850
6851void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
6852{
6853 unsigned long freq;
6854
6855 freq = clk_get_rate(refclk);
6856
6857 hba->dev_ref_clk_freq =
6858 ufs_get_bref_clk_from_hz(freq);
6859
6860 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
6861 dev_err(hba->dev,
6862 "invalid ref_clk setting = %ld\n", freq);
6863}
6864
6865static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
6866{
6867 int err;
6868 u32 ref_clk;
6869 u32 freq = hba->dev_ref_clk_freq;
6870
6871 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
6872 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
6873
6874 if (err) {
6875 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
6876 err);
6877 goto out;
6878 }
6879
6880 if (ref_clk == freq)
6881 goto out; /* nothing to update */
6882
6883 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6884 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
6885
6886 if (err) {
6887 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
6888 ufs_ref_clk_freqs[freq].freq_hz);
6889 goto out;
6890 }
6891
6892 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
6893 ufs_ref_clk_freqs[freq].freq_hz);
6894
6895out:
6896 return err;
6897}
6898
Yaniv Gardi37113102016-03-10 17:37:16 +02006899/**
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006900 * ufshcd_probe_hba - probe hba to detect device and initialize
6901 * @hba: per-adapter instance
6902 *
6903 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306904 */
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006905static int ufshcd_probe_hba(struct ufs_hba *hba)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306906{
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006907 struct ufs_dev_desc card = {0};
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306908 int ret;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08006909 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306910
6911 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306912 if (ret)
6913 goto out;
6914
Yaniv Gardiafdfff52016-03-10 17:37:15 +02006915 /* set the default level for urgent bkops */
6916 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6917 hba->is_urgent_bkops_lvl_checked = false;
6918
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006919 /* Debug counters initialization */
6920 ufshcd_clear_dbg_ufs_stats(hba);
6921
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006922 /* UniPro link is active now */
6923 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05306924
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306925 ret = ufshcd_verify_dev_init(hba);
6926 if (ret)
6927 goto out;
6928
Dolev Raviv68078d52013-07-30 00:35:58 +05306929 ret = ufshcd_complete_dev_init(hba);
6930 if (ret)
6931 goto out;
6932
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006933 /* Init check for device descriptor sizes */
6934 ufshcd_init_desc_sizes(hba);
6935
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02006936 ret = ufs_get_device_desc(hba, &card);
6937 if (ret) {
6938 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6939 __func__, ret);
6940 goto out;
6941 }
6942
6943 ufs_fixup_device_setup(hba, &card);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006944 ufs_put_device_desc(&card);
6945
Yaniv Gardi37113102016-03-10 17:37:16 +02006946 ufshcd_tune_unipro_params(hba);
Yaniv Gardi60f01872016-03-10 17:37:11 +02006947
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006948 /* UFS device is also active now */
6949 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05306950 ufshcd_force_reset_auto_bkops(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006951 hba->wlun_dev_clr_ua = true;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306952
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006953 if (ufshcd_get_max_pwr_mode(hba)) {
6954 dev_err(hba->dev,
6955 "%s: Failed getting max supported power mode\n",
6956 __func__);
6957 } else {
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05306958 /*
6959 * Set the right value to bRefClkFreq before attempting to
6960 * switch to HS gears.
6961 */
6962 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
6963 ufshcd_set_dev_ref_clk(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006964 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Dov Levenglick8643ae62016-10-17 17:10:14 -07006965 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006966 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6967 __func__, ret);
Dov Levenglick8643ae62016-10-17 17:10:14 -07006968 goto out;
6969 }
Dolev Raviv7eb584d2014-09-25 15:32:31 +03006970 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006971
Yaniv Gardi53c12d02016-02-01 15:02:45 +02006972 /* set the state as operational after switching to desired gear */
6973 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006974
Can Guo71d848b2019-11-14 22:09:26 -08006975 /* Enable Auto-Hibernate if configured */
6976 ufshcd_auto_hibern8_enable(hba);
6977
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006978 /*
6979 * If we are in error handling context or in power management callbacks
6980 * context, no need to scan the host
6981 */
6982 if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6983 bool flag;
6984
6985 /* clear any previous UFS device information */
6986 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02006987 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
6988 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03006989 hba->dev_info.f_power_on_wp_en = flag;
6990
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006991 if (!hba->is_init_prefetch)
6992 ufshcd_init_icc_levels(hba);
6993
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006994 /* Add required well known logical units to scsi mid layer */
6995 if (ufshcd_scsi_add_wlus(hba))
6996 goto out;
6997
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08006998 /* Initialize devfreq after UFS device is detected */
6999 if (ufshcd_is_clkscaling_supported(hba)) {
7000 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7001 &hba->pwr_info,
7002 sizeof(struct ufs_pa_layer_attr));
7003 hba->clk_scaling.saved_pwr_info.is_valid = true;
7004 if (!hba->devfreq) {
Bjorn Anderssondeac4442018-05-17 23:26:36 -07007005 ret = ufshcd_devfreq_init(hba);
7006 if (ret)
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007007 goto out;
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007008 }
7009 hba->clk_scaling.is_allowed = true;
7010 }
7011
Avri Altmandf032bf2018-10-07 17:30:35 +03007012 ufs_bsg_probe(hba);
7013
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307014 scsi_scan_host(hba->host);
7015 pm_runtime_put_sync(hba->dev);
7016 }
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03007017
7018 if (!hba->is_init_prefetch)
7019 hba->is_init_prefetch = true;
7020
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307021out:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007022 /*
7023 * If we failed to initialize the device or the device is not
7024 * present, turn off the power/clocks etc.
7025 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007026 if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
7027 pm_runtime_put_sync(hba->dev);
Vivek Gautameebcc192018-08-07 23:17:39 +05307028 ufshcd_exit_clk_scaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007029 ufshcd_hba_exit(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007030 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007031
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007032 trace_ufshcd_init(dev_name(hba->dev), ret,
7033 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007034 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007035 return ret;
7036}
7037
7038/**
7039 * ufshcd_async_scan - asynchronous execution for probing hba
7040 * @data: data pointer to pass to this function
7041 * @cookie: cookie data
7042 */
7043static void ufshcd_async_scan(void *data, async_cookie_t cookie)
7044{
7045 struct ufs_hba *hba = (struct ufs_hba *)data;
7046
7047 ufshcd_probe_hba(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307048}
7049
Yaniv Gardif550c652016-03-10 17:37:07 +02007050static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
7051{
7052 unsigned long flags;
7053 struct Scsi_Host *host;
7054 struct ufs_hba *hba;
7055 int index;
7056 bool found = false;
7057
7058 if (!scmd || !scmd->device || !scmd->device->host)
Christoph Hellwig66005932018-05-29 15:52:29 +02007059 return BLK_EH_DONE;
Yaniv Gardif550c652016-03-10 17:37:07 +02007060
7061 host = scmd->device->host;
7062 hba = shost_priv(host);
7063 if (!hba)
Christoph Hellwig66005932018-05-29 15:52:29 +02007064 return BLK_EH_DONE;
Yaniv Gardif550c652016-03-10 17:37:07 +02007065
7066 spin_lock_irqsave(host->host_lock, flags);
7067
7068 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
7069 if (hba->lrb[index].cmd == scmd) {
7070 found = true;
7071 break;
7072 }
7073 }
7074
7075 spin_unlock_irqrestore(host->host_lock, flags);
7076
7077 /*
7078 * Bypass SCSI error handling and reset the block layer timer if this
7079 * SCSI command was not actually dispatched to UFS driver, otherwise
7080 * let SCSI layer handle the error as usual.
7081 */
Christoph Hellwig66005932018-05-29 15:52:29 +02007082 return found ? BLK_EH_DONE : BLK_EH_RESET_TIMER;
Yaniv Gardif550c652016-03-10 17:37:07 +02007083}
7084
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007085static const struct attribute_group *ufshcd_driver_groups[] = {
7086 &ufs_sysfs_unit_descriptor_group,
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02007087 &ufs_sysfs_lun_attributes_group,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007088 NULL,
7089};
7090
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307091static struct scsi_host_template ufshcd_driver_template = {
7092 .module = THIS_MODULE,
7093 .name = UFSHCD,
7094 .proc_name = UFSHCD,
7095 .queuecommand = ufshcd_queuecommand,
7096 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09007097 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307098 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03007099 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307100 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307101 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
7102 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Yaniv Gardif550c652016-03-10 17:37:07 +02007103 .eh_timed_out = ufshcd_eh_timed_out,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307104 .this_id = -1,
7105 .sg_tablesize = SG_ALL,
7106 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
7107 .can_queue = UFSHCD_CAN_QUEUE,
Christoph Hellwig552a9902019-06-17 14:19:55 +02007108 .max_segment_size = PRDT_DATA_BYTE_COUNT_MAX,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007109 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01007110 .track_queue_depth = 1,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007111 .sdev_groups = ufshcd_driver_groups,
Christoph Hellwig4af14d12018-12-13 16:17:09 +01007112 .dma_boundary = PAGE_SIZE - 1,
Stanley Chu49615ba2019-09-16 23:56:50 +08007113 .rpm_autosuspend_delay = RPM_AUTOSUSPEND_DELAY_MS,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307114};
7115
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007116static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
7117 int ua)
7118{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007119 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007120
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007121 if (!vreg)
7122 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007123
Stanley Chu0487fff2019-03-28 17:16:25 +08007124 /*
7125 * "set_load" operation shall be required on those regulators
7126 * which specifically configured current limitation. Otherwise
7127 * zero max_uA may cause unexpected behavior when regulator is
7128 * enabled or set as high power mode.
7129 */
7130 if (!vreg->max_uA)
7131 return 0;
7132
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007133 ret = regulator_set_load(vreg->reg, ua);
7134 if (ret < 0) {
7135 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
7136 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007137 }
7138
7139 return ret;
7140}
7141
7142static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7143 struct ufs_vreg *vreg)
7144{
Marc Gonzalez73067982019-02-27 11:41:45 +01007145 return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007146}
7147
7148static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7149 struct ufs_vreg *vreg)
7150{
Adrian Hunter7c7cfdc2019-08-14 15:59:50 +03007151 if (!vreg)
7152 return 0;
7153
Marc Gonzalez73067982019-02-27 11:41:45 +01007154 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007155}
7156
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007157static int ufshcd_config_vreg(struct device *dev,
7158 struct ufs_vreg *vreg, bool on)
7159{
7160 int ret = 0;
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007161 struct regulator *reg;
7162 const char *name;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007163 int min_uV, uA_load;
7164
7165 BUG_ON(!vreg);
7166
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007167 reg = vreg->reg;
7168 name = vreg->name;
7169
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007170 if (regulator_count_voltages(reg) > 0) {
Stanley Chu3b141e82019-03-28 17:16:24 +08007171 if (vreg->min_uV && vreg->max_uV) {
7172 min_uV = on ? vreg->min_uV : 0;
7173 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7174 if (ret) {
7175 dev_err(dev,
7176 "%s: %s set voltage failed, err=%d\n",
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007177 __func__, name, ret);
Stanley Chu3b141e82019-03-28 17:16:24 +08007178 goto out;
7179 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007180 }
7181
7182 uA_load = on ? vreg->max_uA : 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007183 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7184 if (ret)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007185 goto out;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007186 }
7187out:
7188 return ret;
7189}
7190
7191static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7192{
7193 int ret = 0;
7194
Marc Gonzalez73067982019-02-27 11:41:45 +01007195 if (!vreg || vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007196 goto out;
7197
7198 ret = ufshcd_config_vreg(dev, vreg, true);
7199 if (!ret)
7200 ret = regulator_enable(vreg->reg);
7201
7202 if (!ret)
7203 vreg->enabled = true;
7204 else
7205 dev_err(dev, "%s: %s enable failed, err=%d\n",
7206 __func__, vreg->name, ret);
7207out:
7208 return ret;
7209}
7210
7211static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7212{
7213 int ret = 0;
7214
Marc Gonzalez73067982019-02-27 11:41:45 +01007215 if (!vreg || !vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007216 goto out;
7217
7218 ret = regulator_disable(vreg->reg);
7219
7220 if (!ret) {
7221 /* ignore errors on applying disable config */
7222 ufshcd_config_vreg(dev, vreg, false);
7223 vreg->enabled = false;
7224 } else {
7225 dev_err(dev, "%s: %s disable failed, err=%d\n",
7226 __func__, vreg->name, ret);
7227 }
7228out:
7229 return ret;
7230}
7231
7232static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7233{
7234 int ret = 0;
7235 struct device *dev = hba->dev;
7236 struct ufs_vreg_info *info = &hba->vreg_info;
7237
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007238 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7239 if (ret)
7240 goto out;
7241
7242 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7243 if (ret)
7244 goto out;
7245
7246 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7247 if (ret)
7248 goto out;
7249
7250out:
7251 if (ret) {
7252 ufshcd_toggle_vreg(dev, info->vccq2, false);
7253 ufshcd_toggle_vreg(dev, info->vccq, false);
7254 ufshcd_toggle_vreg(dev, info->vcc, false);
7255 }
7256 return ret;
7257}
7258
Raviv Shvili6a771a62014-09-25 15:32:24 +03007259static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7260{
7261 struct ufs_vreg_info *info = &hba->vreg_info;
7262
Zeng Guangyue60b7b822019-03-30 17:03:13 +08007263 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007264}
7265
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007266static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7267{
7268 int ret = 0;
7269
7270 if (!vreg)
7271 goto out;
7272
7273 vreg->reg = devm_regulator_get(dev, vreg->name);
7274 if (IS_ERR(vreg->reg)) {
7275 ret = PTR_ERR(vreg->reg);
7276 dev_err(dev, "%s: %s get failed, err=%d\n",
7277 __func__, vreg->name, ret);
7278 }
7279out:
7280 return ret;
7281}
7282
7283static int ufshcd_init_vreg(struct ufs_hba *hba)
7284{
7285 int ret = 0;
7286 struct device *dev = hba->dev;
7287 struct ufs_vreg_info *info = &hba->vreg_info;
7288
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007289 ret = ufshcd_get_vreg(dev, info->vcc);
7290 if (ret)
7291 goto out;
7292
7293 ret = ufshcd_get_vreg(dev, info->vccq);
7294 if (ret)
7295 goto out;
7296
7297 ret = ufshcd_get_vreg(dev, info->vccq2);
7298out:
7299 return ret;
7300}
7301
Raviv Shvili6a771a62014-09-25 15:32:24 +03007302static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7303{
7304 struct ufs_vreg_info *info = &hba->vreg_info;
7305
7306 if (info)
7307 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7308
7309 return 0;
7310}
7311
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007312static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7313 bool skip_ref_clk)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007314{
7315 int ret = 0;
7316 struct ufs_clk_info *clki;
7317 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007318 unsigned long flags;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007319 ktime_t start = ktime_get();
7320 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007321
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007322 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007323 goto out;
7324
Subhash Jadavanib3344562018-05-03 16:37:17 +05307325 /*
7326 * vendor specific setup_clocks ops may depend on clocks managed by
7327 * this standard driver hence call the vendor specific setup_clocks
7328 * before disabling the clocks managed here.
7329 */
7330 if (!on) {
7331 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
7332 if (ret)
7333 return ret;
7334 }
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007335
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007336 list_for_each_entry(clki, head, list) {
7337 if (!IS_ERR_OR_NULL(clki->clk)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007338 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7339 continue;
7340
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007341 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007342 if (on && !clki->enabled) {
7343 ret = clk_prepare_enable(clki->clk);
7344 if (ret) {
7345 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7346 __func__, clki->name, ret);
7347 goto out;
7348 }
7349 } else if (!on && clki->enabled) {
7350 clk_disable_unprepare(clki->clk);
7351 }
7352 clki->enabled = on;
7353 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7354 clki->name, on ? "en" : "dis");
7355 }
7356 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007357
Subhash Jadavanib3344562018-05-03 16:37:17 +05307358 /*
7359 * vendor specific setup_clocks ops may depend on clocks managed by
7360 * this standard driver hence call the vendor specific setup_clocks
7361 * after enabling the clocks managed here.
7362 */
7363 if (on) {
7364 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
7365 if (ret)
7366 return ret;
7367 }
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007368
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007369out:
7370 if (ret) {
7371 list_for_each_entry(clki, head, list) {
7372 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7373 clk_disable_unprepare(clki->clk);
7374 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007375 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007376 spin_lock_irqsave(hba->host->host_lock, flags);
7377 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007378 trace_ufshcd_clk_gating(dev_name(hba->dev),
7379 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007380 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007381 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007382
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007383 if (clk_state_changed)
7384 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7385 (on ? "on" : "off"),
7386 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007387 return ret;
7388}
7389
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007390static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
7391{
7392 return __ufshcd_setup_clocks(hba, on, false);
7393}
7394
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007395static int ufshcd_init_clocks(struct ufs_hba *hba)
7396{
7397 int ret = 0;
7398 struct ufs_clk_info *clki;
7399 struct device *dev = hba->dev;
7400 struct list_head *head = &hba->clk_list_head;
7401
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007402 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007403 goto out;
7404
7405 list_for_each_entry(clki, head, list) {
7406 if (!clki->name)
7407 continue;
7408
7409 clki->clk = devm_clk_get(dev, clki->name);
7410 if (IS_ERR(clki->clk)) {
7411 ret = PTR_ERR(clki->clk);
7412 dev_err(dev, "%s: %s clk get failed, %d\n",
7413 __func__, clki->name, ret);
7414 goto out;
7415 }
7416
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307417 /*
7418 * Parse device ref clk freq as per device tree "ref_clk".
7419 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
7420 * in ufshcd_alloc_host().
7421 */
7422 if (!strcmp(clki->name, "ref_clk"))
7423 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
7424
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007425 if (clki->max_freq) {
7426 ret = clk_set_rate(clki->clk, clki->max_freq);
7427 if (ret) {
7428 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7429 __func__, clki->name,
7430 clki->max_freq, ret);
7431 goto out;
7432 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03007433 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007434 }
7435 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7436 clki->name, clk_get_rate(clki->clk));
7437 }
7438out:
7439 return ret;
7440}
7441
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007442static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7443{
7444 int err = 0;
7445
7446 if (!hba->vops)
7447 goto out;
7448
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007449 err = ufshcd_vops_init(hba);
7450 if (err)
7451 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007452
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007453 err = ufshcd_vops_setup_regulators(hba, true);
7454 if (err)
7455 goto out_exit;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007456
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007457 goto out;
7458
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007459out_exit:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007460 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007461out:
7462 if (err)
7463 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007464 __func__, ufshcd_get_var_name(hba), err);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007465 return err;
7466}
7467
7468static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7469{
7470 if (!hba->vops)
7471 return;
7472
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007473 ufshcd_vops_setup_regulators(hba, false);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007474
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007475 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007476}
7477
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007478static int ufshcd_hba_init(struct ufs_hba *hba)
7479{
7480 int err;
7481
Raviv Shvili6a771a62014-09-25 15:32:24 +03007482 /*
7483 * Handle host controller power separately from the UFS device power
7484 * rails as it will help controlling the UFS host controller power
7485 * collapse easily which is different than UFS device power collapse.
7486 * Also, enable the host controller power before we go ahead with rest
7487 * of the initialization here.
7488 */
7489 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007490 if (err)
7491 goto out;
7492
Raviv Shvili6a771a62014-09-25 15:32:24 +03007493 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007494 if (err)
7495 goto out;
7496
Raviv Shvili6a771a62014-09-25 15:32:24 +03007497 err = ufshcd_init_clocks(hba);
7498 if (err)
7499 goto out_disable_hba_vreg;
7500
7501 err = ufshcd_setup_clocks(hba, true);
7502 if (err)
7503 goto out_disable_hba_vreg;
7504
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007505 err = ufshcd_init_vreg(hba);
7506 if (err)
7507 goto out_disable_clks;
7508
7509 err = ufshcd_setup_vreg(hba, true);
7510 if (err)
7511 goto out_disable_clks;
7512
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007513 err = ufshcd_variant_hba_init(hba);
7514 if (err)
7515 goto out_disable_vreg;
7516
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007517 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007518 goto out;
7519
7520out_disable_vreg:
7521 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007522out_disable_clks:
7523 ufshcd_setup_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007524out_disable_hba_vreg:
7525 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007526out:
7527 return err;
7528}
7529
7530static void ufshcd_hba_exit(struct ufs_hba *hba)
7531{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007532 if (hba->is_powered) {
7533 ufshcd_variant_hba_exit(hba);
7534 ufshcd_setup_vreg(hba, false);
Gilad Bronera5082532016-10-17 17:10:00 -07007535 ufshcd_suspend_clkscaling(hba);
Vivek Gautameebcc192018-08-07 23:17:39 +05307536 if (ufshcd_is_clkscaling_supported(hba))
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007537 if (hba->devfreq)
7538 ufshcd_suspend_clkscaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007539 ufshcd_setup_clocks(hba, false);
7540 ufshcd_setup_hba_vreg(hba, false);
7541 hba->is_powered = false;
7542 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007543}
7544
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007545static int
7546ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307547{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007548 unsigned char cmd[6] = {REQUEST_SENSE,
7549 0,
7550 0,
7551 0,
Avri Altman09a5a242018-11-22 20:04:56 +02007552 UFS_SENSE_SIZE,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007553 0};
7554 char *buffer;
7555 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307556
Avri Altman09a5a242018-11-22 20:04:56 +02007557 buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007558 if (!buffer) {
7559 ret = -ENOMEM;
7560 goto out;
7561 }
7562
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007563 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
Avri Altman09a5a242018-11-22 20:04:56 +02007564 UFS_SENSE_SIZE, NULL, NULL,
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007565 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007566 if (ret)
7567 pr_err("%s: failed with err %d\n", __func__, ret);
7568
7569 kfree(buffer);
7570out:
7571 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307572}
7573
7574/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007575 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7576 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307577 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007578 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307579 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007580 * Returns 0 if requested power mode is set successfully
7581 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307582 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007583static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7584 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307585{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007586 unsigned char cmd[6] = { START_STOP };
7587 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007588 struct scsi_device *sdp;
7589 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007590 int ret;
7591
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007592 spin_lock_irqsave(hba->host->host_lock, flags);
7593 sdp = hba->sdev_ufs_device;
7594 if (sdp) {
7595 ret = scsi_device_get(sdp);
7596 if (!ret && !scsi_device_online(sdp)) {
7597 ret = -ENODEV;
7598 scsi_device_put(sdp);
7599 }
7600 } else {
7601 ret = -ENODEV;
7602 }
7603 spin_unlock_irqrestore(hba->host->host_lock, flags);
7604
7605 if (ret)
7606 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007607
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307608 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007609 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7610 * handling, which would wait for host to be resumed. Since we know
7611 * we are functional while we are here, skip host resume in error
7612 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307613 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007614 hba->host->eh_noresume = 1;
7615 if (hba->wlun_dev_clr_ua) {
7616 ret = ufshcd_send_request_sense(hba, sdp);
7617 if (ret)
7618 goto out;
7619 /* Unit attention condition is cleared now */
7620 hba->wlun_dev_clr_ua = false;
7621 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307622
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007623 cmd[4] = pwr_mode << 4;
7624
7625 /*
7626 * Current function would be generally called from the power management
Christoph Hellwige8064022016-10-20 15:12:13 +02007627 * callbacks hence set the RQF_PM flag so that it doesn't resume the
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007628 * already suspended childs.
7629 */
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007630 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7631 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007632 if (ret) {
7633 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02007634 "START_STOP failed for power mode: %d, result %x\n",
7635 pwr_mode, ret);
Johannes Thumshirnc65be1a2018-06-25 13:20:58 +02007636 if (driver_byte(ret) == DRIVER_SENSE)
Hannes Reinecke21045512015-01-08 07:43:46 +01007637 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007638 }
7639
7640 if (!ret)
7641 hba->curr_dev_pwr_mode = pwr_mode;
7642out:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007643 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007644 hba->host->eh_noresume = 0;
7645 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307646}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307647
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007648static int ufshcd_link_state_transition(struct ufs_hba *hba,
7649 enum uic_link_state req_link_state,
7650 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307651{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007652 int ret = 0;
7653
7654 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307655 return 0;
7656
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007657 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7658 ret = ufshcd_uic_hibern8_enter(hba);
7659 if (!ret)
7660 ufshcd_set_link_hibern8(hba);
7661 else
7662 goto out;
7663 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307664 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007665 * If autobkops is enabled, link can't be turned off because
7666 * turning off the link would also turn off the device.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307667 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007668 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
7669 (!check_for_bkops || (check_for_bkops &&
7670 !hba->auto_bkops_enabled))) {
7671 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02007672 * Let's make sure that link is in low power mode, we are doing
7673 * this currently by putting the link in Hibern8. Otherway to
7674 * put the link in low power mode is to send the DME end point
7675 * to device and then send the DME reset command to local
7676 * unipro. But putting the link in hibern8 is much faster.
7677 */
7678 ret = ufshcd_uic_hibern8_enter(hba);
7679 if (ret)
7680 goto out;
7681 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007682 * Change controller state to "reset state" which
7683 * should also put the link in off/reset state
7684 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02007685 ufshcd_hba_stop(hba, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007686 /*
7687 * TODO: Check if we need any delay to make sure that
7688 * controller is reset
7689 */
7690 ufshcd_set_link_off(hba);
7691 }
7692
7693out:
7694 return ret;
7695}
7696
7697static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7698{
7699 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02007700 * It seems some UFS devices may keep drawing more than sleep current
7701 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7702 * To avoid this situation, add 2ms delay before putting these UFS
7703 * rails in LPM mode.
7704 */
7705 if (!ufshcd_is_link_active(hba) &&
7706 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7707 usleep_range(2000, 2100);
7708
7709 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007710 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7711 * power.
7712 *
7713 * If UFS device and link is in OFF state, all power supplies (VCC,
7714 * VCCQ, VCCQ2) can be turned off if power on write protect is not
7715 * required. If UFS link is inactive (Hibern8 or OFF state) and device
7716 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7717 *
7718 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7719 * in low power state which would save some power.
7720 */
7721 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7722 !hba->dev_info.is_lu_power_on_wp) {
7723 ufshcd_setup_vreg(hba, false);
7724 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7725 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7726 if (!ufshcd_is_link_active(hba)) {
7727 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7728 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7729 }
7730 }
7731}
7732
7733static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7734{
7735 int ret = 0;
7736
7737 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7738 !hba->dev_info.is_lu_power_on_wp) {
7739 ret = ufshcd_setup_vreg(hba, true);
7740 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007741 if (!ret && !ufshcd_is_link_active(hba)) {
7742 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7743 if (ret)
7744 goto vcc_disable;
7745 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7746 if (ret)
7747 goto vccq_lpm;
7748 }
Subhash Jadavani69d72ac2016-10-27 17:26:24 -07007749 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007750 }
7751 goto out;
7752
7753vccq_lpm:
7754 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7755vcc_disable:
7756 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7757out:
7758 return ret;
7759}
7760
7761static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7762{
7763 if (ufshcd_is_link_off(hba))
7764 ufshcd_setup_hba_vreg(hba, false);
7765}
7766
7767static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7768{
7769 if (ufshcd_is_link_off(hba))
7770 ufshcd_setup_hba_vreg(hba, true);
7771}
7772
7773/**
7774 * ufshcd_suspend - helper function for suspend operations
7775 * @hba: per adapter instance
7776 * @pm_op: desired low power operation type
7777 *
7778 * This function will try to put the UFS device and link into low power
7779 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7780 * (System PM level).
7781 *
7782 * If this function is called during shutdown, it will make sure that
7783 * both UFS device and UFS link is powered off.
7784 *
7785 * NOTE: UFS device & link must be active before we enter in this function.
7786 *
7787 * Returns 0 for success and non-zero for failure
7788 */
7789static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7790{
7791 int ret = 0;
7792 enum ufs_pm_level pm_lvl;
7793 enum ufs_dev_pwr_mode req_dev_pwr_mode;
7794 enum uic_link_state req_link_state;
7795
7796 hba->pm_op_in_progress = 1;
7797 if (!ufshcd_is_shutdown_pm(pm_op)) {
7798 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7799 hba->rpm_lvl : hba->spm_lvl;
7800 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7801 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7802 } else {
7803 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7804 req_link_state = UIC_LINK_OFF_STATE;
7805 }
7806
7807 /*
7808 * If we can't transition into any of the low power modes
7809 * just gate the clocks.
7810 */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007811 ufshcd_hold(hba, false);
7812 hba->clk_gating.is_suspended = true;
7813
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007814 if (hba->clk_scaling.is_allowed) {
7815 cancel_work_sync(&hba->clk_scaling.suspend_work);
7816 cancel_work_sync(&hba->clk_scaling.resume_work);
7817 ufshcd_suspend_clkscaling(hba);
7818 }
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007819
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007820 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7821 req_link_state == UIC_LINK_ACTIVE_STATE) {
7822 goto disable_clks;
7823 }
7824
7825 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7826 (req_link_state == hba->uic_link_state))
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007827 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007828
7829 /* UFS device & link must be active before we enter in this function */
7830 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7831 ret = -EINVAL;
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07007832 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007833 }
7834
7835 if (ufshcd_is_runtime_pm(pm_op)) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03007836 if (ufshcd_can_autobkops_during_suspend(hba)) {
7837 /*
7838 * The device is idle with no requests in the queue,
7839 * allow background operations if bkops status shows
7840 * that performance might be impacted.
7841 */
7842 ret = ufshcd_urgent_bkops(hba);
7843 if (ret)
7844 goto enable_gating;
7845 } else {
7846 /* make sure that auto bkops is disabled */
7847 ufshcd_disable_auto_bkops(hba);
7848 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007849 }
7850
7851 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7852 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7853 !ufshcd_is_runtime_pm(pm_op))) {
7854 /* ensure that bkops is disabled */
7855 ufshcd_disable_auto_bkops(hba);
7856 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7857 if (ret)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007858 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007859 }
7860
7861 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7862 if (ret)
7863 goto set_dev_active;
7864
7865 ufshcd_vreg_set_lpm(hba);
7866
7867disable_clks:
7868 /*
7869 * Call vendor specific suspend callback. As these callbacks may access
7870 * vendor specific host controller register space call them before the
7871 * host clocks are ON.
7872 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007873 ret = ufshcd_vops_suspend(hba, pm_op);
7874 if (ret)
7875 goto set_link_active;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007876
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007877 if (!ufshcd_is_link_active(hba))
7878 ufshcd_setup_clocks(hba, false);
7879 else
7880 /* If link is active, device ref_clk can't be switched off */
7881 __ufshcd_setup_clocks(hba, false, true);
7882
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007883 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007884 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007885 /*
7886 * Disable the host irq as host controller as there won't be any
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007887 * host controller transaction expected till resume.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007888 */
7889 ufshcd_disable_irq(hba);
7890 /* Put the host controller in low power mode if possible */
7891 ufshcd_hba_vreg_set_lpm(hba);
7892 goto out;
7893
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007894set_link_active:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007895 if (hba->clk_scaling.is_allowed)
7896 ufshcd_resume_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007897 ufshcd_vreg_set_hpm(hba);
7898 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7899 ufshcd_set_link_active(hba);
7900 else if (ufshcd_is_link_off(hba))
7901 ufshcd_host_reset_and_restore(hba);
7902set_dev_active:
7903 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7904 ufshcd_disable_auto_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007905enable_gating:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08007906 if (hba->clk_scaling.is_allowed)
7907 ufshcd_resume_clkscaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007908 hba->clk_gating.is_suspended = false;
7909 ufshcd_release(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007910out:
7911 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08007912 if (ret)
7913 ufshcd_update_reg_hist(&hba->ufs_stats.suspend_err, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007914 return ret;
7915}
7916
7917/**
7918 * ufshcd_resume - helper function for resume operations
7919 * @hba: per adapter instance
7920 * @pm_op: runtime PM or system PM
7921 *
7922 * This function basically brings the UFS device, UniPro link and controller
7923 * to active state.
7924 *
7925 * Returns 0 for success and non-zero for failure
7926 */
7927static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7928{
7929 int ret;
7930 enum uic_link_state old_link_state;
7931
7932 hba->pm_op_in_progress = 1;
7933 old_link_state = hba->uic_link_state;
7934
7935 ufshcd_hba_vreg_set_hpm(hba);
7936 /* Make sure clocks are enabled before accessing controller */
7937 ret = ufshcd_setup_clocks(hba, true);
7938 if (ret)
7939 goto out;
7940
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007941 /* enable the host irq as host controller would be active soon */
7942 ret = ufshcd_enable_irq(hba);
7943 if (ret)
7944 goto disable_irq_and_vops_clks;
7945
7946 ret = ufshcd_vreg_set_hpm(hba);
7947 if (ret)
7948 goto disable_irq_and_vops_clks;
7949
7950 /*
7951 * Call vendor specific resume callback. As these callbacks may access
7952 * vendor specific host controller register space call them when the
7953 * host clocks are ON.
7954 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007955 ret = ufshcd_vops_resume(hba, pm_op);
7956 if (ret)
7957 goto disable_vreg;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007958
7959 if (ufshcd_is_link_hibern8(hba)) {
7960 ret = ufshcd_uic_hibern8_exit(hba);
7961 if (!ret)
7962 ufshcd_set_link_active(hba);
7963 else
7964 goto vendor_suspend;
7965 } else if (ufshcd_is_link_off(hba)) {
7966 ret = ufshcd_host_reset_and_restore(hba);
7967 /*
7968 * ufshcd_host_reset_and_restore() should have already
7969 * set the link state as active
7970 */
7971 if (ret || !ufshcd_is_link_active(hba))
7972 goto vendor_suspend;
7973 }
7974
7975 if (!ufshcd_is_ufs_dev_active(hba)) {
7976 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
7977 if (ret)
7978 goto set_old_link_state;
7979 }
7980
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08007981 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
7982 ufshcd_enable_auto_bkops(hba);
7983 else
7984 /*
7985 * If BKOPs operations are urgently needed at this moment then
7986 * keep auto-bkops enabled or else disable it.
7987 */
7988 ufshcd_urgent_bkops(hba);
7989
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007990 hba->clk_gating.is_suspended = false;
7991
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08007992 if (hba->clk_scaling.is_allowed)
7993 ufshcd_resume_clkscaling(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03007994
Adrian Hunterad448372018-03-20 15:07:38 +02007995 /* Enable Auto-Hibernate if configured */
7996 ufshcd_auto_hibern8_enable(hba);
7997
Can Guo71d848b2019-11-14 22:09:26 -08007998 /* Schedule clock gating in case of no access to UFS device yet */
7999 ufshcd_release(hba);
8000
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008001 goto out;
8002
8003set_old_link_state:
8004 ufshcd_link_state_transition(hba, old_link_state, 0);
8005vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008006 ufshcd_vops_suspend(hba, pm_op);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008007disable_vreg:
8008 ufshcd_vreg_set_lpm(hba);
8009disable_irq_and_vops_clks:
8010 ufshcd_disable_irq(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08008011 if (hba->clk_scaling.is_allowed)
8012 ufshcd_suspend_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008013 ufshcd_setup_clocks(hba, false);
8014out:
8015 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08008016 if (ret)
8017 ufshcd_update_reg_hist(&hba->ufs_stats.resume_err, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008018 return ret;
8019}
8020
8021/**
8022 * ufshcd_system_suspend - system suspend routine
8023 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008024 *
8025 * Check the description of ufshcd_suspend() function for more details.
8026 *
8027 * Returns 0 for success and non-zero for failure
8028 */
8029int ufshcd_system_suspend(struct ufs_hba *hba)
8030{
8031 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008032 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008033
8034 if (!hba || !hba->is_powered)
Dolev Raviv233b5942014-10-23 13:25:14 +03008035 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008036
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008037 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
8038 hba->curr_dev_pwr_mode) &&
8039 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
8040 hba->uic_link_state))
8041 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008042
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008043 if (pm_runtime_suspended(hba->dev)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008044 /*
8045 * UFS device and/or UFS link low power states during runtime
8046 * suspend seems to be different than what is expected during
8047 * system suspend. Hence runtime resume the devic & link and
8048 * let the system suspend low power states to take effect.
8049 * TODO: If resume takes longer time, we might have optimize
8050 * it in future by not resuming everything if possible.
8051 */
8052 ret = ufshcd_runtime_resume(hba);
8053 if (ret)
8054 goto out;
8055 }
8056
8057 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
8058out:
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008059 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
8060 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008061 hba->curr_dev_pwr_mode, hba->uic_link_state);
Dolev Ravive7850602014-09-25 15:32:36 +03008062 if (!ret)
8063 hba->is_sys_suspended = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008064 return ret;
8065}
8066EXPORT_SYMBOL(ufshcd_system_suspend);
8067
8068/**
8069 * ufshcd_system_resume - system resume routine
8070 * @hba: per adapter instance
8071 *
8072 * Returns 0 for success and non-zero for failure
8073 */
8074
8075int ufshcd_system_resume(struct ufs_hba *hba)
8076{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008077 int ret = 0;
8078 ktime_t start = ktime_get();
8079
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008080 if (!hba)
8081 return -EINVAL;
8082
8083 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008084 /*
8085 * Let the runtime resume take care of resuming
8086 * if runtime suspended.
8087 */
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008088 goto out;
8089 else
8090 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
8091out:
8092 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
8093 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008094 hba->curr_dev_pwr_mode, hba->uic_link_state);
Stanley Chuce9e7bc2019-01-07 22:19:34 +08008095 if (!ret)
8096 hba->is_sys_suspended = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008097 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008098}
8099EXPORT_SYMBOL(ufshcd_system_resume);
8100
8101/**
8102 * ufshcd_runtime_suspend - runtime suspend routine
8103 * @hba: per adapter instance
8104 *
8105 * Check the description of ufshcd_suspend() function for more details.
8106 *
8107 * Returns 0 for success and non-zero for failure
8108 */
8109int ufshcd_runtime_suspend(struct ufs_hba *hba)
8110{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008111 int ret = 0;
8112 ktime_t start = ktime_get();
8113
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008114 if (!hba)
8115 return -EINVAL;
8116
8117 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008118 goto out;
8119 else
8120 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
8121out:
8122 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
8123 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008124 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008125 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308126}
8127EXPORT_SYMBOL(ufshcd_runtime_suspend);
8128
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008129/**
8130 * ufshcd_runtime_resume - runtime resume routine
8131 * @hba: per adapter instance
8132 *
8133 * This function basically brings the UFS device, UniPro link and controller
8134 * to active state. Following operations are done in this function:
8135 *
8136 * 1. Turn on all the controller related clocks
8137 * 2. Bring the UniPro link out of Hibernate state
8138 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
8139 * to active state.
8140 * 4. If auto-bkops is enabled on the device, disable it.
8141 *
8142 * So following would be the possible power state after this function return
8143 * successfully:
8144 * S1: UFS device in Active state with VCC rail ON
8145 * UniPro link in Active state
8146 * All the UFS/UniPro controller clocks are ON
8147 *
8148 * Returns 0 for success and non-zero for failure
8149 */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308150int ufshcd_runtime_resume(struct ufs_hba *hba)
8151{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008152 int ret = 0;
8153 ktime_t start = ktime_get();
8154
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008155 if (!hba)
8156 return -EINVAL;
8157
8158 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008159 goto out;
8160 else
8161 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8162out:
8163 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8164 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008165 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008166 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308167}
8168EXPORT_SYMBOL(ufshcd_runtime_resume);
8169
8170int ufshcd_runtime_idle(struct ufs_hba *hba)
8171{
8172 return 0;
8173}
8174EXPORT_SYMBOL(ufshcd_runtime_idle);
8175
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308176/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008177 * ufshcd_shutdown - shutdown routine
8178 * @hba: per adapter instance
8179 *
8180 * This function would power off both UFS device and UFS link.
8181 *
8182 * Returns 0 always to allow force shutdown even in case of errors.
8183 */
8184int ufshcd_shutdown(struct ufs_hba *hba)
8185{
8186 int ret = 0;
8187
Stanley Chuf51913e2019-09-18 12:20:38 +08008188 if (!hba->is_powered)
8189 goto out;
8190
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008191 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
8192 goto out;
8193
8194 if (pm_runtime_suspended(hba->dev)) {
8195 ret = ufshcd_runtime_resume(hba);
8196 if (ret)
8197 goto out;
8198 }
8199
8200 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
8201out:
8202 if (ret)
8203 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
8204 /* allow force shutdown even in case of errors */
8205 return 0;
8206}
8207EXPORT_SYMBOL(ufshcd_shutdown);
8208
8209/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308210 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308211 * data structure memory
Bart Van Assche8aa29f12018-03-01 15:07:20 -08008212 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308213 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308214void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308215{
Avri Altmandf032bf2018-10-07 17:30:35 +03008216 ufs_bsg_remove(hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008217 ufs_sysfs_remove_nodes(hba->dev);
Bart Van Assche69a6c262019-12-09 10:13:09 -08008218 blk_cleanup_queue(hba->tmf_queue);
8219 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08008220 blk_cleanup_queue(hba->cmd_queue);
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05308221 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308222 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308223 ufshcd_disable_intr(hba, hba->intr_mask);
Yaniv Gardi596585a2016-03-10 17:37:08 +02008224 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308225
Vivek Gautameebcc192018-08-07 23:17:39 +05308226 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008227 ufshcd_exit_clk_gating(hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08008228 if (ufshcd_is_clkscaling_supported(hba))
8229 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008230 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308231}
8232EXPORT_SYMBOL_GPL(ufshcd_remove);
8233
8234/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02008235 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8236 * @hba: pointer to Host Bus Adapter (HBA)
8237 */
8238void ufshcd_dealloc_host(struct ufs_hba *hba)
8239{
8240 scsi_host_put(hba->host);
8241}
8242EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8243
8244/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008245 * ufshcd_set_dma_mask - Set dma mask based on the controller
8246 * addressing capability
8247 * @hba: per adapter instance
8248 *
8249 * Returns 0 for success, non-zero for failure
8250 */
8251static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8252{
8253 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8254 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8255 return 0;
8256 }
8257 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8258}
8259
8260/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008261 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308262 * @dev: pointer to device handle
8263 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308264 * Returns 0 on success, non-zero value on failure
8265 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008266int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308267{
8268 struct Scsi_Host *host;
8269 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008270 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308271
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308272 if (!dev) {
8273 dev_err(dev,
8274 "Invalid memory reference for dev is NULL\n");
8275 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308276 goto out_error;
8277 }
8278
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308279 host = scsi_host_alloc(&ufshcd_driver_template,
8280 sizeof(struct ufs_hba));
8281 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308282 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308283 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308284 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308285 }
8286 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308287 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308288 hba->dev = dev;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008289 *hba_handle = hba;
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05308290 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008291
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03008292 INIT_LIST_HEAD(&hba->clk_list_head);
8293
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008294out_error:
8295 return err;
8296}
8297EXPORT_SYMBOL(ufshcd_alloc_host);
8298
Bart Van Assche69a6c262019-12-09 10:13:09 -08008299/* This function exists because blk_mq_alloc_tag_set() requires this. */
8300static blk_status_t ufshcd_queue_tmf(struct blk_mq_hw_ctx *hctx,
8301 const struct blk_mq_queue_data *qd)
8302{
8303 WARN_ON_ONCE(true);
8304 return BLK_STS_NOTSUPP;
8305}
8306
8307static const struct blk_mq_ops ufshcd_tmf_ops = {
8308 .queue_rq = ufshcd_queue_tmf,
8309};
8310
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008311/**
8312 * ufshcd_init - Driver initialization routine
8313 * @hba: per-adapter instance
8314 * @mmio_base: base register address
8315 * @irq: Interrupt line of device
8316 * Returns 0 on success, non-zero value on failure
8317 */
8318int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
8319{
8320 int err;
8321 struct Scsi_Host *host = hba->host;
8322 struct device *dev = hba->dev;
8323
8324 if (!mmio_base) {
8325 dev_err(hba->dev,
8326 "Invalid memory reference for mmio_base is NULL\n");
8327 err = -ENODEV;
8328 goto out_error;
8329 }
8330
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308331 hba->mmio_base = mmio_base;
8332 hba->irq = irq;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308333
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008334 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008335 if (err)
8336 goto out_error;
8337
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308338 /* Read capabilities registers */
8339 ufshcd_hba_capabilities(hba);
8340
8341 /* Get UFS version supported by the controller */
8342 hba->ufs_version = ufshcd_get_ufs_version(hba);
8343
Yaniv Gardic01848c2016-12-05 19:25:02 -08008344 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
8345 (hba->ufs_version != UFSHCI_VERSION_11) &&
8346 (hba->ufs_version != UFSHCI_VERSION_20) &&
8347 (hba->ufs_version != UFSHCI_VERSION_21))
8348 dev_err(hba->dev, "invalid UFS version 0x%x\n",
8349 hba->ufs_version);
8350
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308351 /* Get Interrupt bit mask per version */
8352 hba->intr_mask = ufshcd_get_intr_mask(hba);
8353
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008354 err = ufshcd_set_dma_mask(hba);
8355 if (err) {
8356 dev_err(hba->dev, "set dma mask failed\n");
8357 goto out_disable;
8358 }
8359
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308360 /* Allocate memory for host memory space */
8361 err = ufshcd_memory_alloc(hba);
8362 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308363 dev_err(hba->dev, "Memory allocation failed\n");
8364 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308365 }
8366
8367 /* Configure LRB */
8368 ufshcd_host_memory_configure(hba);
8369
8370 host->can_queue = hba->nutrs;
8371 host->cmd_per_lun = hba->nutrs;
8372 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03008373 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308374 host->max_channel = UFSHCD_MAX_CHANNEL;
8375 host->unique_id = host->host_no;
Avri Altmana851b2b2018-10-07 17:30:34 +03008376 host->max_cmd_len = UFS_CDB_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308377
Dolev Raviv7eb584d2014-09-25 15:32:31 +03008378 hba->max_pwr_info.is_valid = false;
8379
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308380 /* Initialize work queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05308381 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308382 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308383
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308384 /* Initialize UIC command mutex */
8385 mutex_init(&hba->uic_cmd_mutex);
8386
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308387 /* Initialize mutex for device management commands */
8388 mutex_init(&hba->dev_cmd.lock);
8389
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08008390 init_rwsem(&hba->clk_scaling_lock);
8391
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008392 ufshcd_init_clk_gating(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02008393
Vivek Gautameebcc192018-08-07 23:17:39 +05308394 ufshcd_init_clk_scaling(hba);
8395
Yaniv Gardi199ef132016-03-10 17:37:06 +02008396 /*
8397 * In order to avoid any spurious interrupt immediately after
8398 * registering UFS controller interrupt handler, clear any pending UFS
8399 * interrupt status and disable all the UFS interrupts.
8400 */
8401 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
8402 REG_INTERRUPT_STATUS);
8403 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
8404 /*
8405 * Make sure that UFS interrupts are disabled and any pending interrupt
8406 * status is cleared before registering UFS interrupt handler.
8407 */
8408 mb();
8409
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308410 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09008411 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308412 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308413 dev_err(hba->dev, "request irq failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008414 goto exit_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008415 } else {
8416 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308417 }
8418
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308419 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308420 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308421 dev_err(hba->dev, "scsi_add_host failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008422 goto exit_gating;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308423 }
8424
Bart Van Assche7252a362019-12-09 10:13:08 -08008425 hba->cmd_queue = blk_mq_init_queue(&hba->host->tag_set);
8426 if (IS_ERR(hba->cmd_queue)) {
8427 err = PTR_ERR(hba->cmd_queue);
8428 goto out_remove_scsi_host;
8429 }
8430
Bart Van Assche69a6c262019-12-09 10:13:09 -08008431 hba->tmf_tag_set = (struct blk_mq_tag_set) {
8432 .nr_hw_queues = 1,
8433 .queue_depth = hba->nutmrs,
8434 .ops = &ufshcd_tmf_ops,
8435 .flags = BLK_MQ_F_NO_SCHED,
8436 };
8437 err = blk_mq_alloc_tag_set(&hba->tmf_tag_set);
8438 if (err < 0)
8439 goto free_cmd_queue;
8440 hba->tmf_queue = blk_mq_init_queue(&hba->tmf_tag_set);
8441 if (IS_ERR(hba->tmf_queue)) {
8442 err = PTR_ERR(hba->tmf_queue);
8443 goto free_tmf_tag_set;
8444 }
8445
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07008446 /* Reset the attached device */
8447 ufshcd_vops_device_reset(hba);
8448
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308449 /* Host controller enable */
8450 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308451 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308452 dev_err(hba->dev, "Host controller enable failed\n");
Dolev Raviv66cc8202016-12-22 18:39:42 -08008453 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08008454 ufshcd_print_host_state(hba);
Bart Van Assche69a6c262019-12-09 10:13:09 -08008455 goto free_tmf_queue;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308456 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308457
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -08008458 /*
8459 * Set the default power management level for runtime and system PM.
8460 * Default power saving mode is to keep UFS link in Hibern8 state
8461 * and UFS device in sleep state.
8462 */
8463 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8464 UFS_SLEEP_PWR_MODE,
8465 UIC_LINK_HIBERN8_STATE);
8466 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8467 UFS_SLEEP_PWR_MODE,
8468 UIC_LINK_HIBERN8_STATE);
8469
Adrian Hunterad448372018-03-20 15:07:38 +02008470 /* Set the default auto-hiberate idle timer value to 150 ms */
Stanley Chuf571b372019-05-21 14:44:53 +08008471 if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
Adrian Hunterad448372018-03-20 15:07:38 +02008472 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8473 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8474 }
8475
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05308476 /* Hold auto suspend until async scan completes */
8477 pm_runtime_get_sync(dev);
Subhash Jadavani38135532018-05-03 16:37:18 +05308478 atomic_set(&hba->scsi_block_reqs_cnt, 0);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008479 /*
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008480 * We are assuming that device wasn't put in sleep/power-down
8481 * state exclusively during the boot stage before kernel.
8482 * This assumption helps avoid doing link startup twice during
8483 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008484 */
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008485 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008486
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308487 async_schedule(ufshcd_async_scan, hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008488 ufs_sysfs_add_nodes(hba->dev);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308489
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308490 return 0;
8491
Bart Van Assche69a6c262019-12-09 10:13:09 -08008492free_tmf_queue:
8493 blk_cleanup_queue(hba->tmf_queue);
8494free_tmf_tag_set:
8495 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08008496free_cmd_queue:
8497 blk_cleanup_queue(hba->cmd_queue);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308498out_remove_scsi_host:
8499 scsi_remove_host(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008500exit_gating:
Vivek Gautameebcc192018-08-07 23:17:39 +05308501 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008502 ufshcd_exit_clk_gating(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308503out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008504 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008505 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308506out_error:
8507 return err;
8508}
8509EXPORT_SYMBOL_GPL(ufshcd_init);
8510
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308511MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8512MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05308513MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308514MODULE_LICENSE("GPL");
8515MODULE_VERSION(UFSHCD_DRIVER_VERSION);