blob: 6e36deb505b1e1e76013ccc83e9e93e0817be4df [file] [log] [blame]
Sanyog Kale89e59052018-04-26 18:38:08 +05301// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2// Copyright(c) 2015-18 Intel Corporation.
3
4/*
5 * stream.c - SoundWire Bus stream operations.
6 */
7
8#include <linux/delay.h>
9#include <linux/device.h>
10#include <linux/init.h>
11#include <linux/module.h>
12#include <linux/mod_devicetable.h>
13#include <linux/slab.h>
Sanyog Kalef8101c72018-04-26 18:38:17 +053014#include <linux/soundwire/sdw_registers.h>
Sanyog Kale89e59052018-04-26 18:38:08 +053015#include <linux/soundwire/sdw.h>
Pierre-Louis Bossart45505692020-07-01 02:43:53 +080016#include <sound/soc.h>
Sanyog Kale89e59052018-04-26 18:38:08 +053017#include "bus.h"
18
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053019/*
20 * Array of supported rows and columns as per MIPI SoundWire Specification 1.1
21 *
22 * The rows are arranged as per the array index value programmed
23 * in register. The index 15 has dummy value 0 in order to fill hole.
24 */
Pierre-Louis Bossartfe4b70f2019-08-05 19:55:10 -050025int sdw_rows[SDW_FRAME_ROWS] = {48, 50, 60, 64, 75, 80, 125, 147,
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053026 96, 100, 120, 128, 150, 160, 250, 0,
27 192, 200, 240, 256, 72, 144, 90, 180};
28
Pierre-Louis Bossartfe4b70f2019-08-05 19:55:10 -050029int sdw_cols[SDW_FRAME_COLS] = {2, 4, 6, 8, 10, 12, 14, 16};
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053030
Pierre-Louis Bossartfe4b70f2019-08-05 19:55:10 -050031int sdw_find_col_index(int col)
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053032{
33 int i;
34
35 for (i = 0; i < SDW_FRAME_COLS; i++) {
Pierre-Louis Bossartfe4b70f2019-08-05 19:55:10 -050036 if (sdw_cols[i] == col)
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053037 return i;
38 }
39
40 pr_warn("Requested column not found, selecting lowest column no: 2\n");
41 return 0;
42}
Pierre-Louis Bossartfe4b70f2019-08-05 19:55:10 -050043EXPORT_SYMBOL(sdw_find_col_index);
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053044
Pierre-Louis Bossartfe4b70f2019-08-05 19:55:10 -050045int sdw_find_row_index(int row)
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053046{
47 int i;
48
49 for (i = 0; i < SDW_FRAME_ROWS; i++) {
Pierre-Louis Bossartfe4b70f2019-08-05 19:55:10 -050050 if (sdw_rows[i] == row)
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053051 return i;
52 }
53
54 pr_warn("Requested row not found, selecting lowest row no: 48\n");
55 return 0;
56}
Pierre-Louis Bossartfe4b70f2019-08-05 19:55:10 -050057EXPORT_SYMBOL(sdw_find_row_index);
Vinod Koul897fe402019-05-02 16:29:29 +053058
Sanyog Kalef8101c72018-04-26 18:38:17 +053059static int _sdw_program_slave_port_params(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -050060 struct sdw_slave *slave,
61 struct sdw_transport_params *t_params,
62 enum sdw_dpn_type type)
Sanyog Kalef8101c72018-04-26 18:38:17 +053063{
64 u32 addr1, addr2, addr3, addr4;
65 int ret;
66 u16 wbuf;
67
68 if (bus->params.next_bank) {
69 addr1 = SDW_DPN_OFFSETCTRL2_B1(t_params->port_num);
70 addr2 = SDW_DPN_BLOCKCTRL3_B1(t_params->port_num);
71 addr3 = SDW_DPN_SAMPLECTRL2_B1(t_params->port_num);
72 addr4 = SDW_DPN_HCTRL_B1(t_params->port_num);
73 } else {
74 addr1 = SDW_DPN_OFFSETCTRL2_B0(t_params->port_num);
75 addr2 = SDW_DPN_BLOCKCTRL3_B0(t_params->port_num);
76 addr3 = SDW_DPN_SAMPLECTRL2_B0(t_params->port_num);
77 addr4 = SDW_DPN_HCTRL_B0(t_params->port_num);
78 }
79
80 /* Program DPN_OffsetCtrl2 registers */
81 ret = sdw_write(slave, addr1, t_params->offset2);
82 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -050083 dev_err(bus->dev, "DPN_OffsetCtrl2 register write failed\n");
Sanyog Kalef8101c72018-04-26 18:38:17 +053084 return ret;
85 }
86
87 /* Program DPN_BlockCtrl3 register */
88 ret = sdw_write(slave, addr2, t_params->blk_pkg_mode);
89 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -050090 dev_err(bus->dev, "DPN_BlockCtrl3 register write failed\n");
Sanyog Kalef8101c72018-04-26 18:38:17 +053091 return ret;
92 }
93
94 /*
95 * Data ports are FULL, SIMPLE and REDUCED. This function handles
Vinod Koul7d3b3cd2019-05-02 16:29:27 +053096 * FULL and REDUCED only and beyond this point only FULL is
Sanyog Kalef8101c72018-04-26 18:38:17 +053097 * handled, so bail out if we are not FULL data port type
98 */
99 if (type != SDW_DPN_FULL)
100 return ret;
101
102 /* Program DPN_SampleCtrl2 register */
103 wbuf = (t_params->sample_interval - 1);
104 wbuf &= SDW_DPN_SAMPLECTRL_HIGH;
105 wbuf >>= SDW_REG_SHIFT(SDW_DPN_SAMPLECTRL_HIGH);
106
107 ret = sdw_write(slave, addr3, wbuf);
108 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500109 dev_err(bus->dev, "DPN_SampleCtrl2 register write failed\n");
Sanyog Kalef8101c72018-04-26 18:38:17 +0530110 return ret;
111 }
112
113 /* Program DPN_HCtrl register */
114 wbuf = t_params->hstart;
115 wbuf <<= SDW_REG_SHIFT(SDW_DPN_HCTRL_HSTART);
116 wbuf |= t_params->hstop;
117
118 ret = sdw_write(slave, addr4, wbuf);
119 if (ret < 0)
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500120 dev_err(bus->dev, "DPN_HCtrl register write failed\n");
Sanyog Kalef8101c72018-04-26 18:38:17 +0530121
122 return ret;
123}
124
125static int sdw_program_slave_port_params(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500126 struct sdw_slave_runtime *s_rt,
127 struct sdw_port_runtime *p_rt)
Sanyog Kalef8101c72018-04-26 18:38:17 +0530128{
129 struct sdw_transport_params *t_params = &p_rt->transport_params;
130 struct sdw_port_params *p_params = &p_rt->port_params;
131 struct sdw_slave_prop *slave_prop = &s_rt->slave->prop;
132 u32 addr1, addr2, addr3, addr4, addr5, addr6;
133 struct sdw_dpn_prop *dpn_prop;
134 int ret;
135 u8 wbuf;
136
137 dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500138 s_rt->direction,
139 t_params->port_num);
Sanyog Kalef8101c72018-04-26 18:38:17 +0530140 if (!dpn_prop)
141 return -EINVAL;
142
143 addr1 = SDW_DPN_PORTCTRL(t_params->port_num);
144 addr2 = SDW_DPN_BLOCKCTRL1(t_params->port_num);
145
146 if (bus->params.next_bank) {
147 addr3 = SDW_DPN_SAMPLECTRL1_B1(t_params->port_num);
148 addr4 = SDW_DPN_OFFSETCTRL1_B1(t_params->port_num);
149 addr5 = SDW_DPN_BLOCKCTRL2_B1(t_params->port_num);
150 addr6 = SDW_DPN_LANECTRL_B1(t_params->port_num);
151
152 } else {
153 addr3 = SDW_DPN_SAMPLECTRL1_B0(t_params->port_num);
154 addr4 = SDW_DPN_OFFSETCTRL1_B0(t_params->port_num);
155 addr5 = SDW_DPN_BLOCKCTRL2_B0(t_params->port_num);
156 addr6 = SDW_DPN_LANECTRL_B0(t_params->port_num);
157 }
158
159 /* Program DPN_PortCtrl register */
160 wbuf = p_params->data_mode << SDW_REG_SHIFT(SDW_DPN_PORTCTRL_DATAMODE);
161 wbuf |= p_params->flow_mode;
162
163 ret = sdw_update(s_rt->slave, addr1, 0xF, wbuf);
164 if (ret < 0) {
165 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500166 "DPN_PortCtrl register write failed for port %d\n",
Sanyog Kalef8101c72018-04-26 18:38:17 +0530167 t_params->port_num);
168 return ret;
169 }
170
Srinivas Kandagatlaa9107de2020-03-11 11:35:44 +0000171 if (!dpn_prop->read_only_wordlength) {
172 /* Program DPN_BlockCtrl1 register */
173 ret = sdw_write(s_rt->slave, addr2, (p_params->bps - 1));
174 if (ret < 0) {
175 dev_err(&s_rt->slave->dev,
176 "DPN_BlockCtrl1 register write failed for port %d\n",
177 t_params->port_num);
178 return ret;
179 }
Sanyog Kalef8101c72018-04-26 18:38:17 +0530180 }
181
182 /* Program DPN_SampleCtrl1 register */
183 wbuf = (t_params->sample_interval - 1) & SDW_DPN_SAMPLECTRL_LOW;
184 ret = sdw_write(s_rt->slave, addr3, wbuf);
185 if (ret < 0) {
186 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500187 "DPN_SampleCtrl1 register write failed for port %d\n",
Sanyog Kalef8101c72018-04-26 18:38:17 +0530188 t_params->port_num);
189 return ret;
190 }
191
192 /* Program DPN_OffsetCtrl1 registers */
193 ret = sdw_write(s_rt->slave, addr4, t_params->offset1);
194 if (ret < 0) {
195 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500196 "DPN_OffsetCtrl1 register write failed for port %d\n",
Sanyog Kalef8101c72018-04-26 18:38:17 +0530197 t_params->port_num);
198 return ret;
199 }
200
201 /* Program DPN_BlockCtrl2 register*/
202 if (t_params->blk_grp_ctrl_valid) {
203 ret = sdw_write(s_rt->slave, addr5, t_params->blk_grp_ctrl);
204 if (ret < 0) {
205 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500206 "DPN_BlockCtrl2 reg write failed for port %d\n",
Sanyog Kalef8101c72018-04-26 18:38:17 +0530207 t_params->port_num);
208 return ret;
209 }
210 }
211
212 /* program DPN_LaneCtrl register */
213 if (slave_prop->lane_control_support) {
214 ret = sdw_write(s_rt->slave, addr6, t_params->lane_ctrl);
215 if (ret < 0) {
216 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500217 "DPN_LaneCtrl register write failed for port %d\n",
Sanyog Kalef8101c72018-04-26 18:38:17 +0530218 t_params->port_num);
219 return ret;
220 }
221 }
222
223 if (dpn_prop->type != SDW_DPN_SIMPLE) {
224 ret = _sdw_program_slave_port_params(bus, s_rt->slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500225 t_params, dpn_prop->type);
Sanyog Kalef8101c72018-04-26 18:38:17 +0530226 if (ret < 0)
227 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500228 "Transport reg write failed for port: %d\n",
Sanyog Kalef8101c72018-04-26 18:38:17 +0530229 t_params->port_num);
230 }
231
232 return ret;
233}
234
235static int sdw_program_master_port_params(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500236 struct sdw_port_runtime *p_rt)
Sanyog Kalef8101c72018-04-26 18:38:17 +0530237{
238 int ret;
239
240 /*
241 * we need to set transport and port parameters for the port.
Vinod Koul7d3b3cd2019-05-02 16:29:27 +0530242 * Transport parameters refers to the sample interval, offsets and
Sanyog Kalef8101c72018-04-26 18:38:17 +0530243 * hstart/stop etc of the data. Port parameters refers to word
244 * length, flow mode etc of the port
245 */
246 ret = bus->port_ops->dpn_set_port_transport_params(bus,
247 &p_rt->transport_params,
248 bus->params.next_bank);
249 if (ret < 0)
250 return ret;
251
252 return bus->port_ops->dpn_set_port_params(bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500253 &p_rt->port_params,
254 bus->params.next_bank);
Sanyog Kalef8101c72018-04-26 18:38:17 +0530255}
256
257/**
258 * sdw_program_port_params() - Programs transport parameters of Master(s)
259 * and Slave(s)
260 *
261 * @m_rt: Master stream runtime
262 */
263static int sdw_program_port_params(struct sdw_master_runtime *m_rt)
264{
265 struct sdw_slave_runtime *s_rt = NULL;
266 struct sdw_bus *bus = m_rt->bus;
267 struct sdw_port_runtime *p_rt;
268 int ret = 0;
269
270 /* Program transport & port parameters for Slave(s) */
271 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
272 list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
273 ret = sdw_program_slave_port_params(bus, s_rt, p_rt);
274 if (ret < 0)
275 return ret;
276 }
277 }
278
279 /* Program transport & port parameters for Master(s) */
280 list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
281 ret = sdw_program_master_port_params(bus, p_rt);
282 if (ret < 0)
283 return ret;
284 }
285
286 return 0;
287}
288
Sanyog Kale89e59052018-04-26 18:38:08 +0530289/**
Sanyog Kale79df15b2018-04-26 18:38:23 +0530290 * sdw_enable_disable_slave_ports: Enable/disable slave data port
291 *
292 * @bus: bus instance
293 * @s_rt: slave runtime
294 * @p_rt: port runtime
295 * @en: enable or disable operation
296 *
297 * This function only sets the enable/disable bits in the relevant bank, the
298 * actual enable/disable is done with a bank switch
299 */
300static int sdw_enable_disable_slave_ports(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500301 struct sdw_slave_runtime *s_rt,
302 struct sdw_port_runtime *p_rt,
303 bool en)
Sanyog Kale79df15b2018-04-26 18:38:23 +0530304{
305 struct sdw_transport_params *t_params = &p_rt->transport_params;
306 u32 addr;
307 int ret;
308
309 if (bus->params.next_bank)
310 addr = SDW_DPN_CHANNELEN_B1(p_rt->num);
311 else
312 addr = SDW_DPN_CHANNELEN_B0(p_rt->num);
313
314 /*
315 * Since bus doesn't support sharing a port across two streams,
316 * it is safe to reset this register
317 */
318 if (en)
Srinivas Kandagatla0b43fef2020-03-12 10:01:05 +0000319 ret = sdw_write(s_rt->slave, addr, p_rt->ch_mask);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530320 else
Srinivas Kandagatla0b43fef2020-03-12 10:01:05 +0000321 ret = sdw_write(s_rt->slave, addr, 0x0);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530322
323 if (ret < 0)
324 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500325 "Slave chn_en reg write failed:%d port:%d\n",
Sanyog Kale79df15b2018-04-26 18:38:23 +0530326 ret, t_params->port_num);
327
328 return ret;
329}
330
331static int sdw_enable_disable_master_ports(struct sdw_master_runtime *m_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500332 struct sdw_port_runtime *p_rt,
333 bool en)
Sanyog Kale79df15b2018-04-26 18:38:23 +0530334{
335 struct sdw_transport_params *t_params = &p_rt->transport_params;
336 struct sdw_bus *bus = m_rt->bus;
337 struct sdw_enable_ch enable_ch;
Pierre-Louis Bossarta25eab22019-04-10 22:17:00 -0500338 int ret;
Sanyog Kale79df15b2018-04-26 18:38:23 +0530339
340 enable_ch.port_num = p_rt->num;
341 enable_ch.ch_mask = p_rt->ch_mask;
342 enable_ch.enable = en;
343
344 /* Perform Master port channel(s) enable/disable */
345 if (bus->port_ops->dpn_port_enable_ch) {
346 ret = bus->port_ops->dpn_port_enable_ch(bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500347 &enable_ch,
348 bus->params.next_bank);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530349 if (ret < 0) {
350 dev_err(bus->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500351 "Master chn_en write failed:%d port:%d\n",
Sanyog Kale79df15b2018-04-26 18:38:23 +0530352 ret, t_params->port_num);
353 return ret;
354 }
355 } else {
356 dev_err(bus->dev,
357 "dpn_port_enable_ch not supported, %s failed\n",
358 en ? "enable" : "disable");
359 return -EINVAL;
360 }
361
362 return 0;
363}
364
365/**
366 * sdw_enable_disable_ports() - Enable/disable port(s) for Master and
367 * Slave(s)
368 *
369 * @m_rt: Master stream runtime
370 * @en: mode (enable/disable)
371 */
372static int sdw_enable_disable_ports(struct sdw_master_runtime *m_rt, bool en)
373{
374 struct sdw_port_runtime *s_port, *m_port;
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500375 struct sdw_slave_runtime *s_rt;
Sanyog Kale79df15b2018-04-26 18:38:23 +0530376 int ret = 0;
377
378 /* Enable/Disable Slave port(s) */
379 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
380 list_for_each_entry(s_port, &s_rt->port_list, port_node) {
381 ret = sdw_enable_disable_slave_ports(m_rt->bus, s_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500382 s_port, en);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530383 if (ret < 0)
384 return ret;
385 }
386 }
387
388 /* Enable/Disable Master port(s) */
389 list_for_each_entry(m_port, &m_rt->port_list, port_node) {
390 ret = sdw_enable_disable_master_ports(m_rt, m_port, en);
391 if (ret < 0)
392 return ret;
393 }
394
395 return 0;
396}
397
398static int sdw_do_port_prep(struct sdw_slave_runtime *s_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500399 struct sdw_prepare_ch prep_ch,
400 enum sdw_port_prep_ops cmd)
Sanyog Kale79df15b2018-04-26 18:38:23 +0530401{
402 const struct sdw_slave_ops *ops = s_rt->slave->ops;
403 int ret;
404
405 if (ops->port_prep) {
406 ret = ops->port_prep(s_rt->slave, &prep_ch, cmd);
407 if (ret < 0) {
408 dev_err(&s_rt->slave->dev,
Vinod Koul62f0cec2019-05-02 16:29:24 +0530409 "Slave Port Prep cmd %d failed: %d\n",
410 cmd, ret);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530411 return ret;
412 }
413 }
414
415 return 0;
416}
417
418static int sdw_prep_deprep_slave_ports(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500419 struct sdw_slave_runtime *s_rt,
420 struct sdw_port_runtime *p_rt,
421 bool prep)
Sanyog Kale79df15b2018-04-26 18:38:23 +0530422{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500423 struct completion *port_ready;
Sanyog Kale79df15b2018-04-26 18:38:23 +0530424 struct sdw_dpn_prop *dpn_prop;
425 struct sdw_prepare_ch prep_ch;
426 unsigned int time_left;
427 bool intr = false;
428 int ret = 0, val;
429 u32 addr;
430
431 prep_ch.num = p_rt->num;
432 prep_ch.ch_mask = p_rt->ch_mask;
433
434 dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500435 s_rt->direction,
436 prep_ch.num);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530437 if (!dpn_prop) {
438 dev_err(bus->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500439 "Slave Port:%d properties not found\n", prep_ch.num);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530440 return -EINVAL;
441 }
442
443 prep_ch.prepare = prep;
444
445 prep_ch.bank = bus->params.next_bank;
446
Pierre-Louis Bossart8acbbfe2019-05-22 14:47:25 -0500447 if (dpn_prop->imp_def_interrupts || !dpn_prop->simple_ch_prep_sm)
Sanyog Kale79df15b2018-04-26 18:38:23 +0530448 intr = true;
449
450 /*
451 * Enable interrupt before Port prepare.
452 * For Port de-prepare, it is assumed that port
453 * was prepared earlier
454 */
455 if (prep && intr) {
456 ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep,
Pierre-Louis Bossart8acbbfe2019-05-22 14:47:25 -0500457 dpn_prop->imp_def_interrupts);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530458 if (ret < 0)
459 return ret;
460 }
461
462 /* Inform slave about the impending port prepare */
463 sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_PRE_PREP);
464
465 /* Prepare Slave port implementing CP_SM */
466 if (!dpn_prop->simple_ch_prep_sm) {
467 addr = SDW_DPN_PREPARECTRL(p_rt->num);
468
469 if (prep)
Srinivas Kandagatla0b43fef2020-03-12 10:01:05 +0000470 ret = sdw_write(s_rt->slave, addr, p_rt->ch_mask);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530471 else
Srinivas Kandagatla0b43fef2020-03-12 10:01:05 +0000472 ret = sdw_write(s_rt->slave, addr, 0x0);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530473
474 if (ret < 0) {
475 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500476 "Slave prep_ctrl reg write failed\n");
Sanyog Kale79df15b2018-04-26 18:38:23 +0530477 return ret;
478 }
479
480 /* Wait for completion on port ready */
481 port_ready = &s_rt->slave->port_ready[prep_ch.num];
482 time_left = wait_for_completion_timeout(port_ready,
483 msecs_to_jiffies(dpn_prop->ch_prep_timeout));
484
485 val = sdw_read(s_rt->slave, SDW_DPN_PREPARESTATUS(p_rt->num));
486 val &= p_rt->ch_mask;
487 if (!time_left || val) {
488 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500489 "Chn prep failed for port:%d\n", prep_ch.num);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530490 return -ETIMEDOUT;
491 }
492 }
493
494 /* Inform slaves about ports prepared */
495 sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_POST_PREP);
496
497 /* Disable interrupt after Port de-prepare */
498 if (!prep && intr)
499 ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep,
Pierre-Louis Bossart8acbbfe2019-05-22 14:47:25 -0500500 dpn_prop->imp_def_interrupts);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530501
502 return ret;
503}
504
505static int sdw_prep_deprep_master_ports(struct sdw_master_runtime *m_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500506 struct sdw_port_runtime *p_rt,
507 bool prep)
Sanyog Kale79df15b2018-04-26 18:38:23 +0530508{
509 struct sdw_transport_params *t_params = &p_rt->transport_params;
510 struct sdw_bus *bus = m_rt->bus;
511 const struct sdw_master_port_ops *ops = bus->port_ops;
512 struct sdw_prepare_ch prep_ch;
513 int ret = 0;
514
515 prep_ch.num = p_rt->num;
516 prep_ch.ch_mask = p_rt->ch_mask;
517 prep_ch.prepare = prep; /* Prepare/De-prepare */
518 prep_ch.bank = bus->params.next_bank;
519
520 /* Pre-prepare/Pre-deprepare port(s) */
521 if (ops->dpn_port_prep) {
522 ret = ops->dpn_port_prep(bus, &prep_ch);
523 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500524 dev_err(bus->dev, "Port prepare failed for port:%d\n",
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500525 t_params->port_num);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530526 return ret;
527 }
528 }
529
530 return ret;
531}
532
533/**
534 * sdw_prep_deprep_ports() - Prepare/De-prepare port(s) for Master(s) and
535 * Slave(s)
536 *
537 * @m_rt: Master runtime handle
538 * @prep: Prepare or De-prepare
539 */
540static int sdw_prep_deprep_ports(struct sdw_master_runtime *m_rt, bool prep)
541{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500542 struct sdw_slave_runtime *s_rt;
Sanyog Kale79df15b2018-04-26 18:38:23 +0530543 struct sdw_port_runtime *p_rt;
544 int ret = 0;
545
546 /* Prepare/De-prepare Slave port(s) */
547 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
548 list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
549 ret = sdw_prep_deprep_slave_ports(m_rt->bus, s_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500550 p_rt, prep);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530551 if (ret < 0)
552 return ret;
553 }
554 }
555
556 /* Prepare/De-prepare Master port(s) */
557 list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
558 ret = sdw_prep_deprep_master_ports(m_rt, p_rt, prep);
559 if (ret < 0)
560 return ret;
561 }
562
563 return ret;
564}
565
566/**
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530567 * sdw_notify_config() - Notify bus configuration
568 *
569 * @m_rt: Master runtime handle
570 *
571 * This function notifies the Master(s) and Slave(s) of the
572 * new bus configuration.
573 */
574static int sdw_notify_config(struct sdw_master_runtime *m_rt)
575{
576 struct sdw_slave_runtime *s_rt;
577 struct sdw_bus *bus = m_rt->bus;
578 struct sdw_slave *slave;
579 int ret = 0;
580
581 if (bus->ops->set_bus_conf) {
582 ret = bus->ops->set_bus_conf(bus, &bus->params);
583 if (ret < 0)
584 return ret;
585 }
586
587 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
588 slave = s_rt->slave;
589
590 if (slave->ops->bus_config) {
591 ret = slave->ops->bus_config(slave, &bus->params);
Rander Wang60835022020-01-14 17:52:26 -0600592 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500593 dev_err(bus->dev, "Notify Slave: %d failed\n",
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500594 slave->dev_num);
Rander Wang60835022020-01-14 17:52:26 -0600595 return ret;
596 }
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530597 }
598 }
599
600 return ret;
601}
602
603/**
604 * sdw_program_params() - Program transport and port parameters for Master(s)
605 * and Slave(s)
606 *
607 * @bus: SDW bus instance
Rander Wangbfaa3542020-01-14 17:52:27 -0600608 * @prepare: true if sdw_program_params() is called by _prepare.
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530609 */
Rander Wangbfaa3542020-01-14 17:52:27 -0600610static int sdw_program_params(struct sdw_bus *bus, bool prepare)
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530611{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500612 struct sdw_master_runtime *m_rt;
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530613 int ret = 0;
614
615 list_for_each_entry(m_rt, &bus->m_rt_list, bus_node) {
Rander Wangbfaa3542020-01-14 17:52:27 -0600616
617 /*
618 * this loop walks through all master runtimes for a
619 * bus, but the ports can only be configured while
620 * explicitly preparing a stream or handling an
621 * already-prepared stream otherwise.
622 */
623 if (!prepare &&
624 m_rt->stream->state == SDW_STREAM_CONFIGURED)
625 continue;
626
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530627 ret = sdw_program_port_params(m_rt);
628 if (ret < 0) {
629 dev_err(bus->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500630 "Program transport params failed: %d\n", ret);
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530631 return ret;
632 }
633
634 ret = sdw_notify_config(m_rt);
635 if (ret < 0) {
Vinod Koul62f0cec2019-05-02 16:29:24 +0530636 dev_err(bus->dev,
637 "Notify bus config failed: %d\n", ret);
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530638 return ret;
639 }
640
641 /* Enable port(s) on alternate bank for all active streams */
642 if (m_rt->stream->state != SDW_STREAM_ENABLED)
643 continue;
644
645 ret = sdw_enable_disable_ports(m_rt, true);
646 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500647 dev_err(bus->dev, "Enable channel failed: %d\n", ret);
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530648 return ret;
649 }
650 }
651
652 return ret;
653}
654
Shreyas NCce6e74d2018-07-27 14:44:16 +0530655static int sdw_bank_switch(struct sdw_bus *bus, int m_rt_count)
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530656{
657 int col_index, row_index;
Shreyas NCce6e74d2018-07-27 14:44:16 +0530658 bool multi_link;
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530659 struct sdw_msg *wr_msg;
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500660 u8 *wbuf;
661 int ret;
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530662 u16 addr;
663
664 wr_msg = kzalloc(sizeof(*wr_msg), GFP_KERNEL);
665 if (!wr_msg)
666 return -ENOMEM;
667
Shreyas NCce6e74d2018-07-27 14:44:16 +0530668 bus->defer_msg.msg = wr_msg;
669
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530670 wbuf = kzalloc(sizeof(*wbuf), GFP_KERNEL);
671 if (!wbuf) {
672 ret = -ENOMEM;
673 goto error_1;
674 }
675
676 /* Get row and column index to program register */
677 col_index = sdw_find_col_index(bus->params.col);
678 row_index = sdw_find_row_index(bus->params.row);
679 wbuf[0] = col_index | (row_index << 3);
680
681 if (bus->params.next_bank)
682 addr = SDW_SCP_FRAMECTRL_B1;
683 else
684 addr = SDW_SCP_FRAMECTRL_B0;
685
686 sdw_fill_msg(wr_msg, NULL, addr, 1, SDW_BROADCAST_DEV_NUM,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500687 SDW_MSG_FLAG_WRITE, wbuf);
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530688 wr_msg->ssp_sync = true;
689
Shreyas NCce6e74d2018-07-27 14:44:16 +0530690 /*
691 * Set the multi_link flag only when both the hardware supports
692 * and there is a stream handled by multiple masters
693 */
694 multi_link = bus->multi_link && (m_rt_count > 1);
695
696 if (multi_link)
697 ret = sdw_transfer_defer(bus, wr_msg, &bus->defer_msg);
698 else
699 ret = sdw_transfer(bus, wr_msg);
700
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530701 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500702 dev_err(bus->dev, "Slave frame_ctrl reg write failed\n");
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530703 goto error;
704 }
705
Shreyas NCce6e74d2018-07-27 14:44:16 +0530706 if (!multi_link) {
707 kfree(wr_msg);
708 kfree(wbuf);
709 bus->defer_msg.msg = NULL;
710 bus->params.curr_bank = !bus->params.curr_bank;
711 bus->params.next_bank = !bus->params.next_bank;
712 }
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530713
714 return 0;
715
716error:
717 kfree(wbuf);
718error_1:
719 kfree(wr_msg);
Tom Rix3fbbf212020-09-02 13:26:50 -0700720 bus->defer_msg.msg = NULL;
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530721 return ret;
722}
723
Shreyas NCce6e74d2018-07-27 14:44:16 +0530724/**
725 * sdw_ml_sync_bank_switch: Multilink register bank switch
726 *
727 * @bus: SDW bus instance
728 *
729 * Caller function should free the buffers on error
730 */
731static int sdw_ml_sync_bank_switch(struct sdw_bus *bus)
732{
733 unsigned long time_left;
734
735 if (!bus->multi_link)
736 return 0;
737
738 /* Wait for completion of transfer */
739 time_left = wait_for_completion_timeout(&bus->defer_msg.complete,
740 bus->bank_switch_timeout);
741
742 if (!time_left) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500743 dev_err(bus->dev, "Controller Timed out on bank switch\n");
Shreyas NCce6e74d2018-07-27 14:44:16 +0530744 return -ETIMEDOUT;
745 }
746
747 bus->params.curr_bank = !bus->params.curr_bank;
748 bus->params.next_bank = !bus->params.next_bank;
749
750 if (bus->defer_msg.msg) {
751 kfree(bus->defer_msg.msg->buf);
752 kfree(bus->defer_msg.msg);
753 }
754
755 return 0;
756}
757
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530758static int do_bank_switch(struct sdw_stream_runtime *stream)
759{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500760 struct sdw_master_runtime *m_rt;
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530761 const struct sdw_master_ops *ops;
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500762 struct sdw_bus *bus;
Shreyas NCce6e74d2018-07-27 14:44:16 +0530763 bool multi_link = false;
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530764 int ret = 0;
765
Vinod Koul48949722018-07-27 14:44:14 +0530766 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
767 bus = m_rt->bus;
768 ops = bus->ops;
769
Shreyas NCce6e74d2018-07-27 14:44:16 +0530770 if (bus->multi_link) {
771 multi_link = true;
772 mutex_lock(&bus->msg_lock);
773 }
774
Vinod Koul48949722018-07-27 14:44:14 +0530775 /* Pre-bank switch */
776 if (ops->pre_bank_switch) {
777 ret = ops->pre_bank_switch(bus);
778 if (ret < 0) {
779 dev_err(bus->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500780 "Pre bank switch op failed: %d\n", ret);
Shreyas NCce6e74d2018-07-27 14:44:16 +0530781 goto msg_unlock;
Vinod Koul48949722018-07-27 14:44:14 +0530782 }
783 }
784
Shreyas NCce6e74d2018-07-27 14:44:16 +0530785 /*
786 * Perform Bank switch operation.
787 * For multi link cases, the actual bank switch is
788 * synchronized across all Masters and happens later as a
789 * part of post_bank_switch ops.
790 */
791 ret = sdw_bank_switch(bus, stream->m_rt_count);
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530792 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500793 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
Shreyas NCce6e74d2018-07-27 14:44:16 +0530794 goto error;
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530795 }
796 }
797
Shreyas NCce6e74d2018-07-27 14:44:16 +0530798 /*
799 * For multi link cases, it is expected that the bank switch is
800 * triggered by the post_bank_switch for the first Master in the list
801 * and for the other Masters the post_bank_switch() should return doing
802 * nothing.
803 */
Vinod Koul48949722018-07-27 14:44:14 +0530804 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
805 bus = m_rt->bus;
806 ops = bus->ops;
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530807
Vinod Koul48949722018-07-27 14:44:14 +0530808 /* Post-bank switch */
809 if (ops->post_bank_switch) {
810 ret = ops->post_bank_switch(bus);
811 if (ret < 0) {
812 dev_err(bus->dev,
Vinod Koul62f0cec2019-05-02 16:29:24 +0530813 "Post bank switch op failed: %d\n",
814 ret);
Shreyas NCce6e74d2018-07-27 14:44:16 +0530815 goto error;
Vinod Koul48949722018-07-27 14:44:14 +0530816 }
Shreyas NCce6e74d2018-07-27 14:44:16 +0530817 } else if (bus->multi_link && stream->m_rt_count > 1) {
818 dev_err(bus->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500819 "Post bank switch ops not implemented\n");
Shreyas NCce6e74d2018-07-27 14:44:16 +0530820 goto error;
821 }
822
823 /* Set the bank switch timeout to default, if not set */
824 if (!bus->bank_switch_timeout)
825 bus->bank_switch_timeout = DEFAULT_BANK_SWITCH_TIMEOUT;
826
827 /* Check if bank switch was successful */
828 ret = sdw_ml_sync_bank_switch(bus);
829 if (ret < 0) {
830 dev_err(bus->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500831 "multi link bank switch failed: %d\n", ret);
Shreyas NCce6e74d2018-07-27 14:44:16 +0530832 goto error;
833 }
834
Srinivas Kandagatla9315d902019-06-06 12:22:22 +0100835 if (bus->multi_link)
836 mutex_unlock(&bus->msg_lock);
Shreyas NCce6e74d2018-07-27 14:44:16 +0530837 }
838
839 return ret;
840
841error:
842 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
Shreyas NCce6e74d2018-07-27 14:44:16 +0530843 bus = m_rt->bus;
Tom Rix3fbbf212020-09-02 13:26:50 -0700844 if (bus->defer_msg.msg) {
845 kfree(bus->defer_msg.msg->buf);
846 kfree(bus->defer_msg.msg);
847 }
Shreyas NCce6e74d2018-07-27 14:44:16 +0530848 }
849
850msg_unlock:
851
852 if (multi_link) {
853 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
854 bus = m_rt->bus;
855 if (mutex_is_locked(&bus->msg_lock))
856 mutex_unlock(&bus->msg_lock);
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530857 }
858 }
859
860 return ret;
861}
862
863/**
Sanyog Kale89e59052018-04-26 18:38:08 +0530864 * sdw_release_stream() - Free the assigned stream runtime
865 *
866 * @stream: SoundWire stream runtime
867 *
868 * sdw_release_stream should be called only once per stream
869 */
870void sdw_release_stream(struct sdw_stream_runtime *stream)
871{
872 kfree(stream);
873}
874EXPORT_SYMBOL(sdw_release_stream);
875
876/**
877 * sdw_alloc_stream() - Allocate and return stream runtime
878 *
879 * @stream_name: SoundWire stream name
880 *
881 * Allocates a SoundWire stream runtime instance.
882 * sdw_alloc_stream should be called only once per stream. Typically
883 * invoked from ALSA/ASoC machine/platform driver.
884 */
Srinivas Kandagatladfcff3f2019-08-13 09:35:47 +0100885struct sdw_stream_runtime *sdw_alloc_stream(const char *stream_name)
Sanyog Kale89e59052018-04-26 18:38:08 +0530886{
887 struct sdw_stream_runtime *stream;
888
889 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
890 if (!stream)
891 return NULL;
892
893 stream->name = stream_name;
Sanyog Kale0c4a1042018-07-27 14:44:13 +0530894 INIT_LIST_HEAD(&stream->master_list);
Sanyog Kale89e59052018-04-26 18:38:08 +0530895 stream->state = SDW_STREAM_ALLOCATED;
Shreyas NC9b5c1322018-07-27 14:44:15 +0530896 stream->m_rt_count = 0;
Sanyog Kale89e59052018-04-26 18:38:08 +0530897
898 return stream;
899}
900EXPORT_SYMBOL(sdw_alloc_stream);
901
Vinod Koul48949722018-07-27 14:44:14 +0530902static struct sdw_master_runtime
903*sdw_find_master_rt(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500904 struct sdw_stream_runtime *stream)
Vinod Koul48949722018-07-27 14:44:14 +0530905{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500906 struct sdw_master_runtime *m_rt;
Vinod Koul48949722018-07-27 14:44:14 +0530907
908 /* Retrieve Bus handle if already available */
909 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
910 if (m_rt->bus == bus)
911 return m_rt;
912 }
913
914 return NULL;
915}
916
Sanyog Kale89e59052018-04-26 18:38:08 +0530917/**
918 * sdw_alloc_master_rt() - Allocates and initialize Master runtime handle
919 *
920 * @bus: SDW bus instance
921 * @stream_config: Stream configuration
922 * @stream: Stream runtime handle.
923 *
924 * This function is to be called with bus_lock held.
925 */
926static struct sdw_master_runtime
927*sdw_alloc_master_rt(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500928 struct sdw_stream_config *stream_config,
929 struct sdw_stream_runtime *stream)
Sanyog Kale89e59052018-04-26 18:38:08 +0530930{
931 struct sdw_master_runtime *m_rt;
932
Sanyog Kale89e59052018-04-26 18:38:08 +0530933 /*
934 * check if Master is already allocated (as a result of Slave adding
935 * it first), if so skip allocation and go to configure
936 */
Vinod Koul48949722018-07-27 14:44:14 +0530937 m_rt = sdw_find_master_rt(bus, stream);
Sanyog Kale89e59052018-04-26 18:38:08 +0530938 if (m_rt)
939 goto stream_config;
940
941 m_rt = kzalloc(sizeof(*m_rt), GFP_KERNEL);
942 if (!m_rt)
943 return NULL;
944
945 /* Initialization of Master runtime handle */
Sanyog Kalebbe73792018-04-26 18:38:13 +0530946 INIT_LIST_HEAD(&m_rt->port_list);
Sanyog Kale89e59052018-04-26 18:38:08 +0530947 INIT_LIST_HEAD(&m_rt->slave_rt_list);
Vinod Koul48949722018-07-27 14:44:14 +0530948 list_add_tail(&m_rt->stream_node, &stream->master_list);
Sanyog Kale89e59052018-04-26 18:38:08 +0530949
950 list_add_tail(&m_rt->bus_node, &bus->m_rt_list);
951
952stream_config:
953 m_rt->ch_count = stream_config->ch_count;
954 m_rt->bus = bus;
955 m_rt->stream = stream;
956 m_rt->direction = stream_config->direction;
957
958 return m_rt;
959}
960
961/**
962 * sdw_alloc_slave_rt() - Allocate and initialize Slave runtime handle.
963 *
964 * @slave: Slave handle
965 * @stream_config: Stream configuration
966 * @stream: Stream runtime handle
967 *
968 * This function is to be called with bus_lock held.
969 */
970static struct sdw_slave_runtime
971*sdw_alloc_slave_rt(struct sdw_slave *slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500972 struct sdw_stream_config *stream_config,
973 struct sdw_stream_runtime *stream)
Sanyog Kale89e59052018-04-26 18:38:08 +0530974{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500975 struct sdw_slave_runtime *s_rt;
Sanyog Kale89e59052018-04-26 18:38:08 +0530976
977 s_rt = kzalloc(sizeof(*s_rt), GFP_KERNEL);
978 if (!s_rt)
979 return NULL;
980
Sanyog Kalebbe73792018-04-26 18:38:13 +0530981 INIT_LIST_HEAD(&s_rt->port_list);
Sanyog Kale89e59052018-04-26 18:38:08 +0530982 s_rt->ch_count = stream_config->ch_count;
983 s_rt->direction = stream_config->direction;
984 s_rt->slave = slave;
985
986 return s_rt;
987}
988
Sanyog Kalebbe73792018-04-26 18:38:13 +0530989static void sdw_master_port_release(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500990 struct sdw_master_runtime *m_rt)
Sanyog Kalebbe73792018-04-26 18:38:13 +0530991{
992 struct sdw_port_runtime *p_rt, *_p_rt;
993
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500994 list_for_each_entry_safe(p_rt, _p_rt, &m_rt->port_list, port_node) {
Sanyog Kalebbe73792018-04-26 18:38:13 +0530995 list_del(&p_rt->port_node);
996 kfree(p_rt);
997 }
998}
999
1000static void sdw_slave_port_release(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001001 struct sdw_slave *slave,
1002 struct sdw_stream_runtime *stream)
Sanyog Kalebbe73792018-04-26 18:38:13 +05301003{
1004 struct sdw_port_runtime *p_rt, *_p_rt;
Vinod Koul48949722018-07-27 14:44:14 +05301005 struct sdw_master_runtime *m_rt;
Sanyog Kalebbe73792018-04-26 18:38:13 +05301006 struct sdw_slave_runtime *s_rt;
1007
Vinod Koul48949722018-07-27 14:44:14 +05301008 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1009 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
Vinod Koul48949722018-07-27 14:44:14 +05301010 if (s_rt->slave != slave)
1011 continue;
1012
1013 list_for_each_entry_safe(p_rt, _p_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001014 &s_rt->port_list, port_node) {
Vinod Koul48949722018-07-27 14:44:14 +05301015 list_del(&p_rt->port_node);
1016 kfree(p_rt);
1017 }
Sanyog Kalebbe73792018-04-26 18:38:13 +05301018 }
1019 }
1020}
1021
Sanyog Kale89e59052018-04-26 18:38:08 +05301022/**
1023 * sdw_release_slave_stream() - Free Slave(s) runtime handle
1024 *
1025 * @slave: Slave handle.
1026 * @stream: Stream runtime handle.
1027 *
1028 * This function is to be called with bus_lock held.
1029 */
1030static void sdw_release_slave_stream(struct sdw_slave *slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001031 struct sdw_stream_runtime *stream)
Sanyog Kale89e59052018-04-26 18:38:08 +05301032{
1033 struct sdw_slave_runtime *s_rt, *_s_rt;
Vinod Koul48949722018-07-27 14:44:14 +05301034 struct sdw_master_runtime *m_rt;
Sanyog Kale89e59052018-04-26 18:38:08 +05301035
Vinod Koul48949722018-07-27 14:44:14 +05301036 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1037 /* Retrieve Slave runtime handle */
1038 list_for_each_entry_safe(s_rt, _s_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001039 &m_rt->slave_rt_list, m_rt_node) {
Vinod Koul48949722018-07-27 14:44:14 +05301040 if (s_rt->slave == slave) {
1041 list_del(&s_rt->m_rt_node);
1042 kfree(s_rt);
1043 return;
1044 }
Sanyog Kale89e59052018-04-26 18:38:08 +05301045 }
1046 }
1047}
1048
1049/**
1050 * sdw_release_master_stream() - Free Master runtime handle
1051 *
Vinod Koul48949722018-07-27 14:44:14 +05301052 * @m_rt: Master runtime node
Sanyog Kale89e59052018-04-26 18:38:08 +05301053 * @stream: Stream runtime handle.
1054 *
1055 * This function is to be called with bus_lock held
1056 * It frees the Master runtime handle and associated Slave(s) runtime
1057 * handle. If this is called first then sdw_release_slave_stream() will have
1058 * no effect as Slave(s) runtime handle would already be freed up.
1059 */
Vinod Koul48949722018-07-27 14:44:14 +05301060static void sdw_release_master_stream(struct sdw_master_runtime *m_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001061 struct sdw_stream_runtime *stream)
Sanyog Kale89e59052018-04-26 18:38:08 +05301062{
Sanyog Kale89e59052018-04-26 18:38:08 +05301063 struct sdw_slave_runtime *s_rt, *_s_rt;
1064
Sanyog Kale8d6ccf52018-07-27 14:44:10 +05301065 list_for_each_entry_safe(s_rt, _s_rt, &m_rt->slave_rt_list, m_rt_node) {
1066 sdw_slave_port_release(s_rt->slave->bus, s_rt->slave, stream);
1067 sdw_release_slave_stream(s_rt->slave, stream);
1068 }
Sanyog Kale89e59052018-04-26 18:38:08 +05301069
Vinod Koul48949722018-07-27 14:44:14 +05301070 list_del(&m_rt->stream_node);
Sanyog Kale89e59052018-04-26 18:38:08 +05301071 list_del(&m_rt->bus_node);
Vinod Koul48949722018-07-27 14:44:14 +05301072 kfree(m_rt);
Sanyog Kale89e59052018-04-26 18:38:08 +05301073}
1074
1075/**
1076 * sdw_stream_remove_master() - Remove master from sdw_stream
1077 *
1078 * @bus: SDW Bus instance
1079 * @stream: SoundWire stream
1080 *
Sanyog Kalebbe73792018-04-26 18:38:13 +05301081 * This removes and frees port_rt and master_rt from a stream
Sanyog Kale89e59052018-04-26 18:38:08 +05301082 */
1083int sdw_stream_remove_master(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001084 struct sdw_stream_runtime *stream)
Sanyog Kale89e59052018-04-26 18:38:08 +05301085{
Vinod Koul48949722018-07-27 14:44:14 +05301086 struct sdw_master_runtime *m_rt, *_m_rt;
1087
Sanyog Kale89e59052018-04-26 18:38:08 +05301088 mutex_lock(&bus->bus_lock);
1089
Vinod Koul48949722018-07-27 14:44:14 +05301090 list_for_each_entry_safe(m_rt, _m_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001091 &stream->master_list, stream_node) {
Vinod Koul48949722018-07-27 14:44:14 +05301092 if (m_rt->bus != bus)
1093 continue;
1094
1095 sdw_master_port_release(bus, m_rt);
1096 sdw_release_master_stream(m_rt, stream);
Shreyas NCce6e74d2018-07-27 14:44:16 +05301097 stream->m_rt_count--;
Vinod Koul48949722018-07-27 14:44:14 +05301098 }
1099
1100 if (list_empty(&stream->master_list))
1101 stream->state = SDW_STREAM_RELEASED;
Sanyog Kale89e59052018-04-26 18:38:08 +05301102
1103 mutex_unlock(&bus->bus_lock);
1104
1105 return 0;
1106}
1107EXPORT_SYMBOL(sdw_stream_remove_master);
1108
1109/**
1110 * sdw_stream_remove_slave() - Remove slave from sdw_stream
1111 *
1112 * @slave: SDW Slave instance
1113 * @stream: SoundWire stream
1114 *
Sanyog Kalebbe73792018-04-26 18:38:13 +05301115 * This removes and frees port_rt and slave_rt from a stream
Sanyog Kale89e59052018-04-26 18:38:08 +05301116 */
1117int sdw_stream_remove_slave(struct sdw_slave *slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001118 struct sdw_stream_runtime *stream)
Sanyog Kale89e59052018-04-26 18:38:08 +05301119{
1120 mutex_lock(&slave->bus->bus_lock);
1121
Sanyog Kalebbe73792018-04-26 18:38:13 +05301122 sdw_slave_port_release(slave->bus, slave, stream);
Sanyog Kale89e59052018-04-26 18:38:08 +05301123 sdw_release_slave_stream(slave, stream);
1124
1125 mutex_unlock(&slave->bus->bus_lock);
1126
1127 return 0;
1128}
1129EXPORT_SYMBOL(sdw_stream_remove_slave);
1130
1131/**
1132 * sdw_config_stream() - Configure the allocated stream
1133 *
1134 * @dev: SDW device
1135 * @stream: SoundWire stream
1136 * @stream_config: Stream configuration for audio stream
1137 * @is_slave: is API called from Slave or Master
1138 *
1139 * This function is to be called with bus_lock held.
1140 */
1141static int sdw_config_stream(struct device *dev,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001142 struct sdw_stream_runtime *stream,
1143 struct sdw_stream_config *stream_config,
1144 bool is_slave)
Sanyog Kale89e59052018-04-26 18:38:08 +05301145{
1146 /*
1147 * Update the stream rate, channel and bps based on data
1148 * source. For more than one data source (multilink),
1149 * match the rate, bps, stream type and increment number of channels.
1150 *
1151 * If rate/bps is zero, it means the values are not set, so skip
1152 * comparison and allow the value to be set and stored in stream
1153 */
1154 if (stream->params.rate &&
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001155 stream->params.rate != stream_config->frame_rate) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001156 dev_err(dev, "rate not matching, stream:%s\n", stream->name);
Sanyog Kale89e59052018-04-26 18:38:08 +05301157 return -EINVAL;
1158 }
1159
1160 if (stream->params.bps &&
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001161 stream->params.bps != stream_config->bps) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001162 dev_err(dev, "bps not matching, stream:%s\n", stream->name);
Sanyog Kale89e59052018-04-26 18:38:08 +05301163 return -EINVAL;
1164 }
1165
1166 stream->type = stream_config->type;
1167 stream->params.rate = stream_config->frame_rate;
1168 stream->params.bps = stream_config->bps;
1169
1170 /* TODO: Update this check during Device-device support */
1171 if (is_slave)
1172 stream->params.ch_count += stream_config->ch_count;
1173
1174 return 0;
1175}
1176
Sanyog Kalebbe73792018-04-26 18:38:13 +05301177static int sdw_is_valid_port_range(struct device *dev,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001178 struct sdw_port_runtime *p_rt)
Sanyog Kalebbe73792018-04-26 18:38:13 +05301179{
1180 if (!SDW_VALID_PORT_RANGE(p_rt->num)) {
1181 dev_err(dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001182 "SoundWire: Invalid port number :%d\n", p_rt->num);
Sanyog Kalebbe73792018-04-26 18:38:13 +05301183 return -EINVAL;
1184 }
1185
1186 return 0;
1187}
1188
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001189static struct sdw_port_runtime
1190*sdw_port_alloc(struct device *dev,
1191 struct sdw_port_config *port_config,
1192 int port_index)
Sanyog Kalebbe73792018-04-26 18:38:13 +05301193{
1194 struct sdw_port_runtime *p_rt;
1195
1196 p_rt = kzalloc(sizeof(*p_rt), GFP_KERNEL);
1197 if (!p_rt)
1198 return NULL;
1199
1200 p_rt->ch_mask = port_config[port_index].ch_mask;
1201 p_rt->num = port_config[port_index].num;
1202
1203 return p_rt;
1204}
1205
1206static int sdw_master_port_config(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001207 struct sdw_master_runtime *m_rt,
1208 struct sdw_port_config *port_config,
1209 unsigned int num_ports)
Sanyog Kalebbe73792018-04-26 18:38:13 +05301210{
1211 struct sdw_port_runtime *p_rt;
1212 int i;
1213
1214 /* Iterate for number of ports to perform initialization */
1215 for (i = 0; i < num_ports; i++) {
1216 p_rt = sdw_port_alloc(bus->dev, port_config, i);
1217 if (!p_rt)
1218 return -ENOMEM;
1219
1220 /*
1221 * TODO: Check port capabilities for requested
1222 * configuration (audio mode support)
1223 */
1224
1225 list_add_tail(&p_rt->port_node, &m_rt->port_list);
1226 }
1227
1228 return 0;
1229}
1230
1231static int sdw_slave_port_config(struct sdw_slave *slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001232 struct sdw_slave_runtime *s_rt,
1233 struct sdw_port_config *port_config,
1234 unsigned int num_config)
Sanyog Kalebbe73792018-04-26 18:38:13 +05301235{
1236 struct sdw_port_runtime *p_rt;
1237 int i, ret;
1238
1239 /* Iterate for number of ports to perform initialization */
1240 for (i = 0; i < num_config; i++) {
1241 p_rt = sdw_port_alloc(&slave->dev, port_config, i);
1242 if (!p_rt)
1243 return -ENOMEM;
1244
1245 /*
1246 * TODO: Check valid port range as defined by DisCo/
1247 * slave
1248 */
1249 ret = sdw_is_valid_port_range(&slave->dev, p_rt);
1250 if (ret < 0) {
1251 kfree(p_rt);
1252 return ret;
1253 }
1254
1255 /*
1256 * TODO: Check port capabilities for requested
1257 * configuration (audio mode support)
1258 */
1259
1260 list_add_tail(&p_rt->port_node, &s_rt->port_list);
1261 }
1262
1263 return 0;
1264}
1265
Sanyog Kale89e59052018-04-26 18:38:08 +05301266/**
1267 * sdw_stream_add_master() - Allocate and add master runtime to a stream
1268 *
1269 * @bus: SDW Bus instance
1270 * @stream_config: Stream configuration for audio stream
Sanyog Kalebbe73792018-04-26 18:38:13 +05301271 * @port_config: Port configuration for audio stream
1272 * @num_ports: Number of ports
Sanyog Kale89e59052018-04-26 18:38:08 +05301273 * @stream: SoundWire stream
1274 */
1275int sdw_stream_add_master(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001276 struct sdw_stream_config *stream_config,
1277 struct sdw_port_config *port_config,
1278 unsigned int num_ports,
1279 struct sdw_stream_runtime *stream)
Sanyog Kale89e59052018-04-26 18:38:08 +05301280{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001281 struct sdw_master_runtime *m_rt;
Sanyog Kale89e59052018-04-26 18:38:08 +05301282 int ret;
1283
1284 mutex_lock(&bus->bus_lock);
1285
Shreyas NCce6e74d2018-07-27 14:44:16 +05301286 /*
1287 * For multi link streams, add the second master only if
1288 * the bus supports it.
1289 * Check if bus->multi_link is set
1290 */
1291 if (!bus->multi_link && stream->m_rt_count > 0) {
1292 dev_err(bus->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001293 "Multilink not supported, link %d\n", bus->link_id);
Shreyas NCce6e74d2018-07-27 14:44:16 +05301294 ret = -EINVAL;
1295 goto unlock;
1296 }
1297
Sanyog Kale89e59052018-04-26 18:38:08 +05301298 m_rt = sdw_alloc_master_rt(bus, stream_config, stream);
1299 if (!m_rt) {
1300 dev_err(bus->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001301 "Master runtime config failed for stream:%s\n",
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001302 stream->name);
Sanyog Kale89e59052018-04-26 18:38:08 +05301303 ret = -ENOMEM;
Shreyas NC3fef1a22018-07-27 14:44:09 +05301304 goto unlock;
Sanyog Kale89e59052018-04-26 18:38:08 +05301305 }
1306
1307 ret = sdw_config_stream(bus->dev, stream, stream_config, false);
1308 if (ret)
1309 goto stream_error;
1310
Sanyog Kalebbe73792018-04-26 18:38:13 +05301311 ret = sdw_master_port_config(bus, m_rt, port_config, num_ports);
1312 if (ret)
1313 goto stream_error;
1314
Shreyas NCce6e74d2018-07-27 14:44:16 +05301315 stream->m_rt_count++;
1316
Shreyas NC3fef1a22018-07-27 14:44:09 +05301317 goto unlock;
1318
Sanyog Kale89e59052018-04-26 18:38:08 +05301319stream_error:
Vinod Koul48949722018-07-27 14:44:14 +05301320 sdw_release_master_stream(m_rt, stream);
Shreyas NC3fef1a22018-07-27 14:44:09 +05301321unlock:
Sanyog Kale89e59052018-04-26 18:38:08 +05301322 mutex_unlock(&bus->bus_lock);
1323 return ret;
1324}
1325EXPORT_SYMBOL(sdw_stream_add_master);
1326
1327/**
1328 * sdw_stream_add_slave() - Allocate and add master/slave runtime to a stream
1329 *
1330 * @slave: SDW Slave instance
1331 * @stream_config: Stream configuration for audio stream
1332 * @stream: SoundWire stream
Sanyog Kalebbe73792018-04-26 18:38:13 +05301333 * @port_config: Port configuration for audio stream
1334 * @num_ports: Number of ports
Shreyas NC0aebe402018-07-27 14:44:08 +05301335 *
1336 * It is expected that Slave is added before adding Master
1337 * to the Stream.
1338 *
Sanyog Kale89e59052018-04-26 18:38:08 +05301339 */
1340int sdw_stream_add_slave(struct sdw_slave *slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001341 struct sdw_stream_config *stream_config,
1342 struct sdw_port_config *port_config,
1343 unsigned int num_ports,
1344 struct sdw_stream_runtime *stream)
Sanyog Kale89e59052018-04-26 18:38:08 +05301345{
1346 struct sdw_slave_runtime *s_rt;
1347 struct sdw_master_runtime *m_rt;
1348 int ret;
1349
1350 mutex_lock(&slave->bus->bus_lock);
1351
1352 /*
1353 * If this API is invoked by Slave first then m_rt is not valid.
1354 * So, allocate m_rt and add Slave to it.
1355 */
1356 m_rt = sdw_alloc_master_rt(slave->bus, stream_config, stream);
1357 if (!m_rt) {
1358 dev_err(&slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001359 "alloc master runtime failed for stream:%s\n",
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001360 stream->name);
Sanyog Kale89e59052018-04-26 18:38:08 +05301361 ret = -ENOMEM;
1362 goto error;
1363 }
1364
1365 s_rt = sdw_alloc_slave_rt(slave, stream_config, stream);
1366 if (!s_rt) {
1367 dev_err(&slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001368 "Slave runtime config failed for stream:%s\n",
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001369 stream->name);
Sanyog Kale89e59052018-04-26 18:38:08 +05301370 ret = -ENOMEM;
1371 goto stream_error;
1372 }
1373
1374 ret = sdw_config_stream(&slave->dev, stream, stream_config, true);
1375 if (ret)
1376 goto stream_error;
1377
1378 list_add_tail(&s_rt->m_rt_node, &m_rt->slave_rt_list);
1379
Sanyog Kalebbe73792018-04-26 18:38:13 +05301380 ret = sdw_slave_port_config(slave, s_rt, port_config, num_ports);
1381 if (ret)
1382 goto stream_error;
1383
Shreyas NC0aebe402018-07-27 14:44:08 +05301384 /*
1385 * Change stream state to CONFIGURED on first Slave add.
1386 * Bus is not aware of number of Slave(s) in a stream at this
1387 * point so cannot depend on all Slave(s) to be added in order to
1388 * change stream state to CONFIGURED.
1389 */
Sanyog Kale89e59052018-04-26 18:38:08 +05301390 stream->state = SDW_STREAM_CONFIGURED;
1391 goto error;
1392
1393stream_error:
1394 /*
1395 * we hit error so cleanup the stream, release all Slave(s) and
1396 * Master runtime
1397 */
Vinod Koul48949722018-07-27 14:44:14 +05301398 sdw_release_master_stream(m_rt, stream);
Sanyog Kale89e59052018-04-26 18:38:08 +05301399error:
1400 mutex_unlock(&slave->bus->bus_lock);
1401 return ret;
1402}
1403EXPORT_SYMBOL(sdw_stream_add_slave);
Sanyog Kalef8101c72018-04-26 18:38:17 +05301404
1405/**
1406 * sdw_get_slave_dpn_prop() - Get Slave port capabilities
1407 *
1408 * @slave: Slave handle
1409 * @direction: Data direction.
1410 * @port_num: Port number
1411 */
1412struct sdw_dpn_prop *sdw_get_slave_dpn_prop(struct sdw_slave *slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001413 enum sdw_data_direction direction,
1414 unsigned int port_num)
Sanyog Kalef8101c72018-04-26 18:38:17 +05301415{
1416 struct sdw_dpn_prop *dpn_prop;
1417 u8 num_ports;
1418 int i;
1419
1420 if (direction == SDW_DATA_DIR_TX) {
1421 num_ports = hweight32(slave->prop.source_ports);
1422 dpn_prop = slave->prop.src_dpn_prop;
1423 } else {
1424 num_ports = hweight32(slave->prop.sink_ports);
1425 dpn_prop = slave->prop.sink_dpn_prop;
1426 }
1427
1428 for (i = 0; i < num_ports; i++) {
Srinivas Kandagatla03ecad92019-05-22 17:24:43 +01001429 if (dpn_prop[i].num == port_num)
Sanyog Kalef8101c72018-04-26 18:38:17 +05301430 return &dpn_prop[i];
1431 }
1432
1433 return NULL;
1434}
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301435
Sanyog Kale0c4a1042018-07-27 14:44:13 +05301436/**
1437 * sdw_acquire_bus_lock: Acquire bus lock for all Master runtime(s)
1438 *
1439 * @stream: SoundWire stream
1440 *
1441 * Acquire bus_lock for each of the master runtime(m_rt) part of this
1442 * stream to reconfigure the bus.
1443 * NOTE: This function is called from SoundWire stream ops and is
1444 * expected that a global lock is held before acquiring bus_lock.
1445 */
1446static void sdw_acquire_bus_lock(struct sdw_stream_runtime *stream)
1447{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001448 struct sdw_master_runtime *m_rt;
Sanyog Kale0c4a1042018-07-27 14:44:13 +05301449 struct sdw_bus *bus = NULL;
1450
1451 /* Iterate for all Master(s) in Master list */
1452 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1453 bus = m_rt->bus;
1454
1455 mutex_lock(&bus->bus_lock);
1456 }
1457}
1458
1459/**
1460 * sdw_release_bus_lock: Release bus lock for all Master runtime(s)
1461 *
1462 * @stream: SoundWire stream
1463 *
1464 * Release the previously held bus_lock after reconfiguring the bus.
Vinod Koul48949722018-07-27 14:44:14 +05301465 * NOTE: This function is called from SoundWire stream ops and is
1466 * expected that a global lock is held before releasing bus_lock.
Sanyog Kale0c4a1042018-07-27 14:44:13 +05301467 */
1468static void sdw_release_bus_lock(struct sdw_stream_runtime *stream)
1469{
1470 struct sdw_master_runtime *m_rt = NULL;
1471 struct sdw_bus *bus = NULL;
1472
1473 /* Iterate for all Master(s) in Master list */
1474 list_for_each_entry_reverse(m_rt, &stream->master_list, stream_node) {
1475 bus = m_rt->bus;
1476 mutex_unlock(&bus->bus_lock);
1477 }
1478}
1479
Pierre-Louis Bossartc7a8f042020-01-14 17:52:25 -06001480static int _sdw_prepare_stream(struct sdw_stream_runtime *stream,
1481 bool update_params)
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301482{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001483 struct sdw_master_runtime *m_rt;
Vinod Koul48949722018-07-27 14:44:14 +05301484 struct sdw_bus *bus = NULL;
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001485 struct sdw_master_prop *prop;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301486 struct sdw_bus_params params;
1487 int ret;
1488
Vinod Koul48949722018-07-27 14:44:14 +05301489 /* Prepare Master(s) and Slave(s) port(s) associated with stream */
1490 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1491 bus = m_rt->bus;
1492 prop = &bus->prop;
1493 memcpy(&params, &bus->params, sizeof(params));
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301494
Vinod Koul48949722018-07-27 14:44:14 +05301495 /* TODO: Support Asynchronous mode */
Pierre-Louis Bossart34243052019-05-22 14:47:22 -05001496 if ((prop->max_clk_freq % stream->params.rate) != 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001497 dev_err(bus->dev, "Async mode not supported\n");
Vinod Koul48949722018-07-27 14:44:14 +05301498 return -EINVAL;
1499 }
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301500
Pierre-Louis Bossartc7a8f042020-01-14 17:52:25 -06001501 if (!update_params)
1502 goto program_params;
1503
Vinod Koul48949722018-07-27 14:44:14 +05301504 /* Increment cumulative bus bandwidth */
1505 /* TODO: Update this during Device-Device support */
1506 bus->params.bandwidth += m_rt->stream->params.rate *
1507 m_rt->ch_count * m_rt->stream->params.bps;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301508
Vinod Koulc7578c12019-08-13 09:35:46 +01001509 /* Compute params */
1510 if (bus->compute_params) {
1511 ret = bus->compute_params(bus);
1512 if (ret < 0) {
1513 dev_err(bus->dev, "Compute params failed: %d",
1514 ret);
1515 return ret;
1516 }
1517 }
1518
Pierre-Louis Bossartc7a8f042020-01-14 17:52:25 -06001519program_params:
Vinod Koul48949722018-07-27 14:44:14 +05301520 /* Program params */
Rander Wangbfaa3542020-01-14 17:52:27 -06001521 ret = sdw_program_params(bus, true);
Vinod Koul48949722018-07-27 14:44:14 +05301522 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001523 dev_err(bus->dev, "Program params failed: %d\n", ret);
Vinod Koul48949722018-07-27 14:44:14 +05301524 goto restore_params;
1525 }
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301526 }
1527
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001528 if (!bus) {
1529 pr_err("Configuration error in %s\n", __func__);
1530 return -EINVAL;
1531 }
1532
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301533 ret = do_bank_switch(stream);
1534 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001535 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301536 goto restore_params;
1537 }
1538
Vinod Koul48949722018-07-27 14:44:14 +05301539 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1540 bus = m_rt->bus;
1541
1542 /* Prepare port(s) on the new clock configuration */
1543 ret = sdw_prep_deprep_ports(m_rt, true);
1544 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001545 dev_err(bus->dev, "Prepare port(s) failed ret = %d\n",
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001546 ret);
Vinod Koul48949722018-07-27 14:44:14 +05301547 return ret;
1548 }
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301549 }
1550
1551 stream->state = SDW_STREAM_PREPARED;
1552
1553 return ret;
1554
1555restore_params:
1556 memcpy(&bus->params, &params, sizeof(params));
1557 return ret;
1558}
1559
1560/**
1561 * sdw_prepare_stream() - Prepare SoundWire stream
1562 *
1563 * @stream: Soundwire stream
1564 *
Mauro Carvalho Chehab34962fb2018-05-08 15:14:57 -03001565 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301566 */
1567int sdw_prepare_stream(struct sdw_stream_runtime *stream)
1568{
Pierre-Louis Bossartc7a8f042020-01-14 17:52:25 -06001569 bool update_params = true;
Bard Liaoc32464c2020-01-14 17:52:24 -06001570 int ret;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301571
1572 if (!stream) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001573 pr_err("SoundWire: Handle not found for stream\n");
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301574 return -EINVAL;
1575 }
1576
Vinod Koul48949722018-07-27 14:44:14 +05301577 sdw_acquire_bus_lock(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301578
Bard Liaoc32464c2020-01-14 17:52:24 -06001579 if (stream->state == SDW_STREAM_PREPARED) {
1580 ret = 0;
1581 goto state_err;
1582 }
1583
Pierre-Louis Bossart59528802020-01-14 17:52:23 -06001584 if (stream->state != SDW_STREAM_CONFIGURED &&
1585 stream->state != SDW_STREAM_DEPREPARED &&
1586 stream->state != SDW_STREAM_DISABLED) {
1587 pr_err("%s: %s: inconsistent state state %d\n",
1588 __func__, stream->name, stream->state);
1589 ret = -EINVAL;
1590 goto state_err;
1591 }
1592
Pierre-Louis Bossartc7a8f042020-01-14 17:52:25 -06001593 /*
1594 * when the stream is DISABLED, this means sdw_prepare_stream()
1595 * is called as a result of an underflow or a resume operation.
1596 * In this case, the bus parameters shall not be recomputed, but
1597 * still need to be re-applied
1598 */
1599 if (stream->state == SDW_STREAM_DISABLED)
1600 update_params = false;
1601
1602 ret = _sdw_prepare_stream(stream, update_params);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301603
Pierre-Louis Bossart59528802020-01-14 17:52:23 -06001604state_err:
Vinod Koul48949722018-07-27 14:44:14 +05301605 sdw_release_bus_lock(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301606 return ret;
1607}
1608EXPORT_SYMBOL(sdw_prepare_stream);
1609
1610static int _sdw_enable_stream(struct sdw_stream_runtime *stream)
1611{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001612 struct sdw_master_runtime *m_rt;
Vinod Koul48949722018-07-27 14:44:14 +05301613 struct sdw_bus *bus = NULL;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301614 int ret;
1615
Vinod Koul48949722018-07-27 14:44:14 +05301616 /* Enable Master(s) and Slave(s) port(s) associated with stream */
1617 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1618 bus = m_rt->bus;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301619
Vinod Koul48949722018-07-27 14:44:14 +05301620 /* Program params */
Rander Wangbfaa3542020-01-14 17:52:27 -06001621 ret = sdw_program_params(bus, false);
Vinod Koul48949722018-07-27 14:44:14 +05301622 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001623 dev_err(bus->dev, "Program params failed: %d\n", ret);
Vinod Koul48949722018-07-27 14:44:14 +05301624 return ret;
1625 }
1626
1627 /* Enable port(s) */
1628 ret = sdw_enable_disable_ports(m_rt, true);
1629 if (ret < 0) {
Vinod Koul62f0cec2019-05-02 16:29:24 +05301630 dev_err(bus->dev,
1631 "Enable port(s) failed ret: %d\n", ret);
Vinod Koul48949722018-07-27 14:44:14 +05301632 return ret;
1633 }
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301634 }
1635
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001636 if (!bus) {
1637 pr_err("Configuration error in %s\n", __func__);
1638 return -EINVAL;
1639 }
1640
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301641 ret = do_bank_switch(stream);
1642 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001643 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301644 return ret;
1645 }
1646
1647 stream->state = SDW_STREAM_ENABLED;
1648 return 0;
1649}
1650
1651/**
1652 * sdw_enable_stream() - Enable SoundWire stream
1653 *
1654 * @stream: Soundwire stream
1655 *
Mauro Carvalho Chehab34962fb2018-05-08 15:14:57 -03001656 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301657 */
1658int sdw_enable_stream(struct sdw_stream_runtime *stream)
1659{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001660 int ret;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301661
1662 if (!stream) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001663 pr_err("SoundWire: Handle not found for stream\n");
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301664 return -EINVAL;
1665 }
1666
Vinod Koul48949722018-07-27 14:44:14 +05301667 sdw_acquire_bus_lock(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301668
Pierre-Louis Bossart59528802020-01-14 17:52:23 -06001669 if (stream->state != SDW_STREAM_PREPARED &&
1670 stream->state != SDW_STREAM_DISABLED) {
1671 pr_err("%s: %s: inconsistent state state %d\n",
1672 __func__, stream->name, stream->state);
1673 ret = -EINVAL;
1674 goto state_err;
1675 }
1676
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301677 ret = _sdw_enable_stream(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301678
Pierre-Louis Bossart59528802020-01-14 17:52:23 -06001679state_err:
Vinod Koul48949722018-07-27 14:44:14 +05301680 sdw_release_bus_lock(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301681 return ret;
1682}
1683EXPORT_SYMBOL(sdw_enable_stream);
1684
1685static int _sdw_disable_stream(struct sdw_stream_runtime *stream)
1686{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001687 struct sdw_master_runtime *m_rt;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301688 int ret;
1689
Vinod Koul48949722018-07-27 14:44:14 +05301690 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001691 struct sdw_bus *bus = m_rt->bus;
1692
Vinod Koul48949722018-07-27 14:44:14 +05301693 /* Disable port(s) */
1694 ret = sdw_enable_disable_ports(m_rt, false);
1695 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001696 dev_err(bus->dev, "Disable port(s) failed: %d\n", ret);
Vinod Koul48949722018-07-27 14:44:14 +05301697 return ret;
1698 }
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301699 }
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301700 stream->state = SDW_STREAM_DISABLED;
1701
Vinod Koul48949722018-07-27 14:44:14 +05301702 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001703 struct sdw_bus *bus = m_rt->bus;
1704
Vinod Koul48949722018-07-27 14:44:14 +05301705 /* Program params */
Rander Wangbfaa3542020-01-14 17:52:27 -06001706 ret = sdw_program_params(bus, false);
Vinod Koul48949722018-07-27 14:44:14 +05301707 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001708 dev_err(bus->dev, "Program params failed: %d\n", ret);
Vinod Koul48949722018-07-27 14:44:14 +05301709 return ret;
1710 }
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301711 }
1712
Pierre-Louis Bossarte0279b62019-08-05 19:55:13 -05001713 ret = do_bank_switch(stream);
1714 if (ret < 0) {
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001715 pr_err("Bank switch failed: %d\n", ret);
Pierre-Louis Bossarte0279b62019-08-05 19:55:13 -05001716 return ret;
1717 }
1718
1719 /* make sure alternate bank (previous current) is also disabled */
1720 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001721 struct sdw_bus *bus = m_rt->bus;
1722
Pierre-Louis Bossarte0279b62019-08-05 19:55:13 -05001723 /* Disable port(s) */
1724 ret = sdw_enable_disable_ports(m_rt, false);
1725 if (ret < 0) {
1726 dev_err(bus->dev, "Disable port(s) failed: %d\n", ret);
1727 return ret;
1728 }
1729 }
1730
1731 return 0;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301732}
1733
1734/**
1735 * sdw_disable_stream() - Disable SoundWire stream
1736 *
1737 * @stream: Soundwire stream
1738 *
Mauro Carvalho Chehab34962fb2018-05-08 15:14:57 -03001739 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301740 */
1741int sdw_disable_stream(struct sdw_stream_runtime *stream)
1742{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001743 int ret;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301744
1745 if (!stream) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001746 pr_err("SoundWire: Handle not found for stream\n");
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301747 return -EINVAL;
1748 }
1749
Vinod Koul48949722018-07-27 14:44:14 +05301750 sdw_acquire_bus_lock(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301751
Pierre-Louis Bossart59528802020-01-14 17:52:23 -06001752 if (stream->state != SDW_STREAM_ENABLED) {
1753 pr_err("%s: %s: inconsistent state state %d\n",
1754 __func__, stream->name, stream->state);
1755 ret = -EINVAL;
1756 goto state_err;
1757 }
1758
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301759 ret = _sdw_disable_stream(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301760
Pierre-Louis Bossart59528802020-01-14 17:52:23 -06001761state_err:
Vinod Koul48949722018-07-27 14:44:14 +05301762 sdw_release_bus_lock(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301763 return ret;
1764}
1765EXPORT_SYMBOL(sdw_disable_stream);
1766
1767static int _sdw_deprepare_stream(struct sdw_stream_runtime *stream)
1768{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001769 struct sdw_master_runtime *m_rt;
1770 struct sdw_bus *bus;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301771 int ret = 0;
1772
Vinod Koul48949722018-07-27 14:44:14 +05301773 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1774 bus = m_rt->bus;
1775 /* De-prepare port(s) */
1776 ret = sdw_prep_deprep_ports(m_rt, false);
1777 if (ret < 0) {
Vinod Koul62f0cec2019-05-02 16:29:24 +05301778 dev_err(bus->dev,
1779 "De-prepare port(s) failed: %d\n", ret);
Vinod Koul48949722018-07-27 14:44:14 +05301780 return ret;
1781 }
1782
1783 /* TODO: Update this during Device-Device support */
1784 bus->params.bandwidth -= m_rt->stream->params.rate *
1785 m_rt->ch_count * m_rt->stream->params.bps;
1786
1787 /* Program params */
Rander Wangbfaa3542020-01-14 17:52:27 -06001788 ret = sdw_program_params(bus, false);
Vinod Koul48949722018-07-27 14:44:14 +05301789 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001790 dev_err(bus->dev, "Program params failed: %d\n", ret);
Vinod Koul48949722018-07-27 14:44:14 +05301791 return ret;
1792 }
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301793 }
1794
1795 stream->state = SDW_STREAM_DEPREPARED;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301796 return do_bank_switch(stream);
1797}
1798
1799/**
1800 * sdw_deprepare_stream() - Deprepare SoundWire stream
1801 *
1802 * @stream: Soundwire stream
1803 *
Mauro Carvalho Chehab34962fb2018-05-08 15:14:57 -03001804 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301805 */
1806int sdw_deprepare_stream(struct sdw_stream_runtime *stream)
1807{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001808 int ret;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301809
1810 if (!stream) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001811 pr_err("SoundWire: Handle not found for stream\n");
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301812 return -EINVAL;
1813 }
1814
Vinod Koul48949722018-07-27 14:44:14 +05301815 sdw_acquire_bus_lock(stream);
Pierre-Louis Bossart59528802020-01-14 17:52:23 -06001816
1817 if (stream->state != SDW_STREAM_PREPARED &&
1818 stream->state != SDW_STREAM_DISABLED) {
1819 pr_err("%s: %s: inconsistent state state %d\n",
1820 __func__, stream->name, stream->state);
1821 ret = -EINVAL;
1822 goto state_err;
1823 }
1824
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301825 ret = _sdw_deprepare_stream(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301826
Pierre-Louis Bossart59528802020-01-14 17:52:23 -06001827state_err:
Vinod Koul48949722018-07-27 14:44:14 +05301828 sdw_release_bus_lock(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301829 return ret;
1830}
1831EXPORT_SYMBOL(sdw_deprepare_stream);
Pierre-Louis Bossart45505692020-07-01 02:43:53 +08001832
1833static int set_stream(struct snd_pcm_substream *substream,
1834 struct sdw_stream_runtime *sdw_stream)
1835{
1836 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1837 struct snd_soc_dai *dai;
1838 int ret = 0;
1839 int i;
1840
1841 /* Set stream pointer on all DAIs */
1842 for_each_rtd_dais(rtd, i, dai) {
1843 ret = snd_soc_dai_set_sdw_stream(dai, sdw_stream, substream->stream);
1844 if (ret < 0) {
1845 dev_err(rtd->dev, "failed to set stream pointer on dai %s", dai->name);
1846 break;
1847 }
1848 }
1849
1850 return ret;
1851}
1852
1853/**
1854 * sdw_startup_stream() - Startup SoundWire stream
1855 *
Vinod Koul3b71c692020-07-15 15:27:02 +05301856 * @sdw_substream: Soundwire stream
Pierre-Louis Bossart45505692020-07-01 02:43:53 +08001857 *
1858 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
1859 */
1860int sdw_startup_stream(void *sdw_substream)
1861{
1862 struct snd_pcm_substream *substream = sdw_substream;
1863 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1864 struct sdw_stream_runtime *sdw_stream;
1865 char *name;
1866 int ret;
1867
1868 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1869 name = kasprintf(GFP_KERNEL, "%s-Playback", substream->name);
1870 else
1871 name = kasprintf(GFP_KERNEL, "%s-Capture", substream->name);
1872
1873 if (!name)
1874 return -ENOMEM;
1875
1876 sdw_stream = sdw_alloc_stream(name);
1877 if (!sdw_stream) {
1878 dev_err(rtd->dev, "alloc stream failed for substream DAI %s", substream->name);
1879 ret = -ENOMEM;
1880 goto error;
1881 }
1882
1883 ret = set_stream(substream, sdw_stream);
1884 if (ret < 0)
1885 goto release_stream;
1886 return 0;
1887
1888release_stream:
1889 sdw_release_stream(sdw_stream);
1890 set_stream(substream, NULL);
1891error:
1892 kfree(name);
1893 return ret;
1894}
1895EXPORT_SYMBOL(sdw_startup_stream);
1896
1897/**
1898 * sdw_shutdown_stream() - Shutdown SoundWire stream
1899 *
Vinod Koul3b71c692020-07-15 15:27:02 +05301900 * @sdw_substream: Soundwire stream
Pierre-Louis Bossart45505692020-07-01 02:43:53 +08001901 *
1902 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
1903 */
1904void sdw_shutdown_stream(void *sdw_substream)
1905{
1906 struct snd_pcm_substream *substream = sdw_substream;
1907 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1908 struct sdw_stream_runtime *sdw_stream;
1909 struct snd_soc_dai *dai;
1910
1911 /* Find stream from first CPU DAI */
1912 dai = asoc_rtd_to_cpu(rtd, 0);
1913
1914 sdw_stream = snd_soc_dai_get_sdw_stream(dai, substream->stream);
1915
1916 if (!sdw_stream) {
1917 dev_err(rtd->dev, "no stream found for DAI %s", dai->name);
1918 return;
1919 }
1920
1921 /* release memory */
1922 kfree(sdw_stream->name);
1923 sdw_release_stream(sdw_stream);
1924
1925 /* clear DAI data */
1926 set_stream(substream, NULL);
1927}
1928EXPORT_SYMBOL(sdw_shutdown_stream);