Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) |
| 2 | // Copyright(c) 2015-18 Intel Corporation. |
| 3 | |
| 4 | /* |
| 5 | * stream.c - SoundWire Bus stream operations. |
| 6 | */ |
| 7 | |
| 8 | #include <linux/delay.h> |
| 9 | #include <linux/device.h> |
| 10 | #include <linux/init.h> |
| 11 | #include <linux/module.h> |
| 12 | #include <linux/mod_devicetable.h> |
| 13 | #include <linux/slab.h> |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 14 | #include <linux/soundwire/sdw_registers.h> |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 15 | #include <linux/soundwire/sdw.h> |
| 16 | #include "bus.h" |
| 17 | |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 18 | /* |
| 19 | * Array of supported rows and columns as per MIPI SoundWire Specification 1.1 |
| 20 | * |
| 21 | * The rows are arranged as per the array index value programmed |
| 22 | * in register. The index 15 has dummy value 0 in order to fill hole. |
| 23 | */ |
| 24 | int rows[SDW_FRAME_ROWS] = {48, 50, 60, 64, 75, 80, 125, 147, |
| 25 | 96, 100, 120, 128, 150, 160, 250, 0, |
| 26 | 192, 200, 240, 256, 72, 144, 90, 180}; |
| 27 | |
| 28 | int cols[SDW_FRAME_COLS] = {2, 4, 6, 8, 10, 12, 14, 16}; |
| 29 | |
| 30 | static int sdw_find_col_index(int col) |
| 31 | { |
| 32 | int i; |
| 33 | |
| 34 | for (i = 0; i < SDW_FRAME_COLS; i++) { |
| 35 | if (cols[i] == col) |
| 36 | return i; |
| 37 | } |
| 38 | |
| 39 | pr_warn("Requested column not found, selecting lowest column no: 2\n"); |
| 40 | return 0; |
| 41 | } |
| 42 | |
| 43 | static int sdw_find_row_index(int row) |
| 44 | { |
| 45 | int i; |
| 46 | |
| 47 | for (i = 0; i < SDW_FRAME_ROWS; i++) { |
| 48 | if (rows[i] == row) |
| 49 | return i; |
| 50 | } |
| 51 | |
| 52 | pr_warn("Requested row not found, selecting lowest row no: 48\n"); |
| 53 | return 0; |
| 54 | } |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 55 | static int _sdw_program_slave_port_params(struct sdw_bus *bus, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 56 | struct sdw_slave *slave, |
| 57 | struct sdw_transport_params *t_params, |
| 58 | enum sdw_dpn_type type) |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 59 | { |
| 60 | u32 addr1, addr2, addr3, addr4; |
| 61 | int ret; |
| 62 | u16 wbuf; |
| 63 | |
| 64 | if (bus->params.next_bank) { |
| 65 | addr1 = SDW_DPN_OFFSETCTRL2_B1(t_params->port_num); |
| 66 | addr2 = SDW_DPN_BLOCKCTRL3_B1(t_params->port_num); |
| 67 | addr3 = SDW_DPN_SAMPLECTRL2_B1(t_params->port_num); |
| 68 | addr4 = SDW_DPN_HCTRL_B1(t_params->port_num); |
| 69 | } else { |
| 70 | addr1 = SDW_DPN_OFFSETCTRL2_B0(t_params->port_num); |
| 71 | addr2 = SDW_DPN_BLOCKCTRL3_B0(t_params->port_num); |
| 72 | addr3 = SDW_DPN_SAMPLECTRL2_B0(t_params->port_num); |
| 73 | addr4 = SDW_DPN_HCTRL_B0(t_params->port_num); |
| 74 | } |
| 75 | |
| 76 | /* Program DPN_OffsetCtrl2 registers */ |
| 77 | ret = sdw_write(slave, addr1, t_params->offset2); |
| 78 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 79 | dev_err(bus->dev, "DPN_OffsetCtrl2 register write failed\n"); |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 80 | return ret; |
| 81 | } |
| 82 | |
| 83 | /* Program DPN_BlockCtrl3 register */ |
| 84 | ret = sdw_write(slave, addr2, t_params->blk_pkg_mode); |
| 85 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 86 | dev_err(bus->dev, "DPN_BlockCtrl3 register write failed\n"); |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 87 | return ret; |
| 88 | } |
| 89 | |
| 90 | /* |
| 91 | * Data ports are FULL, SIMPLE and REDUCED. This function handles |
| 92 | * FULL and REDUCED only and and beyond this point only FULL is |
| 93 | * handled, so bail out if we are not FULL data port type |
| 94 | */ |
| 95 | if (type != SDW_DPN_FULL) |
| 96 | return ret; |
| 97 | |
| 98 | /* Program DPN_SampleCtrl2 register */ |
| 99 | wbuf = (t_params->sample_interval - 1); |
| 100 | wbuf &= SDW_DPN_SAMPLECTRL_HIGH; |
| 101 | wbuf >>= SDW_REG_SHIFT(SDW_DPN_SAMPLECTRL_HIGH); |
| 102 | |
| 103 | ret = sdw_write(slave, addr3, wbuf); |
| 104 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 105 | dev_err(bus->dev, "DPN_SampleCtrl2 register write failed\n"); |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 106 | return ret; |
| 107 | } |
| 108 | |
| 109 | /* Program DPN_HCtrl register */ |
| 110 | wbuf = t_params->hstart; |
| 111 | wbuf <<= SDW_REG_SHIFT(SDW_DPN_HCTRL_HSTART); |
| 112 | wbuf |= t_params->hstop; |
| 113 | |
| 114 | ret = sdw_write(slave, addr4, wbuf); |
| 115 | if (ret < 0) |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 116 | dev_err(bus->dev, "DPN_HCtrl register write failed\n"); |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 117 | |
| 118 | return ret; |
| 119 | } |
| 120 | |
| 121 | static int sdw_program_slave_port_params(struct sdw_bus *bus, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 122 | struct sdw_slave_runtime *s_rt, |
| 123 | struct sdw_port_runtime *p_rt) |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 124 | { |
| 125 | struct sdw_transport_params *t_params = &p_rt->transport_params; |
| 126 | struct sdw_port_params *p_params = &p_rt->port_params; |
| 127 | struct sdw_slave_prop *slave_prop = &s_rt->slave->prop; |
| 128 | u32 addr1, addr2, addr3, addr4, addr5, addr6; |
| 129 | struct sdw_dpn_prop *dpn_prop; |
| 130 | int ret; |
| 131 | u8 wbuf; |
| 132 | |
| 133 | dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 134 | s_rt->direction, |
| 135 | t_params->port_num); |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 136 | if (!dpn_prop) |
| 137 | return -EINVAL; |
| 138 | |
| 139 | addr1 = SDW_DPN_PORTCTRL(t_params->port_num); |
| 140 | addr2 = SDW_DPN_BLOCKCTRL1(t_params->port_num); |
| 141 | |
| 142 | if (bus->params.next_bank) { |
| 143 | addr3 = SDW_DPN_SAMPLECTRL1_B1(t_params->port_num); |
| 144 | addr4 = SDW_DPN_OFFSETCTRL1_B1(t_params->port_num); |
| 145 | addr5 = SDW_DPN_BLOCKCTRL2_B1(t_params->port_num); |
| 146 | addr6 = SDW_DPN_LANECTRL_B1(t_params->port_num); |
| 147 | |
| 148 | } else { |
| 149 | addr3 = SDW_DPN_SAMPLECTRL1_B0(t_params->port_num); |
| 150 | addr4 = SDW_DPN_OFFSETCTRL1_B0(t_params->port_num); |
| 151 | addr5 = SDW_DPN_BLOCKCTRL2_B0(t_params->port_num); |
| 152 | addr6 = SDW_DPN_LANECTRL_B0(t_params->port_num); |
| 153 | } |
| 154 | |
| 155 | /* Program DPN_PortCtrl register */ |
| 156 | wbuf = p_params->data_mode << SDW_REG_SHIFT(SDW_DPN_PORTCTRL_DATAMODE); |
| 157 | wbuf |= p_params->flow_mode; |
| 158 | |
| 159 | ret = sdw_update(s_rt->slave, addr1, 0xF, wbuf); |
| 160 | if (ret < 0) { |
| 161 | dev_err(&s_rt->slave->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 162 | "DPN_PortCtrl register write failed for port %d\n", |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 163 | t_params->port_num); |
| 164 | return ret; |
| 165 | } |
| 166 | |
| 167 | /* Program DPN_BlockCtrl1 register */ |
| 168 | ret = sdw_write(s_rt->slave, addr2, (p_params->bps - 1)); |
| 169 | if (ret < 0) { |
| 170 | dev_err(&s_rt->slave->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 171 | "DPN_BlockCtrl1 register write failed for port %d\n", |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 172 | t_params->port_num); |
| 173 | return ret; |
| 174 | } |
| 175 | |
| 176 | /* Program DPN_SampleCtrl1 register */ |
| 177 | wbuf = (t_params->sample_interval - 1) & SDW_DPN_SAMPLECTRL_LOW; |
| 178 | ret = sdw_write(s_rt->slave, addr3, wbuf); |
| 179 | if (ret < 0) { |
| 180 | dev_err(&s_rt->slave->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 181 | "DPN_SampleCtrl1 register write failed for port %d\n", |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 182 | t_params->port_num); |
| 183 | return ret; |
| 184 | } |
| 185 | |
| 186 | /* Program DPN_OffsetCtrl1 registers */ |
| 187 | ret = sdw_write(s_rt->slave, addr4, t_params->offset1); |
| 188 | if (ret < 0) { |
| 189 | dev_err(&s_rt->slave->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 190 | "DPN_OffsetCtrl1 register write failed for port %d\n", |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 191 | t_params->port_num); |
| 192 | return ret; |
| 193 | } |
| 194 | |
| 195 | /* Program DPN_BlockCtrl2 register*/ |
| 196 | if (t_params->blk_grp_ctrl_valid) { |
| 197 | ret = sdw_write(s_rt->slave, addr5, t_params->blk_grp_ctrl); |
| 198 | if (ret < 0) { |
| 199 | dev_err(&s_rt->slave->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 200 | "DPN_BlockCtrl2 reg write failed for port %d\n", |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 201 | t_params->port_num); |
| 202 | return ret; |
| 203 | } |
| 204 | } |
| 205 | |
| 206 | /* program DPN_LaneCtrl register */ |
| 207 | if (slave_prop->lane_control_support) { |
| 208 | ret = sdw_write(s_rt->slave, addr6, t_params->lane_ctrl); |
| 209 | if (ret < 0) { |
| 210 | dev_err(&s_rt->slave->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 211 | "DPN_LaneCtrl register write failed for port %d\n", |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 212 | t_params->port_num); |
| 213 | return ret; |
| 214 | } |
| 215 | } |
| 216 | |
| 217 | if (dpn_prop->type != SDW_DPN_SIMPLE) { |
| 218 | ret = _sdw_program_slave_port_params(bus, s_rt->slave, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 219 | t_params, dpn_prop->type); |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 220 | if (ret < 0) |
| 221 | dev_err(&s_rt->slave->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 222 | "Transport reg write failed for port: %d\n", |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 223 | t_params->port_num); |
| 224 | } |
| 225 | |
| 226 | return ret; |
| 227 | } |
| 228 | |
| 229 | static int sdw_program_master_port_params(struct sdw_bus *bus, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 230 | struct sdw_port_runtime *p_rt) |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 231 | { |
| 232 | int ret; |
| 233 | |
| 234 | /* |
| 235 | * we need to set transport and port parameters for the port. |
| 236 | * Transport parameters refers to the smaple interval, offsets and |
| 237 | * hstart/stop etc of the data. Port parameters refers to word |
| 238 | * length, flow mode etc of the port |
| 239 | */ |
| 240 | ret = bus->port_ops->dpn_set_port_transport_params(bus, |
| 241 | &p_rt->transport_params, |
| 242 | bus->params.next_bank); |
| 243 | if (ret < 0) |
| 244 | return ret; |
| 245 | |
| 246 | return bus->port_ops->dpn_set_port_params(bus, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 247 | &p_rt->port_params, |
| 248 | bus->params.next_bank); |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 249 | } |
| 250 | |
| 251 | /** |
| 252 | * sdw_program_port_params() - Programs transport parameters of Master(s) |
| 253 | * and Slave(s) |
| 254 | * |
| 255 | * @m_rt: Master stream runtime |
| 256 | */ |
| 257 | static int sdw_program_port_params(struct sdw_master_runtime *m_rt) |
| 258 | { |
| 259 | struct sdw_slave_runtime *s_rt = NULL; |
| 260 | struct sdw_bus *bus = m_rt->bus; |
| 261 | struct sdw_port_runtime *p_rt; |
| 262 | int ret = 0; |
| 263 | |
| 264 | /* Program transport & port parameters for Slave(s) */ |
| 265 | list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) { |
| 266 | list_for_each_entry(p_rt, &s_rt->port_list, port_node) { |
| 267 | ret = sdw_program_slave_port_params(bus, s_rt, p_rt); |
| 268 | if (ret < 0) |
| 269 | return ret; |
| 270 | } |
| 271 | } |
| 272 | |
| 273 | /* Program transport & port parameters for Master(s) */ |
| 274 | list_for_each_entry(p_rt, &m_rt->port_list, port_node) { |
| 275 | ret = sdw_program_master_port_params(bus, p_rt); |
| 276 | if (ret < 0) |
| 277 | return ret; |
| 278 | } |
| 279 | |
| 280 | return 0; |
| 281 | } |
| 282 | |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 283 | /** |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 284 | * sdw_enable_disable_slave_ports: Enable/disable slave data port |
| 285 | * |
| 286 | * @bus: bus instance |
| 287 | * @s_rt: slave runtime |
| 288 | * @p_rt: port runtime |
| 289 | * @en: enable or disable operation |
| 290 | * |
| 291 | * This function only sets the enable/disable bits in the relevant bank, the |
| 292 | * actual enable/disable is done with a bank switch |
| 293 | */ |
| 294 | static int sdw_enable_disable_slave_ports(struct sdw_bus *bus, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 295 | struct sdw_slave_runtime *s_rt, |
| 296 | struct sdw_port_runtime *p_rt, |
| 297 | bool en) |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 298 | { |
| 299 | struct sdw_transport_params *t_params = &p_rt->transport_params; |
| 300 | u32 addr; |
| 301 | int ret; |
| 302 | |
| 303 | if (bus->params.next_bank) |
| 304 | addr = SDW_DPN_CHANNELEN_B1(p_rt->num); |
| 305 | else |
| 306 | addr = SDW_DPN_CHANNELEN_B0(p_rt->num); |
| 307 | |
| 308 | /* |
| 309 | * Since bus doesn't support sharing a port across two streams, |
| 310 | * it is safe to reset this register |
| 311 | */ |
| 312 | if (en) |
| 313 | ret = sdw_update(s_rt->slave, addr, 0xFF, p_rt->ch_mask); |
| 314 | else |
| 315 | ret = sdw_update(s_rt->slave, addr, 0xFF, 0x0); |
| 316 | |
| 317 | if (ret < 0) |
| 318 | dev_err(&s_rt->slave->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 319 | "Slave chn_en reg write failed:%d port:%d\n", |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 320 | ret, t_params->port_num); |
| 321 | |
| 322 | return ret; |
| 323 | } |
| 324 | |
| 325 | static int sdw_enable_disable_master_ports(struct sdw_master_runtime *m_rt, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 326 | struct sdw_port_runtime *p_rt, |
| 327 | bool en) |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 328 | { |
| 329 | struct sdw_transport_params *t_params = &p_rt->transport_params; |
| 330 | struct sdw_bus *bus = m_rt->bus; |
| 331 | struct sdw_enable_ch enable_ch; |
Pierre-Louis Bossart | a25eab2 | 2019-04-10 22:17:00 -0500 | [diff] [blame] | 332 | int ret; |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 333 | |
| 334 | enable_ch.port_num = p_rt->num; |
| 335 | enable_ch.ch_mask = p_rt->ch_mask; |
| 336 | enable_ch.enable = en; |
| 337 | |
| 338 | /* Perform Master port channel(s) enable/disable */ |
| 339 | if (bus->port_ops->dpn_port_enable_ch) { |
| 340 | ret = bus->port_ops->dpn_port_enable_ch(bus, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 341 | &enable_ch, |
| 342 | bus->params.next_bank); |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 343 | if (ret < 0) { |
| 344 | dev_err(bus->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 345 | "Master chn_en write failed:%d port:%d\n", |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 346 | ret, t_params->port_num); |
| 347 | return ret; |
| 348 | } |
| 349 | } else { |
| 350 | dev_err(bus->dev, |
| 351 | "dpn_port_enable_ch not supported, %s failed\n", |
| 352 | en ? "enable" : "disable"); |
| 353 | return -EINVAL; |
| 354 | } |
| 355 | |
| 356 | return 0; |
| 357 | } |
| 358 | |
| 359 | /** |
| 360 | * sdw_enable_disable_ports() - Enable/disable port(s) for Master and |
| 361 | * Slave(s) |
| 362 | * |
| 363 | * @m_rt: Master stream runtime |
| 364 | * @en: mode (enable/disable) |
| 365 | */ |
| 366 | static int sdw_enable_disable_ports(struct sdw_master_runtime *m_rt, bool en) |
| 367 | { |
| 368 | struct sdw_port_runtime *s_port, *m_port; |
| 369 | struct sdw_slave_runtime *s_rt = NULL; |
| 370 | int ret = 0; |
| 371 | |
| 372 | /* Enable/Disable Slave port(s) */ |
| 373 | list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) { |
| 374 | list_for_each_entry(s_port, &s_rt->port_list, port_node) { |
| 375 | ret = sdw_enable_disable_slave_ports(m_rt->bus, s_rt, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 376 | s_port, en); |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 377 | if (ret < 0) |
| 378 | return ret; |
| 379 | } |
| 380 | } |
| 381 | |
| 382 | /* Enable/Disable Master port(s) */ |
| 383 | list_for_each_entry(m_port, &m_rt->port_list, port_node) { |
| 384 | ret = sdw_enable_disable_master_ports(m_rt, m_port, en); |
| 385 | if (ret < 0) |
| 386 | return ret; |
| 387 | } |
| 388 | |
| 389 | return 0; |
| 390 | } |
| 391 | |
| 392 | static int sdw_do_port_prep(struct sdw_slave_runtime *s_rt, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 393 | struct sdw_prepare_ch prep_ch, |
| 394 | enum sdw_port_prep_ops cmd) |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 395 | { |
| 396 | const struct sdw_slave_ops *ops = s_rt->slave->ops; |
| 397 | int ret; |
| 398 | |
| 399 | if (ops->port_prep) { |
| 400 | ret = ops->port_prep(s_rt->slave, &prep_ch, cmd); |
| 401 | if (ret < 0) { |
| 402 | dev_err(&s_rt->slave->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 403 | "Slave Port Prep cmd %d failed: %d\n", cmd, ret); |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 404 | return ret; |
| 405 | } |
| 406 | } |
| 407 | |
| 408 | return 0; |
| 409 | } |
| 410 | |
| 411 | static int sdw_prep_deprep_slave_ports(struct sdw_bus *bus, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 412 | struct sdw_slave_runtime *s_rt, |
| 413 | struct sdw_port_runtime *p_rt, |
| 414 | bool prep) |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 415 | { |
| 416 | struct completion *port_ready = NULL; |
| 417 | struct sdw_dpn_prop *dpn_prop; |
| 418 | struct sdw_prepare_ch prep_ch; |
| 419 | unsigned int time_left; |
| 420 | bool intr = false; |
| 421 | int ret = 0, val; |
| 422 | u32 addr; |
| 423 | |
| 424 | prep_ch.num = p_rt->num; |
| 425 | prep_ch.ch_mask = p_rt->ch_mask; |
| 426 | |
| 427 | dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 428 | s_rt->direction, |
| 429 | prep_ch.num); |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 430 | if (!dpn_prop) { |
| 431 | dev_err(bus->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 432 | "Slave Port:%d properties not found\n", prep_ch.num); |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 433 | return -EINVAL; |
| 434 | } |
| 435 | |
| 436 | prep_ch.prepare = prep; |
| 437 | |
| 438 | prep_ch.bank = bus->params.next_bank; |
| 439 | |
| 440 | if (dpn_prop->device_interrupts || !dpn_prop->simple_ch_prep_sm) |
| 441 | intr = true; |
| 442 | |
| 443 | /* |
| 444 | * Enable interrupt before Port prepare. |
| 445 | * For Port de-prepare, it is assumed that port |
| 446 | * was prepared earlier |
| 447 | */ |
| 448 | if (prep && intr) { |
| 449 | ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 450 | dpn_prop->device_interrupts); |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 451 | if (ret < 0) |
| 452 | return ret; |
| 453 | } |
| 454 | |
| 455 | /* Inform slave about the impending port prepare */ |
| 456 | sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_PRE_PREP); |
| 457 | |
| 458 | /* Prepare Slave port implementing CP_SM */ |
| 459 | if (!dpn_prop->simple_ch_prep_sm) { |
| 460 | addr = SDW_DPN_PREPARECTRL(p_rt->num); |
| 461 | |
| 462 | if (prep) |
| 463 | ret = sdw_update(s_rt->slave, addr, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 464 | 0xFF, p_rt->ch_mask); |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 465 | else |
| 466 | ret = sdw_update(s_rt->slave, addr, 0xFF, 0x0); |
| 467 | |
| 468 | if (ret < 0) { |
| 469 | dev_err(&s_rt->slave->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 470 | "Slave prep_ctrl reg write failed\n"); |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 471 | return ret; |
| 472 | } |
| 473 | |
| 474 | /* Wait for completion on port ready */ |
| 475 | port_ready = &s_rt->slave->port_ready[prep_ch.num]; |
| 476 | time_left = wait_for_completion_timeout(port_ready, |
| 477 | msecs_to_jiffies(dpn_prop->ch_prep_timeout)); |
| 478 | |
| 479 | val = sdw_read(s_rt->slave, SDW_DPN_PREPARESTATUS(p_rt->num)); |
| 480 | val &= p_rt->ch_mask; |
| 481 | if (!time_left || val) { |
| 482 | dev_err(&s_rt->slave->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 483 | "Chn prep failed for port:%d\n", prep_ch.num); |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 484 | return -ETIMEDOUT; |
| 485 | } |
| 486 | } |
| 487 | |
| 488 | /* Inform slaves about ports prepared */ |
| 489 | sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_POST_PREP); |
| 490 | |
| 491 | /* Disable interrupt after Port de-prepare */ |
| 492 | if (!prep && intr) |
| 493 | ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 494 | dpn_prop->device_interrupts); |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 495 | |
| 496 | return ret; |
| 497 | } |
| 498 | |
| 499 | static int sdw_prep_deprep_master_ports(struct sdw_master_runtime *m_rt, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 500 | struct sdw_port_runtime *p_rt, |
| 501 | bool prep) |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 502 | { |
| 503 | struct sdw_transport_params *t_params = &p_rt->transport_params; |
| 504 | struct sdw_bus *bus = m_rt->bus; |
| 505 | const struct sdw_master_port_ops *ops = bus->port_ops; |
| 506 | struct sdw_prepare_ch prep_ch; |
| 507 | int ret = 0; |
| 508 | |
| 509 | prep_ch.num = p_rt->num; |
| 510 | prep_ch.ch_mask = p_rt->ch_mask; |
| 511 | prep_ch.prepare = prep; /* Prepare/De-prepare */ |
| 512 | prep_ch.bank = bus->params.next_bank; |
| 513 | |
| 514 | /* Pre-prepare/Pre-deprepare port(s) */ |
| 515 | if (ops->dpn_port_prep) { |
| 516 | ret = ops->dpn_port_prep(bus, &prep_ch); |
| 517 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 518 | dev_err(bus->dev, "Port prepare failed for port:%d\n", |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 519 | t_params->port_num); |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 520 | return ret; |
| 521 | } |
| 522 | } |
| 523 | |
| 524 | return ret; |
| 525 | } |
| 526 | |
| 527 | /** |
| 528 | * sdw_prep_deprep_ports() - Prepare/De-prepare port(s) for Master(s) and |
| 529 | * Slave(s) |
| 530 | * |
| 531 | * @m_rt: Master runtime handle |
| 532 | * @prep: Prepare or De-prepare |
| 533 | */ |
| 534 | static int sdw_prep_deprep_ports(struct sdw_master_runtime *m_rt, bool prep) |
| 535 | { |
| 536 | struct sdw_slave_runtime *s_rt = NULL; |
| 537 | struct sdw_port_runtime *p_rt; |
| 538 | int ret = 0; |
| 539 | |
| 540 | /* Prepare/De-prepare Slave port(s) */ |
| 541 | list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) { |
| 542 | list_for_each_entry(p_rt, &s_rt->port_list, port_node) { |
| 543 | ret = sdw_prep_deprep_slave_ports(m_rt->bus, s_rt, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 544 | p_rt, prep); |
Sanyog Kale | 79df15b | 2018-04-26 18:38:23 +0530 | [diff] [blame] | 545 | if (ret < 0) |
| 546 | return ret; |
| 547 | } |
| 548 | } |
| 549 | |
| 550 | /* Prepare/De-prepare Master port(s) */ |
| 551 | list_for_each_entry(p_rt, &m_rt->port_list, port_node) { |
| 552 | ret = sdw_prep_deprep_master_ports(m_rt, p_rt, prep); |
| 553 | if (ret < 0) |
| 554 | return ret; |
| 555 | } |
| 556 | |
| 557 | return ret; |
| 558 | } |
| 559 | |
| 560 | /** |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 561 | * sdw_notify_config() - Notify bus configuration |
| 562 | * |
| 563 | * @m_rt: Master runtime handle |
| 564 | * |
| 565 | * This function notifies the Master(s) and Slave(s) of the |
| 566 | * new bus configuration. |
| 567 | */ |
| 568 | static int sdw_notify_config(struct sdw_master_runtime *m_rt) |
| 569 | { |
| 570 | struct sdw_slave_runtime *s_rt; |
| 571 | struct sdw_bus *bus = m_rt->bus; |
| 572 | struct sdw_slave *slave; |
| 573 | int ret = 0; |
| 574 | |
| 575 | if (bus->ops->set_bus_conf) { |
| 576 | ret = bus->ops->set_bus_conf(bus, &bus->params); |
| 577 | if (ret < 0) |
| 578 | return ret; |
| 579 | } |
| 580 | |
| 581 | list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) { |
| 582 | slave = s_rt->slave; |
| 583 | |
| 584 | if (slave->ops->bus_config) { |
| 585 | ret = slave->ops->bus_config(slave, &bus->params); |
| 586 | if (ret < 0) |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 587 | dev_err(bus->dev, "Notify Slave: %d failed\n", |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 588 | slave->dev_num); |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 589 | return ret; |
| 590 | } |
| 591 | } |
| 592 | |
| 593 | return ret; |
| 594 | } |
| 595 | |
| 596 | /** |
| 597 | * sdw_program_params() - Program transport and port parameters for Master(s) |
| 598 | * and Slave(s) |
| 599 | * |
| 600 | * @bus: SDW bus instance |
| 601 | */ |
| 602 | static int sdw_program_params(struct sdw_bus *bus) |
| 603 | { |
| 604 | struct sdw_master_runtime *m_rt = NULL; |
| 605 | int ret = 0; |
| 606 | |
| 607 | list_for_each_entry(m_rt, &bus->m_rt_list, bus_node) { |
| 608 | ret = sdw_program_port_params(m_rt); |
| 609 | if (ret < 0) { |
| 610 | dev_err(bus->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 611 | "Program transport params failed: %d\n", ret); |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 612 | return ret; |
| 613 | } |
| 614 | |
| 615 | ret = sdw_notify_config(m_rt); |
| 616 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 617 | dev_err(bus->dev, "Notify bus config failed: %d\n", ret); |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 618 | return ret; |
| 619 | } |
| 620 | |
| 621 | /* Enable port(s) on alternate bank for all active streams */ |
| 622 | if (m_rt->stream->state != SDW_STREAM_ENABLED) |
| 623 | continue; |
| 624 | |
| 625 | ret = sdw_enable_disable_ports(m_rt, true); |
| 626 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 627 | dev_err(bus->dev, "Enable channel failed: %d\n", ret); |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 628 | return ret; |
| 629 | } |
| 630 | } |
| 631 | |
| 632 | return ret; |
| 633 | } |
| 634 | |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 635 | static int sdw_bank_switch(struct sdw_bus *bus, int m_rt_count) |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 636 | { |
| 637 | int col_index, row_index; |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 638 | bool multi_link; |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 639 | struct sdw_msg *wr_msg; |
| 640 | u8 *wbuf = NULL; |
| 641 | int ret = 0; |
| 642 | u16 addr; |
| 643 | |
| 644 | wr_msg = kzalloc(sizeof(*wr_msg), GFP_KERNEL); |
| 645 | if (!wr_msg) |
| 646 | return -ENOMEM; |
| 647 | |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 648 | bus->defer_msg.msg = wr_msg; |
| 649 | |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 650 | wbuf = kzalloc(sizeof(*wbuf), GFP_KERNEL); |
| 651 | if (!wbuf) { |
| 652 | ret = -ENOMEM; |
| 653 | goto error_1; |
| 654 | } |
| 655 | |
| 656 | /* Get row and column index to program register */ |
| 657 | col_index = sdw_find_col_index(bus->params.col); |
| 658 | row_index = sdw_find_row_index(bus->params.row); |
| 659 | wbuf[0] = col_index | (row_index << 3); |
| 660 | |
| 661 | if (bus->params.next_bank) |
| 662 | addr = SDW_SCP_FRAMECTRL_B1; |
| 663 | else |
| 664 | addr = SDW_SCP_FRAMECTRL_B0; |
| 665 | |
| 666 | sdw_fill_msg(wr_msg, NULL, addr, 1, SDW_BROADCAST_DEV_NUM, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 667 | SDW_MSG_FLAG_WRITE, wbuf); |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 668 | wr_msg->ssp_sync = true; |
| 669 | |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 670 | /* |
| 671 | * Set the multi_link flag only when both the hardware supports |
| 672 | * and there is a stream handled by multiple masters |
| 673 | */ |
| 674 | multi_link = bus->multi_link && (m_rt_count > 1); |
| 675 | |
| 676 | if (multi_link) |
| 677 | ret = sdw_transfer_defer(bus, wr_msg, &bus->defer_msg); |
| 678 | else |
| 679 | ret = sdw_transfer(bus, wr_msg); |
| 680 | |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 681 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 682 | dev_err(bus->dev, "Slave frame_ctrl reg write failed\n"); |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 683 | goto error; |
| 684 | } |
| 685 | |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 686 | if (!multi_link) { |
| 687 | kfree(wr_msg); |
| 688 | kfree(wbuf); |
| 689 | bus->defer_msg.msg = NULL; |
| 690 | bus->params.curr_bank = !bus->params.curr_bank; |
| 691 | bus->params.next_bank = !bus->params.next_bank; |
| 692 | } |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 693 | |
| 694 | return 0; |
| 695 | |
| 696 | error: |
| 697 | kfree(wbuf); |
| 698 | error_1: |
| 699 | kfree(wr_msg); |
| 700 | return ret; |
| 701 | } |
| 702 | |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 703 | /** |
| 704 | * sdw_ml_sync_bank_switch: Multilink register bank switch |
| 705 | * |
| 706 | * @bus: SDW bus instance |
| 707 | * |
| 708 | * Caller function should free the buffers on error |
| 709 | */ |
| 710 | static int sdw_ml_sync_bank_switch(struct sdw_bus *bus) |
| 711 | { |
| 712 | unsigned long time_left; |
| 713 | |
| 714 | if (!bus->multi_link) |
| 715 | return 0; |
| 716 | |
| 717 | /* Wait for completion of transfer */ |
| 718 | time_left = wait_for_completion_timeout(&bus->defer_msg.complete, |
| 719 | bus->bank_switch_timeout); |
| 720 | |
| 721 | if (!time_left) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 722 | dev_err(bus->dev, "Controller Timed out on bank switch\n"); |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 723 | return -ETIMEDOUT; |
| 724 | } |
| 725 | |
| 726 | bus->params.curr_bank = !bus->params.curr_bank; |
| 727 | bus->params.next_bank = !bus->params.next_bank; |
| 728 | |
| 729 | if (bus->defer_msg.msg) { |
| 730 | kfree(bus->defer_msg.msg->buf); |
| 731 | kfree(bus->defer_msg.msg); |
| 732 | } |
| 733 | |
| 734 | return 0; |
| 735 | } |
| 736 | |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 737 | static int do_bank_switch(struct sdw_stream_runtime *stream) |
| 738 | { |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 739 | struct sdw_master_runtime *m_rt = NULL; |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 740 | const struct sdw_master_ops *ops; |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 741 | struct sdw_bus *bus = NULL; |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 742 | bool multi_link = false; |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 743 | int ret = 0; |
| 744 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 745 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
| 746 | bus = m_rt->bus; |
| 747 | ops = bus->ops; |
| 748 | |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 749 | if (bus->multi_link) { |
| 750 | multi_link = true; |
| 751 | mutex_lock(&bus->msg_lock); |
| 752 | } |
| 753 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 754 | /* Pre-bank switch */ |
| 755 | if (ops->pre_bank_switch) { |
| 756 | ret = ops->pre_bank_switch(bus); |
| 757 | if (ret < 0) { |
| 758 | dev_err(bus->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 759 | "Pre bank switch op failed: %d\n", ret); |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 760 | goto msg_unlock; |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 761 | } |
| 762 | } |
| 763 | |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 764 | /* |
| 765 | * Perform Bank switch operation. |
| 766 | * For multi link cases, the actual bank switch is |
| 767 | * synchronized across all Masters and happens later as a |
| 768 | * part of post_bank_switch ops. |
| 769 | */ |
| 770 | ret = sdw_bank_switch(bus, stream->m_rt_count); |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 771 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 772 | dev_err(bus->dev, "Bank switch failed: %d\n", ret); |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 773 | goto error; |
| 774 | |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 775 | } |
| 776 | } |
| 777 | |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 778 | /* |
| 779 | * For multi link cases, it is expected that the bank switch is |
| 780 | * triggered by the post_bank_switch for the first Master in the list |
| 781 | * and for the other Masters the post_bank_switch() should return doing |
| 782 | * nothing. |
| 783 | */ |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 784 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
| 785 | bus = m_rt->bus; |
| 786 | ops = bus->ops; |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 787 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 788 | /* Post-bank switch */ |
| 789 | if (ops->post_bank_switch) { |
| 790 | ret = ops->post_bank_switch(bus); |
| 791 | if (ret < 0) { |
| 792 | dev_err(bus->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 793 | "Post bank switch op failed: %d\n", ret); |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 794 | goto error; |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 795 | } |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 796 | } else if (bus->multi_link && stream->m_rt_count > 1) { |
| 797 | dev_err(bus->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 798 | "Post bank switch ops not implemented\n"); |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 799 | goto error; |
| 800 | } |
| 801 | |
| 802 | /* Set the bank switch timeout to default, if not set */ |
| 803 | if (!bus->bank_switch_timeout) |
| 804 | bus->bank_switch_timeout = DEFAULT_BANK_SWITCH_TIMEOUT; |
| 805 | |
| 806 | /* Check if bank switch was successful */ |
| 807 | ret = sdw_ml_sync_bank_switch(bus); |
| 808 | if (ret < 0) { |
| 809 | dev_err(bus->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 810 | "multi link bank switch failed: %d\n", ret); |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 811 | goto error; |
| 812 | } |
| 813 | |
| 814 | mutex_unlock(&bus->msg_lock); |
| 815 | } |
| 816 | |
| 817 | return ret; |
| 818 | |
| 819 | error: |
| 820 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
| 821 | |
| 822 | bus = m_rt->bus; |
| 823 | |
| 824 | kfree(bus->defer_msg.msg->buf); |
| 825 | kfree(bus->defer_msg.msg); |
| 826 | } |
| 827 | |
| 828 | msg_unlock: |
| 829 | |
| 830 | if (multi_link) { |
| 831 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
| 832 | bus = m_rt->bus; |
| 833 | if (mutex_is_locked(&bus->msg_lock)) |
| 834 | mutex_unlock(&bus->msg_lock); |
Sanyog Kale | 99b8a5d | 2018-04-26 18:38:28 +0530 | [diff] [blame] | 835 | } |
| 836 | } |
| 837 | |
| 838 | return ret; |
| 839 | } |
| 840 | |
| 841 | /** |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 842 | * sdw_release_stream() - Free the assigned stream runtime |
| 843 | * |
| 844 | * @stream: SoundWire stream runtime |
| 845 | * |
| 846 | * sdw_release_stream should be called only once per stream |
| 847 | */ |
| 848 | void sdw_release_stream(struct sdw_stream_runtime *stream) |
| 849 | { |
| 850 | kfree(stream); |
| 851 | } |
| 852 | EXPORT_SYMBOL(sdw_release_stream); |
| 853 | |
| 854 | /** |
| 855 | * sdw_alloc_stream() - Allocate and return stream runtime |
| 856 | * |
| 857 | * @stream_name: SoundWire stream name |
| 858 | * |
| 859 | * Allocates a SoundWire stream runtime instance. |
| 860 | * sdw_alloc_stream should be called only once per stream. Typically |
| 861 | * invoked from ALSA/ASoC machine/platform driver. |
| 862 | */ |
| 863 | struct sdw_stream_runtime *sdw_alloc_stream(char *stream_name) |
| 864 | { |
| 865 | struct sdw_stream_runtime *stream; |
| 866 | |
| 867 | stream = kzalloc(sizeof(*stream), GFP_KERNEL); |
| 868 | if (!stream) |
| 869 | return NULL; |
| 870 | |
| 871 | stream->name = stream_name; |
Sanyog Kale | 0c4a104 | 2018-07-27 14:44:13 +0530 | [diff] [blame] | 872 | INIT_LIST_HEAD(&stream->master_list); |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 873 | stream->state = SDW_STREAM_ALLOCATED; |
Shreyas NC | 9b5c132 | 2018-07-27 14:44:15 +0530 | [diff] [blame] | 874 | stream->m_rt_count = 0; |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 875 | |
| 876 | return stream; |
| 877 | } |
| 878 | EXPORT_SYMBOL(sdw_alloc_stream); |
| 879 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 880 | static struct sdw_master_runtime |
| 881 | *sdw_find_master_rt(struct sdw_bus *bus, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 882 | struct sdw_stream_runtime *stream) |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 883 | { |
| 884 | struct sdw_master_runtime *m_rt = NULL; |
| 885 | |
| 886 | /* Retrieve Bus handle if already available */ |
| 887 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
| 888 | if (m_rt->bus == bus) |
| 889 | return m_rt; |
| 890 | } |
| 891 | |
| 892 | return NULL; |
| 893 | } |
| 894 | |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 895 | /** |
| 896 | * sdw_alloc_master_rt() - Allocates and initialize Master runtime handle |
| 897 | * |
| 898 | * @bus: SDW bus instance |
| 899 | * @stream_config: Stream configuration |
| 900 | * @stream: Stream runtime handle. |
| 901 | * |
| 902 | * This function is to be called with bus_lock held. |
| 903 | */ |
| 904 | static struct sdw_master_runtime |
| 905 | *sdw_alloc_master_rt(struct sdw_bus *bus, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 906 | struct sdw_stream_config *stream_config, |
| 907 | struct sdw_stream_runtime *stream) |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 908 | { |
| 909 | struct sdw_master_runtime *m_rt; |
| 910 | |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 911 | /* |
| 912 | * check if Master is already allocated (as a result of Slave adding |
| 913 | * it first), if so skip allocation and go to configure |
| 914 | */ |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 915 | m_rt = sdw_find_master_rt(bus, stream); |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 916 | if (m_rt) |
| 917 | goto stream_config; |
| 918 | |
| 919 | m_rt = kzalloc(sizeof(*m_rt), GFP_KERNEL); |
| 920 | if (!m_rt) |
| 921 | return NULL; |
| 922 | |
| 923 | /* Initialization of Master runtime handle */ |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 924 | INIT_LIST_HEAD(&m_rt->port_list); |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 925 | INIT_LIST_HEAD(&m_rt->slave_rt_list); |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 926 | list_add_tail(&m_rt->stream_node, &stream->master_list); |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 927 | |
| 928 | list_add_tail(&m_rt->bus_node, &bus->m_rt_list); |
| 929 | |
| 930 | stream_config: |
| 931 | m_rt->ch_count = stream_config->ch_count; |
| 932 | m_rt->bus = bus; |
| 933 | m_rt->stream = stream; |
| 934 | m_rt->direction = stream_config->direction; |
| 935 | |
| 936 | return m_rt; |
| 937 | } |
| 938 | |
| 939 | /** |
| 940 | * sdw_alloc_slave_rt() - Allocate and initialize Slave runtime handle. |
| 941 | * |
| 942 | * @slave: Slave handle |
| 943 | * @stream_config: Stream configuration |
| 944 | * @stream: Stream runtime handle |
| 945 | * |
| 946 | * This function is to be called with bus_lock held. |
| 947 | */ |
| 948 | static struct sdw_slave_runtime |
| 949 | *sdw_alloc_slave_rt(struct sdw_slave *slave, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 950 | struct sdw_stream_config *stream_config, |
| 951 | struct sdw_stream_runtime *stream) |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 952 | { |
| 953 | struct sdw_slave_runtime *s_rt = NULL; |
| 954 | |
| 955 | s_rt = kzalloc(sizeof(*s_rt), GFP_KERNEL); |
| 956 | if (!s_rt) |
| 957 | return NULL; |
| 958 | |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 959 | INIT_LIST_HEAD(&s_rt->port_list); |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 960 | s_rt->ch_count = stream_config->ch_count; |
| 961 | s_rt->direction = stream_config->direction; |
| 962 | s_rt->slave = slave; |
| 963 | |
| 964 | return s_rt; |
| 965 | } |
| 966 | |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 967 | static void sdw_master_port_release(struct sdw_bus *bus, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 968 | struct sdw_master_runtime *m_rt) |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 969 | { |
| 970 | struct sdw_port_runtime *p_rt, *_p_rt; |
| 971 | |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 972 | list_for_each_entry_safe(p_rt, _p_rt, &m_rt->port_list, port_node) { |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 973 | list_del(&p_rt->port_node); |
| 974 | kfree(p_rt); |
| 975 | } |
| 976 | } |
| 977 | |
| 978 | static void sdw_slave_port_release(struct sdw_bus *bus, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 979 | struct sdw_slave *slave, |
| 980 | struct sdw_stream_runtime *stream) |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 981 | { |
| 982 | struct sdw_port_runtime *p_rt, *_p_rt; |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 983 | struct sdw_master_runtime *m_rt; |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 984 | struct sdw_slave_runtime *s_rt; |
| 985 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 986 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
| 987 | list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) { |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 988 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 989 | if (s_rt->slave != slave) |
| 990 | continue; |
| 991 | |
| 992 | list_for_each_entry_safe(p_rt, _p_rt, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 993 | &s_rt->port_list, port_node) { |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 994 | |
| 995 | list_del(&p_rt->port_node); |
| 996 | kfree(p_rt); |
| 997 | } |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 998 | } |
| 999 | } |
| 1000 | } |
| 1001 | |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1002 | /** |
| 1003 | * sdw_release_slave_stream() - Free Slave(s) runtime handle |
| 1004 | * |
| 1005 | * @slave: Slave handle. |
| 1006 | * @stream: Stream runtime handle. |
| 1007 | * |
| 1008 | * This function is to be called with bus_lock held. |
| 1009 | */ |
| 1010 | static void sdw_release_slave_stream(struct sdw_slave *slave, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1011 | struct sdw_stream_runtime *stream) |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1012 | { |
| 1013 | struct sdw_slave_runtime *s_rt, *_s_rt; |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1014 | struct sdw_master_runtime *m_rt; |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1015 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1016 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
| 1017 | /* Retrieve Slave runtime handle */ |
| 1018 | list_for_each_entry_safe(s_rt, _s_rt, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1019 | &m_rt->slave_rt_list, m_rt_node) { |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1020 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1021 | if (s_rt->slave == slave) { |
| 1022 | list_del(&s_rt->m_rt_node); |
| 1023 | kfree(s_rt); |
| 1024 | return; |
| 1025 | } |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1026 | } |
| 1027 | } |
| 1028 | } |
| 1029 | |
| 1030 | /** |
| 1031 | * sdw_release_master_stream() - Free Master runtime handle |
| 1032 | * |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1033 | * @m_rt: Master runtime node |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1034 | * @stream: Stream runtime handle. |
| 1035 | * |
| 1036 | * This function is to be called with bus_lock held |
| 1037 | * It frees the Master runtime handle and associated Slave(s) runtime |
| 1038 | * handle. If this is called first then sdw_release_slave_stream() will have |
| 1039 | * no effect as Slave(s) runtime handle would already be freed up. |
| 1040 | */ |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1041 | static void sdw_release_master_stream(struct sdw_master_runtime *m_rt, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1042 | struct sdw_stream_runtime *stream) |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1043 | { |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1044 | struct sdw_slave_runtime *s_rt, *_s_rt; |
| 1045 | |
Sanyog Kale | 8d6ccf5 | 2018-07-27 14:44:10 +0530 | [diff] [blame] | 1046 | list_for_each_entry_safe(s_rt, _s_rt, &m_rt->slave_rt_list, m_rt_node) { |
| 1047 | sdw_slave_port_release(s_rt->slave->bus, s_rt->slave, stream); |
| 1048 | sdw_release_slave_stream(s_rt->slave, stream); |
| 1049 | } |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1050 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1051 | list_del(&m_rt->stream_node); |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1052 | list_del(&m_rt->bus_node); |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1053 | kfree(m_rt); |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1054 | } |
| 1055 | |
| 1056 | /** |
| 1057 | * sdw_stream_remove_master() - Remove master from sdw_stream |
| 1058 | * |
| 1059 | * @bus: SDW Bus instance |
| 1060 | * @stream: SoundWire stream |
| 1061 | * |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 1062 | * This removes and frees port_rt and master_rt from a stream |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1063 | */ |
| 1064 | int sdw_stream_remove_master(struct sdw_bus *bus, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1065 | struct sdw_stream_runtime *stream) |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1066 | { |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1067 | struct sdw_master_runtime *m_rt, *_m_rt; |
| 1068 | |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1069 | mutex_lock(&bus->bus_lock); |
| 1070 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1071 | list_for_each_entry_safe(m_rt, _m_rt, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1072 | &stream->master_list, stream_node) { |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1073 | |
| 1074 | if (m_rt->bus != bus) |
| 1075 | continue; |
| 1076 | |
| 1077 | sdw_master_port_release(bus, m_rt); |
| 1078 | sdw_release_master_stream(m_rt, stream); |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 1079 | stream->m_rt_count--; |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1080 | } |
| 1081 | |
| 1082 | if (list_empty(&stream->master_list)) |
| 1083 | stream->state = SDW_STREAM_RELEASED; |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1084 | |
| 1085 | mutex_unlock(&bus->bus_lock); |
| 1086 | |
| 1087 | return 0; |
| 1088 | } |
| 1089 | EXPORT_SYMBOL(sdw_stream_remove_master); |
| 1090 | |
| 1091 | /** |
| 1092 | * sdw_stream_remove_slave() - Remove slave from sdw_stream |
| 1093 | * |
| 1094 | * @slave: SDW Slave instance |
| 1095 | * @stream: SoundWire stream |
| 1096 | * |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 1097 | * This removes and frees port_rt and slave_rt from a stream |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1098 | */ |
| 1099 | int sdw_stream_remove_slave(struct sdw_slave *slave, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1100 | struct sdw_stream_runtime *stream) |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1101 | { |
| 1102 | mutex_lock(&slave->bus->bus_lock); |
| 1103 | |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 1104 | sdw_slave_port_release(slave->bus, slave, stream); |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1105 | sdw_release_slave_stream(slave, stream); |
| 1106 | |
| 1107 | mutex_unlock(&slave->bus->bus_lock); |
| 1108 | |
| 1109 | return 0; |
| 1110 | } |
| 1111 | EXPORT_SYMBOL(sdw_stream_remove_slave); |
| 1112 | |
| 1113 | /** |
| 1114 | * sdw_config_stream() - Configure the allocated stream |
| 1115 | * |
| 1116 | * @dev: SDW device |
| 1117 | * @stream: SoundWire stream |
| 1118 | * @stream_config: Stream configuration for audio stream |
| 1119 | * @is_slave: is API called from Slave or Master |
| 1120 | * |
| 1121 | * This function is to be called with bus_lock held. |
| 1122 | */ |
| 1123 | static int sdw_config_stream(struct device *dev, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1124 | struct sdw_stream_runtime *stream, |
| 1125 | struct sdw_stream_config *stream_config, |
| 1126 | bool is_slave) |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1127 | { |
| 1128 | /* |
| 1129 | * Update the stream rate, channel and bps based on data |
| 1130 | * source. For more than one data source (multilink), |
| 1131 | * match the rate, bps, stream type and increment number of channels. |
| 1132 | * |
| 1133 | * If rate/bps is zero, it means the values are not set, so skip |
| 1134 | * comparison and allow the value to be set and stored in stream |
| 1135 | */ |
| 1136 | if (stream->params.rate && |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1137 | stream->params.rate != stream_config->frame_rate) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1138 | dev_err(dev, "rate not matching, stream:%s\n", stream->name); |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1139 | return -EINVAL; |
| 1140 | } |
| 1141 | |
| 1142 | if (stream->params.bps && |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1143 | stream->params.bps != stream_config->bps) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1144 | dev_err(dev, "bps not matching, stream:%s\n", stream->name); |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1145 | return -EINVAL; |
| 1146 | } |
| 1147 | |
| 1148 | stream->type = stream_config->type; |
| 1149 | stream->params.rate = stream_config->frame_rate; |
| 1150 | stream->params.bps = stream_config->bps; |
| 1151 | |
| 1152 | /* TODO: Update this check during Device-device support */ |
| 1153 | if (is_slave) |
| 1154 | stream->params.ch_count += stream_config->ch_count; |
| 1155 | |
| 1156 | return 0; |
| 1157 | } |
| 1158 | |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 1159 | static int sdw_is_valid_port_range(struct device *dev, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1160 | struct sdw_port_runtime *p_rt) |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 1161 | { |
| 1162 | if (!SDW_VALID_PORT_RANGE(p_rt->num)) { |
| 1163 | dev_err(dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1164 | "SoundWire: Invalid port number :%d\n", p_rt->num); |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 1165 | return -EINVAL; |
| 1166 | } |
| 1167 | |
| 1168 | return 0; |
| 1169 | } |
| 1170 | |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1171 | static struct sdw_port_runtime |
| 1172 | *sdw_port_alloc(struct device *dev, |
| 1173 | struct sdw_port_config *port_config, |
| 1174 | int port_index) |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 1175 | { |
| 1176 | struct sdw_port_runtime *p_rt; |
| 1177 | |
| 1178 | p_rt = kzalloc(sizeof(*p_rt), GFP_KERNEL); |
| 1179 | if (!p_rt) |
| 1180 | return NULL; |
| 1181 | |
| 1182 | p_rt->ch_mask = port_config[port_index].ch_mask; |
| 1183 | p_rt->num = port_config[port_index].num; |
| 1184 | |
| 1185 | return p_rt; |
| 1186 | } |
| 1187 | |
| 1188 | static int sdw_master_port_config(struct sdw_bus *bus, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1189 | struct sdw_master_runtime *m_rt, |
| 1190 | struct sdw_port_config *port_config, |
| 1191 | unsigned int num_ports) |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 1192 | { |
| 1193 | struct sdw_port_runtime *p_rt; |
| 1194 | int i; |
| 1195 | |
| 1196 | /* Iterate for number of ports to perform initialization */ |
| 1197 | for (i = 0; i < num_ports; i++) { |
| 1198 | p_rt = sdw_port_alloc(bus->dev, port_config, i); |
| 1199 | if (!p_rt) |
| 1200 | return -ENOMEM; |
| 1201 | |
| 1202 | /* |
| 1203 | * TODO: Check port capabilities for requested |
| 1204 | * configuration (audio mode support) |
| 1205 | */ |
| 1206 | |
| 1207 | list_add_tail(&p_rt->port_node, &m_rt->port_list); |
| 1208 | } |
| 1209 | |
| 1210 | return 0; |
| 1211 | } |
| 1212 | |
| 1213 | static int sdw_slave_port_config(struct sdw_slave *slave, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1214 | struct sdw_slave_runtime *s_rt, |
| 1215 | struct sdw_port_config *port_config, |
| 1216 | unsigned int num_config) |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 1217 | { |
| 1218 | struct sdw_port_runtime *p_rt; |
| 1219 | int i, ret; |
| 1220 | |
| 1221 | /* Iterate for number of ports to perform initialization */ |
| 1222 | for (i = 0; i < num_config; i++) { |
| 1223 | p_rt = sdw_port_alloc(&slave->dev, port_config, i); |
| 1224 | if (!p_rt) |
| 1225 | return -ENOMEM; |
| 1226 | |
| 1227 | /* |
| 1228 | * TODO: Check valid port range as defined by DisCo/ |
| 1229 | * slave |
| 1230 | */ |
| 1231 | ret = sdw_is_valid_port_range(&slave->dev, p_rt); |
| 1232 | if (ret < 0) { |
| 1233 | kfree(p_rt); |
| 1234 | return ret; |
| 1235 | } |
| 1236 | |
| 1237 | /* |
| 1238 | * TODO: Check port capabilities for requested |
| 1239 | * configuration (audio mode support) |
| 1240 | */ |
| 1241 | |
| 1242 | list_add_tail(&p_rt->port_node, &s_rt->port_list); |
| 1243 | } |
| 1244 | |
| 1245 | return 0; |
| 1246 | } |
| 1247 | |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1248 | /** |
| 1249 | * sdw_stream_add_master() - Allocate and add master runtime to a stream |
| 1250 | * |
| 1251 | * @bus: SDW Bus instance |
| 1252 | * @stream_config: Stream configuration for audio stream |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 1253 | * @port_config: Port configuration for audio stream |
| 1254 | * @num_ports: Number of ports |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1255 | * @stream: SoundWire stream |
| 1256 | */ |
| 1257 | int sdw_stream_add_master(struct sdw_bus *bus, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1258 | struct sdw_stream_config *stream_config, |
| 1259 | struct sdw_port_config *port_config, |
| 1260 | unsigned int num_ports, |
| 1261 | struct sdw_stream_runtime *stream) |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1262 | { |
| 1263 | struct sdw_master_runtime *m_rt = NULL; |
| 1264 | int ret; |
| 1265 | |
| 1266 | mutex_lock(&bus->bus_lock); |
| 1267 | |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 1268 | /* |
| 1269 | * For multi link streams, add the second master only if |
| 1270 | * the bus supports it. |
| 1271 | * Check if bus->multi_link is set |
| 1272 | */ |
| 1273 | if (!bus->multi_link && stream->m_rt_count > 0) { |
| 1274 | dev_err(bus->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1275 | "Multilink not supported, link %d\n", bus->link_id); |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 1276 | ret = -EINVAL; |
| 1277 | goto unlock; |
| 1278 | } |
| 1279 | |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1280 | m_rt = sdw_alloc_master_rt(bus, stream_config, stream); |
| 1281 | if (!m_rt) { |
| 1282 | dev_err(bus->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1283 | "Master runtime config failed for stream:%s\n", |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1284 | stream->name); |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1285 | ret = -ENOMEM; |
Shreyas NC | 3fef1a2 | 2018-07-27 14:44:09 +0530 | [diff] [blame] | 1286 | goto unlock; |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1287 | } |
| 1288 | |
| 1289 | ret = sdw_config_stream(bus->dev, stream, stream_config, false); |
| 1290 | if (ret) |
| 1291 | goto stream_error; |
| 1292 | |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 1293 | ret = sdw_master_port_config(bus, m_rt, port_config, num_ports); |
| 1294 | if (ret) |
| 1295 | goto stream_error; |
| 1296 | |
Shreyas NC | ce6e74d | 2018-07-27 14:44:16 +0530 | [diff] [blame] | 1297 | stream->m_rt_count++; |
| 1298 | |
Shreyas NC | 3fef1a2 | 2018-07-27 14:44:09 +0530 | [diff] [blame] | 1299 | goto unlock; |
| 1300 | |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1301 | stream_error: |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1302 | sdw_release_master_stream(m_rt, stream); |
Shreyas NC | 3fef1a2 | 2018-07-27 14:44:09 +0530 | [diff] [blame] | 1303 | unlock: |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1304 | mutex_unlock(&bus->bus_lock); |
| 1305 | return ret; |
| 1306 | } |
| 1307 | EXPORT_SYMBOL(sdw_stream_add_master); |
| 1308 | |
| 1309 | /** |
| 1310 | * sdw_stream_add_slave() - Allocate and add master/slave runtime to a stream |
| 1311 | * |
| 1312 | * @slave: SDW Slave instance |
| 1313 | * @stream_config: Stream configuration for audio stream |
| 1314 | * @stream: SoundWire stream |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 1315 | * @port_config: Port configuration for audio stream |
| 1316 | * @num_ports: Number of ports |
Shreyas NC | 0aebe40 | 2018-07-27 14:44:08 +0530 | [diff] [blame] | 1317 | * |
| 1318 | * It is expected that Slave is added before adding Master |
| 1319 | * to the Stream. |
| 1320 | * |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1321 | */ |
| 1322 | int sdw_stream_add_slave(struct sdw_slave *slave, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1323 | struct sdw_stream_config *stream_config, |
| 1324 | struct sdw_port_config *port_config, |
| 1325 | unsigned int num_ports, |
| 1326 | struct sdw_stream_runtime *stream) |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1327 | { |
| 1328 | struct sdw_slave_runtime *s_rt; |
| 1329 | struct sdw_master_runtime *m_rt; |
| 1330 | int ret; |
| 1331 | |
| 1332 | mutex_lock(&slave->bus->bus_lock); |
| 1333 | |
| 1334 | /* |
| 1335 | * If this API is invoked by Slave first then m_rt is not valid. |
| 1336 | * So, allocate m_rt and add Slave to it. |
| 1337 | */ |
| 1338 | m_rt = sdw_alloc_master_rt(slave->bus, stream_config, stream); |
| 1339 | if (!m_rt) { |
| 1340 | dev_err(&slave->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1341 | "alloc master runtime failed for stream:%s\n", |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1342 | stream->name); |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1343 | ret = -ENOMEM; |
| 1344 | goto error; |
| 1345 | } |
| 1346 | |
| 1347 | s_rt = sdw_alloc_slave_rt(slave, stream_config, stream); |
| 1348 | if (!s_rt) { |
| 1349 | dev_err(&slave->dev, |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1350 | "Slave runtime config failed for stream:%s\n", |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1351 | stream->name); |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1352 | ret = -ENOMEM; |
| 1353 | goto stream_error; |
| 1354 | } |
| 1355 | |
| 1356 | ret = sdw_config_stream(&slave->dev, stream, stream_config, true); |
| 1357 | if (ret) |
| 1358 | goto stream_error; |
| 1359 | |
| 1360 | list_add_tail(&s_rt->m_rt_node, &m_rt->slave_rt_list); |
| 1361 | |
Sanyog Kale | bbe7379 | 2018-04-26 18:38:13 +0530 | [diff] [blame] | 1362 | ret = sdw_slave_port_config(slave, s_rt, port_config, num_ports); |
| 1363 | if (ret) |
| 1364 | goto stream_error; |
| 1365 | |
Shreyas NC | 0aebe40 | 2018-07-27 14:44:08 +0530 | [diff] [blame] | 1366 | /* |
| 1367 | * Change stream state to CONFIGURED on first Slave add. |
| 1368 | * Bus is not aware of number of Slave(s) in a stream at this |
| 1369 | * point so cannot depend on all Slave(s) to be added in order to |
| 1370 | * change stream state to CONFIGURED. |
| 1371 | */ |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1372 | stream->state = SDW_STREAM_CONFIGURED; |
| 1373 | goto error; |
| 1374 | |
| 1375 | stream_error: |
| 1376 | /* |
| 1377 | * we hit error so cleanup the stream, release all Slave(s) and |
| 1378 | * Master runtime |
| 1379 | */ |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1380 | sdw_release_master_stream(m_rt, stream); |
Sanyog Kale | 89e5905 | 2018-04-26 18:38:08 +0530 | [diff] [blame] | 1381 | error: |
| 1382 | mutex_unlock(&slave->bus->bus_lock); |
| 1383 | return ret; |
| 1384 | } |
| 1385 | EXPORT_SYMBOL(sdw_stream_add_slave); |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 1386 | |
| 1387 | /** |
| 1388 | * sdw_get_slave_dpn_prop() - Get Slave port capabilities |
| 1389 | * |
| 1390 | * @slave: Slave handle |
| 1391 | * @direction: Data direction. |
| 1392 | * @port_num: Port number |
| 1393 | */ |
| 1394 | struct sdw_dpn_prop *sdw_get_slave_dpn_prop(struct sdw_slave *slave, |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1395 | enum sdw_data_direction direction, |
| 1396 | unsigned int port_num) |
Sanyog Kale | f8101c7 | 2018-04-26 18:38:17 +0530 | [diff] [blame] | 1397 | { |
| 1398 | struct sdw_dpn_prop *dpn_prop; |
| 1399 | u8 num_ports; |
| 1400 | int i; |
| 1401 | |
| 1402 | if (direction == SDW_DATA_DIR_TX) { |
| 1403 | num_ports = hweight32(slave->prop.source_ports); |
| 1404 | dpn_prop = slave->prop.src_dpn_prop; |
| 1405 | } else { |
| 1406 | num_ports = hweight32(slave->prop.sink_ports); |
| 1407 | dpn_prop = slave->prop.sink_dpn_prop; |
| 1408 | } |
| 1409 | |
| 1410 | for (i = 0; i < num_ports; i++) { |
| 1411 | dpn_prop = &dpn_prop[i]; |
| 1412 | |
| 1413 | if (dpn_prop->num == port_num) |
| 1414 | return &dpn_prop[i]; |
| 1415 | } |
| 1416 | |
| 1417 | return NULL; |
| 1418 | } |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1419 | |
Sanyog Kale | 0c4a104 | 2018-07-27 14:44:13 +0530 | [diff] [blame] | 1420 | /** |
| 1421 | * sdw_acquire_bus_lock: Acquire bus lock for all Master runtime(s) |
| 1422 | * |
| 1423 | * @stream: SoundWire stream |
| 1424 | * |
| 1425 | * Acquire bus_lock for each of the master runtime(m_rt) part of this |
| 1426 | * stream to reconfigure the bus. |
| 1427 | * NOTE: This function is called from SoundWire stream ops and is |
| 1428 | * expected that a global lock is held before acquiring bus_lock. |
| 1429 | */ |
| 1430 | static void sdw_acquire_bus_lock(struct sdw_stream_runtime *stream) |
| 1431 | { |
| 1432 | struct sdw_master_runtime *m_rt = NULL; |
| 1433 | struct sdw_bus *bus = NULL; |
| 1434 | |
| 1435 | /* Iterate for all Master(s) in Master list */ |
| 1436 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
| 1437 | bus = m_rt->bus; |
| 1438 | |
| 1439 | mutex_lock(&bus->bus_lock); |
| 1440 | } |
| 1441 | } |
| 1442 | |
| 1443 | /** |
| 1444 | * sdw_release_bus_lock: Release bus lock for all Master runtime(s) |
| 1445 | * |
| 1446 | * @stream: SoundWire stream |
| 1447 | * |
| 1448 | * Release the previously held bus_lock after reconfiguring the bus. |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1449 | * NOTE: This function is called from SoundWire stream ops and is |
| 1450 | * expected that a global lock is held before releasing bus_lock. |
Sanyog Kale | 0c4a104 | 2018-07-27 14:44:13 +0530 | [diff] [blame] | 1451 | */ |
| 1452 | static void sdw_release_bus_lock(struct sdw_stream_runtime *stream) |
| 1453 | { |
| 1454 | struct sdw_master_runtime *m_rt = NULL; |
| 1455 | struct sdw_bus *bus = NULL; |
| 1456 | |
| 1457 | /* Iterate for all Master(s) in Master list */ |
| 1458 | list_for_each_entry_reverse(m_rt, &stream->master_list, stream_node) { |
| 1459 | bus = m_rt->bus; |
| 1460 | mutex_unlock(&bus->bus_lock); |
| 1461 | } |
| 1462 | } |
| 1463 | |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1464 | static int _sdw_prepare_stream(struct sdw_stream_runtime *stream) |
| 1465 | { |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1466 | struct sdw_master_runtime *m_rt = NULL; |
| 1467 | struct sdw_bus *bus = NULL; |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1468 | struct sdw_master_prop *prop = NULL; |
| 1469 | struct sdw_bus_params params; |
| 1470 | int ret; |
| 1471 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1472 | /* Prepare Master(s) and Slave(s) port(s) associated with stream */ |
| 1473 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
| 1474 | bus = m_rt->bus; |
| 1475 | prop = &bus->prop; |
| 1476 | memcpy(¶ms, &bus->params, sizeof(params)); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1477 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1478 | /* TODO: Support Asynchronous mode */ |
| 1479 | if ((prop->max_freq % stream->params.rate) != 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1480 | dev_err(bus->dev, "Async mode not supported\n"); |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1481 | return -EINVAL; |
| 1482 | } |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1483 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1484 | /* Increment cumulative bus bandwidth */ |
| 1485 | /* TODO: Update this during Device-Device support */ |
| 1486 | bus->params.bandwidth += m_rt->stream->params.rate * |
| 1487 | m_rt->ch_count * m_rt->stream->params.bps; |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1488 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1489 | /* Program params */ |
| 1490 | ret = sdw_program_params(bus); |
| 1491 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1492 | dev_err(bus->dev, "Program params failed: %d\n", ret); |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1493 | goto restore_params; |
| 1494 | } |
| 1495 | |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1496 | } |
| 1497 | |
| 1498 | ret = do_bank_switch(stream); |
| 1499 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1500 | dev_err(bus->dev, "Bank switch failed: %d\n", ret); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1501 | goto restore_params; |
| 1502 | } |
| 1503 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1504 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
| 1505 | bus = m_rt->bus; |
| 1506 | |
| 1507 | /* Prepare port(s) on the new clock configuration */ |
| 1508 | ret = sdw_prep_deprep_ports(m_rt, true); |
| 1509 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1510 | dev_err(bus->dev, "Prepare port(s) failed ret = %d\n", |
Pierre-Louis Bossart | 1fe74a5e | 2019-05-01 10:57:35 -0500 | [diff] [blame] | 1511 | ret); |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1512 | return ret; |
| 1513 | } |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1514 | } |
| 1515 | |
| 1516 | stream->state = SDW_STREAM_PREPARED; |
| 1517 | |
| 1518 | return ret; |
| 1519 | |
| 1520 | restore_params: |
| 1521 | memcpy(&bus->params, ¶ms, sizeof(params)); |
| 1522 | return ret; |
| 1523 | } |
| 1524 | |
| 1525 | /** |
| 1526 | * sdw_prepare_stream() - Prepare SoundWire stream |
| 1527 | * |
| 1528 | * @stream: Soundwire stream |
| 1529 | * |
Mauro Carvalho Chehab | 34962fb | 2018-05-08 15:14:57 -0300 | [diff] [blame] | 1530 | * Documentation/driver-api/soundwire/stream.rst explains this API in detail |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1531 | */ |
| 1532 | int sdw_prepare_stream(struct sdw_stream_runtime *stream) |
| 1533 | { |
| 1534 | int ret = 0; |
| 1535 | |
| 1536 | if (!stream) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1537 | pr_err("SoundWire: Handle not found for stream\n"); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1538 | return -EINVAL; |
| 1539 | } |
| 1540 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1541 | sdw_acquire_bus_lock(stream); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1542 | |
| 1543 | ret = _sdw_prepare_stream(stream); |
| 1544 | if (ret < 0) |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1545 | pr_err("Prepare for stream:%s failed: %d\n", stream->name, ret); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1546 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1547 | sdw_release_bus_lock(stream); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1548 | return ret; |
| 1549 | } |
| 1550 | EXPORT_SYMBOL(sdw_prepare_stream); |
| 1551 | |
| 1552 | static int _sdw_enable_stream(struct sdw_stream_runtime *stream) |
| 1553 | { |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1554 | struct sdw_master_runtime *m_rt = NULL; |
| 1555 | struct sdw_bus *bus = NULL; |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1556 | int ret; |
| 1557 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1558 | /* Enable Master(s) and Slave(s) port(s) associated with stream */ |
| 1559 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
| 1560 | bus = m_rt->bus; |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1561 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1562 | /* Program params */ |
| 1563 | ret = sdw_program_params(bus); |
| 1564 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1565 | dev_err(bus->dev, "Program params failed: %d\n", ret); |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1566 | return ret; |
| 1567 | } |
| 1568 | |
| 1569 | /* Enable port(s) */ |
| 1570 | ret = sdw_enable_disable_ports(m_rt, true); |
| 1571 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1572 | dev_err(bus->dev, "Enable port(s) failed ret: %d\n", ret); |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1573 | return ret; |
| 1574 | } |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1575 | } |
| 1576 | |
| 1577 | ret = do_bank_switch(stream); |
| 1578 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1579 | dev_err(bus->dev, "Bank switch failed: %d\n", ret); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1580 | return ret; |
| 1581 | } |
| 1582 | |
| 1583 | stream->state = SDW_STREAM_ENABLED; |
| 1584 | return 0; |
| 1585 | } |
| 1586 | |
| 1587 | /** |
| 1588 | * sdw_enable_stream() - Enable SoundWire stream |
| 1589 | * |
| 1590 | * @stream: Soundwire stream |
| 1591 | * |
Mauro Carvalho Chehab | 34962fb | 2018-05-08 15:14:57 -0300 | [diff] [blame] | 1592 | * Documentation/driver-api/soundwire/stream.rst explains this API in detail |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1593 | */ |
| 1594 | int sdw_enable_stream(struct sdw_stream_runtime *stream) |
| 1595 | { |
| 1596 | int ret = 0; |
| 1597 | |
| 1598 | if (!stream) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1599 | pr_err("SoundWire: Handle not found for stream\n"); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1600 | return -EINVAL; |
| 1601 | } |
| 1602 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1603 | sdw_acquire_bus_lock(stream); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1604 | |
| 1605 | ret = _sdw_enable_stream(stream); |
| 1606 | if (ret < 0) |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1607 | pr_err("Enable for stream:%s failed: %d\n", stream->name, ret); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1608 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1609 | sdw_release_bus_lock(stream); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1610 | return ret; |
| 1611 | } |
| 1612 | EXPORT_SYMBOL(sdw_enable_stream); |
| 1613 | |
| 1614 | static int _sdw_disable_stream(struct sdw_stream_runtime *stream) |
| 1615 | { |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1616 | struct sdw_master_runtime *m_rt = NULL; |
| 1617 | struct sdw_bus *bus = NULL; |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1618 | int ret; |
| 1619 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1620 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
| 1621 | bus = m_rt->bus; |
| 1622 | /* Disable port(s) */ |
| 1623 | ret = sdw_enable_disable_ports(m_rt, false); |
| 1624 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1625 | dev_err(bus->dev, "Disable port(s) failed: %d\n", ret); |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1626 | return ret; |
| 1627 | } |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1628 | } |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1629 | stream->state = SDW_STREAM_DISABLED; |
| 1630 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1631 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
| 1632 | bus = m_rt->bus; |
| 1633 | /* Program params */ |
| 1634 | ret = sdw_program_params(bus); |
| 1635 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1636 | dev_err(bus->dev, "Program params failed: %d\n", ret); |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1637 | return ret; |
| 1638 | } |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1639 | } |
| 1640 | |
| 1641 | return do_bank_switch(stream); |
| 1642 | } |
| 1643 | |
| 1644 | /** |
| 1645 | * sdw_disable_stream() - Disable SoundWire stream |
| 1646 | * |
| 1647 | * @stream: Soundwire stream |
| 1648 | * |
Mauro Carvalho Chehab | 34962fb | 2018-05-08 15:14:57 -0300 | [diff] [blame] | 1649 | * Documentation/driver-api/soundwire/stream.rst explains this API in detail |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1650 | */ |
| 1651 | int sdw_disable_stream(struct sdw_stream_runtime *stream) |
| 1652 | { |
| 1653 | int ret = 0; |
| 1654 | |
| 1655 | if (!stream) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1656 | pr_err("SoundWire: Handle not found for stream\n"); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1657 | return -EINVAL; |
| 1658 | } |
| 1659 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1660 | sdw_acquire_bus_lock(stream); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1661 | |
| 1662 | ret = _sdw_disable_stream(stream); |
| 1663 | if (ret < 0) |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1664 | pr_err("Disable for stream:%s failed: %d\n", stream->name, ret); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1665 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1666 | sdw_release_bus_lock(stream); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1667 | return ret; |
| 1668 | } |
| 1669 | EXPORT_SYMBOL(sdw_disable_stream); |
| 1670 | |
| 1671 | static int _sdw_deprepare_stream(struct sdw_stream_runtime *stream) |
| 1672 | { |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1673 | struct sdw_master_runtime *m_rt = NULL; |
| 1674 | struct sdw_bus *bus = NULL; |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1675 | int ret = 0; |
| 1676 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1677 | list_for_each_entry(m_rt, &stream->master_list, stream_node) { |
| 1678 | bus = m_rt->bus; |
| 1679 | /* De-prepare port(s) */ |
| 1680 | ret = sdw_prep_deprep_ports(m_rt, false); |
| 1681 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1682 | dev_err(bus->dev, "De-prepare port(s) failed: %d\n", ret); |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1683 | return ret; |
| 1684 | } |
| 1685 | |
| 1686 | /* TODO: Update this during Device-Device support */ |
| 1687 | bus->params.bandwidth -= m_rt->stream->params.rate * |
| 1688 | m_rt->ch_count * m_rt->stream->params.bps; |
| 1689 | |
| 1690 | /* Program params */ |
| 1691 | ret = sdw_program_params(bus); |
| 1692 | if (ret < 0) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1693 | dev_err(bus->dev, "Program params failed: %d\n", ret); |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1694 | return ret; |
| 1695 | } |
| 1696 | |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1697 | } |
| 1698 | |
| 1699 | stream->state = SDW_STREAM_DEPREPARED; |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1700 | return do_bank_switch(stream); |
| 1701 | } |
| 1702 | |
| 1703 | /** |
| 1704 | * sdw_deprepare_stream() - Deprepare SoundWire stream |
| 1705 | * |
| 1706 | * @stream: Soundwire stream |
| 1707 | * |
Mauro Carvalho Chehab | 34962fb | 2018-05-08 15:14:57 -0300 | [diff] [blame] | 1708 | * Documentation/driver-api/soundwire/stream.rst explains this API in detail |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1709 | */ |
| 1710 | int sdw_deprepare_stream(struct sdw_stream_runtime *stream) |
| 1711 | { |
| 1712 | int ret = 0; |
| 1713 | |
| 1714 | if (!stream) { |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1715 | pr_err("SoundWire: Handle not found for stream\n"); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1716 | return -EINVAL; |
| 1717 | } |
| 1718 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1719 | sdw_acquire_bus_lock(stream); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1720 | ret = _sdw_deprepare_stream(stream); |
| 1721 | if (ret < 0) |
Pierre-Louis Bossart | 17ed5be | 2019-05-01 10:57:45 -0500 | [diff] [blame^] | 1722 | pr_err("De-prepare for stream:%d failed: %d\n", ret, ret); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1723 | |
Vinod Koul | 4894972 | 2018-07-27 14:44:14 +0530 | [diff] [blame] | 1724 | sdw_release_bus_lock(stream); |
Sanyog Kale | 5c3eb9f | 2018-04-26 18:38:33 +0530 | [diff] [blame] | 1725 | return ret; |
| 1726 | } |
| 1727 | EXPORT_SYMBOL(sdw_deprepare_stream); |