blob: 37290a799023cb379f06c191d03057e7a8d9409c [file] [log] [blame]
Sanyog Kale89e59052018-04-26 18:38:08 +05301// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2// Copyright(c) 2015-18 Intel Corporation.
3
4/*
5 * stream.c - SoundWire Bus stream operations.
6 */
7
8#include <linux/delay.h>
9#include <linux/device.h>
10#include <linux/init.h>
11#include <linux/module.h>
12#include <linux/mod_devicetable.h>
13#include <linux/slab.h>
Sanyog Kalef8101c72018-04-26 18:38:17 +053014#include <linux/soundwire/sdw_registers.h>
Sanyog Kale89e59052018-04-26 18:38:08 +053015#include <linux/soundwire/sdw.h>
Pierre-Louis Bossart45505692020-07-01 02:43:53 +080016#include <sound/soc.h>
Sanyog Kale89e59052018-04-26 18:38:08 +053017#include "bus.h"
18
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053019/*
20 * Array of supported rows and columns as per MIPI SoundWire Specification 1.1
21 *
22 * The rows are arranged as per the array index value programmed
23 * in register. The index 15 has dummy value 0 in order to fill hole.
24 */
Pierre-Louis Bossartfe4b70f2019-08-05 19:55:10 -050025int sdw_rows[SDW_FRAME_ROWS] = {48, 50, 60, 64, 75, 80, 125, 147,
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053026 96, 100, 120, 128, 150, 160, 250, 0,
27 192, 200, 240, 256, 72, 144, 90, 180};
28
Pierre-Louis Bossartfe4b70f2019-08-05 19:55:10 -050029int sdw_cols[SDW_FRAME_COLS] = {2, 4, 6, 8, 10, 12, 14, 16};
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053030
Pierre-Louis Bossartfe4b70f2019-08-05 19:55:10 -050031int sdw_find_col_index(int col)
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053032{
33 int i;
34
35 for (i = 0; i < SDW_FRAME_COLS; i++) {
Pierre-Louis Bossartfe4b70f2019-08-05 19:55:10 -050036 if (sdw_cols[i] == col)
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053037 return i;
38 }
39
40 pr_warn("Requested column not found, selecting lowest column no: 2\n");
41 return 0;
42}
Pierre-Louis Bossartfe4b70f2019-08-05 19:55:10 -050043EXPORT_SYMBOL(sdw_find_col_index);
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053044
Pierre-Louis Bossartfe4b70f2019-08-05 19:55:10 -050045int sdw_find_row_index(int row)
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053046{
47 int i;
48
49 for (i = 0; i < SDW_FRAME_ROWS; i++) {
Pierre-Louis Bossartfe4b70f2019-08-05 19:55:10 -050050 if (sdw_rows[i] == row)
Sanyog Kale99b8a5d2018-04-26 18:38:28 +053051 return i;
52 }
53
54 pr_warn("Requested row not found, selecting lowest row no: 48\n");
55 return 0;
56}
Pierre-Louis Bossartfe4b70f2019-08-05 19:55:10 -050057EXPORT_SYMBOL(sdw_find_row_index);
Vinod Koul897fe402019-05-02 16:29:29 +053058
Sanyog Kalef8101c72018-04-26 18:38:17 +053059static int _sdw_program_slave_port_params(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -050060 struct sdw_slave *slave,
61 struct sdw_transport_params *t_params,
62 enum sdw_dpn_type type)
Sanyog Kalef8101c72018-04-26 18:38:17 +053063{
64 u32 addr1, addr2, addr3, addr4;
65 int ret;
66 u16 wbuf;
67
68 if (bus->params.next_bank) {
69 addr1 = SDW_DPN_OFFSETCTRL2_B1(t_params->port_num);
70 addr2 = SDW_DPN_BLOCKCTRL3_B1(t_params->port_num);
71 addr3 = SDW_DPN_SAMPLECTRL2_B1(t_params->port_num);
72 addr4 = SDW_DPN_HCTRL_B1(t_params->port_num);
73 } else {
74 addr1 = SDW_DPN_OFFSETCTRL2_B0(t_params->port_num);
75 addr2 = SDW_DPN_BLOCKCTRL3_B0(t_params->port_num);
76 addr3 = SDW_DPN_SAMPLECTRL2_B0(t_params->port_num);
77 addr4 = SDW_DPN_HCTRL_B0(t_params->port_num);
78 }
79
80 /* Program DPN_OffsetCtrl2 registers */
81 ret = sdw_write(slave, addr1, t_params->offset2);
82 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -050083 dev_err(bus->dev, "DPN_OffsetCtrl2 register write failed\n");
Sanyog Kalef8101c72018-04-26 18:38:17 +053084 return ret;
85 }
86
87 /* Program DPN_BlockCtrl3 register */
88 ret = sdw_write(slave, addr2, t_params->blk_pkg_mode);
89 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -050090 dev_err(bus->dev, "DPN_BlockCtrl3 register write failed\n");
Sanyog Kalef8101c72018-04-26 18:38:17 +053091 return ret;
92 }
93
94 /*
95 * Data ports are FULL, SIMPLE and REDUCED. This function handles
Vinod Koul7d3b3cd2019-05-02 16:29:27 +053096 * FULL and REDUCED only and beyond this point only FULL is
Sanyog Kalef8101c72018-04-26 18:38:17 +053097 * handled, so bail out if we are not FULL data port type
98 */
99 if (type != SDW_DPN_FULL)
100 return ret;
101
102 /* Program DPN_SampleCtrl2 register */
103 wbuf = (t_params->sample_interval - 1);
104 wbuf &= SDW_DPN_SAMPLECTRL_HIGH;
105 wbuf >>= SDW_REG_SHIFT(SDW_DPN_SAMPLECTRL_HIGH);
106
107 ret = sdw_write(slave, addr3, wbuf);
108 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500109 dev_err(bus->dev, "DPN_SampleCtrl2 register write failed\n");
Sanyog Kalef8101c72018-04-26 18:38:17 +0530110 return ret;
111 }
112
113 /* Program DPN_HCtrl register */
114 wbuf = t_params->hstart;
115 wbuf <<= SDW_REG_SHIFT(SDW_DPN_HCTRL_HSTART);
116 wbuf |= t_params->hstop;
117
118 ret = sdw_write(slave, addr4, wbuf);
119 if (ret < 0)
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500120 dev_err(bus->dev, "DPN_HCtrl register write failed\n");
Sanyog Kalef8101c72018-04-26 18:38:17 +0530121
122 return ret;
123}
124
125static int sdw_program_slave_port_params(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500126 struct sdw_slave_runtime *s_rt,
127 struct sdw_port_runtime *p_rt)
Sanyog Kalef8101c72018-04-26 18:38:17 +0530128{
129 struct sdw_transport_params *t_params = &p_rt->transport_params;
130 struct sdw_port_params *p_params = &p_rt->port_params;
131 struct sdw_slave_prop *slave_prop = &s_rt->slave->prop;
132 u32 addr1, addr2, addr3, addr4, addr5, addr6;
133 struct sdw_dpn_prop *dpn_prop;
134 int ret;
135 u8 wbuf;
136
137 dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500138 s_rt->direction,
139 t_params->port_num);
Sanyog Kalef8101c72018-04-26 18:38:17 +0530140 if (!dpn_prop)
141 return -EINVAL;
142
143 addr1 = SDW_DPN_PORTCTRL(t_params->port_num);
144 addr2 = SDW_DPN_BLOCKCTRL1(t_params->port_num);
145
146 if (bus->params.next_bank) {
147 addr3 = SDW_DPN_SAMPLECTRL1_B1(t_params->port_num);
148 addr4 = SDW_DPN_OFFSETCTRL1_B1(t_params->port_num);
149 addr5 = SDW_DPN_BLOCKCTRL2_B1(t_params->port_num);
150 addr6 = SDW_DPN_LANECTRL_B1(t_params->port_num);
151
152 } else {
153 addr3 = SDW_DPN_SAMPLECTRL1_B0(t_params->port_num);
154 addr4 = SDW_DPN_OFFSETCTRL1_B0(t_params->port_num);
155 addr5 = SDW_DPN_BLOCKCTRL2_B0(t_params->port_num);
156 addr6 = SDW_DPN_LANECTRL_B0(t_params->port_num);
157 }
158
159 /* Program DPN_PortCtrl register */
160 wbuf = p_params->data_mode << SDW_REG_SHIFT(SDW_DPN_PORTCTRL_DATAMODE);
161 wbuf |= p_params->flow_mode;
162
163 ret = sdw_update(s_rt->slave, addr1, 0xF, wbuf);
164 if (ret < 0) {
165 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500166 "DPN_PortCtrl register write failed for port %d\n",
Sanyog Kalef8101c72018-04-26 18:38:17 +0530167 t_params->port_num);
168 return ret;
169 }
170
Srinivas Kandagatlaa9107de2020-03-11 11:35:44 +0000171 if (!dpn_prop->read_only_wordlength) {
172 /* Program DPN_BlockCtrl1 register */
173 ret = sdw_write(s_rt->slave, addr2, (p_params->bps - 1));
174 if (ret < 0) {
175 dev_err(&s_rt->slave->dev,
176 "DPN_BlockCtrl1 register write failed for port %d\n",
177 t_params->port_num);
178 return ret;
179 }
Sanyog Kalef8101c72018-04-26 18:38:17 +0530180 }
181
182 /* Program DPN_SampleCtrl1 register */
183 wbuf = (t_params->sample_interval - 1) & SDW_DPN_SAMPLECTRL_LOW;
184 ret = sdw_write(s_rt->slave, addr3, wbuf);
185 if (ret < 0) {
186 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500187 "DPN_SampleCtrl1 register write failed for port %d\n",
Sanyog Kalef8101c72018-04-26 18:38:17 +0530188 t_params->port_num);
189 return ret;
190 }
191
192 /* Program DPN_OffsetCtrl1 registers */
193 ret = sdw_write(s_rt->slave, addr4, t_params->offset1);
194 if (ret < 0) {
195 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500196 "DPN_OffsetCtrl1 register write failed for port %d\n",
Sanyog Kalef8101c72018-04-26 18:38:17 +0530197 t_params->port_num);
198 return ret;
199 }
200
201 /* Program DPN_BlockCtrl2 register*/
202 if (t_params->blk_grp_ctrl_valid) {
203 ret = sdw_write(s_rt->slave, addr5, t_params->blk_grp_ctrl);
204 if (ret < 0) {
205 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500206 "DPN_BlockCtrl2 reg write failed for port %d\n",
Sanyog Kalef8101c72018-04-26 18:38:17 +0530207 t_params->port_num);
208 return ret;
209 }
210 }
211
212 /* program DPN_LaneCtrl register */
213 if (slave_prop->lane_control_support) {
214 ret = sdw_write(s_rt->slave, addr6, t_params->lane_ctrl);
215 if (ret < 0) {
216 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500217 "DPN_LaneCtrl register write failed for port %d\n",
Sanyog Kalef8101c72018-04-26 18:38:17 +0530218 t_params->port_num);
219 return ret;
220 }
221 }
222
223 if (dpn_prop->type != SDW_DPN_SIMPLE) {
224 ret = _sdw_program_slave_port_params(bus, s_rt->slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500225 t_params, dpn_prop->type);
Sanyog Kalef8101c72018-04-26 18:38:17 +0530226 if (ret < 0)
227 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500228 "Transport reg write failed for port: %d\n",
Sanyog Kalef8101c72018-04-26 18:38:17 +0530229 t_params->port_num);
230 }
231
232 return ret;
233}
234
235static int sdw_program_master_port_params(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500236 struct sdw_port_runtime *p_rt)
Sanyog Kalef8101c72018-04-26 18:38:17 +0530237{
238 int ret;
239
240 /*
241 * we need to set transport and port parameters for the port.
Vinod Koul7d3b3cd2019-05-02 16:29:27 +0530242 * Transport parameters refers to the sample interval, offsets and
Sanyog Kalef8101c72018-04-26 18:38:17 +0530243 * hstart/stop etc of the data. Port parameters refers to word
244 * length, flow mode etc of the port
245 */
246 ret = bus->port_ops->dpn_set_port_transport_params(bus,
247 &p_rt->transport_params,
248 bus->params.next_bank);
249 if (ret < 0)
250 return ret;
251
252 return bus->port_ops->dpn_set_port_params(bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500253 &p_rt->port_params,
254 bus->params.next_bank);
Sanyog Kalef8101c72018-04-26 18:38:17 +0530255}
256
257/**
258 * sdw_program_port_params() - Programs transport parameters of Master(s)
259 * and Slave(s)
260 *
261 * @m_rt: Master stream runtime
262 */
263static int sdw_program_port_params(struct sdw_master_runtime *m_rt)
264{
265 struct sdw_slave_runtime *s_rt = NULL;
266 struct sdw_bus *bus = m_rt->bus;
267 struct sdw_port_runtime *p_rt;
268 int ret = 0;
269
270 /* Program transport & port parameters for Slave(s) */
271 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
272 list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
273 ret = sdw_program_slave_port_params(bus, s_rt, p_rt);
274 if (ret < 0)
275 return ret;
276 }
277 }
278
279 /* Program transport & port parameters for Master(s) */
280 list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
281 ret = sdw_program_master_port_params(bus, p_rt);
282 if (ret < 0)
283 return ret;
284 }
285
286 return 0;
287}
288
Sanyog Kale89e59052018-04-26 18:38:08 +0530289/**
Sanyog Kale79df15b2018-04-26 18:38:23 +0530290 * sdw_enable_disable_slave_ports: Enable/disable slave data port
291 *
292 * @bus: bus instance
293 * @s_rt: slave runtime
294 * @p_rt: port runtime
295 * @en: enable or disable operation
296 *
297 * This function only sets the enable/disable bits in the relevant bank, the
298 * actual enable/disable is done with a bank switch
299 */
300static int sdw_enable_disable_slave_ports(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500301 struct sdw_slave_runtime *s_rt,
302 struct sdw_port_runtime *p_rt,
303 bool en)
Sanyog Kale79df15b2018-04-26 18:38:23 +0530304{
305 struct sdw_transport_params *t_params = &p_rt->transport_params;
306 u32 addr;
307 int ret;
308
309 if (bus->params.next_bank)
310 addr = SDW_DPN_CHANNELEN_B1(p_rt->num);
311 else
312 addr = SDW_DPN_CHANNELEN_B0(p_rt->num);
313
314 /*
315 * Since bus doesn't support sharing a port across two streams,
316 * it is safe to reset this register
317 */
318 if (en)
Srinivas Kandagatla0b43fef2020-03-12 10:01:05 +0000319 ret = sdw_write(s_rt->slave, addr, p_rt->ch_mask);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530320 else
Srinivas Kandagatla0b43fef2020-03-12 10:01:05 +0000321 ret = sdw_write(s_rt->slave, addr, 0x0);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530322
323 if (ret < 0)
324 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500325 "Slave chn_en reg write failed:%d port:%d\n",
Sanyog Kale79df15b2018-04-26 18:38:23 +0530326 ret, t_params->port_num);
327
328 return ret;
329}
330
331static int sdw_enable_disable_master_ports(struct sdw_master_runtime *m_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500332 struct sdw_port_runtime *p_rt,
333 bool en)
Sanyog Kale79df15b2018-04-26 18:38:23 +0530334{
335 struct sdw_transport_params *t_params = &p_rt->transport_params;
336 struct sdw_bus *bus = m_rt->bus;
337 struct sdw_enable_ch enable_ch;
Pierre-Louis Bossarta25eab22019-04-10 22:17:00 -0500338 int ret;
Sanyog Kale79df15b2018-04-26 18:38:23 +0530339
340 enable_ch.port_num = p_rt->num;
341 enable_ch.ch_mask = p_rt->ch_mask;
342 enable_ch.enable = en;
343
344 /* Perform Master port channel(s) enable/disable */
345 if (bus->port_ops->dpn_port_enable_ch) {
346 ret = bus->port_ops->dpn_port_enable_ch(bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500347 &enable_ch,
348 bus->params.next_bank);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530349 if (ret < 0) {
350 dev_err(bus->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500351 "Master chn_en write failed:%d port:%d\n",
Sanyog Kale79df15b2018-04-26 18:38:23 +0530352 ret, t_params->port_num);
353 return ret;
354 }
355 } else {
356 dev_err(bus->dev,
357 "dpn_port_enable_ch not supported, %s failed\n",
358 en ? "enable" : "disable");
359 return -EINVAL;
360 }
361
362 return 0;
363}
364
365/**
366 * sdw_enable_disable_ports() - Enable/disable port(s) for Master and
367 * Slave(s)
368 *
369 * @m_rt: Master stream runtime
370 * @en: mode (enable/disable)
371 */
372static int sdw_enable_disable_ports(struct sdw_master_runtime *m_rt, bool en)
373{
374 struct sdw_port_runtime *s_port, *m_port;
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500375 struct sdw_slave_runtime *s_rt;
Sanyog Kale79df15b2018-04-26 18:38:23 +0530376 int ret = 0;
377
378 /* Enable/Disable Slave port(s) */
379 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
380 list_for_each_entry(s_port, &s_rt->port_list, port_node) {
381 ret = sdw_enable_disable_slave_ports(m_rt->bus, s_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500382 s_port, en);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530383 if (ret < 0)
384 return ret;
385 }
386 }
387
388 /* Enable/Disable Master port(s) */
389 list_for_each_entry(m_port, &m_rt->port_list, port_node) {
390 ret = sdw_enable_disable_master_ports(m_rt, m_port, en);
391 if (ret < 0)
392 return ret;
393 }
394
395 return 0;
396}
397
398static int sdw_do_port_prep(struct sdw_slave_runtime *s_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500399 struct sdw_prepare_ch prep_ch,
400 enum sdw_port_prep_ops cmd)
Sanyog Kale79df15b2018-04-26 18:38:23 +0530401{
402 const struct sdw_slave_ops *ops = s_rt->slave->ops;
403 int ret;
404
405 if (ops->port_prep) {
406 ret = ops->port_prep(s_rt->slave, &prep_ch, cmd);
407 if (ret < 0) {
408 dev_err(&s_rt->slave->dev,
Vinod Koul62f0cec2019-05-02 16:29:24 +0530409 "Slave Port Prep cmd %d failed: %d\n",
410 cmd, ret);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530411 return ret;
412 }
413 }
414
415 return 0;
416}
417
418static int sdw_prep_deprep_slave_ports(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500419 struct sdw_slave_runtime *s_rt,
420 struct sdw_port_runtime *p_rt,
421 bool prep)
Sanyog Kale79df15b2018-04-26 18:38:23 +0530422{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500423 struct completion *port_ready;
Sanyog Kale79df15b2018-04-26 18:38:23 +0530424 struct sdw_dpn_prop *dpn_prop;
425 struct sdw_prepare_ch prep_ch;
426 unsigned int time_left;
427 bool intr = false;
428 int ret = 0, val;
429 u32 addr;
430
431 prep_ch.num = p_rt->num;
432 prep_ch.ch_mask = p_rt->ch_mask;
433
434 dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500435 s_rt->direction,
436 prep_ch.num);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530437 if (!dpn_prop) {
438 dev_err(bus->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500439 "Slave Port:%d properties not found\n", prep_ch.num);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530440 return -EINVAL;
441 }
442
443 prep_ch.prepare = prep;
444
445 prep_ch.bank = bus->params.next_bank;
446
Pierre-Louis Bossart8acbbfe2019-05-22 14:47:25 -0500447 if (dpn_prop->imp_def_interrupts || !dpn_prop->simple_ch_prep_sm)
Sanyog Kale79df15b2018-04-26 18:38:23 +0530448 intr = true;
449
450 /*
451 * Enable interrupt before Port prepare.
452 * For Port de-prepare, it is assumed that port
453 * was prepared earlier
454 */
455 if (prep && intr) {
456 ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep,
Pierre-Louis Bossart8acbbfe2019-05-22 14:47:25 -0500457 dpn_prop->imp_def_interrupts);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530458 if (ret < 0)
459 return ret;
460 }
461
462 /* Inform slave about the impending port prepare */
463 sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_PRE_PREP);
464
465 /* Prepare Slave port implementing CP_SM */
466 if (!dpn_prop->simple_ch_prep_sm) {
467 addr = SDW_DPN_PREPARECTRL(p_rt->num);
468
469 if (prep)
Srinivas Kandagatla0b43fef2020-03-12 10:01:05 +0000470 ret = sdw_write(s_rt->slave, addr, p_rt->ch_mask);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530471 else
Srinivas Kandagatla0b43fef2020-03-12 10:01:05 +0000472 ret = sdw_write(s_rt->slave, addr, 0x0);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530473
474 if (ret < 0) {
475 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500476 "Slave prep_ctrl reg write failed\n");
Sanyog Kale79df15b2018-04-26 18:38:23 +0530477 return ret;
478 }
479
480 /* Wait for completion on port ready */
481 port_ready = &s_rt->slave->port_ready[prep_ch.num];
482 time_left = wait_for_completion_timeout(port_ready,
483 msecs_to_jiffies(dpn_prop->ch_prep_timeout));
484
485 val = sdw_read(s_rt->slave, SDW_DPN_PREPARESTATUS(p_rt->num));
486 val &= p_rt->ch_mask;
487 if (!time_left || val) {
488 dev_err(&s_rt->slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500489 "Chn prep failed for port:%d\n", prep_ch.num);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530490 return -ETIMEDOUT;
491 }
492 }
493
494 /* Inform slaves about ports prepared */
495 sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_POST_PREP);
496
497 /* Disable interrupt after Port de-prepare */
498 if (!prep && intr)
499 ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep,
Pierre-Louis Bossart8acbbfe2019-05-22 14:47:25 -0500500 dpn_prop->imp_def_interrupts);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530501
502 return ret;
503}
504
505static int sdw_prep_deprep_master_ports(struct sdw_master_runtime *m_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500506 struct sdw_port_runtime *p_rt,
507 bool prep)
Sanyog Kale79df15b2018-04-26 18:38:23 +0530508{
509 struct sdw_transport_params *t_params = &p_rt->transport_params;
510 struct sdw_bus *bus = m_rt->bus;
511 const struct sdw_master_port_ops *ops = bus->port_ops;
512 struct sdw_prepare_ch prep_ch;
513 int ret = 0;
514
515 prep_ch.num = p_rt->num;
516 prep_ch.ch_mask = p_rt->ch_mask;
517 prep_ch.prepare = prep; /* Prepare/De-prepare */
518 prep_ch.bank = bus->params.next_bank;
519
520 /* Pre-prepare/Pre-deprepare port(s) */
521 if (ops->dpn_port_prep) {
522 ret = ops->dpn_port_prep(bus, &prep_ch);
523 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500524 dev_err(bus->dev, "Port prepare failed for port:%d\n",
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500525 t_params->port_num);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530526 return ret;
527 }
528 }
529
530 return ret;
531}
532
533/**
534 * sdw_prep_deprep_ports() - Prepare/De-prepare port(s) for Master(s) and
535 * Slave(s)
536 *
537 * @m_rt: Master runtime handle
538 * @prep: Prepare or De-prepare
539 */
540static int sdw_prep_deprep_ports(struct sdw_master_runtime *m_rt, bool prep)
541{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500542 struct sdw_slave_runtime *s_rt;
Sanyog Kale79df15b2018-04-26 18:38:23 +0530543 struct sdw_port_runtime *p_rt;
544 int ret = 0;
545
546 /* Prepare/De-prepare Slave port(s) */
547 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
548 list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
549 ret = sdw_prep_deprep_slave_ports(m_rt->bus, s_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500550 p_rt, prep);
Sanyog Kale79df15b2018-04-26 18:38:23 +0530551 if (ret < 0)
552 return ret;
553 }
554 }
555
556 /* Prepare/De-prepare Master port(s) */
557 list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
558 ret = sdw_prep_deprep_master_ports(m_rt, p_rt, prep);
559 if (ret < 0)
560 return ret;
561 }
562
563 return ret;
564}
565
566/**
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530567 * sdw_notify_config() - Notify bus configuration
568 *
569 * @m_rt: Master runtime handle
570 *
571 * This function notifies the Master(s) and Slave(s) of the
572 * new bus configuration.
573 */
574static int sdw_notify_config(struct sdw_master_runtime *m_rt)
575{
576 struct sdw_slave_runtime *s_rt;
577 struct sdw_bus *bus = m_rt->bus;
578 struct sdw_slave *slave;
579 int ret = 0;
580
581 if (bus->ops->set_bus_conf) {
582 ret = bus->ops->set_bus_conf(bus, &bus->params);
583 if (ret < 0)
584 return ret;
585 }
586
587 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
588 slave = s_rt->slave;
589
590 if (slave->ops->bus_config) {
591 ret = slave->ops->bus_config(slave, &bus->params);
Rander Wang60835022020-01-14 17:52:26 -0600592 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500593 dev_err(bus->dev, "Notify Slave: %d failed\n",
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500594 slave->dev_num);
Rander Wang60835022020-01-14 17:52:26 -0600595 return ret;
596 }
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530597 }
598 }
599
600 return ret;
601}
602
603/**
604 * sdw_program_params() - Program transport and port parameters for Master(s)
605 * and Slave(s)
606 *
607 * @bus: SDW bus instance
Rander Wangbfaa3542020-01-14 17:52:27 -0600608 * @prepare: true if sdw_program_params() is called by _prepare.
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530609 */
Rander Wangbfaa3542020-01-14 17:52:27 -0600610static int sdw_program_params(struct sdw_bus *bus, bool prepare)
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530611{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500612 struct sdw_master_runtime *m_rt;
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530613 int ret = 0;
614
615 list_for_each_entry(m_rt, &bus->m_rt_list, bus_node) {
Rander Wangbfaa3542020-01-14 17:52:27 -0600616
617 /*
618 * this loop walks through all master runtimes for a
619 * bus, but the ports can only be configured while
620 * explicitly preparing a stream or handling an
621 * already-prepared stream otherwise.
622 */
623 if (!prepare &&
624 m_rt->stream->state == SDW_STREAM_CONFIGURED)
625 continue;
626
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530627 ret = sdw_program_port_params(m_rt);
628 if (ret < 0) {
629 dev_err(bus->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500630 "Program transport params failed: %d\n", ret);
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530631 return ret;
632 }
633
634 ret = sdw_notify_config(m_rt);
635 if (ret < 0) {
Vinod Koul62f0cec2019-05-02 16:29:24 +0530636 dev_err(bus->dev,
637 "Notify bus config failed: %d\n", ret);
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530638 return ret;
639 }
640
641 /* Enable port(s) on alternate bank for all active streams */
642 if (m_rt->stream->state != SDW_STREAM_ENABLED)
643 continue;
644
645 ret = sdw_enable_disable_ports(m_rt, true);
646 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500647 dev_err(bus->dev, "Enable channel failed: %d\n", ret);
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530648 return ret;
649 }
650 }
651
652 return ret;
653}
654
Shreyas NCce6e74d2018-07-27 14:44:16 +0530655static int sdw_bank_switch(struct sdw_bus *bus, int m_rt_count)
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530656{
657 int col_index, row_index;
Shreyas NCce6e74d2018-07-27 14:44:16 +0530658 bool multi_link;
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530659 struct sdw_msg *wr_msg;
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500660 u8 *wbuf;
661 int ret;
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530662 u16 addr;
663
664 wr_msg = kzalloc(sizeof(*wr_msg), GFP_KERNEL);
665 if (!wr_msg)
666 return -ENOMEM;
667
Shreyas NCce6e74d2018-07-27 14:44:16 +0530668 bus->defer_msg.msg = wr_msg;
669
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530670 wbuf = kzalloc(sizeof(*wbuf), GFP_KERNEL);
671 if (!wbuf) {
672 ret = -ENOMEM;
673 goto error_1;
674 }
675
676 /* Get row and column index to program register */
677 col_index = sdw_find_col_index(bus->params.col);
678 row_index = sdw_find_row_index(bus->params.row);
679 wbuf[0] = col_index | (row_index << 3);
680
681 if (bus->params.next_bank)
682 addr = SDW_SCP_FRAMECTRL_B1;
683 else
684 addr = SDW_SCP_FRAMECTRL_B0;
685
686 sdw_fill_msg(wr_msg, NULL, addr, 1, SDW_BROADCAST_DEV_NUM,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500687 SDW_MSG_FLAG_WRITE, wbuf);
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530688 wr_msg->ssp_sync = true;
689
Shreyas NCce6e74d2018-07-27 14:44:16 +0530690 /*
691 * Set the multi_link flag only when both the hardware supports
692 * and there is a stream handled by multiple masters
693 */
694 multi_link = bus->multi_link && (m_rt_count > 1);
695
696 if (multi_link)
697 ret = sdw_transfer_defer(bus, wr_msg, &bus->defer_msg);
698 else
699 ret = sdw_transfer(bus, wr_msg);
700
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530701 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500702 dev_err(bus->dev, "Slave frame_ctrl reg write failed\n");
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530703 goto error;
704 }
705
Shreyas NCce6e74d2018-07-27 14:44:16 +0530706 if (!multi_link) {
707 kfree(wr_msg);
708 kfree(wbuf);
709 bus->defer_msg.msg = NULL;
710 bus->params.curr_bank = !bus->params.curr_bank;
711 bus->params.next_bank = !bus->params.next_bank;
712 }
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530713
714 return 0;
715
716error:
717 kfree(wbuf);
718error_1:
719 kfree(wr_msg);
720 return ret;
721}
722
Shreyas NCce6e74d2018-07-27 14:44:16 +0530723/**
724 * sdw_ml_sync_bank_switch: Multilink register bank switch
725 *
726 * @bus: SDW bus instance
727 *
728 * Caller function should free the buffers on error
729 */
730static int sdw_ml_sync_bank_switch(struct sdw_bus *bus)
731{
732 unsigned long time_left;
733
734 if (!bus->multi_link)
735 return 0;
736
737 /* Wait for completion of transfer */
738 time_left = wait_for_completion_timeout(&bus->defer_msg.complete,
739 bus->bank_switch_timeout);
740
741 if (!time_left) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500742 dev_err(bus->dev, "Controller Timed out on bank switch\n");
Shreyas NCce6e74d2018-07-27 14:44:16 +0530743 return -ETIMEDOUT;
744 }
745
746 bus->params.curr_bank = !bus->params.curr_bank;
747 bus->params.next_bank = !bus->params.next_bank;
748
749 if (bus->defer_msg.msg) {
750 kfree(bus->defer_msg.msg->buf);
751 kfree(bus->defer_msg.msg);
752 }
753
754 return 0;
755}
756
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530757static int do_bank_switch(struct sdw_stream_runtime *stream)
758{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500759 struct sdw_master_runtime *m_rt;
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530760 const struct sdw_master_ops *ops;
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500761 struct sdw_bus *bus;
Shreyas NCce6e74d2018-07-27 14:44:16 +0530762 bool multi_link = false;
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530763 int ret = 0;
764
Vinod Koul48949722018-07-27 14:44:14 +0530765 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
766 bus = m_rt->bus;
767 ops = bus->ops;
768
Shreyas NCce6e74d2018-07-27 14:44:16 +0530769 if (bus->multi_link) {
770 multi_link = true;
771 mutex_lock(&bus->msg_lock);
772 }
773
Vinod Koul48949722018-07-27 14:44:14 +0530774 /* Pre-bank switch */
775 if (ops->pre_bank_switch) {
776 ret = ops->pre_bank_switch(bus);
777 if (ret < 0) {
778 dev_err(bus->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500779 "Pre bank switch op failed: %d\n", ret);
Shreyas NCce6e74d2018-07-27 14:44:16 +0530780 goto msg_unlock;
Vinod Koul48949722018-07-27 14:44:14 +0530781 }
782 }
783
Shreyas NCce6e74d2018-07-27 14:44:16 +0530784 /*
785 * Perform Bank switch operation.
786 * For multi link cases, the actual bank switch is
787 * synchronized across all Masters and happens later as a
788 * part of post_bank_switch ops.
789 */
790 ret = sdw_bank_switch(bus, stream->m_rt_count);
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530791 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500792 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
Shreyas NCce6e74d2018-07-27 14:44:16 +0530793 goto error;
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530794 }
795 }
796
Shreyas NCce6e74d2018-07-27 14:44:16 +0530797 /*
798 * For multi link cases, it is expected that the bank switch is
799 * triggered by the post_bank_switch for the first Master in the list
800 * and for the other Masters the post_bank_switch() should return doing
801 * nothing.
802 */
Vinod Koul48949722018-07-27 14:44:14 +0530803 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
804 bus = m_rt->bus;
805 ops = bus->ops;
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530806
Vinod Koul48949722018-07-27 14:44:14 +0530807 /* Post-bank switch */
808 if (ops->post_bank_switch) {
809 ret = ops->post_bank_switch(bus);
810 if (ret < 0) {
811 dev_err(bus->dev,
Vinod Koul62f0cec2019-05-02 16:29:24 +0530812 "Post bank switch op failed: %d\n",
813 ret);
Shreyas NCce6e74d2018-07-27 14:44:16 +0530814 goto error;
Vinod Koul48949722018-07-27 14:44:14 +0530815 }
Shreyas NCce6e74d2018-07-27 14:44:16 +0530816 } else if (bus->multi_link && stream->m_rt_count > 1) {
817 dev_err(bus->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500818 "Post bank switch ops not implemented\n");
Shreyas NCce6e74d2018-07-27 14:44:16 +0530819 goto error;
820 }
821
822 /* Set the bank switch timeout to default, if not set */
823 if (!bus->bank_switch_timeout)
824 bus->bank_switch_timeout = DEFAULT_BANK_SWITCH_TIMEOUT;
825
826 /* Check if bank switch was successful */
827 ret = sdw_ml_sync_bank_switch(bus);
828 if (ret < 0) {
829 dev_err(bus->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -0500830 "multi link bank switch failed: %d\n", ret);
Shreyas NCce6e74d2018-07-27 14:44:16 +0530831 goto error;
832 }
833
Srinivas Kandagatla9315d902019-06-06 12:22:22 +0100834 if (bus->multi_link)
835 mutex_unlock(&bus->msg_lock);
Shreyas NCce6e74d2018-07-27 14:44:16 +0530836 }
837
838 return ret;
839
840error:
841 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
Shreyas NCce6e74d2018-07-27 14:44:16 +0530842 bus = m_rt->bus;
843
844 kfree(bus->defer_msg.msg->buf);
845 kfree(bus->defer_msg.msg);
846 }
847
848msg_unlock:
849
850 if (multi_link) {
851 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
852 bus = m_rt->bus;
853 if (mutex_is_locked(&bus->msg_lock))
854 mutex_unlock(&bus->msg_lock);
Sanyog Kale99b8a5d2018-04-26 18:38:28 +0530855 }
856 }
857
858 return ret;
859}
860
861/**
Sanyog Kale89e59052018-04-26 18:38:08 +0530862 * sdw_release_stream() - Free the assigned stream runtime
863 *
864 * @stream: SoundWire stream runtime
865 *
866 * sdw_release_stream should be called only once per stream
867 */
868void sdw_release_stream(struct sdw_stream_runtime *stream)
869{
870 kfree(stream);
871}
872EXPORT_SYMBOL(sdw_release_stream);
873
874/**
875 * sdw_alloc_stream() - Allocate and return stream runtime
876 *
877 * @stream_name: SoundWire stream name
878 *
879 * Allocates a SoundWire stream runtime instance.
880 * sdw_alloc_stream should be called only once per stream. Typically
881 * invoked from ALSA/ASoC machine/platform driver.
882 */
Srinivas Kandagatladfcff3f2019-08-13 09:35:47 +0100883struct sdw_stream_runtime *sdw_alloc_stream(const char *stream_name)
Sanyog Kale89e59052018-04-26 18:38:08 +0530884{
885 struct sdw_stream_runtime *stream;
886
887 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
888 if (!stream)
889 return NULL;
890
891 stream->name = stream_name;
Sanyog Kale0c4a1042018-07-27 14:44:13 +0530892 INIT_LIST_HEAD(&stream->master_list);
Sanyog Kale89e59052018-04-26 18:38:08 +0530893 stream->state = SDW_STREAM_ALLOCATED;
Shreyas NC9b5c1322018-07-27 14:44:15 +0530894 stream->m_rt_count = 0;
Sanyog Kale89e59052018-04-26 18:38:08 +0530895
896 return stream;
897}
898EXPORT_SYMBOL(sdw_alloc_stream);
899
Vinod Koul48949722018-07-27 14:44:14 +0530900static struct sdw_master_runtime
901*sdw_find_master_rt(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500902 struct sdw_stream_runtime *stream)
Vinod Koul48949722018-07-27 14:44:14 +0530903{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500904 struct sdw_master_runtime *m_rt;
Vinod Koul48949722018-07-27 14:44:14 +0530905
906 /* Retrieve Bus handle if already available */
907 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
908 if (m_rt->bus == bus)
909 return m_rt;
910 }
911
912 return NULL;
913}
914
Sanyog Kale89e59052018-04-26 18:38:08 +0530915/**
916 * sdw_alloc_master_rt() - Allocates and initialize Master runtime handle
917 *
918 * @bus: SDW bus instance
919 * @stream_config: Stream configuration
920 * @stream: Stream runtime handle.
921 *
922 * This function is to be called with bus_lock held.
923 */
924static struct sdw_master_runtime
925*sdw_alloc_master_rt(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500926 struct sdw_stream_config *stream_config,
927 struct sdw_stream_runtime *stream)
Sanyog Kale89e59052018-04-26 18:38:08 +0530928{
929 struct sdw_master_runtime *m_rt;
930
Sanyog Kale89e59052018-04-26 18:38:08 +0530931 /*
932 * check if Master is already allocated (as a result of Slave adding
933 * it first), if so skip allocation and go to configure
934 */
Vinod Koul48949722018-07-27 14:44:14 +0530935 m_rt = sdw_find_master_rt(bus, stream);
Sanyog Kale89e59052018-04-26 18:38:08 +0530936 if (m_rt)
937 goto stream_config;
938
939 m_rt = kzalloc(sizeof(*m_rt), GFP_KERNEL);
940 if (!m_rt)
941 return NULL;
942
943 /* Initialization of Master runtime handle */
Sanyog Kalebbe73792018-04-26 18:38:13 +0530944 INIT_LIST_HEAD(&m_rt->port_list);
Sanyog Kale89e59052018-04-26 18:38:08 +0530945 INIT_LIST_HEAD(&m_rt->slave_rt_list);
Vinod Koul48949722018-07-27 14:44:14 +0530946 list_add_tail(&m_rt->stream_node, &stream->master_list);
Sanyog Kale89e59052018-04-26 18:38:08 +0530947
948 list_add_tail(&m_rt->bus_node, &bus->m_rt_list);
949
950stream_config:
951 m_rt->ch_count = stream_config->ch_count;
952 m_rt->bus = bus;
953 m_rt->stream = stream;
954 m_rt->direction = stream_config->direction;
955
956 return m_rt;
957}
958
959/**
960 * sdw_alloc_slave_rt() - Allocate and initialize Slave runtime handle.
961 *
962 * @slave: Slave handle
963 * @stream_config: Stream configuration
964 * @stream: Stream runtime handle
965 *
966 * This function is to be called with bus_lock held.
967 */
968static struct sdw_slave_runtime
969*sdw_alloc_slave_rt(struct sdw_slave *slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500970 struct sdw_stream_config *stream_config,
971 struct sdw_stream_runtime *stream)
Sanyog Kale89e59052018-04-26 18:38:08 +0530972{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -0500973 struct sdw_slave_runtime *s_rt;
Sanyog Kale89e59052018-04-26 18:38:08 +0530974
975 s_rt = kzalloc(sizeof(*s_rt), GFP_KERNEL);
976 if (!s_rt)
977 return NULL;
978
Sanyog Kalebbe73792018-04-26 18:38:13 +0530979 INIT_LIST_HEAD(&s_rt->port_list);
Sanyog Kale89e59052018-04-26 18:38:08 +0530980 s_rt->ch_count = stream_config->ch_count;
981 s_rt->direction = stream_config->direction;
982 s_rt->slave = slave;
983
984 return s_rt;
985}
986
Sanyog Kalebbe73792018-04-26 18:38:13 +0530987static void sdw_master_port_release(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500988 struct sdw_master_runtime *m_rt)
Sanyog Kalebbe73792018-04-26 18:38:13 +0530989{
990 struct sdw_port_runtime *p_rt, *_p_rt;
991
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500992 list_for_each_entry_safe(p_rt, _p_rt, &m_rt->port_list, port_node) {
Sanyog Kalebbe73792018-04-26 18:38:13 +0530993 list_del(&p_rt->port_node);
994 kfree(p_rt);
995 }
996}
997
998static void sdw_slave_port_release(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -0500999 struct sdw_slave *slave,
1000 struct sdw_stream_runtime *stream)
Sanyog Kalebbe73792018-04-26 18:38:13 +05301001{
1002 struct sdw_port_runtime *p_rt, *_p_rt;
Vinod Koul48949722018-07-27 14:44:14 +05301003 struct sdw_master_runtime *m_rt;
Sanyog Kalebbe73792018-04-26 18:38:13 +05301004 struct sdw_slave_runtime *s_rt;
1005
Vinod Koul48949722018-07-27 14:44:14 +05301006 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1007 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
Vinod Koul48949722018-07-27 14:44:14 +05301008 if (s_rt->slave != slave)
1009 continue;
1010
1011 list_for_each_entry_safe(p_rt, _p_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001012 &s_rt->port_list, port_node) {
Vinod Koul48949722018-07-27 14:44:14 +05301013 list_del(&p_rt->port_node);
1014 kfree(p_rt);
1015 }
Sanyog Kalebbe73792018-04-26 18:38:13 +05301016 }
1017 }
1018}
1019
Sanyog Kale89e59052018-04-26 18:38:08 +05301020/**
1021 * sdw_release_slave_stream() - Free Slave(s) runtime handle
1022 *
1023 * @slave: Slave handle.
1024 * @stream: Stream runtime handle.
1025 *
1026 * This function is to be called with bus_lock held.
1027 */
1028static void sdw_release_slave_stream(struct sdw_slave *slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001029 struct sdw_stream_runtime *stream)
Sanyog Kale89e59052018-04-26 18:38:08 +05301030{
1031 struct sdw_slave_runtime *s_rt, *_s_rt;
Vinod Koul48949722018-07-27 14:44:14 +05301032 struct sdw_master_runtime *m_rt;
Sanyog Kale89e59052018-04-26 18:38:08 +05301033
Vinod Koul48949722018-07-27 14:44:14 +05301034 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1035 /* Retrieve Slave runtime handle */
1036 list_for_each_entry_safe(s_rt, _s_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001037 &m_rt->slave_rt_list, m_rt_node) {
Vinod Koul48949722018-07-27 14:44:14 +05301038 if (s_rt->slave == slave) {
1039 list_del(&s_rt->m_rt_node);
1040 kfree(s_rt);
1041 return;
1042 }
Sanyog Kale89e59052018-04-26 18:38:08 +05301043 }
1044 }
1045}
1046
1047/**
1048 * sdw_release_master_stream() - Free Master runtime handle
1049 *
Vinod Koul48949722018-07-27 14:44:14 +05301050 * @m_rt: Master runtime node
Sanyog Kale89e59052018-04-26 18:38:08 +05301051 * @stream: Stream runtime handle.
1052 *
1053 * This function is to be called with bus_lock held
1054 * It frees the Master runtime handle and associated Slave(s) runtime
1055 * handle. If this is called first then sdw_release_slave_stream() will have
1056 * no effect as Slave(s) runtime handle would already be freed up.
1057 */
Vinod Koul48949722018-07-27 14:44:14 +05301058static void sdw_release_master_stream(struct sdw_master_runtime *m_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001059 struct sdw_stream_runtime *stream)
Sanyog Kale89e59052018-04-26 18:38:08 +05301060{
Sanyog Kale89e59052018-04-26 18:38:08 +05301061 struct sdw_slave_runtime *s_rt, *_s_rt;
1062
Sanyog Kale8d6ccf52018-07-27 14:44:10 +05301063 list_for_each_entry_safe(s_rt, _s_rt, &m_rt->slave_rt_list, m_rt_node) {
1064 sdw_slave_port_release(s_rt->slave->bus, s_rt->slave, stream);
1065 sdw_release_slave_stream(s_rt->slave, stream);
1066 }
Sanyog Kale89e59052018-04-26 18:38:08 +05301067
Vinod Koul48949722018-07-27 14:44:14 +05301068 list_del(&m_rt->stream_node);
Sanyog Kale89e59052018-04-26 18:38:08 +05301069 list_del(&m_rt->bus_node);
Vinod Koul48949722018-07-27 14:44:14 +05301070 kfree(m_rt);
Sanyog Kale89e59052018-04-26 18:38:08 +05301071}
1072
1073/**
1074 * sdw_stream_remove_master() - Remove master from sdw_stream
1075 *
1076 * @bus: SDW Bus instance
1077 * @stream: SoundWire stream
1078 *
Sanyog Kalebbe73792018-04-26 18:38:13 +05301079 * This removes and frees port_rt and master_rt from a stream
Sanyog Kale89e59052018-04-26 18:38:08 +05301080 */
1081int sdw_stream_remove_master(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001082 struct sdw_stream_runtime *stream)
Sanyog Kale89e59052018-04-26 18:38:08 +05301083{
Vinod Koul48949722018-07-27 14:44:14 +05301084 struct sdw_master_runtime *m_rt, *_m_rt;
1085
Sanyog Kale89e59052018-04-26 18:38:08 +05301086 mutex_lock(&bus->bus_lock);
1087
Vinod Koul48949722018-07-27 14:44:14 +05301088 list_for_each_entry_safe(m_rt, _m_rt,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001089 &stream->master_list, stream_node) {
Vinod Koul48949722018-07-27 14:44:14 +05301090 if (m_rt->bus != bus)
1091 continue;
1092
1093 sdw_master_port_release(bus, m_rt);
1094 sdw_release_master_stream(m_rt, stream);
Shreyas NCce6e74d2018-07-27 14:44:16 +05301095 stream->m_rt_count--;
Vinod Koul48949722018-07-27 14:44:14 +05301096 }
1097
1098 if (list_empty(&stream->master_list))
1099 stream->state = SDW_STREAM_RELEASED;
Sanyog Kale89e59052018-04-26 18:38:08 +05301100
1101 mutex_unlock(&bus->bus_lock);
1102
1103 return 0;
1104}
1105EXPORT_SYMBOL(sdw_stream_remove_master);
1106
1107/**
1108 * sdw_stream_remove_slave() - Remove slave from sdw_stream
1109 *
1110 * @slave: SDW Slave instance
1111 * @stream: SoundWire stream
1112 *
Sanyog Kalebbe73792018-04-26 18:38:13 +05301113 * This removes and frees port_rt and slave_rt from a stream
Sanyog Kale89e59052018-04-26 18:38:08 +05301114 */
1115int sdw_stream_remove_slave(struct sdw_slave *slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001116 struct sdw_stream_runtime *stream)
Sanyog Kale89e59052018-04-26 18:38:08 +05301117{
1118 mutex_lock(&slave->bus->bus_lock);
1119
Sanyog Kalebbe73792018-04-26 18:38:13 +05301120 sdw_slave_port_release(slave->bus, slave, stream);
Sanyog Kale89e59052018-04-26 18:38:08 +05301121 sdw_release_slave_stream(slave, stream);
1122
1123 mutex_unlock(&slave->bus->bus_lock);
1124
1125 return 0;
1126}
1127EXPORT_SYMBOL(sdw_stream_remove_slave);
1128
1129/**
1130 * sdw_config_stream() - Configure the allocated stream
1131 *
1132 * @dev: SDW device
1133 * @stream: SoundWire stream
1134 * @stream_config: Stream configuration for audio stream
1135 * @is_slave: is API called from Slave or Master
1136 *
1137 * This function is to be called with bus_lock held.
1138 */
1139static int sdw_config_stream(struct device *dev,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001140 struct sdw_stream_runtime *stream,
1141 struct sdw_stream_config *stream_config,
1142 bool is_slave)
Sanyog Kale89e59052018-04-26 18:38:08 +05301143{
1144 /*
1145 * Update the stream rate, channel and bps based on data
1146 * source. For more than one data source (multilink),
1147 * match the rate, bps, stream type and increment number of channels.
1148 *
1149 * If rate/bps is zero, it means the values are not set, so skip
1150 * comparison and allow the value to be set and stored in stream
1151 */
1152 if (stream->params.rate &&
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001153 stream->params.rate != stream_config->frame_rate) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001154 dev_err(dev, "rate not matching, stream:%s\n", stream->name);
Sanyog Kale89e59052018-04-26 18:38:08 +05301155 return -EINVAL;
1156 }
1157
1158 if (stream->params.bps &&
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001159 stream->params.bps != stream_config->bps) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001160 dev_err(dev, "bps not matching, stream:%s\n", stream->name);
Sanyog Kale89e59052018-04-26 18:38:08 +05301161 return -EINVAL;
1162 }
1163
1164 stream->type = stream_config->type;
1165 stream->params.rate = stream_config->frame_rate;
1166 stream->params.bps = stream_config->bps;
1167
1168 /* TODO: Update this check during Device-device support */
1169 if (is_slave)
1170 stream->params.ch_count += stream_config->ch_count;
1171
1172 return 0;
1173}
1174
Sanyog Kalebbe73792018-04-26 18:38:13 +05301175static int sdw_is_valid_port_range(struct device *dev,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001176 struct sdw_port_runtime *p_rt)
Sanyog Kalebbe73792018-04-26 18:38:13 +05301177{
1178 if (!SDW_VALID_PORT_RANGE(p_rt->num)) {
1179 dev_err(dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001180 "SoundWire: Invalid port number :%d\n", p_rt->num);
Sanyog Kalebbe73792018-04-26 18:38:13 +05301181 return -EINVAL;
1182 }
1183
1184 return 0;
1185}
1186
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001187static struct sdw_port_runtime
1188*sdw_port_alloc(struct device *dev,
1189 struct sdw_port_config *port_config,
1190 int port_index)
Sanyog Kalebbe73792018-04-26 18:38:13 +05301191{
1192 struct sdw_port_runtime *p_rt;
1193
1194 p_rt = kzalloc(sizeof(*p_rt), GFP_KERNEL);
1195 if (!p_rt)
1196 return NULL;
1197
1198 p_rt->ch_mask = port_config[port_index].ch_mask;
1199 p_rt->num = port_config[port_index].num;
1200
1201 return p_rt;
1202}
1203
1204static int sdw_master_port_config(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001205 struct sdw_master_runtime *m_rt,
1206 struct sdw_port_config *port_config,
1207 unsigned int num_ports)
Sanyog Kalebbe73792018-04-26 18:38:13 +05301208{
1209 struct sdw_port_runtime *p_rt;
1210 int i;
1211
1212 /* Iterate for number of ports to perform initialization */
1213 for (i = 0; i < num_ports; i++) {
1214 p_rt = sdw_port_alloc(bus->dev, port_config, i);
1215 if (!p_rt)
1216 return -ENOMEM;
1217
1218 /*
1219 * TODO: Check port capabilities for requested
1220 * configuration (audio mode support)
1221 */
1222
1223 list_add_tail(&p_rt->port_node, &m_rt->port_list);
1224 }
1225
1226 return 0;
1227}
1228
1229static int sdw_slave_port_config(struct sdw_slave *slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001230 struct sdw_slave_runtime *s_rt,
1231 struct sdw_port_config *port_config,
1232 unsigned int num_config)
Sanyog Kalebbe73792018-04-26 18:38:13 +05301233{
1234 struct sdw_port_runtime *p_rt;
1235 int i, ret;
1236
1237 /* Iterate for number of ports to perform initialization */
1238 for (i = 0; i < num_config; i++) {
1239 p_rt = sdw_port_alloc(&slave->dev, port_config, i);
1240 if (!p_rt)
1241 return -ENOMEM;
1242
1243 /*
1244 * TODO: Check valid port range as defined by DisCo/
1245 * slave
1246 */
1247 ret = sdw_is_valid_port_range(&slave->dev, p_rt);
1248 if (ret < 0) {
1249 kfree(p_rt);
1250 return ret;
1251 }
1252
1253 /*
1254 * TODO: Check port capabilities for requested
1255 * configuration (audio mode support)
1256 */
1257
1258 list_add_tail(&p_rt->port_node, &s_rt->port_list);
1259 }
1260
1261 return 0;
1262}
1263
Sanyog Kale89e59052018-04-26 18:38:08 +05301264/**
1265 * sdw_stream_add_master() - Allocate and add master runtime to a stream
1266 *
1267 * @bus: SDW Bus instance
1268 * @stream_config: Stream configuration for audio stream
Sanyog Kalebbe73792018-04-26 18:38:13 +05301269 * @port_config: Port configuration for audio stream
1270 * @num_ports: Number of ports
Sanyog Kale89e59052018-04-26 18:38:08 +05301271 * @stream: SoundWire stream
1272 */
1273int sdw_stream_add_master(struct sdw_bus *bus,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001274 struct sdw_stream_config *stream_config,
1275 struct sdw_port_config *port_config,
1276 unsigned int num_ports,
1277 struct sdw_stream_runtime *stream)
Sanyog Kale89e59052018-04-26 18:38:08 +05301278{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001279 struct sdw_master_runtime *m_rt;
Sanyog Kale89e59052018-04-26 18:38:08 +05301280 int ret;
1281
1282 mutex_lock(&bus->bus_lock);
1283
Shreyas NCce6e74d2018-07-27 14:44:16 +05301284 /*
1285 * For multi link streams, add the second master only if
1286 * the bus supports it.
1287 * Check if bus->multi_link is set
1288 */
1289 if (!bus->multi_link && stream->m_rt_count > 0) {
1290 dev_err(bus->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001291 "Multilink not supported, link %d\n", bus->link_id);
Shreyas NCce6e74d2018-07-27 14:44:16 +05301292 ret = -EINVAL;
1293 goto unlock;
1294 }
1295
Sanyog Kale89e59052018-04-26 18:38:08 +05301296 m_rt = sdw_alloc_master_rt(bus, stream_config, stream);
1297 if (!m_rt) {
1298 dev_err(bus->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001299 "Master runtime config failed for stream:%s\n",
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001300 stream->name);
Sanyog Kale89e59052018-04-26 18:38:08 +05301301 ret = -ENOMEM;
Shreyas NC3fef1a22018-07-27 14:44:09 +05301302 goto unlock;
Sanyog Kale89e59052018-04-26 18:38:08 +05301303 }
1304
1305 ret = sdw_config_stream(bus->dev, stream, stream_config, false);
1306 if (ret)
1307 goto stream_error;
1308
Sanyog Kalebbe73792018-04-26 18:38:13 +05301309 ret = sdw_master_port_config(bus, m_rt, port_config, num_ports);
1310 if (ret)
1311 goto stream_error;
1312
Shreyas NCce6e74d2018-07-27 14:44:16 +05301313 stream->m_rt_count++;
1314
Shreyas NC3fef1a22018-07-27 14:44:09 +05301315 goto unlock;
1316
Sanyog Kale89e59052018-04-26 18:38:08 +05301317stream_error:
Vinod Koul48949722018-07-27 14:44:14 +05301318 sdw_release_master_stream(m_rt, stream);
Shreyas NC3fef1a22018-07-27 14:44:09 +05301319unlock:
Sanyog Kale89e59052018-04-26 18:38:08 +05301320 mutex_unlock(&bus->bus_lock);
1321 return ret;
1322}
1323EXPORT_SYMBOL(sdw_stream_add_master);
1324
1325/**
1326 * sdw_stream_add_slave() - Allocate and add master/slave runtime to a stream
1327 *
1328 * @slave: SDW Slave instance
1329 * @stream_config: Stream configuration for audio stream
1330 * @stream: SoundWire stream
Sanyog Kalebbe73792018-04-26 18:38:13 +05301331 * @port_config: Port configuration for audio stream
1332 * @num_ports: Number of ports
Shreyas NC0aebe402018-07-27 14:44:08 +05301333 *
1334 * It is expected that Slave is added before adding Master
1335 * to the Stream.
1336 *
Sanyog Kale89e59052018-04-26 18:38:08 +05301337 */
1338int sdw_stream_add_slave(struct sdw_slave *slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001339 struct sdw_stream_config *stream_config,
1340 struct sdw_port_config *port_config,
1341 unsigned int num_ports,
1342 struct sdw_stream_runtime *stream)
Sanyog Kale89e59052018-04-26 18:38:08 +05301343{
1344 struct sdw_slave_runtime *s_rt;
1345 struct sdw_master_runtime *m_rt;
1346 int ret;
1347
1348 mutex_lock(&slave->bus->bus_lock);
1349
1350 /*
1351 * If this API is invoked by Slave first then m_rt is not valid.
1352 * So, allocate m_rt and add Slave to it.
1353 */
1354 m_rt = sdw_alloc_master_rt(slave->bus, stream_config, stream);
1355 if (!m_rt) {
1356 dev_err(&slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001357 "alloc master runtime failed for stream:%s\n",
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001358 stream->name);
Sanyog Kale89e59052018-04-26 18:38:08 +05301359 ret = -ENOMEM;
1360 goto error;
1361 }
1362
1363 s_rt = sdw_alloc_slave_rt(slave, stream_config, stream);
1364 if (!s_rt) {
1365 dev_err(&slave->dev,
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001366 "Slave runtime config failed for stream:%s\n",
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001367 stream->name);
Sanyog Kale89e59052018-04-26 18:38:08 +05301368 ret = -ENOMEM;
1369 goto stream_error;
1370 }
1371
1372 ret = sdw_config_stream(&slave->dev, stream, stream_config, true);
1373 if (ret)
1374 goto stream_error;
1375
1376 list_add_tail(&s_rt->m_rt_node, &m_rt->slave_rt_list);
1377
Sanyog Kalebbe73792018-04-26 18:38:13 +05301378 ret = sdw_slave_port_config(slave, s_rt, port_config, num_ports);
1379 if (ret)
1380 goto stream_error;
1381
Shreyas NC0aebe402018-07-27 14:44:08 +05301382 /*
1383 * Change stream state to CONFIGURED on first Slave add.
1384 * Bus is not aware of number of Slave(s) in a stream at this
1385 * point so cannot depend on all Slave(s) to be added in order to
1386 * change stream state to CONFIGURED.
1387 */
Sanyog Kale89e59052018-04-26 18:38:08 +05301388 stream->state = SDW_STREAM_CONFIGURED;
1389 goto error;
1390
1391stream_error:
1392 /*
1393 * we hit error so cleanup the stream, release all Slave(s) and
1394 * Master runtime
1395 */
Vinod Koul48949722018-07-27 14:44:14 +05301396 sdw_release_master_stream(m_rt, stream);
Sanyog Kale89e59052018-04-26 18:38:08 +05301397error:
1398 mutex_unlock(&slave->bus->bus_lock);
1399 return ret;
1400}
1401EXPORT_SYMBOL(sdw_stream_add_slave);
Sanyog Kalef8101c72018-04-26 18:38:17 +05301402
1403/**
1404 * sdw_get_slave_dpn_prop() - Get Slave port capabilities
1405 *
1406 * @slave: Slave handle
1407 * @direction: Data direction.
1408 * @port_num: Port number
1409 */
1410struct sdw_dpn_prop *sdw_get_slave_dpn_prop(struct sdw_slave *slave,
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001411 enum sdw_data_direction direction,
1412 unsigned int port_num)
Sanyog Kalef8101c72018-04-26 18:38:17 +05301413{
1414 struct sdw_dpn_prop *dpn_prop;
1415 u8 num_ports;
1416 int i;
1417
1418 if (direction == SDW_DATA_DIR_TX) {
1419 num_ports = hweight32(slave->prop.source_ports);
1420 dpn_prop = slave->prop.src_dpn_prop;
1421 } else {
1422 num_ports = hweight32(slave->prop.sink_ports);
1423 dpn_prop = slave->prop.sink_dpn_prop;
1424 }
1425
1426 for (i = 0; i < num_ports; i++) {
Srinivas Kandagatla03ecad92019-05-22 17:24:43 +01001427 if (dpn_prop[i].num == port_num)
Sanyog Kalef8101c72018-04-26 18:38:17 +05301428 return &dpn_prop[i];
1429 }
1430
1431 return NULL;
1432}
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301433
Sanyog Kale0c4a1042018-07-27 14:44:13 +05301434/**
1435 * sdw_acquire_bus_lock: Acquire bus lock for all Master runtime(s)
1436 *
1437 * @stream: SoundWire stream
1438 *
1439 * Acquire bus_lock for each of the master runtime(m_rt) part of this
1440 * stream to reconfigure the bus.
1441 * NOTE: This function is called from SoundWire stream ops and is
1442 * expected that a global lock is held before acquiring bus_lock.
1443 */
1444static void sdw_acquire_bus_lock(struct sdw_stream_runtime *stream)
1445{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001446 struct sdw_master_runtime *m_rt;
Sanyog Kale0c4a1042018-07-27 14:44:13 +05301447 struct sdw_bus *bus = NULL;
1448
1449 /* Iterate for all Master(s) in Master list */
1450 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1451 bus = m_rt->bus;
1452
1453 mutex_lock(&bus->bus_lock);
1454 }
1455}
1456
1457/**
1458 * sdw_release_bus_lock: Release bus lock for all Master runtime(s)
1459 *
1460 * @stream: SoundWire stream
1461 *
1462 * Release the previously held bus_lock after reconfiguring the bus.
Vinod Koul48949722018-07-27 14:44:14 +05301463 * NOTE: This function is called from SoundWire stream ops and is
1464 * expected that a global lock is held before releasing bus_lock.
Sanyog Kale0c4a1042018-07-27 14:44:13 +05301465 */
1466static void sdw_release_bus_lock(struct sdw_stream_runtime *stream)
1467{
1468 struct sdw_master_runtime *m_rt = NULL;
1469 struct sdw_bus *bus = NULL;
1470
1471 /* Iterate for all Master(s) in Master list */
1472 list_for_each_entry_reverse(m_rt, &stream->master_list, stream_node) {
1473 bus = m_rt->bus;
1474 mutex_unlock(&bus->bus_lock);
1475 }
1476}
1477
Pierre-Louis Bossartc7a8f042020-01-14 17:52:25 -06001478static int _sdw_prepare_stream(struct sdw_stream_runtime *stream,
1479 bool update_params)
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301480{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001481 struct sdw_master_runtime *m_rt;
Vinod Koul48949722018-07-27 14:44:14 +05301482 struct sdw_bus *bus = NULL;
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001483 struct sdw_master_prop *prop;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301484 struct sdw_bus_params params;
1485 int ret;
1486
Vinod Koul48949722018-07-27 14:44:14 +05301487 /* Prepare Master(s) and Slave(s) port(s) associated with stream */
1488 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1489 bus = m_rt->bus;
1490 prop = &bus->prop;
1491 memcpy(&params, &bus->params, sizeof(params));
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301492
Vinod Koul48949722018-07-27 14:44:14 +05301493 /* TODO: Support Asynchronous mode */
Pierre-Louis Bossart34243052019-05-22 14:47:22 -05001494 if ((prop->max_clk_freq % stream->params.rate) != 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001495 dev_err(bus->dev, "Async mode not supported\n");
Vinod Koul48949722018-07-27 14:44:14 +05301496 return -EINVAL;
1497 }
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301498
Pierre-Louis Bossartc7a8f042020-01-14 17:52:25 -06001499 if (!update_params)
1500 goto program_params;
1501
Vinod Koul48949722018-07-27 14:44:14 +05301502 /* Increment cumulative bus bandwidth */
1503 /* TODO: Update this during Device-Device support */
1504 bus->params.bandwidth += m_rt->stream->params.rate *
1505 m_rt->ch_count * m_rt->stream->params.bps;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301506
Vinod Koulc7578c12019-08-13 09:35:46 +01001507 /* Compute params */
1508 if (bus->compute_params) {
1509 ret = bus->compute_params(bus);
1510 if (ret < 0) {
1511 dev_err(bus->dev, "Compute params failed: %d",
1512 ret);
1513 return ret;
1514 }
1515 }
1516
Pierre-Louis Bossartc7a8f042020-01-14 17:52:25 -06001517program_params:
Vinod Koul48949722018-07-27 14:44:14 +05301518 /* Program params */
Rander Wangbfaa3542020-01-14 17:52:27 -06001519 ret = sdw_program_params(bus, true);
Vinod Koul48949722018-07-27 14:44:14 +05301520 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001521 dev_err(bus->dev, "Program params failed: %d\n", ret);
Vinod Koul48949722018-07-27 14:44:14 +05301522 goto restore_params;
1523 }
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301524 }
1525
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001526 if (!bus) {
1527 pr_err("Configuration error in %s\n", __func__);
1528 return -EINVAL;
1529 }
1530
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301531 ret = do_bank_switch(stream);
1532 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001533 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301534 goto restore_params;
1535 }
1536
Vinod Koul48949722018-07-27 14:44:14 +05301537 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1538 bus = m_rt->bus;
1539
1540 /* Prepare port(s) on the new clock configuration */
1541 ret = sdw_prep_deprep_ports(m_rt, true);
1542 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001543 dev_err(bus->dev, "Prepare port(s) failed ret = %d\n",
Pierre-Louis Bossart1fe74a5e2019-05-01 10:57:35 -05001544 ret);
Vinod Koul48949722018-07-27 14:44:14 +05301545 return ret;
1546 }
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301547 }
1548
1549 stream->state = SDW_STREAM_PREPARED;
1550
1551 return ret;
1552
1553restore_params:
1554 memcpy(&bus->params, &params, sizeof(params));
1555 return ret;
1556}
1557
1558/**
1559 * sdw_prepare_stream() - Prepare SoundWire stream
1560 *
1561 * @stream: Soundwire stream
1562 *
Mauro Carvalho Chehab34962fb2018-05-08 15:14:57 -03001563 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301564 */
1565int sdw_prepare_stream(struct sdw_stream_runtime *stream)
1566{
Pierre-Louis Bossartc7a8f042020-01-14 17:52:25 -06001567 bool update_params = true;
Bard Liaoc32464c2020-01-14 17:52:24 -06001568 int ret;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301569
1570 if (!stream) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001571 pr_err("SoundWire: Handle not found for stream\n");
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301572 return -EINVAL;
1573 }
1574
Vinod Koul48949722018-07-27 14:44:14 +05301575 sdw_acquire_bus_lock(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301576
Bard Liaoc32464c2020-01-14 17:52:24 -06001577 if (stream->state == SDW_STREAM_PREPARED) {
1578 ret = 0;
1579 goto state_err;
1580 }
1581
Pierre-Louis Bossart59528802020-01-14 17:52:23 -06001582 if (stream->state != SDW_STREAM_CONFIGURED &&
1583 stream->state != SDW_STREAM_DEPREPARED &&
1584 stream->state != SDW_STREAM_DISABLED) {
1585 pr_err("%s: %s: inconsistent state state %d\n",
1586 __func__, stream->name, stream->state);
1587 ret = -EINVAL;
1588 goto state_err;
1589 }
1590
Pierre-Louis Bossartc7a8f042020-01-14 17:52:25 -06001591 /*
1592 * when the stream is DISABLED, this means sdw_prepare_stream()
1593 * is called as a result of an underflow or a resume operation.
1594 * In this case, the bus parameters shall not be recomputed, but
1595 * still need to be re-applied
1596 */
1597 if (stream->state == SDW_STREAM_DISABLED)
1598 update_params = false;
1599
1600 ret = _sdw_prepare_stream(stream, update_params);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301601
Pierre-Louis Bossart59528802020-01-14 17:52:23 -06001602state_err:
Vinod Koul48949722018-07-27 14:44:14 +05301603 sdw_release_bus_lock(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301604 return ret;
1605}
1606EXPORT_SYMBOL(sdw_prepare_stream);
1607
1608static int _sdw_enable_stream(struct sdw_stream_runtime *stream)
1609{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001610 struct sdw_master_runtime *m_rt;
Vinod Koul48949722018-07-27 14:44:14 +05301611 struct sdw_bus *bus = NULL;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301612 int ret;
1613
Vinod Koul48949722018-07-27 14:44:14 +05301614 /* Enable Master(s) and Slave(s) port(s) associated with stream */
1615 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1616 bus = m_rt->bus;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301617
Vinod Koul48949722018-07-27 14:44:14 +05301618 /* Program params */
Rander Wangbfaa3542020-01-14 17:52:27 -06001619 ret = sdw_program_params(bus, false);
Vinod Koul48949722018-07-27 14:44:14 +05301620 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001621 dev_err(bus->dev, "Program params failed: %d\n", ret);
Vinod Koul48949722018-07-27 14:44:14 +05301622 return ret;
1623 }
1624
1625 /* Enable port(s) */
1626 ret = sdw_enable_disable_ports(m_rt, true);
1627 if (ret < 0) {
Vinod Koul62f0cec2019-05-02 16:29:24 +05301628 dev_err(bus->dev,
1629 "Enable port(s) failed ret: %d\n", ret);
Vinod Koul48949722018-07-27 14:44:14 +05301630 return ret;
1631 }
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301632 }
1633
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001634 if (!bus) {
1635 pr_err("Configuration error in %s\n", __func__);
1636 return -EINVAL;
1637 }
1638
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301639 ret = do_bank_switch(stream);
1640 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001641 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301642 return ret;
1643 }
1644
1645 stream->state = SDW_STREAM_ENABLED;
1646 return 0;
1647}
1648
1649/**
1650 * sdw_enable_stream() - Enable SoundWire stream
1651 *
1652 * @stream: Soundwire stream
1653 *
Mauro Carvalho Chehab34962fb2018-05-08 15:14:57 -03001654 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301655 */
1656int sdw_enable_stream(struct sdw_stream_runtime *stream)
1657{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001658 int ret;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301659
1660 if (!stream) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001661 pr_err("SoundWire: Handle not found for stream\n");
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301662 return -EINVAL;
1663 }
1664
Vinod Koul48949722018-07-27 14:44:14 +05301665 sdw_acquire_bus_lock(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301666
Pierre-Louis Bossart59528802020-01-14 17:52:23 -06001667 if (stream->state != SDW_STREAM_PREPARED &&
1668 stream->state != SDW_STREAM_DISABLED) {
1669 pr_err("%s: %s: inconsistent state state %d\n",
1670 __func__, stream->name, stream->state);
1671 ret = -EINVAL;
1672 goto state_err;
1673 }
1674
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301675 ret = _sdw_enable_stream(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301676
Pierre-Louis Bossart59528802020-01-14 17:52:23 -06001677state_err:
Vinod Koul48949722018-07-27 14:44:14 +05301678 sdw_release_bus_lock(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301679 return ret;
1680}
1681EXPORT_SYMBOL(sdw_enable_stream);
1682
1683static int _sdw_disable_stream(struct sdw_stream_runtime *stream)
1684{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001685 struct sdw_master_runtime *m_rt;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301686 int ret;
1687
Vinod Koul48949722018-07-27 14:44:14 +05301688 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001689 struct sdw_bus *bus = m_rt->bus;
1690
Vinod Koul48949722018-07-27 14:44:14 +05301691 /* Disable port(s) */
1692 ret = sdw_enable_disable_ports(m_rt, false);
1693 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001694 dev_err(bus->dev, "Disable port(s) failed: %d\n", ret);
Vinod Koul48949722018-07-27 14:44:14 +05301695 return ret;
1696 }
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301697 }
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301698 stream->state = SDW_STREAM_DISABLED;
1699
Vinod Koul48949722018-07-27 14:44:14 +05301700 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001701 struct sdw_bus *bus = m_rt->bus;
1702
Vinod Koul48949722018-07-27 14:44:14 +05301703 /* Program params */
Rander Wangbfaa3542020-01-14 17:52:27 -06001704 ret = sdw_program_params(bus, false);
Vinod Koul48949722018-07-27 14:44:14 +05301705 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001706 dev_err(bus->dev, "Program params failed: %d\n", ret);
Vinod Koul48949722018-07-27 14:44:14 +05301707 return ret;
1708 }
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301709 }
1710
Pierre-Louis Bossarte0279b62019-08-05 19:55:13 -05001711 ret = do_bank_switch(stream);
1712 if (ret < 0) {
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001713 pr_err("Bank switch failed: %d\n", ret);
Pierre-Louis Bossarte0279b62019-08-05 19:55:13 -05001714 return ret;
1715 }
1716
1717 /* make sure alternate bank (previous current) is also disabled */
1718 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001719 struct sdw_bus *bus = m_rt->bus;
1720
Pierre-Louis Bossarte0279b62019-08-05 19:55:13 -05001721 /* Disable port(s) */
1722 ret = sdw_enable_disable_ports(m_rt, false);
1723 if (ret < 0) {
1724 dev_err(bus->dev, "Disable port(s) failed: %d\n", ret);
1725 return ret;
1726 }
1727 }
1728
1729 return 0;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301730}
1731
1732/**
1733 * sdw_disable_stream() - Disable SoundWire stream
1734 *
1735 * @stream: Soundwire stream
1736 *
Mauro Carvalho Chehab34962fb2018-05-08 15:14:57 -03001737 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301738 */
1739int sdw_disable_stream(struct sdw_stream_runtime *stream)
1740{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001741 int ret;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301742
1743 if (!stream) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001744 pr_err("SoundWire: Handle not found for stream\n");
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301745 return -EINVAL;
1746 }
1747
Vinod Koul48949722018-07-27 14:44:14 +05301748 sdw_acquire_bus_lock(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301749
Pierre-Louis Bossart59528802020-01-14 17:52:23 -06001750 if (stream->state != SDW_STREAM_ENABLED) {
1751 pr_err("%s: %s: inconsistent state state %d\n",
1752 __func__, stream->name, stream->state);
1753 ret = -EINVAL;
1754 goto state_err;
1755 }
1756
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301757 ret = _sdw_disable_stream(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301758
Pierre-Louis Bossart59528802020-01-14 17:52:23 -06001759state_err:
Vinod Koul48949722018-07-27 14:44:14 +05301760 sdw_release_bus_lock(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301761 return ret;
1762}
1763EXPORT_SYMBOL(sdw_disable_stream);
1764
1765static int _sdw_deprepare_stream(struct sdw_stream_runtime *stream)
1766{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001767 struct sdw_master_runtime *m_rt;
1768 struct sdw_bus *bus;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301769 int ret = 0;
1770
Vinod Koul48949722018-07-27 14:44:14 +05301771 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1772 bus = m_rt->bus;
1773 /* De-prepare port(s) */
1774 ret = sdw_prep_deprep_ports(m_rt, false);
1775 if (ret < 0) {
Vinod Koul62f0cec2019-05-02 16:29:24 +05301776 dev_err(bus->dev,
1777 "De-prepare port(s) failed: %d\n", ret);
Vinod Koul48949722018-07-27 14:44:14 +05301778 return ret;
1779 }
1780
1781 /* TODO: Update this during Device-Device support */
1782 bus->params.bandwidth -= m_rt->stream->params.rate *
1783 m_rt->ch_count * m_rt->stream->params.bps;
1784
1785 /* Program params */
Rander Wangbfaa3542020-01-14 17:52:27 -06001786 ret = sdw_program_params(bus, false);
Vinod Koul48949722018-07-27 14:44:14 +05301787 if (ret < 0) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001788 dev_err(bus->dev, "Program params failed: %d\n", ret);
Vinod Koul48949722018-07-27 14:44:14 +05301789 return ret;
1790 }
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301791 }
1792
1793 stream->state = SDW_STREAM_DEPREPARED;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301794 return do_bank_switch(stream);
1795}
1796
1797/**
1798 * sdw_deprepare_stream() - Deprepare SoundWire stream
1799 *
1800 * @stream: Soundwire stream
1801 *
Mauro Carvalho Chehab34962fb2018-05-08 15:14:57 -03001802 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301803 */
1804int sdw_deprepare_stream(struct sdw_stream_runtime *stream)
1805{
Pierre-Louis Bossart3a0be1a2019-08-05 19:55:14 -05001806 int ret;
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301807
1808 if (!stream) {
Pierre-Louis Bossart17ed5be2019-05-01 10:57:45 -05001809 pr_err("SoundWire: Handle not found for stream\n");
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301810 return -EINVAL;
1811 }
1812
Vinod Koul48949722018-07-27 14:44:14 +05301813 sdw_acquire_bus_lock(stream);
Pierre-Louis Bossart59528802020-01-14 17:52:23 -06001814
1815 if (stream->state != SDW_STREAM_PREPARED &&
1816 stream->state != SDW_STREAM_DISABLED) {
1817 pr_err("%s: %s: inconsistent state state %d\n",
1818 __func__, stream->name, stream->state);
1819 ret = -EINVAL;
1820 goto state_err;
1821 }
1822
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301823 ret = _sdw_deprepare_stream(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301824
Pierre-Louis Bossart59528802020-01-14 17:52:23 -06001825state_err:
Vinod Koul48949722018-07-27 14:44:14 +05301826 sdw_release_bus_lock(stream);
Sanyog Kale5c3eb9f2018-04-26 18:38:33 +05301827 return ret;
1828}
1829EXPORT_SYMBOL(sdw_deprepare_stream);
Pierre-Louis Bossart45505692020-07-01 02:43:53 +08001830
1831static int set_stream(struct snd_pcm_substream *substream,
1832 struct sdw_stream_runtime *sdw_stream)
1833{
1834 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1835 struct snd_soc_dai *dai;
1836 int ret = 0;
1837 int i;
1838
1839 /* Set stream pointer on all DAIs */
1840 for_each_rtd_dais(rtd, i, dai) {
1841 ret = snd_soc_dai_set_sdw_stream(dai, sdw_stream, substream->stream);
1842 if (ret < 0) {
1843 dev_err(rtd->dev, "failed to set stream pointer on dai %s", dai->name);
1844 break;
1845 }
1846 }
1847
1848 return ret;
1849}
1850
1851/**
1852 * sdw_startup_stream() - Startup SoundWire stream
1853 *
Vinod Koul3b71c692020-07-15 15:27:02 +05301854 * @sdw_substream: Soundwire stream
Pierre-Louis Bossart45505692020-07-01 02:43:53 +08001855 *
1856 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
1857 */
1858int sdw_startup_stream(void *sdw_substream)
1859{
1860 struct snd_pcm_substream *substream = sdw_substream;
1861 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1862 struct sdw_stream_runtime *sdw_stream;
1863 char *name;
1864 int ret;
1865
1866 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1867 name = kasprintf(GFP_KERNEL, "%s-Playback", substream->name);
1868 else
1869 name = kasprintf(GFP_KERNEL, "%s-Capture", substream->name);
1870
1871 if (!name)
1872 return -ENOMEM;
1873
1874 sdw_stream = sdw_alloc_stream(name);
1875 if (!sdw_stream) {
1876 dev_err(rtd->dev, "alloc stream failed for substream DAI %s", substream->name);
1877 ret = -ENOMEM;
1878 goto error;
1879 }
1880
1881 ret = set_stream(substream, sdw_stream);
1882 if (ret < 0)
1883 goto release_stream;
1884 return 0;
1885
1886release_stream:
1887 sdw_release_stream(sdw_stream);
1888 set_stream(substream, NULL);
1889error:
1890 kfree(name);
1891 return ret;
1892}
1893EXPORT_SYMBOL(sdw_startup_stream);
1894
1895/**
1896 * sdw_shutdown_stream() - Shutdown SoundWire stream
1897 *
Vinod Koul3b71c692020-07-15 15:27:02 +05301898 * @sdw_substream: Soundwire stream
Pierre-Louis Bossart45505692020-07-01 02:43:53 +08001899 *
1900 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
1901 */
1902void sdw_shutdown_stream(void *sdw_substream)
1903{
1904 struct snd_pcm_substream *substream = sdw_substream;
1905 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1906 struct sdw_stream_runtime *sdw_stream;
1907 struct snd_soc_dai *dai;
1908
1909 /* Find stream from first CPU DAI */
1910 dai = asoc_rtd_to_cpu(rtd, 0);
1911
1912 sdw_stream = snd_soc_dai_get_sdw_stream(dai, substream->stream);
1913
1914 if (!sdw_stream) {
1915 dev_err(rtd->dev, "no stream found for DAI %s", dai->name);
1916 return;
1917 }
1918
1919 /* release memory */
1920 kfree(sdw_stream->name);
1921 sdw_release_stream(sdw_stream);
1922
1923 /* clear DAI data */
1924 set_stream(substream, NULL);
1925}
1926EXPORT_SYMBOL(sdw_shutdown_stream);