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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Ilan Tayari1f0cf892018-05-30 10:59:50 -070063 MLX5_EVENT_TYPE_CODING_FPGA_QP_ERROR = 0x21
Saeed Mahameede2816822015-05-28 22:28:40 +030064};
65
66enum {
67 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
68 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
69 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
70 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
71};
72
73enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020074 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
75 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
76};
77
78enum {
Yishai Hadas38b7ca92018-03-08 14:36:27 +020079 MLX5_GENERAL_OBJ_TYPES_CAP_UCTX = (1ULL << 4),
80 MLX5_GENERAL_OBJ_TYPES_CAP_UMEM = (1ULL << 5),
81};
82
83enum {
84 MLX5_OBJ_TYPE_UCTX = 0x0004,
Yishai Hadasaeae9452018-06-17 13:00:04 +030085 MLX5_OBJ_TYPE_UMEM = 0x0005,
Yishai Hadas38b7ca92018-03-08 14:36:27 +020086};
87
88enum {
Eli Cohend29b7962014-10-02 12:19:43 +030089 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
90 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
91 MLX5_CMD_OP_INIT_HCA = 0x102,
92 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
93 MLX5_CMD_OP_ENABLE_HCA = 0x104,
94 MLX5_CMD_OP_DISABLE_HCA = 0x105,
95 MLX5_CMD_OP_QUERY_PAGES = 0x107,
96 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
97 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030098 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
99 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200100 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +0300101 MLX5_CMD_OP_CREATE_MKEY = 0x200,
102 MLX5_CMD_OP_QUERY_MKEY = 0x201,
103 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
104 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
105 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
Ariel Levkovich24da0012018-04-05 18:53:27 +0300106 MLX5_CMD_OP_ALLOC_MEMIC = 0x205,
107 MLX5_CMD_OP_DEALLOC_MEMIC = 0x206,
Eli Cohend29b7962014-10-02 12:19:43 +0300108 MLX5_CMD_OP_CREATE_EQ = 0x301,
109 MLX5_CMD_OP_DESTROY_EQ = 0x302,
110 MLX5_CMD_OP_QUERY_EQ = 0x303,
111 MLX5_CMD_OP_GEN_EQE = 0x304,
112 MLX5_CMD_OP_CREATE_CQ = 0x400,
113 MLX5_CMD_OP_DESTROY_CQ = 0x401,
114 MLX5_CMD_OP_QUERY_CQ = 0x402,
115 MLX5_CMD_OP_MODIFY_CQ = 0x403,
116 MLX5_CMD_OP_CREATE_QP = 0x500,
117 MLX5_CMD_OP_DESTROY_QP = 0x501,
118 MLX5_CMD_OP_RST2INIT_QP = 0x502,
119 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
120 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
121 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
122 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
123 MLX5_CMD_OP_2ERR_QP = 0x507,
124 MLX5_CMD_OP_2RST_QP = 0x50a,
125 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300126 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300127 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
128 MLX5_CMD_OP_CREATE_PSV = 0x600,
129 MLX5_CMD_OP_DESTROY_PSV = 0x601,
130 MLX5_CMD_OP_CREATE_SRQ = 0x700,
131 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
132 MLX5_CMD_OP_QUERY_SRQ = 0x702,
133 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300134 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
135 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
136 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
137 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300138 MLX5_CMD_OP_CREATE_DCT = 0x710,
139 MLX5_CMD_OP_DESTROY_DCT = 0x711,
140 MLX5_CMD_OP_DRAIN_DCT = 0x712,
141 MLX5_CMD_OP_QUERY_DCT = 0x713,
142 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300143 MLX5_CMD_OP_CREATE_XRQ = 0x717,
144 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
145 MLX5_CMD_OP_QUERY_XRQ = 0x719,
146 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300147 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
148 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
149 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
150 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
151 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
152 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300153 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300154 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300155 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
156 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
157 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
158 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +0200159 MLX5_CMD_OP_QUERY_VNIC_ENV = 0x76f,
Eli Cohend29b7962014-10-02 12:19:43 +0300160 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
161 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
162 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
163 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Eran Ben Elisha37e92a92017-11-13 10:11:27 +0200164 MLX5_CMD_OP_SET_PP_RATE_LIMIT = 0x780,
Saeed Mahameed74862162016-06-09 15:11:34 +0300165 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300166 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
167 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
168 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
169 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
170 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
171 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300172 MLX5_CMD_OP_ALLOC_PD = 0x800,
173 MLX5_CMD_OP_DEALLOC_PD = 0x801,
174 MLX5_CMD_OP_ALLOC_UAR = 0x802,
175 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
176 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
177 MLX5_CMD_OP_ACCESS_REG = 0x805,
178 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300179 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300180 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
181 MLX5_CMD_OP_MAD_IFC = 0x50d,
182 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
183 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
184 MLX5_CMD_OP_NOP = 0x80d,
185 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
186 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300187 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
188 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
189 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
190 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
191 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
192 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
193 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
194 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
195 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
196 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
197 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
198 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200199 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
200 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300201 MLX5_CMD_OP_CREATE_LAG = 0x840,
202 MLX5_CMD_OP_MODIFY_LAG = 0x841,
203 MLX5_CMD_OP_QUERY_LAG = 0x842,
204 MLX5_CMD_OP_DESTROY_LAG = 0x843,
205 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
206 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300207 MLX5_CMD_OP_CREATE_TIR = 0x900,
208 MLX5_CMD_OP_MODIFY_TIR = 0x901,
209 MLX5_CMD_OP_DESTROY_TIR = 0x902,
210 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300211 MLX5_CMD_OP_CREATE_SQ = 0x904,
212 MLX5_CMD_OP_MODIFY_SQ = 0x905,
213 MLX5_CMD_OP_DESTROY_SQ = 0x906,
214 MLX5_CMD_OP_QUERY_SQ = 0x907,
215 MLX5_CMD_OP_CREATE_RQ = 0x908,
216 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300217 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300218 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
219 MLX5_CMD_OP_QUERY_RQ = 0x90b,
220 MLX5_CMD_OP_CREATE_RMP = 0x90c,
221 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
222 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
223 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300224 MLX5_CMD_OP_CREATE_TIS = 0x912,
225 MLX5_CMD_OP_MODIFY_TIS = 0x913,
226 MLX5_CMD_OP_DESTROY_TIS = 0x914,
227 MLX5_CMD_OP_QUERY_TIS = 0x915,
228 MLX5_CMD_OP_CREATE_RQT = 0x916,
229 MLX5_CMD_OP_MODIFY_RQT = 0x917,
230 MLX5_CMD_OP_DESTROY_RQT = 0x918,
231 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200232 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300233 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
234 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
235 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
236 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
237 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
238 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
239 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
240 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200241 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000242 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
243 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
244 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300245 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Mark Bloch60786f02018-08-28 14:18:46 +0300246 MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT = 0x93d,
247 MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200248 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
249 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Yishai Hadase662e142018-06-17 13:00:02 +0300250 MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT = 0x942,
Ilan Tayari60621182017-03-27 14:52:09 +0300251 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
252 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
253 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
254 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
255 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Yishai Hadas38b7ca92018-03-08 14:36:27 +0200256 MLX5_CMD_OP_CREATE_GENERAL_OBJECT = 0xa00,
Yishai Hadase662e142018-06-17 13:00:02 +0300257 MLX5_CMD_OP_MODIFY_GENERAL_OBJECT = 0xa01,
258 MLX5_CMD_OP_QUERY_GENERAL_OBJECT = 0xa02,
Yishai Hadas38b7ca92018-03-08 14:36:27 +0200259 MLX5_CMD_OP_DESTROY_GENERAL_OBJECT = 0xa03,
Shahar Klein86d56a12016-06-10 00:07:30 +0300260 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300261};
262
263struct mlx5_ifc_flow_table_fields_supported_bits {
264 u8 outer_dmac[0x1];
265 u8 outer_smac[0x1];
266 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300267 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300268 u8 outer_first_prio[0x1];
269 u8 outer_first_cfi[0x1];
270 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300271 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300272 u8 outer_second_prio[0x1];
273 u8 outer_second_cfi[0x1];
274 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200275 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300276 u8 outer_sip[0x1];
277 u8 outer_dip[0x1];
278 u8 outer_frag[0x1];
279 u8 outer_ip_protocol[0x1];
280 u8 outer_ip_ecn[0x1];
281 u8 outer_ip_dscp[0x1];
282 u8 outer_udp_sport[0x1];
283 u8 outer_udp_dport[0x1];
284 u8 outer_tcp_sport[0x1];
285 u8 outer_tcp_dport[0x1];
286 u8 outer_tcp_flags[0x1];
287 u8 outer_gre_protocol[0x1];
288 u8 outer_gre_key[0x1];
289 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200290 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300291 u8 source_eswitch_port[0x1];
292
293 u8 inner_dmac[0x1];
294 u8 inner_smac[0x1];
295 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300296 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300297 u8 inner_first_prio[0x1];
298 u8 inner_first_cfi[0x1];
299 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200300 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300301 u8 inner_second_prio[0x1];
302 u8 inner_second_cfi[0x1];
303 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200304 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300305 u8 inner_sip[0x1];
306 u8 inner_dip[0x1];
307 u8 inner_frag[0x1];
308 u8 inner_ip_protocol[0x1];
309 u8 inner_ip_ecn[0x1];
310 u8 inner_ip_dscp[0x1];
311 u8 inner_udp_sport[0x1];
312 u8 inner_udp_dport[0x1];
313 u8 inner_tcp_sport[0x1];
314 u8 inner_tcp_dport[0x1];
315 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200316 u8 reserved_at_37[0x9];
Ariel Levkovich71c6e862018-05-13 14:33:34 +0300317
318 u8 reserved_at_40[0x5];
319 u8 outer_first_mpls_over_udp[0x4];
320 u8 outer_first_mpls_over_gre[0x4];
321 u8 inner_first_mpls[0x4];
322 u8 outer_first_mpls[0x4];
323 u8 reserved_at_55[0x2];
Boris Pismenny3346c482017-08-20 15:13:08 +0300324 u8 outer_esp_spi[0x1];
Ariel Levkovich71c6e862018-05-13 14:33:34 +0300325 u8 reserved_at_58[0x2];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300326 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300327
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300328 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300329};
330
331struct mlx5_ifc_flow_table_prop_layout_bits {
332 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000333 u8 reserved_at_1[0x1];
334 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200335 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200336 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200337 u8 identified_miss_table_mode[0x1];
338 u8 flow_table_modify[0x1];
Mark Bloch60786f02018-08-28 14:18:46 +0300339 u8 reformat[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300340 u8 decap[0x1];
Or Gerlitz0c068972018-01-28 20:14:20 +0200341 u8 reserved_at_9[0x1];
342 u8 pop_vlan[0x1];
343 u8 push_vlan[0x1];
Jianbo Liu8da6fe22018-07-16 18:35:32 -0700344 u8 reserved_at_c[0x1];
345 u8 pop_vlan_2[0x1];
346 u8 push_vlan_2[0x1];
347 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +0300348
Matan Barakb4ff3a32016-02-09 14:57:42 +0200349 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300350 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200351 u8 log_max_modify_header_context[0x8];
352 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300353 u8 max_ft_level[0x8];
354
Matan Barakb4ff3a32016-02-09 14:57:42 +0200355 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300356
Matan Barakb4ff3a32016-02-09 14:57:42 +0200357 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200358 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300359
Matan Barakb4ff3a32016-02-09 14:57:42 +0200360 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200361 u8 log_max_destination[0x8];
362
Raed Salem16f1c5b2017-07-30 11:02:51 +0300363 u8 log_max_flow_counter[0x8];
364 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300365 u8 log_max_flow[0x8];
366
Matan Barakb4ff3a32016-02-09 14:57:42 +0200367 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300368
369 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
370
371 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
372};
373
374struct mlx5_ifc_odp_per_transport_service_cap_bits {
375 u8 send[0x1];
376 u8 receive[0x1];
377 u8 write[0x1];
378 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200379 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300380 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200381 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300382};
383
384struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
385 u8 smac_47_16[0x20];
386
387 u8 smac_15_0[0x10];
388 u8 ethertype[0x10];
389
390 u8 dmac_47_16[0x20];
391
392 u8 dmac_15_0[0x10];
393 u8 first_prio[0x3];
394 u8 first_cfi[0x1];
395 u8 first_vid[0xc];
396
397 u8 ip_protocol[0x8];
398 u8 ip_dscp[0x6];
399 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300400 u8 cvlan_tag[0x1];
401 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300402 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300403 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300404 u8 tcp_flags[0x9];
405
406 u8 tcp_sport[0x10];
407 u8 tcp_dport[0x10];
408
Or Gerlitza8ade552017-06-07 17:49:56 +0300409 u8 reserved_at_c0[0x18];
410 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300411
412 u8 udp_sport[0x10];
413 u8 udp_dport[0x10];
414
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200415 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300416
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200417 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300418};
419
420struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300421 u8 reserved_at_0[0x8];
422 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300423
Shahar Klein3e99df82018-03-18 09:02:06 +0200424 u8 source_eswitch_owner_vhca_id[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300425 u8 source_port[0x10];
426
427 u8 outer_second_prio[0x3];
428 u8 outer_second_cfi[0x1];
429 u8 outer_second_vid[0xc];
430 u8 inner_second_prio[0x3];
431 u8 inner_second_cfi[0x1];
432 u8 inner_second_vid[0xc];
433
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300434 u8 outer_second_cvlan_tag[0x1];
435 u8 inner_second_cvlan_tag[0x1];
436 u8 outer_second_svlan_tag[0x1];
437 u8 inner_second_svlan_tag[0x1];
438 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300439 u8 gre_protocol[0x10];
440
441 u8 gre_key_h[0x18];
442 u8 gre_key_l[0x8];
443
444 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200445 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300446
Matan Barakb4ff3a32016-02-09 14:57:42 +0200447 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300448
Matan Barakb4ff3a32016-02-09 14:57:42 +0200449 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300450 u8 outer_ipv6_flow_label[0x14];
451
Matan Barakb4ff3a32016-02-09 14:57:42 +0200452 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300453 u8 inner_ipv6_flow_label[0x14];
454
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300455 u8 reserved_at_120[0x28];
456 u8 bth_dst_qp[0x18];
Boris Pismenny3346c482017-08-20 15:13:08 +0300457 u8 reserved_at_160[0x20];
458 u8 outer_esp_spi[0x20];
459 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300460};
461
Ariel Levkovich71c6e862018-05-13 14:33:34 +0300462struct mlx5_ifc_fte_match_mpls_bits {
463 u8 mpls_label[0x14];
464 u8 mpls_exp[0x3];
465 u8 mpls_s_bos[0x1];
466 u8 mpls_ttl[0x8];
467};
468
469struct mlx5_ifc_fte_match_set_misc2_bits {
470 struct mlx5_ifc_fte_match_mpls_bits outer_first_mpls;
471
472 struct mlx5_ifc_fte_match_mpls_bits inner_first_mpls;
473
474 struct mlx5_ifc_fte_match_mpls_bits outer_first_mpls_over_gre;
475
476 struct mlx5_ifc_fte_match_mpls_bits outer_first_mpls_over_udp;
477
478 u8 reserved_at_80[0x100];
479
480 u8 metadata_reg_a[0x20];
481
482 u8 reserved_at_1a0[0x60];
483};
484
Saeed Mahameede2816822015-05-28 22:28:40 +0300485struct mlx5_ifc_cmd_pas_bits {
486 u8 pa_h[0x20];
487
488 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200489 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300490};
491
492struct mlx5_ifc_uint64_bits {
493 u8 hi[0x20];
494
495 u8 lo[0x20];
496};
497
498enum {
499 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
500 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
501 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
502 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
503 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
504 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
505 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
506 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
507 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
508 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
509};
510
511struct mlx5_ifc_ads_bits {
512 u8 fl[0x1];
513 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200514 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300515 u8 pkey_index[0x10];
516
Matan Barakb4ff3a32016-02-09 14:57:42 +0200517 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300518 u8 grh[0x1];
519 u8 mlid[0x7];
520 u8 rlid[0x10];
521
522 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200523 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300524 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200525 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300526 u8 stat_rate[0x4];
527 u8 hop_limit[0x8];
528
Matan Barakb4ff3a32016-02-09 14:57:42 +0200529 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300530 u8 tclass[0x8];
531 u8 flow_label[0x14];
532
533 u8 rgid_rip[16][0x8];
534
Matan Barakb4ff3a32016-02-09 14:57:42 +0200535 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300536 u8 f_dscp[0x1];
537 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200538 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300539 u8 f_eth_prio[0x1];
540 u8 ecn[0x2];
541 u8 dscp[0x6];
542 u8 udp_sport[0x10];
543
544 u8 dei_cfi[0x1];
545 u8 eth_prio[0x3];
546 u8 sl[0x4];
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200547 u8 vhca_port_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300548 u8 rmac_47_32[0x10];
549
550 u8 rmac_31_0[0x20];
551};
552
553struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200554 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300555 u8 nic_rx_multi_path_tirs_fts[0x1];
556 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
557 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300558
559 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
560
Matan Barakb4ff3a32016-02-09 14:57:42 +0200561 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300562
563 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
564
565 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
566
Matan Barakb4ff3a32016-02-09 14:57:42 +0200567 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300568
569 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
570
Matan Barakb4ff3a32016-02-09 14:57:42 +0200571 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300572};
573
Saeed Mahameed495716b2015-12-01 18:03:19 +0200574struct mlx5_ifc_flow_table_eswitch_cap_bits {
Chris Mib4563002018-04-24 11:21:46 +0900575 u8 reserved_at_0[0x1c];
576 u8 fdb_multi_path_to_table[0x1];
577 u8 reserved_at_1d[0x1e3];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200578
579 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
580
581 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
582
583 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
584
Matan Barakb4ff3a32016-02-09 14:57:42 +0200585 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200586};
587
Saeed Mahameedd6666752015-12-01 18:03:22 +0200588struct mlx5_ifc_e_switch_cap_bits {
589 u8 vport_svlan_strip[0x1];
590 u8 vport_cvlan_strip[0x1];
591 u8 vport_svlan_insert[0x1];
592 u8 vport_cvlan_insert_if_not_exist[0x1];
593 u8 vport_cvlan_insert_overwrite[0x1];
Roi Dayana6d04562017-12-05 10:38:58 +0200594 u8 reserved_at_5[0x18];
595 u8 merged_eswitch[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300596 u8 nic_vport_node_guid_modify[0x1];
597 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200598
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300599 u8 vxlan_encap_decap[0x1];
600 u8 nvgre_encap_decap[0x1];
601 u8 reserved_at_22[0x9];
Mark Bloch60786f02018-08-28 14:18:46 +0300602 u8 log_max_packet_reformat_context[0x5];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300603 u8 reserved_2b[0x6];
604 u8 max_encap_header_size[0xa];
605
606 u8 reserved_40[0x7c0];
607
Saeed Mahameedd6666752015-12-01 18:03:22 +0200608};
609
Saeed Mahameed74862162016-06-09 15:11:34 +0300610struct mlx5_ifc_qos_cap_bits {
611 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300612 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200613 u8 esw_bw_share[0x1];
614 u8 esw_rate_limit[0x1];
Bodong Wang05d3ac92018-03-19 15:10:29 +0200615 u8 reserved_at_4[0x1];
616 u8 packet_pacing_burst_bound[0x1];
617 u8 packet_pacing_typical_size[0x1];
618 u8 reserved_at_7[0x19];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300619
620 u8 reserved_at_20[0x20];
621
Saeed Mahameed74862162016-06-09 15:11:34 +0300622 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300623
Saeed Mahameed74862162016-06-09 15:11:34 +0300624 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300625
626 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300627 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300628
629 u8 esw_element_type[0x10];
630 u8 esw_tsar_type[0x10];
631
632 u8 reserved_at_c0[0x10];
633 u8 max_qos_para_vport[0x10];
634
635 u8 max_tsar_bw_share[0x20];
636
637 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300638};
639
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300640struct mlx5_ifc_debug_cap_bits {
641 u8 reserved_at_0[0x20];
642
643 u8 reserved_at_20[0x2];
644 u8 stall_detect[0x1];
645 u8 reserved_at_23[0x1d];
646
647 u8 reserved_at_40[0x7c0];
648};
649
Saeed Mahameede2816822015-05-28 22:28:40 +0300650struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
651 u8 csum_cap[0x1];
652 u8 vlan_cap[0x1];
653 u8 lro_cap[0x1];
654 u8 lro_psh_flag[0x1];
655 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200656 u8 reserved_at_5[0x2];
657 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200658 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200659 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300660 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200661 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300662 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300663 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300664 u8 reg_umr_sq[0x1];
665 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300666 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300667 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200668 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300669 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300670 u8 tunnel_stateless_vxlan[0x1];
671
Ilan Tayari547eede2017-04-18 16:04:28 +0300672 u8 swp[0x1];
673 u8 swp_csum[0x1];
674 u8 swp_lso[0x1];
Gal Pressman22a65aa2017-12-25 18:40:52 +0200675 u8 reserved_at_23[0xd];
676 u8 max_vxlan_udp_ports[0x8];
677 u8 reserved_at_38[0x6];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300678 u8 max_geneve_opt_len[0x1];
679 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300680
Matan Barakb4ff3a32016-02-09 14:57:42 +0200681 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300682 u8 lro_min_mss_size[0x10];
683
Matan Barakb4ff3a32016-02-09 14:57:42 +0200684 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300685
686 u8 lro_timer_supported_periods[4][0x20];
687
Matan Barakb4ff3a32016-02-09 14:57:42 +0200688 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300689};
690
691struct mlx5_ifc_roce_cap_bits {
692 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200693 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300694
Matan Barakb4ff3a32016-02-09 14:57:42 +0200695 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300696
Matan Barakb4ff3a32016-02-09 14:57:42 +0200697 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300698 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200699 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300700 u8 roce_version[0x8];
701
Matan Barakb4ff3a32016-02-09 14:57:42 +0200702 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300703 u8 r_roce_dest_udp_port[0x10];
704
705 u8 r_roce_max_src_udp_port[0x10];
706 u8 r_roce_min_src_udp_port[0x10];
707
Matan Barakb4ff3a32016-02-09 14:57:42 +0200708 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300709 u8 roce_address_table_size[0x10];
710
Matan Barakb4ff3a32016-02-09 14:57:42 +0200711 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300712};
713
Ariel Levkoviche72bd812018-04-05 18:53:26 +0300714struct mlx5_ifc_device_mem_cap_bits {
715 u8 memic[0x1];
716 u8 reserved_at_1[0x1f];
717
718 u8 reserved_at_20[0xb];
719 u8 log_min_memic_alloc_size[0x5];
720 u8 reserved_at_30[0x8];
721 u8 log_max_memic_addr_alignment[0x8];
722
723 u8 memic_bar_start_addr[0x40];
724
725 u8 memic_bar_size[0x20];
726
727 u8 max_memic_size[0x20];
728
729 u8 reserved_at_c0[0x740];
730};
731
Saeed Mahameede2816822015-05-28 22:28:40 +0300732enum {
733 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
734 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
735 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
736 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
737 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
738 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
739 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
740 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
741 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
742};
743
744enum {
745 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
746 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
747 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
748 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
749 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
750 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
751 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
752 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
753 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
754};
755
756struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200757 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300758
Or Gerlitzbd108382017-05-28 15:24:17 +0300759 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200760 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300761 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300762
Matan Barakb4ff3a32016-02-09 14:57:42 +0200763 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300764
Matan Barakb4ff3a32016-02-09 14:57:42 +0200765 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300766
Matan Barakb4ff3a32016-02-09 14:57:42 +0200767 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200768 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300769
Matan Barakb4ff3a32016-02-09 14:57:42 +0200770 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200771 u8 atomic_size_qp[0x10];
772
Matan Barakb4ff3a32016-02-09 14:57:42 +0200773 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300774 u8 atomic_size_dc[0x10];
775
Matan Barakb4ff3a32016-02-09 14:57:42 +0200776 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300777};
778
779struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200780 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300781
782 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200783 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300784
Matan Barakb4ff3a32016-02-09 14:57:42 +0200785 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300786
787 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
788
789 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
790
791 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
792
Matan Barakb4ff3a32016-02-09 14:57:42 +0200793 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300794};
795
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200796struct mlx5_ifc_calc_op {
797 u8 reserved_at_0[0x10];
798 u8 reserved_at_10[0x9];
799 u8 op_swap_endianness[0x1];
800 u8 op_min[0x1];
801 u8 op_xor[0x1];
802 u8 op_or[0x1];
803 u8 op_and[0x1];
804 u8 op_max[0x1];
805 u8 op_add[0x1];
806};
807
808struct mlx5_ifc_vector_calc_cap_bits {
809 u8 calc_matrix[0x1];
810 u8 reserved_at_1[0x1f];
811 u8 reserved_at_20[0x8];
812 u8 max_vec_count[0x8];
813 u8 reserved_at_30[0xd];
814 u8 max_chunk_size[0x3];
815 struct mlx5_ifc_calc_op calc0;
816 struct mlx5_ifc_calc_op calc1;
817 struct mlx5_ifc_calc_op calc2;
818 struct mlx5_ifc_calc_op calc3;
819
820 u8 reserved_at_e0[0x720];
821};
822
Saeed Mahameede2816822015-05-28 22:28:40 +0300823enum {
824 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
825 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300826 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc870872017-10-17 18:01:13 +0300827 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300828};
829
830enum {
831 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
832 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
833};
834
835enum {
836 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
837 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
838 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
839 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
840 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
841};
842
843enum {
844 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
845 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
846 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
847 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
848 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
849 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
850};
851
852enum {
853 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
854 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
855};
856
857enum {
858 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
859 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
860 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
861};
862
863enum {
864 MLX5_CAP_PORT_TYPE_IB = 0x0,
865 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300866};
867
Max Gurtovoy1410a902017-05-28 10:53:10 +0300868enum {
869 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
870 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
871 MLX5_CAP_UMR_FENCE_NONE = 0x2,
872};
873
Eli Cohenb7755162014-10-02 12:19:44 +0300874struct mlx5_ifc_cmd_hca_cap_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200875 u8 reserved_at_0[0x30];
876 u8 vhca_id[0x10];
877
878 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +0300879
880 u8 log_max_srq_sz[0x8];
881 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200882 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300883 u8 log_max_qp[0x5];
884
Matan Barakb4ff3a32016-02-09 14:57:42 +0200885 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300886 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200887 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300888
Matan Barakb4ff3a32016-02-09 14:57:42 +0200889 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300890 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200891 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300892 u8 log_max_cq[0x5];
893
894 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200895 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300896 u8 log_max_mkey[0x6];
Leon Romanovskyb183ee22018-06-19 08:47:23 +0300897 u8 reserved_at_f0[0x8];
898 u8 dump_fill_mkey[0x1];
899 u8 reserved_at_f9[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300900 u8 log_max_eq[0x4];
901
902 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200903 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300904 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200905 u8 force_teardown[0x1];
906 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300907 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200908 u8 umr_extended_translation_offset[0x1];
909 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300910 u8 log_max_klm_list_size[0x6];
911
Matan Barakb4ff3a32016-02-09 14:57:42 +0200912 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300913 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200914 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300915 u8 log_max_ra_res_dc[0x6];
916
Matan Barakb4ff3a32016-02-09 14:57:42 +0200917 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300918 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200919 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300920 u8 log_max_ra_res_qp[0x6];
921
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200922 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300923 u8 cc_query_allowed[0x1];
924 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200925 u8 start_pad[0x1];
926 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500927 u8 reserved_at_165[0xa];
928 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300929 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300930
Saeed Mahameede2816822015-05-28 22:28:40 +0300931 u8 out_of_seq_cnt[0x1];
932 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300933 u8 retransmission_q_counters[0x1];
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300934 u8 debug[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300935 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300936 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300937 u8 max_qp_cnt[0xa];
938 u8 pkey_table_size[0x10];
939
Saeed Mahameede2816822015-05-28 22:28:40 +0300940 u8 vport_group_manager[0x1];
941 u8 vhca_group_manager[0x1];
942 u8 ib_virt[0x1];
943 u8 eth_virt[0x1];
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +0200944 u8 vnic_env_queue_counters[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300945 u8 ets[0x1];
946 u8 nic_flow_table[0x1];
Or Gerlitz0efc8562018-05-31 11:16:18 +0300947 u8 eswitch_manager[0x1];
Ariel Levkoviche72bd812018-04-05 18:53:26 +0300948 u8 device_memory[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200949 u8 mcam_reg[0x1];
950 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300951 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200952 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300953 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300954 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200955 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300956 u8 disable_link_up[0x1];
957 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300958 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300959 u8 num_ports[0x8];
960
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300961 u8 reserved_at_1c0[0x1];
962 u8 pps[0x1];
963 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300964 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300965 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200966 u8 max_tc[0x4];
Ilan Tayari1865ea9a2018-05-30 10:59:49 -0700967 u8 temp_warn_event[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300968 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300969 u8 general_notification_event[0x1];
970 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200971 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200972 u8 rol_s[0x1];
973 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300974 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200975 u8 wol_s[0x1];
976 u8 wol_g[0x1];
977 u8 wol_a[0x1];
978 u8 wol_b[0x1];
979 u8 wol_m[0x1];
980 u8 wol_u[0x1];
981 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300982
983 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300984 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300985 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300986
Saeed Mahameede2816822015-05-28 22:28:40 +0300987 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300988 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300989 u8 reserved_at_202[0x1];
990 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200991 u8 ipoib_basic_offloads[0x1];
Majd Dibbinyc8d75a92018-03-22 15:34:04 +0200992 u8 reserved_at_205[0x1];
993 u8 repeated_block_disabled[0x1];
994 u8 umr_modify_entity_size_disabled[0x1];
995 u8 umr_modify_atomic_disabled[0x1];
996 u8 umr_indirect_mkey_disabled[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300997 u8 umr_fence[0x2];
998 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300999 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001000 u8 cmdif_checksum[0x2];
1001 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001002 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001003 u8 wq_signature[0x1];
1004 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001005 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001006 u8 sho[0x1];
1007 u8 tph[0x1];
1008 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001009 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03001010 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001011 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001012 u8 roce[0x1];
1013 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001014 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001015
1016 u8 cq_oi[0x1];
1017 u8 cq_resize[0x1];
1018 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001019 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001020 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001021 u8 pg[0x1];
1022 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001023 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001024 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001025 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001026 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001027 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001028 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02001029 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001030 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +02001031 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001032 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +03001033 u8 qkv[0x1];
1034 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +02001035 u8 set_deth_sqpn[0x1];
1036 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001037 u8 xrc[0x1];
1038 u8 ud[0x1];
1039 u8 uc[0x1];
1040 u8 rc[0x1];
1041
Eli Cohena6d51b62017-01-03 23:55:23 +02001042 u8 uar_4k[0x1];
1043 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +03001044 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001045 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001046 u8 log_pg_sz[0x8];
1047
1048 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02001049 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001050 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001051 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001052 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +03001053
1054 u8 reserved_at_270[0xb];
1055 u8 lag_master[0x1];
1056 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +03001057
Tariq Toukane1c9c622016-04-11 23:10:21 +03001058 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001059 u8 max_wqe_sz_sq[0x10];
1060
Tariq Toukane1c9c622016-04-11 23:10:21 +03001061 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001062 u8 max_wqe_sz_rq[0x10];
1063
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001064 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001065 u8 max_wqe_sz_sq_dc[0x10];
1066
Tariq Toukane1c9c622016-04-11 23:10:21 +03001067 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +03001068 u8 max_qp_mcg[0x19];
1069
Tariq Toukane1c9c622016-04-11 23:10:21 +03001070 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03001071 u8 log_max_mcg[0x8];
1072
Tariq Toukane1c9c622016-04-11 23:10:21 +03001073 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001074 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001075 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001076 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001077 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +03001078 u8 log_max_xrcd[0x5];
1079
Moshe Shemesh5c298142017-12-26 16:46:29 +02001080 u8 nic_receive_steering_discard[0x1];
Moshe Shemeshaaabd072018-01-14 00:56:25 +02001081 u8 receive_discard_vport_down[0x1];
1082 u8 transmit_discard_vport_down[0x1];
1083 u8 reserved_at_343[0x5];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001084 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001085 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001086
Eli Cohenb7755162014-10-02 12:19:44 +03001087
Tariq Toukane1c9c622016-04-11 23:10:21 +03001088 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001089 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001090 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001091 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001092 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001093 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001094 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001095 u8 log_max_tis[0x5];
1096
Saeed Mahameede2816822015-05-28 22:28:40 +03001097 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001098 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001099 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001100 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001101 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001102 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001103 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001104 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001105 u8 log_max_tis_per_sq[0x5];
1106
Tariq Toukan619a8f2a2018-02-07 14:41:25 +02001107 u8 ext_stride_num_range[0x1];
1108 u8 reserved_at_3a1[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001109 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001110 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001111 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001112 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001113 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001114 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001115 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001116
Or Gerlitz40817cd2017-06-25 12:38:45 +03001117 u8 hairpin[0x1];
1118 u8 reserved_at_3c1[0x2];
1119 u8 log_max_hairpin_queues[0x5];
1120 u8 reserved_at_3c8[0x3];
1121 u8 log_max_hairpin_wq_data_sz[0x5];
Or Gerlitz4d533e02018-01-04 12:26:21 +02001122 u8 reserved_at_3d0[0x3];
1123 u8 log_max_hairpin_num_packets[0x5];
1124 u8 reserved_at_3d8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001125 u8 log_max_wq_sz[0x5];
1126
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001127 u8 nic_vport_change_event[0x1];
Eran Ben Elisha8978cc92018-01-09 11:41:10 +02001128 u8 disable_local_lb_uc[0x1];
1129 u8 disable_local_lb_mc[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001130 u8 log_min_hairpin_wq_data_sz[0x5];
1131 u8 reserved_at_3e8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001132 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001133 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001134 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001135 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001136 u8 log_max_current_uc_list[0x5];
1137
Yishai Hadas38b7ca92018-03-08 14:36:27 +02001138 u8 general_obj_types[0x40];
1139
Denis Drozdov342ac842018-08-08 16:23:48 -07001140 u8 reserved_at_440[0x20];
1141
1142 u8 reserved_at_460[0x10];
1143 u8 max_num_eqs[0x10];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001144
Tariq Toukane1c9c622016-04-11 23:10:21 +03001145 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001146 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001147 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001148 u8 log_uar_page_sz[0x10];
1149
Tariq Toukane1c9c622016-04-11 23:10:21 +03001150 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001151 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001152 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001153
Eli Cohena6d51b62017-01-03 23:55:23 +02001154 u8 reserved_at_500[0x20];
1155 u8 num_of_uars_per_page[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001156
Ariel Levkoviche818e252018-05-13 14:33:35 +03001157 u8 flex_parser_protocols[0x20];
1158 u8 reserved_at_560[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001159
Yonatan Cohenab741b22018-05-27 13:42:32 +03001160 u8 reserved_at_580[0x3c];
1161 u8 mini_cqe_resp_stride_index[0x1];
Guy Levi0ff8e792017-10-19 08:25:51 +03001162 u8 cqe_128_always[0x1];
1163 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001164 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001165
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001166 u8 cqe_compression_timeout[0x10];
1167 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001168
Saeed Mahameed74862162016-06-09 15:11:34 +03001169 u8 reserved_at_5e0[0x10];
1170 u8 tag_matching[0x1];
1171 u8 rndv_offload_rc[0x1];
1172 u8 rndv_offload_dc[0x1];
1173 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001174 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001175 u8 log_max_xrq[0x5];
1176
Daniel Jurgens32f69e42018-01-04 17:25:36 +02001177 u8 affiliate_nic_vport_criteria[0x8];
1178 u8 native_port_num[0x8];
1179 u8 num_vhca_ports[0x8];
1180 u8 reserved_at_618[0x6];
1181 u8 sw_owner_id[0x1];
Daniel Jurgens8737f812018-01-04 17:25:32 +02001182 u8 reserved_at_61f[0x1e1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001183};
1184
Saeed Mahameed81848732015-12-01 18:03:20 +02001185enum mlx5_flow_destination_type {
1186 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1187 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1188 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001189
Aviad Yehezkel5f418372018-02-18 13:17:17 +02001190 MLX5_FLOW_DESTINATION_TYPE_PORT = 0x99,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001191 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Yishai Hadas664000b2018-06-19 15:23:36 +03001192 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE_NUM = 0x101,
Saeed Mahameede2816822015-05-28 22:28:40 +03001193};
1194
1195struct mlx5_ifc_dest_format_struct_bits {
1196 u8 destination_type[0x8];
1197 u8 destination_id[0x18];
Shahar Kleinb17f7fc2018-03-22 12:32:12 +02001198 u8 destination_eswitch_owner_vhca_id_valid[0x1];
1199 u8 reserved_at_21[0xf];
1200 u8 destination_eswitch_owner_vhca_id[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001201};
1202
Amir Vadai9dc0b282016-05-13 12:55:39 +00001203struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001204 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001205
1206 u8 reserved_at_20[0x20];
1207};
1208
1209union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1210 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1211 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1212 u8 reserved_at_0[0x40];
1213};
1214
Saeed Mahameede2816822015-05-28 22:28:40 +03001215struct mlx5_ifc_fte_match_param_bits {
1216 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1217
1218 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1219
1220 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1221
Ariel Levkovich71c6e862018-05-13 14:33:34 +03001222 struct mlx5_ifc_fte_match_set_misc2_bits misc_parameters_2;
1223
1224 u8 reserved_at_800[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03001225};
1226
1227enum {
1228 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1229 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1230 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1231 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1232 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1233};
1234
1235struct mlx5_ifc_rx_hash_field_select_bits {
1236 u8 l3_prot_type[0x1];
1237 u8 l4_prot_type[0x1];
1238 u8 selected_fields[0x1e];
1239};
1240
1241enum {
1242 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1243 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1244};
1245
1246enum {
1247 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1248 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1249};
1250
1251struct mlx5_ifc_wq_bits {
1252 u8 wq_type[0x4];
1253 u8 wq_signature[0x1];
1254 u8 end_padding_mode[0x2];
1255 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001256 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001257
1258 u8 hds_skip_first_sge[0x1];
1259 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001260 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001261 u8 page_offset[0x5];
1262 u8 lwm[0x10];
1263
Matan Barakb4ff3a32016-02-09 14:57:42 +02001264 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001265 u8 pd[0x18];
1266
Matan Barakb4ff3a32016-02-09 14:57:42 +02001267 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001268 u8 uar_page[0x18];
1269
1270 u8 dbr_addr[0x40];
1271
1272 u8 hw_counter[0x20];
1273
1274 u8 sw_counter[0x20];
1275
Matan Barakb4ff3a32016-02-09 14:57:42 +02001276 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001277 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001278 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001279 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001280 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001281 u8 log_wq_sz[0x5];
1282
Or Gerlitz4d533e02018-01-04 12:26:21 +02001283 u8 reserved_at_120[0x3];
1284 u8 log_hairpin_num_packets[0x5];
1285 u8 reserved_at_128[0x3];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001286 u8 log_hairpin_data_sz[0x5];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001287
Tariq Toukan619a8f2a2018-02-07 14:41:25 +02001288 u8 reserved_at_130[0x4];
1289 u8 log_wqe_num_of_strides[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001290 u8 two_byte_shift_en[0x1];
1291 u8 reserved_at_139[0x4];
1292 u8 log_wqe_stride_size[0x3];
1293
1294 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001295
1296 struct mlx5_ifc_cmd_pas_bits pas[0];
1297};
1298
1299struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001300 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001301 u8 rq_num[0x18];
1302};
1303
1304struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001305 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001306 u8 mac_addr_47_32[0x10];
1307
1308 u8 mac_addr_31_0[0x20];
1309};
1310
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001311struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001312 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001313 u8 vlan[0x0c];
1314
Matan Barakb4ff3a32016-02-09 14:57:42 +02001315 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001316};
1317
Saeed Mahameede2816822015-05-28 22:28:40 +03001318struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001319 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001320
1321 u8 min_time_between_cnps[0x20];
1322
Matan Barakb4ff3a32016-02-09 14:57:42 +02001323 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001324 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001325 u8 reserved_at_d8[0x4];
1326 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001327 u8 cnp_802p_prio[0x3];
1328
Matan Barakb4ff3a32016-02-09 14:57:42 +02001329 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001330};
1331
1332struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001333 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001334
Matan Barakb4ff3a32016-02-09 14:57:42 +02001335 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001336 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001337 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001338 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001339 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001340
Matan Barakb4ff3a32016-02-09 14:57:42 +02001341 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001342
1343 u8 rpg_time_reset[0x20];
1344
1345 u8 rpg_byte_reset[0x20];
1346
1347 u8 rpg_threshold[0x20];
1348
1349 u8 rpg_max_rate[0x20];
1350
1351 u8 rpg_ai_rate[0x20];
1352
1353 u8 rpg_hai_rate[0x20];
1354
1355 u8 rpg_gd[0x20];
1356
1357 u8 rpg_min_dec_fac[0x20];
1358
1359 u8 rpg_min_rate[0x20];
1360
Matan Barakb4ff3a32016-02-09 14:57:42 +02001361 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001362
1363 u8 rate_to_set_on_first_cnp[0x20];
1364
1365 u8 dce_tcp_g[0x20];
1366
1367 u8 dce_tcp_rtt[0x20];
1368
1369 u8 rate_reduce_monitor_period[0x20];
1370
Matan Barakb4ff3a32016-02-09 14:57:42 +02001371 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001372
1373 u8 initial_alpha_value[0x20];
1374
Matan Barakb4ff3a32016-02-09 14:57:42 +02001375 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001376};
1377
1378struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001379 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001380
1381 u8 rppp_max_rps[0x20];
1382
1383 u8 rpg_time_reset[0x20];
1384
1385 u8 rpg_byte_reset[0x20];
1386
1387 u8 rpg_threshold[0x20];
1388
1389 u8 rpg_max_rate[0x20];
1390
1391 u8 rpg_ai_rate[0x20];
1392
1393 u8 rpg_hai_rate[0x20];
1394
1395 u8 rpg_gd[0x20];
1396
1397 u8 rpg_min_dec_fac[0x20];
1398
1399 u8 rpg_min_rate[0x20];
1400
Matan Barakb4ff3a32016-02-09 14:57:42 +02001401 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001402};
1403
1404enum {
1405 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1406 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1407 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1408};
1409
1410struct mlx5_ifc_resize_field_select_bits {
1411 u8 resize_field_select[0x20];
1412};
1413
1414enum {
1415 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1416 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1417 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1418 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1419};
1420
1421struct mlx5_ifc_modify_field_select_bits {
1422 u8 modify_field_select[0x20];
1423};
1424
1425struct mlx5_ifc_field_select_r_roce_np_bits {
1426 u8 field_select_r_roce_np[0x20];
1427};
1428
1429struct mlx5_ifc_field_select_r_roce_rp_bits {
1430 u8 field_select_r_roce_rp[0x20];
1431};
1432
1433enum {
1434 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1435 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1436 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1437 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1438 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1439 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1440 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1441 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1442 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1443 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1444};
1445
1446struct mlx5_ifc_field_select_802_1qau_rp_bits {
1447 u8 field_select_8021qaurp[0x20];
1448};
1449
1450struct mlx5_ifc_phys_layer_cntrs_bits {
1451 u8 time_since_last_clear_high[0x20];
1452
1453 u8 time_since_last_clear_low[0x20];
1454
1455 u8 symbol_errors_high[0x20];
1456
1457 u8 symbol_errors_low[0x20];
1458
1459 u8 sync_headers_errors_high[0x20];
1460
1461 u8 sync_headers_errors_low[0x20];
1462
1463 u8 edpl_bip_errors_lane0_high[0x20];
1464
1465 u8 edpl_bip_errors_lane0_low[0x20];
1466
1467 u8 edpl_bip_errors_lane1_high[0x20];
1468
1469 u8 edpl_bip_errors_lane1_low[0x20];
1470
1471 u8 edpl_bip_errors_lane2_high[0x20];
1472
1473 u8 edpl_bip_errors_lane2_low[0x20];
1474
1475 u8 edpl_bip_errors_lane3_high[0x20];
1476
1477 u8 edpl_bip_errors_lane3_low[0x20];
1478
1479 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1480
1481 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1482
1483 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1484
1485 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1486
1487 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1488
1489 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1490
1491 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1492
1493 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1494
1495 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1496
1497 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1498
1499 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1500
1501 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1502
1503 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1504
1505 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1506
1507 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1508
1509 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1510
1511 u8 rs_fec_corrected_blocks_high[0x20];
1512
1513 u8 rs_fec_corrected_blocks_low[0x20];
1514
1515 u8 rs_fec_uncorrectable_blocks_high[0x20];
1516
1517 u8 rs_fec_uncorrectable_blocks_low[0x20];
1518
1519 u8 rs_fec_no_errors_blocks_high[0x20];
1520
1521 u8 rs_fec_no_errors_blocks_low[0x20];
1522
1523 u8 rs_fec_single_error_blocks_high[0x20];
1524
1525 u8 rs_fec_single_error_blocks_low[0x20];
1526
1527 u8 rs_fec_corrected_symbols_total_high[0x20];
1528
1529 u8 rs_fec_corrected_symbols_total_low[0x20];
1530
1531 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1532
1533 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1534
1535 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1536
1537 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1538
1539 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1540
1541 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1542
1543 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1544
1545 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1546
1547 u8 link_down_events[0x20];
1548
1549 u8 successful_recovery_events[0x20];
1550
Matan Barakb4ff3a32016-02-09 14:57:42 +02001551 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001552};
1553
Gal Pressmand8dc0502016-09-27 17:04:51 +03001554struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1555 u8 time_since_last_clear_high[0x20];
1556
1557 u8 time_since_last_clear_low[0x20];
1558
1559 u8 phy_received_bits_high[0x20];
1560
1561 u8 phy_received_bits_low[0x20];
1562
1563 u8 phy_symbol_errors_high[0x20];
1564
1565 u8 phy_symbol_errors_low[0x20];
1566
1567 u8 phy_corrected_bits_high[0x20];
1568
1569 u8 phy_corrected_bits_low[0x20];
1570
1571 u8 phy_corrected_bits_lane0_high[0x20];
1572
1573 u8 phy_corrected_bits_lane0_low[0x20];
1574
1575 u8 phy_corrected_bits_lane1_high[0x20];
1576
1577 u8 phy_corrected_bits_lane1_low[0x20];
1578
1579 u8 phy_corrected_bits_lane2_high[0x20];
1580
1581 u8 phy_corrected_bits_lane2_low[0x20];
1582
1583 u8 phy_corrected_bits_lane3_high[0x20];
1584
1585 u8 phy_corrected_bits_lane3_low[0x20];
1586
1587 u8 reserved_at_200[0x5c0];
1588};
1589
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001590struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1591 u8 symbol_error_counter[0x10];
1592
1593 u8 link_error_recovery_counter[0x8];
1594
1595 u8 link_downed_counter[0x8];
1596
1597 u8 port_rcv_errors[0x10];
1598
1599 u8 port_rcv_remote_physical_errors[0x10];
1600
1601 u8 port_rcv_switch_relay_errors[0x10];
1602
1603 u8 port_xmit_discards[0x10];
1604
1605 u8 port_xmit_constraint_errors[0x8];
1606
1607 u8 port_rcv_constraint_errors[0x8];
1608
1609 u8 reserved_at_70[0x8];
1610
1611 u8 link_overrun_errors[0x8];
1612
1613 u8 reserved_at_80[0x10];
1614
1615 u8 vl_15_dropped[0x10];
1616
Tim Wright133bea02017-05-01 17:30:08 +01001617 u8 reserved_at_a0[0x80];
1618
1619 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001620};
1621
Saeed Mahameede2816822015-05-28 22:28:40 +03001622struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1623 u8 transmit_queue_high[0x20];
1624
1625 u8 transmit_queue_low[0x20];
1626
Matan Barakb4ff3a32016-02-09 14:57:42 +02001627 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001628};
1629
1630struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1631 u8 rx_octets_high[0x20];
1632
1633 u8 rx_octets_low[0x20];
1634
Matan Barakb4ff3a32016-02-09 14:57:42 +02001635 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001636
1637 u8 rx_frames_high[0x20];
1638
1639 u8 rx_frames_low[0x20];
1640
1641 u8 tx_octets_high[0x20];
1642
1643 u8 tx_octets_low[0x20];
1644
Matan Barakb4ff3a32016-02-09 14:57:42 +02001645 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001646
1647 u8 tx_frames_high[0x20];
1648
1649 u8 tx_frames_low[0x20];
1650
1651 u8 rx_pause_high[0x20];
1652
1653 u8 rx_pause_low[0x20];
1654
1655 u8 rx_pause_duration_high[0x20];
1656
1657 u8 rx_pause_duration_low[0x20];
1658
1659 u8 tx_pause_high[0x20];
1660
1661 u8 tx_pause_low[0x20];
1662
1663 u8 tx_pause_duration_high[0x20];
1664
1665 u8 tx_pause_duration_low[0x20];
1666
1667 u8 rx_pause_transition_high[0x20];
1668
1669 u8 rx_pause_transition_low[0x20];
1670
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03001671 u8 reserved_at_3c0[0x40];
1672
1673 u8 device_stall_minor_watermark_cnt_high[0x20];
1674
1675 u8 device_stall_minor_watermark_cnt_low[0x20];
1676
1677 u8 device_stall_critical_watermark_cnt_high[0x20];
1678
1679 u8 device_stall_critical_watermark_cnt_low[0x20];
1680
1681 u8 reserved_at_480[0x340];
Saeed Mahameede2816822015-05-28 22:28:40 +03001682};
1683
1684struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1685 u8 port_transmit_wait_high[0x20];
1686
1687 u8 port_transmit_wait_low[0x20];
1688
Gal Pressman2dba0792017-06-18 14:56:45 +03001689 u8 reserved_at_40[0x100];
1690
1691 u8 rx_buffer_almost_full_high[0x20];
1692
1693 u8 rx_buffer_almost_full_low[0x20];
1694
1695 u8 rx_buffer_full_high[0x20];
1696
1697 u8 rx_buffer_full_low[0x20];
1698
Talat Batheesh0af51072018-05-17 11:14:18 +03001699 u8 rx_icrc_encapsulated_high[0x20];
1700
1701 u8 rx_icrc_encapsulated_low[0x20];
1702
1703 u8 reserved_at_200[0x5c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001704};
1705
1706struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1707 u8 dot3stats_alignment_errors_high[0x20];
1708
1709 u8 dot3stats_alignment_errors_low[0x20];
1710
1711 u8 dot3stats_fcs_errors_high[0x20];
1712
1713 u8 dot3stats_fcs_errors_low[0x20];
1714
1715 u8 dot3stats_single_collision_frames_high[0x20];
1716
1717 u8 dot3stats_single_collision_frames_low[0x20];
1718
1719 u8 dot3stats_multiple_collision_frames_high[0x20];
1720
1721 u8 dot3stats_multiple_collision_frames_low[0x20];
1722
1723 u8 dot3stats_sqe_test_errors_high[0x20];
1724
1725 u8 dot3stats_sqe_test_errors_low[0x20];
1726
1727 u8 dot3stats_deferred_transmissions_high[0x20];
1728
1729 u8 dot3stats_deferred_transmissions_low[0x20];
1730
1731 u8 dot3stats_late_collisions_high[0x20];
1732
1733 u8 dot3stats_late_collisions_low[0x20];
1734
1735 u8 dot3stats_excessive_collisions_high[0x20];
1736
1737 u8 dot3stats_excessive_collisions_low[0x20];
1738
1739 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1740
1741 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1742
1743 u8 dot3stats_carrier_sense_errors_high[0x20];
1744
1745 u8 dot3stats_carrier_sense_errors_low[0x20];
1746
1747 u8 dot3stats_frame_too_longs_high[0x20];
1748
1749 u8 dot3stats_frame_too_longs_low[0x20];
1750
1751 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1752
1753 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1754
1755 u8 dot3stats_symbol_errors_high[0x20];
1756
1757 u8 dot3stats_symbol_errors_low[0x20];
1758
1759 u8 dot3control_in_unknown_opcodes_high[0x20];
1760
1761 u8 dot3control_in_unknown_opcodes_low[0x20];
1762
1763 u8 dot3in_pause_frames_high[0x20];
1764
1765 u8 dot3in_pause_frames_low[0x20];
1766
1767 u8 dot3out_pause_frames_high[0x20];
1768
1769 u8 dot3out_pause_frames_low[0x20];
1770
Matan Barakb4ff3a32016-02-09 14:57:42 +02001771 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001772};
1773
1774struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1775 u8 ether_stats_drop_events_high[0x20];
1776
1777 u8 ether_stats_drop_events_low[0x20];
1778
1779 u8 ether_stats_octets_high[0x20];
1780
1781 u8 ether_stats_octets_low[0x20];
1782
1783 u8 ether_stats_pkts_high[0x20];
1784
1785 u8 ether_stats_pkts_low[0x20];
1786
1787 u8 ether_stats_broadcast_pkts_high[0x20];
1788
1789 u8 ether_stats_broadcast_pkts_low[0x20];
1790
1791 u8 ether_stats_multicast_pkts_high[0x20];
1792
1793 u8 ether_stats_multicast_pkts_low[0x20];
1794
1795 u8 ether_stats_crc_align_errors_high[0x20];
1796
1797 u8 ether_stats_crc_align_errors_low[0x20];
1798
1799 u8 ether_stats_undersize_pkts_high[0x20];
1800
1801 u8 ether_stats_undersize_pkts_low[0x20];
1802
1803 u8 ether_stats_oversize_pkts_high[0x20];
1804
1805 u8 ether_stats_oversize_pkts_low[0x20];
1806
1807 u8 ether_stats_fragments_high[0x20];
1808
1809 u8 ether_stats_fragments_low[0x20];
1810
1811 u8 ether_stats_jabbers_high[0x20];
1812
1813 u8 ether_stats_jabbers_low[0x20];
1814
1815 u8 ether_stats_collisions_high[0x20];
1816
1817 u8 ether_stats_collisions_low[0x20];
1818
1819 u8 ether_stats_pkts64octets_high[0x20];
1820
1821 u8 ether_stats_pkts64octets_low[0x20];
1822
1823 u8 ether_stats_pkts65to127octets_high[0x20];
1824
1825 u8 ether_stats_pkts65to127octets_low[0x20];
1826
1827 u8 ether_stats_pkts128to255octets_high[0x20];
1828
1829 u8 ether_stats_pkts128to255octets_low[0x20];
1830
1831 u8 ether_stats_pkts256to511octets_high[0x20];
1832
1833 u8 ether_stats_pkts256to511octets_low[0x20];
1834
1835 u8 ether_stats_pkts512to1023octets_high[0x20];
1836
1837 u8 ether_stats_pkts512to1023octets_low[0x20];
1838
1839 u8 ether_stats_pkts1024to1518octets_high[0x20];
1840
1841 u8 ether_stats_pkts1024to1518octets_low[0x20];
1842
1843 u8 ether_stats_pkts1519to2047octets_high[0x20];
1844
1845 u8 ether_stats_pkts1519to2047octets_low[0x20];
1846
1847 u8 ether_stats_pkts2048to4095octets_high[0x20];
1848
1849 u8 ether_stats_pkts2048to4095octets_low[0x20];
1850
1851 u8 ether_stats_pkts4096to8191octets_high[0x20];
1852
1853 u8 ether_stats_pkts4096to8191octets_low[0x20];
1854
1855 u8 ether_stats_pkts8192to10239octets_high[0x20];
1856
1857 u8 ether_stats_pkts8192to10239octets_low[0x20];
1858
Matan Barakb4ff3a32016-02-09 14:57:42 +02001859 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001860};
1861
1862struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1863 u8 if_in_octets_high[0x20];
1864
1865 u8 if_in_octets_low[0x20];
1866
1867 u8 if_in_ucast_pkts_high[0x20];
1868
1869 u8 if_in_ucast_pkts_low[0x20];
1870
1871 u8 if_in_discards_high[0x20];
1872
1873 u8 if_in_discards_low[0x20];
1874
1875 u8 if_in_errors_high[0x20];
1876
1877 u8 if_in_errors_low[0x20];
1878
1879 u8 if_in_unknown_protos_high[0x20];
1880
1881 u8 if_in_unknown_protos_low[0x20];
1882
1883 u8 if_out_octets_high[0x20];
1884
1885 u8 if_out_octets_low[0x20];
1886
1887 u8 if_out_ucast_pkts_high[0x20];
1888
1889 u8 if_out_ucast_pkts_low[0x20];
1890
1891 u8 if_out_discards_high[0x20];
1892
1893 u8 if_out_discards_low[0x20];
1894
1895 u8 if_out_errors_high[0x20];
1896
1897 u8 if_out_errors_low[0x20];
1898
1899 u8 if_in_multicast_pkts_high[0x20];
1900
1901 u8 if_in_multicast_pkts_low[0x20];
1902
1903 u8 if_in_broadcast_pkts_high[0x20];
1904
1905 u8 if_in_broadcast_pkts_low[0x20];
1906
1907 u8 if_out_multicast_pkts_high[0x20];
1908
1909 u8 if_out_multicast_pkts_low[0x20];
1910
1911 u8 if_out_broadcast_pkts_high[0x20];
1912
1913 u8 if_out_broadcast_pkts_low[0x20];
1914
Matan Barakb4ff3a32016-02-09 14:57:42 +02001915 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001916};
1917
1918struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1919 u8 a_frames_transmitted_ok_high[0x20];
1920
1921 u8 a_frames_transmitted_ok_low[0x20];
1922
1923 u8 a_frames_received_ok_high[0x20];
1924
1925 u8 a_frames_received_ok_low[0x20];
1926
1927 u8 a_frame_check_sequence_errors_high[0x20];
1928
1929 u8 a_frame_check_sequence_errors_low[0x20];
1930
1931 u8 a_alignment_errors_high[0x20];
1932
1933 u8 a_alignment_errors_low[0x20];
1934
1935 u8 a_octets_transmitted_ok_high[0x20];
1936
1937 u8 a_octets_transmitted_ok_low[0x20];
1938
1939 u8 a_octets_received_ok_high[0x20];
1940
1941 u8 a_octets_received_ok_low[0x20];
1942
1943 u8 a_multicast_frames_xmitted_ok_high[0x20];
1944
1945 u8 a_multicast_frames_xmitted_ok_low[0x20];
1946
1947 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1948
1949 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1950
1951 u8 a_multicast_frames_received_ok_high[0x20];
1952
1953 u8 a_multicast_frames_received_ok_low[0x20];
1954
1955 u8 a_broadcast_frames_received_ok_high[0x20];
1956
1957 u8 a_broadcast_frames_received_ok_low[0x20];
1958
1959 u8 a_in_range_length_errors_high[0x20];
1960
1961 u8 a_in_range_length_errors_low[0x20];
1962
1963 u8 a_out_of_range_length_field_high[0x20];
1964
1965 u8 a_out_of_range_length_field_low[0x20];
1966
1967 u8 a_frame_too_long_errors_high[0x20];
1968
1969 u8 a_frame_too_long_errors_low[0x20];
1970
1971 u8 a_symbol_error_during_carrier_high[0x20];
1972
1973 u8 a_symbol_error_during_carrier_low[0x20];
1974
1975 u8 a_mac_control_frames_transmitted_high[0x20];
1976
1977 u8 a_mac_control_frames_transmitted_low[0x20];
1978
1979 u8 a_mac_control_frames_received_high[0x20];
1980
1981 u8 a_mac_control_frames_received_low[0x20];
1982
1983 u8 a_unsupported_opcodes_received_high[0x20];
1984
1985 u8 a_unsupported_opcodes_received_low[0x20];
1986
1987 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1988
1989 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1990
1991 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1992
1993 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1994
Matan Barakb4ff3a32016-02-09 14:57:42 +02001995 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001996};
1997
Gal Pressman8ed1a632016-11-17 13:46:01 +02001998struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1999 u8 life_time_counter_high[0x20];
2000
2001 u8 life_time_counter_low[0x20];
2002
2003 u8 rx_errors[0x20];
2004
2005 u8 tx_errors[0x20];
2006
2007 u8 l0_to_recovery_eieos[0x20];
2008
2009 u8 l0_to_recovery_ts[0x20];
2010
2011 u8 l0_to_recovery_framing[0x20];
2012
2013 u8 l0_to_recovery_retrain[0x20];
2014
2015 u8 crc_error_dllp[0x20];
2016
2017 u8 crc_error_tlp[0x20];
2018
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03002019 u8 tx_overflow_buffer_pkt_high[0x20];
2020
2021 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03002022
2023 u8 outbound_stalled_reads[0x20];
2024
2025 u8 outbound_stalled_writes[0x20];
2026
2027 u8 outbound_stalled_reads_events[0x20];
2028
2029 u8 outbound_stalled_writes_events[0x20];
2030
2031 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02002032};
2033
Saeed Mahameede2816822015-05-28 22:28:40 +03002034struct mlx5_ifc_cmd_inter_comp_event_bits {
2035 u8 command_completion_vector[0x20];
2036
Matan Barakb4ff3a32016-02-09 14:57:42 +02002037 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002038};
2039
2040struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002041 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002042 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002043 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002044 u8 vl[0x4];
2045
Matan Barakb4ff3a32016-02-09 14:57:42 +02002046 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002047};
2048
2049struct mlx5_ifc_db_bf_congestion_event_bits {
2050 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002051 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002052 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002053 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002054
Matan Barakb4ff3a32016-02-09 14:57:42 +02002055 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002056};
2057
2058struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002059 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002060
2061 u8 gpio_event_hi[0x20];
2062
2063 u8 gpio_event_lo[0x20];
2064
Matan Barakb4ff3a32016-02-09 14:57:42 +02002065 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002066};
2067
2068struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002069 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002070
2071 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002072 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002073
Matan Barakb4ff3a32016-02-09 14:57:42 +02002074 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002075};
2076
2077struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002078 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002079};
2080
2081enum {
2082 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
2083 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
2084};
2085
2086struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002087 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002088 u8 cqn[0x18];
2089
Matan Barakb4ff3a32016-02-09 14:57:42 +02002090 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002091
Matan Barakb4ff3a32016-02-09 14:57:42 +02002092 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002093 u8 syndrome[0x8];
2094
Matan Barakb4ff3a32016-02-09 14:57:42 +02002095 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002096};
2097
2098struct mlx5_ifc_rdma_page_fault_event_bits {
2099 u8 bytes_committed[0x20];
2100
2101 u8 r_key[0x20];
2102
Matan Barakb4ff3a32016-02-09 14:57:42 +02002103 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002104 u8 packet_len[0x10];
2105
2106 u8 rdma_op_len[0x20];
2107
2108 u8 rdma_va[0x40];
2109
Matan Barakb4ff3a32016-02-09 14:57:42 +02002110 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002111 u8 rdma[0x1];
2112 u8 write[0x1];
2113 u8 requestor[0x1];
2114 u8 qp_number[0x18];
2115};
2116
2117struct mlx5_ifc_wqe_associated_page_fault_event_bits {
2118 u8 bytes_committed[0x20];
2119
Matan Barakb4ff3a32016-02-09 14:57:42 +02002120 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002121 u8 wqe_index[0x10];
2122
Matan Barakb4ff3a32016-02-09 14:57:42 +02002123 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002124 u8 len[0x10];
2125
Matan Barakb4ff3a32016-02-09 14:57:42 +02002126 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002127
Matan Barakb4ff3a32016-02-09 14:57:42 +02002128 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002129 u8 rdma[0x1];
2130 u8 write_read[0x1];
2131 u8 requestor[0x1];
2132 u8 qpn[0x18];
2133};
2134
2135struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002136 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002137
2138 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002139 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002140
Matan Barakb4ff3a32016-02-09 14:57:42 +02002141 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002142 u8 qpn_rqn_sqn[0x18];
2143};
2144
2145struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002146 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002147
Matan Barakb4ff3a32016-02-09 14:57:42 +02002148 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002149 u8 dct_number[0x18];
2150};
2151
2152struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002153 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002154
Matan Barakb4ff3a32016-02-09 14:57:42 +02002155 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002156 u8 cq_number[0x18];
2157};
2158
2159enum {
2160 MLX5_QPC_STATE_RST = 0x0,
2161 MLX5_QPC_STATE_INIT = 0x1,
2162 MLX5_QPC_STATE_RTR = 0x2,
2163 MLX5_QPC_STATE_RTS = 0x3,
2164 MLX5_QPC_STATE_SQER = 0x4,
2165 MLX5_QPC_STATE_ERR = 0x6,
2166 MLX5_QPC_STATE_SQD = 0x7,
2167 MLX5_QPC_STATE_SUSPENDED = 0x9,
2168};
2169
2170enum {
2171 MLX5_QPC_ST_RC = 0x0,
2172 MLX5_QPC_ST_UC = 0x1,
2173 MLX5_QPC_ST_UD = 0x2,
2174 MLX5_QPC_ST_XRC = 0x3,
2175 MLX5_QPC_ST_DCI = 0x5,
2176 MLX5_QPC_ST_QP0 = 0x7,
2177 MLX5_QPC_ST_QP1 = 0x8,
2178 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2179 MLX5_QPC_ST_REG_UMR = 0xc,
2180};
2181
2182enum {
2183 MLX5_QPC_PM_STATE_ARMED = 0x0,
2184 MLX5_QPC_PM_STATE_REARM = 0x1,
2185 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2186 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2187};
2188
2189enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002190 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2191};
2192
2193enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002194 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2195 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2196};
2197
2198enum {
2199 MLX5_QPC_MTU_256_BYTES = 0x1,
2200 MLX5_QPC_MTU_512_BYTES = 0x2,
2201 MLX5_QPC_MTU_1K_BYTES = 0x3,
2202 MLX5_QPC_MTU_2K_BYTES = 0x4,
2203 MLX5_QPC_MTU_4K_BYTES = 0x5,
2204 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2205};
2206
2207enum {
2208 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2209 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2210 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2211 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2212 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2213 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2214 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2215 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2216};
2217
2218enum {
2219 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2220 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2221 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2222};
2223
2224enum {
2225 MLX5_QPC_CS_RES_DISABLE = 0x0,
2226 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2227 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2228};
2229
2230struct mlx5_ifc_qpc_bits {
2231 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002232 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002233 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002234 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002235 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002236 u8 reserved_at_15[0x3];
2237 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002238 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002239 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002240
2241 u8 wq_signature[0x1];
2242 u8 block_lb_mc[0x1];
2243 u8 atomic_like_write_en[0x1];
2244 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002245 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002246 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002247 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002248 u8 pd[0x18];
2249
2250 u8 mtu[0x3];
2251 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002252 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002253 u8 log_rq_size[0x4];
2254 u8 log_rq_stride[0x3];
2255 u8 no_sq[0x1];
2256 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002257 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002258 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002259 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002260
2261 u8 counter_set_id[0x8];
2262 u8 uar_page[0x18];
2263
Matan Barakb4ff3a32016-02-09 14:57:42 +02002264 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002265 u8 user_index[0x18];
2266
Matan Barakb4ff3a32016-02-09 14:57:42 +02002267 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002268 u8 log_page_size[0x5];
2269 u8 remote_qpn[0x18];
2270
2271 struct mlx5_ifc_ads_bits primary_address_path;
2272
2273 struct mlx5_ifc_ads_bits secondary_address_path;
2274
2275 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002276 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002277 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002278 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002279 u8 retry_count[0x3];
2280 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002281 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002282 u8 fre[0x1];
2283 u8 cur_rnr_retry[0x3];
2284 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002285 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002286
Matan Barakb4ff3a32016-02-09 14:57:42 +02002287 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002288
Matan Barakb4ff3a32016-02-09 14:57:42 +02002289 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002290 u8 next_send_psn[0x18];
2291
Matan Barakb4ff3a32016-02-09 14:57:42 +02002292 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002293 u8 cqn_snd[0x18];
2294
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002295 u8 reserved_at_400[0x8];
2296 u8 deth_sqpn[0x18];
2297
2298 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002299
Matan Barakb4ff3a32016-02-09 14:57:42 +02002300 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002301 u8 last_acked_psn[0x18];
2302
Matan Barakb4ff3a32016-02-09 14:57:42 +02002303 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002304 u8 ssn[0x18];
2305
Matan Barakb4ff3a32016-02-09 14:57:42 +02002306 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002307 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002308 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002309 u8 atomic_mode[0x4];
2310 u8 rre[0x1];
2311 u8 rwe[0x1];
2312 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002313 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002314 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002315 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002316 u8 cd_slave_receive[0x1];
2317 u8 cd_slave_send[0x1];
2318 u8 cd_master[0x1];
2319
Matan Barakb4ff3a32016-02-09 14:57:42 +02002320 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002321 u8 min_rnr_nak[0x5];
2322 u8 next_rcv_psn[0x18];
2323
Matan Barakb4ff3a32016-02-09 14:57:42 +02002324 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002325 u8 xrcd[0x18];
2326
Matan Barakb4ff3a32016-02-09 14:57:42 +02002327 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002328 u8 cqn_rcv[0x18];
2329
2330 u8 dbr_addr[0x40];
2331
2332 u8 q_key[0x20];
2333
Matan Barakb4ff3a32016-02-09 14:57:42 +02002334 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002335 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002336 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002337
Matan Barakb4ff3a32016-02-09 14:57:42 +02002338 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002339 u8 rmsn[0x18];
2340
2341 u8 hw_sq_wqebb_counter[0x10];
2342 u8 sw_sq_wqebb_counter[0x10];
2343
2344 u8 hw_rq_counter[0x20];
2345
2346 u8 sw_rq_counter[0x20];
2347
Matan Barakb4ff3a32016-02-09 14:57:42 +02002348 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002349
Matan Barakb4ff3a32016-02-09 14:57:42 +02002350 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002351 u8 cgs[0x1];
2352 u8 cs_req[0x8];
2353 u8 cs_res[0x8];
2354
2355 u8 dc_access_key[0x40];
2356
Matan Barakb4ff3a32016-02-09 14:57:42 +02002357 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002358};
2359
2360struct mlx5_ifc_roce_addr_layout_bits {
2361 u8 source_l3_address[16][0x8];
2362
Matan Barakb4ff3a32016-02-09 14:57:42 +02002363 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002364 u8 vlan_valid[0x1];
2365 u8 vlan_id[0xc];
2366 u8 source_mac_47_32[0x10];
2367
2368 u8 source_mac_31_0[0x20];
2369
Matan Barakb4ff3a32016-02-09 14:57:42 +02002370 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002371 u8 roce_l3_type[0x4];
2372 u8 roce_version[0x8];
2373
Matan Barakb4ff3a32016-02-09 14:57:42 +02002374 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002375};
2376
2377union mlx5_ifc_hca_cap_union_bits {
2378 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2379 struct mlx5_ifc_odp_cap_bits odp_cap;
2380 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2381 struct mlx5_ifc_roce_cap_bits roce_cap;
2382 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2383 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002384 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002385 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002386 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002387 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002388 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002389 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002390};
2391
2392enum {
2393 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2394 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2395 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002396 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Mark Bloch60786f02018-08-28 14:18:46 +03002397 MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT = 0x10,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002398 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002399 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Or Gerlitz0c068972018-01-28 20:14:20 +02002400 MLX5_FLOW_CONTEXT_ACTION_VLAN_POP = 0x80,
2401 MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH = 0x100,
Jianbo Liu8da6fe22018-07-16 18:35:32 -07002402 MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2 = 0x400,
2403 MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2 = 0x800,
Or Gerlitz0c068972018-01-28 20:14:20 +02002404};
2405
2406struct mlx5_ifc_vlan_bits {
2407 u8 ethtype[0x10];
2408 u8 prio[0x3];
2409 u8 cfi[0x1];
2410 u8 vid[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002411};
2412
2413struct mlx5_ifc_flow_context_bits {
Or Gerlitz0c068972018-01-28 20:14:20 +02002414 struct mlx5_ifc_vlan_bits push_vlan;
Saeed Mahameede2816822015-05-28 22:28:40 +03002415
2416 u8 group_id[0x20];
2417
Matan Barakb4ff3a32016-02-09 14:57:42 +02002418 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002419 u8 flow_tag[0x18];
2420
Matan Barakb4ff3a32016-02-09 14:57:42 +02002421 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002422 u8 action[0x10];
2423
Matan Barakb4ff3a32016-02-09 14:57:42 +02002424 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002425 u8 destination_list_size[0x18];
2426
Amir Vadai9dc0b282016-05-13 12:55:39 +00002427 u8 reserved_at_a0[0x8];
2428 u8 flow_counter_list_size[0x18];
2429
Mark Bloch60786f02018-08-28 14:18:46 +03002430 u8 packet_reformat_id[0x20];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002431
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002432 u8 modify_header_id[0x20];
2433
Jianbo Liu8da6fe22018-07-16 18:35:32 -07002434 struct mlx5_ifc_vlan_bits push_vlan_2;
2435
2436 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002437
2438 struct mlx5_ifc_fte_match_param_bits match_value;
2439
Matan Barakb4ff3a32016-02-09 14:57:42 +02002440 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002441
Amir Vadai9dc0b282016-05-13 12:55:39 +00002442 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002443};
2444
2445enum {
2446 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2447 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2448};
2449
2450struct mlx5_ifc_xrc_srqc_bits {
2451 u8 state[0x4];
2452 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002453 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002454
2455 u8 wq_signature[0x1];
2456 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002457 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002458 u8 rlky[0x1];
2459 u8 basic_cyclic_rcv_wqe[0x1];
2460 u8 log_rq_stride[0x3];
2461 u8 xrcd[0x18];
2462
2463 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002464 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002465 u8 cqn[0x18];
2466
Matan Barakb4ff3a32016-02-09 14:57:42 +02002467 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002468
2469 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002470 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002471 u8 log_page_size[0x6];
2472 u8 user_index[0x18];
2473
Matan Barakb4ff3a32016-02-09 14:57:42 +02002474 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002475
Matan Barakb4ff3a32016-02-09 14:57:42 +02002476 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002477 u8 pd[0x18];
2478
2479 u8 lwm[0x10];
2480 u8 wqe_cnt[0x10];
2481
Matan Barakb4ff3a32016-02-09 14:57:42 +02002482 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002483
2484 u8 db_record_addr_h[0x20];
2485
2486 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002487 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002488
Matan Barakb4ff3a32016-02-09 14:57:42 +02002489 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002490};
2491
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +02002492struct mlx5_ifc_vnic_diagnostic_statistics_bits {
2493 u8 counter_error_queues[0x20];
2494
2495 u8 total_error_queues[0x20];
2496
2497 u8 send_queue_priority_update_flow[0x20];
2498
2499 u8 reserved_at_60[0x20];
2500
2501 u8 nic_receive_steering_discard[0x40];
2502
2503 u8 receive_discard_vport_down[0x40];
2504
2505 u8 transmit_discard_vport_down[0x40];
2506
2507 u8 reserved_at_140[0xec0];
2508};
2509
Saeed Mahameede2816822015-05-28 22:28:40 +03002510struct mlx5_ifc_traffic_counter_bits {
2511 u8 packets[0x40];
2512
2513 u8 octets[0x40];
2514};
2515
2516struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002517 u8 strict_lag_tx_port_affinity[0x1];
2518 u8 reserved_at_1[0x3];
2519 u8 lag_tx_port_affinity[0x04];
2520
2521 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002522 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002523 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002524
Matan Barakb4ff3a32016-02-09 14:57:42 +02002525 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002526
Matan Barakb4ff3a32016-02-09 14:57:42 +02002527 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002528 u8 transport_domain[0x18];
2529
Erez Shitrit500a3d02017-04-13 06:36:51 +03002530 u8 reserved_at_140[0x8];
2531 u8 underlay_qpn[0x18];
2532 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002533};
2534
2535enum {
2536 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2537 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2538};
2539
2540enum {
2541 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2542 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2543};
2544
2545enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002546 MLX5_RX_HASH_FN_NONE = 0x0,
2547 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2548 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002549};
2550
2551enum {
2552 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2553 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2554};
2555
2556struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002557 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002558
2559 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002560 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002561
Matan Barakb4ff3a32016-02-09 14:57:42 +02002562 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002563
Matan Barakb4ff3a32016-02-09 14:57:42 +02002564 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002565 u8 lro_timeout_period_usecs[0x10];
2566 u8 lro_enable_mask[0x4];
2567 u8 lro_max_ip_payload_size[0x8];
2568
Matan Barakb4ff3a32016-02-09 14:57:42 +02002569 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002570
Matan Barakb4ff3a32016-02-09 14:57:42 +02002571 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002572 u8 inline_rqn[0x18];
2573
2574 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002575 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002576 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002577 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002578 u8 indirect_table[0x18];
2579
2580 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002581 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002582 u8 self_lb_block[0x2];
2583 u8 transport_domain[0x18];
2584
2585 u8 rx_hash_toeplitz_key[10][0x20];
2586
2587 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2588
2589 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2590
Matan Barakb4ff3a32016-02-09 14:57:42 +02002591 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002592};
2593
2594enum {
2595 MLX5_SRQC_STATE_GOOD = 0x0,
2596 MLX5_SRQC_STATE_ERROR = 0x1,
2597};
2598
2599struct mlx5_ifc_srqc_bits {
2600 u8 state[0x4];
2601 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002602 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002603
2604 u8 wq_signature[0x1];
2605 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002606 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002607 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002608 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002609 u8 log_rq_stride[0x3];
2610 u8 xrcd[0x18];
2611
2612 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002613 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002614 u8 cqn[0x18];
2615
Matan Barakb4ff3a32016-02-09 14:57:42 +02002616 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002617
Matan Barakb4ff3a32016-02-09 14:57:42 +02002618 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002619 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002620 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002621
Matan Barakb4ff3a32016-02-09 14:57:42 +02002622 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002623
Matan Barakb4ff3a32016-02-09 14:57:42 +02002624 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002625 u8 pd[0x18];
2626
2627 u8 lwm[0x10];
2628 u8 wqe_cnt[0x10];
2629
Matan Barakb4ff3a32016-02-09 14:57:42 +02002630 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002631
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002632 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002633
Matan Barakb4ff3a32016-02-09 14:57:42 +02002634 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002635};
2636
2637enum {
2638 MLX5_SQC_STATE_RST = 0x0,
2639 MLX5_SQC_STATE_RDY = 0x1,
2640 MLX5_SQC_STATE_ERR = 0x3,
2641};
2642
2643struct mlx5_ifc_sqc_bits {
2644 u8 rlky[0x1];
2645 u8 cd_master[0x1];
2646 u8 fre[0x1];
2647 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002648 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002649 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002650 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002651 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002652 u8 allow_swp[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002653 u8 hairpin[0x1];
2654 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002655
Matan Barakb4ff3a32016-02-09 14:57:42 +02002656 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002657 u8 user_index[0x18];
2658
Matan Barakb4ff3a32016-02-09 14:57:42 +02002659 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002660 u8 cqn[0x18];
2661
Or Gerlitz40817cd2017-06-25 12:38:45 +03002662 u8 reserved_at_60[0x8];
2663 u8 hairpin_peer_rq[0x18];
2664
2665 u8 reserved_at_80[0x10];
2666 u8 hairpin_peer_vhca[0x10];
2667
2668 u8 reserved_at_a0[0x50];
Saeed Mahameede2816822015-05-28 22:28:40 +03002669
Saeed Mahameed74862162016-06-09 15:11:34 +03002670 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002671 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002672 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002673
Matan Barakb4ff3a32016-02-09 14:57:42 +02002674 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002675
Matan Barakb4ff3a32016-02-09 14:57:42 +02002676 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002677 u8 tis_num_0[0x18];
2678
2679 struct mlx5_ifc_wq_bits wq;
2680};
2681
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002682enum {
2683 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2684 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2685 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2686 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2687};
2688
2689struct mlx5_ifc_scheduling_context_bits {
2690 u8 element_type[0x8];
2691 u8 reserved_at_8[0x18];
2692
2693 u8 element_attributes[0x20];
2694
2695 u8 parent_element_id[0x20];
2696
2697 u8 reserved_at_60[0x40];
2698
2699 u8 bw_share[0x20];
2700
2701 u8 max_average_bw[0x20];
2702
2703 u8 reserved_at_e0[0x120];
2704};
2705
Saeed Mahameede2816822015-05-28 22:28:40 +03002706struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002707 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002708
Matan Barakb4ff3a32016-02-09 14:57:42 +02002709 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002710 u8 rqt_max_size[0x10];
2711
Matan Barakb4ff3a32016-02-09 14:57:42 +02002712 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002713 u8 rqt_actual_size[0x10];
2714
Matan Barakb4ff3a32016-02-09 14:57:42 +02002715 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002716
2717 struct mlx5_ifc_rq_num_bits rq_num[0];
2718};
2719
2720enum {
2721 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2722 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2723};
2724
2725enum {
2726 MLX5_RQC_STATE_RST = 0x0,
2727 MLX5_RQC_STATE_RDY = 0x1,
2728 MLX5_RQC_STATE_ERR = 0x3,
2729};
2730
2731struct mlx5_ifc_rqc_bits {
2732 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002733 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002734 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002735 u8 vsd[0x1];
2736 u8 mem_rq_type[0x4];
2737 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002738 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002739 u8 flush_in_error_en[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002740 u8 hairpin[0x1];
2741 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002742
Matan Barakb4ff3a32016-02-09 14:57:42 +02002743 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002744 u8 user_index[0x18];
2745
Matan Barakb4ff3a32016-02-09 14:57:42 +02002746 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002747 u8 cqn[0x18];
2748
2749 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002750 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002751
Matan Barakb4ff3a32016-02-09 14:57:42 +02002752 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002753 u8 rmpn[0x18];
2754
Or Gerlitz40817cd2017-06-25 12:38:45 +03002755 u8 reserved_at_a0[0x8];
2756 u8 hairpin_peer_sq[0x18];
2757
2758 u8 reserved_at_c0[0x10];
2759 u8 hairpin_peer_vhca[0x10];
2760
2761 u8 reserved_at_e0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002762
2763 struct mlx5_ifc_wq_bits wq;
2764};
2765
2766enum {
2767 MLX5_RMPC_STATE_RDY = 0x1,
2768 MLX5_RMPC_STATE_ERR = 0x3,
2769};
2770
2771struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002772 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002773 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002774 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002775
2776 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002777 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002778
Matan Barakb4ff3a32016-02-09 14:57:42 +02002779 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002780
2781 struct mlx5_ifc_wq_bits wq;
2782};
2783
Saeed Mahameede2816822015-05-28 22:28:40 +03002784struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002785 u8 reserved_at_0[0x5];
2786 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002787 u8 reserved_at_8[0x15];
2788 u8 disable_mc_local_lb[0x1];
2789 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002790 u8 roce_en[0x1];
2791
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002792 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002793 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002794 u8 event_on_mtu[0x1];
2795 u8 event_on_promisc_change[0x1];
2796 u8 event_on_vlan_change[0x1];
2797 u8 event_on_mc_address_change[0x1];
2798 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002799
Daniel Jurgens32f69e42018-01-04 17:25:36 +02002800 u8 reserved_at_40[0xc];
2801
2802 u8 affiliation_criteria[0x4];
2803 u8 affiliated_vhca_id[0x10];
2804
2805 u8 reserved_at_60[0xd0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002806
2807 u8 mtu[0x10];
2808
Achiad Shochat9efa7522015-12-23 18:47:20 +02002809 u8 system_image_guid[0x40];
2810 u8 port_guid[0x40];
2811 u8 node_guid[0x40];
2812
Matan Barakb4ff3a32016-02-09 14:57:42 +02002813 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002814 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002815 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002816
2817 u8 promisc_uc[0x1];
2818 u8 promisc_mc[0x1];
2819 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002820 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002821 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002822 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002823 u8 allowed_list_size[0xc];
2824
2825 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2826
Matan Barakb4ff3a32016-02-09 14:57:42 +02002827 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002828
2829 u8 current_uc_mac_address[0][0x40];
2830};
2831
2832enum {
2833 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2834 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2835 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002836 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Ariel Levkovichcdbd0d22018-04-05 18:53:28 +03002837 MLX5_MKC_ACCESS_MODE_MEMIC = 0x5,
Saeed Mahameede2816822015-05-28 22:28:40 +03002838};
2839
2840struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002841 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002842 u8 free[0x1];
Ariel Levkovichcdbd0d22018-04-05 18:53:28 +03002843 u8 reserved_at_2[0x1];
2844 u8 access_mode_4_2[0x3];
2845 u8 reserved_at_6[0x7];
2846 u8 relaxed_ordering_write[0x1];
2847 u8 reserved_at_e[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002848 u8 small_fence_on_rdma_read_response[0x1];
2849 u8 umr_en[0x1];
2850 u8 a[0x1];
2851 u8 rw[0x1];
2852 u8 rr[0x1];
2853 u8 lw[0x1];
2854 u8 lr[0x1];
Ariel Levkovichcdbd0d22018-04-05 18:53:28 +03002855 u8 access_mode_1_0[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002856 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002857
2858 u8 qpn[0x18];
2859 u8 mkey_7_0[0x8];
2860
Matan Barakb4ff3a32016-02-09 14:57:42 +02002861 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002862
2863 u8 length64[0x1];
2864 u8 bsf_en[0x1];
2865 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002866 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002867 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002868 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002869 u8 en_rinval[0x1];
2870 u8 pd[0x18];
2871
2872 u8 start_addr[0x40];
2873
2874 u8 len[0x40];
2875
2876 u8 bsf_octword_size[0x20];
2877
Matan Barakb4ff3a32016-02-09 14:57:42 +02002878 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002879
2880 u8 translations_octword_size[0x20];
2881
Matan Barakb4ff3a32016-02-09 14:57:42 +02002882 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002883 u8 log_page_size[0x5];
2884
Matan Barakb4ff3a32016-02-09 14:57:42 +02002885 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002886};
2887
2888struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002889 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002890 u8 pkey[0x10];
2891};
2892
2893struct mlx5_ifc_array128_auto_bits {
2894 u8 array128_auto[16][0x8];
2895};
2896
2897struct mlx5_ifc_hca_vport_context_bits {
2898 u8 field_select[0x20];
2899
Matan Barakb4ff3a32016-02-09 14:57:42 +02002900 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002901
2902 u8 sm_virt_aware[0x1];
2903 u8 has_smi[0x1];
2904 u8 has_raw[0x1];
2905 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002906 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002907 u8 port_physical_state[0x4];
2908 u8 vport_state_policy[0x4];
2909 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002910 u8 vport_state[0x4];
2911
Matan Barakb4ff3a32016-02-09 14:57:42 +02002912 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002913
2914 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002915
2916 u8 port_guid[0x40];
2917
2918 u8 node_guid[0x40];
2919
2920 u8 cap_mask1[0x20];
2921
2922 u8 cap_mask1_field_select[0x20];
2923
2924 u8 cap_mask2[0x20];
2925
2926 u8 cap_mask2_field_select[0x20];
2927
Matan Barakb4ff3a32016-02-09 14:57:42 +02002928 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002929
2930 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002931 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002932 u8 init_type_reply[0x4];
2933 u8 lmc[0x3];
2934 u8 subnet_timeout[0x5];
2935
2936 u8 sm_lid[0x10];
2937 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002938 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002939
2940 u8 qkey_violation_counter[0x10];
2941 u8 pkey_violation_counter[0x10];
2942
Matan Barakb4ff3a32016-02-09 14:57:42 +02002943 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002944};
2945
Saeed Mahameedd6666752015-12-01 18:03:22 +02002946struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002947 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002948 u8 vport_svlan_strip[0x1];
2949 u8 vport_cvlan_strip[0x1];
2950 u8 vport_svlan_insert[0x1];
2951 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002952 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002953
Matan Barakb4ff3a32016-02-09 14:57:42 +02002954 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002955
2956 u8 svlan_cfi[0x1];
2957 u8 svlan_pcp[0x3];
2958 u8 svlan_id[0xc];
2959 u8 cvlan_cfi[0x1];
2960 u8 cvlan_pcp[0x3];
2961 u8 cvlan_id[0xc];
2962
Matan Barakb4ff3a32016-02-09 14:57:42 +02002963 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002964};
2965
Saeed Mahameede2816822015-05-28 22:28:40 +03002966enum {
2967 MLX5_EQC_STATUS_OK = 0x0,
2968 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2969};
2970
2971enum {
2972 MLX5_EQC_ST_ARMED = 0x9,
2973 MLX5_EQC_ST_FIRED = 0xa,
2974};
2975
2976struct mlx5_ifc_eqc_bits {
2977 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002978 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002979 u8 ec[0x1];
2980 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002981 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002982 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002983 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002984
Matan Barakb4ff3a32016-02-09 14:57:42 +02002985 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002986
Matan Barakb4ff3a32016-02-09 14:57:42 +02002987 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002988 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002989 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002990
Matan Barakb4ff3a32016-02-09 14:57:42 +02002991 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002992 u8 log_eq_size[0x5];
2993 u8 uar_page[0x18];
2994
Matan Barakb4ff3a32016-02-09 14:57:42 +02002995 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002996
Matan Barakb4ff3a32016-02-09 14:57:42 +02002997 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002998 u8 intr[0x8];
2999
Matan Barakb4ff3a32016-02-09 14:57:42 +02003000 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003001 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003002 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003003
Matan Barakb4ff3a32016-02-09 14:57:42 +02003004 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003005
Matan Barakb4ff3a32016-02-09 14:57:42 +02003006 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003007 u8 consumer_counter[0x18];
3008
Matan Barakb4ff3a32016-02-09 14:57:42 +02003009 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003010 u8 producer_counter[0x18];
3011
Matan Barakb4ff3a32016-02-09 14:57:42 +02003012 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003013};
3014
3015enum {
3016 MLX5_DCTC_STATE_ACTIVE = 0x0,
3017 MLX5_DCTC_STATE_DRAINING = 0x1,
3018 MLX5_DCTC_STATE_DRAINED = 0x2,
3019};
3020
3021enum {
3022 MLX5_DCTC_CS_RES_DISABLE = 0x0,
3023 MLX5_DCTC_CS_RES_NA = 0x1,
3024 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
3025};
3026
3027enum {
3028 MLX5_DCTC_MTU_256_BYTES = 0x1,
3029 MLX5_DCTC_MTU_512_BYTES = 0x2,
3030 MLX5_DCTC_MTU_1K_BYTES = 0x3,
3031 MLX5_DCTC_MTU_2K_BYTES = 0x4,
3032 MLX5_DCTC_MTU_4K_BYTES = 0x5,
3033};
3034
3035struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003036 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003037 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003038 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003039
Matan Barakb4ff3a32016-02-09 14:57:42 +02003040 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003041 u8 user_index[0x18];
3042
Matan Barakb4ff3a32016-02-09 14:57:42 +02003043 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003044 u8 cqn[0x18];
3045
3046 u8 counter_set_id[0x8];
3047 u8 atomic_mode[0x4];
3048 u8 rre[0x1];
3049 u8 rwe[0x1];
3050 u8 rae[0x1];
3051 u8 atomic_like_write_en[0x1];
3052 u8 latency_sensitive[0x1];
3053 u8 rlky[0x1];
3054 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003055 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03003056
Matan Barakb4ff3a32016-02-09 14:57:42 +02003057 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003058 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003059 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003060 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003061 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003062
Matan Barakb4ff3a32016-02-09 14:57:42 +02003063 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03003064 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003065
Matan Barakb4ff3a32016-02-09 14:57:42 +02003066 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003067 u8 pd[0x18];
3068
3069 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003070 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003071 u8 flow_label[0x14];
3072
3073 u8 dc_access_key[0x40];
3074
Matan Barakb4ff3a32016-02-09 14:57:42 +02003075 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03003076 u8 mtu[0x3];
3077 u8 port[0x8];
3078 u8 pkey_index[0x10];
3079
Matan Barakb4ff3a32016-02-09 14:57:42 +02003080 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003081 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003082 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003083 u8 hop_limit[0x8];
3084
3085 u8 dc_access_key_violation_count[0x20];
3086
Matan Barakb4ff3a32016-02-09 14:57:42 +02003087 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03003088 u8 dei_cfi[0x1];
3089 u8 eth_prio[0x3];
3090 u8 ecn[0x2];
3091 u8 dscp[0x6];
3092
Matan Barakb4ff3a32016-02-09 14:57:42 +02003093 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003094};
3095
3096enum {
3097 MLX5_CQC_STATUS_OK = 0x0,
3098 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
3099 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
3100};
3101
3102enum {
3103 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
3104 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
3105};
3106
3107enum {
3108 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
3109 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
3110 MLX5_CQC_ST_FIRED = 0xa,
3111};
3112
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003113enum {
3114 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
3115 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03003116 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003117};
3118
Saeed Mahameede2816822015-05-28 22:28:40 +03003119struct mlx5_ifc_cqc_bits {
3120 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003121 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003122 u8 cqe_sz[0x3];
3123 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003124 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003125 u8 scqe_break_moderation_en[0x1];
3126 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003127 u8 cq_period_mode[0x2];
3128 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003129 u8 mini_cqe_res_format[0x2];
3130 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003131 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003132
Matan Barakb4ff3a32016-02-09 14:57:42 +02003133 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003134
Matan Barakb4ff3a32016-02-09 14:57:42 +02003135 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03003136 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003137 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003138
Matan Barakb4ff3a32016-02-09 14:57:42 +02003139 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003140 u8 log_cq_size[0x5];
3141 u8 uar_page[0x18];
3142
Matan Barakb4ff3a32016-02-09 14:57:42 +02003143 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003144 u8 cq_period[0xc];
3145 u8 cq_max_count[0x10];
3146
Matan Barakb4ff3a32016-02-09 14:57:42 +02003147 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003148 u8 c_eqn[0x8];
3149
Matan Barakb4ff3a32016-02-09 14:57:42 +02003150 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003151 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003152 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003153
Matan Barakb4ff3a32016-02-09 14:57:42 +02003154 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003155
Matan Barakb4ff3a32016-02-09 14:57:42 +02003156 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003157 u8 last_notified_index[0x18];
3158
Matan Barakb4ff3a32016-02-09 14:57:42 +02003159 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003160 u8 last_solicit_index[0x18];
3161
Matan Barakb4ff3a32016-02-09 14:57:42 +02003162 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003163 u8 consumer_counter[0x18];
3164
Matan Barakb4ff3a32016-02-09 14:57:42 +02003165 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003166 u8 producer_counter[0x18];
3167
Matan Barakb4ff3a32016-02-09 14:57:42 +02003168 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003169
3170 u8 dbr_addr[0x40];
3171};
3172
3173union mlx5_ifc_cong_control_roce_ecn_auto_bits {
3174 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
3175 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
3176 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003177 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03003178};
3179
3180struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003181 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003182
Matan Barakb4ff3a32016-02-09 14:57:42 +02003183 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03003184 u8 ieee_vendor_id[0x18];
3185
Matan Barakb4ff3a32016-02-09 14:57:42 +02003186 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003187 u8 vsd_vendor_id[0x10];
3188
3189 u8 vsd[208][0x8];
3190
3191 u8 vsd_contd_psid[16][0x8];
3192};
3193
Saeed Mahameed74862162016-06-09 15:11:34 +03003194enum {
3195 MLX5_XRQC_STATE_GOOD = 0x0,
3196 MLX5_XRQC_STATE_ERROR = 0x1,
3197};
3198
3199enum {
3200 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3201 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3202};
3203
3204enum {
3205 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3206};
3207
3208struct mlx5_ifc_tag_matching_topology_context_bits {
3209 u8 log_matching_list_sz[0x4];
3210 u8 reserved_at_4[0xc];
3211 u8 append_next_index[0x10];
3212
3213 u8 sw_phase_cnt[0x10];
3214 u8 hw_phase_cnt[0x10];
3215
3216 u8 reserved_at_40[0x40];
3217};
3218
3219struct mlx5_ifc_xrqc_bits {
3220 u8 state[0x4];
3221 u8 rlkey[0x1];
3222 u8 reserved_at_5[0xf];
3223 u8 topology[0x4];
3224 u8 reserved_at_18[0x4];
3225 u8 offload[0x4];
3226
3227 u8 reserved_at_20[0x8];
3228 u8 user_index[0x18];
3229
3230 u8 reserved_at_40[0x8];
3231 u8 cqn[0x18];
3232
3233 u8 reserved_at_60[0xa0];
3234
3235 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3236
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003237 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003238
3239 struct mlx5_ifc_wq_bits wq;
3240};
3241
Saeed Mahameede2816822015-05-28 22:28:40 +03003242union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3243 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3244 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003245 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003246};
3247
3248union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3249 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3250 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3251 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003252 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003253};
3254
3255union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3256 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3257 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3258 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3259 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3260 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3261 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3262 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003263 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003264 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003265 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003266 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003267};
3268
Gal Pressman8ed1a632016-11-17 13:46:01 +02003269union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3270 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3271 u8 reserved_at_0[0x7c0];
3272};
3273
Saeed Mahameede2816822015-05-28 22:28:40 +03003274union mlx5_ifc_event_auto_bits {
3275 struct mlx5_ifc_comp_event_bits comp_event;
3276 struct mlx5_ifc_dct_events_bits dct_events;
3277 struct mlx5_ifc_qp_events_bits qp_events;
3278 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3279 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3280 struct mlx5_ifc_cq_error_bits cq_error;
3281 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3282 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3283 struct mlx5_ifc_gpio_event_bits gpio_event;
3284 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3285 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3286 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003287 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003288};
3289
3290struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003291 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003292
3293 u8 assert_existptr[0x20];
3294
3295 u8 assert_callra[0x20];
3296
Matan Barakb4ff3a32016-02-09 14:57:42 +02003297 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003298
3299 u8 fw_version[0x20];
3300
3301 u8 hw_id[0x20];
3302
Matan Barakb4ff3a32016-02-09 14:57:42 +02003303 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003304
3305 u8 irisc_index[0x8];
3306 u8 synd[0x8];
3307 u8 ext_synd[0x10];
3308};
3309
3310struct mlx5_ifc_register_loopback_control_bits {
3311 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003312 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003313 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003314 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003315
Matan Barakb4ff3a32016-02-09 14:57:42 +02003316 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003317};
3318
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003319struct mlx5_ifc_vport_tc_element_bits {
3320 u8 traffic_class[0x4];
3321 u8 reserved_at_4[0xc];
3322 u8 vport_number[0x10];
3323};
3324
3325struct mlx5_ifc_vport_element_bits {
3326 u8 reserved_at_0[0x10];
3327 u8 vport_number[0x10];
3328};
3329
3330enum {
3331 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3332 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3333 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3334};
3335
3336struct mlx5_ifc_tsar_element_bits {
3337 u8 reserved_at_0[0x8];
3338 u8 tsar_type[0x8];
3339 u8 reserved_at_10[0x10];
3340};
3341
Majd Dibbiny8812c242017-02-09 14:20:12 +02003342enum {
3343 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3344 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3345};
3346
Saeed Mahameede2816822015-05-28 22:28:40 +03003347struct mlx5_ifc_teardown_hca_out_bits {
3348 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003349 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003350
3351 u8 syndrome[0x20];
3352
Majd Dibbiny8812c242017-02-09 14:20:12 +02003353 u8 reserved_at_40[0x3f];
3354
3355 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003356};
3357
3358enum {
3359 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003360 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003361};
3362
3363struct mlx5_ifc_teardown_hca_in_bits {
3364 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003365 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003366
Matan Barakb4ff3a32016-02-09 14:57:42 +02003367 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003368 u8 op_mod[0x10];
3369
Matan Barakb4ff3a32016-02-09 14:57:42 +02003370 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003371 u8 profile[0x10];
3372
Matan Barakb4ff3a32016-02-09 14:57:42 +02003373 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003374};
3375
3376struct mlx5_ifc_sqerr2rts_qp_out_bits {
3377 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003378 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003379
3380 u8 syndrome[0x20];
3381
Matan Barakb4ff3a32016-02-09 14:57:42 +02003382 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003383};
3384
3385struct mlx5_ifc_sqerr2rts_qp_in_bits {
3386 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003387 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003388
Matan Barakb4ff3a32016-02-09 14:57:42 +02003389 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003390 u8 op_mod[0x10];
3391
Matan Barakb4ff3a32016-02-09 14:57:42 +02003392 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003393 u8 qpn[0x18];
3394
Matan Barakb4ff3a32016-02-09 14:57:42 +02003395 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003396
3397 u8 opt_param_mask[0x20];
3398
Matan Barakb4ff3a32016-02-09 14:57:42 +02003399 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003400
3401 struct mlx5_ifc_qpc_bits qpc;
3402
Matan Barakb4ff3a32016-02-09 14:57:42 +02003403 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003404};
3405
3406struct mlx5_ifc_sqd2rts_qp_out_bits {
3407 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003408 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003409
3410 u8 syndrome[0x20];
3411
Matan Barakb4ff3a32016-02-09 14:57:42 +02003412 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003413};
3414
3415struct mlx5_ifc_sqd2rts_qp_in_bits {
3416 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003417 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003418
Matan Barakb4ff3a32016-02-09 14:57:42 +02003419 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003420 u8 op_mod[0x10];
3421
Matan Barakb4ff3a32016-02-09 14:57:42 +02003422 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003423 u8 qpn[0x18];
3424
Matan Barakb4ff3a32016-02-09 14:57:42 +02003425 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003426
3427 u8 opt_param_mask[0x20];
3428
Matan Barakb4ff3a32016-02-09 14:57:42 +02003429 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003430
3431 struct mlx5_ifc_qpc_bits qpc;
3432
Matan Barakb4ff3a32016-02-09 14:57:42 +02003433 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003434};
3435
3436struct mlx5_ifc_set_roce_address_out_bits {
3437 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003438 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003439
3440 u8 syndrome[0x20];
3441
Matan Barakb4ff3a32016-02-09 14:57:42 +02003442 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003443};
3444
3445struct mlx5_ifc_set_roce_address_in_bits {
3446 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003447 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003448
Matan Barakb4ff3a32016-02-09 14:57:42 +02003449 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003450 u8 op_mod[0x10];
3451
3452 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003453 u8 reserved_at_50[0xc];
3454 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003455
Matan Barakb4ff3a32016-02-09 14:57:42 +02003456 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003457
3458 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3459};
3460
3461struct mlx5_ifc_set_mad_demux_out_bits {
3462 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003463 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003464
3465 u8 syndrome[0x20];
3466
Matan Barakb4ff3a32016-02-09 14:57:42 +02003467 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003468};
3469
3470enum {
3471 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3472 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3473};
3474
3475struct mlx5_ifc_set_mad_demux_in_bits {
3476 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003477 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003478
Matan Barakb4ff3a32016-02-09 14:57:42 +02003479 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003480 u8 op_mod[0x10];
3481
Matan Barakb4ff3a32016-02-09 14:57:42 +02003482 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003483
Matan Barakb4ff3a32016-02-09 14:57:42 +02003484 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003485 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003486 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003487};
3488
3489struct mlx5_ifc_set_l2_table_entry_out_bits {
3490 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003491 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003492
3493 u8 syndrome[0x20];
3494
Matan Barakb4ff3a32016-02-09 14:57:42 +02003495 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003496};
3497
3498struct mlx5_ifc_set_l2_table_entry_in_bits {
3499 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003500 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003501
Matan Barakb4ff3a32016-02-09 14:57:42 +02003502 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003503 u8 op_mod[0x10];
3504
Matan Barakb4ff3a32016-02-09 14:57:42 +02003505 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003506
Matan Barakb4ff3a32016-02-09 14:57:42 +02003507 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003508 u8 table_index[0x18];
3509
Matan Barakb4ff3a32016-02-09 14:57:42 +02003510 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003511
Matan Barakb4ff3a32016-02-09 14:57:42 +02003512 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003513 u8 vlan_valid[0x1];
3514 u8 vlan[0xc];
3515
3516 struct mlx5_ifc_mac_address_layout_bits mac_address;
3517
Matan Barakb4ff3a32016-02-09 14:57:42 +02003518 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003519};
3520
3521struct mlx5_ifc_set_issi_out_bits {
3522 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003523 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003524
3525 u8 syndrome[0x20];
3526
Matan Barakb4ff3a32016-02-09 14:57:42 +02003527 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003528};
3529
3530struct mlx5_ifc_set_issi_in_bits {
3531 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003532 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003533
Matan Barakb4ff3a32016-02-09 14:57:42 +02003534 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003535 u8 op_mod[0x10];
3536
Matan Barakb4ff3a32016-02-09 14:57:42 +02003537 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003538 u8 current_issi[0x10];
3539
Matan Barakb4ff3a32016-02-09 14:57:42 +02003540 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003541};
3542
3543struct mlx5_ifc_set_hca_cap_out_bits {
3544 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003545 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003546
3547 u8 syndrome[0x20];
3548
Matan Barakb4ff3a32016-02-09 14:57:42 +02003549 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003550};
3551
3552struct mlx5_ifc_set_hca_cap_in_bits {
3553 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003554 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003555
Matan Barakb4ff3a32016-02-09 14:57:42 +02003556 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003557 u8 op_mod[0x10];
3558
Matan Barakb4ff3a32016-02-09 14:57:42 +02003559 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003560
Saeed Mahameede2816822015-05-28 22:28:40 +03003561 union mlx5_ifc_hca_cap_union_bits capability;
3562};
3563
Maor Gottlieb26a81452015-12-10 17:12:39 +02003564enum {
3565 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3566 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3567 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3568 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3569};
3570
Saeed Mahameede2816822015-05-28 22:28:40 +03003571struct mlx5_ifc_set_fte_out_bits {
3572 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003573 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003574
3575 u8 syndrome[0x20];
3576
Matan Barakb4ff3a32016-02-09 14:57:42 +02003577 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003578};
3579
3580struct mlx5_ifc_set_fte_in_bits {
3581 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003582 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003583
Matan Barakb4ff3a32016-02-09 14:57:42 +02003584 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003585 u8 op_mod[0x10];
3586
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003587 u8 other_vport[0x1];
3588 u8 reserved_at_41[0xf];
3589 u8 vport_number[0x10];
3590
3591 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003592
3593 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003594 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003595
Matan Barakb4ff3a32016-02-09 14:57:42 +02003596 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003597 u8 table_id[0x18];
3598
Matan Barakb4ff3a32016-02-09 14:57:42 +02003599 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003600 u8 modify_enable_mask[0x8];
3601
Matan Barakb4ff3a32016-02-09 14:57:42 +02003602 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003603
3604 u8 flow_index[0x20];
3605
Matan Barakb4ff3a32016-02-09 14:57:42 +02003606 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003607
3608 struct mlx5_ifc_flow_context_bits flow_context;
3609};
3610
3611struct mlx5_ifc_rts2rts_qp_out_bits {
3612 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003613 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003614
3615 u8 syndrome[0x20];
3616
Matan Barakb4ff3a32016-02-09 14:57:42 +02003617 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003618};
3619
3620struct mlx5_ifc_rts2rts_qp_in_bits {
3621 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003622 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003623
Matan Barakb4ff3a32016-02-09 14:57:42 +02003624 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003625 u8 op_mod[0x10];
3626
Matan Barakb4ff3a32016-02-09 14:57:42 +02003627 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003628 u8 qpn[0x18];
3629
Matan Barakb4ff3a32016-02-09 14:57:42 +02003630 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003631
3632 u8 opt_param_mask[0x20];
3633
Matan Barakb4ff3a32016-02-09 14:57:42 +02003634 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003635
3636 struct mlx5_ifc_qpc_bits qpc;
3637
Matan Barakb4ff3a32016-02-09 14:57:42 +02003638 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003639};
3640
3641struct mlx5_ifc_rtr2rts_qp_out_bits {
3642 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003643 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003644
3645 u8 syndrome[0x20];
3646
Matan Barakb4ff3a32016-02-09 14:57:42 +02003647 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003648};
3649
3650struct mlx5_ifc_rtr2rts_qp_in_bits {
3651 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003652 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003653
Matan Barakb4ff3a32016-02-09 14:57:42 +02003654 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003655 u8 op_mod[0x10];
3656
Matan Barakb4ff3a32016-02-09 14:57:42 +02003657 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003658 u8 qpn[0x18];
3659
Matan Barakb4ff3a32016-02-09 14:57:42 +02003660 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003661
3662 u8 opt_param_mask[0x20];
3663
Matan Barakb4ff3a32016-02-09 14:57:42 +02003664 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003665
3666 struct mlx5_ifc_qpc_bits qpc;
3667
Matan Barakb4ff3a32016-02-09 14:57:42 +02003668 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003669};
3670
3671struct mlx5_ifc_rst2init_qp_out_bits {
3672 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003673 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003674
3675 u8 syndrome[0x20];
3676
Matan Barakb4ff3a32016-02-09 14:57:42 +02003677 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003678};
3679
3680struct mlx5_ifc_rst2init_qp_in_bits {
3681 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003682 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003683
Matan Barakb4ff3a32016-02-09 14:57:42 +02003684 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003685 u8 op_mod[0x10];
3686
Matan Barakb4ff3a32016-02-09 14:57:42 +02003687 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003688 u8 qpn[0x18];
3689
Matan Barakb4ff3a32016-02-09 14:57:42 +02003690 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003691
3692 u8 opt_param_mask[0x20];
3693
Matan Barakb4ff3a32016-02-09 14:57:42 +02003694 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003695
3696 struct mlx5_ifc_qpc_bits qpc;
3697
Matan Barakb4ff3a32016-02-09 14:57:42 +02003698 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003699};
3700
Saeed Mahameed74862162016-06-09 15:11:34 +03003701struct mlx5_ifc_query_xrq_out_bits {
3702 u8 status[0x8];
3703 u8 reserved_at_8[0x18];
3704
3705 u8 syndrome[0x20];
3706
3707 u8 reserved_at_40[0x40];
3708
3709 struct mlx5_ifc_xrqc_bits xrq_context;
3710};
3711
3712struct mlx5_ifc_query_xrq_in_bits {
3713 u8 opcode[0x10];
3714 u8 reserved_at_10[0x10];
3715
3716 u8 reserved_at_20[0x10];
3717 u8 op_mod[0x10];
3718
3719 u8 reserved_at_40[0x8];
3720 u8 xrqn[0x18];
3721
3722 u8 reserved_at_60[0x20];
3723};
3724
Saeed Mahameede2816822015-05-28 22:28:40 +03003725struct mlx5_ifc_query_xrc_srq_out_bits {
3726 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003727 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003728
3729 u8 syndrome[0x20];
3730
Matan Barakb4ff3a32016-02-09 14:57:42 +02003731 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003732
3733 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3734
Matan Barakb4ff3a32016-02-09 14:57:42 +02003735 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003736
3737 u8 pas[0][0x40];
3738};
3739
3740struct mlx5_ifc_query_xrc_srq_in_bits {
3741 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003742 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003743
Matan Barakb4ff3a32016-02-09 14:57:42 +02003744 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003745 u8 op_mod[0x10];
3746
Matan Barakb4ff3a32016-02-09 14:57:42 +02003747 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003748 u8 xrc_srqn[0x18];
3749
Matan Barakb4ff3a32016-02-09 14:57:42 +02003750 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003751};
3752
3753enum {
3754 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3755 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3756};
3757
3758struct mlx5_ifc_query_vport_state_out_bits {
3759 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003760 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003761
3762 u8 syndrome[0x20];
3763
Matan Barakb4ff3a32016-02-09 14:57:42 +02003764 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003765
Matan Barakb4ff3a32016-02-09 14:57:42 +02003766 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003767 u8 admin_state[0x4];
3768 u8 state[0x4];
3769};
3770
3771enum {
Eran Ben Elishacc9c82a2018-08-08 16:23:49 -07003772 MLX5_VPORT_STATE_OP_MOD_VNIC_VPORT = 0x0,
3773 MLX5_VPORT_STATE_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003774};
3775
3776struct mlx5_ifc_query_vport_state_in_bits {
3777 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003778 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003779
Matan Barakb4ff3a32016-02-09 14:57:42 +02003780 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003781 u8 op_mod[0x10];
3782
3783 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003784 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003785 u8 vport_number[0x10];
3786
Matan Barakb4ff3a32016-02-09 14:57:42 +02003787 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003788};
3789
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +02003790struct mlx5_ifc_query_vnic_env_out_bits {
3791 u8 status[0x8];
3792 u8 reserved_at_8[0x18];
3793
3794 u8 syndrome[0x20];
3795
3796 u8 reserved_at_40[0x40];
3797
3798 struct mlx5_ifc_vnic_diagnostic_statistics_bits vport_env;
3799};
3800
3801enum {
3802 MLX5_QUERY_VNIC_ENV_IN_OP_MOD_VPORT_DIAG_STATISTICS = 0x0,
3803};
3804
3805struct mlx5_ifc_query_vnic_env_in_bits {
3806 u8 opcode[0x10];
3807 u8 reserved_at_10[0x10];
3808
3809 u8 reserved_at_20[0x10];
3810 u8 op_mod[0x10];
3811
3812 u8 other_vport[0x1];
3813 u8 reserved_at_41[0xf];
3814 u8 vport_number[0x10];
3815
3816 u8 reserved_at_60[0x20];
3817};
3818
Saeed Mahameede2816822015-05-28 22:28:40 +03003819struct mlx5_ifc_query_vport_counter_out_bits {
3820 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003821 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003822
3823 u8 syndrome[0x20];
3824
Matan Barakb4ff3a32016-02-09 14:57:42 +02003825 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003826
3827 struct mlx5_ifc_traffic_counter_bits received_errors;
3828
3829 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3830
3831 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3832
3833 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3834
3835 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3836
3837 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3838
3839 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3840
3841 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3842
3843 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3844
3845 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3846
3847 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3848
3849 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3850
Matan Barakb4ff3a32016-02-09 14:57:42 +02003851 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003852};
3853
3854enum {
3855 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3856};
3857
3858struct mlx5_ifc_query_vport_counter_in_bits {
3859 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003860 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003861
Matan Barakb4ff3a32016-02-09 14:57:42 +02003862 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003863 u8 op_mod[0x10];
3864
3865 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003866 u8 reserved_at_41[0xb];
3867 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003868 u8 vport_number[0x10];
3869
Matan Barakb4ff3a32016-02-09 14:57:42 +02003870 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003871
3872 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003873 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003874
Matan Barakb4ff3a32016-02-09 14:57:42 +02003875 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003876};
3877
3878struct mlx5_ifc_query_tis_out_bits {
3879 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003880 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003881
3882 u8 syndrome[0x20];
3883
Matan Barakb4ff3a32016-02-09 14:57:42 +02003884 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003885
3886 struct mlx5_ifc_tisc_bits tis_context;
3887};
3888
3889struct mlx5_ifc_query_tis_in_bits {
3890 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003891 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003892
Matan Barakb4ff3a32016-02-09 14:57:42 +02003893 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003894 u8 op_mod[0x10];
3895
Matan Barakb4ff3a32016-02-09 14:57:42 +02003896 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003897 u8 tisn[0x18];
3898
Matan Barakb4ff3a32016-02-09 14:57:42 +02003899 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003900};
3901
3902struct mlx5_ifc_query_tir_out_bits {
3903 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003904 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003905
3906 u8 syndrome[0x20];
3907
Matan Barakb4ff3a32016-02-09 14:57:42 +02003908 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003909
3910 struct mlx5_ifc_tirc_bits tir_context;
3911};
3912
3913struct mlx5_ifc_query_tir_in_bits {
3914 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003915 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003916
Matan Barakb4ff3a32016-02-09 14:57:42 +02003917 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003918 u8 op_mod[0x10];
3919
Matan Barakb4ff3a32016-02-09 14:57:42 +02003920 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003921 u8 tirn[0x18];
3922
Matan Barakb4ff3a32016-02-09 14:57:42 +02003923 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003924};
3925
3926struct mlx5_ifc_query_srq_out_bits {
3927 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003928 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003929
3930 u8 syndrome[0x20];
3931
Matan Barakb4ff3a32016-02-09 14:57:42 +02003932 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003933
3934 struct mlx5_ifc_srqc_bits srq_context_entry;
3935
Matan Barakb4ff3a32016-02-09 14:57:42 +02003936 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003937
3938 u8 pas[0][0x40];
3939};
3940
3941struct mlx5_ifc_query_srq_in_bits {
3942 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003943 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003944
Matan Barakb4ff3a32016-02-09 14:57:42 +02003945 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003946 u8 op_mod[0x10];
3947
Matan Barakb4ff3a32016-02-09 14:57:42 +02003948 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003949 u8 srqn[0x18];
3950
Matan Barakb4ff3a32016-02-09 14:57:42 +02003951 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003952};
3953
3954struct mlx5_ifc_query_sq_out_bits {
3955 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003956 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003957
3958 u8 syndrome[0x20];
3959
Matan Barakb4ff3a32016-02-09 14:57:42 +02003960 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003961
3962 struct mlx5_ifc_sqc_bits sq_context;
3963};
3964
3965struct mlx5_ifc_query_sq_in_bits {
3966 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003967 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003968
Matan Barakb4ff3a32016-02-09 14:57:42 +02003969 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003970 u8 op_mod[0x10];
3971
Matan Barakb4ff3a32016-02-09 14:57:42 +02003972 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003973 u8 sqn[0x18];
3974
Matan Barakb4ff3a32016-02-09 14:57:42 +02003975 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003976};
3977
3978struct mlx5_ifc_query_special_contexts_out_bits {
3979 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003980 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003981
3982 u8 syndrome[0x20];
3983
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003984 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003985
3986 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003987
3988 u8 null_mkey[0x20];
3989
3990 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003991};
3992
3993struct mlx5_ifc_query_special_contexts_in_bits {
3994 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003995 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003996
Matan Barakb4ff3a32016-02-09 14:57:42 +02003997 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003998 u8 op_mod[0x10];
3999
Matan Barakb4ff3a32016-02-09 14:57:42 +02004000 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004001};
4002
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03004003struct mlx5_ifc_query_scheduling_element_out_bits {
4004 u8 opcode[0x10];
4005 u8 reserved_at_10[0x10];
4006
4007 u8 reserved_at_20[0x10];
4008 u8 op_mod[0x10];
4009
4010 u8 reserved_at_40[0xc0];
4011
4012 struct mlx5_ifc_scheduling_context_bits scheduling_context;
4013
4014 u8 reserved_at_300[0x100];
4015};
4016
4017enum {
4018 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
4019};
4020
4021struct mlx5_ifc_query_scheduling_element_in_bits {
4022 u8 opcode[0x10];
4023 u8 reserved_at_10[0x10];
4024
4025 u8 reserved_at_20[0x10];
4026 u8 op_mod[0x10];
4027
4028 u8 scheduling_hierarchy[0x8];
4029 u8 reserved_at_48[0x18];
4030
4031 u8 scheduling_element_id[0x20];
4032
4033 u8 reserved_at_80[0x180];
4034};
4035
Saeed Mahameede2816822015-05-28 22:28:40 +03004036struct mlx5_ifc_query_rqt_out_bits {
4037 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004038 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004039
4040 u8 syndrome[0x20];
4041
Matan Barakb4ff3a32016-02-09 14:57:42 +02004042 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004043
4044 struct mlx5_ifc_rqtc_bits rqt_context;
4045};
4046
4047struct mlx5_ifc_query_rqt_in_bits {
4048 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004049 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004050
Matan Barakb4ff3a32016-02-09 14:57:42 +02004051 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004052 u8 op_mod[0x10];
4053
Matan Barakb4ff3a32016-02-09 14:57:42 +02004054 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004055 u8 rqtn[0x18];
4056
Matan Barakb4ff3a32016-02-09 14:57:42 +02004057 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004058};
4059
4060struct mlx5_ifc_query_rq_out_bits {
4061 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004062 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004063
4064 u8 syndrome[0x20];
4065
Matan Barakb4ff3a32016-02-09 14:57:42 +02004066 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004067
4068 struct mlx5_ifc_rqc_bits rq_context;
4069};
4070
4071struct mlx5_ifc_query_rq_in_bits {
4072 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004073 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004074
Matan Barakb4ff3a32016-02-09 14:57:42 +02004075 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004076 u8 op_mod[0x10];
4077
Matan Barakb4ff3a32016-02-09 14:57:42 +02004078 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004079 u8 rqn[0x18];
4080
Matan Barakb4ff3a32016-02-09 14:57:42 +02004081 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004082};
4083
4084struct mlx5_ifc_query_roce_address_out_bits {
4085 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004086 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004087
4088 u8 syndrome[0x20];
4089
Matan Barakb4ff3a32016-02-09 14:57:42 +02004090 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004091
4092 struct mlx5_ifc_roce_addr_layout_bits roce_address;
4093};
4094
4095struct mlx5_ifc_query_roce_address_in_bits {
4096 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004097 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004098
Matan Barakb4ff3a32016-02-09 14:57:42 +02004099 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004100 u8 op_mod[0x10];
4101
4102 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02004103 u8 reserved_at_50[0xc];
4104 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004105
Matan Barakb4ff3a32016-02-09 14:57:42 +02004106 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004107};
4108
4109struct mlx5_ifc_query_rmp_out_bits {
4110 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004111 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004112
4113 u8 syndrome[0x20];
4114
Matan Barakb4ff3a32016-02-09 14:57:42 +02004115 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004116
4117 struct mlx5_ifc_rmpc_bits rmp_context;
4118};
4119
4120struct mlx5_ifc_query_rmp_in_bits {
4121 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004122 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004123
Matan Barakb4ff3a32016-02-09 14:57:42 +02004124 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004125 u8 op_mod[0x10];
4126
Matan Barakb4ff3a32016-02-09 14:57:42 +02004127 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004128 u8 rmpn[0x18];
4129
Matan Barakb4ff3a32016-02-09 14:57:42 +02004130 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004131};
4132
4133struct mlx5_ifc_query_qp_out_bits {
4134 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004135 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004136
4137 u8 syndrome[0x20];
4138
Matan Barakb4ff3a32016-02-09 14:57:42 +02004139 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004140
4141 u8 opt_param_mask[0x20];
4142
Matan Barakb4ff3a32016-02-09 14:57:42 +02004143 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004144
4145 struct mlx5_ifc_qpc_bits qpc;
4146
Matan Barakb4ff3a32016-02-09 14:57:42 +02004147 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004148
4149 u8 pas[0][0x40];
4150};
4151
4152struct mlx5_ifc_query_qp_in_bits {
4153 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004154 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004155
Matan Barakb4ff3a32016-02-09 14:57:42 +02004156 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004157 u8 op_mod[0x10];
4158
Matan Barakb4ff3a32016-02-09 14:57:42 +02004159 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004160 u8 qpn[0x18];
4161
Matan Barakb4ff3a32016-02-09 14:57:42 +02004162 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004163};
4164
4165struct mlx5_ifc_query_q_counter_out_bits {
4166 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004167 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004168
4169 u8 syndrome[0x20];
4170
Matan Barakb4ff3a32016-02-09 14:57:42 +02004171 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004172
4173 u8 rx_write_requests[0x20];
4174
Matan Barakb4ff3a32016-02-09 14:57:42 +02004175 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004176
4177 u8 rx_read_requests[0x20];
4178
Matan Barakb4ff3a32016-02-09 14:57:42 +02004179 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004180
4181 u8 rx_atomic_requests[0x20];
4182
Matan Barakb4ff3a32016-02-09 14:57:42 +02004183 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004184
4185 u8 rx_dct_connect[0x20];
4186
Matan Barakb4ff3a32016-02-09 14:57:42 +02004187 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004188
4189 u8 out_of_buffer[0x20];
4190
Matan Barakb4ff3a32016-02-09 14:57:42 +02004191 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004192
4193 u8 out_of_sequence[0x20];
4194
Saeed Mahameed74862162016-06-09 15:11:34 +03004195 u8 reserved_at_1e0[0x20];
4196
4197 u8 duplicate_request[0x20];
4198
4199 u8 reserved_at_220[0x20];
4200
4201 u8 rnr_nak_retry_err[0x20];
4202
4203 u8 reserved_at_260[0x20];
4204
4205 u8 packet_seq_err[0x20];
4206
4207 u8 reserved_at_2a0[0x20];
4208
4209 u8 implied_nak_seq_err[0x20];
4210
4211 u8 reserved_at_2e0[0x20];
4212
4213 u8 local_ack_timeout_err[0x20];
4214
Parav Pandit58dcb602017-06-19 07:19:37 +03004215 u8 reserved_at_320[0xa0];
4216
4217 u8 resp_local_length_error[0x20];
4218
4219 u8 req_local_length_error[0x20];
4220
4221 u8 resp_local_qp_error[0x20];
4222
4223 u8 local_operation_error[0x20];
4224
4225 u8 resp_local_protection[0x20];
4226
4227 u8 req_local_protection[0x20];
4228
4229 u8 resp_cqe_error[0x20];
4230
4231 u8 req_cqe_error[0x20];
4232
4233 u8 req_mw_binding[0x20];
4234
4235 u8 req_bad_response[0x20];
4236
4237 u8 req_remote_invalid_request[0x20];
4238
4239 u8 resp_remote_invalid_request[0x20];
4240
4241 u8 req_remote_access_errors[0x20];
4242
4243 u8 resp_remote_access_errors[0x20];
4244
4245 u8 req_remote_operation_errors[0x20];
4246
4247 u8 req_transport_retries_exceeded[0x20];
4248
4249 u8 cq_overflow[0x20];
4250
4251 u8 resp_cqe_flush_error[0x20];
4252
4253 u8 req_cqe_flush_error[0x20];
4254
4255 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004256};
4257
4258struct mlx5_ifc_query_q_counter_in_bits {
4259 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004260 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004261
Matan Barakb4ff3a32016-02-09 14:57:42 +02004262 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004263 u8 op_mod[0x10];
4264
Matan Barakb4ff3a32016-02-09 14:57:42 +02004265 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004266
4267 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004268 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004269
Matan Barakb4ff3a32016-02-09 14:57:42 +02004270 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004271 u8 counter_set_id[0x8];
4272};
4273
4274struct mlx5_ifc_query_pages_out_bits {
4275 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004276 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004277
4278 u8 syndrome[0x20];
4279
Matan Barakb4ff3a32016-02-09 14:57:42 +02004280 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004281 u8 function_id[0x10];
4282
4283 u8 num_pages[0x20];
4284};
4285
4286enum {
4287 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4288 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4289 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4290};
4291
4292struct mlx5_ifc_query_pages_in_bits {
4293 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004294 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004295
Matan Barakb4ff3a32016-02-09 14:57:42 +02004296 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004297 u8 op_mod[0x10];
4298
Matan Barakb4ff3a32016-02-09 14:57:42 +02004299 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004300 u8 function_id[0x10];
4301
Matan Barakb4ff3a32016-02-09 14:57:42 +02004302 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004303};
4304
4305struct mlx5_ifc_query_nic_vport_context_out_bits {
4306 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004307 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004308
4309 u8 syndrome[0x20];
4310
Matan Barakb4ff3a32016-02-09 14:57:42 +02004311 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004312
4313 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4314};
4315
4316struct mlx5_ifc_query_nic_vport_context_in_bits {
4317 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004318 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004319
Matan Barakb4ff3a32016-02-09 14:57:42 +02004320 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004321 u8 op_mod[0x10];
4322
4323 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004324 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004325 u8 vport_number[0x10];
4326
Matan Barakb4ff3a32016-02-09 14:57:42 +02004327 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004328 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004329 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004330};
4331
4332struct mlx5_ifc_query_mkey_out_bits {
4333 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004334 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004335
4336 u8 syndrome[0x20];
4337
Matan Barakb4ff3a32016-02-09 14:57:42 +02004338 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004339
4340 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4341
Matan Barakb4ff3a32016-02-09 14:57:42 +02004342 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004343
4344 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4345
4346 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4347};
4348
4349struct mlx5_ifc_query_mkey_in_bits {
4350 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004351 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004352
Matan Barakb4ff3a32016-02-09 14:57:42 +02004353 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004354 u8 op_mod[0x10];
4355
Matan Barakb4ff3a32016-02-09 14:57:42 +02004356 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004357 u8 mkey_index[0x18];
4358
4359 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004360 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004361};
4362
4363struct mlx5_ifc_query_mad_demux_out_bits {
4364 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004365 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004366
4367 u8 syndrome[0x20];
4368
Matan Barakb4ff3a32016-02-09 14:57:42 +02004369 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004370
4371 u8 mad_dumux_parameters_block[0x20];
4372};
4373
4374struct mlx5_ifc_query_mad_demux_in_bits {
4375 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004376 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004377
Matan Barakb4ff3a32016-02-09 14:57:42 +02004378 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004379 u8 op_mod[0x10];
4380
Matan Barakb4ff3a32016-02-09 14:57:42 +02004381 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004382};
4383
4384struct mlx5_ifc_query_l2_table_entry_out_bits {
4385 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004386 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004387
4388 u8 syndrome[0x20];
4389
Matan Barakb4ff3a32016-02-09 14:57:42 +02004390 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004391
Matan Barakb4ff3a32016-02-09 14:57:42 +02004392 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004393 u8 vlan_valid[0x1];
4394 u8 vlan[0xc];
4395
4396 struct mlx5_ifc_mac_address_layout_bits mac_address;
4397
Matan Barakb4ff3a32016-02-09 14:57:42 +02004398 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004399};
4400
4401struct mlx5_ifc_query_l2_table_entry_in_bits {
4402 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004403 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004404
Matan Barakb4ff3a32016-02-09 14:57:42 +02004405 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004406 u8 op_mod[0x10];
4407
Matan Barakb4ff3a32016-02-09 14:57:42 +02004408 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004409
Matan Barakb4ff3a32016-02-09 14:57:42 +02004410 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004411 u8 table_index[0x18];
4412
Matan Barakb4ff3a32016-02-09 14:57:42 +02004413 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004414};
4415
4416struct mlx5_ifc_query_issi_out_bits {
4417 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004418 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004419
4420 u8 syndrome[0x20];
4421
Matan Barakb4ff3a32016-02-09 14:57:42 +02004422 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004423 u8 current_issi[0x10];
4424
Matan Barakb4ff3a32016-02-09 14:57:42 +02004425 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004426
Matan Barakb4ff3a32016-02-09 14:57:42 +02004427 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004428 u8 supported_issi_dw0[0x20];
4429};
4430
4431struct mlx5_ifc_query_issi_in_bits {
4432 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004433 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004434
Matan Barakb4ff3a32016-02-09 14:57:42 +02004435 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004436 u8 op_mod[0x10];
4437
Matan Barakb4ff3a32016-02-09 14:57:42 +02004438 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004439};
4440
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004441struct mlx5_ifc_set_driver_version_out_bits {
4442 u8 status[0x8];
4443 u8 reserved_0[0x18];
4444
4445 u8 syndrome[0x20];
4446 u8 reserved_1[0x40];
4447};
4448
4449struct mlx5_ifc_set_driver_version_in_bits {
4450 u8 opcode[0x10];
4451 u8 reserved_0[0x10];
4452
4453 u8 reserved_1[0x10];
4454 u8 op_mod[0x10];
4455
4456 u8 reserved_2[0x40];
4457 u8 driver_version[64][0x8];
4458};
4459
Saeed Mahameede2816822015-05-28 22:28:40 +03004460struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4461 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004462 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004463
4464 u8 syndrome[0x20];
4465
Matan Barakb4ff3a32016-02-09 14:57:42 +02004466 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004467
4468 struct mlx5_ifc_pkey_bits pkey[0];
4469};
4470
4471struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4472 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004473 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004474
Matan Barakb4ff3a32016-02-09 14:57:42 +02004475 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004476 u8 op_mod[0x10];
4477
4478 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004479 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004480 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004481 u8 vport_number[0x10];
4482
Matan Barakb4ff3a32016-02-09 14:57:42 +02004483 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004484 u8 pkey_index[0x10];
4485};
4486
Eli Coheneff901d2016-03-11 22:58:42 +02004487enum {
4488 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4489 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4490 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4491};
4492
Saeed Mahameede2816822015-05-28 22:28:40 +03004493struct mlx5_ifc_query_hca_vport_gid_out_bits {
4494 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004495 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004496
4497 u8 syndrome[0x20];
4498
Matan Barakb4ff3a32016-02-09 14:57:42 +02004499 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004500
4501 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004502 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004503
4504 struct mlx5_ifc_array128_auto_bits gid[0];
4505};
4506
4507struct mlx5_ifc_query_hca_vport_gid_in_bits {
4508 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004509 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004510
Matan Barakb4ff3a32016-02-09 14:57:42 +02004511 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004512 u8 op_mod[0x10];
4513
4514 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004515 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004516 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004517 u8 vport_number[0x10];
4518
Matan Barakb4ff3a32016-02-09 14:57:42 +02004519 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004520 u8 gid_index[0x10];
4521};
4522
4523struct mlx5_ifc_query_hca_vport_context_out_bits {
4524 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004525 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004526
4527 u8 syndrome[0x20];
4528
Matan Barakb4ff3a32016-02-09 14:57:42 +02004529 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004530
4531 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4532};
4533
4534struct mlx5_ifc_query_hca_vport_context_in_bits {
4535 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004536 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004537
Matan Barakb4ff3a32016-02-09 14:57:42 +02004538 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004539 u8 op_mod[0x10];
4540
4541 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004542 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004543 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004544 u8 vport_number[0x10];
4545
Matan Barakb4ff3a32016-02-09 14:57:42 +02004546 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004547};
4548
4549struct mlx5_ifc_query_hca_cap_out_bits {
4550 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004551 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004552
4553 u8 syndrome[0x20];
4554
Matan Barakb4ff3a32016-02-09 14:57:42 +02004555 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004556
4557 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004558};
4559
4560struct mlx5_ifc_query_hca_cap_in_bits {
4561 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004562 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004563
Matan Barakb4ff3a32016-02-09 14:57:42 +02004564 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004565 u8 op_mod[0x10];
4566
Matan Barakb4ff3a32016-02-09 14:57:42 +02004567 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004568};
4569
Saeed Mahameede2816822015-05-28 22:28:40 +03004570struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004571 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004572 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004573
4574 u8 syndrome[0x20];
4575
Matan Barakb4ff3a32016-02-09 14:57:42 +02004576 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004577
Matan Barakb4ff3a32016-02-09 14:57:42 +02004578 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004579 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004580 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004581 u8 log_size[0x8];
4582
Matan Barakb4ff3a32016-02-09 14:57:42 +02004583 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004584};
4585
Saeed Mahameede2816822015-05-28 22:28:40 +03004586struct mlx5_ifc_query_flow_table_in_bits {
4587 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004588 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004589
Matan Barakb4ff3a32016-02-09 14:57:42 +02004590 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004591 u8 op_mod[0x10];
4592
Matan Barakb4ff3a32016-02-09 14:57:42 +02004593 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004594
4595 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004596 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004597
Matan Barakb4ff3a32016-02-09 14:57:42 +02004598 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004599 u8 table_id[0x18];
4600
Matan Barakb4ff3a32016-02-09 14:57:42 +02004601 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004602};
4603
4604struct mlx5_ifc_query_fte_out_bits {
4605 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004606 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004607
4608 u8 syndrome[0x20];
4609
Matan Barakb4ff3a32016-02-09 14:57:42 +02004610 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004611
4612 struct mlx5_ifc_flow_context_bits flow_context;
4613};
4614
4615struct mlx5_ifc_query_fte_in_bits {
4616 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004617 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004618
Matan Barakb4ff3a32016-02-09 14:57:42 +02004619 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004620 u8 op_mod[0x10];
4621
Matan Barakb4ff3a32016-02-09 14:57:42 +02004622 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004623
4624 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004625 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004626
Matan Barakb4ff3a32016-02-09 14:57:42 +02004627 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004628 u8 table_id[0x18];
4629
Matan Barakb4ff3a32016-02-09 14:57:42 +02004630 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004631
4632 u8 flow_index[0x20];
4633
Matan Barakb4ff3a32016-02-09 14:57:42 +02004634 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004635};
4636
4637enum {
4638 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4639 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4640 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
Ariel Levkovich71c6e862018-05-13 14:33:34 +03004641 MLX5_QUERY_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_2 = 0X3,
Saeed Mahameede2816822015-05-28 22:28:40 +03004642};
4643
4644struct mlx5_ifc_query_flow_group_out_bits {
4645 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004646 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004647
4648 u8 syndrome[0x20];
4649
Matan Barakb4ff3a32016-02-09 14:57:42 +02004650 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004651
4652 u8 start_flow_index[0x20];
4653
Matan Barakb4ff3a32016-02-09 14:57:42 +02004654 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004655
4656 u8 end_flow_index[0x20];
4657
Matan Barakb4ff3a32016-02-09 14:57:42 +02004658 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004659
Matan Barakb4ff3a32016-02-09 14:57:42 +02004660 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004661 u8 match_criteria_enable[0x8];
4662
4663 struct mlx5_ifc_fte_match_param_bits match_criteria;
4664
Matan Barakb4ff3a32016-02-09 14:57:42 +02004665 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004666};
4667
4668struct mlx5_ifc_query_flow_group_in_bits {
4669 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004670 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004671
Matan Barakb4ff3a32016-02-09 14:57:42 +02004672 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004673 u8 op_mod[0x10];
4674
Matan Barakb4ff3a32016-02-09 14:57:42 +02004675 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004676
4677 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004678 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004679
Matan Barakb4ff3a32016-02-09 14:57:42 +02004680 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004681 u8 table_id[0x18];
4682
4683 u8 group_id[0x20];
4684
Matan Barakb4ff3a32016-02-09 14:57:42 +02004685 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004686};
4687
Amir Vadai9dc0b282016-05-13 12:55:39 +00004688struct mlx5_ifc_query_flow_counter_out_bits {
4689 u8 status[0x8];
4690 u8 reserved_at_8[0x18];
4691
4692 u8 syndrome[0x20];
4693
4694 u8 reserved_at_40[0x40];
4695
4696 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4697};
4698
4699struct mlx5_ifc_query_flow_counter_in_bits {
4700 u8 opcode[0x10];
4701 u8 reserved_at_10[0x10];
4702
4703 u8 reserved_at_20[0x10];
4704 u8 op_mod[0x10];
4705
4706 u8 reserved_at_40[0x80];
4707
4708 u8 clear[0x1];
4709 u8 reserved_at_c1[0xf];
4710 u8 num_of_counters[0x10];
4711
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004712 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004713};
4714
Saeed Mahameedd6666752015-12-01 18:03:22 +02004715struct mlx5_ifc_query_esw_vport_context_out_bits {
4716 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004717 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004718
4719 u8 syndrome[0x20];
4720
Matan Barakb4ff3a32016-02-09 14:57:42 +02004721 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004722
4723 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4724};
4725
4726struct mlx5_ifc_query_esw_vport_context_in_bits {
4727 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004728 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004729
Matan Barakb4ff3a32016-02-09 14:57:42 +02004730 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004731 u8 op_mod[0x10];
4732
4733 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004734 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004735 u8 vport_number[0x10];
4736
Matan Barakb4ff3a32016-02-09 14:57:42 +02004737 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004738};
4739
4740struct mlx5_ifc_modify_esw_vport_context_out_bits {
4741 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004742 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004743
4744 u8 syndrome[0x20];
4745
Matan Barakb4ff3a32016-02-09 14:57:42 +02004746 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004747};
4748
4749struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004750 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004751 u8 vport_cvlan_insert[0x1];
4752 u8 vport_svlan_insert[0x1];
4753 u8 vport_cvlan_strip[0x1];
4754 u8 vport_svlan_strip[0x1];
4755};
4756
4757struct mlx5_ifc_modify_esw_vport_context_in_bits {
4758 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004759 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004760
Matan Barakb4ff3a32016-02-09 14:57:42 +02004761 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004762 u8 op_mod[0x10];
4763
4764 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004765 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004766 u8 vport_number[0x10];
4767
4768 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4769
4770 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4771};
4772
Saeed Mahameede2816822015-05-28 22:28:40 +03004773struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004774 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004775 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004776
4777 u8 syndrome[0x20];
4778
Matan Barakb4ff3a32016-02-09 14:57:42 +02004779 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004780
4781 struct mlx5_ifc_eqc_bits eq_context_entry;
4782
Matan Barakb4ff3a32016-02-09 14:57:42 +02004783 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004784
4785 u8 event_bitmask[0x40];
4786
Matan Barakb4ff3a32016-02-09 14:57:42 +02004787 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004788
4789 u8 pas[0][0x40];
4790};
4791
4792struct mlx5_ifc_query_eq_in_bits {
4793 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004794 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004795
Matan Barakb4ff3a32016-02-09 14:57:42 +02004796 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004797 u8 op_mod[0x10];
4798
Matan Barakb4ff3a32016-02-09 14:57:42 +02004799 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004800 u8 eq_number[0x8];
4801
Matan Barakb4ff3a32016-02-09 14:57:42 +02004802 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004803};
4804
Mark Bloch60786f02018-08-28 14:18:46 +03004805struct mlx5_ifc_packet_reformat_context_in_bits {
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004806 u8 reserved_at_0[0x5];
Mark Bloch60786f02018-08-28 14:18:46 +03004807 u8 reformat_type[0x3];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004808 u8 reserved_at_8[0xe];
Mark Bloch60786f02018-08-28 14:18:46 +03004809 u8 reformat_data_size[0xa];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004810
4811 u8 reserved_at_20[0x10];
Mark Bloch60786f02018-08-28 14:18:46 +03004812 u8 reformat_data[2][0x8];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004813
Mark Bloch60786f02018-08-28 14:18:46 +03004814 u8 more_reformat_data[0][0x8];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004815};
4816
Mark Bloch60786f02018-08-28 14:18:46 +03004817struct mlx5_ifc_query_packet_reformat_context_out_bits {
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004818 u8 status[0x8];
4819 u8 reserved_at_8[0x18];
4820
4821 u8 syndrome[0x20];
4822
4823 u8 reserved_at_40[0xa0];
4824
Mark Bloch60786f02018-08-28 14:18:46 +03004825 struct mlx5_ifc_packet_reformat_context_in_bits packet_reformat_context[0];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004826};
4827
Mark Bloch60786f02018-08-28 14:18:46 +03004828struct mlx5_ifc_query_packet_reformat_context_in_bits {
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004829 u8 opcode[0x10];
4830 u8 reserved_at_10[0x10];
4831
4832 u8 reserved_at_20[0x10];
4833 u8 op_mod[0x10];
4834
Mark Bloch60786f02018-08-28 14:18:46 +03004835 u8 packet_reformat_id[0x20];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004836
4837 u8 reserved_at_60[0xa0];
4838};
4839
Mark Bloch60786f02018-08-28 14:18:46 +03004840struct mlx5_ifc_alloc_packet_reformat_context_out_bits {
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004841 u8 status[0x8];
4842 u8 reserved_at_8[0x18];
4843
4844 u8 syndrome[0x20];
4845
Mark Bloch60786f02018-08-28 14:18:46 +03004846 u8 packet_reformat_id[0x20];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004847
4848 u8 reserved_at_60[0x20];
4849};
4850
Mark Bloche0e7a382018-08-28 14:18:45 +03004851enum {
Mark Bloch60786f02018-08-28 14:18:46 +03004852 MLX5_REFORMAT_TYPE_L2_TO_VXLAN = 0x0,
4853 MLX5_REFORMAT_TYPE_L2_TO_NVGRE = 0x1,
Mark Bloche0e7a382018-08-28 14:18:45 +03004854};
4855
Mark Bloch60786f02018-08-28 14:18:46 +03004856struct mlx5_ifc_alloc_packet_reformat_context_in_bits {
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004857 u8 opcode[0x10];
4858 u8 reserved_at_10[0x10];
4859
4860 u8 reserved_at_20[0x10];
4861 u8 op_mod[0x10];
4862
4863 u8 reserved_at_40[0xa0];
4864
Mark Bloch60786f02018-08-28 14:18:46 +03004865 struct mlx5_ifc_packet_reformat_context_in_bits packet_reformat_context;
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004866};
4867
Mark Bloch60786f02018-08-28 14:18:46 +03004868struct mlx5_ifc_dealloc_packet_reformat_context_out_bits {
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004869 u8 status[0x8];
4870 u8 reserved_at_8[0x18];
4871
4872 u8 syndrome[0x20];
4873
4874 u8 reserved_at_40[0x40];
4875};
4876
Mark Bloch60786f02018-08-28 14:18:46 +03004877struct mlx5_ifc_dealloc_packet_reformat_context_in_bits {
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004878 u8 opcode[0x10];
4879 u8 reserved_at_10[0x10];
4880
4881 u8 reserved_20[0x10];
4882 u8 op_mod[0x10];
4883
Mark Bloch60786f02018-08-28 14:18:46 +03004884 u8 packet_reformat_id[0x20];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004885
4886 u8 reserved_60[0x20];
4887};
4888
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004889struct mlx5_ifc_set_action_in_bits {
4890 u8 action_type[0x4];
4891 u8 field[0xc];
4892 u8 reserved_at_10[0x3];
4893 u8 offset[0x5];
4894 u8 reserved_at_18[0x3];
4895 u8 length[0x5];
4896
4897 u8 data[0x20];
4898};
4899
4900struct mlx5_ifc_add_action_in_bits {
4901 u8 action_type[0x4];
4902 u8 field[0xc];
4903 u8 reserved_at_10[0x10];
4904
4905 u8 data[0x20];
4906};
4907
4908union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4909 struct mlx5_ifc_set_action_in_bits set_action_in;
4910 struct mlx5_ifc_add_action_in_bits add_action_in;
4911 u8 reserved_at_0[0x40];
4912};
4913
4914enum {
4915 MLX5_ACTION_TYPE_SET = 0x1,
4916 MLX5_ACTION_TYPE_ADD = 0x2,
4917};
4918
4919enum {
4920 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4921 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4922 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4923 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4924 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4925 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4926 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4927 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4928 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4929 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4930 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4931 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4932 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4933 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4934 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4935 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4936 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4937 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4938 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4939 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4940 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4941 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004942 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004943};
4944
4945struct mlx5_ifc_alloc_modify_header_context_out_bits {
4946 u8 status[0x8];
4947 u8 reserved_at_8[0x18];
4948
4949 u8 syndrome[0x20];
4950
4951 u8 modify_header_id[0x20];
4952
4953 u8 reserved_at_60[0x20];
4954};
4955
4956struct mlx5_ifc_alloc_modify_header_context_in_bits {
4957 u8 opcode[0x10];
4958 u8 reserved_at_10[0x10];
4959
4960 u8 reserved_at_20[0x10];
4961 u8 op_mod[0x10];
4962
4963 u8 reserved_at_40[0x20];
4964
4965 u8 table_type[0x8];
4966 u8 reserved_at_68[0x10];
4967 u8 num_of_actions[0x8];
4968
4969 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4970};
4971
4972struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4973 u8 status[0x8];
4974 u8 reserved_at_8[0x18];
4975
4976 u8 syndrome[0x20];
4977
4978 u8 reserved_at_40[0x40];
4979};
4980
4981struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4982 u8 opcode[0x10];
4983 u8 reserved_at_10[0x10];
4984
4985 u8 reserved_at_20[0x10];
4986 u8 op_mod[0x10];
4987
4988 u8 modify_header_id[0x20];
4989
4990 u8 reserved_at_60[0x20];
4991};
4992
Saeed Mahameede2816822015-05-28 22:28:40 +03004993struct mlx5_ifc_query_dct_out_bits {
4994 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004995 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004996
4997 u8 syndrome[0x20];
4998
Matan Barakb4ff3a32016-02-09 14:57:42 +02004999 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005000
5001 struct mlx5_ifc_dctc_bits dct_context_entry;
5002
Matan Barakb4ff3a32016-02-09 14:57:42 +02005003 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03005004};
5005
5006struct mlx5_ifc_query_dct_in_bits {
5007 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005008 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005009
Matan Barakb4ff3a32016-02-09 14:57:42 +02005010 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005011 u8 op_mod[0x10];
5012
Matan Barakb4ff3a32016-02-09 14:57:42 +02005013 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005014 u8 dctn[0x18];
5015
Matan Barakb4ff3a32016-02-09 14:57:42 +02005016 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005017};
5018
5019struct mlx5_ifc_query_cq_out_bits {
5020 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005021 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005022
5023 u8 syndrome[0x20];
5024
Matan Barakb4ff3a32016-02-09 14:57:42 +02005025 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005026
5027 struct mlx5_ifc_cqc_bits cq_context;
5028
Matan Barakb4ff3a32016-02-09 14:57:42 +02005029 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005030
5031 u8 pas[0][0x40];
5032};
5033
5034struct mlx5_ifc_query_cq_in_bits {
5035 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005036 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005037
Matan Barakb4ff3a32016-02-09 14:57:42 +02005038 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005039 u8 op_mod[0x10];
5040
Matan Barakb4ff3a32016-02-09 14:57:42 +02005041 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005042 u8 cqn[0x18];
5043
Matan Barakb4ff3a32016-02-09 14:57:42 +02005044 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005045};
5046
5047struct mlx5_ifc_query_cong_status_out_bits {
5048 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005049 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005050
5051 u8 syndrome[0x20];
5052
Matan Barakb4ff3a32016-02-09 14:57:42 +02005053 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005054
5055 u8 enable[0x1];
5056 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005057 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005058};
5059
5060struct mlx5_ifc_query_cong_status_in_bits {
5061 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005062 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005063
Matan Barakb4ff3a32016-02-09 14:57:42 +02005064 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005065 u8 op_mod[0x10];
5066
Matan Barakb4ff3a32016-02-09 14:57:42 +02005067 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005068 u8 priority[0x4];
5069 u8 cong_protocol[0x4];
5070
Matan Barakb4ff3a32016-02-09 14:57:42 +02005071 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005072};
5073
5074struct mlx5_ifc_query_cong_statistics_out_bits {
5075 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005076 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005077
5078 u8 syndrome[0x20];
5079
Matan Barakb4ff3a32016-02-09 14:57:42 +02005080 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005081
Parav Pandite1f24a72017-04-16 07:29:29 +03005082 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005083
5084 u8 sum_flows[0x20];
5085
Parav Pandite1f24a72017-04-16 07:29:29 +03005086 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005087
Parav Pandite1f24a72017-04-16 07:29:29 +03005088 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005089
Parav Pandite1f24a72017-04-16 07:29:29 +03005090 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005091
Parav Pandite1f24a72017-04-16 07:29:29 +03005092 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005093
Matan Barakb4ff3a32016-02-09 14:57:42 +02005094 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03005095
5096 u8 time_stamp_high[0x20];
5097
5098 u8 time_stamp_low[0x20];
5099
5100 u8 accumulators_period[0x20];
5101
Parav Pandite1f24a72017-04-16 07:29:29 +03005102 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005103
Parav Pandite1f24a72017-04-16 07:29:29 +03005104 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005105
Parav Pandite1f24a72017-04-16 07:29:29 +03005106 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005107
Parav Pandite1f24a72017-04-16 07:29:29 +03005108 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005109
Matan Barakb4ff3a32016-02-09 14:57:42 +02005110 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03005111};
5112
5113struct mlx5_ifc_query_cong_statistics_in_bits {
5114 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005115 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005116
Matan Barakb4ff3a32016-02-09 14:57:42 +02005117 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005118 u8 op_mod[0x10];
5119
5120 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005121 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03005122
Matan Barakb4ff3a32016-02-09 14:57:42 +02005123 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005124};
5125
5126struct mlx5_ifc_query_cong_params_out_bits {
5127 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005128 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005129
5130 u8 syndrome[0x20];
5131
Matan Barakb4ff3a32016-02-09 14:57:42 +02005132 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005133
5134 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5135};
5136
5137struct mlx5_ifc_query_cong_params_in_bits {
5138 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005139 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005140
Matan Barakb4ff3a32016-02-09 14:57:42 +02005141 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005142 u8 op_mod[0x10];
5143
Matan Barakb4ff3a32016-02-09 14:57:42 +02005144 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005145 u8 cong_protocol[0x4];
5146
Matan Barakb4ff3a32016-02-09 14:57:42 +02005147 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005148};
5149
5150struct mlx5_ifc_query_adapter_out_bits {
5151 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005152 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005153
5154 u8 syndrome[0x20];
5155
Matan Barakb4ff3a32016-02-09 14:57:42 +02005156 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005157
5158 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
5159};
5160
5161struct mlx5_ifc_query_adapter_in_bits {
5162 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005163 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005164
Matan Barakb4ff3a32016-02-09 14:57:42 +02005165 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005166 u8 op_mod[0x10];
5167
Matan Barakb4ff3a32016-02-09 14:57:42 +02005168 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005169};
5170
5171struct mlx5_ifc_qp_2rst_out_bits {
5172 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005173 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005174
5175 u8 syndrome[0x20];
5176
Matan Barakb4ff3a32016-02-09 14:57:42 +02005177 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005178};
5179
5180struct mlx5_ifc_qp_2rst_in_bits {
5181 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005182 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005183
Matan Barakb4ff3a32016-02-09 14:57:42 +02005184 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005185 u8 op_mod[0x10];
5186
Matan Barakb4ff3a32016-02-09 14:57:42 +02005187 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005188 u8 qpn[0x18];
5189
Matan Barakb4ff3a32016-02-09 14:57:42 +02005190 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005191};
5192
5193struct mlx5_ifc_qp_2err_out_bits {
5194 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005195 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005196
5197 u8 syndrome[0x20];
5198
Matan Barakb4ff3a32016-02-09 14:57:42 +02005199 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005200};
5201
5202struct mlx5_ifc_qp_2err_in_bits {
5203 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005204 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005205
Matan Barakb4ff3a32016-02-09 14:57:42 +02005206 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005207 u8 op_mod[0x10];
5208
Matan Barakb4ff3a32016-02-09 14:57:42 +02005209 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005210 u8 qpn[0x18];
5211
Matan Barakb4ff3a32016-02-09 14:57:42 +02005212 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005213};
5214
5215struct mlx5_ifc_page_fault_resume_out_bits {
5216 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005217 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005218
5219 u8 syndrome[0x20];
5220
Matan Barakb4ff3a32016-02-09 14:57:42 +02005221 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005222};
5223
5224struct mlx5_ifc_page_fault_resume_in_bits {
5225 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005226 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005227
Matan Barakb4ff3a32016-02-09 14:57:42 +02005228 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005229 u8 op_mod[0x10];
5230
5231 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005232 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005233 u8 page_fault_type[0x3];
5234 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005235
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005236 u8 reserved_at_60[0x8];
5237 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005238};
5239
5240struct mlx5_ifc_nop_out_bits {
5241 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005242 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005243
5244 u8 syndrome[0x20];
5245
Matan Barakb4ff3a32016-02-09 14:57:42 +02005246 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005247};
5248
5249struct mlx5_ifc_nop_in_bits {
5250 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005251 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005252
Matan Barakb4ff3a32016-02-09 14:57:42 +02005253 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005254 u8 op_mod[0x10];
5255
Matan Barakb4ff3a32016-02-09 14:57:42 +02005256 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005257};
5258
5259struct mlx5_ifc_modify_vport_state_out_bits {
5260 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005261 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005262
5263 u8 syndrome[0x20];
5264
Matan Barakb4ff3a32016-02-09 14:57:42 +02005265 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005266};
5267
5268struct mlx5_ifc_modify_vport_state_in_bits {
5269 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005270 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005271
Matan Barakb4ff3a32016-02-09 14:57:42 +02005272 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005273 u8 op_mod[0x10];
5274
5275 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005276 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005277 u8 vport_number[0x10];
5278
Matan Barakb4ff3a32016-02-09 14:57:42 +02005279 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005280 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005281 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005282};
5283
5284struct mlx5_ifc_modify_tis_out_bits {
5285 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005286 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005287
5288 u8 syndrome[0x20];
5289
Matan Barakb4ff3a32016-02-09 14:57:42 +02005290 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005291};
5292
majd@mellanox.com75850d02016-01-14 19:13:06 +02005293struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005294 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005295
Aviv Heller84df61e2016-05-10 13:47:50 +03005296 u8 reserved_at_20[0x1d];
5297 u8 lag_tx_port_affinity[0x1];
5298 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005299 u8 prio[0x1];
5300};
5301
Saeed Mahameede2816822015-05-28 22:28:40 +03005302struct mlx5_ifc_modify_tis_in_bits {
5303 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005304 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005305
Matan Barakb4ff3a32016-02-09 14:57:42 +02005306 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005307 u8 op_mod[0x10];
5308
Matan Barakb4ff3a32016-02-09 14:57:42 +02005309 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005310 u8 tisn[0x18];
5311
Matan Barakb4ff3a32016-02-09 14:57:42 +02005312 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005313
majd@mellanox.com75850d02016-01-14 19:13:06 +02005314 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005315
Matan Barakb4ff3a32016-02-09 14:57:42 +02005316 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005317
5318 struct mlx5_ifc_tisc_bits ctx;
5319};
5320
Achiad Shochatd9eea402015-08-04 14:05:42 +03005321struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005322 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005323
Matan Barakb4ff3a32016-02-09 14:57:42 +02005324 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005325 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005326 u8 reserved_at_3c[0x1];
5327 u8 hash[0x1];
5328 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005329 u8 lro[0x1];
5330};
5331
Saeed Mahameede2816822015-05-28 22:28:40 +03005332struct mlx5_ifc_modify_tir_out_bits {
5333 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005334 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005335
5336 u8 syndrome[0x20];
5337
Matan Barakb4ff3a32016-02-09 14:57:42 +02005338 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005339};
5340
5341struct mlx5_ifc_modify_tir_in_bits {
5342 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005343 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005344
Matan Barakb4ff3a32016-02-09 14:57:42 +02005345 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005346 u8 op_mod[0x10];
5347
Matan Barakb4ff3a32016-02-09 14:57:42 +02005348 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005349 u8 tirn[0x18];
5350
Matan Barakb4ff3a32016-02-09 14:57:42 +02005351 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005352
Achiad Shochatd9eea402015-08-04 14:05:42 +03005353 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005354
Matan Barakb4ff3a32016-02-09 14:57:42 +02005355 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005356
5357 struct mlx5_ifc_tirc_bits ctx;
5358};
5359
5360struct mlx5_ifc_modify_sq_out_bits {
5361 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005362 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005363
5364 u8 syndrome[0x20];
5365
Matan Barakb4ff3a32016-02-09 14:57:42 +02005366 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005367};
5368
5369struct mlx5_ifc_modify_sq_in_bits {
5370 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005371 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005372
Matan Barakb4ff3a32016-02-09 14:57:42 +02005373 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005374 u8 op_mod[0x10];
5375
5376 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005377 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005378 u8 sqn[0x18];
5379
Matan Barakb4ff3a32016-02-09 14:57:42 +02005380 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005381
5382 u8 modify_bitmask[0x40];
5383
Matan Barakb4ff3a32016-02-09 14:57:42 +02005384 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005385
5386 struct mlx5_ifc_sqc_bits ctx;
5387};
5388
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005389struct mlx5_ifc_modify_scheduling_element_out_bits {
5390 u8 status[0x8];
5391 u8 reserved_at_8[0x18];
5392
5393 u8 syndrome[0x20];
5394
5395 u8 reserved_at_40[0x1c0];
5396};
5397
5398enum {
5399 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5400 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5401};
5402
5403struct mlx5_ifc_modify_scheduling_element_in_bits {
5404 u8 opcode[0x10];
5405 u8 reserved_at_10[0x10];
5406
5407 u8 reserved_at_20[0x10];
5408 u8 op_mod[0x10];
5409
5410 u8 scheduling_hierarchy[0x8];
5411 u8 reserved_at_48[0x18];
5412
5413 u8 scheduling_element_id[0x20];
5414
5415 u8 reserved_at_80[0x20];
5416
5417 u8 modify_bitmask[0x20];
5418
5419 u8 reserved_at_c0[0x40];
5420
5421 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5422
5423 u8 reserved_at_300[0x100];
5424};
5425
Saeed Mahameede2816822015-05-28 22:28:40 +03005426struct mlx5_ifc_modify_rqt_out_bits {
5427 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005428 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005429
5430 u8 syndrome[0x20];
5431
Matan Barakb4ff3a32016-02-09 14:57:42 +02005432 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005433};
5434
Achiad Shochat5c503682015-08-04 14:05:43 +03005435struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005436 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005437
Matan Barakb4ff3a32016-02-09 14:57:42 +02005438 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005439 u8 rqn_list[0x1];
5440};
5441
Saeed Mahameede2816822015-05-28 22:28:40 +03005442struct mlx5_ifc_modify_rqt_in_bits {
5443 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005444 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005445
Matan Barakb4ff3a32016-02-09 14:57:42 +02005446 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005447 u8 op_mod[0x10];
5448
Matan Barakb4ff3a32016-02-09 14:57:42 +02005449 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005450 u8 rqtn[0x18];
5451
Matan Barakb4ff3a32016-02-09 14:57:42 +02005452 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005453
Achiad Shochat5c503682015-08-04 14:05:43 +03005454 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005455
Matan Barakb4ff3a32016-02-09 14:57:42 +02005456 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005457
5458 struct mlx5_ifc_rqtc_bits ctx;
5459};
5460
5461struct mlx5_ifc_modify_rq_out_bits {
5462 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005463 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005464
5465 u8 syndrome[0x20];
5466
Matan Barakb4ff3a32016-02-09 14:57:42 +02005467 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005468};
5469
Alex Vesker83b502a2016-08-04 17:32:02 +03005470enum {
5471 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005472 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005473 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005474};
5475
Saeed Mahameede2816822015-05-28 22:28:40 +03005476struct mlx5_ifc_modify_rq_in_bits {
5477 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005478 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005479
Matan Barakb4ff3a32016-02-09 14:57:42 +02005480 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005481 u8 op_mod[0x10];
5482
5483 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005484 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005485 u8 rqn[0x18];
5486
Matan Barakb4ff3a32016-02-09 14:57:42 +02005487 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005488
5489 u8 modify_bitmask[0x40];
5490
Matan Barakb4ff3a32016-02-09 14:57:42 +02005491 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005492
5493 struct mlx5_ifc_rqc_bits ctx;
5494};
5495
5496struct mlx5_ifc_modify_rmp_out_bits {
5497 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005498 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005499
5500 u8 syndrome[0x20];
5501
Matan Barakb4ff3a32016-02-09 14:57:42 +02005502 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005503};
5504
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005505struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005506 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005507
Matan Barakb4ff3a32016-02-09 14:57:42 +02005508 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005509 u8 lwm[0x1];
5510};
5511
Saeed Mahameede2816822015-05-28 22:28:40 +03005512struct mlx5_ifc_modify_rmp_in_bits {
5513 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005514 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005515
Matan Barakb4ff3a32016-02-09 14:57:42 +02005516 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005517 u8 op_mod[0x10];
5518
5519 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005520 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005521 u8 rmpn[0x18];
5522
Matan Barakb4ff3a32016-02-09 14:57:42 +02005523 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005524
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005525 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005526
Matan Barakb4ff3a32016-02-09 14:57:42 +02005527 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005528
5529 struct mlx5_ifc_rmpc_bits ctx;
5530};
5531
5532struct mlx5_ifc_modify_nic_vport_context_out_bits {
5533 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005534 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005535
5536 u8 syndrome[0x20];
5537
Matan Barakb4ff3a32016-02-09 14:57:42 +02005538 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005539};
5540
5541struct mlx5_ifc_modify_nic_vport_field_select_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +02005542 u8 reserved_at_0[0x12];
5543 u8 affiliation[0x1];
5544 u8 reserved_at_e[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03005545 u8 disable_uc_local_lb[0x1];
5546 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005547 u8 node_guid[0x1];
5548 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005549 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005550 u8 mtu[0x1];
5551 u8 change_event[0x1];
5552 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005553 u8 permanent_address[0x1];
5554 u8 addresses_list[0x1];
5555 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005556 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005557};
5558
5559struct mlx5_ifc_modify_nic_vport_context_in_bits {
5560 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005561 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005562
Matan Barakb4ff3a32016-02-09 14:57:42 +02005563 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005564 u8 op_mod[0x10];
5565
5566 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005567 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005568 u8 vport_number[0x10];
5569
5570 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5571
Matan Barakb4ff3a32016-02-09 14:57:42 +02005572 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005573
5574 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5575};
5576
5577struct mlx5_ifc_modify_hca_vport_context_out_bits {
5578 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005579 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005580
5581 u8 syndrome[0x20];
5582
Matan Barakb4ff3a32016-02-09 14:57:42 +02005583 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005584};
5585
5586struct mlx5_ifc_modify_hca_vport_context_in_bits {
5587 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005588 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005589
Matan Barakb4ff3a32016-02-09 14:57:42 +02005590 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005591 u8 op_mod[0x10];
5592
5593 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005594 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005595 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005596 u8 vport_number[0x10];
5597
Matan Barakb4ff3a32016-02-09 14:57:42 +02005598 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005599
5600 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5601};
5602
5603struct mlx5_ifc_modify_cq_out_bits {
5604 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005605 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005606
5607 u8 syndrome[0x20];
5608
Matan Barakb4ff3a32016-02-09 14:57:42 +02005609 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005610};
5611
5612enum {
5613 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5614 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5615};
5616
5617struct mlx5_ifc_modify_cq_in_bits {
5618 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005619 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005620
Matan Barakb4ff3a32016-02-09 14:57:42 +02005621 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005622 u8 op_mod[0x10];
5623
Matan Barakb4ff3a32016-02-09 14:57:42 +02005624 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005625 u8 cqn[0x18];
5626
5627 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5628
5629 struct mlx5_ifc_cqc_bits cq_context;
5630
Matan Barakb4ff3a32016-02-09 14:57:42 +02005631 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005632
5633 u8 pas[0][0x40];
5634};
5635
5636struct mlx5_ifc_modify_cong_status_out_bits {
5637 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005638 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005639
5640 u8 syndrome[0x20];
5641
Matan Barakb4ff3a32016-02-09 14:57:42 +02005642 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005643};
5644
5645struct mlx5_ifc_modify_cong_status_in_bits {
5646 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005647 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005648
Matan Barakb4ff3a32016-02-09 14:57:42 +02005649 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005650 u8 op_mod[0x10];
5651
Matan Barakb4ff3a32016-02-09 14:57:42 +02005652 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005653 u8 priority[0x4];
5654 u8 cong_protocol[0x4];
5655
5656 u8 enable[0x1];
5657 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005658 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005659};
5660
5661struct mlx5_ifc_modify_cong_params_out_bits {
5662 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005663 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005664
5665 u8 syndrome[0x20];
5666
Matan Barakb4ff3a32016-02-09 14:57:42 +02005667 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005668};
5669
5670struct mlx5_ifc_modify_cong_params_in_bits {
5671 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005672 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005673
Matan Barakb4ff3a32016-02-09 14:57:42 +02005674 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005675 u8 op_mod[0x10];
5676
Matan Barakb4ff3a32016-02-09 14:57:42 +02005677 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005678 u8 cong_protocol[0x4];
5679
5680 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5681
Matan Barakb4ff3a32016-02-09 14:57:42 +02005682 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005683
5684 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5685};
5686
5687struct mlx5_ifc_manage_pages_out_bits {
5688 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005689 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005690
5691 u8 syndrome[0x20];
5692
5693 u8 output_num_entries[0x20];
5694
Matan Barakb4ff3a32016-02-09 14:57:42 +02005695 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005696
5697 u8 pas[0][0x40];
5698};
5699
5700enum {
5701 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5702 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5703 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5704};
5705
5706struct mlx5_ifc_manage_pages_in_bits {
5707 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005708 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005709
Matan Barakb4ff3a32016-02-09 14:57:42 +02005710 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005711 u8 op_mod[0x10];
5712
Matan Barakb4ff3a32016-02-09 14:57:42 +02005713 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005714 u8 function_id[0x10];
5715
5716 u8 input_num_entries[0x20];
5717
5718 u8 pas[0][0x40];
5719};
5720
5721struct mlx5_ifc_mad_ifc_out_bits {
5722 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005723 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005724
5725 u8 syndrome[0x20];
5726
Matan Barakb4ff3a32016-02-09 14:57:42 +02005727 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005728
5729 u8 response_mad_packet[256][0x8];
5730};
5731
5732struct mlx5_ifc_mad_ifc_in_bits {
5733 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005734 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005735
Matan Barakb4ff3a32016-02-09 14:57:42 +02005736 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005737 u8 op_mod[0x10];
5738
5739 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005740 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005741 u8 port[0x8];
5742
Matan Barakb4ff3a32016-02-09 14:57:42 +02005743 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005744
5745 u8 mad[256][0x8];
5746};
5747
5748struct mlx5_ifc_init_hca_out_bits {
5749 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005750 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005751
5752 u8 syndrome[0x20];
5753
Matan Barakb4ff3a32016-02-09 14:57:42 +02005754 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005755};
5756
5757struct mlx5_ifc_init_hca_in_bits {
5758 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005759 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005760
Matan Barakb4ff3a32016-02-09 14:57:42 +02005761 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005762 u8 op_mod[0x10];
5763
Matan Barakb4ff3a32016-02-09 14:57:42 +02005764 u8 reserved_at_40[0x40];
Daniel Jurgens8737f812018-01-04 17:25:32 +02005765 u8 sw_owner_id[4][0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005766};
5767
5768struct mlx5_ifc_init2rtr_qp_out_bits {
5769 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005770 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005771
5772 u8 syndrome[0x20];
5773
Matan Barakb4ff3a32016-02-09 14:57:42 +02005774 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005775};
5776
5777struct mlx5_ifc_init2rtr_qp_in_bits {
5778 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005779 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005780
Matan Barakb4ff3a32016-02-09 14:57:42 +02005781 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005782 u8 op_mod[0x10];
5783
Matan Barakb4ff3a32016-02-09 14:57:42 +02005784 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005785 u8 qpn[0x18];
5786
Matan Barakb4ff3a32016-02-09 14:57:42 +02005787 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005788
5789 u8 opt_param_mask[0x20];
5790
Matan Barakb4ff3a32016-02-09 14:57:42 +02005791 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005792
5793 struct mlx5_ifc_qpc_bits qpc;
5794
Matan Barakb4ff3a32016-02-09 14:57:42 +02005795 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005796};
5797
5798struct mlx5_ifc_init2init_qp_out_bits {
5799 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005800 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005801
5802 u8 syndrome[0x20];
5803
Matan Barakb4ff3a32016-02-09 14:57:42 +02005804 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005805};
5806
5807struct mlx5_ifc_init2init_qp_in_bits {
5808 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005809 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005810
Matan Barakb4ff3a32016-02-09 14:57:42 +02005811 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005812 u8 op_mod[0x10];
5813
Matan Barakb4ff3a32016-02-09 14:57:42 +02005814 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005815 u8 qpn[0x18];
5816
Matan Barakb4ff3a32016-02-09 14:57:42 +02005817 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005818
5819 u8 opt_param_mask[0x20];
5820
Matan Barakb4ff3a32016-02-09 14:57:42 +02005821 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005822
5823 struct mlx5_ifc_qpc_bits qpc;
5824
Matan Barakb4ff3a32016-02-09 14:57:42 +02005825 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005826};
5827
5828struct mlx5_ifc_get_dropped_packet_log_out_bits {
5829 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005830 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005831
5832 u8 syndrome[0x20];
5833
Matan Barakb4ff3a32016-02-09 14:57:42 +02005834 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005835
5836 u8 packet_headers_log[128][0x8];
5837
5838 u8 packet_syndrome[64][0x8];
5839};
5840
5841struct mlx5_ifc_get_dropped_packet_log_in_bits {
5842 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005843 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005844
Matan Barakb4ff3a32016-02-09 14:57:42 +02005845 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005846 u8 op_mod[0x10];
5847
Matan Barakb4ff3a32016-02-09 14:57:42 +02005848 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005849};
5850
5851struct mlx5_ifc_gen_eqe_in_bits {
5852 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005853 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005854
Matan Barakb4ff3a32016-02-09 14:57:42 +02005855 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005856 u8 op_mod[0x10];
5857
Matan Barakb4ff3a32016-02-09 14:57:42 +02005858 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005859 u8 eq_number[0x8];
5860
Matan Barakb4ff3a32016-02-09 14:57:42 +02005861 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005862
5863 u8 eqe[64][0x8];
5864};
5865
5866struct mlx5_ifc_gen_eq_out_bits {
5867 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005868 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005869
5870 u8 syndrome[0x20];
5871
Matan Barakb4ff3a32016-02-09 14:57:42 +02005872 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005873};
5874
5875struct mlx5_ifc_enable_hca_out_bits {
5876 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005877 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005878
5879 u8 syndrome[0x20];
5880
Matan Barakb4ff3a32016-02-09 14:57:42 +02005881 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005882};
5883
5884struct mlx5_ifc_enable_hca_in_bits {
5885 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005886 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005887
Matan Barakb4ff3a32016-02-09 14:57:42 +02005888 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005889 u8 op_mod[0x10];
5890
Matan Barakb4ff3a32016-02-09 14:57:42 +02005891 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005892 u8 function_id[0x10];
5893
Matan Barakb4ff3a32016-02-09 14:57:42 +02005894 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005895};
5896
5897struct mlx5_ifc_drain_dct_out_bits {
5898 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005899 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005900
5901 u8 syndrome[0x20];
5902
Matan Barakb4ff3a32016-02-09 14:57:42 +02005903 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005904};
5905
5906struct mlx5_ifc_drain_dct_in_bits {
5907 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005908 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005909
Matan Barakb4ff3a32016-02-09 14:57:42 +02005910 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005911 u8 op_mod[0x10];
5912
Matan Barakb4ff3a32016-02-09 14:57:42 +02005913 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005914 u8 dctn[0x18];
5915
Matan Barakb4ff3a32016-02-09 14:57:42 +02005916 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005917};
5918
5919struct mlx5_ifc_disable_hca_out_bits {
5920 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005921 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005922
5923 u8 syndrome[0x20];
5924
Matan Barakb4ff3a32016-02-09 14:57:42 +02005925 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005926};
5927
5928struct mlx5_ifc_disable_hca_in_bits {
5929 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005930 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005931
Matan Barakb4ff3a32016-02-09 14:57:42 +02005932 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005933 u8 op_mod[0x10];
5934
Matan Barakb4ff3a32016-02-09 14:57:42 +02005935 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005936 u8 function_id[0x10];
5937
Matan Barakb4ff3a32016-02-09 14:57:42 +02005938 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005939};
5940
5941struct mlx5_ifc_detach_from_mcg_out_bits {
5942 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005943 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005944
5945 u8 syndrome[0x20];
5946
Matan Barakb4ff3a32016-02-09 14:57:42 +02005947 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005948};
5949
5950struct mlx5_ifc_detach_from_mcg_in_bits {
5951 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005952 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005953
Matan Barakb4ff3a32016-02-09 14:57:42 +02005954 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005955 u8 op_mod[0x10];
5956
Matan Barakb4ff3a32016-02-09 14:57:42 +02005957 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005958 u8 qpn[0x18];
5959
Matan Barakb4ff3a32016-02-09 14:57:42 +02005960 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005961
5962 u8 multicast_gid[16][0x8];
5963};
5964
Saeed Mahameed74862162016-06-09 15:11:34 +03005965struct mlx5_ifc_destroy_xrq_out_bits {
5966 u8 status[0x8];
5967 u8 reserved_at_8[0x18];
5968
5969 u8 syndrome[0x20];
5970
5971 u8 reserved_at_40[0x40];
5972};
5973
5974struct mlx5_ifc_destroy_xrq_in_bits {
5975 u8 opcode[0x10];
5976 u8 reserved_at_10[0x10];
5977
5978 u8 reserved_at_20[0x10];
5979 u8 op_mod[0x10];
5980
5981 u8 reserved_at_40[0x8];
5982 u8 xrqn[0x18];
5983
5984 u8 reserved_at_60[0x20];
5985};
5986
Saeed Mahameede2816822015-05-28 22:28:40 +03005987struct mlx5_ifc_destroy_xrc_srq_out_bits {
5988 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005989 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005990
5991 u8 syndrome[0x20];
5992
Matan Barakb4ff3a32016-02-09 14:57:42 +02005993 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005994};
5995
5996struct mlx5_ifc_destroy_xrc_srq_in_bits {
5997 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005998 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005999
Matan Barakb4ff3a32016-02-09 14:57:42 +02006000 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006001 u8 op_mod[0x10];
6002
Matan Barakb4ff3a32016-02-09 14:57:42 +02006003 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006004 u8 xrc_srqn[0x18];
6005
Matan Barakb4ff3a32016-02-09 14:57:42 +02006006 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006007};
6008
6009struct mlx5_ifc_destroy_tis_out_bits {
6010 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006011 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006012
6013 u8 syndrome[0x20];
6014
Matan Barakb4ff3a32016-02-09 14:57:42 +02006015 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006016};
6017
6018struct mlx5_ifc_destroy_tis_in_bits {
6019 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006020 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006021
Matan Barakb4ff3a32016-02-09 14:57:42 +02006022 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006023 u8 op_mod[0x10];
6024
Matan Barakb4ff3a32016-02-09 14:57:42 +02006025 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006026 u8 tisn[0x18];
6027
Matan Barakb4ff3a32016-02-09 14:57:42 +02006028 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006029};
6030
6031struct mlx5_ifc_destroy_tir_out_bits {
6032 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006033 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006034
6035 u8 syndrome[0x20];
6036
Matan Barakb4ff3a32016-02-09 14:57:42 +02006037 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006038};
6039
6040struct mlx5_ifc_destroy_tir_in_bits {
6041 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006042 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006043
Matan Barakb4ff3a32016-02-09 14:57:42 +02006044 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006045 u8 op_mod[0x10];
6046
Matan Barakb4ff3a32016-02-09 14:57:42 +02006047 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006048 u8 tirn[0x18];
6049
Matan Barakb4ff3a32016-02-09 14:57:42 +02006050 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006051};
6052
6053struct mlx5_ifc_destroy_srq_out_bits {
6054 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006055 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006056
6057 u8 syndrome[0x20];
6058
Matan Barakb4ff3a32016-02-09 14:57:42 +02006059 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006060};
6061
6062struct mlx5_ifc_destroy_srq_in_bits {
6063 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006064 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006065
Matan Barakb4ff3a32016-02-09 14:57:42 +02006066 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006067 u8 op_mod[0x10];
6068
Matan Barakb4ff3a32016-02-09 14:57:42 +02006069 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006070 u8 srqn[0x18];
6071
Matan Barakb4ff3a32016-02-09 14:57:42 +02006072 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006073};
6074
6075struct mlx5_ifc_destroy_sq_out_bits {
6076 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006077 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006078
6079 u8 syndrome[0x20];
6080
Matan Barakb4ff3a32016-02-09 14:57:42 +02006081 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006082};
6083
6084struct mlx5_ifc_destroy_sq_in_bits {
6085 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006086 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006087
Matan Barakb4ff3a32016-02-09 14:57:42 +02006088 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006089 u8 op_mod[0x10];
6090
Matan Barakb4ff3a32016-02-09 14:57:42 +02006091 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006092 u8 sqn[0x18];
6093
Matan Barakb4ff3a32016-02-09 14:57:42 +02006094 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006095};
6096
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006097struct mlx5_ifc_destroy_scheduling_element_out_bits {
6098 u8 status[0x8];
6099 u8 reserved_at_8[0x18];
6100
6101 u8 syndrome[0x20];
6102
6103 u8 reserved_at_40[0x1c0];
6104};
6105
6106struct mlx5_ifc_destroy_scheduling_element_in_bits {
6107 u8 opcode[0x10];
6108 u8 reserved_at_10[0x10];
6109
6110 u8 reserved_at_20[0x10];
6111 u8 op_mod[0x10];
6112
6113 u8 scheduling_hierarchy[0x8];
6114 u8 reserved_at_48[0x18];
6115
6116 u8 scheduling_element_id[0x20];
6117
6118 u8 reserved_at_80[0x180];
6119};
6120
Saeed Mahameede2816822015-05-28 22:28:40 +03006121struct mlx5_ifc_destroy_rqt_out_bits {
6122 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006123 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006124
6125 u8 syndrome[0x20];
6126
Matan Barakb4ff3a32016-02-09 14:57:42 +02006127 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006128};
6129
6130struct mlx5_ifc_destroy_rqt_in_bits {
6131 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006132 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006133
Matan Barakb4ff3a32016-02-09 14:57:42 +02006134 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006135 u8 op_mod[0x10];
6136
Matan Barakb4ff3a32016-02-09 14:57:42 +02006137 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006138 u8 rqtn[0x18];
6139
Matan Barakb4ff3a32016-02-09 14:57:42 +02006140 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006141};
6142
6143struct mlx5_ifc_destroy_rq_out_bits {
6144 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006145 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006146
6147 u8 syndrome[0x20];
6148
Matan Barakb4ff3a32016-02-09 14:57:42 +02006149 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006150};
6151
6152struct mlx5_ifc_destroy_rq_in_bits {
6153 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006154 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006155
Matan Barakb4ff3a32016-02-09 14:57:42 +02006156 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006157 u8 op_mod[0x10];
6158
Matan Barakb4ff3a32016-02-09 14:57:42 +02006159 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006160 u8 rqn[0x18];
6161
Matan Barakb4ff3a32016-02-09 14:57:42 +02006162 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006163};
6164
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03006165struct mlx5_ifc_set_delay_drop_params_in_bits {
6166 u8 opcode[0x10];
6167 u8 reserved_at_10[0x10];
6168
6169 u8 reserved_at_20[0x10];
6170 u8 op_mod[0x10];
6171
6172 u8 reserved_at_40[0x20];
6173
6174 u8 reserved_at_60[0x10];
6175 u8 delay_drop_timeout[0x10];
6176};
6177
6178struct mlx5_ifc_set_delay_drop_params_out_bits {
6179 u8 status[0x8];
6180 u8 reserved_at_8[0x18];
6181
6182 u8 syndrome[0x20];
6183
6184 u8 reserved_at_40[0x40];
6185};
6186
Saeed Mahameede2816822015-05-28 22:28:40 +03006187struct mlx5_ifc_destroy_rmp_out_bits {
6188 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006189 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006190
6191 u8 syndrome[0x20];
6192
Matan Barakb4ff3a32016-02-09 14:57:42 +02006193 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006194};
6195
6196struct mlx5_ifc_destroy_rmp_in_bits {
6197 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006198 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006199
Matan Barakb4ff3a32016-02-09 14:57:42 +02006200 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006201 u8 op_mod[0x10];
6202
Matan Barakb4ff3a32016-02-09 14:57:42 +02006203 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006204 u8 rmpn[0x18];
6205
Matan Barakb4ff3a32016-02-09 14:57:42 +02006206 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006207};
6208
6209struct mlx5_ifc_destroy_qp_out_bits {
6210 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006211 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006212
6213 u8 syndrome[0x20];
6214
Matan Barakb4ff3a32016-02-09 14:57:42 +02006215 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006216};
6217
6218struct mlx5_ifc_destroy_qp_in_bits {
6219 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006220 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006221
Matan Barakb4ff3a32016-02-09 14:57:42 +02006222 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006223 u8 op_mod[0x10];
6224
Matan Barakb4ff3a32016-02-09 14:57:42 +02006225 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006226 u8 qpn[0x18];
6227
Matan Barakb4ff3a32016-02-09 14:57:42 +02006228 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006229};
6230
6231struct mlx5_ifc_destroy_psv_out_bits {
6232 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006233 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006234
6235 u8 syndrome[0x20];
6236
Matan Barakb4ff3a32016-02-09 14:57:42 +02006237 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006238};
6239
6240struct mlx5_ifc_destroy_psv_in_bits {
6241 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006242 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006243
Matan Barakb4ff3a32016-02-09 14:57:42 +02006244 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006245 u8 op_mod[0x10];
6246
Matan Barakb4ff3a32016-02-09 14:57:42 +02006247 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006248 u8 psvn[0x18];
6249
Matan Barakb4ff3a32016-02-09 14:57:42 +02006250 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006251};
6252
6253struct mlx5_ifc_destroy_mkey_out_bits {
6254 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006255 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006256
6257 u8 syndrome[0x20];
6258
Matan Barakb4ff3a32016-02-09 14:57:42 +02006259 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006260};
6261
6262struct mlx5_ifc_destroy_mkey_in_bits {
6263 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006264 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006265
Matan Barakb4ff3a32016-02-09 14:57:42 +02006266 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006267 u8 op_mod[0x10];
6268
Matan Barakb4ff3a32016-02-09 14:57:42 +02006269 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006270 u8 mkey_index[0x18];
6271
Matan Barakb4ff3a32016-02-09 14:57:42 +02006272 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006273};
6274
6275struct mlx5_ifc_destroy_flow_table_out_bits {
6276 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006277 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006278
6279 u8 syndrome[0x20];
6280
Matan Barakb4ff3a32016-02-09 14:57:42 +02006281 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006282};
6283
6284struct mlx5_ifc_destroy_flow_table_in_bits {
6285 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006286 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006287
Matan Barakb4ff3a32016-02-09 14:57:42 +02006288 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006289 u8 op_mod[0x10];
6290
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006291 u8 other_vport[0x1];
6292 u8 reserved_at_41[0xf];
6293 u8 vport_number[0x10];
6294
6295 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006296
6297 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006298 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006299
Matan Barakb4ff3a32016-02-09 14:57:42 +02006300 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006301 u8 table_id[0x18];
6302
Matan Barakb4ff3a32016-02-09 14:57:42 +02006303 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006304};
6305
6306struct mlx5_ifc_destroy_flow_group_out_bits {
6307 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006308 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006309
6310 u8 syndrome[0x20];
6311
Matan Barakb4ff3a32016-02-09 14:57:42 +02006312 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006313};
6314
6315struct mlx5_ifc_destroy_flow_group_in_bits {
6316 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006317 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006318
Matan Barakb4ff3a32016-02-09 14:57:42 +02006319 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006320 u8 op_mod[0x10];
6321
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006322 u8 other_vport[0x1];
6323 u8 reserved_at_41[0xf];
6324 u8 vport_number[0x10];
6325
6326 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006327
6328 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006329 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006330
Matan Barakb4ff3a32016-02-09 14:57:42 +02006331 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006332 u8 table_id[0x18];
6333
6334 u8 group_id[0x20];
6335
Matan Barakb4ff3a32016-02-09 14:57:42 +02006336 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006337};
6338
6339struct mlx5_ifc_destroy_eq_out_bits {
6340 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006341 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006342
6343 u8 syndrome[0x20];
6344
Matan Barakb4ff3a32016-02-09 14:57:42 +02006345 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006346};
6347
6348struct mlx5_ifc_destroy_eq_in_bits {
6349 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006350 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006351
Matan Barakb4ff3a32016-02-09 14:57:42 +02006352 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006353 u8 op_mod[0x10];
6354
Matan Barakb4ff3a32016-02-09 14:57:42 +02006355 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006356 u8 eq_number[0x8];
6357
Matan Barakb4ff3a32016-02-09 14:57:42 +02006358 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006359};
6360
6361struct mlx5_ifc_destroy_dct_out_bits {
6362 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006363 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006364
6365 u8 syndrome[0x20];
6366
Matan Barakb4ff3a32016-02-09 14:57:42 +02006367 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006368};
6369
6370struct mlx5_ifc_destroy_dct_in_bits {
6371 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006372 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006373
Matan Barakb4ff3a32016-02-09 14:57:42 +02006374 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006375 u8 op_mod[0x10];
6376
Matan Barakb4ff3a32016-02-09 14:57:42 +02006377 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006378 u8 dctn[0x18];
6379
Matan Barakb4ff3a32016-02-09 14:57:42 +02006380 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006381};
6382
6383struct mlx5_ifc_destroy_cq_out_bits {
6384 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006385 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006386
6387 u8 syndrome[0x20];
6388
Matan Barakb4ff3a32016-02-09 14:57:42 +02006389 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006390};
6391
6392struct mlx5_ifc_destroy_cq_in_bits {
6393 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006394 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006395
Matan Barakb4ff3a32016-02-09 14:57:42 +02006396 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006397 u8 op_mod[0x10];
6398
Matan Barakb4ff3a32016-02-09 14:57:42 +02006399 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006400 u8 cqn[0x18];
6401
Matan Barakb4ff3a32016-02-09 14:57:42 +02006402 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006403};
6404
6405struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6406 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006407 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006408
6409 u8 syndrome[0x20];
6410
Matan Barakb4ff3a32016-02-09 14:57:42 +02006411 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006412};
6413
6414struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6415 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006416 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006417
Matan Barakb4ff3a32016-02-09 14:57:42 +02006418 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006419 u8 op_mod[0x10];
6420
Matan Barakb4ff3a32016-02-09 14:57:42 +02006421 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006422
Matan Barakb4ff3a32016-02-09 14:57:42 +02006423 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006424 u8 vxlan_udp_port[0x10];
6425};
6426
6427struct mlx5_ifc_delete_l2_table_entry_out_bits {
6428 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006429 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006430
6431 u8 syndrome[0x20];
6432
Matan Barakb4ff3a32016-02-09 14:57:42 +02006433 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006434};
6435
6436struct mlx5_ifc_delete_l2_table_entry_in_bits {
6437 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006438 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006439
Matan Barakb4ff3a32016-02-09 14:57:42 +02006440 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006441 u8 op_mod[0x10];
6442
Matan Barakb4ff3a32016-02-09 14:57:42 +02006443 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006444
Matan Barakb4ff3a32016-02-09 14:57:42 +02006445 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006446 u8 table_index[0x18];
6447
Matan Barakb4ff3a32016-02-09 14:57:42 +02006448 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006449};
6450
6451struct mlx5_ifc_delete_fte_out_bits {
6452 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006453 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006454
6455 u8 syndrome[0x20];
6456
Matan Barakb4ff3a32016-02-09 14:57:42 +02006457 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006458};
6459
6460struct mlx5_ifc_delete_fte_in_bits {
6461 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006462 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006463
Matan Barakb4ff3a32016-02-09 14:57:42 +02006464 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006465 u8 op_mod[0x10];
6466
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006467 u8 other_vport[0x1];
6468 u8 reserved_at_41[0xf];
6469 u8 vport_number[0x10];
6470
6471 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006472
6473 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006474 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006475
Matan Barakb4ff3a32016-02-09 14:57:42 +02006476 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006477 u8 table_id[0x18];
6478
Matan Barakb4ff3a32016-02-09 14:57:42 +02006479 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006480
6481 u8 flow_index[0x20];
6482
Matan Barakb4ff3a32016-02-09 14:57:42 +02006483 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006484};
6485
6486struct mlx5_ifc_dealloc_xrcd_out_bits {
6487 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006488 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006489
6490 u8 syndrome[0x20];
6491
Matan Barakb4ff3a32016-02-09 14:57:42 +02006492 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006493};
6494
6495struct mlx5_ifc_dealloc_xrcd_in_bits {
6496 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006497 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006498
Matan Barakb4ff3a32016-02-09 14:57:42 +02006499 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006500 u8 op_mod[0x10];
6501
Matan Barakb4ff3a32016-02-09 14:57:42 +02006502 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006503 u8 xrcd[0x18];
6504
Matan Barakb4ff3a32016-02-09 14:57:42 +02006505 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006506};
6507
6508struct mlx5_ifc_dealloc_uar_out_bits {
6509 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006510 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006511
6512 u8 syndrome[0x20];
6513
Matan Barakb4ff3a32016-02-09 14:57:42 +02006514 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006515};
6516
6517struct mlx5_ifc_dealloc_uar_in_bits {
6518 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006519 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006520
Matan Barakb4ff3a32016-02-09 14:57:42 +02006521 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006522 u8 op_mod[0x10];
6523
Matan Barakb4ff3a32016-02-09 14:57:42 +02006524 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006525 u8 uar[0x18];
6526
Matan Barakb4ff3a32016-02-09 14:57:42 +02006527 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006528};
6529
6530struct mlx5_ifc_dealloc_transport_domain_out_bits {
6531 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006532 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006533
6534 u8 syndrome[0x20];
6535
Matan Barakb4ff3a32016-02-09 14:57:42 +02006536 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006537};
6538
6539struct mlx5_ifc_dealloc_transport_domain_in_bits {
6540 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006541 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006542
Matan Barakb4ff3a32016-02-09 14:57:42 +02006543 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006544 u8 op_mod[0x10];
6545
Matan Barakb4ff3a32016-02-09 14:57:42 +02006546 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006547 u8 transport_domain[0x18];
6548
Matan Barakb4ff3a32016-02-09 14:57:42 +02006549 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006550};
6551
6552struct mlx5_ifc_dealloc_q_counter_out_bits {
6553 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006554 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006555
6556 u8 syndrome[0x20];
6557
Matan Barakb4ff3a32016-02-09 14:57:42 +02006558 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006559};
6560
6561struct mlx5_ifc_dealloc_q_counter_in_bits {
6562 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006563 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006564
Matan Barakb4ff3a32016-02-09 14:57:42 +02006565 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006566 u8 op_mod[0x10];
6567
Matan Barakb4ff3a32016-02-09 14:57:42 +02006568 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006569 u8 counter_set_id[0x8];
6570
Matan Barakb4ff3a32016-02-09 14:57:42 +02006571 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006572};
6573
6574struct mlx5_ifc_dealloc_pd_out_bits {
6575 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006576 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006577
6578 u8 syndrome[0x20];
6579
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581};
6582
6583struct mlx5_ifc_dealloc_pd_in_bits {
6584 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006585 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006586
Matan Barakb4ff3a32016-02-09 14:57:42 +02006587 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006588 u8 op_mod[0x10];
6589
Matan Barakb4ff3a32016-02-09 14:57:42 +02006590 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006591 u8 pd[0x18];
6592
Matan Barakb4ff3a32016-02-09 14:57:42 +02006593 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006594};
6595
Amir Vadai9dc0b282016-05-13 12:55:39 +00006596struct mlx5_ifc_dealloc_flow_counter_out_bits {
6597 u8 status[0x8];
6598 u8 reserved_at_8[0x18];
6599
6600 u8 syndrome[0x20];
6601
6602 u8 reserved_at_40[0x40];
6603};
6604
6605struct mlx5_ifc_dealloc_flow_counter_in_bits {
6606 u8 opcode[0x10];
6607 u8 reserved_at_10[0x10];
6608
6609 u8 reserved_at_20[0x10];
6610 u8 op_mod[0x10];
6611
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006612 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006613
6614 u8 reserved_at_60[0x20];
6615};
6616
Saeed Mahameed74862162016-06-09 15:11:34 +03006617struct mlx5_ifc_create_xrq_out_bits {
6618 u8 status[0x8];
6619 u8 reserved_at_8[0x18];
6620
6621 u8 syndrome[0x20];
6622
6623 u8 reserved_at_40[0x8];
6624 u8 xrqn[0x18];
6625
6626 u8 reserved_at_60[0x20];
6627};
6628
6629struct mlx5_ifc_create_xrq_in_bits {
6630 u8 opcode[0x10];
6631 u8 reserved_at_10[0x10];
6632
6633 u8 reserved_at_20[0x10];
6634 u8 op_mod[0x10];
6635
6636 u8 reserved_at_40[0x40];
6637
6638 struct mlx5_ifc_xrqc_bits xrq_context;
6639};
6640
Saeed Mahameede2816822015-05-28 22:28:40 +03006641struct mlx5_ifc_create_xrc_srq_out_bits {
6642 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006643 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006644
6645 u8 syndrome[0x20];
6646
Matan Barakb4ff3a32016-02-09 14:57:42 +02006647 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006648 u8 xrc_srqn[0x18];
6649
Matan Barakb4ff3a32016-02-09 14:57:42 +02006650 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006651};
6652
6653struct mlx5_ifc_create_xrc_srq_in_bits {
6654 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006655 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006656
Matan Barakb4ff3a32016-02-09 14:57:42 +02006657 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006658 u8 op_mod[0x10];
6659
Matan Barakb4ff3a32016-02-09 14:57:42 +02006660 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006661
6662 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6663
Matan Barakb4ff3a32016-02-09 14:57:42 +02006664 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006665
6666 u8 pas[0][0x40];
6667};
6668
6669struct mlx5_ifc_create_tis_out_bits {
6670 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006671 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006672
6673 u8 syndrome[0x20];
6674
Matan Barakb4ff3a32016-02-09 14:57:42 +02006675 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006676 u8 tisn[0x18];
6677
Matan Barakb4ff3a32016-02-09 14:57:42 +02006678 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006679};
6680
6681struct mlx5_ifc_create_tis_in_bits {
6682 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006683 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006684
Matan Barakb4ff3a32016-02-09 14:57:42 +02006685 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006686 u8 op_mod[0x10];
6687
Matan Barakb4ff3a32016-02-09 14:57:42 +02006688 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006689
6690 struct mlx5_ifc_tisc_bits ctx;
6691};
6692
6693struct mlx5_ifc_create_tir_out_bits {
6694 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006695 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006696
6697 u8 syndrome[0x20];
6698
Matan Barakb4ff3a32016-02-09 14:57:42 +02006699 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006700 u8 tirn[0x18];
6701
Matan Barakb4ff3a32016-02-09 14:57:42 +02006702 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006703};
6704
6705struct mlx5_ifc_create_tir_in_bits {
6706 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006707 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006708
Matan Barakb4ff3a32016-02-09 14:57:42 +02006709 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006710 u8 op_mod[0x10];
6711
Matan Barakb4ff3a32016-02-09 14:57:42 +02006712 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006713
6714 struct mlx5_ifc_tirc_bits ctx;
6715};
6716
6717struct mlx5_ifc_create_srq_out_bits {
6718 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006719 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006720
6721 u8 syndrome[0x20];
6722
Matan Barakb4ff3a32016-02-09 14:57:42 +02006723 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006724 u8 srqn[0x18];
6725
Matan Barakb4ff3a32016-02-09 14:57:42 +02006726 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006727};
6728
6729struct mlx5_ifc_create_srq_in_bits {
6730 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006731 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006732
Matan Barakb4ff3a32016-02-09 14:57:42 +02006733 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006734 u8 op_mod[0x10];
6735
Matan Barakb4ff3a32016-02-09 14:57:42 +02006736 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006737
6738 struct mlx5_ifc_srqc_bits srq_context_entry;
6739
Matan Barakb4ff3a32016-02-09 14:57:42 +02006740 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006741
6742 u8 pas[0][0x40];
6743};
6744
6745struct mlx5_ifc_create_sq_out_bits {
6746 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006747 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006748
6749 u8 syndrome[0x20];
6750
Matan Barakb4ff3a32016-02-09 14:57:42 +02006751 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006752 u8 sqn[0x18];
6753
Matan Barakb4ff3a32016-02-09 14:57:42 +02006754 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006755};
6756
6757struct mlx5_ifc_create_sq_in_bits {
6758 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006759 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006760
Matan Barakb4ff3a32016-02-09 14:57:42 +02006761 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006762 u8 op_mod[0x10];
6763
Matan Barakb4ff3a32016-02-09 14:57:42 +02006764 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006765
6766 struct mlx5_ifc_sqc_bits ctx;
6767};
6768
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006769struct mlx5_ifc_create_scheduling_element_out_bits {
6770 u8 status[0x8];
6771 u8 reserved_at_8[0x18];
6772
6773 u8 syndrome[0x20];
6774
6775 u8 reserved_at_40[0x40];
6776
6777 u8 scheduling_element_id[0x20];
6778
6779 u8 reserved_at_a0[0x160];
6780};
6781
6782struct mlx5_ifc_create_scheduling_element_in_bits {
6783 u8 opcode[0x10];
6784 u8 reserved_at_10[0x10];
6785
6786 u8 reserved_at_20[0x10];
6787 u8 op_mod[0x10];
6788
6789 u8 scheduling_hierarchy[0x8];
6790 u8 reserved_at_48[0x18];
6791
6792 u8 reserved_at_60[0xa0];
6793
6794 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6795
6796 u8 reserved_at_300[0x100];
6797};
6798
Saeed Mahameede2816822015-05-28 22:28:40 +03006799struct mlx5_ifc_create_rqt_out_bits {
6800 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006801 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006802
6803 u8 syndrome[0x20];
6804
Matan Barakb4ff3a32016-02-09 14:57:42 +02006805 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006806 u8 rqtn[0x18];
6807
Matan Barakb4ff3a32016-02-09 14:57:42 +02006808 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006809};
6810
6811struct mlx5_ifc_create_rqt_in_bits {
6812 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006813 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006814
Matan Barakb4ff3a32016-02-09 14:57:42 +02006815 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006816 u8 op_mod[0x10];
6817
Matan Barakb4ff3a32016-02-09 14:57:42 +02006818 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006819
6820 struct mlx5_ifc_rqtc_bits rqt_context;
6821};
6822
6823struct mlx5_ifc_create_rq_out_bits {
6824 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006825 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006826
6827 u8 syndrome[0x20];
6828
Matan Barakb4ff3a32016-02-09 14:57:42 +02006829 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006830 u8 rqn[0x18];
6831
Matan Barakb4ff3a32016-02-09 14:57:42 +02006832 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006833};
6834
6835struct mlx5_ifc_create_rq_in_bits {
6836 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006837 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006838
Matan Barakb4ff3a32016-02-09 14:57:42 +02006839 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006840 u8 op_mod[0x10];
6841
Matan Barakb4ff3a32016-02-09 14:57:42 +02006842 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006843
6844 struct mlx5_ifc_rqc_bits ctx;
6845};
6846
6847struct mlx5_ifc_create_rmp_out_bits {
6848 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006849 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006850
6851 u8 syndrome[0x20];
6852
Matan Barakb4ff3a32016-02-09 14:57:42 +02006853 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006854 u8 rmpn[0x18];
6855
Matan Barakb4ff3a32016-02-09 14:57:42 +02006856 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006857};
6858
6859struct mlx5_ifc_create_rmp_in_bits {
6860 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006861 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006862
Matan Barakb4ff3a32016-02-09 14:57:42 +02006863 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006864 u8 op_mod[0x10];
6865
Matan Barakb4ff3a32016-02-09 14:57:42 +02006866 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006867
6868 struct mlx5_ifc_rmpc_bits ctx;
6869};
6870
6871struct mlx5_ifc_create_qp_out_bits {
6872 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006873 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006874
6875 u8 syndrome[0x20];
6876
Matan Barakb4ff3a32016-02-09 14:57:42 +02006877 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006878 u8 qpn[0x18];
6879
Matan Barakb4ff3a32016-02-09 14:57:42 +02006880 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006881};
6882
6883struct mlx5_ifc_create_qp_in_bits {
6884 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006885 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006886
Matan Barakb4ff3a32016-02-09 14:57:42 +02006887 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006888 u8 op_mod[0x10];
6889
Matan Barakb4ff3a32016-02-09 14:57:42 +02006890 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006891
6892 u8 opt_param_mask[0x20];
6893
Matan Barakb4ff3a32016-02-09 14:57:42 +02006894 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006895
6896 struct mlx5_ifc_qpc_bits qpc;
6897
Matan Barakb4ff3a32016-02-09 14:57:42 +02006898 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006899
6900 u8 pas[0][0x40];
6901};
6902
6903struct mlx5_ifc_create_psv_out_bits {
6904 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006905 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006906
6907 u8 syndrome[0x20];
6908
Matan Barakb4ff3a32016-02-09 14:57:42 +02006909 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006910
Matan Barakb4ff3a32016-02-09 14:57:42 +02006911 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006912 u8 psv0_index[0x18];
6913
Matan Barakb4ff3a32016-02-09 14:57:42 +02006914 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006915 u8 psv1_index[0x18];
6916
Matan Barakb4ff3a32016-02-09 14:57:42 +02006917 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006918 u8 psv2_index[0x18];
6919
Matan Barakb4ff3a32016-02-09 14:57:42 +02006920 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006921 u8 psv3_index[0x18];
6922};
6923
6924struct mlx5_ifc_create_psv_in_bits {
6925 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006926 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006927
Matan Barakb4ff3a32016-02-09 14:57:42 +02006928 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006929 u8 op_mod[0x10];
6930
6931 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006932 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006933 u8 pd[0x18];
6934
Matan Barakb4ff3a32016-02-09 14:57:42 +02006935 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006936};
6937
6938struct mlx5_ifc_create_mkey_out_bits {
6939 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006940 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006941
6942 u8 syndrome[0x20];
6943
Matan Barakb4ff3a32016-02-09 14:57:42 +02006944 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006945 u8 mkey_index[0x18];
6946
Matan Barakb4ff3a32016-02-09 14:57:42 +02006947 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006948};
6949
6950struct mlx5_ifc_create_mkey_in_bits {
6951 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006952 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006953
Matan Barakb4ff3a32016-02-09 14:57:42 +02006954 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006955 u8 op_mod[0x10];
6956
Matan Barakb4ff3a32016-02-09 14:57:42 +02006957 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006958
6959 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006960 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006961
6962 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6963
Matan Barakb4ff3a32016-02-09 14:57:42 +02006964 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006965
6966 u8 translations_octword_actual_size[0x20];
6967
Matan Barakb4ff3a32016-02-09 14:57:42 +02006968 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006969
6970 u8 klm_pas_mtt[0][0x20];
6971};
6972
6973struct mlx5_ifc_create_flow_table_out_bits {
6974 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006975 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006976
6977 u8 syndrome[0x20];
6978
Matan Barakb4ff3a32016-02-09 14:57:42 +02006979 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006980 u8 table_id[0x18];
6981
Matan Barakb4ff3a32016-02-09 14:57:42 +02006982 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006983};
6984
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006985struct mlx5_ifc_flow_table_context_bits {
Mark Bloch60786f02018-08-28 14:18:46 +03006986 u8 reformat_en[0x1];
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006987 u8 decap_en[0x1];
6988 u8 reserved_at_2[0x2];
6989 u8 table_miss_action[0x4];
6990 u8 level[0x8];
6991 u8 reserved_at_10[0x8];
6992 u8 log_size[0x8];
6993
6994 u8 reserved_at_20[0x8];
6995 u8 table_miss_id[0x18];
6996
6997 u8 reserved_at_40[0x8];
6998 u8 lag_master_next_table_id[0x18];
6999
7000 u8 reserved_at_60[0xe0];
7001};
7002
Saeed Mahameede2816822015-05-28 22:28:40 +03007003struct mlx5_ifc_create_flow_table_in_bits {
7004 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007005 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007006
Matan Barakb4ff3a32016-02-09 14:57:42 +02007007 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007008 u8 op_mod[0x10];
7009
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007010 u8 other_vport[0x1];
7011 u8 reserved_at_41[0xf];
7012 u8 vport_number[0x10];
7013
7014 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007015
7016 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007017 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007018
Matan Barakb4ff3a32016-02-09 14:57:42 +02007019 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007020
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02007021 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03007022};
7023
7024struct mlx5_ifc_create_flow_group_out_bits {
7025 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007026 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007027
7028 u8 syndrome[0x20];
7029
Matan Barakb4ff3a32016-02-09 14:57:42 +02007030 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007031 u8 group_id[0x18];
7032
Matan Barakb4ff3a32016-02-09 14:57:42 +02007033 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007034};
7035
7036enum {
Ariel Levkovich71c6e862018-05-13 14:33:34 +03007037 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
7038 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
7039 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
7040 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS_2 = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03007041};
7042
7043struct mlx5_ifc_create_flow_group_in_bits {
7044 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007045 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007046
Matan Barakb4ff3a32016-02-09 14:57:42 +02007047 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007048 u8 op_mod[0x10];
7049
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007050 u8 other_vport[0x1];
7051 u8 reserved_at_41[0xf];
7052 u8 vport_number[0x10];
7053
7054 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007055
7056 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007057 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007058
Matan Barakb4ff3a32016-02-09 14:57:42 +02007059 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007060 u8 table_id[0x18];
7061
Shahar Klein3e99df82018-03-18 09:02:06 +02007062 u8 source_eswitch_owner_vhca_id_valid[0x1];
7063
7064 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007065
7066 u8 start_flow_index[0x20];
7067
Matan Barakb4ff3a32016-02-09 14:57:42 +02007068 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007069
7070 u8 end_flow_index[0x20];
7071
Matan Barakb4ff3a32016-02-09 14:57:42 +02007072 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007073
Matan Barakb4ff3a32016-02-09 14:57:42 +02007074 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007075 u8 match_criteria_enable[0x8];
7076
7077 struct mlx5_ifc_fte_match_param_bits match_criteria;
7078
Matan Barakb4ff3a32016-02-09 14:57:42 +02007079 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03007080};
7081
7082struct mlx5_ifc_create_eq_out_bits {
7083 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007084 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007085
7086 u8 syndrome[0x20];
7087
Matan Barakb4ff3a32016-02-09 14:57:42 +02007088 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007089 u8 eq_number[0x8];
7090
Matan Barakb4ff3a32016-02-09 14:57:42 +02007091 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007092};
7093
7094struct mlx5_ifc_create_eq_in_bits {
7095 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007096 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007097
Matan Barakb4ff3a32016-02-09 14:57:42 +02007098 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007099 u8 op_mod[0x10];
7100
Matan Barakb4ff3a32016-02-09 14:57:42 +02007101 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007102
7103 struct mlx5_ifc_eqc_bits eq_context_entry;
7104
Matan Barakb4ff3a32016-02-09 14:57:42 +02007105 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007106
7107 u8 event_bitmask[0x40];
7108
Matan Barakb4ff3a32016-02-09 14:57:42 +02007109 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03007110
7111 u8 pas[0][0x40];
7112};
7113
7114struct mlx5_ifc_create_dct_out_bits {
7115 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007116 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007117
7118 u8 syndrome[0x20];
7119
Matan Barakb4ff3a32016-02-09 14:57:42 +02007120 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007121 u8 dctn[0x18];
7122
Matan Barakb4ff3a32016-02-09 14:57:42 +02007123 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007124};
7125
7126struct mlx5_ifc_create_dct_in_bits {
7127 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007128 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007129
Matan Barakb4ff3a32016-02-09 14:57:42 +02007130 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007131 u8 op_mod[0x10];
7132
Matan Barakb4ff3a32016-02-09 14:57:42 +02007133 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007134
7135 struct mlx5_ifc_dctc_bits dct_context_entry;
7136
Matan Barakb4ff3a32016-02-09 14:57:42 +02007137 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03007138};
7139
7140struct mlx5_ifc_create_cq_out_bits {
7141 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007142 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007143
7144 u8 syndrome[0x20];
7145
Matan Barakb4ff3a32016-02-09 14:57:42 +02007146 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007147 u8 cqn[0x18];
7148
Matan Barakb4ff3a32016-02-09 14:57:42 +02007149 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007150};
7151
7152struct mlx5_ifc_create_cq_in_bits {
7153 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007154 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007155
Matan Barakb4ff3a32016-02-09 14:57:42 +02007156 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007157 u8 op_mod[0x10];
7158
Matan Barakb4ff3a32016-02-09 14:57:42 +02007159 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007160
7161 struct mlx5_ifc_cqc_bits cq_context;
7162
Matan Barakb4ff3a32016-02-09 14:57:42 +02007163 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03007164
7165 u8 pas[0][0x40];
7166};
7167
7168struct mlx5_ifc_config_int_moderation_out_bits {
7169 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007170 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007171
7172 u8 syndrome[0x20];
7173
Matan Barakb4ff3a32016-02-09 14:57:42 +02007174 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007175 u8 min_delay[0xc];
7176 u8 int_vector[0x10];
7177
Matan Barakb4ff3a32016-02-09 14:57:42 +02007178 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007179};
7180
7181enum {
7182 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
7183 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
7184};
7185
7186struct mlx5_ifc_config_int_moderation_in_bits {
7187 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007188 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007189
Matan Barakb4ff3a32016-02-09 14:57:42 +02007190 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007191 u8 op_mod[0x10];
7192
Matan Barakb4ff3a32016-02-09 14:57:42 +02007193 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007194 u8 min_delay[0xc];
7195 u8 int_vector[0x10];
7196
Matan Barakb4ff3a32016-02-09 14:57:42 +02007197 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007198};
7199
7200struct mlx5_ifc_attach_to_mcg_out_bits {
7201 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007202 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007203
7204 u8 syndrome[0x20];
7205
Matan Barakb4ff3a32016-02-09 14:57:42 +02007206 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007207};
7208
7209struct mlx5_ifc_attach_to_mcg_in_bits {
7210 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007211 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007212
Matan Barakb4ff3a32016-02-09 14:57:42 +02007213 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007214 u8 op_mod[0x10];
7215
Matan Barakb4ff3a32016-02-09 14:57:42 +02007216 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007217 u8 qpn[0x18];
7218
Matan Barakb4ff3a32016-02-09 14:57:42 +02007219 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007220
7221 u8 multicast_gid[16][0x8];
7222};
7223
Saeed Mahameed74862162016-06-09 15:11:34 +03007224struct mlx5_ifc_arm_xrq_out_bits {
7225 u8 status[0x8];
7226 u8 reserved_at_8[0x18];
7227
7228 u8 syndrome[0x20];
7229
7230 u8 reserved_at_40[0x40];
7231};
7232
7233struct mlx5_ifc_arm_xrq_in_bits {
7234 u8 opcode[0x10];
7235 u8 reserved_at_10[0x10];
7236
7237 u8 reserved_at_20[0x10];
7238 u8 op_mod[0x10];
7239
7240 u8 reserved_at_40[0x8];
7241 u8 xrqn[0x18];
7242
7243 u8 reserved_at_60[0x10];
7244 u8 lwm[0x10];
7245};
7246
Saeed Mahameede2816822015-05-28 22:28:40 +03007247struct mlx5_ifc_arm_xrc_srq_out_bits {
7248 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007249 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007250
7251 u8 syndrome[0x20];
7252
Matan Barakb4ff3a32016-02-09 14:57:42 +02007253 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007254};
7255
7256enum {
7257 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7258};
7259
7260struct mlx5_ifc_arm_xrc_srq_in_bits {
7261 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007262 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007263
Matan Barakb4ff3a32016-02-09 14:57:42 +02007264 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007265 u8 op_mod[0x10];
7266
Matan Barakb4ff3a32016-02-09 14:57:42 +02007267 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007268 u8 xrc_srqn[0x18];
7269
Matan Barakb4ff3a32016-02-09 14:57:42 +02007270 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007271 u8 lwm[0x10];
7272};
7273
7274struct mlx5_ifc_arm_rq_out_bits {
7275 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007276 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007277
7278 u8 syndrome[0x20];
7279
Matan Barakb4ff3a32016-02-09 14:57:42 +02007280 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007281};
7282
7283enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007284 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7285 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007286};
7287
7288struct mlx5_ifc_arm_rq_in_bits {
7289 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007290 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007291
Matan Barakb4ff3a32016-02-09 14:57:42 +02007292 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007293 u8 op_mod[0x10];
7294
Matan Barakb4ff3a32016-02-09 14:57:42 +02007295 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007296 u8 srq_number[0x18];
7297
Matan Barakb4ff3a32016-02-09 14:57:42 +02007298 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007299 u8 lwm[0x10];
7300};
7301
7302struct mlx5_ifc_arm_dct_out_bits {
7303 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007304 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007305
7306 u8 syndrome[0x20];
7307
Matan Barakb4ff3a32016-02-09 14:57:42 +02007308 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007309};
7310
7311struct mlx5_ifc_arm_dct_in_bits {
7312 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007313 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007314
Matan Barakb4ff3a32016-02-09 14:57:42 +02007315 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007316 u8 op_mod[0x10];
7317
Matan Barakb4ff3a32016-02-09 14:57:42 +02007318 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007319 u8 dct_number[0x18];
7320
Matan Barakb4ff3a32016-02-09 14:57:42 +02007321 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007322};
7323
7324struct mlx5_ifc_alloc_xrcd_out_bits {
7325 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007326 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007327
7328 u8 syndrome[0x20];
7329
Matan Barakb4ff3a32016-02-09 14:57:42 +02007330 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007331 u8 xrcd[0x18];
7332
Matan Barakb4ff3a32016-02-09 14:57:42 +02007333 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007334};
7335
7336struct mlx5_ifc_alloc_xrcd_in_bits {
7337 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007338 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007339
Matan Barakb4ff3a32016-02-09 14:57:42 +02007340 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007341 u8 op_mod[0x10];
7342
Matan Barakb4ff3a32016-02-09 14:57:42 +02007343 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007344};
7345
7346struct mlx5_ifc_alloc_uar_out_bits {
7347 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007348 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007349
7350 u8 syndrome[0x20];
7351
Matan Barakb4ff3a32016-02-09 14:57:42 +02007352 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007353 u8 uar[0x18];
7354
Matan Barakb4ff3a32016-02-09 14:57:42 +02007355 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007356};
7357
7358struct mlx5_ifc_alloc_uar_in_bits {
7359 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007360 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007361
Matan Barakb4ff3a32016-02-09 14:57:42 +02007362 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007363 u8 op_mod[0x10];
7364
Matan Barakb4ff3a32016-02-09 14:57:42 +02007365 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007366};
7367
7368struct mlx5_ifc_alloc_transport_domain_out_bits {
7369 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007370 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007371
7372 u8 syndrome[0x20];
7373
Matan Barakb4ff3a32016-02-09 14:57:42 +02007374 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007375 u8 transport_domain[0x18];
7376
Matan Barakb4ff3a32016-02-09 14:57:42 +02007377 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007378};
7379
7380struct mlx5_ifc_alloc_transport_domain_in_bits {
7381 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007382 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007383
Matan Barakb4ff3a32016-02-09 14:57:42 +02007384 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007385 u8 op_mod[0x10];
7386
Matan Barakb4ff3a32016-02-09 14:57:42 +02007387 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007388};
7389
7390struct mlx5_ifc_alloc_q_counter_out_bits {
7391 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007392 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007393
7394 u8 syndrome[0x20];
7395
Matan Barakb4ff3a32016-02-09 14:57:42 +02007396 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007397 u8 counter_set_id[0x8];
7398
Matan Barakb4ff3a32016-02-09 14:57:42 +02007399 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007400};
7401
7402struct mlx5_ifc_alloc_q_counter_in_bits {
7403 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007404 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007405
Matan Barakb4ff3a32016-02-09 14:57:42 +02007406 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007407 u8 op_mod[0x10];
7408
Matan Barakb4ff3a32016-02-09 14:57:42 +02007409 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007410};
7411
7412struct mlx5_ifc_alloc_pd_out_bits {
7413 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007414 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007415
7416 u8 syndrome[0x20];
7417
Matan Barakb4ff3a32016-02-09 14:57:42 +02007418 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007419 u8 pd[0x18];
7420
Matan Barakb4ff3a32016-02-09 14:57:42 +02007421 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007422};
7423
7424struct mlx5_ifc_alloc_pd_in_bits {
7425 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007426 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007427
Matan Barakb4ff3a32016-02-09 14:57:42 +02007428 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007429 u8 op_mod[0x10];
7430
Matan Barakb4ff3a32016-02-09 14:57:42 +02007431 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007432};
7433
Amir Vadai9dc0b282016-05-13 12:55:39 +00007434struct mlx5_ifc_alloc_flow_counter_out_bits {
7435 u8 status[0x8];
7436 u8 reserved_at_8[0x18];
7437
7438 u8 syndrome[0x20];
7439
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007440 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007441
7442 u8 reserved_at_60[0x20];
7443};
7444
7445struct mlx5_ifc_alloc_flow_counter_in_bits {
7446 u8 opcode[0x10];
7447 u8 reserved_at_10[0x10];
7448
7449 u8 reserved_at_20[0x10];
7450 u8 op_mod[0x10];
7451
7452 u8 reserved_at_40[0x40];
7453};
7454
Saeed Mahameede2816822015-05-28 22:28:40 +03007455struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7456 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007457 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007458
7459 u8 syndrome[0x20];
7460
Matan Barakb4ff3a32016-02-09 14:57:42 +02007461 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007462};
7463
7464struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7465 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007466 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007467
Matan Barakb4ff3a32016-02-09 14:57:42 +02007468 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007469 u8 op_mod[0x10];
7470
Matan Barakb4ff3a32016-02-09 14:57:42 +02007471 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007472
Matan Barakb4ff3a32016-02-09 14:57:42 +02007473 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007474 u8 vxlan_udp_port[0x10];
7475};
7476
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007477struct mlx5_ifc_set_pp_rate_limit_out_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007478 u8 status[0x8];
7479 u8 reserved_at_8[0x18];
7480
7481 u8 syndrome[0x20];
7482
7483 u8 reserved_at_40[0x40];
7484};
7485
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007486struct mlx5_ifc_set_pp_rate_limit_in_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007487 u8 opcode[0x10];
7488 u8 reserved_at_10[0x10];
7489
7490 u8 reserved_at_20[0x10];
7491 u8 op_mod[0x10];
7492
7493 u8 reserved_at_40[0x10];
7494 u8 rate_limit_index[0x10];
7495
7496 u8 reserved_at_60[0x20];
7497
7498 u8 rate_limit[0x20];
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007499
Bodong Wang05d3ac92018-03-19 15:10:29 +02007500 u8 burst_upper_bound[0x20];
7501
7502 u8 reserved_at_c0[0x10];
7503 u8 typical_packet_size[0x10];
7504
7505 u8 reserved_at_e0[0x120];
Saeed Mahameed74862162016-06-09 15:11:34 +03007506};
7507
Saeed Mahameede2816822015-05-28 22:28:40 +03007508struct mlx5_ifc_access_register_out_bits {
7509 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007510 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007511
7512 u8 syndrome[0x20];
7513
Matan Barakb4ff3a32016-02-09 14:57:42 +02007514 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007515
7516 u8 register_data[0][0x20];
7517};
7518
7519enum {
7520 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7521 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7522};
7523
7524struct mlx5_ifc_access_register_in_bits {
7525 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007526 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007527
Matan Barakb4ff3a32016-02-09 14:57:42 +02007528 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007529 u8 op_mod[0x10];
7530
Matan Barakb4ff3a32016-02-09 14:57:42 +02007531 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007532 u8 register_id[0x10];
7533
7534 u8 argument[0x20];
7535
7536 u8 register_data[0][0x20];
7537};
7538
7539struct mlx5_ifc_sltp_reg_bits {
7540 u8 status[0x4];
7541 u8 version[0x4];
7542 u8 local_port[0x8];
7543 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007544 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007545 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007546 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007547
Matan Barakb4ff3a32016-02-09 14:57:42 +02007548 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007549
Matan Barakb4ff3a32016-02-09 14:57:42 +02007550 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007551 u8 polarity[0x1];
7552 u8 ob_tap0[0x8];
7553 u8 ob_tap1[0x8];
7554 u8 ob_tap2[0x8];
7555
Matan Barakb4ff3a32016-02-09 14:57:42 +02007556 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007557 u8 ob_preemp_mode[0x4];
7558 u8 ob_reg[0x8];
7559 u8 ob_bias[0x8];
7560
Matan Barakb4ff3a32016-02-09 14:57:42 +02007561 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007562};
7563
7564struct mlx5_ifc_slrg_reg_bits {
7565 u8 status[0x4];
7566 u8 version[0x4];
7567 u8 local_port[0x8];
7568 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007569 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007570 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007571 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007572
7573 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007574 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007575 u8 grade_lane_speed[0x4];
7576
7577 u8 grade_version[0x8];
7578 u8 grade[0x18];
7579
Matan Barakb4ff3a32016-02-09 14:57:42 +02007580 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007581 u8 height_grade_type[0x4];
7582 u8 height_grade[0x18];
7583
7584 u8 height_dz[0x10];
7585 u8 height_dv[0x10];
7586
Matan Barakb4ff3a32016-02-09 14:57:42 +02007587 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007588 u8 height_sigma[0x10];
7589
Matan Barakb4ff3a32016-02-09 14:57:42 +02007590 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007591
Matan Barakb4ff3a32016-02-09 14:57:42 +02007592 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007593 u8 phase_grade_type[0x4];
7594 u8 phase_grade[0x18];
7595
Matan Barakb4ff3a32016-02-09 14:57:42 +02007596 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007597 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007598 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007599 u8 phase_eo_neg[0x8];
7600
7601 u8 ffe_set_tested[0x10];
7602 u8 test_errors_per_lane[0x10];
7603};
7604
7605struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007606 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007607 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007608 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007609
Matan Barakb4ff3a32016-02-09 14:57:42 +02007610 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007611 u8 vl_hw_cap[0x4];
7612
Matan Barakb4ff3a32016-02-09 14:57:42 +02007613 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007614 u8 vl_admin[0x4];
7615
Matan Barakb4ff3a32016-02-09 14:57:42 +02007616 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007617 u8 vl_operational[0x4];
7618};
7619
7620struct mlx5_ifc_pude_reg_bits {
7621 u8 swid[0x8];
7622 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007623 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007624 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007625 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007626 u8 oper_status[0x4];
7627
Matan Barakb4ff3a32016-02-09 14:57:42 +02007628 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007629};
7630
7631struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007632 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007633 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007634 u8 an_disable_cap[0x1];
7635 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007636 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007637 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007638 u8 proto_mask[0x3];
7639
Saeed Mahameed74862162016-06-09 15:11:34 +03007640 u8 an_status[0x4];
7641 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007642
7643 u8 eth_proto_capability[0x20];
7644
7645 u8 ib_link_width_capability[0x10];
7646 u8 ib_proto_capability[0x10];
7647
Matan Barakb4ff3a32016-02-09 14:57:42 +02007648 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007649
7650 u8 eth_proto_admin[0x20];
7651
7652 u8 ib_link_width_admin[0x10];
7653 u8 ib_proto_admin[0x10];
7654
Matan Barakb4ff3a32016-02-09 14:57:42 +02007655 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007656
7657 u8 eth_proto_oper[0x20];
7658
7659 u8 ib_link_width_oper[0x10];
7660 u8 ib_proto_oper[0x10];
7661
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007662 u8 reserved_at_160[0x1c];
7663 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007664
7665 u8 eth_proto_lp_advertise[0x20];
7666
Matan Barakb4ff3a32016-02-09 14:57:42 +02007667 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007668};
7669
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007670struct mlx5_ifc_mlcr_reg_bits {
7671 u8 reserved_at_0[0x8];
7672 u8 local_port[0x8];
7673 u8 reserved_at_10[0x20];
7674
7675 u8 beacon_duration[0x10];
7676 u8 reserved_at_40[0x10];
7677
7678 u8 beacon_remain[0x10];
7679};
7680
Saeed Mahameede2816822015-05-28 22:28:40 +03007681struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007682 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007683
7684 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007685 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007686 u8 repetitions_mode[0x4];
7687 u8 num_of_repetitions[0x8];
7688
7689 u8 grade_version[0x8];
7690 u8 height_grade_type[0x4];
7691 u8 phase_grade_type[0x4];
7692 u8 height_grade_weight[0x8];
7693 u8 phase_grade_weight[0x8];
7694
7695 u8 gisim_measure_bits[0x10];
7696 u8 adaptive_tap_measure_bits[0x10];
7697
7698 u8 ber_bath_high_error_threshold[0x10];
7699 u8 ber_bath_mid_error_threshold[0x10];
7700
7701 u8 ber_bath_low_error_threshold[0x10];
7702 u8 one_ratio_high_threshold[0x10];
7703
7704 u8 one_ratio_high_mid_threshold[0x10];
7705 u8 one_ratio_low_mid_threshold[0x10];
7706
7707 u8 one_ratio_low_threshold[0x10];
7708 u8 ndeo_error_threshold[0x10];
7709
7710 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007711 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007712 u8 mix90_phase_for_voltage_bath[0x8];
7713
7714 u8 mixer_offset_start[0x10];
7715 u8 mixer_offset_end[0x10];
7716
Matan Barakb4ff3a32016-02-09 14:57:42 +02007717 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007718 u8 ber_test_time[0xb];
7719};
7720
7721struct mlx5_ifc_pspa_reg_bits {
7722 u8 swid[0x8];
7723 u8 local_port[0x8];
7724 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007725 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007726
Matan Barakb4ff3a32016-02-09 14:57:42 +02007727 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007728};
7729
7730struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007731 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007732 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007733 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007734 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007735 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007736 u8 mode[0x2];
7737
Matan Barakb4ff3a32016-02-09 14:57:42 +02007738 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007739
Matan Barakb4ff3a32016-02-09 14:57:42 +02007740 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007741 u8 min_threshold[0x10];
7742
Matan Barakb4ff3a32016-02-09 14:57:42 +02007743 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007744 u8 max_threshold[0x10];
7745
Matan Barakb4ff3a32016-02-09 14:57:42 +02007746 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007747 u8 mark_probability_denominator[0x10];
7748
Matan Barakb4ff3a32016-02-09 14:57:42 +02007749 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007750};
7751
7752struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007753 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007754 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007755 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007756
Matan Barakb4ff3a32016-02-09 14:57:42 +02007757 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007758
Matan Barakb4ff3a32016-02-09 14:57:42 +02007759 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007760 u8 wrps_admin[0x4];
7761
Matan Barakb4ff3a32016-02-09 14:57:42 +02007762 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007763 u8 wrps_status[0x4];
7764
Matan Barakb4ff3a32016-02-09 14:57:42 +02007765 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007766 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007767 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007768 u8 down_threshold[0x8];
7769
Matan Barakb4ff3a32016-02-09 14:57:42 +02007770 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007771
Matan Barakb4ff3a32016-02-09 14:57:42 +02007772 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007773 u8 srps_admin[0x4];
7774
Matan Barakb4ff3a32016-02-09 14:57:42 +02007775 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007776 u8 srps_status[0x4];
7777
Matan Barakb4ff3a32016-02-09 14:57:42 +02007778 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007779};
7780
7781struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007782 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007783 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007784 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007785
Matan Barakb4ff3a32016-02-09 14:57:42 +02007786 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007787 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007788 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007789 u8 lb_en[0x8];
7790};
7791
7792struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007793 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007794 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007795 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007796
Matan Barakb4ff3a32016-02-09 14:57:42 +02007797 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007798
7799 u8 port_profile_mode[0x8];
7800 u8 static_port_profile[0x8];
7801 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007802 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007803
7804 u8 retransmission_active[0x8];
7805 u8 fec_mode_active[0x18];
7806
Matan Barakb4ff3a32016-02-09 14:57:42 +02007807 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007808};
7809
7810struct mlx5_ifc_ppcnt_reg_bits {
7811 u8 swid[0x8];
7812 u8 local_port[0x8];
7813 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007814 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007815 u8 grp[0x6];
7816
7817 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007818 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007819 u8 prio_tc[0x3];
7820
7821 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7822};
7823
Gal Pressman8ed1a632016-11-17 13:46:01 +02007824struct mlx5_ifc_mpcnt_reg_bits {
7825 u8 reserved_at_0[0x8];
7826 u8 pcie_index[0x8];
7827 u8 reserved_at_10[0xa];
7828 u8 grp[0x6];
7829
7830 u8 clr[0x1];
7831 u8 reserved_at_21[0x1f];
7832
7833 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7834};
7835
Saeed Mahameede2816822015-05-28 22:28:40 +03007836struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007837 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007838 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007839 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007840 u8 local_port[0x8];
7841 u8 mac_47_32[0x10];
7842
7843 u8 mac_31_0[0x20];
7844
Matan Barakb4ff3a32016-02-09 14:57:42 +02007845 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007846};
7847
7848struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007849 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007850 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007851 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007852
7853 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007854 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007855
7856 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007857 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007858
7859 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007860 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007861};
7862
7863struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007864 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007865 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007866 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007867
Matan Barakb4ff3a32016-02-09 14:57:42 +02007868 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007869 u8 attenuation_5g[0x8];
7870
Matan Barakb4ff3a32016-02-09 14:57:42 +02007871 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007872 u8 attenuation_7g[0x8];
7873
Matan Barakb4ff3a32016-02-09 14:57:42 +02007874 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007875 u8 attenuation_12g[0x8];
7876};
7877
7878struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007879 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007880 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007881 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007882 u8 module_status[0x4];
7883
Matan Barakb4ff3a32016-02-09 14:57:42 +02007884 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007885};
7886
7887struct mlx5_ifc_pmpc_reg_bits {
7888 u8 module_state_updated[32][0x8];
7889};
7890
7891struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007892 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007893 u8 mlpn_status[0x4];
7894 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007895 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007896
7897 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007898 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007899};
7900
7901struct mlx5_ifc_pmlp_reg_bits {
7902 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007903 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007904 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007905 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007906 u8 width[0x8];
7907
7908 u8 lane0_module_mapping[0x20];
7909
7910 u8 lane1_module_mapping[0x20];
7911
7912 u8 lane2_module_mapping[0x20];
7913
7914 u8 lane3_module_mapping[0x20];
7915
Matan Barakb4ff3a32016-02-09 14:57:42 +02007916 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007917};
7918
7919struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007920 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007921 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007922 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007923 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007924 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007925 u8 oper_status[0x4];
7926
7927 u8 ase[0x1];
7928 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007929 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007930 u8 e[0x2];
7931
Matan Barakb4ff3a32016-02-09 14:57:42 +02007932 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007933};
7934
7935struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007936 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007937 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007938 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007939 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007940 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007941
Matan Barakb4ff3a32016-02-09 14:57:42 +02007942 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007943 u8 lane_speed[0x10];
7944
Matan Barakb4ff3a32016-02-09 14:57:42 +02007945 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007946 u8 lpbf[0x1];
7947 u8 fec_mode_policy[0x8];
7948
7949 u8 retransmission_capability[0x8];
7950 u8 fec_mode_capability[0x18];
7951
7952 u8 retransmission_support_admin[0x8];
7953 u8 fec_mode_support_admin[0x18];
7954
7955 u8 retransmission_request_admin[0x8];
7956 u8 fec_mode_request_admin[0x18];
7957
Matan Barakb4ff3a32016-02-09 14:57:42 +02007958 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007959};
7960
7961struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007962 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007963 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007964 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007965 u8 ib_port[0x8];
7966
Matan Barakb4ff3a32016-02-09 14:57:42 +02007967 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007968};
7969
7970struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007971 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007972 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007973 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007974 u8 lbf_mode[0x3];
7975
Matan Barakb4ff3a32016-02-09 14:57:42 +02007976 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007977};
7978
7979struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007980 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007981 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007982 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007983
7984 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007985 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007986 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007987 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007988};
7989
7990struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007991 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007992 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007993 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007994
Matan Barakb4ff3a32016-02-09 14:57:42 +02007995 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007996
7997 u8 port_filter[8][0x20];
7998
7999 u8 port_filter_update_en[8][0x20];
8000};
8001
8002struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008003 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008004 u8 local_port[0x8];
Inbar Karmy2afa6092017-11-20 18:06:20 +02008005 u8 reserved_at_10[0xb];
8006 u8 ppan_mask_n[0x1];
8007 u8 minor_stall_mask[0x1];
8008 u8 critical_stall_mask[0x1];
8009 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008010
8011 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008012 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008013 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008014 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008015 u8 prio_mask_rx[0x8];
8016
8017 u8 pptx[0x1];
8018 u8 aptx[0x1];
Inbar Karmy2afa6092017-11-20 18:06:20 +02008019 u8 pptx_mask_n[0x1];
8020 u8 reserved_at_43[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03008021 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008022 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008023
8024 u8 pprx[0x1];
8025 u8 aprx[0x1];
Inbar Karmy2afa6092017-11-20 18:06:20 +02008026 u8 pprx_mask_n[0x1];
8027 u8 reserved_at_63[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03008028 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008029 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008030
Inbar Karmy2afa6092017-11-20 18:06:20 +02008031 u8 device_stall_minor_watermark[0x10];
8032 u8 device_stall_critical_watermark[0x10];
8033
8034 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008035};
8036
8037struct mlx5_ifc_pelc_reg_bits {
8038 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008039 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008040 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008041 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008042
8043 u8 op_admin[0x8];
8044 u8 op_capability[0x8];
8045 u8 op_request[0x8];
8046 u8 op_active[0x8];
8047
8048 u8 admin[0x40];
8049
8050 u8 capability[0x40];
8051
8052 u8 request[0x40];
8053
8054 u8 active[0x40];
8055
Matan Barakb4ff3a32016-02-09 14:57:42 +02008056 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03008057};
8058
8059struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008060 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008061 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008062 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008063
Matan Barakb4ff3a32016-02-09 14:57:42 +02008064 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008065 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008066 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008067
Matan Barakb4ff3a32016-02-09 14:57:42 +02008068 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008069 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008070 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008071 u8 error_type[0x8];
8072};
8073
Eran Ben Elisha5e022dd2018-07-16 18:35:31 -07008074struct mlx5_ifc_mpegc_reg_bits {
8075 u8 reserved_at_0[0x30];
8076 u8 field_select[0x10];
8077
8078 u8 tx_overflow_sense[0x1];
8079 u8 mark_cqe[0x1];
8080 u8 mark_cnp[0x1];
8081 u8 reserved_at_43[0x1b];
8082 u8 tx_lossy_overflow_oper[0x2];
8083
8084 u8 reserved_at_60[0x100];
8085};
8086
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008087struct mlx5_ifc_pcam_enhanced_features_bits {
Talat Batheesh0af51072018-05-17 11:14:18 +03008088 u8 reserved_at_0[0x6d];
8089 u8 rx_icrc_encapsulated_counter[0x1];
8090 u8 reserved_at_6e[0x8];
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03008091 u8 pfcc_mask[0x1];
8092 u8 reserved_at_77[0x4];
Gal Pressman2dba0792017-06-18 14:56:45 +03008093 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02008094 u8 ptys_connector_type[0x1];
8095 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008096 u8 ppcnt_discard_group[0x1];
8097 u8 ppcnt_statistical_group[0x1];
8098};
8099
Huy Nguyendf5f1362018-02-28 14:16:47 -06008100struct mlx5_ifc_pcam_regs_5000_to_507f_bits {
8101 u8 port_access_reg_cap_mask_127_to_96[0x20];
8102 u8 port_access_reg_cap_mask_95_to_64[0x20];
8103 u8 port_access_reg_cap_mask_63_to_32[0x20];
8104
8105 u8 port_access_reg_cap_mask_31_to_13[0x13];
8106 u8 pbmc[0x1];
8107 u8 pptb[0x1];
8108 u8 port_access_reg_cap_mask_10_to_0[0xb];
8109};
8110
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008111struct mlx5_ifc_pcam_reg_bits {
8112 u8 reserved_at_0[0x8];
8113 u8 feature_group[0x8];
8114 u8 reserved_at_10[0x8];
8115 u8 access_reg_group[0x8];
8116
8117 u8 reserved_at_20[0x20];
8118
8119 union {
Huy Nguyendf5f1362018-02-28 14:16:47 -06008120 struct mlx5_ifc_pcam_regs_5000_to_507f_bits regs_5000_to_507f;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008121 u8 reserved_at_0[0x80];
8122 } port_access_reg_cap_mask;
8123
8124 u8 reserved_at_c0[0x80];
8125
8126 union {
8127 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
8128 u8 reserved_at_0[0x80];
8129 } feature_cap_mask;
8130
8131 u8 reserved_at_1c0[0xc0];
8132};
8133
8134struct mlx5_ifc_mcam_enhanced_features_bits {
Eran Ben Elisha5e022dd2018-07-16 18:35:31 -07008135 u8 reserved_at_0[0x74];
8136 u8 mark_tx_action_cnp[0x1];
8137 u8 mark_tx_action_cqe[0x1];
8138 u8 dynamic_tx_overflow[0x1];
8139 u8 reserved_at_77[0x4];
Gal Pressman5405fa22017-06-15 18:29:23 +03008140 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03008141 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008142 u8 mtpps_enh_out_per_adj[0x1];
8143 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008144 u8 pcie_performance_group[0x1];
8145};
8146
Or Gerlitz0ab87742017-06-11 15:25:38 +03008147struct mlx5_ifc_mcam_access_reg_bits {
8148 u8 reserved_at_0[0x1c];
8149 u8 mcda[0x1];
8150 u8 mcc[0x1];
8151 u8 mcqi[0x1];
8152 u8 reserved_at_1f[0x1];
8153
Eran Ben Elisha5e022dd2018-07-16 18:35:31 -07008154 u8 regs_95_to_87[0x9];
8155 u8 mpegc[0x1];
8156 u8 regs_85_to_68[0x12];
Feras Daoudeff8ea82018-07-16 18:35:30 -07008157 u8 tracer_registers[0x4];
8158
Or Gerlitz0ab87742017-06-11 15:25:38 +03008159 u8 regs_63_to_32[0x20];
8160 u8 regs_31_to_0[0x20];
8161};
8162
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008163struct mlx5_ifc_mcam_reg_bits {
8164 u8 reserved_at_0[0x8];
8165 u8 feature_group[0x8];
8166 u8 reserved_at_10[0x8];
8167 u8 access_reg_group[0x8];
8168
8169 u8 reserved_at_20[0x20];
8170
8171 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03008172 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008173 u8 reserved_at_0[0x80];
8174 } mng_access_reg_cap_mask;
8175
8176 u8 reserved_at_c0[0x80];
8177
8178 union {
8179 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
8180 u8 reserved_at_0[0x80];
8181 } mng_feature_cap_mask;
8182
8183 u8 reserved_at_1c0[0x80];
8184};
8185
Huy Nguyenc02762e2017-07-18 16:03:17 -05008186struct mlx5_ifc_qcam_access_reg_cap_mask {
8187 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
8188 u8 qpdpm[0x1];
8189 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
8190 u8 qdpm[0x1];
8191 u8 qpts[0x1];
8192 u8 qcap[0x1];
8193 u8 qcam_access_reg_cap_mask_0[0x1];
8194};
8195
8196struct mlx5_ifc_qcam_qos_feature_cap_mask {
8197 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
8198 u8 qpts_trust_both[0x1];
8199};
8200
8201struct mlx5_ifc_qcam_reg_bits {
8202 u8 reserved_at_0[0x8];
8203 u8 feature_group[0x8];
8204 u8 reserved_at_10[0x8];
8205 u8 access_reg_group[0x8];
8206 u8 reserved_at_20[0x20];
8207
8208 union {
8209 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
8210 u8 reserved_at_0[0x80];
8211 } qos_access_reg_cap_mask;
8212
8213 u8 reserved_at_c0[0x80];
8214
8215 union {
8216 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
8217 u8 reserved_at_0[0x80];
8218 } qos_feature_cap_mask;
8219
8220 u8 reserved_at_1c0[0x80];
8221};
8222
Saeed Mahameede2816822015-05-28 22:28:40 +03008223struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008224 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008225 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008226 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008227
8228 u8 port_capability_mask[4][0x20];
8229};
8230
8231struct mlx5_ifc_paos_reg_bits {
8232 u8 swid[0x8];
8233 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008234 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008235 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008236 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008237 u8 oper_status[0x4];
8238
8239 u8 ase[0x1];
8240 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008241 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03008242 u8 e[0x2];
8243
Matan Barakb4ff3a32016-02-09 14:57:42 +02008244 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008245};
8246
8247struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008248 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008249 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008250 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008251 u8 opamp_group_type[0x4];
8252
8253 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008254 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008255 u8 num_of_indices[0xc];
8256
8257 u8 index_data[18][0x10];
8258};
8259
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008260struct mlx5_ifc_pcmr_reg_bits {
8261 u8 reserved_at_0[0x8];
8262 u8 local_port[0x8];
8263 u8 reserved_at_10[0x2e];
8264 u8 fcs_cap[0x1];
8265 u8 reserved_at_3f[0x1f];
8266 u8 fcs_chk[0x1];
8267 u8 reserved_at_5f[0x1];
8268};
8269
Saeed Mahameede2816822015-05-28 22:28:40 +03008270struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008271 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008272 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008273 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008274 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008275 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008276 u8 module[0x8];
8277};
8278
8279struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008280 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008281 u8 lossy[0x1];
8282 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008283 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008284 u8 size[0xc];
8285
8286 u8 xoff_threshold[0x10];
8287 u8 xon_threshold[0x10];
8288};
8289
8290struct mlx5_ifc_set_node_in_bits {
8291 u8 node_description[64][0x8];
8292};
8293
8294struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008295 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008296 u8 power_settings_level[0x8];
8297
Matan Barakb4ff3a32016-02-09 14:57:42 +02008298 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008299};
8300
8301struct mlx5_ifc_register_host_endianness_bits {
8302 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008303 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008304
Matan Barakb4ff3a32016-02-09 14:57:42 +02008305 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008306};
8307
8308struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008309 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008310
8311 u8 mkey[0x20];
8312
8313 u8 addressh_63_32[0x20];
8314
8315 u8 addressl_31_0[0x20];
8316};
8317
8318struct mlx5_ifc_ud_adrs_vector_bits {
8319 u8 dc_key[0x40];
8320
8321 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008322 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008323 u8 destination_qp_dct[0x18];
8324
8325 u8 static_rate[0x4];
8326 u8 sl_eth_prio[0x4];
8327 u8 fl[0x1];
8328 u8 mlid[0x7];
8329 u8 rlid_udp_sport[0x10];
8330
Matan Barakb4ff3a32016-02-09 14:57:42 +02008331 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008332
8333 u8 rmac_47_16[0x20];
8334
8335 u8 rmac_15_0[0x10];
8336 u8 tclass[0x8];
8337 u8 hop_limit[0x8];
8338
Matan Barakb4ff3a32016-02-09 14:57:42 +02008339 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008340 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008341 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008342 u8 src_addr_index[0x8];
8343 u8 flow_label[0x14];
8344
8345 u8 rgid_rip[16][0x8];
8346};
8347
8348struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008349 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008350 u8 function_id[0x10];
8351
8352 u8 num_pages[0x20];
8353
Matan Barakb4ff3a32016-02-09 14:57:42 +02008354 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008355};
8356
8357struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008358 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008359 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008360 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008361 u8 event_sub_type[0x8];
8362
Matan Barakb4ff3a32016-02-09 14:57:42 +02008363 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008364
8365 union mlx5_ifc_event_auto_bits event_data;
8366
Matan Barakb4ff3a32016-02-09 14:57:42 +02008367 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008368 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008369 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008370 u8 owner[0x1];
8371};
8372
8373enum {
8374 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8375};
8376
8377struct mlx5_ifc_cmd_queue_entry_bits {
8378 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008379 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008380
8381 u8 input_length[0x20];
8382
8383 u8 input_mailbox_pointer_63_32[0x20];
8384
8385 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008386 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008387
8388 u8 command_input_inline_data[16][0x8];
8389
8390 u8 command_output_inline_data[16][0x8];
8391
8392 u8 output_mailbox_pointer_63_32[0x20];
8393
8394 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008395 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008396
8397 u8 output_length[0x20];
8398
8399 u8 token[0x8];
8400 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008401 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008402 u8 status[0x7];
8403 u8 ownership[0x1];
8404};
8405
8406struct mlx5_ifc_cmd_out_bits {
8407 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008408 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008409
8410 u8 syndrome[0x20];
8411
8412 u8 command_output[0x20];
8413};
8414
8415struct mlx5_ifc_cmd_in_bits {
8416 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008417 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008418
Matan Barakb4ff3a32016-02-09 14:57:42 +02008419 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008420 u8 op_mod[0x10];
8421
8422 u8 command[0][0x20];
8423};
8424
8425struct mlx5_ifc_cmd_if_box_bits {
8426 u8 mailbox_data[512][0x8];
8427
Matan Barakb4ff3a32016-02-09 14:57:42 +02008428 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008429
8430 u8 next_pointer_63_32[0x20];
8431
8432 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008433 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008434
8435 u8 block_number[0x20];
8436
Matan Barakb4ff3a32016-02-09 14:57:42 +02008437 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008438 u8 token[0x8];
8439 u8 ctrl_signature[0x8];
8440 u8 signature[0x8];
8441};
8442
8443struct mlx5_ifc_mtt_bits {
8444 u8 ptag_63_32[0x20];
8445
8446 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008447 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008448 u8 wr_en[0x1];
8449 u8 rd_en[0x1];
8450};
8451
Tariq Toukan928cfe82016-02-22 18:17:29 +02008452struct mlx5_ifc_query_wol_rol_out_bits {
8453 u8 status[0x8];
8454 u8 reserved_at_8[0x18];
8455
8456 u8 syndrome[0x20];
8457
8458 u8 reserved_at_40[0x10];
8459 u8 rol_mode[0x8];
8460 u8 wol_mode[0x8];
8461
8462 u8 reserved_at_60[0x20];
8463};
8464
8465struct mlx5_ifc_query_wol_rol_in_bits {
8466 u8 opcode[0x10];
8467 u8 reserved_at_10[0x10];
8468
8469 u8 reserved_at_20[0x10];
8470 u8 op_mod[0x10];
8471
8472 u8 reserved_at_40[0x40];
8473};
8474
8475struct mlx5_ifc_set_wol_rol_out_bits {
8476 u8 status[0x8];
8477 u8 reserved_at_8[0x18];
8478
8479 u8 syndrome[0x20];
8480
8481 u8 reserved_at_40[0x40];
8482};
8483
8484struct mlx5_ifc_set_wol_rol_in_bits {
8485 u8 opcode[0x10];
8486 u8 reserved_at_10[0x10];
8487
8488 u8 reserved_at_20[0x10];
8489 u8 op_mod[0x10];
8490
8491 u8 rol_mode_valid[0x1];
8492 u8 wol_mode_valid[0x1];
8493 u8 reserved_at_42[0xe];
8494 u8 rol_mode[0x8];
8495 u8 wol_mode[0x8];
8496
8497 u8 reserved_at_60[0x20];
8498};
8499
Saeed Mahameede2816822015-05-28 22:28:40 +03008500enum {
8501 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8502 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8503 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8504};
8505
8506enum {
8507 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8508 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8509 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8510};
8511
8512enum {
8513 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8514 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8515 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8516 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8517 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8518 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8519 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8520 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8521 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8522 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8523 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8524};
8525
8526struct mlx5_ifc_initial_seg_bits {
8527 u8 fw_rev_minor[0x10];
8528 u8 fw_rev_major[0x10];
8529
8530 u8 cmd_interface_rev[0x10];
8531 u8 fw_rev_subminor[0x10];
8532
Matan Barakb4ff3a32016-02-09 14:57:42 +02008533 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008534
8535 u8 cmdq_phy_addr_63_32[0x20];
8536
8537 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008538 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008539 u8 nic_interface[0x2];
8540 u8 log_cmdq_size[0x4];
8541 u8 log_cmdq_stride[0x4];
8542
8543 u8 command_doorbell_vector[0x20];
8544
Matan Barakb4ff3a32016-02-09 14:57:42 +02008545 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008546
8547 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008548 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008549 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008550 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008551
8552 struct mlx5_ifc_health_buffer_bits health_buffer;
8553
8554 u8 no_dram_nic_offset[0x20];
8555
Matan Barakb4ff3a32016-02-09 14:57:42 +02008556 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008557
Matan Barakb4ff3a32016-02-09 14:57:42 +02008558 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008559 u8 clear_int[0x1];
8560
8561 u8 health_syndrome[0x8];
8562 u8 health_counter[0x18];
8563
Matan Barakb4ff3a32016-02-09 14:57:42 +02008564 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008565};
8566
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008567struct mlx5_ifc_mtpps_reg_bits {
8568 u8 reserved_at_0[0xc];
8569 u8 cap_number_of_pps_pins[0x4];
8570 u8 reserved_at_10[0x4];
8571 u8 cap_max_num_of_pps_in_pins[0x4];
8572 u8 reserved_at_18[0x4];
8573 u8 cap_max_num_of_pps_out_pins[0x4];
8574
8575 u8 reserved_at_20[0x24];
8576 u8 cap_pin_3_mode[0x4];
8577 u8 reserved_at_48[0x4];
8578 u8 cap_pin_2_mode[0x4];
8579 u8 reserved_at_50[0x4];
8580 u8 cap_pin_1_mode[0x4];
8581 u8 reserved_at_58[0x4];
8582 u8 cap_pin_0_mode[0x4];
8583
8584 u8 reserved_at_60[0x4];
8585 u8 cap_pin_7_mode[0x4];
8586 u8 reserved_at_68[0x4];
8587 u8 cap_pin_6_mode[0x4];
8588 u8 reserved_at_70[0x4];
8589 u8 cap_pin_5_mode[0x4];
8590 u8 reserved_at_78[0x4];
8591 u8 cap_pin_4_mode[0x4];
8592
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008593 u8 field_select[0x20];
8594 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008595
8596 u8 enable[0x1];
8597 u8 reserved_at_101[0xb];
8598 u8 pattern[0x4];
8599 u8 reserved_at_110[0x4];
8600 u8 pin_mode[0x4];
8601 u8 pin[0x8];
8602
8603 u8 reserved_at_120[0x20];
8604
8605 u8 time_stamp[0x40];
8606
8607 u8 out_pulse_duration[0x10];
8608 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008609 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008610
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008611 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008612};
8613
8614struct mlx5_ifc_mtppse_reg_bits {
8615 u8 reserved_at_0[0x18];
8616 u8 pin[0x8];
8617 u8 event_arm[0x1];
8618 u8 reserved_at_21[0x1b];
8619 u8 event_generation_mode[0x4];
8620 u8 reserved_at_40[0x40];
8621};
8622
Or Gerlitz47176282017-04-18 13:35:39 +03008623struct mlx5_ifc_mcqi_cap_bits {
8624 u8 supported_info_bitmask[0x20];
8625
8626 u8 component_size[0x20];
8627
8628 u8 max_component_size[0x20];
8629
8630 u8 log_mcda_word_size[0x4];
8631 u8 reserved_at_64[0xc];
8632 u8 mcda_max_write_size[0x10];
8633
8634 u8 rd_en[0x1];
8635 u8 reserved_at_81[0x1];
8636 u8 match_chip_id[0x1];
8637 u8 match_psid[0x1];
8638 u8 check_user_timestamp[0x1];
8639 u8 match_base_guid_mac[0x1];
8640 u8 reserved_at_86[0x1a];
8641};
8642
8643struct mlx5_ifc_mcqi_reg_bits {
8644 u8 read_pending_component[0x1];
8645 u8 reserved_at_1[0xf];
8646 u8 component_index[0x10];
8647
8648 u8 reserved_at_20[0x20];
8649
8650 u8 reserved_at_40[0x1b];
8651 u8 info_type[0x5];
8652
8653 u8 info_size[0x20];
8654
8655 u8 offset[0x20];
8656
8657 u8 reserved_at_a0[0x10];
8658 u8 data_size[0x10];
8659
8660 u8 data[0][0x20];
8661};
8662
8663struct mlx5_ifc_mcc_reg_bits {
8664 u8 reserved_at_0[0x4];
8665 u8 time_elapsed_since_last_cmd[0xc];
8666 u8 reserved_at_10[0x8];
8667 u8 instruction[0x8];
8668
8669 u8 reserved_at_20[0x10];
8670 u8 component_index[0x10];
8671
8672 u8 reserved_at_40[0x8];
8673 u8 update_handle[0x18];
8674
8675 u8 handle_owner_type[0x4];
8676 u8 handle_owner_host_id[0x4];
8677 u8 reserved_at_68[0x1];
8678 u8 control_progress[0x7];
8679 u8 error_code[0x8];
8680 u8 reserved_at_78[0x4];
8681 u8 control_state[0x4];
8682
8683 u8 component_size[0x20];
8684
8685 u8 reserved_at_a0[0x60];
8686};
8687
8688struct mlx5_ifc_mcda_reg_bits {
8689 u8 reserved_at_0[0x8];
8690 u8 update_handle[0x18];
8691
8692 u8 offset[0x20];
8693
8694 u8 reserved_at_40[0x10];
8695 u8 size[0x10];
8696
8697 u8 reserved_at_60[0x20];
8698
8699 u8 data[0][0x20];
8700};
8701
Saeed Mahameede2816822015-05-28 22:28:40 +03008702union mlx5_ifc_ports_control_registers_document_bits {
8703 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8704 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8705 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8706 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8707 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8708 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8709 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8710 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8711 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8712 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8713 struct mlx5_ifc_paos_reg_bits paos_reg;
8714 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8715 struct mlx5_ifc_peir_reg_bits peir_reg;
8716 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8717 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008718 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008719 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8720 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8721 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8722 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8723 struct mlx5_ifc_plib_reg_bits plib_reg;
8724 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8725 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8726 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8727 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8728 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8729 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8730 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8731 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8732 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8733 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008734 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008735 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8736 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8737 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8738 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8739 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8740 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8741 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008742 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008743 struct mlx5_ifc_pude_reg_bits pude_reg;
8744 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8745 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8746 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008747 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8748 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008749 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008750 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8751 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008752 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8753 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8754 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008755 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008756};
8757
8758union mlx5_ifc_debug_enhancements_document_bits {
8759 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008760 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008761};
8762
8763union mlx5_ifc_uplink_pci_interface_document_bits {
8764 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008765 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008766};
8767
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008768struct mlx5_ifc_set_flow_table_root_out_bits {
8769 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008770 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008771
8772 u8 syndrome[0x20];
8773
Matan Barakb4ff3a32016-02-09 14:57:42 +02008774 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008775};
8776
8777struct mlx5_ifc_set_flow_table_root_in_bits {
8778 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008779 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008780
Matan Barakb4ff3a32016-02-09 14:57:42 +02008781 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008782 u8 op_mod[0x10];
8783
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008784 u8 other_vport[0x1];
8785 u8 reserved_at_41[0xf];
8786 u8 vport_number[0x10];
8787
8788 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008789
8790 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008791 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008792
Matan Barakb4ff3a32016-02-09 14:57:42 +02008793 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008794 u8 table_id[0x18];
8795
Erez Shitrit500a3d02017-04-13 06:36:51 +03008796 u8 reserved_at_c0[0x8];
8797 u8 underlay_qpn[0x18];
8798 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008799};
8800
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008801enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008802 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8803 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008804};
8805
8806struct mlx5_ifc_modify_flow_table_out_bits {
8807 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008808 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008809
8810 u8 syndrome[0x20];
8811
Matan Barakb4ff3a32016-02-09 14:57:42 +02008812 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008813};
8814
8815struct mlx5_ifc_modify_flow_table_in_bits {
8816 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008817 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008818
Matan Barakb4ff3a32016-02-09 14:57:42 +02008819 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008820 u8 op_mod[0x10];
8821
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008822 u8 other_vport[0x1];
8823 u8 reserved_at_41[0xf];
8824 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008825
Matan Barakb4ff3a32016-02-09 14:57:42 +02008826 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008827 u8 modify_field_select[0x10];
8828
8829 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008830 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008831
Matan Barakb4ff3a32016-02-09 14:57:42 +02008832 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008833 u8 table_id[0x18];
8834
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008835 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008836};
8837
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008838struct mlx5_ifc_ets_tcn_config_reg_bits {
8839 u8 g[0x1];
8840 u8 b[0x1];
8841 u8 r[0x1];
8842 u8 reserved_at_3[0x9];
8843 u8 group[0x4];
8844 u8 reserved_at_10[0x9];
8845 u8 bw_allocation[0x7];
8846
8847 u8 reserved_at_20[0xc];
8848 u8 max_bw_units[0x4];
8849 u8 reserved_at_30[0x8];
8850 u8 max_bw_value[0x8];
8851};
8852
8853struct mlx5_ifc_ets_global_config_reg_bits {
8854 u8 reserved_at_0[0x2];
8855 u8 r[0x1];
8856 u8 reserved_at_3[0x1d];
8857
8858 u8 reserved_at_20[0xc];
8859 u8 max_bw_units[0x4];
8860 u8 reserved_at_30[0x8];
8861 u8 max_bw_value[0x8];
8862};
8863
8864struct mlx5_ifc_qetc_reg_bits {
8865 u8 reserved_at_0[0x8];
8866 u8 port_number[0x8];
8867 u8 reserved_at_10[0x30];
8868
8869 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8870 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8871};
8872
Huy Nguyen415a64a2017-07-18 16:08:46 -05008873struct mlx5_ifc_qpdpm_dscp_reg_bits {
8874 u8 e[0x1];
8875 u8 reserved_at_01[0x0b];
8876 u8 prio[0x04];
8877};
8878
8879struct mlx5_ifc_qpdpm_reg_bits {
8880 u8 reserved_at_0[0x8];
8881 u8 local_port[0x8];
8882 u8 reserved_at_10[0x10];
8883 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8884};
8885
8886struct mlx5_ifc_qpts_reg_bits {
8887 u8 reserved_at_0[0x8];
8888 u8 local_port[0x8];
8889 u8 reserved_at_10[0x2d];
8890 u8 trust_state[0x3];
8891};
8892
Huy Nguyen50b4a3c2018-03-02 15:47:01 -06008893struct mlx5_ifc_pptb_reg_bits {
8894 u8 reserved_at_0[0x2];
8895 u8 mm[0x2];
8896 u8 reserved_at_4[0x4];
8897 u8 local_port[0x8];
8898 u8 reserved_at_10[0x6];
8899 u8 cm[0x1];
8900 u8 um[0x1];
8901 u8 pm[0x8];
8902
8903 u8 prio_x_buff[0x20];
8904
8905 u8 pm_msb[0x8];
8906 u8 reserved_at_48[0x10];
8907 u8 ctrl_buff[0x4];
8908 u8 untagged_buff[0x4];
8909};
8910
8911struct mlx5_ifc_pbmc_reg_bits {
8912 u8 reserved_at_0[0x8];
8913 u8 local_port[0x8];
8914 u8 reserved_at_10[0x10];
8915
8916 u8 xoff_timer_value[0x10];
8917 u8 xoff_refresh[0x10];
8918
8919 u8 reserved_at_40[0x9];
8920 u8 fullness_threshold[0x7];
8921 u8 port_buffer_size[0x10];
8922
8923 struct mlx5_ifc_bufferx_reg_bits buffer[10];
8924
8925 u8 reserved_at_2e0[0x40];
8926};
8927
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008928struct mlx5_ifc_qtct_reg_bits {
8929 u8 reserved_at_0[0x8];
8930 u8 port_number[0x8];
8931 u8 reserved_at_10[0xd];
8932 u8 prio[0x3];
8933
8934 u8 reserved_at_20[0x1d];
8935 u8 tclass[0x3];
8936};
8937
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008938struct mlx5_ifc_mcia_reg_bits {
8939 u8 l[0x1];
8940 u8 reserved_at_1[0x7];
8941 u8 module[0x8];
8942 u8 reserved_at_10[0x8];
8943 u8 status[0x8];
8944
8945 u8 i2c_device_address[0x8];
8946 u8 page_number[0x8];
8947 u8 device_address[0x10];
8948
8949 u8 reserved_at_40[0x10];
8950 u8 size[0x10];
8951
8952 u8 reserved_at_60[0x20];
8953
8954 u8 dword_0[0x20];
8955 u8 dword_1[0x20];
8956 u8 dword_2[0x20];
8957 u8 dword_3[0x20];
8958 u8 dword_4[0x20];
8959 u8 dword_5[0x20];
8960 u8 dword_6[0x20];
8961 u8 dword_7[0x20];
8962 u8 dword_8[0x20];
8963 u8 dword_9[0x20];
8964 u8 dword_10[0x20];
8965 u8 dword_11[0x20];
8966};
8967
Saeed Mahameed74862162016-06-09 15:11:34 +03008968struct mlx5_ifc_dcbx_param_bits {
8969 u8 dcbx_cee_cap[0x1];
8970 u8 dcbx_ieee_cap[0x1];
8971 u8 dcbx_standby_cap[0x1];
8972 u8 reserved_at_0[0x5];
8973 u8 port_number[0x8];
8974 u8 reserved_at_10[0xa];
8975 u8 max_application_table_size[6];
8976 u8 reserved_at_20[0x15];
8977 u8 version_oper[0x3];
8978 u8 reserved_at_38[5];
8979 u8 version_admin[0x3];
8980 u8 willing_admin[0x1];
8981 u8 reserved_at_41[0x3];
8982 u8 pfc_cap_oper[0x4];
8983 u8 reserved_at_48[0x4];
8984 u8 pfc_cap_admin[0x4];
8985 u8 reserved_at_50[0x4];
8986 u8 num_of_tc_oper[0x4];
8987 u8 reserved_at_58[0x4];
8988 u8 num_of_tc_admin[0x4];
8989 u8 remote_willing[0x1];
8990 u8 reserved_at_61[3];
8991 u8 remote_pfc_cap[4];
8992 u8 reserved_at_68[0x14];
8993 u8 remote_num_of_tc[0x4];
8994 u8 reserved_at_80[0x18];
8995 u8 error[0x8];
8996 u8 reserved_at_a0[0x160];
8997};
Aviv Heller84df61e2016-05-10 13:47:50 +03008998
8999struct mlx5_ifc_lagc_bits {
9000 u8 reserved_at_0[0x1d];
9001 u8 lag_state[0x3];
9002
9003 u8 reserved_at_20[0x14];
9004 u8 tx_remap_affinity_2[0x4];
9005 u8 reserved_at_38[0x4];
9006 u8 tx_remap_affinity_1[0x4];
9007};
9008
9009struct mlx5_ifc_create_lag_out_bits {
9010 u8 status[0x8];
9011 u8 reserved_at_8[0x18];
9012
9013 u8 syndrome[0x20];
9014
9015 u8 reserved_at_40[0x40];
9016};
9017
9018struct mlx5_ifc_create_lag_in_bits {
9019 u8 opcode[0x10];
9020 u8 reserved_at_10[0x10];
9021
9022 u8 reserved_at_20[0x10];
9023 u8 op_mod[0x10];
9024
9025 struct mlx5_ifc_lagc_bits ctx;
9026};
9027
9028struct mlx5_ifc_modify_lag_out_bits {
9029 u8 status[0x8];
9030 u8 reserved_at_8[0x18];
9031
9032 u8 syndrome[0x20];
9033
9034 u8 reserved_at_40[0x40];
9035};
9036
9037struct mlx5_ifc_modify_lag_in_bits {
9038 u8 opcode[0x10];
9039 u8 reserved_at_10[0x10];
9040
9041 u8 reserved_at_20[0x10];
9042 u8 op_mod[0x10];
9043
9044 u8 reserved_at_40[0x20];
9045 u8 field_select[0x20];
9046
9047 struct mlx5_ifc_lagc_bits ctx;
9048};
9049
9050struct mlx5_ifc_query_lag_out_bits {
9051 u8 status[0x8];
9052 u8 reserved_at_8[0x18];
9053
9054 u8 syndrome[0x20];
9055
9056 u8 reserved_at_40[0x40];
9057
9058 struct mlx5_ifc_lagc_bits ctx;
9059};
9060
9061struct mlx5_ifc_query_lag_in_bits {
9062 u8 opcode[0x10];
9063 u8 reserved_at_10[0x10];
9064
9065 u8 reserved_at_20[0x10];
9066 u8 op_mod[0x10];
9067
9068 u8 reserved_at_40[0x40];
9069};
9070
9071struct mlx5_ifc_destroy_lag_out_bits {
9072 u8 status[0x8];
9073 u8 reserved_at_8[0x18];
9074
9075 u8 syndrome[0x20];
9076
9077 u8 reserved_at_40[0x40];
9078};
9079
9080struct mlx5_ifc_destroy_lag_in_bits {
9081 u8 opcode[0x10];
9082 u8 reserved_at_10[0x10];
9083
9084 u8 reserved_at_20[0x10];
9085 u8 op_mod[0x10];
9086
9087 u8 reserved_at_40[0x40];
9088};
9089
9090struct mlx5_ifc_create_vport_lag_out_bits {
9091 u8 status[0x8];
9092 u8 reserved_at_8[0x18];
9093
9094 u8 syndrome[0x20];
9095
9096 u8 reserved_at_40[0x40];
9097};
9098
9099struct mlx5_ifc_create_vport_lag_in_bits {
9100 u8 opcode[0x10];
9101 u8 reserved_at_10[0x10];
9102
9103 u8 reserved_at_20[0x10];
9104 u8 op_mod[0x10];
9105
9106 u8 reserved_at_40[0x40];
9107};
9108
9109struct mlx5_ifc_destroy_vport_lag_out_bits {
9110 u8 status[0x8];
9111 u8 reserved_at_8[0x18];
9112
9113 u8 syndrome[0x20];
9114
9115 u8 reserved_at_40[0x40];
9116};
9117
9118struct mlx5_ifc_destroy_vport_lag_in_bits {
9119 u8 opcode[0x10];
9120 u8 reserved_at_10[0x10];
9121
9122 u8 reserved_at_20[0x10];
9123 u8 op_mod[0x10];
9124
9125 u8 reserved_at_40[0x40];
9126};
9127
Ariel Levkovich24da0012018-04-05 18:53:27 +03009128struct mlx5_ifc_alloc_memic_in_bits {
9129 u8 opcode[0x10];
9130 u8 reserved_at_10[0x10];
9131
9132 u8 reserved_at_20[0x10];
9133 u8 op_mod[0x10];
9134
9135 u8 reserved_at_30[0x20];
9136
9137 u8 reserved_at_40[0x18];
9138 u8 log_memic_addr_alignment[0x8];
9139
9140 u8 range_start_addr[0x40];
9141
9142 u8 range_size[0x20];
9143
9144 u8 memic_size[0x20];
9145};
9146
9147struct mlx5_ifc_alloc_memic_out_bits {
9148 u8 status[0x8];
9149 u8 reserved_at_8[0x18];
9150
9151 u8 syndrome[0x20];
9152
9153 u8 memic_start_addr[0x40];
9154};
9155
9156struct mlx5_ifc_dealloc_memic_in_bits {
9157 u8 opcode[0x10];
9158 u8 reserved_at_10[0x10];
9159
9160 u8 reserved_at_20[0x10];
9161 u8 op_mod[0x10];
9162
9163 u8 reserved_at_40[0x40];
9164
9165 u8 memic_start_addr[0x40];
9166
9167 u8 memic_size[0x20];
9168
9169 u8 reserved_at_e0[0x20];
9170};
9171
9172struct mlx5_ifc_dealloc_memic_out_bits {
9173 u8 status[0x8];
9174 u8 reserved_at_8[0x18];
9175
9176 u8 syndrome[0x20];
9177
9178 u8 reserved_at_40[0x40];
9179};
9180
Yishai Hadas38b7ca92018-03-08 14:36:27 +02009181struct mlx5_ifc_general_obj_in_cmd_hdr_bits {
9182 u8 opcode[0x10];
9183 u8 uid[0x10];
9184
9185 u8 reserved_at_20[0x10];
9186 u8 obj_type[0x10];
9187
9188 u8 obj_id[0x20];
9189
9190 u8 reserved_at_60[0x20];
9191};
9192
9193struct mlx5_ifc_general_obj_out_cmd_hdr_bits {
9194 u8 status[0x8];
9195 u8 reserved_at_8[0x18];
9196
9197 u8 syndrome[0x20];
9198
9199 u8 obj_id[0x20];
9200
9201 u8 reserved_at_60[0x20];
9202};
9203
9204struct mlx5_ifc_umem_bits {
9205 u8 modify_field_select[0x40];
9206
9207 u8 reserved_at_40[0x5b];
9208 u8 log_page_size[0x5];
9209
9210 u8 page_offset[0x20];
9211
9212 u8 num_of_mtt[0x40];
9213
9214 struct mlx5_ifc_mtt_bits mtt[0];
9215};
9216
9217struct mlx5_ifc_uctx_bits {
9218 u8 modify_field_select[0x40];
9219
9220 u8 reserved_at_40[0x1c0];
9221};
9222
9223struct mlx5_ifc_create_umem_in_bits {
9224 struct mlx5_ifc_general_obj_in_cmd_hdr_bits hdr;
9225 struct mlx5_ifc_umem_bits umem;
9226};
9227
9228struct mlx5_ifc_create_uctx_in_bits {
9229 struct mlx5_ifc_general_obj_in_cmd_hdr_bits hdr;
9230 struct mlx5_ifc_uctx_bits uctx;
9231};
9232
Feras Daoudeff8ea82018-07-16 18:35:30 -07009233struct mlx5_ifc_mtrc_string_db_param_bits {
9234 u8 string_db_base_address[0x20];
9235
9236 u8 reserved_at_20[0x8];
9237 u8 string_db_size[0x18];
9238};
9239
9240struct mlx5_ifc_mtrc_cap_bits {
9241 u8 trace_owner[0x1];
9242 u8 trace_to_memory[0x1];
9243 u8 reserved_at_2[0x4];
9244 u8 trc_ver[0x2];
9245 u8 reserved_at_8[0x14];
9246 u8 num_string_db[0x4];
9247
9248 u8 first_string_trace[0x8];
9249 u8 num_string_trace[0x8];
9250 u8 reserved_at_30[0x28];
9251
9252 u8 log_max_trace_buffer_size[0x8];
9253
9254 u8 reserved_at_60[0x20];
9255
9256 struct mlx5_ifc_mtrc_string_db_param_bits string_db_param[8];
9257
9258 u8 reserved_at_280[0x180];
9259};
9260
9261struct mlx5_ifc_mtrc_conf_bits {
9262 u8 reserved_at_0[0x1c];
9263 u8 trace_mode[0x4];
9264 u8 reserved_at_20[0x18];
9265 u8 log_trace_buffer_size[0x8];
9266 u8 trace_mkey[0x20];
9267 u8 reserved_at_60[0x3a0];
9268};
9269
9270struct mlx5_ifc_mtrc_stdb_bits {
9271 u8 string_db_index[0x4];
9272 u8 reserved_at_4[0x4];
9273 u8 read_size[0x18];
9274 u8 start_offset[0x20];
9275 u8 string_db_data[0];
9276};
9277
9278struct mlx5_ifc_mtrc_ctrl_bits {
9279 u8 trace_status[0x2];
9280 u8 reserved_at_2[0x2];
9281 u8 arm_event[0x1];
9282 u8 reserved_at_5[0xb];
9283 u8 modify_field_select[0x10];
9284 u8 reserved_at_20[0x2b];
9285 u8 current_timestamp52_32[0x15];
9286 u8 current_timestamp31_0[0x20];
9287 u8 reserved_at_80[0x180];
9288};
9289
Eli Cohend29b7962014-10-02 12:19:43 +03009290#endif /* MLX5_IFC_H */