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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
35enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030036 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
37 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
38 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
39 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
40 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
41 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
42 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
43 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
44 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
45 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
46 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
47 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
48 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
49 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
50 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
51 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
52 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
53 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
54 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
55 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
56 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
57 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
58 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
59 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb
60};
61
62enum {
63 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
64 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
65 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
66 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
67};
68
69enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020070 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
71 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
72};
73
74enum {
Eli Cohend29b7962014-10-02 12:19:43 +030075 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
76 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
77 MLX5_CMD_OP_INIT_HCA = 0x102,
78 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
79 MLX5_CMD_OP_ENABLE_HCA = 0x104,
80 MLX5_CMD_OP_DISABLE_HCA = 0x105,
81 MLX5_CMD_OP_QUERY_PAGES = 0x107,
82 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
83 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030084 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
85 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020086 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030087 MLX5_CMD_OP_CREATE_MKEY = 0x200,
88 MLX5_CMD_OP_QUERY_MKEY = 0x201,
89 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
90 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
91 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
92 MLX5_CMD_OP_CREATE_EQ = 0x301,
93 MLX5_CMD_OP_DESTROY_EQ = 0x302,
94 MLX5_CMD_OP_QUERY_EQ = 0x303,
95 MLX5_CMD_OP_GEN_EQE = 0x304,
96 MLX5_CMD_OP_CREATE_CQ = 0x400,
97 MLX5_CMD_OP_DESTROY_CQ = 0x401,
98 MLX5_CMD_OP_QUERY_CQ = 0x402,
99 MLX5_CMD_OP_MODIFY_CQ = 0x403,
100 MLX5_CMD_OP_CREATE_QP = 0x500,
101 MLX5_CMD_OP_DESTROY_QP = 0x501,
102 MLX5_CMD_OP_RST2INIT_QP = 0x502,
103 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
104 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
105 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
106 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
107 MLX5_CMD_OP_2ERR_QP = 0x507,
108 MLX5_CMD_OP_2RST_QP = 0x50a,
109 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300110 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300111 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
112 MLX5_CMD_OP_CREATE_PSV = 0x600,
113 MLX5_CMD_OP_DESTROY_PSV = 0x601,
114 MLX5_CMD_OP_CREATE_SRQ = 0x700,
115 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
116 MLX5_CMD_OP_QUERY_SRQ = 0x702,
117 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300118 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
119 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
120 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
121 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300122 MLX5_CMD_OP_CREATE_DCT = 0x710,
123 MLX5_CMD_OP_DESTROY_DCT = 0x711,
124 MLX5_CMD_OP_DRAIN_DCT = 0x712,
125 MLX5_CMD_OP_QUERY_DCT = 0x713,
126 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300127 MLX5_CMD_OP_CREATE_XRQ = 0x717,
128 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
129 MLX5_CMD_OP_QUERY_XRQ = 0x719,
130 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300131 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
132 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
133 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
134 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
135 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
136 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300137 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300138 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300139 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
140 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
141 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
142 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300143 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
144 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
145 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
146 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Saeed Mahameed74862162016-06-09 15:11:34 +0300147 MLX5_CMD_OP_SET_RATE_LIMIT = 0x780,
148 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300149 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
150 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
151 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
152 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
153 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
154 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300155 MLX5_CMD_OP_ALLOC_PD = 0x800,
156 MLX5_CMD_OP_DEALLOC_PD = 0x801,
157 MLX5_CMD_OP_ALLOC_UAR = 0x802,
158 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
159 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
160 MLX5_CMD_OP_ACCESS_REG = 0x805,
161 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300162 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300163 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
164 MLX5_CMD_OP_MAD_IFC = 0x50d,
165 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
166 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
167 MLX5_CMD_OP_NOP = 0x80d,
168 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
169 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300170 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
171 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
172 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
173 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
174 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
175 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
176 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
177 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
178 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
179 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
180 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
181 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200182 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
183 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300184 MLX5_CMD_OP_CREATE_LAG = 0x840,
185 MLX5_CMD_OP_MODIFY_LAG = 0x841,
186 MLX5_CMD_OP_QUERY_LAG = 0x842,
187 MLX5_CMD_OP_DESTROY_LAG = 0x843,
188 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
189 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300190 MLX5_CMD_OP_CREATE_TIR = 0x900,
191 MLX5_CMD_OP_MODIFY_TIR = 0x901,
192 MLX5_CMD_OP_DESTROY_TIR = 0x902,
193 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300194 MLX5_CMD_OP_CREATE_SQ = 0x904,
195 MLX5_CMD_OP_MODIFY_SQ = 0x905,
196 MLX5_CMD_OP_DESTROY_SQ = 0x906,
197 MLX5_CMD_OP_QUERY_SQ = 0x907,
198 MLX5_CMD_OP_CREATE_RQ = 0x908,
199 MLX5_CMD_OP_MODIFY_RQ = 0x909,
200 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
201 MLX5_CMD_OP_QUERY_RQ = 0x90b,
202 MLX5_CMD_OP_CREATE_RMP = 0x90c,
203 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
204 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
205 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300206 MLX5_CMD_OP_CREATE_TIS = 0x912,
207 MLX5_CMD_OP_MODIFY_TIS = 0x913,
208 MLX5_CMD_OP_DESTROY_TIS = 0x914,
209 MLX5_CMD_OP_QUERY_TIS = 0x915,
210 MLX5_CMD_OP_CREATE_RQT = 0x916,
211 MLX5_CMD_OP_MODIFY_RQT = 0x917,
212 MLX5_CMD_OP_DESTROY_RQT = 0x918,
213 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200214 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300215 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
216 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
217 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
218 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
219 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
220 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
221 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
222 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200223 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000224 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
225 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
226 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300227 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300228 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
229 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Shahar Klein86d56a12016-06-10 00:07:30 +0300230 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300231};
232
233struct mlx5_ifc_flow_table_fields_supported_bits {
234 u8 outer_dmac[0x1];
235 u8 outer_smac[0x1];
236 u8 outer_ether_type[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200237 u8 reserved_at_3[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300238 u8 outer_first_prio[0x1];
239 u8 outer_first_cfi[0x1];
240 u8 outer_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200241 u8 reserved_at_7[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300242 u8 outer_second_prio[0x1];
243 u8 outer_second_cfi[0x1];
244 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200245 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300246 u8 outer_sip[0x1];
247 u8 outer_dip[0x1];
248 u8 outer_frag[0x1];
249 u8 outer_ip_protocol[0x1];
250 u8 outer_ip_ecn[0x1];
251 u8 outer_ip_dscp[0x1];
252 u8 outer_udp_sport[0x1];
253 u8 outer_udp_dport[0x1];
254 u8 outer_tcp_sport[0x1];
255 u8 outer_tcp_dport[0x1];
256 u8 outer_tcp_flags[0x1];
257 u8 outer_gre_protocol[0x1];
258 u8 outer_gre_key[0x1];
259 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200260 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300261 u8 source_eswitch_port[0x1];
262
263 u8 inner_dmac[0x1];
264 u8 inner_smac[0x1];
265 u8 inner_ether_type[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200266 u8 reserved_at_23[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300267 u8 inner_first_prio[0x1];
268 u8 inner_first_cfi[0x1];
269 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200270 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300271 u8 inner_second_prio[0x1];
272 u8 inner_second_cfi[0x1];
273 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200274 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300275 u8 inner_sip[0x1];
276 u8 inner_dip[0x1];
277 u8 inner_frag[0x1];
278 u8 inner_ip_protocol[0x1];
279 u8 inner_ip_ecn[0x1];
280 u8 inner_ip_dscp[0x1];
281 u8 inner_udp_sport[0x1];
282 u8 inner_udp_dport[0x1];
283 u8 inner_tcp_sport[0x1];
284 u8 inner_tcp_dport[0x1];
285 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200286 u8 reserved_at_37[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +0300287
Matan Barakb4ff3a32016-02-09 14:57:42 +0200288 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300289};
290
291struct mlx5_ifc_flow_table_prop_layout_bits {
292 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000293 u8 reserved_at_1[0x1];
294 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200295 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200296 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200297 u8 identified_miss_table_mode[0x1];
298 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300299 u8 encap[0x1];
300 u8 decap[0x1];
301 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300302
Matan Barakb4ff3a32016-02-09 14:57:42 +0200303 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300304 u8 log_max_ft_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200305 u8 reserved_at_28[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300306 u8 max_ft_level[0x8];
307
Matan Barakb4ff3a32016-02-09 14:57:42 +0200308 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300309
Matan Barakb4ff3a32016-02-09 14:57:42 +0200310 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200311 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300312
Matan Barakb4ff3a32016-02-09 14:57:42 +0200313 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200314 u8 log_max_destination[0x8];
315
Matan Barakb4ff3a32016-02-09 14:57:42 +0200316 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317 u8 log_max_flow[0x8];
318
Matan Barakb4ff3a32016-02-09 14:57:42 +0200319 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320
321 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
322
323 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
324};
325
326struct mlx5_ifc_odp_per_transport_service_cap_bits {
327 u8 send[0x1];
328 u8 receive[0x1];
329 u8 write[0x1];
330 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200331 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300332 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200333 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300334};
335
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200336struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200337 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200338
339 u8 ipv4[0x20];
340};
341
342struct mlx5_ifc_ipv6_layout_bits {
343 u8 ipv6[16][0x8];
344};
345
346union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
347 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
348 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200349 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200350};
351
Saeed Mahameede2816822015-05-28 22:28:40 +0300352struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
353 u8 smac_47_16[0x20];
354
355 u8 smac_15_0[0x10];
356 u8 ethertype[0x10];
357
358 u8 dmac_47_16[0x20];
359
360 u8 dmac_15_0[0x10];
361 u8 first_prio[0x3];
362 u8 first_cfi[0x1];
363 u8 first_vid[0xc];
364
365 u8 ip_protocol[0x8];
366 u8 ip_dscp[0x6];
367 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300368 u8 cvlan_tag[0x1];
369 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300370 u8 frag[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200371 u8 reserved_at_93[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300372 u8 tcp_flags[0x9];
373
374 u8 tcp_sport[0x10];
375 u8 tcp_dport[0x10];
376
Matan Barakb4ff3a32016-02-09 14:57:42 +0200377 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300378
379 u8 udp_sport[0x10];
380 u8 udp_dport[0x10];
381
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200382 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300383
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200384 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300385};
386
387struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300388 u8 reserved_at_0[0x8];
389 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300390
Matan Barakb4ff3a32016-02-09 14:57:42 +0200391 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300392 u8 source_port[0x10];
393
394 u8 outer_second_prio[0x3];
395 u8 outer_second_cfi[0x1];
396 u8 outer_second_vid[0xc];
397 u8 inner_second_prio[0x3];
398 u8 inner_second_cfi[0x1];
399 u8 inner_second_vid[0xc];
400
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300401 u8 outer_second_cvlan_tag[0x1];
402 u8 inner_second_cvlan_tag[0x1];
403 u8 outer_second_svlan_tag[0x1];
404 u8 inner_second_svlan_tag[0x1];
405 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300406 u8 gre_protocol[0x10];
407
408 u8 gre_key_h[0x18];
409 u8 gre_key_l[0x8];
410
411 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200412 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300413
Matan Barakb4ff3a32016-02-09 14:57:42 +0200414 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300415
Matan Barakb4ff3a32016-02-09 14:57:42 +0200416 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300417 u8 outer_ipv6_flow_label[0x14];
418
Matan Barakb4ff3a32016-02-09 14:57:42 +0200419 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300420 u8 inner_ipv6_flow_label[0x14];
421
Matan Barakb4ff3a32016-02-09 14:57:42 +0200422 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300423};
424
425struct mlx5_ifc_cmd_pas_bits {
426 u8 pa_h[0x20];
427
428 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200429 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300430};
431
432struct mlx5_ifc_uint64_bits {
433 u8 hi[0x20];
434
435 u8 lo[0x20];
436};
437
438enum {
439 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
440 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
441 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
442 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
443 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
444 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
445 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
446 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
447 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
448 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
449};
450
451struct mlx5_ifc_ads_bits {
452 u8 fl[0x1];
453 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200454 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300455 u8 pkey_index[0x10];
456
Matan Barakb4ff3a32016-02-09 14:57:42 +0200457 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300458 u8 grh[0x1];
459 u8 mlid[0x7];
460 u8 rlid[0x10];
461
462 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200463 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300464 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200465 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300466 u8 stat_rate[0x4];
467 u8 hop_limit[0x8];
468
Matan Barakb4ff3a32016-02-09 14:57:42 +0200469 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300470 u8 tclass[0x8];
471 u8 flow_label[0x14];
472
473 u8 rgid_rip[16][0x8];
474
Matan Barakb4ff3a32016-02-09 14:57:42 +0200475 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300476 u8 f_dscp[0x1];
477 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200478 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300479 u8 f_eth_prio[0x1];
480 u8 ecn[0x2];
481 u8 dscp[0x6];
482 u8 udp_sport[0x10];
483
484 u8 dei_cfi[0x1];
485 u8 eth_prio[0x3];
486 u8 sl[0x4];
487 u8 port[0x8];
488 u8 rmac_47_32[0x10];
489
490 u8 rmac_31_0[0x20];
491};
492
493struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200494 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300495 u8 nic_rx_multi_path_tirs_fts[0x1];
496 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
497 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300498
499 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
500
Matan Barakb4ff3a32016-02-09 14:57:42 +0200501 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300502
503 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
504
505 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
506
Matan Barakb4ff3a32016-02-09 14:57:42 +0200507 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300508
509 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
510
Matan Barakb4ff3a32016-02-09 14:57:42 +0200511 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300512};
513
Saeed Mahameed495716b2015-12-01 18:03:19 +0200514struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200515 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200516
517 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
518
519 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
522
Matan Barakb4ff3a32016-02-09 14:57:42 +0200523 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200524};
525
Saeed Mahameedd6666752015-12-01 18:03:22 +0200526struct mlx5_ifc_e_switch_cap_bits {
527 u8 vport_svlan_strip[0x1];
528 u8 vport_cvlan_strip[0x1];
529 u8 vport_svlan_insert[0x1];
530 u8 vport_cvlan_insert_if_not_exist[0x1];
531 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300532 u8 reserved_at_5[0x19];
533 u8 nic_vport_node_guid_modify[0x1];
534 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200535
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300536 u8 vxlan_encap_decap[0x1];
537 u8 nvgre_encap_decap[0x1];
538 u8 reserved_at_22[0x9];
539 u8 log_max_encap_headers[0x5];
540 u8 reserved_2b[0x6];
541 u8 max_encap_header_size[0xa];
542
543 u8 reserved_40[0x7c0];
544
Saeed Mahameedd6666752015-12-01 18:03:22 +0200545};
546
Saeed Mahameed74862162016-06-09 15:11:34 +0300547struct mlx5_ifc_qos_cap_bits {
548 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300549 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200550 u8 esw_bw_share[0x1];
551 u8 esw_rate_limit[0x1];
552 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300553
554 u8 reserved_at_20[0x20];
555
Saeed Mahameed74862162016-06-09 15:11:34 +0300556 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300557
Saeed Mahameed74862162016-06-09 15:11:34 +0300558 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300559
560 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300561 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300562
563 u8 esw_element_type[0x10];
564 u8 esw_tsar_type[0x10];
565
566 u8 reserved_at_c0[0x10];
567 u8 max_qos_para_vport[0x10];
568
569 u8 max_tsar_bw_share[0x20];
570
571 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300572};
573
Saeed Mahameede2816822015-05-28 22:28:40 +0300574struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
575 u8 csum_cap[0x1];
576 u8 vlan_cap[0x1];
577 u8 lro_cap[0x1];
578 u8 lro_psh_flag[0x1];
579 u8 lro_time_stamp[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200580 u8 reserved_at_5[0x3];
Tariq Toukan66189962015-11-12 19:35:26 +0200581 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200582 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300583 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200584 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300585 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300586 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300587 u8 reg_umr_sq[0x1];
588 u8 scatter_fcs[0x1];
589 u8 reserved_at_1a[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300590 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200591 u8 reserved_at_1c[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300592 u8 tunnel_statless_gre[0x1];
593 u8 tunnel_stateless_vxlan[0x1];
594
Matan Barakb4ff3a32016-02-09 14:57:42 +0200595 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300596
Matan Barakb4ff3a32016-02-09 14:57:42 +0200597 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300598 u8 lro_min_mss_size[0x10];
599
Matan Barakb4ff3a32016-02-09 14:57:42 +0200600 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300601
602 u8 lro_timer_supported_periods[4][0x20];
603
Matan Barakb4ff3a32016-02-09 14:57:42 +0200604 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300605};
606
607struct mlx5_ifc_roce_cap_bits {
608 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200609 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300610
Matan Barakb4ff3a32016-02-09 14:57:42 +0200611 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300612
Matan Barakb4ff3a32016-02-09 14:57:42 +0200613 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300614 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200615 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300616 u8 roce_version[0x8];
617
Matan Barakb4ff3a32016-02-09 14:57:42 +0200618 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300619 u8 r_roce_dest_udp_port[0x10];
620
621 u8 r_roce_max_src_udp_port[0x10];
622 u8 r_roce_min_src_udp_port[0x10];
623
Matan Barakb4ff3a32016-02-09 14:57:42 +0200624 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300625 u8 roce_address_table_size[0x10];
626
Matan Barakb4ff3a32016-02-09 14:57:42 +0200627 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300628};
629
630enum {
631 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
632 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
633 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
634 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
635 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
636 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
637 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
638 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
639 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
640};
641
642enum {
643 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
644 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
645 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
646 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
647 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
648 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
649 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
650 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
651 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
652};
653
654struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200655 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300656
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200657 u8 atomic_req_8B_endianess_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200658 u8 reserved_at_42[0x4];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200659 u8 supported_atomic_req_8B_endianess_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300660
Matan Barakb4ff3a32016-02-09 14:57:42 +0200661 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300662
Matan Barakb4ff3a32016-02-09 14:57:42 +0200663 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300664
Matan Barakb4ff3a32016-02-09 14:57:42 +0200665 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200666 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300667
Matan Barakb4ff3a32016-02-09 14:57:42 +0200668 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200669 u8 atomic_size_qp[0x10];
670
Matan Barakb4ff3a32016-02-09 14:57:42 +0200671 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300672 u8 atomic_size_dc[0x10];
673
Matan Barakb4ff3a32016-02-09 14:57:42 +0200674 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300675};
676
677struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200678 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300679
680 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200681 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300682
Matan Barakb4ff3a32016-02-09 14:57:42 +0200683 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300684
685 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
686
687 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
688
689 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
690
Matan Barakb4ff3a32016-02-09 14:57:42 +0200691 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300692};
693
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200694struct mlx5_ifc_calc_op {
695 u8 reserved_at_0[0x10];
696 u8 reserved_at_10[0x9];
697 u8 op_swap_endianness[0x1];
698 u8 op_min[0x1];
699 u8 op_xor[0x1];
700 u8 op_or[0x1];
701 u8 op_and[0x1];
702 u8 op_max[0x1];
703 u8 op_add[0x1];
704};
705
706struct mlx5_ifc_vector_calc_cap_bits {
707 u8 calc_matrix[0x1];
708 u8 reserved_at_1[0x1f];
709 u8 reserved_at_20[0x8];
710 u8 max_vec_count[0x8];
711 u8 reserved_at_30[0xd];
712 u8 max_chunk_size[0x3];
713 struct mlx5_ifc_calc_op calc0;
714 struct mlx5_ifc_calc_op calc1;
715 struct mlx5_ifc_calc_op calc2;
716 struct mlx5_ifc_calc_op calc3;
717
718 u8 reserved_at_e0[0x720];
719};
720
Saeed Mahameede2816822015-05-28 22:28:40 +0300721enum {
722 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
723 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300724 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +0300725};
726
727enum {
728 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
729 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
730};
731
732enum {
733 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
734 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
735 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
736 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
737 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
738};
739
740enum {
741 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
742 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
743 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
744 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
745 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
746 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
747};
748
749enum {
750 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
751 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
752};
753
754enum {
755 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
756 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
757 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
758};
759
760enum {
761 MLX5_CAP_PORT_TYPE_IB = 0x0,
762 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300763};
764
Eli Cohenb7755162014-10-02 12:19:44 +0300765struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200766 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300767
768 u8 log_max_srq_sz[0x8];
769 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200770 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300771 u8 log_max_qp[0x5];
772
Matan Barakb4ff3a32016-02-09 14:57:42 +0200773 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300774 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200775 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300776
Matan Barakb4ff3a32016-02-09 14:57:42 +0200777 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300778 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200779 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300780 u8 log_max_cq[0x5];
781
782 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200783 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300784 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200785 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300786 u8 log_max_eq[0x4];
787
788 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200789 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300790 u8 log_max_mrw_sz[0x7];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200791 u8 reserved_at_110[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300792 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200793 u8 umr_extended_translation_offset[0x1];
794 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300795 u8 log_max_klm_list_size[0x6];
796
Matan Barakb4ff3a32016-02-09 14:57:42 +0200797 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300798 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200799 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300800 u8 log_max_ra_res_dc[0x6];
801
Matan Barakb4ff3a32016-02-09 14:57:42 +0200802 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300803 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200804 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300805 u8 log_max_ra_res_qp[0x6];
806
807 u8 pad_cap[0x1];
808 u8 cc_query_allowed[0x1];
809 u8 cc_modify_allowed[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200810 u8 reserved_at_163[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300811 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300812
Saeed Mahameede2816822015-05-28 22:28:40 +0300813 u8 out_of_seq_cnt[0x1];
814 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300815 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300816 u8 reserved_at_183[0x1];
817 u8 modify_rq_counter_set_id[0x1];
818 u8 reserved_at_185[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300819 u8 max_qp_cnt[0xa];
820 u8 pkey_table_size[0x10];
821
Saeed Mahameede2816822015-05-28 22:28:40 +0300822 u8 vport_group_manager[0x1];
823 u8 vhca_group_manager[0x1];
824 u8 ib_virt[0x1];
825 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200826 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300827 u8 ets[0x1];
828 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200829 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300830 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200831 u8 mcam_reg[0x1];
832 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300833 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200834 u8 port_module_event[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200835 u8 reserved_at_1b1[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300836 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200837 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300838 u8 disable_link_up[0x1];
839 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300840 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300841 u8 num_ports[0x8];
842
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300843 u8 reserved_at_1c0[0x1];
844 u8 pps[0x1];
845 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300846 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300847 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200848 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300849 u8 reserved_at_1d0[0x1];
850 u8 dcbx[0x1];
851 u8 reserved_at_1d2[0x4];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200852 u8 rol_s[0x1];
853 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300854 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200855 u8 wol_s[0x1];
856 u8 wol_g[0x1];
857 u8 wol_a[0x1];
858 u8 wol_b[0x1];
859 u8 wol_m[0x1];
860 u8 wol_u[0x1];
861 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300862
863 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300864 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300865 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300866
Saeed Mahameede2816822015-05-28 22:28:40 +0300867 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300868 u8 striding_rq[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200869 u8 reserved_at_202[0x2];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200870 u8 ipoib_basic_offloads[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300871 u8 reserved_at_205[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +0300872 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300873 u8 cmdif_checksum[0x2];
874 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300875 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300876 u8 wq_signature[0x1];
877 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300878 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300879 u8 sho[0x1];
880 u8 tph[0x1];
881 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300882 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300883 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300884 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300885 u8 roce[0x1];
886 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300887 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300888
889 u8 cq_oi[0x1];
890 u8 cq_resize[0x1];
891 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300892 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300893 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300894 u8 pg[0x1];
895 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300896 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300897 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300898 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300899 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300900 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300901 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200902 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300903 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200904 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300905 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300906 u8 qkv[0x1];
907 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200908 u8 set_deth_sqpn[0x1];
909 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300910 u8 xrc[0x1];
911 u8 ud[0x1];
912 u8 uc[0x1];
913 u8 rc[0x1];
914
Eli Cohena6d51b62017-01-03 23:55:23 +0200915 u8 uar_4k[0x1];
916 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300917 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300918 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300919 u8 log_pg_sz[0x8];
920
921 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200922 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300923 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300924 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300925 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300926
927 u8 reserved_at_270[0xb];
928 u8 lag_master[0x1];
929 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300930
Tariq Toukane1c9c622016-04-11 23:10:21 +0300931 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300932 u8 max_wqe_sz_sq[0x10];
933
Tariq Toukane1c9c622016-04-11 23:10:21 +0300934 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300935 u8 max_wqe_sz_rq[0x10];
936
Tariq Toukane1c9c622016-04-11 23:10:21 +0300937 u8 reserved_at_2c0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300938 u8 max_wqe_sz_sq_dc[0x10];
939
Tariq Toukane1c9c622016-04-11 23:10:21 +0300940 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300941 u8 max_qp_mcg[0x19];
942
Tariq Toukane1c9c622016-04-11 23:10:21 +0300943 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300944 u8 log_max_mcg[0x8];
945
Tariq Toukane1c9c622016-04-11 23:10:21 +0300946 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300947 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300948 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300949 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300950 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300951 u8 log_max_xrcd[0x5];
952
Amir Vadaia351a1b02016-07-14 10:32:38 +0300953 u8 reserved_at_340[0x8];
954 u8 log_max_flow_counter_bulk[0x8];
955 u8 max_flow_counter[0x10];
956
Eli Cohenb7755162014-10-02 12:19:44 +0300957
Tariq Toukane1c9c622016-04-11 23:10:21 +0300958 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300959 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300960 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300961 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300962 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300963 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300964 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300965 u8 log_max_tis[0x5];
966
Saeed Mahameede2816822015-05-28 22:28:40 +0300967 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300968 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300969 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300970 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300971 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300972 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300973 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300974 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300975 u8 log_max_tis_per_sq[0x5];
976
Tariq Toukane1c9c622016-04-11 23:10:21 +0300977 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300978 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300979 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300980 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300981 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300982 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300983 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300984 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +0300985
Tariq Toukane1c9c622016-04-11 23:10:21 +0300986 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +0300987 u8 log_max_wq_sz[0x5];
988
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200989 u8 nic_vport_change_event[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300990 u8 reserved_at_3e1[0xa];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200991 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300992 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200993 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300994 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200995 u8 log_max_current_uc_list[0x5];
996
Tariq Toukane1c9c622016-04-11 23:10:21 +0300997 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200998
Tariq Toukane1c9c622016-04-11 23:10:21 +0300999 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001000 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001001 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001002 u8 log_uar_page_sz[0x10];
1003
Tariq Toukane1c9c622016-04-11 23:10:21 +03001004 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001005 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001006 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001007
Eli Cohena6d51b62017-01-03 23:55:23 +02001008 u8 reserved_at_500[0x20];
1009 u8 num_of_uars_per_page[0x20];
1010 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001011
1012 u8 reserved_at_580[0x3f];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001013 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001014
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001015 u8 cqe_compression_timeout[0x10];
1016 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001017
Saeed Mahameed74862162016-06-09 15:11:34 +03001018 u8 reserved_at_5e0[0x10];
1019 u8 tag_matching[0x1];
1020 u8 rndv_offload_rc[0x1];
1021 u8 rndv_offload_dc[0x1];
1022 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001023 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001024 u8 log_max_xrq[0x5];
1025
Max Gurtovoy7b135582017-01-02 11:37:38 +02001026 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001027};
1028
Saeed Mahameed81848732015-12-01 18:03:20 +02001029enum mlx5_flow_destination_type {
1030 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1031 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1032 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001033
1034 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001035};
1036
1037struct mlx5_ifc_dest_format_struct_bits {
1038 u8 destination_type[0x8];
1039 u8 destination_id[0x18];
1040
Matan Barakb4ff3a32016-02-09 14:57:42 +02001041 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001042};
1043
Amir Vadai9dc0b282016-05-13 12:55:39 +00001044struct mlx5_ifc_flow_counter_list_bits {
Amir Vadaia351a1b02016-07-14 10:32:38 +03001045 u8 clear[0x1];
1046 u8 num_of_counters[0xf];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001047 u8 flow_counter_id[0x10];
1048
1049 u8 reserved_at_20[0x20];
1050};
1051
1052union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1053 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1054 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1055 u8 reserved_at_0[0x40];
1056};
1057
Saeed Mahameede2816822015-05-28 22:28:40 +03001058struct mlx5_ifc_fte_match_param_bits {
1059 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1060
1061 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1062
1063 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1064
Matan Barakb4ff3a32016-02-09 14:57:42 +02001065 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001066};
1067
1068enum {
1069 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1070 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1071 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1072 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1073 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1074};
1075
1076struct mlx5_ifc_rx_hash_field_select_bits {
1077 u8 l3_prot_type[0x1];
1078 u8 l4_prot_type[0x1];
1079 u8 selected_fields[0x1e];
1080};
1081
1082enum {
1083 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1084 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1085};
1086
1087enum {
1088 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1089 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1090};
1091
1092struct mlx5_ifc_wq_bits {
1093 u8 wq_type[0x4];
1094 u8 wq_signature[0x1];
1095 u8 end_padding_mode[0x2];
1096 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001097 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001098
1099 u8 hds_skip_first_sge[0x1];
1100 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001101 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001102 u8 page_offset[0x5];
1103 u8 lwm[0x10];
1104
Matan Barakb4ff3a32016-02-09 14:57:42 +02001105 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001106 u8 pd[0x18];
1107
Matan Barakb4ff3a32016-02-09 14:57:42 +02001108 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001109 u8 uar_page[0x18];
1110
1111 u8 dbr_addr[0x40];
1112
1113 u8 hw_counter[0x20];
1114
1115 u8 sw_counter[0x20];
1116
Matan Barakb4ff3a32016-02-09 14:57:42 +02001117 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001118 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001119 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001120 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001121 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001122 u8 log_wq_sz[0x5];
1123
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001124 u8 reserved_at_120[0x15];
1125 u8 log_wqe_num_of_strides[0x3];
1126 u8 two_byte_shift_en[0x1];
1127 u8 reserved_at_139[0x4];
1128 u8 log_wqe_stride_size[0x3];
1129
1130 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001131
1132 struct mlx5_ifc_cmd_pas_bits pas[0];
1133};
1134
1135struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001136 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001137 u8 rq_num[0x18];
1138};
1139
1140struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001141 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001142 u8 mac_addr_47_32[0x10];
1143
1144 u8 mac_addr_31_0[0x20];
1145};
1146
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001147struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001148 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001149 u8 vlan[0x0c];
1150
Matan Barakb4ff3a32016-02-09 14:57:42 +02001151 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001152};
1153
Saeed Mahameede2816822015-05-28 22:28:40 +03001154struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001155 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001156
1157 u8 min_time_between_cnps[0x20];
1158
Matan Barakb4ff3a32016-02-09 14:57:42 +02001159 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001160 u8 cnp_dscp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001161 u8 reserved_at_d8[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001162 u8 cnp_802p_prio[0x3];
1163
Matan Barakb4ff3a32016-02-09 14:57:42 +02001164 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001165};
1166
1167struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001168 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001169
Matan Barakb4ff3a32016-02-09 14:57:42 +02001170 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001171 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001172 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001173 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001174 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001175
Matan Barakb4ff3a32016-02-09 14:57:42 +02001176 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001177
1178 u8 rpg_time_reset[0x20];
1179
1180 u8 rpg_byte_reset[0x20];
1181
1182 u8 rpg_threshold[0x20];
1183
1184 u8 rpg_max_rate[0x20];
1185
1186 u8 rpg_ai_rate[0x20];
1187
1188 u8 rpg_hai_rate[0x20];
1189
1190 u8 rpg_gd[0x20];
1191
1192 u8 rpg_min_dec_fac[0x20];
1193
1194 u8 rpg_min_rate[0x20];
1195
Matan Barakb4ff3a32016-02-09 14:57:42 +02001196 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001197
1198 u8 rate_to_set_on_first_cnp[0x20];
1199
1200 u8 dce_tcp_g[0x20];
1201
1202 u8 dce_tcp_rtt[0x20];
1203
1204 u8 rate_reduce_monitor_period[0x20];
1205
Matan Barakb4ff3a32016-02-09 14:57:42 +02001206 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001207
1208 u8 initial_alpha_value[0x20];
1209
Matan Barakb4ff3a32016-02-09 14:57:42 +02001210 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001211};
1212
1213struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001214 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001215
1216 u8 rppp_max_rps[0x20];
1217
1218 u8 rpg_time_reset[0x20];
1219
1220 u8 rpg_byte_reset[0x20];
1221
1222 u8 rpg_threshold[0x20];
1223
1224 u8 rpg_max_rate[0x20];
1225
1226 u8 rpg_ai_rate[0x20];
1227
1228 u8 rpg_hai_rate[0x20];
1229
1230 u8 rpg_gd[0x20];
1231
1232 u8 rpg_min_dec_fac[0x20];
1233
1234 u8 rpg_min_rate[0x20];
1235
Matan Barakb4ff3a32016-02-09 14:57:42 +02001236 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001237};
1238
1239enum {
1240 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1241 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1242 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1243};
1244
1245struct mlx5_ifc_resize_field_select_bits {
1246 u8 resize_field_select[0x20];
1247};
1248
1249enum {
1250 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1251 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1252 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1253 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1254};
1255
1256struct mlx5_ifc_modify_field_select_bits {
1257 u8 modify_field_select[0x20];
1258};
1259
1260struct mlx5_ifc_field_select_r_roce_np_bits {
1261 u8 field_select_r_roce_np[0x20];
1262};
1263
1264struct mlx5_ifc_field_select_r_roce_rp_bits {
1265 u8 field_select_r_roce_rp[0x20];
1266};
1267
1268enum {
1269 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1270 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1271 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1272 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1273 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1274 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1275 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1276 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1277 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1278 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1279};
1280
1281struct mlx5_ifc_field_select_802_1qau_rp_bits {
1282 u8 field_select_8021qaurp[0x20];
1283};
1284
1285struct mlx5_ifc_phys_layer_cntrs_bits {
1286 u8 time_since_last_clear_high[0x20];
1287
1288 u8 time_since_last_clear_low[0x20];
1289
1290 u8 symbol_errors_high[0x20];
1291
1292 u8 symbol_errors_low[0x20];
1293
1294 u8 sync_headers_errors_high[0x20];
1295
1296 u8 sync_headers_errors_low[0x20];
1297
1298 u8 edpl_bip_errors_lane0_high[0x20];
1299
1300 u8 edpl_bip_errors_lane0_low[0x20];
1301
1302 u8 edpl_bip_errors_lane1_high[0x20];
1303
1304 u8 edpl_bip_errors_lane1_low[0x20];
1305
1306 u8 edpl_bip_errors_lane2_high[0x20];
1307
1308 u8 edpl_bip_errors_lane2_low[0x20];
1309
1310 u8 edpl_bip_errors_lane3_high[0x20];
1311
1312 u8 edpl_bip_errors_lane3_low[0x20];
1313
1314 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1315
1316 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1317
1318 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1319
1320 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1321
1322 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1323
1324 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1325
1326 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1327
1328 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1329
1330 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1331
1332 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1333
1334 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1335
1336 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1337
1338 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1339
1340 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1341
1342 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1343
1344 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1345
1346 u8 rs_fec_corrected_blocks_high[0x20];
1347
1348 u8 rs_fec_corrected_blocks_low[0x20];
1349
1350 u8 rs_fec_uncorrectable_blocks_high[0x20];
1351
1352 u8 rs_fec_uncorrectable_blocks_low[0x20];
1353
1354 u8 rs_fec_no_errors_blocks_high[0x20];
1355
1356 u8 rs_fec_no_errors_blocks_low[0x20];
1357
1358 u8 rs_fec_single_error_blocks_high[0x20];
1359
1360 u8 rs_fec_single_error_blocks_low[0x20];
1361
1362 u8 rs_fec_corrected_symbols_total_high[0x20];
1363
1364 u8 rs_fec_corrected_symbols_total_low[0x20];
1365
1366 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1367
1368 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1369
1370 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1371
1372 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1373
1374 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1375
1376 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1377
1378 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1379
1380 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1381
1382 u8 link_down_events[0x20];
1383
1384 u8 successful_recovery_events[0x20];
1385
Matan Barakb4ff3a32016-02-09 14:57:42 +02001386 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001387};
1388
Gal Pressmand8dc0502016-09-27 17:04:51 +03001389struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1390 u8 time_since_last_clear_high[0x20];
1391
1392 u8 time_since_last_clear_low[0x20];
1393
1394 u8 phy_received_bits_high[0x20];
1395
1396 u8 phy_received_bits_low[0x20];
1397
1398 u8 phy_symbol_errors_high[0x20];
1399
1400 u8 phy_symbol_errors_low[0x20];
1401
1402 u8 phy_corrected_bits_high[0x20];
1403
1404 u8 phy_corrected_bits_low[0x20];
1405
1406 u8 phy_corrected_bits_lane0_high[0x20];
1407
1408 u8 phy_corrected_bits_lane0_low[0x20];
1409
1410 u8 phy_corrected_bits_lane1_high[0x20];
1411
1412 u8 phy_corrected_bits_lane1_low[0x20];
1413
1414 u8 phy_corrected_bits_lane2_high[0x20];
1415
1416 u8 phy_corrected_bits_lane2_low[0x20];
1417
1418 u8 phy_corrected_bits_lane3_high[0x20];
1419
1420 u8 phy_corrected_bits_lane3_low[0x20];
1421
1422 u8 reserved_at_200[0x5c0];
1423};
1424
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001425struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1426 u8 symbol_error_counter[0x10];
1427
1428 u8 link_error_recovery_counter[0x8];
1429
1430 u8 link_downed_counter[0x8];
1431
1432 u8 port_rcv_errors[0x10];
1433
1434 u8 port_rcv_remote_physical_errors[0x10];
1435
1436 u8 port_rcv_switch_relay_errors[0x10];
1437
1438 u8 port_xmit_discards[0x10];
1439
1440 u8 port_xmit_constraint_errors[0x8];
1441
1442 u8 port_rcv_constraint_errors[0x8];
1443
1444 u8 reserved_at_70[0x8];
1445
1446 u8 link_overrun_errors[0x8];
1447
1448 u8 reserved_at_80[0x10];
1449
1450 u8 vl_15_dropped[0x10];
1451
1452 u8 reserved_at_a0[0xa0];
1453};
1454
Saeed Mahameede2816822015-05-28 22:28:40 +03001455struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1456 u8 transmit_queue_high[0x20];
1457
1458 u8 transmit_queue_low[0x20];
1459
Matan Barakb4ff3a32016-02-09 14:57:42 +02001460 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001461};
1462
1463struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1464 u8 rx_octets_high[0x20];
1465
1466 u8 rx_octets_low[0x20];
1467
Matan Barakb4ff3a32016-02-09 14:57:42 +02001468 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001469
1470 u8 rx_frames_high[0x20];
1471
1472 u8 rx_frames_low[0x20];
1473
1474 u8 tx_octets_high[0x20];
1475
1476 u8 tx_octets_low[0x20];
1477
Matan Barakb4ff3a32016-02-09 14:57:42 +02001478 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001479
1480 u8 tx_frames_high[0x20];
1481
1482 u8 tx_frames_low[0x20];
1483
1484 u8 rx_pause_high[0x20];
1485
1486 u8 rx_pause_low[0x20];
1487
1488 u8 rx_pause_duration_high[0x20];
1489
1490 u8 rx_pause_duration_low[0x20];
1491
1492 u8 tx_pause_high[0x20];
1493
1494 u8 tx_pause_low[0x20];
1495
1496 u8 tx_pause_duration_high[0x20];
1497
1498 u8 tx_pause_duration_low[0x20];
1499
1500 u8 rx_pause_transition_high[0x20];
1501
1502 u8 rx_pause_transition_low[0x20];
1503
Matan Barakb4ff3a32016-02-09 14:57:42 +02001504 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001505};
1506
1507struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1508 u8 port_transmit_wait_high[0x20];
1509
1510 u8 port_transmit_wait_low[0x20];
1511
Matan Barakb4ff3a32016-02-09 14:57:42 +02001512 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001513};
1514
1515struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1516 u8 dot3stats_alignment_errors_high[0x20];
1517
1518 u8 dot3stats_alignment_errors_low[0x20];
1519
1520 u8 dot3stats_fcs_errors_high[0x20];
1521
1522 u8 dot3stats_fcs_errors_low[0x20];
1523
1524 u8 dot3stats_single_collision_frames_high[0x20];
1525
1526 u8 dot3stats_single_collision_frames_low[0x20];
1527
1528 u8 dot3stats_multiple_collision_frames_high[0x20];
1529
1530 u8 dot3stats_multiple_collision_frames_low[0x20];
1531
1532 u8 dot3stats_sqe_test_errors_high[0x20];
1533
1534 u8 dot3stats_sqe_test_errors_low[0x20];
1535
1536 u8 dot3stats_deferred_transmissions_high[0x20];
1537
1538 u8 dot3stats_deferred_transmissions_low[0x20];
1539
1540 u8 dot3stats_late_collisions_high[0x20];
1541
1542 u8 dot3stats_late_collisions_low[0x20];
1543
1544 u8 dot3stats_excessive_collisions_high[0x20];
1545
1546 u8 dot3stats_excessive_collisions_low[0x20];
1547
1548 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1549
1550 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1551
1552 u8 dot3stats_carrier_sense_errors_high[0x20];
1553
1554 u8 dot3stats_carrier_sense_errors_low[0x20];
1555
1556 u8 dot3stats_frame_too_longs_high[0x20];
1557
1558 u8 dot3stats_frame_too_longs_low[0x20];
1559
1560 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1561
1562 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1563
1564 u8 dot3stats_symbol_errors_high[0x20];
1565
1566 u8 dot3stats_symbol_errors_low[0x20];
1567
1568 u8 dot3control_in_unknown_opcodes_high[0x20];
1569
1570 u8 dot3control_in_unknown_opcodes_low[0x20];
1571
1572 u8 dot3in_pause_frames_high[0x20];
1573
1574 u8 dot3in_pause_frames_low[0x20];
1575
1576 u8 dot3out_pause_frames_high[0x20];
1577
1578 u8 dot3out_pause_frames_low[0x20];
1579
Matan Barakb4ff3a32016-02-09 14:57:42 +02001580 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001581};
1582
1583struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1584 u8 ether_stats_drop_events_high[0x20];
1585
1586 u8 ether_stats_drop_events_low[0x20];
1587
1588 u8 ether_stats_octets_high[0x20];
1589
1590 u8 ether_stats_octets_low[0x20];
1591
1592 u8 ether_stats_pkts_high[0x20];
1593
1594 u8 ether_stats_pkts_low[0x20];
1595
1596 u8 ether_stats_broadcast_pkts_high[0x20];
1597
1598 u8 ether_stats_broadcast_pkts_low[0x20];
1599
1600 u8 ether_stats_multicast_pkts_high[0x20];
1601
1602 u8 ether_stats_multicast_pkts_low[0x20];
1603
1604 u8 ether_stats_crc_align_errors_high[0x20];
1605
1606 u8 ether_stats_crc_align_errors_low[0x20];
1607
1608 u8 ether_stats_undersize_pkts_high[0x20];
1609
1610 u8 ether_stats_undersize_pkts_low[0x20];
1611
1612 u8 ether_stats_oversize_pkts_high[0x20];
1613
1614 u8 ether_stats_oversize_pkts_low[0x20];
1615
1616 u8 ether_stats_fragments_high[0x20];
1617
1618 u8 ether_stats_fragments_low[0x20];
1619
1620 u8 ether_stats_jabbers_high[0x20];
1621
1622 u8 ether_stats_jabbers_low[0x20];
1623
1624 u8 ether_stats_collisions_high[0x20];
1625
1626 u8 ether_stats_collisions_low[0x20];
1627
1628 u8 ether_stats_pkts64octets_high[0x20];
1629
1630 u8 ether_stats_pkts64octets_low[0x20];
1631
1632 u8 ether_stats_pkts65to127octets_high[0x20];
1633
1634 u8 ether_stats_pkts65to127octets_low[0x20];
1635
1636 u8 ether_stats_pkts128to255octets_high[0x20];
1637
1638 u8 ether_stats_pkts128to255octets_low[0x20];
1639
1640 u8 ether_stats_pkts256to511octets_high[0x20];
1641
1642 u8 ether_stats_pkts256to511octets_low[0x20];
1643
1644 u8 ether_stats_pkts512to1023octets_high[0x20];
1645
1646 u8 ether_stats_pkts512to1023octets_low[0x20];
1647
1648 u8 ether_stats_pkts1024to1518octets_high[0x20];
1649
1650 u8 ether_stats_pkts1024to1518octets_low[0x20];
1651
1652 u8 ether_stats_pkts1519to2047octets_high[0x20];
1653
1654 u8 ether_stats_pkts1519to2047octets_low[0x20];
1655
1656 u8 ether_stats_pkts2048to4095octets_high[0x20];
1657
1658 u8 ether_stats_pkts2048to4095octets_low[0x20];
1659
1660 u8 ether_stats_pkts4096to8191octets_high[0x20];
1661
1662 u8 ether_stats_pkts4096to8191octets_low[0x20];
1663
1664 u8 ether_stats_pkts8192to10239octets_high[0x20];
1665
1666 u8 ether_stats_pkts8192to10239octets_low[0x20];
1667
Matan Barakb4ff3a32016-02-09 14:57:42 +02001668 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001669};
1670
1671struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1672 u8 if_in_octets_high[0x20];
1673
1674 u8 if_in_octets_low[0x20];
1675
1676 u8 if_in_ucast_pkts_high[0x20];
1677
1678 u8 if_in_ucast_pkts_low[0x20];
1679
1680 u8 if_in_discards_high[0x20];
1681
1682 u8 if_in_discards_low[0x20];
1683
1684 u8 if_in_errors_high[0x20];
1685
1686 u8 if_in_errors_low[0x20];
1687
1688 u8 if_in_unknown_protos_high[0x20];
1689
1690 u8 if_in_unknown_protos_low[0x20];
1691
1692 u8 if_out_octets_high[0x20];
1693
1694 u8 if_out_octets_low[0x20];
1695
1696 u8 if_out_ucast_pkts_high[0x20];
1697
1698 u8 if_out_ucast_pkts_low[0x20];
1699
1700 u8 if_out_discards_high[0x20];
1701
1702 u8 if_out_discards_low[0x20];
1703
1704 u8 if_out_errors_high[0x20];
1705
1706 u8 if_out_errors_low[0x20];
1707
1708 u8 if_in_multicast_pkts_high[0x20];
1709
1710 u8 if_in_multicast_pkts_low[0x20];
1711
1712 u8 if_in_broadcast_pkts_high[0x20];
1713
1714 u8 if_in_broadcast_pkts_low[0x20];
1715
1716 u8 if_out_multicast_pkts_high[0x20];
1717
1718 u8 if_out_multicast_pkts_low[0x20];
1719
1720 u8 if_out_broadcast_pkts_high[0x20];
1721
1722 u8 if_out_broadcast_pkts_low[0x20];
1723
Matan Barakb4ff3a32016-02-09 14:57:42 +02001724 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001725};
1726
1727struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1728 u8 a_frames_transmitted_ok_high[0x20];
1729
1730 u8 a_frames_transmitted_ok_low[0x20];
1731
1732 u8 a_frames_received_ok_high[0x20];
1733
1734 u8 a_frames_received_ok_low[0x20];
1735
1736 u8 a_frame_check_sequence_errors_high[0x20];
1737
1738 u8 a_frame_check_sequence_errors_low[0x20];
1739
1740 u8 a_alignment_errors_high[0x20];
1741
1742 u8 a_alignment_errors_low[0x20];
1743
1744 u8 a_octets_transmitted_ok_high[0x20];
1745
1746 u8 a_octets_transmitted_ok_low[0x20];
1747
1748 u8 a_octets_received_ok_high[0x20];
1749
1750 u8 a_octets_received_ok_low[0x20];
1751
1752 u8 a_multicast_frames_xmitted_ok_high[0x20];
1753
1754 u8 a_multicast_frames_xmitted_ok_low[0x20];
1755
1756 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1757
1758 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1759
1760 u8 a_multicast_frames_received_ok_high[0x20];
1761
1762 u8 a_multicast_frames_received_ok_low[0x20];
1763
1764 u8 a_broadcast_frames_received_ok_high[0x20];
1765
1766 u8 a_broadcast_frames_received_ok_low[0x20];
1767
1768 u8 a_in_range_length_errors_high[0x20];
1769
1770 u8 a_in_range_length_errors_low[0x20];
1771
1772 u8 a_out_of_range_length_field_high[0x20];
1773
1774 u8 a_out_of_range_length_field_low[0x20];
1775
1776 u8 a_frame_too_long_errors_high[0x20];
1777
1778 u8 a_frame_too_long_errors_low[0x20];
1779
1780 u8 a_symbol_error_during_carrier_high[0x20];
1781
1782 u8 a_symbol_error_during_carrier_low[0x20];
1783
1784 u8 a_mac_control_frames_transmitted_high[0x20];
1785
1786 u8 a_mac_control_frames_transmitted_low[0x20];
1787
1788 u8 a_mac_control_frames_received_high[0x20];
1789
1790 u8 a_mac_control_frames_received_low[0x20];
1791
1792 u8 a_unsupported_opcodes_received_high[0x20];
1793
1794 u8 a_unsupported_opcodes_received_low[0x20];
1795
1796 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1797
1798 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1799
1800 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1801
1802 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1803
Matan Barakb4ff3a32016-02-09 14:57:42 +02001804 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001805};
1806
Gal Pressman8ed1a632016-11-17 13:46:01 +02001807struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1808 u8 life_time_counter_high[0x20];
1809
1810 u8 life_time_counter_low[0x20];
1811
1812 u8 rx_errors[0x20];
1813
1814 u8 tx_errors[0x20];
1815
1816 u8 l0_to_recovery_eieos[0x20];
1817
1818 u8 l0_to_recovery_ts[0x20];
1819
1820 u8 l0_to_recovery_framing[0x20];
1821
1822 u8 l0_to_recovery_retrain[0x20];
1823
1824 u8 crc_error_dllp[0x20];
1825
1826 u8 crc_error_tlp[0x20];
1827
1828 u8 reserved_at_140[0x680];
1829};
1830
Saeed Mahameede2816822015-05-28 22:28:40 +03001831struct mlx5_ifc_cmd_inter_comp_event_bits {
1832 u8 command_completion_vector[0x20];
1833
Matan Barakb4ff3a32016-02-09 14:57:42 +02001834 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001835};
1836
1837struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001838 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001839 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001840 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001841 u8 vl[0x4];
1842
Matan Barakb4ff3a32016-02-09 14:57:42 +02001843 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001844};
1845
1846struct mlx5_ifc_db_bf_congestion_event_bits {
1847 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001848 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001849 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001850 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001851
Matan Barakb4ff3a32016-02-09 14:57:42 +02001852 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001853};
1854
1855struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001856 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001857
1858 u8 gpio_event_hi[0x20];
1859
1860 u8 gpio_event_lo[0x20];
1861
Matan Barakb4ff3a32016-02-09 14:57:42 +02001862 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001863};
1864
1865struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001866 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001867
1868 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001869 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001870
Matan Barakb4ff3a32016-02-09 14:57:42 +02001871 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001872};
1873
1874struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001875 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001876};
1877
1878enum {
1879 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1880 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1881};
1882
1883struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001884 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001885 u8 cqn[0x18];
1886
Matan Barakb4ff3a32016-02-09 14:57:42 +02001887 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001888
Matan Barakb4ff3a32016-02-09 14:57:42 +02001889 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001890 u8 syndrome[0x8];
1891
Matan Barakb4ff3a32016-02-09 14:57:42 +02001892 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001893};
1894
1895struct mlx5_ifc_rdma_page_fault_event_bits {
1896 u8 bytes_committed[0x20];
1897
1898 u8 r_key[0x20];
1899
Matan Barakb4ff3a32016-02-09 14:57:42 +02001900 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001901 u8 packet_len[0x10];
1902
1903 u8 rdma_op_len[0x20];
1904
1905 u8 rdma_va[0x40];
1906
Matan Barakb4ff3a32016-02-09 14:57:42 +02001907 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001908 u8 rdma[0x1];
1909 u8 write[0x1];
1910 u8 requestor[0x1];
1911 u8 qp_number[0x18];
1912};
1913
1914struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1915 u8 bytes_committed[0x20];
1916
Matan Barakb4ff3a32016-02-09 14:57:42 +02001917 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001918 u8 wqe_index[0x10];
1919
Matan Barakb4ff3a32016-02-09 14:57:42 +02001920 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001921 u8 len[0x10];
1922
Matan Barakb4ff3a32016-02-09 14:57:42 +02001923 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001924
Matan Barakb4ff3a32016-02-09 14:57:42 +02001925 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001926 u8 rdma[0x1];
1927 u8 write_read[0x1];
1928 u8 requestor[0x1];
1929 u8 qpn[0x18];
1930};
1931
1932struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001933 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001934
1935 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001936 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001937
Matan Barakb4ff3a32016-02-09 14:57:42 +02001938 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001939 u8 qpn_rqn_sqn[0x18];
1940};
1941
1942struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001943 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001944
Matan Barakb4ff3a32016-02-09 14:57:42 +02001945 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001946 u8 dct_number[0x18];
1947};
1948
1949struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001950 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001951
Matan Barakb4ff3a32016-02-09 14:57:42 +02001952 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001953 u8 cq_number[0x18];
1954};
1955
1956enum {
1957 MLX5_QPC_STATE_RST = 0x0,
1958 MLX5_QPC_STATE_INIT = 0x1,
1959 MLX5_QPC_STATE_RTR = 0x2,
1960 MLX5_QPC_STATE_RTS = 0x3,
1961 MLX5_QPC_STATE_SQER = 0x4,
1962 MLX5_QPC_STATE_ERR = 0x6,
1963 MLX5_QPC_STATE_SQD = 0x7,
1964 MLX5_QPC_STATE_SUSPENDED = 0x9,
1965};
1966
1967enum {
1968 MLX5_QPC_ST_RC = 0x0,
1969 MLX5_QPC_ST_UC = 0x1,
1970 MLX5_QPC_ST_UD = 0x2,
1971 MLX5_QPC_ST_XRC = 0x3,
1972 MLX5_QPC_ST_DCI = 0x5,
1973 MLX5_QPC_ST_QP0 = 0x7,
1974 MLX5_QPC_ST_QP1 = 0x8,
1975 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
1976 MLX5_QPC_ST_REG_UMR = 0xc,
1977};
1978
1979enum {
1980 MLX5_QPC_PM_STATE_ARMED = 0x0,
1981 MLX5_QPC_PM_STATE_REARM = 0x1,
1982 MLX5_QPC_PM_STATE_RESERVED = 0x2,
1983 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
1984};
1985
1986enum {
1987 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
1988 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
1989};
1990
1991enum {
1992 MLX5_QPC_MTU_256_BYTES = 0x1,
1993 MLX5_QPC_MTU_512_BYTES = 0x2,
1994 MLX5_QPC_MTU_1K_BYTES = 0x3,
1995 MLX5_QPC_MTU_2K_BYTES = 0x4,
1996 MLX5_QPC_MTU_4K_BYTES = 0x5,
1997 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
1998};
1999
2000enum {
2001 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2002 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2003 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2004 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2005 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2006 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2007 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2008 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2009};
2010
2011enum {
2012 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2013 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2014 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2015};
2016
2017enum {
2018 MLX5_QPC_CS_RES_DISABLE = 0x0,
2019 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2020 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2021};
2022
2023struct mlx5_ifc_qpc_bits {
2024 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002025 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002026 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002027 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002028 u8 pm_state[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002029 u8 reserved_at_15[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03002030 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002031 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002032
2033 u8 wq_signature[0x1];
2034 u8 block_lb_mc[0x1];
2035 u8 atomic_like_write_en[0x1];
2036 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002037 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002038 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002039 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002040 u8 pd[0x18];
2041
2042 u8 mtu[0x3];
2043 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002044 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002045 u8 log_rq_size[0x4];
2046 u8 log_rq_stride[0x3];
2047 u8 no_sq[0x1];
2048 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002049 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002050 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002051 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002052
2053 u8 counter_set_id[0x8];
2054 u8 uar_page[0x18];
2055
Matan Barakb4ff3a32016-02-09 14:57:42 +02002056 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002057 u8 user_index[0x18];
2058
Matan Barakb4ff3a32016-02-09 14:57:42 +02002059 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002060 u8 log_page_size[0x5];
2061 u8 remote_qpn[0x18];
2062
2063 struct mlx5_ifc_ads_bits primary_address_path;
2064
2065 struct mlx5_ifc_ads_bits secondary_address_path;
2066
2067 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002068 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002069 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002070 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002071 u8 retry_count[0x3];
2072 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002073 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002074 u8 fre[0x1];
2075 u8 cur_rnr_retry[0x3];
2076 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002077 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002078
Matan Barakb4ff3a32016-02-09 14:57:42 +02002079 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002080
Matan Barakb4ff3a32016-02-09 14:57:42 +02002081 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002082 u8 next_send_psn[0x18];
2083
Matan Barakb4ff3a32016-02-09 14:57:42 +02002084 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002085 u8 cqn_snd[0x18];
2086
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002087 u8 reserved_at_400[0x8];
2088 u8 deth_sqpn[0x18];
2089
2090 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002091
Matan Barakb4ff3a32016-02-09 14:57:42 +02002092 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002093 u8 last_acked_psn[0x18];
2094
Matan Barakb4ff3a32016-02-09 14:57:42 +02002095 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002096 u8 ssn[0x18];
2097
Matan Barakb4ff3a32016-02-09 14:57:42 +02002098 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002099 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002100 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002101 u8 atomic_mode[0x4];
2102 u8 rre[0x1];
2103 u8 rwe[0x1];
2104 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002105 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002106 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002107 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002108 u8 cd_slave_receive[0x1];
2109 u8 cd_slave_send[0x1];
2110 u8 cd_master[0x1];
2111
Matan Barakb4ff3a32016-02-09 14:57:42 +02002112 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002113 u8 min_rnr_nak[0x5];
2114 u8 next_rcv_psn[0x18];
2115
Matan Barakb4ff3a32016-02-09 14:57:42 +02002116 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002117 u8 xrcd[0x18];
2118
Matan Barakb4ff3a32016-02-09 14:57:42 +02002119 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002120 u8 cqn_rcv[0x18];
2121
2122 u8 dbr_addr[0x40];
2123
2124 u8 q_key[0x20];
2125
Matan Barakb4ff3a32016-02-09 14:57:42 +02002126 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002127 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002128 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002129
Matan Barakb4ff3a32016-02-09 14:57:42 +02002130 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002131 u8 rmsn[0x18];
2132
2133 u8 hw_sq_wqebb_counter[0x10];
2134 u8 sw_sq_wqebb_counter[0x10];
2135
2136 u8 hw_rq_counter[0x20];
2137
2138 u8 sw_rq_counter[0x20];
2139
Matan Barakb4ff3a32016-02-09 14:57:42 +02002140 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002141
Matan Barakb4ff3a32016-02-09 14:57:42 +02002142 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002143 u8 cgs[0x1];
2144 u8 cs_req[0x8];
2145 u8 cs_res[0x8];
2146
2147 u8 dc_access_key[0x40];
2148
Matan Barakb4ff3a32016-02-09 14:57:42 +02002149 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002150};
2151
2152struct mlx5_ifc_roce_addr_layout_bits {
2153 u8 source_l3_address[16][0x8];
2154
Matan Barakb4ff3a32016-02-09 14:57:42 +02002155 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002156 u8 vlan_valid[0x1];
2157 u8 vlan_id[0xc];
2158 u8 source_mac_47_32[0x10];
2159
2160 u8 source_mac_31_0[0x20];
2161
Matan Barakb4ff3a32016-02-09 14:57:42 +02002162 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002163 u8 roce_l3_type[0x4];
2164 u8 roce_version[0x8];
2165
Matan Barakb4ff3a32016-02-09 14:57:42 +02002166 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002167};
2168
2169union mlx5_ifc_hca_cap_union_bits {
2170 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2171 struct mlx5_ifc_odp_cap_bits odp_cap;
2172 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2173 struct mlx5_ifc_roce_cap_bits roce_cap;
2174 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2175 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002176 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002177 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002178 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002179 struct mlx5_ifc_qos_cap_bits qos_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002180 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002181};
2182
2183enum {
2184 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2185 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2186 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002187 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002188 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2189 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +03002190};
2191
2192struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002193 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002194
2195 u8 group_id[0x20];
2196
Matan Barakb4ff3a32016-02-09 14:57:42 +02002197 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002198 u8 flow_tag[0x18];
2199
Matan Barakb4ff3a32016-02-09 14:57:42 +02002200 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002201 u8 action[0x10];
2202
Matan Barakb4ff3a32016-02-09 14:57:42 +02002203 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002204 u8 destination_list_size[0x18];
2205
Amir Vadai9dc0b282016-05-13 12:55:39 +00002206 u8 reserved_at_a0[0x8];
2207 u8 flow_counter_list_size[0x18];
2208
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002209 u8 encap_id[0x20];
2210
2211 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03002212
2213 struct mlx5_ifc_fte_match_param_bits match_value;
2214
Matan Barakb4ff3a32016-02-09 14:57:42 +02002215 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002216
Amir Vadai9dc0b282016-05-13 12:55:39 +00002217 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002218};
2219
2220enum {
2221 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2222 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2223};
2224
2225struct mlx5_ifc_xrc_srqc_bits {
2226 u8 state[0x4];
2227 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002228 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002229
2230 u8 wq_signature[0x1];
2231 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002232 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002233 u8 rlky[0x1];
2234 u8 basic_cyclic_rcv_wqe[0x1];
2235 u8 log_rq_stride[0x3];
2236 u8 xrcd[0x18];
2237
2238 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002239 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002240 u8 cqn[0x18];
2241
Matan Barakb4ff3a32016-02-09 14:57:42 +02002242 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002243
2244 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002245 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002246 u8 log_page_size[0x6];
2247 u8 user_index[0x18];
2248
Matan Barakb4ff3a32016-02-09 14:57:42 +02002249 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002250
Matan Barakb4ff3a32016-02-09 14:57:42 +02002251 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002252 u8 pd[0x18];
2253
2254 u8 lwm[0x10];
2255 u8 wqe_cnt[0x10];
2256
Matan Barakb4ff3a32016-02-09 14:57:42 +02002257 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002258
2259 u8 db_record_addr_h[0x20];
2260
2261 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002262 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002263
Matan Barakb4ff3a32016-02-09 14:57:42 +02002264 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002265};
2266
2267struct mlx5_ifc_traffic_counter_bits {
2268 u8 packets[0x40];
2269
2270 u8 octets[0x40];
2271};
2272
2273struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002274 u8 strict_lag_tx_port_affinity[0x1];
2275 u8 reserved_at_1[0x3];
2276 u8 lag_tx_port_affinity[0x04];
2277
2278 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002279 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002280 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002281
Matan Barakb4ff3a32016-02-09 14:57:42 +02002282 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002283
Matan Barakb4ff3a32016-02-09 14:57:42 +02002284 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002285 u8 transport_domain[0x18];
2286
Matan Barakb4ff3a32016-02-09 14:57:42 +02002287 u8 reserved_at_140[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002288};
2289
2290enum {
2291 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2292 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2293};
2294
2295enum {
2296 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2297 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2298};
2299
2300enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002301 MLX5_RX_HASH_FN_NONE = 0x0,
2302 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2303 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002304};
2305
2306enum {
2307 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2308 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2309};
2310
2311struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002312 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002313
2314 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002315 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002316
Matan Barakb4ff3a32016-02-09 14:57:42 +02002317 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002318
Matan Barakb4ff3a32016-02-09 14:57:42 +02002319 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002320 u8 lro_timeout_period_usecs[0x10];
2321 u8 lro_enable_mask[0x4];
2322 u8 lro_max_ip_payload_size[0x8];
2323
Matan Barakb4ff3a32016-02-09 14:57:42 +02002324 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002325
Matan Barakb4ff3a32016-02-09 14:57:42 +02002326 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002327 u8 inline_rqn[0x18];
2328
2329 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002330 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002331 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002332 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002333 u8 indirect_table[0x18];
2334
2335 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002336 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002337 u8 self_lb_block[0x2];
2338 u8 transport_domain[0x18];
2339
2340 u8 rx_hash_toeplitz_key[10][0x20];
2341
2342 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2343
2344 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2345
Matan Barakb4ff3a32016-02-09 14:57:42 +02002346 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002347};
2348
2349enum {
2350 MLX5_SRQC_STATE_GOOD = 0x0,
2351 MLX5_SRQC_STATE_ERROR = 0x1,
2352};
2353
2354struct mlx5_ifc_srqc_bits {
2355 u8 state[0x4];
2356 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002357 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002358
2359 u8 wq_signature[0x1];
2360 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002361 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002362 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002363 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002364 u8 log_rq_stride[0x3];
2365 u8 xrcd[0x18];
2366
2367 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002368 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002369 u8 cqn[0x18];
2370
Matan Barakb4ff3a32016-02-09 14:57:42 +02002371 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002372
Matan Barakb4ff3a32016-02-09 14:57:42 +02002373 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002374 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002375 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002376
Matan Barakb4ff3a32016-02-09 14:57:42 +02002377 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002378
Matan Barakb4ff3a32016-02-09 14:57:42 +02002379 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002380 u8 pd[0x18];
2381
2382 u8 lwm[0x10];
2383 u8 wqe_cnt[0x10];
2384
Matan Barakb4ff3a32016-02-09 14:57:42 +02002385 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002386
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002387 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002388
Matan Barakb4ff3a32016-02-09 14:57:42 +02002389 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002390};
2391
2392enum {
2393 MLX5_SQC_STATE_RST = 0x0,
2394 MLX5_SQC_STATE_RDY = 0x1,
2395 MLX5_SQC_STATE_ERR = 0x3,
2396};
2397
2398struct mlx5_ifc_sqc_bits {
2399 u8 rlky[0x1];
2400 u8 cd_master[0x1];
2401 u8 fre[0x1];
2402 u8 flush_in_error_en[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002403 u8 reserved_at_4[0x1];
2404 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002405 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002406 u8 reg_umr[0x1];
2407 u8 reserved_at_d[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03002408
Matan Barakb4ff3a32016-02-09 14:57:42 +02002409 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002410 u8 user_index[0x18];
2411
Matan Barakb4ff3a32016-02-09 14:57:42 +02002412 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002413 u8 cqn[0x18];
2414
Saeed Mahameed74862162016-06-09 15:11:34 +03002415 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002416
Saeed Mahameed74862162016-06-09 15:11:34 +03002417 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002418 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002419 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002420
Matan Barakb4ff3a32016-02-09 14:57:42 +02002421 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002422
Matan Barakb4ff3a32016-02-09 14:57:42 +02002423 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002424 u8 tis_num_0[0x18];
2425
2426 struct mlx5_ifc_wq_bits wq;
2427};
2428
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002429enum {
2430 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2431 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2432 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2433 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2434};
2435
2436struct mlx5_ifc_scheduling_context_bits {
2437 u8 element_type[0x8];
2438 u8 reserved_at_8[0x18];
2439
2440 u8 element_attributes[0x20];
2441
2442 u8 parent_element_id[0x20];
2443
2444 u8 reserved_at_60[0x40];
2445
2446 u8 bw_share[0x20];
2447
2448 u8 max_average_bw[0x20];
2449
2450 u8 reserved_at_e0[0x120];
2451};
2452
Saeed Mahameede2816822015-05-28 22:28:40 +03002453struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002454 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002455
Matan Barakb4ff3a32016-02-09 14:57:42 +02002456 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002457 u8 rqt_max_size[0x10];
2458
Matan Barakb4ff3a32016-02-09 14:57:42 +02002459 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002460 u8 rqt_actual_size[0x10];
2461
Matan Barakb4ff3a32016-02-09 14:57:42 +02002462 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002463
2464 struct mlx5_ifc_rq_num_bits rq_num[0];
2465};
2466
2467enum {
2468 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2469 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2470};
2471
2472enum {
2473 MLX5_RQC_STATE_RST = 0x0,
2474 MLX5_RQC_STATE_RDY = 0x1,
2475 MLX5_RQC_STATE_ERR = 0x3,
2476};
2477
2478struct mlx5_ifc_rqc_bits {
2479 u8 rlky[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002480 u8 reserved_at_1[0x1];
2481 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002482 u8 vsd[0x1];
2483 u8 mem_rq_type[0x4];
2484 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002485 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002486 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002487 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002488
Matan Barakb4ff3a32016-02-09 14:57:42 +02002489 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002490 u8 user_index[0x18];
2491
Matan Barakb4ff3a32016-02-09 14:57:42 +02002492 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002493 u8 cqn[0x18];
2494
2495 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002496 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002497
Matan Barakb4ff3a32016-02-09 14:57:42 +02002498 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002499 u8 rmpn[0x18];
2500
Matan Barakb4ff3a32016-02-09 14:57:42 +02002501 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002502
2503 struct mlx5_ifc_wq_bits wq;
2504};
2505
2506enum {
2507 MLX5_RMPC_STATE_RDY = 0x1,
2508 MLX5_RMPC_STATE_ERR = 0x3,
2509};
2510
2511struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002512 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002513 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002514 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002515
2516 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002517 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002518
Matan Barakb4ff3a32016-02-09 14:57:42 +02002519 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002520
2521 struct mlx5_ifc_wq_bits wq;
2522};
2523
Saeed Mahameede2816822015-05-28 22:28:40 +03002524struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002525 u8 reserved_at_0[0x5];
2526 u8 min_wqe_inline_mode[0x3];
2527 u8 reserved_at_8[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03002528 u8 roce_en[0x1];
2529
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002530 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002531 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002532 u8 event_on_mtu[0x1];
2533 u8 event_on_promisc_change[0x1];
2534 u8 event_on_vlan_change[0x1];
2535 u8 event_on_mc_address_change[0x1];
2536 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002537
Matan Barakb4ff3a32016-02-09 14:57:42 +02002538 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002539
2540 u8 mtu[0x10];
2541
Achiad Shochat9efa7522015-12-23 18:47:20 +02002542 u8 system_image_guid[0x40];
2543 u8 port_guid[0x40];
2544 u8 node_guid[0x40];
2545
Matan Barakb4ff3a32016-02-09 14:57:42 +02002546 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002547 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002548 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002549
2550 u8 promisc_uc[0x1];
2551 u8 promisc_mc[0x1];
2552 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002553 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002554 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002555 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002556 u8 allowed_list_size[0xc];
2557
2558 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2559
Matan Barakb4ff3a32016-02-09 14:57:42 +02002560 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002561
2562 u8 current_uc_mac_address[0][0x40];
2563};
2564
2565enum {
2566 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2567 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2568 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002569 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002570};
2571
2572struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002573 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002574 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002575 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002576 u8 small_fence_on_rdma_read_response[0x1];
2577 u8 umr_en[0x1];
2578 u8 a[0x1];
2579 u8 rw[0x1];
2580 u8 rr[0x1];
2581 u8 lw[0x1];
2582 u8 lr[0x1];
2583 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002584 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002585
2586 u8 qpn[0x18];
2587 u8 mkey_7_0[0x8];
2588
Matan Barakb4ff3a32016-02-09 14:57:42 +02002589 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002590
2591 u8 length64[0x1];
2592 u8 bsf_en[0x1];
2593 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002594 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002595 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002596 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002597 u8 en_rinval[0x1];
2598 u8 pd[0x18];
2599
2600 u8 start_addr[0x40];
2601
2602 u8 len[0x40];
2603
2604 u8 bsf_octword_size[0x20];
2605
Matan Barakb4ff3a32016-02-09 14:57:42 +02002606 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002607
2608 u8 translations_octword_size[0x20];
2609
Matan Barakb4ff3a32016-02-09 14:57:42 +02002610 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002611 u8 log_page_size[0x5];
2612
Matan Barakb4ff3a32016-02-09 14:57:42 +02002613 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002614};
2615
2616struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002617 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002618 u8 pkey[0x10];
2619};
2620
2621struct mlx5_ifc_array128_auto_bits {
2622 u8 array128_auto[16][0x8];
2623};
2624
2625struct mlx5_ifc_hca_vport_context_bits {
2626 u8 field_select[0x20];
2627
Matan Barakb4ff3a32016-02-09 14:57:42 +02002628 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002629
2630 u8 sm_virt_aware[0x1];
2631 u8 has_smi[0x1];
2632 u8 has_raw[0x1];
2633 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002634 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002635 u8 port_physical_state[0x4];
2636 u8 vport_state_policy[0x4];
2637 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002638 u8 vport_state[0x4];
2639
Matan Barakb4ff3a32016-02-09 14:57:42 +02002640 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002641
2642 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002643
2644 u8 port_guid[0x40];
2645
2646 u8 node_guid[0x40];
2647
2648 u8 cap_mask1[0x20];
2649
2650 u8 cap_mask1_field_select[0x20];
2651
2652 u8 cap_mask2[0x20];
2653
2654 u8 cap_mask2_field_select[0x20];
2655
Matan Barakb4ff3a32016-02-09 14:57:42 +02002656 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002657
2658 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002659 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002660 u8 init_type_reply[0x4];
2661 u8 lmc[0x3];
2662 u8 subnet_timeout[0x5];
2663
2664 u8 sm_lid[0x10];
2665 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002666 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002667
2668 u8 qkey_violation_counter[0x10];
2669 u8 pkey_violation_counter[0x10];
2670
Matan Barakb4ff3a32016-02-09 14:57:42 +02002671 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002672};
2673
Saeed Mahameedd6666752015-12-01 18:03:22 +02002674struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002675 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002676 u8 vport_svlan_strip[0x1];
2677 u8 vport_cvlan_strip[0x1];
2678 u8 vport_svlan_insert[0x1];
2679 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002680 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002681
Matan Barakb4ff3a32016-02-09 14:57:42 +02002682 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002683
2684 u8 svlan_cfi[0x1];
2685 u8 svlan_pcp[0x3];
2686 u8 svlan_id[0xc];
2687 u8 cvlan_cfi[0x1];
2688 u8 cvlan_pcp[0x3];
2689 u8 cvlan_id[0xc];
2690
Matan Barakb4ff3a32016-02-09 14:57:42 +02002691 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002692};
2693
Saeed Mahameede2816822015-05-28 22:28:40 +03002694enum {
2695 MLX5_EQC_STATUS_OK = 0x0,
2696 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2697};
2698
2699enum {
2700 MLX5_EQC_ST_ARMED = 0x9,
2701 MLX5_EQC_ST_FIRED = 0xa,
2702};
2703
2704struct mlx5_ifc_eqc_bits {
2705 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002706 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002707 u8 ec[0x1];
2708 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002709 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002710 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002711 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002712
Matan Barakb4ff3a32016-02-09 14:57:42 +02002713 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002714
Matan Barakb4ff3a32016-02-09 14:57:42 +02002715 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002716 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002717 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002718
Matan Barakb4ff3a32016-02-09 14:57:42 +02002719 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002720 u8 log_eq_size[0x5];
2721 u8 uar_page[0x18];
2722
Matan Barakb4ff3a32016-02-09 14:57:42 +02002723 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002724
Matan Barakb4ff3a32016-02-09 14:57:42 +02002725 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002726 u8 intr[0x8];
2727
Matan Barakb4ff3a32016-02-09 14:57:42 +02002728 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002729 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002730 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002731
Matan Barakb4ff3a32016-02-09 14:57:42 +02002732 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002733
Matan Barakb4ff3a32016-02-09 14:57:42 +02002734 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002735 u8 consumer_counter[0x18];
2736
Matan Barakb4ff3a32016-02-09 14:57:42 +02002737 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002738 u8 producer_counter[0x18];
2739
Matan Barakb4ff3a32016-02-09 14:57:42 +02002740 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002741};
2742
2743enum {
2744 MLX5_DCTC_STATE_ACTIVE = 0x0,
2745 MLX5_DCTC_STATE_DRAINING = 0x1,
2746 MLX5_DCTC_STATE_DRAINED = 0x2,
2747};
2748
2749enum {
2750 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2751 MLX5_DCTC_CS_RES_NA = 0x1,
2752 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2753};
2754
2755enum {
2756 MLX5_DCTC_MTU_256_BYTES = 0x1,
2757 MLX5_DCTC_MTU_512_BYTES = 0x2,
2758 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2759 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2760 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2761};
2762
2763struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002764 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002765 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002766 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002767
Matan Barakb4ff3a32016-02-09 14:57:42 +02002768 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002769 u8 user_index[0x18];
2770
Matan Barakb4ff3a32016-02-09 14:57:42 +02002771 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002772 u8 cqn[0x18];
2773
2774 u8 counter_set_id[0x8];
2775 u8 atomic_mode[0x4];
2776 u8 rre[0x1];
2777 u8 rwe[0x1];
2778 u8 rae[0x1];
2779 u8 atomic_like_write_en[0x1];
2780 u8 latency_sensitive[0x1];
2781 u8 rlky[0x1];
2782 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002783 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002784
Matan Barakb4ff3a32016-02-09 14:57:42 +02002785 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002786 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002787 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002788 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002789 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002790
Matan Barakb4ff3a32016-02-09 14:57:42 +02002791 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002792 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002793
Matan Barakb4ff3a32016-02-09 14:57:42 +02002794 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002795 u8 pd[0x18];
2796
2797 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002798 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002799 u8 flow_label[0x14];
2800
2801 u8 dc_access_key[0x40];
2802
Matan Barakb4ff3a32016-02-09 14:57:42 +02002803 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002804 u8 mtu[0x3];
2805 u8 port[0x8];
2806 u8 pkey_index[0x10];
2807
Matan Barakb4ff3a32016-02-09 14:57:42 +02002808 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002809 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002810 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002811 u8 hop_limit[0x8];
2812
2813 u8 dc_access_key_violation_count[0x20];
2814
Matan Barakb4ff3a32016-02-09 14:57:42 +02002815 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002816 u8 dei_cfi[0x1];
2817 u8 eth_prio[0x3];
2818 u8 ecn[0x2];
2819 u8 dscp[0x6];
2820
Matan Barakb4ff3a32016-02-09 14:57:42 +02002821 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002822};
2823
2824enum {
2825 MLX5_CQC_STATUS_OK = 0x0,
2826 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2827 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2828};
2829
2830enum {
2831 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2832 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2833};
2834
2835enum {
2836 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2837 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2838 MLX5_CQC_ST_FIRED = 0xa,
2839};
2840
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002841enum {
2842 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2843 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002844 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002845};
2846
Saeed Mahameede2816822015-05-28 22:28:40 +03002847struct mlx5_ifc_cqc_bits {
2848 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002849 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002850 u8 cqe_sz[0x3];
2851 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002852 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002853 u8 scqe_break_moderation_en[0x1];
2854 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002855 u8 cq_period_mode[0x2];
2856 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002857 u8 mini_cqe_res_format[0x2];
2858 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002859 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002860
Matan Barakb4ff3a32016-02-09 14:57:42 +02002861 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002862
Matan Barakb4ff3a32016-02-09 14:57:42 +02002863 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002864 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002865 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002866
Matan Barakb4ff3a32016-02-09 14:57:42 +02002867 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002868 u8 log_cq_size[0x5];
2869 u8 uar_page[0x18];
2870
Matan Barakb4ff3a32016-02-09 14:57:42 +02002871 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002872 u8 cq_period[0xc];
2873 u8 cq_max_count[0x10];
2874
Matan Barakb4ff3a32016-02-09 14:57:42 +02002875 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002876 u8 c_eqn[0x8];
2877
Matan Barakb4ff3a32016-02-09 14:57:42 +02002878 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002879 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002880 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002881
Matan Barakb4ff3a32016-02-09 14:57:42 +02002882 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002883
Matan Barakb4ff3a32016-02-09 14:57:42 +02002884 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002885 u8 last_notified_index[0x18];
2886
Matan Barakb4ff3a32016-02-09 14:57:42 +02002887 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002888 u8 last_solicit_index[0x18];
2889
Matan Barakb4ff3a32016-02-09 14:57:42 +02002890 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002891 u8 consumer_counter[0x18];
2892
Matan Barakb4ff3a32016-02-09 14:57:42 +02002893 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002894 u8 producer_counter[0x18];
2895
Matan Barakb4ff3a32016-02-09 14:57:42 +02002896 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002897
2898 u8 dbr_addr[0x40];
2899};
2900
2901union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2902 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2903 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2904 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002905 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002906};
2907
2908struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002909 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002910
Matan Barakb4ff3a32016-02-09 14:57:42 +02002911 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002912 u8 ieee_vendor_id[0x18];
2913
Matan Barakb4ff3a32016-02-09 14:57:42 +02002914 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002915 u8 vsd_vendor_id[0x10];
2916
2917 u8 vsd[208][0x8];
2918
2919 u8 vsd_contd_psid[16][0x8];
2920};
2921
Saeed Mahameed74862162016-06-09 15:11:34 +03002922enum {
2923 MLX5_XRQC_STATE_GOOD = 0x0,
2924 MLX5_XRQC_STATE_ERROR = 0x1,
2925};
2926
2927enum {
2928 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
2929 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
2930};
2931
2932enum {
2933 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
2934};
2935
2936struct mlx5_ifc_tag_matching_topology_context_bits {
2937 u8 log_matching_list_sz[0x4];
2938 u8 reserved_at_4[0xc];
2939 u8 append_next_index[0x10];
2940
2941 u8 sw_phase_cnt[0x10];
2942 u8 hw_phase_cnt[0x10];
2943
2944 u8 reserved_at_40[0x40];
2945};
2946
2947struct mlx5_ifc_xrqc_bits {
2948 u8 state[0x4];
2949 u8 rlkey[0x1];
2950 u8 reserved_at_5[0xf];
2951 u8 topology[0x4];
2952 u8 reserved_at_18[0x4];
2953 u8 offload[0x4];
2954
2955 u8 reserved_at_20[0x8];
2956 u8 user_index[0x18];
2957
2958 u8 reserved_at_40[0x8];
2959 u8 cqn[0x18];
2960
2961 u8 reserved_at_60[0xa0];
2962
2963 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
2964
Artemy Kovalyov5579e152016-08-31 05:17:54 +00002965 u8 reserved_at_180[0x880];
Saeed Mahameed74862162016-06-09 15:11:34 +03002966
2967 struct mlx5_ifc_wq_bits wq;
2968};
2969
Saeed Mahameede2816822015-05-28 22:28:40 +03002970union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
2971 struct mlx5_ifc_modify_field_select_bits modify_field_select;
2972 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002973 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002974};
2975
2976union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
2977 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
2978 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
2979 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002980 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002981};
2982
2983union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
2984 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
2985 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
2986 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
2987 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
2988 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
2989 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
2990 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02002991 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03002992 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03002993 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002994 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002995};
2996
Gal Pressman8ed1a632016-11-17 13:46:01 +02002997union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
2998 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
2999 u8 reserved_at_0[0x7c0];
3000};
3001
Saeed Mahameede2816822015-05-28 22:28:40 +03003002union mlx5_ifc_event_auto_bits {
3003 struct mlx5_ifc_comp_event_bits comp_event;
3004 struct mlx5_ifc_dct_events_bits dct_events;
3005 struct mlx5_ifc_qp_events_bits qp_events;
3006 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3007 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3008 struct mlx5_ifc_cq_error_bits cq_error;
3009 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3010 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3011 struct mlx5_ifc_gpio_event_bits gpio_event;
3012 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3013 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3014 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003015 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003016};
3017
3018struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003019 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003020
3021 u8 assert_existptr[0x20];
3022
3023 u8 assert_callra[0x20];
3024
Matan Barakb4ff3a32016-02-09 14:57:42 +02003025 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003026
3027 u8 fw_version[0x20];
3028
3029 u8 hw_id[0x20];
3030
Matan Barakb4ff3a32016-02-09 14:57:42 +02003031 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003032
3033 u8 irisc_index[0x8];
3034 u8 synd[0x8];
3035 u8 ext_synd[0x10];
3036};
3037
3038struct mlx5_ifc_register_loopback_control_bits {
3039 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003040 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003041 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003042 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003043
Matan Barakb4ff3a32016-02-09 14:57:42 +02003044 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003045};
3046
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003047struct mlx5_ifc_vport_tc_element_bits {
3048 u8 traffic_class[0x4];
3049 u8 reserved_at_4[0xc];
3050 u8 vport_number[0x10];
3051};
3052
3053struct mlx5_ifc_vport_element_bits {
3054 u8 reserved_at_0[0x10];
3055 u8 vport_number[0x10];
3056};
3057
3058enum {
3059 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3060 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3061 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3062};
3063
3064struct mlx5_ifc_tsar_element_bits {
3065 u8 reserved_at_0[0x8];
3066 u8 tsar_type[0x8];
3067 u8 reserved_at_10[0x10];
3068};
3069
Saeed Mahameede2816822015-05-28 22:28:40 +03003070struct mlx5_ifc_teardown_hca_out_bits {
3071 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003072 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003073
3074 u8 syndrome[0x20];
3075
Matan Barakb4ff3a32016-02-09 14:57:42 +02003076 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003077};
3078
3079enum {
3080 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
3081 MLX5_TEARDOWN_HCA_IN_PROFILE_PANIC_CLOSE = 0x1,
3082};
3083
3084struct mlx5_ifc_teardown_hca_in_bits {
3085 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003086 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003087
Matan Barakb4ff3a32016-02-09 14:57:42 +02003088 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003089 u8 op_mod[0x10];
3090
Matan Barakb4ff3a32016-02-09 14:57:42 +02003091 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003092 u8 profile[0x10];
3093
Matan Barakb4ff3a32016-02-09 14:57:42 +02003094 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003095};
3096
3097struct mlx5_ifc_sqerr2rts_qp_out_bits {
3098 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003099 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003100
3101 u8 syndrome[0x20];
3102
Matan Barakb4ff3a32016-02-09 14:57:42 +02003103 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003104};
3105
3106struct mlx5_ifc_sqerr2rts_qp_in_bits {
3107 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003108 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003109
Matan Barakb4ff3a32016-02-09 14:57:42 +02003110 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003111 u8 op_mod[0x10];
3112
Matan Barakb4ff3a32016-02-09 14:57:42 +02003113 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003114 u8 qpn[0x18];
3115
Matan Barakb4ff3a32016-02-09 14:57:42 +02003116 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003117
3118 u8 opt_param_mask[0x20];
3119
Matan Barakb4ff3a32016-02-09 14:57:42 +02003120 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003121
3122 struct mlx5_ifc_qpc_bits qpc;
3123
Matan Barakb4ff3a32016-02-09 14:57:42 +02003124 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003125};
3126
3127struct mlx5_ifc_sqd2rts_qp_out_bits {
3128 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003129 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003130
3131 u8 syndrome[0x20];
3132
Matan Barakb4ff3a32016-02-09 14:57:42 +02003133 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003134};
3135
3136struct mlx5_ifc_sqd2rts_qp_in_bits {
3137 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003138 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003139
Matan Barakb4ff3a32016-02-09 14:57:42 +02003140 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003141 u8 op_mod[0x10];
3142
Matan Barakb4ff3a32016-02-09 14:57:42 +02003143 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003144 u8 qpn[0x18];
3145
Matan Barakb4ff3a32016-02-09 14:57:42 +02003146 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003147
3148 u8 opt_param_mask[0x20];
3149
Matan Barakb4ff3a32016-02-09 14:57:42 +02003150 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003151
3152 struct mlx5_ifc_qpc_bits qpc;
3153
Matan Barakb4ff3a32016-02-09 14:57:42 +02003154 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003155};
3156
3157struct mlx5_ifc_set_roce_address_out_bits {
3158 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003159 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003160
3161 u8 syndrome[0x20];
3162
Matan Barakb4ff3a32016-02-09 14:57:42 +02003163 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003164};
3165
3166struct mlx5_ifc_set_roce_address_in_bits {
3167 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003168 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003169
Matan Barakb4ff3a32016-02-09 14:57:42 +02003170 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003171 u8 op_mod[0x10];
3172
3173 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003174 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003175
Matan Barakb4ff3a32016-02-09 14:57:42 +02003176 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003177
3178 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3179};
3180
3181struct mlx5_ifc_set_mad_demux_out_bits {
3182 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003183 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003184
3185 u8 syndrome[0x20];
3186
Matan Barakb4ff3a32016-02-09 14:57:42 +02003187 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003188};
3189
3190enum {
3191 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3192 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3193};
3194
3195struct mlx5_ifc_set_mad_demux_in_bits {
3196 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003197 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003198
Matan Barakb4ff3a32016-02-09 14:57:42 +02003199 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003200 u8 op_mod[0x10];
3201
Matan Barakb4ff3a32016-02-09 14:57:42 +02003202 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003203
Matan Barakb4ff3a32016-02-09 14:57:42 +02003204 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003205 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003206 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003207};
3208
3209struct mlx5_ifc_set_l2_table_entry_out_bits {
3210 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003211 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003212
3213 u8 syndrome[0x20];
3214
Matan Barakb4ff3a32016-02-09 14:57:42 +02003215 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003216};
3217
3218struct mlx5_ifc_set_l2_table_entry_in_bits {
3219 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003220 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003221
Matan Barakb4ff3a32016-02-09 14:57:42 +02003222 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003223 u8 op_mod[0x10];
3224
Matan Barakb4ff3a32016-02-09 14:57:42 +02003225 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003226
Matan Barakb4ff3a32016-02-09 14:57:42 +02003227 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003228 u8 table_index[0x18];
3229
Matan Barakb4ff3a32016-02-09 14:57:42 +02003230 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003231
Matan Barakb4ff3a32016-02-09 14:57:42 +02003232 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003233 u8 vlan_valid[0x1];
3234 u8 vlan[0xc];
3235
3236 struct mlx5_ifc_mac_address_layout_bits mac_address;
3237
Matan Barakb4ff3a32016-02-09 14:57:42 +02003238 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003239};
3240
3241struct mlx5_ifc_set_issi_out_bits {
3242 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003243 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003244
3245 u8 syndrome[0x20];
3246
Matan Barakb4ff3a32016-02-09 14:57:42 +02003247 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003248};
3249
3250struct mlx5_ifc_set_issi_in_bits {
3251 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003252 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003253
Matan Barakb4ff3a32016-02-09 14:57:42 +02003254 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003255 u8 op_mod[0x10];
3256
Matan Barakb4ff3a32016-02-09 14:57:42 +02003257 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003258 u8 current_issi[0x10];
3259
Matan Barakb4ff3a32016-02-09 14:57:42 +02003260 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003261};
3262
3263struct mlx5_ifc_set_hca_cap_out_bits {
3264 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003265 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003266
3267 u8 syndrome[0x20];
3268
Matan Barakb4ff3a32016-02-09 14:57:42 +02003269 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003270};
3271
3272struct mlx5_ifc_set_hca_cap_in_bits {
3273 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003274 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003275
Matan Barakb4ff3a32016-02-09 14:57:42 +02003276 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003277 u8 op_mod[0x10];
3278
Matan Barakb4ff3a32016-02-09 14:57:42 +02003279 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003280
Saeed Mahameede2816822015-05-28 22:28:40 +03003281 union mlx5_ifc_hca_cap_union_bits capability;
3282};
3283
Maor Gottlieb26a81452015-12-10 17:12:39 +02003284enum {
3285 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3286 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3287 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3288 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3289};
3290
Saeed Mahameede2816822015-05-28 22:28:40 +03003291struct mlx5_ifc_set_fte_out_bits {
3292 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003293 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003294
3295 u8 syndrome[0x20];
3296
Matan Barakb4ff3a32016-02-09 14:57:42 +02003297 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003298};
3299
3300struct mlx5_ifc_set_fte_in_bits {
3301 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003302 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003303
Matan Barakb4ff3a32016-02-09 14:57:42 +02003304 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003305 u8 op_mod[0x10];
3306
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003307 u8 other_vport[0x1];
3308 u8 reserved_at_41[0xf];
3309 u8 vport_number[0x10];
3310
3311 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003312
3313 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003314 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003315
Matan Barakb4ff3a32016-02-09 14:57:42 +02003316 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003317 u8 table_id[0x18];
3318
Matan Barakb4ff3a32016-02-09 14:57:42 +02003319 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003320 u8 modify_enable_mask[0x8];
3321
Matan Barakb4ff3a32016-02-09 14:57:42 +02003322 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003323
3324 u8 flow_index[0x20];
3325
Matan Barakb4ff3a32016-02-09 14:57:42 +02003326 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003327
3328 struct mlx5_ifc_flow_context_bits flow_context;
3329};
3330
3331struct mlx5_ifc_rts2rts_qp_out_bits {
3332 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003333 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003334
3335 u8 syndrome[0x20];
3336
Matan Barakb4ff3a32016-02-09 14:57:42 +02003337 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003338};
3339
3340struct mlx5_ifc_rts2rts_qp_in_bits {
3341 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003342 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003343
Matan Barakb4ff3a32016-02-09 14:57:42 +02003344 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003345 u8 op_mod[0x10];
3346
Matan Barakb4ff3a32016-02-09 14:57:42 +02003347 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003348 u8 qpn[0x18];
3349
Matan Barakb4ff3a32016-02-09 14:57:42 +02003350 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003351
3352 u8 opt_param_mask[0x20];
3353
Matan Barakb4ff3a32016-02-09 14:57:42 +02003354 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003355
3356 struct mlx5_ifc_qpc_bits qpc;
3357
Matan Barakb4ff3a32016-02-09 14:57:42 +02003358 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003359};
3360
3361struct mlx5_ifc_rtr2rts_qp_out_bits {
3362 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003363 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003364
3365 u8 syndrome[0x20];
3366
Matan Barakb4ff3a32016-02-09 14:57:42 +02003367 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003368};
3369
3370struct mlx5_ifc_rtr2rts_qp_in_bits {
3371 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003372 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003373
Matan Barakb4ff3a32016-02-09 14:57:42 +02003374 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003375 u8 op_mod[0x10];
3376
Matan Barakb4ff3a32016-02-09 14:57:42 +02003377 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003378 u8 qpn[0x18];
3379
Matan Barakb4ff3a32016-02-09 14:57:42 +02003380 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003381
3382 u8 opt_param_mask[0x20];
3383
Matan Barakb4ff3a32016-02-09 14:57:42 +02003384 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003385
3386 struct mlx5_ifc_qpc_bits qpc;
3387
Matan Barakb4ff3a32016-02-09 14:57:42 +02003388 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003389};
3390
3391struct mlx5_ifc_rst2init_qp_out_bits {
3392 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003393 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003394
3395 u8 syndrome[0x20];
3396
Matan Barakb4ff3a32016-02-09 14:57:42 +02003397 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003398};
3399
3400struct mlx5_ifc_rst2init_qp_in_bits {
3401 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003402 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003403
Matan Barakb4ff3a32016-02-09 14:57:42 +02003404 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003405 u8 op_mod[0x10];
3406
Matan Barakb4ff3a32016-02-09 14:57:42 +02003407 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003408 u8 qpn[0x18];
3409
Matan Barakb4ff3a32016-02-09 14:57:42 +02003410 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003411
3412 u8 opt_param_mask[0x20];
3413
Matan Barakb4ff3a32016-02-09 14:57:42 +02003414 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003415
3416 struct mlx5_ifc_qpc_bits qpc;
3417
Matan Barakb4ff3a32016-02-09 14:57:42 +02003418 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003419};
3420
Saeed Mahameed74862162016-06-09 15:11:34 +03003421struct mlx5_ifc_query_xrq_out_bits {
3422 u8 status[0x8];
3423 u8 reserved_at_8[0x18];
3424
3425 u8 syndrome[0x20];
3426
3427 u8 reserved_at_40[0x40];
3428
3429 struct mlx5_ifc_xrqc_bits xrq_context;
3430};
3431
3432struct mlx5_ifc_query_xrq_in_bits {
3433 u8 opcode[0x10];
3434 u8 reserved_at_10[0x10];
3435
3436 u8 reserved_at_20[0x10];
3437 u8 op_mod[0x10];
3438
3439 u8 reserved_at_40[0x8];
3440 u8 xrqn[0x18];
3441
3442 u8 reserved_at_60[0x20];
3443};
3444
Saeed Mahameede2816822015-05-28 22:28:40 +03003445struct mlx5_ifc_query_xrc_srq_out_bits {
3446 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003447 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003448
3449 u8 syndrome[0x20];
3450
Matan Barakb4ff3a32016-02-09 14:57:42 +02003451 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003452
3453 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3454
Matan Barakb4ff3a32016-02-09 14:57:42 +02003455 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003456
3457 u8 pas[0][0x40];
3458};
3459
3460struct mlx5_ifc_query_xrc_srq_in_bits {
3461 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003462 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003463
Matan Barakb4ff3a32016-02-09 14:57:42 +02003464 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003465 u8 op_mod[0x10];
3466
Matan Barakb4ff3a32016-02-09 14:57:42 +02003467 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003468 u8 xrc_srqn[0x18];
3469
Matan Barakb4ff3a32016-02-09 14:57:42 +02003470 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003471};
3472
3473enum {
3474 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3475 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3476};
3477
3478struct mlx5_ifc_query_vport_state_out_bits {
3479 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003480 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003481
3482 u8 syndrome[0x20];
3483
Matan Barakb4ff3a32016-02-09 14:57:42 +02003484 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003485
Matan Barakb4ff3a32016-02-09 14:57:42 +02003486 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003487 u8 admin_state[0x4];
3488 u8 state[0x4];
3489};
3490
3491enum {
3492 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003493 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003494};
3495
3496struct mlx5_ifc_query_vport_state_in_bits {
3497 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003498 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003499
Matan Barakb4ff3a32016-02-09 14:57:42 +02003500 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003501 u8 op_mod[0x10];
3502
3503 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003504 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003505 u8 vport_number[0x10];
3506
Matan Barakb4ff3a32016-02-09 14:57:42 +02003507 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003508};
3509
3510struct mlx5_ifc_query_vport_counter_out_bits {
3511 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003512 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003513
3514 u8 syndrome[0x20];
3515
Matan Barakb4ff3a32016-02-09 14:57:42 +02003516 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003517
3518 struct mlx5_ifc_traffic_counter_bits received_errors;
3519
3520 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3521
3522 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3523
3524 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3525
3526 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3527
3528 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3529
3530 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3531
3532 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3533
3534 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3535
3536 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3537
3538 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3539
3540 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3541
Matan Barakb4ff3a32016-02-09 14:57:42 +02003542 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003543};
3544
3545enum {
3546 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3547};
3548
3549struct mlx5_ifc_query_vport_counter_in_bits {
3550 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003551 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003552
Matan Barakb4ff3a32016-02-09 14:57:42 +02003553 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003554 u8 op_mod[0x10];
3555
3556 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003557 u8 reserved_at_41[0xb];
3558 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003559 u8 vport_number[0x10];
3560
Matan Barakb4ff3a32016-02-09 14:57:42 +02003561 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003562
3563 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003564 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003565
Matan Barakb4ff3a32016-02-09 14:57:42 +02003566 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003567};
3568
3569struct mlx5_ifc_query_tis_out_bits {
3570 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003571 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003572
3573 u8 syndrome[0x20];
3574
Matan Barakb4ff3a32016-02-09 14:57:42 +02003575 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003576
3577 struct mlx5_ifc_tisc_bits tis_context;
3578};
3579
3580struct mlx5_ifc_query_tis_in_bits {
3581 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003582 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003583
Matan Barakb4ff3a32016-02-09 14:57:42 +02003584 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003585 u8 op_mod[0x10];
3586
Matan Barakb4ff3a32016-02-09 14:57:42 +02003587 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003588 u8 tisn[0x18];
3589
Matan Barakb4ff3a32016-02-09 14:57:42 +02003590 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003591};
3592
3593struct mlx5_ifc_query_tir_out_bits {
3594 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003595 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003596
3597 u8 syndrome[0x20];
3598
Matan Barakb4ff3a32016-02-09 14:57:42 +02003599 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003600
3601 struct mlx5_ifc_tirc_bits tir_context;
3602};
3603
3604struct mlx5_ifc_query_tir_in_bits {
3605 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003606 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003607
Matan Barakb4ff3a32016-02-09 14:57:42 +02003608 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003609 u8 op_mod[0x10];
3610
Matan Barakb4ff3a32016-02-09 14:57:42 +02003611 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003612 u8 tirn[0x18];
3613
Matan Barakb4ff3a32016-02-09 14:57:42 +02003614 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003615};
3616
3617struct mlx5_ifc_query_srq_out_bits {
3618 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003619 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003620
3621 u8 syndrome[0x20];
3622
Matan Barakb4ff3a32016-02-09 14:57:42 +02003623 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003624
3625 struct mlx5_ifc_srqc_bits srq_context_entry;
3626
Matan Barakb4ff3a32016-02-09 14:57:42 +02003627 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003628
3629 u8 pas[0][0x40];
3630};
3631
3632struct mlx5_ifc_query_srq_in_bits {
3633 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003634 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003635
Matan Barakb4ff3a32016-02-09 14:57:42 +02003636 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003637 u8 op_mod[0x10];
3638
Matan Barakb4ff3a32016-02-09 14:57:42 +02003639 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003640 u8 srqn[0x18];
3641
Matan Barakb4ff3a32016-02-09 14:57:42 +02003642 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003643};
3644
3645struct mlx5_ifc_query_sq_out_bits {
3646 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003647 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003648
3649 u8 syndrome[0x20];
3650
Matan Barakb4ff3a32016-02-09 14:57:42 +02003651 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003652
3653 struct mlx5_ifc_sqc_bits sq_context;
3654};
3655
3656struct mlx5_ifc_query_sq_in_bits {
3657 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003658 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003659
Matan Barakb4ff3a32016-02-09 14:57:42 +02003660 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003661 u8 op_mod[0x10];
3662
Matan Barakb4ff3a32016-02-09 14:57:42 +02003663 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003664 u8 sqn[0x18];
3665
Matan Barakb4ff3a32016-02-09 14:57:42 +02003666 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003667};
3668
3669struct mlx5_ifc_query_special_contexts_out_bits {
3670 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003671 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003672
3673 u8 syndrome[0x20];
3674
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003675 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003676
3677 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003678
3679 u8 null_mkey[0x20];
3680
3681 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003682};
3683
3684struct mlx5_ifc_query_special_contexts_in_bits {
3685 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003686 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003687
Matan Barakb4ff3a32016-02-09 14:57:42 +02003688 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003689 u8 op_mod[0x10];
3690
Matan Barakb4ff3a32016-02-09 14:57:42 +02003691 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003692};
3693
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003694struct mlx5_ifc_query_scheduling_element_out_bits {
3695 u8 opcode[0x10];
3696 u8 reserved_at_10[0x10];
3697
3698 u8 reserved_at_20[0x10];
3699 u8 op_mod[0x10];
3700
3701 u8 reserved_at_40[0xc0];
3702
3703 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3704
3705 u8 reserved_at_300[0x100];
3706};
3707
3708enum {
3709 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3710};
3711
3712struct mlx5_ifc_query_scheduling_element_in_bits {
3713 u8 opcode[0x10];
3714 u8 reserved_at_10[0x10];
3715
3716 u8 reserved_at_20[0x10];
3717 u8 op_mod[0x10];
3718
3719 u8 scheduling_hierarchy[0x8];
3720 u8 reserved_at_48[0x18];
3721
3722 u8 scheduling_element_id[0x20];
3723
3724 u8 reserved_at_80[0x180];
3725};
3726
Saeed Mahameede2816822015-05-28 22:28:40 +03003727struct mlx5_ifc_query_rqt_out_bits {
3728 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003729 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003730
3731 u8 syndrome[0x20];
3732
Matan Barakb4ff3a32016-02-09 14:57:42 +02003733 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003734
3735 struct mlx5_ifc_rqtc_bits rqt_context;
3736};
3737
3738struct mlx5_ifc_query_rqt_in_bits {
3739 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003740 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003741
Matan Barakb4ff3a32016-02-09 14:57:42 +02003742 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003743 u8 op_mod[0x10];
3744
Matan Barakb4ff3a32016-02-09 14:57:42 +02003745 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003746 u8 rqtn[0x18];
3747
Matan Barakb4ff3a32016-02-09 14:57:42 +02003748 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003749};
3750
3751struct mlx5_ifc_query_rq_out_bits {
3752 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003753 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003754
3755 u8 syndrome[0x20];
3756
Matan Barakb4ff3a32016-02-09 14:57:42 +02003757 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003758
3759 struct mlx5_ifc_rqc_bits rq_context;
3760};
3761
3762struct mlx5_ifc_query_rq_in_bits {
3763 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003764 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003765
Matan Barakb4ff3a32016-02-09 14:57:42 +02003766 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003767 u8 op_mod[0x10];
3768
Matan Barakb4ff3a32016-02-09 14:57:42 +02003769 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003770 u8 rqn[0x18];
3771
Matan Barakb4ff3a32016-02-09 14:57:42 +02003772 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003773};
3774
3775struct mlx5_ifc_query_roce_address_out_bits {
3776 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003777 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003778
3779 u8 syndrome[0x20];
3780
Matan Barakb4ff3a32016-02-09 14:57:42 +02003781 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003782
3783 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3784};
3785
3786struct mlx5_ifc_query_roce_address_in_bits {
3787 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003788 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003789
Matan Barakb4ff3a32016-02-09 14:57:42 +02003790 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003791 u8 op_mod[0x10];
3792
3793 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003794 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003795
Matan Barakb4ff3a32016-02-09 14:57:42 +02003796 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003797};
3798
3799struct mlx5_ifc_query_rmp_out_bits {
3800 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003801 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003802
3803 u8 syndrome[0x20];
3804
Matan Barakb4ff3a32016-02-09 14:57:42 +02003805 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003806
3807 struct mlx5_ifc_rmpc_bits rmp_context;
3808};
3809
3810struct mlx5_ifc_query_rmp_in_bits {
3811 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003812 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003813
Matan Barakb4ff3a32016-02-09 14:57:42 +02003814 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003815 u8 op_mod[0x10];
3816
Matan Barakb4ff3a32016-02-09 14:57:42 +02003817 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003818 u8 rmpn[0x18];
3819
Matan Barakb4ff3a32016-02-09 14:57:42 +02003820 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003821};
3822
3823struct mlx5_ifc_query_qp_out_bits {
3824 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003825 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003826
3827 u8 syndrome[0x20];
3828
Matan Barakb4ff3a32016-02-09 14:57:42 +02003829 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003830
3831 u8 opt_param_mask[0x20];
3832
Matan Barakb4ff3a32016-02-09 14:57:42 +02003833 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003834
3835 struct mlx5_ifc_qpc_bits qpc;
3836
Matan Barakb4ff3a32016-02-09 14:57:42 +02003837 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003838
3839 u8 pas[0][0x40];
3840};
3841
3842struct mlx5_ifc_query_qp_in_bits {
3843 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003844 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003845
Matan Barakb4ff3a32016-02-09 14:57:42 +02003846 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003847 u8 op_mod[0x10];
3848
Matan Barakb4ff3a32016-02-09 14:57:42 +02003849 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003850 u8 qpn[0x18];
3851
Matan Barakb4ff3a32016-02-09 14:57:42 +02003852 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003853};
3854
3855struct mlx5_ifc_query_q_counter_out_bits {
3856 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003857 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003858
3859 u8 syndrome[0x20];
3860
Matan Barakb4ff3a32016-02-09 14:57:42 +02003861 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003862
3863 u8 rx_write_requests[0x20];
3864
Matan Barakb4ff3a32016-02-09 14:57:42 +02003865 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003866
3867 u8 rx_read_requests[0x20];
3868
Matan Barakb4ff3a32016-02-09 14:57:42 +02003869 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003870
3871 u8 rx_atomic_requests[0x20];
3872
Matan Barakb4ff3a32016-02-09 14:57:42 +02003873 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003874
3875 u8 rx_dct_connect[0x20];
3876
Matan Barakb4ff3a32016-02-09 14:57:42 +02003877 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003878
3879 u8 out_of_buffer[0x20];
3880
Matan Barakb4ff3a32016-02-09 14:57:42 +02003881 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003882
3883 u8 out_of_sequence[0x20];
3884
Saeed Mahameed74862162016-06-09 15:11:34 +03003885 u8 reserved_at_1e0[0x20];
3886
3887 u8 duplicate_request[0x20];
3888
3889 u8 reserved_at_220[0x20];
3890
3891 u8 rnr_nak_retry_err[0x20];
3892
3893 u8 reserved_at_260[0x20];
3894
3895 u8 packet_seq_err[0x20];
3896
3897 u8 reserved_at_2a0[0x20];
3898
3899 u8 implied_nak_seq_err[0x20];
3900
3901 u8 reserved_at_2e0[0x20];
3902
3903 u8 local_ack_timeout_err[0x20];
3904
3905 u8 reserved_at_320[0x4e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003906};
3907
3908struct mlx5_ifc_query_q_counter_in_bits {
3909 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003910 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003911
Matan Barakb4ff3a32016-02-09 14:57:42 +02003912 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003913 u8 op_mod[0x10];
3914
Matan Barakb4ff3a32016-02-09 14:57:42 +02003915 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003916
3917 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003918 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003919
Matan Barakb4ff3a32016-02-09 14:57:42 +02003920 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003921 u8 counter_set_id[0x8];
3922};
3923
3924struct mlx5_ifc_query_pages_out_bits {
3925 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003926 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003927
3928 u8 syndrome[0x20];
3929
Matan Barakb4ff3a32016-02-09 14:57:42 +02003930 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003931 u8 function_id[0x10];
3932
3933 u8 num_pages[0x20];
3934};
3935
3936enum {
3937 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
3938 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
3939 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
3940};
3941
3942struct mlx5_ifc_query_pages_in_bits {
3943 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003944 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003945
Matan Barakb4ff3a32016-02-09 14:57:42 +02003946 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003947 u8 op_mod[0x10];
3948
Matan Barakb4ff3a32016-02-09 14:57:42 +02003949 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003950 u8 function_id[0x10];
3951
Matan Barakb4ff3a32016-02-09 14:57:42 +02003952 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003953};
3954
3955struct mlx5_ifc_query_nic_vport_context_out_bits {
3956 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003957 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003958
3959 u8 syndrome[0x20];
3960
Matan Barakb4ff3a32016-02-09 14:57:42 +02003961 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003962
3963 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
3964};
3965
3966struct mlx5_ifc_query_nic_vport_context_in_bits {
3967 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003968 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003969
Matan Barakb4ff3a32016-02-09 14:57:42 +02003970 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003971 u8 op_mod[0x10];
3972
3973 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003974 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003975 u8 vport_number[0x10];
3976
Matan Barakb4ff3a32016-02-09 14:57:42 +02003977 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03003978 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003979 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003980};
3981
3982struct mlx5_ifc_query_mkey_out_bits {
3983 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003984 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003985
3986 u8 syndrome[0x20];
3987
Matan Barakb4ff3a32016-02-09 14:57:42 +02003988 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003989
3990 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
3991
Matan Barakb4ff3a32016-02-09 14:57:42 +02003992 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003993
3994 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
3995
3996 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
3997};
3998
3999struct mlx5_ifc_query_mkey_in_bits {
4000 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004001 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004002
Matan Barakb4ff3a32016-02-09 14:57:42 +02004003 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004004 u8 op_mod[0x10];
4005
Matan Barakb4ff3a32016-02-09 14:57:42 +02004006 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004007 u8 mkey_index[0x18];
4008
4009 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004010 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004011};
4012
4013struct mlx5_ifc_query_mad_demux_out_bits {
4014 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004015 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004016
4017 u8 syndrome[0x20];
4018
Matan Barakb4ff3a32016-02-09 14:57:42 +02004019 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004020
4021 u8 mad_dumux_parameters_block[0x20];
4022};
4023
4024struct mlx5_ifc_query_mad_demux_in_bits {
4025 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004026 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004027
Matan Barakb4ff3a32016-02-09 14:57:42 +02004028 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004029 u8 op_mod[0x10];
4030
Matan Barakb4ff3a32016-02-09 14:57:42 +02004031 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004032};
4033
4034struct mlx5_ifc_query_l2_table_entry_out_bits {
4035 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004036 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004037
4038 u8 syndrome[0x20];
4039
Matan Barakb4ff3a32016-02-09 14:57:42 +02004040 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004041
Matan Barakb4ff3a32016-02-09 14:57:42 +02004042 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004043 u8 vlan_valid[0x1];
4044 u8 vlan[0xc];
4045
4046 struct mlx5_ifc_mac_address_layout_bits mac_address;
4047
Matan Barakb4ff3a32016-02-09 14:57:42 +02004048 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004049};
4050
4051struct mlx5_ifc_query_l2_table_entry_in_bits {
4052 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004053 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004054
Matan Barakb4ff3a32016-02-09 14:57:42 +02004055 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004056 u8 op_mod[0x10];
4057
Matan Barakb4ff3a32016-02-09 14:57:42 +02004058 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004059
Matan Barakb4ff3a32016-02-09 14:57:42 +02004060 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004061 u8 table_index[0x18];
4062
Matan Barakb4ff3a32016-02-09 14:57:42 +02004063 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004064};
4065
4066struct mlx5_ifc_query_issi_out_bits {
4067 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004068 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004069
4070 u8 syndrome[0x20];
4071
Matan Barakb4ff3a32016-02-09 14:57:42 +02004072 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004073 u8 current_issi[0x10];
4074
Matan Barakb4ff3a32016-02-09 14:57:42 +02004075 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004076
Matan Barakb4ff3a32016-02-09 14:57:42 +02004077 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004078 u8 supported_issi_dw0[0x20];
4079};
4080
4081struct mlx5_ifc_query_issi_in_bits {
4082 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004083 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004084
Matan Barakb4ff3a32016-02-09 14:57:42 +02004085 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004086 u8 op_mod[0x10];
4087
Matan Barakb4ff3a32016-02-09 14:57:42 +02004088 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004089};
4090
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004091struct mlx5_ifc_set_driver_version_out_bits {
4092 u8 status[0x8];
4093 u8 reserved_0[0x18];
4094
4095 u8 syndrome[0x20];
4096 u8 reserved_1[0x40];
4097};
4098
4099struct mlx5_ifc_set_driver_version_in_bits {
4100 u8 opcode[0x10];
4101 u8 reserved_0[0x10];
4102
4103 u8 reserved_1[0x10];
4104 u8 op_mod[0x10];
4105
4106 u8 reserved_2[0x40];
4107 u8 driver_version[64][0x8];
4108};
4109
Saeed Mahameede2816822015-05-28 22:28:40 +03004110struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4111 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004112 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004113
4114 u8 syndrome[0x20];
4115
Matan Barakb4ff3a32016-02-09 14:57:42 +02004116 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004117
4118 struct mlx5_ifc_pkey_bits pkey[0];
4119};
4120
4121struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4122 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004123 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004124
Matan Barakb4ff3a32016-02-09 14:57:42 +02004125 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004126 u8 op_mod[0x10];
4127
4128 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004129 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004130 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004131 u8 vport_number[0x10];
4132
Matan Barakb4ff3a32016-02-09 14:57:42 +02004133 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004134 u8 pkey_index[0x10];
4135};
4136
Eli Coheneff901d2016-03-11 22:58:42 +02004137enum {
4138 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4139 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4140 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4141};
4142
Saeed Mahameede2816822015-05-28 22:28:40 +03004143struct mlx5_ifc_query_hca_vport_gid_out_bits {
4144 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004145 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004146
4147 u8 syndrome[0x20];
4148
Matan Barakb4ff3a32016-02-09 14:57:42 +02004149 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004150
4151 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004152 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004153
4154 struct mlx5_ifc_array128_auto_bits gid[0];
4155};
4156
4157struct mlx5_ifc_query_hca_vport_gid_in_bits {
4158 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004159 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004160
Matan Barakb4ff3a32016-02-09 14:57:42 +02004161 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004162 u8 op_mod[0x10];
4163
4164 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004165 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004166 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004167 u8 vport_number[0x10];
4168
Matan Barakb4ff3a32016-02-09 14:57:42 +02004169 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004170 u8 gid_index[0x10];
4171};
4172
4173struct mlx5_ifc_query_hca_vport_context_out_bits {
4174 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004175 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004176
4177 u8 syndrome[0x20];
4178
Matan Barakb4ff3a32016-02-09 14:57:42 +02004179 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004180
4181 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4182};
4183
4184struct mlx5_ifc_query_hca_vport_context_in_bits {
4185 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004186 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004187
Matan Barakb4ff3a32016-02-09 14:57:42 +02004188 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004189 u8 op_mod[0x10];
4190
4191 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004192 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004193 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004194 u8 vport_number[0x10];
4195
Matan Barakb4ff3a32016-02-09 14:57:42 +02004196 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004197};
4198
4199struct mlx5_ifc_query_hca_cap_out_bits {
4200 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004201 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004202
4203 u8 syndrome[0x20];
4204
Matan Barakb4ff3a32016-02-09 14:57:42 +02004205 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004206
4207 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004208};
4209
4210struct mlx5_ifc_query_hca_cap_in_bits {
4211 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004212 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004213
Matan Barakb4ff3a32016-02-09 14:57:42 +02004214 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004215 u8 op_mod[0x10];
4216
Matan Barakb4ff3a32016-02-09 14:57:42 +02004217 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004218};
4219
Saeed Mahameede2816822015-05-28 22:28:40 +03004220struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004221 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004222 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004223
4224 u8 syndrome[0x20];
4225
Matan Barakb4ff3a32016-02-09 14:57:42 +02004226 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004227
Matan Barakb4ff3a32016-02-09 14:57:42 +02004228 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004229 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004230 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004231 u8 log_size[0x8];
4232
Matan Barakb4ff3a32016-02-09 14:57:42 +02004233 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004234};
4235
Saeed Mahameede2816822015-05-28 22:28:40 +03004236struct mlx5_ifc_query_flow_table_in_bits {
4237 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004238 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004239
Matan Barakb4ff3a32016-02-09 14:57:42 +02004240 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004241 u8 op_mod[0x10];
4242
Matan Barakb4ff3a32016-02-09 14:57:42 +02004243 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004244
4245 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004246 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004247
Matan Barakb4ff3a32016-02-09 14:57:42 +02004248 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004249 u8 table_id[0x18];
4250
Matan Barakb4ff3a32016-02-09 14:57:42 +02004251 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004252};
4253
4254struct mlx5_ifc_query_fte_out_bits {
4255 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004256 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004257
4258 u8 syndrome[0x20];
4259
Matan Barakb4ff3a32016-02-09 14:57:42 +02004260 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004261
4262 struct mlx5_ifc_flow_context_bits flow_context;
4263};
4264
4265struct mlx5_ifc_query_fte_in_bits {
4266 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004267 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004268
Matan Barakb4ff3a32016-02-09 14:57:42 +02004269 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004270 u8 op_mod[0x10];
4271
Matan Barakb4ff3a32016-02-09 14:57:42 +02004272 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004273
4274 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004275 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004276
Matan Barakb4ff3a32016-02-09 14:57:42 +02004277 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004278 u8 table_id[0x18];
4279
Matan Barakb4ff3a32016-02-09 14:57:42 +02004280 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004281
4282 u8 flow_index[0x20];
4283
Matan Barakb4ff3a32016-02-09 14:57:42 +02004284 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004285};
4286
4287enum {
4288 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4289 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4290 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4291};
4292
4293struct mlx5_ifc_query_flow_group_out_bits {
4294 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004295 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004296
4297 u8 syndrome[0x20];
4298
Matan Barakb4ff3a32016-02-09 14:57:42 +02004299 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004300
4301 u8 start_flow_index[0x20];
4302
Matan Barakb4ff3a32016-02-09 14:57:42 +02004303 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004304
4305 u8 end_flow_index[0x20];
4306
Matan Barakb4ff3a32016-02-09 14:57:42 +02004307 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004308
Matan Barakb4ff3a32016-02-09 14:57:42 +02004309 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004310 u8 match_criteria_enable[0x8];
4311
4312 struct mlx5_ifc_fte_match_param_bits match_criteria;
4313
Matan Barakb4ff3a32016-02-09 14:57:42 +02004314 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004315};
4316
4317struct mlx5_ifc_query_flow_group_in_bits {
4318 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004319 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004320
Matan Barakb4ff3a32016-02-09 14:57:42 +02004321 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004322 u8 op_mod[0x10];
4323
Matan Barakb4ff3a32016-02-09 14:57:42 +02004324 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004325
4326 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004327 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004328
Matan Barakb4ff3a32016-02-09 14:57:42 +02004329 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004330 u8 table_id[0x18];
4331
4332 u8 group_id[0x20];
4333
Matan Barakb4ff3a32016-02-09 14:57:42 +02004334 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004335};
4336
Amir Vadai9dc0b282016-05-13 12:55:39 +00004337struct mlx5_ifc_query_flow_counter_out_bits {
4338 u8 status[0x8];
4339 u8 reserved_at_8[0x18];
4340
4341 u8 syndrome[0x20];
4342
4343 u8 reserved_at_40[0x40];
4344
4345 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4346};
4347
4348struct mlx5_ifc_query_flow_counter_in_bits {
4349 u8 opcode[0x10];
4350 u8 reserved_at_10[0x10];
4351
4352 u8 reserved_at_20[0x10];
4353 u8 op_mod[0x10];
4354
4355 u8 reserved_at_40[0x80];
4356
4357 u8 clear[0x1];
4358 u8 reserved_at_c1[0xf];
4359 u8 num_of_counters[0x10];
4360
4361 u8 reserved_at_e0[0x10];
4362 u8 flow_counter_id[0x10];
4363};
4364
Saeed Mahameedd6666752015-12-01 18:03:22 +02004365struct mlx5_ifc_query_esw_vport_context_out_bits {
4366 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004367 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004368
4369 u8 syndrome[0x20];
4370
Matan Barakb4ff3a32016-02-09 14:57:42 +02004371 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004372
4373 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4374};
4375
4376struct mlx5_ifc_query_esw_vport_context_in_bits {
4377 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004378 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004379
Matan Barakb4ff3a32016-02-09 14:57:42 +02004380 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004381 u8 op_mod[0x10];
4382
4383 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004384 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004385 u8 vport_number[0x10];
4386
Matan Barakb4ff3a32016-02-09 14:57:42 +02004387 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004388};
4389
4390struct mlx5_ifc_modify_esw_vport_context_out_bits {
4391 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004392 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004393
4394 u8 syndrome[0x20];
4395
Matan Barakb4ff3a32016-02-09 14:57:42 +02004396 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004397};
4398
4399struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004400 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004401 u8 vport_cvlan_insert[0x1];
4402 u8 vport_svlan_insert[0x1];
4403 u8 vport_cvlan_strip[0x1];
4404 u8 vport_svlan_strip[0x1];
4405};
4406
4407struct mlx5_ifc_modify_esw_vport_context_in_bits {
4408 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004409 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004410
Matan Barakb4ff3a32016-02-09 14:57:42 +02004411 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004412 u8 op_mod[0x10];
4413
4414 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004415 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004416 u8 vport_number[0x10];
4417
4418 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4419
4420 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4421};
4422
Saeed Mahameede2816822015-05-28 22:28:40 +03004423struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004424 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004425 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004426
4427 u8 syndrome[0x20];
4428
Matan Barakb4ff3a32016-02-09 14:57:42 +02004429 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004430
4431 struct mlx5_ifc_eqc_bits eq_context_entry;
4432
Matan Barakb4ff3a32016-02-09 14:57:42 +02004433 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004434
4435 u8 event_bitmask[0x40];
4436
Matan Barakb4ff3a32016-02-09 14:57:42 +02004437 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004438
4439 u8 pas[0][0x40];
4440};
4441
4442struct mlx5_ifc_query_eq_in_bits {
4443 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004444 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004445
Matan Barakb4ff3a32016-02-09 14:57:42 +02004446 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004447 u8 op_mod[0x10];
4448
Matan Barakb4ff3a32016-02-09 14:57:42 +02004449 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004450 u8 eq_number[0x8];
4451
Matan Barakb4ff3a32016-02-09 14:57:42 +02004452 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004453};
4454
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004455struct mlx5_ifc_encap_header_in_bits {
4456 u8 reserved_at_0[0x5];
4457 u8 header_type[0x3];
4458 u8 reserved_at_8[0xe];
4459 u8 encap_header_size[0xa];
4460
4461 u8 reserved_at_20[0x10];
4462 u8 encap_header[2][0x8];
4463
4464 u8 more_encap_header[0][0x8];
4465};
4466
4467struct mlx5_ifc_query_encap_header_out_bits {
4468 u8 status[0x8];
4469 u8 reserved_at_8[0x18];
4470
4471 u8 syndrome[0x20];
4472
4473 u8 reserved_at_40[0xa0];
4474
4475 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4476};
4477
4478struct mlx5_ifc_query_encap_header_in_bits {
4479 u8 opcode[0x10];
4480 u8 reserved_at_10[0x10];
4481
4482 u8 reserved_at_20[0x10];
4483 u8 op_mod[0x10];
4484
4485 u8 encap_id[0x20];
4486
4487 u8 reserved_at_60[0xa0];
4488};
4489
4490struct mlx5_ifc_alloc_encap_header_out_bits {
4491 u8 status[0x8];
4492 u8 reserved_at_8[0x18];
4493
4494 u8 syndrome[0x20];
4495
4496 u8 encap_id[0x20];
4497
4498 u8 reserved_at_60[0x20];
4499};
4500
4501struct mlx5_ifc_alloc_encap_header_in_bits {
4502 u8 opcode[0x10];
4503 u8 reserved_at_10[0x10];
4504
4505 u8 reserved_at_20[0x10];
4506 u8 op_mod[0x10];
4507
4508 u8 reserved_at_40[0xa0];
4509
4510 struct mlx5_ifc_encap_header_in_bits encap_header;
4511};
4512
4513struct mlx5_ifc_dealloc_encap_header_out_bits {
4514 u8 status[0x8];
4515 u8 reserved_at_8[0x18];
4516
4517 u8 syndrome[0x20];
4518
4519 u8 reserved_at_40[0x40];
4520};
4521
4522struct mlx5_ifc_dealloc_encap_header_in_bits {
4523 u8 opcode[0x10];
4524 u8 reserved_at_10[0x10];
4525
4526 u8 reserved_20[0x10];
4527 u8 op_mod[0x10];
4528
4529 u8 encap_id[0x20];
4530
4531 u8 reserved_60[0x20];
4532};
4533
Saeed Mahameede2816822015-05-28 22:28:40 +03004534struct mlx5_ifc_query_dct_out_bits {
4535 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004536 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004537
4538 u8 syndrome[0x20];
4539
Matan Barakb4ff3a32016-02-09 14:57:42 +02004540 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004541
4542 struct mlx5_ifc_dctc_bits dct_context_entry;
4543
Matan Barakb4ff3a32016-02-09 14:57:42 +02004544 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004545};
4546
4547struct mlx5_ifc_query_dct_in_bits {
4548 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004549 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004550
Matan Barakb4ff3a32016-02-09 14:57:42 +02004551 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004552 u8 op_mod[0x10];
4553
Matan Barakb4ff3a32016-02-09 14:57:42 +02004554 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004555 u8 dctn[0x18];
4556
Matan Barakb4ff3a32016-02-09 14:57:42 +02004557 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004558};
4559
4560struct mlx5_ifc_query_cq_out_bits {
4561 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004562 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004563
4564 u8 syndrome[0x20];
4565
Matan Barakb4ff3a32016-02-09 14:57:42 +02004566 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004567
4568 struct mlx5_ifc_cqc_bits cq_context;
4569
Matan Barakb4ff3a32016-02-09 14:57:42 +02004570 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004571
4572 u8 pas[0][0x40];
4573};
4574
4575struct mlx5_ifc_query_cq_in_bits {
4576 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004577 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004578
Matan Barakb4ff3a32016-02-09 14:57:42 +02004579 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004580 u8 op_mod[0x10];
4581
Matan Barakb4ff3a32016-02-09 14:57:42 +02004582 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004583 u8 cqn[0x18];
4584
Matan Barakb4ff3a32016-02-09 14:57:42 +02004585 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004586};
4587
4588struct mlx5_ifc_query_cong_status_out_bits {
4589 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004590 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004591
4592 u8 syndrome[0x20];
4593
Matan Barakb4ff3a32016-02-09 14:57:42 +02004594 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004595
4596 u8 enable[0x1];
4597 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004598 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004599};
4600
4601struct mlx5_ifc_query_cong_status_in_bits {
4602 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004603 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004604
Matan Barakb4ff3a32016-02-09 14:57:42 +02004605 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004606 u8 op_mod[0x10];
4607
Matan Barakb4ff3a32016-02-09 14:57:42 +02004608 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004609 u8 priority[0x4];
4610 u8 cong_protocol[0x4];
4611
Matan Barakb4ff3a32016-02-09 14:57:42 +02004612 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004613};
4614
4615struct mlx5_ifc_query_cong_statistics_out_bits {
4616 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004617 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004618
4619 u8 syndrome[0x20];
4620
Matan Barakb4ff3a32016-02-09 14:57:42 +02004621 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004622
4623 u8 cur_flows[0x20];
4624
4625 u8 sum_flows[0x20];
4626
4627 u8 cnp_ignored_high[0x20];
4628
4629 u8 cnp_ignored_low[0x20];
4630
4631 u8 cnp_handled_high[0x20];
4632
4633 u8 cnp_handled_low[0x20];
4634
Matan Barakb4ff3a32016-02-09 14:57:42 +02004635 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004636
4637 u8 time_stamp_high[0x20];
4638
4639 u8 time_stamp_low[0x20];
4640
4641 u8 accumulators_period[0x20];
4642
4643 u8 ecn_marked_roce_packets_high[0x20];
4644
4645 u8 ecn_marked_roce_packets_low[0x20];
4646
4647 u8 cnps_sent_high[0x20];
4648
4649 u8 cnps_sent_low[0x20];
4650
Matan Barakb4ff3a32016-02-09 14:57:42 +02004651 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004652};
4653
4654struct mlx5_ifc_query_cong_statistics_in_bits {
4655 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004656 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004657
Matan Barakb4ff3a32016-02-09 14:57:42 +02004658 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004659 u8 op_mod[0x10];
4660
4661 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004662 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004663
Matan Barakb4ff3a32016-02-09 14:57:42 +02004664 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004665};
4666
4667struct mlx5_ifc_query_cong_params_out_bits {
4668 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004669 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004670
4671 u8 syndrome[0x20];
4672
Matan Barakb4ff3a32016-02-09 14:57:42 +02004673 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004674
4675 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4676};
4677
4678struct mlx5_ifc_query_cong_params_in_bits {
4679 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004680 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004681
Matan Barakb4ff3a32016-02-09 14:57:42 +02004682 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004683 u8 op_mod[0x10];
4684
Matan Barakb4ff3a32016-02-09 14:57:42 +02004685 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004686 u8 cong_protocol[0x4];
4687
Matan Barakb4ff3a32016-02-09 14:57:42 +02004688 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004689};
4690
4691struct mlx5_ifc_query_adapter_out_bits {
4692 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004693 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004694
4695 u8 syndrome[0x20];
4696
Matan Barakb4ff3a32016-02-09 14:57:42 +02004697 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004698
4699 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4700};
4701
4702struct mlx5_ifc_query_adapter_in_bits {
4703 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004704 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004705
Matan Barakb4ff3a32016-02-09 14:57:42 +02004706 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004707 u8 op_mod[0x10];
4708
Matan Barakb4ff3a32016-02-09 14:57:42 +02004709 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004710};
4711
4712struct mlx5_ifc_qp_2rst_out_bits {
4713 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004714 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004715
4716 u8 syndrome[0x20];
4717
Matan Barakb4ff3a32016-02-09 14:57:42 +02004718 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004719};
4720
4721struct mlx5_ifc_qp_2rst_in_bits {
4722 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004723 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004724
Matan Barakb4ff3a32016-02-09 14:57:42 +02004725 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004726 u8 op_mod[0x10];
4727
Matan Barakb4ff3a32016-02-09 14:57:42 +02004728 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004729 u8 qpn[0x18];
4730
Matan Barakb4ff3a32016-02-09 14:57:42 +02004731 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004732};
4733
4734struct mlx5_ifc_qp_2err_out_bits {
4735 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004736 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004737
4738 u8 syndrome[0x20];
4739
Matan Barakb4ff3a32016-02-09 14:57:42 +02004740 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004741};
4742
4743struct mlx5_ifc_qp_2err_in_bits {
4744 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004745 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004746
Matan Barakb4ff3a32016-02-09 14:57:42 +02004747 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004748 u8 op_mod[0x10];
4749
Matan Barakb4ff3a32016-02-09 14:57:42 +02004750 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004751 u8 qpn[0x18];
4752
Matan Barakb4ff3a32016-02-09 14:57:42 +02004753 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004754};
4755
4756struct mlx5_ifc_page_fault_resume_out_bits {
4757 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004758 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004759
4760 u8 syndrome[0x20];
4761
Matan Barakb4ff3a32016-02-09 14:57:42 +02004762 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004763};
4764
4765struct mlx5_ifc_page_fault_resume_in_bits {
4766 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004767 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004768
Matan Barakb4ff3a32016-02-09 14:57:42 +02004769 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004770 u8 op_mod[0x10];
4771
4772 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004773 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004774 u8 page_fault_type[0x3];
4775 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004776
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004777 u8 reserved_at_60[0x8];
4778 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004779};
4780
4781struct mlx5_ifc_nop_out_bits {
4782 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004783 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004784
4785 u8 syndrome[0x20];
4786
Matan Barakb4ff3a32016-02-09 14:57:42 +02004787 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004788};
4789
4790struct mlx5_ifc_nop_in_bits {
4791 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004792 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004793
Matan Barakb4ff3a32016-02-09 14:57:42 +02004794 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004795 u8 op_mod[0x10];
4796
Matan Barakb4ff3a32016-02-09 14:57:42 +02004797 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004798};
4799
4800struct mlx5_ifc_modify_vport_state_out_bits {
4801 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004802 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004803
4804 u8 syndrome[0x20];
4805
Matan Barakb4ff3a32016-02-09 14:57:42 +02004806 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004807};
4808
4809struct mlx5_ifc_modify_vport_state_in_bits {
4810 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004811 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004812
Matan Barakb4ff3a32016-02-09 14:57:42 +02004813 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004814 u8 op_mod[0x10];
4815
4816 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004817 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004818 u8 vport_number[0x10];
4819
Matan Barakb4ff3a32016-02-09 14:57:42 +02004820 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004821 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004822 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004823};
4824
4825struct mlx5_ifc_modify_tis_out_bits {
4826 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004827 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004828
4829 u8 syndrome[0x20];
4830
Matan Barakb4ff3a32016-02-09 14:57:42 +02004831 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004832};
4833
majd@mellanox.com75850d02016-01-14 19:13:06 +02004834struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004835 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004836
Aviv Heller84df61e2016-05-10 13:47:50 +03004837 u8 reserved_at_20[0x1d];
4838 u8 lag_tx_port_affinity[0x1];
4839 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004840 u8 prio[0x1];
4841};
4842
Saeed Mahameede2816822015-05-28 22:28:40 +03004843struct mlx5_ifc_modify_tis_in_bits {
4844 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004845 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004846
Matan Barakb4ff3a32016-02-09 14:57:42 +02004847 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004848 u8 op_mod[0x10];
4849
Matan Barakb4ff3a32016-02-09 14:57:42 +02004850 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004851 u8 tisn[0x18];
4852
Matan Barakb4ff3a32016-02-09 14:57:42 +02004853 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004854
majd@mellanox.com75850d02016-01-14 19:13:06 +02004855 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03004856
Matan Barakb4ff3a32016-02-09 14:57:42 +02004857 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004858
4859 struct mlx5_ifc_tisc_bits ctx;
4860};
4861
Achiad Shochatd9eea402015-08-04 14:05:42 +03004862struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004863 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03004864
Matan Barakb4ff3a32016-02-09 14:57:42 +02004865 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02004866 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02004867 u8 reserved_at_3c[0x1];
4868 u8 hash[0x1];
4869 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03004870 u8 lro[0x1];
4871};
4872
Saeed Mahameede2816822015-05-28 22:28:40 +03004873struct mlx5_ifc_modify_tir_out_bits {
4874 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004875 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004876
4877 u8 syndrome[0x20];
4878
Matan Barakb4ff3a32016-02-09 14:57:42 +02004879 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004880};
4881
4882struct mlx5_ifc_modify_tir_in_bits {
4883 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004884 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004885
Matan Barakb4ff3a32016-02-09 14:57:42 +02004886 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004887 u8 op_mod[0x10];
4888
Matan Barakb4ff3a32016-02-09 14:57:42 +02004889 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004890 u8 tirn[0x18];
4891
Matan Barakb4ff3a32016-02-09 14:57:42 +02004892 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004893
Achiad Shochatd9eea402015-08-04 14:05:42 +03004894 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03004895
Matan Barakb4ff3a32016-02-09 14:57:42 +02004896 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004897
4898 struct mlx5_ifc_tirc_bits ctx;
4899};
4900
4901struct mlx5_ifc_modify_sq_out_bits {
4902 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004903 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004904
4905 u8 syndrome[0x20];
4906
Matan Barakb4ff3a32016-02-09 14:57:42 +02004907 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004908};
4909
4910struct mlx5_ifc_modify_sq_in_bits {
4911 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004912 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004913
Matan Barakb4ff3a32016-02-09 14:57:42 +02004914 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004915 u8 op_mod[0x10];
4916
4917 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004918 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004919 u8 sqn[0x18];
4920
Matan Barakb4ff3a32016-02-09 14:57:42 +02004921 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004922
4923 u8 modify_bitmask[0x40];
4924
Matan Barakb4ff3a32016-02-09 14:57:42 +02004925 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004926
4927 struct mlx5_ifc_sqc_bits ctx;
4928};
4929
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03004930struct mlx5_ifc_modify_scheduling_element_out_bits {
4931 u8 status[0x8];
4932 u8 reserved_at_8[0x18];
4933
4934 u8 syndrome[0x20];
4935
4936 u8 reserved_at_40[0x1c0];
4937};
4938
4939enum {
4940 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
4941 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
4942};
4943
4944struct mlx5_ifc_modify_scheduling_element_in_bits {
4945 u8 opcode[0x10];
4946 u8 reserved_at_10[0x10];
4947
4948 u8 reserved_at_20[0x10];
4949 u8 op_mod[0x10];
4950
4951 u8 scheduling_hierarchy[0x8];
4952 u8 reserved_at_48[0x18];
4953
4954 u8 scheduling_element_id[0x20];
4955
4956 u8 reserved_at_80[0x20];
4957
4958 u8 modify_bitmask[0x20];
4959
4960 u8 reserved_at_c0[0x40];
4961
4962 struct mlx5_ifc_scheduling_context_bits scheduling_context;
4963
4964 u8 reserved_at_300[0x100];
4965};
4966
Saeed Mahameede2816822015-05-28 22:28:40 +03004967struct mlx5_ifc_modify_rqt_out_bits {
4968 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004969 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004970
4971 u8 syndrome[0x20];
4972
Matan Barakb4ff3a32016-02-09 14:57:42 +02004973 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004974};
4975
Achiad Shochat5c503682015-08-04 14:05:43 +03004976struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004977 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03004978
Matan Barakb4ff3a32016-02-09 14:57:42 +02004979 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03004980 u8 rqn_list[0x1];
4981};
4982
Saeed Mahameede2816822015-05-28 22:28:40 +03004983struct mlx5_ifc_modify_rqt_in_bits {
4984 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004985 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004986
Matan Barakb4ff3a32016-02-09 14:57:42 +02004987 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004988 u8 op_mod[0x10];
4989
Matan Barakb4ff3a32016-02-09 14:57:42 +02004990 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004991 u8 rqtn[0x18];
4992
Matan Barakb4ff3a32016-02-09 14:57:42 +02004993 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004994
Achiad Shochat5c503682015-08-04 14:05:43 +03004995 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03004996
Matan Barakb4ff3a32016-02-09 14:57:42 +02004997 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004998
4999 struct mlx5_ifc_rqtc_bits ctx;
5000};
5001
5002struct mlx5_ifc_modify_rq_out_bits {
5003 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005004 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005005
5006 u8 syndrome[0x20];
5007
Matan Barakb4ff3a32016-02-09 14:57:42 +02005008 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005009};
5010
Alex Vesker83b502a2016-08-04 17:32:02 +03005011enum {
5012 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
5013 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_MODIFY_RQ_COUNTER_SET_ID = 1ULL << 3,
5014};
5015
Saeed Mahameede2816822015-05-28 22:28:40 +03005016struct mlx5_ifc_modify_rq_in_bits {
5017 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005018 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005019
Matan Barakb4ff3a32016-02-09 14:57:42 +02005020 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005021 u8 op_mod[0x10];
5022
5023 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005024 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005025 u8 rqn[0x18];
5026
Matan Barakb4ff3a32016-02-09 14:57:42 +02005027 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005028
5029 u8 modify_bitmask[0x40];
5030
Matan Barakb4ff3a32016-02-09 14:57:42 +02005031 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005032
5033 struct mlx5_ifc_rqc_bits ctx;
5034};
5035
5036struct mlx5_ifc_modify_rmp_out_bits {
5037 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005038 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005039
5040 u8 syndrome[0x20];
5041
Matan Barakb4ff3a32016-02-09 14:57:42 +02005042 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005043};
5044
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005045struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005046 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005047
Matan Barakb4ff3a32016-02-09 14:57:42 +02005048 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005049 u8 lwm[0x1];
5050};
5051
Saeed Mahameede2816822015-05-28 22:28:40 +03005052struct mlx5_ifc_modify_rmp_in_bits {
5053 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005054 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005055
Matan Barakb4ff3a32016-02-09 14:57:42 +02005056 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005057 u8 op_mod[0x10];
5058
5059 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005060 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005061 u8 rmpn[0x18];
5062
Matan Barakb4ff3a32016-02-09 14:57:42 +02005063 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005064
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005065 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005066
Matan Barakb4ff3a32016-02-09 14:57:42 +02005067 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005068
5069 struct mlx5_ifc_rmpc_bits ctx;
5070};
5071
5072struct mlx5_ifc_modify_nic_vport_context_out_bits {
5073 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005074 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005075
5076 u8 syndrome[0x20];
5077
Matan Barakb4ff3a32016-02-09 14:57:42 +02005078 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005079};
5080
5081struct mlx5_ifc_modify_nic_vport_field_select_bits {
Noa Osherovich23898c72016-06-10 00:07:37 +03005082 u8 reserved_at_0[0x16];
5083 u8 node_guid[0x1];
5084 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005085 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005086 u8 mtu[0x1];
5087 u8 change_event[0x1];
5088 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005089 u8 permanent_address[0x1];
5090 u8 addresses_list[0x1];
5091 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005092 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005093};
5094
5095struct mlx5_ifc_modify_nic_vport_context_in_bits {
5096 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005097 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005098
Matan Barakb4ff3a32016-02-09 14:57:42 +02005099 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005100 u8 op_mod[0x10];
5101
5102 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005103 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005104 u8 vport_number[0x10];
5105
5106 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5107
Matan Barakb4ff3a32016-02-09 14:57:42 +02005108 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005109
5110 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5111};
5112
5113struct mlx5_ifc_modify_hca_vport_context_out_bits {
5114 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005115 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005116
5117 u8 syndrome[0x20];
5118
Matan Barakb4ff3a32016-02-09 14:57:42 +02005119 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005120};
5121
5122struct mlx5_ifc_modify_hca_vport_context_in_bits {
5123 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005124 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005125
Matan Barakb4ff3a32016-02-09 14:57:42 +02005126 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005127 u8 op_mod[0x10];
5128
5129 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005130 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005131 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005132 u8 vport_number[0x10];
5133
Matan Barakb4ff3a32016-02-09 14:57:42 +02005134 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005135
5136 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5137};
5138
5139struct mlx5_ifc_modify_cq_out_bits {
5140 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005141 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005142
5143 u8 syndrome[0x20];
5144
Matan Barakb4ff3a32016-02-09 14:57:42 +02005145 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005146};
5147
5148enum {
5149 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5150 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5151};
5152
5153struct mlx5_ifc_modify_cq_in_bits {
5154 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005155 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005156
Matan Barakb4ff3a32016-02-09 14:57:42 +02005157 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005158 u8 op_mod[0x10];
5159
Matan Barakb4ff3a32016-02-09 14:57:42 +02005160 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005161 u8 cqn[0x18];
5162
5163 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5164
5165 struct mlx5_ifc_cqc_bits cq_context;
5166
Matan Barakb4ff3a32016-02-09 14:57:42 +02005167 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005168
5169 u8 pas[0][0x40];
5170};
5171
5172struct mlx5_ifc_modify_cong_status_out_bits {
5173 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005174 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005175
5176 u8 syndrome[0x20];
5177
Matan Barakb4ff3a32016-02-09 14:57:42 +02005178 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005179};
5180
5181struct mlx5_ifc_modify_cong_status_in_bits {
5182 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005183 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005184
Matan Barakb4ff3a32016-02-09 14:57:42 +02005185 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005186 u8 op_mod[0x10];
5187
Matan Barakb4ff3a32016-02-09 14:57:42 +02005188 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005189 u8 priority[0x4];
5190 u8 cong_protocol[0x4];
5191
5192 u8 enable[0x1];
5193 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005194 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005195};
5196
5197struct mlx5_ifc_modify_cong_params_out_bits {
5198 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005199 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005200
5201 u8 syndrome[0x20];
5202
Matan Barakb4ff3a32016-02-09 14:57:42 +02005203 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005204};
5205
5206struct mlx5_ifc_modify_cong_params_in_bits {
5207 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005208 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005209
Matan Barakb4ff3a32016-02-09 14:57:42 +02005210 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005211 u8 op_mod[0x10];
5212
Matan Barakb4ff3a32016-02-09 14:57:42 +02005213 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005214 u8 cong_protocol[0x4];
5215
5216 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5217
Matan Barakb4ff3a32016-02-09 14:57:42 +02005218 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005219
5220 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5221};
5222
5223struct mlx5_ifc_manage_pages_out_bits {
5224 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005225 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005226
5227 u8 syndrome[0x20];
5228
5229 u8 output_num_entries[0x20];
5230
Matan Barakb4ff3a32016-02-09 14:57:42 +02005231 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005232
5233 u8 pas[0][0x40];
5234};
5235
5236enum {
5237 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5238 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5239 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5240};
5241
5242struct mlx5_ifc_manage_pages_in_bits {
5243 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005244 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005245
Matan Barakb4ff3a32016-02-09 14:57:42 +02005246 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005247 u8 op_mod[0x10];
5248
Matan Barakb4ff3a32016-02-09 14:57:42 +02005249 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005250 u8 function_id[0x10];
5251
5252 u8 input_num_entries[0x20];
5253
5254 u8 pas[0][0x40];
5255};
5256
5257struct mlx5_ifc_mad_ifc_out_bits {
5258 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005259 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005260
5261 u8 syndrome[0x20];
5262
Matan Barakb4ff3a32016-02-09 14:57:42 +02005263 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005264
5265 u8 response_mad_packet[256][0x8];
5266};
5267
5268struct mlx5_ifc_mad_ifc_in_bits {
5269 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005270 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005271
Matan Barakb4ff3a32016-02-09 14:57:42 +02005272 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005273 u8 op_mod[0x10];
5274
5275 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005276 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005277 u8 port[0x8];
5278
Matan Barakb4ff3a32016-02-09 14:57:42 +02005279 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005280
5281 u8 mad[256][0x8];
5282};
5283
5284struct mlx5_ifc_init_hca_out_bits {
5285 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005286 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005287
5288 u8 syndrome[0x20];
5289
Matan Barakb4ff3a32016-02-09 14:57:42 +02005290 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005291};
5292
5293struct mlx5_ifc_init_hca_in_bits {
5294 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005295 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005296
Matan Barakb4ff3a32016-02-09 14:57:42 +02005297 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005298 u8 op_mod[0x10];
5299
Matan Barakb4ff3a32016-02-09 14:57:42 +02005300 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005301};
5302
5303struct mlx5_ifc_init2rtr_qp_out_bits {
5304 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005305 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005306
5307 u8 syndrome[0x20];
5308
Matan Barakb4ff3a32016-02-09 14:57:42 +02005309 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005310};
5311
5312struct mlx5_ifc_init2rtr_qp_in_bits {
5313 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005314 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005315
Matan Barakb4ff3a32016-02-09 14:57:42 +02005316 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005317 u8 op_mod[0x10];
5318
Matan Barakb4ff3a32016-02-09 14:57:42 +02005319 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005320 u8 qpn[0x18];
5321
Matan Barakb4ff3a32016-02-09 14:57:42 +02005322 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005323
5324 u8 opt_param_mask[0x20];
5325
Matan Barakb4ff3a32016-02-09 14:57:42 +02005326 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005327
5328 struct mlx5_ifc_qpc_bits qpc;
5329
Matan Barakb4ff3a32016-02-09 14:57:42 +02005330 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005331};
5332
5333struct mlx5_ifc_init2init_qp_out_bits {
5334 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005335 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005336
5337 u8 syndrome[0x20];
5338
Matan Barakb4ff3a32016-02-09 14:57:42 +02005339 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005340};
5341
5342struct mlx5_ifc_init2init_qp_in_bits {
5343 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005344 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005345
Matan Barakb4ff3a32016-02-09 14:57:42 +02005346 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005347 u8 op_mod[0x10];
5348
Matan Barakb4ff3a32016-02-09 14:57:42 +02005349 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005350 u8 qpn[0x18];
5351
Matan Barakb4ff3a32016-02-09 14:57:42 +02005352 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005353
5354 u8 opt_param_mask[0x20];
5355
Matan Barakb4ff3a32016-02-09 14:57:42 +02005356 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005357
5358 struct mlx5_ifc_qpc_bits qpc;
5359
Matan Barakb4ff3a32016-02-09 14:57:42 +02005360 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005361};
5362
5363struct mlx5_ifc_get_dropped_packet_log_out_bits {
5364 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005365 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005366
5367 u8 syndrome[0x20];
5368
Matan Barakb4ff3a32016-02-09 14:57:42 +02005369 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005370
5371 u8 packet_headers_log[128][0x8];
5372
5373 u8 packet_syndrome[64][0x8];
5374};
5375
5376struct mlx5_ifc_get_dropped_packet_log_in_bits {
5377 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005378 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005379
Matan Barakb4ff3a32016-02-09 14:57:42 +02005380 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005381 u8 op_mod[0x10];
5382
Matan Barakb4ff3a32016-02-09 14:57:42 +02005383 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005384};
5385
5386struct mlx5_ifc_gen_eqe_in_bits {
5387 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005388 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005389
Matan Barakb4ff3a32016-02-09 14:57:42 +02005390 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005391 u8 op_mod[0x10];
5392
Matan Barakb4ff3a32016-02-09 14:57:42 +02005393 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005394 u8 eq_number[0x8];
5395
Matan Barakb4ff3a32016-02-09 14:57:42 +02005396 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005397
5398 u8 eqe[64][0x8];
5399};
5400
5401struct mlx5_ifc_gen_eq_out_bits {
5402 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005403 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005404
5405 u8 syndrome[0x20];
5406
Matan Barakb4ff3a32016-02-09 14:57:42 +02005407 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005408};
5409
5410struct mlx5_ifc_enable_hca_out_bits {
5411 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005412 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005413
5414 u8 syndrome[0x20];
5415
Matan Barakb4ff3a32016-02-09 14:57:42 +02005416 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005417};
5418
5419struct mlx5_ifc_enable_hca_in_bits {
5420 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005421 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005422
Matan Barakb4ff3a32016-02-09 14:57:42 +02005423 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005424 u8 op_mod[0x10];
5425
Matan Barakb4ff3a32016-02-09 14:57:42 +02005426 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005427 u8 function_id[0x10];
5428
Matan Barakb4ff3a32016-02-09 14:57:42 +02005429 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005430};
5431
5432struct mlx5_ifc_drain_dct_out_bits {
5433 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005434 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005435
5436 u8 syndrome[0x20];
5437
Matan Barakb4ff3a32016-02-09 14:57:42 +02005438 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005439};
5440
5441struct mlx5_ifc_drain_dct_in_bits {
5442 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005443 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005444
Matan Barakb4ff3a32016-02-09 14:57:42 +02005445 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005446 u8 op_mod[0x10];
5447
Matan Barakb4ff3a32016-02-09 14:57:42 +02005448 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005449 u8 dctn[0x18];
5450
Matan Barakb4ff3a32016-02-09 14:57:42 +02005451 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005452};
5453
5454struct mlx5_ifc_disable_hca_out_bits {
5455 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005456 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005457
5458 u8 syndrome[0x20];
5459
Matan Barakb4ff3a32016-02-09 14:57:42 +02005460 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005461};
5462
5463struct mlx5_ifc_disable_hca_in_bits {
5464 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005465 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005466
Matan Barakb4ff3a32016-02-09 14:57:42 +02005467 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005468 u8 op_mod[0x10];
5469
Matan Barakb4ff3a32016-02-09 14:57:42 +02005470 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005471 u8 function_id[0x10];
5472
Matan Barakb4ff3a32016-02-09 14:57:42 +02005473 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005474};
5475
5476struct mlx5_ifc_detach_from_mcg_out_bits {
5477 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005478 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005479
5480 u8 syndrome[0x20];
5481
Matan Barakb4ff3a32016-02-09 14:57:42 +02005482 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005483};
5484
5485struct mlx5_ifc_detach_from_mcg_in_bits {
5486 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005487 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005488
Matan Barakb4ff3a32016-02-09 14:57:42 +02005489 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005490 u8 op_mod[0x10];
5491
Matan Barakb4ff3a32016-02-09 14:57:42 +02005492 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005493 u8 qpn[0x18];
5494
Matan Barakb4ff3a32016-02-09 14:57:42 +02005495 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005496
5497 u8 multicast_gid[16][0x8];
5498};
5499
Saeed Mahameed74862162016-06-09 15:11:34 +03005500struct mlx5_ifc_destroy_xrq_out_bits {
5501 u8 status[0x8];
5502 u8 reserved_at_8[0x18];
5503
5504 u8 syndrome[0x20];
5505
5506 u8 reserved_at_40[0x40];
5507};
5508
5509struct mlx5_ifc_destroy_xrq_in_bits {
5510 u8 opcode[0x10];
5511 u8 reserved_at_10[0x10];
5512
5513 u8 reserved_at_20[0x10];
5514 u8 op_mod[0x10];
5515
5516 u8 reserved_at_40[0x8];
5517 u8 xrqn[0x18];
5518
5519 u8 reserved_at_60[0x20];
5520};
5521
Saeed Mahameede2816822015-05-28 22:28:40 +03005522struct mlx5_ifc_destroy_xrc_srq_out_bits {
5523 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005524 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005525
5526 u8 syndrome[0x20];
5527
Matan Barakb4ff3a32016-02-09 14:57:42 +02005528 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005529};
5530
5531struct mlx5_ifc_destroy_xrc_srq_in_bits {
5532 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005533 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005534
Matan Barakb4ff3a32016-02-09 14:57:42 +02005535 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005536 u8 op_mod[0x10];
5537
Matan Barakb4ff3a32016-02-09 14:57:42 +02005538 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005539 u8 xrc_srqn[0x18];
5540
Matan Barakb4ff3a32016-02-09 14:57:42 +02005541 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005542};
5543
5544struct mlx5_ifc_destroy_tis_out_bits {
5545 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005546 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005547
5548 u8 syndrome[0x20];
5549
Matan Barakb4ff3a32016-02-09 14:57:42 +02005550 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005551};
5552
5553struct mlx5_ifc_destroy_tis_in_bits {
5554 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005555 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005556
Matan Barakb4ff3a32016-02-09 14:57:42 +02005557 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005558 u8 op_mod[0x10];
5559
Matan Barakb4ff3a32016-02-09 14:57:42 +02005560 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005561 u8 tisn[0x18];
5562
Matan Barakb4ff3a32016-02-09 14:57:42 +02005563 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005564};
5565
5566struct mlx5_ifc_destroy_tir_out_bits {
5567 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005568 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005569
5570 u8 syndrome[0x20];
5571
Matan Barakb4ff3a32016-02-09 14:57:42 +02005572 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005573};
5574
5575struct mlx5_ifc_destroy_tir_in_bits {
5576 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005577 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005578
Matan Barakb4ff3a32016-02-09 14:57:42 +02005579 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005580 u8 op_mod[0x10];
5581
Matan Barakb4ff3a32016-02-09 14:57:42 +02005582 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005583 u8 tirn[0x18];
5584
Matan Barakb4ff3a32016-02-09 14:57:42 +02005585 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005586};
5587
5588struct mlx5_ifc_destroy_srq_out_bits {
5589 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005590 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005591
5592 u8 syndrome[0x20];
5593
Matan Barakb4ff3a32016-02-09 14:57:42 +02005594 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005595};
5596
5597struct mlx5_ifc_destroy_srq_in_bits {
5598 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005599 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005600
Matan Barakb4ff3a32016-02-09 14:57:42 +02005601 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005602 u8 op_mod[0x10];
5603
Matan Barakb4ff3a32016-02-09 14:57:42 +02005604 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005605 u8 srqn[0x18];
5606
Matan Barakb4ff3a32016-02-09 14:57:42 +02005607 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005608};
5609
5610struct mlx5_ifc_destroy_sq_out_bits {
5611 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005612 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005613
5614 u8 syndrome[0x20];
5615
Matan Barakb4ff3a32016-02-09 14:57:42 +02005616 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005617};
5618
5619struct mlx5_ifc_destroy_sq_in_bits {
5620 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005621 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005622
Matan Barakb4ff3a32016-02-09 14:57:42 +02005623 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005624 u8 op_mod[0x10];
5625
Matan Barakb4ff3a32016-02-09 14:57:42 +02005626 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005627 u8 sqn[0x18];
5628
Matan Barakb4ff3a32016-02-09 14:57:42 +02005629 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005630};
5631
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005632struct mlx5_ifc_destroy_scheduling_element_out_bits {
5633 u8 status[0x8];
5634 u8 reserved_at_8[0x18];
5635
5636 u8 syndrome[0x20];
5637
5638 u8 reserved_at_40[0x1c0];
5639};
5640
5641struct mlx5_ifc_destroy_scheduling_element_in_bits {
5642 u8 opcode[0x10];
5643 u8 reserved_at_10[0x10];
5644
5645 u8 reserved_at_20[0x10];
5646 u8 op_mod[0x10];
5647
5648 u8 scheduling_hierarchy[0x8];
5649 u8 reserved_at_48[0x18];
5650
5651 u8 scheduling_element_id[0x20];
5652
5653 u8 reserved_at_80[0x180];
5654};
5655
Saeed Mahameede2816822015-05-28 22:28:40 +03005656struct mlx5_ifc_destroy_rqt_out_bits {
5657 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005658 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005659
5660 u8 syndrome[0x20];
5661
Matan Barakb4ff3a32016-02-09 14:57:42 +02005662 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005663};
5664
5665struct mlx5_ifc_destroy_rqt_in_bits {
5666 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005667 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005668
Matan Barakb4ff3a32016-02-09 14:57:42 +02005669 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005670 u8 op_mod[0x10];
5671
Matan Barakb4ff3a32016-02-09 14:57:42 +02005672 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005673 u8 rqtn[0x18];
5674
Matan Barakb4ff3a32016-02-09 14:57:42 +02005675 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005676};
5677
5678struct mlx5_ifc_destroy_rq_out_bits {
5679 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005680 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005681
5682 u8 syndrome[0x20];
5683
Matan Barakb4ff3a32016-02-09 14:57:42 +02005684 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005685};
5686
5687struct mlx5_ifc_destroy_rq_in_bits {
5688 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005689 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005690
Matan Barakb4ff3a32016-02-09 14:57:42 +02005691 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005692 u8 op_mod[0x10];
5693
Matan Barakb4ff3a32016-02-09 14:57:42 +02005694 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005695 u8 rqn[0x18];
5696
Matan Barakb4ff3a32016-02-09 14:57:42 +02005697 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005698};
5699
5700struct mlx5_ifc_destroy_rmp_out_bits {
5701 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005702 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005703
5704 u8 syndrome[0x20];
5705
Matan Barakb4ff3a32016-02-09 14:57:42 +02005706 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005707};
5708
5709struct mlx5_ifc_destroy_rmp_in_bits {
5710 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005711 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005712
Matan Barakb4ff3a32016-02-09 14:57:42 +02005713 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005714 u8 op_mod[0x10];
5715
Matan Barakb4ff3a32016-02-09 14:57:42 +02005716 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005717 u8 rmpn[0x18];
5718
Matan Barakb4ff3a32016-02-09 14:57:42 +02005719 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005720};
5721
5722struct mlx5_ifc_destroy_qp_out_bits {
5723 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005724 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005725
5726 u8 syndrome[0x20];
5727
Matan Barakb4ff3a32016-02-09 14:57:42 +02005728 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005729};
5730
5731struct mlx5_ifc_destroy_qp_in_bits {
5732 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005733 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005734
Matan Barakb4ff3a32016-02-09 14:57:42 +02005735 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005736 u8 op_mod[0x10];
5737
Matan Barakb4ff3a32016-02-09 14:57:42 +02005738 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005739 u8 qpn[0x18];
5740
Matan Barakb4ff3a32016-02-09 14:57:42 +02005741 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005742};
5743
5744struct mlx5_ifc_destroy_psv_out_bits {
5745 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005746 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005747
5748 u8 syndrome[0x20];
5749
Matan Barakb4ff3a32016-02-09 14:57:42 +02005750 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005751};
5752
5753struct mlx5_ifc_destroy_psv_in_bits {
5754 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005755 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005756
Matan Barakb4ff3a32016-02-09 14:57:42 +02005757 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005758 u8 op_mod[0x10];
5759
Matan Barakb4ff3a32016-02-09 14:57:42 +02005760 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005761 u8 psvn[0x18];
5762
Matan Barakb4ff3a32016-02-09 14:57:42 +02005763 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005764};
5765
5766struct mlx5_ifc_destroy_mkey_out_bits {
5767 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005768 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005769
5770 u8 syndrome[0x20];
5771
Matan Barakb4ff3a32016-02-09 14:57:42 +02005772 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005773};
5774
5775struct mlx5_ifc_destroy_mkey_in_bits {
5776 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005777 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005778
Matan Barakb4ff3a32016-02-09 14:57:42 +02005779 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005780 u8 op_mod[0x10];
5781
Matan Barakb4ff3a32016-02-09 14:57:42 +02005782 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005783 u8 mkey_index[0x18];
5784
Matan Barakb4ff3a32016-02-09 14:57:42 +02005785 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005786};
5787
5788struct mlx5_ifc_destroy_flow_table_out_bits {
5789 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005790 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005791
5792 u8 syndrome[0x20];
5793
Matan Barakb4ff3a32016-02-09 14:57:42 +02005794 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005795};
5796
5797struct mlx5_ifc_destroy_flow_table_in_bits {
5798 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005799 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005800
Matan Barakb4ff3a32016-02-09 14:57:42 +02005801 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005802 u8 op_mod[0x10];
5803
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005804 u8 other_vport[0x1];
5805 u8 reserved_at_41[0xf];
5806 u8 vport_number[0x10];
5807
5808 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005809
5810 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005811 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005812
Matan Barakb4ff3a32016-02-09 14:57:42 +02005813 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005814 u8 table_id[0x18];
5815
Matan Barakb4ff3a32016-02-09 14:57:42 +02005816 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03005817};
5818
5819struct mlx5_ifc_destroy_flow_group_out_bits {
5820 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005821 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005822
5823 u8 syndrome[0x20];
5824
Matan Barakb4ff3a32016-02-09 14:57:42 +02005825 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005826};
5827
5828struct mlx5_ifc_destroy_flow_group_in_bits {
5829 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005830 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005831
Matan Barakb4ff3a32016-02-09 14:57:42 +02005832 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005833 u8 op_mod[0x10];
5834
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005835 u8 other_vport[0x1];
5836 u8 reserved_at_41[0xf];
5837 u8 vport_number[0x10];
5838
5839 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005840
5841 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005842 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005843
Matan Barakb4ff3a32016-02-09 14:57:42 +02005844 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005845 u8 table_id[0x18];
5846
5847 u8 group_id[0x20];
5848
Matan Barakb4ff3a32016-02-09 14:57:42 +02005849 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03005850};
5851
5852struct mlx5_ifc_destroy_eq_out_bits {
5853 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005854 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005855
5856 u8 syndrome[0x20];
5857
Matan Barakb4ff3a32016-02-09 14:57:42 +02005858 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005859};
5860
5861struct mlx5_ifc_destroy_eq_in_bits {
5862 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005863 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005864
Matan Barakb4ff3a32016-02-09 14:57:42 +02005865 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005866 u8 op_mod[0x10];
5867
Matan Barakb4ff3a32016-02-09 14:57:42 +02005868 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005869 u8 eq_number[0x8];
5870
Matan Barakb4ff3a32016-02-09 14:57:42 +02005871 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005872};
5873
5874struct mlx5_ifc_destroy_dct_out_bits {
5875 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005876 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005877
5878 u8 syndrome[0x20];
5879
Matan Barakb4ff3a32016-02-09 14:57:42 +02005880 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005881};
5882
5883struct mlx5_ifc_destroy_dct_in_bits {
5884 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005885 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005886
Matan Barakb4ff3a32016-02-09 14:57:42 +02005887 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005888 u8 op_mod[0x10];
5889
Matan Barakb4ff3a32016-02-09 14:57:42 +02005890 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005891 u8 dctn[0x18];
5892
Matan Barakb4ff3a32016-02-09 14:57:42 +02005893 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005894};
5895
5896struct mlx5_ifc_destroy_cq_out_bits {
5897 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005898 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005899
5900 u8 syndrome[0x20];
5901
Matan Barakb4ff3a32016-02-09 14:57:42 +02005902 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005903};
5904
5905struct mlx5_ifc_destroy_cq_in_bits {
5906 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005907 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005908
Matan Barakb4ff3a32016-02-09 14:57:42 +02005909 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005910 u8 op_mod[0x10];
5911
Matan Barakb4ff3a32016-02-09 14:57:42 +02005912 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005913 u8 cqn[0x18];
5914
Matan Barakb4ff3a32016-02-09 14:57:42 +02005915 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005916};
5917
5918struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
5919 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005920 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005921
5922 u8 syndrome[0x20];
5923
Matan Barakb4ff3a32016-02-09 14:57:42 +02005924 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005925};
5926
5927struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
5928 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005929 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005930
Matan Barakb4ff3a32016-02-09 14:57:42 +02005931 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005932 u8 op_mod[0x10];
5933
Matan Barakb4ff3a32016-02-09 14:57:42 +02005934 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005935
Matan Barakb4ff3a32016-02-09 14:57:42 +02005936 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005937 u8 vxlan_udp_port[0x10];
5938};
5939
5940struct mlx5_ifc_delete_l2_table_entry_out_bits {
5941 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005942 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005943
5944 u8 syndrome[0x20];
5945
Matan Barakb4ff3a32016-02-09 14:57:42 +02005946 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005947};
5948
5949struct mlx5_ifc_delete_l2_table_entry_in_bits {
5950 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005951 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005952
Matan Barakb4ff3a32016-02-09 14:57:42 +02005953 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005954 u8 op_mod[0x10];
5955
Matan Barakb4ff3a32016-02-09 14:57:42 +02005956 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03005957
Matan Barakb4ff3a32016-02-09 14:57:42 +02005958 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005959 u8 table_index[0x18];
5960
Matan Barakb4ff3a32016-02-09 14:57:42 +02005961 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03005962};
5963
5964struct mlx5_ifc_delete_fte_out_bits {
5965 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005966 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005967
5968 u8 syndrome[0x20];
5969
Matan Barakb4ff3a32016-02-09 14:57:42 +02005970 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005971};
5972
5973struct mlx5_ifc_delete_fte_in_bits {
5974 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005975 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005976
Matan Barakb4ff3a32016-02-09 14:57:42 +02005977 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005978 u8 op_mod[0x10];
5979
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005980 u8 other_vport[0x1];
5981 u8 reserved_at_41[0xf];
5982 u8 vport_number[0x10];
5983
5984 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005985
5986 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005987 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005988
Matan Barakb4ff3a32016-02-09 14:57:42 +02005989 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005990 u8 table_id[0x18];
5991
Matan Barakb4ff3a32016-02-09 14:57:42 +02005992 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005993
5994 u8 flow_index[0x20];
5995
Matan Barakb4ff3a32016-02-09 14:57:42 +02005996 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03005997};
5998
5999struct mlx5_ifc_dealloc_xrcd_out_bits {
6000 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006001 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006002
6003 u8 syndrome[0x20];
6004
Matan Barakb4ff3a32016-02-09 14:57:42 +02006005 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006006};
6007
6008struct mlx5_ifc_dealloc_xrcd_in_bits {
6009 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006010 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006011
Matan Barakb4ff3a32016-02-09 14:57:42 +02006012 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006013 u8 op_mod[0x10];
6014
Matan Barakb4ff3a32016-02-09 14:57:42 +02006015 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006016 u8 xrcd[0x18];
6017
Matan Barakb4ff3a32016-02-09 14:57:42 +02006018 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006019};
6020
6021struct mlx5_ifc_dealloc_uar_out_bits {
6022 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006023 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006024
6025 u8 syndrome[0x20];
6026
Matan Barakb4ff3a32016-02-09 14:57:42 +02006027 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006028};
6029
6030struct mlx5_ifc_dealloc_uar_in_bits {
6031 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006032 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006033
Matan Barakb4ff3a32016-02-09 14:57:42 +02006034 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006035 u8 op_mod[0x10];
6036
Matan Barakb4ff3a32016-02-09 14:57:42 +02006037 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006038 u8 uar[0x18];
6039
Matan Barakb4ff3a32016-02-09 14:57:42 +02006040 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006041};
6042
6043struct mlx5_ifc_dealloc_transport_domain_out_bits {
6044 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006045 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006046
6047 u8 syndrome[0x20];
6048
Matan Barakb4ff3a32016-02-09 14:57:42 +02006049 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006050};
6051
6052struct mlx5_ifc_dealloc_transport_domain_in_bits {
6053 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006054 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006055
Matan Barakb4ff3a32016-02-09 14:57:42 +02006056 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006057 u8 op_mod[0x10];
6058
Matan Barakb4ff3a32016-02-09 14:57:42 +02006059 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006060 u8 transport_domain[0x18];
6061
Matan Barakb4ff3a32016-02-09 14:57:42 +02006062 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006063};
6064
6065struct mlx5_ifc_dealloc_q_counter_out_bits {
6066 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006067 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006068
6069 u8 syndrome[0x20];
6070
Matan Barakb4ff3a32016-02-09 14:57:42 +02006071 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006072};
6073
6074struct mlx5_ifc_dealloc_q_counter_in_bits {
6075 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006076 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006077
Matan Barakb4ff3a32016-02-09 14:57:42 +02006078 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006079 u8 op_mod[0x10];
6080
Matan Barakb4ff3a32016-02-09 14:57:42 +02006081 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006082 u8 counter_set_id[0x8];
6083
Matan Barakb4ff3a32016-02-09 14:57:42 +02006084 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006085};
6086
6087struct mlx5_ifc_dealloc_pd_out_bits {
6088 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006089 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006090
6091 u8 syndrome[0x20];
6092
Matan Barakb4ff3a32016-02-09 14:57:42 +02006093 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006094};
6095
6096struct mlx5_ifc_dealloc_pd_in_bits {
6097 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006098 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006099
Matan Barakb4ff3a32016-02-09 14:57:42 +02006100 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006101 u8 op_mod[0x10];
6102
Matan Barakb4ff3a32016-02-09 14:57:42 +02006103 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006104 u8 pd[0x18];
6105
Matan Barakb4ff3a32016-02-09 14:57:42 +02006106 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006107};
6108
Amir Vadai9dc0b282016-05-13 12:55:39 +00006109struct mlx5_ifc_dealloc_flow_counter_out_bits {
6110 u8 status[0x8];
6111 u8 reserved_at_8[0x18];
6112
6113 u8 syndrome[0x20];
6114
6115 u8 reserved_at_40[0x40];
6116};
6117
6118struct mlx5_ifc_dealloc_flow_counter_in_bits {
6119 u8 opcode[0x10];
6120 u8 reserved_at_10[0x10];
6121
6122 u8 reserved_at_20[0x10];
6123 u8 op_mod[0x10];
6124
6125 u8 reserved_at_40[0x10];
6126 u8 flow_counter_id[0x10];
6127
6128 u8 reserved_at_60[0x20];
6129};
6130
Saeed Mahameed74862162016-06-09 15:11:34 +03006131struct mlx5_ifc_create_xrq_out_bits {
6132 u8 status[0x8];
6133 u8 reserved_at_8[0x18];
6134
6135 u8 syndrome[0x20];
6136
6137 u8 reserved_at_40[0x8];
6138 u8 xrqn[0x18];
6139
6140 u8 reserved_at_60[0x20];
6141};
6142
6143struct mlx5_ifc_create_xrq_in_bits {
6144 u8 opcode[0x10];
6145 u8 reserved_at_10[0x10];
6146
6147 u8 reserved_at_20[0x10];
6148 u8 op_mod[0x10];
6149
6150 u8 reserved_at_40[0x40];
6151
6152 struct mlx5_ifc_xrqc_bits xrq_context;
6153};
6154
Saeed Mahameede2816822015-05-28 22:28:40 +03006155struct mlx5_ifc_create_xrc_srq_out_bits {
6156 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006157 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006158
6159 u8 syndrome[0x20];
6160
Matan Barakb4ff3a32016-02-09 14:57:42 +02006161 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006162 u8 xrc_srqn[0x18];
6163
Matan Barakb4ff3a32016-02-09 14:57:42 +02006164 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006165};
6166
6167struct mlx5_ifc_create_xrc_srq_in_bits {
6168 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006169 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006170
Matan Barakb4ff3a32016-02-09 14:57:42 +02006171 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006172 u8 op_mod[0x10];
6173
Matan Barakb4ff3a32016-02-09 14:57:42 +02006174 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006175
6176 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6177
Matan Barakb4ff3a32016-02-09 14:57:42 +02006178 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006179
6180 u8 pas[0][0x40];
6181};
6182
6183struct mlx5_ifc_create_tis_out_bits {
6184 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006185 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006186
6187 u8 syndrome[0x20];
6188
Matan Barakb4ff3a32016-02-09 14:57:42 +02006189 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006190 u8 tisn[0x18];
6191
Matan Barakb4ff3a32016-02-09 14:57:42 +02006192 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006193};
6194
6195struct mlx5_ifc_create_tis_in_bits {
6196 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006197 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006198
Matan Barakb4ff3a32016-02-09 14:57:42 +02006199 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006200 u8 op_mod[0x10];
6201
Matan Barakb4ff3a32016-02-09 14:57:42 +02006202 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006203
6204 struct mlx5_ifc_tisc_bits ctx;
6205};
6206
6207struct mlx5_ifc_create_tir_out_bits {
6208 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006209 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006210
6211 u8 syndrome[0x20];
6212
Matan Barakb4ff3a32016-02-09 14:57:42 +02006213 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006214 u8 tirn[0x18];
6215
Matan Barakb4ff3a32016-02-09 14:57:42 +02006216 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006217};
6218
6219struct mlx5_ifc_create_tir_in_bits {
6220 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006221 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006222
Matan Barakb4ff3a32016-02-09 14:57:42 +02006223 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006224 u8 op_mod[0x10];
6225
Matan Barakb4ff3a32016-02-09 14:57:42 +02006226 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006227
6228 struct mlx5_ifc_tirc_bits ctx;
6229};
6230
6231struct mlx5_ifc_create_srq_out_bits {
6232 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006233 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006234
6235 u8 syndrome[0x20];
6236
Matan Barakb4ff3a32016-02-09 14:57:42 +02006237 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006238 u8 srqn[0x18];
6239
Matan Barakb4ff3a32016-02-09 14:57:42 +02006240 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006241};
6242
6243struct mlx5_ifc_create_srq_in_bits {
6244 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006245 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006246
Matan Barakb4ff3a32016-02-09 14:57:42 +02006247 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006248 u8 op_mod[0x10];
6249
Matan Barakb4ff3a32016-02-09 14:57:42 +02006250 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006251
6252 struct mlx5_ifc_srqc_bits srq_context_entry;
6253
Matan Barakb4ff3a32016-02-09 14:57:42 +02006254 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006255
6256 u8 pas[0][0x40];
6257};
6258
6259struct mlx5_ifc_create_sq_out_bits {
6260 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006261 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006262
6263 u8 syndrome[0x20];
6264
Matan Barakb4ff3a32016-02-09 14:57:42 +02006265 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006266 u8 sqn[0x18];
6267
Matan Barakb4ff3a32016-02-09 14:57:42 +02006268 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006269};
6270
6271struct mlx5_ifc_create_sq_in_bits {
6272 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006273 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006274
Matan Barakb4ff3a32016-02-09 14:57:42 +02006275 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006276 u8 op_mod[0x10];
6277
Matan Barakb4ff3a32016-02-09 14:57:42 +02006278 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006279
6280 struct mlx5_ifc_sqc_bits ctx;
6281};
6282
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006283struct mlx5_ifc_create_scheduling_element_out_bits {
6284 u8 status[0x8];
6285 u8 reserved_at_8[0x18];
6286
6287 u8 syndrome[0x20];
6288
6289 u8 reserved_at_40[0x40];
6290
6291 u8 scheduling_element_id[0x20];
6292
6293 u8 reserved_at_a0[0x160];
6294};
6295
6296struct mlx5_ifc_create_scheduling_element_in_bits {
6297 u8 opcode[0x10];
6298 u8 reserved_at_10[0x10];
6299
6300 u8 reserved_at_20[0x10];
6301 u8 op_mod[0x10];
6302
6303 u8 scheduling_hierarchy[0x8];
6304 u8 reserved_at_48[0x18];
6305
6306 u8 reserved_at_60[0xa0];
6307
6308 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6309
6310 u8 reserved_at_300[0x100];
6311};
6312
Saeed Mahameede2816822015-05-28 22:28:40 +03006313struct mlx5_ifc_create_rqt_out_bits {
6314 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006315 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006316
6317 u8 syndrome[0x20];
6318
Matan Barakb4ff3a32016-02-09 14:57:42 +02006319 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006320 u8 rqtn[0x18];
6321
Matan Barakb4ff3a32016-02-09 14:57:42 +02006322 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006323};
6324
6325struct mlx5_ifc_create_rqt_in_bits {
6326 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006327 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006328
Matan Barakb4ff3a32016-02-09 14:57:42 +02006329 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006330 u8 op_mod[0x10];
6331
Matan Barakb4ff3a32016-02-09 14:57:42 +02006332 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006333
6334 struct mlx5_ifc_rqtc_bits rqt_context;
6335};
6336
6337struct mlx5_ifc_create_rq_out_bits {
6338 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006339 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006340
6341 u8 syndrome[0x20];
6342
Matan Barakb4ff3a32016-02-09 14:57:42 +02006343 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006344 u8 rqn[0x18];
6345
Matan Barakb4ff3a32016-02-09 14:57:42 +02006346 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006347};
6348
6349struct mlx5_ifc_create_rq_in_bits {
6350 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006351 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006352
Matan Barakb4ff3a32016-02-09 14:57:42 +02006353 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006354 u8 op_mod[0x10];
6355
Matan Barakb4ff3a32016-02-09 14:57:42 +02006356 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006357
6358 struct mlx5_ifc_rqc_bits ctx;
6359};
6360
6361struct mlx5_ifc_create_rmp_out_bits {
6362 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006363 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006364
6365 u8 syndrome[0x20];
6366
Matan Barakb4ff3a32016-02-09 14:57:42 +02006367 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006368 u8 rmpn[0x18];
6369
Matan Barakb4ff3a32016-02-09 14:57:42 +02006370 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006371};
6372
6373struct mlx5_ifc_create_rmp_in_bits {
6374 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006375 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006376
Matan Barakb4ff3a32016-02-09 14:57:42 +02006377 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006378 u8 op_mod[0x10];
6379
Matan Barakb4ff3a32016-02-09 14:57:42 +02006380 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006381
6382 struct mlx5_ifc_rmpc_bits ctx;
6383};
6384
6385struct mlx5_ifc_create_qp_out_bits {
6386 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006387 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006388
6389 u8 syndrome[0x20];
6390
Matan Barakb4ff3a32016-02-09 14:57:42 +02006391 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006392 u8 qpn[0x18];
6393
Matan Barakb4ff3a32016-02-09 14:57:42 +02006394 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006395};
6396
6397struct mlx5_ifc_create_qp_in_bits {
6398 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006399 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006400
Matan Barakb4ff3a32016-02-09 14:57:42 +02006401 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006402 u8 op_mod[0x10];
6403
Matan Barakb4ff3a32016-02-09 14:57:42 +02006404 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006405
6406 u8 opt_param_mask[0x20];
6407
Matan Barakb4ff3a32016-02-09 14:57:42 +02006408 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006409
6410 struct mlx5_ifc_qpc_bits qpc;
6411
Matan Barakb4ff3a32016-02-09 14:57:42 +02006412 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006413
6414 u8 pas[0][0x40];
6415};
6416
6417struct mlx5_ifc_create_psv_out_bits {
6418 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006419 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006420
6421 u8 syndrome[0x20];
6422
Matan Barakb4ff3a32016-02-09 14:57:42 +02006423 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006424
Matan Barakb4ff3a32016-02-09 14:57:42 +02006425 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006426 u8 psv0_index[0x18];
6427
Matan Barakb4ff3a32016-02-09 14:57:42 +02006428 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006429 u8 psv1_index[0x18];
6430
Matan Barakb4ff3a32016-02-09 14:57:42 +02006431 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006432 u8 psv2_index[0x18];
6433
Matan Barakb4ff3a32016-02-09 14:57:42 +02006434 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006435 u8 psv3_index[0x18];
6436};
6437
6438struct mlx5_ifc_create_psv_in_bits {
6439 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006440 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006441
Matan Barakb4ff3a32016-02-09 14:57:42 +02006442 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006443 u8 op_mod[0x10];
6444
6445 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006446 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006447 u8 pd[0x18];
6448
Matan Barakb4ff3a32016-02-09 14:57:42 +02006449 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006450};
6451
6452struct mlx5_ifc_create_mkey_out_bits {
6453 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006454 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006455
6456 u8 syndrome[0x20];
6457
Matan Barakb4ff3a32016-02-09 14:57:42 +02006458 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006459 u8 mkey_index[0x18];
6460
Matan Barakb4ff3a32016-02-09 14:57:42 +02006461 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006462};
6463
6464struct mlx5_ifc_create_mkey_in_bits {
6465 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006466 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006467
Matan Barakb4ff3a32016-02-09 14:57:42 +02006468 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006469 u8 op_mod[0x10];
6470
Matan Barakb4ff3a32016-02-09 14:57:42 +02006471 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006472
6473 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006474 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006475
6476 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6477
Matan Barakb4ff3a32016-02-09 14:57:42 +02006478 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006479
6480 u8 translations_octword_actual_size[0x20];
6481
Matan Barakb4ff3a32016-02-09 14:57:42 +02006482 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006483
6484 u8 klm_pas_mtt[0][0x20];
6485};
6486
6487struct mlx5_ifc_create_flow_table_out_bits {
6488 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006489 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006490
6491 u8 syndrome[0x20];
6492
Matan Barakb4ff3a32016-02-09 14:57:42 +02006493 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006494 u8 table_id[0x18];
6495
Matan Barakb4ff3a32016-02-09 14:57:42 +02006496 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006497};
6498
6499struct mlx5_ifc_create_flow_table_in_bits {
6500 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006501 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006502
Matan Barakb4ff3a32016-02-09 14:57:42 +02006503 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006504 u8 op_mod[0x10];
6505
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006506 u8 other_vport[0x1];
6507 u8 reserved_at_41[0xf];
6508 u8 vport_number[0x10];
6509
6510 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006511
6512 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006513 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006514
Matan Barakb4ff3a32016-02-09 14:57:42 +02006515 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006516
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03006517 u8 encap_en[0x1];
6518 u8 decap_en[0x1];
6519 u8 reserved_at_c2[0x2];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02006520 u8 table_miss_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006521 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006522 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006523 u8 log_size[0x8];
6524
Matan Barakb4ff3a32016-02-09 14:57:42 +02006525 u8 reserved_at_e0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02006526 u8 table_miss_id[0x18];
6527
Aviv Heller84df61e2016-05-10 13:47:50 +03006528 u8 reserved_at_100[0x8];
6529 u8 lag_master_next_table_id[0x18];
6530
6531 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006532};
6533
6534struct mlx5_ifc_create_flow_group_out_bits {
6535 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006536 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006537
6538 u8 syndrome[0x20];
6539
Matan Barakb4ff3a32016-02-09 14:57:42 +02006540 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006541 u8 group_id[0x18];
6542
Matan Barakb4ff3a32016-02-09 14:57:42 +02006543 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006544};
6545
6546enum {
6547 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6548 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6549 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6550};
6551
6552struct mlx5_ifc_create_flow_group_in_bits {
6553 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006554 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006555
Matan Barakb4ff3a32016-02-09 14:57:42 +02006556 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006557 u8 op_mod[0x10];
6558
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006559 u8 other_vport[0x1];
6560 u8 reserved_at_41[0xf];
6561 u8 vport_number[0x10];
6562
6563 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006564
6565 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006566 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006567
Matan Barakb4ff3a32016-02-09 14:57:42 +02006568 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006569 u8 table_id[0x18];
6570
Matan Barakb4ff3a32016-02-09 14:57:42 +02006571 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006572
6573 u8 start_flow_index[0x20];
6574
Matan Barakb4ff3a32016-02-09 14:57:42 +02006575 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006576
6577 u8 end_flow_index[0x20];
6578
Matan Barakb4ff3a32016-02-09 14:57:42 +02006579 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006580
Matan Barakb4ff3a32016-02-09 14:57:42 +02006581 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006582 u8 match_criteria_enable[0x8];
6583
6584 struct mlx5_ifc_fte_match_param_bits match_criteria;
6585
Matan Barakb4ff3a32016-02-09 14:57:42 +02006586 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006587};
6588
6589struct mlx5_ifc_create_eq_out_bits {
6590 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006591 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006592
6593 u8 syndrome[0x20];
6594
Matan Barakb4ff3a32016-02-09 14:57:42 +02006595 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006596 u8 eq_number[0x8];
6597
Matan Barakb4ff3a32016-02-09 14:57:42 +02006598 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006599};
6600
6601struct mlx5_ifc_create_eq_in_bits {
6602 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006603 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006604
Matan Barakb4ff3a32016-02-09 14:57:42 +02006605 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006606 u8 op_mod[0x10];
6607
Matan Barakb4ff3a32016-02-09 14:57:42 +02006608 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006609
6610 struct mlx5_ifc_eqc_bits eq_context_entry;
6611
Matan Barakb4ff3a32016-02-09 14:57:42 +02006612 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006613
6614 u8 event_bitmask[0x40];
6615
Matan Barakb4ff3a32016-02-09 14:57:42 +02006616 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006617
6618 u8 pas[0][0x40];
6619};
6620
6621struct mlx5_ifc_create_dct_out_bits {
6622 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006623 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006624
6625 u8 syndrome[0x20];
6626
Matan Barakb4ff3a32016-02-09 14:57:42 +02006627 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006628 u8 dctn[0x18];
6629
Matan Barakb4ff3a32016-02-09 14:57:42 +02006630 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006631};
6632
6633struct mlx5_ifc_create_dct_in_bits {
6634 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006635 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006636
Matan Barakb4ff3a32016-02-09 14:57:42 +02006637 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006638 u8 op_mod[0x10];
6639
Matan Barakb4ff3a32016-02-09 14:57:42 +02006640 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006641
6642 struct mlx5_ifc_dctc_bits dct_context_entry;
6643
Matan Barakb4ff3a32016-02-09 14:57:42 +02006644 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006645};
6646
6647struct mlx5_ifc_create_cq_out_bits {
6648 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006649 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006650
6651 u8 syndrome[0x20];
6652
Matan Barakb4ff3a32016-02-09 14:57:42 +02006653 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006654 u8 cqn[0x18];
6655
Matan Barakb4ff3a32016-02-09 14:57:42 +02006656 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006657};
6658
6659struct mlx5_ifc_create_cq_in_bits {
6660 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006661 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006662
Matan Barakb4ff3a32016-02-09 14:57:42 +02006663 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006664 u8 op_mod[0x10];
6665
Matan Barakb4ff3a32016-02-09 14:57:42 +02006666 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006667
6668 struct mlx5_ifc_cqc_bits cq_context;
6669
Matan Barakb4ff3a32016-02-09 14:57:42 +02006670 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006671
6672 u8 pas[0][0x40];
6673};
6674
6675struct mlx5_ifc_config_int_moderation_out_bits {
6676 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006677 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006678
6679 u8 syndrome[0x20];
6680
Matan Barakb4ff3a32016-02-09 14:57:42 +02006681 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006682 u8 min_delay[0xc];
6683 u8 int_vector[0x10];
6684
Matan Barakb4ff3a32016-02-09 14:57:42 +02006685 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006686};
6687
6688enum {
6689 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6690 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6691};
6692
6693struct mlx5_ifc_config_int_moderation_in_bits {
6694 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006695 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006696
Matan Barakb4ff3a32016-02-09 14:57:42 +02006697 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006698 u8 op_mod[0x10];
6699
Matan Barakb4ff3a32016-02-09 14:57:42 +02006700 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006701 u8 min_delay[0xc];
6702 u8 int_vector[0x10];
6703
Matan Barakb4ff3a32016-02-09 14:57:42 +02006704 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006705};
6706
6707struct mlx5_ifc_attach_to_mcg_out_bits {
6708 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006709 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006710
6711 u8 syndrome[0x20];
6712
Matan Barakb4ff3a32016-02-09 14:57:42 +02006713 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006714};
6715
6716struct mlx5_ifc_attach_to_mcg_in_bits {
6717 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006718 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006719
Matan Barakb4ff3a32016-02-09 14:57:42 +02006720 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006721 u8 op_mod[0x10];
6722
Matan Barakb4ff3a32016-02-09 14:57:42 +02006723 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006724 u8 qpn[0x18];
6725
Matan Barakb4ff3a32016-02-09 14:57:42 +02006726 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006727
6728 u8 multicast_gid[16][0x8];
6729};
6730
Saeed Mahameed74862162016-06-09 15:11:34 +03006731struct mlx5_ifc_arm_xrq_out_bits {
6732 u8 status[0x8];
6733 u8 reserved_at_8[0x18];
6734
6735 u8 syndrome[0x20];
6736
6737 u8 reserved_at_40[0x40];
6738};
6739
6740struct mlx5_ifc_arm_xrq_in_bits {
6741 u8 opcode[0x10];
6742 u8 reserved_at_10[0x10];
6743
6744 u8 reserved_at_20[0x10];
6745 u8 op_mod[0x10];
6746
6747 u8 reserved_at_40[0x8];
6748 u8 xrqn[0x18];
6749
6750 u8 reserved_at_60[0x10];
6751 u8 lwm[0x10];
6752};
6753
Saeed Mahameede2816822015-05-28 22:28:40 +03006754struct mlx5_ifc_arm_xrc_srq_out_bits {
6755 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006756 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006757
6758 u8 syndrome[0x20];
6759
Matan Barakb4ff3a32016-02-09 14:57:42 +02006760 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006761};
6762
6763enum {
6764 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
6765};
6766
6767struct mlx5_ifc_arm_xrc_srq_in_bits {
6768 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006769 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006770
Matan Barakb4ff3a32016-02-09 14:57:42 +02006771 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006772 u8 op_mod[0x10];
6773
Matan Barakb4ff3a32016-02-09 14:57:42 +02006774 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006775 u8 xrc_srqn[0x18];
6776
Matan Barakb4ff3a32016-02-09 14:57:42 +02006777 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006778 u8 lwm[0x10];
6779};
6780
6781struct mlx5_ifc_arm_rq_out_bits {
6782 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006783 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006784
6785 u8 syndrome[0x20];
6786
Matan Barakb4ff3a32016-02-09 14:57:42 +02006787 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006788};
6789
6790enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03006791 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
6792 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03006793};
6794
6795struct mlx5_ifc_arm_rq_in_bits {
6796 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006797 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006798
Matan Barakb4ff3a32016-02-09 14:57:42 +02006799 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006800 u8 op_mod[0x10];
6801
Matan Barakb4ff3a32016-02-09 14:57:42 +02006802 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006803 u8 srq_number[0x18];
6804
Matan Barakb4ff3a32016-02-09 14:57:42 +02006805 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006806 u8 lwm[0x10];
6807};
6808
6809struct mlx5_ifc_arm_dct_out_bits {
6810 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006811 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006812
6813 u8 syndrome[0x20];
6814
Matan Barakb4ff3a32016-02-09 14:57:42 +02006815 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006816};
6817
6818struct mlx5_ifc_arm_dct_in_bits {
6819 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006820 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006821
Matan Barakb4ff3a32016-02-09 14:57:42 +02006822 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006823 u8 op_mod[0x10];
6824
Matan Barakb4ff3a32016-02-09 14:57:42 +02006825 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006826 u8 dct_number[0x18];
6827
Matan Barakb4ff3a32016-02-09 14:57:42 +02006828 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006829};
6830
6831struct mlx5_ifc_alloc_xrcd_out_bits {
6832 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006833 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006834
6835 u8 syndrome[0x20];
6836
Matan Barakb4ff3a32016-02-09 14:57:42 +02006837 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006838 u8 xrcd[0x18];
6839
Matan Barakb4ff3a32016-02-09 14:57:42 +02006840 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006841};
6842
6843struct mlx5_ifc_alloc_xrcd_in_bits {
6844 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006845 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006846
Matan Barakb4ff3a32016-02-09 14:57:42 +02006847 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006848 u8 op_mod[0x10];
6849
Matan Barakb4ff3a32016-02-09 14:57:42 +02006850 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006851};
6852
6853struct mlx5_ifc_alloc_uar_out_bits {
6854 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006855 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006856
6857 u8 syndrome[0x20];
6858
Matan Barakb4ff3a32016-02-09 14:57:42 +02006859 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006860 u8 uar[0x18];
6861
Matan Barakb4ff3a32016-02-09 14:57:42 +02006862 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006863};
6864
6865struct mlx5_ifc_alloc_uar_in_bits {
6866 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006867 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006868
Matan Barakb4ff3a32016-02-09 14:57:42 +02006869 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006870 u8 op_mod[0x10];
6871
Matan Barakb4ff3a32016-02-09 14:57:42 +02006872 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006873};
6874
6875struct mlx5_ifc_alloc_transport_domain_out_bits {
6876 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006877 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006878
6879 u8 syndrome[0x20];
6880
Matan Barakb4ff3a32016-02-09 14:57:42 +02006881 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006882 u8 transport_domain[0x18];
6883
Matan Barakb4ff3a32016-02-09 14:57:42 +02006884 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006885};
6886
6887struct mlx5_ifc_alloc_transport_domain_in_bits {
6888 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006889 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006890
Matan Barakb4ff3a32016-02-09 14:57:42 +02006891 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006892 u8 op_mod[0x10];
6893
Matan Barakb4ff3a32016-02-09 14:57:42 +02006894 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006895};
6896
6897struct mlx5_ifc_alloc_q_counter_out_bits {
6898 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006899 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006900
6901 u8 syndrome[0x20];
6902
Matan Barakb4ff3a32016-02-09 14:57:42 +02006903 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006904 u8 counter_set_id[0x8];
6905
Matan Barakb4ff3a32016-02-09 14:57:42 +02006906 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006907};
6908
6909struct mlx5_ifc_alloc_q_counter_in_bits {
6910 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006911 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006912
Matan Barakb4ff3a32016-02-09 14:57:42 +02006913 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006914 u8 op_mod[0x10];
6915
Matan Barakb4ff3a32016-02-09 14:57:42 +02006916 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006917};
6918
6919struct mlx5_ifc_alloc_pd_out_bits {
6920 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006921 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006922
6923 u8 syndrome[0x20];
6924
Matan Barakb4ff3a32016-02-09 14:57:42 +02006925 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006926 u8 pd[0x18];
6927
Matan Barakb4ff3a32016-02-09 14:57:42 +02006928 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006929};
6930
6931struct mlx5_ifc_alloc_pd_in_bits {
6932 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006933 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006934
Matan Barakb4ff3a32016-02-09 14:57:42 +02006935 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006936 u8 op_mod[0x10];
6937
Matan Barakb4ff3a32016-02-09 14:57:42 +02006938 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006939};
6940
Amir Vadai9dc0b282016-05-13 12:55:39 +00006941struct mlx5_ifc_alloc_flow_counter_out_bits {
6942 u8 status[0x8];
6943 u8 reserved_at_8[0x18];
6944
6945 u8 syndrome[0x20];
6946
6947 u8 reserved_at_40[0x10];
6948 u8 flow_counter_id[0x10];
6949
6950 u8 reserved_at_60[0x20];
6951};
6952
6953struct mlx5_ifc_alloc_flow_counter_in_bits {
6954 u8 opcode[0x10];
6955 u8 reserved_at_10[0x10];
6956
6957 u8 reserved_at_20[0x10];
6958 u8 op_mod[0x10];
6959
6960 u8 reserved_at_40[0x40];
6961};
6962
Saeed Mahameede2816822015-05-28 22:28:40 +03006963struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
6964 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006965 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006966
6967 u8 syndrome[0x20];
6968
Matan Barakb4ff3a32016-02-09 14:57:42 +02006969 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006970};
6971
6972struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
6973 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006974 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006975
Matan Barakb4ff3a32016-02-09 14:57:42 +02006976 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006977 u8 op_mod[0x10];
6978
Matan Barakb4ff3a32016-02-09 14:57:42 +02006979 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006980
Matan Barakb4ff3a32016-02-09 14:57:42 +02006981 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006982 u8 vxlan_udp_port[0x10];
6983};
6984
Saeed Mahameed74862162016-06-09 15:11:34 +03006985struct mlx5_ifc_set_rate_limit_out_bits {
6986 u8 status[0x8];
6987 u8 reserved_at_8[0x18];
6988
6989 u8 syndrome[0x20];
6990
6991 u8 reserved_at_40[0x40];
6992};
6993
6994struct mlx5_ifc_set_rate_limit_in_bits {
6995 u8 opcode[0x10];
6996 u8 reserved_at_10[0x10];
6997
6998 u8 reserved_at_20[0x10];
6999 u8 op_mod[0x10];
7000
7001 u8 reserved_at_40[0x10];
7002 u8 rate_limit_index[0x10];
7003
7004 u8 reserved_at_60[0x20];
7005
7006 u8 rate_limit[0x20];
7007};
7008
Saeed Mahameede2816822015-05-28 22:28:40 +03007009struct mlx5_ifc_access_register_out_bits {
7010 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007011 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007012
7013 u8 syndrome[0x20];
7014
Matan Barakb4ff3a32016-02-09 14:57:42 +02007015 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007016
7017 u8 register_data[0][0x20];
7018};
7019
7020enum {
7021 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7022 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7023};
7024
7025struct mlx5_ifc_access_register_in_bits {
7026 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007027 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007028
Matan Barakb4ff3a32016-02-09 14:57:42 +02007029 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007030 u8 op_mod[0x10];
7031
Matan Barakb4ff3a32016-02-09 14:57:42 +02007032 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007033 u8 register_id[0x10];
7034
7035 u8 argument[0x20];
7036
7037 u8 register_data[0][0x20];
7038};
7039
7040struct mlx5_ifc_sltp_reg_bits {
7041 u8 status[0x4];
7042 u8 version[0x4];
7043 u8 local_port[0x8];
7044 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007045 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007046 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007047 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007048
Matan Barakb4ff3a32016-02-09 14:57:42 +02007049 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007050
Matan Barakb4ff3a32016-02-09 14:57:42 +02007051 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007052 u8 polarity[0x1];
7053 u8 ob_tap0[0x8];
7054 u8 ob_tap1[0x8];
7055 u8 ob_tap2[0x8];
7056
Matan Barakb4ff3a32016-02-09 14:57:42 +02007057 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007058 u8 ob_preemp_mode[0x4];
7059 u8 ob_reg[0x8];
7060 u8 ob_bias[0x8];
7061
Matan Barakb4ff3a32016-02-09 14:57:42 +02007062 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007063};
7064
7065struct mlx5_ifc_slrg_reg_bits {
7066 u8 status[0x4];
7067 u8 version[0x4];
7068 u8 local_port[0x8];
7069 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007070 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007071 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007072 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007073
7074 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007075 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007076 u8 grade_lane_speed[0x4];
7077
7078 u8 grade_version[0x8];
7079 u8 grade[0x18];
7080
Matan Barakb4ff3a32016-02-09 14:57:42 +02007081 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007082 u8 height_grade_type[0x4];
7083 u8 height_grade[0x18];
7084
7085 u8 height_dz[0x10];
7086 u8 height_dv[0x10];
7087
Matan Barakb4ff3a32016-02-09 14:57:42 +02007088 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007089 u8 height_sigma[0x10];
7090
Matan Barakb4ff3a32016-02-09 14:57:42 +02007091 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007092
Matan Barakb4ff3a32016-02-09 14:57:42 +02007093 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007094 u8 phase_grade_type[0x4];
7095 u8 phase_grade[0x18];
7096
Matan Barakb4ff3a32016-02-09 14:57:42 +02007097 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007098 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007099 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007100 u8 phase_eo_neg[0x8];
7101
7102 u8 ffe_set_tested[0x10];
7103 u8 test_errors_per_lane[0x10];
7104};
7105
7106struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007107 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007108 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007109 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007110
Matan Barakb4ff3a32016-02-09 14:57:42 +02007111 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007112 u8 vl_hw_cap[0x4];
7113
Matan Barakb4ff3a32016-02-09 14:57:42 +02007114 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007115 u8 vl_admin[0x4];
7116
Matan Barakb4ff3a32016-02-09 14:57:42 +02007117 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007118 u8 vl_operational[0x4];
7119};
7120
7121struct mlx5_ifc_pude_reg_bits {
7122 u8 swid[0x8];
7123 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007124 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007125 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007126 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007127 u8 oper_status[0x4];
7128
Matan Barakb4ff3a32016-02-09 14:57:42 +02007129 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007130};
7131
7132struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007133 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007134 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007135 u8 an_disable_cap[0x1];
7136 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007137 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007138 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007139 u8 proto_mask[0x3];
7140
Saeed Mahameed74862162016-06-09 15:11:34 +03007141 u8 an_status[0x4];
7142 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007143
7144 u8 eth_proto_capability[0x20];
7145
7146 u8 ib_link_width_capability[0x10];
7147 u8 ib_proto_capability[0x10];
7148
Matan Barakb4ff3a32016-02-09 14:57:42 +02007149 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007150
7151 u8 eth_proto_admin[0x20];
7152
7153 u8 ib_link_width_admin[0x10];
7154 u8 ib_proto_admin[0x10];
7155
Matan Barakb4ff3a32016-02-09 14:57:42 +02007156 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007157
7158 u8 eth_proto_oper[0x20];
7159
7160 u8 ib_link_width_oper[0x10];
7161 u8 ib_proto_oper[0x10];
7162
Matan Barakb4ff3a32016-02-09 14:57:42 +02007163 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007164
7165 u8 eth_proto_lp_advertise[0x20];
7166
Matan Barakb4ff3a32016-02-09 14:57:42 +02007167 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007168};
7169
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007170struct mlx5_ifc_mlcr_reg_bits {
7171 u8 reserved_at_0[0x8];
7172 u8 local_port[0x8];
7173 u8 reserved_at_10[0x20];
7174
7175 u8 beacon_duration[0x10];
7176 u8 reserved_at_40[0x10];
7177
7178 u8 beacon_remain[0x10];
7179};
7180
Saeed Mahameede2816822015-05-28 22:28:40 +03007181struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007182 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007183
7184 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007185 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007186 u8 repetitions_mode[0x4];
7187 u8 num_of_repetitions[0x8];
7188
7189 u8 grade_version[0x8];
7190 u8 height_grade_type[0x4];
7191 u8 phase_grade_type[0x4];
7192 u8 height_grade_weight[0x8];
7193 u8 phase_grade_weight[0x8];
7194
7195 u8 gisim_measure_bits[0x10];
7196 u8 adaptive_tap_measure_bits[0x10];
7197
7198 u8 ber_bath_high_error_threshold[0x10];
7199 u8 ber_bath_mid_error_threshold[0x10];
7200
7201 u8 ber_bath_low_error_threshold[0x10];
7202 u8 one_ratio_high_threshold[0x10];
7203
7204 u8 one_ratio_high_mid_threshold[0x10];
7205 u8 one_ratio_low_mid_threshold[0x10];
7206
7207 u8 one_ratio_low_threshold[0x10];
7208 u8 ndeo_error_threshold[0x10];
7209
7210 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007211 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007212 u8 mix90_phase_for_voltage_bath[0x8];
7213
7214 u8 mixer_offset_start[0x10];
7215 u8 mixer_offset_end[0x10];
7216
Matan Barakb4ff3a32016-02-09 14:57:42 +02007217 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007218 u8 ber_test_time[0xb];
7219};
7220
7221struct mlx5_ifc_pspa_reg_bits {
7222 u8 swid[0x8];
7223 u8 local_port[0x8];
7224 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007225 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007226
Matan Barakb4ff3a32016-02-09 14:57:42 +02007227 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007228};
7229
7230struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007231 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007232 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007233 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007234 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007235 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007236 u8 mode[0x2];
7237
Matan Barakb4ff3a32016-02-09 14:57:42 +02007238 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007239
Matan Barakb4ff3a32016-02-09 14:57:42 +02007240 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007241 u8 min_threshold[0x10];
7242
Matan Barakb4ff3a32016-02-09 14:57:42 +02007243 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007244 u8 max_threshold[0x10];
7245
Matan Barakb4ff3a32016-02-09 14:57:42 +02007246 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007247 u8 mark_probability_denominator[0x10];
7248
Matan Barakb4ff3a32016-02-09 14:57:42 +02007249 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007250};
7251
7252struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007253 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007254 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007255 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007256
Matan Barakb4ff3a32016-02-09 14:57:42 +02007257 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007258
Matan Barakb4ff3a32016-02-09 14:57:42 +02007259 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007260 u8 wrps_admin[0x4];
7261
Matan Barakb4ff3a32016-02-09 14:57:42 +02007262 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007263 u8 wrps_status[0x4];
7264
Matan Barakb4ff3a32016-02-09 14:57:42 +02007265 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007266 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007267 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007268 u8 down_threshold[0x8];
7269
Matan Barakb4ff3a32016-02-09 14:57:42 +02007270 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007271
Matan Barakb4ff3a32016-02-09 14:57:42 +02007272 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007273 u8 srps_admin[0x4];
7274
Matan Barakb4ff3a32016-02-09 14:57:42 +02007275 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007276 u8 srps_status[0x4];
7277
Matan Barakb4ff3a32016-02-09 14:57:42 +02007278 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007279};
7280
7281struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007282 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007283 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007284 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007285
Matan Barakb4ff3a32016-02-09 14:57:42 +02007286 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007287 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007288 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007289 u8 lb_en[0x8];
7290};
7291
7292struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007293 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007294 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007295 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007296
Matan Barakb4ff3a32016-02-09 14:57:42 +02007297 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007298
7299 u8 port_profile_mode[0x8];
7300 u8 static_port_profile[0x8];
7301 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007302 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007303
7304 u8 retransmission_active[0x8];
7305 u8 fec_mode_active[0x18];
7306
Matan Barakb4ff3a32016-02-09 14:57:42 +02007307 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007308};
7309
7310struct mlx5_ifc_ppcnt_reg_bits {
7311 u8 swid[0x8];
7312 u8 local_port[0x8];
7313 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007314 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007315 u8 grp[0x6];
7316
7317 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007318 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007319 u8 prio_tc[0x3];
7320
7321 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7322};
7323
Gal Pressman8ed1a632016-11-17 13:46:01 +02007324struct mlx5_ifc_mpcnt_reg_bits {
7325 u8 reserved_at_0[0x8];
7326 u8 pcie_index[0x8];
7327 u8 reserved_at_10[0xa];
7328 u8 grp[0x6];
7329
7330 u8 clr[0x1];
7331 u8 reserved_at_21[0x1f];
7332
7333 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7334};
7335
Saeed Mahameede2816822015-05-28 22:28:40 +03007336struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007337 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007338 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007339 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007340 u8 local_port[0x8];
7341 u8 mac_47_32[0x10];
7342
7343 u8 mac_31_0[0x20];
7344
Matan Barakb4ff3a32016-02-09 14:57:42 +02007345 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007346};
7347
7348struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007349 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007350 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007351 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007352
7353 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007354 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007355
7356 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007357 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007358
7359 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007360 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007361};
7362
7363struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007364 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007365 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007366 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007367
Matan Barakb4ff3a32016-02-09 14:57:42 +02007368 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007369 u8 attenuation_5g[0x8];
7370
Matan Barakb4ff3a32016-02-09 14:57:42 +02007371 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007372 u8 attenuation_7g[0x8];
7373
Matan Barakb4ff3a32016-02-09 14:57:42 +02007374 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007375 u8 attenuation_12g[0x8];
7376};
7377
7378struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007379 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007380 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007381 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007382 u8 module_status[0x4];
7383
Matan Barakb4ff3a32016-02-09 14:57:42 +02007384 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007385};
7386
7387struct mlx5_ifc_pmpc_reg_bits {
7388 u8 module_state_updated[32][0x8];
7389};
7390
7391struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007392 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007393 u8 mlpn_status[0x4];
7394 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007395 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007396
7397 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007398 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007399};
7400
7401struct mlx5_ifc_pmlp_reg_bits {
7402 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007403 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007404 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007405 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007406 u8 width[0x8];
7407
7408 u8 lane0_module_mapping[0x20];
7409
7410 u8 lane1_module_mapping[0x20];
7411
7412 u8 lane2_module_mapping[0x20];
7413
7414 u8 lane3_module_mapping[0x20];
7415
Matan Barakb4ff3a32016-02-09 14:57:42 +02007416 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007417};
7418
7419struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007420 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007421 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007422 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007423 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007424 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007425 u8 oper_status[0x4];
7426
7427 u8 ase[0x1];
7428 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007429 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007430 u8 e[0x2];
7431
Matan Barakb4ff3a32016-02-09 14:57:42 +02007432 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007433};
7434
7435struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007436 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007437 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007438 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007439 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007440 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007441
Matan Barakb4ff3a32016-02-09 14:57:42 +02007442 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007443 u8 lane_speed[0x10];
7444
Matan Barakb4ff3a32016-02-09 14:57:42 +02007445 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007446 u8 lpbf[0x1];
7447 u8 fec_mode_policy[0x8];
7448
7449 u8 retransmission_capability[0x8];
7450 u8 fec_mode_capability[0x18];
7451
7452 u8 retransmission_support_admin[0x8];
7453 u8 fec_mode_support_admin[0x18];
7454
7455 u8 retransmission_request_admin[0x8];
7456 u8 fec_mode_request_admin[0x18];
7457
Matan Barakb4ff3a32016-02-09 14:57:42 +02007458 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007459};
7460
7461struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007462 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007463 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007464 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007465 u8 ib_port[0x8];
7466
Matan Barakb4ff3a32016-02-09 14:57:42 +02007467 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007468};
7469
7470struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007471 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007472 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007473 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007474 u8 lbf_mode[0x3];
7475
Matan Barakb4ff3a32016-02-09 14:57:42 +02007476 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007477};
7478
7479struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007480 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007481 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007482 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007483
7484 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007485 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007486 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007487 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007488};
7489
7490struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007491 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007492 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007493 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007494
Matan Barakb4ff3a32016-02-09 14:57:42 +02007495 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007496
7497 u8 port_filter[8][0x20];
7498
7499 u8 port_filter_update_en[8][0x20];
7500};
7501
7502struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007503 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007504 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007505 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007506
7507 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007508 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007509 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007510 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007511 u8 prio_mask_rx[0x8];
7512
7513 u8 pptx[0x1];
7514 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007515 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007516 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007517 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007518
7519 u8 pprx[0x1];
7520 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007521 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007522 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007523 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007524
Matan Barakb4ff3a32016-02-09 14:57:42 +02007525 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007526};
7527
7528struct mlx5_ifc_pelc_reg_bits {
7529 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007530 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007531 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007532 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007533
7534 u8 op_admin[0x8];
7535 u8 op_capability[0x8];
7536 u8 op_request[0x8];
7537 u8 op_active[0x8];
7538
7539 u8 admin[0x40];
7540
7541 u8 capability[0x40];
7542
7543 u8 request[0x40];
7544
7545 u8 active[0x40];
7546
Matan Barakb4ff3a32016-02-09 14:57:42 +02007547 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007548};
7549
7550struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007551 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007552 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007553 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007554
Matan Barakb4ff3a32016-02-09 14:57:42 +02007555 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007556 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007557 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007558
Matan Barakb4ff3a32016-02-09 14:57:42 +02007559 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007560 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007561 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007562 u8 error_type[0x8];
7563};
7564
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007565struct mlx5_ifc_pcam_enhanced_features_bits {
7566 u8 reserved_at_0[0x7e];
7567
7568 u8 ppcnt_discard_group[0x1];
7569 u8 ppcnt_statistical_group[0x1];
7570};
7571
7572struct mlx5_ifc_pcam_reg_bits {
7573 u8 reserved_at_0[0x8];
7574 u8 feature_group[0x8];
7575 u8 reserved_at_10[0x8];
7576 u8 access_reg_group[0x8];
7577
7578 u8 reserved_at_20[0x20];
7579
7580 union {
7581 u8 reserved_at_0[0x80];
7582 } port_access_reg_cap_mask;
7583
7584 u8 reserved_at_c0[0x80];
7585
7586 union {
7587 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7588 u8 reserved_at_0[0x80];
7589 } feature_cap_mask;
7590
7591 u8 reserved_at_1c0[0xc0];
7592};
7593
7594struct mlx5_ifc_mcam_enhanced_features_bits {
7595 u8 reserved_at_0[0x7f];
7596
7597 u8 pcie_performance_group[0x1];
7598};
7599
7600struct mlx5_ifc_mcam_reg_bits {
7601 u8 reserved_at_0[0x8];
7602 u8 feature_group[0x8];
7603 u8 reserved_at_10[0x8];
7604 u8 access_reg_group[0x8];
7605
7606 u8 reserved_at_20[0x20];
7607
7608 union {
7609 u8 reserved_at_0[0x80];
7610 } mng_access_reg_cap_mask;
7611
7612 u8 reserved_at_c0[0x80];
7613
7614 union {
7615 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7616 u8 reserved_at_0[0x80];
7617 } mng_feature_cap_mask;
7618
7619 u8 reserved_at_1c0[0x80];
7620};
7621
Saeed Mahameede2816822015-05-28 22:28:40 +03007622struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007623 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007624 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007625 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007626
7627 u8 port_capability_mask[4][0x20];
7628};
7629
7630struct mlx5_ifc_paos_reg_bits {
7631 u8 swid[0x8];
7632 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007633 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007634 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007635 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007636 u8 oper_status[0x4];
7637
7638 u8 ase[0x1];
7639 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007640 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007641 u8 e[0x2];
7642
Matan Barakb4ff3a32016-02-09 14:57:42 +02007643 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007644};
7645
7646struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007647 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007648 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007649 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007650 u8 opamp_group_type[0x4];
7651
7652 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007653 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007654 u8 num_of_indices[0xc];
7655
7656 u8 index_data[18][0x10];
7657};
7658
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007659struct mlx5_ifc_pcmr_reg_bits {
7660 u8 reserved_at_0[0x8];
7661 u8 local_port[0x8];
7662 u8 reserved_at_10[0x2e];
7663 u8 fcs_cap[0x1];
7664 u8 reserved_at_3f[0x1f];
7665 u8 fcs_chk[0x1];
7666 u8 reserved_at_5f[0x1];
7667};
7668
Saeed Mahameede2816822015-05-28 22:28:40 +03007669struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007670 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007671 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007672 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007673 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007674 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007675 u8 module[0x8];
7676};
7677
7678struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007679 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007680 u8 lossy[0x1];
7681 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007682 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007683 u8 size[0xc];
7684
7685 u8 xoff_threshold[0x10];
7686 u8 xon_threshold[0x10];
7687};
7688
7689struct mlx5_ifc_set_node_in_bits {
7690 u8 node_description[64][0x8];
7691};
7692
7693struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007694 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007695 u8 power_settings_level[0x8];
7696
Matan Barakb4ff3a32016-02-09 14:57:42 +02007697 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007698};
7699
7700struct mlx5_ifc_register_host_endianness_bits {
7701 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007702 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007703
Matan Barakb4ff3a32016-02-09 14:57:42 +02007704 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007705};
7706
7707struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007708 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007709
7710 u8 mkey[0x20];
7711
7712 u8 addressh_63_32[0x20];
7713
7714 u8 addressl_31_0[0x20];
7715};
7716
7717struct mlx5_ifc_ud_adrs_vector_bits {
7718 u8 dc_key[0x40];
7719
7720 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007721 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007722 u8 destination_qp_dct[0x18];
7723
7724 u8 static_rate[0x4];
7725 u8 sl_eth_prio[0x4];
7726 u8 fl[0x1];
7727 u8 mlid[0x7];
7728 u8 rlid_udp_sport[0x10];
7729
Matan Barakb4ff3a32016-02-09 14:57:42 +02007730 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007731
7732 u8 rmac_47_16[0x20];
7733
7734 u8 rmac_15_0[0x10];
7735 u8 tclass[0x8];
7736 u8 hop_limit[0x8];
7737
Matan Barakb4ff3a32016-02-09 14:57:42 +02007738 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03007739 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007740 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007741 u8 src_addr_index[0x8];
7742 u8 flow_label[0x14];
7743
7744 u8 rgid_rip[16][0x8];
7745};
7746
7747struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007748 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007749 u8 function_id[0x10];
7750
7751 u8 num_pages[0x20];
7752
Matan Barakb4ff3a32016-02-09 14:57:42 +02007753 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007754};
7755
7756struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007757 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007758 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007759 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007760 u8 event_sub_type[0x8];
7761
Matan Barakb4ff3a32016-02-09 14:57:42 +02007762 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007763
7764 union mlx5_ifc_event_auto_bits event_data;
7765
Matan Barakb4ff3a32016-02-09 14:57:42 +02007766 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007767 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007768 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007769 u8 owner[0x1];
7770};
7771
7772enum {
7773 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
7774};
7775
7776struct mlx5_ifc_cmd_queue_entry_bits {
7777 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007778 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007779
7780 u8 input_length[0x20];
7781
7782 u8 input_mailbox_pointer_63_32[0x20];
7783
7784 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007785 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007786
7787 u8 command_input_inline_data[16][0x8];
7788
7789 u8 command_output_inline_data[16][0x8];
7790
7791 u8 output_mailbox_pointer_63_32[0x20];
7792
7793 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007794 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007795
7796 u8 output_length[0x20];
7797
7798 u8 token[0x8];
7799 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007800 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007801 u8 status[0x7];
7802 u8 ownership[0x1];
7803};
7804
7805struct mlx5_ifc_cmd_out_bits {
7806 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007807 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007808
7809 u8 syndrome[0x20];
7810
7811 u8 command_output[0x20];
7812};
7813
7814struct mlx5_ifc_cmd_in_bits {
7815 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007816 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007817
Matan Barakb4ff3a32016-02-09 14:57:42 +02007818 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007819 u8 op_mod[0x10];
7820
7821 u8 command[0][0x20];
7822};
7823
7824struct mlx5_ifc_cmd_if_box_bits {
7825 u8 mailbox_data[512][0x8];
7826
Matan Barakb4ff3a32016-02-09 14:57:42 +02007827 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03007828
7829 u8 next_pointer_63_32[0x20];
7830
7831 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007832 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03007833
7834 u8 block_number[0x20];
7835
Matan Barakb4ff3a32016-02-09 14:57:42 +02007836 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007837 u8 token[0x8];
7838 u8 ctrl_signature[0x8];
7839 u8 signature[0x8];
7840};
7841
7842struct mlx5_ifc_mtt_bits {
7843 u8 ptag_63_32[0x20];
7844
7845 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007846 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007847 u8 wr_en[0x1];
7848 u8 rd_en[0x1];
7849};
7850
Tariq Toukan928cfe82016-02-22 18:17:29 +02007851struct mlx5_ifc_query_wol_rol_out_bits {
7852 u8 status[0x8];
7853 u8 reserved_at_8[0x18];
7854
7855 u8 syndrome[0x20];
7856
7857 u8 reserved_at_40[0x10];
7858 u8 rol_mode[0x8];
7859 u8 wol_mode[0x8];
7860
7861 u8 reserved_at_60[0x20];
7862};
7863
7864struct mlx5_ifc_query_wol_rol_in_bits {
7865 u8 opcode[0x10];
7866 u8 reserved_at_10[0x10];
7867
7868 u8 reserved_at_20[0x10];
7869 u8 op_mod[0x10];
7870
7871 u8 reserved_at_40[0x40];
7872};
7873
7874struct mlx5_ifc_set_wol_rol_out_bits {
7875 u8 status[0x8];
7876 u8 reserved_at_8[0x18];
7877
7878 u8 syndrome[0x20];
7879
7880 u8 reserved_at_40[0x40];
7881};
7882
7883struct mlx5_ifc_set_wol_rol_in_bits {
7884 u8 opcode[0x10];
7885 u8 reserved_at_10[0x10];
7886
7887 u8 reserved_at_20[0x10];
7888 u8 op_mod[0x10];
7889
7890 u8 rol_mode_valid[0x1];
7891 u8 wol_mode_valid[0x1];
7892 u8 reserved_at_42[0xe];
7893 u8 rol_mode[0x8];
7894 u8 wol_mode[0x8];
7895
7896 u8 reserved_at_60[0x20];
7897};
7898
Saeed Mahameede2816822015-05-28 22:28:40 +03007899enum {
7900 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
7901 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
7902 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
7903};
7904
7905enum {
7906 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
7907 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
7908 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
7909};
7910
7911enum {
7912 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
7913 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
7914 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
7915 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
7916 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
7917 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
7918 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
7919 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
7920 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
7921 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
7922 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
7923};
7924
7925struct mlx5_ifc_initial_seg_bits {
7926 u8 fw_rev_minor[0x10];
7927 u8 fw_rev_major[0x10];
7928
7929 u8 cmd_interface_rev[0x10];
7930 u8 fw_rev_subminor[0x10];
7931
Matan Barakb4ff3a32016-02-09 14:57:42 +02007932 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007933
7934 u8 cmdq_phy_addr_63_32[0x20];
7935
7936 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007937 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007938 u8 nic_interface[0x2];
7939 u8 log_cmdq_size[0x4];
7940 u8 log_cmdq_stride[0x4];
7941
7942 u8 command_doorbell_vector[0x20];
7943
Matan Barakb4ff3a32016-02-09 14:57:42 +02007944 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03007945
7946 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007947 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007948 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007949 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007950
7951 struct mlx5_ifc_health_buffer_bits health_buffer;
7952
7953 u8 no_dram_nic_offset[0x20];
7954
Matan Barakb4ff3a32016-02-09 14:57:42 +02007955 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007956
Matan Barakb4ff3a32016-02-09 14:57:42 +02007957 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007958 u8 clear_int[0x1];
7959
7960 u8 health_syndrome[0x8];
7961 u8 health_counter[0x18];
7962
Matan Barakb4ff3a32016-02-09 14:57:42 +02007963 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007964};
7965
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03007966struct mlx5_ifc_mtpps_reg_bits {
7967 u8 reserved_at_0[0xc];
7968 u8 cap_number_of_pps_pins[0x4];
7969 u8 reserved_at_10[0x4];
7970 u8 cap_max_num_of_pps_in_pins[0x4];
7971 u8 reserved_at_18[0x4];
7972 u8 cap_max_num_of_pps_out_pins[0x4];
7973
7974 u8 reserved_at_20[0x24];
7975 u8 cap_pin_3_mode[0x4];
7976 u8 reserved_at_48[0x4];
7977 u8 cap_pin_2_mode[0x4];
7978 u8 reserved_at_50[0x4];
7979 u8 cap_pin_1_mode[0x4];
7980 u8 reserved_at_58[0x4];
7981 u8 cap_pin_0_mode[0x4];
7982
7983 u8 reserved_at_60[0x4];
7984 u8 cap_pin_7_mode[0x4];
7985 u8 reserved_at_68[0x4];
7986 u8 cap_pin_6_mode[0x4];
7987 u8 reserved_at_70[0x4];
7988 u8 cap_pin_5_mode[0x4];
7989 u8 reserved_at_78[0x4];
7990 u8 cap_pin_4_mode[0x4];
7991
7992 u8 reserved_at_80[0x80];
7993
7994 u8 enable[0x1];
7995 u8 reserved_at_101[0xb];
7996 u8 pattern[0x4];
7997 u8 reserved_at_110[0x4];
7998 u8 pin_mode[0x4];
7999 u8 pin[0x8];
8000
8001 u8 reserved_at_120[0x20];
8002
8003 u8 time_stamp[0x40];
8004
8005 u8 out_pulse_duration[0x10];
8006 u8 out_periodic_adjustment[0x10];
8007
8008 u8 reserved_at_1a0[0x60];
8009};
8010
8011struct mlx5_ifc_mtppse_reg_bits {
8012 u8 reserved_at_0[0x18];
8013 u8 pin[0x8];
8014 u8 event_arm[0x1];
8015 u8 reserved_at_21[0x1b];
8016 u8 event_generation_mode[0x4];
8017 u8 reserved_at_40[0x40];
8018};
8019
Saeed Mahameede2816822015-05-28 22:28:40 +03008020union mlx5_ifc_ports_control_registers_document_bits {
8021 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8022 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8023 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8024 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8025 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8026 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8027 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8028 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8029 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8030 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8031 struct mlx5_ifc_paos_reg_bits paos_reg;
8032 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8033 struct mlx5_ifc_peir_reg_bits peir_reg;
8034 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8035 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008036 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008037 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8038 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8039 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8040 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8041 struct mlx5_ifc_plib_reg_bits plib_reg;
8042 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8043 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8044 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8045 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8046 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8047 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8048 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8049 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8050 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8051 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008052 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008053 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8054 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8055 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8056 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8057 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8058 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8059 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008060 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008061 struct mlx5_ifc_pude_reg_bits pude_reg;
8062 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8063 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8064 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008065 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8066 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008067 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008068};
8069
8070union mlx5_ifc_debug_enhancements_document_bits {
8071 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008072 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008073};
8074
8075union mlx5_ifc_uplink_pci_interface_document_bits {
8076 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008077 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008078};
8079
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008080struct mlx5_ifc_set_flow_table_root_out_bits {
8081 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008082 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008083
8084 u8 syndrome[0x20];
8085
Matan Barakb4ff3a32016-02-09 14:57:42 +02008086 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008087};
8088
8089struct mlx5_ifc_set_flow_table_root_in_bits {
8090 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008091 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008092
Matan Barakb4ff3a32016-02-09 14:57:42 +02008093 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008094 u8 op_mod[0x10];
8095
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008096 u8 other_vport[0x1];
8097 u8 reserved_at_41[0xf];
8098 u8 vport_number[0x10];
8099
8100 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008101
8102 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008103 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008104
Matan Barakb4ff3a32016-02-09 14:57:42 +02008105 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008106 u8 table_id[0x18];
8107
Matan Barakb4ff3a32016-02-09 14:57:42 +02008108 u8 reserved_at_c0[0x140];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008109};
8110
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008111enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008112 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8113 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008114};
8115
8116struct mlx5_ifc_modify_flow_table_out_bits {
8117 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008118 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008119
8120 u8 syndrome[0x20];
8121
Matan Barakb4ff3a32016-02-09 14:57:42 +02008122 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008123};
8124
8125struct mlx5_ifc_modify_flow_table_in_bits {
8126 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008127 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008128
Matan Barakb4ff3a32016-02-09 14:57:42 +02008129 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008130 u8 op_mod[0x10];
8131
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008132 u8 other_vport[0x1];
8133 u8 reserved_at_41[0xf];
8134 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008135
Matan Barakb4ff3a32016-02-09 14:57:42 +02008136 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008137 u8 modify_field_select[0x10];
8138
8139 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008140 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008141
Matan Barakb4ff3a32016-02-09 14:57:42 +02008142 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008143 u8 table_id[0x18];
8144
Matan Barakb4ff3a32016-02-09 14:57:42 +02008145 u8 reserved_at_c0[0x4];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008146 u8 table_miss_mode[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008147 u8 reserved_at_c8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008148
Matan Barakb4ff3a32016-02-09 14:57:42 +02008149 u8 reserved_at_e0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008150 u8 table_miss_id[0x18];
8151
Aviv Heller84df61e2016-05-10 13:47:50 +03008152 u8 reserved_at_100[0x8];
8153 u8 lag_master_next_table_id[0x18];
8154
8155 u8 reserved_at_120[0x80];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008156};
8157
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008158struct mlx5_ifc_ets_tcn_config_reg_bits {
8159 u8 g[0x1];
8160 u8 b[0x1];
8161 u8 r[0x1];
8162 u8 reserved_at_3[0x9];
8163 u8 group[0x4];
8164 u8 reserved_at_10[0x9];
8165 u8 bw_allocation[0x7];
8166
8167 u8 reserved_at_20[0xc];
8168 u8 max_bw_units[0x4];
8169 u8 reserved_at_30[0x8];
8170 u8 max_bw_value[0x8];
8171};
8172
8173struct mlx5_ifc_ets_global_config_reg_bits {
8174 u8 reserved_at_0[0x2];
8175 u8 r[0x1];
8176 u8 reserved_at_3[0x1d];
8177
8178 u8 reserved_at_20[0xc];
8179 u8 max_bw_units[0x4];
8180 u8 reserved_at_30[0x8];
8181 u8 max_bw_value[0x8];
8182};
8183
8184struct mlx5_ifc_qetc_reg_bits {
8185 u8 reserved_at_0[0x8];
8186 u8 port_number[0x8];
8187 u8 reserved_at_10[0x30];
8188
8189 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8190 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8191};
8192
8193struct mlx5_ifc_qtct_reg_bits {
8194 u8 reserved_at_0[0x8];
8195 u8 port_number[0x8];
8196 u8 reserved_at_10[0xd];
8197 u8 prio[0x3];
8198
8199 u8 reserved_at_20[0x1d];
8200 u8 tclass[0x3];
8201};
8202
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008203struct mlx5_ifc_mcia_reg_bits {
8204 u8 l[0x1];
8205 u8 reserved_at_1[0x7];
8206 u8 module[0x8];
8207 u8 reserved_at_10[0x8];
8208 u8 status[0x8];
8209
8210 u8 i2c_device_address[0x8];
8211 u8 page_number[0x8];
8212 u8 device_address[0x10];
8213
8214 u8 reserved_at_40[0x10];
8215 u8 size[0x10];
8216
8217 u8 reserved_at_60[0x20];
8218
8219 u8 dword_0[0x20];
8220 u8 dword_1[0x20];
8221 u8 dword_2[0x20];
8222 u8 dword_3[0x20];
8223 u8 dword_4[0x20];
8224 u8 dword_5[0x20];
8225 u8 dword_6[0x20];
8226 u8 dword_7[0x20];
8227 u8 dword_8[0x20];
8228 u8 dword_9[0x20];
8229 u8 dword_10[0x20];
8230 u8 dword_11[0x20];
8231};
8232
Saeed Mahameed74862162016-06-09 15:11:34 +03008233struct mlx5_ifc_dcbx_param_bits {
8234 u8 dcbx_cee_cap[0x1];
8235 u8 dcbx_ieee_cap[0x1];
8236 u8 dcbx_standby_cap[0x1];
8237 u8 reserved_at_0[0x5];
8238 u8 port_number[0x8];
8239 u8 reserved_at_10[0xa];
8240 u8 max_application_table_size[6];
8241 u8 reserved_at_20[0x15];
8242 u8 version_oper[0x3];
8243 u8 reserved_at_38[5];
8244 u8 version_admin[0x3];
8245 u8 willing_admin[0x1];
8246 u8 reserved_at_41[0x3];
8247 u8 pfc_cap_oper[0x4];
8248 u8 reserved_at_48[0x4];
8249 u8 pfc_cap_admin[0x4];
8250 u8 reserved_at_50[0x4];
8251 u8 num_of_tc_oper[0x4];
8252 u8 reserved_at_58[0x4];
8253 u8 num_of_tc_admin[0x4];
8254 u8 remote_willing[0x1];
8255 u8 reserved_at_61[3];
8256 u8 remote_pfc_cap[4];
8257 u8 reserved_at_68[0x14];
8258 u8 remote_num_of_tc[0x4];
8259 u8 reserved_at_80[0x18];
8260 u8 error[0x8];
8261 u8 reserved_at_a0[0x160];
8262};
Aviv Heller84df61e2016-05-10 13:47:50 +03008263
8264struct mlx5_ifc_lagc_bits {
8265 u8 reserved_at_0[0x1d];
8266 u8 lag_state[0x3];
8267
8268 u8 reserved_at_20[0x14];
8269 u8 tx_remap_affinity_2[0x4];
8270 u8 reserved_at_38[0x4];
8271 u8 tx_remap_affinity_1[0x4];
8272};
8273
8274struct mlx5_ifc_create_lag_out_bits {
8275 u8 status[0x8];
8276 u8 reserved_at_8[0x18];
8277
8278 u8 syndrome[0x20];
8279
8280 u8 reserved_at_40[0x40];
8281};
8282
8283struct mlx5_ifc_create_lag_in_bits {
8284 u8 opcode[0x10];
8285 u8 reserved_at_10[0x10];
8286
8287 u8 reserved_at_20[0x10];
8288 u8 op_mod[0x10];
8289
8290 struct mlx5_ifc_lagc_bits ctx;
8291};
8292
8293struct mlx5_ifc_modify_lag_out_bits {
8294 u8 status[0x8];
8295 u8 reserved_at_8[0x18];
8296
8297 u8 syndrome[0x20];
8298
8299 u8 reserved_at_40[0x40];
8300};
8301
8302struct mlx5_ifc_modify_lag_in_bits {
8303 u8 opcode[0x10];
8304 u8 reserved_at_10[0x10];
8305
8306 u8 reserved_at_20[0x10];
8307 u8 op_mod[0x10];
8308
8309 u8 reserved_at_40[0x20];
8310 u8 field_select[0x20];
8311
8312 struct mlx5_ifc_lagc_bits ctx;
8313};
8314
8315struct mlx5_ifc_query_lag_out_bits {
8316 u8 status[0x8];
8317 u8 reserved_at_8[0x18];
8318
8319 u8 syndrome[0x20];
8320
8321 u8 reserved_at_40[0x40];
8322
8323 struct mlx5_ifc_lagc_bits ctx;
8324};
8325
8326struct mlx5_ifc_query_lag_in_bits {
8327 u8 opcode[0x10];
8328 u8 reserved_at_10[0x10];
8329
8330 u8 reserved_at_20[0x10];
8331 u8 op_mod[0x10];
8332
8333 u8 reserved_at_40[0x40];
8334};
8335
8336struct mlx5_ifc_destroy_lag_out_bits {
8337 u8 status[0x8];
8338 u8 reserved_at_8[0x18];
8339
8340 u8 syndrome[0x20];
8341
8342 u8 reserved_at_40[0x40];
8343};
8344
8345struct mlx5_ifc_destroy_lag_in_bits {
8346 u8 opcode[0x10];
8347 u8 reserved_at_10[0x10];
8348
8349 u8 reserved_at_20[0x10];
8350 u8 op_mod[0x10];
8351
8352 u8 reserved_at_40[0x40];
8353};
8354
8355struct mlx5_ifc_create_vport_lag_out_bits {
8356 u8 status[0x8];
8357 u8 reserved_at_8[0x18];
8358
8359 u8 syndrome[0x20];
8360
8361 u8 reserved_at_40[0x40];
8362};
8363
8364struct mlx5_ifc_create_vport_lag_in_bits {
8365 u8 opcode[0x10];
8366 u8 reserved_at_10[0x10];
8367
8368 u8 reserved_at_20[0x10];
8369 u8 op_mod[0x10];
8370
8371 u8 reserved_at_40[0x40];
8372};
8373
8374struct mlx5_ifc_destroy_vport_lag_out_bits {
8375 u8 status[0x8];
8376 u8 reserved_at_8[0x18];
8377
8378 u8 syndrome[0x20];
8379
8380 u8 reserved_at_40[0x40];
8381};
8382
8383struct mlx5_ifc_destroy_vport_lag_in_bits {
8384 u8 opcode[0x10];
8385 u8 reserved_at_10[0x10];
8386
8387 u8 reserved_at_20[0x10];
8388 u8 op_mod[0x10];
8389
8390 u8 reserved_at_40[0x40];
8391};
8392
Eli Cohend29b7962014-10-02 12:19:43 +03008393#endif /* MLX5_IFC_H */