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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
35enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030036 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
37 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
38 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
39 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
40 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
41 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
42 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
43 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
44 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
45 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
46 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
47 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
48 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
49 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
50 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
51 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
52 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
53 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
54 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
55 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
56 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
57 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
58 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
59 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb
60};
61
62enum {
63 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
64 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
65 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
66 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
67};
68
69enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020070 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
71 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
72};
73
74enum {
Eli Cohend29b7962014-10-02 12:19:43 +030075 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
76 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
77 MLX5_CMD_OP_INIT_HCA = 0x102,
78 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
79 MLX5_CMD_OP_ENABLE_HCA = 0x104,
80 MLX5_CMD_OP_DISABLE_HCA = 0x105,
81 MLX5_CMD_OP_QUERY_PAGES = 0x107,
82 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
83 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030084 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
85 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020086 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030087 MLX5_CMD_OP_CREATE_MKEY = 0x200,
88 MLX5_CMD_OP_QUERY_MKEY = 0x201,
89 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
90 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
91 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
92 MLX5_CMD_OP_CREATE_EQ = 0x301,
93 MLX5_CMD_OP_DESTROY_EQ = 0x302,
94 MLX5_CMD_OP_QUERY_EQ = 0x303,
95 MLX5_CMD_OP_GEN_EQE = 0x304,
96 MLX5_CMD_OP_CREATE_CQ = 0x400,
97 MLX5_CMD_OP_DESTROY_CQ = 0x401,
98 MLX5_CMD_OP_QUERY_CQ = 0x402,
99 MLX5_CMD_OP_MODIFY_CQ = 0x403,
100 MLX5_CMD_OP_CREATE_QP = 0x500,
101 MLX5_CMD_OP_DESTROY_QP = 0x501,
102 MLX5_CMD_OP_RST2INIT_QP = 0x502,
103 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
104 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
105 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
106 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
107 MLX5_CMD_OP_2ERR_QP = 0x507,
108 MLX5_CMD_OP_2RST_QP = 0x50a,
109 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300110 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300111 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
112 MLX5_CMD_OP_CREATE_PSV = 0x600,
113 MLX5_CMD_OP_DESTROY_PSV = 0x601,
114 MLX5_CMD_OP_CREATE_SRQ = 0x700,
115 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
116 MLX5_CMD_OP_QUERY_SRQ = 0x702,
117 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300118 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
119 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
120 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
121 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300122 MLX5_CMD_OP_CREATE_DCT = 0x710,
123 MLX5_CMD_OP_DESTROY_DCT = 0x711,
124 MLX5_CMD_OP_DRAIN_DCT = 0x712,
125 MLX5_CMD_OP_QUERY_DCT = 0x713,
126 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300127 MLX5_CMD_OP_CREATE_XRQ = 0x717,
128 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
129 MLX5_CMD_OP_QUERY_XRQ = 0x719,
130 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300131 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
132 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
133 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
134 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
135 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
136 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300137 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300138 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300139 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
140 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
141 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
142 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300143 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
144 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
145 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
146 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Saeed Mahameed74862162016-06-09 15:11:34 +0300147 MLX5_CMD_OP_SET_RATE_LIMIT = 0x780,
148 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300149 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
150 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
151 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
152 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
153 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
154 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300155 MLX5_CMD_OP_ALLOC_PD = 0x800,
156 MLX5_CMD_OP_DEALLOC_PD = 0x801,
157 MLX5_CMD_OP_ALLOC_UAR = 0x802,
158 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
159 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
160 MLX5_CMD_OP_ACCESS_REG = 0x805,
161 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300162 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300163 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
164 MLX5_CMD_OP_MAD_IFC = 0x50d,
165 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
166 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
167 MLX5_CMD_OP_NOP = 0x80d,
168 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
169 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300170 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
171 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
172 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
173 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
174 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
175 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
176 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
177 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
178 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
179 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
180 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
181 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200182 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
183 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300184 MLX5_CMD_OP_CREATE_LAG = 0x840,
185 MLX5_CMD_OP_MODIFY_LAG = 0x841,
186 MLX5_CMD_OP_QUERY_LAG = 0x842,
187 MLX5_CMD_OP_DESTROY_LAG = 0x843,
188 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
189 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300190 MLX5_CMD_OP_CREATE_TIR = 0x900,
191 MLX5_CMD_OP_MODIFY_TIR = 0x901,
192 MLX5_CMD_OP_DESTROY_TIR = 0x902,
193 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300194 MLX5_CMD_OP_CREATE_SQ = 0x904,
195 MLX5_CMD_OP_MODIFY_SQ = 0x905,
196 MLX5_CMD_OP_DESTROY_SQ = 0x906,
197 MLX5_CMD_OP_QUERY_SQ = 0x907,
198 MLX5_CMD_OP_CREATE_RQ = 0x908,
199 MLX5_CMD_OP_MODIFY_RQ = 0x909,
200 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
201 MLX5_CMD_OP_QUERY_RQ = 0x90b,
202 MLX5_CMD_OP_CREATE_RMP = 0x90c,
203 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
204 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
205 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300206 MLX5_CMD_OP_CREATE_TIS = 0x912,
207 MLX5_CMD_OP_MODIFY_TIS = 0x913,
208 MLX5_CMD_OP_DESTROY_TIS = 0x914,
209 MLX5_CMD_OP_QUERY_TIS = 0x915,
210 MLX5_CMD_OP_CREATE_RQT = 0x916,
211 MLX5_CMD_OP_MODIFY_RQT = 0x917,
212 MLX5_CMD_OP_DESTROY_RQT = 0x918,
213 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200214 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300215 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
216 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
217 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
218 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
219 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
220 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
221 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
222 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200223 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000224 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
225 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
226 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300227 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300228 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
229 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200230 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
231 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Shahar Klein86d56a12016-06-10 00:07:30 +0300232 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300233};
234
235struct mlx5_ifc_flow_table_fields_supported_bits {
236 u8 outer_dmac[0x1];
237 u8 outer_smac[0x1];
238 u8 outer_ether_type[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200239 u8 reserved_at_3[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300240 u8 outer_first_prio[0x1];
241 u8 outer_first_cfi[0x1];
242 u8 outer_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200243 u8 reserved_at_7[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300244 u8 outer_second_prio[0x1];
245 u8 outer_second_cfi[0x1];
246 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200247 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300248 u8 outer_sip[0x1];
249 u8 outer_dip[0x1];
250 u8 outer_frag[0x1];
251 u8 outer_ip_protocol[0x1];
252 u8 outer_ip_ecn[0x1];
253 u8 outer_ip_dscp[0x1];
254 u8 outer_udp_sport[0x1];
255 u8 outer_udp_dport[0x1];
256 u8 outer_tcp_sport[0x1];
257 u8 outer_tcp_dport[0x1];
258 u8 outer_tcp_flags[0x1];
259 u8 outer_gre_protocol[0x1];
260 u8 outer_gre_key[0x1];
261 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200262 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300263 u8 source_eswitch_port[0x1];
264
265 u8 inner_dmac[0x1];
266 u8 inner_smac[0x1];
267 u8 inner_ether_type[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200268 u8 reserved_at_23[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300269 u8 inner_first_prio[0x1];
270 u8 inner_first_cfi[0x1];
271 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200272 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300273 u8 inner_second_prio[0x1];
274 u8 inner_second_cfi[0x1];
275 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200276 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300277 u8 inner_sip[0x1];
278 u8 inner_dip[0x1];
279 u8 inner_frag[0x1];
280 u8 inner_ip_protocol[0x1];
281 u8 inner_ip_ecn[0x1];
282 u8 inner_ip_dscp[0x1];
283 u8 inner_udp_sport[0x1];
284 u8 inner_udp_dport[0x1];
285 u8 inner_tcp_sport[0x1];
286 u8 inner_tcp_dport[0x1];
287 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200288 u8 reserved_at_37[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +0300289
Matan Barakb4ff3a32016-02-09 14:57:42 +0200290 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300291};
292
293struct mlx5_ifc_flow_table_prop_layout_bits {
294 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000295 u8 reserved_at_1[0x1];
296 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200297 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200298 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200299 u8 identified_miss_table_mode[0x1];
300 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300301 u8 encap[0x1];
302 u8 decap[0x1];
303 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300304
Matan Barakb4ff3a32016-02-09 14:57:42 +0200305 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300306 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200307 u8 log_max_modify_header_context[0x8];
308 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300309 u8 max_ft_level[0x8];
310
Matan Barakb4ff3a32016-02-09 14:57:42 +0200311 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300312
Matan Barakb4ff3a32016-02-09 14:57:42 +0200313 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200314 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300315
Matan Barakb4ff3a32016-02-09 14:57:42 +0200316 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200317 u8 log_max_destination[0x8];
318
Matan Barakb4ff3a32016-02-09 14:57:42 +0200319 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320 u8 log_max_flow[0x8];
321
Matan Barakb4ff3a32016-02-09 14:57:42 +0200322 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
324 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
325
326 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
327};
328
329struct mlx5_ifc_odp_per_transport_service_cap_bits {
330 u8 send[0x1];
331 u8 receive[0x1];
332 u8 write[0x1];
333 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200334 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300335 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200336 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300337};
338
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200339struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200340 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200341
342 u8 ipv4[0x20];
343};
344
345struct mlx5_ifc_ipv6_layout_bits {
346 u8 ipv6[16][0x8];
347};
348
349union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
350 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
351 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200352 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200353};
354
Saeed Mahameede2816822015-05-28 22:28:40 +0300355struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
356 u8 smac_47_16[0x20];
357
358 u8 smac_15_0[0x10];
359 u8 ethertype[0x10];
360
361 u8 dmac_47_16[0x20];
362
363 u8 dmac_15_0[0x10];
364 u8 first_prio[0x3];
365 u8 first_cfi[0x1];
366 u8 first_vid[0xc];
367
368 u8 ip_protocol[0x8];
369 u8 ip_dscp[0x6];
370 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300371 u8 cvlan_tag[0x1];
372 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300373 u8 frag[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200374 u8 reserved_at_93[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300375 u8 tcp_flags[0x9];
376
377 u8 tcp_sport[0x10];
378 u8 tcp_dport[0x10];
379
Matan Barakb4ff3a32016-02-09 14:57:42 +0200380 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300381
382 u8 udp_sport[0x10];
383 u8 udp_dport[0x10];
384
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200385 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300386
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200387 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300388};
389
390struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300391 u8 reserved_at_0[0x8];
392 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300393
Matan Barakb4ff3a32016-02-09 14:57:42 +0200394 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300395 u8 source_port[0x10];
396
397 u8 outer_second_prio[0x3];
398 u8 outer_second_cfi[0x1];
399 u8 outer_second_vid[0xc];
400 u8 inner_second_prio[0x3];
401 u8 inner_second_cfi[0x1];
402 u8 inner_second_vid[0xc];
403
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300404 u8 outer_second_cvlan_tag[0x1];
405 u8 inner_second_cvlan_tag[0x1];
406 u8 outer_second_svlan_tag[0x1];
407 u8 inner_second_svlan_tag[0x1];
408 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300409 u8 gre_protocol[0x10];
410
411 u8 gre_key_h[0x18];
412 u8 gre_key_l[0x8];
413
414 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200415 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300416
Matan Barakb4ff3a32016-02-09 14:57:42 +0200417 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300418
Matan Barakb4ff3a32016-02-09 14:57:42 +0200419 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300420 u8 outer_ipv6_flow_label[0x14];
421
Matan Barakb4ff3a32016-02-09 14:57:42 +0200422 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300423 u8 inner_ipv6_flow_label[0x14];
424
Matan Barakb4ff3a32016-02-09 14:57:42 +0200425 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300426};
427
428struct mlx5_ifc_cmd_pas_bits {
429 u8 pa_h[0x20];
430
431 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200432 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300433};
434
435struct mlx5_ifc_uint64_bits {
436 u8 hi[0x20];
437
438 u8 lo[0x20];
439};
440
441enum {
442 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
443 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
444 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
445 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
446 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
447 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
448 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
449 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
450 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
451 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
452};
453
454struct mlx5_ifc_ads_bits {
455 u8 fl[0x1];
456 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200457 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300458 u8 pkey_index[0x10];
459
Matan Barakb4ff3a32016-02-09 14:57:42 +0200460 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300461 u8 grh[0x1];
462 u8 mlid[0x7];
463 u8 rlid[0x10];
464
465 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200466 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300467 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200468 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300469 u8 stat_rate[0x4];
470 u8 hop_limit[0x8];
471
Matan Barakb4ff3a32016-02-09 14:57:42 +0200472 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300473 u8 tclass[0x8];
474 u8 flow_label[0x14];
475
476 u8 rgid_rip[16][0x8];
477
Matan Barakb4ff3a32016-02-09 14:57:42 +0200478 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300479 u8 f_dscp[0x1];
480 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 f_eth_prio[0x1];
483 u8 ecn[0x2];
484 u8 dscp[0x6];
485 u8 udp_sport[0x10];
486
487 u8 dei_cfi[0x1];
488 u8 eth_prio[0x3];
489 u8 sl[0x4];
490 u8 port[0x8];
491 u8 rmac_47_32[0x10];
492
493 u8 rmac_31_0[0x20];
494};
495
496struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200497 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300498 u8 nic_rx_multi_path_tirs_fts[0x1];
499 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
500 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300501
502 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
503
Matan Barakb4ff3a32016-02-09 14:57:42 +0200504 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300505
506 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
507
508 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
509
Matan Barakb4ff3a32016-02-09 14:57:42 +0200510 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300511
512 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
513
Matan Barakb4ff3a32016-02-09 14:57:42 +0200514 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300515};
516
Saeed Mahameed495716b2015-12-01 18:03:19 +0200517struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200518 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200519
520 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
521
522 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
523
524 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
525
Matan Barakb4ff3a32016-02-09 14:57:42 +0200526 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200527};
528
Saeed Mahameedd6666752015-12-01 18:03:22 +0200529struct mlx5_ifc_e_switch_cap_bits {
530 u8 vport_svlan_strip[0x1];
531 u8 vport_cvlan_strip[0x1];
532 u8 vport_svlan_insert[0x1];
533 u8 vport_cvlan_insert_if_not_exist[0x1];
534 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300535 u8 reserved_at_5[0x19];
536 u8 nic_vport_node_guid_modify[0x1];
537 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200538
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300539 u8 vxlan_encap_decap[0x1];
540 u8 nvgre_encap_decap[0x1];
541 u8 reserved_at_22[0x9];
542 u8 log_max_encap_headers[0x5];
543 u8 reserved_2b[0x6];
544 u8 max_encap_header_size[0xa];
545
546 u8 reserved_40[0x7c0];
547
Saeed Mahameedd6666752015-12-01 18:03:22 +0200548};
549
Saeed Mahameed74862162016-06-09 15:11:34 +0300550struct mlx5_ifc_qos_cap_bits {
551 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300552 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200553 u8 esw_bw_share[0x1];
554 u8 esw_rate_limit[0x1];
555 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300556
557 u8 reserved_at_20[0x20];
558
Saeed Mahameed74862162016-06-09 15:11:34 +0300559 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300560
Saeed Mahameed74862162016-06-09 15:11:34 +0300561 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300562
563 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300564 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300565
566 u8 esw_element_type[0x10];
567 u8 esw_tsar_type[0x10];
568
569 u8 reserved_at_c0[0x10];
570 u8 max_qos_para_vport[0x10];
571
572 u8 max_tsar_bw_share[0x20];
573
574 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300575};
576
Saeed Mahameede2816822015-05-28 22:28:40 +0300577struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
578 u8 csum_cap[0x1];
579 u8 vlan_cap[0x1];
580 u8 lro_cap[0x1];
581 u8 lro_psh_flag[0x1];
582 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200583 u8 reserved_at_5[0x2];
584 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200585 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200586 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300587 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200588 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300589 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300590 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300591 u8 reg_umr_sq[0x1];
592 u8 scatter_fcs[0x1];
593 u8 reserved_at_1a[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300594 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200595 u8 reserved_at_1c[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300596 u8 tunnel_statless_gre[0x1];
597 u8 tunnel_stateless_vxlan[0x1];
598
Matan Barakb4ff3a32016-02-09 14:57:42 +0200599 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300600
Matan Barakb4ff3a32016-02-09 14:57:42 +0200601 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300602 u8 lro_min_mss_size[0x10];
603
Matan Barakb4ff3a32016-02-09 14:57:42 +0200604 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300605
606 u8 lro_timer_supported_periods[4][0x20];
607
Matan Barakb4ff3a32016-02-09 14:57:42 +0200608 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300609};
610
611struct mlx5_ifc_roce_cap_bits {
612 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200613 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300614
Matan Barakb4ff3a32016-02-09 14:57:42 +0200615 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300616
Matan Barakb4ff3a32016-02-09 14:57:42 +0200617 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300618 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200619 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300620 u8 roce_version[0x8];
621
Matan Barakb4ff3a32016-02-09 14:57:42 +0200622 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300623 u8 r_roce_dest_udp_port[0x10];
624
625 u8 r_roce_max_src_udp_port[0x10];
626 u8 r_roce_min_src_udp_port[0x10];
627
Matan Barakb4ff3a32016-02-09 14:57:42 +0200628 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300629 u8 roce_address_table_size[0x10];
630
Matan Barakb4ff3a32016-02-09 14:57:42 +0200631 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300632};
633
634enum {
635 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
636 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
637 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
638 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
639 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
640 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
641 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
642 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
643 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
644};
645
646enum {
647 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
648 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
649 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
650 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
651 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
652 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
653 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
654 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
656};
657
658struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200659 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300660
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200661 u8 atomic_req_8B_endianess_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200662 u8 reserved_at_42[0x4];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200663 u8 supported_atomic_req_8B_endianess_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300664
Matan Barakb4ff3a32016-02-09 14:57:42 +0200665 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300666
Matan Barakb4ff3a32016-02-09 14:57:42 +0200667 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300668
Matan Barakb4ff3a32016-02-09 14:57:42 +0200669 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200670 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300671
Matan Barakb4ff3a32016-02-09 14:57:42 +0200672 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200673 u8 atomic_size_qp[0x10];
674
Matan Barakb4ff3a32016-02-09 14:57:42 +0200675 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300676 u8 atomic_size_dc[0x10];
677
Matan Barakb4ff3a32016-02-09 14:57:42 +0200678 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300679};
680
681struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200682 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300683
684 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200685 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300686
Matan Barakb4ff3a32016-02-09 14:57:42 +0200687 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300688
689 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
690
691 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
692
693 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
694
Matan Barakb4ff3a32016-02-09 14:57:42 +0200695 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300696};
697
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200698struct mlx5_ifc_calc_op {
699 u8 reserved_at_0[0x10];
700 u8 reserved_at_10[0x9];
701 u8 op_swap_endianness[0x1];
702 u8 op_min[0x1];
703 u8 op_xor[0x1];
704 u8 op_or[0x1];
705 u8 op_and[0x1];
706 u8 op_max[0x1];
707 u8 op_add[0x1];
708};
709
710struct mlx5_ifc_vector_calc_cap_bits {
711 u8 calc_matrix[0x1];
712 u8 reserved_at_1[0x1f];
713 u8 reserved_at_20[0x8];
714 u8 max_vec_count[0x8];
715 u8 reserved_at_30[0xd];
716 u8 max_chunk_size[0x3];
717 struct mlx5_ifc_calc_op calc0;
718 struct mlx5_ifc_calc_op calc1;
719 struct mlx5_ifc_calc_op calc2;
720 struct mlx5_ifc_calc_op calc3;
721
722 u8 reserved_at_e0[0x720];
723};
724
Saeed Mahameede2816822015-05-28 22:28:40 +0300725enum {
726 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
727 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300728 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +0300729};
730
731enum {
732 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
733 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
734};
735
736enum {
737 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
738 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
739 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
740 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
741 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
742};
743
744enum {
745 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
746 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
747 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
748 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
749 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
750 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
751};
752
753enum {
754 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
755 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
756};
757
758enum {
759 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
760 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
761 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
762};
763
764enum {
765 MLX5_CAP_PORT_TYPE_IB = 0x0,
766 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300767};
768
Eli Cohenb7755162014-10-02 12:19:44 +0300769struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200770 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300771
772 u8 log_max_srq_sz[0x8];
773 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200774 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300775 u8 log_max_qp[0x5];
776
Matan Barakb4ff3a32016-02-09 14:57:42 +0200777 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300778 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200779 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300780
Matan Barakb4ff3a32016-02-09 14:57:42 +0200781 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300782 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200783 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300784 u8 log_max_cq[0x5];
785
786 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200787 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300788 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200789 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300790 u8 log_max_eq[0x4];
791
792 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200793 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300794 u8 log_max_mrw_sz[0x7];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200795 u8 reserved_at_110[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300796 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200797 u8 umr_extended_translation_offset[0x1];
798 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300799 u8 log_max_klm_list_size[0x6];
800
Matan Barakb4ff3a32016-02-09 14:57:42 +0200801 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300802 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200803 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300804 u8 log_max_ra_res_dc[0x6];
805
Matan Barakb4ff3a32016-02-09 14:57:42 +0200806 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300807 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200808 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300809 u8 log_max_ra_res_qp[0x6];
810
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200811 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300812 u8 cc_query_allowed[0x1];
813 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200814 u8 start_pad[0x1];
815 u8 cache_line_128byte[0x1];
816 u8 reserved_at_163[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300817 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300818
Saeed Mahameede2816822015-05-28 22:28:40 +0300819 u8 out_of_seq_cnt[0x1];
820 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300821 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300822 u8 reserved_at_183[0x1];
823 u8 modify_rq_counter_set_id[0x1];
824 u8 reserved_at_185[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300825 u8 max_qp_cnt[0xa];
826 u8 pkey_table_size[0x10];
827
Saeed Mahameede2816822015-05-28 22:28:40 +0300828 u8 vport_group_manager[0x1];
829 u8 vhca_group_manager[0x1];
830 u8 ib_virt[0x1];
831 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200832 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300833 u8 ets[0x1];
834 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200835 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300836 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200837 u8 mcam_reg[0x1];
838 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300839 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200840 u8 port_module_event[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200841 u8 reserved_at_1b1[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300842 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200843 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300844 u8 disable_link_up[0x1];
845 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300846 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300847 u8 num_ports[0x8];
848
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300849 u8 reserved_at_1c0[0x1];
850 u8 pps[0x1];
851 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300852 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300853 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200854 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300855 u8 reserved_at_1d0[0x1];
856 u8 dcbx[0x1];
857 u8 reserved_at_1d2[0x4];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200858 u8 rol_s[0x1];
859 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300860 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200861 u8 wol_s[0x1];
862 u8 wol_g[0x1];
863 u8 wol_a[0x1];
864 u8 wol_b[0x1];
865 u8 wol_m[0x1];
866 u8 wol_u[0x1];
867 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300868
869 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300870 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300871 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300872
Saeed Mahameede2816822015-05-28 22:28:40 +0300873 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300874 u8 striding_rq[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200875 u8 reserved_at_202[0x2];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200876 u8 ipoib_basic_offloads[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300877 u8 reserved_at_205[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +0300878 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300879 u8 cmdif_checksum[0x2];
880 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300881 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300882 u8 wq_signature[0x1];
883 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300884 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300885 u8 sho[0x1];
886 u8 tph[0x1];
887 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300888 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300889 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300890 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300891 u8 roce[0x1];
892 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300893 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300894
895 u8 cq_oi[0x1];
896 u8 cq_resize[0x1];
897 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300898 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300899 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300900 u8 pg[0x1];
901 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300902 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300903 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300904 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300905 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300906 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300907 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200908 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300909 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200910 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300911 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300912 u8 qkv[0x1];
913 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200914 u8 set_deth_sqpn[0x1];
915 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300916 u8 xrc[0x1];
917 u8 ud[0x1];
918 u8 uc[0x1];
919 u8 rc[0x1];
920
Eli Cohena6d51b62017-01-03 23:55:23 +0200921 u8 uar_4k[0x1];
922 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300923 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300924 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300925 u8 log_pg_sz[0x8];
926
927 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200928 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300929 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300930 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300931 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300932
933 u8 reserved_at_270[0xb];
934 u8 lag_master[0x1];
935 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300936
Tariq Toukane1c9c622016-04-11 23:10:21 +0300937 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300938 u8 max_wqe_sz_sq[0x10];
939
Tariq Toukane1c9c622016-04-11 23:10:21 +0300940 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300941 u8 max_wqe_sz_rq[0x10];
942
Tariq Toukane1c9c622016-04-11 23:10:21 +0300943 u8 reserved_at_2c0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300944 u8 max_wqe_sz_sq_dc[0x10];
945
Tariq Toukane1c9c622016-04-11 23:10:21 +0300946 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300947 u8 max_qp_mcg[0x19];
948
Tariq Toukane1c9c622016-04-11 23:10:21 +0300949 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300950 u8 log_max_mcg[0x8];
951
Tariq Toukane1c9c622016-04-11 23:10:21 +0300952 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300953 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300954 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300955 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300956 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300957 u8 log_max_xrcd[0x5];
958
Amir Vadaia351a1b02016-07-14 10:32:38 +0300959 u8 reserved_at_340[0x8];
960 u8 log_max_flow_counter_bulk[0x8];
961 u8 max_flow_counter[0x10];
962
Eli Cohenb7755162014-10-02 12:19:44 +0300963
Tariq Toukane1c9c622016-04-11 23:10:21 +0300964 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300965 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300966 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300967 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300968 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300969 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300970 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300971 u8 log_max_tis[0x5];
972
Saeed Mahameede2816822015-05-28 22:28:40 +0300973 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300974 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300975 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300976 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300977 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300978 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300979 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300980 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300981 u8 log_max_tis_per_sq[0x5];
982
Tariq Toukane1c9c622016-04-11 23:10:21 +0300983 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300984 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300985 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300986 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300987 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300988 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300989 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300990 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +0300991
Tariq Toukane1c9c622016-04-11 23:10:21 +0300992 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +0300993 u8 log_max_wq_sz[0x5];
994
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200995 u8 nic_vport_change_event[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300996 u8 reserved_at_3e1[0xa];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200997 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300998 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200999 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001000 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001001 u8 log_max_current_uc_list[0x5];
1002
Tariq Toukane1c9c622016-04-11 23:10:21 +03001003 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001004
Tariq Toukane1c9c622016-04-11 23:10:21 +03001005 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001006 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001007 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001008 u8 log_uar_page_sz[0x10];
1009
Tariq Toukane1c9c622016-04-11 23:10:21 +03001010 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001011 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001012 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001013
Eli Cohena6d51b62017-01-03 23:55:23 +02001014 u8 reserved_at_500[0x20];
1015 u8 num_of_uars_per_page[0x20];
1016 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001017
1018 u8 reserved_at_580[0x3f];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001019 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001020
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001021 u8 cqe_compression_timeout[0x10];
1022 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001023
Saeed Mahameed74862162016-06-09 15:11:34 +03001024 u8 reserved_at_5e0[0x10];
1025 u8 tag_matching[0x1];
1026 u8 rndv_offload_rc[0x1];
1027 u8 rndv_offload_dc[0x1];
1028 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001029 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001030 u8 log_max_xrq[0x5];
1031
Max Gurtovoy7b135582017-01-02 11:37:38 +02001032 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001033};
1034
Saeed Mahameed81848732015-12-01 18:03:20 +02001035enum mlx5_flow_destination_type {
1036 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1037 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1038 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001039
1040 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001041};
1042
1043struct mlx5_ifc_dest_format_struct_bits {
1044 u8 destination_type[0x8];
1045 u8 destination_id[0x18];
1046
Matan Barakb4ff3a32016-02-09 14:57:42 +02001047 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001048};
1049
Amir Vadai9dc0b282016-05-13 12:55:39 +00001050struct mlx5_ifc_flow_counter_list_bits {
Amir Vadaia351a1b02016-07-14 10:32:38 +03001051 u8 clear[0x1];
1052 u8 num_of_counters[0xf];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001053 u8 flow_counter_id[0x10];
1054
1055 u8 reserved_at_20[0x20];
1056};
1057
1058union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1059 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1060 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1061 u8 reserved_at_0[0x40];
1062};
1063
Saeed Mahameede2816822015-05-28 22:28:40 +03001064struct mlx5_ifc_fte_match_param_bits {
1065 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1066
1067 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1068
1069 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1070
Matan Barakb4ff3a32016-02-09 14:57:42 +02001071 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001072};
1073
1074enum {
1075 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1076 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1077 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1078 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1079 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1080};
1081
1082struct mlx5_ifc_rx_hash_field_select_bits {
1083 u8 l3_prot_type[0x1];
1084 u8 l4_prot_type[0x1];
1085 u8 selected_fields[0x1e];
1086};
1087
1088enum {
1089 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1090 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1091};
1092
1093enum {
1094 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1095 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1096};
1097
1098struct mlx5_ifc_wq_bits {
1099 u8 wq_type[0x4];
1100 u8 wq_signature[0x1];
1101 u8 end_padding_mode[0x2];
1102 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001103 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001104
1105 u8 hds_skip_first_sge[0x1];
1106 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001107 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001108 u8 page_offset[0x5];
1109 u8 lwm[0x10];
1110
Matan Barakb4ff3a32016-02-09 14:57:42 +02001111 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001112 u8 pd[0x18];
1113
Matan Barakb4ff3a32016-02-09 14:57:42 +02001114 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001115 u8 uar_page[0x18];
1116
1117 u8 dbr_addr[0x40];
1118
1119 u8 hw_counter[0x20];
1120
1121 u8 sw_counter[0x20];
1122
Matan Barakb4ff3a32016-02-09 14:57:42 +02001123 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001124 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001125 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001126 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001127 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001128 u8 log_wq_sz[0x5];
1129
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001130 u8 reserved_at_120[0x15];
1131 u8 log_wqe_num_of_strides[0x3];
1132 u8 two_byte_shift_en[0x1];
1133 u8 reserved_at_139[0x4];
1134 u8 log_wqe_stride_size[0x3];
1135
1136 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001137
1138 struct mlx5_ifc_cmd_pas_bits pas[0];
1139};
1140
1141struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001142 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001143 u8 rq_num[0x18];
1144};
1145
1146struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001147 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001148 u8 mac_addr_47_32[0x10];
1149
1150 u8 mac_addr_31_0[0x20];
1151};
1152
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001153struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001154 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001155 u8 vlan[0x0c];
1156
Matan Barakb4ff3a32016-02-09 14:57:42 +02001157 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001158};
1159
Saeed Mahameede2816822015-05-28 22:28:40 +03001160struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001161 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001162
1163 u8 min_time_between_cnps[0x20];
1164
Matan Barakb4ff3a32016-02-09 14:57:42 +02001165 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001166 u8 cnp_dscp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001167 u8 reserved_at_d8[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001168 u8 cnp_802p_prio[0x3];
1169
Matan Barakb4ff3a32016-02-09 14:57:42 +02001170 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001171};
1172
1173struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001174 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001175
Matan Barakb4ff3a32016-02-09 14:57:42 +02001176 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001177 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001178 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001179 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001180 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001181
Matan Barakb4ff3a32016-02-09 14:57:42 +02001182 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001183
1184 u8 rpg_time_reset[0x20];
1185
1186 u8 rpg_byte_reset[0x20];
1187
1188 u8 rpg_threshold[0x20];
1189
1190 u8 rpg_max_rate[0x20];
1191
1192 u8 rpg_ai_rate[0x20];
1193
1194 u8 rpg_hai_rate[0x20];
1195
1196 u8 rpg_gd[0x20];
1197
1198 u8 rpg_min_dec_fac[0x20];
1199
1200 u8 rpg_min_rate[0x20];
1201
Matan Barakb4ff3a32016-02-09 14:57:42 +02001202 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001203
1204 u8 rate_to_set_on_first_cnp[0x20];
1205
1206 u8 dce_tcp_g[0x20];
1207
1208 u8 dce_tcp_rtt[0x20];
1209
1210 u8 rate_reduce_monitor_period[0x20];
1211
Matan Barakb4ff3a32016-02-09 14:57:42 +02001212 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001213
1214 u8 initial_alpha_value[0x20];
1215
Matan Barakb4ff3a32016-02-09 14:57:42 +02001216 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001217};
1218
1219struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001220 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001221
1222 u8 rppp_max_rps[0x20];
1223
1224 u8 rpg_time_reset[0x20];
1225
1226 u8 rpg_byte_reset[0x20];
1227
1228 u8 rpg_threshold[0x20];
1229
1230 u8 rpg_max_rate[0x20];
1231
1232 u8 rpg_ai_rate[0x20];
1233
1234 u8 rpg_hai_rate[0x20];
1235
1236 u8 rpg_gd[0x20];
1237
1238 u8 rpg_min_dec_fac[0x20];
1239
1240 u8 rpg_min_rate[0x20];
1241
Matan Barakb4ff3a32016-02-09 14:57:42 +02001242 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001243};
1244
1245enum {
1246 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1247 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1248 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1249};
1250
1251struct mlx5_ifc_resize_field_select_bits {
1252 u8 resize_field_select[0x20];
1253};
1254
1255enum {
1256 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1257 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1258 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1259 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1260};
1261
1262struct mlx5_ifc_modify_field_select_bits {
1263 u8 modify_field_select[0x20];
1264};
1265
1266struct mlx5_ifc_field_select_r_roce_np_bits {
1267 u8 field_select_r_roce_np[0x20];
1268};
1269
1270struct mlx5_ifc_field_select_r_roce_rp_bits {
1271 u8 field_select_r_roce_rp[0x20];
1272};
1273
1274enum {
1275 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1276 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1277 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1278 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1279 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1280 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1281 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1282 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1283 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1284 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1285};
1286
1287struct mlx5_ifc_field_select_802_1qau_rp_bits {
1288 u8 field_select_8021qaurp[0x20];
1289};
1290
1291struct mlx5_ifc_phys_layer_cntrs_bits {
1292 u8 time_since_last_clear_high[0x20];
1293
1294 u8 time_since_last_clear_low[0x20];
1295
1296 u8 symbol_errors_high[0x20];
1297
1298 u8 symbol_errors_low[0x20];
1299
1300 u8 sync_headers_errors_high[0x20];
1301
1302 u8 sync_headers_errors_low[0x20];
1303
1304 u8 edpl_bip_errors_lane0_high[0x20];
1305
1306 u8 edpl_bip_errors_lane0_low[0x20];
1307
1308 u8 edpl_bip_errors_lane1_high[0x20];
1309
1310 u8 edpl_bip_errors_lane1_low[0x20];
1311
1312 u8 edpl_bip_errors_lane2_high[0x20];
1313
1314 u8 edpl_bip_errors_lane2_low[0x20];
1315
1316 u8 edpl_bip_errors_lane3_high[0x20];
1317
1318 u8 edpl_bip_errors_lane3_low[0x20];
1319
1320 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1321
1322 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1323
1324 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1325
1326 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1327
1328 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1329
1330 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1331
1332 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1333
1334 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1335
1336 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1337
1338 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1339
1340 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1341
1342 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1343
1344 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1345
1346 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1347
1348 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1349
1350 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1351
1352 u8 rs_fec_corrected_blocks_high[0x20];
1353
1354 u8 rs_fec_corrected_blocks_low[0x20];
1355
1356 u8 rs_fec_uncorrectable_blocks_high[0x20];
1357
1358 u8 rs_fec_uncorrectable_blocks_low[0x20];
1359
1360 u8 rs_fec_no_errors_blocks_high[0x20];
1361
1362 u8 rs_fec_no_errors_blocks_low[0x20];
1363
1364 u8 rs_fec_single_error_blocks_high[0x20];
1365
1366 u8 rs_fec_single_error_blocks_low[0x20];
1367
1368 u8 rs_fec_corrected_symbols_total_high[0x20];
1369
1370 u8 rs_fec_corrected_symbols_total_low[0x20];
1371
1372 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1373
1374 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1375
1376 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1377
1378 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1379
1380 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1381
1382 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1383
1384 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1385
1386 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1387
1388 u8 link_down_events[0x20];
1389
1390 u8 successful_recovery_events[0x20];
1391
Matan Barakb4ff3a32016-02-09 14:57:42 +02001392 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001393};
1394
Gal Pressmand8dc0502016-09-27 17:04:51 +03001395struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1396 u8 time_since_last_clear_high[0x20];
1397
1398 u8 time_since_last_clear_low[0x20];
1399
1400 u8 phy_received_bits_high[0x20];
1401
1402 u8 phy_received_bits_low[0x20];
1403
1404 u8 phy_symbol_errors_high[0x20];
1405
1406 u8 phy_symbol_errors_low[0x20];
1407
1408 u8 phy_corrected_bits_high[0x20];
1409
1410 u8 phy_corrected_bits_low[0x20];
1411
1412 u8 phy_corrected_bits_lane0_high[0x20];
1413
1414 u8 phy_corrected_bits_lane0_low[0x20];
1415
1416 u8 phy_corrected_bits_lane1_high[0x20];
1417
1418 u8 phy_corrected_bits_lane1_low[0x20];
1419
1420 u8 phy_corrected_bits_lane2_high[0x20];
1421
1422 u8 phy_corrected_bits_lane2_low[0x20];
1423
1424 u8 phy_corrected_bits_lane3_high[0x20];
1425
1426 u8 phy_corrected_bits_lane3_low[0x20];
1427
1428 u8 reserved_at_200[0x5c0];
1429};
1430
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001431struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1432 u8 symbol_error_counter[0x10];
1433
1434 u8 link_error_recovery_counter[0x8];
1435
1436 u8 link_downed_counter[0x8];
1437
1438 u8 port_rcv_errors[0x10];
1439
1440 u8 port_rcv_remote_physical_errors[0x10];
1441
1442 u8 port_rcv_switch_relay_errors[0x10];
1443
1444 u8 port_xmit_discards[0x10];
1445
1446 u8 port_xmit_constraint_errors[0x8];
1447
1448 u8 port_rcv_constraint_errors[0x8];
1449
1450 u8 reserved_at_70[0x8];
1451
1452 u8 link_overrun_errors[0x8];
1453
1454 u8 reserved_at_80[0x10];
1455
1456 u8 vl_15_dropped[0x10];
1457
1458 u8 reserved_at_a0[0xa0];
1459};
1460
Saeed Mahameede2816822015-05-28 22:28:40 +03001461struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1462 u8 transmit_queue_high[0x20];
1463
1464 u8 transmit_queue_low[0x20];
1465
Matan Barakb4ff3a32016-02-09 14:57:42 +02001466 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001467};
1468
1469struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1470 u8 rx_octets_high[0x20];
1471
1472 u8 rx_octets_low[0x20];
1473
Matan Barakb4ff3a32016-02-09 14:57:42 +02001474 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001475
1476 u8 rx_frames_high[0x20];
1477
1478 u8 rx_frames_low[0x20];
1479
1480 u8 tx_octets_high[0x20];
1481
1482 u8 tx_octets_low[0x20];
1483
Matan Barakb4ff3a32016-02-09 14:57:42 +02001484 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001485
1486 u8 tx_frames_high[0x20];
1487
1488 u8 tx_frames_low[0x20];
1489
1490 u8 rx_pause_high[0x20];
1491
1492 u8 rx_pause_low[0x20];
1493
1494 u8 rx_pause_duration_high[0x20];
1495
1496 u8 rx_pause_duration_low[0x20];
1497
1498 u8 tx_pause_high[0x20];
1499
1500 u8 tx_pause_low[0x20];
1501
1502 u8 tx_pause_duration_high[0x20];
1503
1504 u8 tx_pause_duration_low[0x20];
1505
1506 u8 rx_pause_transition_high[0x20];
1507
1508 u8 rx_pause_transition_low[0x20];
1509
Matan Barakb4ff3a32016-02-09 14:57:42 +02001510 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001511};
1512
1513struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1514 u8 port_transmit_wait_high[0x20];
1515
1516 u8 port_transmit_wait_low[0x20];
1517
Matan Barakb4ff3a32016-02-09 14:57:42 +02001518 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001519};
1520
1521struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1522 u8 dot3stats_alignment_errors_high[0x20];
1523
1524 u8 dot3stats_alignment_errors_low[0x20];
1525
1526 u8 dot3stats_fcs_errors_high[0x20];
1527
1528 u8 dot3stats_fcs_errors_low[0x20];
1529
1530 u8 dot3stats_single_collision_frames_high[0x20];
1531
1532 u8 dot3stats_single_collision_frames_low[0x20];
1533
1534 u8 dot3stats_multiple_collision_frames_high[0x20];
1535
1536 u8 dot3stats_multiple_collision_frames_low[0x20];
1537
1538 u8 dot3stats_sqe_test_errors_high[0x20];
1539
1540 u8 dot3stats_sqe_test_errors_low[0x20];
1541
1542 u8 dot3stats_deferred_transmissions_high[0x20];
1543
1544 u8 dot3stats_deferred_transmissions_low[0x20];
1545
1546 u8 dot3stats_late_collisions_high[0x20];
1547
1548 u8 dot3stats_late_collisions_low[0x20];
1549
1550 u8 dot3stats_excessive_collisions_high[0x20];
1551
1552 u8 dot3stats_excessive_collisions_low[0x20];
1553
1554 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1555
1556 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1557
1558 u8 dot3stats_carrier_sense_errors_high[0x20];
1559
1560 u8 dot3stats_carrier_sense_errors_low[0x20];
1561
1562 u8 dot3stats_frame_too_longs_high[0x20];
1563
1564 u8 dot3stats_frame_too_longs_low[0x20];
1565
1566 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1567
1568 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1569
1570 u8 dot3stats_symbol_errors_high[0x20];
1571
1572 u8 dot3stats_symbol_errors_low[0x20];
1573
1574 u8 dot3control_in_unknown_opcodes_high[0x20];
1575
1576 u8 dot3control_in_unknown_opcodes_low[0x20];
1577
1578 u8 dot3in_pause_frames_high[0x20];
1579
1580 u8 dot3in_pause_frames_low[0x20];
1581
1582 u8 dot3out_pause_frames_high[0x20];
1583
1584 u8 dot3out_pause_frames_low[0x20];
1585
Matan Barakb4ff3a32016-02-09 14:57:42 +02001586 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001587};
1588
1589struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1590 u8 ether_stats_drop_events_high[0x20];
1591
1592 u8 ether_stats_drop_events_low[0x20];
1593
1594 u8 ether_stats_octets_high[0x20];
1595
1596 u8 ether_stats_octets_low[0x20];
1597
1598 u8 ether_stats_pkts_high[0x20];
1599
1600 u8 ether_stats_pkts_low[0x20];
1601
1602 u8 ether_stats_broadcast_pkts_high[0x20];
1603
1604 u8 ether_stats_broadcast_pkts_low[0x20];
1605
1606 u8 ether_stats_multicast_pkts_high[0x20];
1607
1608 u8 ether_stats_multicast_pkts_low[0x20];
1609
1610 u8 ether_stats_crc_align_errors_high[0x20];
1611
1612 u8 ether_stats_crc_align_errors_low[0x20];
1613
1614 u8 ether_stats_undersize_pkts_high[0x20];
1615
1616 u8 ether_stats_undersize_pkts_low[0x20];
1617
1618 u8 ether_stats_oversize_pkts_high[0x20];
1619
1620 u8 ether_stats_oversize_pkts_low[0x20];
1621
1622 u8 ether_stats_fragments_high[0x20];
1623
1624 u8 ether_stats_fragments_low[0x20];
1625
1626 u8 ether_stats_jabbers_high[0x20];
1627
1628 u8 ether_stats_jabbers_low[0x20];
1629
1630 u8 ether_stats_collisions_high[0x20];
1631
1632 u8 ether_stats_collisions_low[0x20];
1633
1634 u8 ether_stats_pkts64octets_high[0x20];
1635
1636 u8 ether_stats_pkts64octets_low[0x20];
1637
1638 u8 ether_stats_pkts65to127octets_high[0x20];
1639
1640 u8 ether_stats_pkts65to127octets_low[0x20];
1641
1642 u8 ether_stats_pkts128to255octets_high[0x20];
1643
1644 u8 ether_stats_pkts128to255octets_low[0x20];
1645
1646 u8 ether_stats_pkts256to511octets_high[0x20];
1647
1648 u8 ether_stats_pkts256to511octets_low[0x20];
1649
1650 u8 ether_stats_pkts512to1023octets_high[0x20];
1651
1652 u8 ether_stats_pkts512to1023octets_low[0x20];
1653
1654 u8 ether_stats_pkts1024to1518octets_high[0x20];
1655
1656 u8 ether_stats_pkts1024to1518octets_low[0x20];
1657
1658 u8 ether_stats_pkts1519to2047octets_high[0x20];
1659
1660 u8 ether_stats_pkts1519to2047octets_low[0x20];
1661
1662 u8 ether_stats_pkts2048to4095octets_high[0x20];
1663
1664 u8 ether_stats_pkts2048to4095octets_low[0x20];
1665
1666 u8 ether_stats_pkts4096to8191octets_high[0x20];
1667
1668 u8 ether_stats_pkts4096to8191octets_low[0x20];
1669
1670 u8 ether_stats_pkts8192to10239octets_high[0x20];
1671
1672 u8 ether_stats_pkts8192to10239octets_low[0x20];
1673
Matan Barakb4ff3a32016-02-09 14:57:42 +02001674 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001675};
1676
1677struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1678 u8 if_in_octets_high[0x20];
1679
1680 u8 if_in_octets_low[0x20];
1681
1682 u8 if_in_ucast_pkts_high[0x20];
1683
1684 u8 if_in_ucast_pkts_low[0x20];
1685
1686 u8 if_in_discards_high[0x20];
1687
1688 u8 if_in_discards_low[0x20];
1689
1690 u8 if_in_errors_high[0x20];
1691
1692 u8 if_in_errors_low[0x20];
1693
1694 u8 if_in_unknown_protos_high[0x20];
1695
1696 u8 if_in_unknown_protos_low[0x20];
1697
1698 u8 if_out_octets_high[0x20];
1699
1700 u8 if_out_octets_low[0x20];
1701
1702 u8 if_out_ucast_pkts_high[0x20];
1703
1704 u8 if_out_ucast_pkts_low[0x20];
1705
1706 u8 if_out_discards_high[0x20];
1707
1708 u8 if_out_discards_low[0x20];
1709
1710 u8 if_out_errors_high[0x20];
1711
1712 u8 if_out_errors_low[0x20];
1713
1714 u8 if_in_multicast_pkts_high[0x20];
1715
1716 u8 if_in_multicast_pkts_low[0x20];
1717
1718 u8 if_in_broadcast_pkts_high[0x20];
1719
1720 u8 if_in_broadcast_pkts_low[0x20];
1721
1722 u8 if_out_multicast_pkts_high[0x20];
1723
1724 u8 if_out_multicast_pkts_low[0x20];
1725
1726 u8 if_out_broadcast_pkts_high[0x20];
1727
1728 u8 if_out_broadcast_pkts_low[0x20];
1729
Matan Barakb4ff3a32016-02-09 14:57:42 +02001730 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001731};
1732
1733struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1734 u8 a_frames_transmitted_ok_high[0x20];
1735
1736 u8 a_frames_transmitted_ok_low[0x20];
1737
1738 u8 a_frames_received_ok_high[0x20];
1739
1740 u8 a_frames_received_ok_low[0x20];
1741
1742 u8 a_frame_check_sequence_errors_high[0x20];
1743
1744 u8 a_frame_check_sequence_errors_low[0x20];
1745
1746 u8 a_alignment_errors_high[0x20];
1747
1748 u8 a_alignment_errors_low[0x20];
1749
1750 u8 a_octets_transmitted_ok_high[0x20];
1751
1752 u8 a_octets_transmitted_ok_low[0x20];
1753
1754 u8 a_octets_received_ok_high[0x20];
1755
1756 u8 a_octets_received_ok_low[0x20];
1757
1758 u8 a_multicast_frames_xmitted_ok_high[0x20];
1759
1760 u8 a_multicast_frames_xmitted_ok_low[0x20];
1761
1762 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1763
1764 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1765
1766 u8 a_multicast_frames_received_ok_high[0x20];
1767
1768 u8 a_multicast_frames_received_ok_low[0x20];
1769
1770 u8 a_broadcast_frames_received_ok_high[0x20];
1771
1772 u8 a_broadcast_frames_received_ok_low[0x20];
1773
1774 u8 a_in_range_length_errors_high[0x20];
1775
1776 u8 a_in_range_length_errors_low[0x20];
1777
1778 u8 a_out_of_range_length_field_high[0x20];
1779
1780 u8 a_out_of_range_length_field_low[0x20];
1781
1782 u8 a_frame_too_long_errors_high[0x20];
1783
1784 u8 a_frame_too_long_errors_low[0x20];
1785
1786 u8 a_symbol_error_during_carrier_high[0x20];
1787
1788 u8 a_symbol_error_during_carrier_low[0x20];
1789
1790 u8 a_mac_control_frames_transmitted_high[0x20];
1791
1792 u8 a_mac_control_frames_transmitted_low[0x20];
1793
1794 u8 a_mac_control_frames_received_high[0x20];
1795
1796 u8 a_mac_control_frames_received_low[0x20];
1797
1798 u8 a_unsupported_opcodes_received_high[0x20];
1799
1800 u8 a_unsupported_opcodes_received_low[0x20];
1801
1802 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1803
1804 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1805
1806 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1807
1808 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1809
Matan Barakb4ff3a32016-02-09 14:57:42 +02001810 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001811};
1812
Gal Pressman8ed1a632016-11-17 13:46:01 +02001813struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1814 u8 life_time_counter_high[0x20];
1815
1816 u8 life_time_counter_low[0x20];
1817
1818 u8 rx_errors[0x20];
1819
1820 u8 tx_errors[0x20];
1821
1822 u8 l0_to_recovery_eieos[0x20];
1823
1824 u8 l0_to_recovery_ts[0x20];
1825
1826 u8 l0_to_recovery_framing[0x20];
1827
1828 u8 l0_to_recovery_retrain[0x20];
1829
1830 u8 crc_error_dllp[0x20];
1831
1832 u8 crc_error_tlp[0x20];
1833
1834 u8 reserved_at_140[0x680];
1835};
1836
Saeed Mahameede2816822015-05-28 22:28:40 +03001837struct mlx5_ifc_cmd_inter_comp_event_bits {
1838 u8 command_completion_vector[0x20];
1839
Matan Barakb4ff3a32016-02-09 14:57:42 +02001840 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001841};
1842
1843struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001844 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001845 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001846 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001847 u8 vl[0x4];
1848
Matan Barakb4ff3a32016-02-09 14:57:42 +02001849 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001850};
1851
1852struct mlx5_ifc_db_bf_congestion_event_bits {
1853 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001854 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001855 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001856 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001857
Matan Barakb4ff3a32016-02-09 14:57:42 +02001858 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001859};
1860
1861struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001862 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001863
1864 u8 gpio_event_hi[0x20];
1865
1866 u8 gpio_event_lo[0x20];
1867
Matan Barakb4ff3a32016-02-09 14:57:42 +02001868 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001869};
1870
1871struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001872 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001873
1874 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001875 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001876
Matan Barakb4ff3a32016-02-09 14:57:42 +02001877 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001878};
1879
1880struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001881 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001882};
1883
1884enum {
1885 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1886 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1887};
1888
1889struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001890 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001891 u8 cqn[0x18];
1892
Matan Barakb4ff3a32016-02-09 14:57:42 +02001893 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001894
Matan Barakb4ff3a32016-02-09 14:57:42 +02001895 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001896 u8 syndrome[0x8];
1897
Matan Barakb4ff3a32016-02-09 14:57:42 +02001898 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001899};
1900
1901struct mlx5_ifc_rdma_page_fault_event_bits {
1902 u8 bytes_committed[0x20];
1903
1904 u8 r_key[0x20];
1905
Matan Barakb4ff3a32016-02-09 14:57:42 +02001906 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001907 u8 packet_len[0x10];
1908
1909 u8 rdma_op_len[0x20];
1910
1911 u8 rdma_va[0x40];
1912
Matan Barakb4ff3a32016-02-09 14:57:42 +02001913 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001914 u8 rdma[0x1];
1915 u8 write[0x1];
1916 u8 requestor[0x1];
1917 u8 qp_number[0x18];
1918};
1919
1920struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1921 u8 bytes_committed[0x20];
1922
Matan Barakb4ff3a32016-02-09 14:57:42 +02001923 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001924 u8 wqe_index[0x10];
1925
Matan Barakb4ff3a32016-02-09 14:57:42 +02001926 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001927 u8 len[0x10];
1928
Matan Barakb4ff3a32016-02-09 14:57:42 +02001929 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001930
Matan Barakb4ff3a32016-02-09 14:57:42 +02001931 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001932 u8 rdma[0x1];
1933 u8 write_read[0x1];
1934 u8 requestor[0x1];
1935 u8 qpn[0x18];
1936};
1937
1938struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001939 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001940
1941 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001942 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001943
Matan Barakb4ff3a32016-02-09 14:57:42 +02001944 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001945 u8 qpn_rqn_sqn[0x18];
1946};
1947
1948struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001949 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001950
Matan Barakb4ff3a32016-02-09 14:57:42 +02001951 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001952 u8 dct_number[0x18];
1953};
1954
1955struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001956 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001957
Matan Barakb4ff3a32016-02-09 14:57:42 +02001958 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001959 u8 cq_number[0x18];
1960};
1961
1962enum {
1963 MLX5_QPC_STATE_RST = 0x0,
1964 MLX5_QPC_STATE_INIT = 0x1,
1965 MLX5_QPC_STATE_RTR = 0x2,
1966 MLX5_QPC_STATE_RTS = 0x3,
1967 MLX5_QPC_STATE_SQER = 0x4,
1968 MLX5_QPC_STATE_ERR = 0x6,
1969 MLX5_QPC_STATE_SQD = 0x7,
1970 MLX5_QPC_STATE_SUSPENDED = 0x9,
1971};
1972
1973enum {
1974 MLX5_QPC_ST_RC = 0x0,
1975 MLX5_QPC_ST_UC = 0x1,
1976 MLX5_QPC_ST_UD = 0x2,
1977 MLX5_QPC_ST_XRC = 0x3,
1978 MLX5_QPC_ST_DCI = 0x5,
1979 MLX5_QPC_ST_QP0 = 0x7,
1980 MLX5_QPC_ST_QP1 = 0x8,
1981 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
1982 MLX5_QPC_ST_REG_UMR = 0xc,
1983};
1984
1985enum {
1986 MLX5_QPC_PM_STATE_ARMED = 0x0,
1987 MLX5_QPC_PM_STATE_REARM = 0x1,
1988 MLX5_QPC_PM_STATE_RESERVED = 0x2,
1989 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
1990};
1991
1992enum {
1993 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
1994 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
1995};
1996
1997enum {
1998 MLX5_QPC_MTU_256_BYTES = 0x1,
1999 MLX5_QPC_MTU_512_BYTES = 0x2,
2000 MLX5_QPC_MTU_1K_BYTES = 0x3,
2001 MLX5_QPC_MTU_2K_BYTES = 0x4,
2002 MLX5_QPC_MTU_4K_BYTES = 0x5,
2003 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2004};
2005
2006enum {
2007 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2008 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2009 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2010 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2011 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2012 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2013 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2014 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2015};
2016
2017enum {
2018 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2019 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2020 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2021};
2022
2023enum {
2024 MLX5_QPC_CS_RES_DISABLE = 0x0,
2025 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2026 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2027};
2028
2029struct mlx5_ifc_qpc_bits {
2030 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002031 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002032 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002033 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002034 u8 pm_state[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002035 u8 reserved_at_15[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03002036 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002037 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002038
2039 u8 wq_signature[0x1];
2040 u8 block_lb_mc[0x1];
2041 u8 atomic_like_write_en[0x1];
2042 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002043 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002044 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002045 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002046 u8 pd[0x18];
2047
2048 u8 mtu[0x3];
2049 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002050 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002051 u8 log_rq_size[0x4];
2052 u8 log_rq_stride[0x3];
2053 u8 no_sq[0x1];
2054 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002055 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002056 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002057 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002058
2059 u8 counter_set_id[0x8];
2060 u8 uar_page[0x18];
2061
Matan Barakb4ff3a32016-02-09 14:57:42 +02002062 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002063 u8 user_index[0x18];
2064
Matan Barakb4ff3a32016-02-09 14:57:42 +02002065 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002066 u8 log_page_size[0x5];
2067 u8 remote_qpn[0x18];
2068
2069 struct mlx5_ifc_ads_bits primary_address_path;
2070
2071 struct mlx5_ifc_ads_bits secondary_address_path;
2072
2073 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002074 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002075 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002076 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002077 u8 retry_count[0x3];
2078 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002079 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002080 u8 fre[0x1];
2081 u8 cur_rnr_retry[0x3];
2082 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002083 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002084
Matan Barakb4ff3a32016-02-09 14:57:42 +02002085 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002086
Matan Barakb4ff3a32016-02-09 14:57:42 +02002087 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002088 u8 next_send_psn[0x18];
2089
Matan Barakb4ff3a32016-02-09 14:57:42 +02002090 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002091 u8 cqn_snd[0x18];
2092
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002093 u8 reserved_at_400[0x8];
2094 u8 deth_sqpn[0x18];
2095
2096 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002097
Matan Barakb4ff3a32016-02-09 14:57:42 +02002098 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002099 u8 last_acked_psn[0x18];
2100
Matan Barakb4ff3a32016-02-09 14:57:42 +02002101 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002102 u8 ssn[0x18];
2103
Matan Barakb4ff3a32016-02-09 14:57:42 +02002104 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002105 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002106 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002107 u8 atomic_mode[0x4];
2108 u8 rre[0x1];
2109 u8 rwe[0x1];
2110 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002111 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002112 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002113 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002114 u8 cd_slave_receive[0x1];
2115 u8 cd_slave_send[0x1];
2116 u8 cd_master[0x1];
2117
Matan Barakb4ff3a32016-02-09 14:57:42 +02002118 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002119 u8 min_rnr_nak[0x5];
2120 u8 next_rcv_psn[0x18];
2121
Matan Barakb4ff3a32016-02-09 14:57:42 +02002122 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002123 u8 xrcd[0x18];
2124
Matan Barakb4ff3a32016-02-09 14:57:42 +02002125 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002126 u8 cqn_rcv[0x18];
2127
2128 u8 dbr_addr[0x40];
2129
2130 u8 q_key[0x20];
2131
Matan Barakb4ff3a32016-02-09 14:57:42 +02002132 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002133 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002134 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002135
Matan Barakb4ff3a32016-02-09 14:57:42 +02002136 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002137 u8 rmsn[0x18];
2138
2139 u8 hw_sq_wqebb_counter[0x10];
2140 u8 sw_sq_wqebb_counter[0x10];
2141
2142 u8 hw_rq_counter[0x20];
2143
2144 u8 sw_rq_counter[0x20];
2145
Matan Barakb4ff3a32016-02-09 14:57:42 +02002146 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002147
Matan Barakb4ff3a32016-02-09 14:57:42 +02002148 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002149 u8 cgs[0x1];
2150 u8 cs_req[0x8];
2151 u8 cs_res[0x8];
2152
2153 u8 dc_access_key[0x40];
2154
Matan Barakb4ff3a32016-02-09 14:57:42 +02002155 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002156};
2157
2158struct mlx5_ifc_roce_addr_layout_bits {
2159 u8 source_l3_address[16][0x8];
2160
Matan Barakb4ff3a32016-02-09 14:57:42 +02002161 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002162 u8 vlan_valid[0x1];
2163 u8 vlan_id[0xc];
2164 u8 source_mac_47_32[0x10];
2165
2166 u8 source_mac_31_0[0x20];
2167
Matan Barakb4ff3a32016-02-09 14:57:42 +02002168 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002169 u8 roce_l3_type[0x4];
2170 u8 roce_version[0x8];
2171
Matan Barakb4ff3a32016-02-09 14:57:42 +02002172 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002173};
2174
2175union mlx5_ifc_hca_cap_union_bits {
2176 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2177 struct mlx5_ifc_odp_cap_bits odp_cap;
2178 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2179 struct mlx5_ifc_roce_cap_bits roce_cap;
2180 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2181 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002182 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002183 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002184 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002185 struct mlx5_ifc_qos_cap_bits qos_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002186 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002187};
2188
2189enum {
2190 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2191 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2192 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002193 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002194 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2195 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002196 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002197};
2198
2199struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002200 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002201
2202 u8 group_id[0x20];
2203
Matan Barakb4ff3a32016-02-09 14:57:42 +02002204 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002205 u8 flow_tag[0x18];
2206
Matan Barakb4ff3a32016-02-09 14:57:42 +02002207 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002208 u8 action[0x10];
2209
Matan Barakb4ff3a32016-02-09 14:57:42 +02002210 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002211 u8 destination_list_size[0x18];
2212
Amir Vadai9dc0b282016-05-13 12:55:39 +00002213 u8 reserved_at_a0[0x8];
2214 u8 flow_counter_list_size[0x18];
2215
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002216 u8 encap_id[0x20];
2217
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002218 u8 modify_header_id[0x20];
2219
2220 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002221
2222 struct mlx5_ifc_fte_match_param_bits match_value;
2223
Matan Barakb4ff3a32016-02-09 14:57:42 +02002224 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002225
Amir Vadai9dc0b282016-05-13 12:55:39 +00002226 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002227};
2228
2229enum {
2230 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2231 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2232};
2233
2234struct mlx5_ifc_xrc_srqc_bits {
2235 u8 state[0x4];
2236 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002237 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002238
2239 u8 wq_signature[0x1];
2240 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002241 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002242 u8 rlky[0x1];
2243 u8 basic_cyclic_rcv_wqe[0x1];
2244 u8 log_rq_stride[0x3];
2245 u8 xrcd[0x18];
2246
2247 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002248 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002249 u8 cqn[0x18];
2250
Matan Barakb4ff3a32016-02-09 14:57:42 +02002251 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002252
2253 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002254 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002255 u8 log_page_size[0x6];
2256 u8 user_index[0x18];
2257
Matan Barakb4ff3a32016-02-09 14:57:42 +02002258 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002259
Matan Barakb4ff3a32016-02-09 14:57:42 +02002260 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002261 u8 pd[0x18];
2262
2263 u8 lwm[0x10];
2264 u8 wqe_cnt[0x10];
2265
Matan Barakb4ff3a32016-02-09 14:57:42 +02002266 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002267
2268 u8 db_record_addr_h[0x20];
2269
2270 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002271 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002272
Matan Barakb4ff3a32016-02-09 14:57:42 +02002273 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002274};
2275
2276struct mlx5_ifc_traffic_counter_bits {
2277 u8 packets[0x40];
2278
2279 u8 octets[0x40];
2280};
2281
2282struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002283 u8 strict_lag_tx_port_affinity[0x1];
2284 u8 reserved_at_1[0x3];
2285 u8 lag_tx_port_affinity[0x04];
2286
2287 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002288 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002289 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002290
Matan Barakb4ff3a32016-02-09 14:57:42 +02002291 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002292
Matan Barakb4ff3a32016-02-09 14:57:42 +02002293 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002294 u8 transport_domain[0x18];
2295
Matan Barakb4ff3a32016-02-09 14:57:42 +02002296 u8 reserved_at_140[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002297};
2298
2299enum {
2300 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2301 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2302};
2303
2304enum {
2305 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2306 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2307};
2308
2309enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002310 MLX5_RX_HASH_FN_NONE = 0x0,
2311 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2312 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002313};
2314
2315enum {
2316 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2317 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2318};
2319
2320struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002321 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002322
2323 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002324 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002325
Matan Barakb4ff3a32016-02-09 14:57:42 +02002326 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002327
Matan Barakb4ff3a32016-02-09 14:57:42 +02002328 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002329 u8 lro_timeout_period_usecs[0x10];
2330 u8 lro_enable_mask[0x4];
2331 u8 lro_max_ip_payload_size[0x8];
2332
Matan Barakb4ff3a32016-02-09 14:57:42 +02002333 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002334
Matan Barakb4ff3a32016-02-09 14:57:42 +02002335 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002336 u8 inline_rqn[0x18];
2337
2338 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002339 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002340 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002341 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002342 u8 indirect_table[0x18];
2343
2344 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002345 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002346 u8 self_lb_block[0x2];
2347 u8 transport_domain[0x18];
2348
2349 u8 rx_hash_toeplitz_key[10][0x20];
2350
2351 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2352
2353 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2354
Matan Barakb4ff3a32016-02-09 14:57:42 +02002355 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002356};
2357
2358enum {
2359 MLX5_SRQC_STATE_GOOD = 0x0,
2360 MLX5_SRQC_STATE_ERROR = 0x1,
2361};
2362
2363struct mlx5_ifc_srqc_bits {
2364 u8 state[0x4];
2365 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002366 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002367
2368 u8 wq_signature[0x1];
2369 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002370 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002371 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002372 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002373 u8 log_rq_stride[0x3];
2374 u8 xrcd[0x18];
2375
2376 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002377 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002378 u8 cqn[0x18];
2379
Matan Barakb4ff3a32016-02-09 14:57:42 +02002380 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002381
Matan Barakb4ff3a32016-02-09 14:57:42 +02002382 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002383 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002384 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002385
Matan Barakb4ff3a32016-02-09 14:57:42 +02002386 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002387
Matan Barakb4ff3a32016-02-09 14:57:42 +02002388 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002389 u8 pd[0x18];
2390
2391 u8 lwm[0x10];
2392 u8 wqe_cnt[0x10];
2393
Matan Barakb4ff3a32016-02-09 14:57:42 +02002394 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002395
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002396 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002397
Matan Barakb4ff3a32016-02-09 14:57:42 +02002398 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002399};
2400
2401enum {
2402 MLX5_SQC_STATE_RST = 0x0,
2403 MLX5_SQC_STATE_RDY = 0x1,
2404 MLX5_SQC_STATE_ERR = 0x3,
2405};
2406
2407struct mlx5_ifc_sqc_bits {
2408 u8 rlky[0x1];
2409 u8 cd_master[0x1];
2410 u8 fre[0x1];
2411 u8 flush_in_error_en[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002412 u8 reserved_at_4[0x1];
2413 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002414 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002415 u8 reg_umr[0x1];
2416 u8 reserved_at_d[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03002417
Matan Barakb4ff3a32016-02-09 14:57:42 +02002418 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002419 u8 user_index[0x18];
2420
Matan Barakb4ff3a32016-02-09 14:57:42 +02002421 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002422 u8 cqn[0x18];
2423
Saeed Mahameed74862162016-06-09 15:11:34 +03002424 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002425
Saeed Mahameed74862162016-06-09 15:11:34 +03002426 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002427 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002428 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002429
Matan Barakb4ff3a32016-02-09 14:57:42 +02002430 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002431
Matan Barakb4ff3a32016-02-09 14:57:42 +02002432 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002433 u8 tis_num_0[0x18];
2434
2435 struct mlx5_ifc_wq_bits wq;
2436};
2437
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002438enum {
2439 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2440 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2441 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2442 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2443};
2444
2445struct mlx5_ifc_scheduling_context_bits {
2446 u8 element_type[0x8];
2447 u8 reserved_at_8[0x18];
2448
2449 u8 element_attributes[0x20];
2450
2451 u8 parent_element_id[0x20];
2452
2453 u8 reserved_at_60[0x40];
2454
2455 u8 bw_share[0x20];
2456
2457 u8 max_average_bw[0x20];
2458
2459 u8 reserved_at_e0[0x120];
2460};
2461
Saeed Mahameede2816822015-05-28 22:28:40 +03002462struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002463 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002464
Matan Barakb4ff3a32016-02-09 14:57:42 +02002465 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002466 u8 rqt_max_size[0x10];
2467
Matan Barakb4ff3a32016-02-09 14:57:42 +02002468 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002469 u8 rqt_actual_size[0x10];
2470
Matan Barakb4ff3a32016-02-09 14:57:42 +02002471 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002472
2473 struct mlx5_ifc_rq_num_bits rq_num[0];
2474};
2475
2476enum {
2477 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2478 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2479};
2480
2481enum {
2482 MLX5_RQC_STATE_RST = 0x0,
2483 MLX5_RQC_STATE_RDY = 0x1,
2484 MLX5_RQC_STATE_ERR = 0x3,
2485};
2486
2487struct mlx5_ifc_rqc_bits {
2488 u8 rlky[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002489 u8 reserved_at_1[0x1];
2490 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002491 u8 vsd[0x1];
2492 u8 mem_rq_type[0x4];
2493 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002494 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002495 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002496 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002497
Matan Barakb4ff3a32016-02-09 14:57:42 +02002498 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002499 u8 user_index[0x18];
2500
Matan Barakb4ff3a32016-02-09 14:57:42 +02002501 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002502 u8 cqn[0x18];
2503
2504 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002505 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002506
Matan Barakb4ff3a32016-02-09 14:57:42 +02002507 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002508 u8 rmpn[0x18];
2509
Matan Barakb4ff3a32016-02-09 14:57:42 +02002510 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002511
2512 struct mlx5_ifc_wq_bits wq;
2513};
2514
2515enum {
2516 MLX5_RMPC_STATE_RDY = 0x1,
2517 MLX5_RMPC_STATE_ERR = 0x3,
2518};
2519
2520struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002521 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002522 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002523 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002524
2525 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002526 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002527
Matan Barakb4ff3a32016-02-09 14:57:42 +02002528 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002529
2530 struct mlx5_ifc_wq_bits wq;
2531};
2532
Saeed Mahameede2816822015-05-28 22:28:40 +03002533struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002534 u8 reserved_at_0[0x5];
2535 u8 min_wqe_inline_mode[0x3];
2536 u8 reserved_at_8[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03002537 u8 roce_en[0x1];
2538
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002539 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002540 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002541 u8 event_on_mtu[0x1];
2542 u8 event_on_promisc_change[0x1];
2543 u8 event_on_vlan_change[0x1];
2544 u8 event_on_mc_address_change[0x1];
2545 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002546
Matan Barakb4ff3a32016-02-09 14:57:42 +02002547 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002548
2549 u8 mtu[0x10];
2550
Achiad Shochat9efa7522015-12-23 18:47:20 +02002551 u8 system_image_guid[0x40];
2552 u8 port_guid[0x40];
2553 u8 node_guid[0x40];
2554
Matan Barakb4ff3a32016-02-09 14:57:42 +02002555 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002556 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002557 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002558
2559 u8 promisc_uc[0x1];
2560 u8 promisc_mc[0x1];
2561 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002562 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002563 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002564 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002565 u8 allowed_list_size[0xc];
2566
2567 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2568
Matan Barakb4ff3a32016-02-09 14:57:42 +02002569 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002570
2571 u8 current_uc_mac_address[0][0x40];
2572};
2573
2574enum {
2575 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2576 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2577 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002578 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002579};
2580
2581struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002582 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002583 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002584 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002585 u8 small_fence_on_rdma_read_response[0x1];
2586 u8 umr_en[0x1];
2587 u8 a[0x1];
2588 u8 rw[0x1];
2589 u8 rr[0x1];
2590 u8 lw[0x1];
2591 u8 lr[0x1];
2592 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002593 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002594
2595 u8 qpn[0x18];
2596 u8 mkey_7_0[0x8];
2597
Matan Barakb4ff3a32016-02-09 14:57:42 +02002598 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002599
2600 u8 length64[0x1];
2601 u8 bsf_en[0x1];
2602 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002603 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002604 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002605 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002606 u8 en_rinval[0x1];
2607 u8 pd[0x18];
2608
2609 u8 start_addr[0x40];
2610
2611 u8 len[0x40];
2612
2613 u8 bsf_octword_size[0x20];
2614
Matan Barakb4ff3a32016-02-09 14:57:42 +02002615 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002616
2617 u8 translations_octword_size[0x20];
2618
Matan Barakb4ff3a32016-02-09 14:57:42 +02002619 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002620 u8 log_page_size[0x5];
2621
Matan Barakb4ff3a32016-02-09 14:57:42 +02002622 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002623};
2624
2625struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002626 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002627 u8 pkey[0x10];
2628};
2629
2630struct mlx5_ifc_array128_auto_bits {
2631 u8 array128_auto[16][0x8];
2632};
2633
2634struct mlx5_ifc_hca_vport_context_bits {
2635 u8 field_select[0x20];
2636
Matan Barakb4ff3a32016-02-09 14:57:42 +02002637 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002638
2639 u8 sm_virt_aware[0x1];
2640 u8 has_smi[0x1];
2641 u8 has_raw[0x1];
2642 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002643 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002644 u8 port_physical_state[0x4];
2645 u8 vport_state_policy[0x4];
2646 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002647 u8 vport_state[0x4];
2648
Matan Barakb4ff3a32016-02-09 14:57:42 +02002649 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002650
2651 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002652
2653 u8 port_guid[0x40];
2654
2655 u8 node_guid[0x40];
2656
2657 u8 cap_mask1[0x20];
2658
2659 u8 cap_mask1_field_select[0x20];
2660
2661 u8 cap_mask2[0x20];
2662
2663 u8 cap_mask2_field_select[0x20];
2664
Matan Barakb4ff3a32016-02-09 14:57:42 +02002665 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002666
2667 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002668 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002669 u8 init_type_reply[0x4];
2670 u8 lmc[0x3];
2671 u8 subnet_timeout[0x5];
2672
2673 u8 sm_lid[0x10];
2674 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002675 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002676
2677 u8 qkey_violation_counter[0x10];
2678 u8 pkey_violation_counter[0x10];
2679
Matan Barakb4ff3a32016-02-09 14:57:42 +02002680 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002681};
2682
Saeed Mahameedd6666752015-12-01 18:03:22 +02002683struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002684 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002685 u8 vport_svlan_strip[0x1];
2686 u8 vport_cvlan_strip[0x1];
2687 u8 vport_svlan_insert[0x1];
2688 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002689 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002690
Matan Barakb4ff3a32016-02-09 14:57:42 +02002691 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002692
2693 u8 svlan_cfi[0x1];
2694 u8 svlan_pcp[0x3];
2695 u8 svlan_id[0xc];
2696 u8 cvlan_cfi[0x1];
2697 u8 cvlan_pcp[0x3];
2698 u8 cvlan_id[0xc];
2699
Matan Barakb4ff3a32016-02-09 14:57:42 +02002700 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002701};
2702
Saeed Mahameede2816822015-05-28 22:28:40 +03002703enum {
2704 MLX5_EQC_STATUS_OK = 0x0,
2705 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2706};
2707
2708enum {
2709 MLX5_EQC_ST_ARMED = 0x9,
2710 MLX5_EQC_ST_FIRED = 0xa,
2711};
2712
2713struct mlx5_ifc_eqc_bits {
2714 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002715 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002716 u8 ec[0x1];
2717 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002718 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002719 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002720 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002721
Matan Barakb4ff3a32016-02-09 14:57:42 +02002722 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002723
Matan Barakb4ff3a32016-02-09 14:57:42 +02002724 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002725 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002726 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002727
Matan Barakb4ff3a32016-02-09 14:57:42 +02002728 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002729 u8 log_eq_size[0x5];
2730 u8 uar_page[0x18];
2731
Matan Barakb4ff3a32016-02-09 14:57:42 +02002732 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002733
Matan Barakb4ff3a32016-02-09 14:57:42 +02002734 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002735 u8 intr[0x8];
2736
Matan Barakb4ff3a32016-02-09 14:57:42 +02002737 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002738 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002739 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002740
Matan Barakb4ff3a32016-02-09 14:57:42 +02002741 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002742
Matan Barakb4ff3a32016-02-09 14:57:42 +02002743 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002744 u8 consumer_counter[0x18];
2745
Matan Barakb4ff3a32016-02-09 14:57:42 +02002746 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002747 u8 producer_counter[0x18];
2748
Matan Barakb4ff3a32016-02-09 14:57:42 +02002749 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002750};
2751
2752enum {
2753 MLX5_DCTC_STATE_ACTIVE = 0x0,
2754 MLX5_DCTC_STATE_DRAINING = 0x1,
2755 MLX5_DCTC_STATE_DRAINED = 0x2,
2756};
2757
2758enum {
2759 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2760 MLX5_DCTC_CS_RES_NA = 0x1,
2761 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2762};
2763
2764enum {
2765 MLX5_DCTC_MTU_256_BYTES = 0x1,
2766 MLX5_DCTC_MTU_512_BYTES = 0x2,
2767 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2768 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2769 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2770};
2771
2772struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002773 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002774 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002775 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002776
Matan Barakb4ff3a32016-02-09 14:57:42 +02002777 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002778 u8 user_index[0x18];
2779
Matan Barakb4ff3a32016-02-09 14:57:42 +02002780 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002781 u8 cqn[0x18];
2782
2783 u8 counter_set_id[0x8];
2784 u8 atomic_mode[0x4];
2785 u8 rre[0x1];
2786 u8 rwe[0x1];
2787 u8 rae[0x1];
2788 u8 atomic_like_write_en[0x1];
2789 u8 latency_sensitive[0x1];
2790 u8 rlky[0x1];
2791 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002792 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002793
Matan Barakb4ff3a32016-02-09 14:57:42 +02002794 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002795 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002796 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002797 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002798 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002799
Matan Barakb4ff3a32016-02-09 14:57:42 +02002800 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002801 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002802
Matan Barakb4ff3a32016-02-09 14:57:42 +02002803 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002804 u8 pd[0x18];
2805
2806 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002807 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002808 u8 flow_label[0x14];
2809
2810 u8 dc_access_key[0x40];
2811
Matan Barakb4ff3a32016-02-09 14:57:42 +02002812 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002813 u8 mtu[0x3];
2814 u8 port[0x8];
2815 u8 pkey_index[0x10];
2816
Matan Barakb4ff3a32016-02-09 14:57:42 +02002817 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002818 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002819 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002820 u8 hop_limit[0x8];
2821
2822 u8 dc_access_key_violation_count[0x20];
2823
Matan Barakb4ff3a32016-02-09 14:57:42 +02002824 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002825 u8 dei_cfi[0x1];
2826 u8 eth_prio[0x3];
2827 u8 ecn[0x2];
2828 u8 dscp[0x6];
2829
Matan Barakb4ff3a32016-02-09 14:57:42 +02002830 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002831};
2832
2833enum {
2834 MLX5_CQC_STATUS_OK = 0x0,
2835 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2836 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2837};
2838
2839enum {
2840 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2841 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2842};
2843
2844enum {
2845 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2846 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2847 MLX5_CQC_ST_FIRED = 0xa,
2848};
2849
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002850enum {
2851 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2852 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002853 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002854};
2855
Saeed Mahameede2816822015-05-28 22:28:40 +03002856struct mlx5_ifc_cqc_bits {
2857 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002858 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002859 u8 cqe_sz[0x3];
2860 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002861 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002862 u8 scqe_break_moderation_en[0x1];
2863 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002864 u8 cq_period_mode[0x2];
2865 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002866 u8 mini_cqe_res_format[0x2];
2867 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002868 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002869
Matan Barakb4ff3a32016-02-09 14:57:42 +02002870 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002871
Matan Barakb4ff3a32016-02-09 14:57:42 +02002872 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002873 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002874 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002875
Matan Barakb4ff3a32016-02-09 14:57:42 +02002876 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002877 u8 log_cq_size[0x5];
2878 u8 uar_page[0x18];
2879
Matan Barakb4ff3a32016-02-09 14:57:42 +02002880 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002881 u8 cq_period[0xc];
2882 u8 cq_max_count[0x10];
2883
Matan Barakb4ff3a32016-02-09 14:57:42 +02002884 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002885 u8 c_eqn[0x8];
2886
Matan Barakb4ff3a32016-02-09 14:57:42 +02002887 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002888 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002889 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002890
Matan Barakb4ff3a32016-02-09 14:57:42 +02002891 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002892
Matan Barakb4ff3a32016-02-09 14:57:42 +02002893 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002894 u8 last_notified_index[0x18];
2895
Matan Barakb4ff3a32016-02-09 14:57:42 +02002896 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002897 u8 last_solicit_index[0x18];
2898
Matan Barakb4ff3a32016-02-09 14:57:42 +02002899 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002900 u8 consumer_counter[0x18];
2901
Matan Barakb4ff3a32016-02-09 14:57:42 +02002902 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002903 u8 producer_counter[0x18];
2904
Matan Barakb4ff3a32016-02-09 14:57:42 +02002905 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002906
2907 u8 dbr_addr[0x40];
2908};
2909
2910union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2911 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2912 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2913 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002914 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002915};
2916
2917struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002918 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002919
Matan Barakb4ff3a32016-02-09 14:57:42 +02002920 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002921 u8 ieee_vendor_id[0x18];
2922
Matan Barakb4ff3a32016-02-09 14:57:42 +02002923 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002924 u8 vsd_vendor_id[0x10];
2925
2926 u8 vsd[208][0x8];
2927
2928 u8 vsd_contd_psid[16][0x8];
2929};
2930
Saeed Mahameed74862162016-06-09 15:11:34 +03002931enum {
2932 MLX5_XRQC_STATE_GOOD = 0x0,
2933 MLX5_XRQC_STATE_ERROR = 0x1,
2934};
2935
2936enum {
2937 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
2938 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
2939};
2940
2941enum {
2942 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
2943};
2944
2945struct mlx5_ifc_tag_matching_topology_context_bits {
2946 u8 log_matching_list_sz[0x4];
2947 u8 reserved_at_4[0xc];
2948 u8 append_next_index[0x10];
2949
2950 u8 sw_phase_cnt[0x10];
2951 u8 hw_phase_cnt[0x10];
2952
2953 u8 reserved_at_40[0x40];
2954};
2955
2956struct mlx5_ifc_xrqc_bits {
2957 u8 state[0x4];
2958 u8 rlkey[0x1];
2959 u8 reserved_at_5[0xf];
2960 u8 topology[0x4];
2961 u8 reserved_at_18[0x4];
2962 u8 offload[0x4];
2963
2964 u8 reserved_at_20[0x8];
2965 u8 user_index[0x18];
2966
2967 u8 reserved_at_40[0x8];
2968 u8 cqn[0x18];
2969
2970 u8 reserved_at_60[0xa0];
2971
2972 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
2973
Artemy Kovalyov5579e152016-08-31 05:17:54 +00002974 u8 reserved_at_180[0x880];
Saeed Mahameed74862162016-06-09 15:11:34 +03002975
2976 struct mlx5_ifc_wq_bits wq;
2977};
2978
Saeed Mahameede2816822015-05-28 22:28:40 +03002979union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
2980 struct mlx5_ifc_modify_field_select_bits modify_field_select;
2981 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002982 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002983};
2984
2985union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
2986 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
2987 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
2988 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002989 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002990};
2991
2992union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
2993 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
2994 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
2995 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
2996 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
2997 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
2998 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
2999 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003000 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003001 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003002 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003003 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003004};
3005
Gal Pressman8ed1a632016-11-17 13:46:01 +02003006union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3007 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3008 u8 reserved_at_0[0x7c0];
3009};
3010
Saeed Mahameede2816822015-05-28 22:28:40 +03003011union mlx5_ifc_event_auto_bits {
3012 struct mlx5_ifc_comp_event_bits comp_event;
3013 struct mlx5_ifc_dct_events_bits dct_events;
3014 struct mlx5_ifc_qp_events_bits qp_events;
3015 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3016 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3017 struct mlx5_ifc_cq_error_bits cq_error;
3018 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3019 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3020 struct mlx5_ifc_gpio_event_bits gpio_event;
3021 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3022 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3023 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003024 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003025};
3026
3027struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003028 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003029
3030 u8 assert_existptr[0x20];
3031
3032 u8 assert_callra[0x20];
3033
Matan Barakb4ff3a32016-02-09 14:57:42 +02003034 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003035
3036 u8 fw_version[0x20];
3037
3038 u8 hw_id[0x20];
3039
Matan Barakb4ff3a32016-02-09 14:57:42 +02003040 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003041
3042 u8 irisc_index[0x8];
3043 u8 synd[0x8];
3044 u8 ext_synd[0x10];
3045};
3046
3047struct mlx5_ifc_register_loopback_control_bits {
3048 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003049 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003050 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003051 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003052
Matan Barakb4ff3a32016-02-09 14:57:42 +02003053 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003054};
3055
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003056struct mlx5_ifc_vport_tc_element_bits {
3057 u8 traffic_class[0x4];
3058 u8 reserved_at_4[0xc];
3059 u8 vport_number[0x10];
3060};
3061
3062struct mlx5_ifc_vport_element_bits {
3063 u8 reserved_at_0[0x10];
3064 u8 vport_number[0x10];
3065};
3066
3067enum {
3068 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3069 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3070 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3071};
3072
3073struct mlx5_ifc_tsar_element_bits {
3074 u8 reserved_at_0[0x8];
3075 u8 tsar_type[0x8];
3076 u8 reserved_at_10[0x10];
3077};
3078
Saeed Mahameede2816822015-05-28 22:28:40 +03003079struct mlx5_ifc_teardown_hca_out_bits {
3080 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003081 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003082
3083 u8 syndrome[0x20];
3084
Matan Barakb4ff3a32016-02-09 14:57:42 +02003085 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003086};
3087
3088enum {
3089 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
3090 MLX5_TEARDOWN_HCA_IN_PROFILE_PANIC_CLOSE = 0x1,
3091};
3092
3093struct mlx5_ifc_teardown_hca_in_bits {
3094 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003095 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003096
Matan Barakb4ff3a32016-02-09 14:57:42 +02003097 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003098 u8 op_mod[0x10];
3099
Matan Barakb4ff3a32016-02-09 14:57:42 +02003100 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003101 u8 profile[0x10];
3102
Matan Barakb4ff3a32016-02-09 14:57:42 +02003103 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003104};
3105
3106struct mlx5_ifc_sqerr2rts_qp_out_bits {
3107 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003108 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003109
3110 u8 syndrome[0x20];
3111
Matan Barakb4ff3a32016-02-09 14:57:42 +02003112 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003113};
3114
3115struct mlx5_ifc_sqerr2rts_qp_in_bits {
3116 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003117 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003118
Matan Barakb4ff3a32016-02-09 14:57:42 +02003119 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003120 u8 op_mod[0x10];
3121
Matan Barakb4ff3a32016-02-09 14:57:42 +02003122 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003123 u8 qpn[0x18];
3124
Matan Barakb4ff3a32016-02-09 14:57:42 +02003125 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003126
3127 u8 opt_param_mask[0x20];
3128
Matan Barakb4ff3a32016-02-09 14:57:42 +02003129 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003130
3131 struct mlx5_ifc_qpc_bits qpc;
3132
Matan Barakb4ff3a32016-02-09 14:57:42 +02003133 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003134};
3135
3136struct mlx5_ifc_sqd2rts_qp_out_bits {
3137 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003138 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003139
3140 u8 syndrome[0x20];
3141
Matan Barakb4ff3a32016-02-09 14:57:42 +02003142 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003143};
3144
3145struct mlx5_ifc_sqd2rts_qp_in_bits {
3146 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003147 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003148
Matan Barakb4ff3a32016-02-09 14:57:42 +02003149 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003150 u8 op_mod[0x10];
3151
Matan Barakb4ff3a32016-02-09 14:57:42 +02003152 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003153 u8 qpn[0x18];
3154
Matan Barakb4ff3a32016-02-09 14:57:42 +02003155 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003156
3157 u8 opt_param_mask[0x20];
3158
Matan Barakb4ff3a32016-02-09 14:57:42 +02003159 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003160
3161 struct mlx5_ifc_qpc_bits qpc;
3162
Matan Barakb4ff3a32016-02-09 14:57:42 +02003163 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003164};
3165
3166struct mlx5_ifc_set_roce_address_out_bits {
3167 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003168 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003169
3170 u8 syndrome[0x20];
3171
Matan Barakb4ff3a32016-02-09 14:57:42 +02003172 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003173};
3174
3175struct mlx5_ifc_set_roce_address_in_bits {
3176 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003177 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003178
Matan Barakb4ff3a32016-02-09 14:57:42 +02003179 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003180 u8 op_mod[0x10];
3181
3182 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003183 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003184
Matan Barakb4ff3a32016-02-09 14:57:42 +02003185 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003186
3187 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3188};
3189
3190struct mlx5_ifc_set_mad_demux_out_bits {
3191 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003192 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003193
3194 u8 syndrome[0x20];
3195
Matan Barakb4ff3a32016-02-09 14:57:42 +02003196 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003197};
3198
3199enum {
3200 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3201 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3202};
3203
3204struct mlx5_ifc_set_mad_demux_in_bits {
3205 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003206 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003207
Matan Barakb4ff3a32016-02-09 14:57:42 +02003208 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003209 u8 op_mod[0x10];
3210
Matan Barakb4ff3a32016-02-09 14:57:42 +02003211 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003212
Matan Barakb4ff3a32016-02-09 14:57:42 +02003213 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003214 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003215 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003216};
3217
3218struct mlx5_ifc_set_l2_table_entry_out_bits {
3219 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003220 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003221
3222 u8 syndrome[0x20];
3223
Matan Barakb4ff3a32016-02-09 14:57:42 +02003224 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003225};
3226
3227struct mlx5_ifc_set_l2_table_entry_in_bits {
3228 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003229 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003230
Matan Barakb4ff3a32016-02-09 14:57:42 +02003231 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003232 u8 op_mod[0x10];
3233
Matan Barakb4ff3a32016-02-09 14:57:42 +02003234 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003235
Matan Barakb4ff3a32016-02-09 14:57:42 +02003236 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003237 u8 table_index[0x18];
3238
Matan Barakb4ff3a32016-02-09 14:57:42 +02003239 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003240
Matan Barakb4ff3a32016-02-09 14:57:42 +02003241 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003242 u8 vlan_valid[0x1];
3243 u8 vlan[0xc];
3244
3245 struct mlx5_ifc_mac_address_layout_bits mac_address;
3246
Matan Barakb4ff3a32016-02-09 14:57:42 +02003247 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003248};
3249
3250struct mlx5_ifc_set_issi_out_bits {
3251 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003252 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003253
3254 u8 syndrome[0x20];
3255
Matan Barakb4ff3a32016-02-09 14:57:42 +02003256 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003257};
3258
3259struct mlx5_ifc_set_issi_in_bits {
3260 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003261 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003262
Matan Barakb4ff3a32016-02-09 14:57:42 +02003263 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003264 u8 op_mod[0x10];
3265
Matan Barakb4ff3a32016-02-09 14:57:42 +02003266 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003267 u8 current_issi[0x10];
3268
Matan Barakb4ff3a32016-02-09 14:57:42 +02003269 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003270};
3271
3272struct mlx5_ifc_set_hca_cap_out_bits {
3273 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003274 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003275
3276 u8 syndrome[0x20];
3277
Matan Barakb4ff3a32016-02-09 14:57:42 +02003278 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003279};
3280
3281struct mlx5_ifc_set_hca_cap_in_bits {
3282 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003283 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003284
Matan Barakb4ff3a32016-02-09 14:57:42 +02003285 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003286 u8 op_mod[0x10];
3287
Matan Barakb4ff3a32016-02-09 14:57:42 +02003288 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003289
Saeed Mahameede2816822015-05-28 22:28:40 +03003290 union mlx5_ifc_hca_cap_union_bits capability;
3291};
3292
Maor Gottlieb26a81452015-12-10 17:12:39 +02003293enum {
3294 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3295 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3296 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3297 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3298};
3299
Saeed Mahameede2816822015-05-28 22:28:40 +03003300struct mlx5_ifc_set_fte_out_bits {
3301 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003302 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003303
3304 u8 syndrome[0x20];
3305
Matan Barakb4ff3a32016-02-09 14:57:42 +02003306 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003307};
3308
3309struct mlx5_ifc_set_fte_in_bits {
3310 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003311 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003312
Matan Barakb4ff3a32016-02-09 14:57:42 +02003313 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003314 u8 op_mod[0x10];
3315
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003316 u8 other_vport[0x1];
3317 u8 reserved_at_41[0xf];
3318 u8 vport_number[0x10];
3319
3320 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003321
3322 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003323 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003324
Matan Barakb4ff3a32016-02-09 14:57:42 +02003325 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003326 u8 table_id[0x18];
3327
Matan Barakb4ff3a32016-02-09 14:57:42 +02003328 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003329 u8 modify_enable_mask[0x8];
3330
Matan Barakb4ff3a32016-02-09 14:57:42 +02003331 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003332
3333 u8 flow_index[0x20];
3334
Matan Barakb4ff3a32016-02-09 14:57:42 +02003335 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003336
3337 struct mlx5_ifc_flow_context_bits flow_context;
3338};
3339
3340struct mlx5_ifc_rts2rts_qp_out_bits {
3341 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003342 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003343
3344 u8 syndrome[0x20];
3345
Matan Barakb4ff3a32016-02-09 14:57:42 +02003346 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003347};
3348
3349struct mlx5_ifc_rts2rts_qp_in_bits {
3350 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003351 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003352
Matan Barakb4ff3a32016-02-09 14:57:42 +02003353 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003354 u8 op_mod[0x10];
3355
Matan Barakb4ff3a32016-02-09 14:57:42 +02003356 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003357 u8 qpn[0x18];
3358
Matan Barakb4ff3a32016-02-09 14:57:42 +02003359 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003360
3361 u8 opt_param_mask[0x20];
3362
Matan Barakb4ff3a32016-02-09 14:57:42 +02003363 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003364
3365 struct mlx5_ifc_qpc_bits qpc;
3366
Matan Barakb4ff3a32016-02-09 14:57:42 +02003367 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003368};
3369
3370struct mlx5_ifc_rtr2rts_qp_out_bits {
3371 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003372 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003373
3374 u8 syndrome[0x20];
3375
Matan Barakb4ff3a32016-02-09 14:57:42 +02003376 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003377};
3378
3379struct mlx5_ifc_rtr2rts_qp_in_bits {
3380 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003381 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003382
Matan Barakb4ff3a32016-02-09 14:57:42 +02003383 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003384 u8 op_mod[0x10];
3385
Matan Barakb4ff3a32016-02-09 14:57:42 +02003386 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003387 u8 qpn[0x18];
3388
Matan Barakb4ff3a32016-02-09 14:57:42 +02003389 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003390
3391 u8 opt_param_mask[0x20];
3392
Matan Barakb4ff3a32016-02-09 14:57:42 +02003393 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003394
3395 struct mlx5_ifc_qpc_bits qpc;
3396
Matan Barakb4ff3a32016-02-09 14:57:42 +02003397 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003398};
3399
3400struct mlx5_ifc_rst2init_qp_out_bits {
3401 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003402 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003403
3404 u8 syndrome[0x20];
3405
Matan Barakb4ff3a32016-02-09 14:57:42 +02003406 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003407};
3408
3409struct mlx5_ifc_rst2init_qp_in_bits {
3410 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003411 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003412
Matan Barakb4ff3a32016-02-09 14:57:42 +02003413 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003414 u8 op_mod[0x10];
3415
Matan Barakb4ff3a32016-02-09 14:57:42 +02003416 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003417 u8 qpn[0x18];
3418
Matan Barakb4ff3a32016-02-09 14:57:42 +02003419 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003420
3421 u8 opt_param_mask[0x20];
3422
Matan Barakb4ff3a32016-02-09 14:57:42 +02003423 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003424
3425 struct mlx5_ifc_qpc_bits qpc;
3426
Matan Barakb4ff3a32016-02-09 14:57:42 +02003427 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003428};
3429
Saeed Mahameed74862162016-06-09 15:11:34 +03003430struct mlx5_ifc_query_xrq_out_bits {
3431 u8 status[0x8];
3432 u8 reserved_at_8[0x18];
3433
3434 u8 syndrome[0x20];
3435
3436 u8 reserved_at_40[0x40];
3437
3438 struct mlx5_ifc_xrqc_bits xrq_context;
3439};
3440
3441struct mlx5_ifc_query_xrq_in_bits {
3442 u8 opcode[0x10];
3443 u8 reserved_at_10[0x10];
3444
3445 u8 reserved_at_20[0x10];
3446 u8 op_mod[0x10];
3447
3448 u8 reserved_at_40[0x8];
3449 u8 xrqn[0x18];
3450
3451 u8 reserved_at_60[0x20];
3452};
3453
Saeed Mahameede2816822015-05-28 22:28:40 +03003454struct mlx5_ifc_query_xrc_srq_out_bits {
3455 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003456 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003457
3458 u8 syndrome[0x20];
3459
Matan Barakb4ff3a32016-02-09 14:57:42 +02003460 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003461
3462 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3463
Matan Barakb4ff3a32016-02-09 14:57:42 +02003464 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003465
3466 u8 pas[0][0x40];
3467};
3468
3469struct mlx5_ifc_query_xrc_srq_in_bits {
3470 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003471 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003472
Matan Barakb4ff3a32016-02-09 14:57:42 +02003473 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003474 u8 op_mod[0x10];
3475
Matan Barakb4ff3a32016-02-09 14:57:42 +02003476 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003477 u8 xrc_srqn[0x18];
3478
Matan Barakb4ff3a32016-02-09 14:57:42 +02003479 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003480};
3481
3482enum {
3483 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3484 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3485};
3486
3487struct mlx5_ifc_query_vport_state_out_bits {
3488 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003489 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003490
3491 u8 syndrome[0x20];
3492
Matan Barakb4ff3a32016-02-09 14:57:42 +02003493 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003494
Matan Barakb4ff3a32016-02-09 14:57:42 +02003495 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003496 u8 admin_state[0x4];
3497 u8 state[0x4];
3498};
3499
3500enum {
3501 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003502 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003503};
3504
3505struct mlx5_ifc_query_vport_state_in_bits {
3506 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003507 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003508
Matan Barakb4ff3a32016-02-09 14:57:42 +02003509 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003510 u8 op_mod[0x10];
3511
3512 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003513 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003514 u8 vport_number[0x10];
3515
Matan Barakb4ff3a32016-02-09 14:57:42 +02003516 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003517};
3518
3519struct mlx5_ifc_query_vport_counter_out_bits {
3520 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003521 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003522
3523 u8 syndrome[0x20];
3524
Matan Barakb4ff3a32016-02-09 14:57:42 +02003525 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003526
3527 struct mlx5_ifc_traffic_counter_bits received_errors;
3528
3529 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3530
3531 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3532
3533 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3534
3535 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3536
3537 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3538
3539 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3540
3541 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3542
3543 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3544
3545 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3546
3547 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3548
3549 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3550
Matan Barakb4ff3a32016-02-09 14:57:42 +02003551 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003552};
3553
3554enum {
3555 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3556};
3557
3558struct mlx5_ifc_query_vport_counter_in_bits {
3559 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003560 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003561
Matan Barakb4ff3a32016-02-09 14:57:42 +02003562 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003563 u8 op_mod[0x10];
3564
3565 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003566 u8 reserved_at_41[0xb];
3567 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003568 u8 vport_number[0x10];
3569
Matan Barakb4ff3a32016-02-09 14:57:42 +02003570 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003571
3572 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003573 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003574
Matan Barakb4ff3a32016-02-09 14:57:42 +02003575 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003576};
3577
3578struct mlx5_ifc_query_tis_out_bits {
3579 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003580 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003581
3582 u8 syndrome[0x20];
3583
Matan Barakb4ff3a32016-02-09 14:57:42 +02003584 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003585
3586 struct mlx5_ifc_tisc_bits tis_context;
3587};
3588
3589struct mlx5_ifc_query_tis_in_bits {
3590 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003591 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003592
Matan Barakb4ff3a32016-02-09 14:57:42 +02003593 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003594 u8 op_mod[0x10];
3595
Matan Barakb4ff3a32016-02-09 14:57:42 +02003596 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003597 u8 tisn[0x18];
3598
Matan Barakb4ff3a32016-02-09 14:57:42 +02003599 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003600};
3601
3602struct mlx5_ifc_query_tir_out_bits {
3603 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003604 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003605
3606 u8 syndrome[0x20];
3607
Matan Barakb4ff3a32016-02-09 14:57:42 +02003608 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003609
3610 struct mlx5_ifc_tirc_bits tir_context;
3611};
3612
3613struct mlx5_ifc_query_tir_in_bits {
3614 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003615 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003616
Matan Barakb4ff3a32016-02-09 14:57:42 +02003617 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003618 u8 op_mod[0x10];
3619
Matan Barakb4ff3a32016-02-09 14:57:42 +02003620 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003621 u8 tirn[0x18];
3622
Matan Barakb4ff3a32016-02-09 14:57:42 +02003623 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003624};
3625
3626struct mlx5_ifc_query_srq_out_bits {
3627 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003628 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003629
3630 u8 syndrome[0x20];
3631
Matan Barakb4ff3a32016-02-09 14:57:42 +02003632 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003633
3634 struct mlx5_ifc_srqc_bits srq_context_entry;
3635
Matan Barakb4ff3a32016-02-09 14:57:42 +02003636 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003637
3638 u8 pas[0][0x40];
3639};
3640
3641struct mlx5_ifc_query_srq_in_bits {
3642 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003643 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003644
Matan Barakb4ff3a32016-02-09 14:57:42 +02003645 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003646 u8 op_mod[0x10];
3647
Matan Barakb4ff3a32016-02-09 14:57:42 +02003648 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003649 u8 srqn[0x18];
3650
Matan Barakb4ff3a32016-02-09 14:57:42 +02003651 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003652};
3653
3654struct mlx5_ifc_query_sq_out_bits {
3655 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003656 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003657
3658 u8 syndrome[0x20];
3659
Matan Barakb4ff3a32016-02-09 14:57:42 +02003660 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003661
3662 struct mlx5_ifc_sqc_bits sq_context;
3663};
3664
3665struct mlx5_ifc_query_sq_in_bits {
3666 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003667 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003668
Matan Barakb4ff3a32016-02-09 14:57:42 +02003669 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003670 u8 op_mod[0x10];
3671
Matan Barakb4ff3a32016-02-09 14:57:42 +02003672 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003673 u8 sqn[0x18];
3674
Matan Barakb4ff3a32016-02-09 14:57:42 +02003675 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003676};
3677
3678struct mlx5_ifc_query_special_contexts_out_bits {
3679 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003680 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003681
3682 u8 syndrome[0x20];
3683
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003684 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003685
3686 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003687
3688 u8 null_mkey[0x20];
3689
3690 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003691};
3692
3693struct mlx5_ifc_query_special_contexts_in_bits {
3694 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003695 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003696
Matan Barakb4ff3a32016-02-09 14:57:42 +02003697 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003698 u8 op_mod[0x10];
3699
Matan Barakb4ff3a32016-02-09 14:57:42 +02003700 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003701};
3702
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003703struct mlx5_ifc_query_scheduling_element_out_bits {
3704 u8 opcode[0x10];
3705 u8 reserved_at_10[0x10];
3706
3707 u8 reserved_at_20[0x10];
3708 u8 op_mod[0x10];
3709
3710 u8 reserved_at_40[0xc0];
3711
3712 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3713
3714 u8 reserved_at_300[0x100];
3715};
3716
3717enum {
3718 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3719};
3720
3721struct mlx5_ifc_query_scheduling_element_in_bits {
3722 u8 opcode[0x10];
3723 u8 reserved_at_10[0x10];
3724
3725 u8 reserved_at_20[0x10];
3726 u8 op_mod[0x10];
3727
3728 u8 scheduling_hierarchy[0x8];
3729 u8 reserved_at_48[0x18];
3730
3731 u8 scheduling_element_id[0x20];
3732
3733 u8 reserved_at_80[0x180];
3734};
3735
Saeed Mahameede2816822015-05-28 22:28:40 +03003736struct mlx5_ifc_query_rqt_out_bits {
3737 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003738 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003739
3740 u8 syndrome[0x20];
3741
Matan Barakb4ff3a32016-02-09 14:57:42 +02003742 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003743
3744 struct mlx5_ifc_rqtc_bits rqt_context;
3745};
3746
3747struct mlx5_ifc_query_rqt_in_bits {
3748 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003749 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003750
Matan Barakb4ff3a32016-02-09 14:57:42 +02003751 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003752 u8 op_mod[0x10];
3753
Matan Barakb4ff3a32016-02-09 14:57:42 +02003754 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003755 u8 rqtn[0x18];
3756
Matan Barakb4ff3a32016-02-09 14:57:42 +02003757 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003758};
3759
3760struct mlx5_ifc_query_rq_out_bits {
3761 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003762 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003763
3764 u8 syndrome[0x20];
3765
Matan Barakb4ff3a32016-02-09 14:57:42 +02003766 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003767
3768 struct mlx5_ifc_rqc_bits rq_context;
3769};
3770
3771struct mlx5_ifc_query_rq_in_bits {
3772 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003773 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003774
Matan Barakb4ff3a32016-02-09 14:57:42 +02003775 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003776 u8 op_mod[0x10];
3777
Matan Barakb4ff3a32016-02-09 14:57:42 +02003778 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003779 u8 rqn[0x18];
3780
Matan Barakb4ff3a32016-02-09 14:57:42 +02003781 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003782};
3783
3784struct mlx5_ifc_query_roce_address_out_bits {
3785 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003786 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003787
3788 u8 syndrome[0x20];
3789
Matan Barakb4ff3a32016-02-09 14:57:42 +02003790 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003791
3792 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3793};
3794
3795struct mlx5_ifc_query_roce_address_in_bits {
3796 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003797 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003798
Matan Barakb4ff3a32016-02-09 14:57:42 +02003799 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003800 u8 op_mod[0x10];
3801
3802 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003803 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003804
Matan Barakb4ff3a32016-02-09 14:57:42 +02003805 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003806};
3807
3808struct mlx5_ifc_query_rmp_out_bits {
3809 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003810 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003811
3812 u8 syndrome[0x20];
3813
Matan Barakb4ff3a32016-02-09 14:57:42 +02003814 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003815
3816 struct mlx5_ifc_rmpc_bits rmp_context;
3817};
3818
3819struct mlx5_ifc_query_rmp_in_bits {
3820 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003821 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003822
Matan Barakb4ff3a32016-02-09 14:57:42 +02003823 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003824 u8 op_mod[0x10];
3825
Matan Barakb4ff3a32016-02-09 14:57:42 +02003826 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003827 u8 rmpn[0x18];
3828
Matan Barakb4ff3a32016-02-09 14:57:42 +02003829 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003830};
3831
3832struct mlx5_ifc_query_qp_out_bits {
3833 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003834 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003835
3836 u8 syndrome[0x20];
3837
Matan Barakb4ff3a32016-02-09 14:57:42 +02003838 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003839
3840 u8 opt_param_mask[0x20];
3841
Matan Barakb4ff3a32016-02-09 14:57:42 +02003842 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003843
3844 struct mlx5_ifc_qpc_bits qpc;
3845
Matan Barakb4ff3a32016-02-09 14:57:42 +02003846 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003847
3848 u8 pas[0][0x40];
3849};
3850
3851struct mlx5_ifc_query_qp_in_bits {
3852 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003853 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003854
Matan Barakb4ff3a32016-02-09 14:57:42 +02003855 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003856 u8 op_mod[0x10];
3857
Matan Barakb4ff3a32016-02-09 14:57:42 +02003858 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003859 u8 qpn[0x18];
3860
Matan Barakb4ff3a32016-02-09 14:57:42 +02003861 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003862};
3863
3864struct mlx5_ifc_query_q_counter_out_bits {
3865 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003866 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003867
3868 u8 syndrome[0x20];
3869
Matan Barakb4ff3a32016-02-09 14:57:42 +02003870 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003871
3872 u8 rx_write_requests[0x20];
3873
Matan Barakb4ff3a32016-02-09 14:57:42 +02003874 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003875
3876 u8 rx_read_requests[0x20];
3877
Matan Barakb4ff3a32016-02-09 14:57:42 +02003878 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003879
3880 u8 rx_atomic_requests[0x20];
3881
Matan Barakb4ff3a32016-02-09 14:57:42 +02003882 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003883
3884 u8 rx_dct_connect[0x20];
3885
Matan Barakb4ff3a32016-02-09 14:57:42 +02003886 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003887
3888 u8 out_of_buffer[0x20];
3889
Matan Barakb4ff3a32016-02-09 14:57:42 +02003890 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003891
3892 u8 out_of_sequence[0x20];
3893
Saeed Mahameed74862162016-06-09 15:11:34 +03003894 u8 reserved_at_1e0[0x20];
3895
3896 u8 duplicate_request[0x20];
3897
3898 u8 reserved_at_220[0x20];
3899
3900 u8 rnr_nak_retry_err[0x20];
3901
3902 u8 reserved_at_260[0x20];
3903
3904 u8 packet_seq_err[0x20];
3905
3906 u8 reserved_at_2a0[0x20];
3907
3908 u8 implied_nak_seq_err[0x20];
3909
3910 u8 reserved_at_2e0[0x20];
3911
3912 u8 local_ack_timeout_err[0x20];
3913
3914 u8 reserved_at_320[0x4e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003915};
3916
3917struct mlx5_ifc_query_q_counter_in_bits {
3918 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003919 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003920
Matan Barakb4ff3a32016-02-09 14:57:42 +02003921 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003922 u8 op_mod[0x10];
3923
Matan Barakb4ff3a32016-02-09 14:57:42 +02003924 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003925
3926 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003927 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003928
Matan Barakb4ff3a32016-02-09 14:57:42 +02003929 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003930 u8 counter_set_id[0x8];
3931};
3932
3933struct mlx5_ifc_query_pages_out_bits {
3934 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003935 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003936
3937 u8 syndrome[0x20];
3938
Matan Barakb4ff3a32016-02-09 14:57:42 +02003939 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003940 u8 function_id[0x10];
3941
3942 u8 num_pages[0x20];
3943};
3944
3945enum {
3946 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
3947 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
3948 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
3949};
3950
3951struct mlx5_ifc_query_pages_in_bits {
3952 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003953 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003954
Matan Barakb4ff3a32016-02-09 14:57:42 +02003955 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003956 u8 op_mod[0x10];
3957
Matan Barakb4ff3a32016-02-09 14:57:42 +02003958 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003959 u8 function_id[0x10];
3960
Matan Barakb4ff3a32016-02-09 14:57:42 +02003961 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003962};
3963
3964struct mlx5_ifc_query_nic_vport_context_out_bits {
3965 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003966 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003967
3968 u8 syndrome[0x20];
3969
Matan Barakb4ff3a32016-02-09 14:57:42 +02003970 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003971
3972 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
3973};
3974
3975struct mlx5_ifc_query_nic_vport_context_in_bits {
3976 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003977 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003978
Matan Barakb4ff3a32016-02-09 14:57:42 +02003979 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003980 u8 op_mod[0x10];
3981
3982 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003983 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003984 u8 vport_number[0x10];
3985
Matan Barakb4ff3a32016-02-09 14:57:42 +02003986 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03003987 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003988 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003989};
3990
3991struct mlx5_ifc_query_mkey_out_bits {
3992 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003993 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003994
3995 u8 syndrome[0x20];
3996
Matan Barakb4ff3a32016-02-09 14:57:42 +02003997 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003998
3999 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4000
Matan Barakb4ff3a32016-02-09 14:57:42 +02004001 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004002
4003 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4004
4005 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4006};
4007
4008struct mlx5_ifc_query_mkey_in_bits {
4009 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004010 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004011
Matan Barakb4ff3a32016-02-09 14:57:42 +02004012 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004013 u8 op_mod[0x10];
4014
Matan Barakb4ff3a32016-02-09 14:57:42 +02004015 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004016 u8 mkey_index[0x18];
4017
4018 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004019 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004020};
4021
4022struct mlx5_ifc_query_mad_demux_out_bits {
4023 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004024 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004025
4026 u8 syndrome[0x20];
4027
Matan Barakb4ff3a32016-02-09 14:57:42 +02004028 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004029
4030 u8 mad_dumux_parameters_block[0x20];
4031};
4032
4033struct mlx5_ifc_query_mad_demux_in_bits {
4034 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004035 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004036
Matan Barakb4ff3a32016-02-09 14:57:42 +02004037 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004038 u8 op_mod[0x10];
4039
Matan Barakb4ff3a32016-02-09 14:57:42 +02004040 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004041};
4042
4043struct mlx5_ifc_query_l2_table_entry_out_bits {
4044 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004045 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004046
4047 u8 syndrome[0x20];
4048
Matan Barakb4ff3a32016-02-09 14:57:42 +02004049 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004050
Matan Barakb4ff3a32016-02-09 14:57:42 +02004051 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004052 u8 vlan_valid[0x1];
4053 u8 vlan[0xc];
4054
4055 struct mlx5_ifc_mac_address_layout_bits mac_address;
4056
Matan Barakb4ff3a32016-02-09 14:57:42 +02004057 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004058};
4059
4060struct mlx5_ifc_query_l2_table_entry_in_bits {
4061 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004062 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004063
Matan Barakb4ff3a32016-02-09 14:57:42 +02004064 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004065 u8 op_mod[0x10];
4066
Matan Barakb4ff3a32016-02-09 14:57:42 +02004067 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004068
Matan Barakb4ff3a32016-02-09 14:57:42 +02004069 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004070 u8 table_index[0x18];
4071
Matan Barakb4ff3a32016-02-09 14:57:42 +02004072 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004073};
4074
4075struct mlx5_ifc_query_issi_out_bits {
4076 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004077 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004078
4079 u8 syndrome[0x20];
4080
Matan Barakb4ff3a32016-02-09 14:57:42 +02004081 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004082 u8 current_issi[0x10];
4083
Matan Barakb4ff3a32016-02-09 14:57:42 +02004084 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004085
Matan Barakb4ff3a32016-02-09 14:57:42 +02004086 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004087 u8 supported_issi_dw0[0x20];
4088};
4089
4090struct mlx5_ifc_query_issi_in_bits {
4091 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004092 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004093
Matan Barakb4ff3a32016-02-09 14:57:42 +02004094 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004095 u8 op_mod[0x10];
4096
Matan Barakb4ff3a32016-02-09 14:57:42 +02004097 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004098};
4099
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004100struct mlx5_ifc_set_driver_version_out_bits {
4101 u8 status[0x8];
4102 u8 reserved_0[0x18];
4103
4104 u8 syndrome[0x20];
4105 u8 reserved_1[0x40];
4106};
4107
4108struct mlx5_ifc_set_driver_version_in_bits {
4109 u8 opcode[0x10];
4110 u8 reserved_0[0x10];
4111
4112 u8 reserved_1[0x10];
4113 u8 op_mod[0x10];
4114
4115 u8 reserved_2[0x40];
4116 u8 driver_version[64][0x8];
4117};
4118
Saeed Mahameede2816822015-05-28 22:28:40 +03004119struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4120 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004121 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004122
4123 u8 syndrome[0x20];
4124
Matan Barakb4ff3a32016-02-09 14:57:42 +02004125 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004126
4127 struct mlx5_ifc_pkey_bits pkey[0];
4128};
4129
4130struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4131 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004132 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004133
Matan Barakb4ff3a32016-02-09 14:57:42 +02004134 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004135 u8 op_mod[0x10];
4136
4137 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004138 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004139 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004140 u8 vport_number[0x10];
4141
Matan Barakb4ff3a32016-02-09 14:57:42 +02004142 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004143 u8 pkey_index[0x10];
4144};
4145
Eli Coheneff901d2016-03-11 22:58:42 +02004146enum {
4147 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4148 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4149 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4150};
4151
Saeed Mahameede2816822015-05-28 22:28:40 +03004152struct mlx5_ifc_query_hca_vport_gid_out_bits {
4153 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004154 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004155
4156 u8 syndrome[0x20];
4157
Matan Barakb4ff3a32016-02-09 14:57:42 +02004158 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004159
4160 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004161 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004162
4163 struct mlx5_ifc_array128_auto_bits gid[0];
4164};
4165
4166struct mlx5_ifc_query_hca_vport_gid_in_bits {
4167 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004168 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004169
Matan Barakb4ff3a32016-02-09 14:57:42 +02004170 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004171 u8 op_mod[0x10];
4172
4173 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004174 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004175 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004176 u8 vport_number[0x10];
4177
Matan Barakb4ff3a32016-02-09 14:57:42 +02004178 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004179 u8 gid_index[0x10];
4180};
4181
4182struct mlx5_ifc_query_hca_vport_context_out_bits {
4183 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004184 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004185
4186 u8 syndrome[0x20];
4187
Matan Barakb4ff3a32016-02-09 14:57:42 +02004188 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004189
4190 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4191};
4192
4193struct mlx5_ifc_query_hca_vport_context_in_bits {
4194 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004195 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004196
Matan Barakb4ff3a32016-02-09 14:57:42 +02004197 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004198 u8 op_mod[0x10];
4199
4200 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004201 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004202 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004203 u8 vport_number[0x10];
4204
Matan Barakb4ff3a32016-02-09 14:57:42 +02004205 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004206};
4207
4208struct mlx5_ifc_query_hca_cap_out_bits {
4209 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004210 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004211
4212 u8 syndrome[0x20];
4213
Matan Barakb4ff3a32016-02-09 14:57:42 +02004214 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004215
4216 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004217};
4218
4219struct mlx5_ifc_query_hca_cap_in_bits {
4220 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004221 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004222
Matan Barakb4ff3a32016-02-09 14:57:42 +02004223 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004224 u8 op_mod[0x10];
4225
Matan Barakb4ff3a32016-02-09 14:57:42 +02004226 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004227};
4228
Saeed Mahameede2816822015-05-28 22:28:40 +03004229struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004230 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004231 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004232
4233 u8 syndrome[0x20];
4234
Matan Barakb4ff3a32016-02-09 14:57:42 +02004235 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004236
Matan Barakb4ff3a32016-02-09 14:57:42 +02004237 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004238 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004239 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004240 u8 log_size[0x8];
4241
Matan Barakb4ff3a32016-02-09 14:57:42 +02004242 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004243};
4244
Saeed Mahameede2816822015-05-28 22:28:40 +03004245struct mlx5_ifc_query_flow_table_in_bits {
4246 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004247 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004248
Matan Barakb4ff3a32016-02-09 14:57:42 +02004249 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004250 u8 op_mod[0x10];
4251
Matan Barakb4ff3a32016-02-09 14:57:42 +02004252 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004253
4254 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004255 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004256
Matan Barakb4ff3a32016-02-09 14:57:42 +02004257 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004258 u8 table_id[0x18];
4259
Matan Barakb4ff3a32016-02-09 14:57:42 +02004260 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004261};
4262
4263struct mlx5_ifc_query_fte_out_bits {
4264 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004265 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004266
4267 u8 syndrome[0x20];
4268
Matan Barakb4ff3a32016-02-09 14:57:42 +02004269 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004270
4271 struct mlx5_ifc_flow_context_bits flow_context;
4272};
4273
4274struct mlx5_ifc_query_fte_in_bits {
4275 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004276 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004277
Matan Barakb4ff3a32016-02-09 14:57:42 +02004278 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004279 u8 op_mod[0x10];
4280
Matan Barakb4ff3a32016-02-09 14:57:42 +02004281 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004282
4283 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004284 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004285
Matan Barakb4ff3a32016-02-09 14:57:42 +02004286 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004287 u8 table_id[0x18];
4288
Matan Barakb4ff3a32016-02-09 14:57:42 +02004289 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004290
4291 u8 flow_index[0x20];
4292
Matan Barakb4ff3a32016-02-09 14:57:42 +02004293 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004294};
4295
4296enum {
4297 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4298 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4299 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4300};
4301
4302struct mlx5_ifc_query_flow_group_out_bits {
4303 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004304 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004305
4306 u8 syndrome[0x20];
4307
Matan Barakb4ff3a32016-02-09 14:57:42 +02004308 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004309
4310 u8 start_flow_index[0x20];
4311
Matan Barakb4ff3a32016-02-09 14:57:42 +02004312 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004313
4314 u8 end_flow_index[0x20];
4315
Matan Barakb4ff3a32016-02-09 14:57:42 +02004316 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004317
Matan Barakb4ff3a32016-02-09 14:57:42 +02004318 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004319 u8 match_criteria_enable[0x8];
4320
4321 struct mlx5_ifc_fte_match_param_bits match_criteria;
4322
Matan Barakb4ff3a32016-02-09 14:57:42 +02004323 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004324};
4325
4326struct mlx5_ifc_query_flow_group_in_bits {
4327 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004328 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004329
Matan Barakb4ff3a32016-02-09 14:57:42 +02004330 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004331 u8 op_mod[0x10];
4332
Matan Barakb4ff3a32016-02-09 14:57:42 +02004333 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004334
4335 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004336 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004337
Matan Barakb4ff3a32016-02-09 14:57:42 +02004338 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004339 u8 table_id[0x18];
4340
4341 u8 group_id[0x20];
4342
Matan Barakb4ff3a32016-02-09 14:57:42 +02004343 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004344};
4345
Amir Vadai9dc0b282016-05-13 12:55:39 +00004346struct mlx5_ifc_query_flow_counter_out_bits {
4347 u8 status[0x8];
4348 u8 reserved_at_8[0x18];
4349
4350 u8 syndrome[0x20];
4351
4352 u8 reserved_at_40[0x40];
4353
4354 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4355};
4356
4357struct mlx5_ifc_query_flow_counter_in_bits {
4358 u8 opcode[0x10];
4359 u8 reserved_at_10[0x10];
4360
4361 u8 reserved_at_20[0x10];
4362 u8 op_mod[0x10];
4363
4364 u8 reserved_at_40[0x80];
4365
4366 u8 clear[0x1];
4367 u8 reserved_at_c1[0xf];
4368 u8 num_of_counters[0x10];
4369
4370 u8 reserved_at_e0[0x10];
4371 u8 flow_counter_id[0x10];
4372};
4373
Saeed Mahameedd6666752015-12-01 18:03:22 +02004374struct mlx5_ifc_query_esw_vport_context_out_bits {
4375 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004376 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004377
4378 u8 syndrome[0x20];
4379
Matan Barakb4ff3a32016-02-09 14:57:42 +02004380 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004381
4382 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4383};
4384
4385struct mlx5_ifc_query_esw_vport_context_in_bits {
4386 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004387 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004388
Matan Barakb4ff3a32016-02-09 14:57:42 +02004389 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004390 u8 op_mod[0x10];
4391
4392 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004393 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004394 u8 vport_number[0x10];
4395
Matan Barakb4ff3a32016-02-09 14:57:42 +02004396 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004397};
4398
4399struct mlx5_ifc_modify_esw_vport_context_out_bits {
4400 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004401 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004402
4403 u8 syndrome[0x20];
4404
Matan Barakb4ff3a32016-02-09 14:57:42 +02004405 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004406};
4407
4408struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004409 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004410 u8 vport_cvlan_insert[0x1];
4411 u8 vport_svlan_insert[0x1];
4412 u8 vport_cvlan_strip[0x1];
4413 u8 vport_svlan_strip[0x1];
4414};
4415
4416struct mlx5_ifc_modify_esw_vport_context_in_bits {
4417 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004418 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004419
Matan Barakb4ff3a32016-02-09 14:57:42 +02004420 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004421 u8 op_mod[0x10];
4422
4423 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004424 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004425 u8 vport_number[0x10];
4426
4427 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4428
4429 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4430};
4431
Saeed Mahameede2816822015-05-28 22:28:40 +03004432struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004433 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004434 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004435
4436 u8 syndrome[0x20];
4437
Matan Barakb4ff3a32016-02-09 14:57:42 +02004438 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004439
4440 struct mlx5_ifc_eqc_bits eq_context_entry;
4441
Matan Barakb4ff3a32016-02-09 14:57:42 +02004442 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004443
4444 u8 event_bitmask[0x40];
4445
Matan Barakb4ff3a32016-02-09 14:57:42 +02004446 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004447
4448 u8 pas[0][0x40];
4449};
4450
4451struct mlx5_ifc_query_eq_in_bits {
4452 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004453 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004454
Matan Barakb4ff3a32016-02-09 14:57:42 +02004455 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004456 u8 op_mod[0x10];
4457
Matan Barakb4ff3a32016-02-09 14:57:42 +02004458 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004459 u8 eq_number[0x8];
4460
Matan Barakb4ff3a32016-02-09 14:57:42 +02004461 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004462};
4463
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004464struct mlx5_ifc_encap_header_in_bits {
4465 u8 reserved_at_0[0x5];
4466 u8 header_type[0x3];
4467 u8 reserved_at_8[0xe];
4468 u8 encap_header_size[0xa];
4469
4470 u8 reserved_at_20[0x10];
4471 u8 encap_header[2][0x8];
4472
4473 u8 more_encap_header[0][0x8];
4474};
4475
4476struct mlx5_ifc_query_encap_header_out_bits {
4477 u8 status[0x8];
4478 u8 reserved_at_8[0x18];
4479
4480 u8 syndrome[0x20];
4481
4482 u8 reserved_at_40[0xa0];
4483
4484 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4485};
4486
4487struct mlx5_ifc_query_encap_header_in_bits {
4488 u8 opcode[0x10];
4489 u8 reserved_at_10[0x10];
4490
4491 u8 reserved_at_20[0x10];
4492 u8 op_mod[0x10];
4493
4494 u8 encap_id[0x20];
4495
4496 u8 reserved_at_60[0xa0];
4497};
4498
4499struct mlx5_ifc_alloc_encap_header_out_bits {
4500 u8 status[0x8];
4501 u8 reserved_at_8[0x18];
4502
4503 u8 syndrome[0x20];
4504
4505 u8 encap_id[0x20];
4506
4507 u8 reserved_at_60[0x20];
4508};
4509
4510struct mlx5_ifc_alloc_encap_header_in_bits {
4511 u8 opcode[0x10];
4512 u8 reserved_at_10[0x10];
4513
4514 u8 reserved_at_20[0x10];
4515 u8 op_mod[0x10];
4516
4517 u8 reserved_at_40[0xa0];
4518
4519 struct mlx5_ifc_encap_header_in_bits encap_header;
4520};
4521
4522struct mlx5_ifc_dealloc_encap_header_out_bits {
4523 u8 status[0x8];
4524 u8 reserved_at_8[0x18];
4525
4526 u8 syndrome[0x20];
4527
4528 u8 reserved_at_40[0x40];
4529};
4530
4531struct mlx5_ifc_dealloc_encap_header_in_bits {
4532 u8 opcode[0x10];
4533 u8 reserved_at_10[0x10];
4534
4535 u8 reserved_20[0x10];
4536 u8 op_mod[0x10];
4537
4538 u8 encap_id[0x20];
4539
4540 u8 reserved_60[0x20];
4541};
4542
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004543struct mlx5_ifc_set_action_in_bits {
4544 u8 action_type[0x4];
4545 u8 field[0xc];
4546 u8 reserved_at_10[0x3];
4547 u8 offset[0x5];
4548 u8 reserved_at_18[0x3];
4549 u8 length[0x5];
4550
4551 u8 data[0x20];
4552};
4553
4554struct mlx5_ifc_add_action_in_bits {
4555 u8 action_type[0x4];
4556 u8 field[0xc];
4557 u8 reserved_at_10[0x10];
4558
4559 u8 data[0x20];
4560};
4561
4562union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4563 struct mlx5_ifc_set_action_in_bits set_action_in;
4564 struct mlx5_ifc_add_action_in_bits add_action_in;
4565 u8 reserved_at_0[0x40];
4566};
4567
4568enum {
4569 MLX5_ACTION_TYPE_SET = 0x1,
4570 MLX5_ACTION_TYPE_ADD = 0x2,
4571};
4572
4573enum {
4574 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4575 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4576 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4577 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4578 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4579 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4580 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4581 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4582 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4583 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4584 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4585 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4586 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4587 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4588 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4589 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4590 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4591 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4592 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4593 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4594 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4595 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
4596};
4597
4598struct mlx5_ifc_alloc_modify_header_context_out_bits {
4599 u8 status[0x8];
4600 u8 reserved_at_8[0x18];
4601
4602 u8 syndrome[0x20];
4603
4604 u8 modify_header_id[0x20];
4605
4606 u8 reserved_at_60[0x20];
4607};
4608
4609struct mlx5_ifc_alloc_modify_header_context_in_bits {
4610 u8 opcode[0x10];
4611 u8 reserved_at_10[0x10];
4612
4613 u8 reserved_at_20[0x10];
4614 u8 op_mod[0x10];
4615
4616 u8 reserved_at_40[0x20];
4617
4618 u8 table_type[0x8];
4619 u8 reserved_at_68[0x10];
4620 u8 num_of_actions[0x8];
4621
4622 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4623};
4624
4625struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4626 u8 status[0x8];
4627 u8 reserved_at_8[0x18];
4628
4629 u8 syndrome[0x20];
4630
4631 u8 reserved_at_40[0x40];
4632};
4633
4634struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4635 u8 opcode[0x10];
4636 u8 reserved_at_10[0x10];
4637
4638 u8 reserved_at_20[0x10];
4639 u8 op_mod[0x10];
4640
4641 u8 modify_header_id[0x20];
4642
4643 u8 reserved_at_60[0x20];
4644};
4645
Saeed Mahameede2816822015-05-28 22:28:40 +03004646struct mlx5_ifc_query_dct_out_bits {
4647 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004648 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004649
4650 u8 syndrome[0x20];
4651
Matan Barakb4ff3a32016-02-09 14:57:42 +02004652 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004653
4654 struct mlx5_ifc_dctc_bits dct_context_entry;
4655
Matan Barakb4ff3a32016-02-09 14:57:42 +02004656 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004657};
4658
4659struct mlx5_ifc_query_dct_in_bits {
4660 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004661 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004662
Matan Barakb4ff3a32016-02-09 14:57:42 +02004663 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004664 u8 op_mod[0x10];
4665
Matan Barakb4ff3a32016-02-09 14:57:42 +02004666 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004667 u8 dctn[0x18];
4668
Matan Barakb4ff3a32016-02-09 14:57:42 +02004669 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004670};
4671
4672struct mlx5_ifc_query_cq_out_bits {
4673 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004674 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004675
4676 u8 syndrome[0x20];
4677
Matan Barakb4ff3a32016-02-09 14:57:42 +02004678 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004679
4680 struct mlx5_ifc_cqc_bits cq_context;
4681
Matan Barakb4ff3a32016-02-09 14:57:42 +02004682 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004683
4684 u8 pas[0][0x40];
4685};
4686
4687struct mlx5_ifc_query_cq_in_bits {
4688 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004689 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004690
Matan Barakb4ff3a32016-02-09 14:57:42 +02004691 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004692 u8 op_mod[0x10];
4693
Matan Barakb4ff3a32016-02-09 14:57:42 +02004694 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004695 u8 cqn[0x18];
4696
Matan Barakb4ff3a32016-02-09 14:57:42 +02004697 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004698};
4699
4700struct mlx5_ifc_query_cong_status_out_bits {
4701 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004702 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004703
4704 u8 syndrome[0x20];
4705
Matan Barakb4ff3a32016-02-09 14:57:42 +02004706 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004707
4708 u8 enable[0x1];
4709 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004710 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004711};
4712
4713struct mlx5_ifc_query_cong_status_in_bits {
4714 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004715 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004716
Matan Barakb4ff3a32016-02-09 14:57:42 +02004717 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004718 u8 op_mod[0x10];
4719
Matan Barakb4ff3a32016-02-09 14:57:42 +02004720 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004721 u8 priority[0x4];
4722 u8 cong_protocol[0x4];
4723
Matan Barakb4ff3a32016-02-09 14:57:42 +02004724 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004725};
4726
4727struct mlx5_ifc_query_cong_statistics_out_bits {
4728 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004729 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004730
4731 u8 syndrome[0x20];
4732
Matan Barakb4ff3a32016-02-09 14:57:42 +02004733 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004734
4735 u8 cur_flows[0x20];
4736
4737 u8 sum_flows[0x20];
4738
4739 u8 cnp_ignored_high[0x20];
4740
4741 u8 cnp_ignored_low[0x20];
4742
4743 u8 cnp_handled_high[0x20];
4744
4745 u8 cnp_handled_low[0x20];
4746
Matan Barakb4ff3a32016-02-09 14:57:42 +02004747 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004748
4749 u8 time_stamp_high[0x20];
4750
4751 u8 time_stamp_low[0x20];
4752
4753 u8 accumulators_period[0x20];
4754
4755 u8 ecn_marked_roce_packets_high[0x20];
4756
4757 u8 ecn_marked_roce_packets_low[0x20];
4758
4759 u8 cnps_sent_high[0x20];
4760
4761 u8 cnps_sent_low[0x20];
4762
Matan Barakb4ff3a32016-02-09 14:57:42 +02004763 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004764};
4765
4766struct mlx5_ifc_query_cong_statistics_in_bits {
4767 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004768 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004769
Matan Barakb4ff3a32016-02-09 14:57:42 +02004770 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004771 u8 op_mod[0x10];
4772
4773 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004774 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004775
Matan Barakb4ff3a32016-02-09 14:57:42 +02004776 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004777};
4778
4779struct mlx5_ifc_query_cong_params_out_bits {
4780 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004781 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004782
4783 u8 syndrome[0x20];
4784
Matan Barakb4ff3a32016-02-09 14:57:42 +02004785 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004786
4787 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4788};
4789
4790struct mlx5_ifc_query_cong_params_in_bits {
4791 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004792 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004793
Matan Barakb4ff3a32016-02-09 14:57:42 +02004794 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004795 u8 op_mod[0x10];
4796
Matan Barakb4ff3a32016-02-09 14:57:42 +02004797 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004798 u8 cong_protocol[0x4];
4799
Matan Barakb4ff3a32016-02-09 14:57:42 +02004800 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004801};
4802
4803struct mlx5_ifc_query_adapter_out_bits {
4804 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004805 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004806
4807 u8 syndrome[0x20];
4808
Matan Barakb4ff3a32016-02-09 14:57:42 +02004809 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004810
4811 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4812};
4813
4814struct mlx5_ifc_query_adapter_in_bits {
4815 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004816 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004817
Matan Barakb4ff3a32016-02-09 14:57:42 +02004818 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004819 u8 op_mod[0x10];
4820
Matan Barakb4ff3a32016-02-09 14:57:42 +02004821 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004822};
4823
4824struct mlx5_ifc_qp_2rst_out_bits {
4825 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004826 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004827
4828 u8 syndrome[0x20];
4829
Matan Barakb4ff3a32016-02-09 14:57:42 +02004830 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004831};
4832
4833struct mlx5_ifc_qp_2rst_in_bits {
4834 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004835 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004836
Matan Barakb4ff3a32016-02-09 14:57:42 +02004837 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004838 u8 op_mod[0x10];
4839
Matan Barakb4ff3a32016-02-09 14:57:42 +02004840 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004841 u8 qpn[0x18];
4842
Matan Barakb4ff3a32016-02-09 14:57:42 +02004843 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004844};
4845
4846struct mlx5_ifc_qp_2err_out_bits {
4847 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004848 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004849
4850 u8 syndrome[0x20];
4851
Matan Barakb4ff3a32016-02-09 14:57:42 +02004852 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004853};
4854
4855struct mlx5_ifc_qp_2err_in_bits {
4856 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004857 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004858
Matan Barakb4ff3a32016-02-09 14:57:42 +02004859 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004860 u8 op_mod[0x10];
4861
Matan Barakb4ff3a32016-02-09 14:57:42 +02004862 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004863 u8 qpn[0x18];
4864
Matan Barakb4ff3a32016-02-09 14:57:42 +02004865 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004866};
4867
4868struct mlx5_ifc_page_fault_resume_out_bits {
4869 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004870 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004871
4872 u8 syndrome[0x20];
4873
Matan Barakb4ff3a32016-02-09 14:57:42 +02004874 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004875};
4876
4877struct mlx5_ifc_page_fault_resume_in_bits {
4878 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004879 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004880
Matan Barakb4ff3a32016-02-09 14:57:42 +02004881 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004882 u8 op_mod[0x10];
4883
4884 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004885 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004886 u8 page_fault_type[0x3];
4887 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004888
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004889 u8 reserved_at_60[0x8];
4890 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004891};
4892
4893struct mlx5_ifc_nop_out_bits {
4894 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004895 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004896
4897 u8 syndrome[0x20];
4898
Matan Barakb4ff3a32016-02-09 14:57:42 +02004899 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004900};
4901
4902struct mlx5_ifc_nop_in_bits {
4903 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004904 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004905
Matan Barakb4ff3a32016-02-09 14:57:42 +02004906 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004907 u8 op_mod[0x10];
4908
Matan Barakb4ff3a32016-02-09 14:57:42 +02004909 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004910};
4911
4912struct mlx5_ifc_modify_vport_state_out_bits {
4913 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004914 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004915
4916 u8 syndrome[0x20];
4917
Matan Barakb4ff3a32016-02-09 14:57:42 +02004918 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004919};
4920
4921struct mlx5_ifc_modify_vport_state_in_bits {
4922 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004923 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004924
Matan Barakb4ff3a32016-02-09 14:57:42 +02004925 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004926 u8 op_mod[0x10];
4927
4928 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004929 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004930 u8 vport_number[0x10];
4931
Matan Barakb4ff3a32016-02-09 14:57:42 +02004932 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004933 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004934 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004935};
4936
4937struct mlx5_ifc_modify_tis_out_bits {
4938 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004939 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004940
4941 u8 syndrome[0x20];
4942
Matan Barakb4ff3a32016-02-09 14:57:42 +02004943 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004944};
4945
majd@mellanox.com75850d02016-01-14 19:13:06 +02004946struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004947 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004948
Aviv Heller84df61e2016-05-10 13:47:50 +03004949 u8 reserved_at_20[0x1d];
4950 u8 lag_tx_port_affinity[0x1];
4951 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004952 u8 prio[0x1];
4953};
4954
Saeed Mahameede2816822015-05-28 22:28:40 +03004955struct mlx5_ifc_modify_tis_in_bits {
4956 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004957 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004958
Matan Barakb4ff3a32016-02-09 14:57:42 +02004959 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004960 u8 op_mod[0x10];
4961
Matan Barakb4ff3a32016-02-09 14:57:42 +02004962 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004963 u8 tisn[0x18];
4964
Matan Barakb4ff3a32016-02-09 14:57:42 +02004965 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004966
majd@mellanox.com75850d02016-01-14 19:13:06 +02004967 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03004968
Matan Barakb4ff3a32016-02-09 14:57:42 +02004969 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004970
4971 struct mlx5_ifc_tisc_bits ctx;
4972};
4973
Achiad Shochatd9eea402015-08-04 14:05:42 +03004974struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004975 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03004976
Matan Barakb4ff3a32016-02-09 14:57:42 +02004977 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02004978 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02004979 u8 reserved_at_3c[0x1];
4980 u8 hash[0x1];
4981 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03004982 u8 lro[0x1];
4983};
4984
Saeed Mahameede2816822015-05-28 22:28:40 +03004985struct mlx5_ifc_modify_tir_out_bits {
4986 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004987 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004988
4989 u8 syndrome[0x20];
4990
Matan Barakb4ff3a32016-02-09 14:57:42 +02004991 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004992};
4993
4994struct mlx5_ifc_modify_tir_in_bits {
4995 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004996 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004997
Matan Barakb4ff3a32016-02-09 14:57:42 +02004998 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004999 u8 op_mod[0x10];
5000
Matan Barakb4ff3a32016-02-09 14:57:42 +02005001 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005002 u8 tirn[0x18];
5003
Matan Barakb4ff3a32016-02-09 14:57:42 +02005004 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005005
Achiad Shochatd9eea402015-08-04 14:05:42 +03005006 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005007
Matan Barakb4ff3a32016-02-09 14:57:42 +02005008 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005009
5010 struct mlx5_ifc_tirc_bits ctx;
5011};
5012
5013struct mlx5_ifc_modify_sq_out_bits {
5014 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005015 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005016
5017 u8 syndrome[0x20];
5018
Matan Barakb4ff3a32016-02-09 14:57:42 +02005019 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005020};
5021
5022struct mlx5_ifc_modify_sq_in_bits {
5023 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005024 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005025
Matan Barakb4ff3a32016-02-09 14:57:42 +02005026 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005027 u8 op_mod[0x10];
5028
5029 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005030 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005031 u8 sqn[0x18];
5032
Matan Barakb4ff3a32016-02-09 14:57:42 +02005033 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005034
5035 u8 modify_bitmask[0x40];
5036
Matan Barakb4ff3a32016-02-09 14:57:42 +02005037 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005038
5039 struct mlx5_ifc_sqc_bits ctx;
5040};
5041
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005042struct mlx5_ifc_modify_scheduling_element_out_bits {
5043 u8 status[0x8];
5044 u8 reserved_at_8[0x18];
5045
5046 u8 syndrome[0x20];
5047
5048 u8 reserved_at_40[0x1c0];
5049};
5050
5051enum {
5052 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5053 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5054};
5055
5056struct mlx5_ifc_modify_scheduling_element_in_bits {
5057 u8 opcode[0x10];
5058 u8 reserved_at_10[0x10];
5059
5060 u8 reserved_at_20[0x10];
5061 u8 op_mod[0x10];
5062
5063 u8 scheduling_hierarchy[0x8];
5064 u8 reserved_at_48[0x18];
5065
5066 u8 scheduling_element_id[0x20];
5067
5068 u8 reserved_at_80[0x20];
5069
5070 u8 modify_bitmask[0x20];
5071
5072 u8 reserved_at_c0[0x40];
5073
5074 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5075
5076 u8 reserved_at_300[0x100];
5077};
5078
Saeed Mahameede2816822015-05-28 22:28:40 +03005079struct mlx5_ifc_modify_rqt_out_bits {
5080 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005081 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005082
5083 u8 syndrome[0x20];
5084
Matan Barakb4ff3a32016-02-09 14:57:42 +02005085 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005086};
5087
Achiad Shochat5c503682015-08-04 14:05:43 +03005088struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005089 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005090
Matan Barakb4ff3a32016-02-09 14:57:42 +02005091 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005092 u8 rqn_list[0x1];
5093};
5094
Saeed Mahameede2816822015-05-28 22:28:40 +03005095struct mlx5_ifc_modify_rqt_in_bits {
5096 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005097 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005098
Matan Barakb4ff3a32016-02-09 14:57:42 +02005099 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005100 u8 op_mod[0x10];
5101
Matan Barakb4ff3a32016-02-09 14:57:42 +02005102 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005103 u8 rqtn[0x18];
5104
Matan Barakb4ff3a32016-02-09 14:57:42 +02005105 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005106
Achiad Shochat5c503682015-08-04 14:05:43 +03005107 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005108
Matan Barakb4ff3a32016-02-09 14:57:42 +02005109 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005110
5111 struct mlx5_ifc_rqtc_bits ctx;
5112};
5113
5114struct mlx5_ifc_modify_rq_out_bits {
5115 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005116 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005117
5118 u8 syndrome[0x20];
5119
Matan Barakb4ff3a32016-02-09 14:57:42 +02005120 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005121};
5122
Alex Vesker83b502a2016-08-04 17:32:02 +03005123enum {
5124 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005125 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005126};
5127
Saeed Mahameede2816822015-05-28 22:28:40 +03005128struct mlx5_ifc_modify_rq_in_bits {
5129 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005130 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005131
Matan Barakb4ff3a32016-02-09 14:57:42 +02005132 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005133 u8 op_mod[0x10];
5134
5135 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005136 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005137 u8 rqn[0x18];
5138
Matan Barakb4ff3a32016-02-09 14:57:42 +02005139 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005140
5141 u8 modify_bitmask[0x40];
5142
Matan Barakb4ff3a32016-02-09 14:57:42 +02005143 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005144
5145 struct mlx5_ifc_rqc_bits ctx;
5146};
5147
5148struct mlx5_ifc_modify_rmp_out_bits {
5149 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005150 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005151
5152 u8 syndrome[0x20];
5153
Matan Barakb4ff3a32016-02-09 14:57:42 +02005154 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005155};
5156
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005157struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005158 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005159
Matan Barakb4ff3a32016-02-09 14:57:42 +02005160 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005161 u8 lwm[0x1];
5162};
5163
Saeed Mahameede2816822015-05-28 22:28:40 +03005164struct mlx5_ifc_modify_rmp_in_bits {
5165 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005166 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005167
Matan Barakb4ff3a32016-02-09 14:57:42 +02005168 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005169 u8 op_mod[0x10];
5170
5171 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005172 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005173 u8 rmpn[0x18];
5174
Matan Barakb4ff3a32016-02-09 14:57:42 +02005175 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005176
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005177 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005178
Matan Barakb4ff3a32016-02-09 14:57:42 +02005179 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005180
5181 struct mlx5_ifc_rmpc_bits ctx;
5182};
5183
5184struct mlx5_ifc_modify_nic_vport_context_out_bits {
5185 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005186 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005187
5188 u8 syndrome[0x20];
5189
Matan Barakb4ff3a32016-02-09 14:57:42 +02005190 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005191};
5192
5193struct mlx5_ifc_modify_nic_vport_field_select_bits {
Noa Osherovich23898c72016-06-10 00:07:37 +03005194 u8 reserved_at_0[0x16];
5195 u8 node_guid[0x1];
5196 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005197 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005198 u8 mtu[0x1];
5199 u8 change_event[0x1];
5200 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005201 u8 permanent_address[0x1];
5202 u8 addresses_list[0x1];
5203 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005204 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005205};
5206
5207struct mlx5_ifc_modify_nic_vport_context_in_bits {
5208 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005209 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005210
Matan Barakb4ff3a32016-02-09 14:57:42 +02005211 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005212 u8 op_mod[0x10];
5213
5214 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005215 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005216 u8 vport_number[0x10];
5217
5218 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5219
Matan Barakb4ff3a32016-02-09 14:57:42 +02005220 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005221
5222 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5223};
5224
5225struct mlx5_ifc_modify_hca_vport_context_out_bits {
5226 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005227 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005228
5229 u8 syndrome[0x20];
5230
Matan Barakb4ff3a32016-02-09 14:57:42 +02005231 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005232};
5233
5234struct mlx5_ifc_modify_hca_vport_context_in_bits {
5235 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005236 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005237
Matan Barakb4ff3a32016-02-09 14:57:42 +02005238 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005239 u8 op_mod[0x10];
5240
5241 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005242 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005243 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005244 u8 vport_number[0x10];
5245
Matan Barakb4ff3a32016-02-09 14:57:42 +02005246 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005247
5248 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5249};
5250
5251struct mlx5_ifc_modify_cq_out_bits {
5252 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005253 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005254
5255 u8 syndrome[0x20];
5256
Matan Barakb4ff3a32016-02-09 14:57:42 +02005257 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005258};
5259
5260enum {
5261 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5262 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5263};
5264
5265struct mlx5_ifc_modify_cq_in_bits {
5266 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005267 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005268
Matan Barakb4ff3a32016-02-09 14:57:42 +02005269 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005270 u8 op_mod[0x10];
5271
Matan Barakb4ff3a32016-02-09 14:57:42 +02005272 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005273 u8 cqn[0x18];
5274
5275 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5276
5277 struct mlx5_ifc_cqc_bits cq_context;
5278
Matan Barakb4ff3a32016-02-09 14:57:42 +02005279 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005280
5281 u8 pas[0][0x40];
5282};
5283
5284struct mlx5_ifc_modify_cong_status_out_bits {
5285 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005286 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005287
5288 u8 syndrome[0x20];
5289
Matan Barakb4ff3a32016-02-09 14:57:42 +02005290 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005291};
5292
5293struct mlx5_ifc_modify_cong_status_in_bits {
5294 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005295 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005296
Matan Barakb4ff3a32016-02-09 14:57:42 +02005297 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005298 u8 op_mod[0x10];
5299
Matan Barakb4ff3a32016-02-09 14:57:42 +02005300 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005301 u8 priority[0x4];
5302 u8 cong_protocol[0x4];
5303
5304 u8 enable[0x1];
5305 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005306 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005307};
5308
5309struct mlx5_ifc_modify_cong_params_out_bits {
5310 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005311 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005312
5313 u8 syndrome[0x20];
5314
Matan Barakb4ff3a32016-02-09 14:57:42 +02005315 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005316};
5317
5318struct mlx5_ifc_modify_cong_params_in_bits {
5319 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005320 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005321
Matan Barakb4ff3a32016-02-09 14:57:42 +02005322 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005323 u8 op_mod[0x10];
5324
Matan Barakb4ff3a32016-02-09 14:57:42 +02005325 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005326 u8 cong_protocol[0x4];
5327
5328 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5329
Matan Barakb4ff3a32016-02-09 14:57:42 +02005330 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005331
5332 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5333};
5334
5335struct mlx5_ifc_manage_pages_out_bits {
5336 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005337 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005338
5339 u8 syndrome[0x20];
5340
5341 u8 output_num_entries[0x20];
5342
Matan Barakb4ff3a32016-02-09 14:57:42 +02005343 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005344
5345 u8 pas[0][0x40];
5346};
5347
5348enum {
5349 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5350 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5351 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5352};
5353
5354struct mlx5_ifc_manage_pages_in_bits {
5355 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005356 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005357
Matan Barakb4ff3a32016-02-09 14:57:42 +02005358 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005359 u8 op_mod[0x10];
5360
Matan Barakb4ff3a32016-02-09 14:57:42 +02005361 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005362 u8 function_id[0x10];
5363
5364 u8 input_num_entries[0x20];
5365
5366 u8 pas[0][0x40];
5367};
5368
5369struct mlx5_ifc_mad_ifc_out_bits {
5370 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005371 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005372
5373 u8 syndrome[0x20];
5374
Matan Barakb4ff3a32016-02-09 14:57:42 +02005375 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005376
5377 u8 response_mad_packet[256][0x8];
5378};
5379
5380struct mlx5_ifc_mad_ifc_in_bits {
5381 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005382 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005383
Matan Barakb4ff3a32016-02-09 14:57:42 +02005384 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005385 u8 op_mod[0x10];
5386
5387 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005388 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005389 u8 port[0x8];
5390
Matan Barakb4ff3a32016-02-09 14:57:42 +02005391 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005392
5393 u8 mad[256][0x8];
5394};
5395
5396struct mlx5_ifc_init_hca_out_bits {
5397 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005398 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005399
5400 u8 syndrome[0x20];
5401
Matan Barakb4ff3a32016-02-09 14:57:42 +02005402 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005403};
5404
5405struct mlx5_ifc_init_hca_in_bits {
5406 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005407 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005408
Matan Barakb4ff3a32016-02-09 14:57:42 +02005409 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005410 u8 op_mod[0x10];
5411
Matan Barakb4ff3a32016-02-09 14:57:42 +02005412 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005413};
5414
5415struct mlx5_ifc_init2rtr_qp_out_bits {
5416 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005417 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005418
5419 u8 syndrome[0x20];
5420
Matan Barakb4ff3a32016-02-09 14:57:42 +02005421 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005422};
5423
5424struct mlx5_ifc_init2rtr_qp_in_bits {
5425 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005426 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005427
Matan Barakb4ff3a32016-02-09 14:57:42 +02005428 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005429 u8 op_mod[0x10];
5430
Matan Barakb4ff3a32016-02-09 14:57:42 +02005431 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005432 u8 qpn[0x18];
5433
Matan Barakb4ff3a32016-02-09 14:57:42 +02005434 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005435
5436 u8 opt_param_mask[0x20];
5437
Matan Barakb4ff3a32016-02-09 14:57:42 +02005438 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005439
5440 struct mlx5_ifc_qpc_bits qpc;
5441
Matan Barakb4ff3a32016-02-09 14:57:42 +02005442 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005443};
5444
5445struct mlx5_ifc_init2init_qp_out_bits {
5446 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005447 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005448
5449 u8 syndrome[0x20];
5450
Matan Barakb4ff3a32016-02-09 14:57:42 +02005451 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005452};
5453
5454struct mlx5_ifc_init2init_qp_in_bits {
5455 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005456 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005457
Matan Barakb4ff3a32016-02-09 14:57:42 +02005458 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005459 u8 op_mod[0x10];
5460
Matan Barakb4ff3a32016-02-09 14:57:42 +02005461 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005462 u8 qpn[0x18];
5463
Matan Barakb4ff3a32016-02-09 14:57:42 +02005464 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005465
5466 u8 opt_param_mask[0x20];
5467
Matan Barakb4ff3a32016-02-09 14:57:42 +02005468 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005469
5470 struct mlx5_ifc_qpc_bits qpc;
5471
Matan Barakb4ff3a32016-02-09 14:57:42 +02005472 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005473};
5474
5475struct mlx5_ifc_get_dropped_packet_log_out_bits {
5476 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005477 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005478
5479 u8 syndrome[0x20];
5480
Matan Barakb4ff3a32016-02-09 14:57:42 +02005481 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005482
5483 u8 packet_headers_log[128][0x8];
5484
5485 u8 packet_syndrome[64][0x8];
5486};
5487
5488struct mlx5_ifc_get_dropped_packet_log_in_bits {
5489 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005490 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005491
Matan Barakb4ff3a32016-02-09 14:57:42 +02005492 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005493 u8 op_mod[0x10];
5494
Matan Barakb4ff3a32016-02-09 14:57:42 +02005495 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005496};
5497
5498struct mlx5_ifc_gen_eqe_in_bits {
5499 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005500 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005501
Matan Barakb4ff3a32016-02-09 14:57:42 +02005502 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005503 u8 op_mod[0x10];
5504
Matan Barakb4ff3a32016-02-09 14:57:42 +02005505 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005506 u8 eq_number[0x8];
5507
Matan Barakb4ff3a32016-02-09 14:57:42 +02005508 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005509
5510 u8 eqe[64][0x8];
5511};
5512
5513struct mlx5_ifc_gen_eq_out_bits {
5514 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005515 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005516
5517 u8 syndrome[0x20];
5518
Matan Barakb4ff3a32016-02-09 14:57:42 +02005519 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005520};
5521
5522struct mlx5_ifc_enable_hca_out_bits {
5523 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005524 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005525
5526 u8 syndrome[0x20];
5527
Matan Barakb4ff3a32016-02-09 14:57:42 +02005528 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005529};
5530
5531struct mlx5_ifc_enable_hca_in_bits {
5532 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005533 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005534
Matan Barakb4ff3a32016-02-09 14:57:42 +02005535 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005536 u8 op_mod[0x10];
5537
Matan Barakb4ff3a32016-02-09 14:57:42 +02005538 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005539 u8 function_id[0x10];
5540
Matan Barakb4ff3a32016-02-09 14:57:42 +02005541 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005542};
5543
5544struct mlx5_ifc_drain_dct_out_bits {
5545 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005546 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005547
5548 u8 syndrome[0x20];
5549
Matan Barakb4ff3a32016-02-09 14:57:42 +02005550 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005551};
5552
5553struct mlx5_ifc_drain_dct_in_bits {
5554 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005555 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005556
Matan Barakb4ff3a32016-02-09 14:57:42 +02005557 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005558 u8 op_mod[0x10];
5559
Matan Barakb4ff3a32016-02-09 14:57:42 +02005560 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005561 u8 dctn[0x18];
5562
Matan Barakb4ff3a32016-02-09 14:57:42 +02005563 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005564};
5565
5566struct mlx5_ifc_disable_hca_out_bits {
5567 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005568 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005569
5570 u8 syndrome[0x20];
5571
Matan Barakb4ff3a32016-02-09 14:57:42 +02005572 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005573};
5574
5575struct mlx5_ifc_disable_hca_in_bits {
5576 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005577 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005578
Matan Barakb4ff3a32016-02-09 14:57:42 +02005579 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005580 u8 op_mod[0x10];
5581
Matan Barakb4ff3a32016-02-09 14:57:42 +02005582 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005583 u8 function_id[0x10];
5584
Matan Barakb4ff3a32016-02-09 14:57:42 +02005585 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005586};
5587
5588struct mlx5_ifc_detach_from_mcg_out_bits {
5589 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005590 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005591
5592 u8 syndrome[0x20];
5593
Matan Barakb4ff3a32016-02-09 14:57:42 +02005594 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005595};
5596
5597struct mlx5_ifc_detach_from_mcg_in_bits {
5598 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005599 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005600
Matan Barakb4ff3a32016-02-09 14:57:42 +02005601 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005602 u8 op_mod[0x10];
5603
Matan Barakb4ff3a32016-02-09 14:57:42 +02005604 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005605 u8 qpn[0x18];
5606
Matan Barakb4ff3a32016-02-09 14:57:42 +02005607 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005608
5609 u8 multicast_gid[16][0x8];
5610};
5611
Saeed Mahameed74862162016-06-09 15:11:34 +03005612struct mlx5_ifc_destroy_xrq_out_bits {
5613 u8 status[0x8];
5614 u8 reserved_at_8[0x18];
5615
5616 u8 syndrome[0x20];
5617
5618 u8 reserved_at_40[0x40];
5619};
5620
5621struct mlx5_ifc_destroy_xrq_in_bits {
5622 u8 opcode[0x10];
5623 u8 reserved_at_10[0x10];
5624
5625 u8 reserved_at_20[0x10];
5626 u8 op_mod[0x10];
5627
5628 u8 reserved_at_40[0x8];
5629 u8 xrqn[0x18];
5630
5631 u8 reserved_at_60[0x20];
5632};
5633
Saeed Mahameede2816822015-05-28 22:28:40 +03005634struct mlx5_ifc_destroy_xrc_srq_out_bits {
5635 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005636 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005637
5638 u8 syndrome[0x20];
5639
Matan Barakb4ff3a32016-02-09 14:57:42 +02005640 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005641};
5642
5643struct mlx5_ifc_destroy_xrc_srq_in_bits {
5644 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005645 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005646
Matan Barakb4ff3a32016-02-09 14:57:42 +02005647 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005648 u8 op_mod[0x10];
5649
Matan Barakb4ff3a32016-02-09 14:57:42 +02005650 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005651 u8 xrc_srqn[0x18];
5652
Matan Barakb4ff3a32016-02-09 14:57:42 +02005653 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005654};
5655
5656struct mlx5_ifc_destroy_tis_out_bits {
5657 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005658 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005659
5660 u8 syndrome[0x20];
5661
Matan Barakb4ff3a32016-02-09 14:57:42 +02005662 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005663};
5664
5665struct mlx5_ifc_destroy_tis_in_bits {
5666 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005667 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005668
Matan Barakb4ff3a32016-02-09 14:57:42 +02005669 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005670 u8 op_mod[0x10];
5671
Matan Barakb4ff3a32016-02-09 14:57:42 +02005672 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005673 u8 tisn[0x18];
5674
Matan Barakb4ff3a32016-02-09 14:57:42 +02005675 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005676};
5677
5678struct mlx5_ifc_destroy_tir_out_bits {
5679 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005680 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005681
5682 u8 syndrome[0x20];
5683
Matan Barakb4ff3a32016-02-09 14:57:42 +02005684 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005685};
5686
5687struct mlx5_ifc_destroy_tir_in_bits {
5688 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005689 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005690
Matan Barakb4ff3a32016-02-09 14:57:42 +02005691 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005692 u8 op_mod[0x10];
5693
Matan Barakb4ff3a32016-02-09 14:57:42 +02005694 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005695 u8 tirn[0x18];
5696
Matan Barakb4ff3a32016-02-09 14:57:42 +02005697 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005698};
5699
5700struct mlx5_ifc_destroy_srq_out_bits {
5701 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005702 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005703
5704 u8 syndrome[0x20];
5705
Matan Barakb4ff3a32016-02-09 14:57:42 +02005706 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005707};
5708
5709struct mlx5_ifc_destroy_srq_in_bits {
5710 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005711 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005712
Matan Barakb4ff3a32016-02-09 14:57:42 +02005713 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005714 u8 op_mod[0x10];
5715
Matan Barakb4ff3a32016-02-09 14:57:42 +02005716 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005717 u8 srqn[0x18];
5718
Matan Barakb4ff3a32016-02-09 14:57:42 +02005719 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005720};
5721
5722struct mlx5_ifc_destroy_sq_out_bits {
5723 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005724 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005725
5726 u8 syndrome[0x20];
5727
Matan Barakb4ff3a32016-02-09 14:57:42 +02005728 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005729};
5730
5731struct mlx5_ifc_destroy_sq_in_bits {
5732 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005733 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005734
Matan Barakb4ff3a32016-02-09 14:57:42 +02005735 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005736 u8 op_mod[0x10];
5737
Matan Barakb4ff3a32016-02-09 14:57:42 +02005738 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005739 u8 sqn[0x18];
5740
Matan Barakb4ff3a32016-02-09 14:57:42 +02005741 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005742};
5743
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005744struct mlx5_ifc_destroy_scheduling_element_out_bits {
5745 u8 status[0x8];
5746 u8 reserved_at_8[0x18];
5747
5748 u8 syndrome[0x20];
5749
5750 u8 reserved_at_40[0x1c0];
5751};
5752
5753struct mlx5_ifc_destroy_scheduling_element_in_bits {
5754 u8 opcode[0x10];
5755 u8 reserved_at_10[0x10];
5756
5757 u8 reserved_at_20[0x10];
5758 u8 op_mod[0x10];
5759
5760 u8 scheduling_hierarchy[0x8];
5761 u8 reserved_at_48[0x18];
5762
5763 u8 scheduling_element_id[0x20];
5764
5765 u8 reserved_at_80[0x180];
5766};
5767
Saeed Mahameede2816822015-05-28 22:28:40 +03005768struct mlx5_ifc_destroy_rqt_out_bits {
5769 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005770 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005771
5772 u8 syndrome[0x20];
5773
Matan Barakb4ff3a32016-02-09 14:57:42 +02005774 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005775};
5776
5777struct mlx5_ifc_destroy_rqt_in_bits {
5778 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005779 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005780
Matan Barakb4ff3a32016-02-09 14:57:42 +02005781 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005782 u8 op_mod[0x10];
5783
Matan Barakb4ff3a32016-02-09 14:57:42 +02005784 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005785 u8 rqtn[0x18];
5786
Matan Barakb4ff3a32016-02-09 14:57:42 +02005787 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005788};
5789
5790struct mlx5_ifc_destroy_rq_out_bits {
5791 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005792 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005793
5794 u8 syndrome[0x20];
5795
Matan Barakb4ff3a32016-02-09 14:57:42 +02005796 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005797};
5798
5799struct mlx5_ifc_destroy_rq_in_bits {
5800 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005801 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005802
Matan Barakb4ff3a32016-02-09 14:57:42 +02005803 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005804 u8 op_mod[0x10];
5805
Matan Barakb4ff3a32016-02-09 14:57:42 +02005806 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005807 u8 rqn[0x18];
5808
Matan Barakb4ff3a32016-02-09 14:57:42 +02005809 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005810};
5811
5812struct mlx5_ifc_destroy_rmp_out_bits {
5813 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005814 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005815
5816 u8 syndrome[0x20];
5817
Matan Barakb4ff3a32016-02-09 14:57:42 +02005818 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005819};
5820
5821struct mlx5_ifc_destroy_rmp_in_bits {
5822 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005823 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005824
Matan Barakb4ff3a32016-02-09 14:57:42 +02005825 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005826 u8 op_mod[0x10];
5827
Matan Barakb4ff3a32016-02-09 14:57:42 +02005828 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005829 u8 rmpn[0x18];
5830
Matan Barakb4ff3a32016-02-09 14:57:42 +02005831 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005832};
5833
5834struct mlx5_ifc_destroy_qp_out_bits {
5835 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005836 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005837
5838 u8 syndrome[0x20];
5839
Matan Barakb4ff3a32016-02-09 14:57:42 +02005840 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005841};
5842
5843struct mlx5_ifc_destroy_qp_in_bits {
5844 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005845 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005846
Matan Barakb4ff3a32016-02-09 14:57:42 +02005847 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005848 u8 op_mod[0x10];
5849
Matan Barakb4ff3a32016-02-09 14:57:42 +02005850 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005851 u8 qpn[0x18];
5852
Matan Barakb4ff3a32016-02-09 14:57:42 +02005853 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005854};
5855
5856struct mlx5_ifc_destroy_psv_out_bits {
5857 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005858 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005859
5860 u8 syndrome[0x20];
5861
Matan Barakb4ff3a32016-02-09 14:57:42 +02005862 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005863};
5864
5865struct mlx5_ifc_destroy_psv_in_bits {
5866 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005867 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005868
Matan Barakb4ff3a32016-02-09 14:57:42 +02005869 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005870 u8 op_mod[0x10];
5871
Matan Barakb4ff3a32016-02-09 14:57:42 +02005872 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005873 u8 psvn[0x18];
5874
Matan Barakb4ff3a32016-02-09 14:57:42 +02005875 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005876};
5877
5878struct mlx5_ifc_destroy_mkey_out_bits {
5879 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005880 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005881
5882 u8 syndrome[0x20];
5883
Matan Barakb4ff3a32016-02-09 14:57:42 +02005884 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005885};
5886
5887struct mlx5_ifc_destroy_mkey_in_bits {
5888 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005889 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005890
Matan Barakb4ff3a32016-02-09 14:57:42 +02005891 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005892 u8 op_mod[0x10];
5893
Matan Barakb4ff3a32016-02-09 14:57:42 +02005894 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005895 u8 mkey_index[0x18];
5896
Matan Barakb4ff3a32016-02-09 14:57:42 +02005897 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005898};
5899
5900struct mlx5_ifc_destroy_flow_table_out_bits {
5901 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005902 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005903
5904 u8 syndrome[0x20];
5905
Matan Barakb4ff3a32016-02-09 14:57:42 +02005906 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005907};
5908
5909struct mlx5_ifc_destroy_flow_table_in_bits {
5910 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005911 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005912
Matan Barakb4ff3a32016-02-09 14:57:42 +02005913 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005914 u8 op_mod[0x10];
5915
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005916 u8 other_vport[0x1];
5917 u8 reserved_at_41[0xf];
5918 u8 vport_number[0x10];
5919
5920 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005921
5922 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005923 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005924
Matan Barakb4ff3a32016-02-09 14:57:42 +02005925 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005926 u8 table_id[0x18];
5927
Matan Barakb4ff3a32016-02-09 14:57:42 +02005928 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03005929};
5930
5931struct mlx5_ifc_destroy_flow_group_out_bits {
5932 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005933 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005934
5935 u8 syndrome[0x20];
5936
Matan Barakb4ff3a32016-02-09 14:57:42 +02005937 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005938};
5939
5940struct mlx5_ifc_destroy_flow_group_in_bits {
5941 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005942 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005943
Matan Barakb4ff3a32016-02-09 14:57:42 +02005944 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005945 u8 op_mod[0x10];
5946
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005947 u8 other_vport[0x1];
5948 u8 reserved_at_41[0xf];
5949 u8 vport_number[0x10];
5950
5951 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005952
5953 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005954 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005955
Matan Barakb4ff3a32016-02-09 14:57:42 +02005956 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005957 u8 table_id[0x18];
5958
5959 u8 group_id[0x20];
5960
Matan Barakb4ff3a32016-02-09 14:57:42 +02005961 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03005962};
5963
5964struct mlx5_ifc_destroy_eq_out_bits {
5965 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005966 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005967
5968 u8 syndrome[0x20];
5969
Matan Barakb4ff3a32016-02-09 14:57:42 +02005970 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005971};
5972
5973struct mlx5_ifc_destroy_eq_in_bits {
5974 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005975 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005976
Matan Barakb4ff3a32016-02-09 14:57:42 +02005977 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005978 u8 op_mod[0x10];
5979
Matan Barakb4ff3a32016-02-09 14:57:42 +02005980 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005981 u8 eq_number[0x8];
5982
Matan Barakb4ff3a32016-02-09 14:57:42 +02005983 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005984};
5985
5986struct mlx5_ifc_destroy_dct_out_bits {
5987 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005988 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005989
5990 u8 syndrome[0x20];
5991
Matan Barakb4ff3a32016-02-09 14:57:42 +02005992 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005993};
5994
5995struct mlx5_ifc_destroy_dct_in_bits {
5996 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005997 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005998
Matan Barakb4ff3a32016-02-09 14:57:42 +02005999 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006000 u8 op_mod[0x10];
6001
Matan Barakb4ff3a32016-02-09 14:57:42 +02006002 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006003 u8 dctn[0x18];
6004
Matan Barakb4ff3a32016-02-09 14:57:42 +02006005 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006006};
6007
6008struct mlx5_ifc_destroy_cq_out_bits {
6009 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006010 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006011
6012 u8 syndrome[0x20];
6013
Matan Barakb4ff3a32016-02-09 14:57:42 +02006014 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006015};
6016
6017struct mlx5_ifc_destroy_cq_in_bits {
6018 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006019 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006020
Matan Barakb4ff3a32016-02-09 14:57:42 +02006021 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006022 u8 op_mod[0x10];
6023
Matan Barakb4ff3a32016-02-09 14:57:42 +02006024 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006025 u8 cqn[0x18];
6026
Matan Barakb4ff3a32016-02-09 14:57:42 +02006027 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006028};
6029
6030struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6031 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006032 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006033
6034 u8 syndrome[0x20];
6035
Matan Barakb4ff3a32016-02-09 14:57:42 +02006036 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006037};
6038
6039struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6040 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006041 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006042
Matan Barakb4ff3a32016-02-09 14:57:42 +02006043 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006044 u8 op_mod[0x10];
6045
Matan Barakb4ff3a32016-02-09 14:57:42 +02006046 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006047
Matan Barakb4ff3a32016-02-09 14:57:42 +02006048 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006049 u8 vxlan_udp_port[0x10];
6050};
6051
6052struct mlx5_ifc_delete_l2_table_entry_out_bits {
6053 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006054 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006055
6056 u8 syndrome[0x20];
6057
Matan Barakb4ff3a32016-02-09 14:57:42 +02006058 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006059};
6060
6061struct mlx5_ifc_delete_l2_table_entry_in_bits {
6062 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006063 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006064
Matan Barakb4ff3a32016-02-09 14:57:42 +02006065 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006066 u8 op_mod[0x10];
6067
Matan Barakb4ff3a32016-02-09 14:57:42 +02006068 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006069
Matan Barakb4ff3a32016-02-09 14:57:42 +02006070 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006071 u8 table_index[0x18];
6072
Matan Barakb4ff3a32016-02-09 14:57:42 +02006073 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006074};
6075
6076struct mlx5_ifc_delete_fte_out_bits {
6077 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006078 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006079
6080 u8 syndrome[0x20];
6081
Matan Barakb4ff3a32016-02-09 14:57:42 +02006082 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006083};
6084
6085struct mlx5_ifc_delete_fte_in_bits {
6086 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006087 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006088
Matan Barakb4ff3a32016-02-09 14:57:42 +02006089 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006090 u8 op_mod[0x10];
6091
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006092 u8 other_vport[0x1];
6093 u8 reserved_at_41[0xf];
6094 u8 vport_number[0x10];
6095
6096 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006097
6098 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006099 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006100
Matan Barakb4ff3a32016-02-09 14:57:42 +02006101 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006102 u8 table_id[0x18];
6103
Matan Barakb4ff3a32016-02-09 14:57:42 +02006104 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006105
6106 u8 flow_index[0x20];
6107
Matan Barakb4ff3a32016-02-09 14:57:42 +02006108 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006109};
6110
6111struct mlx5_ifc_dealloc_xrcd_out_bits {
6112 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006113 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006114
6115 u8 syndrome[0x20];
6116
Matan Barakb4ff3a32016-02-09 14:57:42 +02006117 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006118};
6119
6120struct mlx5_ifc_dealloc_xrcd_in_bits {
6121 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006122 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006123
Matan Barakb4ff3a32016-02-09 14:57:42 +02006124 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006125 u8 op_mod[0x10];
6126
Matan Barakb4ff3a32016-02-09 14:57:42 +02006127 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006128 u8 xrcd[0x18];
6129
Matan Barakb4ff3a32016-02-09 14:57:42 +02006130 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006131};
6132
6133struct mlx5_ifc_dealloc_uar_out_bits {
6134 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006135 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006136
6137 u8 syndrome[0x20];
6138
Matan Barakb4ff3a32016-02-09 14:57:42 +02006139 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006140};
6141
6142struct mlx5_ifc_dealloc_uar_in_bits {
6143 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006144 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006145
Matan Barakb4ff3a32016-02-09 14:57:42 +02006146 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006147 u8 op_mod[0x10];
6148
Matan Barakb4ff3a32016-02-09 14:57:42 +02006149 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006150 u8 uar[0x18];
6151
Matan Barakb4ff3a32016-02-09 14:57:42 +02006152 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006153};
6154
6155struct mlx5_ifc_dealloc_transport_domain_out_bits {
6156 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006157 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006158
6159 u8 syndrome[0x20];
6160
Matan Barakb4ff3a32016-02-09 14:57:42 +02006161 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006162};
6163
6164struct mlx5_ifc_dealloc_transport_domain_in_bits {
6165 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006166 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006167
Matan Barakb4ff3a32016-02-09 14:57:42 +02006168 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006169 u8 op_mod[0x10];
6170
Matan Barakb4ff3a32016-02-09 14:57:42 +02006171 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006172 u8 transport_domain[0x18];
6173
Matan Barakb4ff3a32016-02-09 14:57:42 +02006174 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006175};
6176
6177struct mlx5_ifc_dealloc_q_counter_out_bits {
6178 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006179 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006180
6181 u8 syndrome[0x20];
6182
Matan Barakb4ff3a32016-02-09 14:57:42 +02006183 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006184};
6185
6186struct mlx5_ifc_dealloc_q_counter_in_bits {
6187 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006188 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006189
Matan Barakb4ff3a32016-02-09 14:57:42 +02006190 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006191 u8 op_mod[0x10];
6192
Matan Barakb4ff3a32016-02-09 14:57:42 +02006193 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006194 u8 counter_set_id[0x8];
6195
Matan Barakb4ff3a32016-02-09 14:57:42 +02006196 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006197};
6198
6199struct mlx5_ifc_dealloc_pd_out_bits {
6200 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006201 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006202
6203 u8 syndrome[0x20];
6204
Matan Barakb4ff3a32016-02-09 14:57:42 +02006205 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006206};
6207
6208struct mlx5_ifc_dealloc_pd_in_bits {
6209 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006210 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006211
Matan Barakb4ff3a32016-02-09 14:57:42 +02006212 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006213 u8 op_mod[0x10];
6214
Matan Barakb4ff3a32016-02-09 14:57:42 +02006215 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006216 u8 pd[0x18];
6217
Matan Barakb4ff3a32016-02-09 14:57:42 +02006218 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006219};
6220
Amir Vadai9dc0b282016-05-13 12:55:39 +00006221struct mlx5_ifc_dealloc_flow_counter_out_bits {
6222 u8 status[0x8];
6223 u8 reserved_at_8[0x18];
6224
6225 u8 syndrome[0x20];
6226
6227 u8 reserved_at_40[0x40];
6228};
6229
6230struct mlx5_ifc_dealloc_flow_counter_in_bits {
6231 u8 opcode[0x10];
6232 u8 reserved_at_10[0x10];
6233
6234 u8 reserved_at_20[0x10];
6235 u8 op_mod[0x10];
6236
6237 u8 reserved_at_40[0x10];
6238 u8 flow_counter_id[0x10];
6239
6240 u8 reserved_at_60[0x20];
6241};
6242
Saeed Mahameed74862162016-06-09 15:11:34 +03006243struct mlx5_ifc_create_xrq_out_bits {
6244 u8 status[0x8];
6245 u8 reserved_at_8[0x18];
6246
6247 u8 syndrome[0x20];
6248
6249 u8 reserved_at_40[0x8];
6250 u8 xrqn[0x18];
6251
6252 u8 reserved_at_60[0x20];
6253};
6254
6255struct mlx5_ifc_create_xrq_in_bits {
6256 u8 opcode[0x10];
6257 u8 reserved_at_10[0x10];
6258
6259 u8 reserved_at_20[0x10];
6260 u8 op_mod[0x10];
6261
6262 u8 reserved_at_40[0x40];
6263
6264 struct mlx5_ifc_xrqc_bits xrq_context;
6265};
6266
Saeed Mahameede2816822015-05-28 22:28:40 +03006267struct mlx5_ifc_create_xrc_srq_out_bits {
6268 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006269 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006270
6271 u8 syndrome[0x20];
6272
Matan Barakb4ff3a32016-02-09 14:57:42 +02006273 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006274 u8 xrc_srqn[0x18];
6275
Matan Barakb4ff3a32016-02-09 14:57:42 +02006276 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006277};
6278
6279struct mlx5_ifc_create_xrc_srq_in_bits {
6280 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006281 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006282
Matan Barakb4ff3a32016-02-09 14:57:42 +02006283 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006284 u8 op_mod[0x10];
6285
Matan Barakb4ff3a32016-02-09 14:57:42 +02006286 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006287
6288 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6289
Matan Barakb4ff3a32016-02-09 14:57:42 +02006290 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006291
6292 u8 pas[0][0x40];
6293};
6294
6295struct mlx5_ifc_create_tis_out_bits {
6296 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006297 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006298
6299 u8 syndrome[0x20];
6300
Matan Barakb4ff3a32016-02-09 14:57:42 +02006301 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006302 u8 tisn[0x18];
6303
Matan Barakb4ff3a32016-02-09 14:57:42 +02006304 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006305};
6306
6307struct mlx5_ifc_create_tis_in_bits {
6308 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006309 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006310
Matan Barakb4ff3a32016-02-09 14:57:42 +02006311 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006312 u8 op_mod[0x10];
6313
Matan Barakb4ff3a32016-02-09 14:57:42 +02006314 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006315
6316 struct mlx5_ifc_tisc_bits ctx;
6317};
6318
6319struct mlx5_ifc_create_tir_out_bits {
6320 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006321 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006322
6323 u8 syndrome[0x20];
6324
Matan Barakb4ff3a32016-02-09 14:57:42 +02006325 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006326 u8 tirn[0x18];
6327
Matan Barakb4ff3a32016-02-09 14:57:42 +02006328 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006329};
6330
6331struct mlx5_ifc_create_tir_in_bits {
6332 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006333 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006334
Matan Barakb4ff3a32016-02-09 14:57:42 +02006335 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006336 u8 op_mod[0x10];
6337
Matan Barakb4ff3a32016-02-09 14:57:42 +02006338 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006339
6340 struct mlx5_ifc_tirc_bits ctx;
6341};
6342
6343struct mlx5_ifc_create_srq_out_bits {
6344 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006345 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006346
6347 u8 syndrome[0x20];
6348
Matan Barakb4ff3a32016-02-09 14:57:42 +02006349 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006350 u8 srqn[0x18];
6351
Matan Barakb4ff3a32016-02-09 14:57:42 +02006352 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006353};
6354
6355struct mlx5_ifc_create_srq_in_bits {
6356 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006357 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006358
Matan Barakb4ff3a32016-02-09 14:57:42 +02006359 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006360 u8 op_mod[0x10];
6361
Matan Barakb4ff3a32016-02-09 14:57:42 +02006362 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006363
6364 struct mlx5_ifc_srqc_bits srq_context_entry;
6365
Matan Barakb4ff3a32016-02-09 14:57:42 +02006366 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006367
6368 u8 pas[0][0x40];
6369};
6370
6371struct mlx5_ifc_create_sq_out_bits {
6372 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006373 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006374
6375 u8 syndrome[0x20];
6376
Matan Barakb4ff3a32016-02-09 14:57:42 +02006377 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006378 u8 sqn[0x18];
6379
Matan Barakb4ff3a32016-02-09 14:57:42 +02006380 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006381};
6382
6383struct mlx5_ifc_create_sq_in_bits {
6384 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006385 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006386
Matan Barakb4ff3a32016-02-09 14:57:42 +02006387 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006388 u8 op_mod[0x10];
6389
Matan Barakb4ff3a32016-02-09 14:57:42 +02006390 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006391
6392 struct mlx5_ifc_sqc_bits ctx;
6393};
6394
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006395struct mlx5_ifc_create_scheduling_element_out_bits {
6396 u8 status[0x8];
6397 u8 reserved_at_8[0x18];
6398
6399 u8 syndrome[0x20];
6400
6401 u8 reserved_at_40[0x40];
6402
6403 u8 scheduling_element_id[0x20];
6404
6405 u8 reserved_at_a0[0x160];
6406};
6407
6408struct mlx5_ifc_create_scheduling_element_in_bits {
6409 u8 opcode[0x10];
6410 u8 reserved_at_10[0x10];
6411
6412 u8 reserved_at_20[0x10];
6413 u8 op_mod[0x10];
6414
6415 u8 scheduling_hierarchy[0x8];
6416 u8 reserved_at_48[0x18];
6417
6418 u8 reserved_at_60[0xa0];
6419
6420 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6421
6422 u8 reserved_at_300[0x100];
6423};
6424
Saeed Mahameede2816822015-05-28 22:28:40 +03006425struct mlx5_ifc_create_rqt_out_bits {
6426 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006427 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006428
6429 u8 syndrome[0x20];
6430
Matan Barakb4ff3a32016-02-09 14:57:42 +02006431 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006432 u8 rqtn[0x18];
6433
Matan Barakb4ff3a32016-02-09 14:57:42 +02006434 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006435};
6436
6437struct mlx5_ifc_create_rqt_in_bits {
6438 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006439 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006440
Matan Barakb4ff3a32016-02-09 14:57:42 +02006441 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006442 u8 op_mod[0x10];
6443
Matan Barakb4ff3a32016-02-09 14:57:42 +02006444 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006445
6446 struct mlx5_ifc_rqtc_bits rqt_context;
6447};
6448
6449struct mlx5_ifc_create_rq_out_bits {
6450 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006451 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006452
6453 u8 syndrome[0x20];
6454
Matan Barakb4ff3a32016-02-09 14:57:42 +02006455 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006456 u8 rqn[0x18];
6457
Matan Barakb4ff3a32016-02-09 14:57:42 +02006458 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006459};
6460
6461struct mlx5_ifc_create_rq_in_bits {
6462 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006463 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006464
Matan Barakb4ff3a32016-02-09 14:57:42 +02006465 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006466 u8 op_mod[0x10];
6467
Matan Barakb4ff3a32016-02-09 14:57:42 +02006468 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006469
6470 struct mlx5_ifc_rqc_bits ctx;
6471};
6472
6473struct mlx5_ifc_create_rmp_out_bits {
6474 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006475 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006476
6477 u8 syndrome[0x20];
6478
Matan Barakb4ff3a32016-02-09 14:57:42 +02006479 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006480 u8 rmpn[0x18];
6481
Matan Barakb4ff3a32016-02-09 14:57:42 +02006482 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006483};
6484
6485struct mlx5_ifc_create_rmp_in_bits {
6486 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006487 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006488
Matan Barakb4ff3a32016-02-09 14:57:42 +02006489 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006490 u8 op_mod[0x10];
6491
Matan Barakb4ff3a32016-02-09 14:57:42 +02006492 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006493
6494 struct mlx5_ifc_rmpc_bits ctx;
6495};
6496
6497struct mlx5_ifc_create_qp_out_bits {
6498 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006499 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006500
6501 u8 syndrome[0x20];
6502
Matan Barakb4ff3a32016-02-09 14:57:42 +02006503 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006504 u8 qpn[0x18];
6505
Matan Barakb4ff3a32016-02-09 14:57:42 +02006506 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006507};
6508
6509struct mlx5_ifc_create_qp_in_bits {
6510 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006511 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006512
Matan Barakb4ff3a32016-02-09 14:57:42 +02006513 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006514 u8 op_mod[0x10];
6515
Matan Barakb4ff3a32016-02-09 14:57:42 +02006516 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006517
6518 u8 opt_param_mask[0x20];
6519
Matan Barakb4ff3a32016-02-09 14:57:42 +02006520 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006521
6522 struct mlx5_ifc_qpc_bits qpc;
6523
Matan Barakb4ff3a32016-02-09 14:57:42 +02006524 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006525
6526 u8 pas[0][0x40];
6527};
6528
6529struct mlx5_ifc_create_psv_out_bits {
6530 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006531 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006532
6533 u8 syndrome[0x20];
6534
Matan Barakb4ff3a32016-02-09 14:57:42 +02006535 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006536
Matan Barakb4ff3a32016-02-09 14:57:42 +02006537 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006538 u8 psv0_index[0x18];
6539
Matan Barakb4ff3a32016-02-09 14:57:42 +02006540 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006541 u8 psv1_index[0x18];
6542
Matan Barakb4ff3a32016-02-09 14:57:42 +02006543 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006544 u8 psv2_index[0x18];
6545
Matan Barakb4ff3a32016-02-09 14:57:42 +02006546 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006547 u8 psv3_index[0x18];
6548};
6549
6550struct mlx5_ifc_create_psv_in_bits {
6551 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006552 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006553
Matan Barakb4ff3a32016-02-09 14:57:42 +02006554 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006555 u8 op_mod[0x10];
6556
6557 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006558 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006559 u8 pd[0x18];
6560
Matan Barakb4ff3a32016-02-09 14:57:42 +02006561 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006562};
6563
6564struct mlx5_ifc_create_mkey_out_bits {
6565 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006566 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006567
6568 u8 syndrome[0x20];
6569
Matan Barakb4ff3a32016-02-09 14:57:42 +02006570 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006571 u8 mkey_index[0x18];
6572
Matan Barakb4ff3a32016-02-09 14:57:42 +02006573 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006574};
6575
6576struct mlx5_ifc_create_mkey_in_bits {
6577 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006578 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006579
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581 u8 op_mod[0x10];
6582
Matan Barakb4ff3a32016-02-09 14:57:42 +02006583 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006584
6585 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006586 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006587
6588 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6589
Matan Barakb4ff3a32016-02-09 14:57:42 +02006590 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006591
6592 u8 translations_octword_actual_size[0x20];
6593
Matan Barakb4ff3a32016-02-09 14:57:42 +02006594 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006595
6596 u8 klm_pas_mtt[0][0x20];
6597};
6598
6599struct mlx5_ifc_create_flow_table_out_bits {
6600 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006601 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006602
6603 u8 syndrome[0x20];
6604
Matan Barakb4ff3a32016-02-09 14:57:42 +02006605 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006606 u8 table_id[0x18];
6607
Matan Barakb4ff3a32016-02-09 14:57:42 +02006608 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006609};
6610
6611struct mlx5_ifc_create_flow_table_in_bits {
6612 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006613 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006614
Matan Barakb4ff3a32016-02-09 14:57:42 +02006615 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006616 u8 op_mod[0x10];
6617
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006618 u8 other_vport[0x1];
6619 u8 reserved_at_41[0xf];
6620 u8 vport_number[0x10];
6621
6622 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006623
6624 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006625 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006626
Matan Barakb4ff3a32016-02-09 14:57:42 +02006627 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006628
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03006629 u8 encap_en[0x1];
6630 u8 decap_en[0x1];
6631 u8 reserved_at_c2[0x2];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02006632 u8 table_miss_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006633 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006634 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006635 u8 log_size[0x8];
6636
Matan Barakb4ff3a32016-02-09 14:57:42 +02006637 u8 reserved_at_e0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02006638 u8 table_miss_id[0x18];
6639
Aviv Heller84df61e2016-05-10 13:47:50 +03006640 u8 reserved_at_100[0x8];
6641 u8 lag_master_next_table_id[0x18];
6642
6643 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006644};
6645
6646struct mlx5_ifc_create_flow_group_out_bits {
6647 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006648 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006649
6650 u8 syndrome[0x20];
6651
Matan Barakb4ff3a32016-02-09 14:57:42 +02006652 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006653 u8 group_id[0x18];
6654
Matan Barakb4ff3a32016-02-09 14:57:42 +02006655 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006656};
6657
6658enum {
6659 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6660 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6661 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6662};
6663
6664struct mlx5_ifc_create_flow_group_in_bits {
6665 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006666 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006667
Matan Barakb4ff3a32016-02-09 14:57:42 +02006668 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006669 u8 op_mod[0x10];
6670
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006671 u8 other_vport[0x1];
6672 u8 reserved_at_41[0xf];
6673 u8 vport_number[0x10];
6674
6675 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006676
6677 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006678 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006679
Matan Barakb4ff3a32016-02-09 14:57:42 +02006680 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006681 u8 table_id[0x18];
6682
Matan Barakb4ff3a32016-02-09 14:57:42 +02006683 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006684
6685 u8 start_flow_index[0x20];
6686
Matan Barakb4ff3a32016-02-09 14:57:42 +02006687 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006688
6689 u8 end_flow_index[0x20];
6690
Matan Barakb4ff3a32016-02-09 14:57:42 +02006691 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006692
Matan Barakb4ff3a32016-02-09 14:57:42 +02006693 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006694 u8 match_criteria_enable[0x8];
6695
6696 struct mlx5_ifc_fte_match_param_bits match_criteria;
6697
Matan Barakb4ff3a32016-02-09 14:57:42 +02006698 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006699};
6700
6701struct mlx5_ifc_create_eq_out_bits {
6702 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006703 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006704
6705 u8 syndrome[0x20];
6706
Matan Barakb4ff3a32016-02-09 14:57:42 +02006707 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006708 u8 eq_number[0x8];
6709
Matan Barakb4ff3a32016-02-09 14:57:42 +02006710 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006711};
6712
6713struct mlx5_ifc_create_eq_in_bits {
6714 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006715 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006716
Matan Barakb4ff3a32016-02-09 14:57:42 +02006717 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006718 u8 op_mod[0x10];
6719
Matan Barakb4ff3a32016-02-09 14:57:42 +02006720 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006721
6722 struct mlx5_ifc_eqc_bits eq_context_entry;
6723
Matan Barakb4ff3a32016-02-09 14:57:42 +02006724 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006725
6726 u8 event_bitmask[0x40];
6727
Matan Barakb4ff3a32016-02-09 14:57:42 +02006728 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006729
6730 u8 pas[0][0x40];
6731};
6732
6733struct mlx5_ifc_create_dct_out_bits {
6734 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006735 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006736
6737 u8 syndrome[0x20];
6738
Matan Barakb4ff3a32016-02-09 14:57:42 +02006739 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006740 u8 dctn[0x18];
6741
Matan Barakb4ff3a32016-02-09 14:57:42 +02006742 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006743};
6744
6745struct mlx5_ifc_create_dct_in_bits {
6746 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006747 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006748
Matan Barakb4ff3a32016-02-09 14:57:42 +02006749 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006750 u8 op_mod[0x10];
6751
Matan Barakb4ff3a32016-02-09 14:57:42 +02006752 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006753
6754 struct mlx5_ifc_dctc_bits dct_context_entry;
6755
Matan Barakb4ff3a32016-02-09 14:57:42 +02006756 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006757};
6758
6759struct mlx5_ifc_create_cq_out_bits {
6760 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006761 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006762
6763 u8 syndrome[0x20];
6764
Matan Barakb4ff3a32016-02-09 14:57:42 +02006765 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006766 u8 cqn[0x18];
6767
Matan Barakb4ff3a32016-02-09 14:57:42 +02006768 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006769};
6770
6771struct mlx5_ifc_create_cq_in_bits {
6772 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006773 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006774
Matan Barakb4ff3a32016-02-09 14:57:42 +02006775 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006776 u8 op_mod[0x10];
6777
Matan Barakb4ff3a32016-02-09 14:57:42 +02006778 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006779
6780 struct mlx5_ifc_cqc_bits cq_context;
6781
Matan Barakb4ff3a32016-02-09 14:57:42 +02006782 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006783
6784 u8 pas[0][0x40];
6785};
6786
6787struct mlx5_ifc_config_int_moderation_out_bits {
6788 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006789 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006790
6791 u8 syndrome[0x20];
6792
Matan Barakb4ff3a32016-02-09 14:57:42 +02006793 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006794 u8 min_delay[0xc];
6795 u8 int_vector[0x10];
6796
Matan Barakb4ff3a32016-02-09 14:57:42 +02006797 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006798};
6799
6800enum {
6801 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6802 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6803};
6804
6805struct mlx5_ifc_config_int_moderation_in_bits {
6806 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006807 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006808
Matan Barakb4ff3a32016-02-09 14:57:42 +02006809 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006810 u8 op_mod[0x10];
6811
Matan Barakb4ff3a32016-02-09 14:57:42 +02006812 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006813 u8 min_delay[0xc];
6814 u8 int_vector[0x10];
6815
Matan Barakb4ff3a32016-02-09 14:57:42 +02006816 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006817};
6818
6819struct mlx5_ifc_attach_to_mcg_out_bits {
6820 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006821 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006822
6823 u8 syndrome[0x20];
6824
Matan Barakb4ff3a32016-02-09 14:57:42 +02006825 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006826};
6827
6828struct mlx5_ifc_attach_to_mcg_in_bits {
6829 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006830 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006831
Matan Barakb4ff3a32016-02-09 14:57:42 +02006832 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006833 u8 op_mod[0x10];
6834
Matan Barakb4ff3a32016-02-09 14:57:42 +02006835 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006836 u8 qpn[0x18];
6837
Matan Barakb4ff3a32016-02-09 14:57:42 +02006838 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006839
6840 u8 multicast_gid[16][0x8];
6841};
6842
Saeed Mahameed74862162016-06-09 15:11:34 +03006843struct mlx5_ifc_arm_xrq_out_bits {
6844 u8 status[0x8];
6845 u8 reserved_at_8[0x18];
6846
6847 u8 syndrome[0x20];
6848
6849 u8 reserved_at_40[0x40];
6850};
6851
6852struct mlx5_ifc_arm_xrq_in_bits {
6853 u8 opcode[0x10];
6854 u8 reserved_at_10[0x10];
6855
6856 u8 reserved_at_20[0x10];
6857 u8 op_mod[0x10];
6858
6859 u8 reserved_at_40[0x8];
6860 u8 xrqn[0x18];
6861
6862 u8 reserved_at_60[0x10];
6863 u8 lwm[0x10];
6864};
6865
Saeed Mahameede2816822015-05-28 22:28:40 +03006866struct mlx5_ifc_arm_xrc_srq_out_bits {
6867 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006868 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006869
6870 u8 syndrome[0x20];
6871
Matan Barakb4ff3a32016-02-09 14:57:42 +02006872 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006873};
6874
6875enum {
6876 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
6877};
6878
6879struct mlx5_ifc_arm_xrc_srq_in_bits {
6880 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006881 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006882
Matan Barakb4ff3a32016-02-09 14:57:42 +02006883 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006884 u8 op_mod[0x10];
6885
Matan Barakb4ff3a32016-02-09 14:57:42 +02006886 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006887 u8 xrc_srqn[0x18];
6888
Matan Barakb4ff3a32016-02-09 14:57:42 +02006889 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006890 u8 lwm[0x10];
6891};
6892
6893struct mlx5_ifc_arm_rq_out_bits {
6894 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006895 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006896
6897 u8 syndrome[0x20];
6898
Matan Barakb4ff3a32016-02-09 14:57:42 +02006899 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006900};
6901
6902enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03006903 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
6904 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03006905};
6906
6907struct mlx5_ifc_arm_rq_in_bits {
6908 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006909 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006910
Matan Barakb4ff3a32016-02-09 14:57:42 +02006911 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006912 u8 op_mod[0x10];
6913
Matan Barakb4ff3a32016-02-09 14:57:42 +02006914 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006915 u8 srq_number[0x18];
6916
Matan Barakb4ff3a32016-02-09 14:57:42 +02006917 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006918 u8 lwm[0x10];
6919};
6920
6921struct mlx5_ifc_arm_dct_out_bits {
6922 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006923 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006924
6925 u8 syndrome[0x20];
6926
Matan Barakb4ff3a32016-02-09 14:57:42 +02006927 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006928};
6929
6930struct mlx5_ifc_arm_dct_in_bits {
6931 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006932 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006933
Matan Barakb4ff3a32016-02-09 14:57:42 +02006934 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006935 u8 op_mod[0x10];
6936
Matan Barakb4ff3a32016-02-09 14:57:42 +02006937 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006938 u8 dct_number[0x18];
6939
Matan Barakb4ff3a32016-02-09 14:57:42 +02006940 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006941};
6942
6943struct mlx5_ifc_alloc_xrcd_out_bits {
6944 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006945 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006946
6947 u8 syndrome[0x20];
6948
Matan Barakb4ff3a32016-02-09 14:57:42 +02006949 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006950 u8 xrcd[0x18];
6951
Matan Barakb4ff3a32016-02-09 14:57:42 +02006952 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006953};
6954
6955struct mlx5_ifc_alloc_xrcd_in_bits {
6956 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006957 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006958
Matan Barakb4ff3a32016-02-09 14:57:42 +02006959 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006960 u8 op_mod[0x10];
6961
Matan Barakb4ff3a32016-02-09 14:57:42 +02006962 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006963};
6964
6965struct mlx5_ifc_alloc_uar_out_bits {
6966 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006967 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006968
6969 u8 syndrome[0x20];
6970
Matan Barakb4ff3a32016-02-09 14:57:42 +02006971 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006972 u8 uar[0x18];
6973
Matan Barakb4ff3a32016-02-09 14:57:42 +02006974 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006975};
6976
6977struct mlx5_ifc_alloc_uar_in_bits {
6978 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006979 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006980
Matan Barakb4ff3a32016-02-09 14:57:42 +02006981 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006982 u8 op_mod[0x10];
6983
Matan Barakb4ff3a32016-02-09 14:57:42 +02006984 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006985};
6986
6987struct mlx5_ifc_alloc_transport_domain_out_bits {
6988 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006989 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006990
6991 u8 syndrome[0x20];
6992
Matan Barakb4ff3a32016-02-09 14:57:42 +02006993 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006994 u8 transport_domain[0x18];
6995
Matan Barakb4ff3a32016-02-09 14:57:42 +02006996 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006997};
6998
6999struct mlx5_ifc_alloc_transport_domain_in_bits {
7000 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007001 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007002
Matan Barakb4ff3a32016-02-09 14:57:42 +02007003 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007004 u8 op_mod[0x10];
7005
Matan Barakb4ff3a32016-02-09 14:57:42 +02007006 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007007};
7008
7009struct mlx5_ifc_alloc_q_counter_out_bits {
7010 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007011 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007012
7013 u8 syndrome[0x20];
7014
Matan Barakb4ff3a32016-02-09 14:57:42 +02007015 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007016 u8 counter_set_id[0x8];
7017
Matan Barakb4ff3a32016-02-09 14:57:42 +02007018 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007019};
7020
7021struct mlx5_ifc_alloc_q_counter_in_bits {
7022 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007023 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007024
Matan Barakb4ff3a32016-02-09 14:57:42 +02007025 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007026 u8 op_mod[0x10];
7027
Matan Barakb4ff3a32016-02-09 14:57:42 +02007028 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007029};
7030
7031struct mlx5_ifc_alloc_pd_out_bits {
7032 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007033 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007034
7035 u8 syndrome[0x20];
7036
Matan Barakb4ff3a32016-02-09 14:57:42 +02007037 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007038 u8 pd[0x18];
7039
Matan Barakb4ff3a32016-02-09 14:57:42 +02007040 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007041};
7042
7043struct mlx5_ifc_alloc_pd_in_bits {
7044 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007045 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007046
Matan Barakb4ff3a32016-02-09 14:57:42 +02007047 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007048 u8 op_mod[0x10];
7049
Matan Barakb4ff3a32016-02-09 14:57:42 +02007050 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007051};
7052
Amir Vadai9dc0b282016-05-13 12:55:39 +00007053struct mlx5_ifc_alloc_flow_counter_out_bits {
7054 u8 status[0x8];
7055 u8 reserved_at_8[0x18];
7056
7057 u8 syndrome[0x20];
7058
7059 u8 reserved_at_40[0x10];
7060 u8 flow_counter_id[0x10];
7061
7062 u8 reserved_at_60[0x20];
7063};
7064
7065struct mlx5_ifc_alloc_flow_counter_in_bits {
7066 u8 opcode[0x10];
7067 u8 reserved_at_10[0x10];
7068
7069 u8 reserved_at_20[0x10];
7070 u8 op_mod[0x10];
7071
7072 u8 reserved_at_40[0x40];
7073};
7074
Saeed Mahameede2816822015-05-28 22:28:40 +03007075struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7076 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007077 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007078
7079 u8 syndrome[0x20];
7080
Matan Barakb4ff3a32016-02-09 14:57:42 +02007081 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007082};
7083
7084struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7085 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007086 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007087
Matan Barakb4ff3a32016-02-09 14:57:42 +02007088 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007089 u8 op_mod[0x10];
7090
Matan Barakb4ff3a32016-02-09 14:57:42 +02007091 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007092
Matan Barakb4ff3a32016-02-09 14:57:42 +02007093 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007094 u8 vxlan_udp_port[0x10];
7095};
7096
Saeed Mahameed74862162016-06-09 15:11:34 +03007097struct mlx5_ifc_set_rate_limit_out_bits {
7098 u8 status[0x8];
7099 u8 reserved_at_8[0x18];
7100
7101 u8 syndrome[0x20];
7102
7103 u8 reserved_at_40[0x40];
7104};
7105
7106struct mlx5_ifc_set_rate_limit_in_bits {
7107 u8 opcode[0x10];
7108 u8 reserved_at_10[0x10];
7109
7110 u8 reserved_at_20[0x10];
7111 u8 op_mod[0x10];
7112
7113 u8 reserved_at_40[0x10];
7114 u8 rate_limit_index[0x10];
7115
7116 u8 reserved_at_60[0x20];
7117
7118 u8 rate_limit[0x20];
7119};
7120
Saeed Mahameede2816822015-05-28 22:28:40 +03007121struct mlx5_ifc_access_register_out_bits {
7122 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007123 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007124
7125 u8 syndrome[0x20];
7126
Matan Barakb4ff3a32016-02-09 14:57:42 +02007127 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007128
7129 u8 register_data[0][0x20];
7130};
7131
7132enum {
7133 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7134 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7135};
7136
7137struct mlx5_ifc_access_register_in_bits {
7138 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007139 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007140
Matan Barakb4ff3a32016-02-09 14:57:42 +02007141 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007142 u8 op_mod[0x10];
7143
Matan Barakb4ff3a32016-02-09 14:57:42 +02007144 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007145 u8 register_id[0x10];
7146
7147 u8 argument[0x20];
7148
7149 u8 register_data[0][0x20];
7150};
7151
7152struct mlx5_ifc_sltp_reg_bits {
7153 u8 status[0x4];
7154 u8 version[0x4];
7155 u8 local_port[0x8];
7156 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007157 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007158 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007159 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007160
Matan Barakb4ff3a32016-02-09 14:57:42 +02007161 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007162
Matan Barakb4ff3a32016-02-09 14:57:42 +02007163 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007164 u8 polarity[0x1];
7165 u8 ob_tap0[0x8];
7166 u8 ob_tap1[0x8];
7167 u8 ob_tap2[0x8];
7168
Matan Barakb4ff3a32016-02-09 14:57:42 +02007169 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007170 u8 ob_preemp_mode[0x4];
7171 u8 ob_reg[0x8];
7172 u8 ob_bias[0x8];
7173
Matan Barakb4ff3a32016-02-09 14:57:42 +02007174 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007175};
7176
7177struct mlx5_ifc_slrg_reg_bits {
7178 u8 status[0x4];
7179 u8 version[0x4];
7180 u8 local_port[0x8];
7181 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007182 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007183 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007184 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007185
7186 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007187 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007188 u8 grade_lane_speed[0x4];
7189
7190 u8 grade_version[0x8];
7191 u8 grade[0x18];
7192
Matan Barakb4ff3a32016-02-09 14:57:42 +02007193 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007194 u8 height_grade_type[0x4];
7195 u8 height_grade[0x18];
7196
7197 u8 height_dz[0x10];
7198 u8 height_dv[0x10];
7199
Matan Barakb4ff3a32016-02-09 14:57:42 +02007200 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007201 u8 height_sigma[0x10];
7202
Matan Barakb4ff3a32016-02-09 14:57:42 +02007203 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007204
Matan Barakb4ff3a32016-02-09 14:57:42 +02007205 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007206 u8 phase_grade_type[0x4];
7207 u8 phase_grade[0x18];
7208
Matan Barakb4ff3a32016-02-09 14:57:42 +02007209 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007210 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007211 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007212 u8 phase_eo_neg[0x8];
7213
7214 u8 ffe_set_tested[0x10];
7215 u8 test_errors_per_lane[0x10];
7216};
7217
7218struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007219 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007220 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007221 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007222
Matan Barakb4ff3a32016-02-09 14:57:42 +02007223 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007224 u8 vl_hw_cap[0x4];
7225
Matan Barakb4ff3a32016-02-09 14:57:42 +02007226 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007227 u8 vl_admin[0x4];
7228
Matan Barakb4ff3a32016-02-09 14:57:42 +02007229 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007230 u8 vl_operational[0x4];
7231};
7232
7233struct mlx5_ifc_pude_reg_bits {
7234 u8 swid[0x8];
7235 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007236 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007237 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007238 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007239 u8 oper_status[0x4];
7240
Matan Barakb4ff3a32016-02-09 14:57:42 +02007241 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007242};
7243
7244struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007245 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007246 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007247 u8 an_disable_cap[0x1];
7248 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007249 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007250 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007251 u8 proto_mask[0x3];
7252
Saeed Mahameed74862162016-06-09 15:11:34 +03007253 u8 an_status[0x4];
7254 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007255
7256 u8 eth_proto_capability[0x20];
7257
7258 u8 ib_link_width_capability[0x10];
7259 u8 ib_proto_capability[0x10];
7260
Matan Barakb4ff3a32016-02-09 14:57:42 +02007261 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007262
7263 u8 eth_proto_admin[0x20];
7264
7265 u8 ib_link_width_admin[0x10];
7266 u8 ib_proto_admin[0x10];
7267
Matan Barakb4ff3a32016-02-09 14:57:42 +02007268 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007269
7270 u8 eth_proto_oper[0x20];
7271
7272 u8 ib_link_width_oper[0x10];
7273 u8 ib_proto_oper[0x10];
7274
Matan Barakb4ff3a32016-02-09 14:57:42 +02007275 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007276
7277 u8 eth_proto_lp_advertise[0x20];
7278
Matan Barakb4ff3a32016-02-09 14:57:42 +02007279 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007280};
7281
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007282struct mlx5_ifc_mlcr_reg_bits {
7283 u8 reserved_at_0[0x8];
7284 u8 local_port[0x8];
7285 u8 reserved_at_10[0x20];
7286
7287 u8 beacon_duration[0x10];
7288 u8 reserved_at_40[0x10];
7289
7290 u8 beacon_remain[0x10];
7291};
7292
Saeed Mahameede2816822015-05-28 22:28:40 +03007293struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007294 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007295
7296 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007297 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007298 u8 repetitions_mode[0x4];
7299 u8 num_of_repetitions[0x8];
7300
7301 u8 grade_version[0x8];
7302 u8 height_grade_type[0x4];
7303 u8 phase_grade_type[0x4];
7304 u8 height_grade_weight[0x8];
7305 u8 phase_grade_weight[0x8];
7306
7307 u8 gisim_measure_bits[0x10];
7308 u8 adaptive_tap_measure_bits[0x10];
7309
7310 u8 ber_bath_high_error_threshold[0x10];
7311 u8 ber_bath_mid_error_threshold[0x10];
7312
7313 u8 ber_bath_low_error_threshold[0x10];
7314 u8 one_ratio_high_threshold[0x10];
7315
7316 u8 one_ratio_high_mid_threshold[0x10];
7317 u8 one_ratio_low_mid_threshold[0x10];
7318
7319 u8 one_ratio_low_threshold[0x10];
7320 u8 ndeo_error_threshold[0x10];
7321
7322 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007323 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007324 u8 mix90_phase_for_voltage_bath[0x8];
7325
7326 u8 mixer_offset_start[0x10];
7327 u8 mixer_offset_end[0x10];
7328
Matan Barakb4ff3a32016-02-09 14:57:42 +02007329 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007330 u8 ber_test_time[0xb];
7331};
7332
7333struct mlx5_ifc_pspa_reg_bits {
7334 u8 swid[0x8];
7335 u8 local_port[0x8];
7336 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007337 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007338
Matan Barakb4ff3a32016-02-09 14:57:42 +02007339 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007340};
7341
7342struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007343 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007344 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007345 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007346 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007347 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007348 u8 mode[0x2];
7349
Matan Barakb4ff3a32016-02-09 14:57:42 +02007350 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007351
Matan Barakb4ff3a32016-02-09 14:57:42 +02007352 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007353 u8 min_threshold[0x10];
7354
Matan Barakb4ff3a32016-02-09 14:57:42 +02007355 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007356 u8 max_threshold[0x10];
7357
Matan Barakb4ff3a32016-02-09 14:57:42 +02007358 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007359 u8 mark_probability_denominator[0x10];
7360
Matan Barakb4ff3a32016-02-09 14:57:42 +02007361 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007362};
7363
7364struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007365 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007366 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007367 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007368
Matan Barakb4ff3a32016-02-09 14:57:42 +02007369 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007370
Matan Barakb4ff3a32016-02-09 14:57:42 +02007371 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007372 u8 wrps_admin[0x4];
7373
Matan Barakb4ff3a32016-02-09 14:57:42 +02007374 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007375 u8 wrps_status[0x4];
7376
Matan Barakb4ff3a32016-02-09 14:57:42 +02007377 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007378 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007379 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007380 u8 down_threshold[0x8];
7381
Matan Barakb4ff3a32016-02-09 14:57:42 +02007382 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007383
Matan Barakb4ff3a32016-02-09 14:57:42 +02007384 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007385 u8 srps_admin[0x4];
7386
Matan Barakb4ff3a32016-02-09 14:57:42 +02007387 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007388 u8 srps_status[0x4];
7389
Matan Barakb4ff3a32016-02-09 14:57:42 +02007390 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007391};
7392
7393struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007394 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007395 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007396 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007397
Matan Barakb4ff3a32016-02-09 14:57:42 +02007398 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007399 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007400 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007401 u8 lb_en[0x8];
7402};
7403
7404struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007405 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007406 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007407 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007408
Matan Barakb4ff3a32016-02-09 14:57:42 +02007409 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007410
7411 u8 port_profile_mode[0x8];
7412 u8 static_port_profile[0x8];
7413 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007414 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007415
7416 u8 retransmission_active[0x8];
7417 u8 fec_mode_active[0x18];
7418
Matan Barakb4ff3a32016-02-09 14:57:42 +02007419 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007420};
7421
7422struct mlx5_ifc_ppcnt_reg_bits {
7423 u8 swid[0x8];
7424 u8 local_port[0x8];
7425 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007426 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007427 u8 grp[0x6];
7428
7429 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007430 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007431 u8 prio_tc[0x3];
7432
7433 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7434};
7435
Gal Pressman8ed1a632016-11-17 13:46:01 +02007436struct mlx5_ifc_mpcnt_reg_bits {
7437 u8 reserved_at_0[0x8];
7438 u8 pcie_index[0x8];
7439 u8 reserved_at_10[0xa];
7440 u8 grp[0x6];
7441
7442 u8 clr[0x1];
7443 u8 reserved_at_21[0x1f];
7444
7445 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7446};
7447
Saeed Mahameede2816822015-05-28 22:28:40 +03007448struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007449 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007450 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007451 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007452 u8 local_port[0x8];
7453 u8 mac_47_32[0x10];
7454
7455 u8 mac_31_0[0x20];
7456
Matan Barakb4ff3a32016-02-09 14:57:42 +02007457 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007458};
7459
7460struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007461 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007462 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007463 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007464
7465 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007466 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007467
7468 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007469 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007470
7471 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007472 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007473};
7474
7475struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007476 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007477 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007478 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007479
Matan Barakb4ff3a32016-02-09 14:57:42 +02007480 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007481 u8 attenuation_5g[0x8];
7482
Matan Barakb4ff3a32016-02-09 14:57:42 +02007483 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007484 u8 attenuation_7g[0x8];
7485
Matan Barakb4ff3a32016-02-09 14:57:42 +02007486 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007487 u8 attenuation_12g[0x8];
7488};
7489
7490struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007491 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007492 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007493 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007494 u8 module_status[0x4];
7495
Matan Barakb4ff3a32016-02-09 14:57:42 +02007496 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007497};
7498
7499struct mlx5_ifc_pmpc_reg_bits {
7500 u8 module_state_updated[32][0x8];
7501};
7502
7503struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007504 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007505 u8 mlpn_status[0x4];
7506 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007507 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007508
7509 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007510 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007511};
7512
7513struct mlx5_ifc_pmlp_reg_bits {
7514 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007515 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007516 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007517 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007518 u8 width[0x8];
7519
7520 u8 lane0_module_mapping[0x20];
7521
7522 u8 lane1_module_mapping[0x20];
7523
7524 u8 lane2_module_mapping[0x20];
7525
7526 u8 lane3_module_mapping[0x20];
7527
Matan Barakb4ff3a32016-02-09 14:57:42 +02007528 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007529};
7530
7531struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007532 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007533 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007534 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007535 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007536 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007537 u8 oper_status[0x4];
7538
7539 u8 ase[0x1];
7540 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007541 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007542 u8 e[0x2];
7543
Matan Barakb4ff3a32016-02-09 14:57:42 +02007544 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007545};
7546
7547struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007548 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007549 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007550 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007551 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007552 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007553
Matan Barakb4ff3a32016-02-09 14:57:42 +02007554 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007555 u8 lane_speed[0x10];
7556
Matan Barakb4ff3a32016-02-09 14:57:42 +02007557 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007558 u8 lpbf[0x1];
7559 u8 fec_mode_policy[0x8];
7560
7561 u8 retransmission_capability[0x8];
7562 u8 fec_mode_capability[0x18];
7563
7564 u8 retransmission_support_admin[0x8];
7565 u8 fec_mode_support_admin[0x18];
7566
7567 u8 retransmission_request_admin[0x8];
7568 u8 fec_mode_request_admin[0x18];
7569
Matan Barakb4ff3a32016-02-09 14:57:42 +02007570 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007571};
7572
7573struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007574 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007575 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007576 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007577 u8 ib_port[0x8];
7578
Matan Barakb4ff3a32016-02-09 14:57:42 +02007579 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007580};
7581
7582struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007583 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007584 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007585 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007586 u8 lbf_mode[0x3];
7587
Matan Barakb4ff3a32016-02-09 14:57:42 +02007588 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007589};
7590
7591struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007592 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007593 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007594 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007595
7596 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007597 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007598 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007599 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007600};
7601
7602struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007603 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007604 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007605 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007606
Matan Barakb4ff3a32016-02-09 14:57:42 +02007607 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007608
7609 u8 port_filter[8][0x20];
7610
7611 u8 port_filter_update_en[8][0x20];
7612};
7613
7614struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007615 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007616 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007617 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007618
7619 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007620 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007621 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007622 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007623 u8 prio_mask_rx[0x8];
7624
7625 u8 pptx[0x1];
7626 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007627 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007628 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007629 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007630
7631 u8 pprx[0x1];
7632 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007633 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007634 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007635 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007636
Matan Barakb4ff3a32016-02-09 14:57:42 +02007637 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007638};
7639
7640struct mlx5_ifc_pelc_reg_bits {
7641 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007642 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007643 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007644 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007645
7646 u8 op_admin[0x8];
7647 u8 op_capability[0x8];
7648 u8 op_request[0x8];
7649 u8 op_active[0x8];
7650
7651 u8 admin[0x40];
7652
7653 u8 capability[0x40];
7654
7655 u8 request[0x40];
7656
7657 u8 active[0x40];
7658
Matan Barakb4ff3a32016-02-09 14:57:42 +02007659 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007660};
7661
7662struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007663 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007664 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007665 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007666
Matan Barakb4ff3a32016-02-09 14:57:42 +02007667 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007668 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007669 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007670
Matan Barakb4ff3a32016-02-09 14:57:42 +02007671 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007672 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007673 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007674 u8 error_type[0x8];
7675};
7676
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007677struct mlx5_ifc_pcam_enhanced_features_bits {
7678 u8 reserved_at_0[0x7e];
7679
7680 u8 ppcnt_discard_group[0x1];
7681 u8 ppcnt_statistical_group[0x1];
7682};
7683
7684struct mlx5_ifc_pcam_reg_bits {
7685 u8 reserved_at_0[0x8];
7686 u8 feature_group[0x8];
7687 u8 reserved_at_10[0x8];
7688 u8 access_reg_group[0x8];
7689
7690 u8 reserved_at_20[0x20];
7691
7692 union {
7693 u8 reserved_at_0[0x80];
7694 } port_access_reg_cap_mask;
7695
7696 u8 reserved_at_c0[0x80];
7697
7698 union {
7699 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7700 u8 reserved_at_0[0x80];
7701 } feature_cap_mask;
7702
7703 u8 reserved_at_1c0[0xc0];
7704};
7705
7706struct mlx5_ifc_mcam_enhanced_features_bits {
7707 u8 reserved_at_0[0x7f];
7708
7709 u8 pcie_performance_group[0x1];
7710};
7711
7712struct mlx5_ifc_mcam_reg_bits {
7713 u8 reserved_at_0[0x8];
7714 u8 feature_group[0x8];
7715 u8 reserved_at_10[0x8];
7716 u8 access_reg_group[0x8];
7717
7718 u8 reserved_at_20[0x20];
7719
7720 union {
7721 u8 reserved_at_0[0x80];
7722 } mng_access_reg_cap_mask;
7723
7724 u8 reserved_at_c0[0x80];
7725
7726 union {
7727 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7728 u8 reserved_at_0[0x80];
7729 } mng_feature_cap_mask;
7730
7731 u8 reserved_at_1c0[0x80];
7732};
7733
Saeed Mahameede2816822015-05-28 22:28:40 +03007734struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007735 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007736 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007737 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007738
7739 u8 port_capability_mask[4][0x20];
7740};
7741
7742struct mlx5_ifc_paos_reg_bits {
7743 u8 swid[0x8];
7744 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007745 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007746 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007747 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007748 u8 oper_status[0x4];
7749
7750 u8 ase[0x1];
7751 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007752 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007753 u8 e[0x2];
7754
Matan Barakb4ff3a32016-02-09 14:57:42 +02007755 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007756};
7757
7758struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007759 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007760 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007761 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007762 u8 opamp_group_type[0x4];
7763
7764 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007765 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007766 u8 num_of_indices[0xc];
7767
7768 u8 index_data[18][0x10];
7769};
7770
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007771struct mlx5_ifc_pcmr_reg_bits {
7772 u8 reserved_at_0[0x8];
7773 u8 local_port[0x8];
7774 u8 reserved_at_10[0x2e];
7775 u8 fcs_cap[0x1];
7776 u8 reserved_at_3f[0x1f];
7777 u8 fcs_chk[0x1];
7778 u8 reserved_at_5f[0x1];
7779};
7780
Saeed Mahameede2816822015-05-28 22:28:40 +03007781struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007782 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007783 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007784 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007785 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007786 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007787 u8 module[0x8];
7788};
7789
7790struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007791 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007792 u8 lossy[0x1];
7793 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007794 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007795 u8 size[0xc];
7796
7797 u8 xoff_threshold[0x10];
7798 u8 xon_threshold[0x10];
7799};
7800
7801struct mlx5_ifc_set_node_in_bits {
7802 u8 node_description[64][0x8];
7803};
7804
7805struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007806 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007807 u8 power_settings_level[0x8];
7808
Matan Barakb4ff3a32016-02-09 14:57:42 +02007809 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007810};
7811
7812struct mlx5_ifc_register_host_endianness_bits {
7813 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007814 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007815
Matan Barakb4ff3a32016-02-09 14:57:42 +02007816 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007817};
7818
7819struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007820 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007821
7822 u8 mkey[0x20];
7823
7824 u8 addressh_63_32[0x20];
7825
7826 u8 addressl_31_0[0x20];
7827};
7828
7829struct mlx5_ifc_ud_adrs_vector_bits {
7830 u8 dc_key[0x40];
7831
7832 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007833 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007834 u8 destination_qp_dct[0x18];
7835
7836 u8 static_rate[0x4];
7837 u8 sl_eth_prio[0x4];
7838 u8 fl[0x1];
7839 u8 mlid[0x7];
7840 u8 rlid_udp_sport[0x10];
7841
Matan Barakb4ff3a32016-02-09 14:57:42 +02007842 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007843
7844 u8 rmac_47_16[0x20];
7845
7846 u8 rmac_15_0[0x10];
7847 u8 tclass[0x8];
7848 u8 hop_limit[0x8];
7849
Matan Barakb4ff3a32016-02-09 14:57:42 +02007850 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03007851 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007852 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007853 u8 src_addr_index[0x8];
7854 u8 flow_label[0x14];
7855
7856 u8 rgid_rip[16][0x8];
7857};
7858
7859struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007860 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007861 u8 function_id[0x10];
7862
7863 u8 num_pages[0x20];
7864
Matan Barakb4ff3a32016-02-09 14:57:42 +02007865 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007866};
7867
7868struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007869 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007870 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007871 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007872 u8 event_sub_type[0x8];
7873
Matan Barakb4ff3a32016-02-09 14:57:42 +02007874 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007875
7876 union mlx5_ifc_event_auto_bits event_data;
7877
Matan Barakb4ff3a32016-02-09 14:57:42 +02007878 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007879 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007880 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007881 u8 owner[0x1];
7882};
7883
7884enum {
7885 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
7886};
7887
7888struct mlx5_ifc_cmd_queue_entry_bits {
7889 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007890 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007891
7892 u8 input_length[0x20];
7893
7894 u8 input_mailbox_pointer_63_32[0x20];
7895
7896 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007897 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007898
7899 u8 command_input_inline_data[16][0x8];
7900
7901 u8 command_output_inline_data[16][0x8];
7902
7903 u8 output_mailbox_pointer_63_32[0x20];
7904
7905 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007906 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007907
7908 u8 output_length[0x20];
7909
7910 u8 token[0x8];
7911 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007912 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007913 u8 status[0x7];
7914 u8 ownership[0x1];
7915};
7916
7917struct mlx5_ifc_cmd_out_bits {
7918 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007919 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007920
7921 u8 syndrome[0x20];
7922
7923 u8 command_output[0x20];
7924};
7925
7926struct mlx5_ifc_cmd_in_bits {
7927 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007928 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007929
Matan Barakb4ff3a32016-02-09 14:57:42 +02007930 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007931 u8 op_mod[0x10];
7932
7933 u8 command[0][0x20];
7934};
7935
7936struct mlx5_ifc_cmd_if_box_bits {
7937 u8 mailbox_data[512][0x8];
7938
Matan Barakb4ff3a32016-02-09 14:57:42 +02007939 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03007940
7941 u8 next_pointer_63_32[0x20];
7942
7943 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007944 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03007945
7946 u8 block_number[0x20];
7947
Matan Barakb4ff3a32016-02-09 14:57:42 +02007948 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007949 u8 token[0x8];
7950 u8 ctrl_signature[0x8];
7951 u8 signature[0x8];
7952};
7953
7954struct mlx5_ifc_mtt_bits {
7955 u8 ptag_63_32[0x20];
7956
7957 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007958 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007959 u8 wr_en[0x1];
7960 u8 rd_en[0x1];
7961};
7962
Tariq Toukan928cfe82016-02-22 18:17:29 +02007963struct mlx5_ifc_query_wol_rol_out_bits {
7964 u8 status[0x8];
7965 u8 reserved_at_8[0x18];
7966
7967 u8 syndrome[0x20];
7968
7969 u8 reserved_at_40[0x10];
7970 u8 rol_mode[0x8];
7971 u8 wol_mode[0x8];
7972
7973 u8 reserved_at_60[0x20];
7974};
7975
7976struct mlx5_ifc_query_wol_rol_in_bits {
7977 u8 opcode[0x10];
7978 u8 reserved_at_10[0x10];
7979
7980 u8 reserved_at_20[0x10];
7981 u8 op_mod[0x10];
7982
7983 u8 reserved_at_40[0x40];
7984};
7985
7986struct mlx5_ifc_set_wol_rol_out_bits {
7987 u8 status[0x8];
7988 u8 reserved_at_8[0x18];
7989
7990 u8 syndrome[0x20];
7991
7992 u8 reserved_at_40[0x40];
7993};
7994
7995struct mlx5_ifc_set_wol_rol_in_bits {
7996 u8 opcode[0x10];
7997 u8 reserved_at_10[0x10];
7998
7999 u8 reserved_at_20[0x10];
8000 u8 op_mod[0x10];
8001
8002 u8 rol_mode_valid[0x1];
8003 u8 wol_mode_valid[0x1];
8004 u8 reserved_at_42[0xe];
8005 u8 rol_mode[0x8];
8006 u8 wol_mode[0x8];
8007
8008 u8 reserved_at_60[0x20];
8009};
8010
Saeed Mahameede2816822015-05-28 22:28:40 +03008011enum {
8012 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8013 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8014 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8015};
8016
8017enum {
8018 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8019 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8020 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8021};
8022
8023enum {
8024 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8025 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8026 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8027 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8028 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8029 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8030 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8031 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8032 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8033 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8034 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8035};
8036
8037struct mlx5_ifc_initial_seg_bits {
8038 u8 fw_rev_minor[0x10];
8039 u8 fw_rev_major[0x10];
8040
8041 u8 cmd_interface_rev[0x10];
8042 u8 fw_rev_subminor[0x10];
8043
Matan Barakb4ff3a32016-02-09 14:57:42 +02008044 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008045
8046 u8 cmdq_phy_addr_63_32[0x20];
8047
8048 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008049 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008050 u8 nic_interface[0x2];
8051 u8 log_cmdq_size[0x4];
8052 u8 log_cmdq_stride[0x4];
8053
8054 u8 command_doorbell_vector[0x20];
8055
Matan Barakb4ff3a32016-02-09 14:57:42 +02008056 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008057
8058 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008059 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008060 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008061 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008062
8063 struct mlx5_ifc_health_buffer_bits health_buffer;
8064
8065 u8 no_dram_nic_offset[0x20];
8066
Matan Barakb4ff3a32016-02-09 14:57:42 +02008067 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008068
Matan Barakb4ff3a32016-02-09 14:57:42 +02008069 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008070 u8 clear_int[0x1];
8071
8072 u8 health_syndrome[0x8];
8073 u8 health_counter[0x18];
8074
Matan Barakb4ff3a32016-02-09 14:57:42 +02008075 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008076};
8077
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008078struct mlx5_ifc_mtpps_reg_bits {
8079 u8 reserved_at_0[0xc];
8080 u8 cap_number_of_pps_pins[0x4];
8081 u8 reserved_at_10[0x4];
8082 u8 cap_max_num_of_pps_in_pins[0x4];
8083 u8 reserved_at_18[0x4];
8084 u8 cap_max_num_of_pps_out_pins[0x4];
8085
8086 u8 reserved_at_20[0x24];
8087 u8 cap_pin_3_mode[0x4];
8088 u8 reserved_at_48[0x4];
8089 u8 cap_pin_2_mode[0x4];
8090 u8 reserved_at_50[0x4];
8091 u8 cap_pin_1_mode[0x4];
8092 u8 reserved_at_58[0x4];
8093 u8 cap_pin_0_mode[0x4];
8094
8095 u8 reserved_at_60[0x4];
8096 u8 cap_pin_7_mode[0x4];
8097 u8 reserved_at_68[0x4];
8098 u8 cap_pin_6_mode[0x4];
8099 u8 reserved_at_70[0x4];
8100 u8 cap_pin_5_mode[0x4];
8101 u8 reserved_at_78[0x4];
8102 u8 cap_pin_4_mode[0x4];
8103
8104 u8 reserved_at_80[0x80];
8105
8106 u8 enable[0x1];
8107 u8 reserved_at_101[0xb];
8108 u8 pattern[0x4];
8109 u8 reserved_at_110[0x4];
8110 u8 pin_mode[0x4];
8111 u8 pin[0x8];
8112
8113 u8 reserved_at_120[0x20];
8114
8115 u8 time_stamp[0x40];
8116
8117 u8 out_pulse_duration[0x10];
8118 u8 out_periodic_adjustment[0x10];
8119
8120 u8 reserved_at_1a0[0x60];
8121};
8122
8123struct mlx5_ifc_mtppse_reg_bits {
8124 u8 reserved_at_0[0x18];
8125 u8 pin[0x8];
8126 u8 event_arm[0x1];
8127 u8 reserved_at_21[0x1b];
8128 u8 event_generation_mode[0x4];
8129 u8 reserved_at_40[0x40];
8130};
8131
Saeed Mahameede2816822015-05-28 22:28:40 +03008132union mlx5_ifc_ports_control_registers_document_bits {
8133 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8134 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8135 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8136 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8137 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8138 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8139 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8140 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8141 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8142 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8143 struct mlx5_ifc_paos_reg_bits paos_reg;
8144 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8145 struct mlx5_ifc_peir_reg_bits peir_reg;
8146 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8147 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008148 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008149 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8150 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8151 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8152 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8153 struct mlx5_ifc_plib_reg_bits plib_reg;
8154 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8155 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8156 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8157 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8158 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8159 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8160 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8161 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8162 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8163 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008164 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008165 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8166 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8167 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8168 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8169 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8170 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8171 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008172 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008173 struct mlx5_ifc_pude_reg_bits pude_reg;
8174 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8175 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8176 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008177 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8178 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008179 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008180};
8181
8182union mlx5_ifc_debug_enhancements_document_bits {
8183 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008184 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008185};
8186
8187union mlx5_ifc_uplink_pci_interface_document_bits {
8188 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008189 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008190};
8191
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008192struct mlx5_ifc_set_flow_table_root_out_bits {
8193 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008194 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008195
8196 u8 syndrome[0x20];
8197
Matan Barakb4ff3a32016-02-09 14:57:42 +02008198 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008199};
8200
8201struct mlx5_ifc_set_flow_table_root_in_bits {
8202 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008203 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008204
Matan Barakb4ff3a32016-02-09 14:57:42 +02008205 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008206 u8 op_mod[0x10];
8207
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008208 u8 other_vport[0x1];
8209 u8 reserved_at_41[0xf];
8210 u8 vport_number[0x10];
8211
8212 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008213
8214 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008215 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008216
Matan Barakb4ff3a32016-02-09 14:57:42 +02008217 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008218 u8 table_id[0x18];
8219
Matan Barakb4ff3a32016-02-09 14:57:42 +02008220 u8 reserved_at_c0[0x140];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008221};
8222
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008223enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008224 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8225 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008226};
8227
8228struct mlx5_ifc_modify_flow_table_out_bits {
8229 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008230 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008231
8232 u8 syndrome[0x20];
8233
Matan Barakb4ff3a32016-02-09 14:57:42 +02008234 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008235};
8236
8237struct mlx5_ifc_modify_flow_table_in_bits {
8238 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008239 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008240
Matan Barakb4ff3a32016-02-09 14:57:42 +02008241 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008242 u8 op_mod[0x10];
8243
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008244 u8 other_vport[0x1];
8245 u8 reserved_at_41[0xf];
8246 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008247
Matan Barakb4ff3a32016-02-09 14:57:42 +02008248 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008249 u8 modify_field_select[0x10];
8250
8251 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008252 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008253
Matan Barakb4ff3a32016-02-09 14:57:42 +02008254 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008255 u8 table_id[0x18];
8256
Matan Barakb4ff3a32016-02-09 14:57:42 +02008257 u8 reserved_at_c0[0x4];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008258 u8 table_miss_mode[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008259 u8 reserved_at_c8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008260
Matan Barakb4ff3a32016-02-09 14:57:42 +02008261 u8 reserved_at_e0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008262 u8 table_miss_id[0x18];
8263
Aviv Heller84df61e2016-05-10 13:47:50 +03008264 u8 reserved_at_100[0x8];
8265 u8 lag_master_next_table_id[0x18];
8266
8267 u8 reserved_at_120[0x80];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008268};
8269
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008270struct mlx5_ifc_ets_tcn_config_reg_bits {
8271 u8 g[0x1];
8272 u8 b[0x1];
8273 u8 r[0x1];
8274 u8 reserved_at_3[0x9];
8275 u8 group[0x4];
8276 u8 reserved_at_10[0x9];
8277 u8 bw_allocation[0x7];
8278
8279 u8 reserved_at_20[0xc];
8280 u8 max_bw_units[0x4];
8281 u8 reserved_at_30[0x8];
8282 u8 max_bw_value[0x8];
8283};
8284
8285struct mlx5_ifc_ets_global_config_reg_bits {
8286 u8 reserved_at_0[0x2];
8287 u8 r[0x1];
8288 u8 reserved_at_3[0x1d];
8289
8290 u8 reserved_at_20[0xc];
8291 u8 max_bw_units[0x4];
8292 u8 reserved_at_30[0x8];
8293 u8 max_bw_value[0x8];
8294};
8295
8296struct mlx5_ifc_qetc_reg_bits {
8297 u8 reserved_at_0[0x8];
8298 u8 port_number[0x8];
8299 u8 reserved_at_10[0x30];
8300
8301 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8302 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8303};
8304
8305struct mlx5_ifc_qtct_reg_bits {
8306 u8 reserved_at_0[0x8];
8307 u8 port_number[0x8];
8308 u8 reserved_at_10[0xd];
8309 u8 prio[0x3];
8310
8311 u8 reserved_at_20[0x1d];
8312 u8 tclass[0x3];
8313};
8314
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008315struct mlx5_ifc_mcia_reg_bits {
8316 u8 l[0x1];
8317 u8 reserved_at_1[0x7];
8318 u8 module[0x8];
8319 u8 reserved_at_10[0x8];
8320 u8 status[0x8];
8321
8322 u8 i2c_device_address[0x8];
8323 u8 page_number[0x8];
8324 u8 device_address[0x10];
8325
8326 u8 reserved_at_40[0x10];
8327 u8 size[0x10];
8328
8329 u8 reserved_at_60[0x20];
8330
8331 u8 dword_0[0x20];
8332 u8 dword_1[0x20];
8333 u8 dword_2[0x20];
8334 u8 dword_3[0x20];
8335 u8 dword_4[0x20];
8336 u8 dword_5[0x20];
8337 u8 dword_6[0x20];
8338 u8 dword_7[0x20];
8339 u8 dword_8[0x20];
8340 u8 dword_9[0x20];
8341 u8 dword_10[0x20];
8342 u8 dword_11[0x20];
8343};
8344
Saeed Mahameed74862162016-06-09 15:11:34 +03008345struct mlx5_ifc_dcbx_param_bits {
8346 u8 dcbx_cee_cap[0x1];
8347 u8 dcbx_ieee_cap[0x1];
8348 u8 dcbx_standby_cap[0x1];
8349 u8 reserved_at_0[0x5];
8350 u8 port_number[0x8];
8351 u8 reserved_at_10[0xa];
8352 u8 max_application_table_size[6];
8353 u8 reserved_at_20[0x15];
8354 u8 version_oper[0x3];
8355 u8 reserved_at_38[5];
8356 u8 version_admin[0x3];
8357 u8 willing_admin[0x1];
8358 u8 reserved_at_41[0x3];
8359 u8 pfc_cap_oper[0x4];
8360 u8 reserved_at_48[0x4];
8361 u8 pfc_cap_admin[0x4];
8362 u8 reserved_at_50[0x4];
8363 u8 num_of_tc_oper[0x4];
8364 u8 reserved_at_58[0x4];
8365 u8 num_of_tc_admin[0x4];
8366 u8 remote_willing[0x1];
8367 u8 reserved_at_61[3];
8368 u8 remote_pfc_cap[4];
8369 u8 reserved_at_68[0x14];
8370 u8 remote_num_of_tc[0x4];
8371 u8 reserved_at_80[0x18];
8372 u8 error[0x8];
8373 u8 reserved_at_a0[0x160];
8374};
Aviv Heller84df61e2016-05-10 13:47:50 +03008375
8376struct mlx5_ifc_lagc_bits {
8377 u8 reserved_at_0[0x1d];
8378 u8 lag_state[0x3];
8379
8380 u8 reserved_at_20[0x14];
8381 u8 tx_remap_affinity_2[0x4];
8382 u8 reserved_at_38[0x4];
8383 u8 tx_remap_affinity_1[0x4];
8384};
8385
8386struct mlx5_ifc_create_lag_out_bits {
8387 u8 status[0x8];
8388 u8 reserved_at_8[0x18];
8389
8390 u8 syndrome[0x20];
8391
8392 u8 reserved_at_40[0x40];
8393};
8394
8395struct mlx5_ifc_create_lag_in_bits {
8396 u8 opcode[0x10];
8397 u8 reserved_at_10[0x10];
8398
8399 u8 reserved_at_20[0x10];
8400 u8 op_mod[0x10];
8401
8402 struct mlx5_ifc_lagc_bits ctx;
8403};
8404
8405struct mlx5_ifc_modify_lag_out_bits {
8406 u8 status[0x8];
8407 u8 reserved_at_8[0x18];
8408
8409 u8 syndrome[0x20];
8410
8411 u8 reserved_at_40[0x40];
8412};
8413
8414struct mlx5_ifc_modify_lag_in_bits {
8415 u8 opcode[0x10];
8416 u8 reserved_at_10[0x10];
8417
8418 u8 reserved_at_20[0x10];
8419 u8 op_mod[0x10];
8420
8421 u8 reserved_at_40[0x20];
8422 u8 field_select[0x20];
8423
8424 struct mlx5_ifc_lagc_bits ctx;
8425};
8426
8427struct mlx5_ifc_query_lag_out_bits {
8428 u8 status[0x8];
8429 u8 reserved_at_8[0x18];
8430
8431 u8 syndrome[0x20];
8432
8433 u8 reserved_at_40[0x40];
8434
8435 struct mlx5_ifc_lagc_bits ctx;
8436};
8437
8438struct mlx5_ifc_query_lag_in_bits {
8439 u8 opcode[0x10];
8440 u8 reserved_at_10[0x10];
8441
8442 u8 reserved_at_20[0x10];
8443 u8 op_mod[0x10];
8444
8445 u8 reserved_at_40[0x40];
8446};
8447
8448struct mlx5_ifc_destroy_lag_out_bits {
8449 u8 status[0x8];
8450 u8 reserved_at_8[0x18];
8451
8452 u8 syndrome[0x20];
8453
8454 u8 reserved_at_40[0x40];
8455};
8456
8457struct mlx5_ifc_destroy_lag_in_bits {
8458 u8 opcode[0x10];
8459 u8 reserved_at_10[0x10];
8460
8461 u8 reserved_at_20[0x10];
8462 u8 op_mod[0x10];
8463
8464 u8 reserved_at_40[0x40];
8465};
8466
8467struct mlx5_ifc_create_vport_lag_out_bits {
8468 u8 status[0x8];
8469 u8 reserved_at_8[0x18];
8470
8471 u8 syndrome[0x20];
8472
8473 u8 reserved_at_40[0x40];
8474};
8475
8476struct mlx5_ifc_create_vport_lag_in_bits {
8477 u8 opcode[0x10];
8478 u8 reserved_at_10[0x10];
8479
8480 u8 reserved_at_20[0x10];
8481 u8 op_mod[0x10];
8482
8483 u8 reserved_at_40[0x40];
8484};
8485
8486struct mlx5_ifc_destroy_vport_lag_out_bits {
8487 u8 status[0x8];
8488 u8 reserved_at_8[0x18];
8489
8490 u8 syndrome[0x20];
8491
8492 u8 reserved_at_40[0x40];
8493};
8494
8495struct mlx5_ifc_destroy_vport_lag_in_bits {
8496 u8 opcode[0x10];
8497 u8 reserved_at_10[0x10];
8498
8499 u8 reserved_at_20[0x10];
8500 u8 op_mod[0x10];
8501
8502 u8 reserved_at_40[0x40];
8503};
8504
Eli Cohend29b7962014-10-02 12:19:43 +03008505#endif /* MLX5_IFC_H */