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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Saeed Mahameed74862162016-06-09 15:11:34 +0300150 MLX5_CMD_OP_SET_RATE_LIMIT = 0x780,
151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300203 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300204 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
205 MLX5_CMD_OP_QUERY_RQ = 0x90b,
206 MLX5_CMD_OP_CREATE_RMP = 0x90c,
207 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
208 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
209 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300210 MLX5_CMD_OP_CREATE_TIS = 0x912,
211 MLX5_CMD_OP_MODIFY_TIS = 0x913,
212 MLX5_CMD_OP_DESTROY_TIS = 0x914,
213 MLX5_CMD_OP_QUERY_TIS = 0x915,
214 MLX5_CMD_OP_CREATE_RQT = 0x916,
215 MLX5_CMD_OP_MODIFY_RQT = 0x917,
216 MLX5_CMD_OP_DESTROY_RQT = 0x918,
217 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200218 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300219 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
220 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
221 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
222 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
223 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
224 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
225 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
226 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200227 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000228 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
229 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
230 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300231 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300232 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
233 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200234 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
235 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300236 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
237 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
238 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
239 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
240 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300241 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300242};
243
244struct mlx5_ifc_flow_table_fields_supported_bits {
245 u8 outer_dmac[0x1];
246 u8 outer_smac[0x1];
247 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300248 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300249 u8 outer_first_prio[0x1];
250 u8 outer_first_cfi[0x1];
251 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300252 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300253 u8 outer_second_prio[0x1];
254 u8 outer_second_cfi[0x1];
255 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200256 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300257 u8 outer_sip[0x1];
258 u8 outer_dip[0x1];
259 u8 outer_frag[0x1];
260 u8 outer_ip_protocol[0x1];
261 u8 outer_ip_ecn[0x1];
262 u8 outer_ip_dscp[0x1];
263 u8 outer_udp_sport[0x1];
264 u8 outer_udp_dport[0x1];
265 u8 outer_tcp_sport[0x1];
266 u8 outer_tcp_dport[0x1];
267 u8 outer_tcp_flags[0x1];
268 u8 outer_gre_protocol[0x1];
269 u8 outer_gre_key[0x1];
270 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200271 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300272 u8 source_eswitch_port[0x1];
273
274 u8 inner_dmac[0x1];
275 u8 inner_smac[0x1];
276 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300277 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300278 u8 inner_first_prio[0x1];
279 u8 inner_first_cfi[0x1];
280 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200281 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300282 u8 inner_second_prio[0x1];
283 u8 inner_second_cfi[0x1];
284 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200285 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300286 u8 inner_sip[0x1];
287 u8 inner_dip[0x1];
288 u8 inner_frag[0x1];
289 u8 inner_ip_protocol[0x1];
290 u8 inner_ip_ecn[0x1];
291 u8 inner_ip_dscp[0x1];
292 u8 inner_udp_sport[0x1];
293 u8 inner_udp_dport[0x1];
294 u8 inner_tcp_sport[0x1];
295 u8 inner_tcp_dport[0x1];
296 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200297 u8 reserved_at_37[0x9];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300298 u8 reserved_at_40[0x1a];
299 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300300
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300301 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300302};
303
304struct mlx5_ifc_flow_table_prop_layout_bits {
305 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000306 u8 reserved_at_1[0x1];
307 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200308 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200309 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200310 u8 identified_miss_table_mode[0x1];
311 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300312 u8 encap[0x1];
313 u8 decap[0x1];
314 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300315
Matan Barakb4ff3a32016-02-09 14:57:42 +0200316 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200318 u8 log_max_modify_header_context[0x8];
319 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320 u8 max_ft_level[0x8];
321
Matan Barakb4ff3a32016-02-09 14:57:42 +0200322 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200325 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300326
Matan Barakb4ff3a32016-02-09 14:57:42 +0200327 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200328 u8 log_max_destination[0x8];
329
Matan Barakb4ff3a32016-02-09 14:57:42 +0200330 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300331 u8 log_max_flow[0x8];
332
Matan Barakb4ff3a32016-02-09 14:57:42 +0200333 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300334
335 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
336
337 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
338};
339
340struct mlx5_ifc_odp_per_transport_service_cap_bits {
341 u8 send[0x1];
342 u8 receive[0x1];
343 u8 write[0x1];
344 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200345 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300346 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200347 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300348};
349
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200350struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200351 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200352
353 u8 ipv4[0x20];
354};
355
356struct mlx5_ifc_ipv6_layout_bits {
357 u8 ipv6[16][0x8];
358};
359
360union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
361 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
362 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200363 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200364};
365
Saeed Mahameede2816822015-05-28 22:28:40 +0300366struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
367 u8 smac_47_16[0x20];
368
369 u8 smac_15_0[0x10];
370 u8 ethertype[0x10];
371
372 u8 dmac_47_16[0x20];
373
374 u8 dmac_15_0[0x10];
375 u8 first_prio[0x3];
376 u8 first_cfi[0x1];
377 u8 first_vid[0xc];
378
379 u8 ip_protocol[0x8];
380 u8 ip_dscp[0x6];
381 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300382 u8 cvlan_tag[0x1];
383 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300384 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300385 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300386 u8 tcp_flags[0x9];
387
388 u8 tcp_sport[0x10];
389 u8 tcp_dport[0x10];
390
Or Gerlitza8ade552017-06-07 17:49:56 +0300391 u8 reserved_at_c0[0x18];
392 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300393
394 u8 udp_sport[0x10];
395 u8 udp_dport[0x10];
396
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200397 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300398
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200399 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300400};
401
402struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300403 u8 reserved_at_0[0x8];
404 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300405
Matan Barakb4ff3a32016-02-09 14:57:42 +0200406 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300407 u8 source_port[0x10];
408
409 u8 outer_second_prio[0x3];
410 u8 outer_second_cfi[0x1];
411 u8 outer_second_vid[0xc];
412 u8 inner_second_prio[0x3];
413 u8 inner_second_cfi[0x1];
414 u8 inner_second_vid[0xc];
415
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300416 u8 outer_second_cvlan_tag[0x1];
417 u8 inner_second_cvlan_tag[0x1];
418 u8 outer_second_svlan_tag[0x1];
419 u8 inner_second_svlan_tag[0x1];
420 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300421 u8 gre_protocol[0x10];
422
423 u8 gre_key_h[0x18];
424 u8 gre_key_l[0x8];
425
426 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200427 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300428
Matan Barakb4ff3a32016-02-09 14:57:42 +0200429 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300430
Matan Barakb4ff3a32016-02-09 14:57:42 +0200431 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300432 u8 outer_ipv6_flow_label[0x14];
433
Matan Barakb4ff3a32016-02-09 14:57:42 +0200434 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435 u8 inner_ipv6_flow_label[0x14];
436
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300437 u8 reserved_at_120[0x28];
438 u8 bth_dst_qp[0x18];
439 u8 reserved_at_160[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300440};
441
442struct mlx5_ifc_cmd_pas_bits {
443 u8 pa_h[0x20];
444
445 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200446 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300447};
448
449struct mlx5_ifc_uint64_bits {
450 u8 hi[0x20];
451
452 u8 lo[0x20];
453};
454
455enum {
456 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
457 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
458 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
459 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
460 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
461 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
462 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
463 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
464 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
465 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
466};
467
468struct mlx5_ifc_ads_bits {
469 u8 fl[0x1];
470 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200471 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300472 u8 pkey_index[0x10];
473
Matan Barakb4ff3a32016-02-09 14:57:42 +0200474 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300475 u8 grh[0x1];
476 u8 mlid[0x7];
477 u8 rlid[0x10];
478
479 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200480 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300481 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200482 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300483 u8 stat_rate[0x4];
484 u8 hop_limit[0x8];
485
Matan Barakb4ff3a32016-02-09 14:57:42 +0200486 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300487 u8 tclass[0x8];
488 u8 flow_label[0x14];
489
490 u8 rgid_rip[16][0x8];
491
Matan Barakb4ff3a32016-02-09 14:57:42 +0200492 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300493 u8 f_dscp[0x1];
494 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200495 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300496 u8 f_eth_prio[0x1];
497 u8 ecn[0x2];
498 u8 dscp[0x6];
499 u8 udp_sport[0x10];
500
501 u8 dei_cfi[0x1];
502 u8 eth_prio[0x3];
503 u8 sl[0x4];
504 u8 port[0x8];
505 u8 rmac_47_32[0x10];
506
507 u8 rmac_31_0[0x20];
508};
509
510struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200511 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300512 u8 nic_rx_multi_path_tirs_fts[0x1];
513 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
514 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300515
516 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
517
Matan Barakb4ff3a32016-02-09 14:57:42 +0200518 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300519
520 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
521
522 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
523
Matan Barakb4ff3a32016-02-09 14:57:42 +0200524 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300525
526 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
527
Matan Barakb4ff3a32016-02-09 14:57:42 +0200528 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300529};
530
Saeed Mahameed495716b2015-12-01 18:03:19 +0200531struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200532 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200533
534 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
535
536 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
537
538 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
539
Matan Barakb4ff3a32016-02-09 14:57:42 +0200540 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200541};
542
Saeed Mahameedd6666752015-12-01 18:03:22 +0200543struct mlx5_ifc_e_switch_cap_bits {
544 u8 vport_svlan_strip[0x1];
545 u8 vport_cvlan_strip[0x1];
546 u8 vport_svlan_insert[0x1];
547 u8 vport_cvlan_insert_if_not_exist[0x1];
548 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300549 u8 reserved_at_5[0x19];
550 u8 nic_vport_node_guid_modify[0x1];
551 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200552
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300553 u8 vxlan_encap_decap[0x1];
554 u8 nvgre_encap_decap[0x1];
555 u8 reserved_at_22[0x9];
556 u8 log_max_encap_headers[0x5];
557 u8 reserved_2b[0x6];
558 u8 max_encap_header_size[0xa];
559
560 u8 reserved_40[0x7c0];
561
Saeed Mahameedd6666752015-12-01 18:03:22 +0200562};
563
Saeed Mahameed74862162016-06-09 15:11:34 +0300564struct mlx5_ifc_qos_cap_bits {
565 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300566 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200567 u8 esw_bw_share[0x1];
568 u8 esw_rate_limit[0x1];
569 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300570
571 u8 reserved_at_20[0x20];
572
Saeed Mahameed74862162016-06-09 15:11:34 +0300573 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300574
Saeed Mahameed74862162016-06-09 15:11:34 +0300575 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300576
577 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300578 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300579
580 u8 esw_element_type[0x10];
581 u8 esw_tsar_type[0x10];
582
583 u8 reserved_at_c0[0x10];
584 u8 max_qos_para_vport[0x10];
585
586 u8 max_tsar_bw_share[0x20];
587
588 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300589};
590
Saeed Mahameede2816822015-05-28 22:28:40 +0300591struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
592 u8 csum_cap[0x1];
593 u8 vlan_cap[0x1];
594 u8 lro_cap[0x1];
595 u8 lro_psh_flag[0x1];
596 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200597 u8 reserved_at_5[0x2];
598 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200599 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200600 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300601 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200602 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300603 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300604 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300605 u8 reg_umr_sq[0x1];
606 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300607 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300608 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200609 u8 reserved_at_1c[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300610 u8 tunnel_statless_gre[0x1];
611 u8 tunnel_stateless_vxlan[0x1];
612
Ilan Tayari547eede2017-04-18 16:04:28 +0300613 u8 swp[0x1];
614 u8 swp_csum[0x1];
615 u8 swp_lso[0x1];
616 u8 reserved_at_23[0x1d];
Saeed Mahameede2816822015-05-28 22:28:40 +0300617
Matan Barakb4ff3a32016-02-09 14:57:42 +0200618 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300619 u8 lro_min_mss_size[0x10];
620
Matan Barakb4ff3a32016-02-09 14:57:42 +0200621 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300622
623 u8 lro_timer_supported_periods[4][0x20];
624
Matan Barakb4ff3a32016-02-09 14:57:42 +0200625 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300626};
627
628struct mlx5_ifc_roce_cap_bits {
629 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200630 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300631
Matan Barakb4ff3a32016-02-09 14:57:42 +0200632 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300633
Matan Barakb4ff3a32016-02-09 14:57:42 +0200634 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300635 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200636 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300637 u8 roce_version[0x8];
638
Matan Barakb4ff3a32016-02-09 14:57:42 +0200639 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300640 u8 r_roce_dest_udp_port[0x10];
641
642 u8 r_roce_max_src_udp_port[0x10];
643 u8 r_roce_min_src_udp_port[0x10];
644
Matan Barakb4ff3a32016-02-09 14:57:42 +0200645 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300646 u8 roce_address_table_size[0x10];
647
Matan Barakb4ff3a32016-02-09 14:57:42 +0200648 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300649};
650
651enum {
652 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
653 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
654 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
655 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
656 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
657 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
658 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
659 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
660 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
661};
662
663enum {
664 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
665 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
666 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
667 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
668 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
669 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
670 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
671 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
672 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
673};
674
675struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200676 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300677
Or Gerlitzbd108382017-05-28 15:24:17 +0300678 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200679 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300680 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300681
Matan Barakb4ff3a32016-02-09 14:57:42 +0200682 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300683
Matan Barakb4ff3a32016-02-09 14:57:42 +0200684 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300685
Matan Barakb4ff3a32016-02-09 14:57:42 +0200686 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200687 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300688
Matan Barakb4ff3a32016-02-09 14:57:42 +0200689 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200690 u8 atomic_size_qp[0x10];
691
Matan Barakb4ff3a32016-02-09 14:57:42 +0200692 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300693 u8 atomic_size_dc[0x10];
694
Matan Barakb4ff3a32016-02-09 14:57:42 +0200695 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300696};
697
698struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200699 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300700
701 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200702 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300703
Matan Barakb4ff3a32016-02-09 14:57:42 +0200704 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300705
706 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
707
708 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
709
710 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
711
Matan Barakb4ff3a32016-02-09 14:57:42 +0200712 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300713};
714
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200715struct mlx5_ifc_calc_op {
716 u8 reserved_at_0[0x10];
717 u8 reserved_at_10[0x9];
718 u8 op_swap_endianness[0x1];
719 u8 op_min[0x1];
720 u8 op_xor[0x1];
721 u8 op_or[0x1];
722 u8 op_and[0x1];
723 u8 op_max[0x1];
724 u8 op_add[0x1];
725};
726
727struct mlx5_ifc_vector_calc_cap_bits {
728 u8 calc_matrix[0x1];
729 u8 reserved_at_1[0x1f];
730 u8 reserved_at_20[0x8];
731 u8 max_vec_count[0x8];
732 u8 reserved_at_30[0xd];
733 u8 max_chunk_size[0x3];
734 struct mlx5_ifc_calc_op calc0;
735 struct mlx5_ifc_calc_op calc1;
736 struct mlx5_ifc_calc_op calc2;
737 struct mlx5_ifc_calc_op calc3;
738
739 u8 reserved_at_e0[0x720];
740};
741
Saeed Mahameede2816822015-05-28 22:28:40 +0300742enum {
743 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
744 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300745 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +0300746};
747
748enum {
749 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
750 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
751};
752
753enum {
754 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
755 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
756 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
757 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
758 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
759};
760
761enum {
762 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
763 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
764 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
765 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
766 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
767 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
768};
769
770enum {
771 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
772 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
773};
774
775enum {
776 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
777 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
778 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
779};
780
781enum {
782 MLX5_CAP_PORT_TYPE_IB = 0x0,
783 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300784};
785
Max Gurtovoy1410a902017-05-28 10:53:10 +0300786enum {
787 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
788 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
789 MLX5_CAP_UMR_FENCE_NONE = 0x2,
790};
791
Eli Cohenb7755162014-10-02 12:19:44 +0300792struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200793 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300794
795 u8 log_max_srq_sz[0x8];
796 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200797 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300798 u8 log_max_qp[0x5];
799
Matan Barakb4ff3a32016-02-09 14:57:42 +0200800 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300801 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200802 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300803
Matan Barakb4ff3a32016-02-09 14:57:42 +0200804 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300805 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200806 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300807 u8 log_max_cq[0x5];
808
809 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200810 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300811 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200812 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300813 u8 log_max_eq[0x4];
814
815 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200816 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300817 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200818 u8 force_teardown[0x1];
819 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300820 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200821 u8 umr_extended_translation_offset[0x1];
822 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300823 u8 log_max_klm_list_size[0x6];
824
Matan Barakb4ff3a32016-02-09 14:57:42 +0200825 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300826 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200827 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300828 u8 log_max_ra_res_dc[0x6];
829
Matan Barakb4ff3a32016-02-09 14:57:42 +0200830 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300831 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200832 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300833 u8 log_max_ra_res_qp[0x6];
834
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200835 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300836 u8 cc_query_allowed[0x1];
837 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200838 u8 start_pad[0x1];
839 u8 cache_line_128byte[0x1];
Or Gerlitz137ffd12017-06-13 18:12:13 +0300840 u8 reserved_at_165[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300841 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300842
Saeed Mahameede2816822015-05-28 22:28:40 +0300843 u8 out_of_seq_cnt[0x1];
844 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300845 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300846 u8 reserved_at_183[0x1];
847 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300848 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300849 u8 max_qp_cnt[0xa];
850 u8 pkey_table_size[0x10];
851
Saeed Mahameede2816822015-05-28 22:28:40 +0300852 u8 vport_group_manager[0x1];
853 u8 vhca_group_manager[0x1];
854 u8 ib_virt[0x1];
855 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200856 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300857 u8 ets[0x1];
858 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200859 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300860 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200861 u8 mcam_reg[0x1];
862 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300863 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200864 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300865 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300866 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200867 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300868 u8 disable_link_up[0x1];
869 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300870 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300871 u8 num_ports[0x8];
872
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300873 u8 reserved_at_1c0[0x1];
874 u8 pps[0x1];
875 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300876 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300877 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200878 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300879 u8 reserved_at_1d0[0x1];
880 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300881 u8 general_notification_event[0x1];
882 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200883 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200884 u8 rol_s[0x1];
885 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300886 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200887 u8 wol_s[0x1];
888 u8 wol_g[0x1];
889 u8 wol_a[0x1];
890 u8 wol_b[0x1];
891 u8 wol_m[0x1];
892 u8 wol_u[0x1];
893 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300894
895 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300896 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300897 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300898
Saeed Mahameede2816822015-05-28 22:28:40 +0300899 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300900 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300901 u8 reserved_at_202[0x1];
902 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200903 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300904 u8 reserved_at_205[0x5];
905 u8 umr_fence[0x2];
906 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300907 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300908 u8 cmdif_checksum[0x2];
909 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300910 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300911 u8 wq_signature[0x1];
912 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300913 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300914 u8 sho[0x1];
915 u8 tph[0x1];
916 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300917 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300918 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300919 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300920 u8 roce[0x1];
921 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300922 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300923
924 u8 cq_oi[0x1];
925 u8 cq_resize[0x1];
926 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300927 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300928 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300929 u8 pg[0x1];
930 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300931 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300932 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300933 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300934 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300935 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300936 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200937 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300938 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200939 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300940 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300941 u8 qkv[0x1];
942 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200943 u8 set_deth_sqpn[0x1];
944 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300945 u8 xrc[0x1];
946 u8 ud[0x1];
947 u8 uc[0x1];
948 u8 rc[0x1];
949
Eli Cohena6d51b62017-01-03 23:55:23 +0200950 u8 uar_4k[0x1];
951 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300952 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300953 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300954 u8 log_pg_sz[0x8];
955
956 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200957 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300958 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300959 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300960 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300961
962 u8 reserved_at_270[0xb];
963 u8 lag_master[0x1];
964 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300965
Tariq Toukane1c9c622016-04-11 23:10:21 +0300966 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300967 u8 max_wqe_sz_sq[0x10];
968
Tariq Toukane1c9c622016-04-11 23:10:21 +0300969 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300970 u8 max_wqe_sz_rq[0x10];
971
Tariq Toukane1c9c622016-04-11 23:10:21 +0300972 u8 reserved_at_2c0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300973 u8 max_wqe_sz_sq_dc[0x10];
974
Tariq Toukane1c9c622016-04-11 23:10:21 +0300975 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300976 u8 max_qp_mcg[0x19];
977
Tariq Toukane1c9c622016-04-11 23:10:21 +0300978 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300979 u8 log_max_mcg[0x8];
980
Tariq Toukane1c9c622016-04-11 23:10:21 +0300981 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300982 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300983 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300984 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300985 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300986 u8 log_max_xrcd[0x5];
987
Amir Vadaia351a1b02016-07-14 10:32:38 +0300988 u8 reserved_at_340[0x8];
989 u8 log_max_flow_counter_bulk[0x8];
990 u8 max_flow_counter[0x10];
991
Eli Cohenb7755162014-10-02 12:19:44 +0300992
Tariq Toukane1c9c622016-04-11 23:10:21 +0300993 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300994 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300995 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300996 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300997 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300998 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300999 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001000 u8 log_max_tis[0x5];
1001
Saeed Mahameede2816822015-05-28 22:28:40 +03001002 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001003 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001004 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001005 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001006 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001007 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001008 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001009 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001010 u8 log_max_tis_per_sq[0x5];
1011
Tariq Toukane1c9c622016-04-11 23:10:21 +03001012 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001013 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001014 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001015 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001016 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001017 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001018 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001019 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001020
Tariq Toukane1c9c622016-04-11 23:10:21 +03001021 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03001022 u8 log_max_wq_sz[0x5];
1023
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001024 u8 nic_vport_change_event[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03001025 u8 disable_local_lb[0x1];
1026 u8 reserved_at_3e2[0x9];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001027 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001028 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001029 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001030 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001031 u8 log_max_current_uc_list[0x5];
1032
Tariq Toukane1c9c622016-04-11 23:10:21 +03001033 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001034
Tariq Toukane1c9c622016-04-11 23:10:21 +03001035 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001036 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001037 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001038 u8 log_uar_page_sz[0x10];
1039
Tariq Toukane1c9c622016-04-11 23:10:21 +03001040 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001041 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001042 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001043
Eli Cohena6d51b62017-01-03 23:55:23 +02001044 u8 reserved_at_500[0x20];
1045 u8 num_of_uars_per_page[0x20];
1046 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001047
1048 u8 reserved_at_580[0x3f];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001049 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001050
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001051 u8 cqe_compression_timeout[0x10];
1052 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001053
Saeed Mahameed74862162016-06-09 15:11:34 +03001054 u8 reserved_at_5e0[0x10];
1055 u8 tag_matching[0x1];
1056 u8 rndv_offload_rc[0x1];
1057 u8 rndv_offload_dc[0x1];
1058 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001059 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001060 u8 log_max_xrq[0x5];
1061
Max Gurtovoy7b135582017-01-02 11:37:38 +02001062 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001063};
1064
Saeed Mahameed81848732015-12-01 18:03:20 +02001065enum mlx5_flow_destination_type {
1066 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1067 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1068 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001069
1070 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001071};
1072
1073struct mlx5_ifc_dest_format_struct_bits {
1074 u8 destination_type[0x8];
1075 u8 destination_id[0x18];
1076
Matan Barakb4ff3a32016-02-09 14:57:42 +02001077 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001078};
1079
Amir Vadai9dc0b282016-05-13 12:55:39 +00001080struct mlx5_ifc_flow_counter_list_bits {
Amir Vadaia351a1b02016-07-14 10:32:38 +03001081 u8 clear[0x1];
1082 u8 num_of_counters[0xf];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001083 u8 flow_counter_id[0x10];
1084
1085 u8 reserved_at_20[0x20];
1086};
1087
1088union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1089 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1090 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1091 u8 reserved_at_0[0x40];
1092};
1093
Saeed Mahameede2816822015-05-28 22:28:40 +03001094struct mlx5_ifc_fte_match_param_bits {
1095 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1096
1097 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1098
1099 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1100
Matan Barakb4ff3a32016-02-09 14:57:42 +02001101 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001102};
1103
1104enum {
1105 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1106 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1107 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1108 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1109 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1110};
1111
1112struct mlx5_ifc_rx_hash_field_select_bits {
1113 u8 l3_prot_type[0x1];
1114 u8 l4_prot_type[0x1];
1115 u8 selected_fields[0x1e];
1116};
1117
1118enum {
1119 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1120 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1121};
1122
1123enum {
1124 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1125 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1126};
1127
1128struct mlx5_ifc_wq_bits {
1129 u8 wq_type[0x4];
1130 u8 wq_signature[0x1];
1131 u8 end_padding_mode[0x2];
1132 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001133 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001134
1135 u8 hds_skip_first_sge[0x1];
1136 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001137 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001138 u8 page_offset[0x5];
1139 u8 lwm[0x10];
1140
Matan Barakb4ff3a32016-02-09 14:57:42 +02001141 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001142 u8 pd[0x18];
1143
Matan Barakb4ff3a32016-02-09 14:57:42 +02001144 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001145 u8 uar_page[0x18];
1146
1147 u8 dbr_addr[0x40];
1148
1149 u8 hw_counter[0x20];
1150
1151 u8 sw_counter[0x20];
1152
Matan Barakb4ff3a32016-02-09 14:57:42 +02001153 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001154 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001155 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001156 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001157 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001158 u8 log_wq_sz[0x5];
1159
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001160 u8 reserved_at_120[0x15];
1161 u8 log_wqe_num_of_strides[0x3];
1162 u8 two_byte_shift_en[0x1];
1163 u8 reserved_at_139[0x4];
1164 u8 log_wqe_stride_size[0x3];
1165
1166 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001167
1168 struct mlx5_ifc_cmd_pas_bits pas[0];
1169};
1170
1171struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001172 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001173 u8 rq_num[0x18];
1174};
1175
1176struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001177 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001178 u8 mac_addr_47_32[0x10];
1179
1180 u8 mac_addr_31_0[0x20];
1181};
1182
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001183struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001184 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001185 u8 vlan[0x0c];
1186
Matan Barakb4ff3a32016-02-09 14:57:42 +02001187 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001188};
1189
Saeed Mahameede2816822015-05-28 22:28:40 +03001190struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001191 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001192
1193 u8 min_time_between_cnps[0x20];
1194
Matan Barakb4ff3a32016-02-09 14:57:42 +02001195 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001196 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001197 u8 reserved_at_d8[0x4];
1198 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001199 u8 cnp_802p_prio[0x3];
1200
Matan Barakb4ff3a32016-02-09 14:57:42 +02001201 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001202};
1203
1204struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001205 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001206
Matan Barakb4ff3a32016-02-09 14:57:42 +02001207 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001208 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001209 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001210 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001211 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001212
Matan Barakb4ff3a32016-02-09 14:57:42 +02001213 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001214
1215 u8 rpg_time_reset[0x20];
1216
1217 u8 rpg_byte_reset[0x20];
1218
1219 u8 rpg_threshold[0x20];
1220
1221 u8 rpg_max_rate[0x20];
1222
1223 u8 rpg_ai_rate[0x20];
1224
1225 u8 rpg_hai_rate[0x20];
1226
1227 u8 rpg_gd[0x20];
1228
1229 u8 rpg_min_dec_fac[0x20];
1230
1231 u8 rpg_min_rate[0x20];
1232
Matan Barakb4ff3a32016-02-09 14:57:42 +02001233 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001234
1235 u8 rate_to_set_on_first_cnp[0x20];
1236
1237 u8 dce_tcp_g[0x20];
1238
1239 u8 dce_tcp_rtt[0x20];
1240
1241 u8 rate_reduce_monitor_period[0x20];
1242
Matan Barakb4ff3a32016-02-09 14:57:42 +02001243 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001244
1245 u8 initial_alpha_value[0x20];
1246
Matan Barakb4ff3a32016-02-09 14:57:42 +02001247 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001248};
1249
1250struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001251 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001252
1253 u8 rppp_max_rps[0x20];
1254
1255 u8 rpg_time_reset[0x20];
1256
1257 u8 rpg_byte_reset[0x20];
1258
1259 u8 rpg_threshold[0x20];
1260
1261 u8 rpg_max_rate[0x20];
1262
1263 u8 rpg_ai_rate[0x20];
1264
1265 u8 rpg_hai_rate[0x20];
1266
1267 u8 rpg_gd[0x20];
1268
1269 u8 rpg_min_dec_fac[0x20];
1270
1271 u8 rpg_min_rate[0x20];
1272
Matan Barakb4ff3a32016-02-09 14:57:42 +02001273 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001274};
1275
1276enum {
1277 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1278 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1279 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1280};
1281
1282struct mlx5_ifc_resize_field_select_bits {
1283 u8 resize_field_select[0x20];
1284};
1285
1286enum {
1287 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1288 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1289 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1290 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1291};
1292
1293struct mlx5_ifc_modify_field_select_bits {
1294 u8 modify_field_select[0x20];
1295};
1296
1297struct mlx5_ifc_field_select_r_roce_np_bits {
1298 u8 field_select_r_roce_np[0x20];
1299};
1300
1301struct mlx5_ifc_field_select_r_roce_rp_bits {
1302 u8 field_select_r_roce_rp[0x20];
1303};
1304
1305enum {
1306 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1307 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1308 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1309 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1310 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1311 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1312 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1313 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1314 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1315 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1316};
1317
1318struct mlx5_ifc_field_select_802_1qau_rp_bits {
1319 u8 field_select_8021qaurp[0x20];
1320};
1321
1322struct mlx5_ifc_phys_layer_cntrs_bits {
1323 u8 time_since_last_clear_high[0x20];
1324
1325 u8 time_since_last_clear_low[0x20];
1326
1327 u8 symbol_errors_high[0x20];
1328
1329 u8 symbol_errors_low[0x20];
1330
1331 u8 sync_headers_errors_high[0x20];
1332
1333 u8 sync_headers_errors_low[0x20];
1334
1335 u8 edpl_bip_errors_lane0_high[0x20];
1336
1337 u8 edpl_bip_errors_lane0_low[0x20];
1338
1339 u8 edpl_bip_errors_lane1_high[0x20];
1340
1341 u8 edpl_bip_errors_lane1_low[0x20];
1342
1343 u8 edpl_bip_errors_lane2_high[0x20];
1344
1345 u8 edpl_bip_errors_lane2_low[0x20];
1346
1347 u8 edpl_bip_errors_lane3_high[0x20];
1348
1349 u8 edpl_bip_errors_lane3_low[0x20];
1350
1351 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1352
1353 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1354
1355 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1356
1357 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1358
1359 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1360
1361 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1362
1363 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1364
1365 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1366
1367 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1368
1369 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1370
1371 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1372
1373 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1374
1375 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1376
1377 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1378
1379 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1380
1381 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1382
1383 u8 rs_fec_corrected_blocks_high[0x20];
1384
1385 u8 rs_fec_corrected_blocks_low[0x20];
1386
1387 u8 rs_fec_uncorrectable_blocks_high[0x20];
1388
1389 u8 rs_fec_uncorrectable_blocks_low[0x20];
1390
1391 u8 rs_fec_no_errors_blocks_high[0x20];
1392
1393 u8 rs_fec_no_errors_blocks_low[0x20];
1394
1395 u8 rs_fec_single_error_blocks_high[0x20];
1396
1397 u8 rs_fec_single_error_blocks_low[0x20];
1398
1399 u8 rs_fec_corrected_symbols_total_high[0x20];
1400
1401 u8 rs_fec_corrected_symbols_total_low[0x20];
1402
1403 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1404
1405 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1406
1407 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1408
1409 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1410
1411 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1412
1413 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1414
1415 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1416
1417 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1418
1419 u8 link_down_events[0x20];
1420
1421 u8 successful_recovery_events[0x20];
1422
Matan Barakb4ff3a32016-02-09 14:57:42 +02001423 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001424};
1425
Gal Pressmand8dc0502016-09-27 17:04:51 +03001426struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1427 u8 time_since_last_clear_high[0x20];
1428
1429 u8 time_since_last_clear_low[0x20];
1430
1431 u8 phy_received_bits_high[0x20];
1432
1433 u8 phy_received_bits_low[0x20];
1434
1435 u8 phy_symbol_errors_high[0x20];
1436
1437 u8 phy_symbol_errors_low[0x20];
1438
1439 u8 phy_corrected_bits_high[0x20];
1440
1441 u8 phy_corrected_bits_low[0x20];
1442
1443 u8 phy_corrected_bits_lane0_high[0x20];
1444
1445 u8 phy_corrected_bits_lane0_low[0x20];
1446
1447 u8 phy_corrected_bits_lane1_high[0x20];
1448
1449 u8 phy_corrected_bits_lane1_low[0x20];
1450
1451 u8 phy_corrected_bits_lane2_high[0x20];
1452
1453 u8 phy_corrected_bits_lane2_low[0x20];
1454
1455 u8 phy_corrected_bits_lane3_high[0x20];
1456
1457 u8 phy_corrected_bits_lane3_low[0x20];
1458
1459 u8 reserved_at_200[0x5c0];
1460};
1461
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001462struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1463 u8 symbol_error_counter[0x10];
1464
1465 u8 link_error_recovery_counter[0x8];
1466
1467 u8 link_downed_counter[0x8];
1468
1469 u8 port_rcv_errors[0x10];
1470
1471 u8 port_rcv_remote_physical_errors[0x10];
1472
1473 u8 port_rcv_switch_relay_errors[0x10];
1474
1475 u8 port_xmit_discards[0x10];
1476
1477 u8 port_xmit_constraint_errors[0x8];
1478
1479 u8 port_rcv_constraint_errors[0x8];
1480
1481 u8 reserved_at_70[0x8];
1482
1483 u8 link_overrun_errors[0x8];
1484
1485 u8 reserved_at_80[0x10];
1486
1487 u8 vl_15_dropped[0x10];
1488
Tim Wright133bea02017-05-01 17:30:08 +01001489 u8 reserved_at_a0[0x80];
1490
1491 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001492};
1493
Saeed Mahameede2816822015-05-28 22:28:40 +03001494struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1495 u8 transmit_queue_high[0x20];
1496
1497 u8 transmit_queue_low[0x20];
1498
Matan Barakb4ff3a32016-02-09 14:57:42 +02001499 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001500};
1501
1502struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1503 u8 rx_octets_high[0x20];
1504
1505 u8 rx_octets_low[0x20];
1506
Matan Barakb4ff3a32016-02-09 14:57:42 +02001507 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001508
1509 u8 rx_frames_high[0x20];
1510
1511 u8 rx_frames_low[0x20];
1512
1513 u8 tx_octets_high[0x20];
1514
1515 u8 tx_octets_low[0x20];
1516
Matan Barakb4ff3a32016-02-09 14:57:42 +02001517 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001518
1519 u8 tx_frames_high[0x20];
1520
1521 u8 tx_frames_low[0x20];
1522
1523 u8 rx_pause_high[0x20];
1524
1525 u8 rx_pause_low[0x20];
1526
1527 u8 rx_pause_duration_high[0x20];
1528
1529 u8 rx_pause_duration_low[0x20];
1530
1531 u8 tx_pause_high[0x20];
1532
1533 u8 tx_pause_low[0x20];
1534
1535 u8 tx_pause_duration_high[0x20];
1536
1537 u8 tx_pause_duration_low[0x20];
1538
1539 u8 rx_pause_transition_high[0x20];
1540
1541 u8 rx_pause_transition_low[0x20];
1542
Matan Barakb4ff3a32016-02-09 14:57:42 +02001543 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001544};
1545
1546struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1547 u8 port_transmit_wait_high[0x20];
1548
1549 u8 port_transmit_wait_low[0x20];
1550
Matan Barakb4ff3a32016-02-09 14:57:42 +02001551 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001552};
1553
1554struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1555 u8 dot3stats_alignment_errors_high[0x20];
1556
1557 u8 dot3stats_alignment_errors_low[0x20];
1558
1559 u8 dot3stats_fcs_errors_high[0x20];
1560
1561 u8 dot3stats_fcs_errors_low[0x20];
1562
1563 u8 dot3stats_single_collision_frames_high[0x20];
1564
1565 u8 dot3stats_single_collision_frames_low[0x20];
1566
1567 u8 dot3stats_multiple_collision_frames_high[0x20];
1568
1569 u8 dot3stats_multiple_collision_frames_low[0x20];
1570
1571 u8 dot3stats_sqe_test_errors_high[0x20];
1572
1573 u8 dot3stats_sqe_test_errors_low[0x20];
1574
1575 u8 dot3stats_deferred_transmissions_high[0x20];
1576
1577 u8 dot3stats_deferred_transmissions_low[0x20];
1578
1579 u8 dot3stats_late_collisions_high[0x20];
1580
1581 u8 dot3stats_late_collisions_low[0x20];
1582
1583 u8 dot3stats_excessive_collisions_high[0x20];
1584
1585 u8 dot3stats_excessive_collisions_low[0x20];
1586
1587 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1588
1589 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1590
1591 u8 dot3stats_carrier_sense_errors_high[0x20];
1592
1593 u8 dot3stats_carrier_sense_errors_low[0x20];
1594
1595 u8 dot3stats_frame_too_longs_high[0x20];
1596
1597 u8 dot3stats_frame_too_longs_low[0x20];
1598
1599 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1600
1601 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1602
1603 u8 dot3stats_symbol_errors_high[0x20];
1604
1605 u8 dot3stats_symbol_errors_low[0x20];
1606
1607 u8 dot3control_in_unknown_opcodes_high[0x20];
1608
1609 u8 dot3control_in_unknown_opcodes_low[0x20];
1610
1611 u8 dot3in_pause_frames_high[0x20];
1612
1613 u8 dot3in_pause_frames_low[0x20];
1614
1615 u8 dot3out_pause_frames_high[0x20];
1616
1617 u8 dot3out_pause_frames_low[0x20];
1618
Matan Barakb4ff3a32016-02-09 14:57:42 +02001619 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001620};
1621
1622struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1623 u8 ether_stats_drop_events_high[0x20];
1624
1625 u8 ether_stats_drop_events_low[0x20];
1626
1627 u8 ether_stats_octets_high[0x20];
1628
1629 u8 ether_stats_octets_low[0x20];
1630
1631 u8 ether_stats_pkts_high[0x20];
1632
1633 u8 ether_stats_pkts_low[0x20];
1634
1635 u8 ether_stats_broadcast_pkts_high[0x20];
1636
1637 u8 ether_stats_broadcast_pkts_low[0x20];
1638
1639 u8 ether_stats_multicast_pkts_high[0x20];
1640
1641 u8 ether_stats_multicast_pkts_low[0x20];
1642
1643 u8 ether_stats_crc_align_errors_high[0x20];
1644
1645 u8 ether_stats_crc_align_errors_low[0x20];
1646
1647 u8 ether_stats_undersize_pkts_high[0x20];
1648
1649 u8 ether_stats_undersize_pkts_low[0x20];
1650
1651 u8 ether_stats_oversize_pkts_high[0x20];
1652
1653 u8 ether_stats_oversize_pkts_low[0x20];
1654
1655 u8 ether_stats_fragments_high[0x20];
1656
1657 u8 ether_stats_fragments_low[0x20];
1658
1659 u8 ether_stats_jabbers_high[0x20];
1660
1661 u8 ether_stats_jabbers_low[0x20];
1662
1663 u8 ether_stats_collisions_high[0x20];
1664
1665 u8 ether_stats_collisions_low[0x20];
1666
1667 u8 ether_stats_pkts64octets_high[0x20];
1668
1669 u8 ether_stats_pkts64octets_low[0x20];
1670
1671 u8 ether_stats_pkts65to127octets_high[0x20];
1672
1673 u8 ether_stats_pkts65to127octets_low[0x20];
1674
1675 u8 ether_stats_pkts128to255octets_high[0x20];
1676
1677 u8 ether_stats_pkts128to255octets_low[0x20];
1678
1679 u8 ether_stats_pkts256to511octets_high[0x20];
1680
1681 u8 ether_stats_pkts256to511octets_low[0x20];
1682
1683 u8 ether_stats_pkts512to1023octets_high[0x20];
1684
1685 u8 ether_stats_pkts512to1023octets_low[0x20];
1686
1687 u8 ether_stats_pkts1024to1518octets_high[0x20];
1688
1689 u8 ether_stats_pkts1024to1518octets_low[0x20];
1690
1691 u8 ether_stats_pkts1519to2047octets_high[0x20];
1692
1693 u8 ether_stats_pkts1519to2047octets_low[0x20];
1694
1695 u8 ether_stats_pkts2048to4095octets_high[0x20];
1696
1697 u8 ether_stats_pkts2048to4095octets_low[0x20];
1698
1699 u8 ether_stats_pkts4096to8191octets_high[0x20];
1700
1701 u8 ether_stats_pkts4096to8191octets_low[0x20];
1702
1703 u8 ether_stats_pkts8192to10239octets_high[0x20];
1704
1705 u8 ether_stats_pkts8192to10239octets_low[0x20];
1706
Matan Barakb4ff3a32016-02-09 14:57:42 +02001707 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001708};
1709
1710struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1711 u8 if_in_octets_high[0x20];
1712
1713 u8 if_in_octets_low[0x20];
1714
1715 u8 if_in_ucast_pkts_high[0x20];
1716
1717 u8 if_in_ucast_pkts_low[0x20];
1718
1719 u8 if_in_discards_high[0x20];
1720
1721 u8 if_in_discards_low[0x20];
1722
1723 u8 if_in_errors_high[0x20];
1724
1725 u8 if_in_errors_low[0x20];
1726
1727 u8 if_in_unknown_protos_high[0x20];
1728
1729 u8 if_in_unknown_protos_low[0x20];
1730
1731 u8 if_out_octets_high[0x20];
1732
1733 u8 if_out_octets_low[0x20];
1734
1735 u8 if_out_ucast_pkts_high[0x20];
1736
1737 u8 if_out_ucast_pkts_low[0x20];
1738
1739 u8 if_out_discards_high[0x20];
1740
1741 u8 if_out_discards_low[0x20];
1742
1743 u8 if_out_errors_high[0x20];
1744
1745 u8 if_out_errors_low[0x20];
1746
1747 u8 if_in_multicast_pkts_high[0x20];
1748
1749 u8 if_in_multicast_pkts_low[0x20];
1750
1751 u8 if_in_broadcast_pkts_high[0x20];
1752
1753 u8 if_in_broadcast_pkts_low[0x20];
1754
1755 u8 if_out_multicast_pkts_high[0x20];
1756
1757 u8 if_out_multicast_pkts_low[0x20];
1758
1759 u8 if_out_broadcast_pkts_high[0x20];
1760
1761 u8 if_out_broadcast_pkts_low[0x20];
1762
Matan Barakb4ff3a32016-02-09 14:57:42 +02001763 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001764};
1765
1766struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1767 u8 a_frames_transmitted_ok_high[0x20];
1768
1769 u8 a_frames_transmitted_ok_low[0x20];
1770
1771 u8 a_frames_received_ok_high[0x20];
1772
1773 u8 a_frames_received_ok_low[0x20];
1774
1775 u8 a_frame_check_sequence_errors_high[0x20];
1776
1777 u8 a_frame_check_sequence_errors_low[0x20];
1778
1779 u8 a_alignment_errors_high[0x20];
1780
1781 u8 a_alignment_errors_low[0x20];
1782
1783 u8 a_octets_transmitted_ok_high[0x20];
1784
1785 u8 a_octets_transmitted_ok_low[0x20];
1786
1787 u8 a_octets_received_ok_high[0x20];
1788
1789 u8 a_octets_received_ok_low[0x20];
1790
1791 u8 a_multicast_frames_xmitted_ok_high[0x20];
1792
1793 u8 a_multicast_frames_xmitted_ok_low[0x20];
1794
1795 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1796
1797 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1798
1799 u8 a_multicast_frames_received_ok_high[0x20];
1800
1801 u8 a_multicast_frames_received_ok_low[0x20];
1802
1803 u8 a_broadcast_frames_received_ok_high[0x20];
1804
1805 u8 a_broadcast_frames_received_ok_low[0x20];
1806
1807 u8 a_in_range_length_errors_high[0x20];
1808
1809 u8 a_in_range_length_errors_low[0x20];
1810
1811 u8 a_out_of_range_length_field_high[0x20];
1812
1813 u8 a_out_of_range_length_field_low[0x20];
1814
1815 u8 a_frame_too_long_errors_high[0x20];
1816
1817 u8 a_frame_too_long_errors_low[0x20];
1818
1819 u8 a_symbol_error_during_carrier_high[0x20];
1820
1821 u8 a_symbol_error_during_carrier_low[0x20];
1822
1823 u8 a_mac_control_frames_transmitted_high[0x20];
1824
1825 u8 a_mac_control_frames_transmitted_low[0x20];
1826
1827 u8 a_mac_control_frames_received_high[0x20];
1828
1829 u8 a_mac_control_frames_received_low[0x20];
1830
1831 u8 a_unsupported_opcodes_received_high[0x20];
1832
1833 u8 a_unsupported_opcodes_received_low[0x20];
1834
1835 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1836
1837 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1838
1839 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1840
1841 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1842
Matan Barakb4ff3a32016-02-09 14:57:42 +02001843 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001844};
1845
Gal Pressman8ed1a632016-11-17 13:46:01 +02001846struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1847 u8 life_time_counter_high[0x20];
1848
1849 u8 life_time_counter_low[0x20];
1850
1851 u8 rx_errors[0x20];
1852
1853 u8 tx_errors[0x20];
1854
1855 u8 l0_to_recovery_eieos[0x20];
1856
1857 u8 l0_to_recovery_ts[0x20];
1858
1859 u8 l0_to_recovery_framing[0x20];
1860
1861 u8 l0_to_recovery_retrain[0x20];
1862
1863 u8 crc_error_dllp[0x20];
1864
1865 u8 crc_error_tlp[0x20];
1866
1867 u8 reserved_at_140[0x680];
1868};
1869
Saeed Mahameede2816822015-05-28 22:28:40 +03001870struct mlx5_ifc_cmd_inter_comp_event_bits {
1871 u8 command_completion_vector[0x20];
1872
Matan Barakb4ff3a32016-02-09 14:57:42 +02001873 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001874};
1875
1876struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001877 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001878 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001879 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001880 u8 vl[0x4];
1881
Matan Barakb4ff3a32016-02-09 14:57:42 +02001882 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001883};
1884
1885struct mlx5_ifc_db_bf_congestion_event_bits {
1886 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001887 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001888 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001889 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001890
Matan Barakb4ff3a32016-02-09 14:57:42 +02001891 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001892};
1893
1894struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001895 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001896
1897 u8 gpio_event_hi[0x20];
1898
1899 u8 gpio_event_lo[0x20];
1900
Matan Barakb4ff3a32016-02-09 14:57:42 +02001901 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001902};
1903
1904struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001905 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001906
1907 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001908 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001909
Matan Barakb4ff3a32016-02-09 14:57:42 +02001910 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001911};
1912
1913struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001914 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001915};
1916
1917enum {
1918 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1919 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1920};
1921
1922struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001923 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001924 u8 cqn[0x18];
1925
Matan Barakb4ff3a32016-02-09 14:57:42 +02001926 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001927
Matan Barakb4ff3a32016-02-09 14:57:42 +02001928 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001929 u8 syndrome[0x8];
1930
Matan Barakb4ff3a32016-02-09 14:57:42 +02001931 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001932};
1933
1934struct mlx5_ifc_rdma_page_fault_event_bits {
1935 u8 bytes_committed[0x20];
1936
1937 u8 r_key[0x20];
1938
Matan Barakb4ff3a32016-02-09 14:57:42 +02001939 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001940 u8 packet_len[0x10];
1941
1942 u8 rdma_op_len[0x20];
1943
1944 u8 rdma_va[0x40];
1945
Matan Barakb4ff3a32016-02-09 14:57:42 +02001946 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001947 u8 rdma[0x1];
1948 u8 write[0x1];
1949 u8 requestor[0x1];
1950 u8 qp_number[0x18];
1951};
1952
1953struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1954 u8 bytes_committed[0x20];
1955
Matan Barakb4ff3a32016-02-09 14:57:42 +02001956 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001957 u8 wqe_index[0x10];
1958
Matan Barakb4ff3a32016-02-09 14:57:42 +02001959 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001960 u8 len[0x10];
1961
Matan Barakb4ff3a32016-02-09 14:57:42 +02001962 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001963
Matan Barakb4ff3a32016-02-09 14:57:42 +02001964 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001965 u8 rdma[0x1];
1966 u8 write_read[0x1];
1967 u8 requestor[0x1];
1968 u8 qpn[0x18];
1969};
1970
1971struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001972 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001973
1974 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001975 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001976
Matan Barakb4ff3a32016-02-09 14:57:42 +02001977 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001978 u8 qpn_rqn_sqn[0x18];
1979};
1980
1981struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001982 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001983
Matan Barakb4ff3a32016-02-09 14:57:42 +02001984 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001985 u8 dct_number[0x18];
1986};
1987
1988struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001989 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001990
Matan Barakb4ff3a32016-02-09 14:57:42 +02001991 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001992 u8 cq_number[0x18];
1993};
1994
1995enum {
1996 MLX5_QPC_STATE_RST = 0x0,
1997 MLX5_QPC_STATE_INIT = 0x1,
1998 MLX5_QPC_STATE_RTR = 0x2,
1999 MLX5_QPC_STATE_RTS = 0x3,
2000 MLX5_QPC_STATE_SQER = 0x4,
2001 MLX5_QPC_STATE_ERR = 0x6,
2002 MLX5_QPC_STATE_SQD = 0x7,
2003 MLX5_QPC_STATE_SUSPENDED = 0x9,
2004};
2005
2006enum {
2007 MLX5_QPC_ST_RC = 0x0,
2008 MLX5_QPC_ST_UC = 0x1,
2009 MLX5_QPC_ST_UD = 0x2,
2010 MLX5_QPC_ST_XRC = 0x3,
2011 MLX5_QPC_ST_DCI = 0x5,
2012 MLX5_QPC_ST_QP0 = 0x7,
2013 MLX5_QPC_ST_QP1 = 0x8,
2014 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2015 MLX5_QPC_ST_REG_UMR = 0xc,
2016};
2017
2018enum {
2019 MLX5_QPC_PM_STATE_ARMED = 0x0,
2020 MLX5_QPC_PM_STATE_REARM = 0x1,
2021 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2022 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2023};
2024
2025enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002026 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2027};
2028
2029enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002030 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2031 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2032};
2033
2034enum {
2035 MLX5_QPC_MTU_256_BYTES = 0x1,
2036 MLX5_QPC_MTU_512_BYTES = 0x2,
2037 MLX5_QPC_MTU_1K_BYTES = 0x3,
2038 MLX5_QPC_MTU_2K_BYTES = 0x4,
2039 MLX5_QPC_MTU_4K_BYTES = 0x5,
2040 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2041};
2042
2043enum {
2044 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2045 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2046 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2047 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2048 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2049 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2050 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2051 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2052};
2053
2054enum {
2055 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2056 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2057 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2058};
2059
2060enum {
2061 MLX5_QPC_CS_RES_DISABLE = 0x0,
2062 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2063 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2064};
2065
2066struct mlx5_ifc_qpc_bits {
2067 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002068 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002069 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002070 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002071 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002072 u8 reserved_at_15[0x3];
2073 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002074 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002075 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002076
2077 u8 wq_signature[0x1];
2078 u8 block_lb_mc[0x1];
2079 u8 atomic_like_write_en[0x1];
2080 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002081 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002082 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002083 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002084 u8 pd[0x18];
2085
2086 u8 mtu[0x3];
2087 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002088 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002089 u8 log_rq_size[0x4];
2090 u8 log_rq_stride[0x3];
2091 u8 no_sq[0x1];
2092 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002093 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002094 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002095 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002096
2097 u8 counter_set_id[0x8];
2098 u8 uar_page[0x18];
2099
Matan Barakb4ff3a32016-02-09 14:57:42 +02002100 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002101 u8 user_index[0x18];
2102
Matan Barakb4ff3a32016-02-09 14:57:42 +02002103 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002104 u8 log_page_size[0x5];
2105 u8 remote_qpn[0x18];
2106
2107 struct mlx5_ifc_ads_bits primary_address_path;
2108
2109 struct mlx5_ifc_ads_bits secondary_address_path;
2110
2111 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002112 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002113 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002114 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002115 u8 retry_count[0x3];
2116 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002117 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002118 u8 fre[0x1];
2119 u8 cur_rnr_retry[0x3];
2120 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002121 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002122
Matan Barakb4ff3a32016-02-09 14:57:42 +02002123 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002124
Matan Barakb4ff3a32016-02-09 14:57:42 +02002125 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002126 u8 next_send_psn[0x18];
2127
Matan Barakb4ff3a32016-02-09 14:57:42 +02002128 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002129 u8 cqn_snd[0x18];
2130
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002131 u8 reserved_at_400[0x8];
2132 u8 deth_sqpn[0x18];
2133
2134 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002135
Matan Barakb4ff3a32016-02-09 14:57:42 +02002136 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002137 u8 last_acked_psn[0x18];
2138
Matan Barakb4ff3a32016-02-09 14:57:42 +02002139 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002140 u8 ssn[0x18];
2141
Matan Barakb4ff3a32016-02-09 14:57:42 +02002142 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002143 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002144 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002145 u8 atomic_mode[0x4];
2146 u8 rre[0x1];
2147 u8 rwe[0x1];
2148 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002149 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002150 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002151 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002152 u8 cd_slave_receive[0x1];
2153 u8 cd_slave_send[0x1];
2154 u8 cd_master[0x1];
2155
Matan Barakb4ff3a32016-02-09 14:57:42 +02002156 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002157 u8 min_rnr_nak[0x5];
2158 u8 next_rcv_psn[0x18];
2159
Matan Barakb4ff3a32016-02-09 14:57:42 +02002160 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002161 u8 xrcd[0x18];
2162
Matan Barakb4ff3a32016-02-09 14:57:42 +02002163 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002164 u8 cqn_rcv[0x18];
2165
2166 u8 dbr_addr[0x40];
2167
2168 u8 q_key[0x20];
2169
Matan Barakb4ff3a32016-02-09 14:57:42 +02002170 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002171 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002172 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002173
Matan Barakb4ff3a32016-02-09 14:57:42 +02002174 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002175 u8 rmsn[0x18];
2176
2177 u8 hw_sq_wqebb_counter[0x10];
2178 u8 sw_sq_wqebb_counter[0x10];
2179
2180 u8 hw_rq_counter[0x20];
2181
2182 u8 sw_rq_counter[0x20];
2183
Matan Barakb4ff3a32016-02-09 14:57:42 +02002184 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002185
Matan Barakb4ff3a32016-02-09 14:57:42 +02002186 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002187 u8 cgs[0x1];
2188 u8 cs_req[0x8];
2189 u8 cs_res[0x8];
2190
2191 u8 dc_access_key[0x40];
2192
Matan Barakb4ff3a32016-02-09 14:57:42 +02002193 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002194};
2195
2196struct mlx5_ifc_roce_addr_layout_bits {
2197 u8 source_l3_address[16][0x8];
2198
Matan Barakb4ff3a32016-02-09 14:57:42 +02002199 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002200 u8 vlan_valid[0x1];
2201 u8 vlan_id[0xc];
2202 u8 source_mac_47_32[0x10];
2203
2204 u8 source_mac_31_0[0x20];
2205
Matan Barakb4ff3a32016-02-09 14:57:42 +02002206 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002207 u8 roce_l3_type[0x4];
2208 u8 roce_version[0x8];
2209
Matan Barakb4ff3a32016-02-09 14:57:42 +02002210 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002211};
2212
2213union mlx5_ifc_hca_cap_union_bits {
2214 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2215 struct mlx5_ifc_odp_cap_bits odp_cap;
2216 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2217 struct mlx5_ifc_roce_cap_bits roce_cap;
2218 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2219 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002220 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002221 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002222 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002223 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002224 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002225 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002226};
2227
2228enum {
2229 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2230 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2231 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002232 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002233 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2234 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002235 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002236};
2237
2238struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002239 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002240
2241 u8 group_id[0x20];
2242
Matan Barakb4ff3a32016-02-09 14:57:42 +02002243 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002244 u8 flow_tag[0x18];
2245
Matan Barakb4ff3a32016-02-09 14:57:42 +02002246 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002247 u8 action[0x10];
2248
Matan Barakb4ff3a32016-02-09 14:57:42 +02002249 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002250 u8 destination_list_size[0x18];
2251
Amir Vadai9dc0b282016-05-13 12:55:39 +00002252 u8 reserved_at_a0[0x8];
2253 u8 flow_counter_list_size[0x18];
2254
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002255 u8 encap_id[0x20];
2256
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002257 u8 modify_header_id[0x20];
2258
2259 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002260
2261 struct mlx5_ifc_fte_match_param_bits match_value;
2262
Matan Barakb4ff3a32016-02-09 14:57:42 +02002263 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002264
Amir Vadai9dc0b282016-05-13 12:55:39 +00002265 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002266};
2267
2268enum {
2269 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2270 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2271};
2272
2273struct mlx5_ifc_xrc_srqc_bits {
2274 u8 state[0x4];
2275 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002276 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002277
2278 u8 wq_signature[0x1];
2279 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002280 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002281 u8 rlky[0x1];
2282 u8 basic_cyclic_rcv_wqe[0x1];
2283 u8 log_rq_stride[0x3];
2284 u8 xrcd[0x18];
2285
2286 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002287 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002288 u8 cqn[0x18];
2289
Matan Barakb4ff3a32016-02-09 14:57:42 +02002290 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002291
2292 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002293 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002294 u8 log_page_size[0x6];
2295 u8 user_index[0x18];
2296
Matan Barakb4ff3a32016-02-09 14:57:42 +02002297 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002298
Matan Barakb4ff3a32016-02-09 14:57:42 +02002299 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002300 u8 pd[0x18];
2301
2302 u8 lwm[0x10];
2303 u8 wqe_cnt[0x10];
2304
Matan Barakb4ff3a32016-02-09 14:57:42 +02002305 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002306
2307 u8 db_record_addr_h[0x20];
2308
2309 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002310 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002311
Matan Barakb4ff3a32016-02-09 14:57:42 +02002312 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002313};
2314
2315struct mlx5_ifc_traffic_counter_bits {
2316 u8 packets[0x40];
2317
2318 u8 octets[0x40];
2319};
2320
2321struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002322 u8 strict_lag_tx_port_affinity[0x1];
2323 u8 reserved_at_1[0x3];
2324 u8 lag_tx_port_affinity[0x04];
2325
2326 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002327 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002328 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002329
Matan Barakb4ff3a32016-02-09 14:57:42 +02002330 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002331
Matan Barakb4ff3a32016-02-09 14:57:42 +02002332 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002333 u8 transport_domain[0x18];
2334
Erez Shitrit500a3d02017-04-13 06:36:51 +03002335 u8 reserved_at_140[0x8];
2336 u8 underlay_qpn[0x18];
2337 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002338};
2339
2340enum {
2341 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2342 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2343};
2344
2345enum {
2346 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2347 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2348};
2349
2350enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002351 MLX5_RX_HASH_FN_NONE = 0x0,
2352 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2353 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002354};
2355
2356enum {
2357 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2358 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2359};
2360
2361struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002362 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002363
2364 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002365 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002366
Matan Barakb4ff3a32016-02-09 14:57:42 +02002367 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002368
Matan Barakb4ff3a32016-02-09 14:57:42 +02002369 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002370 u8 lro_timeout_period_usecs[0x10];
2371 u8 lro_enable_mask[0x4];
2372 u8 lro_max_ip_payload_size[0x8];
2373
Matan Barakb4ff3a32016-02-09 14:57:42 +02002374 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002375
Matan Barakb4ff3a32016-02-09 14:57:42 +02002376 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002377 u8 inline_rqn[0x18];
2378
2379 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002380 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002381 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002382 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002383 u8 indirect_table[0x18];
2384
2385 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002386 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002387 u8 self_lb_block[0x2];
2388 u8 transport_domain[0x18];
2389
2390 u8 rx_hash_toeplitz_key[10][0x20];
2391
2392 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2393
2394 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2395
Matan Barakb4ff3a32016-02-09 14:57:42 +02002396 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002397};
2398
2399enum {
2400 MLX5_SRQC_STATE_GOOD = 0x0,
2401 MLX5_SRQC_STATE_ERROR = 0x1,
2402};
2403
2404struct mlx5_ifc_srqc_bits {
2405 u8 state[0x4];
2406 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002407 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002408
2409 u8 wq_signature[0x1];
2410 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002411 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002412 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002413 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002414 u8 log_rq_stride[0x3];
2415 u8 xrcd[0x18];
2416
2417 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002418 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002419 u8 cqn[0x18];
2420
Matan Barakb4ff3a32016-02-09 14:57:42 +02002421 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002422
Matan Barakb4ff3a32016-02-09 14:57:42 +02002423 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002424 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002425 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002426
Matan Barakb4ff3a32016-02-09 14:57:42 +02002427 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002428
Matan Barakb4ff3a32016-02-09 14:57:42 +02002429 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002430 u8 pd[0x18];
2431
2432 u8 lwm[0x10];
2433 u8 wqe_cnt[0x10];
2434
Matan Barakb4ff3a32016-02-09 14:57:42 +02002435 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002436
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002437 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002438
Matan Barakb4ff3a32016-02-09 14:57:42 +02002439 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002440};
2441
2442enum {
2443 MLX5_SQC_STATE_RST = 0x0,
2444 MLX5_SQC_STATE_RDY = 0x1,
2445 MLX5_SQC_STATE_ERR = 0x3,
2446};
2447
2448struct mlx5_ifc_sqc_bits {
2449 u8 rlky[0x1];
2450 u8 cd_master[0x1];
2451 u8 fre[0x1];
2452 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002453 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002454 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002455 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002456 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002457 u8 allow_swp[0x1];
2458 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002459
Matan Barakb4ff3a32016-02-09 14:57:42 +02002460 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002461 u8 user_index[0x18];
2462
Matan Barakb4ff3a32016-02-09 14:57:42 +02002463 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002464 u8 cqn[0x18];
2465
Saeed Mahameed74862162016-06-09 15:11:34 +03002466 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002467
Saeed Mahameed74862162016-06-09 15:11:34 +03002468 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002469 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002470 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002471
Matan Barakb4ff3a32016-02-09 14:57:42 +02002472 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002473
Matan Barakb4ff3a32016-02-09 14:57:42 +02002474 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002475 u8 tis_num_0[0x18];
2476
2477 struct mlx5_ifc_wq_bits wq;
2478};
2479
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002480enum {
2481 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2482 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2483 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2484 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2485};
2486
2487struct mlx5_ifc_scheduling_context_bits {
2488 u8 element_type[0x8];
2489 u8 reserved_at_8[0x18];
2490
2491 u8 element_attributes[0x20];
2492
2493 u8 parent_element_id[0x20];
2494
2495 u8 reserved_at_60[0x40];
2496
2497 u8 bw_share[0x20];
2498
2499 u8 max_average_bw[0x20];
2500
2501 u8 reserved_at_e0[0x120];
2502};
2503
Saeed Mahameede2816822015-05-28 22:28:40 +03002504struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002505 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002506
Matan Barakb4ff3a32016-02-09 14:57:42 +02002507 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002508 u8 rqt_max_size[0x10];
2509
Matan Barakb4ff3a32016-02-09 14:57:42 +02002510 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002511 u8 rqt_actual_size[0x10];
2512
Matan Barakb4ff3a32016-02-09 14:57:42 +02002513 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002514
2515 struct mlx5_ifc_rq_num_bits rq_num[0];
2516};
2517
2518enum {
2519 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2520 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2521};
2522
2523enum {
2524 MLX5_RQC_STATE_RST = 0x0,
2525 MLX5_RQC_STATE_RDY = 0x1,
2526 MLX5_RQC_STATE_ERR = 0x3,
2527};
2528
2529struct mlx5_ifc_rqc_bits {
2530 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002531 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002532 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002533 u8 vsd[0x1];
2534 u8 mem_rq_type[0x4];
2535 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002536 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002537 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002538 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002539
Matan Barakb4ff3a32016-02-09 14:57:42 +02002540 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002541 u8 user_index[0x18];
2542
Matan Barakb4ff3a32016-02-09 14:57:42 +02002543 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002544 u8 cqn[0x18];
2545
2546 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002547 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002548
Matan Barakb4ff3a32016-02-09 14:57:42 +02002549 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002550 u8 rmpn[0x18];
2551
Matan Barakb4ff3a32016-02-09 14:57:42 +02002552 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002553
2554 struct mlx5_ifc_wq_bits wq;
2555};
2556
2557enum {
2558 MLX5_RMPC_STATE_RDY = 0x1,
2559 MLX5_RMPC_STATE_ERR = 0x3,
2560};
2561
2562struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002563 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002564 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002565 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002566
2567 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002568 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002569
Matan Barakb4ff3a32016-02-09 14:57:42 +02002570 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002571
2572 struct mlx5_ifc_wq_bits wq;
2573};
2574
Saeed Mahameede2816822015-05-28 22:28:40 +03002575struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002576 u8 reserved_at_0[0x5];
2577 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002578 u8 reserved_at_8[0x15];
2579 u8 disable_mc_local_lb[0x1];
2580 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002581 u8 roce_en[0x1];
2582
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002583 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002584 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002585 u8 event_on_mtu[0x1];
2586 u8 event_on_promisc_change[0x1];
2587 u8 event_on_vlan_change[0x1];
2588 u8 event_on_mc_address_change[0x1];
2589 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002590
Matan Barakb4ff3a32016-02-09 14:57:42 +02002591 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002592
2593 u8 mtu[0x10];
2594
Achiad Shochat9efa7522015-12-23 18:47:20 +02002595 u8 system_image_guid[0x40];
2596 u8 port_guid[0x40];
2597 u8 node_guid[0x40];
2598
Matan Barakb4ff3a32016-02-09 14:57:42 +02002599 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002600 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002601 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002602
2603 u8 promisc_uc[0x1];
2604 u8 promisc_mc[0x1];
2605 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002606 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002607 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002608 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002609 u8 allowed_list_size[0xc];
2610
2611 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2612
Matan Barakb4ff3a32016-02-09 14:57:42 +02002613 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002614
2615 u8 current_uc_mac_address[0][0x40];
2616};
2617
2618enum {
2619 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2620 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2621 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002622 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002623};
2624
2625struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002626 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002627 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002628 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002629 u8 small_fence_on_rdma_read_response[0x1];
2630 u8 umr_en[0x1];
2631 u8 a[0x1];
2632 u8 rw[0x1];
2633 u8 rr[0x1];
2634 u8 lw[0x1];
2635 u8 lr[0x1];
2636 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002637 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002638
2639 u8 qpn[0x18];
2640 u8 mkey_7_0[0x8];
2641
Matan Barakb4ff3a32016-02-09 14:57:42 +02002642 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002643
2644 u8 length64[0x1];
2645 u8 bsf_en[0x1];
2646 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002647 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002648 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002649 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002650 u8 en_rinval[0x1];
2651 u8 pd[0x18];
2652
2653 u8 start_addr[0x40];
2654
2655 u8 len[0x40];
2656
2657 u8 bsf_octword_size[0x20];
2658
Matan Barakb4ff3a32016-02-09 14:57:42 +02002659 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002660
2661 u8 translations_octword_size[0x20];
2662
Matan Barakb4ff3a32016-02-09 14:57:42 +02002663 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002664 u8 log_page_size[0x5];
2665
Matan Barakb4ff3a32016-02-09 14:57:42 +02002666 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002667};
2668
2669struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002670 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002671 u8 pkey[0x10];
2672};
2673
2674struct mlx5_ifc_array128_auto_bits {
2675 u8 array128_auto[16][0x8];
2676};
2677
2678struct mlx5_ifc_hca_vport_context_bits {
2679 u8 field_select[0x20];
2680
Matan Barakb4ff3a32016-02-09 14:57:42 +02002681 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002682
2683 u8 sm_virt_aware[0x1];
2684 u8 has_smi[0x1];
2685 u8 has_raw[0x1];
2686 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002687 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002688 u8 port_physical_state[0x4];
2689 u8 vport_state_policy[0x4];
2690 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002691 u8 vport_state[0x4];
2692
Matan Barakb4ff3a32016-02-09 14:57:42 +02002693 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002694
2695 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002696
2697 u8 port_guid[0x40];
2698
2699 u8 node_guid[0x40];
2700
2701 u8 cap_mask1[0x20];
2702
2703 u8 cap_mask1_field_select[0x20];
2704
2705 u8 cap_mask2[0x20];
2706
2707 u8 cap_mask2_field_select[0x20];
2708
Matan Barakb4ff3a32016-02-09 14:57:42 +02002709 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002710
2711 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002712 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002713 u8 init_type_reply[0x4];
2714 u8 lmc[0x3];
2715 u8 subnet_timeout[0x5];
2716
2717 u8 sm_lid[0x10];
2718 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002719 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002720
2721 u8 qkey_violation_counter[0x10];
2722 u8 pkey_violation_counter[0x10];
2723
Matan Barakb4ff3a32016-02-09 14:57:42 +02002724 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002725};
2726
Saeed Mahameedd6666752015-12-01 18:03:22 +02002727struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002728 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002729 u8 vport_svlan_strip[0x1];
2730 u8 vport_cvlan_strip[0x1];
2731 u8 vport_svlan_insert[0x1];
2732 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002733 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002734
Matan Barakb4ff3a32016-02-09 14:57:42 +02002735 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002736
2737 u8 svlan_cfi[0x1];
2738 u8 svlan_pcp[0x3];
2739 u8 svlan_id[0xc];
2740 u8 cvlan_cfi[0x1];
2741 u8 cvlan_pcp[0x3];
2742 u8 cvlan_id[0xc];
2743
Matan Barakb4ff3a32016-02-09 14:57:42 +02002744 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002745};
2746
Saeed Mahameede2816822015-05-28 22:28:40 +03002747enum {
2748 MLX5_EQC_STATUS_OK = 0x0,
2749 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2750};
2751
2752enum {
2753 MLX5_EQC_ST_ARMED = 0x9,
2754 MLX5_EQC_ST_FIRED = 0xa,
2755};
2756
2757struct mlx5_ifc_eqc_bits {
2758 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002759 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002760 u8 ec[0x1];
2761 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002762 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002763 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002764 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002765
Matan Barakb4ff3a32016-02-09 14:57:42 +02002766 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002767
Matan Barakb4ff3a32016-02-09 14:57:42 +02002768 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002769 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002770 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002771
Matan Barakb4ff3a32016-02-09 14:57:42 +02002772 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002773 u8 log_eq_size[0x5];
2774 u8 uar_page[0x18];
2775
Matan Barakb4ff3a32016-02-09 14:57:42 +02002776 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002777
Matan Barakb4ff3a32016-02-09 14:57:42 +02002778 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002779 u8 intr[0x8];
2780
Matan Barakb4ff3a32016-02-09 14:57:42 +02002781 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002782 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002783 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002784
Matan Barakb4ff3a32016-02-09 14:57:42 +02002785 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002786
Matan Barakb4ff3a32016-02-09 14:57:42 +02002787 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002788 u8 consumer_counter[0x18];
2789
Matan Barakb4ff3a32016-02-09 14:57:42 +02002790 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002791 u8 producer_counter[0x18];
2792
Matan Barakb4ff3a32016-02-09 14:57:42 +02002793 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002794};
2795
2796enum {
2797 MLX5_DCTC_STATE_ACTIVE = 0x0,
2798 MLX5_DCTC_STATE_DRAINING = 0x1,
2799 MLX5_DCTC_STATE_DRAINED = 0x2,
2800};
2801
2802enum {
2803 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2804 MLX5_DCTC_CS_RES_NA = 0x1,
2805 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2806};
2807
2808enum {
2809 MLX5_DCTC_MTU_256_BYTES = 0x1,
2810 MLX5_DCTC_MTU_512_BYTES = 0x2,
2811 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2812 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2813 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2814};
2815
2816struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002817 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002818 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002819 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002820
Matan Barakb4ff3a32016-02-09 14:57:42 +02002821 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002822 u8 user_index[0x18];
2823
Matan Barakb4ff3a32016-02-09 14:57:42 +02002824 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002825 u8 cqn[0x18];
2826
2827 u8 counter_set_id[0x8];
2828 u8 atomic_mode[0x4];
2829 u8 rre[0x1];
2830 u8 rwe[0x1];
2831 u8 rae[0x1];
2832 u8 atomic_like_write_en[0x1];
2833 u8 latency_sensitive[0x1];
2834 u8 rlky[0x1];
2835 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002836 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002837
Matan Barakb4ff3a32016-02-09 14:57:42 +02002838 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002839 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002840 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002841 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002842 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002843
Matan Barakb4ff3a32016-02-09 14:57:42 +02002844 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002845 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002846
Matan Barakb4ff3a32016-02-09 14:57:42 +02002847 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002848 u8 pd[0x18];
2849
2850 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002851 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002852 u8 flow_label[0x14];
2853
2854 u8 dc_access_key[0x40];
2855
Matan Barakb4ff3a32016-02-09 14:57:42 +02002856 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002857 u8 mtu[0x3];
2858 u8 port[0x8];
2859 u8 pkey_index[0x10];
2860
Matan Barakb4ff3a32016-02-09 14:57:42 +02002861 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002862 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002863 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002864 u8 hop_limit[0x8];
2865
2866 u8 dc_access_key_violation_count[0x20];
2867
Matan Barakb4ff3a32016-02-09 14:57:42 +02002868 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002869 u8 dei_cfi[0x1];
2870 u8 eth_prio[0x3];
2871 u8 ecn[0x2];
2872 u8 dscp[0x6];
2873
Matan Barakb4ff3a32016-02-09 14:57:42 +02002874 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002875};
2876
2877enum {
2878 MLX5_CQC_STATUS_OK = 0x0,
2879 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2880 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2881};
2882
2883enum {
2884 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2885 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2886};
2887
2888enum {
2889 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2890 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2891 MLX5_CQC_ST_FIRED = 0xa,
2892};
2893
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002894enum {
2895 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2896 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002897 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002898};
2899
Saeed Mahameede2816822015-05-28 22:28:40 +03002900struct mlx5_ifc_cqc_bits {
2901 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002902 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002903 u8 cqe_sz[0x3];
2904 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002905 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002906 u8 scqe_break_moderation_en[0x1];
2907 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002908 u8 cq_period_mode[0x2];
2909 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002910 u8 mini_cqe_res_format[0x2];
2911 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002912 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002913
Matan Barakb4ff3a32016-02-09 14:57:42 +02002914 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002915
Matan Barakb4ff3a32016-02-09 14:57:42 +02002916 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002917 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002918 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002919
Matan Barakb4ff3a32016-02-09 14:57:42 +02002920 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002921 u8 log_cq_size[0x5];
2922 u8 uar_page[0x18];
2923
Matan Barakb4ff3a32016-02-09 14:57:42 +02002924 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002925 u8 cq_period[0xc];
2926 u8 cq_max_count[0x10];
2927
Matan Barakb4ff3a32016-02-09 14:57:42 +02002928 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002929 u8 c_eqn[0x8];
2930
Matan Barakb4ff3a32016-02-09 14:57:42 +02002931 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002932 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002933 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002934
Matan Barakb4ff3a32016-02-09 14:57:42 +02002935 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002936
Matan Barakb4ff3a32016-02-09 14:57:42 +02002937 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002938 u8 last_notified_index[0x18];
2939
Matan Barakb4ff3a32016-02-09 14:57:42 +02002940 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002941 u8 last_solicit_index[0x18];
2942
Matan Barakb4ff3a32016-02-09 14:57:42 +02002943 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002944 u8 consumer_counter[0x18];
2945
Matan Barakb4ff3a32016-02-09 14:57:42 +02002946 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002947 u8 producer_counter[0x18];
2948
Matan Barakb4ff3a32016-02-09 14:57:42 +02002949 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002950
2951 u8 dbr_addr[0x40];
2952};
2953
2954union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2955 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2956 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2957 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002958 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002959};
2960
2961struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002962 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002963
Matan Barakb4ff3a32016-02-09 14:57:42 +02002964 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002965 u8 ieee_vendor_id[0x18];
2966
Matan Barakb4ff3a32016-02-09 14:57:42 +02002967 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002968 u8 vsd_vendor_id[0x10];
2969
2970 u8 vsd[208][0x8];
2971
2972 u8 vsd_contd_psid[16][0x8];
2973};
2974
Saeed Mahameed74862162016-06-09 15:11:34 +03002975enum {
2976 MLX5_XRQC_STATE_GOOD = 0x0,
2977 MLX5_XRQC_STATE_ERROR = 0x1,
2978};
2979
2980enum {
2981 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
2982 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
2983};
2984
2985enum {
2986 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
2987};
2988
2989struct mlx5_ifc_tag_matching_topology_context_bits {
2990 u8 log_matching_list_sz[0x4];
2991 u8 reserved_at_4[0xc];
2992 u8 append_next_index[0x10];
2993
2994 u8 sw_phase_cnt[0x10];
2995 u8 hw_phase_cnt[0x10];
2996
2997 u8 reserved_at_40[0x40];
2998};
2999
3000struct mlx5_ifc_xrqc_bits {
3001 u8 state[0x4];
3002 u8 rlkey[0x1];
3003 u8 reserved_at_5[0xf];
3004 u8 topology[0x4];
3005 u8 reserved_at_18[0x4];
3006 u8 offload[0x4];
3007
3008 u8 reserved_at_20[0x8];
3009 u8 user_index[0x18];
3010
3011 u8 reserved_at_40[0x8];
3012 u8 cqn[0x18];
3013
3014 u8 reserved_at_60[0xa0];
3015
3016 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3017
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003018 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003019
3020 struct mlx5_ifc_wq_bits wq;
3021};
3022
Saeed Mahameede2816822015-05-28 22:28:40 +03003023union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3024 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3025 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003026 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003027};
3028
3029union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3030 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3031 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3032 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003033 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003034};
3035
3036union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3037 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3038 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3039 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3040 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3041 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3042 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3043 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003044 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003045 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003046 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003047 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003048};
3049
Gal Pressman8ed1a632016-11-17 13:46:01 +02003050union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3051 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3052 u8 reserved_at_0[0x7c0];
3053};
3054
Saeed Mahameede2816822015-05-28 22:28:40 +03003055union mlx5_ifc_event_auto_bits {
3056 struct mlx5_ifc_comp_event_bits comp_event;
3057 struct mlx5_ifc_dct_events_bits dct_events;
3058 struct mlx5_ifc_qp_events_bits qp_events;
3059 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3060 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3061 struct mlx5_ifc_cq_error_bits cq_error;
3062 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3063 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3064 struct mlx5_ifc_gpio_event_bits gpio_event;
3065 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3066 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3067 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003068 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003069};
3070
3071struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003072 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003073
3074 u8 assert_existptr[0x20];
3075
3076 u8 assert_callra[0x20];
3077
Matan Barakb4ff3a32016-02-09 14:57:42 +02003078 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003079
3080 u8 fw_version[0x20];
3081
3082 u8 hw_id[0x20];
3083
Matan Barakb4ff3a32016-02-09 14:57:42 +02003084 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003085
3086 u8 irisc_index[0x8];
3087 u8 synd[0x8];
3088 u8 ext_synd[0x10];
3089};
3090
3091struct mlx5_ifc_register_loopback_control_bits {
3092 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003093 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003094 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003095 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003096
Matan Barakb4ff3a32016-02-09 14:57:42 +02003097 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003098};
3099
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003100struct mlx5_ifc_vport_tc_element_bits {
3101 u8 traffic_class[0x4];
3102 u8 reserved_at_4[0xc];
3103 u8 vport_number[0x10];
3104};
3105
3106struct mlx5_ifc_vport_element_bits {
3107 u8 reserved_at_0[0x10];
3108 u8 vport_number[0x10];
3109};
3110
3111enum {
3112 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3113 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3114 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3115};
3116
3117struct mlx5_ifc_tsar_element_bits {
3118 u8 reserved_at_0[0x8];
3119 u8 tsar_type[0x8];
3120 u8 reserved_at_10[0x10];
3121};
3122
Majd Dibbiny8812c242017-02-09 14:20:12 +02003123enum {
3124 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3125 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3126};
3127
Saeed Mahameede2816822015-05-28 22:28:40 +03003128struct mlx5_ifc_teardown_hca_out_bits {
3129 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003130 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003131
3132 u8 syndrome[0x20];
3133
Majd Dibbiny8812c242017-02-09 14:20:12 +02003134 u8 reserved_at_40[0x3f];
3135
3136 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003137};
3138
3139enum {
3140 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003141 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003142};
3143
3144struct mlx5_ifc_teardown_hca_in_bits {
3145 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003146 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003147
Matan Barakb4ff3a32016-02-09 14:57:42 +02003148 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003149 u8 op_mod[0x10];
3150
Matan Barakb4ff3a32016-02-09 14:57:42 +02003151 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003152 u8 profile[0x10];
3153
Matan Barakb4ff3a32016-02-09 14:57:42 +02003154 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003155};
3156
3157struct mlx5_ifc_sqerr2rts_qp_out_bits {
3158 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003159 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003160
3161 u8 syndrome[0x20];
3162
Matan Barakb4ff3a32016-02-09 14:57:42 +02003163 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003164};
3165
3166struct mlx5_ifc_sqerr2rts_qp_in_bits {
3167 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003168 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003169
Matan Barakb4ff3a32016-02-09 14:57:42 +02003170 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003171 u8 op_mod[0x10];
3172
Matan Barakb4ff3a32016-02-09 14:57:42 +02003173 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003174 u8 qpn[0x18];
3175
Matan Barakb4ff3a32016-02-09 14:57:42 +02003176 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003177
3178 u8 opt_param_mask[0x20];
3179
Matan Barakb4ff3a32016-02-09 14:57:42 +02003180 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003181
3182 struct mlx5_ifc_qpc_bits qpc;
3183
Matan Barakb4ff3a32016-02-09 14:57:42 +02003184 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003185};
3186
3187struct mlx5_ifc_sqd2rts_qp_out_bits {
3188 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003189 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003190
3191 u8 syndrome[0x20];
3192
Matan Barakb4ff3a32016-02-09 14:57:42 +02003193 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003194};
3195
3196struct mlx5_ifc_sqd2rts_qp_in_bits {
3197 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003198 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003199
Matan Barakb4ff3a32016-02-09 14:57:42 +02003200 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003201 u8 op_mod[0x10];
3202
Matan Barakb4ff3a32016-02-09 14:57:42 +02003203 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003204 u8 qpn[0x18];
3205
Matan Barakb4ff3a32016-02-09 14:57:42 +02003206 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003207
3208 u8 opt_param_mask[0x20];
3209
Matan Barakb4ff3a32016-02-09 14:57:42 +02003210 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003211
3212 struct mlx5_ifc_qpc_bits qpc;
3213
Matan Barakb4ff3a32016-02-09 14:57:42 +02003214 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003215};
3216
3217struct mlx5_ifc_set_roce_address_out_bits {
3218 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003219 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003220
3221 u8 syndrome[0x20];
3222
Matan Barakb4ff3a32016-02-09 14:57:42 +02003223 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003224};
3225
3226struct mlx5_ifc_set_roce_address_in_bits {
3227 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003228 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003229
Matan Barakb4ff3a32016-02-09 14:57:42 +02003230 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003231 u8 op_mod[0x10];
3232
3233 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003234 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003235
Matan Barakb4ff3a32016-02-09 14:57:42 +02003236 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003237
3238 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3239};
3240
3241struct mlx5_ifc_set_mad_demux_out_bits {
3242 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003243 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003244
3245 u8 syndrome[0x20];
3246
Matan Barakb4ff3a32016-02-09 14:57:42 +02003247 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003248};
3249
3250enum {
3251 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3252 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3253};
3254
3255struct mlx5_ifc_set_mad_demux_in_bits {
3256 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003257 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003258
Matan Barakb4ff3a32016-02-09 14:57:42 +02003259 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003260 u8 op_mod[0x10];
3261
Matan Barakb4ff3a32016-02-09 14:57:42 +02003262 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003263
Matan Barakb4ff3a32016-02-09 14:57:42 +02003264 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003265 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003266 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003267};
3268
3269struct mlx5_ifc_set_l2_table_entry_out_bits {
3270 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003271 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003272
3273 u8 syndrome[0x20];
3274
Matan Barakb4ff3a32016-02-09 14:57:42 +02003275 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003276};
3277
3278struct mlx5_ifc_set_l2_table_entry_in_bits {
3279 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003280 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003281
Matan Barakb4ff3a32016-02-09 14:57:42 +02003282 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003283 u8 op_mod[0x10];
3284
Matan Barakb4ff3a32016-02-09 14:57:42 +02003285 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003286
Matan Barakb4ff3a32016-02-09 14:57:42 +02003287 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003288 u8 table_index[0x18];
3289
Matan Barakb4ff3a32016-02-09 14:57:42 +02003290 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003291
Matan Barakb4ff3a32016-02-09 14:57:42 +02003292 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003293 u8 vlan_valid[0x1];
3294 u8 vlan[0xc];
3295
3296 struct mlx5_ifc_mac_address_layout_bits mac_address;
3297
Matan Barakb4ff3a32016-02-09 14:57:42 +02003298 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003299};
3300
3301struct mlx5_ifc_set_issi_out_bits {
3302 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003303 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003304
3305 u8 syndrome[0x20];
3306
Matan Barakb4ff3a32016-02-09 14:57:42 +02003307 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003308};
3309
3310struct mlx5_ifc_set_issi_in_bits {
3311 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003312 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003313
Matan Barakb4ff3a32016-02-09 14:57:42 +02003314 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003315 u8 op_mod[0x10];
3316
Matan Barakb4ff3a32016-02-09 14:57:42 +02003317 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003318 u8 current_issi[0x10];
3319
Matan Barakb4ff3a32016-02-09 14:57:42 +02003320 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003321};
3322
3323struct mlx5_ifc_set_hca_cap_out_bits {
3324 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003325 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003326
3327 u8 syndrome[0x20];
3328
Matan Barakb4ff3a32016-02-09 14:57:42 +02003329 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003330};
3331
3332struct mlx5_ifc_set_hca_cap_in_bits {
3333 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003334 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003335
Matan Barakb4ff3a32016-02-09 14:57:42 +02003336 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003337 u8 op_mod[0x10];
3338
Matan Barakb4ff3a32016-02-09 14:57:42 +02003339 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003340
Saeed Mahameede2816822015-05-28 22:28:40 +03003341 union mlx5_ifc_hca_cap_union_bits capability;
3342};
3343
Maor Gottlieb26a81452015-12-10 17:12:39 +02003344enum {
3345 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3346 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3347 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3348 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3349};
3350
Saeed Mahameede2816822015-05-28 22:28:40 +03003351struct mlx5_ifc_set_fte_out_bits {
3352 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003353 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003354
3355 u8 syndrome[0x20];
3356
Matan Barakb4ff3a32016-02-09 14:57:42 +02003357 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003358};
3359
3360struct mlx5_ifc_set_fte_in_bits {
3361 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003362 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003363
Matan Barakb4ff3a32016-02-09 14:57:42 +02003364 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003365 u8 op_mod[0x10];
3366
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003367 u8 other_vport[0x1];
3368 u8 reserved_at_41[0xf];
3369 u8 vport_number[0x10];
3370
3371 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003372
3373 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003374 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003375
Matan Barakb4ff3a32016-02-09 14:57:42 +02003376 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003377 u8 table_id[0x18];
3378
Matan Barakb4ff3a32016-02-09 14:57:42 +02003379 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003380 u8 modify_enable_mask[0x8];
3381
Matan Barakb4ff3a32016-02-09 14:57:42 +02003382 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003383
3384 u8 flow_index[0x20];
3385
Matan Barakb4ff3a32016-02-09 14:57:42 +02003386 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003387
3388 struct mlx5_ifc_flow_context_bits flow_context;
3389};
3390
3391struct mlx5_ifc_rts2rts_qp_out_bits {
3392 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003393 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003394
3395 u8 syndrome[0x20];
3396
Matan Barakb4ff3a32016-02-09 14:57:42 +02003397 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003398};
3399
3400struct mlx5_ifc_rts2rts_qp_in_bits {
3401 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003402 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003403
Matan Barakb4ff3a32016-02-09 14:57:42 +02003404 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003405 u8 op_mod[0x10];
3406
Matan Barakb4ff3a32016-02-09 14:57:42 +02003407 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003408 u8 qpn[0x18];
3409
Matan Barakb4ff3a32016-02-09 14:57:42 +02003410 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003411
3412 u8 opt_param_mask[0x20];
3413
Matan Barakb4ff3a32016-02-09 14:57:42 +02003414 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003415
3416 struct mlx5_ifc_qpc_bits qpc;
3417
Matan Barakb4ff3a32016-02-09 14:57:42 +02003418 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003419};
3420
3421struct mlx5_ifc_rtr2rts_qp_out_bits {
3422 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003423 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003424
3425 u8 syndrome[0x20];
3426
Matan Barakb4ff3a32016-02-09 14:57:42 +02003427 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003428};
3429
3430struct mlx5_ifc_rtr2rts_qp_in_bits {
3431 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003432 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003433
Matan Barakb4ff3a32016-02-09 14:57:42 +02003434 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003435 u8 op_mod[0x10];
3436
Matan Barakb4ff3a32016-02-09 14:57:42 +02003437 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003438 u8 qpn[0x18];
3439
Matan Barakb4ff3a32016-02-09 14:57:42 +02003440 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003441
3442 u8 opt_param_mask[0x20];
3443
Matan Barakb4ff3a32016-02-09 14:57:42 +02003444 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003445
3446 struct mlx5_ifc_qpc_bits qpc;
3447
Matan Barakb4ff3a32016-02-09 14:57:42 +02003448 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003449};
3450
3451struct mlx5_ifc_rst2init_qp_out_bits {
3452 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003453 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003454
3455 u8 syndrome[0x20];
3456
Matan Barakb4ff3a32016-02-09 14:57:42 +02003457 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003458};
3459
3460struct mlx5_ifc_rst2init_qp_in_bits {
3461 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003462 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003463
Matan Barakb4ff3a32016-02-09 14:57:42 +02003464 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003465 u8 op_mod[0x10];
3466
Matan Barakb4ff3a32016-02-09 14:57:42 +02003467 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003468 u8 qpn[0x18];
3469
Matan Barakb4ff3a32016-02-09 14:57:42 +02003470 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003471
3472 u8 opt_param_mask[0x20];
3473
Matan Barakb4ff3a32016-02-09 14:57:42 +02003474 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003475
3476 struct mlx5_ifc_qpc_bits qpc;
3477
Matan Barakb4ff3a32016-02-09 14:57:42 +02003478 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003479};
3480
Saeed Mahameed74862162016-06-09 15:11:34 +03003481struct mlx5_ifc_query_xrq_out_bits {
3482 u8 status[0x8];
3483 u8 reserved_at_8[0x18];
3484
3485 u8 syndrome[0x20];
3486
3487 u8 reserved_at_40[0x40];
3488
3489 struct mlx5_ifc_xrqc_bits xrq_context;
3490};
3491
3492struct mlx5_ifc_query_xrq_in_bits {
3493 u8 opcode[0x10];
3494 u8 reserved_at_10[0x10];
3495
3496 u8 reserved_at_20[0x10];
3497 u8 op_mod[0x10];
3498
3499 u8 reserved_at_40[0x8];
3500 u8 xrqn[0x18];
3501
3502 u8 reserved_at_60[0x20];
3503};
3504
Saeed Mahameede2816822015-05-28 22:28:40 +03003505struct mlx5_ifc_query_xrc_srq_out_bits {
3506 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003507 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003508
3509 u8 syndrome[0x20];
3510
Matan Barakb4ff3a32016-02-09 14:57:42 +02003511 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003512
3513 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3514
Matan Barakb4ff3a32016-02-09 14:57:42 +02003515 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003516
3517 u8 pas[0][0x40];
3518};
3519
3520struct mlx5_ifc_query_xrc_srq_in_bits {
3521 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003522 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003523
Matan Barakb4ff3a32016-02-09 14:57:42 +02003524 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003525 u8 op_mod[0x10];
3526
Matan Barakb4ff3a32016-02-09 14:57:42 +02003527 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003528 u8 xrc_srqn[0x18];
3529
Matan Barakb4ff3a32016-02-09 14:57:42 +02003530 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003531};
3532
3533enum {
3534 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3535 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3536};
3537
3538struct mlx5_ifc_query_vport_state_out_bits {
3539 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003540 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003541
3542 u8 syndrome[0x20];
3543
Matan Barakb4ff3a32016-02-09 14:57:42 +02003544 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003545
Matan Barakb4ff3a32016-02-09 14:57:42 +02003546 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003547 u8 admin_state[0x4];
3548 u8 state[0x4];
3549};
3550
3551enum {
3552 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003553 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003554};
3555
3556struct mlx5_ifc_query_vport_state_in_bits {
3557 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003558 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003559
Matan Barakb4ff3a32016-02-09 14:57:42 +02003560 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003561 u8 op_mod[0x10];
3562
3563 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003564 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003565 u8 vport_number[0x10];
3566
Matan Barakb4ff3a32016-02-09 14:57:42 +02003567 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003568};
3569
3570struct mlx5_ifc_query_vport_counter_out_bits {
3571 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003572 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003573
3574 u8 syndrome[0x20];
3575
Matan Barakb4ff3a32016-02-09 14:57:42 +02003576 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003577
3578 struct mlx5_ifc_traffic_counter_bits received_errors;
3579
3580 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3581
3582 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3583
3584 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3585
3586 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3587
3588 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3589
3590 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3591
3592 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3593
3594 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3595
3596 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3597
3598 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3599
3600 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3601
Matan Barakb4ff3a32016-02-09 14:57:42 +02003602 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003603};
3604
3605enum {
3606 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3607};
3608
3609struct mlx5_ifc_query_vport_counter_in_bits {
3610 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003611 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003612
Matan Barakb4ff3a32016-02-09 14:57:42 +02003613 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003614 u8 op_mod[0x10];
3615
3616 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003617 u8 reserved_at_41[0xb];
3618 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003619 u8 vport_number[0x10];
3620
Matan Barakb4ff3a32016-02-09 14:57:42 +02003621 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003622
3623 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003624 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003625
Matan Barakb4ff3a32016-02-09 14:57:42 +02003626 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003627};
3628
3629struct mlx5_ifc_query_tis_out_bits {
3630 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003631 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003632
3633 u8 syndrome[0x20];
3634
Matan Barakb4ff3a32016-02-09 14:57:42 +02003635 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003636
3637 struct mlx5_ifc_tisc_bits tis_context;
3638};
3639
3640struct mlx5_ifc_query_tis_in_bits {
3641 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003642 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003643
Matan Barakb4ff3a32016-02-09 14:57:42 +02003644 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003645 u8 op_mod[0x10];
3646
Matan Barakb4ff3a32016-02-09 14:57:42 +02003647 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003648 u8 tisn[0x18];
3649
Matan Barakb4ff3a32016-02-09 14:57:42 +02003650 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003651};
3652
3653struct mlx5_ifc_query_tir_out_bits {
3654 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003655 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003656
3657 u8 syndrome[0x20];
3658
Matan Barakb4ff3a32016-02-09 14:57:42 +02003659 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003660
3661 struct mlx5_ifc_tirc_bits tir_context;
3662};
3663
3664struct mlx5_ifc_query_tir_in_bits {
3665 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003666 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003667
Matan Barakb4ff3a32016-02-09 14:57:42 +02003668 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003669 u8 op_mod[0x10];
3670
Matan Barakb4ff3a32016-02-09 14:57:42 +02003671 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003672 u8 tirn[0x18];
3673
Matan Barakb4ff3a32016-02-09 14:57:42 +02003674 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003675};
3676
3677struct mlx5_ifc_query_srq_out_bits {
3678 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003679 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003680
3681 u8 syndrome[0x20];
3682
Matan Barakb4ff3a32016-02-09 14:57:42 +02003683 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003684
3685 struct mlx5_ifc_srqc_bits srq_context_entry;
3686
Matan Barakb4ff3a32016-02-09 14:57:42 +02003687 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003688
3689 u8 pas[0][0x40];
3690};
3691
3692struct mlx5_ifc_query_srq_in_bits {
3693 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003694 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003695
Matan Barakb4ff3a32016-02-09 14:57:42 +02003696 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003697 u8 op_mod[0x10];
3698
Matan Barakb4ff3a32016-02-09 14:57:42 +02003699 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003700 u8 srqn[0x18];
3701
Matan Barakb4ff3a32016-02-09 14:57:42 +02003702 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003703};
3704
3705struct mlx5_ifc_query_sq_out_bits {
3706 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003707 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003708
3709 u8 syndrome[0x20];
3710
Matan Barakb4ff3a32016-02-09 14:57:42 +02003711 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003712
3713 struct mlx5_ifc_sqc_bits sq_context;
3714};
3715
3716struct mlx5_ifc_query_sq_in_bits {
3717 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003718 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003719
Matan Barakb4ff3a32016-02-09 14:57:42 +02003720 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003721 u8 op_mod[0x10];
3722
Matan Barakb4ff3a32016-02-09 14:57:42 +02003723 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003724 u8 sqn[0x18];
3725
Matan Barakb4ff3a32016-02-09 14:57:42 +02003726 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003727};
3728
3729struct mlx5_ifc_query_special_contexts_out_bits {
3730 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003731 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003732
3733 u8 syndrome[0x20];
3734
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003735 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003736
3737 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003738
3739 u8 null_mkey[0x20];
3740
3741 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003742};
3743
3744struct mlx5_ifc_query_special_contexts_in_bits {
3745 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003746 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003747
Matan Barakb4ff3a32016-02-09 14:57:42 +02003748 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003749 u8 op_mod[0x10];
3750
Matan Barakb4ff3a32016-02-09 14:57:42 +02003751 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003752};
3753
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003754struct mlx5_ifc_query_scheduling_element_out_bits {
3755 u8 opcode[0x10];
3756 u8 reserved_at_10[0x10];
3757
3758 u8 reserved_at_20[0x10];
3759 u8 op_mod[0x10];
3760
3761 u8 reserved_at_40[0xc0];
3762
3763 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3764
3765 u8 reserved_at_300[0x100];
3766};
3767
3768enum {
3769 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3770};
3771
3772struct mlx5_ifc_query_scheduling_element_in_bits {
3773 u8 opcode[0x10];
3774 u8 reserved_at_10[0x10];
3775
3776 u8 reserved_at_20[0x10];
3777 u8 op_mod[0x10];
3778
3779 u8 scheduling_hierarchy[0x8];
3780 u8 reserved_at_48[0x18];
3781
3782 u8 scheduling_element_id[0x20];
3783
3784 u8 reserved_at_80[0x180];
3785};
3786
Saeed Mahameede2816822015-05-28 22:28:40 +03003787struct mlx5_ifc_query_rqt_out_bits {
3788 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003789 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003790
3791 u8 syndrome[0x20];
3792
Matan Barakb4ff3a32016-02-09 14:57:42 +02003793 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003794
3795 struct mlx5_ifc_rqtc_bits rqt_context;
3796};
3797
3798struct mlx5_ifc_query_rqt_in_bits {
3799 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003800 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003801
Matan Barakb4ff3a32016-02-09 14:57:42 +02003802 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003803 u8 op_mod[0x10];
3804
Matan Barakb4ff3a32016-02-09 14:57:42 +02003805 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003806 u8 rqtn[0x18];
3807
Matan Barakb4ff3a32016-02-09 14:57:42 +02003808 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003809};
3810
3811struct mlx5_ifc_query_rq_out_bits {
3812 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003813 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003814
3815 u8 syndrome[0x20];
3816
Matan Barakb4ff3a32016-02-09 14:57:42 +02003817 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003818
3819 struct mlx5_ifc_rqc_bits rq_context;
3820};
3821
3822struct mlx5_ifc_query_rq_in_bits {
3823 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003824 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003825
Matan Barakb4ff3a32016-02-09 14:57:42 +02003826 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003827 u8 op_mod[0x10];
3828
Matan Barakb4ff3a32016-02-09 14:57:42 +02003829 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003830 u8 rqn[0x18];
3831
Matan Barakb4ff3a32016-02-09 14:57:42 +02003832 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003833};
3834
3835struct mlx5_ifc_query_roce_address_out_bits {
3836 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003837 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003838
3839 u8 syndrome[0x20];
3840
Matan Barakb4ff3a32016-02-09 14:57:42 +02003841 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003842
3843 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3844};
3845
3846struct mlx5_ifc_query_roce_address_in_bits {
3847 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003848 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003849
Matan Barakb4ff3a32016-02-09 14:57:42 +02003850 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003851 u8 op_mod[0x10];
3852
3853 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003854 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003855
Matan Barakb4ff3a32016-02-09 14:57:42 +02003856 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003857};
3858
3859struct mlx5_ifc_query_rmp_out_bits {
3860 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003861 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003862
3863 u8 syndrome[0x20];
3864
Matan Barakb4ff3a32016-02-09 14:57:42 +02003865 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003866
3867 struct mlx5_ifc_rmpc_bits rmp_context;
3868};
3869
3870struct mlx5_ifc_query_rmp_in_bits {
3871 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003872 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003873
Matan Barakb4ff3a32016-02-09 14:57:42 +02003874 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003875 u8 op_mod[0x10];
3876
Matan Barakb4ff3a32016-02-09 14:57:42 +02003877 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003878 u8 rmpn[0x18];
3879
Matan Barakb4ff3a32016-02-09 14:57:42 +02003880 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003881};
3882
3883struct mlx5_ifc_query_qp_out_bits {
3884 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003885 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003886
3887 u8 syndrome[0x20];
3888
Matan Barakb4ff3a32016-02-09 14:57:42 +02003889 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003890
3891 u8 opt_param_mask[0x20];
3892
Matan Barakb4ff3a32016-02-09 14:57:42 +02003893 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003894
3895 struct mlx5_ifc_qpc_bits qpc;
3896
Matan Barakb4ff3a32016-02-09 14:57:42 +02003897 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003898
3899 u8 pas[0][0x40];
3900};
3901
3902struct mlx5_ifc_query_qp_in_bits {
3903 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003904 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003905
Matan Barakb4ff3a32016-02-09 14:57:42 +02003906 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003907 u8 op_mod[0x10];
3908
Matan Barakb4ff3a32016-02-09 14:57:42 +02003909 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003910 u8 qpn[0x18];
3911
Matan Barakb4ff3a32016-02-09 14:57:42 +02003912 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003913};
3914
3915struct mlx5_ifc_query_q_counter_out_bits {
3916 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003917 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003918
3919 u8 syndrome[0x20];
3920
Matan Barakb4ff3a32016-02-09 14:57:42 +02003921 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003922
3923 u8 rx_write_requests[0x20];
3924
Matan Barakb4ff3a32016-02-09 14:57:42 +02003925 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003926
3927 u8 rx_read_requests[0x20];
3928
Matan Barakb4ff3a32016-02-09 14:57:42 +02003929 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003930
3931 u8 rx_atomic_requests[0x20];
3932
Matan Barakb4ff3a32016-02-09 14:57:42 +02003933 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003934
3935 u8 rx_dct_connect[0x20];
3936
Matan Barakb4ff3a32016-02-09 14:57:42 +02003937 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003938
3939 u8 out_of_buffer[0x20];
3940
Matan Barakb4ff3a32016-02-09 14:57:42 +02003941 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003942
3943 u8 out_of_sequence[0x20];
3944
Saeed Mahameed74862162016-06-09 15:11:34 +03003945 u8 reserved_at_1e0[0x20];
3946
3947 u8 duplicate_request[0x20];
3948
3949 u8 reserved_at_220[0x20];
3950
3951 u8 rnr_nak_retry_err[0x20];
3952
3953 u8 reserved_at_260[0x20];
3954
3955 u8 packet_seq_err[0x20];
3956
3957 u8 reserved_at_2a0[0x20];
3958
3959 u8 implied_nak_seq_err[0x20];
3960
3961 u8 reserved_at_2e0[0x20];
3962
3963 u8 local_ack_timeout_err[0x20];
3964
Parav Pandit58dcb602017-06-19 07:19:37 +03003965 u8 reserved_at_320[0xa0];
3966
3967 u8 resp_local_length_error[0x20];
3968
3969 u8 req_local_length_error[0x20];
3970
3971 u8 resp_local_qp_error[0x20];
3972
3973 u8 local_operation_error[0x20];
3974
3975 u8 resp_local_protection[0x20];
3976
3977 u8 req_local_protection[0x20];
3978
3979 u8 resp_cqe_error[0x20];
3980
3981 u8 req_cqe_error[0x20];
3982
3983 u8 req_mw_binding[0x20];
3984
3985 u8 req_bad_response[0x20];
3986
3987 u8 req_remote_invalid_request[0x20];
3988
3989 u8 resp_remote_invalid_request[0x20];
3990
3991 u8 req_remote_access_errors[0x20];
3992
3993 u8 resp_remote_access_errors[0x20];
3994
3995 u8 req_remote_operation_errors[0x20];
3996
3997 u8 req_transport_retries_exceeded[0x20];
3998
3999 u8 cq_overflow[0x20];
4000
4001 u8 resp_cqe_flush_error[0x20];
4002
4003 u8 req_cqe_flush_error[0x20];
4004
4005 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004006};
4007
4008struct mlx5_ifc_query_q_counter_in_bits {
4009 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004010 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004011
Matan Barakb4ff3a32016-02-09 14:57:42 +02004012 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004013 u8 op_mod[0x10];
4014
Matan Barakb4ff3a32016-02-09 14:57:42 +02004015 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004016
4017 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004018 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004019
Matan Barakb4ff3a32016-02-09 14:57:42 +02004020 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004021 u8 counter_set_id[0x8];
4022};
4023
4024struct mlx5_ifc_query_pages_out_bits {
4025 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004026 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004027
4028 u8 syndrome[0x20];
4029
Matan Barakb4ff3a32016-02-09 14:57:42 +02004030 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004031 u8 function_id[0x10];
4032
4033 u8 num_pages[0x20];
4034};
4035
4036enum {
4037 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4038 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4039 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4040};
4041
4042struct mlx5_ifc_query_pages_in_bits {
4043 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004044 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004045
Matan Barakb4ff3a32016-02-09 14:57:42 +02004046 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004047 u8 op_mod[0x10];
4048
Matan Barakb4ff3a32016-02-09 14:57:42 +02004049 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004050 u8 function_id[0x10];
4051
Matan Barakb4ff3a32016-02-09 14:57:42 +02004052 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004053};
4054
4055struct mlx5_ifc_query_nic_vport_context_out_bits {
4056 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004057 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004058
4059 u8 syndrome[0x20];
4060
Matan Barakb4ff3a32016-02-09 14:57:42 +02004061 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004062
4063 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4064};
4065
4066struct mlx5_ifc_query_nic_vport_context_in_bits {
4067 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004068 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004069
Matan Barakb4ff3a32016-02-09 14:57:42 +02004070 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004071 u8 op_mod[0x10];
4072
4073 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004074 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004075 u8 vport_number[0x10];
4076
Matan Barakb4ff3a32016-02-09 14:57:42 +02004077 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004078 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004079 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004080};
4081
4082struct mlx5_ifc_query_mkey_out_bits {
4083 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004084 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004085
4086 u8 syndrome[0x20];
4087
Matan Barakb4ff3a32016-02-09 14:57:42 +02004088 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004089
4090 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4091
Matan Barakb4ff3a32016-02-09 14:57:42 +02004092 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004093
4094 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4095
4096 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4097};
4098
4099struct mlx5_ifc_query_mkey_in_bits {
4100 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004101 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004102
Matan Barakb4ff3a32016-02-09 14:57:42 +02004103 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004104 u8 op_mod[0x10];
4105
Matan Barakb4ff3a32016-02-09 14:57:42 +02004106 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004107 u8 mkey_index[0x18];
4108
4109 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004110 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004111};
4112
4113struct mlx5_ifc_query_mad_demux_out_bits {
4114 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004115 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004116
4117 u8 syndrome[0x20];
4118
Matan Barakb4ff3a32016-02-09 14:57:42 +02004119 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004120
4121 u8 mad_dumux_parameters_block[0x20];
4122};
4123
4124struct mlx5_ifc_query_mad_demux_in_bits {
4125 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004126 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004127
Matan Barakb4ff3a32016-02-09 14:57:42 +02004128 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004129 u8 op_mod[0x10];
4130
Matan Barakb4ff3a32016-02-09 14:57:42 +02004131 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004132};
4133
4134struct mlx5_ifc_query_l2_table_entry_out_bits {
4135 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004136 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004137
4138 u8 syndrome[0x20];
4139
Matan Barakb4ff3a32016-02-09 14:57:42 +02004140 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004141
Matan Barakb4ff3a32016-02-09 14:57:42 +02004142 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004143 u8 vlan_valid[0x1];
4144 u8 vlan[0xc];
4145
4146 struct mlx5_ifc_mac_address_layout_bits mac_address;
4147
Matan Barakb4ff3a32016-02-09 14:57:42 +02004148 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004149};
4150
4151struct mlx5_ifc_query_l2_table_entry_in_bits {
4152 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004153 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004154
Matan Barakb4ff3a32016-02-09 14:57:42 +02004155 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004156 u8 op_mod[0x10];
4157
Matan Barakb4ff3a32016-02-09 14:57:42 +02004158 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004159
Matan Barakb4ff3a32016-02-09 14:57:42 +02004160 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004161 u8 table_index[0x18];
4162
Matan Barakb4ff3a32016-02-09 14:57:42 +02004163 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004164};
4165
4166struct mlx5_ifc_query_issi_out_bits {
4167 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004168 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004169
4170 u8 syndrome[0x20];
4171
Matan Barakb4ff3a32016-02-09 14:57:42 +02004172 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004173 u8 current_issi[0x10];
4174
Matan Barakb4ff3a32016-02-09 14:57:42 +02004175 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004176
Matan Barakb4ff3a32016-02-09 14:57:42 +02004177 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004178 u8 supported_issi_dw0[0x20];
4179};
4180
4181struct mlx5_ifc_query_issi_in_bits {
4182 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004183 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004184
Matan Barakb4ff3a32016-02-09 14:57:42 +02004185 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004186 u8 op_mod[0x10];
4187
Matan Barakb4ff3a32016-02-09 14:57:42 +02004188 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004189};
4190
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004191struct mlx5_ifc_set_driver_version_out_bits {
4192 u8 status[0x8];
4193 u8 reserved_0[0x18];
4194
4195 u8 syndrome[0x20];
4196 u8 reserved_1[0x40];
4197};
4198
4199struct mlx5_ifc_set_driver_version_in_bits {
4200 u8 opcode[0x10];
4201 u8 reserved_0[0x10];
4202
4203 u8 reserved_1[0x10];
4204 u8 op_mod[0x10];
4205
4206 u8 reserved_2[0x40];
4207 u8 driver_version[64][0x8];
4208};
4209
Saeed Mahameede2816822015-05-28 22:28:40 +03004210struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4211 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004212 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004213
4214 u8 syndrome[0x20];
4215
Matan Barakb4ff3a32016-02-09 14:57:42 +02004216 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004217
4218 struct mlx5_ifc_pkey_bits pkey[0];
4219};
4220
4221struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4222 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004223 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004224
Matan Barakb4ff3a32016-02-09 14:57:42 +02004225 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004226 u8 op_mod[0x10];
4227
4228 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004229 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004230 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004231 u8 vport_number[0x10];
4232
Matan Barakb4ff3a32016-02-09 14:57:42 +02004233 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004234 u8 pkey_index[0x10];
4235};
4236
Eli Coheneff901d2016-03-11 22:58:42 +02004237enum {
4238 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4239 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4240 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4241};
4242
Saeed Mahameede2816822015-05-28 22:28:40 +03004243struct mlx5_ifc_query_hca_vport_gid_out_bits {
4244 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004245 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004246
4247 u8 syndrome[0x20];
4248
Matan Barakb4ff3a32016-02-09 14:57:42 +02004249 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004250
4251 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004252 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004253
4254 struct mlx5_ifc_array128_auto_bits gid[0];
4255};
4256
4257struct mlx5_ifc_query_hca_vport_gid_in_bits {
4258 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004259 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004260
Matan Barakb4ff3a32016-02-09 14:57:42 +02004261 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004262 u8 op_mod[0x10];
4263
4264 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004265 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004266 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004267 u8 vport_number[0x10];
4268
Matan Barakb4ff3a32016-02-09 14:57:42 +02004269 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004270 u8 gid_index[0x10];
4271};
4272
4273struct mlx5_ifc_query_hca_vport_context_out_bits {
4274 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004275 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004276
4277 u8 syndrome[0x20];
4278
Matan Barakb4ff3a32016-02-09 14:57:42 +02004279 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004280
4281 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4282};
4283
4284struct mlx5_ifc_query_hca_vport_context_in_bits {
4285 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004286 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004287
Matan Barakb4ff3a32016-02-09 14:57:42 +02004288 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004289 u8 op_mod[0x10];
4290
4291 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004292 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004293 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004294 u8 vport_number[0x10];
4295
Matan Barakb4ff3a32016-02-09 14:57:42 +02004296 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004297};
4298
4299struct mlx5_ifc_query_hca_cap_out_bits {
4300 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004301 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004302
4303 u8 syndrome[0x20];
4304
Matan Barakb4ff3a32016-02-09 14:57:42 +02004305 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004306
4307 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004308};
4309
4310struct mlx5_ifc_query_hca_cap_in_bits {
4311 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004312 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004313
Matan Barakb4ff3a32016-02-09 14:57:42 +02004314 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004315 u8 op_mod[0x10];
4316
Matan Barakb4ff3a32016-02-09 14:57:42 +02004317 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004318};
4319
Saeed Mahameede2816822015-05-28 22:28:40 +03004320struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004321 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004322 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004323
4324 u8 syndrome[0x20];
4325
Matan Barakb4ff3a32016-02-09 14:57:42 +02004326 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004327
Matan Barakb4ff3a32016-02-09 14:57:42 +02004328 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004329 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004330 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004331 u8 log_size[0x8];
4332
Matan Barakb4ff3a32016-02-09 14:57:42 +02004333 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004334};
4335
Saeed Mahameede2816822015-05-28 22:28:40 +03004336struct mlx5_ifc_query_flow_table_in_bits {
4337 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004338 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004339
Matan Barakb4ff3a32016-02-09 14:57:42 +02004340 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004341 u8 op_mod[0x10];
4342
Matan Barakb4ff3a32016-02-09 14:57:42 +02004343 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004344
4345 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004346 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004347
Matan Barakb4ff3a32016-02-09 14:57:42 +02004348 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004349 u8 table_id[0x18];
4350
Matan Barakb4ff3a32016-02-09 14:57:42 +02004351 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004352};
4353
4354struct mlx5_ifc_query_fte_out_bits {
4355 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004356 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004357
4358 u8 syndrome[0x20];
4359
Matan Barakb4ff3a32016-02-09 14:57:42 +02004360 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004361
4362 struct mlx5_ifc_flow_context_bits flow_context;
4363};
4364
4365struct mlx5_ifc_query_fte_in_bits {
4366 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004367 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004368
Matan Barakb4ff3a32016-02-09 14:57:42 +02004369 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004370 u8 op_mod[0x10];
4371
Matan Barakb4ff3a32016-02-09 14:57:42 +02004372 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004373
4374 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004375 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004376
Matan Barakb4ff3a32016-02-09 14:57:42 +02004377 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004378 u8 table_id[0x18];
4379
Matan Barakb4ff3a32016-02-09 14:57:42 +02004380 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004381
4382 u8 flow_index[0x20];
4383
Matan Barakb4ff3a32016-02-09 14:57:42 +02004384 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004385};
4386
4387enum {
4388 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4389 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4390 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4391};
4392
4393struct mlx5_ifc_query_flow_group_out_bits {
4394 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004395 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004396
4397 u8 syndrome[0x20];
4398
Matan Barakb4ff3a32016-02-09 14:57:42 +02004399 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004400
4401 u8 start_flow_index[0x20];
4402
Matan Barakb4ff3a32016-02-09 14:57:42 +02004403 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004404
4405 u8 end_flow_index[0x20];
4406
Matan Barakb4ff3a32016-02-09 14:57:42 +02004407 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004408
Matan Barakb4ff3a32016-02-09 14:57:42 +02004409 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004410 u8 match_criteria_enable[0x8];
4411
4412 struct mlx5_ifc_fte_match_param_bits match_criteria;
4413
Matan Barakb4ff3a32016-02-09 14:57:42 +02004414 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004415};
4416
4417struct mlx5_ifc_query_flow_group_in_bits {
4418 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004419 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004420
Matan Barakb4ff3a32016-02-09 14:57:42 +02004421 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004422 u8 op_mod[0x10];
4423
Matan Barakb4ff3a32016-02-09 14:57:42 +02004424 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004425
4426 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004427 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004428
Matan Barakb4ff3a32016-02-09 14:57:42 +02004429 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004430 u8 table_id[0x18];
4431
4432 u8 group_id[0x20];
4433
Matan Barakb4ff3a32016-02-09 14:57:42 +02004434 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004435};
4436
Amir Vadai9dc0b282016-05-13 12:55:39 +00004437struct mlx5_ifc_query_flow_counter_out_bits {
4438 u8 status[0x8];
4439 u8 reserved_at_8[0x18];
4440
4441 u8 syndrome[0x20];
4442
4443 u8 reserved_at_40[0x40];
4444
4445 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4446};
4447
4448struct mlx5_ifc_query_flow_counter_in_bits {
4449 u8 opcode[0x10];
4450 u8 reserved_at_10[0x10];
4451
4452 u8 reserved_at_20[0x10];
4453 u8 op_mod[0x10];
4454
4455 u8 reserved_at_40[0x80];
4456
4457 u8 clear[0x1];
4458 u8 reserved_at_c1[0xf];
4459 u8 num_of_counters[0x10];
4460
4461 u8 reserved_at_e0[0x10];
4462 u8 flow_counter_id[0x10];
4463};
4464
Saeed Mahameedd6666752015-12-01 18:03:22 +02004465struct mlx5_ifc_query_esw_vport_context_out_bits {
4466 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004467 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004468
4469 u8 syndrome[0x20];
4470
Matan Barakb4ff3a32016-02-09 14:57:42 +02004471 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004472
4473 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4474};
4475
4476struct mlx5_ifc_query_esw_vport_context_in_bits {
4477 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004478 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004479
Matan Barakb4ff3a32016-02-09 14:57:42 +02004480 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004481 u8 op_mod[0x10];
4482
4483 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004484 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004485 u8 vport_number[0x10];
4486
Matan Barakb4ff3a32016-02-09 14:57:42 +02004487 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004488};
4489
4490struct mlx5_ifc_modify_esw_vport_context_out_bits {
4491 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004492 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004493
4494 u8 syndrome[0x20];
4495
Matan Barakb4ff3a32016-02-09 14:57:42 +02004496 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004497};
4498
4499struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004500 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004501 u8 vport_cvlan_insert[0x1];
4502 u8 vport_svlan_insert[0x1];
4503 u8 vport_cvlan_strip[0x1];
4504 u8 vport_svlan_strip[0x1];
4505};
4506
4507struct mlx5_ifc_modify_esw_vport_context_in_bits {
4508 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004509 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004510
Matan Barakb4ff3a32016-02-09 14:57:42 +02004511 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004512 u8 op_mod[0x10];
4513
4514 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004515 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004516 u8 vport_number[0x10];
4517
4518 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4519
4520 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4521};
4522
Saeed Mahameede2816822015-05-28 22:28:40 +03004523struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004524 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004525 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004526
4527 u8 syndrome[0x20];
4528
Matan Barakb4ff3a32016-02-09 14:57:42 +02004529 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004530
4531 struct mlx5_ifc_eqc_bits eq_context_entry;
4532
Matan Barakb4ff3a32016-02-09 14:57:42 +02004533 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004534
4535 u8 event_bitmask[0x40];
4536
Matan Barakb4ff3a32016-02-09 14:57:42 +02004537 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004538
4539 u8 pas[0][0x40];
4540};
4541
4542struct mlx5_ifc_query_eq_in_bits {
4543 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004544 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004545
Matan Barakb4ff3a32016-02-09 14:57:42 +02004546 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004547 u8 op_mod[0x10];
4548
Matan Barakb4ff3a32016-02-09 14:57:42 +02004549 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004550 u8 eq_number[0x8];
4551
Matan Barakb4ff3a32016-02-09 14:57:42 +02004552 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004553};
4554
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004555struct mlx5_ifc_encap_header_in_bits {
4556 u8 reserved_at_0[0x5];
4557 u8 header_type[0x3];
4558 u8 reserved_at_8[0xe];
4559 u8 encap_header_size[0xa];
4560
4561 u8 reserved_at_20[0x10];
4562 u8 encap_header[2][0x8];
4563
4564 u8 more_encap_header[0][0x8];
4565};
4566
4567struct mlx5_ifc_query_encap_header_out_bits {
4568 u8 status[0x8];
4569 u8 reserved_at_8[0x18];
4570
4571 u8 syndrome[0x20];
4572
4573 u8 reserved_at_40[0xa0];
4574
4575 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4576};
4577
4578struct mlx5_ifc_query_encap_header_in_bits {
4579 u8 opcode[0x10];
4580 u8 reserved_at_10[0x10];
4581
4582 u8 reserved_at_20[0x10];
4583 u8 op_mod[0x10];
4584
4585 u8 encap_id[0x20];
4586
4587 u8 reserved_at_60[0xa0];
4588};
4589
4590struct mlx5_ifc_alloc_encap_header_out_bits {
4591 u8 status[0x8];
4592 u8 reserved_at_8[0x18];
4593
4594 u8 syndrome[0x20];
4595
4596 u8 encap_id[0x20];
4597
4598 u8 reserved_at_60[0x20];
4599};
4600
4601struct mlx5_ifc_alloc_encap_header_in_bits {
4602 u8 opcode[0x10];
4603 u8 reserved_at_10[0x10];
4604
4605 u8 reserved_at_20[0x10];
4606 u8 op_mod[0x10];
4607
4608 u8 reserved_at_40[0xa0];
4609
4610 struct mlx5_ifc_encap_header_in_bits encap_header;
4611};
4612
4613struct mlx5_ifc_dealloc_encap_header_out_bits {
4614 u8 status[0x8];
4615 u8 reserved_at_8[0x18];
4616
4617 u8 syndrome[0x20];
4618
4619 u8 reserved_at_40[0x40];
4620};
4621
4622struct mlx5_ifc_dealloc_encap_header_in_bits {
4623 u8 opcode[0x10];
4624 u8 reserved_at_10[0x10];
4625
4626 u8 reserved_20[0x10];
4627 u8 op_mod[0x10];
4628
4629 u8 encap_id[0x20];
4630
4631 u8 reserved_60[0x20];
4632};
4633
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004634struct mlx5_ifc_set_action_in_bits {
4635 u8 action_type[0x4];
4636 u8 field[0xc];
4637 u8 reserved_at_10[0x3];
4638 u8 offset[0x5];
4639 u8 reserved_at_18[0x3];
4640 u8 length[0x5];
4641
4642 u8 data[0x20];
4643};
4644
4645struct mlx5_ifc_add_action_in_bits {
4646 u8 action_type[0x4];
4647 u8 field[0xc];
4648 u8 reserved_at_10[0x10];
4649
4650 u8 data[0x20];
4651};
4652
4653union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4654 struct mlx5_ifc_set_action_in_bits set_action_in;
4655 struct mlx5_ifc_add_action_in_bits add_action_in;
4656 u8 reserved_at_0[0x40];
4657};
4658
4659enum {
4660 MLX5_ACTION_TYPE_SET = 0x1,
4661 MLX5_ACTION_TYPE_ADD = 0x2,
4662};
4663
4664enum {
4665 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4666 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4667 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4668 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4669 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4670 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4671 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4672 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4673 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4674 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4675 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4676 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4677 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4678 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4679 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4680 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4681 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4682 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4683 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4684 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4685 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4686 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004687 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004688};
4689
4690struct mlx5_ifc_alloc_modify_header_context_out_bits {
4691 u8 status[0x8];
4692 u8 reserved_at_8[0x18];
4693
4694 u8 syndrome[0x20];
4695
4696 u8 modify_header_id[0x20];
4697
4698 u8 reserved_at_60[0x20];
4699};
4700
4701struct mlx5_ifc_alloc_modify_header_context_in_bits {
4702 u8 opcode[0x10];
4703 u8 reserved_at_10[0x10];
4704
4705 u8 reserved_at_20[0x10];
4706 u8 op_mod[0x10];
4707
4708 u8 reserved_at_40[0x20];
4709
4710 u8 table_type[0x8];
4711 u8 reserved_at_68[0x10];
4712 u8 num_of_actions[0x8];
4713
4714 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4715};
4716
4717struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4718 u8 status[0x8];
4719 u8 reserved_at_8[0x18];
4720
4721 u8 syndrome[0x20];
4722
4723 u8 reserved_at_40[0x40];
4724};
4725
4726struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4727 u8 opcode[0x10];
4728 u8 reserved_at_10[0x10];
4729
4730 u8 reserved_at_20[0x10];
4731 u8 op_mod[0x10];
4732
4733 u8 modify_header_id[0x20];
4734
4735 u8 reserved_at_60[0x20];
4736};
4737
Saeed Mahameede2816822015-05-28 22:28:40 +03004738struct mlx5_ifc_query_dct_out_bits {
4739 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004740 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004741
4742 u8 syndrome[0x20];
4743
Matan Barakb4ff3a32016-02-09 14:57:42 +02004744 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004745
4746 struct mlx5_ifc_dctc_bits dct_context_entry;
4747
Matan Barakb4ff3a32016-02-09 14:57:42 +02004748 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004749};
4750
4751struct mlx5_ifc_query_dct_in_bits {
4752 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004753 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004754
Matan Barakb4ff3a32016-02-09 14:57:42 +02004755 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004756 u8 op_mod[0x10];
4757
Matan Barakb4ff3a32016-02-09 14:57:42 +02004758 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004759 u8 dctn[0x18];
4760
Matan Barakb4ff3a32016-02-09 14:57:42 +02004761 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004762};
4763
4764struct mlx5_ifc_query_cq_out_bits {
4765 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004766 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004767
4768 u8 syndrome[0x20];
4769
Matan Barakb4ff3a32016-02-09 14:57:42 +02004770 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004771
4772 struct mlx5_ifc_cqc_bits cq_context;
4773
Matan Barakb4ff3a32016-02-09 14:57:42 +02004774 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004775
4776 u8 pas[0][0x40];
4777};
4778
4779struct mlx5_ifc_query_cq_in_bits {
4780 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004781 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004782
Matan Barakb4ff3a32016-02-09 14:57:42 +02004783 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004784 u8 op_mod[0x10];
4785
Matan Barakb4ff3a32016-02-09 14:57:42 +02004786 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004787 u8 cqn[0x18];
4788
Matan Barakb4ff3a32016-02-09 14:57:42 +02004789 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004790};
4791
4792struct mlx5_ifc_query_cong_status_out_bits {
4793 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004794 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004795
4796 u8 syndrome[0x20];
4797
Matan Barakb4ff3a32016-02-09 14:57:42 +02004798 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004799
4800 u8 enable[0x1];
4801 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004802 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004803};
4804
4805struct mlx5_ifc_query_cong_status_in_bits {
4806 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004807 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004808
Matan Barakb4ff3a32016-02-09 14:57:42 +02004809 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004810 u8 op_mod[0x10];
4811
Matan Barakb4ff3a32016-02-09 14:57:42 +02004812 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004813 u8 priority[0x4];
4814 u8 cong_protocol[0x4];
4815
Matan Barakb4ff3a32016-02-09 14:57:42 +02004816 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004817};
4818
4819struct mlx5_ifc_query_cong_statistics_out_bits {
4820 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004821 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004822
4823 u8 syndrome[0x20];
4824
Matan Barakb4ff3a32016-02-09 14:57:42 +02004825 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004826
Parav Pandite1f24a72017-04-16 07:29:29 +03004827 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004828
4829 u8 sum_flows[0x20];
4830
Parav Pandite1f24a72017-04-16 07:29:29 +03004831 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004832
Parav Pandite1f24a72017-04-16 07:29:29 +03004833 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004834
Parav Pandite1f24a72017-04-16 07:29:29 +03004835 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004836
Parav Pandite1f24a72017-04-16 07:29:29 +03004837 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004838
Matan Barakb4ff3a32016-02-09 14:57:42 +02004839 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004840
4841 u8 time_stamp_high[0x20];
4842
4843 u8 time_stamp_low[0x20];
4844
4845 u8 accumulators_period[0x20];
4846
Parav Pandite1f24a72017-04-16 07:29:29 +03004847 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004848
Parav Pandite1f24a72017-04-16 07:29:29 +03004849 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004850
Parav Pandite1f24a72017-04-16 07:29:29 +03004851 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004852
Parav Pandite1f24a72017-04-16 07:29:29 +03004853 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004854
Matan Barakb4ff3a32016-02-09 14:57:42 +02004855 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004856};
4857
4858struct mlx5_ifc_query_cong_statistics_in_bits {
4859 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004860 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004861
Matan Barakb4ff3a32016-02-09 14:57:42 +02004862 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004863 u8 op_mod[0x10];
4864
4865 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004866 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004867
Matan Barakb4ff3a32016-02-09 14:57:42 +02004868 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004869};
4870
4871struct mlx5_ifc_query_cong_params_out_bits {
4872 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004873 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004874
4875 u8 syndrome[0x20];
4876
Matan Barakb4ff3a32016-02-09 14:57:42 +02004877 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004878
4879 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4880};
4881
4882struct mlx5_ifc_query_cong_params_in_bits {
4883 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004884 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004885
Matan Barakb4ff3a32016-02-09 14:57:42 +02004886 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004887 u8 op_mod[0x10];
4888
Matan Barakb4ff3a32016-02-09 14:57:42 +02004889 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004890 u8 cong_protocol[0x4];
4891
Matan Barakb4ff3a32016-02-09 14:57:42 +02004892 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004893};
4894
4895struct mlx5_ifc_query_adapter_out_bits {
4896 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004897 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004898
4899 u8 syndrome[0x20];
4900
Matan Barakb4ff3a32016-02-09 14:57:42 +02004901 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004902
4903 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4904};
4905
4906struct mlx5_ifc_query_adapter_in_bits {
4907 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004908 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004909
Matan Barakb4ff3a32016-02-09 14:57:42 +02004910 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004911 u8 op_mod[0x10];
4912
Matan Barakb4ff3a32016-02-09 14:57:42 +02004913 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004914};
4915
4916struct mlx5_ifc_qp_2rst_out_bits {
4917 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004918 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004919
4920 u8 syndrome[0x20];
4921
Matan Barakb4ff3a32016-02-09 14:57:42 +02004922 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004923};
4924
4925struct mlx5_ifc_qp_2rst_in_bits {
4926 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004927 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004928
Matan Barakb4ff3a32016-02-09 14:57:42 +02004929 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004930 u8 op_mod[0x10];
4931
Matan Barakb4ff3a32016-02-09 14:57:42 +02004932 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004933 u8 qpn[0x18];
4934
Matan Barakb4ff3a32016-02-09 14:57:42 +02004935 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004936};
4937
4938struct mlx5_ifc_qp_2err_out_bits {
4939 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004940 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004941
4942 u8 syndrome[0x20];
4943
Matan Barakb4ff3a32016-02-09 14:57:42 +02004944 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004945};
4946
4947struct mlx5_ifc_qp_2err_in_bits {
4948 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004949 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004950
Matan Barakb4ff3a32016-02-09 14:57:42 +02004951 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004952 u8 op_mod[0x10];
4953
Matan Barakb4ff3a32016-02-09 14:57:42 +02004954 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004955 u8 qpn[0x18];
4956
Matan Barakb4ff3a32016-02-09 14:57:42 +02004957 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004958};
4959
4960struct mlx5_ifc_page_fault_resume_out_bits {
4961 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004962 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004963
4964 u8 syndrome[0x20];
4965
Matan Barakb4ff3a32016-02-09 14:57:42 +02004966 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004967};
4968
4969struct mlx5_ifc_page_fault_resume_in_bits {
4970 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004971 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004972
Matan Barakb4ff3a32016-02-09 14:57:42 +02004973 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004974 u8 op_mod[0x10];
4975
4976 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004977 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004978 u8 page_fault_type[0x3];
4979 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004980
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004981 u8 reserved_at_60[0x8];
4982 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004983};
4984
4985struct mlx5_ifc_nop_out_bits {
4986 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004987 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004988
4989 u8 syndrome[0x20];
4990
Matan Barakb4ff3a32016-02-09 14:57:42 +02004991 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004992};
4993
4994struct mlx5_ifc_nop_in_bits {
4995 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004996 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004997
Matan Barakb4ff3a32016-02-09 14:57:42 +02004998 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004999 u8 op_mod[0x10];
5000
Matan Barakb4ff3a32016-02-09 14:57:42 +02005001 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005002};
5003
5004struct mlx5_ifc_modify_vport_state_out_bits {
5005 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005006 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005007
5008 u8 syndrome[0x20];
5009
Matan Barakb4ff3a32016-02-09 14:57:42 +02005010 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005011};
5012
5013struct mlx5_ifc_modify_vport_state_in_bits {
5014 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005015 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005016
Matan Barakb4ff3a32016-02-09 14:57:42 +02005017 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005018 u8 op_mod[0x10];
5019
5020 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005021 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005022 u8 vport_number[0x10];
5023
Matan Barakb4ff3a32016-02-09 14:57:42 +02005024 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005025 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005026 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005027};
5028
5029struct mlx5_ifc_modify_tis_out_bits {
5030 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005031 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005032
5033 u8 syndrome[0x20];
5034
Matan Barakb4ff3a32016-02-09 14:57:42 +02005035 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005036};
5037
majd@mellanox.com75850d02016-01-14 19:13:06 +02005038struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005039 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005040
Aviv Heller84df61e2016-05-10 13:47:50 +03005041 u8 reserved_at_20[0x1d];
5042 u8 lag_tx_port_affinity[0x1];
5043 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005044 u8 prio[0x1];
5045};
5046
Saeed Mahameede2816822015-05-28 22:28:40 +03005047struct mlx5_ifc_modify_tis_in_bits {
5048 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005049 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005050
Matan Barakb4ff3a32016-02-09 14:57:42 +02005051 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005052 u8 op_mod[0x10];
5053
Matan Barakb4ff3a32016-02-09 14:57:42 +02005054 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005055 u8 tisn[0x18];
5056
Matan Barakb4ff3a32016-02-09 14:57:42 +02005057 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005058
majd@mellanox.com75850d02016-01-14 19:13:06 +02005059 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005060
Matan Barakb4ff3a32016-02-09 14:57:42 +02005061 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005062
5063 struct mlx5_ifc_tisc_bits ctx;
5064};
5065
Achiad Shochatd9eea402015-08-04 14:05:42 +03005066struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005067 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005068
Matan Barakb4ff3a32016-02-09 14:57:42 +02005069 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005070 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005071 u8 reserved_at_3c[0x1];
5072 u8 hash[0x1];
5073 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005074 u8 lro[0x1];
5075};
5076
Saeed Mahameede2816822015-05-28 22:28:40 +03005077struct mlx5_ifc_modify_tir_out_bits {
5078 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005079 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005080
5081 u8 syndrome[0x20];
5082
Matan Barakb4ff3a32016-02-09 14:57:42 +02005083 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005084};
5085
5086struct mlx5_ifc_modify_tir_in_bits {
5087 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005088 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005089
Matan Barakb4ff3a32016-02-09 14:57:42 +02005090 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005091 u8 op_mod[0x10];
5092
Matan Barakb4ff3a32016-02-09 14:57:42 +02005093 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005094 u8 tirn[0x18];
5095
Matan Barakb4ff3a32016-02-09 14:57:42 +02005096 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005097
Achiad Shochatd9eea402015-08-04 14:05:42 +03005098 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005099
Matan Barakb4ff3a32016-02-09 14:57:42 +02005100 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005101
5102 struct mlx5_ifc_tirc_bits ctx;
5103};
5104
5105struct mlx5_ifc_modify_sq_out_bits {
5106 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005107 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005108
5109 u8 syndrome[0x20];
5110
Matan Barakb4ff3a32016-02-09 14:57:42 +02005111 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005112};
5113
5114struct mlx5_ifc_modify_sq_in_bits {
5115 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005116 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005117
Matan Barakb4ff3a32016-02-09 14:57:42 +02005118 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005119 u8 op_mod[0x10];
5120
5121 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005122 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005123 u8 sqn[0x18];
5124
Matan Barakb4ff3a32016-02-09 14:57:42 +02005125 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005126
5127 u8 modify_bitmask[0x40];
5128
Matan Barakb4ff3a32016-02-09 14:57:42 +02005129 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005130
5131 struct mlx5_ifc_sqc_bits ctx;
5132};
5133
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005134struct mlx5_ifc_modify_scheduling_element_out_bits {
5135 u8 status[0x8];
5136 u8 reserved_at_8[0x18];
5137
5138 u8 syndrome[0x20];
5139
5140 u8 reserved_at_40[0x1c0];
5141};
5142
5143enum {
5144 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5145 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5146};
5147
5148struct mlx5_ifc_modify_scheduling_element_in_bits {
5149 u8 opcode[0x10];
5150 u8 reserved_at_10[0x10];
5151
5152 u8 reserved_at_20[0x10];
5153 u8 op_mod[0x10];
5154
5155 u8 scheduling_hierarchy[0x8];
5156 u8 reserved_at_48[0x18];
5157
5158 u8 scheduling_element_id[0x20];
5159
5160 u8 reserved_at_80[0x20];
5161
5162 u8 modify_bitmask[0x20];
5163
5164 u8 reserved_at_c0[0x40];
5165
5166 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5167
5168 u8 reserved_at_300[0x100];
5169};
5170
Saeed Mahameede2816822015-05-28 22:28:40 +03005171struct mlx5_ifc_modify_rqt_out_bits {
5172 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005173 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005174
5175 u8 syndrome[0x20];
5176
Matan Barakb4ff3a32016-02-09 14:57:42 +02005177 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005178};
5179
Achiad Shochat5c503682015-08-04 14:05:43 +03005180struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005181 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005182
Matan Barakb4ff3a32016-02-09 14:57:42 +02005183 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005184 u8 rqn_list[0x1];
5185};
5186
Saeed Mahameede2816822015-05-28 22:28:40 +03005187struct mlx5_ifc_modify_rqt_in_bits {
5188 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005189 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005190
Matan Barakb4ff3a32016-02-09 14:57:42 +02005191 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005192 u8 op_mod[0x10];
5193
Matan Barakb4ff3a32016-02-09 14:57:42 +02005194 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005195 u8 rqtn[0x18];
5196
Matan Barakb4ff3a32016-02-09 14:57:42 +02005197 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005198
Achiad Shochat5c503682015-08-04 14:05:43 +03005199 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005200
Matan Barakb4ff3a32016-02-09 14:57:42 +02005201 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005202
5203 struct mlx5_ifc_rqtc_bits ctx;
5204};
5205
5206struct mlx5_ifc_modify_rq_out_bits {
5207 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005208 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005209
5210 u8 syndrome[0x20];
5211
Matan Barakb4ff3a32016-02-09 14:57:42 +02005212 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005213};
5214
Alex Vesker83b502a2016-08-04 17:32:02 +03005215enum {
5216 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005217 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005218 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005219};
5220
Saeed Mahameede2816822015-05-28 22:28:40 +03005221struct mlx5_ifc_modify_rq_in_bits {
5222 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005223 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005224
Matan Barakb4ff3a32016-02-09 14:57:42 +02005225 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005226 u8 op_mod[0x10];
5227
5228 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005229 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005230 u8 rqn[0x18];
5231
Matan Barakb4ff3a32016-02-09 14:57:42 +02005232 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005233
5234 u8 modify_bitmask[0x40];
5235
Matan Barakb4ff3a32016-02-09 14:57:42 +02005236 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005237
5238 struct mlx5_ifc_rqc_bits ctx;
5239};
5240
5241struct mlx5_ifc_modify_rmp_out_bits {
5242 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005243 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005244
5245 u8 syndrome[0x20];
5246
Matan Barakb4ff3a32016-02-09 14:57:42 +02005247 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005248};
5249
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005250struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005251 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005252
Matan Barakb4ff3a32016-02-09 14:57:42 +02005253 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005254 u8 lwm[0x1];
5255};
5256
Saeed Mahameede2816822015-05-28 22:28:40 +03005257struct mlx5_ifc_modify_rmp_in_bits {
5258 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005259 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005260
Matan Barakb4ff3a32016-02-09 14:57:42 +02005261 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005262 u8 op_mod[0x10];
5263
5264 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005265 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005266 u8 rmpn[0x18];
5267
Matan Barakb4ff3a32016-02-09 14:57:42 +02005268 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005269
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005270 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005271
Matan Barakb4ff3a32016-02-09 14:57:42 +02005272 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005273
5274 struct mlx5_ifc_rmpc_bits ctx;
5275};
5276
5277struct mlx5_ifc_modify_nic_vport_context_out_bits {
5278 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005279 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005280
5281 u8 syndrome[0x20];
5282
Matan Barakb4ff3a32016-02-09 14:57:42 +02005283 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005284};
5285
5286struct mlx5_ifc_modify_nic_vport_field_select_bits {
Huy Nguyenbded7472017-05-30 09:42:53 +03005287 u8 reserved_at_0[0x14];
5288 u8 disable_uc_local_lb[0x1];
5289 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005290 u8 node_guid[0x1];
5291 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005292 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005293 u8 mtu[0x1];
5294 u8 change_event[0x1];
5295 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005296 u8 permanent_address[0x1];
5297 u8 addresses_list[0x1];
5298 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005299 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005300};
5301
5302struct mlx5_ifc_modify_nic_vport_context_in_bits {
5303 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005304 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005305
Matan Barakb4ff3a32016-02-09 14:57:42 +02005306 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005307 u8 op_mod[0x10];
5308
5309 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005310 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005311 u8 vport_number[0x10];
5312
5313 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5314
Matan Barakb4ff3a32016-02-09 14:57:42 +02005315 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005316
5317 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5318};
5319
5320struct mlx5_ifc_modify_hca_vport_context_out_bits {
5321 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005322 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005323
5324 u8 syndrome[0x20];
5325
Matan Barakb4ff3a32016-02-09 14:57:42 +02005326 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005327};
5328
5329struct mlx5_ifc_modify_hca_vport_context_in_bits {
5330 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005331 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005332
Matan Barakb4ff3a32016-02-09 14:57:42 +02005333 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005334 u8 op_mod[0x10];
5335
5336 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005337 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005338 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005339 u8 vport_number[0x10];
5340
Matan Barakb4ff3a32016-02-09 14:57:42 +02005341 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005342
5343 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5344};
5345
5346struct mlx5_ifc_modify_cq_out_bits {
5347 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005348 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005349
5350 u8 syndrome[0x20];
5351
Matan Barakb4ff3a32016-02-09 14:57:42 +02005352 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005353};
5354
5355enum {
5356 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5357 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5358};
5359
5360struct mlx5_ifc_modify_cq_in_bits {
5361 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005362 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005363
Matan Barakb4ff3a32016-02-09 14:57:42 +02005364 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005365 u8 op_mod[0x10];
5366
Matan Barakb4ff3a32016-02-09 14:57:42 +02005367 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005368 u8 cqn[0x18];
5369
5370 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5371
5372 struct mlx5_ifc_cqc_bits cq_context;
5373
Matan Barakb4ff3a32016-02-09 14:57:42 +02005374 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005375
5376 u8 pas[0][0x40];
5377};
5378
5379struct mlx5_ifc_modify_cong_status_out_bits {
5380 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005381 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005382
5383 u8 syndrome[0x20];
5384
Matan Barakb4ff3a32016-02-09 14:57:42 +02005385 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005386};
5387
5388struct mlx5_ifc_modify_cong_status_in_bits {
5389 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005390 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005391
Matan Barakb4ff3a32016-02-09 14:57:42 +02005392 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005393 u8 op_mod[0x10];
5394
Matan Barakb4ff3a32016-02-09 14:57:42 +02005395 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005396 u8 priority[0x4];
5397 u8 cong_protocol[0x4];
5398
5399 u8 enable[0x1];
5400 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005401 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005402};
5403
5404struct mlx5_ifc_modify_cong_params_out_bits {
5405 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005406 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005407
5408 u8 syndrome[0x20];
5409
Matan Barakb4ff3a32016-02-09 14:57:42 +02005410 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005411};
5412
5413struct mlx5_ifc_modify_cong_params_in_bits {
5414 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005415 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005416
Matan Barakb4ff3a32016-02-09 14:57:42 +02005417 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005418 u8 op_mod[0x10];
5419
Matan Barakb4ff3a32016-02-09 14:57:42 +02005420 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005421 u8 cong_protocol[0x4];
5422
5423 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5424
Matan Barakb4ff3a32016-02-09 14:57:42 +02005425 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005426
5427 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5428};
5429
5430struct mlx5_ifc_manage_pages_out_bits {
5431 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005432 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005433
5434 u8 syndrome[0x20];
5435
5436 u8 output_num_entries[0x20];
5437
Matan Barakb4ff3a32016-02-09 14:57:42 +02005438 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005439
5440 u8 pas[0][0x40];
5441};
5442
5443enum {
5444 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5445 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5446 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5447};
5448
5449struct mlx5_ifc_manage_pages_in_bits {
5450 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005451 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005452
Matan Barakb4ff3a32016-02-09 14:57:42 +02005453 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005454 u8 op_mod[0x10];
5455
Matan Barakb4ff3a32016-02-09 14:57:42 +02005456 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005457 u8 function_id[0x10];
5458
5459 u8 input_num_entries[0x20];
5460
5461 u8 pas[0][0x40];
5462};
5463
5464struct mlx5_ifc_mad_ifc_out_bits {
5465 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005466 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005467
5468 u8 syndrome[0x20];
5469
Matan Barakb4ff3a32016-02-09 14:57:42 +02005470 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005471
5472 u8 response_mad_packet[256][0x8];
5473};
5474
5475struct mlx5_ifc_mad_ifc_in_bits {
5476 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005477 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005478
Matan Barakb4ff3a32016-02-09 14:57:42 +02005479 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005480 u8 op_mod[0x10];
5481
5482 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005483 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005484 u8 port[0x8];
5485
Matan Barakb4ff3a32016-02-09 14:57:42 +02005486 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005487
5488 u8 mad[256][0x8];
5489};
5490
5491struct mlx5_ifc_init_hca_out_bits {
5492 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005493 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005494
5495 u8 syndrome[0x20];
5496
Matan Barakb4ff3a32016-02-09 14:57:42 +02005497 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005498};
5499
5500struct mlx5_ifc_init_hca_in_bits {
5501 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005502 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005503
Matan Barakb4ff3a32016-02-09 14:57:42 +02005504 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005505 u8 op_mod[0x10];
5506
Matan Barakb4ff3a32016-02-09 14:57:42 +02005507 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005508};
5509
5510struct mlx5_ifc_init2rtr_qp_out_bits {
5511 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005512 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005513
5514 u8 syndrome[0x20];
5515
Matan Barakb4ff3a32016-02-09 14:57:42 +02005516 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005517};
5518
5519struct mlx5_ifc_init2rtr_qp_in_bits {
5520 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005521 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005522
Matan Barakb4ff3a32016-02-09 14:57:42 +02005523 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005524 u8 op_mod[0x10];
5525
Matan Barakb4ff3a32016-02-09 14:57:42 +02005526 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005527 u8 qpn[0x18];
5528
Matan Barakb4ff3a32016-02-09 14:57:42 +02005529 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005530
5531 u8 opt_param_mask[0x20];
5532
Matan Barakb4ff3a32016-02-09 14:57:42 +02005533 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005534
5535 struct mlx5_ifc_qpc_bits qpc;
5536
Matan Barakb4ff3a32016-02-09 14:57:42 +02005537 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005538};
5539
5540struct mlx5_ifc_init2init_qp_out_bits {
5541 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005542 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005543
5544 u8 syndrome[0x20];
5545
Matan Barakb4ff3a32016-02-09 14:57:42 +02005546 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005547};
5548
5549struct mlx5_ifc_init2init_qp_in_bits {
5550 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005551 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005552
Matan Barakb4ff3a32016-02-09 14:57:42 +02005553 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005554 u8 op_mod[0x10];
5555
Matan Barakb4ff3a32016-02-09 14:57:42 +02005556 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005557 u8 qpn[0x18];
5558
Matan Barakb4ff3a32016-02-09 14:57:42 +02005559 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005560
5561 u8 opt_param_mask[0x20];
5562
Matan Barakb4ff3a32016-02-09 14:57:42 +02005563 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005564
5565 struct mlx5_ifc_qpc_bits qpc;
5566
Matan Barakb4ff3a32016-02-09 14:57:42 +02005567 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005568};
5569
5570struct mlx5_ifc_get_dropped_packet_log_out_bits {
5571 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005572 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005573
5574 u8 syndrome[0x20];
5575
Matan Barakb4ff3a32016-02-09 14:57:42 +02005576 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005577
5578 u8 packet_headers_log[128][0x8];
5579
5580 u8 packet_syndrome[64][0x8];
5581};
5582
5583struct mlx5_ifc_get_dropped_packet_log_in_bits {
5584 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005585 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005586
Matan Barakb4ff3a32016-02-09 14:57:42 +02005587 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005588 u8 op_mod[0x10];
5589
Matan Barakb4ff3a32016-02-09 14:57:42 +02005590 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005591};
5592
5593struct mlx5_ifc_gen_eqe_in_bits {
5594 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005595 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005596
Matan Barakb4ff3a32016-02-09 14:57:42 +02005597 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005598 u8 op_mod[0x10];
5599
Matan Barakb4ff3a32016-02-09 14:57:42 +02005600 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005601 u8 eq_number[0x8];
5602
Matan Barakb4ff3a32016-02-09 14:57:42 +02005603 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005604
5605 u8 eqe[64][0x8];
5606};
5607
5608struct mlx5_ifc_gen_eq_out_bits {
5609 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005610 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005611
5612 u8 syndrome[0x20];
5613
Matan Barakb4ff3a32016-02-09 14:57:42 +02005614 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005615};
5616
5617struct mlx5_ifc_enable_hca_out_bits {
5618 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005619 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005620
5621 u8 syndrome[0x20];
5622
Matan Barakb4ff3a32016-02-09 14:57:42 +02005623 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005624};
5625
5626struct mlx5_ifc_enable_hca_in_bits {
5627 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005628 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005629
Matan Barakb4ff3a32016-02-09 14:57:42 +02005630 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005631 u8 op_mod[0x10];
5632
Matan Barakb4ff3a32016-02-09 14:57:42 +02005633 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005634 u8 function_id[0x10];
5635
Matan Barakb4ff3a32016-02-09 14:57:42 +02005636 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005637};
5638
5639struct mlx5_ifc_drain_dct_out_bits {
5640 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005641 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005642
5643 u8 syndrome[0x20];
5644
Matan Barakb4ff3a32016-02-09 14:57:42 +02005645 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005646};
5647
5648struct mlx5_ifc_drain_dct_in_bits {
5649 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005650 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005651
Matan Barakb4ff3a32016-02-09 14:57:42 +02005652 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005653 u8 op_mod[0x10];
5654
Matan Barakb4ff3a32016-02-09 14:57:42 +02005655 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005656 u8 dctn[0x18];
5657
Matan Barakb4ff3a32016-02-09 14:57:42 +02005658 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005659};
5660
5661struct mlx5_ifc_disable_hca_out_bits {
5662 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005663 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005664
5665 u8 syndrome[0x20];
5666
Matan Barakb4ff3a32016-02-09 14:57:42 +02005667 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005668};
5669
5670struct mlx5_ifc_disable_hca_in_bits {
5671 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005672 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005673
Matan Barakb4ff3a32016-02-09 14:57:42 +02005674 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005675 u8 op_mod[0x10];
5676
Matan Barakb4ff3a32016-02-09 14:57:42 +02005677 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005678 u8 function_id[0x10];
5679
Matan Barakb4ff3a32016-02-09 14:57:42 +02005680 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005681};
5682
5683struct mlx5_ifc_detach_from_mcg_out_bits {
5684 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005685 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005686
5687 u8 syndrome[0x20];
5688
Matan Barakb4ff3a32016-02-09 14:57:42 +02005689 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005690};
5691
5692struct mlx5_ifc_detach_from_mcg_in_bits {
5693 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005694 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005695
Matan Barakb4ff3a32016-02-09 14:57:42 +02005696 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005697 u8 op_mod[0x10];
5698
Matan Barakb4ff3a32016-02-09 14:57:42 +02005699 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005700 u8 qpn[0x18];
5701
Matan Barakb4ff3a32016-02-09 14:57:42 +02005702 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005703
5704 u8 multicast_gid[16][0x8];
5705};
5706
Saeed Mahameed74862162016-06-09 15:11:34 +03005707struct mlx5_ifc_destroy_xrq_out_bits {
5708 u8 status[0x8];
5709 u8 reserved_at_8[0x18];
5710
5711 u8 syndrome[0x20];
5712
5713 u8 reserved_at_40[0x40];
5714};
5715
5716struct mlx5_ifc_destroy_xrq_in_bits {
5717 u8 opcode[0x10];
5718 u8 reserved_at_10[0x10];
5719
5720 u8 reserved_at_20[0x10];
5721 u8 op_mod[0x10];
5722
5723 u8 reserved_at_40[0x8];
5724 u8 xrqn[0x18];
5725
5726 u8 reserved_at_60[0x20];
5727};
5728
Saeed Mahameede2816822015-05-28 22:28:40 +03005729struct mlx5_ifc_destroy_xrc_srq_out_bits {
5730 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005731 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005732
5733 u8 syndrome[0x20];
5734
Matan Barakb4ff3a32016-02-09 14:57:42 +02005735 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005736};
5737
5738struct mlx5_ifc_destroy_xrc_srq_in_bits {
5739 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005740 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005741
Matan Barakb4ff3a32016-02-09 14:57:42 +02005742 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005743 u8 op_mod[0x10];
5744
Matan Barakb4ff3a32016-02-09 14:57:42 +02005745 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005746 u8 xrc_srqn[0x18];
5747
Matan Barakb4ff3a32016-02-09 14:57:42 +02005748 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005749};
5750
5751struct mlx5_ifc_destroy_tis_out_bits {
5752 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005753 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005754
5755 u8 syndrome[0x20];
5756
Matan Barakb4ff3a32016-02-09 14:57:42 +02005757 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005758};
5759
5760struct mlx5_ifc_destroy_tis_in_bits {
5761 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005762 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005763
Matan Barakb4ff3a32016-02-09 14:57:42 +02005764 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005765 u8 op_mod[0x10];
5766
Matan Barakb4ff3a32016-02-09 14:57:42 +02005767 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005768 u8 tisn[0x18];
5769
Matan Barakb4ff3a32016-02-09 14:57:42 +02005770 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005771};
5772
5773struct mlx5_ifc_destroy_tir_out_bits {
5774 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005775 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005776
5777 u8 syndrome[0x20];
5778
Matan Barakb4ff3a32016-02-09 14:57:42 +02005779 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005780};
5781
5782struct mlx5_ifc_destroy_tir_in_bits {
5783 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005784 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005785
Matan Barakb4ff3a32016-02-09 14:57:42 +02005786 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005787 u8 op_mod[0x10];
5788
Matan Barakb4ff3a32016-02-09 14:57:42 +02005789 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005790 u8 tirn[0x18];
5791
Matan Barakb4ff3a32016-02-09 14:57:42 +02005792 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005793};
5794
5795struct mlx5_ifc_destroy_srq_out_bits {
5796 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005797 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005798
5799 u8 syndrome[0x20];
5800
Matan Barakb4ff3a32016-02-09 14:57:42 +02005801 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005802};
5803
5804struct mlx5_ifc_destroy_srq_in_bits {
5805 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005806 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005807
Matan Barakb4ff3a32016-02-09 14:57:42 +02005808 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005809 u8 op_mod[0x10];
5810
Matan Barakb4ff3a32016-02-09 14:57:42 +02005811 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005812 u8 srqn[0x18];
5813
Matan Barakb4ff3a32016-02-09 14:57:42 +02005814 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005815};
5816
5817struct mlx5_ifc_destroy_sq_out_bits {
5818 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005819 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005820
5821 u8 syndrome[0x20];
5822
Matan Barakb4ff3a32016-02-09 14:57:42 +02005823 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005824};
5825
5826struct mlx5_ifc_destroy_sq_in_bits {
5827 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005828 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005829
Matan Barakb4ff3a32016-02-09 14:57:42 +02005830 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005831 u8 op_mod[0x10];
5832
Matan Barakb4ff3a32016-02-09 14:57:42 +02005833 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005834 u8 sqn[0x18];
5835
Matan Barakb4ff3a32016-02-09 14:57:42 +02005836 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005837};
5838
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005839struct mlx5_ifc_destroy_scheduling_element_out_bits {
5840 u8 status[0x8];
5841 u8 reserved_at_8[0x18];
5842
5843 u8 syndrome[0x20];
5844
5845 u8 reserved_at_40[0x1c0];
5846};
5847
5848struct mlx5_ifc_destroy_scheduling_element_in_bits {
5849 u8 opcode[0x10];
5850 u8 reserved_at_10[0x10];
5851
5852 u8 reserved_at_20[0x10];
5853 u8 op_mod[0x10];
5854
5855 u8 scheduling_hierarchy[0x8];
5856 u8 reserved_at_48[0x18];
5857
5858 u8 scheduling_element_id[0x20];
5859
5860 u8 reserved_at_80[0x180];
5861};
5862
Saeed Mahameede2816822015-05-28 22:28:40 +03005863struct mlx5_ifc_destroy_rqt_out_bits {
5864 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005865 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005866
5867 u8 syndrome[0x20];
5868
Matan Barakb4ff3a32016-02-09 14:57:42 +02005869 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005870};
5871
5872struct mlx5_ifc_destroy_rqt_in_bits {
5873 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005874 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005875
Matan Barakb4ff3a32016-02-09 14:57:42 +02005876 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005877 u8 op_mod[0x10];
5878
Matan Barakb4ff3a32016-02-09 14:57:42 +02005879 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005880 u8 rqtn[0x18];
5881
Matan Barakb4ff3a32016-02-09 14:57:42 +02005882 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005883};
5884
5885struct mlx5_ifc_destroy_rq_out_bits {
5886 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005887 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005888
5889 u8 syndrome[0x20];
5890
Matan Barakb4ff3a32016-02-09 14:57:42 +02005891 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005892};
5893
5894struct mlx5_ifc_destroy_rq_in_bits {
5895 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005896 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005897
Matan Barakb4ff3a32016-02-09 14:57:42 +02005898 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005899 u8 op_mod[0x10];
5900
Matan Barakb4ff3a32016-02-09 14:57:42 +02005901 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005902 u8 rqn[0x18];
5903
Matan Barakb4ff3a32016-02-09 14:57:42 +02005904 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005905};
5906
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03005907struct mlx5_ifc_set_delay_drop_params_in_bits {
5908 u8 opcode[0x10];
5909 u8 reserved_at_10[0x10];
5910
5911 u8 reserved_at_20[0x10];
5912 u8 op_mod[0x10];
5913
5914 u8 reserved_at_40[0x20];
5915
5916 u8 reserved_at_60[0x10];
5917 u8 delay_drop_timeout[0x10];
5918};
5919
5920struct mlx5_ifc_set_delay_drop_params_out_bits {
5921 u8 status[0x8];
5922 u8 reserved_at_8[0x18];
5923
5924 u8 syndrome[0x20];
5925
5926 u8 reserved_at_40[0x40];
5927};
5928
Saeed Mahameede2816822015-05-28 22:28:40 +03005929struct mlx5_ifc_destroy_rmp_out_bits {
5930 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005931 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005932
5933 u8 syndrome[0x20];
5934
Matan Barakb4ff3a32016-02-09 14:57:42 +02005935 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005936};
5937
5938struct mlx5_ifc_destroy_rmp_in_bits {
5939 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005940 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005941
Matan Barakb4ff3a32016-02-09 14:57:42 +02005942 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005943 u8 op_mod[0x10];
5944
Matan Barakb4ff3a32016-02-09 14:57:42 +02005945 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005946 u8 rmpn[0x18];
5947
Matan Barakb4ff3a32016-02-09 14:57:42 +02005948 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005949};
5950
5951struct mlx5_ifc_destroy_qp_out_bits {
5952 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005953 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005954
5955 u8 syndrome[0x20];
5956
Matan Barakb4ff3a32016-02-09 14:57:42 +02005957 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005958};
5959
5960struct mlx5_ifc_destroy_qp_in_bits {
5961 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005962 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005963
Matan Barakb4ff3a32016-02-09 14:57:42 +02005964 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005965 u8 op_mod[0x10];
5966
Matan Barakb4ff3a32016-02-09 14:57:42 +02005967 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005968 u8 qpn[0x18];
5969
Matan Barakb4ff3a32016-02-09 14:57:42 +02005970 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005971};
5972
5973struct mlx5_ifc_destroy_psv_out_bits {
5974 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005975 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005976
5977 u8 syndrome[0x20];
5978
Matan Barakb4ff3a32016-02-09 14:57:42 +02005979 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005980};
5981
5982struct mlx5_ifc_destroy_psv_in_bits {
5983 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005984 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005985
Matan Barakb4ff3a32016-02-09 14:57:42 +02005986 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005987 u8 op_mod[0x10];
5988
Matan Barakb4ff3a32016-02-09 14:57:42 +02005989 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005990 u8 psvn[0x18];
5991
Matan Barakb4ff3a32016-02-09 14:57:42 +02005992 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005993};
5994
5995struct mlx5_ifc_destroy_mkey_out_bits {
5996 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005997 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005998
5999 u8 syndrome[0x20];
6000
Matan Barakb4ff3a32016-02-09 14:57:42 +02006001 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006002};
6003
6004struct mlx5_ifc_destroy_mkey_in_bits {
6005 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006006 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006007
Matan Barakb4ff3a32016-02-09 14:57:42 +02006008 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006009 u8 op_mod[0x10];
6010
Matan Barakb4ff3a32016-02-09 14:57:42 +02006011 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006012 u8 mkey_index[0x18];
6013
Matan Barakb4ff3a32016-02-09 14:57:42 +02006014 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006015};
6016
6017struct mlx5_ifc_destroy_flow_table_out_bits {
6018 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006019 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006020
6021 u8 syndrome[0x20];
6022
Matan Barakb4ff3a32016-02-09 14:57:42 +02006023 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006024};
6025
6026struct mlx5_ifc_destroy_flow_table_in_bits {
6027 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006028 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006029
Matan Barakb4ff3a32016-02-09 14:57:42 +02006030 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006031 u8 op_mod[0x10];
6032
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006033 u8 other_vport[0x1];
6034 u8 reserved_at_41[0xf];
6035 u8 vport_number[0x10];
6036
6037 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006038
6039 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006040 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006041
Matan Barakb4ff3a32016-02-09 14:57:42 +02006042 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006043 u8 table_id[0x18];
6044
Matan Barakb4ff3a32016-02-09 14:57:42 +02006045 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006046};
6047
6048struct mlx5_ifc_destroy_flow_group_out_bits {
6049 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006050 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006051
6052 u8 syndrome[0x20];
6053
Matan Barakb4ff3a32016-02-09 14:57:42 +02006054 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006055};
6056
6057struct mlx5_ifc_destroy_flow_group_in_bits {
6058 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006059 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006060
Matan Barakb4ff3a32016-02-09 14:57:42 +02006061 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006062 u8 op_mod[0x10];
6063
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006064 u8 other_vport[0x1];
6065 u8 reserved_at_41[0xf];
6066 u8 vport_number[0x10];
6067
6068 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006069
6070 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006071 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006072
Matan Barakb4ff3a32016-02-09 14:57:42 +02006073 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006074 u8 table_id[0x18];
6075
6076 u8 group_id[0x20];
6077
Matan Barakb4ff3a32016-02-09 14:57:42 +02006078 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006079};
6080
6081struct mlx5_ifc_destroy_eq_out_bits {
6082 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006083 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006084
6085 u8 syndrome[0x20];
6086
Matan Barakb4ff3a32016-02-09 14:57:42 +02006087 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006088};
6089
6090struct mlx5_ifc_destroy_eq_in_bits {
6091 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006092 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006093
Matan Barakb4ff3a32016-02-09 14:57:42 +02006094 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006095 u8 op_mod[0x10];
6096
Matan Barakb4ff3a32016-02-09 14:57:42 +02006097 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006098 u8 eq_number[0x8];
6099
Matan Barakb4ff3a32016-02-09 14:57:42 +02006100 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006101};
6102
6103struct mlx5_ifc_destroy_dct_out_bits {
6104 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006105 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006106
6107 u8 syndrome[0x20];
6108
Matan Barakb4ff3a32016-02-09 14:57:42 +02006109 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006110};
6111
6112struct mlx5_ifc_destroy_dct_in_bits {
6113 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006114 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006115
Matan Barakb4ff3a32016-02-09 14:57:42 +02006116 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006117 u8 op_mod[0x10];
6118
Matan Barakb4ff3a32016-02-09 14:57:42 +02006119 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006120 u8 dctn[0x18];
6121
Matan Barakb4ff3a32016-02-09 14:57:42 +02006122 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006123};
6124
6125struct mlx5_ifc_destroy_cq_out_bits {
6126 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006127 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006128
6129 u8 syndrome[0x20];
6130
Matan Barakb4ff3a32016-02-09 14:57:42 +02006131 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006132};
6133
6134struct mlx5_ifc_destroy_cq_in_bits {
6135 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006136 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006137
Matan Barakb4ff3a32016-02-09 14:57:42 +02006138 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006139 u8 op_mod[0x10];
6140
Matan Barakb4ff3a32016-02-09 14:57:42 +02006141 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006142 u8 cqn[0x18];
6143
Matan Barakb4ff3a32016-02-09 14:57:42 +02006144 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006145};
6146
6147struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6148 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006149 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006150
6151 u8 syndrome[0x20];
6152
Matan Barakb4ff3a32016-02-09 14:57:42 +02006153 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006154};
6155
6156struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6157 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006158 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006159
Matan Barakb4ff3a32016-02-09 14:57:42 +02006160 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006161 u8 op_mod[0x10];
6162
Matan Barakb4ff3a32016-02-09 14:57:42 +02006163 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006164
Matan Barakb4ff3a32016-02-09 14:57:42 +02006165 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006166 u8 vxlan_udp_port[0x10];
6167};
6168
6169struct mlx5_ifc_delete_l2_table_entry_out_bits {
6170 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006171 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006172
6173 u8 syndrome[0x20];
6174
Matan Barakb4ff3a32016-02-09 14:57:42 +02006175 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006176};
6177
6178struct mlx5_ifc_delete_l2_table_entry_in_bits {
6179 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006180 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006181
Matan Barakb4ff3a32016-02-09 14:57:42 +02006182 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006183 u8 op_mod[0x10];
6184
Matan Barakb4ff3a32016-02-09 14:57:42 +02006185 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006186
Matan Barakb4ff3a32016-02-09 14:57:42 +02006187 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006188 u8 table_index[0x18];
6189
Matan Barakb4ff3a32016-02-09 14:57:42 +02006190 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006191};
6192
6193struct mlx5_ifc_delete_fte_out_bits {
6194 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006195 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006196
6197 u8 syndrome[0x20];
6198
Matan Barakb4ff3a32016-02-09 14:57:42 +02006199 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006200};
6201
6202struct mlx5_ifc_delete_fte_in_bits {
6203 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006204 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006205
Matan Barakb4ff3a32016-02-09 14:57:42 +02006206 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006207 u8 op_mod[0x10];
6208
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006209 u8 other_vport[0x1];
6210 u8 reserved_at_41[0xf];
6211 u8 vport_number[0x10];
6212
6213 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006214
6215 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006216 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006217
Matan Barakb4ff3a32016-02-09 14:57:42 +02006218 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006219 u8 table_id[0x18];
6220
Matan Barakb4ff3a32016-02-09 14:57:42 +02006221 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006222
6223 u8 flow_index[0x20];
6224
Matan Barakb4ff3a32016-02-09 14:57:42 +02006225 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006226};
6227
6228struct mlx5_ifc_dealloc_xrcd_out_bits {
6229 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006230 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006231
6232 u8 syndrome[0x20];
6233
Matan Barakb4ff3a32016-02-09 14:57:42 +02006234 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006235};
6236
6237struct mlx5_ifc_dealloc_xrcd_in_bits {
6238 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006239 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006240
Matan Barakb4ff3a32016-02-09 14:57:42 +02006241 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006242 u8 op_mod[0x10];
6243
Matan Barakb4ff3a32016-02-09 14:57:42 +02006244 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006245 u8 xrcd[0x18];
6246
Matan Barakb4ff3a32016-02-09 14:57:42 +02006247 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006248};
6249
6250struct mlx5_ifc_dealloc_uar_out_bits {
6251 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006252 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006253
6254 u8 syndrome[0x20];
6255
Matan Barakb4ff3a32016-02-09 14:57:42 +02006256 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006257};
6258
6259struct mlx5_ifc_dealloc_uar_in_bits {
6260 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006261 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006262
Matan Barakb4ff3a32016-02-09 14:57:42 +02006263 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006264 u8 op_mod[0x10];
6265
Matan Barakb4ff3a32016-02-09 14:57:42 +02006266 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006267 u8 uar[0x18];
6268
Matan Barakb4ff3a32016-02-09 14:57:42 +02006269 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006270};
6271
6272struct mlx5_ifc_dealloc_transport_domain_out_bits {
6273 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006274 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006275
6276 u8 syndrome[0x20];
6277
Matan Barakb4ff3a32016-02-09 14:57:42 +02006278 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006279};
6280
6281struct mlx5_ifc_dealloc_transport_domain_in_bits {
6282 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006283 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006284
Matan Barakb4ff3a32016-02-09 14:57:42 +02006285 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006286 u8 op_mod[0x10];
6287
Matan Barakb4ff3a32016-02-09 14:57:42 +02006288 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006289 u8 transport_domain[0x18];
6290
Matan Barakb4ff3a32016-02-09 14:57:42 +02006291 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006292};
6293
6294struct mlx5_ifc_dealloc_q_counter_out_bits {
6295 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006296 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006297
6298 u8 syndrome[0x20];
6299
Matan Barakb4ff3a32016-02-09 14:57:42 +02006300 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006301};
6302
6303struct mlx5_ifc_dealloc_q_counter_in_bits {
6304 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006305 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006306
Matan Barakb4ff3a32016-02-09 14:57:42 +02006307 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006308 u8 op_mod[0x10];
6309
Matan Barakb4ff3a32016-02-09 14:57:42 +02006310 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006311 u8 counter_set_id[0x8];
6312
Matan Barakb4ff3a32016-02-09 14:57:42 +02006313 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006314};
6315
6316struct mlx5_ifc_dealloc_pd_out_bits {
6317 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006318 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006319
6320 u8 syndrome[0x20];
6321
Matan Barakb4ff3a32016-02-09 14:57:42 +02006322 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006323};
6324
6325struct mlx5_ifc_dealloc_pd_in_bits {
6326 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006327 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006328
Matan Barakb4ff3a32016-02-09 14:57:42 +02006329 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006330 u8 op_mod[0x10];
6331
Matan Barakb4ff3a32016-02-09 14:57:42 +02006332 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006333 u8 pd[0x18];
6334
Matan Barakb4ff3a32016-02-09 14:57:42 +02006335 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006336};
6337
Amir Vadai9dc0b282016-05-13 12:55:39 +00006338struct mlx5_ifc_dealloc_flow_counter_out_bits {
6339 u8 status[0x8];
6340 u8 reserved_at_8[0x18];
6341
6342 u8 syndrome[0x20];
6343
6344 u8 reserved_at_40[0x40];
6345};
6346
6347struct mlx5_ifc_dealloc_flow_counter_in_bits {
6348 u8 opcode[0x10];
6349 u8 reserved_at_10[0x10];
6350
6351 u8 reserved_at_20[0x10];
6352 u8 op_mod[0x10];
6353
6354 u8 reserved_at_40[0x10];
6355 u8 flow_counter_id[0x10];
6356
6357 u8 reserved_at_60[0x20];
6358};
6359
Saeed Mahameed74862162016-06-09 15:11:34 +03006360struct mlx5_ifc_create_xrq_out_bits {
6361 u8 status[0x8];
6362 u8 reserved_at_8[0x18];
6363
6364 u8 syndrome[0x20];
6365
6366 u8 reserved_at_40[0x8];
6367 u8 xrqn[0x18];
6368
6369 u8 reserved_at_60[0x20];
6370};
6371
6372struct mlx5_ifc_create_xrq_in_bits {
6373 u8 opcode[0x10];
6374 u8 reserved_at_10[0x10];
6375
6376 u8 reserved_at_20[0x10];
6377 u8 op_mod[0x10];
6378
6379 u8 reserved_at_40[0x40];
6380
6381 struct mlx5_ifc_xrqc_bits xrq_context;
6382};
6383
Saeed Mahameede2816822015-05-28 22:28:40 +03006384struct mlx5_ifc_create_xrc_srq_out_bits {
6385 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006386 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006387
6388 u8 syndrome[0x20];
6389
Matan Barakb4ff3a32016-02-09 14:57:42 +02006390 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006391 u8 xrc_srqn[0x18];
6392
Matan Barakb4ff3a32016-02-09 14:57:42 +02006393 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006394};
6395
6396struct mlx5_ifc_create_xrc_srq_in_bits {
6397 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006398 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006399
Matan Barakb4ff3a32016-02-09 14:57:42 +02006400 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006401 u8 op_mod[0x10];
6402
Matan Barakb4ff3a32016-02-09 14:57:42 +02006403 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006404
6405 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6406
Matan Barakb4ff3a32016-02-09 14:57:42 +02006407 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006408
6409 u8 pas[0][0x40];
6410};
6411
6412struct mlx5_ifc_create_tis_out_bits {
6413 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006414 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006415
6416 u8 syndrome[0x20];
6417
Matan Barakb4ff3a32016-02-09 14:57:42 +02006418 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006419 u8 tisn[0x18];
6420
Matan Barakb4ff3a32016-02-09 14:57:42 +02006421 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006422};
6423
6424struct mlx5_ifc_create_tis_in_bits {
6425 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006426 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006427
Matan Barakb4ff3a32016-02-09 14:57:42 +02006428 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006429 u8 op_mod[0x10];
6430
Matan Barakb4ff3a32016-02-09 14:57:42 +02006431 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006432
6433 struct mlx5_ifc_tisc_bits ctx;
6434};
6435
6436struct mlx5_ifc_create_tir_out_bits {
6437 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006438 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006439
6440 u8 syndrome[0x20];
6441
Matan Barakb4ff3a32016-02-09 14:57:42 +02006442 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006443 u8 tirn[0x18];
6444
Matan Barakb4ff3a32016-02-09 14:57:42 +02006445 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006446};
6447
6448struct mlx5_ifc_create_tir_in_bits {
6449 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006450 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006451
Matan Barakb4ff3a32016-02-09 14:57:42 +02006452 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006453 u8 op_mod[0x10];
6454
Matan Barakb4ff3a32016-02-09 14:57:42 +02006455 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006456
6457 struct mlx5_ifc_tirc_bits ctx;
6458};
6459
6460struct mlx5_ifc_create_srq_out_bits {
6461 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006462 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006463
6464 u8 syndrome[0x20];
6465
Matan Barakb4ff3a32016-02-09 14:57:42 +02006466 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006467 u8 srqn[0x18];
6468
Matan Barakb4ff3a32016-02-09 14:57:42 +02006469 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006470};
6471
6472struct mlx5_ifc_create_srq_in_bits {
6473 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006474 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006475
Matan Barakb4ff3a32016-02-09 14:57:42 +02006476 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006477 u8 op_mod[0x10];
6478
Matan Barakb4ff3a32016-02-09 14:57:42 +02006479 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006480
6481 struct mlx5_ifc_srqc_bits srq_context_entry;
6482
Matan Barakb4ff3a32016-02-09 14:57:42 +02006483 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006484
6485 u8 pas[0][0x40];
6486};
6487
6488struct mlx5_ifc_create_sq_out_bits {
6489 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006490 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006491
6492 u8 syndrome[0x20];
6493
Matan Barakb4ff3a32016-02-09 14:57:42 +02006494 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006495 u8 sqn[0x18];
6496
Matan Barakb4ff3a32016-02-09 14:57:42 +02006497 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006498};
6499
6500struct mlx5_ifc_create_sq_in_bits {
6501 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006502 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006503
Matan Barakb4ff3a32016-02-09 14:57:42 +02006504 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006505 u8 op_mod[0x10];
6506
Matan Barakb4ff3a32016-02-09 14:57:42 +02006507 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006508
6509 struct mlx5_ifc_sqc_bits ctx;
6510};
6511
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006512struct mlx5_ifc_create_scheduling_element_out_bits {
6513 u8 status[0x8];
6514 u8 reserved_at_8[0x18];
6515
6516 u8 syndrome[0x20];
6517
6518 u8 reserved_at_40[0x40];
6519
6520 u8 scheduling_element_id[0x20];
6521
6522 u8 reserved_at_a0[0x160];
6523};
6524
6525struct mlx5_ifc_create_scheduling_element_in_bits {
6526 u8 opcode[0x10];
6527 u8 reserved_at_10[0x10];
6528
6529 u8 reserved_at_20[0x10];
6530 u8 op_mod[0x10];
6531
6532 u8 scheduling_hierarchy[0x8];
6533 u8 reserved_at_48[0x18];
6534
6535 u8 reserved_at_60[0xa0];
6536
6537 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6538
6539 u8 reserved_at_300[0x100];
6540};
6541
Saeed Mahameede2816822015-05-28 22:28:40 +03006542struct mlx5_ifc_create_rqt_out_bits {
6543 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006544 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006545
6546 u8 syndrome[0x20];
6547
Matan Barakb4ff3a32016-02-09 14:57:42 +02006548 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006549 u8 rqtn[0x18];
6550
Matan Barakb4ff3a32016-02-09 14:57:42 +02006551 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006552};
6553
6554struct mlx5_ifc_create_rqt_in_bits {
6555 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006556 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006557
Matan Barakb4ff3a32016-02-09 14:57:42 +02006558 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006559 u8 op_mod[0x10];
6560
Matan Barakb4ff3a32016-02-09 14:57:42 +02006561 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006562
6563 struct mlx5_ifc_rqtc_bits rqt_context;
6564};
6565
6566struct mlx5_ifc_create_rq_out_bits {
6567 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006568 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006569
6570 u8 syndrome[0x20];
6571
Matan Barakb4ff3a32016-02-09 14:57:42 +02006572 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006573 u8 rqn[0x18];
6574
Matan Barakb4ff3a32016-02-09 14:57:42 +02006575 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006576};
6577
6578struct mlx5_ifc_create_rq_in_bits {
6579 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581
Matan Barakb4ff3a32016-02-09 14:57:42 +02006582 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006583 u8 op_mod[0x10];
6584
Matan Barakb4ff3a32016-02-09 14:57:42 +02006585 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006586
6587 struct mlx5_ifc_rqc_bits ctx;
6588};
6589
6590struct mlx5_ifc_create_rmp_out_bits {
6591 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006592 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006593
6594 u8 syndrome[0x20];
6595
Matan Barakb4ff3a32016-02-09 14:57:42 +02006596 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006597 u8 rmpn[0x18];
6598
Matan Barakb4ff3a32016-02-09 14:57:42 +02006599 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006600};
6601
6602struct mlx5_ifc_create_rmp_in_bits {
6603 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006604 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006605
Matan Barakb4ff3a32016-02-09 14:57:42 +02006606 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006607 u8 op_mod[0x10];
6608
Matan Barakb4ff3a32016-02-09 14:57:42 +02006609 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006610
6611 struct mlx5_ifc_rmpc_bits ctx;
6612};
6613
6614struct mlx5_ifc_create_qp_out_bits {
6615 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006616 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006617
6618 u8 syndrome[0x20];
6619
Matan Barakb4ff3a32016-02-09 14:57:42 +02006620 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006621 u8 qpn[0x18];
6622
Matan Barakb4ff3a32016-02-09 14:57:42 +02006623 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006624};
6625
6626struct mlx5_ifc_create_qp_in_bits {
6627 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006628 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006629
Matan Barakb4ff3a32016-02-09 14:57:42 +02006630 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006631 u8 op_mod[0x10];
6632
Matan Barakb4ff3a32016-02-09 14:57:42 +02006633 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006634
6635 u8 opt_param_mask[0x20];
6636
Matan Barakb4ff3a32016-02-09 14:57:42 +02006637 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006638
6639 struct mlx5_ifc_qpc_bits qpc;
6640
Matan Barakb4ff3a32016-02-09 14:57:42 +02006641 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006642
6643 u8 pas[0][0x40];
6644};
6645
6646struct mlx5_ifc_create_psv_out_bits {
6647 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006648 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006649
6650 u8 syndrome[0x20];
6651
Matan Barakb4ff3a32016-02-09 14:57:42 +02006652 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006653
Matan Barakb4ff3a32016-02-09 14:57:42 +02006654 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006655 u8 psv0_index[0x18];
6656
Matan Barakb4ff3a32016-02-09 14:57:42 +02006657 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006658 u8 psv1_index[0x18];
6659
Matan Barakb4ff3a32016-02-09 14:57:42 +02006660 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006661 u8 psv2_index[0x18];
6662
Matan Barakb4ff3a32016-02-09 14:57:42 +02006663 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006664 u8 psv3_index[0x18];
6665};
6666
6667struct mlx5_ifc_create_psv_in_bits {
6668 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006669 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006670
Matan Barakb4ff3a32016-02-09 14:57:42 +02006671 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006672 u8 op_mod[0x10];
6673
6674 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006675 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006676 u8 pd[0x18];
6677
Matan Barakb4ff3a32016-02-09 14:57:42 +02006678 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006679};
6680
6681struct mlx5_ifc_create_mkey_out_bits {
6682 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006683 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006684
6685 u8 syndrome[0x20];
6686
Matan Barakb4ff3a32016-02-09 14:57:42 +02006687 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006688 u8 mkey_index[0x18];
6689
Matan Barakb4ff3a32016-02-09 14:57:42 +02006690 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006691};
6692
6693struct mlx5_ifc_create_mkey_in_bits {
6694 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006695 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006696
Matan Barakb4ff3a32016-02-09 14:57:42 +02006697 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006698 u8 op_mod[0x10];
6699
Matan Barakb4ff3a32016-02-09 14:57:42 +02006700 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006701
6702 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006703 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006704
6705 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6706
Matan Barakb4ff3a32016-02-09 14:57:42 +02006707 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006708
6709 u8 translations_octword_actual_size[0x20];
6710
Matan Barakb4ff3a32016-02-09 14:57:42 +02006711 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006712
6713 u8 klm_pas_mtt[0][0x20];
6714};
6715
6716struct mlx5_ifc_create_flow_table_out_bits {
6717 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006718 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006719
6720 u8 syndrome[0x20];
6721
Matan Barakb4ff3a32016-02-09 14:57:42 +02006722 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006723 u8 table_id[0x18];
6724
Matan Barakb4ff3a32016-02-09 14:57:42 +02006725 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006726};
6727
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006728struct mlx5_ifc_flow_table_context_bits {
6729 u8 encap_en[0x1];
6730 u8 decap_en[0x1];
6731 u8 reserved_at_2[0x2];
6732 u8 table_miss_action[0x4];
6733 u8 level[0x8];
6734 u8 reserved_at_10[0x8];
6735 u8 log_size[0x8];
6736
6737 u8 reserved_at_20[0x8];
6738 u8 table_miss_id[0x18];
6739
6740 u8 reserved_at_40[0x8];
6741 u8 lag_master_next_table_id[0x18];
6742
6743 u8 reserved_at_60[0xe0];
6744};
6745
Saeed Mahameede2816822015-05-28 22:28:40 +03006746struct mlx5_ifc_create_flow_table_in_bits {
6747 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006748 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006749
Matan Barakb4ff3a32016-02-09 14:57:42 +02006750 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006751 u8 op_mod[0x10];
6752
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006753 u8 other_vport[0x1];
6754 u8 reserved_at_41[0xf];
6755 u8 vport_number[0x10];
6756
6757 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006758
6759 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006760 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006761
Matan Barakb4ff3a32016-02-09 14:57:42 +02006762 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006763
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006764 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006765};
6766
6767struct mlx5_ifc_create_flow_group_out_bits {
6768 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006769 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006770
6771 u8 syndrome[0x20];
6772
Matan Barakb4ff3a32016-02-09 14:57:42 +02006773 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006774 u8 group_id[0x18];
6775
Matan Barakb4ff3a32016-02-09 14:57:42 +02006776 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006777};
6778
6779enum {
6780 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6781 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6782 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6783};
6784
6785struct mlx5_ifc_create_flow_group_in_bits {
6786 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006787 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006788
Matan Barakb4ff3a32016-02-09 14:57:42 +02006789 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006790 u8 op_mod[0x10];
6791
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006792 u8 other_vport[0x1];
6793 u8 reserved_at_41[0xf];
6794 u8 vport_number[0x10];
6795
6796 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006797
6798 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006799 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006800
Matan Barakb4ff3a32016-02-09 14:57:42 +02006801 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006802 u8 table_id[0x18];
6803
Matan Barakb4ff3a32016-02-09 14:57:42 +02006804 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006805
6806 u8 start_flow_index[0x20];
6807
Matan Barakb4ff3a32016-02-09 14:57:42 +02006808 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006809
6810 u8 end_flow_index[0x20];
6811
Matan Barakb4ff3a32016-02-09 14:57:42 +02006812 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006813
Matan Barakb4ff3a32016-02-09 14:57:42 +02006814 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006815 u8 match_criteria_enable[0x8];
6816
6817 struct mlx5_ifc_fte_match_param_bits match_criteria;
6818
Matan Barakb4ff3a32016-02-09 14:57:42 +02006819 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006820};
6821
6822struct mlx5_ifc_create_eq_out_bits {
6823 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006824 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006825
6826 u8 syndrome[0x20];
6827
Matan Barakb4ff3a32016-02-09 14:57:42 +02006828 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006829 u8 eq_number[0x8];
6830
Matan Barakb4ff3a32016-02-09 14:57:42 +02006831 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006832};
6833
6834struct mlx5_ifc_create_eq_in_bits {
6835 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006836 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006837
Matan Barakb4ff3a32016-02-09 14:57:42 +02006838 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006839 u8 op_mod[0x10];
6840
Matan Barakb4ff3a32016-02-09 14:57:42 +02006841 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006842
6843 struct mlx5_ifc_eqc_bits eq_context_entry;
6844
Matan Barakb4ff3a32016-02-09 14:57:42 +02006845 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006846
6847 u8 event_bitmask[0x40];
6848
Matan Barakb4ff3a32016-02-09 14:57:42 +02006849 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006850
6851 u8 pas[0][0x40];
6852};
6853
6854struct mlx5_ifc_create_dct_out_bits {
6855 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006856 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006857
6858 u8 syndrome[0x20];
6859
Matan Barakb4ff3a32016-02-09 14:57:42 +02006860 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006861 u8 dctn[0x18];
6862
Matan Barakb4ff3a32016-02-09 14:57:42 +02006863 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006864};
6865
6866struct mlx5_ifc_create_dct_in_bits {
6867 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006868 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006869
Matan Barakb4ff3a32016-02-09 14:57:42 +02006870 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006871 u8 op_mod[0x10];
6872
Matan Barakb4ff3a32016-02-09 14:57:42 +02006873 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006874
6875 struct mlx5_ifc_dctc_bits dct_context_entry;
6876
Matan Barakb4ff3a32016-02-09 14:57:42 +02006877 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006878};
6879
6880struct mlx5_ifc_create_cq_out_bits {
6881 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006882 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006883
6884 u8 syndrome[0x20];
6885
Matan Barakb4ff3a32016-02-09 14:57:42 +02006886 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006887 u8 cqn[0x18];
6888
Matan Barakb4ff3a32016-02-09 14:57:42 +02006889 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006890};
6891
6892struct mlx5_ifc_create_cq_in_bits {
6893 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006894 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006895
Matan Barakb4ff3a32016-02-09 14:57:42 +02006896 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006897 u8 op_mod[0x10];
6898
Matan Barakb4ff3a32016-02-09 14:57:42 +02006899 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006900
6901 struct mlx5_ifc_cqc_bits cq_context;
6902
Matan Barakb4ff3a32016-02-09 14:57:42 +02006903 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006904
6905 u8 pas[0][0x40];
6906};
6907
6908struct mlx5_ifc_config_int_moderation_out_bits {
6909 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006910 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006911
6912 u8 syndrome[0x20];
6913
Matan Barakb4ff3a32016-02-09 14:57:42 +02006914 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006915 u8 min_delay[0xc];
6916 u8 int_vector[0x10];
6917
Matan Barakb4ff3a32016-02-09 14:57:42 +02006918 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006919};
6920
6921enum {
6922 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6923 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6924};
6925
6926struct mlx5_ifc_config_int_moderation_in_bits {
6927 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006928 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006929
Matan Barakb4ff3a32016-02-09 14:57:42 +02006930 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006931 u8 op_mod[0x10];
6932
Matan Barakb4ff3a32016-02-09 14:57:42 +02006933 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006934 u8 min_delay[0xc];
6935 u8 int_vector[0x10];
6936
Matan Barakb4ff3a32016-02-09 14:57:42 +02006937 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006938};
6939
6940struct mlx5_ifc_attach_to_mcg_out_bits {
6941 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006942 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006943
6944 u8 syndrome[0x20];
6945
Matan Barakb4ff3a32016-02-09 14:57:42 +02006946 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006947};
6948
6949struct mlx5_ifc_attach_to_mcg_in_bits {
6950 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006951 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006952
Matan Barakb4ff3a32016-02-09 14:57:42 +02006953 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006954 u8 op_mod[0x10];
6955
Matan Barakb4ff3a32016-02-09 14:57:42 +02006956 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006957 u8 qpn[0x18];
6958
Matan Barakb4ff3a32016-02-09 14:57:42 +02006959 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006960
6961 u8 multicast_gid[16][0x8];
6962};
6963
Saeed Mahameed74862162016-06-09 15:11:34 +03006964struct mlx5_ifc_arm_xrq_out_bits {
6965 u8 status[0x8];
6966 u8 reserved_at_8[0x18];
6967
6968 u8 syndrome[0x20];
6969
6970 u8 reserved_at_40[0x40];
6971};
6972
6973struct mlx5_ifc_arm_xrq_in_bits {
6974 u8 opcode[0x10];
6975 u8 reserved_at_10[0x10];
6976
6977 u8 reserved_at_20[0x10];
6978 u8 op_mod[0x10];
6979
6980 u8 reserved_at_40[0x8];
6981 u8 xrqn[0x18];
6982
6983 u8 reserved_at_60[0x10];
6984 u8 lwm[0x10];
6985};
6986
Saeed Mahameede2816822015-05-28 22:28:40 +03006987struct mlx5_ifc_arm_xrc_srq_out_bits {
6988 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006989 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006990
6991 u8 syndrome[0x20];
6992
Matan Barakb4ff3a32016-02-09 14:57:42 +02006993 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006994};
6995
6996enum {
6997 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
6998};
6999
7000struct mlx5_ifc_arm_xrc_srq_in_bits {
7001 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007002 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007003
Matan Barakb4ff3a32016-02-09 14:57:42 +02007004 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007005 u8 op_mod[0x10];
7006
Matan Barakb4ff3a32016-02-09 14:57:42 +02007007 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007008 u8 xrc_srqn[0x18];
7009
Matan Barakb4ff3a32016-02-09 14:57:42 +02007010 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007011 u8 lwm[0x10];
7012};
7013
7014struct mlx5_ifc_arm_rq_out_bits {
7015 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007016 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007017
7018 u8 syndrome[0x20];
7019
Matan Barakb4ff3a32016-02-09 14:57:42 +02007020 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007021};
7022
7023enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007024 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7025 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007026};
7027
7028struct mlx5_ifc_arm_rq_in_bits {
7029 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007030 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007031
Matan Barakb4ff3a32016-02-09 14:57:42 +02007032 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007033 u8 op_mod[0x10];
7034
Matan Barakb4ff3a32016-02-09 14:57:42 +02007035 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007036 u8 srq_number[0x18];
7037
Matan Barakb4ff3a32016-02-09 14:57:42 +02007038 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007039 u8 lwm[0x10];
7040};
7041
7042struct mlx5_ifc_arm_dct_out_bits {
7043 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007044 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007045
7046 u8 syndrome[0x20];
7047
Matan Barakb4ff3a32016-02-09 14:57:42 +02007048 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007049};
7050
7051struct mlx5_ifc_arm_dct_in_bits {
7052 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007053 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007054
Matan Barakb4ff3a32016-02-09 14:57:42 +02007055 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007056 u8 op_mod[0x10];
7057
Matan Barakb4ff3a32016-02-09 14:57:42 +02007058 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007059 u8 dct_number[0x18];
7060
Matan Barakb4ff3a32016-02-09 14:57:42 +02007061 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007062};
7063
7064struct mlx5_ifc_alloc_xrcd_out_bits {
7065 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007066 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007067
7068 u8 syndrome[0x20];
7069
Matan Barakb4ff3a32016-02-09 14:57:42 +02007070 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007071 u8 xrcd[0x18];
7072
Matan Barakb4ff3a32016-02-09 14:57:42 +02007073 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007074};
7075
7076struct mlx5_ifc_alloc_xrcd_in_bits {
7077 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007078 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007079
Matan Barakb4ff3a32016-02-09 14:57:42 +02007080 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007081 u8 op_mod[0x10];
7082
Matan Barakb4ff3a32016-02-09 14:57:42 +02007083 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007084};
7085
7086struct mlx5_ifc_alloc_uar_out_bits {
7087 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007088 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007089
7090 u8 syndrome[0x20];
7091
Matan Barakb4ff3a32016-02-09 14:57:42 +02007092 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007093 u8 uar[0x18];
7094
Matan Barakb4ff3a32016-02-09 14:57:42 +02007095 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007096};
7097
7098struct mlx5_ifc_alloc_uar_in_bits {
7099 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007100 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007101
Matan Barakb4ff3a32016-02-09 14:57:42 +02007102 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007103 u8 op_mod[0x10];
7104
Matan Barakb4ff3a32016-02-09 14:57:42 +02007105 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007106};
7107
7108struct mlx5_ifc_alloc_transport_domain_out_bits {
7109 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007110 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007111
7112 u8 syndrome[0x20];
7113
Matan Barakb4ff3a32016-02-09 14:57:42 +02007114 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007115 u8 transport_domain[0x18];
7116
Matan Barakb4ff3a32016-02-09 14:57:42 +02007117 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007118};
7119
7120struct mlx5_ifc_alloc_transport_domain_in_bits {
7121 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007122 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007123
Matan Barakb4ff3a32016-02-09 14:57:42 +02007124 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007125 u8 op_mod[0x10];
7126
Matan Barakb4ff3a32016-02-09 14:57:42 +02007127 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007128};
7129
7130struct mlx5_ifc_alloc_q_counter_out_bits {
7131 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007132 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007133
7134 u8 syndrome[0x20];
7135
Matan Barakb4ff3a32016-02-09 14:57:42 +02007136 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007137 u8 counter_set_id[0x8];
7138
Matan Barakb4ff3a32016-02-09 14:57:42 +02007139 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007140};
7141
7142struct mlx5_ifc_alloc_q_counter_in_bits {
7143 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007144 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007145
Matan Barakb4ff3a32016-02-09 14:57:42 +02007146 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007147 u8 op_mod[0x10];
7148
Matan Barakb4ff3a32016-02-09 14:57:42 +02007149 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007150};
7151
7152struct mlx5_ifc_alloc_pd_out_bits {
7153 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007154 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007155
7156 u8 syndrome[0x20];
7157
Matan Barakb4ff3a32016-02-09 14:57:42 +02007158 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007159 u8 pd[0x18];
7160
Matan Barakb4ff3a32016-02-09 14:57:42 +02007161 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007162};
7163
7164struct mlx5_ifc_alloc_pd_in_bits {
7165 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007166 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007167
Matan Barakb4ff3a32016-02-09 14:57:42 +02007168 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007169 u8 op_mod[0x10];
7170
Matan Barakb4ff3a32016-02-09 14:57:42 +02007171 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007172};
7173
Amir Vadai9dc0b282016-05-13 12:55:39 +00007174struct mlx5_ifc_alloc_flow_counter_out_bits {
7175 u8 status[0x8];
7176 u8 reserved_at_8[0x18];
7177
7178 u8 syndrome[0x20];
7179
7180 u8 reserved_at_40[0x10];
7181 u8 flow_counter_id[0x10];
7182
7183 u8 reserved_at_60[0x20];
7184};
7185
7186struct mlx5_ifc_alloc_flow_counter_in_bits {
7187 u8 opcode[0x10];
7188 u8 reserved_at_10[0x10];
7189
7190 u8 reserved_at_20[0x10];
7191 u8 op_mod[0x10];
7192
7193 u8 reserved_at_40[0x40];
7194};
7195
Saeed Mahameede2816822015-05-28 22:28:40 +03007196struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7197 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007198 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007199
7200 u8 syndrome[0x20];
7201
Matan Barakb4ff3a32016-02-09 14:57:42 +02007202 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007203};
7204
7205struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7206 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007207 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007208
Matan Barakb4ff3a32016-02-09 14:57:42 +02007209 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007210 u8 op_mod[0x10];
7211
Matan Barakb4ff3a32016-02-09 14:57:42 +02007212 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007213
Matan Barakb4ff3a32016-02-09 14:57:42 +02007214 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007215 u8 vxlan_udp_port[0x10];
7216};
7217
Saeed Mahameed74862162016-06-09 15:11:34 +03007218struct mlx5_ifc_set_rate_limit_out_bits {
7219 u8 status[0x8];
7220 u8 reserved_at_8[0x18];
7221
7222 u8 syndrome[0x20];
7223
7224 u8 reserved_at_40[0x40];
7225};
7226
7227struct mlx5_ifc_set_rate_limit_in_bits {
7228 u8 opcode[0x10];
7229 u8 reserved_at_10[0x10];
7230
7231 u8 reserved_at_20[0x10];
7232 u8 op_mod[0x10];
7233
7234 u8 reserved_at_40[0x10];
7235 u8 rate_limit_index[0x10];
7236
7237 u8 reserved_at_60[0x20];
7238
7239 u8 rate_limit[0x20];
7240};
7241
Saeed Mahameede2816822015-05-28 22:28:40 +03007242struct mlx5_ifc_access_register_out_bits {
7243 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007244 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007245
7246 u8 syndrome[0x20];
7247
Matan Barakb4ff3a32016-02-09 14:57:42 +02007248 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007249
7250 u8 register_data[0][0x20];
7251};
7252
7253enum {
7254 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7255 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7256};
7257
7258struct mlx5_ifc_access_register_in_bits {
7259 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007260 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007261
Matan Barakb4ff3a32016-02-09 14:57:42 +02007262 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007263 u8 op_mod[0x10];
7264
Matan Barakb4ff3a32016-02-09 14:57:42 +02007265 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007266 u8 register_id[0x10];
7267
7268 u8 argument[0x20];
7269
7270 u8 register_data[0][0x20];
7271};
7272
7273struct mlx5_ifc_sltp_reg_bits {
7274 u8 status[0x4];
7275 u8 version[0x4];
7276 u8 local_port[0x8];
7277 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007278 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007279 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007280 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007281
Matan Barakb4ff3a32016-02-09 14:57:42 +02007282 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007283
Matan Barakb4ff3a32016-02-09 14:57:42 +02007284 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007285 u8 polarity[0x1];
7286 u8 ob_tap0[0x8];
7287 u8 ob_tap1[0x8];
7288 u8 ob_tap2[0x8];
7289
Matan Barakb4ff3a32016-02-09 14:57:42 +02007290 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007291 u8 ob_preemp_mode[0x4];
7292 u8 ob_reg[0x8];
7293 u8 ob_bias[0x8];
7294
Matan Barakb4ff3a32016-02-09 14:57:42 +02007295 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007296};
7297
7298struct mlx5_ifc_slrg_reg_bits {
7299 u8 status[0x4];
7300 u8 version[0x4];
7301 u8 local_port[0x8];
7302 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007303 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007304 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007305 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007306
7307 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007308 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007309 u8 grade_lane_speed[0x4];
7310
7311 u8 grade_version[0x8];
7312 u8 grade[0x18];
7313
Matan Barakb4ff3a32016-02-09 14:57:42 +02007314 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007315 u8 height_grade_type[0x4];
7316 u8 height_grade[0x18];
7317
7318 u8 height_dz[0x10];
7319 u8 height_dv[0x10];
7320
Matan Barakb4ff3a32016-02-09 14:57:42 +02007321 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007322 u8 height_sigma[0x10];
7323
Matan Barakb4ff3a32016-02-09 14:57:42 +02007324 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007325
Matan Barakb4ff3a32016-02-09 14:57:42 +02007326 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007327 u8 phase_grade_type[0x4];
7328 u8 phase_grade[0x18];
7329
Matan Barakb4ff3a32016-02-09 14:57:42 +02007330 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007331 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007332 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007333 u8 phase_eo_neg[0x8];
7334
7335 u8 ffe_set_tested[0x10];
7336 u8 test_errors_per_lane[0x10];
7337};
7338
7339struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007340 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007341 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007342 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007343
Matan Barakb4ff3a32016-02-09 14:57:42 +02007344 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007345 u8 vl_hw_cap[0x4];
7346
Matan Barakb4ff3a32016-02-09 14:57:42 +02007347 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007348 u8 vl_admin[0x4];
7349
Matan Barakb4ff3a32016-02-09 14:57:42 +02007350 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007351 u8 vl_operational[0x4];
7352};
7353
7354struct mlx5_ifc_pude_reg_bits {
7355 u8 swid[0x8];
7356 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007357 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007358 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007359 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007360 u8 oper_status[0x4];
7361
Matan Barakb4ff3a32016-02-09 14:57:42 +02007362 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007363};
7364
7365struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007366 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007367 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007368 u8 an_disable_cap[0x1];
7369 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007370 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007371 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007372 u8 proto_mask[0x3];
7373
Saeed Mahameed74862162016-06-09 15:11:34 +03007374 u8 an_status[0x4];
7375 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007376
7377 u8 eth_proto_capability[0x20];
7378
7379 u8 ib_link_width_capability[0x10];
7380 u8 ib_proto_capability[0x10];
7381
Matan Barakb4ff3a32016-02-09 14:57:42 +02007382 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007383
7384 u8 eth_proto_admin[0x20];
7385
7386 u8 ib_link_width_admin[0x10];
7387 u8 ib_proto_admin[0x10];
7388
Matan Barakb4ff3a32016-02-09 14:57:42 +02007389 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007390
7391 u8 eth_proto_oper[0x20];
7392
7393 u8 ib_link_width_oper[0x10];
7394 u8 ib_proto_oper[0x10];
7395
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007396 u8 reserved_at_160[0x1c];
7397 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007398
7399 u8 eth_proto_lp_advertise[0x20];
7400
Matan Barakb4ff3a32016-02-09 14:57:42 +02007401 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007402};
7403
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007404struct mlx5_ifc_mlcr_reg_bits {
7405 u8 reserved_at_0[0x8];
7406 u8 local_port[0x8];
7407 u8 reserved_at_10[0x20];
7408
7409 u8 beacon_duration[0x10];
7410 u8 reserved_at_40[0x10];
7411
7412 u8 beacon_remain[0x10];
7413};
7414
Saeed Mahameede2816822015-05-28 22:28:40 +03007415struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007416 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007417
7418 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007419 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007420 u8 repetitions_mode[0x4];
7421 u8 num_of_repetitions[0x8];
7422
7423 u8 grade_version[0x8];
7424 u8 height_grade_type[0x4];
7425 u8 phase_grade_type[0x4];
7426 u8 height_grade_weight[0x8];
7427 u8 phase_grade_weight[0x8];
7428
7429 u8 gisim_measure_bits[0x10];
7430 u8 adaptive_tap_measure_bits[0x10];
7431
7432 u8 ber_bath_high_error_threshold[0x10];
7433 u8 ber_bath_mid_error_threshold[0x10];
7434
7435 u8 ber_bath_low_error_threshold[0x10];
7436 u8 one_ratio_high_threshold[0x10];
7437
7438 u8 one_ratio_high_mid_threshold[0x10];
7439 u8 one_ratio_low_mid_threshold[0x10];
7440
7441 u8 one_ratio_low_threshold[0x10];
7442 u8 ndeo_error_threshold[0x10];
7443
7444 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007445 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007446 u8 mix90_phase_for_voltage_bath[0x8];
7447
7448 u8 mixer_offset_start[0x10];
7449 u8 mixer_offset_end[0x10];
7450
Matan Barakb4ff3a32016-02-09 14:57:42 +02007451 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007452 u8 ber_test_time[0xb];
7453};
7454
7455struct mlx5_ifc_pspa_reg_bits {
7456 u8 swid[0x8];
7457 u8 local_port[0x8];
7458 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007459 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007460
Matan Barakb4ff3a32016-02-09 14:57:42 +02007461 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007462};
7463
7464struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007465 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007466 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007467 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007468 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007469 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007470 u8 mode[0x2];
7471
Matan Barakb4ff3a32016-02-09 14:57:42 +02007472 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007473
Matan Barakb4ff3a32016-02-09 14:57:42 +02007474 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007475 u8 min_threshold[0x10];
7476
Matan Barakb4ff3a32016-02-09 14:57:42 +02007477 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007478 u8 max_threshold[0x10];
7479
Matan Barakb4ff3a32016-02-09 14:57:42 +02007480 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007481 u8 mark_probability_denominator[0x10];
7482
Matan Barakb4ff3a32016-02-09 14:57:42 +02007483 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007484};
7485
7486struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007487 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007488 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007489 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007490
Matan Barakb4ff3a32016-02-09 14:57:42 +02007491 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007492
Matan Barakb4ff3a32016-02-09 14:57:42 +02007493 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007494 u8 wrps_admin[0x4];
7495
Matan Barakb4ff3a32016-02-09 14:57:42 +02007496 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007497 u8 wrps_status[0x4];
7498
Matan Barakb4ff3a32016-02-09 14:57:42 +02007499 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007500 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007501 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007502 u8 down_threshold[0x8];
7503
Matan Barakb4ff3a32016-02-09 14:57:42 +02007504 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007505
Matan Barakb4ff3a32016-02-09 14:57:42 +02007506 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007507 u8 srps_admin[0x4];
7508
Matan Barakb4ff3a32016-02-09 14:57:42 +02007509 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007510 u8 srps_status[0x4];
7511
Matan Barakb4ff3a32016-02-09 14:57:42 +02007512 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007513};
7514
7515struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007516 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007517 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007518 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007519
Matan Barakb4ff3a32016-02-09 14:57:42 +02007520 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007521 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007522 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007523 u8 lb_en[0x8];
7524};
7525
7526struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007527 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007528 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007529 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007530
Matan Barakb4ff3a32016-02-09 14:57:42 +02007531 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007532
7533 u8 port_profile_mode[0x8];
7534 u8 static_port_profile[0x8];
7535 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007536 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007537
7538 u8 retransmission_active[0x8];
7539 u8 fec_mode_active[0x18];
7540
Matan Barakb4ff3a32016-02-09 14:57:42 +02007541 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007542};
7543
7544struct mlx5_ifc_ppcnt_reg_bits {
7545 u8 swid[0x8];
7546 u8 local_port[0x8];
7547 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007548 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007549 u8 grp[0x6];
7550
7551 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007552 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007553 u8 prio_tc[0x3];
7554
7555 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7556};
7557
Gal Pressman8ed1a632016-11-17 13:46:01 +02007558struct mlx5_ifc_mpcnt_reg_bits {
7559 u8 reserved_at_0[0x8];
7560 u8 pcie_index[0x8];
7561 u8 reserved_at_10[0xa];
7562 u8 grp[0x6];
7563
7564 u8 clr[0x1];
7565 u8 reserved_at_21[0x1f];
7566
7567 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7568};
7569
Saeed Mahameede2816822015-05-28 22:28:40 +03007570struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007571 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007572 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007573 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007574 u8 local_port[0x8];
7575 u8 mac_47_32[0x10];
7576
7577 u8 mac_31_0[0x20];
7578
Matan Barakb4ff3a32016-02-09 14:57:42 +02007579 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007580};
7581
7582struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007583 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007584 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007585 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007586
7587 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007588 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007589
7590 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007591 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007592
7593 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007594 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007595};
7596
7597struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007598 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007599 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007600 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007601
Matan Barakb4ff3a32016-02-09 14:57:42 +02007602 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007603 u8 attenuation_5g[0x8];
7604
Matan Barakb4ff3a32016-02-09 14:57:42 +02007605 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007606 u8 attenuation_7g[0x8];
7607
Matan Barakb4ff3a32016-02-09 14:57:42 +02007608 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007609 u8 attenuation_12g[0x8];
7610};
7611
7612struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007613 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007614 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007615 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007616 u8 module_status[0x4];
7617
Matan Barakb4ff3a32016-02-09 14:57:42 +02007618 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007619};
7620
7621struct mlx5_ifc_pmpc_reg_bits {
7622 u8 module_state_updated[32][0x8];
7623};
7624
7625struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007626 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007627 u8 mlpn_status[0x4];
7628 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007629 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007630
7631 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007632 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007633};
7634
7635struct mlx5_ifc_pmlp_reg_bits {
7636 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007637 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007638 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007639 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007640 u8 width[0x8];
7641
7642 u8 lane0_module_mapping[0x20];
7643
7644 u8 lane1_module_mapping[0x20];
7645
7646 u8 lane2_module_mapping[0x20];
7647
7648 u8 lane3_module_mapping[0x20];
7649
Matan Barakb4ff3a32016-02-09 14:57:42 +02007650 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007651};
7652
7653struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007654 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007655 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007656 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007657 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007658 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007659 u8 oper_status[0x4];
7660
7661 u8 ase[0x1];
7662 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007663 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007664 u8 e[0x2];
7665
Matan Barakb4ff3a32016-02-09 14:57:42 +02007666 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007667};
7668
7669struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007670 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007671 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007672 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007673 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007674 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007675
Matan Barakb4ff3a32016-02-09 14:57:42 +02007676 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007677 u8 lane_speed[0x10];
7678
Matan Barakb4ff3a32016-02-09 14:57:42 +02007679 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007680 u8 lpbf[0x1];
7681 u8 fec_mode_policy[0x8];
7682
7683 u8 retransmission_capability[0x8];
7684 u8 fec_mode_capability[0x18];
7685
7686 u8 retransmission_support_admin[0x8];
7687 u8 fec_mode_support_admin[0x18];
7688
7689 u8 retransmission_request_admin[0x8];
7690 u8 fec_mode_request_admin[0x18];
7691
Matan Barakb4ff3a32016-02-09 14:57:42 +02007692 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007693};
7694
7695struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007696 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007697 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007698 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007699 u8 ib_port[0x8];
7700
Matan Barakb4ff3a32016-02-09 14:57:42 +02007701 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007702};
7703
7704struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007705 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007706 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007707 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007708 u8 lbf_mode[0x3];
7709
Matan Barakb4ff3a32016-02-09 14:57:42 +02007710 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007711};
7712
7713struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007714 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007715 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007716 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007717
7718 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007719 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007720 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007721 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007722};
7723
7724struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007725 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007726 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007727 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007728
Matan Barakb4ff3a32016-02-09 14:57:42 +02007729 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007730
7731 u8 port_filter[8][0x20];
7732
7733 u8 port_filter_update_en[8][0x20];
7734};
7735
7736struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007737 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007738 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007739 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007740
7741 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007742 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007743 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007744 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007745 u8 prio_mask_rx[0x8];
7746
7747 u8 pptx[0x1];
7748 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007749 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007750 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007751 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007752
7753 u8 pprx[0x1];
7754 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007755 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007756 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007757 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007758
Matan Barakb4ff3a32016-02-09 14:57:42 +02007759 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007760};
7761
7762struct mlx5_ifc_pelc_reg_bits {
7763 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007764 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007765 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007766 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007767
7768 u8 op_admin[0x8];
7769 u8 op_capability[0x8];
7770 u8 op_request[0x8];
7771 u8 op_active[0x8];
7772
7773 u8 admin[0x40];
7774
7775 u8 capability[0x40];
7776
7777 u8 request[0x40];
7778
7779 u8 active[0x40];
7780
Matan Barakb4ff3a32016-02-09 14:57:42 +02007781 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007782};
7783
7784struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007785 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007786 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007787 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007788
Matan Barakb4ff3a32016-02-09 14:57:42 +02007789 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007790 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007791 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007792
Matan Barakb4ff3a32016-02-09 14:57:42 +02007793 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007794 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007795 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007796 u8 error_type[0x8];
7797};
7798
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007799struct mlx5_ifc_pcam_enhanced_features_bits {
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007800 u8 reserved_at_0[0x7c];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007801
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007802 u8 ptys_connector_type[0x1];
7803 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007804 u8 ppcnt_discard_group[0x1];
7805 u8 ppcnt_statistical_group[0x1];
7806};
7807
7808struct mlx5_ifc_pcam_reg_bits {
7809 u8 reserved_at_0[0x8];
7810 u8 feature_group[0x8];
7811 u8 reserved_at_10[0x8];
7812 u8 access_reg_group[0x8];
7813
7814 u8 reserved_at_20[0x20];
7815
7816 union {
7817 u8 reserved_at_0[0x80];
7818 } port_access_reg_cap_mask;
7819
7820 u8 reserved_at_c0[0x80];
7821
7822 union {
7823 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7824 u8 reserved_at_0[0x80];
7825 } feature_cap_mask;
7826
7827 u8 reserved_at_1c0[0xc0];
7828};
7829
7830struct mlx5_ifc_mcam_enhanced_features_bits {
7831 u8 reserved_at_0[0x7f];
7832
7833 u8 pcie_performance_group[0x1];
7834};
7835
Or Gerlitz0ab87742017-06-11 15:25:38 +03007836struct mlx5_ifc_mcam_access_reg_bits {
7837 u8 reserved_at_0[0x1c];
7838 u8 mcda[0x1];
7839 u8 mcc[0x1];
7840 u8 mcqi[0x1];
7841 u8 reserved_at_1f[0x1];
7842
7843 u8 regs_95_to_64[0x20];
7844 u8 regs_63_to_32[0x20];
7845 u8 regs_31_to_0[0x20];
7846};
7847
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007848struct mlx5_ifc_mcam_reg_bits {
7849 u8 reserved_at_0[0x8];
7850 u8 feature_group[0x8];
7851 u8 reserved_at_10[0x8];
7852 u8 access_reg_group[0x8];
7853
7854 u8 reserved_at_20[0x20];
7855
7856 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007857 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007858 u8 reserved_at_0[0x80];
7859 } mng_access_reg_cap_mask;
7860
7861 u8 reserved_at_c0[0x80];
7862
7863 union {
7864 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7865 u8 reserved_at_0[0x80];
7866 } mng_feature_cap_mask;
7867
7868 u8 reserved_at_1c0[0x80];
7869};
7870
Saeed Mahameede2816822015-05-28 22:28:40 +03007871struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007872 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007873 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007874 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007875
7876 u8 port_capability_mask[4][0x20];
7877};
7878
7879struct mlx5_ifc_paos_reg_bits {
7880 u8 swid[0x8];
7881 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007882 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007883 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007884 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007885 u8 oper_status[0x4];
7886
7887 u8 ase[0x1];
7888 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007889 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007890 u8 e[0x2];
7891
Matan Barakb4ff3a32016-02-09 14:57:42 +02007892 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007893};
7894
7895struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007896 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007897 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007898 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007899 u8 opamp_group_type[0x4];
7900
7901 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007902 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007903 u8 num_of_indices[0xc];
7904
7905 u8 index_data[18][0x10];
7906};
7907
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007908struct mlx5_ifc_pcmr_reg_bits {
7909 u8 reserved_at_0[0x8];
7910 u8 local_port[0x8];
7911 u8 reserved_at_10[0x2e];
7912 u8 fcs_cap[0x1];
7913 u8 reserved_at_3f[0x1f];
7914 u8 fcs_chk[0x1];
7915 u8 reserved_at_5f[0x1];
7916};
7917
Saeed Mahameede2816822015-05-28 22:28:40 +03007918struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007919 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007920 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007921 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007922 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007923 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007924 u8 module[0x8];
7925};
7926
7927struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007928 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007929 u8 lossy[0x1];
7930 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007931 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007932 u8 size[0xc];
7933
7934 u8 xoff_threshold[0x10];
7935 u8 xon_threshold[0x10];
7936};
7937
7938struct mlx5_ifc_set_node_in_bits {
7939 u8 node_description[64][0x8];
7940};
7941
7942struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007943 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007944 u8 power_settings_level[0x8];
7945
Matan Barakb4ff3a32016-02-09 14:57:42 +02007946 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007947};
7948
7949struct mlx5_ifc_register_host_endianness_bits {
7950 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007951 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007952
Matan Barakb4ff3a32016-02-09 14:57:42 +02007953 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007954};
7955
7956struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007957 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007958
7959 u8 mkey[0x20];
7960
7961 u8 addressh_63_32[0x20];
7962
7963 u8 addressl_31_0[0x20];
7964};
7965
7966struct mlx5_ifc_ud_adrs_vector_bits {
7967 u8 dc_key[0x40];
7968
7969 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007970 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007971 u8 destination_qp_dct[0x18];
7972
7973 u8 static_rate[0x4];
7974 u8 sl_eth_prio[0x4];
7975 u8 fl[0x1];
7976 u8 mlid[0x7];
7977 u8 rlid_udp_sport[0x10];
7978
Matan Barakb4ff3a32016-02-09 14:57:42 +02007979 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007980
7981 u8 rmac_47_16[0x20];
7982
7983 u8 rmac_15_0[0x10];
7984 u8 tclass[0x8];
7985 u8 hop_limit[0x8];
7986
Matan Barakb4ff3a32016-02-09 14:57:42 +02007987 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03007988 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007989 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007990 u8 src_addr_index[0x8];
7991 u8 flow_label[0x14];
7992
7993 u8 rgid_rip[16][0x8];
7994};
7995
7996struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007997 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007998 u8 function_id[0x10];
7999
8000 u8 num_pages[0x20];
8001
Matan Barakb4ff3a32016-02-09 14:57:42 +02008002 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008003};
8004
8005struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008006 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008007 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008008 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008009 u8 event_sub_type[0x8];
8010
Matan Barakb4ff3a32016-02-09 14:57:42 +02008011 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008012
8013 union mlx5_ifc_event_auto_bits event_data;
8014
Matan Barakb4ff3a32016-02-09 14:57:42 +02008015 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008016 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008017 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008018 u8 owner[0x1];
8019};
8020
8021enum {
8022 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8023};
8024
8025struct mlx5_ifc_cmd_queue_entry_bits {
8026 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008027 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008028
8029 u8 input_length[0x20];
8030
8031 u8 input_mailbox_pointer_63_32[0x20];
8032
8033 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008034 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008035
8036 u8 command_input_inline_data[16][0x8];
8037
8038 u8 command_output_inline_data[16][0x8];
8039
8040 u8 output_mailbox_pointer_63_32[0x20];
8041
8042 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008043 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008044
8045 u8 output_length[0x20];
8046
8047 u8 token[0x8];
8048 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008049 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008050 u8 status[0x7];
8051 u8 ownership[0x1];
8052};
8053
8054struct mlx5_ifc_cmd_out_bits {
8055 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008056 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008057
8058 u8 syndrome[0x20];
8059
8060 u8 command_output[0x20];
8061};
8062
8063struct mlx5_ifc_cmd_in_bits {
8064 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008065 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008066
Matan Barakb4ff3a32016-02-09 14:57:42 +02008067 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008068 u8 op_mod[0x10];
8069
8070 u8 command[0][0x20];
8071};
8072
8073struct mlx5_ifc_cmd_if_box_bits {
8074 u8 mailbox_data[512][0x8];
8075
Matan Barakb4ff3a32016-02-09 14:57:42 +02008076 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008077
8078 u8 next_pointer_63_32[0x20];
8079
8080 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008081 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008082
8083 u8 block_number[0x20];
8084
Matan Barakb4ff3a32016-02-09 14:57:42 +02008085 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008086 u8 token[0x8];
8087 u8 ctrl_signature[0x8];
8088 u8 signature[0x8];
8089};
8090
8091struct mlx5_ifc_mtt_bits {
8092 u8 ptag_63_32[0x20];
8093
8094 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008095 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008096 u8 wr_en[0x1];
8097 u8 rd_en[0x1];
8098};
8099
Tariq Toukan928cfe82016-02-22 18:17:29 +02008100struct mlx5_ifc_query_wol_rol_out_bits {
8101 u8 status[0x8];
8102 u8 reserved_at_8[0x18];
8103
8104 u8 syndrome[0x20];
8105
8106 u8 reserved_at_40[0x10];
8107 u8 rol_mode[0x8];
8108 u8 wol_mode[0x8];
8109
8110 u8 reserved_at_60[0x20];
8111};
8112
8113struct mlx5_ifc_query_wol_rol_in_bits {
8114 u8 opcode[0x10];
8115 u8 reserved_at_10[0x10];
8116
8117 u8 reserved_at_20[0x10];
8118 u8 op_mod[0x10];
8119
8120 u8 reserved_at_40[0x40];
8121};
8122
8123struct mlx5_ifc_set_wol_rol_out_bits {
8124 u8 status[0x8];
8125 u8 reserved_at_8[0x18];
8126
8127 u8 syndrome[0x20];
8128
8129 u8 reserved_at_40[0x40];
8130};
8131
8132struct mlx5_ifc_set_wol_rol_in_bits {
8133 u8 opcode[0x10];
8134 u8 reserved_at_10[0x10];
8135
8136 u8 reserved_at_20[0x10];
8137 u8 op_mod[0x10];
8138
8139 u8 rol_mode_valid[0x1];
8140 u8 wol_mode_valid[0x1];
8141 u8 reserved_at_42[0xe];
8142 u8 rol_mode[0x8];
8143 u8 wol_mode[0x8];
8144
8145 u8 reserved_at_60[0x20];
8146};
8147
Saeed Mahameede2816822015-05-28 22:28:40 +03008148enum {
8149 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8150 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8151 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8152};
8153
8154enum {
8155 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8156 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8157 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8158};
8159
8160enum {
8161 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8162 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8163 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8164 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8165 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8166 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8167 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8168 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8169 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8170 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8171 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8172};
8173
8174struct mlx5_ifc_initial_seg_bits {
8175 u8 fw_rev_minor[0x10];
8176 u8 fw_rev_major[0x10];
8177
8178 u8 cmd_interface_rev[0x10];
8179 u8 fw_rev_subminor[0x10];
8180
Matan Barakb4ff3a32016-02-09 14:57:42 +02008181 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008182
8183 u8 cmdq_phy_addr_63_32[0x20];
8184
8185 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008186 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008187 u8 nic_interface[0x2];
8188 u8 log_cmdq_size[0x4];
8189 u8 log_cmdq_stride[0x4];
8190
8191 u8 command_doorbell_vector[0x20];
8192
Matan Barakb4ff3a32016-02-09 14:57:42 +02008193 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008194
8195 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008196 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008197 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008198 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008199
8200 struct mlx5_ifc_health_buffer_bits health_buffer;
8201
8202 u8 no_dram_nic_offset[0x20];
8203
Matan Barakb4ff3a32016-02-09 14:57:42 +02008204 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008205
Matan Barakb4ff3a32016-02-09 14:57:42 +02008206 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008207 u8 clear_int[0x1];
8208
8209 u8 health_syndrome[0x8];
8210 u8 health_counter[0x18];
8211
Matan Barakb4ff3a32016-02-09 14:57:42 +02008212 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008213};
8214
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008215struct mlx5_ifc_mtpps_reg_bits {
8216 u8 reserved_at_0[0xc];
8217 u8 cap_number_of_pps_pins[0x4];
8218 u8 reserved_at_10[0x4];
8219 u8 cap_max_num_of_pps_in_pins[0x4];
8220 u8 reserved_at_18[0x4];
8221 u8 cap_max_num_of_pps_out_pins[0x4];
8222
8223 u8 reserved_at_20[0x24];
8224 u8 cap_pin_3_mode[0x4];
8225 u8 reserved_at_48[0x4];
8226 u8 cap_pin_2_mode[0x4];
8227 u8 reserved_at_50[0x4];
8228 u8 cap_pin_1_mode[0x4];
8229 u8 reserved_at_58[0x4];
8230 u8 cap_pin_0_mode[0x4];
8231
8232 u8 reserved_at_60[0x4];
8233 u8 cap_pin_7_mode[0x4];
8234 u8 reserved_at_68[0x4];
8235 u8 cap_pin_6_mode[0x4];
8236 u8 reserved_at_70[0x4];
8237 u8 cap_pin_5_mode[0x4];
8238 u8 reserved_at_78[0x4];
8239 u8 cap_pin_4_mode[0x4];
8240
8241 u8 reserved_at_80[0x80];
8242
8243 u8 enable[0x1];
8244 u8 reserved_at_101[0xb];
8245 u8 pattern[0x4];
8246 u8 reserved_at_110[0x4];
8247 u8 pin_mode[0x4];
8248 u8 pin[0x8];
8249
8250 u8 reserved_at_120[0x20];
8251
8252 u8 time_stamp[0x40];
8253
8254 u8 out_pulse_duration[0x10];
8255 u8 out_periodic_adjustment[0x10];
8256
8257 u8 reserved_at_1a0[0x60];
8258};
8259
8260struct mlx5_ifc_mtppse_reg_bits {
8261 u8 reserved_at_0[0x18];
8262 u8 pin[0x8];
8263 u8 event_arm[0x1];
8264 u8 reserved_at_21[0x1b];
8265 u8 event_generation_mode[0x4];
8266 u8 reserved_at_40[0x40];
8267};
8268
Or Gerlitz47176282017-04-18 13:35:39 +03008269struct mlx5_ifc_mcqi_cap_bits {
8270 u8 supported_info_bitmask[0x20];
8271
8272 u8 component_size[0x20];
8273
8274 u8 max_component_size[0x20];
8275
8276 u8 log_mcda_word_size[0x4];
8277 u8 reserved_at_64[0xc];
8278 u8 mcda_max_write_size[0x10];
8279
8280 u8 rd_en[0x1];
8281 u8 reserved_at_81[0x1];
8282 u8 match_chip_id[0x1];
8283 u8 match_psid[0x1];
8284 u8 check_user_timestamp[0x1];
8285 u8 match_base_guid_mac[0x1];
8286 u8 reserved_at_86[0x1a];
8287};
8288
8289struct mlx5_ifc_mcqi_reg_bits {
8290 u8 read_pending_component[0x1];
8291 u8 reserved_at_1[0xf];
8292 u8 component_index[0x10];
8293
8294 u8 reserved_at_20[0x20];
8295
8296 u8 reserved_at_40[0x1b];
8297 u8 info_type[0x5];
8298
8299 u8 info_size[0x20];
8300
8301 u8 offset[0x20];
8302
8303 u8 reserved_at_a0[0x10];
8304 u8 data_size[0x10];
8305
8306 u8 data[0][0x20];
8307};
8308
8309struct mlx5_ifc_mcc_reg_bits {
8310 u8 reserved_at_0[0x4];
8311 u8 time_elapsed_since_last_cmd[0xc];
8312 u8 reserved_at_10[0x8];
8313 u8 instruction[0x8];
8314
8315 u8 reserved_at_20[0x10];
8316 u8 component_index[0x10];
8317
8318 u8 reserved_at_40[0x8];
8319 u8 update_handle[0x18];
8320
8321 u8 handle_owner_type[0x4];
8322 u8 handle_owner_host_id[0x4];
8323 u8 reserved_at_68[0x1];
8324 u8 control_progress[0x7];
8325 u8 error_code[0x8];
8326 u8 reserved_at_78[0x4];
8327 u8 control_state[0x4];
8328
8329 u8 component_size[0x20];
8330
8331 u8 reserved_at_a0[0x60];
8332};
8333
8334struct mlx5_ifc_mcda_reg_bits {
8335 u8 reserved_at_0[0x8];
8336 u8 update_handle[0x18];
8337
8338 u8 offset[0x20];
8339
8340 u8 reserved_at_40[0x10];
8341 u8 size[0x10];
8342
8343 u8 reserved_at_60[0x20];
8344
8345 u8 data[0][0x20];
8346};
8347
Saeed Mahameede2816822015-05-28 22:28:40 +03008348union mlx5_ifc_ports_control_registers_document_bits {
8349 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8350 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8351 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8352 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8353 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8354 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8355 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8356 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8357 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8358 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8359 struct mlx5_ifc_paos_reg_bits paos_reg;
8360 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8361 struct mlx5_ifc_peir_reg_bits peir_reg;
8362 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8363 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008364 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008365 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8366 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8367 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8368 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8369 struct mlx5_ifc_plib_reg_bits plib_reg;
8370 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8371 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8372 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8373 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8374 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8375 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8376 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8377 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8378 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8379 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008380 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008381 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8382 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8383 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8384 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8385 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8386 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8387 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008388 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008389 struct mlx5_ifc_pude_reg_bits pude_reg;
8390 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8391 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8392 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008393 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8394 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008395 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008396 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8397 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008398 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8399 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8400 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008401 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008402};
8403
8404union mlx5_ifc_debug_enhancements_document_bits {
8405 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008406 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008407};
8408
8409union mlx5_ifc_uplink_pci_interface_document_bits {
8410 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008411 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008412};
8413
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008414struct mlx5_ifc_set_flow_table_root_out_bits {
8415 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008416 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008417
8418 u8 syndrome[0x20];
8419
Matan Barakb4ff3a32016-02-09 14:57:42 +02008420 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008421};
8422
8423struct mlx5_ifc_set_flow_table_root_in_bits {
8424 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008425 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008426
Matan Barakb4ff3a32016-02-09 14:57:42 +02008427 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008428 u8 op_mod[0x10];
8429
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008430 u8 other_vport[0x1];
8431 u8 reserved_at_41[0xf];
8432 u8 vport_number[0x10];
8433
8434 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008435
8436 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008437 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008438
Matan Barakb4ff3a32016-02-09 14:57:42 +02008439 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008440 u8 table_id[0x18];
8441
Erez Shitrit500a3d02017-04-13 06:36:51 +03008442 u8 reserved_at_c0[0x8];
8443 u8 underlay_qpn[0x18];
8444 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008445};
8446
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008447enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008448 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8449 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008450};
8451
8452struct mlx5_ifc_modify_flow_table_out_bits {
8453 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008454 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008455
8456 u8 syndrome[0x20];
8457
Matan Barakb4ff3a32016-02-09 14:57:42 +02008458 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008459};
8460
8461struct mlx5_ifc_modify_flow_table_in_bits {
8462 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008463 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008464
Matan Barakb4ff3a32016-02-09 14:57:42 +02008465 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008466 u8 op_mod[0x10];
8467
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008468 u8 other_vport[0x1];
8469 u8 reserved_at_41[0xf];
8470 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008471
Matan Barakb4ff3a32016-02-09 14:57:42 +02008472 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008473 u8 modify_field_select[0x10];
8474
8475 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008476 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008477
Matan Barakb4ff3a32016-02-09 14:57:42 +02008478 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008479 u8 table_id[0x18];
8480
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008481 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008482};
8483
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008484struct mlx5_ifc_ets_tcn_config_reg_bits {
8485 u8 g[0x1];
8486 u8 b[0x1];
8487 u8 r[0x1];
8488 u8 reserved_at_3[0x9];
8489 u8 group[0x4];
8490 u8 reserved_at_10[0x9];
8491 u8 bw_allocation[0x7];
8492
8493 u8 reserved_at_20[0xc];
8494 u8 max_bw_units[0x4];
8495 u8 reserved_at_30[0x8];
8496 u8 max_bw_value[0x8];
8497};
8498
8499struct mlx5_ifc_ets_global_config_reg_bits {
8500 u8 reserved_at_0[0x2];
8501 u8 r[0x1];
8502 u8 reserved_at_3[0x1d];
8503
8504 u8 reserved_at_20[0xc];
8505 u8 max_bw_units[0x4];
8506 u8 reserved_at_30[0x8];
8507 u8 max_bw_value[0x8];
8508};
8509
8510struct mlx5_ifc_qetc_reg_bits {
8511 u8 reserved_at_0[0x8];
8512 u8 port_number[0x8];
8513 u8 reserved_at_10[0x30];
8514
8515 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8516 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8517};
8518
8519struct mlx5_ifc_qtct_reg_bits {
8520 u8 reserved_at_0[0x8];
8521 u8 port_number[0x8];
8522 u8 reserved_at_10[0xd];
8523 u8 prio[0x3];
8524
8525 u8 reserved_at_20[0x1d];
8526 u8 tclass[0x3];
8527};
8528
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008529struct mlx5_ifc_mcia_reg_bits {
8530 u8 l[0x1];
8531 u8 reserved_at_1[0x7];
8532 u8 module[0x8];
8533 u8 reserved_at_10[0x8];
8534 u8 status[0x8];
8535
8536 u8 i2c_device_address[0x8];
8537 u8 page_number[0x8];
8538 u8 device_address[0x10];
8539
8540 u8 reserved_at_40[0x10];
8541 u8 size[0x10];
8542
8543 u8 reserved_at_60[0x20];
8544
8545 u8 dword_0[0x20];
8546 u8 dword_1[0x20];
8547 u8 dword_2[0x20];
8548 u8 dword_3[0x20];
8549 u8 dword_4[0x20];
8550 u8 dword_5[0x20];
8551 u8 dword_6[0x20];
8552 u8 dword_7[0x20];
8553 u8 dword_8[0x20];
8554 u8 dword_9[0x20];
8555 u8 dword_10[0x20];
8556 u8 dword_11[0x20];
8557};
8558
Saeed Mahameed74862162016-06-09 15:11:34 +03008559struct mlx5_ifc_dcbx_param_bits {
8560 u8 dcbx_cee_cap[0x1];
8561 u8 dcbx_ieee_cap[0x1];
8562 u8 dcbx_standby_cap[0x1];
8563 u8 reserved_at_0[0x5];
8564 u8 port_number[0x8];
8565 u8 reserved_at_10[0xa];
8566 u8 max_application_table_size[6];
8567 u8 reserved_at_20[0x15];
8568 u8 version_oper[0x3];
8569 u8 reserved_at_38[5];
8570 u8 version_admin[0x3];
8571 u8 willing_admin[0x1];
8572 u8 reserved_at_41[0x3];
8573 u8 pfc_cap_oper[0x4];
8574 u8 reserved_at_48[0x4];
8575 u8 pfc_cap_admin[0x4];
8576 u8 reserved_at_50[0x4];
8577 u8 num_of_tc_oper[0x4];
8578 u8 reserved_at_58[0x4];
8579 u8 num_of_tc_admin[0x4];
8580 u8 remote_willing[0x1];
8581 u8 reserved_at_61[3];
8582 u8 remote_pfc_cap[4];
8583 u8 reserved_at_68[0x14];
8584 u8 remote_num_of_tc[0x4];
8585 u8 reserved_at_80[0x18];
8586 u8 error[0x8];
8587 u8 reserved_at_a0[0x160];
8588};
Aviv Heller84df61e2016-05-10 13:47:50 +03008589
8590struct mlx5_ifc_lagc_bits {
8591 u8 reserved_at_0[0x1d];
8592 u8 lag_state[0x3];
8593
8594 u8 reserved_at_20[0x14];
8595 u8 tx_remap_affinity_2[0x4];
8596 u8 reserved_at_38[0x4];
8597 u8 tx_remap_affinity_1[0x4];
8598};
8599
8600struct mlx5_ifc_create_lag_out_bits {
8601 u8 status[0x8];
8602 u8 reserved_at_8[0x18];
8603
8604 u8 syndrome[0x20];
8605
8606 u8 reserved_at_40[0x40];
8607};
8608
8609struct mlx5_ifc_create_lag_in_bits {
8610 u8 opcode[0x10];
8611 u8 reserved_at_10[0x10];
8612
8613 u8 reserved_at_20[0x10];
8614 u8 op_mod[0x10];
8615
8616 struct mlx5_ifc_lagc_bits ctx;
8617};
8618
8619struct mlx5_ifc_modify_lag_out_bits {
8620 u8 status[0x8];
8621 u8 reserved_at_8[0x18];
8622
8623 u8 syndrome[0x20];
8624
8625 u8 reserved_at_40[0x40];
8626};
8627
8628struct mlx5_ifc_modify_lag_in_bits {
8629 u8 opcode[0x10];
8630 u8 reserved_at_10[0x10];
8631
8632 u8 reserved_at_20[0x10];
8633 u8 op_mod[0x10];
8634
8635 u8 reserved_at_40[0x20];
8636 u8 field_select[0x20];
8637
8638 struct mlx5_ifc_lagc_bits ctx;
8639};
8640
8641struct mlx5_ifc_query_lag_out_bits {
8642 u8 status[0x8];
8643 u8 reserved_at_8[0x18];
8644
8645 u8 syndrome[0x20];
8646
8647 u8 reserved_at_40[0x40];
8648
8649 struct mlx5_ifc_lagc_bits ctx;
8650};
8651
8652struct mlx5_ifc_query_lag_in_bits {
8653 u8 opcode[0x10];
8654 u8 reserved_at_10[0x10];
8655
8656 u8 reserved_at_20[0x10];
8657 u8 op_mod[0x10];
8658
8659 u8 reserved_at_40[0x40];
8660};
8661
8662struct mlx5_ifc_destroy_lag_out_bits {
8663 u8 status[0x8];
8664 u8 reserved_at_8[0x18];
8665
8666 u8 syndrome[0x20];
8667
8668 u8 reserved_at_40[0x40];
8669};
8670
8671struct mlx5_ifc_destroy_lag_in_bits {
8672 u8 opcode[0x10];
8673 u8 reserved_at_10[0x10];
8674
8675 u8 reserved_at_20[0x10];
8676 u8 op_mod[0x10];
8677
8678 u8 reserved_at_40[0x40];
8679};
8680
8681struct mlx5_ifc_create_vport_lag_out_bits {
8682 u8 status[0x8];
8683 u8 reserved_at_8[0x18];
8684
8685 u8 syndrome[0x20];
8686
8687 u8 reserved_at_40[0x40];
8688};
8689
8690struct mlx5_ifc_create_vport_lag_in_bits {
8691 u8 opcode[0x10];
8692 u8 reserved_at_10[0x10];
8693
8694 u8 reserved_at_20[0x10];
8695 u8 op_mod[0x10];
8696
8697 u8 reserved_at_40[0x40];
8698};
8699
8700struct mlx5_ifc_destroy_vport_lag_out_bits {
8701 u8 status[0x8];
8702 u8 reserved_at_8[0x18];
8703
8704 u8 syndrome[0x20];
8705
8706 u8 reserved_at_40[0x40];
8707};
8708
8709struct mlx5_ifc_destroy_vport_lag_in_bits {
8710 u8 opcode[0x10];
8711 u8 reserved_at_10[0x10];
8712
8713 u8 reserved_at_20[0x10];
8714 u8 op_mod[0x10];
8715
8716 u8 reserved_at_40[0x40];
8717};
8718
Eli Cohend29b7962014-10-02 12:19:43 +03008719#endif /* MLX5_IFC_H */