blob: d25011f8481504505950b80e03e4ec35906f09ec [file] [log] [blame]
Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +0200146 MLX5_CMD_OP_QUERY_VNIC_ENV = 0x76f,
Eli Cohend29b7962014-10-02 12:19:43 +0300147 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
148 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
149 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
150 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Eran Ben Elisha37e92a92017-11-13 10:11:27 +0200151 MLX5_CMD_OP_SET_PP_RATE_LIMIT = 0x780,
Saeed Mahameed74862162016-06-09 15:11:34 +0300152 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300153 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
154 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
155 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
156 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
157 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
158 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300159 MLX5_CMD_OP_ALLOC_PD = 0x800,
160 MLX5_CMD_OP_DEALLOC_PD = 0x801,
161 MLX5_CMD_OP_ALLOC_UAR = 0x802,
162 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
163 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
164 MLX5_CMD_OP_ACCESS_REG = 0x805,
165 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300166 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300167 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
168 MLX5_CMD_OP_MAD_IFC = 0x50d,
169 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
170 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
171 MLX5_CMD_OP_NOP = 0x80d,
172 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
173 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300174 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
175 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
176 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
177 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
178 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
179 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
180 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
181 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
182 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
183 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
184 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
185 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200186 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
187 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300188 MLX5_CMD_OP_CREATE_LAG = 0x840,
189 MLX5_CMD_OP_MODIFY_LAG = 0x841,
190 MLX5_CMD_OP_QUERY_LAG = 0x842,
191 MLX5_CMD_OP_DESTROY_LAG = 0x843,
192 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
193 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300194 MLX5_CMD_OP_CREATE_TIR = 0x900,
195 MLX5_CMD_OP_MODIFY_TIR = 0x901,
196 MLX5_CMD_OP_DESTROY_TIR = 0x902,
197 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300198 MLX5_CMD_OP_CREATE_SQ = 0x904,
199 MLX5_CMD_OP_MODIFY_SQ = 0x905,
200 MLX5_CMD_OP_DESTROY_SQ = 0x906,
201 MLX5_CMD_OP_QUERY_SQ = 0x907,
202 MLX5_CMD_OP_CREATE_RQ = 0x908,
203 MLX5_CMD_OP_MODIFY_RQ = 0x909,
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300204 MLX5_CMD_OP_SET_DELAY_DROP_PARAMS = 0x910,
Eli Cohend29b7962014-10-02 12:19:43 +0300205 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
206 MLX5_CMD_OP_QUERY_RQ = 0x90b,
207 MLX5_CMD_OP_CREATE_RMP = 0x90c,
208 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
209 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
210 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300211 MLX5_CMD_OP_CREATE_TIS = 0x912,
212 MLX5_CMD_OP_MODIFY_TIS = 0x913,
213 MLX5_CMD_OP_DESTROY_TIS = 0x914,
214 MLX5_CMD_OP_QUERY_TIS = 0x915,
215 MLX5_CMD_OP_CREATE_RQT = 0x916,
216 MLX5_CMD_OP_MODIFY_RQT = 0x917,
217 MLX5_CMD_OP_DESTROY_RQT = 0x918,
218 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200219 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300220 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
221 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
222 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
223 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
224 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
225 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
226 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
227 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200228 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000229 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
230 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
231 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300232 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300233 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
234 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200235 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
236 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300237 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
238 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
239 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
240 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
241 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300242 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300243};
244
245struct mlx5_ifc_flow_table_fields_supported_bits {
246 u8 outer_dmac[0x1];
247 u8 outer_smac[0x1];
248 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300249 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300250 u8 outer_first_prio[0x1];
251 u8 outer_first_cfi[0x1];
252 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300253 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300254 u8 outer_second_prio[0x1];
255 u8 outer_second_cfi[0x1];
256 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200257 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300258 u8 outer_sip[0x1];
259 u8 outer_dip[0x1];
260 u8 outer_frag[0x1];
261 u8 outer_ip_protocol[0x1];
262 u8 outer_ip_ecn[0x1];
263 u8 outer_ip_dscp[0x1];
264 u8 outer_udp_sport[0x1];
265 u8 outer_udp_dport[0x1];
266 u8 outer_tcp_sport[0x1];
267 u8 outer_tcp_dport[0x1];
268 u8 outer_tcp_flags[0x1];
269 u8 outer_gre_protocol[0x1];
270 u8 outer_gre_key[0x1];
271 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200272 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300273 u8 source_eswitch_port[0x1];
274
275 u8 inner_dmac[0x1];
276 u8 inner_smac[0x1];
277 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300278 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300279 u8 inner_first_prio[0x1];
280 u8 inner_first_cfi[0x1];
281 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200282 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300283 u8 inner_second_prio[0x1];
284 u8 inner_second_cfi[0x1];
285 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200286 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300287 u8 inner_sip[0x1];
288 u8 inner_dip[0x1];
289 u8 inner_frag[0x1];
290 u8 inner_ip_protocol[0x1];
291 u8 inner_ip_ecn[0x1];
292 u8 inner_ip_dscp[0x1];
293 u8 inner_udp_sport[0x1];
294 u8 inner_udp_dport[0x1];
295 u8 inner_tcp_sport[0x1];
296 u8 inner_tcp_dport[0x1];
297 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200298 u8 reserved_at_37[0x9];
Boris Pismenny3346c482017-08-20 15:13:08 +0300299 u8 reserved_at_40[0x17];
300 u8 outer_esp_spi[0x1];
301 u8 reserved_at_58[0x2];
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300302 u8 bth_dst_qp[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300303
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300304 u8 reserved_at_5b[0x25];
Saeed Mahameede2816822015-05-28 22:28:40 +0300305};
306
307struct mlx5_ifc_flow_table_prop_layout_bits {
308 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000309 u8 reserved_at_1[0x1];
310 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200311 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200312 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200313 u8 identified_miss_table_mode[0x1];
314 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300315 u8 encap[0x1];
316 u8 decap[0x1];
Or Gerlitz0c068972018-01-28 20:14:20 +0200317 u8 reserved_at_9[0x1];
318 u8 pop_vlan[0x1];
319 u8 push_vlan[0x1];
320 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +0300321
Matan Barakb4ff3a32016-02-09 14:57:42 +0200322 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200324 u8 log_max_modify_header_context[0x8];
325 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300326 u8 max_ft_level[0x8];
327
Matan Barakb4ff3a32016-02-09 14:57:42 +0200328 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300329
Matan Barakb4ff3a32016-02-09 14:57:42 +0200330 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200331 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300332
Matan Barakb4ff3a32016-02-09 14:57:42 +0200333 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200334 u8 log_max_destination[0x8];
335
Raed Salem16f1c5b2017-07-30 11:02:51 +0300336 u8 log_max_flow_counter[0x8];
337 u8 reserved_at_a8[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300338 u8 log_max_flow[0x8];
339
Matan Barakb4ff3a32016-02-09 14:57:42 +0200340 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300341
342 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
343
344 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
345};
346
347struct mlx5_ifc_odp_per_transport_service_cap_bits {
348 u8 send[0x1];
349 u8 receive[0x1];
350 u8 write[0x1];
351 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200352 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300353 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200354 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300355};
356
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200357struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200358 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200359
360 u8 ipv4[0x20];
361};
362
363struct mlx5_ifc_ipv6_layout_bits {
364 u8 ipv6[16][0x8];
365};
366
367union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
368 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
369 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200370 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200371};
372
Saeed Mahameede2816822015-05-28 22:28:40 +0300373struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
374 u8 smac_47_16[0x20];
375
376 u8 smac_15_0[0x10];
377 u8 ethertype[0x10];
378
379 u8 dmac_47_16[0x20];
380
381 u8 dmac_15_0[0x10];
382 u8 first_prio[0x3];
383 u8 first_cfi[0x1];
384 u8 first_vid[0xc];
385
386 u8 ip_protocol[0x8];
387 u8 ip_dscp[0x6];
388 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300389 u8 cvlan_tag[0x1];
390 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300391 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300392 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300393 u8 tcp_flags[0x9];
394
395 u8 tcp_sport[0x10];
396 u8 tcp_dport[0x10];
397
Or Gerlitza8ade552017-06-07 17:49:56 +0300398 u8 reserved_at_c0[0x18];
399 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300400
401 u8 udp_sport[0x10];
402 u8 udp_dport[0x10];
403
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200404 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300405
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200406 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300407};
408
409struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300410 u8 reserved_at_0[0x8];
411 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300412
Matan Barakb4ff3a32016-02-09 14:57:42 +0200413 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300414 u8 source_port[0x10];
415
416 u8 outer_second_prio[0x3];
417 u8 outer_second_cfi[0x1];
418 u8 outer_second_vid[0xc];
419 u8 inner_second_prio[0x3];
420 u8 inner_second_cfi[0x1];
421 u8 inner_second_vid[0xc];
422
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300423 u8 outer_second_cvlan_tag[0x1];
424 u8 inner_second_cvlan_tag[0x1];
425 u8 outer_second_svlan_tag[0x1];
426 u8 inner_second_svlan_tag[0x1];
427 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300428 u8 gre_protocol[0x10];
429
430 u8 gre_key_h[0x18];
431 u8 gre_key_l[0x8];
432
433 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200434 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435
Matan Barakb4ff3a32016-02-09 14:57:42 +0200436 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300437
Matan Barakb4ff3a32016-02-09 14:57:42 +0200438 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300439 u8 outer_ipv6_flow_label[0x14];
440
Matan Barakb4ff3a32016-02-09 14:57:42 +0200441 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300442 u8 inner_ipv6_flow_label[0x14];
443
Yishai Hadasa550ddf2017-08-17 15:52:33 +0300444 u8 reserved_at_120[0x28];
445 u8 bth_dst_qp[0x18];
Boris Pismenny3346c482017-08-20 15:13:08 +0300446 u8 reserved_at_160[0x20];
447 u8 outer_esp_spi[0x20];
448 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300449};
450
451struct mlx5_ifc_cmd_pas_bits {
452 u8 pa_h[0x20];
453
454 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200455 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300456};
457
458struct mlx5_ifc_uint64_bits {
459 u8 hi[0x20];
460
461 u8 lo[0x20];
462};
463
464enum {
465 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
466 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
467 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
468 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
469 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
470 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
471 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
472 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
473 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
474 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
475};
476
477struct mlx5_ifc_ads_bits {
478 u8 fl[0x1];
479 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200480 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300481 u8 pkey_index[0x10];
482
Matan Barakb4ff3a32016-02-09 14:57:42 +0200483 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300484 u8 grh[0x1];
485 u8 mlid[0x7];
486 u8 rlid[0x10];
487
488 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200489 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300490 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200491 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300492 u8 stat_rate[0x4];
493 u8 hop_limit[0x8];
494
Matan Barakb4ff3a32016-02-09 14:57:42 +0200495 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300496 u8 tclass[0x8];
497 u8 flow_label[0x14];
498
499 u8 rgid_rip[16][0x8];
500
Matan Barakb4ff3a32016-02-09 14:57:42 +0200501 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300502 u8 f_dscp[0x1];
503 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200504 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300505 u8 f_eth_prio[0x1];
506 u8 ecn[0x2];
507 u8 dscp[0x6];
508 u8 udp_sport[0x10];
509
510 u8 dei_cfi[0x1];
511 u8 eth_prio[0x3];
512 u8 sl[0x4];
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200513 u8 vhca_port_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300514 u8 rmac_47_32[0x10];
515
516 u8 rmac_31_0[0x20];
517};
518
519struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200520 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300521 u8 nic_rx_multi_path_tirs_fts[0x1];
522 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
523 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300524
525 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
526
Matan Barakb4ff3a32016-02-09 14:57:42 +0200527 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300528
529 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
530
531 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
532
Matan Barakb4ff3a32016-02-09 14:57:42 +0200533 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300534
535 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
536
Matan Barakb4ff3a32016-02-09 14:57:42 +0200537 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300538};
539
Saeed Mahameed495716b2015-12-01 18:03:19 +0200540struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200541 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200542
543 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
544
545 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
546
547 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
548
Matan Barakb4ff3a32016-02-09 14:57:42 +0200549 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200550};
551
Saeed Mahameedd6666752015-12-01 18:03:22 +0200552struct mlx5_ifc_e_switch_cap_bits {
553 u8 vport_svlan_strip[0x1];
554 u8 vport_cvlan_strip[0x1];
555 u8 vport_svlan_insert[0x1];
556 u8 vport_cvlan_insert_if_not_exist[0x1];
557 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300558 u8 reserved_at_5[0x19];
559 u8 nic_vport_node_guid_modify[0x1];
560 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200561
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300562 u8 vxlan_encap_decap[0x1];
563 u8 nvgre_encap_decap[0x1];
564 u8 reserved_at_22[0x9];
565 u8 log_max_encap_headers[0x5];
566 u8 reserved_2b[0x6];
567 u8 max_encap_header_size[0xa];
568
569 u8 reserved_40[0x7c0];
570
Saeed Mahameedd6666752015-12-01 18:03:22 +0200571};
572
Saeed Mahameed74862162016-06-09 15:11:34 +0300573struct mlx5_ifc_qos_cap_bits {
574 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300575 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200576 u8 esw_bw_share[0x1];
577 u8 esw_rate_limit[0x1];
578 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300579
580 u8 reserved_at_20[0x20];
581
Saeed Mahameed74862162016-06-09 15:11:34 +0300582 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300583
Saeed Mahameed74862162016-06-09 15:11:34 +0300584 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300585
586 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300587 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300588
589 u8 esw_element_type[0x10];
590 u8 esw_tsar_type[0x10];
591
592 u8 reserved_at_c0[0x10];
593 u8 max_qos_para_vport[0x10];
594
595 u8 max_tsar_bw_share[0x20];
596
597 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300598};
599
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300600struct mlx5_ifc_debug_cap_bits {
601 u8 reserved_at_0[0x20];
602
603 u8 reserved_at_20[0x2];
604 u8 stall_detect[0x1];
605 u8 reserved_at_23[0x1d];
606
607 u8 reserved_at_40[0x7c0];
608};
609
Saeed Mahameede2816822015-05-28 22:28:40 +0300610struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
611 u8 csum_cap[0x1];
612 u8 vlan_cap[0x1];
613 u8 lro_cap[0x1];
614 u8 lro_psh_flag[0x1];
615 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200616 u8 reserved_at_5[0x2];
617 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200618 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200619 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300620 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200621 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300622 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300623 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300624 u8 reg_umr_sq[0x1];
625 u8 scatter_fcs[0x1];
Bodong Wang050da902017-08-17 15:52:35 +0300626 u8 enhanced_multi_pkt_send_wqe[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300627 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200628 u8 reserved_at_1c[0x2];
Gal Pressman27299842017-08-13 13:34:42 +0300629 u8 tunnel_stateless_gre[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300630 u8 tunnel_stateless_vxlan[0x1];
631
Ilan Tayari547eede2017-04-18 16:04:28 +0300632 u8 swp[0x1];
633 u8 swp_csum[0x1];
634 u8 swp_lso[0x1];
Maor Gottlieb4d350f12017-10-19 08:25:54 +0300635 u8 reserved_at_23[0x1b];
636 u8 max_geneve_opt_len[0x1];
637 u8 tunnel_stateless_geneve_rx[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300638
Matan Barakb4ff3a32016-02-09 14:57:42 +0200639 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300640 u8 lro_min_mss_size[0x10];
641
Matan Barakb4ff3a32016-02-09 14:57:42 +0200642 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300643
644 u8 lro_timer_supported_periods[4][0x20];
645
Matan Barakb4ff3a32016-02-09 14:57:42 +0200646 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300647};
648
649struct mlx5_ifc_roce_cap_bits {
650 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200651 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300652
Matan Barakb4ff3a32016-02-09 14:57:42 +0200653 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300654
Matan Barakb4ff3a32016-02-09 14:57:42 +0200655 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300656 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200657 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300658 u8 roce_version[0x8];
659
Matan Barakb4ff3a32016-02-09 14:57:42 +0200660 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300661 u8 r_roce_dest_udp_port[0x10];
662
663 u8 r_roce_max_src_udp_port[0x10];
664 u8 r_roce_min_src_udp_port[0x10];
665
Matan Barakb4ff3a32016-02-09 14:57:42 +0200666 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300667 u8 roce_address_table_size[0x10];
668
Matan Barakb4ff3a32016-02-09 14:57:42 +0200669 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300670};
671
672enum {
673 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
674 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
675 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
676 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
677 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
678 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
679 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
680 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
681 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
682};
683
684enum {
685 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
686 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
687 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
688 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
689 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
690 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
691 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
692 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
693 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
694};
695
696struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200697 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300698
Or Gerlitzbd108382017-05-28 15:24:17 +0300699 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200700 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300701 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300702
Matan Barakb4ff3a32016-02-09 14:57:42 +0200703 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300704
Matan Barakb4ff3a32016-02-09 14:57:42 +0200705 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300706
Matan Barakb4ff3a32016-02-09 14:57:42 +0200707 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200708 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300709
Matan Barakb4ff3a32016-02-09 14:57:42 +0200710 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200711 u8 atomic_size_qp[0x10];
712
Matan Barakb4ff3a32016-02-09 14:57:42 +0200713 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300714 u8 atomic_size_dc[0x10];
715
Matan Barakb4ff3a32016-02-09 14:57:42 +0200716 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300717};
718
719struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200720 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300721
722 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200723 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300724
Matan Barakb4ff3a32016-02-09 14:57:42 +0200725 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300726
727 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
728
729 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
730
731 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
732
Matan Barakb4ff3a32016-02-09 14:57:42 +0200733 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300734};
735
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200736struct mlx5_ifc_calc_op {
737 u8 reserved_at_0[0x10];
738 u8 reserved_at_10[0x9];
739 u8 op_swap_endianness[0x1];
740 u8 op_min[0x1];
741 u8 op_xor[0x1];
742 u8 op_or[0x1];
743 u8 op_and[0x1];
744 u8 op_max[0x1];
745 u8 op_add[0x1];
746};
747
748struct mlx5_ifc_vector_calc_cap_bits {
749 u8 calc_matrix[0x1];
750 u8 reserved_at_1[0x1f];
751 u8 reserved_at_20[0x8];
752 u8 max_vec_count[0x8];
753 u8 reserved_at_30[0xd];
754 u8 max_chunk_size[0x3];
755 struct mlx5_ifc_calc_op calc0;
756 struct mlx5_ifc_calc_op calc1;
757 struct mlx5_ifc_calc_op calc2;
758 struct mlx5_ifc_calc_op calc3;
759
760 u8 reserved_at_e0[0x720];
761};
762
Saeed Mahameede2816822015-05-28 22:28:40 +0300763enum {
764 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
765 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300766 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Noa Osherovichccc870872017-10-17 18:01:13 +0300767 MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +0300768};
769
770enum {
771 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
772 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
773};
774
775enum {
776 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
777 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
778 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
779 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
780 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
781};
782
783enum {
784 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
785 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
786 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
787 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
788 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
789 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
790};
791
792enum {
793 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
794 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
795};
796
797enum {
798 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
799 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
800 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
801};
802
803enum {
804 MLX5_CAP_PORT_TYPE_IB = 0x0,
805 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300806};
807
Max Gurtovoy1410a902017-05-28 10:53:10 +0300808enum {
809 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
810 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
811 MLX5_CAP_UMR_FENCE_NONE = 0x2,
812};
813
Eli Cohenb7755162014-10-02 12:19:44 +0300814struct mlx5_ifc_cmd_hca_cap_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +0200815 u8 reserved_at_0[0x30];
816 u8 vhca_id[0x10];
817
818 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +0300819
820 u8 log_max_srq_sz[0x8];
821 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200822 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300823 u8 log_max_qp[0x5];
824
Matan Barakb4ff3a32016-02-09 14:57:42 +0200825 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300826 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200827 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300828
Matan Barakb4ff3a32016-02-09 14:57:42 +0200829 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300830 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200831 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300832 u8 log_max_cq[0x5];
833
834 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200835 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300836 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200837 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300838 u8 log_max_eq[0x4];
839
840 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200841 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300842 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200843 u8 force_teardown[0x1];
844 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300845 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200846 u8 umr_extended_translation_offset[0x1];
847 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300848 u8 log_max_klm_list_size[0x6];
849
Matan Barakb4ff3a32016-02-09 14:57:42 +0200850 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300851 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200852 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300853 u8 log_max_ra_res_dc[0x6];
854
Matan Barakb4ff3a32016-02-09 14:57:42 +0200855 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300856 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200857 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300858 u8 log_max_ra_res_qp[0x6];
859
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200860 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300861 u8 cc_query_allowed[0x1];
862 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200863 u8 start_pad[0x1];
864 u8 cache_line_128byte[0x1];
Huy Nguyenc02762e2017-07-18 16:03:17 -0500865 u8 reserved_at_165[0xa];
866 u8 qcam_reg[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300867 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300868
Saeed Mahameede2816822015-05-28 22:28:40 +0300869 u8 out_of_seq_cnt[0x1];
870 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300871 u8 retransmission_q_counters[0x1];
Inbar Karmy2fcb12d2017-08-17 16:39:47 +0300872 u8 debug[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300873 u8 modify_rq_counter_set_id[0x1];
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +0300874 u8 rq_delay_drop[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300875 u8 max_qp_cnt[0xa];
876 u8 pkey_table_size[0x10];
877
Saeed Mahameede2816822015-05-28 22:28:40 +0300878 u8 vport_group_manager[0x1];
879 u8 vhca_group_manager[0x1];
880 u8 ib_virt[0x1];
881 u8 eth_virt[0x1];
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +0200882 u8 vnic_env_queue_counters[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300883 u8 ets[0x1];
884 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200885 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300886 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200887 u8 mcam_reg[0x1];
888 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300889 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200890 u8 port_module_event[0x1];
Parav Pandit58dcb602017-06-19 07:19:37 +0300891 u8 enhanced_error_q_counters[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300892 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200893 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300894 u8 disable_link_up[0x1];
895 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300896 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300897 u8 num_ports[0x8];
898
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300899 u8 reserved_at_1c0[0x1];
900 u8 pps[0x1];
901 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300902 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300903 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200904 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300905 u8 reserved_at_1d0[0x1];
906 u8 dcbx[0x1];
Maor Gottlieb246ac982017-05-30 10:29:12 +0300907 u8 general_notification_event[0x1];
908 u8 reserved_at_1d3[0x2];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200909 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200910 u8 rol_s[0x1];
911 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300912 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200913 u8 wol_s[0x1];
914 u8 wol_g[0x1];
915 u8 wol_a[0x1];
916 u8 wol_b[0x1];
917 u8 wol_m[0x1];
918 u8 wol_u[0x1];
919 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300920
921 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300922 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300923 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300924
Saeed Mahameede2816822015-05-28 22:28:40 +0300925 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300926 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300927 u8 reserved_at_202[0x1];
928 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200929 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300930 u8 reserved_at_205[0x5];
931 u8 umr_fence[0x2];
932 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300933 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300934 u8 cmdif_checksum[0x2];
935 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300936 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300937 u8 wq_signature[0x1];
938 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300939 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300940 u8 sho[0x1];
941 u8 tph[0x1];
942 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300943 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300944 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300945 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300946 u8 roce[0x1];
947 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300948 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300949
950 u8 cq_oi[0x1];
951 u8 cq_resize[0x1];
952 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300953 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300954 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300955 u8 pg[0x1];
956 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300957 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300958 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300959 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300960 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300961 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300962 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200963 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300964 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200965 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300966 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300967 u8 qkv[0x1];
968 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200969 u8 set_deth_sqpn[0x1];
970 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300971 u8 xrc[0x1];
972 u8 ud[0x1];
973 u8 uc[0x1];
974 u8 rc[0x1];
975
Eli Cohena6d51b62017-01-03 23:55:23 +0200976 u8 uar_4k[0x1];
977 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300978 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300979 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300980 u8 log_pg_sz[0x8];
981
982 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200983 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300984 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300985 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300986 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300987
988 u8 reserved_at_270[0xb];
989 u8 lag_master[0x1];
990 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300991
Tariq Toukane1c9c622016-04-11 23:10:21 +0300992 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300993 u8 max_wqe_sz_sq[0x10];
994
Tariq Toukane1c9c622016-04-11 23:10:21 +0300995 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300996 u8 max_wqe_sz_rq[0x10];
997
Rabie Louloua8ffcc72017-07-09 13:39:30 +0300998 u8 max_flow_counter_31_16[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300999 u8 max_wqe_sz_sq_dc[0x10];
1000
Tariq Toukane1c9c622016-04-11 23:10:21 +03001001 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +03001002 u8 max_qp_mcg[0x19];
1003
Tariq Toukane1c9c622016-04-11 23:10:21 +03001004 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03001005 u8 log_max_mcg[0x8];
1006
Tariq Toukane1c9c622016-04-11 23:10:21 +03001007 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001008 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001009 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001010 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001011 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +03001012 u8 log_max_xrcd[0x5];
1013
Moshe Shemesh5c298142017-12-26 16:46:29 +02001014 u8 nic_receive_steering_discard[0x1];
Moshe Shemeshaaabd072018-01-14 00:56:25 +02001015 u8 receive_discard_vport_down[0x1];
1016 u8 transmit_discard_vport_down[0x1];
1017 u8 reserved_at_343[0x5];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001018 u8 log_max_flow_counter_bulk[0x8];
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001019 u8 max_flow_counter_15_0[0x10];
Amir Vadaia351a1b02016-07-14 10:32:38 +03001020
Eli Cohenb7755162014-10-02 12:19:44 +03001021
Tariq Toukane1c9c622016-04-11 23:10:21 +03001022 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001023 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001024 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001025 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001026 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001027 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001028 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001029 u8 log_max_tis[0x5];
1030
Saeed Mahameede2816822015-05-28 22:28:40 +03001031 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001032 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001033 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001034 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001035 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001036 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001037 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001038 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001039 u8 log_max_tis_per_sq[0x5];
1040
Tariq Toukan619a8f2a2018-02-07 14:41:25 +02001041 u8 ext_stride_num_range[0x1];
1042 u8 reserved_at_3a1[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03001043 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001044 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001045 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001046 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001047 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001048 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001049 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001050
Or Gerlitz40817cd2017-06-25 12:38:45 +03001051 u8 hairpin[0x1];
1052 u8 reserved_at_3c1[0x2];
1053 u8 log_max_hairpin_queues[0x5];
1054 u8 reserved_at_3c8[0x3];
1055 u8 log_max_hairpin_wq_data_sz[0x5];
Or Gerlitz4d533e02018-01-04 12:26:21 +02001056 u8 reserved_at_3d0[0x3];
1057 u8 log_max_hairpin_num_packets[0x5];
1058 u8 reserved_at_3d8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001059 u8 log_max_wq_sz[0x5];
1060
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001061 u8 nic_vport_change_event[0x1];
Eran Ben Elisha8978cc92018-01-09 11:41:10 +02001062 u8 disable_local_lb_uc[0x1];
1063 u8 disable_local_lb_mc[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001064 u8 log_min_hairpin_wq_data_sz[0x5];
1065 u8 reserved_at_3e8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001066 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001067 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001068 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001069 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001070 u8 log_max_current_uc_list[0x5];
1071
Tariq Toukane1c9c622016-04-11 23:10:21 +03001072 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001073
Tariq Toukane1c9c622016-04-11 23:10:21 +03001074 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001075 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001076 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001077 u8 log_uar_page_sz[0x10];
1078
Tariq Toukane1c9c622016-04-11 23:10:21 +03001079 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001080 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001081 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001082
Eli Cohena6d51b62017-01-03 23:55:23 +02001083 u8 reserved_at_500[0x20];
1084 u8 num_of_uars_per_page[0x20];
1085 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001086
Guy Levi0ff8e792017-10-19 08:25:51 +03001087 u8 reserved_at_580[0x3d];
1088 u8 cqe_128_always[0x1];
1089 u8 cqe_compression_128[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001090 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001091
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001092 u8 cqe_compression_timeout[0x10];
1093 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001094
Saeed Mahameed74862162016-06-09 15:11:34 +03001095 u8 reserved_at_5e0[0x10];
1096 u8 tag_matching[0x1];
1097 u8 rndv_offload_rc[0x1];
1098 u8 rndv_offload_dc[0x1];
1099 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001100 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001101 u8 log_max_xrq[0x5];
1102
Daniel Jurgens32f69e42018-01-04 17:25:36 +02001103 u8 affiliate_nic_vport_criteria[0x8];
1104 u8 native_port_num[0x8];
1105 u8 num_vhca_ports[0x8];
1106 u8 reserved_at_618[0x6];
1107 u8 sw_owner_id[0x1];
Daniel Jurgens8737f812018-01-04 17:25:32 +02001108 u8 reserved_at_61f[0x1e1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001109};
1110
Saeed Mahameed81848732015-12-01 18:03:20 +02001111enum mlx5_flow_destination_type {
1112 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1113 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1114 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001115
Aviad Yehezkel5f418372018-02-18 13:17:17 +02001116 MLX5_FLOW_DESTINATION_TYPE_PORT = 0x99,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001117 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001118};
1119
1120struct mlx5_ifc_dest_format_struct_bits {
1121 u8 destination_type[0x8];
1122 u8 destination_id[0x18];
1123
Matan Barakb4ff3a32016-02-09 14:57:42 +02001124 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001125};
1126
Amir Vadai9dc0b282016-05-13 12:55:39 +00001127struct mlx5_ifc_flow_counter_list_bits {
Rabie Louloua8ffcc72017-07-09 13:39:30 +03001128 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001129
1130 u8 reserved_at_20[0x20];
1131};
1132
1133union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1134 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1135 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1136 u8 reserved_at_0[0x40];
1137};
1138
Saeed Mahameede2816822015-05-28 22:28:40 +03001139struct mlx5_ifc_fte_match_param_bits {
1140 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1141
1142 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1143
1144 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1145
Matan Barakb4ff3a32016-02-09 14:57:42 +02001146 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001147};
1148
1149enum {
1150 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1151 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1152 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1153 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1154 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1155};
1156
1157struct mlx5_ifc_rx_hash_field_select_bits {
1158 u8 l3_prot_type[0x1];
1159 u8 l4_prot_type[0x1];
1160 u8 selected_fields[0x1e];
1161};
1162
1163enum {
1164 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1165 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1166};
1167
1168enum {
1169 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1170 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1171};
1172
1173struct mlx5_ifc_wq_bits {
1174 u8 wq_type[0x4];
1175 u8 wq_signature[0x1];
1176 u8 end_padding_mode[0x2];
1177 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001178 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001179
1180 u8 hds_skip_first_sge[0x1];
1181 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001182 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001183 u8 page_offset[0x5];
1184 u8 lwm[0x10];
1185
Matan Barakb4ff3a32016-02-09 14:57:42 +02001186 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001187 u8 pd[0x18];
1188
Matan Barakb4ff3a32016-02-09 14:57:42 +02001189 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001190 u8 uar_page[0x18];
1191
1192 u8 dbr_addr[0x40];
1193
1194 u8 hw_counter[0x20];
1195
1196 u8 sw_counter[0x20];
1197
Matan Barakb4ff3a32016-02-09 14:57:42 +02001198 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001199 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001200 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001201 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001202 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001203 u8 log_wq_sz[0x5];
1204
Or Gerlitz4d533e02018-01-04 12:26:21 +02001205 u8 reserved_at_120[0x3];
1206 u8 log_hairpin_num_packets[0x5];
1207 u8 reserved_at_128[0x3];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001208 u8 log_hairpin_data_sz[0x5];
Or Gerlitz40817cd2017-06-25 12:38:45 +03001209
Tariq Toukan619a8f2a2018-02-07 14:41:25 +02001210 u8 reserved_at_130[0x4];
1211 u8 log_wqe_num_of_strides[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001212 u8 two_byte_shift_en[0x1];
1213 u8 reserved_at_139[0x4];
1214 u8 log_wqe_stride_size[0x3];
1215
1216 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001217
1218 struct mlx5_ifc_cmd_pas_bits pas[0];
1219};
1220
1221struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001222 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001223 u8 rq_num[0x18];
1224};
1225
1226struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001227 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001228 u8 mac_addr_47_32[0x10];
1229
1230 u8 mac_addr_31_0[0x20];
1231};
1232
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001233struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001234 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001235 u8 vlan[0x0c];
1236
Matan Barakb4ff3a32016-02-09 14:57:42 +02001237 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001238};
1239
Saeed Mahameede2816822015-05-28 22:28:40 +03001240struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001241 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001242
1243 u8 min_time_between_cnps[0x20];
1244
Matan Barakb4ff3a32016-02-09 14:57:42 +02001245 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001246 u8 cnp_dscp[0x6];
Parav Pandit4a2da0b2017-05-30 10:05:15 +03001247 u8 reserved_at_d8[0x4];
1248 u8 cnp_prio_mode[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03001249 u8 cnp_802p_prio[0x3];
1250
Matan Barakb4ff3a32016-02-09 14:57:42 +02001251 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001252};
1253
1254struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001255 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001256
Matan Barakb4ff3a32016-02-09 14:57:42 +02001257 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001258 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001259 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001260 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001261 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001262
Matan Barakb4ff3a32016-02-09 14:57:42 +02001263 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001264
1265 u8 rpg_time_reset[0x20];
1266
1267 u8 rpg_byte_reset[0x20];
1268
1269 u8 rpg_threshold[0x20];
1270
1271 u8 rpg_max_rate[0x20];
1272
1273 u8 rpg_ai_rate[0x20];
1274
1275 u8 rpg_hai_rate[0x20];
1276
1277 u8 rpg_gd[0x20];
1278
1279 u8 rpg_min_dec_fac[0x20];
1280
1281 u8 rpg_min_rate[0x20];
1282
Matan Barakb4ff3a32016-02-09 14:57:42 +02001283 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001284
1285 u8 rate_to_set_on_first_cnp[0x20];
1286
1287 u8 dce_tcp_g[0x20];
1288
1289 u8 dce_tcp_rtt[0x20];
1290
1291 u8 rate_reduce_monitor_period[0x20];
1292
Matan Barakb4ff3a32016-02-09 14:57:42 +02001293 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001294
1295 u8 initial_alpha_value[0x20];
1296
Matan Barakb4ff3a32016-02-09 14:57:42 +02001297 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001298};
1299
1300struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001301 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001302
1303 u8 rppp_max_rps[0x20];
1304
1305 u8 rpg_time_reset[0x20];
1306
1307 u8 rpg_byte_reset[0x20];
1308
1309 u8 rpg_threshold[0x20];
1310
1311 u8 rpg_max_rate[0x20];
1312
1313 u8 rpg_ai_rate[0x20];
1314
1315 u8 rpg_hai_rate[0x20];
1316
1317 u8 rpg_gd[0x20];
1318
1319 u8 rpg_min_dec_fac[0x20];
1320
1321 u8 rpg_min_rate[0x20];
1322
Matan Barakb4ff3a32016-02-09 14:57:42 +02001323 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001324};
1325
1326enum {
1327 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1328 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1329 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1330};
1331
1332struct mlx5_ifc_resize_field_select_bits {
1333 u8 resize_field_select[0x20];
1334};
1335
1336enum {
1337 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1338 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1339 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1340 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1341};
1342
1343struct mlx5_ifc_modify_field_select_bits {
1344 u8 modify_field_select[0x20];
1345};
1346
1347struct mlx5_ifc_field_select_r_roce_np_bits {
1348 u8 field_select_r_roce_np[0x20];
1349};
1350
1351struct mlx5_ifc_field_select_r_roce_rp_bits {
1352 u8 field_select_r_roce_rp[0x20];
1353};
1354
1355enum {
1356 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1357 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1358 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1359 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1360 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1361 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1362 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1363 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1364 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1365 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1366};
1367
1368struct mlx5_ifc_field_select_802_1qau_rp_bits {
1369 u8 field_select_8021qaurp[0x20];
1370};
1371
1372struct mlx5_ifc_phys_layer_cntrs_bits {
1373 u8 time_since_last_clear_high[0x20];
1374
1375 u8 time_since_last_clear_low[0x20];
1376
1377 u8 symbol_errors_high[0x20];
1378
1379 u8 symbol_errors_low[0x20];
1380
1381 u8 sync_headers_errors_high[0x20];
1382
1383 u8 sync_headers_errors_low[0x20];
1384
1385 u8 edpl_bip_errors_lane0_high[0x20];
1386
1387 u8 edpl_bip_errors_lane0_low[0x20];
1388
1389 u8 edpl_bip_errors_lane1_high[0x20];
1390
1391 u8 edpl_bip_errors_lane1_low[0x20];
1392
1393 u8 edpl_bip_errors_lane2_high[0x20];
1394
1395 u8 edpl_bip_errors_lane2_low[0x20];
1396
1397 u8 edpl_bip_errors_lane3_high[0x20];
1398
1399 u8 edpl_bip_errors_lane3_low[0x20];
1400
1401 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1402
1403 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1404
1405 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1406
1407 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1408
1409 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1410
1411 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1412
1413 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1414
1415 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1416
1417 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1418
1419 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1420
1421 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1422
1423 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1424
1425 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1426
1427 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1428
1429 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1430
1431 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1432
1433 u8 rs_fec_corrected_blocks_high[0x20];
1434
1435 u8 rs_fec_corrected_blocks_low[0x20];
1436
1437 u8 rs_fec_uncorrectable_blocks_high[0x20];
1438
1439 u8 rs_fec_uncorrectable_blocks_low[0x20];
1440
1441 u8 rs_fec_no_errors_blocks_high[0x20];
1442
1443 u8 rs_fec_no_errors_blocks_low[0x20];
1444
1445 u8 rs_fec_single_error_blocks_high[0x20];
1446
1447 u8 rs_fec_single_error_blocks_low[0x20];
1448
1449 u8 rs_fec_corrected_symbols_total_high[0x20];
1450
1451 u8 rs_fec_corrected_symbols_total_low[0x20];
1452
1453 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1454
1455 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1456
1457 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1458
1459 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1460
1461 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1462
1463 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1464
1465 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1466
1467 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1468
1469 u8 link_down_events[0x20];
1470
1471 u8 successful_recovery_events[0x20];
1472
Matan Barakb4ff3a32016-02-09 14:57:42 +02001473 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001474};
1475
Gal Pressmand8dc0502016-09-27 17:04:51 +03001476struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1477 u8 time_since_last_clear_high[0x20];
1478
1479 u8 time_since_last_clear_low[0x20];
1480
1481 u8 phy_received_bits_high[0x20];
1482
1483 u8 phy_received_bits_low[0x20];
1484
1485 u8 phy_symbol_errors_high[0x20];
1486
1487 u8 phy_symbol_errors_low[0x20];
1488
1489 u8 phy_corrected_bits_high[0x20];
1490
1491 u8 phy_corrected_bits_low[0x20];
1492
1493 u8 phy_corrected_bits_lane0_high[0x20];
1494
1495 u8 phy_corrected_bits_lane0_low[0x20];
1496
1497 u8 phy_corrected_bits_lane1_high[0x20];
1498
1499 u8 phy_corrected_bits_lane1_low[0x20];
1500
1501 u8 phy_corrected_bits_lane2_high[0x20];
1502
1503 u8 phy_corrected_bits_lane2_low[0x20];
1504
1505 u8 phy_corrected_bits_lane3_high[0x20];
1506
1507 u8 phy_corrected_bits_lane3_low[0x20];
1508
1509 u8 reserved_at_200[0x5c0];
1510};
1511
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001512struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1513 u8 symbol_error_counter[0x10];
1514
1515 u8 link_error_recovery_counter[0x8];
1516
1517 u8 link_downed_counter[0x8];
1518
1519 u8 port_rcv_errors[0x10];
1520
1521 u8 port_rcv_remote_physical_errors[0x10];
1522
1523 u8 port_rcv_switch_relay_errors[0x10];
1524
1525 u8 port_xmit_discards[0x10];
1526
1527 u8 port_xmit_constraint_errors[0x8];
1528
1529 u8 port_rcv_constraint_errors[0x8];
1530
1531 u8 reserved_at_70[0x8];
1532
1533 u8 link_overrun_errors[0x8];
1534
1535 u8 reserved_at_80[0x10];
1536
1537 u8 vl_15_dropped[0x10];
1538
Tim Wright133bea02017-05-01 17:30:08 +01001539 u8 reserved_at_a0[0x80];
1540
1541 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001542};
1543
Saeed Mahameede2816822015-05-28 22:28:40 +03001544struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1545 u8 transmit_queue_high[0x20];
1546
1547 u8 transmit_queue_low[0x20];
1548
Matan Barakb4ff3a32016-02-09 14:57:42 +02001549 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001550};
1551
1552struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1553 u8 rx_octets_high[0x20];
1554
1555 u8 rx_octets_low[0x20];
1556
Matan Barakb4ff3a32016-02-09 14:57:42 +02001557 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001558
1559 u8 rx_frames_high[0x20];
1560
1561 u8 rx_frames_low[0x20];
1562
1563 u8 tx_octets_high[0x20];
1564
1565 u8 tx_octets_low[0x20];
1566
Matan Barakb4ff3a32016-02-09 14:57:42 +02001567 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001568
1569 u8 tx_frames_high[0x20];
1570
1571 u8 tx_frames_low[0x20];
1572
1573 u8 rx_pause_high[0x20];
1574
1575 u8 rx_pause_low[0x20];
1576
1577 u8 rx_pause_duration_high[0x20];
1578
1579 u8 rx_pause_duration_low[0x20];
1580
1581 u8 tx_pause_high[0x20];
1582
1583 u8 tx_pause_low[0x20];
1584
1585 u8 tx_pause_duration_high[0x20];
1586
1587 u8 tx_pause_duration_low[0x20];
1588
1589 u8 rx_pause_transition_high[0x20];
1590
1591 u8 rx_pause_transition_low[0x20];
1592
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03001593 u8 reserved_at_3c0[0x40];
1594
1595 u8 device_stall_minor_watermark_cnt_high[0x20];
1596
1597 u8 device_stall_minor_watermark_cnt_low[0x20];
1598
1599 u8 device_stall_critical_watermark_cnt_high[0x20];
1600
1601 u8 device_stall_critical_watermark_cnt_low[0x20];
1602
1603 u8 reserved_at_480[0x340];
Saeed Mahameede2816822015-05-28 22:28:40 +03001604};
1605
1606struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1607 u8 port_transmit_wait_high[0x20];
1608
1609 u8 port_transmit_wait_low[0x20];
1610
Gal Pressman2dba0792017-06-18 14:56:45 +03001611 u8 reserved_at_40[0x100];
1612
1613 u8 rx_buffer_almost_full_high[0x20];
1614
1615 u8 rx_buffer_almost_full_low[0x20];
1616
1617 u8 rx_buffer_full_high[0x20];
1618
1619 u8 rx_buffer_full_low[0x20];
1620
1621 u8 reserved_at_1c0[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03001622};
1623
1624struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1625 u8 dot3stats_alignment_errors_high[0x20];
1626
1627 u8 dot3stats_alignment_errors_low[0x20];
1628
1629 u8 dot3stats_fcs_errors_high[0x20];
1630
1631 u8 dot3stats_fcs_errors_low[0x20];
1632
1633 u8 dot3stats_single_collision_frames_high[0x20];
1634
1635 u8 dot3stats_single_collision_frames_low[0x20];
1636
1637 u8 dot3stats_multiple_collision_frames_high[0x20];
1638
1639 u8 dot3stats_multiple_collision_frames_low[0x20];
1640
1641 u8 dot3stats_sqe_test_errors_high[0x20];
1642
1643 u8 dot3stats_sqe_test_errors_low[0x20];
1644
1645 u8 dot3stats_deferred_transmissions_high[0x20];
1646
1647 u8 dot3stats_deferred_transmissions_low[0x20];
1648
1649 u8 dot3stats_late_collisions_high[0x20];
1650
1651 u8 dot3stats_late_collisions_low[0x20];
1652
1653 u8 dot3stats_excessive_collisions_high[0x20];
1654
1655 u8 dot3stats_excessive_collisions_low[0x20];
1656
1657 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1658
1659 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1660
1661 u8 dot3stats_carrier_sense_errors_high[0x20];
1662
1663 u8 dot3stats_carrier_sense_errors_low[0x20];
1664
1665 u8 dot3stats_frame_too_longs_high[0x20];
1666
1667 u8 dot3stats_frame_too_longs_low[0x20];
1668
1669 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1670
1671 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1672
1673 u8 dot3stats_symbol_errors_high[0x20];
1674
1675 u8 dot3stats_symbol_errors_low[0x20];
1676
1677 u8 dot3control_in_unknown_opcodes_high[0x20];
1678
1679 u8 dot3control_in_unknown_opcodes_low[0x20];
1680
1681 u8 dot3in_pause_frames_high[0x20];
1682
1683 u8 dot3in_pause_frames_low[0x20];
1684
1685 u8 dot3out_pause_frames_high[0x20];
1686
1687 u8 dot3out_pause_frames_low[0x20];
1688
Matan Barakb4ff3a32016-02-09 14:57:42 +02001689 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001690};
1691
1692struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1693 u8 ether_stats_drop_events_high[0x20];
1694
1695 u8 ether_stats_drop_events_low[0x20];
1696
1697 u8 ether_stats_octets_high[0x20];
1698
1699 u8 ether_stats_octets_low[0x20];
1700
1701 u8 ether_stats_pkts_high[0x20];
1702
1703 u8 ether_stats_pkts_low[0x20];
1704
1705 u8 ether_stats_broadcast_pkts_high[0x20];
1706
1707 u8 ether_stats_broadcast_pkts_low[0x20];
1708
1709 u8 ether_stats_multicast_pkts_high[0x20];
1710
1711 u8 ether_stats_multicast_pkts_low[0x20];
1712
1713 u8 ether_stats_crc_align_errors_high[0x20];
1714
1715 u8 ether_stats_crc_align_errors_low[0x20];
1716
1717 u8 ether_stats_undersize_pkts_high[0x20];
1718
1719 u8 ether_stats_undersize_pkts_low[0x20];
1720
1721 u8 ether_stats_oversize_pkts_high[0x20];
1722
1723 u8 ether_stats_oversize_pkts_low[0x20];
1724
1725 u8 ether_stats_fragments_high[0x20];
1726
1727 u8 ether_stats_fragments_low[0x20];
1728
1729 u8 ether_stats_jabbers_high[0x20];
1730
1731 u8 ether_stats_jabbers_low[0x20];
1732
1733 u8 ether_stats_collisions_high[0x20];
1734
1735 u8 ether_stats_collisions_low[0x20];
1736
1737 u8 ether_stats_pkts64octets_high[0x20];
1738
1739 u8 ether_stats_pkts64octets_low[0x20];
1740
1741 u8 ether_stats_pkts65to127octets_high[0x20];
1742
1743 u8 ether_stats_pkts65to127octets_low[0x20];
1744
1745 u8 ether_stats_pkts128to255octets_high[0x20];
1746
1747 u8 ether_stats_pkts128to255octets_low[0x20];
1748
1749 u8 ether_stats_pkts256to511octets_high[0x20];
1750
1751 u8 ether_stats_pkts256to511octets_low[0x20];
1752
1753 u8 ether_stats_pkts512to1023octets_high[0x20];
1754
1755 u8 ether_stats_pkts512to1023octets_low[0x20];
1756
1757 u8 ether_stats_pkts1024to1518octets_high[0x20];
1758
1759 u8 ether_stats_pkts1024to1518octets_low[0x20];
1760
1761 u8 ether_stats_pkts1519to2047octets_high[0x20];
1762
1763 u8 ether_stats_pkts1519to2047octets_low[0x20];
1764
1765 u8 ether_stats_pkts2048to4095octets_high[0x20];
1766
1767 u8 ether_stats_pkts2048to4095octets_low[0x20];
1768
1769 u8 ether_stats_pkts4096to8191octets_high[0x20];
1770
1771 u8 ether_stats_pkts4096to8191octets_low[0x20];
1772
1773 u8 ether_stats_pkts8192to10239octets_high[0x20];
1774
1775 u8 ether_stats_pkts8192to10239octets_low[0x20];
1776
Matan Barakb4ff3a32016-02-09 14:57:42 +02001777 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001778};
1779
1780struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1781 u8 if_in_octets_high[0x20];
1782
1783 u8 if_in_octets_low[0x20];
1784
1785 u8 if_in_ucast_pkts_high[0x20];
1786
1787 u8 if_in_ucast_pkts_low[0x20];
1788
1789 u8 if_in_discards_high[0x20];
1790
1791 u8 if_in_discards_low[0x20];
1792
1793 u8 if_in_errors_high[0x20];
1794
1795 u8 if_in_errors_low[0x20];
1796
1797 u8 if_in_unknown_protos_high[0x20];
1798
1799 u8 if_in_unknown_protos_low[0x20];
1800
1801 u8 if_out_octets_high[0x20];
1802
1803 u8 if_out_octets_low[0x20];
1804
1805 u8 if_out_ucast_pkts_high[0x20];
1806
1807 u8 if_out_ucast_pkts_low[0x20];
1808
1809 u8 if_out_discards_high[0x20];
1810
1811 u8 if_out_discards_low[0x20];
1812
1813 u8 if_out_errors_high[0x20];
1814
1815 u8 if_out_errors_low[0x20];
1816
1817 u8 if_in_multicast_pkts_high[0x20];
1818
1819 u8 if_in_multicast_pkts_low[0x20];
1820
1821 u8 if_in_broadcast_pkts_high[0x20];
1822
1823 u8 if_in_broadcast_pkts_low[0x20];
1824
1825 u8 if_out_multicast_pkts_high[0x20];
1826
1827 u8 if_out_multicast_pkts_low[0x20];
1828
1829 u8 if_out_broadcast_pkts_high[0x20];
1830
1831 u8 if_out_broadcast_pkts_low[0x20];
1832
Matan Barakb4ff3a32016-02-09 14:57:42 +02001833 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001834};
1835
1836struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1837 u8 a_frames_transmitted_ok_high[0x20];
1838
1839 u8 a_frames_transmitted_ok_low[0x20];
1840
1841 u8 a_frames_received_ok_high[0x20];
1842
1843 u8 a_frames_received_ok_low[0x20];
1844
1845 u8 a_frame_check_sequence_errors_high[0x20];
1846
1847 u8 a_frame_check_sequence_errors_low[0x20];
1848
1849 u8 a_alignment_errors_high[0x20];
1850
1851 u8 a_alignment_errors_low[0x20];
1852
1853 u8 a_octets_transmitted_ok_high[0x20];
1854
1855 u8 a_octets_transmitted_ok_low[0x20];
1856
1857 u8 a_octets_received_ok_high[0x20];
1858
1859 u8 a_octets_received_ok_low[0x20];
1860
1861 u8 a_multicast_frames_xmitted_ok_high[0x20];
1862
1863 u8 a_multicast_frames_xmitted_ok_low[0x20];
1864
1865 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1866
1867 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1868
1869 u8 a_multicast_frames_received_ok_high[0x20];
1870
1871 u8 a_multicast_frames_received_ok_low[0x20];
1872
1873 u8 a_broadcast_frames_received_ok_high[0x20];
1874
1875 u8 a_broadcast_frames_received_ok_low[0x20];
1876
1877 u8 a_in_range_length_errors_high[0x20];
1878
1879 u8 a_in_range_length_errors_low[0x20];
1880
1881 u8 a_out_of_range_length_field_high[0x20];
1882
1883 u8 a_out_of_range_length_field_low[0x20];
1884
1885 u8 a_frame_too_long_errors_high[0x20];
1886
1887 u8 a_frame_too_long_errors_low[0x20];
1888
1889 u8 a_symbol_error_during_carrier_high[0x20];
1890
1891 u8 a_symbol_error_during_carrier_low[0x20];
1892
1893 u8 a_mac_control_frames_transmitted_high[0x20];
1894
1895 u8 a_mac_control_frames_transmitted_low[0x20];
1896
1897 u8 a_mac_control_frames_received_high[0x20];
1898
1899 u8 a_mac_control_frames_received_low[0x20];
1900
1901 u8 a_unsupported_opcodes_received_high[0x20];
1902
1903 u8 a_unsupported_opcodes_received_low[0x20];
1904
1905 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1906
1907 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1908
1909 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1910
1911 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1912
Matan Barakb4ff3a32016-02-09 14:57:42 +02001913 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001914};
1915
Gal Pressman8ed1a632016-11-17 13:46:01 +02001916struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1917 u8 life_time_counter_high[0x20];
1918
1919 u8 life_time_counter_low[0x20];
1920
1921 u8 rx_errors[0x20];
1922
1923 u8 tx_errors[0x20];
1924
1925 u8 l0_to_recovery_eieos[0x20];
1926
1927 u8 l0_to_recovery_ts[0x20];
1928
1929 u8 l0_to_recovery_framing[0x20];
1930
1931 u8 l0_to_recovery_retrain[0x20];
1932
1933 u8 crc_error_dllp[0x20];
1934
1935 u8 crc_error_tlp[0x20];
1936
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03001937 u8 tx_overflow_buffer_pkt_high[0x20];
1938
1939 u8 tx_overflow_buffer_pkt_low[0x20];
Gal Pressman5405fa22017-06-15 18:29:23 +03001940
1941 u8 outbound_stalled_reads[0x20];
1942
1943 u8 outbound_stalled_writes[0x20];
1944
1945 u8 outbound_stalled_reads_events[0x20];
1946
1947 u8 outbound_stalled_writes_events[0x20];
1948
1949 u8 reserved_at_200[0x5c0];
Gal Pressman8ed1a632016-11-17 13:46:01 +02001950};
1951
Saeed Mahameede2816822015-05-28 22:28:40 +03001952struct mlx5_ifc_cmd_inter_comp_event_bits {
1953 u8 command_completion_vector[0x20];
1954
Matan Barakb4ff3a32016-02-09 14:57:42 +02001955 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001956};
1957
1958struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001959 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001960 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001961 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001962 u8 vl[0x4];
1963
Matan Barakb4ff3a32016-02-09 14:57:42 +02001964 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001965};
1966
1967struct mlx5_ifc_db_bf_congestion_event_bits {
1968 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001969 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001970 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001971 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001972
Matan Barakb4ff3a32016-02-09 14:57:42 +02001973 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001974};
1975
1976struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001977 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001978
1979 u8 gpio_event_hi[0x20];
1980
1981 u8 gpio_event_lo[0x20];
1982
Matan Barakb4ff3a32016-02-09 14:57:42 +02001983 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001984};
1985
1986struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001987 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001988
1989 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001990 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001991
Matan Barakb4ff3a32016-02-09 14:57:42 +02001992 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001993};
1994
1995struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001996 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001997};
1998
1999enum {
2000 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
2001 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
2002};
2003
2004struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002005 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002006 u8 cqn[0x18];
2007
Matan Barakb4ff3a32016-02-09 14:57:42 +02002008 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002009
Matan Barakb4ff3a32016-02-09 14:57:42 +02002010 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002011 u8 syndrome[0x8];
2012
Matan Barakb4ff3a32016-02-09 14:57:42 +02002013 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002014};
2015
2016struct mlx5_ifc_rdma_page_fault_event_bits {
2017 u8 bytes_committed[0x20];
2018
2019 u8 r_key[0x20];
2020
Matan Barakb4ff3a32016-02-09 14:57:42 +02002021 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002022 u8 packet_len[0x10];
2023
2024 u8 rdma_op_len[0x20];
2025
2026 u8 rdma_va[0x40];
2027
Matan Barakb4ff3a32016-02-09 14:57:42 +02002028 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002029 u8 rdma[0x1];
2030 u8 write[0x1];
2031 u8 requestor[0x1];
2032 u8 qp_number[0x18];
2033};
2034
2035struct mlx5_ifc_wqe_associated_page_fault_event_bits {
2036 u8 bytes_committed[0x20];
2037
Matan Barakb4ff3a32016-02-09 14:57:42 +02002038 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002039 u8 wqe_index[0x10];
2040
Matan Barakb4ff3a32016-02-09 14:57:42 +02002041 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002042 u8 len[0x10];
2043
Matan Barakb4ff3a32016-02-09 14:57:42 +02002044 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002045
Matan Barakb4ff3a32016-02-09 14:57:42 +02002046 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002047 u8 rdma[0x1];
2048 u8 write_read[0x1];
2049 u8 requestor[0x1];
2050 u8 qpn[0x18];
2051};
2052
2053struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002054 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002055
2056 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002057 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002058
Matan Barakb4ff3a32016-02-09 14:57:42 +02002059 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002060 u8 qpn_rqn_sqn[0x18];
2061};
2062
2063struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002064 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002065
Matan Barakb4ff3a32016-02-09 14:57:42 +02002066 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002067 u8 dct_number[0x18];
2068};
2069
2070struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002071 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002072
Matan Barakb4ff3a32016-02-09 14:57:42 +02002073 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002074 u8 cq_number[0x18];
2075};
2076
2077enum {
2078 MLX5_QPC_STATE_RST = 0x0,
2079 MLX5_QPC_STATE_INIT = 0x1,
2080 MLX5_QPC_STATE_RTR = 0x2,
2081 MLX5_QPC_STATE_RTS = 0x3,
2082 MLX5_QPC_STATE_SQER = 0x4,
2083 MLX5_QPC_STATE_ERR = 0x6,
2084 MLX5_QPC_STATE_SQD = 0x7,
2085 MLX5_QPC_STATE_SUSPENDED = 0x9,
2086};
2087
2088enum {
2089 MLX5_QPC_ST_RC = 0x0,
2090 MLX5_QPC_ST_UC = 0x1,
2091 MLX5_QPC_ST_UD = 0x2,
2092 MLX5_QPC_ST_XRC = 0x3,
2093 MLX5_QPC_ST_DCI = 0x5,
2094 MLX5_QPC_ST_QP0 = 0x7,
2095 MLX5_QPC_ST_QP1 = 0x8,
2096 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2097 MLX5_QPC_ST_REG_UMR = 0xc,
2098};
2099
2100enum {
2101 MLX5_QPC_PM_STATE_ARMED = 0x0,
2102 MLX5_QPC_PM_STATE_REARM = 0x1,
2103 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2104 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2105};
2106
2107enum {
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002108 MLX5_QPC_OFFLOAD_TYPE_RNDV = 0x1,
2109};
2110
2111enum {
Saeed Mahameede2816822015-05-28 22:28:40 +03002112 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2113 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2114};
2115
2116enum {
2117 MLX5_QPC_MTU_256_BYTES = 0x1,
2118 MLX5_QPC_MTU_512_BYTES = 0x2,
2119 MLX5_QPC_MTU_1K_BYTES = 0x3,
2120 MLX5_QPC_MTU_2K_BYTES = 0x4,
2121 MLX5_QPC_MTU_4K_BYTES = 0x5,
2122 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2123};
2124
2125enum {
2126 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2127 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2128 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2129 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2130 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2131 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2132 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2133 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2134};
2135
2136enum {
2137 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2138 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2139 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2140};
2141
2142enum {
2143 MLX5_QPC_CS_RES_DISABLE = 0x0,
2144 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2145 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2146};
2147
2148struct mlx5_ifc_qpc_bits {
2149 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002150 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002151 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002152 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002153 u8 pm_state[0x2];
Artemy Kovalyov6e446362017-08-15 11:59:02 +03002154 u8 reserved_at_15[0x3];
2155 u8 offload_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002156 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002157 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002158
2159 u8 wq_signature[0x1];
2160 u8 block_lb_mc[0x1];
2161 u8 atomic_like_write_en[0x1];
2162 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002163 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002164 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002165 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002166 u8 pd[0x18];
2167
2168 u8 mtu[0x3];
2169 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002170 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002171 u8 log_rq_size[0x4];
2172 u8 log_rq_stride[0x3];
2173 u8 no_sq[0x1];
2174 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002175 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002176 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002177 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002178
2179 u8 counter_set_id[0x8];
2180 u8 uar_page[0x18];
2181
Matan Barakb4ff3a32016-02-09 14:57:42 +02002182 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002183 u8 user_index[0x18];
2184
Matan Barakb4ff3a32016-02-09 14:57:42 +02002185 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002186 u8 log_page_size[0x5];
2187 u8 remote_qpn[0x18];
2188
2189 struct mlx5_ifc_ads_bits primary_address_path;
2190
2191 struct mlx5_ifc_ads_bits secondary_address_path;
2192
2193 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002194 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002195 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002196 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002197 u8 retry_count[0x3];
2198 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002199 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002200 u8 fre[0x1];
2201 u8 cur_rnr_retry[0x3];
2202 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002203 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002204
Matan Barakb4ff3a32016-02-09 14:57:42 +02002205 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002206
Matan Barakb4ff3a32016-02-09 14:57:42 +02002207 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002208 u8 next_send_psn[0x18];
2209
Matan Barakb4ff3a32016-02-09 14:57:42 +02002210 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002211 u8 cqn_snd[0x18];
2212
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002213 u8 reserved_at_400[0x8];
2214 u8 deth_sqpn[0x18];
2215
2216 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002217
Matan Barakb4ff3a32016-02-09 14:57:42 +02002218 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002219 u8 last_acked_psn[0x18];
2220
Matan Barakb4ff3a32016-02-09 14:57:42 +02002221 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002222 u8 ssn[0x18];
2223
Matan Barakb4ff3a32016-02-09 14:57:42 +02002224 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002225 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002226 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002227 u8 atomic_mode[0x4];
2228 u8 rre[0x1];
2229 u8 rwe[0x1];
2230 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002231 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002232 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002233 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002234 u8 cd_slave_receive[0x1];
2235 u8 cd_slave_send[0x1];
2236 u8 cd_master[0x1];
2237
Matan Barakb4ff3a32016-02-09 14:57:42 +02002238 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002239 u8 min_rnr_nak[0x5];
2240 u8 next_rcv_psn[0x18];
2241
Matan Barakb4ff3a32016-02-09 14:57:42 +02002242 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002243 u8 xrcd[0x18];
2244
Matan Barakb4ff3a32016-02-09 14:57:42 +02002245 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002246 u8 cqn_rcv[0x18];
2247
2248 u8 dbr_addr[0x40];
2249
2250 u8 q_key[0x20];
2251
Matan Barakb4ff3a32016-02-09 14:57:42 +02002252 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002253 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002254 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002255
Matan Barakb4ff3a32016-02-09 14:57:42 +02002256 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002257 u8 rmsn[0x18];
2258
2259 u8 hw_sq_wqebb_counter[0x10];
2260 u8 sw_sq_wqebb_counter[0x10];
2261
2262 u8 hw_rq_counter[0x20];
2263
2264 u8 sw_rq_counter[0x20];
2265
Matan Barakb4ff3a32016-02-09 14:57:42 +02002266 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002267
Matan Barakb4ff3a32016-02-09 14:57:42 +02002268 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002269 u8 cgs[0x1];
2270 u8 cs_req[0x8];
2271 u8 cs_res[0x8];
2272
2273 u8 dc_access_key[0x40];
2274
Matan Barakb4ff3a32016-02-09 14:57:42 +02002275 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002276};
2277
2278struct mlx5_ifc_roce_addr_layout_bits {
2279 u8 source_l3_address[16][0x8];
2280
Matan Barakb4ff3a32016-02-09 14:57:42 +02002281 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002282 u8 vlan_valid[0x1];
2283 u8 vlan_id[0xc];
2284 u8 source_mac_47_32[0x10];
2285
2286 u8 source_mac_31_0[0x20];
2287
Matan Barakb4ff3a32016-02-09 14:57:42 +02002288 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002289 u8 roce_l3_type[0x4];
2290 u8 roce_version[0x8];
2291
Matan Barakb4ff3a32016-02-09 14:57:42 +02002292 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002293};
2294
2295union mlx5_ifc_hca_cap_union_bits {
2296 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2297 struct mlx5_ifc_odp_cap_bits odp_cap;
2298 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2299 struct mlx5_ifc_roce_cap_bits roce_cap;
2300 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2301 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002302 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002303 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002304 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002305 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002306 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002307 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002308};
2309
2310enum {
2311 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2312 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2313 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002314 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002315 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2316 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002317 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Or Gerlitz0c068972018-01-28 20:14:20 +02002318 MLX5_FLOW_CONTEXT_ACTION_VLAN_POP = 0x80,
2319 MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH = 0x100,
2320};
2321
2322struct mlx5_ifc_vlan_bits {
2323 u8 ethtype[0x10];
2324 u8 prio[0x3];
2325 u8 cfi[0x1];
2326 u8 vid[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002327};
2328
2329struct mlx5_ifc_flow_context_bits {
Or Gerlitz0c068972018-01-28 20:14:20 +02002330 struct mlx5_ifc_vlan_bits push_vlan;
Saeed Mahameede2816822015-05-28 22:28:40 +03002331
2332 u8 group_id[0x20];
2333
Matan Barakb4ff3a32016-02-09 14:57:42 +02002334 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002335 u8 flow_tag[0x18];
2336
Matan Barakb4ff3a32016-02-09 14:57:42 +02002337 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002338 u8 action[0x10];
2339
Matan Barakb4ff3a32016-02-09 14:57:42 +02002340 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002341 u8 destination_list_size[0x18];
2342
Amir Vadai9dc0b282016-05-13 12:55:39 +00002343 u8 reserved_at_a0[0x8];
2344 u8 flow_counter_list_size[0x18];
2345
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002346 u8 encap_id[0x20];
2347
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002348 u8 modify_header_id[0x20];
2349
2350 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002351
2352 struct mlx5_ifc_fte_match_param_bits match_value;
2353
Matan Barakb4ff3a32016-02-09 14:57:42 +02002354 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002355
Amir Vadai9dc0b282016-05-13 12:55:39 +00002356 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002357};
2358
2359enum {
2360 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2361 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2362};
2363
2364struct mlx5_ifc_xrc_srqc_bits {
2365 u8 state[0x4];
2366 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002367 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002368
2369 u8 wq_signature[0x1];
2370 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002371 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002372 u8 rlky[0x1];
2373 u8 basic_cyclic_rcv_wqe[0x1];
2374 u8 log_rq_stride[0x3];
2375 u8 xrcd[0x18];
2376
2377 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002378 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002379 u8 cqn[0x18];
2380
Matan Barakb4ff3a32016-02-09 14:57:42 +02002381 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002382
2383 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002384 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002385 u8 log_page_size[0x6];
2386 u8 user_index[0x18];
2387
Matan Barakb4ff3a32016-02-09 14:57:42 +02002388 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002389
Matan Barakb4ff3a32016-02-09 14:57:42 +02002390 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002391 u8 pd[0x18];
2392
2393 u8 lwm[0x10];
2394 u8 wqe_cnt[0x10];
2395
Matan Barakb4ff3a32016-02-09 14:57:42 +02002396 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002397
2398 u8 db_record_addr_h[0x20];
2399
2400 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002401 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002402
Matan Barakb4ff3a32016-02-09 14:57:42 +02002403 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002404};
2405
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +02002406struct mlx5_ifc_vnic_diagnostic_statistics_bits {
2407 u8 counter_error_queues[0x20];
2408
2409 u8 total_error_queues[0x20];
2410
2411 u8 send_queue_priority_update_flow[0x20];
2412
2413 u8 reserved_at_60[0x20];
2414
2415 u8 nic_receive_steering_discard[0x40];
2416
2417 u8 receive_discard_vport_down[0x40];
2418
2419 u8 transmit_discard_vport_down[0x40];
2420
2421 u8 reserved_at_140[0xec0];
2422};
2423
Saeed Mahameede2816822015-05-28 22:28:40 +03002424struct mlx5_ifc_traffic_counter_bits {
2425 u8 packets[0x40];
2426
2427 u8 octets[0x40];
2428};
2429
2430struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002431 u8 strict_lag_tx_port_affinity[0x1];
2432 u8 reserved_at_1[0x3];
2433 u8 lag_tx_port_affinity[0x04];
2434
2435 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002436 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002437 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002438
Matan Barakb4ff3a32016-02-09 14:57:42 +02002439 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002440
Matan Barakb4ff3a32016-02-09 14:57:42 +02002441 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002442 u8 transport_domain[0x18];
2443
Erez Shitrit500a3d02017-04-13 06:36:51 +03002444 u8 reserved_at_140[0x8];
2445 u8 underlay_qpn[0x18];
2446 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002447};
2448
2449enum {
2450 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2451 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2452};
2453
2454enum {
2455 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2456 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2457};
2458
2459enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002460 MLX5_RX_HASH_FN_NONE = 0x0,
2461 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2462 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002463};
2464
2465enum {
2466 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2467 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2468};
2469
2470struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002471 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002472
2473 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002474 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002475
Matan Barakb4ff3a32016-02-09 14:57:42 +02002476 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002477
Matan Barakb4ff3a32016-02-09 14:57:42 +02002478 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002479 u8 lro_timeout_period_usecs[0x10];
2480 u8 lro_enable_mask[0x4];
2481 u8 lro_max_ip_payload_size[0x8];
2482
Matan Barakb4ff3a32016-02-09 14:57:42 +02002483 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002484
Matan Barakb4ff3a32016-02-09 14:57:42 +02002485 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002486 u8 inline_rqn[0x18];
2487
2488 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002489 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002490 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002491 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002492 u8 indirect_table[0x18];
2493
2494 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002495 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002496 u8 self_lb_block[0x2];
2497 u8 transport_domain[0x18];
2498
2499 u8 rx_hash_toeplitz_key[10][0x20];
2500
2501 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2502
2503 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2504
Matan Barakb4ff3a32016-02-09 14:57:42 +02002505 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002506};
2507
2508enum {
2509 MLX5_SRQC_STATE_GOOD = 0x0,
2510 MLX5_SRQC_STATE_ERROR = 0x1,
2511};
2512
2513struct mlx5_ifc_srqc_bits {
2514 u8 state[0x4];
2515 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002516 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002517
2518 u8 wq_signature[0x1];
2519 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002520 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002521 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002522 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002523 u8 log_rq_stride[0x3];
2524 u8 xrcd[0x18];
2525
2526 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002527 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002528 u8 cqn[0x18];
2529
Matan Barakb4ff3a32016-02-09 14:57:42 +02002530 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002531
Matan Barakb4ff3a32016-02-09 14:57:42 +02002532 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002533 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002534 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002535
Matan Barakb4ff3a32016-02-09 14:57:42 +02002536 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002537
Matan Barakb4ff3a32016-02-09 14:57:42 +02002538 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002539 u8 pd[0x18];
2540
2541 u8 lwm[0x10];
2542 u8 wqe_cnt[0x10];
2543
Matan Barakb4ff3a32016-02-09 14:57:42 +02002544 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002545
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002546 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002547
Matan Barakb4ff3a32016-02-09 14:57:42 +02002548 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002549};
2550
2551enum {
2552 MLX5_SQC_STATE_RST = 0x0,
2553 MLX5_SQC_STATE_RDY = 0x1,
2554 MLX5_SQC_STATE_ERR = 0x3,
2555};
2556
2557struct mlx5_ifc_sqc_bits {
2558 u8 rlky[0x1];
2559 u8 cd_master[0x1];
2560 u8 fre[0x1];
2561 u8 flush_in_error_en[0x1];
Bodong Wang795b6092017-08-17 15:52:34 +03002562 u8 allow_multi_pkt_send_wqe[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002563 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002564 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002565 u8 reg_umr[0x1];
Ilan Tayari547eede2017-04-18 16:04:28 +03002566 u8 allow_swp[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002567 u8 hairpin[0x1];
2568 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002569
Matan Barakb4ff3a32016-02-09 14:57:42 +02002570 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002571 u8 user_index[0x18];
2572
Matan Barakb4ff3a32016-02-09 14:57:42 +02002573 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002574 u8 cqn[0x18];
2575
Or Gerlitz40817cd2017-06-25 12:38:45 +03002576 u8 reserved_at_60[0x8];
2577 u8 hairpin_peer_rq[0x18];
2578
2579 u8 reserved_at_80[0x10];
2580 u8 hairpin_peer_vhca[0x10];
2581
2582 u8 reserved_at_a0[0x50];
Saeed Mahameede2816822015-05-28 22:28:40 +03002583
Saeed Mahameed74862162016-06-09 15:11:34 +03002584 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002585 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002586 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002587
Matan Barakb4ff3a32016-02-09 14:57:42 +02002588 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002589
Matan Barakb4ff3a32016-02-09 14:57:42 +02002590 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002591 u8 tis_num_0[0x18];
2592
2593 struct mlx5_ifc_wq_bits wq;
2594};
2595
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002596enum {
2597 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2598 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2599 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2600 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2601};
2602
2603struct mlx5_ifc_scheduling_context_bits {
2604 u8 element_type[0x8];
2605 u8 reserved_at_8[0x18];
2606
2607 u8 element_attributes[0x20];
2608
2609 u8 parent_element_id[0x20];
2610
2611 u8 reserved_at_60[0x40];
2612
2613 u8 bw_share[0x20];
2614
2615 u8 max_average_bw[0x20];
2616
2617 u8 reserved_at_e0[0x120];
2618};
2619
Saeed Mahameede2816822015-05-28 22:28:40 +03002620struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002621 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002622
Matan Barakb4ff3a32016-02-09 14:57:42 +02002623 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002624 u8 rqt_max_size[0x10];
2625
Matan Barakb4ff3a32016-02-09 14:57:42 +02002626 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002627 u8 rqt_actual_size[0x10];
2628
Matan Barakb4ff3a32016-02-09 14:57:42 +02002629 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002630
2631 struct mlx5_ifc_rq_num_bits rq_num[0];
2632};
2633
2634enum {
2635 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2636 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2637};
2638
2639enum {
2640 MLX5_RQC_STATE_RST = 0x0,
2641 MLX5_RQC_STATE_RDY = 0x1,
2642 MLX5_RQC_STATE_ERR = 0x3,
2643};
2644
2645struct mlx5_ifc_rqc_bits {
2646 u8 rlky[0x1];
Maor Gottlieb03404e82017-05-30 10:29:13 +03002647 u8 delay_drop_en[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002648 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002649 u8 vsd[0x1];
2650 u8 mem_rq_type[0x4];
2651 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002652 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002653 u8 flush_in_error_en[0x1];
Or Gerlitz40817cd2017-06-25 12:38:45 +03002654 u8 hairpin[0x1];
2655 u8 reserved_at_f[0x11];
Saeed Mahameede2816822015-05-28 22:28:40 +03002656
Matan Barakb4ff3a32016-02-09 14:57:42 +02002657 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002658 u8 user_index[0x18];
2659
Matan Barakb4ff3a32016-02-09 14:57:42 +02002660 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002661 u8 cqn[0x18];
2662
2663 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002664 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002665
Matan Barakb4ff3a32016-02-09 14:57:42 +02002666 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002667 u8 rmpn[0x18];
2668
Or Gerlitz40817cd2017-06-25 12:38:45 +03002669 u8 reserved_at_a0[0x8];
2670 u8 hairpin_peer_sq[0x18];
2671
2672 u8 reserved_at_c0[0x10];
2673 u8 hairpin_peer_vhca[0x10];
2674
2675 u8 reserved_at_e0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002676
2677 struct mlx5_ifc_wq_bits wq;
2678};
2679
2680enum {
2681 MLX5_RMPC_STATE_RDY = 0x1,
2682 MLX5_RMPC_STATE_ERR = 0x3,
2683};
2684
2685struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002686 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002687 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002688 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002689
2690 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002691 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002692
Matan Barakb4ff3a32016-02-09 14:57:42 +02002693 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002694
2695 struct mlx5_ifc_wq_bits wq;
2696};
2697
Saeed Mahameede2816822015-05-28 22:28:40 +03002698struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002699 u8 reserved_at_0[0x5];
2700 u8 min_wqe_inline_mode[0x3];
Huy Nguyenbded7472017-05-30 09:42:53 +03002701 u8 reserved_at_8[0x15];
2702 u8 disable_mc_local_lb[0x1];
2703 u8 disable_uc_local_lb[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002704 u8 roce_en[0x1];
2705
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002706 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002707 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002708 u8 event_on_mtu[0x1];
2709 u8 event_on_promisc_change[0x1];
2710 u8 event_on_vlan_change[0x1];
2711 u8 event_on_mc_address_change[0x1];
2712 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002713
Daniel Jurgens32f69e42018-01-04 17:25:36 +02002714 u8 reserved_at_40[0xc];
2715
2716 u8 affiliation_criteria[0x4];
2717 u8 affiliated_vhca_id[0x10];
2718
2719 u8 reserved_at_60[0xd0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002720
2721 u8 mtu[0x10];
2722
Achiad Shochat9efa7522015-12-23 18:47:20 +02002723 u8 system_image_guid[0x40];
2724 u8 port_guid[0x40];
2725 u8 node_guid[0x40];
2726
Matan Barakb4ff3a32016-02-09 14:57:42 +02002727 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002728 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002729 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002730
2731 u8 promisc_uc[0x1];
2732 u8 promisc_mc[0x1];
2733 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002734 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002735 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002736 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002737 u8 allowed_list_size[0xc];
2738
2739 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2740
Matan Barakb4ff3a32016-02-09 14:57:42 +02002741 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002742
2743 u8 current_uc_mac_address[0][0x40];
2744};
2745
2746enum {
2747 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2748 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2749 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002750 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002751};
2752
2753struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002754 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002755 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002756 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002757 u8 small_fence_on_rdma_read_response[0x1];
2758 u8 umr_en[0x1];
2759 u8 a[0x1];
2760 u8 rw[0x1];
2761 u8 rr[0x1];
2762 u8 lw[0x1];
2763 u8 lr[0x1];
2764 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002765 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002766
2767 u8 qpn[0x18];
2768 u8 mkey_7_0[0x8];
2769
Matan Barakb4ff3a32016-02-09 14:57:42 +02002770 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002771
2772 u8 length64[0x1];
2773 u8 bsf_en[0x1];
2774 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002775 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002776 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002777 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002778 u8 en_rinval[0x1];
2779 u8 pd[0x18];
2780
2781 u8 start_addr[0x40];
2782
2783 u8 len[0x40];
2784
2785 u8 bsf_octword_size[0x20];
2786
Matan Barakb4ff3a32016-02-09 14:57:42 +02002787 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002788
2789 u8 translations_octword_size[0x20];
2790
Matan Barakb4ff3a32016-02-09 14:57:42 +02002791 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002792 u8 log_page_size[0x5];
2793
Matan Barakb4ff3a32016-02-09 14:57:42 +02002794 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002795};
2796
2797struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002798 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002799 u8 pkey[0x10];
2800};
2801
2802struct mlx5_ifc_array128_auto_bits {
2803 u8 array128_auto[16][0x8];
2804};
2805
2806struct mlx5_ifc_hca_vport_context_bits {
2807 u8 field_select[0x20];
2808
Matan Barakb4ff3a32016-02-09 14:57:42 +02002809 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002810
2811 u8 sm_virt_aware[0x1];
2812 u8 has_smi[0x1];
2813 u8 has_raw[0x1];
2814 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002815 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002816 u8 port_physical_state[0x4];
2817 u8 vport_state_policy[0x4];
2818 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002819 u8 vport_state[0x4];
2820
Matan Barakb4ff3a32016-02-09 14:57:42 +02002821 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002822
2823 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002824
2825 u8 port_guid[0x40];
2826
2827 u8 node_guid[0x40];
2828
2829 u8 cap_mask1[0x20];
2830
2831 u8 cap_mask1_field_select[0x20];
2832
2833 u8 cap_mask2[0x20];
2834
2835 u8 cap_mask2_field_select[0x20];
2836
Matan Barakb4ff3a32016-02-09 14:57:42 +02002837 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002838
2839 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002840 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002841 u8 init_type_reply[0x4];
2842 u8 lmc[0x3];
2843 u8 subnet_timeout[0x5];
2844
2845 u8 sm_lid[0x10];
2846 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002847 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002848
2849 u8 qkey_violation_counter[0x10];
2850 u8 pkey_violation_counter[0x10];
2851
Matan Barakb4ff3a32016-02-09 14:57:42 +02002852 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002853};
2854
Saeed Mahameedd6666752015-12-01 18:03:22 +02002855struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002856 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002857 u8 vport_svlan_strip[0x1];
2858 u8 vport_cvlan_strip[0x1];
2859 u8 vport_svlan_insert[0x1];
2860 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002861 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002862
Matan Barakb4ff3a32016-02-09 14:57:42 +02002863 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002864
2865 u8 svlan_cfi[0x1];
2866 u8 svlan_pcp[0x3];
2867 u8 svlan_id[0xc];
2868 u8 cvlan_cfi[0x1];
2869 u8 cvlan_pcp[0x3];
2870 u8 cvlan_id[0xc];
2871
Matan Barakb4ff3a32016-02-09 14:57:42 +02002872 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002873};
2874
Saeed Mahameede2816822015-05-28 22:28:40 +03002875enum {
2876 MLX5_EQC_STATUS_OK = 0x0,
2877 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2878};
2879
2880enum {
2881 MLX5_EQC_ST_ARMED = 0x9,
2882 MLX5_EQC_ST_FIRED = 0xa,
2883};
2884
2885struct mlx5_ifc_eqc_bits {
2886 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002887 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002888 u8 ec[0x1];
2889 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002890 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002891 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002892 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002893
Matan Barakb4ff3a32016-02-09 14:57:42 +02002894 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002895
Matan Barakb4ff3a32016-02-09 14:57:42 +02002896 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002897 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002898 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002899
Matan Barakb4ff3a32016-02-09 14:57:42 +02002900 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002901 u8 log_eq_size[0x5];
2902 u8 uar_page[0x18];
2903
Matan Barakb4ff3a32016-02-09 14:57:42 +02002904 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002905
Matan Barakb4ff3a32016-02-09 14:57:42 +02002906 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002907 u8 intr[0x8];
2908
Matan Barakb4ff3a32016-02-09 14:57:42 +02002909 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002910 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002911 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002912
Matan Barakb4ff3a32016-02-09 14:57:42 +02002913 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002914
Matan Barakb4ff3a32016-02-09 14:57:42 +02002915 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002916 u8 consumer_counter[0x18];
2917
Matan Barakb4ff3a32016-02-09 14:57:42 +02002918 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002919 u8 producer_counter[0x18];
2920
Matan Barakb4ff3a32016-02-09 14:57:42 +02002921 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002922};
2923
2924enum {
2925 MLX5_DCTC_STATE_ACTIVE = 0x0,
2926 MLX5_DCTC_STATE_DRAINING = 0x1,
2927 MLX5_DCTC_STATE_DRAINED = 0x2,
2928};
2929
2930enum {
2931 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2932 MLX5_DCTC_CS_RES_NA = 0x1,
2933 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2934};
2935
2936enum {
2937 MLX5_DCTC_MTU_256_BYTES = 0x1,
2938 MLX5_DCTC_MTU_512_BYTES = 0x2,
2939 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2940 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2941 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2942};
2943
2944struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002945 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002946 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002947 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002948
Matan Barakb4ff3a32016-02-09 14:57:42 +02002949 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002950 u8 user_index[0x18];
2951
Matan Barakb4ff3a32016-02-09 14:57:42 +02002952 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002953 u8 cqn[0x18];
2954
2955 u8 counter_set_id[0x8];
2956 u8 atomic_mode[0x4];
2957 u8 rre[0x1];
2958 u8 rwe[0x1];
2959 u8 rae[0x1];
2960 u8 atomic_like_write_en[0x1];
2961 u8 latency_sensitive[0x1];
2962 u8 rlky[0x1];
2963 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002964 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002965
Matan Barakb4ff3a32016-02-09 14:57:42 +02002966 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002967 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002968 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002969 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002970 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002971
Matan Barakb4ff3a32016-02-09 14:57:42 +02002972 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002973 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002974
Matan Barakb4ff3a32016-02-09 14:57:42 +02002975 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002976 u8 pd[0x18];
2977
2978 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002979 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002980 u8 flow_label[0x14];
2981
2982 u8 dc_access_key[0x40];
2983
Matan Barakb4ff3a32016-02-09 14:57:42 +02002984 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002985 u8 mtu[0x3];
2986 u8 port[0x8];
2987 u8 pkey_index[0x10];
2988
Matan Barakb4ff3a32016-02-09 14:57:42 +02002989 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002990 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002991 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002992 u8 hop_limit[0x8];
2993
2994 u8 dc_access_key_violation_count[0x20];
2995
Matan Barakb4ff3a32016-02-09 14:57:42 +02002996 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002997 u8 dei_cfi[0x1];
2998 u8 eth_prio[0x3];
2999 u8 ecn[0x2];
3000 u8 dscp[0x6];
3001
Matan Barakb4ff3a32016-02-09 14:57:42 +02003002 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003003};
3004
3005enum {
3006 MLX5_CQC_STATUS_OK = 0x0,
3007 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
3008 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
3009};
3010
3011enum {
3012 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
3013 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
3014};
3015
3016enum {
3017 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
3018 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
3019 MLX5_CQC_ST_FIRED = 0xa,
3020};
3021
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003022enum {
3023 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
3024 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03003025 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003026};
3027
Saeed Mahameede2816822015-05-28 22:28:40 +03003028struct mlx5_ifc_cqc_bits {
3029 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003030 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003031 u8 cqe_sz[0x3];
3032 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003033 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003034 u8 scqe_break_moderation_en[0x1];
3035 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003036 u8 cq_period_mode[0x2];
3037 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003038 u8 mini_cqe_res_format[0x2];
3039 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003040 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003041
Matan Barakb4ff3a32016-02-09 14:57:42 +02003042 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003043
Matan Barakb4ff3a32016-02-09 14:57:42 +02003044 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03003045 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003046 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003047
Matan Barakb4ff3a32016-02-09 14:57:42 +02003048 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003049 u8 log_cq_size[0x5];
3050 u8 uar_page[0x18];
3051
Matan Barakb4ff3a32016-02-09 14:57:42 +02003052 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003053 u8 cq_period[0xc];
3054 u8 cq_max_count[0x10];
3055
Matan Barakb4ff3a32016-02-09 14:57:42 +02003056 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003057 u8 c_eqn[0x8];
3058
Matan Barakb4ff3a32016-02-09 14:57:42 +02003059 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03003060 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003061 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003062
Matan Barakb4ff3a32016-02-09 14:57:42 +02003063 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003064
Matan Barakb4ff3a32016-02-09 14:57:42 +02003065 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003066 u8 last_notified_index[0x18];
3067
Matan Barakb4ff3a32016-02-09 14:57:42 +02003068 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003069 u8 last_solicit_index[0x18];
3070
Matan Barakb4ff3a32016-02-09 14:57:42 +02003071 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003072 u8 consumer_counter[0x18];
3073
Matan Barakb4ff3a32016-02-09 14:57:42 +02003074 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003075 u8 producer_counter[0x18];
3076
Matan Barakb4ff3a32016-02-09 14:57:42 +02003077 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003078
3079 u8 dbr_addr[0x40];
3080};
3081
3082union mlx5_ifc_cong_control_roce_ecn_auto_bits {
3083 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
3084 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
3085 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003086 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03003087};
3088
3089struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003090 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003091
Matan Barakb4ff3a32016-02-09 14:57:42 +02003092 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03003093 u8 ieee_vendor_id[0x18];
3094
Matan Barakb4ff3a32016-02-09 14:57:42 +02003095 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003096 u8 vsd_vendor_id[0x10];
3097
3098 u8 vsd[208][0x8];
3099
3100 u8 vsd_contd_psid[16][0x8];
3101};
3102
Saeed Mahameed74862162016-06-09 15:11:34 +03003103enum {
3104 MLX5_XRQC_STATE_GOOD = 0x0,
3105 MLX5_XRQC_STATE_ERROR = 0x1,
3106};
3107
3108enum {
3109 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
3110 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
3111};
3112
3113enum {
3114 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
3115};
3116
3117struct mlx5_ifc_tag_matching_topology_context_bits {
3118 u8 log_matching_list_sz[0x4];
3119 u8 reserved_at_4[0xc];
3120 u8 append_next_index[0x10];
3121
3122 u8 sw_phase_cnt[0x10];
3123 u8 hw_phase_cnt[0x10];
3124
3125 u8 reserved_at_40[0x40];
3126};
3127
3128struct mlx5_ifc_xrqc_bits {
3129 u8 state[0x4];
3130 u8 rlkey[0x1];
3131 u8 reserved_at_5[0xf];
3132 u8 topology[0x4];
3133 u8 reserved_at_18[0x4];
3134 u8 offload[0x4];
3135
3136 u8 reserved_at_20[0x8];
3137 u8 user_index[0x18];
3138
3139 u8 reserved_at_40[0x8];
3140 u8 cqn[0x18];
3141
3142 u8 reserved_at_60[0xa0];
3143
3144 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
3145
Artemy Kovalyov6e446362017-08-15 11:59:02 +03003146 u8 reserved_at_180[0x280];
Saeed Mahameed74862162016-06-09 15:11:34 +03003147
3148 struct mlx5_ifc_wq_bits wq;
3149};
3150
Saeed Mahameede2816822015-05-28 22:28:40 +03003151union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3152 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3153 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003154 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003155};
3156
3157union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3158 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3159 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3160 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003161 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003162};
3163
3164union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3165 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3166 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3167 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3168 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3169 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3170 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3171 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003172 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003173 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003174 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003175 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003176};
3177
Gal Pressman8ed1a632016-11-17 13:46:01 +02003178union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3179 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3180 u8 reserved_at_0[0x7c0];
3181};
3182
Saeed Mahameede2816822015-05-28 22:28:40 +03003183union mlx5_ifc_event_auto_bits {
3184 struct mlx5_ifc_comp_event_bits comp_event;
3185 struct mlx5_ifc_dct_events_bits dct_events;
3186 struct mlx5_ifc_qp_events_bits qp_events;
3187 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3188 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3189 struct mlx5_ifc_cq_error_bits cq_error;
3190 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3191 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3192 struct mlx5_ifc_gpio_event_bits gpio_event;
3193 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3194 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3195 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003196 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003197};
3198
3199struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003200 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003201
3202 u8 assert_existptr[0x20];
3203
3204 u8 assert_callra[0x20];
3205
Matan Barakb4ff3a32016-02-09 14:57:42 +02003206 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003207
3208 u8 fw_version[0x20];
3209
3210 u8 hw_id[0x20];
3211
Matan Barakb4ff3a32016-02-09 14:57:42 +02003212 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003213
3214 u8 irisc_index[0x8];
3215 u8 synd[0x8];
3216 u8 ext_synd[0x10];
3217};
3218
3219struct mlx5_ifc_register_loopback_control_bits {
3220 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003221 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003222 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003223 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003224
Matan Barakb4ff3a32016-02-09 14:57:42 +02003225 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003226};
3227
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003228struct mlx5_ifc_vport_tc_element_bits {
3229 u8 traffic_class[0x4];
3230 u8 reserved_at_4[0xc];
3231 u8 vport_number[0x10];
3232};
3233
3234struct mlx5_ifc_vport_element_bits {
3235 u8 reserved_at_0[0x10];
3236 u8 vport_number[0x10];
3237};
3238
3239enum {
3240 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3241 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3242 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3243};
3244
3245struct mlx5_ifc_tsar_element_bits {
3246 u8 reserved_at_0[0x8];
3247 u8 tsar_type[0x8];
3248 u8 reserved_at_10[0x10];
3249};
3250
Majd Dibbiny8812c242017-02-09 14:20:12 +02003251enum {
3252 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3253 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3254};
3255
Saeed Mahameede2816822015-05-28 22:28:40 +03003256struct mlx5_ifc_teardown_hca_out_bits {
3257 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003258 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003259
3260 u8 syndrome[0x20];
3261
Majd Dibbiny8812c242017-02-09 14:20:12 +02003262 u8 reserved_at_40[0x3f];
3263
3264 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003265};
3266
3267enum {
3268 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003269 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003270};
3271
3272struct mlx5_ifc_teardown_hca_in_bits {
3273 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003274 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003275
Matan Barakb4ff3a32016-02-09 14:57:42 +02003276 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003277 u8 op_mod[0x10];
3278
Matan Barakb4ff3a32016-02-09 14:57:42 +02003279 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003280 u8 profile[0x10];
3281
Matan Barakb4ff3a32016-02-09 14:57:42 +02003282 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003283};
3284
3285struct mlx5_ifc_sqerr2rts_qp_out_bits {
3286 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003287 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003288
3289 u8 syndrome[0x20];
3290
Matan Barakb4ff3a32016-02-09 14:57:42 +02003291 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003292};
3293
3294struct mlx5_ifc_sqerr2rts_qp_in_bits {
3295 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003296 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003297
Matan Barakb4ff3a32016-02-09 14:57:42 +02003298 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003299 u8 op_mod[0x10];
3300
Matan Barakb4ff3a32016-02-09 14:57:42 +02003301 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003302 u8 qpn[0x18];
3303
Matan Barakb4ff3a32016-02-09 14:57:42 +02003304 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003305
3306 u8 opt_param_mask[0x20];
3307
Matan Barakb4ff3a32016-02-09 14:57:42 +02003308 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003309
3310 struct mlx5_ifc_qpc_bits qpc;
3311
Matan Barakb4ff3a32016-02-09 14:57:42 +02003312 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003313};
3314
3315struct mlx5_ifc_sqd2rts_qp_out_bits {
3316 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003317 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003318
3319 u8 syndrome[0x20];
3320
Matan Barakb4ff3a32016-02-09 14:57:42 +02003321 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003322};
3323
3324struct mlx5_ifc_sqd2rts_qp_in_bits {
3325 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003326 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003327
Matan Barakb4ff3a32016-02-09 14:57:42 +02003328 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003329 u8 op_mod[0x10];
3330
Matan Barakb4ff3a32016-02-09 14:57:42 +02003331 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003332 u8 qpn[0x18];
3333
Matan Barakb4ff3a32016-02-09 14:57:42 +02003334 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003335
3336 u8 opt_param_mask[0x20];
3337
Matan Barakb4ff3a32016-02-09 14:57:42 +02003338 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003339
3340 struct mlx5_ifc_qpc_bits qpc;
3341
Matan Barakb4ff3a32016-02-09 14:57:42 +02003342 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003343};
3344
3345struct mlx5_ifc_set_roce_address_out_bits {
3346 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003347 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003348
3349 u8 syndrome[0x20];
3350
Matan Barakb4ff3a32016-02-09 14:57:42 +02003351 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003352};
3353
3354struct mlx5_ifc_set_roce_address_in_bits {
3355 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003356 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003357
Matan Barakb4ff3a32016-02-09 14:57:42 +02003358 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003359 u8 op_mod[0x10];
3360
3361 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02003362 u8 reserved_at_50[0xc];
3363 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003364
Matan Barakb4ff3a32016-02-09 14:57:42 +02003365 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003366
3367 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3368};
3369
3370struct mlx5_ifc_set_mad_demux_out_bits {
3371 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003372 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003373
3374 u8 syndrome[0x20];
3375
Matan Barakb4ff3a32016-02-09 14:57:42 +02003376 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003377};
3378
3379enum {
3380 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3381 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3382};
3383
3384struct mlx5_ifc_set_mad_demux_in_bits {
3385 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003386 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003387
Matan Barakb4ff3a32016-02-09 14:57:42 +02003388 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003389 u8 op_mod[0x10];
3390
Matan Barakb4ff3a32016-02-09 14:57:42 +02003391 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003392
Matan Barakb4ff3a32016-02-09 14:57:42 +02003393 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003394 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003395 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003396};
3397
3398struct mlx5_ifc_set_l2_table_entry_out_bits {
3399 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003400 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003401
3402 u8 syndrome[0x20];
3403
Matan Barakb4ff3a32016-02-09 14:57:42 +02003404 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003405};
3406
3407struct mlx5_ifc_set_l2_table_entry_in_bits {
3408 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003409 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003410
Matan Barakb4ff3a32016-02-09 14:57:42 +02003411 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003412 u8 op_mod[0x10];
3413
Matan Barakb4ff3a32016-02-09 14:57:42 +02003414 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003415
Matan Barakb4ff3a32016-02-09 14:57:42 +02003416 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003417 u8 table_index[0x18];
3418
Matan Barakb4ff3a32016-02-09 14:57:42 +02003419 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003420
Matan Barakb4ff3a32016-02-09 14:57:42 +02003421 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003422 u8 vlan_valid[0x1];
3423 u8 vlan[0xc];
3424
3425 struct mlx5_ifc_mac_address_layout_bits mac_address;
3426
Matan Barakb4ff3a32016-02-09 14:57:42 +02003427 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003428};
3429
3430struct mlx5_ifc_set_issi_out_bits {
3431 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003432 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003433
3434 u8 syndrome[0x20];
3435
Matan Barakb4ff3a32016-02-09 14:57:42 +02003436 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003437};
3438
3439struct mlx5_ifc_set_issi_in_bits {
3440 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003441 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003442
Matan Barakb4ff3a32016-02-09 14:57:42 +02003443 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003444 u8 op_mod[0x10];
3445
Matan Barakb4ff3a32016-02-09 14:57:42 +02003446 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003447 u8 current_issi[0x10];
3448
Matan Barakb4ff3a32016-02-09 14:57:42 +02003449 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003450};
3451
3452struct mlx5_ifc_set_hca_cap_out_bits {
3453 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003454 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003455
3456 u8 syndrome[0x20];
3457
Matan Barakb4ff3a32016-02-09 14:57:42 +02003458 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003459};
3460
3461struct mlx5_ifc_set_hca_cap_in_bits {
3462 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003463 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003464
Matan Barakb4ff3a32016-02-09 14:57:42 +02003465 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003466 u8 op_mod[0x10];
3467
Matan Barakb4ff3a32016-02-09 14:57:42 +02003468 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003469
Saeed Mahameede2816822015-05-28 22:28:40 +03003470 union mlx5_ifc_hca_cap_union_bits capability;
3471};
3472
Maor Gottlieb26a81452015-12-10 17:12:39 +02003473enum {
3474 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3475 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3476 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3477 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3478};
3479
Saeed Mahameede2816822015-05-28 22:28:40 +03003480struct mlx5_ifc_set_fte_out_bits {
3481 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003482 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003483
3484 u8 syndrome[0x20];
3485
Matan Barakb4ff3a32016-02-09 14:57:42 +02003486 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003487};
3488
3489struct mlx5_ifc_set_fte_in_bits {
3490 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003491 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003492
Matan Barakb4ff3a32016-02-09 14:57:42 +02003493 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003494 u8 op_mod[0x10];
3495
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003496 u8 other_vport[0x1];
3497 u8 reserved_at_41[0xf];
3498 u8 vport_number[0x10];
3499
3500 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003501
3502 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003503 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003504
Matan Barakb4ff3a32016-02-09 14:57:42 +02003505 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003506 u8 table_id[0x18];
3507
Matan Barakb4ff3a32016-02-09 14:57:42 +02003508 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003509 u8 modify_enable_mask[0x8];
3510
Matan Barakb4ff3a32016-02-09 14:57:42 +02003511 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003512
3513 u8 flow_index[0x20];
3514
Matan Barakb4ff3a32016-02-09 14:57:42 +02003515 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003516
3517 struct mlx5_ifc_flow_context_bits flow_context;
3518};
3519
3520struct mlx5_ifc_rts2rts_qp_out_bits {
3521 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003522 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003523
3524 u8 syndrome[0x20];
3525
Matan Barakb4ff3a32016-02-09 14:57:42 +02003526 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003527};
3528
3529struct mlx5_ifc_rts2rts_qp_in_bits {
3530 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003531 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003532
Matan Barakb4ff3a32016-02-09 14:57:42 +02003533 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003534 u8 op_mod[0x10];
3535
Matan Barakb4ff3a32016-02-09 14:57:42 +02003536 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003537 u8 qpn[0x18];
3538
Matan Barakb4ff3a32016-02-09 14:57:42 +02003539 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003540
3541 u8 opt_param_mask[0x20];
3542
Matan Barakb4ff3a32016-02-09 14:57:42 +02003543 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003544
3545 struct mlx5_ifc_qpc_bits qpc;
3546
Matan Barakb4ff3a32016-02-09 14:57:42 +02003547 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003548};
3549
3550struct mlx5_ifc_rtr2rts_qp_out_bits {
3551 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003552 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003553
3554 u8 syndrome[0x20];
3555
Matan Barakb4ff3a32016-02-09 14:57:42 +02003556 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003557};
3558
3559struct mlx5_ifc_rtr2rts_qp_in_bits {
3560 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003561 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003562
Matan Barakb4ff3a32016-02-09 14:57:42 +02003563 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003564 u8 op_mod[0x10];
3565
Matan Barakb4ff3a32016-02-09 14:57:42 +02003566 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003567 u8 qpn[0x18];
3568
Matan Barakb4ff3a32016-02-09 14:57:42 +02003569 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003570
3571 u8 opt_param_mask[0x20];
3572
Matan Barakb4ff3a32016-02-09 14:57:42 +02003573 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003574
3575 struct mlx5_ifc_qpc_bits qpc;
3576
Matan Barakb4ff3a32016-02-09 14:57:42 +02003577 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003578};
3579
3580struct mlx5_ifc_rst2init_qp_out_bits {
3581 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003582 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003583
3584 u8 syndrome[0x20];
3585
Matan Barakb4ff3a32016-02-09 14:57:42 +02003586 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003587};
3588
3589struct mlx5_ifc_rst2init_qp_in_bits {
3590 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003591 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003592
Matan Barakb4ff3a32016-02-09 14:57:42 +02003593 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003594 u8 op_mod[0x10];
3595
Matan Barakb4ff3a32016-02-09 14:57:42 +02003596 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003597 u8 qpn[0x18];
3598
Matan Barakb4ff3a32016-02-09 14:57:42 +02003599 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003600
3601 u8 opt_param_mask[0x20];
3602
Matan Barakb4ff3a32016-02-09 14:57:42 +02003603 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003604
3605 struct mlx5_ifc_qpc_bits qpc;
3606
Matan Barakb4ff3a32016-02-09 14:57:42 +02003607 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003608};
3609
Saeed Mahameed74862162016-06-09 15:11:34 +03003610struct mlx5_ifc_query_xrq_out_bits {
3611 u8 status[0x8];
3612 u8 reserved_at_8[0x18];
3613
3614 u8 syndrome[0x20];
3615
3616 u8 reserved_at_40[0x40];
3617
3618 struct mlx5_ifc_xrqc_bits xrq_context;
3619};
3620
3621struct mlx5_ifc_query_xrq_in_bits {
3622 u8 opcode[0x10];
3623 u8 reserved_at_10[0x10];
3624
3625 u8 reserved_at_20[0x10];
3626 u8 op_mod[0x10];
3627
3628 u8 reserved_at_40[0x8];
3629 u8 xrqn[0x18];
3630
3631 u8 reserved_at_60[0x20];
3632};
3633
Saeed Mahameede2816822015-05-28 22:28:40 +03003634struct mlx5_ifc_query_xrc_srq_out_bits {
3635 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003636 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003637
3638 u8 syndrome[0x20];
3639
Matan Barakb4ff3a32016-02-09 14:57:42 +02003640 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003641
3642 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3643
Matan Barakb4ff3a32016-02-09 14:57:42 +02003644 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003645
3646 u8 pas[0][0x40];
3647};
3648
3649struct mlx5_ifc_query_xrc_srq_in_bits {
3650 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003651 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003652
Matan Barakb4ff3a32016-02-09 14:57:42 +02003653 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003654 u8 op_mod[0x10];
3655
Matan Barakb4ff3a32016-02-09 14:57:42 +02003656 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003657 u8 xrc_srqn[0x18];
3658
Matan Barakb4ff3a32016-02-09 14:57:42 +02003659 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003660};
3661
3662enum {
3663 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3664 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3665};
3666
3667struct mlx5_ifc_query_vport_state_out_bits {
3668 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003669 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003670
3671 u8 syndrome[0x20];
3672
Matan Barakb4ff3a32016-02-09 14:57:42 +02003673 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003674
Matan Barakb4ff3a32016-02-09 14:57:42 +02003675 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003676 u8 admin_state[0x4];
3677 u8 state[0x4];
3678};
3679
3680enum {
3681 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003682 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003683};
3684
3685struct mlx5_ifc_query_vport_state_in_bits {
3686 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003687 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003688
Matan Barakb4ff3a32016-02-09 14:57:42 +02003689 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003690 u8 op_mod[0x10];
3691
3692 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003693 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003694 u8 vport_number[0x10];
3695
Matan Barakb4ff3a32016-02-09 14:57:42 +02003696 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003697};
3698
Moshe Shemesh61c5b5c2018-01-07 16:45:27 +02003699struct mlx5_ifc_query_vnic_env_out_bits {
3700 u8 status[0x8];
3701 u8 reserved_at_8[0x18];
3702
3703 u8 syndrome[0x20];
3704
3705 u8 reserved_at_40[0x40];
3706
3707 struct mlx5_ifc_vnic_diagnostic_statistics_bits vport_env;
3708};
3709
3710enum {
3711 MLX5_QUERY_VNIC_ENV_IN_OP_MOD_VPORT_DIAG_STATISTICS = 0x0,
3712};
3713
3714struct mlx5_ifc_query_vnic_env_in_bits {
3715 u8 opcode[0x10];
3716 u8 reserved_at_10[0x10];
3717
3718 u8 reserved_at_20[0x10];
3719 u8 op_mod[0x10];
3720
3721 u8 other_vport[0x1];
3722 u8 reserved_at_41[0xf];
3723 u8 vport_number[0x10];
3724
3725 u8 reserved_at_60[0x20];
3726};
3727
Saeed Mahameede2816822015-05-28 22:28:40 +03003728struct mlx5_ifc_query_vport_counter_out_bits {
3729 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003730 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003731
3732 u8 syndrome[0x20];
3733
Matan Barakb4ff3a32016-02-09 14:57:42 +02003734 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003735
3736 struct mlx5_ifc_traffic_counter_bits received_errors;
3737
3738 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3739
3740 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3741
3742 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3743
3744 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3745
3746 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3747
3748 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3749
3750 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3751
3752 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3753
3754 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3755
3756 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3757
3758 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3759
Matan Barakb4ff3a32016-02-09 14:57:42 +02003760 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003761};
3762
3763enum {
3764 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3765};
3766
3767struct mlx5_ifc_query_vport_counter_in_bits {
3768 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003769 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003770
Matan Barakb4ff3a32016-02-09 14:57:42 +02003771 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003772 u8 op_mod[0x10];
3773
3774 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003775 u8 reserved_at_41[0xb];
3776 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003777 u8 vport_number[0x10];
3778
Matan Barakb4ff3a32016-02-09 14:57:42 +02003779 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003780
3781 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003782 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003783
Matan Barakb4ff3a32016-02-09 14:57:42 +02003784 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003785};
3786
3787struct mlx5_ifc_query_tis_out_bits {
3788 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003789 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003790
3791 u8 syndrome[0x20];
3792
Matan Barakb4ff3a32016-02-09 14:57:42 +02003793 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003794
3795 struct mlx5_ifc_tisc_bits tis_context;
3796};
3797
3798struct mlx5_ifc_query_tis_in_bits {
3799 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003800 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003801
Matan Barakb4ff3a32016-02-09 14:57:42 +02003802 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003803 u8 op_mod[0x10];
3804
Matan Barakb4ff3a32016-02-09 14:57:42 +02003805 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003806 u8 tisn[0x18];
3807
Matan Barakb4ff3a32016-02-09 14:57:42 +02003808 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003809};
3810
3811struct mlx5_ifc_query_tir_out_bits {
3812 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003813 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003814
3815 u8 syndrome[0x20];
3816
Matan Barakb4ff3a32016-02-09 14:57:42 +02003817 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003818
3819 struct mlx5_ifc_tirc_bits tir_context;
3820};
3821
3822struct mlx5_ifc_query_tir_in_bits {
3823 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003824 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003825
Matan Barakb4ff3a32016-02-09 14:57:42 +02003826 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003827 u8 op_mod[0x10];
3828
Matan Barakb4ff3a32016-02-09 14:57:42 +02003829 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003830 u8 tirn[0x18];
3831
Matan Barakb4ff3a32016-02-09 14:57:42 +02003832 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003833};
3834
3835struct mlx5_ifc_query_srq_out_bits {
3836 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003837 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003838
3839 u8 syndrome[0x20];
3840
Matan Barakb4ff3a32016-02-09 14:57:42 +02003841 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003842
3843 struct mlx5_ifc_srqc_bits srq_context_entry;
3844
Matan Barakb4ff3a32016-02-09 14:57:42 +02003845 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003846
3847 u8 pas[0][0x40];
3848};
3849
3850struct mlx5_ifc_query_srq_in_bits {
3851 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003852 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003853
Matan Barakb4ff3a32016-02-09 14:57:42 +02003854 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003855 u8 op_mod[0x10];
3856
Matan Barakb4ff3a32016-02-09 14:57:42 +02003857 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003858 u8 srqn[0x18];
3859
Matan Barakb4ff3a32016-02-09 14:57:42 +02003860 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003861};
3862
3863struct mlx5_ifc_query_sq_out_bits {
3864 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003865 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003866
3867 u8 syndrome[0x20];
3868
Matan Barakb4ff3a32016-02-09 14:57:42 +02003869 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003870
3871 struct mlx5_ifc_sqc_bits sq_context;
3872};
3873
3874struct mlx5_ifc_query_sq_in_bits {
3875 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003876 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003877
Matan Barakb4ff3a32016-02-09 14:57:42 +02003878 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003879 u8 op_mod[0x10];
3880
Matan Barakb4ff3a32016-02-09 14:57:42 +02003881 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003882 u8 sqn[0x18];
3883
Matan Barakb4ff3a32016-02-09 14:57:42 +02003884 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003885};
3886
3887struct mlx5_ifc_query_special_contexts_out_bits {
3888 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003889 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003890
3891 u8 syndrome[0x20];
3892
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003893 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003894
3895 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003896
3897 u8 null_mkey[0x20];
3898
3899 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003900};
3901
3902struct mlx5_ifc_query_special_contexts_in_bits {
3903 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003904 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003905
Matan Barakb4ff3a32016-02-09 14:57:42 +02003906 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003907 u8 op_mod[0x10];
3908
Matan Barakb4ff3a32016-02-09 14:57:42 +02003909 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003910};
3911
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003912struct mlx5_ifc_query_scheduling_element_out_bits {
3913 u8 opcode[0x10];
3914 u8 reserved_at_10[0x10];
3915
3916 u8 reserved_at_20[0x10];
3917 u8 op_mod[0x10];
3918
3919 u8 reserved_at_40[0xc0];
3920
3921 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3922
3923 u8 reserved_at_300[0x100];
3924};
3925
3926enum {
3927 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3928};
3929
3930struct mlx5_ifc_query_scheduling_element_in_bits {
3931 u8 opcode[0x10];
3932 u8 reserved_at_10[0x10];
3933
3934 u8 reserved_at_20[0x10];
3935 u8 op_mod[0x10];
3936
3937 u8 scheduling_hierarchy[0x8];
3938 u8 reserved_at_48[0x18];
3939
3940 u8 scheduling_element_id[0x20];
3941
3942 u8 reserved_at_80[0x180];
3943};
3944
Saeed Mahameede2816822015-05-28 22:28:40 +03003945struct mlx5_ifc_query_rqt_out_bits {
3946 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003947 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003948
3949 u8 syndrome[0x20];
3950
Matan Barakb4ff3a32016-02-09 14:57:42 +02003951 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003952
3953 struct mlx5_ifc_rqtc_bits rqt_context;
3954};
3955
3956struct mlx5_ifc_query_rqt_in_bits {
3957 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003958 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003959
Matan Barakb4ff3a32016-02-09 14:57:42 +02003960 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003961 u8 op_mod[0x10];
3962
Matan Barakb4ff3a32016-02-09 14:57:42 +02003963 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003964 u8 rqtn[0x18];
3965
Matan Barakb4ff3a32016-02-09 14:57:42 +02003966 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003967};
3968
3969struct mlx5_ifc_query_rq_out_bits {
3970 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003971 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003972
3973 u8 syndrome[0x20];
3974
Matan Barakb4ff3a32016-02-09 14:57:42 +02003975 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003976
3977 struct mlx5_ifc_rqc_bits rq_context;
3978};
3979
3980struct mlx5_ifc_query_rq_in_bits {
3981 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003982 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003983
Matan Barakb4ff3a32016-02-09 14:57:42 +02003984 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003985 u8 op_mod[0x10];
3986
Matan Barakb4ff3a32016-02-09 14:57:42 +02003987 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003988 u8 rqn[0x18];
3989
Matan Barakb4ff3a32016-02-09 14:57:42 +02003990 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003991};
3992
3993struct mlx5_ifc_query_roce_address_out_bits {
3994 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003995 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003996
3997 u8 syndrome[0x20];
3998
Matan Barakb4ff3a32016-02-09 14:57:42 +02003999 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004000
4001 struct mlx5_ifc_roce_addr_layout_bits roce_address;
4002};
4003
4004struct mlx5_ifc_query_roce_address_in_bits {
4005 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004006 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004007
Matan Barakb4ff3a32016-02-09 14:57:42 +02004008 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004009 u8 op_mod[0x10];
4010
4011 u8 roce_address_index[0x10];
Daniel Jurgens32f69e42018-01-04 17:25:36 +02004012 u8 reserved_at_50[0xc];
4013 u8 vhca_port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004014
Matan Barakb4ff3a32016-02-09 14:57:42 +02004015 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004016};
4017
4018struct mlx5_ifc_query_rmp_out_bits {
4019 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004020 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004021
4022 u8 syndrome[0x20];
4023
Matan Barakb4ff3a32016-02-09 14:57:42 +02004024 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004025
4026 struct mlx5_ifc_rmpc_bits rmp_context;
4027};
4028
4029struct mlx5_ifc_query_rmp_in_bits {
4030 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004031 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004032
Matan Barakb4ff3a32016-02-09 14:57:42 +02004033 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004034 u8 op_mod[0x10];
4035
Matan Barakb4ff3a32016-02-09 14:57:42 +02004036 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004037 u8 rmpn[0x18];
4038
Matan Barakb4ff3a32016-02-09 14:57:42 +02004039 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004040};
4041
4042struct mlx5_ifc_query_qp_out_bits {
4043 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004044 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004045
4046 u8 syndrome[0x20];
4047
Matan Barakb4ff3a32016-02-09 14:57:42 +02004048 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004049
4050 u8 opt_param_mask[0x20];
4051
Matan Barakb4ff3a32016-02-09 14:57:42 +02004052 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004053
4054 struct mlx5_ifc_qpc_bits qpc;
4055
Matan Barakb4ff3a32016-02-09 14:57:42 +02004056 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004057
4058 u8 pas[0][0x40];
4059};
4060
4061struct mlx5_ifc_query_qp_in_bits {
4062 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004063 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004064
Matan Barakb4ff3a32016-02-09 14:57:42 +02004065 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004066 u8 op_mod[0x10];
4067
Matan Barakb4ff3a32016-02-09 14:57:42 +02004068 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004069 u8 qpn[0x18];
4070
Matan Barakb4ff3a32016-02-09 14:57:42 +02004071 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004072};
4073
4074struct mlx5_ifc_query_q_counter_out_bits {
4075 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004076 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004077
4078 u8 syndrome[0x20];
4079
Matan Barakb4ff3a32016-02-09 14:57:42 +02004080 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004081
4082 u8 rx_write_requests[0x20];
4083
Matan Barakb4ff3a32016-02-09 14:57:42 +02004084 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004085
4086 u8 rx_read_requests[0x20];
4087
Matan Barakb4ff3a32016-02-09 14:57:42 +02004088 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004089
4090 u8 rx_atomic_requests[0x20];
4091
Matan Barakb4ff3a32016-02-09 14:57:42 +02004092 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004093
4094 u8 rx_dct_connect[0x20];
4095
Matan Barakb4ff3a32016-02-09 14:57:42 +02004096 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004097
4098 u8 out_of_buffer[0x20];
4099
Matan Barakb4ff3a32016-02-09 14:57:42 +02004100 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004101
4102 u8 out_of_sequence[0x20];
4103
Saeed Mahameed74862162016-06-09 15:11:34 +03004104 u8 reserved_at_1e0[0x20];
4105
4106 u8 duplicate_request[0x20];
4107
4108 u8 reserved_at_220[0x20];
4109
4110 u8 rnr_nak_retry_err[0x20];
4111
4112 u8 reserved_at_260[0x20];
4113
4114 u8 packet_seq_err[0x20];
4115
4116 u8 reserved_at_2a0[0x20];
4117
4118 u8 implied_nak_seq_err[0x20];
4119
4120 u8 reserved_at_2e0[0x20];
4121
4122 u8 local_ack_timeout_err[0x20];
4123
Parav Pandit58dcb602017-06-19 07:19:37 +03004124 u8 reserved_at_320[0xa0];
4125
4126 u8 resp_local_length_error[0x20];
4127
4128 u8 req_local_length_error[0x20];
4129
4130 u8 resp_local_qp_error[0x20];
4131
4132 u8 local_operation_error[0x20];
4133
4134 u8 resp_local_protection[0x20];
4135
4136 u8 req_local_protection[0x20];
4137
4138 u8 resp_cqe_error[0x20];
4139
4140 u8 req_cqe_error[0x20];
4141
4142 u8 req_mw_binding[0x20];
4143
4144 u8 req_bad_response[0x20];
4145
4146 u8 req_remote_invalid_request[0x20];
4147
4148 u8 resp_remote_invalid_request[0x20];
4149
4150 u8 req_remote_access_errors[0x20];
4151
4152 u8 resp_remote_access_errors[0x20];
4153
4154 u8 req_remote_operation_errors[0x20];
4155
4156 u8 req_transport_retries_exceeded[0x20];
4157
4158 u8 cq_overflow[0x20];
4159
4160 u8 resp_cqe_flush_error[0x20];
4161
4162 u8 req_cqe_flush_error[0x20];
4163
4164 u8 reserved_at_620[0x1e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004165};
4166
4167struct mlx5_ifc_query_q_counter_in_bits {
4168 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004169 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004170
Matan Barakb4ff3a32016-02-09 14:57:42 +02004171 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004172 u8 op_mod[0x10];
4173
Matan Barakb4ff3a32016-02-09 14:57:42 +02004174 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03004175
4176 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004177 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004178
Matan Barakb4ff3a32016-02-09 14:57:42 +02004179 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004180 u8 counter_set_id[0x8];
4181};
4182
4183struct mlx5_ifc_query_pages_out_bits {
4184 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004185 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004186
4187 u8 syndrome[0x20];
4188
Matan Barakb4ff3a32016-02-09 14:57:42 +02004189 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004190 u8 function_id[0x10];
4191
4192 u8 num_pages[0x20];
4193};
4194
4195enum {
4196 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
4197 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
4198 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
4199};
4200
4201struct mlx5_ifc_query_pages_in_bits {
4202 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004203 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004204
Matan Barakb4ff3a32016-02-09 14:57:42 +02004205 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004206 u8 op_mod[0x10];
4207
Matan Barakb4ff3a32016-02-09 14:57:42 +02004208 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004209 u8 function_id[0x10];
4210
Matan Barakb4ff3a32016-02-09 14:57:42 +02004211 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004212};
4213
4214struct mlx5_ifc_query_nic_vport_context_out_bits {
4215 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004216 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004217
4218 u8 syndrome[0x20];
4219
Matan Barakb4ff3a32016-02-09 14:57:42 +02004220 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004221
4222 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4223};
4224
4225struct mlx5_ifc_query_nic_vport_context_in_bits {
4226 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004227 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004228
Matan Barakb4ff3a32016-02-09 14:57:42 +02004229 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004230 u8 op_mod[0x10];
4231
4232 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004233 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004234 u8 vport_number[0x10];
4235
Matan Barakb4ff3a32016-02-09 14:57:42 +02004236 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004237 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004238 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004239};
4240
4241struct mlx5_ifc_query_mkey_out_bits {
4242 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004243 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004244
4245 u8 syndrome[0x20];
4246
Matan Barakb4ff3a32016-02-09 14:57:42 +02004247 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004248
4249 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4250
Matan Barakb4ff3a32016-02-09 14:57:42 +02004251 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004252
4253 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4254
4255 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4256};
4257
4258struct mlx5_ifc_query_mkey_in_bits {
4259 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004260 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004261
Matan Barakb4ff3a32016-02-09 14:57:42 +02004262 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004263 u8 op_mod[0x10];
4264
Matan Barakb4ff3a32016-02-09 14:57:42 +02004265 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004266 u8 mkey_index[0x18];
4267
4268 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004269 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004270};
4271
4272struct mlx5_ifc_query_mad_demux_out_bits {
4273 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004274 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004275
4276 u8 syndrome[0x20];
4277
Matan Barakb4ff3a32016-02-09 14:57:42 +02004278 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004279
4280 u8 mad_dumux_parameters_block[0x20];
4281};
4282
4283struct mlx5_ifc_query_mad_demux_in_bits {
4284 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004285 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004286
Matan Barakb4ff3a32016-02-09 14:57:42 +02004287 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004288 u8 op_mod[0x10];
4289
Matan Barakb4ff3a32016-02-09 14:57:42 +02004290 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004291};
4292
4293struct mlx5_ifc_query_l2_table_entry_out_bits {
4294 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004295 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004296
4297 u8 syndrome[0x20];
4298
Matan Barakb4ff3a32016-02-09 14:57:42 +02004299 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004300
Matan Barakb4ff3a32016-02-09 14:57:42 +02004301 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004302 u8 vlan_valid[0x1];
4303 u8 vlan[0xc];
4304
4305 struct mlx5_ifc_mac_address_layout_bits mac_address;
4306
Matan Barakb4ff3a32016-02-09 14:57:42 +02004307 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004308};
4309
4310struct mlx5_ifc_query_l2_table_entry_in_bits {
4311 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004312 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004313
Matan Barakb4ff3a32016-02-09 14:57:42 +02004314 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004315 u8 op_mod[0x10];
4316
Matan Barakb4ff3a32016-02-09 14:57:42 +02004317 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004318
Matan Barakb4ff3a32016-02-09 14:57:42 +02004319 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004320 u8 table_index[0x18];
4321
Matan Barakb4ff3a32016-02-09 14:57:42 +02004322 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004323};
4324
4325struct mlx5_ifc_query_issi_out_bits {
4326 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004327 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004328
4329 u8 syndrome[0x20];
4330
Matan Barakb4ff3a32016-02-09 14:57:42 +02004331 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004332 u8 current_issi[0x10];
4333
Matan Barakb4ff3a32016-02-09 14:57:42 +02004334 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004335
Matan Barakb4ff3a32016-02-09 14:57:42 +02004336 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004337 u8 supported_issi_dw0[0x20];
4338};
4339
4340struct mlx5_ifc_query_issi_in_bits {
4341 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004342 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004343
Matan Barakb4ff3a32016-02-09 14:57:42 +02004344 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004345 u8 op_mod[0x10];
4346
Matan Barakb4ff3a32016-02-09 14:57:42 +02004347 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004348};
4349
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004350struct mlx5_ifc_set_driver_version_out_bits {
4351 u8 status[0x8];
4352 u8 reserved_0[0x18];
4353
4354 u8 syndrome[0x20];
4355 u8 reserved_1[0x40];
4356};
4357
4358struct mlx5_ifc_set_driver_version_in_bits {
4359 u8 opcode[0x10];
4360 u8 reserved_0[0x10];
4361
4362 u8 reserved_1[0x10];
4363 u8 op_mod[0x10];
4364
4365 u8 reserved_2[0x40];
4366 u8 driver_version[64][0x8];
4367};
4368
Saeed Mahameede2816822015-05-28 22:28:40 +03004369struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4370 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004371 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004372
4373 u8 syndrome[0x20];
4374
Matan Barakb4ff3a32016-02-09 14:57:42 +02004375 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004376
4377 struct mlx5_ifc_pkey_bits pkey[0];
4378};
4379
4380struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4381 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004382 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004383
Matan Barakb4ff3a32016-02-09 14:57:42 +02004384 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004385 u8 op_mod[0x10];
4386
4387 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004388 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004389 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004390 u8 vport_number[0x10];
4391
Matan Barakb4ff3a32016-02-09 14:57:42 +02004392 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004393 u8 pkey_index[0x10];
4394};
4395
Eli Coheneff901d2016-03-11 22:58:42 +02004396enum {
4397 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4398 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4399 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4400};
4401
Saeed Mahameede2816822015-05-28 22:28:40 +03004402struct mlx5_ifc_query_hca_vport_gid_out_bits {
4403 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004404 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004405
4406 u8 syndrome[0x20];
4407
Matan Barakb4ff3a32016-02-09 14:57:42 +02004408 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004409
4410 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004411 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004412
4413 struct mlx5_ifc_array128_auto_bits gid[0];
4414};
4415
4416struct mlx5_ifc_query_hca_vport_gid_in_bits {
4417 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004418 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004419
Matan Barakb4ff3a32016-02-09 14:57:42 +02004420 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004421 u8 op_mod[0x10];
4422
4423 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004424 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004425 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004426 u8 vport_number[0x10];
4427
Matan Barakb4ff3a32016-02-09 14:57:42 +02004428 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004429 u8 gid_index[0x10];
4430};
4431
4432struct mlx5_ifc_query_hca_vport_context_out_bits {
4433 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004434 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004435
4436 u8 syndrome[0x20];
4437
Matan Barakb4ff3a32016-02-09 14:57:42 +02004438 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004439
4440 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4441};
4442
4443struct mlx5_ifc_query_hca_vport_context_in_bits {
4444 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004445 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004446
Matan Barakb4ff3a32016-02-09 14:57:42 +02004447 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004448 u8 op_mod[0x10];
4449
4450 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004451 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004452 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004453 u8 vport_number[0x10];
4454
Matan Barakb4ff3a32016-02-09 14:57:42 +02004455 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004456};
4457
4458struct mlx5_ifc_query_hca_cap_out_bits {
4459 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004460 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004461
4462 u8 syndrome[0x20];
4463
Matan Barakb4ff3a32016-02-09 14:57:42 +02004464 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004465
4466 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004467};
4468
4469struct mlx5_ifc_query_hca_cap_in_bits {
4470 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004471 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004472
Matan Barakb4ff3a32016-02-09 14:57:42 +02004473 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004474 u8 op_mod[0x10];
4475
Matan Barakb4ff3a32016-02-09 14:57:42 +02004476 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004477};
4478
Saeed Mahameede2816822015-05-28 22:28:40 +03004479struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004480 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004481 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004482
4483 u8 syndrome[0x20];
4484
Matan Barakb4ff3a32016-02-09 14:57:42 +02004485 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004486
Matan Barakb4ff3a32016-02-09 14:57:42 +02004487 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004488 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004489 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004490 u8 log_size[0x8];
4491
Matan Barakb4ff3a32016-02-09 14:57:42 +02004492 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004493};
4494
Saeed Mahameede2816822015-05-28 22:28:40 +03004495struct mlx5_ifc_query_flow_table_in_bits {
4496 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004497 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004498
Matan Barakb4ff3a32016-02-09 14:57:42 +02004499 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004500 u8 op_mod[0x10];
4501
Matan Barakb4ff3a32016-02-09 14:57:42 +02004502 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004503
4504 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004505 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004506
Matan Barakb4ff3a32016-02-09 14:57:42 +02004507 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004508 u8 table_id[0x18];
4509
Matan Barakb4ff3a32016-02-09 14:57:42 +02004510 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004511};
4512
4513struct mlx5_ifc_query_fte_out_bits {
4514 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004515 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004516
4517 u8 syndrome[0x20];
4518
Matan Barakb4ff3a32016-02-09 14:57:42 +02004519 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004520
4521 struct mlx5_ifc_flow_context_bits flow_context;
4522};
4523
4524struct mlx5_ifc_query_fte_in_bits {
4525 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004526 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004527
Matan Barakb4ff3a32016-02-09 14:57:42 +02004528 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004529 u8 op_mod[0x10];
4530
Matan Barakb4ff3a32016-02-09 14:57:42 +02004531 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004532
4533 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004534 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004535
Matan Barakb4ff3a32016-02-09 14:57:42 +02004536 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004537 u8 table_id[0x18];
4538
Matan Barakb4ff3a32016-02-09 14:57:42 +02004539 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004540
4541 u8 flow_index[0x20];
4542
Matan Barakb4ff3a32016-02-09 14:57:42 +02004543 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004544};
4545
4546enum {
4547 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4548 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4549 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4550};
4551
4552struct mlx5_ifc_query_flow_group_out_bits {
4553 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004554 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004555
4556 u8 syndrome[0x20];
4557
Matan Barakb4ff3a32016-02-09 14:57:42 +02004558 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004559
4560 u8 start_flow_index[0x20];
4561
Matan Barakb4ff3a32016-02-09 14:57:42 +02004562 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004563
4564 u8 end_flow_index[0x20];
4565
Matan Barakb4ff3a32016-02-09 14:57:42 +02004566 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004567
Matan Barakb4ff3a32016-02-09 14:57:42 +02004568 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004569 u8 match_criteria_enable[0x8];
4570
4571 struct mlx5_ifc_fte_match_param_bits match_criteria;
4572
Matan Barakb4ff3a32016-02-09 14:57:42 +02004573 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004574};
4575
4576struct mlx5_ifc_query_flow_group_in_bits {
4577 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004578 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004579
Matan Barakb4ff3a32016-02-09 14:57:42 +02004580 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004581 u8 op_mod[0x10];
4582
Matan Barakb4ff3a32016-02-09 14:57:42 +02004583 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004584
4585 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004586 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004587
Matan Barakb4ff3a32016-02-09 14:57:42 +02004588 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004589 u8 table_id[0x18];
4590
4591 u8 group_id[0x20];
4592
Matan Barakb4ff3a32016-02-09 14:57:42 +02004593 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004594};
4595
Amir Vadai9dc0b282016-05-13 12:55:39 +00004596struct mlx5_ifc_query_flow_counter_out_bits {
4597 u8 status[0x8];
4598 u8 reserved_at_8[0x18];
4599
4600 u8 syndrome[0x20];
4601
4602 u8 reserved_at_40[0x40];
4603
4604 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4605};
4606
4607struct mlx5_ifc_query_flow_counter_in_bits {
4608 u8 opcode[0x10];
4609 u8 reserved_at_10[0x10];
4610
4611 u8 reserved_at_20[0x10];
4612 u8 op_mod[0x10];
4613
4614 u8 reserved_at_40[0x80];
4615
4616 u8 clear[0x1];
4617 u8 reserved_at_c1[0xf];
4618 u8 num_of_counters[0x10];
4619
Rabie Louloua8ffcc72017-07-09 13:39:30 +03004620 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00004621};
4622
Saeed Mahameedd6666752015-12-01 18:03:22 +02004623struct mlx5_ifc_query_esw_vport_context_out_bits {
4624 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004625 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004626
4627 u8 syndrome[0x20];
4628
Matan Barakb4ff3a32016-02-09 14:57:42 +02004629 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004630
4631 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4632};
4633
4634struct mlx5_ifc_query_esw_vport_context_in_bits {
4635 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004636 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004637
Matan Barakb4ff3a32016-02-09 14:57:42 +02004638 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004639 u8 op_mod[0x10];
4640
4641 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004642 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004643 u8 vport_number[0x10];
4644
Matan Barakb4ff3a32016-02-09 14:57:42 +02004645 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004646};
4647
4648struct mlx5_ifc_modify_esw_vport_context_out_bits {
4649 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004650 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004651
4652 u8 syndrome[0x20];
4653
Matan Barakb4ff3a32016-02-09 14:57:42 +02004654 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004655};
4656
4657struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004658 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004659 u8 vport_cvlan_insert[0x1];
4660 u8 vport_svlan_insert[0x1];
4661 u8 vport_cvlan_strip[0x1];
4662 u8 vport_svlan_strip[0x1];
4663};
4664
4665struct mlx5_ifc_modify_esw_vport_context_in_bits {
4666 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004667 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004668
Matan Barakb4ff3a32016-02-09 14:57:42 +02004669 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004670 u8 op_mod[0x10];
4671
4672 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004673 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004674 u8 vport_number[0x10];
4675
4676 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4677
4678 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4679};
4680
Saeed Mahameede2816822015-05-28 22:28:40 +03004681struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004682 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004683 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004684
4685 u8 syndrome[0x20];
4686
Matan Barakb4ff3a32016-02-09 14:57:42 +02004687 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004688
4689 struct mlx5_ifc_eqc_bits eq_context_entry;
4690
Matan Barakb4ff3a32016-02-09 14:57:42 +02004691 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004692
4693 u8 event_bitmask[0x40];
4694
Matan Barakb4ff3a32016-02-09 14:57:42 +02004695 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004696
4697 u8 pas[0][0x40];
4698};
4699
4700struct mlx5_ifc_query_eq_in_bits {
4701 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004702 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004703
Matan Barakb4ff3a32016-02-09 14:57:42 +02004704 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004705 u8 op_mod[0x10];
4706
Matan Barakb4ff3a32016-02-09 14:57:42 +02004707 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004708 u8 eq_number[0x8];
4709
Matan Barakb4ff3a32016-02-09 14:57:42 +02004710 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004711};
4712
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004713struct mlx5_ifc_encap_header_in_bits {
4714 u8 reserved_at_0[0x5];
4715 u8 header_type[0x3];
4716 u8 reserved_at_8[0xe];
4717 u8 encap_header_size[0xa];
4718
4719 u8 reserved_at_20[0x10];
4720 u8 encap_header[2][0x8];
4721
4722 u8 more_encap_header[0][0x8];
4723};
4724
4725struct mlx5_ifc_query_encap_header_out_bits {
4726 u8 status[0x8];
4727 u8 reserved_at_8[0x18];
4728
4729 u8 syndrome[0x20];
4730
4731 u8 reserved_at_40[0xa0];
4732
4733 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4734};
4735
4736struct mlx5_ifc_query_encap_header_in_bits {
4737 u8 opcode[0x10];
4738 u8 reserved_at_10[0x10];
4739
4740 u8 reserved_at_20[0x10];
4741 u8 op_mod[0x10];
4742
4743 u8 encap_id[0x20];
4744
4745 u8 reserved_at_60[0xa0];
4746};
4747
4748struct mlx5_ifc_alloc_encap_header_out_bits {
4749 u8 status[0x8];
4750 u8 reserved_at_8[0x18];
4751
4752 u8 syndrome[0x20];
4753
4754 u8 encap_id[0x20];
4755
4756 u8 reserved_at_60[0x20];
4757};
4758
4759struct mlx5_ifc_alloc_encap_header_in_bits {
4760 u8 opcode[0x10];
4761 u8 reserved_at_10[0x10];
4762
4763 u8 reserved_at_20[0x10];
4764 u8 op_mod[0x10];
4765
4766 u8 reserved_at_40[0xa0];
4767
4768 struct mlx5_ifc_encap_header_in_bits encap_header;
4769};
4770
4771struct mlx5_ifc_dealloc_encap_header_out_bits {
4772 u8 status[0x8];
4773 u8 reserved_at_8[0x18];
4774
4775 u8 syndrome[0x20];
4776
4777 u8 reserved_at_40[0x40];
4778};
4779
4780struct mlx5_ifc_dealloc_encap_header_in_bits {
4781 u8 opcode[0x10];
4782 u8 reserved_at_10[0x10];
4783
4784 u8 reserved_20[0x10];
4785 u8 op_mod[0x10];
4786
4787 u8 encap_id[0x20];
4788
4789 u8 reserved_60[0x20];
4790};
4791
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004792struct mlx5_ifc_set_action_in_bits {
4793 u8 action_type[0x4];
4794 u8 field[0xc];
4795 u8 reserved_at_10[0x3];
4796 u8 offset[0x5];
4797 u8 reserved_at_18[0x3];
4798 u8 length[0x5];
4799
4800 u8 data[0x20];
4801};
4802
4803struct mlx5_ifc_add_action_in_bits {
4804 u8 action_type[0x4];
4805 u8 field[0xc];
4806 u8 reserved_at_10[0x10];
4807
4808 u8 data[0x20];
4809};
4810
4811union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4812 struct mlx5_ifc_set_action_in_bits set_action_in;
4813 struct mlx5_ifc_add_action_in_bits add_action_in;
4814 u8 reserved_at_0[0x40];
4815};
4816
4817enum {
4818 MLX5_ACTION_TYPE_SET = 0x1,
4819 MLX5_ACTION_TYPE_ADD = 0x2,
4820};
4821
4822enum {
4823 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4824 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4825 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4826 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4827 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4828 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4829 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4830 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4831 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4832 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4833 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4834 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4835 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4836 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4837 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4838 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4839 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4840 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4841 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4842 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4843 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4844 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004845 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004846};
4847
4848struct mlx5_ifc_alloc_modify_header_context_out_bits {
4849 u8 status[0x8];
4850 u8 reserved_at_8[0x18];
4851
4852 u8 syndrome[0x20];
4853
4854 u8 modify_header_id[0x20];
4855
4856 u8 reserved_at_60[0x20];
4857};
4858
4859struct mlx5_ifc_alloc_modify_header_context_in_bits {
4860 u8 opcode[0x10];
4861 u8 reserved_at_10[0x10];
4862
4863 u8 reserved_at_20[0x10];
4864 u8 op_mod[0x10];
4865
4866 u8 reserved_at_40[0x20];
4867
4868 u8 table_type[0x8];
4869 u8 reserved_at_68[0x10];
4870 u8 num_of_actions[0x8];
4871
4872 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4873};
4874
4875struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4876 u8 status[0x8];
4877 u8 reserved_at_8[0x18];
4878
4879 u8 syndrome[0x20];
4880
4881 u8 reserved_at_40[0x40];
4882};
4883
4884struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4885 u8 opcode[0x10];
4886 u8 reserved_at_10[0x10];
4887
4888 u8 reserved_at_20[0x10];
4889 u8 op_mod[0x10];
4890
4891 u8 modify_header_id[0x20];
4892
4893 u8 reserved_at_60[0x20];
4894};
4895
Saeed Mahameede2816822015-05-28 22:28:40 +03004896struct mlx5_ifc_query_dct_out_bits {
4897 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004898 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004899
4900 u8 syndrome[0x20];
4901
Matan Barakb4ff3a32016-02-09 14:57:42 +02004902 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004903
4904 struct mlx5_ifc_dctc_bits dct_context_entry;
4905
Matan Barakb4ff3a32016-02-09 14:57:42 +02004906 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004907};
4908
4909struct mlx5_ifc_query_dct_in_bits {
4910 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004911 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004912
Matan Barakb4ff3a32016-02-09 14:57:42 +02004913 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004914 u8 op_mod[0x10];
4915
Matan Barakb4ff3a32016-02-09 14:57:42 +02004916 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004917 u8 dctn[0x18];
4918
Matan Barakb4ff3a32016-02-09 14:57:42 +02004919 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004920};
4921
4922struct mlx5_ifc_query_cq_out_bits {
4923 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004924 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004925
4926 u8 syndrome[0x20];
4927
Matan Barakb4ff3a32016-02-09 14:57:42 +02004928 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004929
4930 struct mlx5_ifc_cqc_bits cq_context;
4931
Matan Barakb4ff3a32016-02-09 14:57:42 +02004932 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004933
4934 u8 pas[0][0x40];
4935};
4936
4937struct mlx5_ifc_query_cq_in_bits {
4938 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004939 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004940
Matan Barakb4ff3a32016-02-09 14:57:42 +02004941 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004942 u8 op_mod[0x10];
4943
Matan Barakb4ff3a32016-02-09 14:57:42 +02004944 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004945 u8 cqn[0x18];
4946
Matan Barakb4ff3a32016-02-09 14:57:42 +02004947 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004948};
4949
4950struct mlx5_ifc_query_cong_status_out_bits {
4951 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004952 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004953
4954 u8 syndrome[0x20];
4955
Matan Barakb4ff3a32016-02-09 14:57:42 +02004956 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004957
4958 u8 enable[0x1];
4959 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004960 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004961};
4962
4963struct mlx5_ifc_query_cong_status_in_bits {
4964 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004965 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004966
Matan Barakb4ff3a32016-02-09 14:57:42 +02004967 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004968 u8 op_mod[0x10];
4969
Matan Barakb4ff3a32016-02-09 14:57:42 +02004970 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004971 u8 priority[0x4];
4972 u8 cong_protocol[0x4];
4973
Matan Barakb4ff3a32016-02-09 14:57:42 +02004974 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004975};
4976
4977struct mlx5_ifc_query_cong_statistics_out_bits {
4978 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004979 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004980
4981 u8 syndrome[0x20];
4982
Matan Barakb4ff3a32016-02-09 14:57:42 +02004983 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004984
Parav Pandite1f24a72017-04-16 07:29:29 +03004985 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004986
4987 u8 sum_flows[0x20];
4988
Parav Pandite1f24a72017-04-16 07:29:29 +03004989 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004990
Parav Pandite1f24a72017-04-16 07:29:29 +03004991 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004992
Parav Pandite1f24a72017-04-16 07:29:29 +03004993 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004994
Parav Pandite1f24a72017-04-16 07:29:29 +03004995 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004996
Matan Barakb4ff3a32016-02-09 14:57:42 +02004997 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004998
4999 u8 time_stamp_high[0x20];
5000
5001 u8 time_stamp_low[0x20];
5002
5003 u8 accumulators_period[0x20];
5004
Parav Pandite1f24a72017-04-16 07:29:29 +03005005 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005006
Parav Pandite1f24a72017-04-16 07:29:29 +03005007 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005008
Parav Pandite1f24a72017-04-16 07:29:29 +03005009 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005010
Parav Pandite1f24a72017-04-16 07:29:29 +03005011 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005012
Matan Barakb4ff3a32016-02-09 14:57:42 +02005013 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03005014};
5015
5016struct mlx5_ifc_query_cong_statistics_in_bits {
5017 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005018 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005019
Matan Barakb4ff3a32016-02-09 14:57:42 +02005020 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005021 u8 op_mod[0x10];
5022
5023 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005024 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03005025
Matan Barakb4ff3a32016-02-09 14:57:42 +02005026 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005027};
5028
5029struct mlx5_ifc_query_cong_params_out_bits {
5030 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005031 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005032
5033 u8 syndrome[0x20];
5034
Matan Barakb4ff3a32016-02-09 14:57:42 +02005035 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005036
5037 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5038};
5039
5040struct mlx5_ifc_query_cong_params_in_bits {
5041 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005042 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005043
Matan Barakb4ff3a32016-02-09 14:57:42 +02005044 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005045 u8 op_mod[0x10];
5046
Matan Barakb4ff3a32016-02-09 14:57:42 +02005047 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005048 u8 cong_protocol[0x4];
5049
Matan Barakb4ff3a32016-02-09 14:57:42 +02005050 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005051};
5052
5053struct mlx5_ifc_query_adapter_out_bits {
5054 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005055 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005056
5057 u8 syndrome[0x20];
5058
Matan Barakb4ff3a32016-02-09 14:57:42 +02005059 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005060
5061 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
5062};
5063
5064struct mlx5_ifc_query_adapter_in_bits {
5065 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005066 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005067
Matan Barakb4ff3a32016-02-09 14:57:42 +02005068 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005069 u8 op_mod[0x10];
5070
Matan Barakb4ff3a32016-02-09 14:57:42 +02005071 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005072};
5073
5074struct mlx5_ifc_qp_2rst_out_bits {
5075 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005076 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005077
5078 u8 syndrome[0x20];
5079
Matan Barakb4ff3a32016-02-09 14:57:42 +02005080 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005081};
5082
5083struct mlx5_ifc_qp_2rst_in_bits {
5084 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005085 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005086
Matan Barakb4ff3a32016-02-09 14:57:42 +02005087 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005088 u8 op_mod[0x10];
5089
Matan Barakb4ff3a32016-02-09 14:57:42 +02005090 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005091 u8 qpn[0x18];
5092
Matan Barakb4ff3a32016-02-09 14:57:42 +02005093 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005094};
5095
5096struct mlx5_ifc_qp_2err_out_bits {
5097 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005098 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005099
5100 u8 syndrome[0x20];
5101
Matan Barakb4ff3a32016-02-09 14:57:42 +02005102 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005103};
5104
5105struct mlx5_ifc_qp_2err_in_bits {
5106 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005107 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005108
Matan Barakb4ff3a32016-02-09 14:57:42 +02005109 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005110 u8 op_mod[0x10];
5111
Matan Barakb4ff3a32016-02-09 14:57:42 +02005112 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005113 u8 qpn[0x18];
5114
Matan Barakb4ff3a32016-02-09 14:57:42 +02005115 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005116};
5117
5118struct mlx5_ifc_page_fault_resume_out_bits {
5119 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005120 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005121
5122 u8 syndrome[0x20];
5123
Matan Barakb4ff3a32016-02-09 14:57:42 +02005124 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005125};
5126
5127struct mlx5_ifc_page_fault_resume_in_bits {
5128 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005129 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005130
Matan Barakb4ff3a32016-02-09 14:57:42 +02005131 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005132 u8 op_mod[0x10];
5133
5134 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005135 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005136 u8 page_fault_type[0x3];
5137 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005138
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02005139 u8 reserved_at_60[0x8];
5140 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005141};
5142
5143struct mlx5_ifc_nop_out_bits {
5144 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005145 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005146
5147 u8 syndrome[0x20];
5148
Matan Barakb4ff3a32016-02-09 14:57:42 +02005149 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005150};
5151
5152struct mlx5_ifc_nop_in_bits {
5153 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005154 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005155
Matan Barakb4ff3a32016-02-09 14:57:42 +02005156 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005157 u8 op_mod[0x10];
5158
Matan Barakb4ff3a32016-02-09 14:57:42 +02005159 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005160};
5161
5162struct mlx5_ifc_modify_vport_state_out_bits {
5163 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005164 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005165
5166 u8 syndrome[0x20];
5167
Matan Barakb4ff3a32016-02-09 14:57:42 +02005168 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005169};
5170
5171struct mlx5_ifc_modify_vport_state_in_bits {
5172 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005173 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005174
Matan Barakb4ff3a32016-02-09 14:57:42 +02005175 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005176 u8 op_mod[0x10];
5177
5178 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005179 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005180 u8 vport_number[0x10];
5181
Matan Barakb4ff3a32016-02-09 14:57:42 +02005182 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005183 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005184 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005185};
5186
5187struct mlx5_ifc_modify_tis_out_bits {
5188 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005189 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005190
5191 u8 syndrome[0x20];
5192
Matan Barakb4ff3a32016-02-09 14:57:42 +02005193 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005194};
5195
majd@mellanox.com75850d02016-01-14 19:13:06 +02005196struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005197 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005198
Aviv Heller84df61e2016-05-10 13:47:50 +03005199 u8 reserved_at_20[0x1d];
5200 u8 lag_tx_port_affinity[0x1];
5201 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02005202 u8 prio[0x1];
5203};
5204
Saeed Mahameede2816822015-05-28 22:28:40 +03005205struct mlx5_ifc_modify_tis_in_bits {
5206 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005207 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005208
Matan Barakb4ff3a32016-02-09 14:57:42 +02005209 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005210 u8 op_mod[0x10];
5211
Matan Barakb4ff3a32016-02-09 14:57:42 +02005212 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005213 u8 tisn[0x18];
5214
Matan Barakb4ff3a32016-02-09 14:57:42 +02005215 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005216
majd@mellanox.com75850d02016-01-14 19:13:06 +02005217 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005218
Matan Barakb4ff3a32016-02-09 14:57:42 +02005219 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005220
5221 struct mlx5_ifc_tisc_bits ctx;
5222};
5223
Achiad Shochatd9eea402015-08-04 14:05:42 +03005224struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005225 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005226
Matan Barakb4ff3a32016-02-09 14:57:42 +02005227 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005228 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005229 u8 reserved_at_3c[0x1];
5230 u8 hash[0x1];
5231 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005232 u8 lro[0x1];
5233};
5234
Saeed Mahameede2816822015-05-28 22:28:40 +03005235struct mlx5_ifc_modify_tir_out_bits {
5236 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005237 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005238
5239 u8 syndrome[0x20];
5240
Matan Barakb4ff3a32016-02-09 14:57:42 +02005241 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005242};
5243
5244struct mlx5_ifc_modify_tir_in_bits {
5245 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005246 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005247
Matan Barakb4ff3a32016-02-09 14:57:42 +02005248 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005249 u8 op_mod[0x10];
5250
Matan Barakb4ff3a32016-02-09 14:57:42 +02005251 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005252 u8 tirn[0x18];
5253
Matan Barakb4ff3a32016-02-09 14:57:42 +02005254 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005255
Achiad Shochatd9eea402015-08-04 14:05:42 +03005256 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005257
Matan Barakb4ff3a32016-02-09 14:57:42 +02005258 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005259
5260 struct mlx5_ifc_tirc_bits ctx;
5261};
5262
5263struct mlx5_ifc_modify_sq_out_bits {
5264 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005265 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005266
5267 u8 syndrome[0x20];
5268
Matan Barakb4ff3a32016-02-09 14:57:42 +02005269 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005270};
5271
5272struct mlx5_ifc_modify_sq_in_bits {
5273 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005274 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005275
Matan Barakb4ff3a32016-02-09 14:57:42 +02005276 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005277 u8 op_mod[0x10];
5278
5279 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005280 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005281 u8 sqn[0x18];
5282
Matan Barakb4ff3a32016-02-09 14:57:42 +02005283 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005284
5285 u8 modify_bitmask[0x40];
5286
Matan Barakb4ff3a32016-02-09 14:57:42 +02005287 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005288
5289 struct mlx5_ifc_sqc_bits ctx;
5290};
5291
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005292struct mlx5_ifc_modify_scheduling_element_out_bits {
5293 u8 status[0x8];
5294 u8 reserved_at_8[0x18];
5295
5296 u8 syndrome[0x20];
5297
5298 u8 reserved_at_40[0x1c0];
5299};
5300
5301enum {
5302 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5303 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5304};
5305
5306struct mlx5_ifc_modify_scheduling_element_in_bits {
5307 u8 opcode[0x10];
5308 u8 reserved_at_10[0x10];
5309
5310 u8 reserved_at_20[0x10];
5311 u8 op_mod[0x10];
5312
5313 u8 scheduling_hierarchy[0x8];
5314 u8 reserved_at_48[0x18];
5315
5316 u8 scheduling_element_id[0x20];
5317
5318 u8 reserved_at_80[0x20];
5319
5320 u8 modify_bitmask[0x20];
5321
5322 u8 reserved_at_c0[0x40];
5323
5324 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5325
5326 u8 reserved_at_300[0x100];
5327};
5328
Saeed Mahameede2816822015-05-28 22:28:40 +03005329struct mlx5_ifc_modify_rqt_out_bits {
5330 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005331 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005332
5333 u8 syndrome[0x20];
5334
Matan Barakb4ff3a32016-02-09 14:57:42 +02005335 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005336};
5337
Achiad Shochat5c503682015-08-04 14:05:43 +03005338struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005339 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005340
Matan Barakb4ff3a32016-02-09 14:57:42 +02005341 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005342 u8 rqn_list[0x1];
5343};
5344
Saeed Mahameede2816822015-05-28 22:28:40 +03005345struct mlx5_ifc_modify_rqt_in_bits {
5346 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005347 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005348
Matan Barakb4ff3a32016-02-09 14:57:42 +02005349 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005350 u8 op_mod[0x10];
5351
Matan Barakb4ff3a32016-02-09 14:57:42 +02005352 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005353 u8 rqtn[0x18];
5354
Matan Barakb4ff3a32016-02-09 14:57:42 +02005355 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005356
Achiad Shochat5c503682015-08-04 14:05:43 +03005357 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005358
Matan Barakb4ff3a32016-02-09 14:57:42 +02005359 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005360
5361 struct mlx5_ifc_rqtc_bits ctx;
5362};
5363
5364struct mlx5_ifc_modify_rq_out_bits {
5365 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005366 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005367
5368 u8 syndrome[0x20];
5369
Matan Barakb4ff3a32016-02-09 14:57:42 +02005370 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005371};
5372
Alex Vesker83b502a2016-08-04 17:32:02 +03005373enum {
5374 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005375 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005376 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005377};
5378
Saeed Mahameede2816822015-05-28 22:28:40 +03005379struct mlx5_ifc_modify_rq_in_bits {
5380 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005381 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005382
Matan Barakb4ff3a32016-02-09 14:57:42 +02005383 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005384 u8 op_mod[0x10];
5385
5386 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005387 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005388 u8 rqn[0x18];
5389
Matan Barakb4ff3a32016-02-09 14:57:42 +02005390 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005391
5392 u8 modify_bitmask[0x40];
5393
Matan Barakb4ff3a32016-02-09 14:57:42 +02005394 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005395
5396 struct mlx5_ifc_rqc_bits ctx;
5397};
5398
5399struct mlx5_ifc_modify_rmp_out_bits {
5400 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005401 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005402
5403 u8 syndrome[0x20];
5404
Matan Barakb4ff3a32016-02-09 14:57:42 +02005405 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005406};
5407
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005408struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005409 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005410
Matan Barakb4ff3a32016-02-09 14:57:42 +02005411 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005412 u8 lwm[0x1];
5413};
5414
Saeed Mahameede2816822015-05-28 22:28:40 +03005415struct mlx5_ifc_modify_rmp_in_bits {
5416 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005417 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005418
Matan Barakb4ff3a32016-02-09 14:57:42 +02005419 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005420 u8 op_mod[0x10];
5421
5422 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005423 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005424 u8 rmpn[0x18];
5425
Matan Barakb4ff3a32016-02-09 14:57:42 +02005426 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005427
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005428 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005429
Matan Barakb4ff3a32016-02-09 14:57:42 +02005430 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005431
5432 struct mlx5_ifc_rmpc_bits ctx;
5433};
5434
5435struct mlx5_ifc_modify_nic_vport_context_out_bits {
5436 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005437 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005438
5439 u8 syndrome[0x20];
5440
Matan Barakb4ff3a32016-02-09 14:57:42 +02005441 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005442};
5443
5444struct mlx5_ifc_modify_nic_vport_field_select_bits {
Daniel Jurgens32f69e42018-01-04 17:25:36 +02005445 u8 reserved_at_0[0x12];
5446 u8 affiliation[0x1];
5447 u8 reserved_at_e[0x1];
Huy Nguyenbded7472017-05-30 09:42:53 +03005448 u8 disable_uc_local_lb[0x1];
5449 u8 disable_mc_local_lb[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +03005450 u8 node_guid[0x1];
5451 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005452 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005453 u8 mtu[0x1];
5454 u8 change_event[0x1];
5455 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005456 u8 permanent_address[0x1];
5457 u8 addresses_list[0x1];
5458 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005459 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005460};
5461
5462struct mlx5_ifc_modify_nic_vport_context_in_bits {
5463 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005464 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005465
Matan Barakb4ff3a32016-02-09 14:57:42 +02005466 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005467 u8 op_mod[0x10];
5468
5469 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005470 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005471 u8 vport_number[0x10];
5472
5473 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5474
Matan Barakb4ff3a32016-02-09 14:57:42 +02005475 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005476
5477 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5478};
5479
5480struct mlx5_ifc_modify_hca_vport_context_out_bits {
5481 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005482 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005483
5484 u8 syndrome[0x20];
5485
Matan Barakb4ff3a32016-02-09 14:57:42 +02005486 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005487};
5488
5489struct mlx5_ifc_modify_hca_vport_context_in_bits {
5490 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005491 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005492
Matan Barakb4ff3a32016-02-09 14:57:42 +02005493 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005494 u8 op_mod[0x10];
5495
5496 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005497 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005498 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005499 u8 vport_number[0x10];
5500
Matan Barakb4ff3a32016-02-09 14:57:42 +02005501 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005502
5503 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5504};
5505
5506struct mlx5_ifc_modify_cq_out_bits {
5507 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005508 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005509
5510 u8 syndrome[0x20];
5511
Matan Barakb4ff3a32016-02-09 14:57:42 +02005512 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005513};
5514
5515enum {
5516 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5517 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5518};
5519
5520struct mlx5_ifc_modify_cq_in_bits {
5521 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005522 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005523
Matan Barakb4ff3a32016-02-09 14:57:42 +02005524 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005525 u8 op_mod[0x10];
5526
Matan Barakb4ff3a32016-02-09 14:57:42 +02005527 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005528 u8 cqn[0x18];
5529
5530 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5531
5532 struct mlx5_ifc_cqc_bits cq_context;
5533
Matan Barakb4ff3a32016-02-09 14:57:42 +02005534 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005535
5536 u8 pas[0][0x40];
5537};
5538
5539struct mlx5_ifc_modify_cong_status_out_bits {
5540 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005541 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005542
5543 u8 syndrome[0x20];
5544
Matan Barakb4ff3a32016-02-09 14:57:42 +02005545 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005546};
5547
5548struct mlx5_ifc_modify_cong_status_in_bits {
5549 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005550 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005551
Matan Barakb4ff3a32016-02-09 14:57:42 +02005552 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005553 u8 op_mod[0x10];
5554
Matan Barakb4ff3a32016-02-09 14:57:42 +02005555 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005556 u8 priority[0x4];
5557 u8 cong_protocol[0x4];
5558
5559 u8 enable[0x1];
5560 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005561 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005562};
5563
5564struct mlx5_ifc_modify_cong_params_out_bits {
5565 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005566 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005567
5568 u8 syndrome[0x20];
5569
Matan Barakb4ff3a32016-02-09 14:57:42 +02005570 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005571};
5572
5573struct mlx5_ifc_modify_cong_params_in_bits {
5574 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005575 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005576
Matan Barakb4ff3a32016-02-09 14:57:42 +02005577 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005578 u8 op_mod[0x10];
5579
Matan Barakb4ff3a32016-02-09 14:57:42 +02005580 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005581 u8 cong_protocol[0x4];
5582
5583 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5584
Matan Barakb4ff3a32016-02-09 14:57:42 +02005585 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005586
5587 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5588};
5589
5590struct mlx5_ifc_manage_pages_out_bits {
5591 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005592 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005593
5594 u8 syndrome[0x20];
5595
5596 u8 output_num_entries[0x20];
5597
Matan Barakb4ff3a32016-02-09 14:57:42 +02005598 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005599
5600 u8 pas[0][0x40];
5601};
5602
5603enum {
5604 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5605 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5606 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5607};
5608
5609struct mlx5_ifc_manage_pages_in_bits {
5610 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005611 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005612
Matan Barakb4ff3a32016-02-09 14:57:42 +02005613 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005614 u8 op_mod[0x10];
5615
Matan Barakb4ff3a32016-02-09 14:57:42 +02005616 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005617 u8 function_id[0x10];
5618
5619 u8 input_num_entries[0x20];
5620
5621 u8 pas[0][0x40];
5622};
5623
5624struct mlx5_ifc_mad_ifc_out_bits {
5625 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005626 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005627
5628 u8 syndrome[0x20];
5629
Matan Barakb4ff3a32016-02-09 14:57:42 +02005630 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005631
5632 u8 response_mad_packet[256][0x8];
5633};
5634
5635struct mlx5_ifc_mad_ifc_in_bits {
5636 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005637 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005638
Matan Barakb4ff3a32016-02-09 14:57:42 +02005639 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005640 u8 op_mod[0x10];
5641
5642 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005643 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005644 u8 port[0x8];
5645
Matan Barakb4ff3a32016-02-09 14:57:42 +02005646 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005647
5648 u8 mad[256][0x8];
5649};
5650
5651struct mlx5_ifc_init_hca_out_bits {
5652 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005653 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005654
5655 u8 syndrome[0x20];
5656
Matan Barakb4ff3a32016-02-09 14:57:42 +02005657 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005658};
5659
5660struct mlx5_ifc_init_hca_in_bits {
5661 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005662 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005663
Matan Barakb4ff3a32016-02-09 14:57:42 +02005664 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005665 u8 op_mod[0x10];
5666
Matan Barakb4ff3a32016-02-09 14:57:42 +02005667 u8 reserved_at_40[0x40];
Daniel Jurgens8737f812018-01-04 17:25:32 +02005668 u8 sw_owner_id[4][0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005669};
5670
5671struct mlx5_ifc_init2rtr_qp_out_bits {
5672 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005673 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005674
5675 u8 syndrome[0x20];
5676
Matan Barakb4ff3a32016-02-09 14:57:42 +02005677 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005678};
5679
5680struct mlx5_ifc_init2rtr_qp_in_bits {
5681 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005682 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005683
Matan Barakb4ff3a32016-02-09 14:57:42 +02005684 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005685 u8 op_mod[0x10];
5686
Matan Barakb4ff3a32016-02-09 14:57:42 +02005687 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005688 u8 qpn[0x18];
5689
Matan Barakb4ff3a32016-02-09 14:57:42 +02005690 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005691
5692 u8 opt_param_mask[0x20];
5693
Matan Barakb4ff3a32016-02-09 14:57:42 +02005694 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005695
5696 struct mlx5_ifc_qpc_bits qpc;
5697
Matan Barakb4ff3a32016-02-09 14:57:42 +02005698 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005699};
5700
5701struct mlx5_ifc_init2init_qp_out_bits {
5702 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005703 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005704
5705 u8 syndrome[0x20];
5706
Matan Barakb4ff3a32016-02-09 14:57:42 +02005707 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005708};
5709
5710struct mlx5_ifc_init2init_qp_in_bits {
5711 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005712 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005713
Matan Barakb4ff3a32016-02-09 14:57:42 +02005714 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005715 u8 op_mod[0x10];
5716
Matan Barakb4ff3a32016-02-09 14:57:42 +02005717 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005718 u8 qpn[0x18];
5719
Matan Barakb4ff3a32016-02-09 14:57:42 +02005720 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005721
5722 u8 opt_param_mask[0x20];
5723
Matan Barakb4ff3a32016-02-09 14:57:42 +02005724 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005725
5726 struct mlx5_ifc_qpc_bits qpc;
5727
Matan Barakb4ff3a32016-02-09 14:57:42 +02005728 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005729};
5730
5731struct mlx5_ifc_get_dropped_packet_log_out_bits {
5732 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005733 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005734
5735 u8 syndrome[0x20];
5736
Matan Barakb4ff3a32016-02-09 14:57:42 +02005737 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005738
5739 u8 packet_headers_log[128][0x8];
5740
5741 u8 packet_syndrome[64][0x8];
5742};
5743
5744struct mlx5_ifc_get_dropped_packet_log_in_bits {
5745 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005746 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005747
Matan Barakb4ff3a32016-02-09 14:57:42 +02005748 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005749 u8 op_mod[0x10];
5750
Matan Barakb4ff3a32016-02-09 14:57:42 +02005751 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005752};
5753
5754struct mlx5_ifc_gen_eqe_in_bits {
5755 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005756 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005757
Matan Barakb4ff3a32016-02-09 14:57:42 +02005758 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005759 u8 op_mod[0x10];
5760
Matan Barakb4ff3a32016-02-09 14:57:42 +02005761 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005762 u8 eq_number[0x8];
5763
Matan Barakb4ff3a32016-02-09 14:57:42 +02005764 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005765
5766 u8 eqe[64][0x8];
5767};
5768
5769struct mlx5_ifc_gen_eq_out_bits {
5770 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005771 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005772
5773 u8 syndrome[0x20];
5774
Matan Barakb4ff3a32016-02-09 14:57:42 +02005775 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005776};
5777
5778struct mlx5_ifc_enable_hca_out_bits {
5779 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005780 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005781
5782 u8 syndrome[0x20];
5783
Matan Barakb4ff3a32016-02-09 14:57:42 +02005784 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005785};
5786
5787struct mlx5_ifc_enable_hca_in_bits {
5788 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005789 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005790
Matan Barakb4ff3a32016-02-09 14:57:42 +02005791 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005792 u8 op_mod[0x10];
5793
Matan Barakb4ff3a32016-02-09 14:57:42 +02005794 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005795 u8 function_id[0x10];
5796
Matan Barakb4ff3a32016-02-09 14:57:42 +02005797 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005798};
5799
5800struct mlx5_ifc_drain_dct_out_bits {
5801 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005802 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005803
5804 u8 syndrome[0x20];
5805
Matan Barakb4ff3a32016-02-09 14:57:42 +02005806 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005807};
5808
5809struct mlx5_ifc_drain_dct_in_bits {
5810 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005811 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005812
Matan Barakb4ff3a32016-02-09 14:57:42 +02005813 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005814 u8 op_mod[0x10];
5815
Matan Barakb4ff3a32016-02-09 14:57:42 +02005816 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005817 u8 dctn[0x18];
5818
Matan Barakb4ff3a32016-02-09 14:57:42 +02005819 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005820};
5821
5822struct mlx5_ifc_disable_hca_out_bits {
5823 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005824 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005825
5826 u8 syndrome[0x20];
5827
Matan Barakb4ff3a32016-02-09 14:57:42 +02005828 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005829};
5830
5831struct mlx5_ifc_disable_hca_in_bits {
5832 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005833 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005834
Matan Barakb4ff3a32016-02-09 14:57:42 +02005835 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005836 u8 op_mod[0x10];
5837
Matan Barakb4ff3a32016-02-09 14:57:42 +02005838 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005839 u8 function_id[0x10];
5840
Matan Barakb4ff3a32016-02-09 14:57:42 +02005841 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005842};
5843
5844struct mlx5_ifc_detach_from_mcg_out_bits {
5845 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005846 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005847
5848 u8 syndrome[0x20];
5849
Matan Barakb4ff3a32016-02-09 14:57:42 +02005850 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005851};
5852
5853struct mlx5_ifc_detach_from_mcg_in_bits {
5854 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005855 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005856
Matan Barakb4ff3a32016-02-09 14:57:42 +02005857 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005858 u8 op_mod[0x10];
5859
Matan Barakb4ff3a32016-02-09 14:57:42 +02005860 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005861 u8 qpn[0x18];
5862
Matan Barakb4ff3a32016-02-09 14:57:42 +02005863 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005864
5865 u8 multicast_gid[16][0x8];
5866};
5867
Saeed Mahameed74862162016-06-09 15:11:34 +03005868struct mlx5_ifc_destroy_xrq_out_bits {
5869 u8 status[0x8];
5870 u8 reserved_at_8[0x18];
5871
5872 u8 syndrome[0x20];
5873
5874 u8 reserved_at_40[0x40];
5875};
5876
5877struct mlx5_ifc_destroy_xrq_in_bits {
5878 u8 opcode[0x10];
5879 u8 reserved_at_10[0x10];
5880
5881 u8 reserved_at_20[0x10];
5882 u8 op_mod[0x10];
5883
5884 u8 reserved_at_40[0x8];
5885 u8 xrqn[0x18];
5886
5887 u8 reserved_at_60[0x20];
5888};
5889
Saeed Mahameede2816822015-05-28 22:28:40 +03005890struct mlx5_ifc_destroy_xrc_srq_out_bits {
5891 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005892 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005893
5894 u8 syndrome[0x20];
5895
Matan Barakb4ff3a32016-02-09 14:57:42 +02005896 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005897};
5898
5899struct mlx5_ifc_destroy_xrc_srq_in_bits {
5900 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005901 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005902
Matan Barakb4ff3a32016-02-09 14:57:42 +02005903 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005904 u8 op_mod[0x10];
5905
Matan Barakb4ff3a32016-02-09 14:57:42 +02005906 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005907 u8 xrc_srqn[0x18];
5908
Matan Barakb4ff3a32016-02-09 14:57:42 +02005909 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005910};
5911
5912struct mlx5_ifc_destroy_tis_out_bits {
5913 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005914 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005915
5916 u8 syndrome[0x20];
5917
Matan Barakb4ff3a32016-02-09 14:57:42 +02005918 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005919};
5920
5921struct mlx5_ifc_destroy_tis_in_bits {
5922 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005923 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005924
Matan Barakb4ff3a32016-02-09 14:57:42 +02005925 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005926 u8 op_mod[0x10];
5927
Matan Barakb4ff3a32016-02-09 14:57:42 +02005928 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005929 u8 tisn[0x18];
5930
Matan Barakb4ff3a32016-02-09 14:57:42 +02005931 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005932};
5933
5934struct mlx5_ifc_destroy_tir_out_bits {
5935 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005936 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005937
5938 u8 syndrome[0x20];
5939
Matan Barakb4ff3a32016-02-09 14:57:42 +02005940 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005941};
5942
5943struct mlx5_ifc_destroy_tir_in_bits {
5944 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005945 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005946
Matan Barakb4ff3a32016-02-09 14:57:42 +02005947 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005948 u8 op_mod[0x10];
5949
Matan Barakb4ff3a32016-02-09 14:57:42 +02005950 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005951 u8 tirn[0x18];
5952
Matan Barakb4ff3a32016-02-09 14:57:42 +02005953 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005954};
5955
5956struct mlx5_ifc_destroy_srq_out_bits {
5957 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005958 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005959
5960 u8 syndrome[0x20];
5961
Matan Barakb4ff3a32016-02-09 14:57:42 +02005962 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005963};
5964
5965struct mlx5_ifc_destroy_srq_in_bits {
5966 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005967 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005968
Matan Barakb4ff3a32016-02-09 14:57:42 +02005969 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005970 u8 op_mod[0x10];
5971
Matan Barakb4ff3a32016-02-09 14:57:42 +02005972 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005973 u8 srqn[0x18];
5974
Matan Barakb4ff3a32016-02-09 14:57:42 +02005975 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005976};
5977
5978struct mlx5_ifc_destroy_sq_out_bits {
5979 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005980 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005981
5982 u8 syndrome[0x20];
5983
Matan Barakb4ff3a32016-02-09 14:57:42 +02005984 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005985};
5986
5987struct mlx5_ifc_destroy_sq_in_bits {
5988 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005989 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005990
Matan Barakb4ff3a32016-02-09 14:57:42 +02005991 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005992 u8 op_mod[0x10];
5993
Matan Barakb4ff3a32016-02-09 14:57:42 +02005994 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005995 u8 sqn[0x18];
5996
Matan Barakb4ff3a32016-02-09 14:57:42 +02005997 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005998};
5999
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006000struct mlx5_ifc_destroy_scheduling_element_out_bits {
6001 u8 status[0x8];
6002 u8 reserved_at_8[0x18];
6003
6004 u8 syndrome[0x20];
6005
6006 u8 reserved_at_40[0x1c0];
6007};
6008
6009struct mlx5_ifc_destroy_scheduling_element_in_bits {
6010 u8 opcode[0x10];
6011 u8 reserved_at_10[0x10];
6012
6013 u8 reserved_at_20[0x10];
6014 u8 op_mod[0x10];
6015
6016 u8 scheduling_hierarchy[0x8];
6017 u8 reserved_at_48[0x18];
6018
6019 u8 scheduling_element_id[0x20];
6020
6021 u8 reserved_at_80[0x180];
6022};
6023
Saeed Mahameede2816822015-05-28 22:28:40 +03006024struct mlx5_ifc_destroy_rqt_out_bits {
6025 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006026 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006027
6028 u8 syndrome[0x20];
6029
Matan Barakb4ff3a32016-02-09 14:57:42 +02006030 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006031};
6032
6033struct mlx5_ifc_destroy_rqt_in_bits {
6034 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006035 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006036
Matan Barakb4ff3a32016-02-09 14:57:42 +02006037 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006038 u8 op_mod[0x10];
6039
Matan Barakb4ff3a32016-02-09 14:57:42 +02006040 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006041 u8 rqtn[0x18];
6042
Matan Barakb4ff3a32016-02-09 14:57:42 +02006043 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006044};
6045
6046struct mlx5_ifc_destroy_rq_out_bits {
6047 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006048 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006049
6050 u8 syndrome[0x20];
6051
Matan Barakb4ff3a32016-02-09 14:57:42 +02006052 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006053};
6054
6055struct mlx5_ifc_destroy_rq_in_bits {
6056 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006057 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006058
Matan Barakb4ff3a32016-02-09 14:57:42 +02006059 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006060 u8 op_mod[0x10];
6061
Matan Barakb4ff3a32016-02-09 14:57:42 +02006062 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006063 u8 rqn[0x18];
6064
Matan Barakb4ff3a32016-02-09 14:57:42 +02006065 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006066};
6067
Maor Gottliebc1e0bfc2017-05-30 10:29:11 +03006068struct mlx5_ifc_set_delay_drop_params_in_bits {
6069 u8 opcode[0x10];
6070 u8 reserved_at_10[0x10];
6071
6072 u8 reserved_at_20[0x10];
6073 u8 op_mod[0x10];
6074
6075 u8 reserved_at_40[0x20];
6076
6077 u8 reserved_at_60[0x10];
6078 u8 delay_drop_timeout[0x10];
6079};
6080
6081struct mlx5_ifc_set_delay_drop_params_out_bits {
6082 u8 status[0x8];
6083 u8 reserved_at_8[0x18];
6084
6085 u8 syndrome[0x20];
6086
6087 u8 reserved_at_40[0x40];
6088};
6089
Saeed Mahameede2816822015-05-28 22:28:40 +03006090struct mlx5_ifc_destroy_rmp_out_bits {
6091 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006092 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006093
6094 u8 syndrome[0x20];
6095
Matan Barakb4ff3a32016-02-09 14:57:42 +02006096 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006097};
6098
6099struct mlx5_ifc_destroy_rmp_in_bits {
6100 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006101 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006102
Matan Barakb4ff3a32016-02-09 14:57:42 +02006103 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006104 u8 op_mod[0x10];
6105
Matan Barakb4ff3a32016-02-09 14:57:42 +02006106 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006107 u8 rmpn[0x18];
6108
Matan Barakb4ff3a32016-02-09 14:57:42 +02006109 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006110};
6111
6112struct mlx5_ifc_destroy_qp_out_bits {
6113 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006114 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006115
6116 u8 syndrome[0x20];
6117
Matan Barakb4ff3a32016-02-09 14:57:42 +02006118 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006119};
6120
6121struct mlx5_ifc_destroy_qp_in_bits {
6122 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006123 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006124
Matan Barakb4ff3a32016-02-09 14:57:42 +02006125 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006126 u8 op_mod[0x10];
6127
Matan Barakb4ff3a32016-02-09 14:57:42 +02006128 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006129 u8 qpn[0x18];
6130
Matan Barakb4ff3a32016-02-09 14:57:42 +02006131 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006132};
6133
6134struct mlx5_ifc_destroy_psv_out_bits {
6135 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006136 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006137
6138 u8 syndrome[0x20];
6139
Matan Barakb4ff3a32016-02-09 14:57:42 +02006140 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006141};
6142
6143struct mlx5_ifc_destroy_psv_in_bits {
6144 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006145 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006146
Matan Barakb4ff3a32016-02-09 14:57:42 +02006147 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006148 u8 op_mod[0x10];
6149
Matan Barakb4ff3a32016-02-09 14:57:42 +02006150 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006151 u8 psvn[0x18];
6152
Matan Barakb4ff3a32016-02-09 14:57:42 +02006153 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006154};
6155
6156struct mlx5_ifc_destroy_mkey_out_bits {
6157 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006158 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006159
6160 u8 syndrome[0x20];
6161
Matan Barakb4ff3a32016-02-09 14:57:42 +02006162 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006163};
6164
6165struct mlx5_ifc_destroy_mkey_in_bits {
6166 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006167 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006168
Matan Barakb4ff3a32016-02-09 14:57:42 +02006169 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006170 u8 op_mod[0x10];
6171
Matan Barakb4ff3a32016-02-09 14:57:42 +02006172 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006173 u8 mkey_index[0x18];
6174
Matan Barakb4ff3a32016-02-09 14:57:42 +02006175 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006176};
6177
6178struct mlx5_ifc_destroy_flow_table_out_bits {
6179 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006180 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006181
6182 u8 syndrome[0x20];
6183
Matan Barakb4ff3a32016-02-09 14:57:42 +02006184 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006185};
6186
6187struct mlx5_ifc_destroy_flow_table_in_bits {
6188 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006189 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006190
Matan Barakb4ff3a32016-02-09 14:57:42 +02006191 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006192 u8 op_mod[0x10];
6193
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006194 u8 other_vport[0x1];
6195 u8 reserved_at_41[0xf];
6196 u8 vport_number[0x10];
6197
6198 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006199
6200 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006201 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006202
Matan Barakb4ff3a32016-02-09 14:57:42 +02006203 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006204 u8 table_id[0x18];
6205
Matan Barakb4ff3a32016-02-09 14:57:42 +02006206 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006207};
6208
6209struct mlx5_ifc_destroy_flow_group_out_bits {
6210 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006211 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006212
6213 u8 syndrome[0x20];
6214
Matan Barakb4ff3a32016-02-09 14:57:42 +02006215 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006216};
6217
6218struct mlx5_ifc_destroy_flow_group_in_bits {
6219 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006220 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006221
Matan Barakb4ff3a32016-02-09 14:57:42 +02006222 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006223 u8 op_mod[0x10];
6224
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006225 u8 other_vport[0x1];
6226 u8 reserved_at_41[0xf];
6227 u8 vport_number[0x10];
6228
6229 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006230
6231 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006232 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006233
Matan Barakb4ff3a32016-02-09 14:57:42 +02006234 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006235 u8 table_id[0x18];
6236
6237 u8 group_id[0x20];
6238
Matan Barakb4ff3a32016-02-09 14:57:42 +02006239 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03006240};
6241
6242struct mlx5_ifc_destroy_eq_out_bits {
6243 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006244 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006245
6246 u8 syndrome[0x20];
6247
Matan Barakb4ff3a32016-02-09 14:57:42 +02006248 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006249};
6250
6251struct mlx5_ifc_destroy_eq_in_bits {
6252 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006253 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006254
Matan Barakb4ff3a32016-02-09 14:57:42 +02006255 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006256 u8 op_mod[0x10];
6257
Matan Barakb4ff3a32016-02-09 14:57:42 +02006258 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006259 u8 eq_number[0x8];
6260
Matan Barakb4ff3a32016-02-09 14:57:42 +02006261 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006262};
6263
6264struct mlx5_ifc_destroy_dct_out_bits {
6265 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006266 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006267
6268 u8 syndrome[0x20];
6269
Matan Barakb4ff3a32016-02-09 14:57:42 +02006270 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006271};
6272
6273struct mlx5_ifc_destroy_dct_in_bits {
6274 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006275 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006276
Matan Barakb4ff3a32016-02-09 14:57:42 +02006277 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006278 u8 op_mod[0x10];
6279
Matan Barakb4ff3a32016-02-09 14:57:42 +02006280 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006281 u8 dctn[0x18];
6282
Matan Barakb4ff3a32016-02-09 14:57:42 +02006283 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006284};
6285
6286struct mlx5_ifc_destroy_cq_out_bits {
6287 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006288 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006289
6290 u8 syndrome[0x20];
6291
Matan Barakb4ff3a32016-02-09 14:57:42 +02006292 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006293};
6294
6295struct mlx5_ifc_destroy_cq_in_bits {
6296 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006297 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006298
Matan Barakb4ff3a32016-02-09 14:57:42 +02006299 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006300 u8 op_mod[0x10];
6301
Matan Barakb4ff3a32016-02-09 14:57:42 +02006302 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006303 u8 cqn[0x18];
6304
Matan Barakb4ff3a32016-02-09 14:57:42 +02006305 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006306};
6307
6308struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6309 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006310 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006311
6312 u8 syndrome[0x20];
6313
Matan Barakb4ff3a32016-02-09 14:57:42 +02006314 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006315};
6316
6317struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6318 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006319 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006320
Matan Barakb4ff3a32016-02-09 14:57:42 +02006321 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006322 u8 op_mod[0x10];
6323
Matan Barakb4ff3a32016-02-09 14:57:42 +02006324 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006325
Matan Barakb4ff3a32016-02-09 14:57:42 +02006326 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006327 u8 vxlan_udp_port[0x10];
6328};
6329
6330struct mlx5_ifc_delete_l2_table_entry_out_bits {
6331 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006332 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006333
6334 u8 syndrome[0x20];
6335
Matan Barakb4ff3a32016-02-09 14:57:42 +02006336 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006337};
6338
6339struct mlx5_ifc_delete_l2_table_entry_in_bits {
6340 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006341 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006342
Matan Barakb4ff3a32016-02-09 14:57:42 +02006343 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006344 u8 op_mod[0x10];
6345
Matan Barakb4ff3a32016-02-09 14:57:42 +02006346 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006347
Matan Barakb4ff3a32016-02-09 14:57:42 +02006348 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006349 u8 table_index[0x18];
6350
Matan Barakb4ff3a32016-02-09 14:57:42 +02006351 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006352};
6353
6354struct mlx5_ifc_delete_fte_out_bits {
6355 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006356 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006357
6358 u8 syndrome[0x20];
6359
Matan Barakb4ff3a32016-02-09 14:57:42 +02006360 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006361};
6362
6363struct mlx5_ifc_delete_fte_in_bits {
6364 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006365 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006366
Matan Barakb4ff3a32016-02-09 14:57:42 +02006367 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006368 u8 op_mod[0x10];
6369
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006370 u8 other_vport[0x1];
6371 u8 reserved_at_41[0xf];
6372 u8 vport_number[0x10];
6373
6374 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006375
6376 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006377 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006378
Matan Barakb4ff3a32016-02-09 14:57:42 +02006379 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006380 u8 table_id[0x18];
6381
Matan Barakb4ff3a32016-02-09 14:57:42 +02006382 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006383
6384 u8 flow_index[0x20];
6385
Matan Barakb4ff3a32016-02-09 14:57:42 +02006386 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006387};
6388
6389struct mlx5_ifc_dealloc_xrcd_out_bits {
6390 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006391 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006392
6393 u8 syndrome[0x20];
6394
Matan Barakb4ff3a32016-02-09 14:57:42 +02006395 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006396};
6397
6398struct mlx5_ifc_dealloc_xrcd_in_bits {
6399 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006400 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006401
Matan Barakb4ff3a32016-02-09 14:57:42 +02006402 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006403 u8 op_mod[0x10];
6404
Matan Barakb4ff3a32016-02-09 14:57:42 +02006405 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006406 u8 xrcd[0x18];
6407
Matan Barakb4ff3a32016-02-09 14:57:42 +02006408 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006409};
6410
6411struct mlx5_ifc_dealloc_uar_out_bits {
6412 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006413 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006414
6415 u8 syndrome[0x20];
6416
Matan Barakb4ff3a32016-02-09 14:57:42 +02006417 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006418};
6419
6420struct mlx5_ifc_dealloc_uar_in_bits {
6421 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006422 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006423
Matan Barakb4ff3a32016-02-09 14:57:42 +02006424 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006425 u8 op_mod[0x10];
6426
Matan Barakb4ff3a32016-02-09 14:57:42 +02006427 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006428 u8 uar[0x18];
6429
Matan Barakb4ff3a32016-02-09 14:57:42 +02006430 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006431};
6432
6433struct mlx5_ifc_dealloc_transport_domain_out_bits {
6434 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006435 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006436
6437 u8 syndrome[0x20];
6438
Matan Barakb4ff3a32016-02-09 14:57:42 +02006439 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006440};
6441
6442struct mlx5_ifc_dealloc_transport_domain_in_bits {
6443 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006444 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006445
Matan Barakb4ff3a32016-02-09 14:57:42 +02006446 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006447 u8 op_mod[0x10];
6448
Matan Barakb4ff3a32016-02-09 14:57:42 +02006449 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006450 u8 transport_domain[0x18];
6451
Matan Barakb4ff3a32016-02-09 14:57:42 +02006452 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006453};
6454
6455struct mlx5_ifc_dealloc_q_counter_out_bits {
6456 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006457 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006458
6459 u8 syndrome[0x20];
6460
Matan Barakb4ff3a32016-02-09 14:57:42 +02006461 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006462};
6463
6464struct mlx5_ifc_dealloc_q_counter_in_bits {
6465 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006466 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006467
Matan Barakb4ff3a32016-02-09 14:57:42 +02006468 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006469 u8 op_mod[0x10];
6470
Matan Barakb4ff3a32016-02-09 14:57:42 +02006471 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006472 u8 counter_set_id[0x8];
6473
Matan Barakb4ff3a32016-02-09 14:57:42 +02006474 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006475};
6476
6477struct mlx5_ifc_dealloc_pd_out_bits {
6478 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006479 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006480
6481 u8 syndrome[0x20];
6482
Matan Barakb4ff3a32016-02-09 14:57:42 +02006483 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006484};
6485
6486struct mlx5_ifc_dealloc_pd_in_bits {
6487 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006488 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006489
Matan Barakb4ff3a32016-02-09 14:57:42 +02006490 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006491 u8 op_mod[0x10];
6492
Matan Barakb4ff3a32016-02-09 14:57:42 +02006493 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006494 u8 pd[0x18];
6495
Matan Barakb4ff3a32016-02-09 14:57:42 +02006496 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006497};
6498
Amir Vadai9dc0b282016-05-13 12:55:39 +00006499struct mlx5_ifc_dealloc_flow_counter_out_bits {
6500 u8 status[0x8];
6501 u8 reserved_at_8[0x18];
6502
6503 u8 syndrome[0x20];
6504
6505 u8 reserved_at_40[0x40];
6506};
6507
6508struct mlx5_ifc_dealloc_flow_counter_in_bits {
6509 u8 opcode[0x10];
6510 u8 reserved_at_10[0x10];
6511
6512 u8 reserved_at_20[0x10];
6513 u8 op_mod[0x10];
6514
Rabie Louloua8ffcc72017-07-09 13:39:30 +03006515 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00006516
6517 u8 reserved_at_60[0x20];
6518};
6519
Saeed Mahameed74862162016-06-09 15:11:34 +03006520struct mlx5_ifc_create_xrq_out_bits {
6521 u8 status[0x8];
6522 u8 reserved_at_8[0x18];
6523
6524 u8 syndrome[0x20];
6525
6526 u8 reserved_at_40[0x8];
6527 u8 xrqn[0x18];
6528
6529 u8 reserved_at_60[0x20];
6530};
6531
6532struct mlx5_ifc_create_xrq_in_bits {
6533 u8 opcode[0x10];
6534 u8 reserved_at_10[0x10];
6535
6536 u8 reserved_at_20[0x10];
6537 u8 op_mod[0x10];
6538
6539 u8 reserved_at_40[0x40];
6540
6541 struct mlx5_ifc_xrqc_bits xrq_context;
6542};
6543
Saeed Mahameede2816822015-05-28 22:28:40 +03006544struct mlx5_ifc_create_xrc_srq_out_bits {
6545 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006546 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006547
6548 u8 syndrome[0x20];
6549
Matan Barakb4ff3a32016-02-09 14:57:42 +02006550 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006551 u8 xrc_srqn[0x18];
6552
Matan Barakb4ff3a32016-02-09 14:57:42 +02006553 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006554};
6555
6556struct mlx5_ifc_create_xrc_srq_in_bits {
6557 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006558 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006559
Matan Barakb4ff3a32016-02-09 14:57:42 +02006560 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006561 u8 op_mod[0x10];
6562
Matan Barakb4ff3a32016-02-09 14:57:42 +02006563 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006564
6565 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6566
Matan Barakb4ff3a32016-02-09 14:57:42 +02006567 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006568
6569 u8 pas[0][0x40];
6570};
6571
6572struct mlx5_ifc_create_tis_out_bits {
6573 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006574 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006575
6576 u8 syndrome[0x20];
6577
Matan Barakb4ff3a32016-02-09 14:57:42 +02006578 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006579 u8 tisn[0x18];
6580
Matan Barakb4ff3a32016-02-09 14:57:42 +02006581 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006582};
6583
6584struct mlx5_ifc_create_tis_in_bits {
6585 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006586 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006587
Matan Barakb4ff3a32016-02-09 14:57:42 +02006588 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006589 u8 op_mod[0x10];
6590
Matan Barakb4ff3a32016-02-09 14:57:42 +02006591 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006592
6593 struct mlx5_ifc_tisc_bits ctx;
6594};
6595
6596struct mlx5_ifc_create_tir_out_bits {
6597 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006598 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006599
6600 u8 syndrome[0x20];
6601
Matan Barakb4ff3a32016-02-09 14:57:42 +02006602 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006603 u8 tirn[0x18];
6604
Matan Barakb4ff3a32016-02-09 14:57:42 +02006605 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006606};
6607
6608struct mlx5_ifc_create_tir_in_bits {
6609 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006610 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006611
Matan Barakb4ff3a32016-02-09 14:57:42 +02006612 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006613 u8 op_mod[0x10];
6614
Matan Barakb4ff3a32016-02-09 14:57:42 +02006615 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006616
6617 struct mlx5_ifc_tirc_bits ctx;
6618};
6619
6620struct mlx5_ifc_create_srq_out_bits {
6621 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006622 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006623
6624 u8 syndrome[0x20];
6625
Matan Barakb4ff3a32016-02-09 14:57:42 +02006626 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006627 u8 srqn[0x18];
6628
Matan Barakb4ff3a32016-02-09 14:57:42 +02006629 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006630};
6631
6632struct mlx5_ifc_create_srq_in_bits {
6633 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006634 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006635
Matan Barakb4ff3a32016-02-09 14:57:42 +02006636 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006637 u8 op_mod[0x10];
6638
Matan Barakb4ff3a32016-02-09 14:57:42 +02006639 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006640
6641 struct mlx5_ifc_srqc_bits srq_context_entry;
6642
Matan Barakb4ff3a32016-02-09 14:57:42 +02006643 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006644
6645 u8 pas[0][0x40];
6646};
6647
6648struct mlx5_ifc_create_sq_out_bits {
6649 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006650 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006651
6652 u8 syndrome[0x20];
6653
Matan Barakb4ff3a32016-02-09 14:57:42 +02006654 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006655 u8 sqn[0x18];
6656
Matan Barakb4ff3a32016-02-09 14:57:42 +02006657 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006658};
6659
6660struct mlx5_ifc_create_sq_in_bits {
6661 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006662 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006663
Matan Barakb4ff3a32016-02-09 14:57:42 +02006664 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006665 u8 op_mod[0x10];
6666
Matan Barakb4ff3a32016-02-09 14:57:42 +02006667 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006668
6669 struct mlx5_ifc_sqc_bits ctx;
6670};
6671
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006672struct mlx5_ifc_create_scheduling_element_out_bits {
6673 u8 status[0x8];
6674 u8 reserved_at_8[0x18];
6675
6676 u8 syndrome[0x20];
6677
6678 u8 reserved_at_40[0x40];
6679
6680 u8 scheduling_element_id[0x20];
6681
6682 u8 reserved_at_a0[0x160];
6683};
6684
6685struct mlx5_ifc_create_scheduling_element_in_bits {
6686 u8 opcode[0x10];
6687 u8 reserved_at_10[0x10];
6688
6689 u8 reserved_at_20[0x10];
6690 u8 op_mod[0x10];
6691
6692 u8 scheduling_hierarchy[0x8];
6693 u8 reserved_at_48[0x18];
6694
6695 u8 reserved_at_60[0xa0];
6696
6697 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6698
6699 u8 reserved_at_300[0x100];
6700};
6701
Saeed Mahameede2816822015-05-28 22:28:40 +03006702struct mlx5_ifc_create_rqt_out_bits {
6703 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006704 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006705
6706 u8 syndrome[0x20];
6707
Matan Barakb4ff3a32016-02-09 14:57:42 +02006708 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006709 u8 rqtn[0x18];
6710
Matan Barakb4ff3a32016-02-09 14:57:42 +02006711 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006712};
6713
6714struct mlx5_ifc_create_rqt_in_bits {
6715 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006716 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006717
Matan Barakb4ff3a32016-02-09 14:57:42 +02006718 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006719 u8 op_mod[0x10];
6720
Matan Barakb4ff3a32016-02-09 14:57:42 +02006721 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006722
6723 struct mlx5_ifc_rqtc_bits rqt_context;
6724};
6725
6726struct mlx5_ifc_create_rq_out_bits {
6727 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006728 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006729
6730 u8 syndrome[0x20];
6731
Matan Barakb4ff3a32016-02-09 14:57:42 +02006732 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006733 u8 rqn[0x18];
6734
Matan Barakb4ff3a32016-02-09 14:57:42 +02006735 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006736};
6737
6738struct mlx5_ifc_create_rq_in_bits {
6739 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006740 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006741
Matan Barakb4ff3a32016-02-09 14:57:42 +02006742 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006743 u8 op_mod[0x10];
6744
Matan Barakb4ff3a32016-02-09 14:57:42 +02006745 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006746
6747 struct mlx5_ifc_rqc_bits ctx;
6748};
6749
6750struct mlx5_ifc_create_rmp_out_bits {
6751 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006752 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006753
6754 u8 syndrome[0x20];
6755
Matan Barakb4ff3a32016-02-09 14:57:42 +02006756 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006757 u8 rmpn[0x18];
6758
Matan Barakb4ff3a32016-02-09 14:57:42 +02006759 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006760};
6761
6762struct mlx5_ifc_create_rmp_in_bits {
6763 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006764 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006765
Matan Barakb4ff3a32016-02-09 14:57:42 +02006766 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006767 u8 op_mod[0x10];
6768
Matan Barakb4ff3a32016-02-09 14:57:42 +02006769 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006770
6771 struct mlx5_ifc_rmpc_bits ctx;
6772};
6773
6774struct mlx5_ifc_create_qp_out_bits {
6775 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006776 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006777
6778 u8 syndrome[0x20];
6779
Matan Barakb4ff3a32016-02-09 14:57:42 +02006780 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006781 u8 qpn[0x18];
6782
Matan Barakb4ff3a32016-02-09 14:57:42 +02006783 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006784};
6785
6786struct mlx5_ifc_create_qp_in_bits {
6787 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006788 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006789
Matan Barakb4ff3a32016-02-09 14:57:42 +02006790 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006791 u8 op_mod[0x10];
6792
Matan Barakb4ff3a32016-02-09 14:57:42 +02006793 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006794
6795 u8 opt_param_mask[0x20];
6796
Matan Barakb4ff3a32016-02-09 14:57:42 +02006797 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006798
6799 struct mlx5_ifc_qpc_bits qpc;
6800
Matan Barakb4ff3a32016-02-09 14:57:42 +02006801 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006802
6803 u8 pas[0][0x40];
6804};
6805
6806struct mlx5_ifc_create_psv_out_bits {
6807 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006808 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006809
6810 u8 syndrome[0x20];
6811
Matan Barakb4ff3a32016-02-09 14:57:42 +02006812 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006813
Matan Barakb4ff3a32016-02-09 14:57:42 +02006814 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006815 u8 psv0_index[0x18];
6816
Matan Barakb4ff3a32016-02-09 14:57:42 +02006817 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006818 u8 psv1_index[0x18];
6819
Matan Barakb4ff3a32016-02-09 14:57:42 +02006820 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006821 u8 psv2_index[0x18];
6822
Matan Barakb4ff3a32016-02-09 14:57:42 +02006823 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006824 u8 psv3_index[0x18];
6825};
6826
6827struct mlx5_ifc_create_psv_in_bits {
6828 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006829 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006830
Matan Barakb4ff3a32016-02-09 14:57:42 +02006831 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006832 u8 op_mod[0x10];
6833
6834 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006835 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006836 u8 pd[0x18];
6837
Matan Barakb4ff3a32016-02-09 14:57:42 +02006838 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006839};
6840
6841struct mlx5_ifc_create_mkey_out_bits {
6842 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006843 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006844
6845 u8 syndrome[0x20];
6846
Matan Barakb4ff3a32016-02-09 14:57:42 +02006847 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006848 u8 mkey_index[0x18];
6849
Matan Barakb4ff3a32016-02-09 14:57:42 +02006850 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006851};
6852
6853struct mlx5_ifc_create_mkey_in_bits {
6854 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006855 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006856
Matan Barakb4ff3a32016-02-09 14:57:42 +02006857 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006858 u8 op_mod[0x10];
6859
Matan Barakb4ff3a32016-02-09 14:57:42 +02006860 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006861
6862 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006863 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006864
6865 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6866
Matan Barakb4ff3a32016-02-09 14:57:42 +02006867 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006868
6869 u8 translations_octword_actual_size[0x20];
6870
Matan Barakb4ff3a32016-02-09 14:57:42 +02006871 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006872
6873 u8 klm_pas_mtt[0][0x20];
6874};
6875
6876struct mlx5_ifc_create_flow_table_out_bits {
6877 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006878 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006879
6880 u8 syndrome[0x20];
6881
Matan Barakb4ff3a32016-02-09 14:57:42 +02006882 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006883 u8 table_id[0x18];
6884
Matan Barakb4ff3a32016-02-09 14:57:42 +02006885 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006886};
6887
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006888struct mlx5_ifc_flow_table_context_bits {
6889 u8 encap_en[0x1];
6890 u8 decap_en[0x1];
6891 u8 reserved_at_2[0x2];
6892 u8 table_miss_action[0x4];
6893 u8 level[0x8];
6894 u8 reserved_at_10[0x8];
6895 u8 log_size[0x8];
6896
6897 u8 reserved_at_20[0x8];
6898 u8 table_miss_id[0x18];
6899
6900 u8 reserved_at_40[0x8];
6901 u8 lag_master_next_table_id[0x18];
6902
6903 u8 reserved_at_60[0xe0];
6904};
6905
Saeed Mahameede2816822015-05-28 22:28:40 +03006906struct mlx5_ifc_create_flow_table_in_bits {
6907 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006908 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006909
Matan Barakb4ff3a32016-02-09 14:57:42 +02006910 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006911 u8 op_mod[0x10];
6912
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006913 u8 other_vport[0x1];
6914 u8 reserved_at_41[0xf];
6915 u8 vport_number[0x10];
6916
6917 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006918
6919 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006920 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006921
Matan Barakb4ff3a32016-02-09 14:57:42 +02006922 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006923
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006924 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006925};
6926
6927struct mlx5_ifc_create_flow_group_out_bits {
6928 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006929 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006930
6931 u8 syndrome[0x20];
6932
Matan Barakb4ff3a32016-02-09 14:57:42 +02006933 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006934 u8 group_id[0x18];
6935
Matan Barakb4ff3a32016-02-09 14:57:42 +02006936 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006937};
6938
6939enum {
6940 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6941 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6942 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6943};
6944
6945struct mlx5_ifc_create_flow_group_in_bits {
6946 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006947 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006948
Matan Barakb4ff3a32016-02-09 14:57:42 +02006949 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006950 u8 op_mod[0x10];
6951
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006952 u8 other_vport[0x1];
6953 u8 reserved_at_41[0xf];
6954 u8 vport_number[0x10];
6955
6956 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006957
6958 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006959 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006960
Matan Barakb4ff3a32016-02-09 14:57:42 +02006961 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006962 u8 table_id[0x18];
6963
Matan Barakb4ff3a32016-02-09 14:57:42 +02006964 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006965
6966 u8 start_flow_index[0x20];
6967
Matan Barakb4ff3a32016-02-09 14:57:42 +02006968 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006969
6970 u8 end_flow_index[0x20];
6971
Matan Barakb4ff3a32016-02-09 14:57:42 +02006972 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006973
Matan Barakb4ff3a32016-02-09 14:57:42 +02006974 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006975 u8 match_criteria_enable[0x8];
6976
6977 struct mlx5_ifc_fte_match_param_bits match_criteria;
6978
Matan Barakb4ff3a32016-02-09 14:57:42 +02006979 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006980};
6981
6982struct mlx5_ifc_create_eq_out_bits {
6983 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006984 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006985
6986 u8 syndrome[0x20];
6987
Matan Barakb4ff3a32016-02-09 14:57:42 +02006988 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006989 u8 eq_number[0x8];
6990
Matan Barakb4ff3a32016-02-09 14:57:42 +02006991 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006992};
6993
6994struct mlx5_ifc_create_eq_in_bits {
6995 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006996 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006997
Matan Barakb4ff3a32016-02-09 14:57:42 +02006998 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006999 u8 op_mod[0x10];
7000
Matan Barakb4ff3a32016-02-09 14:57:42 +02007001 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007002
7003 struct mlx5_ifc_eqc_bits eq_context_entry;
7004
Matan Barakb4ff3a32016-02-09 14:57:42 +02007005 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007006
7007 u8 event_bitmask[0x40];
7008
Matan Barakb4ff3a32016-02-09 14:57:42 +02007009 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03007010
7011 u8 pas[0][0x40];
7012};
7013
7014struct mlx5_ifc_create_dct_out_bits {
7015 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007016 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007017
7018 u8 syndrome[0x20];
7019
Matan Barakb4ff3a32016-02-09 14:57:42 +02007020 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007021 u8 dctn[0x18];
7022
Matan Barakb4ff3a32016-02-09 14:57:42 +02007023 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007024};
7025
7026struct mlx5_ifc_create_dct_in_bits {
7027 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007028 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007029
Matan Barakb4ff3a32016-02-09 14:57:42 +02007030 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007031 u8 op_mod[0x10];
7032
Matan Barakb4ff3a32016-02-09 14:57:42 +02007033 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007034
7035 struct mlx5_ifc_dctc_bits dct_context_entry;
7036
Matan Barakb4ff3a32016-02-09 14:57:42 +02007037 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03007038};
7039
7040struct mlx5_ifc_create_cq_out_bits {
7041 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007042 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007043
7044 u8 syndrome[0x20];
7045
Matan Barakb4ff3a32016-02-09 14:57:42 +02007046 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007047 u8 cqn[0x18];
7048
Matan Barakb4ff3a32016-02-09 14:57:42 +02007049 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007050};
7051
7052struct mlx5_ifc_create_cq_in_bits {
7053 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007054 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007055
Matan Barakb4ff3a32016-02-09 14:57:42 +02007056 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007057 u8 op_mod[0x10];
7058
Matan Barakb4ff3a32016-02-09 14:57:42 +02007059 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007060
7061 struct mlx5_ifc_cqc_bits cq_context;
7062
Matan Barakb4ff3a32016-02-09 14:57:42 +02007063 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03007064
7065 u8 pas[0][0x40];
7066};
7067
7068struct mlx5_ifc_config_int_moderation_out_bits {
7069 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007070 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007071
7072 u8 syndrome[0x20];
7073
Matan Barakb4ff3a32016-02-09 14:57:42 +02007074 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007075 u8 min_delay[0xc];
7076 u8 int_vector[0x10];
7077
Matan Barakb4ff3a32016-02-09 14:57:42 +02007078 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007079};
7080
7081enum {
7082 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
7083 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
7084};
7085
7086struct mlx5_ifc_config_int_moderation_in_bits {
7087 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007088 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007089
Matan Barakb4ff3a32016-02-09 14:57:42 +02007090 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007091 u8 op_mod[0x10];
7092
Matan Barakb4ff3a32016-02-09 14:57:42 +02007093 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007094 u8 min_delay[0xc];
7095 u8 int_vector[0x10];
7096
Matan Barakb4ff3a32016-02-09 14:57:42 +02007097 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007098};
7099
7100struct mlx5_ifc_attach_to_mcg_out_bits {
7101 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007102 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007103
7104 u8 syndrome[0x20];
7105
Matan Barakb4ff3a32016-02-09 14:57:42 +02007106 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007107};
7108
7109struct mlx5_ifc_attach_to_mcg_in_bits {
7110 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007111 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007112
Matan Barakb4ff3a32016-02-09 14:57:42 +02007113 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007114 u8 op_mod[0x10];
7115
Matan Barakb4ff3a32016-02-09 14:57:42 +02007116 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007117 u8 qpn[0x18];
7118
Matan Barakb4ff3a32016-02-09 14:57:42 +02007119 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007120
7121 u8 multicast_gid[16][0x8];
7122};
7123
Saeed Mahameed74862162016-06-09 15:11:34 +03007124struct mlx5_ifc_arm_xrq_out_bits {
7125 u8 status[0x8];
7126 u8 reserved_at_8[0x18];
7127
7128 u8 syndrome[0x20];
7129
7130 u8 reserved_at_40[0x40];
7131};
7132
7133struct mlx5_ifc_arm_xrq_in_bits {
7134 u8 opcode[0x10];
7135 u8 reserved_at_10[0x10];
7136
7137 u8 reserved_at_20[0x10];
7138 u8 op_mod[0x10];
7139
7140 u8 reserved_at_40[0x8];
7141 u8 xrqn[0x18];
7142
7143 u8 reserved_at_60[0x10];
7144 u8 lwm[0x10];
7145};
7146
Saeed Mahameede2816822015-05-28 22:28:40 +03007147struct mlx5_ifc_arm_xrc_srq_out_bits {
7148 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007149 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007150
7151 u8 syndrome[0x20];
7152
Matan Barakb4ff3a32016-02-09 14:57:42 +02007153 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007154};
7155
7156enum {
7157 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
7158};
7159
7160struct mlx5_ifc_arm_xrc_srq_in_bits {
7161 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007162 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007163
Matan Barakb4ff3a32016-02-09 14:57:42 +02007164 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007165 u8 op_mod[0x10];
7166
Matan Barakb4ff3a32016-02-09 14:57:42 +02007167 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007168 u8 xrc_srqn[0x18];
7169
Matan Barakb4ff3a32016-02-09 14:57:42 +02007170 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007171 u8 lwm[0x10];
7172};
7173
7174struct mlx5_ifc_arm_rq_out_bits {
7175 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007176 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007177
7178 u8 syndrome[0x20];
7179
Matan Barakb4ff3a32016-02-09 14:57:42 +02007180 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007181};
7182
7183enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03007184 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
7185 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03007186};
7187
7188struct mlx5_ifc_arm_rq_in_bits {
7189 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007190 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007191
Matan Barakb4ff3a32016-02-09 14:57:42 +02007192 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007193 u8 op_mod[0x10];
7194
Matan Barakb4ff3a32016-02-09 14:57:42 +02007195 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007196 u8 srq_number[0x18];
7197
Matan Barakb4ff3a32016-02-09 14:57:42 +02007198 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007199 u8 lwm[0x10];
7200};
7201
7202struct mlx5_ifc_arm_dct_out_bits {
7203 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007204 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007205
7206 u8 syndrome[0x20];
7207
Matan Barakb4ff3a32016-02-09 14:57:42 +02007208 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007209};
7210
7211struct mlx5_ifc_arm_dct_in_bits {
7212 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007213 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007214
Matan Barakb4ff3a32016-02-09 14:57:42 +02007215 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007216 u8 op_mod[0x10];
7217
Matan Barakb4ff3a32016-02-09 14:57:42 +02007218 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007219 u8 dct_number[0x18];
7220
Matan Barakb4ff3a32016-02-09 14:57:42 +02007221 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007222};
7223
7224struct mlx5_ifc_alloc_xrcd_out_bits {
7225 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007226 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007227
7228 u8 syndrome[0x20];
7229
Matan Barakb4ff3a32016-02-09 14:57:42 +02007230 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007231 u8 xrcd[0x18];
7232
Matan Barakb4ff3a32016-02-09 14:57:42 +02007233 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007234};
7235
7236struct mlx5_ifc_alloc_xrcd_in_bits {
7237 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007238 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007239
Matan Barakb4ff3a32016-02-09 14:57:42 +02007240 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007241 u8 op_mod[0x10];
7242
Matan Barakb4ff3a32016-02-09 14:57:42 +02007243 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007244};
7245
7246struct mlx5_ifc_alloc_uar_out_bits {
7247 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007248 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007249
7250 u8 syndrome[0x20];
7251
Matan Barakb4ff3a32016-02-09 14:57:42 +02007252 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007253 u8 uar[0x18];
7254
Matan Barakb4ff3a32016-02-09 14:57:42 +02007255 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007256};
7257
7258struct mlx5_ifc_alloc_uar_in_bits {
7259 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007260 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007261
Matan Barakb4ff3a32016-02-09 14:57:42 +02007262 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007263 u8 op_mod[0x10];
7264
Matan Barakb4ff3a32016-02-09 14:57:42 +02007265 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007266};
7267
7268struct mlx5_ifc_alloc_transport_domain_out_bits {
7269 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007270 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007271
7272 u8 syndrome[0x20];
7273
Matan Barakb4ff3a32016-02-09 14:57:42 +02007274 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007275 u8 transport_domain[0x18];
7276
Matan Barakb4ff3a32016-02-09 14:57:42 +02007277 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007278};
7279
7280struct mlx5_ifc_alloc_transport_domain_in_bits {
7281 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007282 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007283
Matan Barakb4ff3a32016-02-09 14:57:42 +02007284 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007285 u8 op_mod[0x10];
7286
Matan Barakb4ff3a32016-02-09 14:57:42 +02007287 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007288};
7289
7290struct mlx5_ifc_alloc_q_counter_out_bits {
7291 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007292 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007293
7294 u8 syndrome[0x20];
7295
Matan Barakb4ff3a32016-02-09 14:57:42 +02007296 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007297 u8 counter_set_id[0x8];
7298
Matan Barakb4ff3a32016-02-09 14:57:42 +02007299 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007300};
7301
7302struct mlx5_ifc_alloc_q_counter_in_bits {
7303 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007304 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007305
Matan Barakb4ff3a32016-02-09 14:57:42 +02007306 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007307 u8 op_mod[0x10];
7308
Matan Barakb4ff3a32016-02-09 14:57:42 +02007309 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007310};
7311
7312struct mlx5_ifc_alloc_pd_out_bits {
7313 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007314 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007315
7316 u8 syndrome[0x20];
7317
Matan Barakb4ff3a32016-02-09 14:57:42 +02007318 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007319 u8 pd[0x18];
7320
Matan Barakb4ff3a32016-02-09 14:57:42 +02007321 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007322};
7323
7324struct mlx5_ifc_alloc_pd_in_bits {
7325 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007326 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007327
Matan Barakb4ff3a32016-02-09 14:57:42 +02007328 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007329 u8 op_mod[0x10];
7330
Matan Barakb4ff3a32016-02-09 14:57:42 +02007331 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007332};
7333
Amir Vadai9dc0b282016-05-13 12:55:39 +00007334struct mlx5_ifc_alloc_flow_counter_out_bits {
7335 u8 status[0x8];
7336 u8 reserved_at_8[0x18];
7337
7338 u8 syndrome[0x20];
7339
Rabie Louloua8ffcc72017-07-09 13:39:30 +03007340 u8 flow_counter_id[0x20];
Amir Vadai9dc0b282016-05-13 12:55:39 +00007341
7342 u8 reserved_at_60[0x20];
7343};
7344
7345struct mlx5_ifc_alloc_flow_counter_in_bits {
7346 u8 opcode[0x10];
7347 u8 reserved_at_10[0x10];
7348
7349 u8 reserved_at_20[0x10];
7350 u8 op_mod[0x10];
7351
7352 u8 reserved_at_40[0x40];
7353};
7354
Saeed Mahameede2816822015-05-28 22:28:40 +03007355struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7356 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007357 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007358
7359 u8 syndrome[0x20];
7360
Matan Barakb4ff3a32016-02-09 14:57:42 +02007361 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007362};
7363
7364struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7365 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007366 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007367
Matan Barakb4ff3a32016-02-09 14:57:42 +02007368 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007369 u8 op_mod[0x10];
7370
Matan Barakb4ff3a32016-02-09 14:57:42 +02007371 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007372
Matan Barakb4ff3a32016-02-09 14:57:42 +02007373 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007374 u8 vxlan_udp_port[0x10];
7375};
7376
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007377struct mlx5_ifc_set_pp_rate_limit_out_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007378 u8 status[0x8];
7379 u8 reserved_at_8[0x18];
7380
7381 u8 syndrome[0x20];
7382
7383 u8 reserved_at_40[0x40];
7384};
7385
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007386struct mlx5_ifc_set_pp_rate_limit_in_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +03007387 u8 opcode[0x10];
7388 u8 reserved_at_10[0x10];
7389
7390 u8 reserved_at_20[0x10];
7391 u8 op_mod[0x10];
7392
7393 u8 reserved_at_40[0x10];
7394 u8 rate_limit_index[0x10];
7395
7396 u8 reserved_at_60[0x20];
7397
7398 u8 rate_limit[0x20];
Eran Ben Elisha37e92a92017-11-13 10:11:27 +02007399
7400 u8 reserved_at_a0[0x160];
Saeed Mahameed74862162016-06-09 15:11:34 +03007401};
7402
Saeed Mahameede2816822015-05-28 22:28:40 +03007403struct mlx5_ifc_access_register_out_bits {
7404 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007405 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007406
7407 u8 syndrome[0x20];
7408
Matan Barakb4ff3a32016-02-09 14:57:42 +02007409 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007410
7411 u8 register_data[0][0x20];
7412};
7413
7414enum {
7415 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7416 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7417};
7418
7419struct mlx5_ifc_access_register_in_bits {
7420 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007421 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007422
Matan Barakb4ff3a32016-02-09 14:57:42 +02007423 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007424 u8 op_mod[0x10];
7425
Matan Barakb4ff3a32016-02-09 14:57:42 +02007426 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007427 u8 register_id[0x10];
7428
7429 u8 argument[0x20];
7430
7431 u8 register_data[0][0x20];
7432};
7433
7434struct mlx5_ifc_sltp_reg_bits {
7435 u8 status[0x4];
7436 u8 version[0x4];
7437 u8 local_port[0x8];
7438 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007439 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007440 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007441 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007442
Matan Barakb4ff3a32016-02-09 14:57:42 +02007443 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007444
Matan Barakb4ff3a32016-02-09 14:57:42 +02007445 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007446 u8 polarity[0x1];
7447 u8 ob_tap0[0x8];
7448 u8 ob_tap1[0x8];
7449 u8 ob_tap2[0x8];
7450
Matan Barakb4ff3a32016-02-09 14:57:42 +02007451 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007452 u8 ob_preemp_mode[0x4];
7453 u8 ob_reg[0x8];
7454 u8 ob_bias[0x8];
7455
Matan Barakb4ff3a32016-02-09 14:57:42 +02007456 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007457};
7458
7459struct mlx5_ifc_slrg_reg_bits {
7460 u8 status[0x4];
7461 u8 version[0x4];
7462 u8 local_port[0x8];
7463 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007464 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007465 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007466 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007467
7468 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007469 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007470 u8 grade_lane_speed[0x4];
7471
7472 u8 grade_version[0x8];
7473 u8 grade[0x18];
7474
Matan Barakb4ff3a32016-02-09 14:57:42 +02007475 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007476 u8 height_grade_type[0x4];
7477 u8 height_grade[0x18];
7478
7479 u8 height_dz[0x10];
7480 u8 height_dv[0x10];
7481
Matan Barakb4ff3a32016-02-09 14:57:42 +02007482 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007483 u8 height_sigma[0x10];
7484
Matan Barakb4ff3a32016-02-09 14:57:42 +02007485 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007486
Matan Barakb4ff3a32016-02-09 14:57:42 +02007487 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007488 u8 phase_grade_type[0x4];
7489 u8 phase_grade[0x18];
7490
Matan Barakb4ff3a32016-02-09 14:57:42 +02007491 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007492 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007493 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007494 u8 phase_eo_neg[0x8];
7495
7496 u8 ffe_set_tested[0x10];
7497 u8 test_errors_per_lane[0x10];
7498};
7499
7500struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007501 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007502 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007503 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007504
Matan Barakb4ff3a32016-02-09 14:57:42 +02007505 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007506 u8 vl_hw_cap[0x4];
7507
Matan Barakb4ff3a32016-02-09 14:57:42 +02007508 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007509 u8 vl_admin[0x4];
7510
Matan Barakb4ff3a32016-02-09 14:57:42 +02007511 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007512 u8 vl_operational[0x4];
7513};
7514
7515struct mlx5_ifc_pude_reg_bits {
7516 u8 swid[0x8];
7517 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007518 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007519 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007520 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007521 u8 oper_status[0x4];
7522
Matan Barakb4ff3a32016-02-09 14:57:42 +02007523 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007524};
7525
7526struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007527 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007528 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007529 u8 an_disable_cap[0x1];
7530 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007531 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007532 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007533 u8 proto_mask[0x3];
7534
Saeed Mahameed74862162016-06-09 15:11:34 +03007535 u8 an_status[0x4];
7536 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007537
7538 u8 eth_proto_capability[0x20];
7539
7540 u8 ib_link_width_capability[0x10];
7541 u8 ib_proto_capability[0x10];
7542
Matan Barakb4ff3a32016-02-09 14:57:42 +02007543 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007544
7545 u8 eth_proto_admin[0x20];
7546
7547 u8 ib_link_width_admin[0x10];
7548 u8 ib_proto_admin[0x10];
7549
Matan Barakb4ff3a32016-02-09 14:57:42 +02007550 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007551
7552 u8 eth_proto_oper[0x20];
7553
7554 u8 ib_link_width_oper[0x10];
7555 u8 ib_proto_oper[0x10];
7556
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007557 u8 reserved_at_160[0x1c];
7558 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007559
7560 u8 eth_proto_lp_advertise[0x20];
7561
Matan Barakb4ff3a32016-02-09 14:57:42 +02007562 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007563};
7564
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007565struct mlx5_ifc_mlcr_reg_bits {
7566 u8 reserved_at_0[0x8];
7567 u8 local_port[0x8];
7568 u8 reserved_at_10[0x20];
7569
7570 u8 beacon_duration[0x10];
7571 u8 reserved_at_40[0x10];
7572
7573 u8 beacon_remain[0x10];
7574};
7575
Saeed Mahameede2816822015-05-28 22:28:40 +03007576struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007577 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007578
7579 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007580 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007581 u8 repetitions_mode[0x4];
7582 u8 num_of_repetitions[0x8];
7583
7584 u8 grade_version[0x8];
7585 u8 height_grade_type[0x4];
7586 u8 phase_grade_type[0x4];
7587 u8 height_grade_weight[0x8];
7588 u8 phase_grade_weight[0x8];
7589
7590 u8 gisim_measure_bits[0x10];
7591 u8 adaptive_tap_measure_bits[0x10];
7592
7593 u8 ber_bath_high_error_threshold[0x10];
7594 u8 ber_bath_mid_error_threshold[0x10];
7595
7596 u8 ber_bath_low_error_threshold[0x10];
7597 u8 one_ratio_high_threshold[0x10];
7598
7599 u8 one_ratio_high_mid_threshold[0x10];
7600 u8 one_ratio_low_mid_threshold[0x10];
7601
7602 u8 one_ratio_low_threshold[0x10];
7603 u8 ndeo_error_threshold[0x10];
7604
7605 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007606 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007607 u8 mix90_phase_for_voltage_bath[0x8];
7608
7609 u8 mixer_offset_start[0x10];
7610 u8 mixer_offset_end[0x10];
7611
Matan Barakb4ff3a32016-02-09 14:57:42 +02007612 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007613 u8 ber_test_time[0xb];
7614};
7615
7616struct mlx5_ifc_pspa_reg_bits {
7617 u8 swid[0x8];
7618 u8 local_port[0x8];
7619 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007620 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007621
Matan Barakb4ff3a32016-02-09 14:57:42 +02007622 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007623};
7624
7625struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007626 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007627 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007628 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007629 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007630 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007631 u8 mode[0x2];
7632
Matan Barakb4ff3a32016-02-09 14:57:42 +02007633 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007634
Matan Barakb4ff3a32016-02-09 14:57:42 +02007635 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007636 u8 min_threshold[0x10];
7637
Matan Barakb4ff3a32016-02-09 14:57:42 +02007638 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007639 u8 max_threshold[0x10];
7640
Matan Barakb4ff3a32016-02-09 14:57:42 +02007641 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007642 u8 mark_probability_denominator[0x10];
7643
Matan Barakb4ff3a32016-02-09 14:57:42 +02007644 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007645};
7646
7647struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007648 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007649 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007650 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007651
Matan Barakb4ff3a32016-02-09 14:57:42 +02007652 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007653
Matan Barakb4ff3a32016-02-09 14:57:42 +02007654 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007655 u8 wrps_admin[0x4];
7656
Matan Barakb4ff3a32016-02-09 14:57:42 +02007657 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007658 u8 wrps_status[0x4];
7659
Matan Barakb4ff3a32016-02-09 14:57:42 +02007660 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007661 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007662 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007663 u8 down_threshold[0x8];
7664
Matan Barakb4ff3a32016-02-09 14:57:42 +02007665 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007666
Matan Barakb4ff3a32016-02-09 14:57:42 +02007667 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007668 u8 srps_admin[0x4];
7669
Matan Barakb4ff3a32016-02-09 14:57:42 +02007670 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007671 u8 srps_status[0x4];
7672
Matan Barakb4ff3a32016-02-09 14:57:42 +02007673 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007674};
7675
7676struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007677 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007678 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007679 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007680
Matan Barakb4ff3a32016-02-09 14:57:42 +02007681 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007682 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007683 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007684 u8 lb_en[0x8];
7685};
7686
7687struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007688 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007689 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007690 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007691
Matan Barakb4ff3a32016-02-09 14:57:42 +02007692 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007693
7694 u8 port_profile_mode[0x8];
7695 u8 static_port_profile[0x8];
7696 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007697 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007698
7699 u8 retransmission_active[0x8];
7700 u8 fec_mode_active[0x18];
7701
Matan Barakb4ff3a32016-02-09 14:57:42 +02007702 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007703};
7704
7705struct mlx5_ifc_ppcnt_reg_bits {
7706 u8 swid[0x8];
7707 u8 local_port[0x8];
7708 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007709 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007710 u8 grp[0x6];
7711
7712 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007713 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007714 u8 prio_tc[0x3];
7715
7716 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7717};
7718
Gal Pressman8ed1a632016-11-17 13:46:01 +02007719struct mlx5_ifc_mpcnt_reg_bits {
7720 u8 reserved_at_0[0x8];
7721 u8 pcie_index[0x8];
7722 u8 reserved_at_10[0xa];
7723 u8 grp[0x6];
7724
7725 u8 clr[0x1];
7726 u8 reserved_at_21[0x1f];
7727
7728 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7729};
7730
Saeed Mahameede2816822015-05-28 22:28:40 +03007731struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007732 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007733 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007734 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007735 u8 local_port[0x8];
7736 u8 mac_47_32[0x10];
7737
7738 u8 mac_31_0[0x20];
7739
Matan Barakb4ff3a32016-02-09 14:57:42 +02007740 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007741};
7742
7743struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007744 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007745 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007746 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007747
7748 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007749 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007750
7751 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007752 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007753
7754 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007755 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007756};
7757
7758struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007759 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007760 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007761 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007762
Matan Barakb4ff3a32016-02-09 14:57:42 +02007763 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007764 u8 attenuation_5g[0x8];
7765
Matan Barakb4ff3a32016-02-09 14:57:42 +02007766 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007767 u8 attenuation_7g[0x8];
7768
Matan Barakb4ff3a32016-02-09 14:57:42 +02007769 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007770 u8 attenuation_12g[0x8];
7771};
7772
7773struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007774 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007775 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007776 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007777 u8 module_status[0x4];
7778
Matan Barakb4ff3a32016-02-09 14:57:42 +02007779 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007780};
7781
7782struct mlx5_ifc_pmpc_reg_bits {
7783 u8 module_state_updated[32][0x8];
7784};
7785
7786struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007787 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007788 u8 mlpn_status[0x4];
7789 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007790 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007791
7792 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007793 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007794};
7795
7796struct mlx5_ifc_pmlp_reg_bits {
7797 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007798 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007799 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007800 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007801 u8 width[0x8];
7802
7803 u8 lane0_module_mapping[0x20];
7804
7805 u8 lane1_module_mapping[0x20];
7806
7807 u8 lane2_module_mapping[0x20];
7808
7809 u8 lane3_module_mapping[0x20];
7810
Matan Barakb4ff3a32016-02-09 14:57:42 +02007811 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007812};
7813
7814struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007815 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007816 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007817 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007818 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007819 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007820 u8 oper_status[0x4];
7821
7822 u8 ase[0x1];
7823 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007824 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007825 u8 e[0x2];
7826
Matan Barakb4ff3a32016-02-09 14:57:42 +02007827 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007828};
7829
7830struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007831 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007832 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007833 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007834 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007835 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007836
Matan Barakb4ff3a32016-02-09 14:57:42 +02007837 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007838 u8 lane_speed[0x10];
7839
Matan Barakb4ff3a32016-02-09 14:57:42 +02007840 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007841 u8 lpbf[0x1];
7842 u8 fec_mode_policy[0x8];
7843
7844 u8 retransmission_capability[0x8];
7845 u8 fec_mode_capability[0x18];
7846
7847 u8 retransmission_support_admin[0x8];
7848 u8 fec_mode_support_admin[0x18];
7849
7850 u8 retransmission_request_admin[0x8];
7851 u8 fec_mode_request_admin[0x18];
7852
Matan Barakb4ff3a32016-02-09 14:57:42 +02007853 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007854};
7855
7856struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007857 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007858 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007859 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007860 u8 ib_port[0x8];
7861
Matan Barakb4ff3a32016-02-09 14:57:42 +02007862 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007863};
7864
7865struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007866 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007867 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007868 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007869 u8 lbf_mode[0x3];
7870
Matan Barakb4ff3a32016-02-09 14:57:42 +02007871 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007872};
7873
7874struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007875 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007876 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007877 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007878
7879 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007880 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007881 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007882 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007883};
7884
7885struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007886 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007887 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007888 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007889
Matan Barakb4ff3a32016-02-09 14:57:42 +02007890 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007891
7892 u8 port_filter[8][0x20];
7893
7894 u8 port_filter_update_en[8][0x20];
7895};
7896
7897struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007898 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007899 u8 local_port[0x8];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007900 u8 reserved_at_10[0xb];
7901 u8 ppan_mask_n[0x1];
7902 u8 minor_stall_mask[0x1];
7903 u8 critical_stall_mask[0x1];
7904 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007905
7906 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007907 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007908 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007909 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007910 u8 prio_mask_rx[0x8];
7911
7912 u8 pptx[0x1];
7913 u8 aptx[0x1];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007914 u8 pptx_mask_n[0x1];
7915 u8 reserved_at_43[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007916 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007917 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007918
7919 u8 pprx[0x1];
7920 u8 aprx[0x1];
Inbar Karmy2afa6092017-11-20 18:06:20 +02007921 u8 pprx_mask_n[0x1];
7922 u8 reserved_at_63[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007923 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007924 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007925
Inbar Karmy2afa6092017-11-20 18:06:20 +02007926 u8 device_stall_minor_watermark[0x10];
7927 u8 device_stall_critical_watermark[0x10];
7928
7929 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007930};
7931
7932struct mlx5_ifc_pelc_reg_bits {
7933 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007934 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007935 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007936 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007937
7938 u8 op_admin[0x8];
7939 u8 op_capability[0x8];
7940 u8 op_request[0x8];
7941 u8 op_active[0x8];
7942
7943 u8 admin[0x40];
7944
7945 u8 capability[0x40];
7946
7947 u8 request[0x40];
7948
7949 u8 active[0x40];
7950
Matan Barakb4ff3a32016-02-09 14:57:42 +02007951 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007952};
7953
7954struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007955 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007956 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007957 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007958
Matan Barakb4ff3a32016-02-09 14:57:42 +02007959 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007960 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007961 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007962
Matan Barakb4ff3a32016-02-09 14:57:42 +02007963 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007964 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007965 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007966 u8 error_type[0x8];
7967};
7968
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007969struct mlx5_ifc_pcam_enhanced_features_bits {
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03007970 u8 reserved_at_0[0x76];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007971
Inbar Karmy2fcb12d2017-08-17 16:39:47 +03007972 u8 pfcc_mask[0x1];
7973 u8 reserved_at_77[0x4];
Gal Pressman2dba0792017-06-18 14:56:45 +03007974 u8 rx_buffer_fullness_counters[0x1];
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007975 u8 ptys_connector_type[0x1];
7976 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007977 u8 ppcnt_discard_group[0x1];
7978 u8 ppcnt_statistical_group[0x1];
7979};
7980
7981struct mlx5_ifc_pcam_reg_bits {
7982 u8 reserved_at_0[0x8];
7983 u8 feature_group[0x8];
7984 u8 reserved_at_10[0x8];
7985 u8 access_reg_group[0x8];
7986
7987 u8 reserved_at_20[0x20];
7988
7989 union {
7990 u8 reserved_at_0[0x80];
7991 } port_access_reg_cap_mask;
7992
7993 u8 reserved_at_c0[0x80];
7994
7995 union {
7996 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7997 u8 reserved_at_0[0x80];
7998 } feature_cap_mask;
7999
8000 u8 reserved_at_1c0[0xc0];
8001};
8002
8003struct mlx5_ifc_mcam_enhanced_features_bits {
Gal Pressman5405fa22017-06-15 18:29:23 +03008004 u8 reserved_at_0[0x7b];
8005 u8 pcie_outbound_stalled[0x1];
Eran Ben Elishaefae7f72017-05-12 02:47:02 +03008006 u8 tx_overflow_buffer_pkt[0x1];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008007 u8 mtpps_enh_out_per_adj[0x1];
8008 u8 mtpps_fs[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008009 u8 pcie_performance_group[0x1];
8010};
8011
Or Gerlitz0ab87742017-06-11 15:25:38 +03008012struct mlx5_ifc_mcam_access_reg_bits {
8013 u8 reserved_at_0[0x1c];
8014 u8 mcda[0x1];
8015 u8 mcc[0x1];
8016 u8 mcqi[0x1];
8017 u8 reserved_at_1f[0x1];
8018
8019 u8 regs_95_to_64[0x20];
8020 u8 regs_63_to_32[0x20];
8021 u8 regs_31_to_0[0x20];
8022};
8023
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008024struct mlx5_ifc_mcam_reg_bits {
8025 u8 reserved_at_0[0x8];
8026 u8 feature_group[0x8];
8027 u8 reserved_at_10[0x8];
8028 u8 access_reg_group[0x8];
8029
8030 u8 reserved_at_20[0x20];
8031
8032 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03008033 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02008034 u8 reserved_at_0[0x80];
8035 } mng_access_reg_cap_mask;
8036
8037 u8 reserved_at_c0[0x80];
8038
8039 union {
8040 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
8041 u8 reserved_at_0[0x80];
8042 } mng_feature_cap_mask;
8043
8044 u8 reserved_at_1c0[0x80];
8045};
8046
Huy Nguyenc02762e2017-07-18 16:03:17 -05008047struct mlx5_ifc_qcam_access_reg_cap_mask {
8048 u8 qcam_access_reg_cap_mask_127_to_20[0x6C];
8049 u8 qpdpm[0x1];
8050 u8 qcam_access_reg_cap_mask_18_to_4[0x0F];
8051 u8 qdpm[0x1];
8052 u8 qpts[0x1];
8053 u8 qcap[0x1];
8054 u8 qcam_access_reg_cap_mask_0[0x1];
8055};
8056
8057struct mlx5_ifc_qcam_qos_feature_cap_mask {
8058 u8 qcam_qos_feature_cap_mask_127_to_1[0x7F];
8059 u8 qpts_trust_both[0x1];
8060};
8061
8062struct mlx5_ifc_qcam_reg_bits {
8063 u8 reserved_at_0[0x8];
8064 u8 feature_group[0x8];
8065 u8 reserved_at_10[0x8];
8066 u8 access_reg_group[0x8];
8067 u8 reserved_at_20[0x20];
8068
8069 union {
8070 struct mlx5_ifc_qcam_access_reg_cap_mask reg_cap;
8071 u8 reserved_at_0[0x80];
8072 } qos_access_reg_cap_mask;
8073
8074 u8 reserved_at_c0[0x80];
8075
8076 union {
8077 struct mlx5_ifc_qcam_qos_feature_cap_mask feature_cap;
8078 u8 reserved_at_0[0x80];
8079 } qos_feature_cap_mask;
8080
8081 u8 reserved_at_1c0[0x80];
8082};
8083
Saeed Mahameede2816822015-05-28 22:28:40 +03008084struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008085 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008086 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008087 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008088
8089 u8 port_capability_mask[4][0x20];
8090};
8091
8092struct mlx5_ifc_paos_reg_bits {
8093 u8 swid[0x8];
8094 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008095 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008096 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008097 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008098 u8 oper_status[0x4];
8099
8100 u8 ase[0x1];
8101 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008102 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03008103 u8 e[0x2];
8104
Matan Barakb4ff3a32016-02-09 14:57:42 +02008105 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008106};
8107
8108struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008109 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008110 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008111 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008112 u8 opamp_group_type[0x4];
8113
8114 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008115 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008116 u8 num_of_indices[0xc];
8117
8118 u8 index_data[18][0x10];
8119};
8120
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008121struct mlx5_ifc_pcmr_reg_bits {
8122 u8 reserved_at_0[0x8];
8123 u8 local_port[0x8];
8124 u8 reserved_at_10[0x2e];
8125 u8 fcs_cap[0x1];
8126 u8 reserved_at_3f[0x1f];
8127 u8 fcs_chk[0x1];
8128 u8 reserved_at_5f[0x1];
8129};
8130
Saeed Mahameede2816822015-05-28 22:28:40 +03008131struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008132 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008133 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008134 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008135 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008136 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008137 u8 module[0x8];
8138};
8139
8140struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008141 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008142 u8 lossy[0x1];
8143 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008144 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03008145 u8 size[0xc];
8146
8147 u8 xoff_threshold[0x10];
8148 u8 xon_threshold[0x10];
8149};
8150
8151struct mlx5_ifc_set_node_in_bits {
8152 u8 node_description[64][0x8];
8153};
8154
8155struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008156 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008157 u8 power_settings_level[0x8];
8158
Matan Barakb4ff3a32016-02-09 14:57:42 +02008159 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008160};
8161
8162struct mlx5_ifc_register_host_endianness_bits {
8163 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008164 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008165
Matan Barakb4ff3a32016-02-09 14:57:42 +02008166 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03008167};
8168
8169struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008170 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008171
8172 u8 mkey[0x20];
8173
8174 u8 addressh_63_32[0x20];
8175
8176 u8 addressl_31_0[0x20];
8177};
8178
8179struct mlx5_ifc_ud_adrs_vector_bits {
8180 u8 dc_key[0x40];
8181
8182 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008183 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008184 u8 destination_qp_dct[0x18];
8185
8186 u8 static_rate[0x4];
8187 u8 sl_eth_prio[0x4];
8188 u8 fl[0x1];
8189 u8 mlid[0x7];
8190 u8 rlid_udp_sport[0x10];
8191
Matan Barakb4ff3a32016-02-09 14:57:42 +02008192 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03008193
8194 u8 rmac_47_16[0x20];
8195
8196 u8 rmac_15_0[0x10];
8197 u8 tclass[0x8];
8198 u8 hop_limit[0x8];
8199
Matan Barakb4ff3a32016-02-09 14:57:42 +02008200 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03008201 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008202 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008203 u8 src_addr_index[0x8];
8204 u8 flow_label[0x14];
8205
8206 u8 rgid_rip[16][0x8];
8207};
8208
8209struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008210 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008211 u8 function_id[0x10];
8212
8213 u8 num_pages[0x20];
8214
Matan Barakb4ff3a32016-02-09 14:57:42 +02008215 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008216};
8217
8218struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02008219 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008220 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008221 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008222 u8 event_sub_type[0x8];
8223
Matan Barakb4ff3a32016-02-09 14:57:42 +02008224 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008225
8226 union mlx5_ifc_event_auto_bits event_data;
8227
Matan Barakb4ff3a32016-02-09 14:57:42 +02008228 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008229 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008230 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03008231 u8 owner[0x1];
8232};
8233
8234enum {
8235 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
8236};
8237
8238struct mlx5_ifc_cmd_queue_entry_bits {
8239 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008240 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008241
8242 u8 input_length[0x20];
8243
8244 u8 input_mailbox_pointer_63_32[0x20];
8245
8246 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008247 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008248
8249 u8 command_input_inline_data[16][0x8];
8250
8251 u8 command_output_inline_data[16][0x8];
8252
8253 u8 output_mailbox_pointer_63_32[0x20];
8254
8255 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008256 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03008257
8258 u8 output_length[0x20];
8259
8260 u8 token[0x8];
8261 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008262 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008263 u8 status[0x7];
8264 u8 ownership[0x1];
8265};
8266
8267struct mlx5_ifc_cmd_out_bits {
8268 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008269 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008270
8271 u8 syndrome[0x20];
8272
8273 u8 command_output[0x20];
8274};
8275
8276struct mlx5_ifc_cmd_in_bits {
8277 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008278 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008279
Matan Barakb4ff3a32016-02-09 14:57:42 +02008280 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03008281 u8 op_mod[0x10];
8282
8283 u8 command[0][0x20];
8284};
8285
8286struct mlx5_ifc_cmd_if_box_bits {
8287 u8 mailbox_data[512][0x8];
8288
Matan Barakb4ff3a32016-02-09 14:57:42 +02008289 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03008290
8291 u8 next_pointer_63_32[0x20];
8292
8293 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008294 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03008295
8296 u8 block_number[0x20];
8297
Matan Barakb4ff3a32016-02-09 14:57:42 +02008298 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008299 u8 token[0x8];
8300 u8 ctrl_signature[0x8];
8301 u8 signature[0x8];
8302};
8303
8304struct mlx5_ifc_mtt_bits {
8305 u8 ptag_63_32[0x20];
8306
8307 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008308 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008309 u8 wr_en[0x1];
8310 u8 rd_en[0x1];
8311};
8312
Tariq Toukan928cfe82016-02-22 18:17:29 +02008313struct mlx5_ifc_query_wol_rol_out_bits {
8314 u8 status[0x8];
8315 u8 reserved_at_8[0x18];
8316
8317 u8 syndrome[0x20];
8318
8319 u8 reserved_at_40[0x10];
8320 u8 rol_mode[0x8];
8321 u8 wol_mode[0x8];
8322
8323 u8 reserved_at_60[0x20];
8324};
8325
8326struct mlx5_ifc_query_wol_rol_in_bits {
8327 u8 opcode[0x10];
8328 u8 reserved_at_10[0x10];
8329
8330 u8 reserved_at_20[0x10];
8331 u8 op_mod[0x10];
8332
8333 u8 reserved_at_40[0x40];
8334};
8335
8336struct mlx5_ifc_set_wol_rol_out_bits {
8337 u8 status[0x8];
8338 u8 reserved_at_8[0x18];
8339
8340 u8 syndrome[0x20];
8341
8342 u8 reserved_at_40[0x40];
8343};
8344
8345struct mlx5_ifc_set_wol_rol_in_bits {
8346 u8 opcode[0x10];
8347 u8 reserved_at_10[0x10];
8348
8349 u8 reserved_at_20[0x10];
8350 u8 op_mod[0x10];
8351
8352 u8 rol_mode_valid[0x1];
8353 u8 wol_mode_valid[0x1];
8354 u8 reserved_at_42[0xe];
8355 u8 rol_mode[0x8];
8356 u8 wol_mode[0x8];
8357
8358 u8 reserved_at_60[0x20];
8359};
8360
Saeed Mahameede2816822015-05-28 22:28:40 +03008361enum {
8362 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8363 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8364 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8365};
8366
8367enum {
8368 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8369 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8370 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8371};
8372
8373enum {
8374 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8375 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8376 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8377 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8378 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8379 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8380 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8381 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8382 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8383 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8384 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8385};
8386
8387struct mlx5_ifc_initial_seg_bits {
8388 u8 fw_rev_minor[0x10];
8389 u8 fw_rev_major[0x10];
8390
8391 u8 cmd_interface_rev[0x10];
8392 u8 fw_rev_subminor[0x10];
8393
Matan Barakb4ff3a32016-02-09 14:57:42 +02008394 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008395
8396 u8 cmdq_phy_addr_63_32[0x20];
8397
8398 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008399 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008400 u8 nic_interface[0x2];
8401 u8 log_cmdq_size[0x4];
8402 u8 log_cmdq_stride[0x4];
8403
8404 u8 command_doorbell_vector[0x20];
8405
Matan Barakb4ff3a32016-02-09 14:57:42 +02008406 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008407
8408 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008409 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008410 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008411 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008412
8413 struct mlx5_ifc_health_buffer_bits health_buffer;
8414
8415 u8 no_dram_nic_offset[0x20];
8416
Matan Barakb4ff3a32016-02-09 14:57:42 +02008417 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008418
Matan Barakb4ff3a32016-02-09 14:57:42 +02008419 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008420 u8 clear_int[0x1];
8421
8422 u8 health_syndrome[0x8];
8423 u8 health_counter[0x18];
8424
Matan Barakb4ff3a32016-02-09 14:57:42 +02008425 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008426};
8427
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008428struct mlx5_ifc_mtpps_reg_bits {
8429 u8 reserved_at_0[0xc];
8430 u8 cap_number_of_pps_pins[0x4];
8431 u8 reserved_at_10[0x4];
8432 u8 cap_max_num_of_pps_in_pins[0x4];
8433 u8 reserved_at_18[0x4];
8434 u8 cap_max_num_of_pps_out_pins[0x4];
8435
8436 u8 reserved_at_20[0x24];
8437 u8 cap_pin_3_mode[0x4];
8438 u8 reserved_at_48[0x4];
8439 u8 cap_pin_2_mode[0x4];
8440 u8 reserved_at_50[0x4];
8441 u8 cap_pin_1_mode[0x4];
8442 u8 reserved_at_58[0x4];
8443 u8 cap_pin_0_mode[0x4];
8444
8445 u8 reserved_at_60[0x4];
8446 u8 cap_pin_7_mode[0x4];
8447 u8 reserved_at_68[0x4];
8448 u8 cap_pin_6_mode[0x4];
8449 u8 reserved_at_70[0x4];
8450 u8 cap_pin_5_mode[0x4];
8451 u8 reserved_at_78[0x4];
8452 u8 cap_pin_4_mode[0x4];
8453
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008454 u8 field_select[0x20];
8455 u8 reserved_at_a0[0x60];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008456
8457 u8 enable[0x1];
8458 u8 reserved_at_101[0xb];
8459 u8 pattern[0x4];
8460 u8 reserved_at_110[0x4];
8461 u8 pin_mode[0x4];
8462 u8 pin[0x8];
8463
8464 u8 reserved_at_120[0x20];
8465
8466 u8 time_stamp[0x40];
8467
8468 u8 out_pulse_duration[0x10];
8469 u8 out_periodic_adjustment[0x10];
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008470 u8 enhanced_out_periodic_adjustment[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008471
Eugenia Emantayevfa367682017-05-25 16:09:34 +03008472 u8 reserved_at_1c0[0x20];
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008473};
8474
8475struct mlx5_ifc_mtppse_reg_bits {
8476 u8 reserved_at_0[0x18];
8477 u8 pin[0x8];
8478 u8 event_arm[0x1];
8479 u8 reserved_at_21[0x1b];
8480 u8 event_generation_mode[0x4];
8481 u8 reserved_at_40[0x40];
8482};
8483
Or Gerlitz47176282017-04-18 13:35:39 +03008484struct mlx5_ifc_mcqi_cap_bits {
8485 u8 supported_info_bitmask[0x20];
8486
8487 u8 component_size[0x20];
8488
8489 u8 max_component_size[0x20];
8490
8491 u8 log_mcda_word_size[0x4];
8492 u8 reserved_at_64[0xc];
8493 u8 mcda_max_write_size[0x10];
8494
8495 u8 rd_en[0x1];
8496 u8 reserved_at_81[0x1];
8497 u8 match_chip_id[0x1];
8498 u8 match_psid[0x1];
8499 u8 check_user_timestamp[0x1];
8500 u8 match_base_guid_mac[0x1];
8501 u8 reserved_at_86[0x1a];
8502};
8503
8504struct mlx5_ifc_mcqi_reg_bits {
8505 u8 read_pending_component[0x1];
8506 u8 reserved_at_1[0xf];
8507 u8 component_index[0x10];
8508
8509 u8 reserved_at_20[0x20];
8510
8511 u8 reserved_at_40[0x1b];
8512 u8 info_type[0x5];
8513
8514 u8 info_size[0x20];
8515
8516 u8 offset[0x20];
8517
8518 u8 reserved_at_a0[0x10];
8519 u8 data_size[0x10];
8520
8521 u8 data[0][0x20];
8522};
8523
8524struct mlx5_ifc_mcc_reg_bits {
8525 u8 reserved_at_0[0x4];
8526 u8 time_elapsed_since_last_cmd[0xc];
8527 u8 reserved_at_10[0x8];
8528 u8 instruction[0x8];
8529
8530 u8 reserved_at_20[0x10];
8531 u8 component_index[0x10];
8532
8533 u8 reserved_at_40[0x8];
8534 u8 update_handle[0x18];
8535
8536 u8 handle_owner_type[0x4];
8537 u8 handle_owner_host_id[0x4];
8538 u8 reserved_at_68[0x1];
8539 u8 control_progress[0x7];
8540 u8 error_code[0x8];
8541 u8 reserved_at_78[0x4];
8542 u8 control_state[0x4];
8543
8544 u8 component_size[0x20];
8545
8546 u8 reserved_at_a0[0x60];
8547};
8548
8549struct mlx5_ifc_mcda_reg_bits {
8550 u8 reserved_at_0[0x8];
8551 u8 update_handle[0x18];
8552
8553 u8 offset[0x20];
8554
8555 u8 reserved_at_40[0x10];
8556 u8 size[0x10];
8557
8558 u8 reserved_at_60[0x20];
8559
8560 u8 data[0][0x20];
8561};
8562
Saeed Mahameede2816822015-05-28 22:28:40 +03008563union mlx5_ifc_ports_control_registers_document_bits {
8564 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8565 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8566 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8567 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8568 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8569 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8570 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8571 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8572 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8573 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8574 struct mlx5_ifc_paos_reg_bits paos_reg;
8575 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8576 struct mlx5_ifc_peir_reg_bits peir_reg;
8577 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8578 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008579 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008580 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8581 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8582 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8583 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8584 struct mlx5_ifc_plib_reg_bits plib_reg;
8585 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8586 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8587 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8588 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8589 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8590 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8591 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8592 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8593 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8594 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008595 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008596 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8597 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8598 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8599 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8600 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8601 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8602 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008603 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008604 struct mlx5_ifc_pude_reg_bits pude_reg;
8605 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8606 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8607 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008608 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8609 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008610 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008611 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8612 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008613 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8614 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8615 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008616 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008617};
8618
8619union mlx5_ifc_debug_enhancements_document_bits {
8620 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008621 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008622};
8623
8624union mlx5_ifc_uplink_pci_interface_document_bits {
8625 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008626 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008627};
8628
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008629struct mlx5_ifc_set_flow_table_root_out_bits {
8630 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008631 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008632
8633 u8 syndrome[0x20];
8634
Matan Barakb4ff3a32016-02-09 14:57:42 +02008635 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008636};
8637
8638struct mlx5_ifc_set_flow_table_root_in_bits {
8639 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008640 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008641
Matan Barakb4ff3a32016-02-09 14:57:42 +02008642 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008643 u8 op_mod[0x10];
8644
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008645 u8 other_vport[0x1];
8646 u8 reserved_at_41[0xf];
8647 u8 vport_number[0x10];
8648
8649 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008650
8651 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008652 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008653
Matan Barakb4ff3a32016-02-09 14:57:42 +02008654 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008655 u8 table_id[0x18];
8656
Erez Shitrit500a3d02017-04-13 06:36:51 +03008657 u8 reserved_at_c0[0x8];
8658 u8 underlay_qpn[0x18];
8659 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008660};
8661
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008662enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008663 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8664 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008665};
8666
8667struct mlx5_ifc_modify_flow_table_out_bits {
8668 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008669 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008670
8671 u8 syndrome[0x20];
8672
Matan Barakb4ff3a32016-02-09 14:57:42 +02008673 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008674};
8675
8676struct mlx5_ifc_modify_flow_table_in_bits {
8677 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008678 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008679
Matan Barakb4ff3a32016-02-09 14:57:42 +02008680 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008681 u8 op_mod[0x10];
8682
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008683 u8 other_vport[0x1];
8684 u8 reserved_at_41[0xf];
8685 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008686
Matan Barakb4ff3a32016-02-09 14:57:42 +02008687 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008688 u8 modify_field_select[0x10];
8689
8690 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008691 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008692
Matan Barakb4ff3a32016-02-09 14:57:42 +02008693 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008694 u8 table_id[0x18];
8695
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008696 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008697};
8698
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008699struct mlx5_ifc_ets_tcn_config_reg_bits {
8700 u8 g[0x1];
8701 u8 b[0x1];
8702 u8 r[0x1];
8703 u8 reserved_at_3[0x9];
8704 u8 group[0x4];
8705 u8 reserved_at_10[0x9];
8706 u8 bw_allocation[0x7];
8707
8708 u8 reserved_at_20[0xc];
8709 u8 max_bw_units[0x4];
8710 u8 reserved_at_30[0x8];
8711 u8 max_bw_value[0x8];
8712};
8713
8714struct mlx5_ifc_ets_global_config_reg_bits {
8715 u8 reserved_at_0[0x2];
8716 u8 r[0x1];
8717 u8 reserved_at_3[0x1d];
8718
8719 u8 reserved_at_20[0xc];
8720 u8 max_bw_units[0x4];
8721 u8 reserved_at_30[0x8];
8722 u8 max_bw_value[0x8];
8723};
8724
8725struct mlx5_ifc_qetc_reg_bits {
8726 u8 reserved_at_0[0x8];
8727 u8 port_number[0x8];
8728 u8 reserved_at_10[0x30];
8729
8730 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8731 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8732};
8733
Huy Nguyen415a64a2017-07-18 16:08:46 -05008734struct mlx5_ifc_qpdpm_dscp_reg_bits {
8735 u8 e[0x1];
8736 u8 reserved_at_01[0x0b];
8737 u8 prio[0x04];
8738};
8739
8740struct mlx5_ifc_qpdpm_reg_bits {
8741 u8 reserved_at_0[0x8];
8742 u8 local_port[0x8];
8743 u8 reserved_at_10[0x10];
8744 struct mlx5_ifc_qpdpm_dscp_reg_bits dscp[64];
8745};
8746
8747struct mlx5_ifc_qpts_reg_bits {
8748 u8 reserved_at_0[0x8];
8749 u8 local_port[0x8];
8750 u8 reserved_at_10[0x2d];
8751 u8 trust_state[0x3];
8752};
8753
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008754struct mlx5_ifc_qtct_reg_bits {
8755 u8 reserved_at_0[0x8];
8756 u8 port_number[0x8];
8757 u8 reserved_at_10[0xd];
8758 u8 prio[0x3];
8759
8760 u8 reserved_at_20[0x1d];
8761 u8 tclass[0x3];
8762};
8763
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008764struct mlx5_ifc_mcia_reg_bits {
8765 u8 l[0x1];
8766 u8 reserved_at_1[0x7];
8767 u8 module[0x8];
8768 u8 reserved_at_10[0x8];
8769 u8 status[0x8];
8770
8771 u8 i2c_device_address[0x8];
8772 u8 page_number[0x8];
8773 u8 device_address[0x10];
8774
8775 u8 reserved_at_40[0x10];
8776 u8 size[0x10];
8777
8778 u8 reserved_at_60[0x20];
8779
8780 u8 dword_0[0x20];
8781 u8 dword_1[0x20];
8782 u8 dword_2[0x20];
8783 u8 dword_3[0x20];
8784 u8 dword_4[0x20];
8785 u8 dword_5[0x20];
8786 u8 dword_6[0x20];
8787 u8 dword_7[0x20];
8788 u8 dword_8[0x20];
8789 u8 dword_9[0x20];
8790 u8 dword_10[0x20];
8791 u8 dword_11[0x20];
8792};
8793
Saeed Mahameed74862162016-06-09 15:11:34 +03008794struct mlx5_ifc_dcbx_param_bits {
8795 u8 dcbx_cee_cap[0x1];
8796 u8 dcbx_ieee_cap[0x1];
8797 u8 dcbx_standby_cap[0x1];
8798 u8 reserved_at_0[0x5];
8799 u8 port_number[0x8];
8800 u8 reserved_at_10[0xa];
8801 u8 max_application_table_size[6];
8802 u8 reserved_at_20[0x15];
8803 u8 version_oper[0x3];
8804 u8 reserved_at_38[5];
8805 u8 version_admin[0x3];
8806 u8 willing_admin[0x1];
8807 u8 reserved_at_41[0x3];
8808 u8 pfc_cap_oper[0x4];
8809 u8 reserved_at_48[0x4];
8810 u8 pfc_cap_admin[0x4];
8811 u8 reserved_at_50[0x4];
8812 u8 num_of_tc_oper[0x4];
8813 u8 reserved_at_58[0x4];
8814 u8 num_of_tc_admin[0x4];
8815 u8 remote_willing[0x1];
8816 u8 reserved_at_61[3];
8817 u8 remote_pfc_cap[4];
8818 u8 reserved_at_68[0x14];
8819 u8 remote_num_of_tc[0x4];
8820 u8 reserved_at_80[0x18];
8821 u8 error[0x8];
8822 u8 reserved_at_a0[0x160];
8823};
Aviv Heller84df61e2016-05-10 13:47:50 +03008824
8825struct mlx5_ifc_lagc_bits {
8826 u8 reserved_at_0[0x1d];
8827 u8 lag_state[0x3];
8828
8829 u8 reserved_at_20[0x14];
8830 u8 tx_remap_affinity_2[0x4];
8831 u8 reserved_at_38[0x4];
8832 u8 tx_remap_affinity_1[0x4];
8833};
8834
8835struct mlx5_ifc_create_lag_out_bits {
8836 u8 status[0x8];
8837 u8 reserved_at_8[0x18];
8838
8839 u8 syndrome[0x20];
8840
8841 u8 reserved_at_40[0x40];
8842};
8843
8844struct mlx5_ifc_create_lag_in_bits {
8845 u8 opcode[0x10];
8846 u8 reserved_at_10[0x10];
8847
8848 u8 reserved_at_20[0x10];
8849 u8 op_mod[0x10];
8850
8851 struct mlx5_ifc_lagc_bits ctx;
8852};
8853
8854struct mlx5_ifc_modify_lag_out_bits {
8855 u8 status[0x8];
8856 u8 reserved_at_8[0x18];
8857
8858 u8 syndrome[0x20];
8859
8860 u8 reserved_at_40[0x40];
8861};
8862
8863struct mlx5_ifc_modify_lag_in_bits {
8864 u8 opcode[0x10];
8865 u8 reserved_at_10[0x10];
8866
8867 u8 reserved_at_20[0x10];
8868 u8 op_mod[0x10];
8869
8870 u8 reserved_at_40[0x20];
8871 u8 field_select[0x20];
8872
8873 struct mlx5_ifc_lagc_bits ctx;
8874};
8875
8876struct mlx5_ifc_query_lag_out_bits {
8877 u8 status[0x8];
8878 u8 reserved_at_8[0x18];
8879
8880 u8 syndrome[0x20];
8881
8882 u8 reserved_at_40[0x40];
8883
8884 struct mlx5_ifc_lagc_bits ctx;
8885};
8886
8887struct mlx5_ifc_query_lag_in_bits {
8888 u8 opcode[0x10];
8889 u8 reserved_at_10[0x10];
8890
8891 u8 reserved_at_20[0x10];
8892 u8 op_mod[0x10];
8893
8894 u8 reserved_at_40[0x40];
8895};
8896
8897struct mlx5_ifc_destroy_lag_out_bits {
8898 u8 status[0x8];
8899 u8 reserved_at_8[0x18];
8900
8901 u8 syndrome[0x20];
8902
8903 u8 reserved_at_40[0x40];
8904};
8905
8906struct mlx5_ifc_destroy_lag_in_bits {
8907 u8 opcode[0x10];
8908 u8 reserved_at_10[0x10];
8909
8910 u8 reserved_at_20[0x10];
8911 u8 op_mod[0x10];
8912
8913 u8 reserved_at_40[0x40];
8914};
8915
8916struct mlx5_ifc_create_vport_lag_out_bits {
8917 u8 status[0x8];
8918 u8 reserved_at_8[0x18];
8919
8920 u8 syndrome[0x20];
8921
8922 u8 reserved_at_40[0x40];
8923};
8924
8925struct mlx5_ifc_create_vport_lag_in_bits {
8926 u8 opcode[0x10];
8927 u8 reserved_at_10[0x10];
8928
8929 u8 reserved_at_20[0x10];
8930 u8 op_mod[0x10];
8931
8932 u8 reserved_at_40[0x40];
8933};
8934
8935struct mlx5_ifc_destroy_vport_lag_out_bits {
8936 u8 status[0x8];
8937 u8 reserved_at_8[0x18];
8938
8939 u8 syndrome[0x20];
8940
8941 u8 reserved_at_40[0x40];
8942};
8943
8944struct mlx5_ifc_destroy_vport_lag_in_bits {
8945 u8 opcode[0x10];
8946 u8 reserved_at_10[0x10];
8947
8948 u8 reserved_at_20[0x10];
8949 u8 op_mod[0x10];
8950
8951 u8 reserved_at_40[0x40];
8952};
8953
Eli Cohend29b7962014-10-02 12:19:43 +03008954#endif /* MLX5_IFC_H */