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Eli Cohend29b7962014-10-02 12:19:43 +03001/*
Saeed Mahameede2816822015-05-28 22:28:40 +03002 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
Eli Cohend29b7962014-10-02 12:19:43 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Saeed Mahameede2816822015-05-28 22:28:40 +030031*/
Eli Cohend29b7962014-10-02 12:19:43 +030032#ifndef MLX5_IFC_H
33#define MLX5_IFC_H
34
Ilan Tayarie29341f2017-03-13 20:05:45 +020035#include "mlx5_ifc_fpga.h"
36
Eli Cohend29b7962014-10-02 12:19:43 +030037enum {
Saeed Mahameede2816822015-05-28 22:28:40 +030038 MLX5_EVENT_TYPE_CODING_COMPLETION_EVENTS = 0x0,
39 MLX5_EVENT_TYPE_CODING_PATH_MIGRATED_SUCCEEDED = 0x1,
40 MLX5_EVENT_TYPE_CODING_COMMUNICATION_ESTABLISHED = 0x2,
41 MLX5_EVENT_TYPE_CODING_SEND_QUEUE_DRAINED = 0x3,
42 MLX5_EVENT_TYPE_CODING_LAST_WQE_REACHED = 0x13,
43 MLX5_EVENT_TYPE_CODING_SRQ_LIMIT = 0x14,
44 MLX5_EVENT_TYPE_CODING_DCT_ALL_CONNECTIONS_CLOSED = 0x1c,
45 MLX5_EVENT_TYPE_CODING_DCT_ACCESS_KEY_VIOLATION = 0x1d,
46 MLX5_EVENT_TYPE_CODING_CQ_ERROR = 0x4,
47 MLX5_EVENT_TYPE_CODING_LOCAL_WQ_CATASTROPHIC_ERROR = 0x5,
48 MLX5_EVENT_TYPE_CODING_PATH_MIGRATION_FAILED = 0x7,
49 MLX5_EVENT_TYPE_CODING_PAGE_FAULT_EVENT = 0xc,
50 MLX5_EVENT_TYPE_CODING_INVALID_REQUEST_LOCAL_WQ_ERROR = 0x10,
51 MLX5_EVENT_TYPE_CODING_LOCAL_ACCESS_VIOLATION_WQ_ERROR = 0x11,
52 MLX5_EVENT_TYPE_CODING_LOCAL_SRQ_CATASTROPHIC_ERROR = 0x12,
53 MLX5_EVENT_TYPE_CODING_INTERNAL_ERROR = 0x8,
54 MLX5_EVENT_TYPE_CODING_PORT_STATE_CHANGE = 0x9,
55 MLX5_EVENT_TYPE_CODING_GPIO_EVENT = 0x15,
56 MLX5_EVENT_TYPE_CODING_REMOTE_CONFIGURATION_PROTOCOL_EVENT = 0x19,
57 MLX5_EVENT_TYPE_CODING_DOORBELL_BLUEFLAME_CONGESTION_EVENT = 0x1a,
58 MLX5_EVENT_TYPE_CODING_STALL_VL_EVENT = 0x1b,
59 MLX5_EVENT_TYPE_CODING_DROPPED_PACKET_LOGGED_EVENT = 0x1f,
60 MLX5_EVENT_TYPE_CODING_COMMAND_INTERFACE_COMPLETION = 0xa,
Ilan Tayarie29341f2017-03-13 20:05:45 +020061 MLX5_EVENT_TYPE_CODING_PAGE_REQUEST = 0xb,
62 MLX5_EVENT_TYPE_CODING_FPGA_ERROR = 0x20,
Saeed Mahameede2816822015-05-28 22:28:40 +030063};
64
65enum {
66 MLX5_MODIFY_TIR_BITMASK_LRO = 0x0,
67 MLX5_MODIFY_TIR_BITMASK_INDIRECT_TABLE = 0x1,
68 MLX5_MODIFY_TIR_BITMASK_HASH = 0x2,
69 MLX5_MODIFY_TIR_BITMASK_TUNNELED_OFFLOAD_EN = 0x3
70};
71
72enum {
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +020073 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
74 MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
75};
76
77enum {
Eli Cohend29b7962014-10-02 12:19:43 +030078 MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
79 MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
80 MLX5_CMD_OP_INIT_HCA = 0x102,
81 MLX5_CMD_OP_TEARDOWN_HCA = 0x103,
82 MLX5_CMD_OP_ENABLE_HCA = 0x104,
83 MLX5_CMD_OP_DISABLE_HCA = 0x105,
84 MLX5_CMD_OP_QUERY_PAGES = 0x107,
85 MLX5_CMD_OP_MANAGE_PAGES = 0x108,
86 MLX5_CMD_OP_SET_HCA_CAP = 0x109,
Saeed Mahameede2816822015-05-28 22:28:40 +030087 MLX5_CMD_OP_QUERY_ISSI = 0x10a,
88 MLX5_CMD_OP_SET_ISSI = 0x10b,
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +020089 MLX5_CMD_OP_SET_DRIVER_VERSION = 0x10d,
Eli Cohend29b7962014-10-02 12:19:43 +030090 MLX5_CMD_OP_CREATE_MKEY = 0x200,
91 MLX5_CMD_OP_QUERY_MKEY = 0x201,
92 MLX5_CMD_OP_DESTROY_MKEY = 0x202,
93 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS = 0x203,
94 MLX5_CMD_OP_PAGE_FAULT_RESUME = 0x204,
95 MLX5_CMD_OP_CREATE_EQ = 0x301,
96 MLX5_CMD_OP_DESTROY_EQ = 0x302,
97 MLX5_CMD_OP_QUERY_EQ = 0x303,
98 MLX5_CMD_OP_GEN_EQE = 0x304,
99 MLX5_CMD_OP_CREATE_CQ = 0x400,
100 MLX5_CMD_OP_DESTROY_CQ = 0x401,
101 MLX5_CMD_OP_QUERY_CQ = 0x402,
102 MLX5_CMD_OP_MODIFY_CQ = 0x403,
103 MLX5_CMD_OP_CREATE_QP = 0x500,
104 MLX5_CMD_OP_DESTROY_QP = 0x501,
105 MLX5_CMD_OP_RST2INIT_QP = 0x502,
106 MLX5_CMD_OP_INIT2RTR_QP = 0x503,
107 MLX5_CMD_OP_RTR2RTS_QP = 0x504,
108 MLX5_CMD_OP_RTS2RTS_QP = 0x505,
109 MLX5_CMD_OP_SQERR2RTS_QP = 0x506,
110 MLX5_CMD_OP_2ERR_QP = 0x507,
111 MLX5_CMD_OP_2RST_QP = 0x50a,
112 MLX5_CMD_OP_QUERY_QP = 0x50b,
Saeed Mahameede2816822015-05-28 22:28:40 +0300113 MLX5_CMD_OP_SQD_RTS_QP = 0x50c,
Eli Cohend29b7962014-10-02 12:19:43 +0300114 MLX5_CMD_OP_INIT2INIT_QP = 0x50e,
115 MLX5_CMD_OP_CREATE_PSV = 0x600,
116 MLX5_CMD_OP_DESTROY_PSV = 0x601,
117 MLX5_CMD_OP_CREATE_SRQ = 0x700,
118 MLX5_CMD_OP_DESTROY_SRQ = 0x701,
119 MLX5_CMD_OP_QUERY_SRQ = 0x702,
120 MLX5_CMD_OP_ARM_RQ = 0x703,
Saeed Mahameede2816822015-05-28 22:28:40 +0300121 MLX5_CMD_OP_CREATE_XRC_SRQ = 0x705,
122 MLX5_CMD_OP_DESTROY_XRC_SRQ = 0x706,
123 MLX5_CMD_OP_QUERY_XRC_SRQ = 0x707,
124 MLX5_CMD_OP_ARM_XRC_SRQ = 0x708,
Eli Cohend29b7962014-10-02 12:19:43 +0300125 MLX5_CMD_OP_CREATE_DCT = 0x710,
126 MLX5_CMD_OP_DESTROY_DCT = 0x711,
127 MLX5_CMD_OP_DRAIN_DCT = 0x712,
128 MLX5_CMD_OP_QUERY_DCT = 0x713,
129 MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION = 0x714,
Saeed Mahameed74862162016-06-09 15:11:34 +0300130 MLX5_CMD_OP_CREATE_XRQ = 0x717,
131 MLX5_CMD_OP_DESTROY_XRQ = 0x718,
132 MLX5_CMD_OP_QUERY_XRQ = 0x719,
133 MLX5_CMD_OP_ARM_XRQ = 0x71a,
Eli Cohend29b7962014-10-02 12:19:43 +0300134 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
135 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
136 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
137 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT = 0x753,
138 MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT = 0x754,
139 MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT = 0x755,
Saeed Mahameede2816822015-05-28 22:28:40 +0300140 MLX5_CMD_OP_QUERY_ROCE_ADDRESS = 0x760,
Eli Cohend29b7962014-10-02 12:19:43 +0300141 MLX5_CMD_OP_SET_ROCE_ADDRESS = 0x761,
Saeed Mahameede2816822015-05-28 22:28:40 +0300142 MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT = 0x762,
143 MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT = 0x763,
144 MLX5_CMD_OP_QUERY_HCA_VPORT_GID = 0x764,
145 MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY = 0x765,
Eli Cohend29b7962014-10-02 12:19:43 +0300146 MLX5_CMD_OP_QUERY_VPORT_COUNTER = 0x770,
147 MLX5_CMD_OP_ALLOC_Q_COUNTER = 0x771,
148 MLX5_CMD_OP_DEALLOC_Q_COUNTER = 0x772,
149 MLX5_CMD_OP_QUERY_Q_COUNTER = 0x773,
Saeed Mahameed74862162016-06-09 15:11:34 +0300150 MLX5_CMD_OP_SET_RATE_LIMIT = 0x780,
151 MLX5_CMD_OP_QUERY_RATE_LIMIT = 0x781,
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300152 MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT = 0x782,
153 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT = 0x783,
154 MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT = 0x784,
155 MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT = 0x785,
156 MLX5_CMD_OP_CREATE_QOS_PARA_VPORT = 0x786,
157 MLX5_CMD_OP_DESTROY_QOS_PARA_VPORT = 0x787,
Eli Cohend29b7962014-10-02 12:19:43 +0300158 MLX5_CMD_OP_ALLOC_PD = 0x800,
159 MLX5_CMD_OP_DEALLOC_PD = 0x801,
160 MLX5_CMD_OP_ALLOC_UAR = 0x802,
161 MLX5_CMD_OP_DEALLOC_UAR = 0x803,
162 MLX5_CMD_OP_CONFIG_INT_MODERATION = 0x804,
163 MLX5_CMD_OP_ACCESS_REG = 0x805,
164 MLX5_CMD_OP_ATTACH_TO_MCG = 0x806,
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300165 MLX5_CMD_OP_DETACH_FROM_MCG = 0x807,
Eli Cohend29b7962014-10-02 12:19:43 +0300166 MLX5_CMD_OP_GET_DROPPED_PACKET_LOG = 0x80a,
167 MLX5_CMD_OP_MAD_IFC = 0x50d,
168 MLX5_CMD_OP_QUERY_MAD_DEMUX = 0x80b,
169 MLX5_CMD_OP_SET_MAD_DEMUX = 0x80c,
170 MLX5_CMD_OP_NOP = 0x80d,
171 MLX5_CMD_OP_ALLOC_XRCD = 0x80e,
172 MLX5_CMD_OP_DEALLOC_XRCD = 0x80f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300173 MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN = 0x816,
174 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN = 0x817,
175 MLX5_CMD_OP_QUERY_CONG_STATUS = 0x822,
176 MLX5_CMD_OP_MODIFY_CONG_STATUS = 0x823,
177 MLX5_CMD_OP_QUERY_CONG_PARAMS = 0x824,
178 MLX5_CMD_OP_MODIFY_CONG_PARAMS = 0x825,
179 MLX5_CMD_OP_QUERY_CONG_STATISTICS = 0x826,
180 MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT = 0x827,
181 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT = 0x828,
182 MLX5_CMD_OP_SET_L2_TABLE_ENTRY = 0x829,
183 MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY = 0x82a,
184 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY = 0x82b,
Tariq Toukan928cfe82016-02-22 18:17:29 +0200185 MLX5_CMD_OP_SET_WOL_ROL = 0x830,
186 MLX5_CMD_OP_QUERY_WOL_ROL = 0x831,
Aviv Heller84df61e2016-05-10 13:47:50 +0300187 MLX5_CMD_OP_CREATE_LAG = 0x840,
188 MLX5_CMD_OP_MODIFY_LAG = 0x841,
189 MLX5_CMD_OP_QUERY_LAG = 0x842,
190 MLX5_CMD_OP_DESTROY_LAG = 0x843,
191 MLX5_CMD_OP_CREATE_VPORT_LAG = 0x844,
192 MLX5_CMD_OP_DESTROY_VPORT_LAG = 0x845,
Eli Cohend29b7962014-10-02 12:19:43 +0300193 MLX5_CMD_OP_CREATE_TIR = 0x900,
194 MLX5_CMD_OP_MODIFY_TIR = 0x901,
195 MLX5_CMD_OP_DESTROY_TIR = 0x902,
196 MLX5_CMD_OP_QUERY_TIR = 0x903,
Eli Cohend29b7962014-10-02 12:19:43 +0300197 MLX5_CMD_OP_CREATE_SQ = 0x904,
198 MLX5_CMD_OP_MODIFY_SQ = 0x905,
199 MLX5_CMD_OP_DESTROY_SQ = 0x906,
200 MLX5_CMD_OP_QUERY_SQ = 0x907,
201 MLX5_CMD_OP_CREATE_RQ = 0x908,
202 MLX5_CMD_OP_MODIFY_RQ = 0x909,
203 MLX5_CMD_OP_DESTROY_RQ = 0x90a,
204 MLX5_CMD_OP_QUERY_RQ = 0x90b,
205 MLX5_CMD_OP_CREATE_RMP = 0x90c,
206 MLX5_CMD_OP_MODIFY_RMP = 0x90d,
207 MLX5_CMD_OP_DESTROY_RMP = 0x90e,
208 MLX5_CMD_OP_QUERY_RMP = 0x90f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300209 MLX5_CMD_OP_CREATE_TIS = 0x912,
210 MLX5_CMD_OP_MODIFY_TIS = 0x913,
211 MLX5_CMD_OP_DESTROY_TIS = 0x914,
212 MLX5_CMD_OP_QUERY_TIS = 0x915,
213 MLX5_CMD_OP_CREATE_RQT = 0x916,
214 MLX5_CMD_OP_MODIFY_RQT = 0x917,
215 MLX5_CMD_OP_DESTROY_RQT = 0x918,
216 MLX5_CMD_OP_QUERY_RQT = 0x919,
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200217 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT = 0x92f,
Saeed Mahameede2816822015-05-28 22:28:40 +0300218 MLX5_CMD_OP_CREATE_FLOW_TABLE = 0x930,
219 MLX5_CMD_OP_DESTROY_FLOW_TABLE = 0x931,
220 MLX5_CMD_OP_QUERY_FLOW_TABLE = 0x932,
221 MLX5_CMD_OP_CREATE_FLOW_GROUP = 0x933,
222 MLX5_CMD_OP_DESTROY_FLOW_GROUP = 0x934,
223 MLX5_CMD_OP_QUERY_FLOW_GROUP = 0x935,
224 MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY = 0x936,
225 MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY = 0x937,
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200226 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY = 0x938,
Amir Vadai9dc0b282016-05-13 12:55:39 +0000227 MLX5_CMD_OP_ALLOC_FLOW_COUNTER = 0x939,
228 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER = 0x93a,
229 MLX5_CMD_OP_QUERY_FLOW_COUNTER = 0x93b,
Shahar Klein86d56a12016-06-10 00:07:30 +0300230 MLX5_CMD_OP_MODIFY_FLOW_TABLE = 0x93c,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300231 MLX5_CMD_OP_ALLOC_ENCAP_HEADER = 0x93d,
232 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER = 0x93e,
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200233 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT = 0x940,
234 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT = 0x941,
Ilan Tayari60621182017-03-27 14:52:09 +0300235 MLX5_CMD_OP_FPGA_CREATE_QP = 0x960,
236 MLX5_CMD_OP_FPGA_MODIFY_QP = 0x961,
237 MLX5_CMD_OP_FPGA_QUERY_QP = 0x962,
238 MLX5_CMD_OP_FPGA_DESTROY_QP = 0x963,
239 MLX5_CMD_OP_FPGA_QUERY_QP_COUNTERS = 0x964,
Shahar Klein86d56a12016-06-10 00:07:30 +0300240 MLX5_CMD_OP_MAX
Saeed Mahameede2816822015-05-28 22:28:40 +0300241};
242
243struct mlx5_ifc_flow_table_fields_supported_bits {
244 u8 outer_dmac[0x1];
245 u8 outer_smac[0x1];
246 u8 outer_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300247 u8 outer_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300248 u8 outer_first_prio[0x1];
249 u8 outer_first_cfi[0x1];
250 u8 outer_first_vid[0x1];
Or Gerlitza8ade552017-06-07 17:49:56 +0300251 u8 outer_ipv4_ttl[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300252 u8 outer_second_prio[0x1];
253 u8 outer_second_cfi[0x1];
254 u8 outer_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200255 u8 reserved_at_b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300256 u8 outer_sip[0x1];
257 u8 outer_dip[0x1];
258 u8 outer_frag[0x1];
259 u8 outer_ip_protocol[0x1];
260 u8 outer_ip_ecn[0x1];
261 u8 outer_ip_dscp[0x1];
262 u8 outer_udp_sport[0x1];
263 u8 outer_udp_dport[0x1];
264 u8 outer_tcp_sport[0x1];
265 u8 outer_tcp_dport[0x1];
266 u8 outer_tcp_flags[0x1];
267 u8 outer_gre_protocol[0x1];
268 u8 outer_gre_key[0x1];
269 u8 outer_vxlan_vni[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200270 u8 reserved_at_1a[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +0300271 u8 source_eswitch_port[0x1];
272
273 u8 inner_dmac[0x1];
274 u8 inner_smac[0x1];
275 u8 inner_ether_type[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300276 u8 inner_ip_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300277 u8 inner_first_prio[0x1];
278 u8 inner_first_cfi[0x1];
279 u8 inner_first_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200280 u8 reserved_at_27[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300281 u8 inner_second_prio[0x1];
282 u8 inner_second_cfi[0x1];
283 u8 inner_second_vid[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200284 u8 reserved_at_2b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300285 u8 inner_sip[0x1];
286 u8 inner_dip[0x1];
287 u8 inner_frag[0x1];
288 u8 inner_ip_protocol[0x1];
289 u8 inner_ip_ecn[0x1];
290 u8 inner_ip_dscp[0x1];
291 u8 inner_udp_sport[0x1];
292 u8 inner_udp_dport[0x1];
293 u8 inner_tcp_sport[0x1];
294 u8 inner_tcp_dport[0x1];
295 u8 inner_tcp_flags[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200296 u8 reserved_at_37[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +0300297
Matan Barakb4ff3a32016-02-09 14:57:42 +0200298 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300299};
300
301struct mlx5_ifc_flow_table_prop_layout_bits {
302 u8 ft_support[0x1];
Amir Vadai9dc0b282016-05-13 12:55:39 +0000303 u8 reserved_at_1[0x1];
304 u8 flow_counter[0x1];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200305 u8 flow_modify_en[0x1];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +0200306 u8 modify_root[0x1];
Maor Gottlieb34a40e62016-01-11 10:26:00 +0200307 u8 identified_miss_table_mode[0x1];
308 u8 flow_table_modify[0x1];
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300309 u8 encap[0x1];
310 u8 decap[0x1];
311 u8 reserved_at_9[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +0300312
Matan Barakb4ff3a32016-02-09 14:57:42 +0200313 u8 reserved_at_20[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300314 u8 log_max_ft_size[0x6];
Or Gerlitz2a69cb92017-01-19 19:31:25 +0200315 u8 log_max_modify_header_context[0x8];
316 u8 max_modify_header_actions[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300317 u8 max_ft_level[0x8];
318
Matan Barakb4ff3a32016-02-09 14:57:42 +0200319 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300320
Matan Barakb4ff3a32016-02-09 14:57:42 +0200321 u8 reserved_at_60[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200322 u8 log_max_ft_num[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300323
Matan Barakb4ff3a32016-02-09 14:57:42 +0200324 u8 reserved_at_80[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +0200325 u8 log_max_destination[0x8];
326
Matan Barakb4ff3a32016-02-09 14:57:42 +0200327 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300328 u8 log_max_flow[0x8];
329
Matan Barakb4ff3a32016-02-09 14:57:42 +0200330 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300331
332 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_support;
333
334 struct mlx5_ifc_flow_table_fields_supported_bits ft_field_bitmask_support;
335};
336
337struct mlx5_ifc_odp_per_transport_service_cap_bits {
338 u8 send[0x1];
339 u8 receive[0x1];
340 u8 write[0x1];
341 u8 read[0x1];
Artemy Kovalyov17d2f882017-01-02 11:37:47 +0200342 u8 atomic[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300343 u8 srq_receive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200344 u8 reserved_at_6[0x1a];
Saeed Mahameede2816822015-05-28 22:28:40 +0300345};
346
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200347struct mlx5_ifc_ipv4_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200348 u8 reserved_at_0[0x60];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200349
350 u8 ipv4[0x20];
351};
352
353struct mlx5_ifc_ipv6_layout_bits {
354 u8 ipv6[16][0x8];
355};
356
357union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits {
358 struct mlx5_ifc_ipv6_layout_bits ipv6_layout;
359 struct mlx5_ifc_ipv4_layout_bits ipv4_layout;
Matan Barakb4ff3a32016-02-09 14:57:42 +0200360 u8 reserved_at_0[0x80];
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200361};
362
Saeed Mahameede2816822015-05-28 22:28:40 +0300363struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
364 u8 smac_47_16[0x20];
365
366 u8 smac_15_0[0x10];
367 u8 ethertype[0x10];
368
369 u8 dmac_47_16[0x20];
370
371 u8 dmac_15_0[0x10];
372 u8 first_prio[0x3];
373 u8 first_cfi[0x1];
374 u8 first_vid[0xc];
375
376 u8 ip_protocol[0x8];
377 u8 ip_dscp[0x6];
378 u8 ip_ecn[0x2];
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300379 u8 cvlan_tag[0x1];
380 u8 svlan_tag[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300381 u8 frag[0x1];
Ariel Levkovich19cc7522017-04-03 13:11:03 +0300382 u8 ip_version[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300383 u8 tcp_flags[0x9];
384
385 u8 tcp_sport[0x10];
386 u8 tcp_dport[0x10];
387
Or Gerlitza8ade552017-06-07 17:49:56 +0300388 u8 reserved_at_c0[0x18];
389 u8 ttl_hoplimit[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300390
391 u8 udp_sport[0x10];
392 u8 udp_dport[0x10];
393
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200394 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits src_ipv4_src_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300395
Maor Gottliebb4d1f032016-01-11 10:26:05 +0200396 union mlx5_ifc_ipv6_layout_ipv4_layout_auto_bits dst_ipv4_dst_ipv6;
Saeed Mahameede2816822015-05-28 22:28:40 +0300397};
398
399struct mlx5_ifc_fte_match_set_misc_bits {
Saeed Mahameed74862162016-06-09 15:11:34 +0300400 u8 reserved_at_0[0x8];
401 u8 source_sqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +0300402
Matan Barakb4ff3a32016-02-09 14:57:42 +0200403 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300404 u8 source_port[0x10];
405
406 u8 outer_second_prio[0x3];
407 u8 outer_second_cfi[0x1];
408 u8 outer_second_vid[0xc];
409 u8 inner_second_prio[0x3];
410 u8 inner_second_cfi[0x1];
411 u8 inner_second_vid[0xc];
412
Mohamad Haj Yahia10543362016-10-09 16:25:43 +0300413 u8 outer_second_cvlan_tag[0x1];
414 u8 inner_second_cvlan_tag[0x1];
415 u8 outer_second_svlan_tag[0x1];
416 u8 inner_second_svlan_tag[0x1];
417 u8 reserved_at_64[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300418 u8 gre_protocol[0x10];
419
420 u8 gre_key_h[0x18];
421 u8 gre_key_l[0x8];
422
423 u8 vxlan_vni[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200424 u8 reserved_at_b8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300425
Matan Barakb4ff3a32016-02-09 14:57:42 +0200426 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300427
Matan Barakb4ff3a32016-02-09 14:57:42 +0200428 u8 reserved_at_e0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300429 u8 outer_ipv6_flow_label[0x14];
430
Matan Barakb4ff3a32016-02-09 14:57:42 +0200431 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300432 u8 inner_ipv6_flow_label[0x14];
433
Matan Barakb4ff3a32016-02-09 14:57:42 +0200434 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +0300435};
436
437struct mlx5_ifc_cmd_pas_bits {
438 u8 pa_h[0x20];
439
440 u8 pa_l[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200441 u8 reserved_at_34[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300442};
443
444struct mlx5_ifc_uint64_bits {
445 u8 hi[0x20];
446
447 u8 lo[0x20];
448};
449
450enum {
451 MLX5_ADS_STAT_RATE_NO_LIMIT = 0x0,
452 MLX5_ADS_STAT_RATE_2_5GBPS = 0x7,
453 MLX5_ADS_STAT_RATE_10GBPS = 0x8,
454 MLX5_ADS_STAT_RATE_30GBPS = 0x9,
455 MLX5_ADS_STAT_RATE_5GBPS = 0xa,
456 MLX5_ADS_STAT_RATE_20GBPS = 0xb,
457 MLX5_ADS_STAT_RATE_40GBPS = 0xc,
458 MLX5_ADS_STAT_RATE_60GBPS = 0xd,
459 MLX5_ADS_STAT_RATE_80GBPS = 0xe,
460 MLX5_ADS_STAT_RATE_120GBPS = 0xf,
461};
462
463struct mlx5_ifc_ads_bits {
464 u8 fl[0x1];
465 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200466 u8 reserved_at_2[0xe];
Saeed Mahameede2816822015-05-28 22:28:40 +0300467 u8 pkey_index[0x10];
468
Matan Barakb4ff3a32016-02-09 14:57:42 +0200469 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300470 u8 grh[0x1];
471 u8 mlid[0x7];
472 u8 rlid[0x10];
473
474 u8 ack_timeout[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200475 u8 reserved_at_45[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300476 u8 src_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200477 u8 reserved_at_50[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300478 u8 stat_rate[0x4];
479 u8 hop_limit[0x8];
480
Matan Barakb4ff3a32016-02-09 14:57:42 +0200481 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300482 u8 tclass[0x8];
483 u8 flow_label[0x14];
484
485 u8 rgid_rip[16][0x8];
486
Matan Barakb4ff3a32016-02-09 14:57:42 +0200487 u8 reserved_at_100[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +0300488 u8 f_dscp[0x1];
489 u8 f_ecn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200490 u8 reserved_at_106[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300491 u8 f_eth_prio[0x1];
492 u8 ecn[0x2];
493 u8 dscp[0x6];
494 u8 udp_sport[0x10];
495
496 u8 dei_cfi[0x1];
497 u8 eth_prio[0x3];
498 u8 sl[0x4];
499 u8 port[0x8];
500 u8 rmac_47_32[0x10];
501
502 u8 rmac_31_0[0x20];
503};
504
505struct mlx5_ifc_flow_table_nic_cap_bits {
Maor Gottliebb3638e12016-03-07 18:51:46 +0200506 u8 nic_rx_multi_path_tirs[0x1];
Maor Gottliebcea824d2016-05-31 14:09:09 +0300507 u8 nic_rx_multi_path_tirs_fts[0x1];
508 u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
509 u8 reserved_at_3[0x1fd];
Saeed Mahameede2816822015-05-28 22:28:40 +0300510
511 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
512
Matan Barakb4ff3a32016-02-09 14:57:42 +0200513 u8 reserved_at_400[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300514
515 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive_sniffer;
516
517 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit;
518
Matan Barakb4ff3a32016-02-09 14:57:42 +0200519 u8 reserved_at_a00[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300520
521 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_transmit_sniffer;
522
Matan Barakb4ff3a32016-02-09 14:57:42 +0200523 u8 reserved_at_e00[0x7200];
Saeed Mahameede2816822015-05-28 22:28:40 +0300524};
525
Saeed Mahameed495716b2015-12-01 18:03:19 +0200526struct mlx5_ifc_flow_table_eswitch_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200527 u8 reserved_at_0[0x200];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200528
529 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb;
530
531 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress;
532
533 struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress;
534
Matan Barakb4ff3a32016-02-09 14:57:42 +0200535 u8 reserved_at_800[0x7800];
Saeed Mahameed495716b2015-12-01 18:03:19 +0200536};
537
Saeed Mahameedd6666752015-12-01 18:03:22 +0200538struct mlx5_ifc_e_switch_cap_bits {
539 u8 vport_svlan_strip[0x1];
540 u8 vport_cvlan_strip[0x1];
541 u8 vport_svlan_insert[0x1];
542 u8 vport_cvlan_insert_if_not_exist[0x1];
543 u8 vport_cvlan_insert_overwrite[0x1];
Noa Osherovich23898c72016-06-10 00:07:37 +0300544 u8 reserved_at_5[0x19];
545 u8 nic_vport_node_guid_modify[0x1];
546 u8 nic_vport_port_guid_modify[0x1];
Saeed Mahameedd6666752015-12-01 18:03:22 +0200547
Hadar Hen Zion7adbde22016-08-03 15:08:33 +0300548 u8 vxlan_encap_decap[0x1];
549 u8 nvgre_encap_decap[0x1];
550 u8 reserved_at_22[0x9];
551 u8 log_max_encap_headers[0x5];
552 u8 reserved_2b[0x6];
553 u8 max_encap_header_size[0xa];
554
555 u8 reserved_40[0x7c0];
556
Saeed Mahameedd6666752015-12-01 18:03:22 +0200557};
558
Saeed Mahameed74862162016-06-09 15:11:34 +0300559struct mlx5_ifc_qos_cap_bits {
560 u8 packet_pacing[0x1];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300561 u8 esw_scheduling[0x1];
Mohamad Haj Yahiac9497c92016-12-15 14:02:53 +0200562 u8 esw_bw_share[0x1];
563 u8 esw_rate_limit[0x1];
564 u8 reserved_at_4[0x1c];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300565
566 u8 reserved_at_20[0x20];
567
Saeed Mahameed74862162016-06-09 15:11:34 +0300568 u8 packet_pacing_max_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300569
Saeed Mahameed74862162016-06-09 15:11:34 +0300570 u8 packet_pacing_min_rate[0x20];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300571
572 u8 reserved_at_80[0x10];
Saeed Mahameed74862162016-06-09 15:11:34 +0300573 u8 packet_pacing_rate_table_size[0x10];
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +0300574
575 u8 esw_element_type[0x10];
576 u8 esw_tsar_type[0x10];
577
578 u8 reserved_at_c0[0x10];
579 u8 max_qos_para_vport[0x10];
580
581 u8 max_tsar_bw_share[0x20];
582
583 u8 reserved_at_100[0x700];
Saeed Mahameed74862162016-06-09 15:11:34 +0300584};
585
Saeed Mahameede2816822015-05-28 22:28:40 +0300586struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
587 u8 csum_cap[0x1];
588 u8 vlan_cap[0x1];
589 u8 lro_cap[0x1];
590 u8 lro_psh_flag[0x1];
591 u8 lro_time_stamp[0x1];
Saeed Mahameed2b31f7a2016-11-28 18:04:50 +0200592 u8 reserved_at_5[0x2];
593 u8 wqe_vlan_insert[0x1];
Tariq Toukan66189962015-11-12 19:35:26 +0200594 u8 self_lb_en_modifiable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200595 u8 reserved_at_9[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300596 u8 max_lso_cap[0x5];
Leon Romanovskyc226dc22016-10-31 12:15:20 +0200597 u8 multi_pkt_send_wqe[0x2];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +0300598 u8 wqe_inline_mode[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300599 u8 rss_ind_tbl_cap[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300600 u8 reg_umr_sq[0x1];
601 u8 scatter_fcs[0x1];
602 u8 reserved_at_1a[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300603 u8 tunnel_lso_const_out_ip_id[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200604 u8 reserved_at_1c[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300605 u8 tunnel_statless_gre[0x1];
606 u8 tunnel_stateless_vxlan[0x1];
607
Matan Barakb4ff3a32016-02-09 14:57:42 +0200608 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300609
Matan Barakb4ff3a32016-02-09 14:57:42 +0200610 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300611 u8 lro_min_mss_size[0x10];
612
Matan Barakb4ff3a32016-02-09 14:57:42 +0200613 u8 reserved_at_60[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +0300614
615 u8 lro_timer_supported_periods[4][0x20];
616
Matan Barakb4ff3a32016-02-09 14:57:42 +0200617 u8 reserved_at_200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +0300618};
619
620struct mlx5_ifc_roce_cap_bits {
621 u8 roce_apm[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200622 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300623
Matan Barakb4ff3a32016-02-09 14:57:42 +0200624 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +0300625
Matan Barakb4ff3a32016-02-09 14:57:42 +0200626 u8 reserved_at_80[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300627 u8 l3_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200628 u8 reserved_at_90[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +0300629 u8 roce_version[0x8];
630
Matan Barakb4ff3a32016-02-09 14:57:42 +0200631 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300632 u8 r_roce_dest_udp_port[0x10];
633
634 u8 r_roce_max_src_udp_port[0x10];
635 u8 r_roce_min_src_udp_port[0x10];
636
Matan Barakb4ff3a32016-02-09 14:57:42 +0200637 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300638 u8 roce_address_table_size[0x10];
639
Matan Barakb4ff3a32016-02-09 14:57:42 +0200640 u8 reserved_at_100[0x700];
Saeed Mahameede2816822015-05-28 22:28:40 +0300641};
642
643enum {
644 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_1_BYTE = 0x0,
645 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_2_BYTES = 0x2,
646 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_4_BYTES = 0x4,
647 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_8_BYTES = 0x8,
648 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_16_BYTES = 0x10,
649 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_32_BYTES = 0x20,
650 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_64_BYTES = 0x40,
651 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_128_BYTES = 0x80,
652 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_QP_256_BYTES = 0x100,
653};
654
655enum {
656 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_1_BYTE = 0x1,
657 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_2_BYTES = 0x2,
658 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_4_BYTES = 0x4,
659 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_8_BYTES = 0x8,
660 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_16_BYTES = 0x10,
661 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_32_BYTES = 0x20,
662 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_64_BYTES = 0x40,
663 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_128_BYTES = 0x80,
664 MLX5_ATOMIC_CAPS_ATOMIC_SIZE_DC_256_BYTES = 0x100,
665};
666
667struct mlx5_ifc_atomic_caps_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200668 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300669
Or Gerlitzbd108382017-05-28 15:24:17 +0300670 u8 atomic_req_8B_endianness_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200671 u8 reserved_at_42[0x4];
Or Gerlitzbd108382017-05-28 15:24:17 +0300672 u8 supported_atomic_req_8B_endianness_mode_1[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300673
Matan Barakb4ff3a32016-02-09 14:57:42 +0200674 u8 reserved_at_47[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +0300675
Matan Barakb4ff3a32016-02-09 14:57:42 +0200676 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300677
Matan Barakb4ff3a32016-02-09 14:57:42 +0200678 u8 reserved_at_80[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200679 u8 atomic_operations[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300680
Matan Barakb4ff3a32016-02-09 14:57:42 +0200681 u8 reserved_at_a0[0x10];
Eran Ben Elishaf91e6d82015-12-14 16:34:09 +0200682 u8 atomic_size_qp[0x10];
683
Matan Barakb4ff3a32016-02-09 14:57:42 +0200684 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +0300685 u8 atomic_size_dc[0x10];
686
Matan Barakb4ff3a32016-02-09 14:57:42 +0200687 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300688};
689
690struct mlx5_ifc_odp_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200691 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +0300692
693 u8 sig[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200694 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +0300695
Matan Barakb4ff3a32016-02-09 14:57:42 +0200696 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +0300697
698 struct mlx5_ifc_odp_per_transport_service_cap_bits rc_odp_caps;
699
700 struct mlx5_ifc_odp_per_transport_service_cap_bits uc_odp_caps;
701
702 struct mlx5_ifc_odp_per_transport_service_cap_bits ud_odp_caps;
703
Matan Barakb4ff3a32016-02-09 14:57:42 +0200704 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +0300705};
706
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200707struct mlx5_ifc_calc_op {
708 u8 reserved_at_0[0x10];
709 u8 reserved_at_10[0x9];
710 u8 op_swap_endianness[0x1];
711 u8 op_min[0x1];
712 u8 op_xor[0x1];
713 u8 op_or[0x1];
714 u8 op_and[0x1];
715 u8 op_max[0x1];
716 u8 op_add[0x1];
717};
718
719struct mlx5_ifc_vector_calc_cap_bits {
720 u8 calc_matrix[0x1];
721 u8 reserved_at_1[0x1f];
722 u8 reserved_at_20[0x8];
723 u8 max_vec_count[0x8];
724 u8 reserved_at_30[0xd];
725 u8 max_chunk_size[0x3];
726 struct mlx5_ifc_calc_op calc0;
727 struct mlx5_ifc_calc_op calc1;
728 struct mlx5_ifc_calc_op calc2;
729 struct mlx5_ifc_calc_op calc3;
730
731 u8 reserved_at_e0[0x720];
732};
733
Saeed Mahameede2816822015-05-28 22:28:40 +0300734enum {
735 MLX5_WQ_TYPE_LINKED_LIST = 0x0,
736 MLX5_WQ_TYPE_CYCLIC = 0x1,
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300737 MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +0300738};
739
740enum {
741 MLX5_WQ_END_PAD_MODE_NONE = 0x0,
742 MLX5_WQ_END_PAD_MODE_ALIGN = 0x1,
743};
744
745enum {
746 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_8_GID_ENTRIES = 0x0,
747 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_16_GID_ENTRIES = 0x1,
748 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_32_GID_ENTRIES = 0x2,
749 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_64_GID_ENTRIES = 0x3,
750 MLX5_CMD_HCA_CAP_GID_TABLE_SIZE_128_GID_ENTRIES = 0x4,
751};
752
753enum {
754 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_128_ENTRIES = 0x0,
755 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_256_ENTRIES = 0x1,
756 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_512_ENTRIES = 0x2,
757 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_1K_ENTRIES = 0x3,
758 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_2K_ENTRIES = 0x4,
759 MLX5_CMD_HCA_CAP_PKEY_TABLE_SIZE_4K_ENTRIES = 0x5,
760};
761
762enum {
763 MLX5_CMD_HCA_CAP_PORT_TYPE_IB = 0x0,
764 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET = 0x1,
765};
766
767enum {
768 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_DISABLED = 0x0,
769 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_INITIAL_STATE = 0x1,
770 MLX5_CMD_HCA_CAP_CMDIF_CHECKSUM_ENABLED = 0x3,
771};
772
773enum {
774 MLX5_CAP_PORT_TYPE_IB = 0x0,
775 MLX5_CAP_PORT_TYPE_ETH = 0x1,
Eli Cohend29b7962014-10-02 12:19:43 +0300776};
777
Max Gurtovoy1410a902017-05-28 10:53:10 +0300778enum {
779 MLX5_CAP_UMR_FENCE_STRONG = 0x0,
780 MLX5_CAP_UMR_FENCE_SMALL = 0x1,
781 MLX5_CAP_UMR_FENCE_NONE = 0x2,
782};
783
Eli Cohenb7755162014-10-02 12:19:44 +0300784struct mlx5_ifc_cmd_hca_cap_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +0200785 u8 reserved_at_0[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +0300786
787 u8 log_max_srq_sz[0x8];
788 u8 log_max_qp_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200789 u8 reserved_at_90[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300790 u8 log_max_qp[0x5];
791
Matan Barakb4ff3a32016-02-09 14:57:42 +0200792 u8 reserved_at_a0[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300793 u8 log_max_srq[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200794 u8 reserved_at_b0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300795
Matan Barakb4ff3a32016-02-09 14:57:42 +0200796 u8 reserved_at_c0[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300797 u8 log_max_cq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200798 u8 reserved_at_d0[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300799 u8 log_max_cq[0x5];
800
801 u8 log_max_eq_sz[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200802 u8 reserved_at_e8[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300803 u8 log_max_mkey[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200804 u8 reserved_at_f0[0xc];
Eli Cohenb7755162014-10-02 12:19:44 +0300805 u8 log_max_eq[0x4];
806
807 u8 max_indirection[0x8];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200808 u8 fixed_buffer_size[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300809 u8 log_max_mrw_sz[0x7];
Majd Dibbiny8812c242017-02-09 14:20:12 +0200810 u8 force_teardown[0x1];
811 u8 reserved_at_111[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300812 u8 log_max_bsf_list_size[0x6];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +0200813 u8 umr_extended_translation_offset[0x1];
814 u8 null_mkey[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300815 u8 log_max_klm_list_size[0x6];
816
Matan Barakb4ff3a32016-02-09 14:57:42 +0200817 u8 reserved_at_120[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300818 u8 log_max_ra_req_dc[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200819 u8 reserved_at_130[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300820 u8 log_max_ra_res_dc[0x6];
821
Matan Barakb4ff3a32016-02-09 14:57:42 +0200822 u8 reserved_at_140[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300823 u8 log_max_ra_req_qp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200824 u8 reserved_at_150[0xa];
Eli Cohenb7755162014-10-02 12:19:44 +0300825 u8 log_max_ra_res_qp[0x6];
826
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200827 u8 end_pad[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300828 u8 cc_query_allowed[0x1];
829 u8 cc_modify_allowed[0x1];
Daniel Jurgensf32f5bd2015-11-19 17:12:26 +0200830 u8 start_pad[0x1];
831 u8 cache_line_128byte[0x1];
Or Gerlitz137ffd12017-06-13 18:12:13 +0300832 u8 reserved_at_165[0xb];
Saeed Mahameede2816822015-05-28 22:28:40 +0300833 u8 gid_table_size[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300834
Saeed Mahameede2816822015-05-28 22:28:40 +0300835 u8 out_of_seq_cnt[0x1];
836 u8 vport_counters[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300837 u8 retransmission_q_counters[0x1];
Alex Vesker83b502a2016-08-04 17:32:02 +0300838 u8 reserved_at_183[0x1];
839 u8 modify_rq_counter_set_id[0x1];
840 u8 reserved_at_185[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300841 u8 max_qp_cnt[0xa];
842 u8 pkey_table_size[0x10];
843
Saeed Mahameede2816822015-05-28 22:28:40 +0300844 u8 vport_group_manager[0x1];
845 u8 vhca_group_manager[0x1];
846 u8 ib_virt[0x1];
847 u8 eth_virt[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +0200848 u8 reserved_at_1a4[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300849 u8 ets[0x1];
850 u8 nic_flow_table[0x1];
Saeed Mahameed54f0a412015-12-01 18:03:10 +0200851 u8 eswitch_flow_table[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300852 u8 early_vf_enable[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +0200853 u8 mcam_reg[0x1];
854 u8 pcam_reg[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300855 u8 local_ca_ack_delay[0x5];
Huy Nguyen4ce3bf22016-11-17 13:45:56 +0200856 u8 port_module_event[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200857 u8 reserved_at_1b1[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300858 u8 ports_check[0x1];
Max Gurtovoy7b135582017-01-02 11:37:38 +0200859 u8 reserved_at_1b3[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300860 u8 disable_link_up[0x1];
861 u8 beacon_led[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300862 u8 port_type[0x2];
Eli Cohenb7755162014-10-02 12:19:44 +0300863 u8 num_ports[0x8];
864
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +0300865 u8 reserved_at_1c0[0x1];
866 u8 pps[0x1];
867 u8 pps_modify[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300868 u8 log_max_msg[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300869 u8 reserved_at_1c8[0x4];
Saeed Mahameed4f3961e2016-02-22 18:17:25 +0200870 u8 max_tc[0x4];
Saeed Mahameed74862162016-06-09 15:11:34 +0300871 u8 reserved_at_1d0[0x1];
872 u8 dcbx[0x1];
Ilan Tayarie29341f2017-03-13 20:05:45 +0200873 u8 reserved_at_1d2[0x3];
874 u8 fpga[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200875 u8 rol_s[0x1];
876 u8 rol_g[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300877 u8 reserved_at_1d8[0x1];
Tariq Toukan928cfe82016-02-22 18:17:29 +0200878 u8 wol_s[0x1];
879 u8 wol_g[0x1];
880 u8 wol_a[0x1];
881 u8 wol_b[0x1];
882 u8 wol_m[0x1];
883 u8 wol_u[0x1];
884 u8 wol_p[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300885
886 u8 stat_rate_support[0x10];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300887 u8 reserved_at_1f0[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +0300888 u8 cqe_version[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300889
Saeed Mahameede2816822015-05-28 22:28:40 +0300890 u8 compact_address_vector[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300891 u8 striding_rq[0x1];
Erez Shitrit500a3d02017-04-13 06:36:51 +0300892 u8 reserved_at_202[0x1];
893 u8 ipoib_enhanced_offloads[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +0200894 u8 ipoib_basic_offloads[0x1];
Max Gurtovoy1410a902017-05-28 10:53:10 +0300895 u8 reserved_at_205[0x5];
896 u8 umr_fence[0x2];
897 u8 reserved_at_20c[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300898 u8 drain_sigerr[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300899 u8 cmdif_checksum[0x2];
900 u8 sigerr_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300901 u8 reserved_at_213[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300902 u8 wq_signature[0x1];
903 u8 sctr_data_cqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300904 u8 reserved_at_216[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300905 u8 sho[0x1];
906 u8 tph[0x1];
907 u8 rf[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300908 u8 dct[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +0300909 u8 qos[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300910 u8 eth_net_offloads[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300911 u8 roce[0x1];
912 u8 atomic[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300913 u8 reserved_at_21f[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300914
915 u8 cq_oi[0x1];
916 u8 cq_resize[0x1];
917 u8 cq_moderation[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300918 u8 reserved_at_223[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300919 u8 cq_eq_remap[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300920 u8 pg[0x1];
921 u8 block_lb_mc[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300922 u8 reserved_at_229[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300923 u8 scqe_break_moderation[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300924 u8 cq_period_start_from_cqe[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300925 u8 cd[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300926 u8 reserved_at_22d[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +0300927 u8 apm[0x1];
Sagi Grimberg3f0393a2016-02-23 10:25:23 +0200928 u8 vector_calc[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +0300929 u8 umr_ptr_rlky[0x1];
Matan Barakd2370e02016-02-29 18:05:30 +0200930 u8 imaicl[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300931 u8 reserved_at_232[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300932 u8 qkv[0x1];
933 u8 pkv[0x1];
Haggai Eranb11a4f92016-02-29 15:45:03 +0200934 u8 set_deth_sqpn[0x1];
935 u8 reserved_at_239[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300936 u8 xrc[0x1];
937 u8 ud[0x1];
938 u8 uc[0x1];
939 u8 rc[0x1];
940
Eli Cohena6d51b62017-01-03 23:55:23 +0200941 u8 uar_4k[0x1];
942 u8 reserved_at_241[0x9];
Eli Cohenb7755162014-10-02 12:19:44 +0300943 u8 uar_sz[0x6];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300944 u8 reserved_at_250[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300945 u8 log_pg_sz[0x8];
946
947 u8 bf[0x1];
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +0200948 u8 driver_version[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +0300949 u8 pad_tx_eth_packet[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300950 u8 reserved_at_263[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +0300951 u8 log_bf_reg_size[0x5];
Aviv Heller84df61e2016-05-10 13:47:50 +0300952
953 u8 reserved_at_270[0xb];
954 u8 lag_master[0x1];
955 u8 num_lag_ports[0x4];
Eli Cohenb7755162014-10-02 12:19:44 +0300956
Tariq Toukane1c9c622016-04-11 23:10:21 +0300957 u8 reserved_at_280[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300958 u8 max_wqe_sz_sq[0x10];
959
Tariq Toukane1c9c622016-04-11 23:10:21 +0300960 u8 reserved_at_2a0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300961 u8 max_wqe_sz_rq[0x10];
962
Tariq Toukane1c9c622016-04-11 23:10:21 +0300963 u8 reserved_at_2c0[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +0300964 u8 max_wqe_sz_sq_dc[0x10];
965
Tariq Toukane1c9c622016-04-11 23:10:21 +0300966 u8 reserved_at_2e0[0x7];
Eli Cohenb7755162014-10-02 12:19:44 +0300967 u8 max_qp_mcg[0x19];
968
Tariq Toukane1c9c622016-04-11 23:10:21 +0300969 u8 reserved_at_300[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +0300970 u8 log_max_mcg[0x8];
971
Tariq Toukane1c9c622016-04-11 23:10:21 +0300972 u8 reserved_at_320[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300973 u8 log_max_transport_domain[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300974 u8 reserved_at_328[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300975 u8 log_max_pd[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300976 u8 reserved_at_330[0xb];
Eli Cohenb7755162014-10-02 12:19:44 +0300977 u8 log_max_xrcd[0x5];
978
Amir Vadaia351a1b02016-07-14 10:32:38 +0300979 u8 reserved_at_340[0x8];
980 u8 log_max_flow_counter_bulk[0x8];
981 u8 max_flow_counter[0x10];
982
Eli Cohenb7755162014-10-02 12:19:44 +0300983
Tariq Toukane1c9c622016-04-11 23:10:21 +0300984 u8 reserved_at_360[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300985 u8 log_max_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300986 u8 reserved_at_368[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300987 u8 log_max_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300988 u8 reserved_at_370[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300989 u8 log_max_tir[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300990 u8 reserved_at_378[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +0300991 u8 log_max_tis[0x5];
992
Saeed Mahameede2816822015-05-28 22:28:40 +0300993 u8 basic_cyclic_rcv_wqe[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300994 u8 reserved_at_381[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +0300995 u8 log_max_rmp[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300996 u8 reserved_at_388[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300997 u8 log_max_rqt[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +0300998 u8 reserved_at_390[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +0300999 u8 log_max_rqt_size[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001000 u8 reserved_at_398[0x3];
Eli Cohenb7755162014-10-02 12:19:44 +03001001 u8 log_max_tis_per_sq[0x5];
1002
Tariq Toukane1c9c622016-04-11 23:10:21 +03001003 u8 reserved_at_3a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001004 u8 log_max_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001005 u8 reserved_at_3a8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001006 u8 log_min_stride_sz_rq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001007 u8 reserved_at_3b0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001008 u8 log_max_stride_sz_sq[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001009 u8 reserved_at_3b8[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001010 u8 log_min_stride_sz_sq[0x5];
Eli Cohenb7755162014-10-02 12:19:44 +03001011
Tariq Toukane1c9c622016-04-11 23:10:21 +03001012 u8 reserved_at_3c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03001013 u8 log_max_wq_sz[0x5];
1014
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001015 u8 nic_vport_change_event[0x1];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001016 u8 reserved_at_3e1[0xa];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001017 u8 log_max_vlan_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001018 u8 reserved_at_3f0[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001019 u8 log_max_current_mc_list[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001020 u8 reserved_at_3f8[0x3];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001021 u8 log_max_current_uc_list[0x5];
1022
Tariq Toukane1c9c622016-04-11 23:10:21 +03001023 u8 reserved_at_400[0x80];
Saeed Mahameed54f0a412015-12-01 18:03:10 +02001024
Tariq Toukane1c9c622016-04-11 23:10:21 +03001025 u8 reserved_at_480[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001026 u8 log_max_l2_table[0x5];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001027 u8 reserved_at_488[0x8];
Eli Cohenb7755162014-10-02 12:19:44 +03001028 u8 log_uar_page_sz[0x10];
1029
Tariq Toukane1c9c622016-04-11 23:10:21 +03001030 u8 reserved_at_4a0[0x20];
Linus Torvalds048ccca2016-01-23 18:45:06 -08001031 u8 device_frequency_mhz[0x20];
Eran Ben Elishab0844442015-12-29 14:58:30 +02001032 u8 device_frequency_khz[0x20];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001033
Eli Cohena6d51b62017-01-03 23:55:23 +02001034 u8 reserved_at_500[0x20];
1035 u8 num_of_uars_per_page[0x20];
1036 u8 reserved_at_540[0x40];
Tariq Toukane1c9c622016-04-11 23:10:21 +03001037
1038 u8 reserved_at_580[0x3f];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001039 u8 cqe_compression[0x1];
Eli Cohenb7755162014-10-02 12:19:44 +03001040
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001041 u8 cqe_compression_timeout[0x10];
1042 u8 cqe_compression_max_num[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03001043
Saeed Mahameed74862162016-06-09 15:11:34 +03001044 u8 reserved_at_5e0[0x10];
1045 u8 tag_matching[0x1];
1046 u8 rndv_offload_rc[0x1];
1047 u8 rndv_offload_dc[0x1];
1048 u8 log_tag_matching_list_sz[0x5];
Max Gurtovoy7b135582017-01-02 11:37:38 +02001049 u8 reserved_at_5f8[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03001050 u8 log_max_xrq[0x5];
1051
Max Gurtovoy7b135582017-01-02 11:37:38 +02001052 u8 reserved_at_600[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03001053};
1054
Saeed Mahameed81848732015-12-01 18:03:20 +02001055enum mlx5_flow_destination_type {
1056 MLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,
1057 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,
1058 MLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,
Amir Vadaibd5251db2016-05-13 12:55:40 +00001059
1060 MLX5_FLOW_DESTINATION_TYPE_COUNTER = 0x100,
Saeed Mahameede2816822015-05-28 22:28:40 +03001061};
1062
1063struct mlx5_ifc_dest_format_struct_bits {
1064 u8 destination_type[0x8];
1065 u8 destination_id[0x18];
1066
Matan Barakb4ff3a32016-02-09 14:57:42 +02001067 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001068};
1069
Amir Vadai9dc0b282016-05-13 12:55:39 +00001070struct mlx5_ifc_flow_counter_list_bits {
Amir Vadaia351a1b02016-07-14 10:32:38 +03001071 u8 clear[0x1];
1072 u8 num_of_counters[0xf];
Amir Vadai9dc0b282016-05-13 12:55:39 +00001073 u8 flow_counter_id[0x10];
1074
1075 u8 reserved_at_20[0x20];
1076};
1077
1078union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits {
1079 struct mlx5_ifc_dest_format_struct_bits dest_format_struct;
1080 struct mlx5_ifc_flow_counter_list_bits flow_counter_list;
1081 u8 reserved_at_0[0x40];
1082};
1083
Saeed Mahameede2816822015-05-28 22:28:40 +03001084struct mlx5_ifc_fte_match_param_bits {
1085 struct mlx5_ifc_fte_match_set_lyr_2_4_bits outer_headers;
1086
1087 struct mlx5_ifc_fte_match_set_misc_bits misc_parameters;
1088
1089 struct mlx5_ifc_fte_match_set_lyr_2_4_bits inner_headers;
1090
Matan Barakb4ff3a32016-02-09 14:57:42 +02001091 u8 reserved_at_600[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03001092};
1093
1094enum {
1095 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_SRC_IP = 0x0,
1096 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_DST_IP = 0x1,
1097 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_SPORT = 0x2,
1098 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_L4_DPORT = 0x3,
1099 MLX5_RX_HASH_FIELD_SELECT_SELECTED_FIELDS_IPSEC_SPI = 0x4,
1100};
1101
1102struct mlx5_ifc_rx_hash_field_select_bits {
1103 u8 l3_prot_type[0x1];
1104 u8 l4_prot_type[0x1];
1105 u8 selected_fields[0x1e];
1106};
1107
1108enum {
1109 MLX5_WQ_WQ_TYPE_WQ_LINKED_LIST = 0x0,
1110 MLX5_WQ_WQ_TYPE_WQ_CYCLIC = 0x1,
1111};
1112
1113enum {
1114 MLX5_WQ_END_PADDING_MODE_END_PAD_NONE = 0x0,
1115 MLX5_WQ_END_PADDING_MODE_END_PAD_ALIGN = 0x1,
1116};
1117
1118struct mlx5_ifc_wq_bits {
1119 u8 wq_type[0x4];
1120 u8 wq_signature[0x1];
1121 u8 end_padding_mode[0x2];
1122 u8 cd_slave[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001123 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001124
1125 u8 hds_skip_first_sge[0x1];
1126 u8 log2_hds_buf_size[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001127 u8 reserved_at_24[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03001128 u8 page_offset[0x5];
1129 u8 lwm[0x10];
1130
Matan Barakb4ff3a32016-02-09 14:57:42 +02001131 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001132 u8 pd[0x18];
1133
Matan Barakb4ff3a32016-02-09 14:57:42 +02001134 u8 reserved_at_60[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001135 u8 uar_page[0x18];
1136
1137 u8 dbr_addr[0x40];
1138
1139 u8 hw_counter[0x20];
1140
1141 u8 sw_counter[0x20];
1142
Matan Barakb4ff3a32016-02-09 14:57:42 +02001143 u8 reserved_at_100[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03001144 u8 log_wq_stride[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001145 u8 reserved_at_110[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001146 u8 log_wq_pg_sz[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001147 u8 reserved_at_118[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001148 u8 log_wq_sz[0x5];
1149
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03001150 u8 reserved_at_120[0x15];
1151 u8 log_wqe_num_of_strides[0x3];
1152 u8 two_byte_shift_en[0x1];
1153 u8 reserved_at_139[0x4];
1154 u8 log_wqe_stride_size[0x3];
1155
1156 u8 reserved_at_140[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001157
1158 struct mlx5_ifc_cmd_pas_bits pas[0];
1159};
1160
1161struct mlx5_ifc_rq_num_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001162 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001163 u8 rq_num[0x18];
1164};
1165
1166struct mlx5_ifc_mac_address_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001167 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001168 u8 mac_addr_47_32[0x10];
1169
1170 u8 mac_addr_31_0[0x20];
1171};
1172
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001173struct mlx5_ifc_vlan_layout_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001174 u8 reserved_at_0[0x14];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001175 u8 vlan[0x0c];
1176
Matan Barakb4ff3a32016-02-09 14:57:42 +02001177 u8 reserved_at_20[0x20];
Saeed Mahameedc0046cf2015-12-01 18:03:15 +02001178};
1179
Saeed Mahameede2816822015-05-28 22:28:40 +03001180struct mlx5_ifc_cong_control_r_roce_ecn_np_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001181 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001182
1183 u8 min_time_between_cnps[0x20];
1184
Matan Barakb4ff3a32016-02-09 14:57:42 +02001185 u8 reserved_at_c0[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03001186 u8 cnp_dscp[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001187 u8 reserved_at_d8[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001188 u8 cnp_802p_prio[0x3];
1189
Matan Barakb4ff3a32016-02-09 14:57:42 +02001190 u8 reserved_at_e0[0x720];
Saeed Mahameede2816822015-05-28 22:28:40 +03001191};
1192
1193struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001194 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001195
Matan Barakb4ff3a32016-02-09 14:57:42 +02001196 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03001197 u8 clamp_tgt_rate[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001198 u8 reserved_at_65[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001199 u8 clamp_tgt_rate_after_time_inc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001200 u8 reserved_at_69[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03001201
Matan Barakb4ff3a32016-02-09 14:57:42 +02001202 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001203
1204 u8 rpg_time_reset[0x20];
1205
1206 u8 rpg_byte_reset[0x20];
1207
1208 u8 rpg_threshold[0x20];
1209
1210 u8 rpg_max_rate[0x20];
1211
1212 u8 rpg_ai_rate[0x20];
1213
1214 u8 rpg_hai_rate[0x20];
1215
1216 u8 rpg_gd[0x20];
1217
1218 u8 rpg_min_dec_fac[0x20];
1219
1220 u8 rpg_min_rate[0x20];
1221
Matan Barakb4ff3a32016-02-09 14:57:42 +02001222 u8 reserved_at_1c0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001223
1224 u8 rate_to_set_on_first_cnp[0x20];
1225
1226 u8 dce_tcp_g[0x20];
1227
1228 u8 dce_tcp_rtt[0x20];
1229
1230 u8 rate_reduce_monitor_period[0x20];
1231
Matan Barakb4ff3a32016-02-09 14:57:42 +02001232 u8 reserved_at_320[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001233
1234 u8 initial_alpha_value[0x20];
1235
Matan Barakb4ff3a32016-02-09 14:57:42 +02001236 u8 reserved_at_360[0x4a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001237};
1238
1239struct mlx5_ifc_cong_control_802_1qau_rp_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001240 u8 reserved_at_0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001241
1242 u8 rppp_max_rps[0x20];
1243
1244 u8 rpg_time_reset[0x20];
1245
1246 u8 rpg_byte_reset[0x20];
1247
1248 u8 rpg_threshold[0x20];
1249
1250 u8 rpg_max_rate[0x20];
1251
1252 u8 rpg_ai_rate[0x20];
1253
1254 u8 rpg_hai_rate[0x20];
1255
1256 u8 rpg_gd[0x20];
1257
1258 u8 rpg_min_dec_fac[0x20];
1259
1260 u8 rpg_min_rate[0x20];
1261
Matan Barakb4ff3a32016-02-09 14:57:42 +02001262 u8 reserved_at_1c0[0x640];
Saeed Mahameede2816822015-05-28 22:28:40 +03001263};
1264
1265enum {
1266 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_CQ_SIZE = 0x1,
1267 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_PAGE_OFFSET = 0x2,
1268 MLX5_RESIZE_FIELD_SELECT_RESIZE_FIELD_SELECT_LOG_PAGE_SIZE = 0x4,
1269};
1270
1271struct mlx5_ifc_resize_field_select_bits {
1272 u8 resize_field_select[0x20];
1273};
1274
1275enum {
1276 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_PERIOD = 0x1,
1277 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_CQ_MAX_COUNT = 0x2,
1278 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_OI = 0x4,
1279 MLX5_MODIFY_FIELD_SELECT_MODIFY_FIELD_SELECT_C_EQN = 0x8,
1280};
1281
1282struct mlx5_ifc_modify_field_select_bits {
1283 u8 modify_field_select[0x20];
1284};
1285
1286struct mlx5_ifc_field_select_r_roce_np_bits {
1287 u8 field_select_r_roce_np[0x20];
1288};
1289
1290struct mlx5_ifc_field_select_r_roce_rp_bits {
1291 u8 field_select_r_roce_rp[0x20];
1292};
1293
1294enum {
1295 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPPP_MAX_RPS = 0x4,
1296 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_TIME_RESET = 0x8,
1297 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_BYTE_RESET = 0x10,
1298 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_THRESHOLD = 0x20,
1299 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MAX_RATE = 0x40,
1300 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_AI_RATE = 0x80,
1301 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_HAI_RATE = 0x100,
1302 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_GD = 0x200,
1303 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_DEC_FAC = 0x400,
1304 MLX5_FIELD_SELECT_802_1QAU_RP_FIELD_SELECT_8021QAURP_RPG_MIN_RATE = 0x800,
1305};
1306
1307struct mlx5_ifc_field_select_802_1qau_rp_bits {
1308 u8 field_select_8021qaurp[0x20];
1309};
1310
1311struct mlx5_ifc_phys_layer_cntrs_bits {
1312 u8 time_since_last_clear_high[0x20];
1313
1314 u8 time_since_last_clear_low[0x20];
1315
1316 u8 symbol_errors_high[0x20];
1317
1318 u8 symbol_errors_low[0x20];
1319
1320 u8 sync_headers_errors_high[0x20];
1321
1322 u8 sync_headers_errors_low[0x20];
1323
1324 u8 edpl_bip_errors_lane0_high[0x20];
1325
1326 u8 edpl_bip_errors_lane0_low[0x20];
1327
1328 u8 edpl_bip_errors_lane1_high[0x20];
1329
1330 u8 edpl_bip_errors_lane1_low[0x20];
1331
1332 u8 edpl_bip_errors_lane2_high[0x20];
1333
1334 u8 edpl_bip_errors_lane2_low[0x20];
1335
1336 u8 edpl_bip_errors_lane3_high[0x20];
1337
1338 u8 edpl_bip_errors_lane3_low[0x20];
1339
1340 u8 fc_fec_corrected_blocks_lane0_high[0x20];
1341
1342 u8 fc_fec_corrected_blocks_lane0_low[0x20];
1343
1344 u8 fc_fec_corrected_blocks_lane1_high[0x20];
1345
1346 u8 fc_fec_corrected_blocks_lane1_low[0x20];
1347
1348 u8 fc_fec_corrected_blocks_lane2_high[0x20];
1349
1350 u8 fc_fec_corrected_blocks_lane2_low[0x20];
1351
1352 u8 fc_fec_corrected_blocks_lane3_high[0x20];
1353
1354 u8 fc_fec_corrected_blocks_lane3_low[0x20];
1355
1356 u8 fc_fec_uncorrectable_blocks_lane0_high[0x20];
1357
1358 u8 fc_fec_uncorrectable_blocks_lane0_low[0x20];
1359
1360 u8 fc_fec_uncorrectable_blocks_lane1_high[0x20];
1361
1362 u8 fc_fec_uncorrectable_blocks_lane1_low[0x20];
1363
1364 u8 fc_fec_uncorrectable_blocks_lane2_high[0x20];
1365
1366 u8 fc_fec_uncorrectable_blocks_lane2_low[0x20];
1367
1368 u8 fc_fec_uncorrectable_blocks_lane3_high[0x20];
1369
1370 u8 fc_fec_uncorrectable_blocks_lane3_low[0x20];
1371
1372 u8 rs_fec_corrected_blocks_high[0x20];
1373
1374 u8 rs_fec_corrected_blocks_low[0x20];
1375
1376 u8 rs_fec_uncorrectable_blocks_high[0x20];
1377
1378 u8 rs_fec_uncorrectable_blocks_low[0x20];
1379
1380 u8 rs_fec_no_errors_blocks_high[0x20];
1381
1382 u8 rs_fec_no_errors_blocks_low[0x20];
1383
1384 u8 rs_fec_single_error_blocks_high[0x20];
1385
1386 u8 rs_fec_single_error_blocks_low[0x20];
1387
1388 u8 rs_fec_corrected_symbols_total_high[0x20];
1389
1390 u8 rs_fec_corrected_symbols_total_low[0x20];
1391
1392 u8 rs_fec_corrected_symbols_lane0_high[0x20];
1393
1394 u8 rs_fec_corrected_symbols_lane0_low[0x20];
1395
1396 u8 rs_fec_corrected_symbols_lane1_high[0x20];
1397
1398 u8 rs_fec_corrected_symbols_lane1_low[0x20];
1399
1400 u8 rs_fec_corrected_symbols_lane2_high[0x20];
1401
1402 u8 rs_fec_corrected_symbols_lane2_low[0x20];
1403
1404 u8 rs_fec_corrected_symbols_lane3_high[0x20];
1405
1406 u8 rs_fec_corrected_symbols_lane3_low[0x20];
1407
1408 u8 link_down_events[0x20];
1409
1410 u8 successful_recovery_events[0x20];
1411
Matan Barakb4ff3a32016-02-09 14:57:42 +02001412 u8 reserved_at_640[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03001413};
1414
Gal Pressmand8dc0502016-09-27 17:04:51 +03001415struct mlx5_ifc_phys_layer_statistical_cntrs_bits {
1416 u8 time_since_last_clear_high[0x20];
1417
1418 u8 time_since_last_clear_low[0x20];
1419
1420 u8 phy_received_bits_high[0x20];
1421
1422 u8 phy_received_bits_low[0x20];
1423
1424 u8 phy_symbol_errors_high[0x20];
1425
1426 u8 phy_symbol_errors_low[0x20];
1427
1428 u8 phy_corrected_bits_high[0x20];
1429
1430 u8 phy_corrected_bits_low[0x20];
1431
1432 u8 phy_corrected_bits_lane0_high[0x20];
1433
1434 u8 phy_corrected_bits_lane0_low[0x20];
1435
1436 u8 phy_corrected_bits_lane1_high[0x20];
1437
1438 u8 phy_corrected_bits_lane1_low[0x20];
1439
1440 u8 phy_corrected_bits_lane2_high[0x20];
1441
1442 u8 phy_corrected_bits_lane2_low[0x20];
1443
1444 u8 phy_corrected_bits_lane3_high[0x20];
1445
1446 u8 phy_corrected_bits_lane3_low[0x20];
1447
1448 u8 reserved_at_200[0x5c0];
1449};
1450
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001451struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits {
1452 u8 symbol_error_counter[0x10];
1453
1454 u8 link_error_recovery_counter[0x8];
1455
1456 u8 link_downed_counter[0x8];
1457
1458 u8 port_rcv_errors[0x10];
1459
1460 u8 port_rcv_remote_physical_errors[0x10];
1461
1462 u8 port_rcv_switch_relay_errors[0x10];
1463
1464 u8 port_xmit_discards[0x10];
1465
1466 u8 port_xmit_constraint_errors[0x8];
1467
1468 u8 port_rcv_constraint_errors[0x8];
1469
1470 u8 reserved_at_70[0x8];
1471
1472 u8 link_overrun_errors[0x8];
1473
1474 u8 reserved_at_80[0x10];
1475
1476 u8 vl_15_dropped[0x10];
1477
Tim Wright133bea02017-05-01 17:30:08 +01001478 u8 reserved_at_a0[0x80];
1479
1480 u8 port_xmit_wait[0x20];
Meny Yossefi1c64bf62016-02-18 18:15:00 +02001481};
1482
Saeed Mahameede2816822015-05-28 22:28:40 +03001483struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits {
1484 u8 transmit_queue_high[0x20];
1485
1486 u8 transmit_queue_low[0x20];
1487
Matan Barakb4ff3a32016-02-09 14:57:42 +02001488 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001489};
1490
1491struct mlx5_ifc_eth_per_prio_grp_data_layout_bits {
1492 u8 rx_octets_high[0x20];
1493
1494 u8 rx_octets_low[0x20];
1495
Matan Barakb4ff3a32016-02-09 14:57:42 +02001496 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001497
1498 u8 rx_frames_high[0x20];
1499
1500 u8 rx_frames_low[0x20];
1501
1502 u8 tx_octets_high[0x20];
1503
1504 u8 tx_octets_low[0x20];
1505
Matan Barakb4ff3a32016-02-09 14:57:42 +02001506 u8 reserved_at_180[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001507
1508 u8 tx_frames_high[0x20];
1509
1510 u8 tx_frames_low[0x20];
1511
1512 u8 rx_pause_high[0x20];
1513
1514 u8 rx_pause_low[0x20];
1515
1516 u8 rx_pause_duration_high[0x20];
1517
1518 u8 rx_pause_duration_low[0x20];
1519
1520 u8 tx_pause_high[0x20];
1521
1522 u8 tx_pause_low[0x20];
1523
1524 u8 tx_pause_duration_high[0x20];
1525
1526 u8 tx_pause_duration_low[0x20];
1527
1528 u8 rx_pause_transition_high[0x20];
1529
1530 u8 rx_pause_transition_low[0x20];
1531
Matan Barakb4ff3a32016-02-09 14:57:42 +02001532 u8 reserved_at_3c0[0x400];
Saeed Mahameede2816822015-05-28 22:28:40 +03001533};
1534
1535struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
1536 u8 port_transmit_wait_high[0x20];
1537
1538 u8 port_transmit_wait_low[0x20];
1539
Matan Barakb4ff3a32016-02-09 14:57:42 +02001540 u8 reserved_at_40[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03001541};
1542
1543struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
1544 u8 dot3stats_alignment_errors_high[0x20];
1545
1546 u8 dot3stats_alignment_errors_low[0x20];
1547
1548 u8 dot3stats_fcs_errors_high[0x20];
1549
1550 u8 dot3stats_fcs_errors_low[0x20];
1551
1552 u8 dot3stats_single_collision_frames_high[0x20];
1553
1554 u8 dot3stats_single_collision_frames_low[0x20];
1555
1556 u8 dot3stats_multiple_collision_frames_high[0x20];
1557
1558 u8 dot3stats_multiple_collision_frames_low[0x20];
1559
1560 u8 dot3stats_sqe_test_errors_high[0x20];
1561
1562 u8 dot3stats_sqe_test_errors_low[0x20];
1563
1564 u8 dot3stats_deferred_transmissions_high[0x20];
1565
1566 u8 dot3stats_deferred_transmissions_low[0x20];
1567
1568 u8 dot3stats_late_collisions_high[0x20];
1569
1570 u8 dot3stats_late_collisions_low[0x20];
1571
1572 u8 dot3stats_excessive_collisions_high[0x20];
1573
1574 u8 dot3stats_excessive_collisions_low[0x20];
1575
1576 u8 dot3stats_internal_mac_transmit_errors_high[0x20];
1577
1578 u8 dot3stats_internal_mac_transmit_errors_low[0x20];
1579
1580 u8 dot3stats_carrier_sense_errors_high[0x20];
1581
1582 u8 dot3stats_carrier_sense_errors_low[0x20];
1583
1584 u8 dot3stats_frame_too_longs_high[0x20];
1585
1586 u8 dot3stats_frame_too_longs_low[0x20];
1587
1588 u8 dot3stats_internal_mac_receive_errors_high[0x20];
1589
1590 u8 dot3stats_internal_mac_receive_errors_low[0x20];
1591
1592 u8 dot3stats_symbol_errors_high[0x20];
1593
1594 u8 dot3stats_symbol_errors_low[0x20];
1595
1596 u8 dot3control_in_unknown_opcodes_high[0x20];
1597
1598 u8 dot3control_in_unknown_opcodes_low[0x20];
1599
1600 u8 dot3in_pause_frames_high[0x20];
1601
1602 u8 dot3in_pause_frames_low[0x20];
1603
1604 u8 dot3out_pause_frames_high[0x20];
1605
1606 u8 dot3out_pause_frames_low[0x20];
1607
Matan Barakb4ff3a32016-02-09 14:57:42 +02001608 u8 reserved_at_400[0x3c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001609};
1610
1611struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits {
1612 u8 ether_stats_drop_events_high[0x20];
1613
1614 u8 ether_stats_drop_events_low[0x20];
1615
1616 u8 ether_stats_octets_high[0x20];
1617
1618 u8 ether_stats_octets_low[0x20];
1619
1620 u8 ether_stats_pkts_high[0x20];
1621
1622 u8 ether_stats_pkts_low[0x20];
1623
1624 u8 ether_stats_broadcast_pkts_high[0x20];
1625
1626 u8 ether_stats_broadcast_pkts_low[0x20];
1627
1628 u8 ether_stats_multicast_pkts_high[0x20];
1629
1630 u8 ether_stats_multicast_pkts_low[0x20];
1631
1632 u8 ether_stats_crc_align_errors_high[0x20];
1633
1634 u8 ether_stats_crc_align_errors_low[0x20];
1635
1636 u8 ether_stats_undersize_pkts_high[0x20];
1637
1638 u8 ether_stats_undersize_pkts_low[0x20];
1639
1640 u8 ether_stats_oversize_pkts_high[0x20];
1641
1642 u8 ether_stats_oversize_pkts_low[0x20];
1643
1644 u8 ether_stats_fragments_high[0x20];
1645
1646 u8 ether_stats_fragments_low[0x20];
1647
1648 u8 ether_stats_jabbers_high[0x20];
1649
1650 u8 ether_stats_jabbers_low[0x20];
1651
1652 u8 ether_stats_collisions_high[0x20];
1653
1654 u8 ether_stats_collisions_low[0x20];
1655
1656 u8 ether_stats_pkts64octets_high[0x20];
1657
1658 u8 ether_stats_pkts64octets_low[0x20];
1659
1660 u8 ether_stats_pkts65to127octets_high[0x20];
1661
1662 u8 ether_stats_pkts65to127octets_low[0x20];
1663
1664 u8 ether_stats_pkts128to255octets_high[0x20];
1665
1666 u8 ether_stats_pkts128to255octets_low[0x20];
1667
1668 u8 ether_stats_pkts256to511octets_high[0x20];
1669
1670 u8 ether_stats_pkts256to511octets_low[0x20];
1671
1672 u8 ether_stats_pkts512to1023octets_high[0x20];
1673
1674 u8 ether_stats_pkts512to1023octets_low[0x20];
1675
1676 u8 ether_stats_pkts1024to1518octets_high[0x20];
1677
1678 u8 ether_stats_pkts1024to1518octets_low[0x20];
1679
1680 u8 ether_stats_pkts1519to2047octets_high[0x20];
1681
1682 u8 ether_stats_pkts1519to2047octets_low[0x20];
1683
1684 u8 ether_stats_pkts2048to4095octets_high[0x20];
1685
1686 u8 ether_stats_pkts2048to4095octets_low[0x20];
1687
1688 u8 ether_stats_pkts4096to8191octets_high[0x20];
1689
1690 u8 ether_stats_pkts4096to8191octets_low[0x20];
1691
1692 u8 ether_stats_pkts8192to10239octets_high[0x20];
1693
1694 u8 ether_stats_pkts8192to10239octets_low[0x20];
1695
Matan Barakb4ff3a32016-02-09 14:57:42 +02001696 u8 reserved_at_540[0x280];
Saeed Mahameede2816822015-05-28 22:28:40 +03001697};
1698
1699struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits {
1700 u8 if_in_octets_high[0x20];
1701
1702 u8 if_in_octets_low[0x20];
1703
1704 u8 if_in_ucast_pkts_high[0x20];
1705
1706 u8 if_in_ucast_pkts_low[0x20];
1707
1708 u8 if_in_discards_high[0x20];
1709
1710 u8 if_in_discards_low[0x20];
1711
1712 u8 if_in_errors_high[0x20];
1713
1714 u8 if_in_errors_low[0x20];
1715
1716 u8 if_in_unknown_protos_high[0x20];
1717
1718 u8 if_in_unknown_protos_low[0x20];
1719
1720 u8 if_out_octets_high[0x20];
1721
1722 u8 if_out_octets_low[0x20];
1723
1724 u8 if_out_ucast_pkts_high[0x20];
1725
1726 u8 if_out_ucast_pkts_low[0x20];
1727
1728 u8 if_out_discards_high[0x20];
1729
1730 u8 if_out_discards_low[0x20];
1731
1732 u8 if_out_errors_high[0x20];
1733
1734 u8 if_out_errors_low[0x20];
1735
1736 u8 if_in_multicast_pkts_high[0x20];
1737
1738 u8 if_in_multicast_pkts_low[0x20];
1739
1740 u8 if_in_broadcast_pkts_high[0x20];
1741
1742 u8 if_in_broadcast_pkts_low[0x20];
1743
1744 u8 if_out_multicast_pkts_high[0x20];
1745
1746 u8 if_out_multicast_pkts_low[0x20];
1747
1748 u8 if_out_broadcast_pkts_high[0x20];
1749
1750 u8 if_out_broadcast_pkts_low[0x20];
1751
Matan Barakb4ff3a32016-02-09 14:57:42 +02001752 u8 reserved_at_340[0x480];
Saeed Mahameede2816822015-05-28 22:28:40 +03001753};
1754
1755struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits {
1756 u8 a_frames_transmitted_ok_high[0x20];
1757
1758 u8 a_frames_transmitted_ok_low[0x20];
1759
1760 u8 a_frames_received_ok_high[0x20];
1761
1762 u8 a_frames_received_ok_low[0x20];
1763
1764 u8 a_frame_check_sequence_errors_high[0x20];
1765
1766 u8 a_frame_check_sequence_errors_low[0x20];
1767
1768 u8 a_alignment_errors_high[0x20];
1769
1770 u8 a_alignment_errors_low[0x20];
1771
1772 u8 a_octets_transmitted_ok_high[0x20];
1773
1774 u8 a_octets_transmitted_ok_low[0x20];
1775
1776 u8 a_octets_received_ok_high[0x20];
1777
1778 u8 a_octets_received_ok_low[0x20];
1779
1780 u8 a_multicast_frames_xmitted_ok_high[0x20];
1781
1782 u8 a_multicast_frames_xmitted_ok_low[0x20];
1783
1784 u8 a_broadcast_frames_xmitted_ok_high[0x20];
1785
1786 u8 a_broadcast_frames_xmitted_ok_low[0x20];
1787
1788 u8 a_multicast_frames_received_ok_high[0x20];
1789
1790 u8 a_multicast_frames_received_ok_low[0x20];
1791
1792 u8 a_broadcast_frames_received_ok_high[0x20];
1793
1794 u8 a_broadcast_frames_received_ok_low[0x20];
1795
1796 u8 a_in_range_length_errors_high[0x20];
1797
1798 u8 a_in_range_length_errors_low[0x20];
1799
1800 u8 a_out_of_range_length_field_high[0x20];
1801
1802 u8 a_out_of_range_length_field_low[0x20];
1803
1804 u8 a_frame_too_long_errors_high[0x20];
1805
1806 u8 a_frame_too_long_errors_low[0x20];
1807
1808 u8 a_symbol_error_during_carrier_high[0x20];
1809
1810 u8 a_symbol_error_during_carrier_low[0x20];
1811
1812 u8 a_mac_control_frames_transmitted_high[0x20];
1813
1814 u8 a_mac_control_frames_transmitted_low[0x20];
1815
1816 u8 a_mac_control_frames_received_high[0x20];
1817
1818 u8 a_mac_control_frames_received_low[0x20];
1819
1820 u8 a_unsupported_opcodes_received_high[0x20];
1821
1822 u8 a_unsupported_opcodes_received_low[0x20];
1823
1824 u8 a_pause_mac_ctrl_frames_received_high[0x20];
1825
1826 u8 a_pause_mac_ctrl_frames_received_low[0x20];
1827
1828 u8 a_pause_mac_ctrl_frames_transmitted_high[0x20];
1829
1830 u8 a_pause_mac_ctrl_frames_transmitted_low[0x20];
1831
Matan Barakb4ff3a32016-02-09 14:57:42 +02001832 u8 reserved_at_4c0[0x300];
Saeed Mahameede2816822015-05-28 22:28:40 +03001833};
1834
Gal Pressman8ed1a632016-11-17 13:46:01 +02001835struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
1836 u8 life_time_counter_high[0x20];
1837
1838 u8 life_time_counter_low[0x20];
1839
1840 u8 rx_errors[0x20];
1841
1842 u8 tx_errors[0x20];
1843
1844 u8 l0_to_recovery_eieos[0x20];
1845
1846 u8 l0_to_recovery_ts[0x20];
1847
1848 u8 l0_to_recovery_framing[0x20];
1849
1850 u8 l0_to_recovery_retrain[0x20];
1851
1852 u8 crc_error_dllp[0x20];
1853
1854 u8 crc_error_tlp[0x20];
1855
1856 u8 reserved_at_140[0x680];
1857};
1858
Saeed Mahameede2816822015-05-28 22:28:40 +03001859struct mlx5_ifc_cmd_inter_comp_event_bits {
1860 u8 command_completion_vector[0x20];
1861
Matan Barakb4ff3a32016-02-09 14:57:42 +02001862 u8 reserved_at_20[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001863};
1864
1865struct mlx5_ifc_stall_vl_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001866 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001867 u8 port_num[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001868 u8 reserved_at_19[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03001869 u8 vl[0x4];
1870
Matan Barakb4ff3a32016-02-09 14:57:42 +02001871 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001872};
1873
1874struct mlx5_ifc_db_bf_congestion_event_bits {
1875 u8 event_subtype[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001876 u8 reserved_at_8[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001877 u8 congestion_level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001878 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001879
Matan Barakb4ff3a32016-02-09 14:57:42 +02001880 u8 reserved_at_20[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001881};
1882
1883struct mlx5_ifc_gpio_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001884 u8 reserved_at_0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001885
1886 u8 gpio_event_hi[0x20];
1887
1888 u8 gpio_event_lo[0x20];
1889
Matan Barakb4ff3a32016-02-09 14:57:42 +02001890 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001891};
1892
1893struct mlx5_ifc_port_state_change_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001894 u8 reserved_at_0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03001895
1896 u8 port_num[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001897 u8 reserved_at_44[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03001898
Matan Barakb4ff3a32016-02-09 14:57:42 +02001899 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001900};
1901
1902struct mlx5_ifc_dropped_packet_logged_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001903 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001904};
1905
1906enum {
1907 MLX5_CQ_ERROR_SYNDROME_CQ_OVERRUN = 0x1,
1908 MLX5_CQ_ERROR_SYNDROME_CQ_ACCESS_VIOLATION_ERROR = 0x2,
1909};
1910
1911struct mlx5_ifc_cq_error_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001912 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001913 u8 cqn[0x18];
1914
Matan Barakb4ff3a32016-02-09 14:57:42 +02001915 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03001916
Matan Barakb4ff3a32016-02-09 14:57:42 +02001917 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001918 u8 syndrome[0x8];
1919
Matan Barakb4ff3a32016-02-09 14:57:42 +02001920 u8 reserved_at_60[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03001921};
1922
1923struct mlx5_ifc_rdma_page_fault_event_bits {
1924 u8 bytes_committed[0x20];
1925
1926 u8 r_key[0x20];
1927
Matan Barakb4ff3a32016-02-09 14:57:42 +02001928 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001929 u8 packet_len[0x10];
1930
1931 u8 rdma_op_len[0x20];
1932
1933 u8 rdma_va[0x40];
1934
Matan Barakb4ff3a32016-02-09 14:57:42 +02001935 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001936 u8 rdma[0x1];
1937 u8 write[0x1];
1938 u8 requestor[0x1];
1939 u8 qp_number[0x18];
1940};
1941
1942struct mlx5_ifc_wqe_associated_page_fault_event_bits {
1943 u8 bytes_committed[0x20];
1944
Matan Barakb4ff3a32016-02-09 14:57:42 +02001945 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001946 u8 wqe_index[0x10];
1947
Matan Barakb4ff3a32016-02-09 14:57:42 +02001948 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03001949 u8 len[0x10];
1950
Matan Barakb4ff3a32016-02-09 14:57:42 +02001951 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03001952
Matan Barakb4ff3a32016-02-09 14:57:42 +02001953 u8 reserved_at_c0[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03001954 u8 rdma[0x1];
1955 u8 write_read[0x1];
1956 u8 requestor[0x1];
1957 u8 qpn[0x18];
1958};
1959
1960struct mlx5_ifc_qp_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001961 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001962
1963 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02001964 u8 reserved_at_a8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03001965
Matan Barakb4ff3a32016-02-09 14:57:42 +02001966 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001967 u8 qpn_rqn_sqn[0x18];
1968};
1969
1970struct mlx5_ifc_dct_events_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001971 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001972
Matan Barakb4ff3a32016-02-09 14:57:42 +02001973 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001974 u8 dct_number[0x18];
1975};
1976
1977struct mlx5_ifc_comp_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02001978 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03001979
Matan Barakb4ff3a32016-02-09 14:57:42 +02001980 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03001981 u8 cq_number[0x18];
1982};
1983
1984enum {
1985 MLX5_QPC_STATE_RST = 0x0,
1986 MLX5_QPC_STATE_INIT = 0x1,
1987 MLX5_QPC_STATE_RTR = 0x2,
1988 MLX5_QPC_STATE_RTS = 0x3,
1989 MLX5_QPC_STATE_SQER = 0x4,
1990 MLX5_QPC_STATE_ERR = 0x6,
1991 MLX5_QPC_STATE_SQD = 0x7,
1992 MLX5_QPC_STATE_SUSPENDED = 0x9,
1993};
1994
1995enum {
1996 MLX5_QPC_ST_RC = 0x0,
1997 MLX5_QPC_ST_UC = 0x1,
1998 MLX5_QPC_ST_UD = 0x2,
1999 MLX5_QPC_ST_XRC = 0x3,
2000 MLX5_QPC_ST_DCI = 0x5,
2001 MLX5_QPC_ST_QP0 = 0x7,
2002 MLX5_QPC_ST_QP1 = 0x8,
2003 MLX5_QPC_ST_RAW_DATAGRAM = 0x9,
2004 MLX5_QPC_ST_REG_UMR = 0xc,
2005};
2006
2007enum {
2008 MLX5_QPC_PM_STATE_ARMED = 0x0,
2009 MLX5_QPC_PM_STATE_REARM = 0x1,
2010 MLX5_QPC_PM_STATE_RESERVED = 0x2,
2011 MLX5_QPC_PM_STATE_MIGRATED = 0x3,
2012};
2013
2014enum {
2015 MLX5_QPC_END_PADDING_MODE_SCATTER_AS_IS = 0x0,
2016 MLX5_QPC_END_PADDING_MODE_PAD_TO_CACHE_LINE_ALIGNMENT = 0x1,
2017};
2018
2019enum {
2020 MLX5_QPC_MTU_256_BYTES = 0x1,
2021 MLX5_QPC_MTU_512_BYTES = 0x2,
2022 MLX5_QPC_MTU_1K_BYTES = 0x3,
2023 MLX5_QPC_MTU_2K_BYTES = 0x4,
2024 MLX5_QPC_MTU_4K_BYTES = 0x5,
2025 MLX5_QPC_MTU_RAW_ETHERNET_QP = 0x7,
2026};
2027
2028enum {
2029 MLX5_QPC_ATOMIC_MODE_IB_SPEC = 0x1,
2030 MLX5_QPC_ATOMIC_MODE_ONLY_8B = 0x2,
2031 MLX5_QPC_ATOMIC_MODE_UP_TO_8B = 0x3,
2032 MLX5_QPC_ATOMIC_MODE_UP_TO_16B = 0x4,
2033 MLX5_QPC_ATOMIC_MODE_UP_TO_32B = 0x5,
2034 MLX5_QPC_ATOMIC_MODE_UP_TO_64B = 0x6,
2035 MLX5_QPC_ATOMIC_MODE_UP_TO_128B = 0x7,
2036 MLX5_QPC_ATOMIC_MODE_UP_TO_256B = 0x8,
2037};
2038
2039enum {
2040 MLX5_QPC_CS_REQ_DISABLE = 0x0,
2041 MLX5_QPC_CS_REQ_UP_TO_32B = 0x11,
2042 MLX5_QPC_CS_REQ_UP_TO_64B = 0x22,
2043};
2044
2045enum {
2046 MLX5_QPC_CS_RES_DISABLE = 0x0,
2047 MLX5_QPC_CS_RES_UP_TO_32B = 0x1,
2048 MLX5_QPC_CS_RES_UP_TO_64B = 0x2,
2049};
2050
2051struct mlx5_ifc_qpc_bits {
2052 u8 state[0x4];
Aviv Heller84df61e2016-05-10 13:47:50 +03002053 u8 lag_tx_port_affinity[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002054 u8 st[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002055 u8 reserved_at_10[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002056 u8 pm_state[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002057 u8 reserved_at_15[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03002058 u8 end_padding_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002059 u8 reserved_at_1e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002060
2061 u8 wq_signature[0x1];
2062 u8 block_lb_mc[0x1];
2063 u8 atomic_like_write_en[0x1];
2064 u8 latency_sensitive[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002065 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002066 u8 drain_sigerr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002067 u8 reserved_at_26[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002068 u8 pd[0x18];
2069
2070 u8 mtu[0x3];
2071 u8 log_msg_max[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002072 u8 reserved_at_48[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002073 u8 log_rq_size[0x4];
2074 u8 log_rq_stride[0x3];
2075 u8 no_sq[0x1];
2076 u8 log_sq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002077 u8 reserved_at_55[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002078 u8 rlky[0x1];
Erez Shitrit1015c2e2016-02-21 16:27:16 +02002079 u8 ulp_stateless_offload_mode[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002080
2081 u8 counter_set_id[0x8];
2082 u8 uar_page[0x18];
2083
Matan Barakb4ff3a32016-02-09 14:57:42 +02002084 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002085 u8 user_index[0x18];
2086
Matan Barakb4ff3a32016-02-09 14:57:42 +02002087 u8 reserved_at_a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002088 u8 log_page_size[0x5];
2089 u8 remote_qpn[0x18];
2090
2091 struct mlx5_ifc_ads_bits primary_address_path;
2092
2093 struct mlx5_ifc_ads_bits secondary_address_path;
2094
2095 u8 log_ack_req_freq[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002096 u8 reserved_at_384[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002097 u8 log_sra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002098 u8 reserved_at_38b[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002099 u8 retry_count[0x3];
2100 u8 rnr_retry[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002101 u8 reserved_at_393[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002102 u8 fre[0x1];
2103 u8 cur_rnr_retry[0x3];
2104 u8 cur_retry_count[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002105 u8 reserved_at_39b[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002106
Matan Barakb4ff3a32016-02-09 14:57:42 +02002107 u8 reserved_at_3a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002108
Matan Barakb4ff3a32016-02-09 14:57:42 +02002109 u8 reserved_at_3c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002110 u8 next_send_psn[0x18];
2111
Matan Barakb4ff3a32016-02-09 14:57:42 +02002112 u8 reserved_at_3e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002113 u8 cqn_snd[0x18];
2114
Saeed Mahameed09a7d9e2016-07-19 01:17:59 +03002115 u8 reserved_at_400[0x8];
2116 u8 deth_sqpn[0x18];
2117
2118 u8 reserved_at_420[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002119
Matan Barakb4ff3a32016-02-09 14:57:42 +02002120 u8 reserved_at_440[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002121 u8 last_acked_psn[0x18];
2122
Matan Barakb4ff3a32016-02-09 14:57:42 +02002123 u8 reserved_at_460[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002124 u8 ssn[0x18];
2125
Matan Barakb4ff3a32016-02-09 14:57:42 +02002126 u8 reserved_at_480[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002127 u8 log_rra_max[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002128 u8 reserved_at_48b[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002129 u8 atomic_mode[0x4];
2130 u8 rre[0x1];
2131 u8 rwe[0x1];
2132 u8 rae[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002133 u8 reserved_at_493[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002134 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002135 u8 reserved_at_49a[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002136 u8 cd_slave_receive[0x1];
2137 u8 cd_slave_send[0x1];
2138 u8 cd_master[0x1];
2139
Matan Barakb4ff3a32016-02-09 14:57:42 +02002140 u8 reserved_at_4a0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002141 u8 min_rnr_nak[0x5];
2142 u8 next_rcv_psn[0x18];
2143
Matan Barakb4ff3a32016-02-09 14:57:42 +02002144 u8 reserved_at_4c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002145 u8 xrcd[0x18];
2146
Matan Barakb4ff3a32016-02-09 14:57:42 +02002147 u8 reserved_at_4e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002148 u8 cqn_rcv[0x18];
2149
2150 u8 dbr_addr[0x40];
2151
2152 u8 q_key[0x20];
2153
Matan Barakb4ff3a32016-02-09 14:57:42 +02002154 u8 reserved_at_560[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002155 u8 rq_type[0x3];
Saeed Mahameed74862162016-06-09 15:11:34 +03002156 u8 srqn_rmpn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002157
Matan Barakb4ff3a32016-02-09 14:57:42 +02002158 u8 reserved_at_580[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002159 u8 rmsn[0x18];
2160
2161 u8 hw_sq_wqebb_counter[0x10];
2162 u8 sw_sq_wqebb_counter[0x10];
2163
2164 u8 hw_rq_counter[0x20];
2165
2166 u8 sw_rq_counter[0x20];
2167
Matan Barakb4ff3a32016-02-09 14:57:42 +02002168 u8 reserved_at_600[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002169
Matan Barakb4ff3a32016-02-09 14:57:42 +02002170 u8 reserved_at_620[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03002171 u8 cgs[0x1];
2172 u8 cs_req[0x8];
2173 u8 cs_res[0x8];
2174
2175 u8 dc_access_key[0x40];
2176
Matan Barakb4ff3a32016-02-09 14:57:42 +02002177 u8 reserved_at_680[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002178};
2179
2180struct mlx5_ifc_roce_addr_layout_bits {
2181 u8 source_l3_address[16][0x8];
2182
Matan Barakb4ff3a32016-02-09 14:57:42 +02002183 u8 reserved_at_80[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002184 u8 vlan_valid[0x1];
2185 u8 vlan_id[0xc];
2186 u8 source_mac_47_32[0x10];
2187
2188 u8 source_mac_31_0[0x20];
2189
Matan Barakb4ff3a32016-02-09 14:57:42 +02002190 u8 reserved_at_c0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002191 u8 roce_l3_type[0x4];
2192 u8 roce_version[0x8];
2193
Matan Barakb4ff3a32016-02-09 14:57:42 +02002194 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002195};
2196
2197union mlx5_ifc_hca_cap_union_bits {
2198 struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
2199 struct mlx5_ifc_odp_cap_bits odp_cap;
2200 struct mlx5_ifc_atomic_caps_bits atomic_caps;
2201 struct mlx5_ifc_roce_cap_bits roce_cap;
2202 struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps;
2203 struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;
Saeed Mahameed495716b2015-12-01 18:03:19 +02002204 struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap;
Saeed Mahameedd6666752015-12-01 18:03:22 +02002205 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
Sagi Grimberg3f0393a2016-02-23 10:25:23 +02002206 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
Saeed Mahameed74862162016-06-09 15:11:34 +03002207 struct mlx5_ifc_qos_cap_bits qos_cap;
Ilan Tayarie29341f2017-03-13 20:05:45 +02002208 struct mlx5_ifc_fpga_cap_bits fpga_cap;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002209 u8 reserved_at_0[0x8000];
Saeed Mahameede2816822015-05-28 22:28:40 +03002210};
2211
2212enum {
2213 MLX5_FLOW_CONTEXT_ACTION_ALLOW = 0x1,
2214 MLX5_FLOW_CONTEXT_ACTION_DROP = 0x2,
2215 MLX5_FLOW_CONTEXT_ACTION_FWD_DEST = 0x4,
Amir Vadai9dc0b282016-05-13 12:55:39 +00002216 MLX5_FLOW_CONTEXT_ACTION_COUNT = 0x8,
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002217 MLX5_FLOW_CONTEXT_ACTION_ENCAP = 0x10,
2218 MLX5_FLOW_CONTEXT_ACTION_DECAP = 0x20,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002219 MLX5_FLOW_CONTEXT_ACTION_MOD_HDR = 0x40,
Saeed Mahameede2816822015-05-28 22:28:40 +03002220};
2221
2222struct mlx5_ifc_flow_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002223 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002224
2225 u8 group_id[0x20];
2226
Matan Barakb4ff3a32016-02-09 14:57:42 +02002227 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002228 u8 flow_tag[0x18];
2229
Matan Barakb4ff3a32016-02-09 14:57:42 +02002230 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002231 u8 action[0x10];
2232
Matan Barakb4ff3a32016-02-09 14:57:42 +02002233 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002234 u8 destination_list_size[0x18];
2235
Amir Vadai9dc0b282016-05-13 12:55:39 +00002236 u8 reserved_at_a0[0x8];
2237 u8 flow_counter_list_size[0x18];
2238
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03002239 u8 encap_id[0x20];
2240
Or Gerlitz2a69cb92017-01-19 19:31:25 +02002241 u8 modify_header_id[0x20];
2242
2243 u8 reserved_at_100[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002244
2245 struct mlx5_ifc_fte_match_param_bits match_value;
2246
Matan Barakb4ff3a32016-02-09 14:57:42 +02002247 u8 reserved_at_1200[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03002248
Amir Vadai9dc0b282016-05-13 12:55:39 +00002249 union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002250};
2251
2252enum {
2253 MLX5_XRC_SRQC_STATE_GOOD = 0x0,
2254 MLX5_XRC_SRQC_STATE_ERROR = 0x1,
2255};
2256
2257struct mlx5_ifc_xrc_srqc_bits {
2258 u8 state[0x4];
2259 u8 log_xrc_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002260 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002261
2262 u8 wq_signature[0x1];
2263 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002264 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002265 u8 rlky[0x1];
2266 u8 basic_cyclic_rcv_wqe[0x1];
2267 u8 log_rq_stride[0x3];
2268 u8 xrcd[0x18];
2269
2270 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002271 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002272 u8 cqn[0x18];
2273
Matan Barakb4ff3a32016-02-09 14:57:42 +02002274 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002275
2276 u8 user_index_equal_xrc_srqn[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002277 u8 reserved_at_81[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002278 u8 log_page_size[0x6];
2279 u8 user_index[0x18];
2280
Matan Barakb4ff3a32016-02-09 14:57:42 +02002281 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002282
Matan Barakb4ff3a32016-02-09 14:57:42 +02002283 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002284 u8 pd[0x18];
2285
2286 u8 lwm[0x10];
2287 u8 wqe_cnt[0x10];
2288
Matan Barakb4ff3a32016-02-09 14:57:42 +02002289 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002290
2291 u8 db_record_addr_h[0x20];
2292
2293 u8 db_record_addr_l[0x1e];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002294 u8 reserved_at_17e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002295
Matan Barakb4ff3a32016-02-09 14:57:42 +02002296 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002297};
2298
2299struct mlx5_ifc_traffic_counter_bits {
2300 u8 packets[0x40];
2301
2302 u8 octets[0x40];
2303};
2304
2305struct mlx5_ifc_tisc_bits {
Aviv Heller84df61e2016-05-10 13:47:50 +03002306 u8 strict_lag_tx_port_affinity[0x1];
2307 u8 reserved_at_1[0x3];
2308 u8 lag_tx_port_affinity[0x04];
2309
2310 u8 reserved_at_8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002311 u8 prio[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002312 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002313
Matan Barakb4ff3a32016-02-09 14:57:42 +02002314 u8 reserved_at_20[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03002315
Matan Barakb4ff3a32016-02-09 14:57:42 +02002316 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002317 u8 transport_domain[0x18];
2318
Erez Shitrit500a3d02017-04-13 06:36:51 +03002319 u8 reserved_at_140[0x8];
2320 u8 underlay_qpn[0x18];
2321 u8 reserved_at_160[0x3a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002322};
2323
2324enum {
2325 MLX5_TIRC_DISP_TYPE_DIRECT = 0x0,
2326 MLX5_TIRC_DISP_TYPE_INDIRECT = 0x1,
2327};
2328
2329enum {
2330 MLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO = 0x1,
2331 MLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO = 0x2,
2332};
2333
2334enum {
Saeed Mahameed2be69672015-07-23 23:35:56 +03002335 MLX5_RX_HASH_FN_NONE = 0x0,
2336 MLX5_RX_HASH_FN_INVERTED_XOR8 = 0x1,
2337 MLX5_RX_HASH_FN_TOEPLITZ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03002338};
2339
2340enum {
2341 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST_ = 0x1,
2342 MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST_ = 0x2,
2343};
2344
2345struct mlx5_ifc_tirc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002346 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002347
2348 u8 disp_type[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002349 u8 reserved_at_24[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03002350
Matan Barakb4ff3a32016-02-09 14:57:42 +02002351 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002352
Matan Barakb4ff3a32016-02-09 14:57:42 +02002353 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002354 u8 lro_timeout_period_usecs[0x10];
2355 u8 lro_enable_mask[0x4];
2356 u8 lro_max_ip_payload_size[0x8];
2357
Matan Barakb4ff3a32016-02-09 14:57:42 +02002358 u8 reserved_at_a0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002359
Matan Barakb4ff3a32016-02-09 14:57:42 +02002360 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002361 u8 inline_rqn[0x18];
2362
2363 u8 rx_hash_symmetric[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002364 u8 reserved_at_101[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002365 u8 tunneled_offload_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002366 u8 reserved_at_103[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002367 u8 indirect_table[0x18];
2368
2369 u8 rx_hash_fn[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002370 u8 reserved_at_124[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002371 u8 self_lb_block[0x2];
2372 u8 transport_domain[0x18];
2373
2374 u8 rx_hash_toeplitz_key[10][0x20];
2375
2376 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_outer;
2377
2378 struct mlx5_ifc_rx_hash_field_select_bits rx_hash_field_selector_inner;
2379
Matan Barakb4ff3a32016-02-09 14:57:42 +02002380 u8 reserved_at_2c0[0x4c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002381};
2382
2383enum {
2384 MLX5_SRQC_STATE_GOOD = 0x0,
2385 MLX5_SRQC_STATE_ERROR = 0x1,
2386};
2387
2388struct mlx5_ifc_srqc_bits {
2389 u8 state[0x4];
2390 u8 log_srq_size[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002391 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002392
2393 u8 wq_signature[0x1];
2394 u8 cont_srq[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002395 u8 reserved_at_22[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002396 u8 rlky[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002397 u8 reserved_at_24[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002398 u8 log_rq_stride[0x3];
2399 u8 xrcd[0x18];
2400
2401 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002402 u8 reserved_at_46[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002403 u8 cqn[0x18];
2404
Matan Barakb4ff3a32016-02-09 14:57:42 +02002405 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002406
Matan Barakb4ff3a32016-02-09 14:57:42 +02002407 u8 reserved_at_80[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002408 u8 log_page_size[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002409 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002410
Matan Barakb4ff3a32016-02-09 14:57:42 +02002411 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002412
Matan Barakb4ff3a32016-02-09 14:57:42 +02002413 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002414 u8 pd[0x18];
2415
2416 u8 lwm[0x10];
2417 u8 wqe_cnt[0x10];
2418
Matan Barakb4ff3a32016-02-09 14:57:42 +02002419 u8 reserved_at_100[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002420
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03002421 u8 dbr_addr[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002422
Matan Barakb4ff3a32016-02-09 14:57:42 +02002423 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002424};
2425
2426enum {
2427 MLX5_SQC_STATE_RST = 0x0,
2428 MLX5_SQC_STATE_RDY = 0x1,
2429 MLX5_SQC_STATE_ERR = 0x3,
2430};
2431
2432struct mlx5_ifc_sqc_bits {
2433 u8 rlky[0x1];
2434 u8 cd_master[0x1];
2435 u8 fre[0x1];
2436 u8 flush_in_error_en[0x1];
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002437 u8 reserved_at_4[0x1];
2438 u8 min_wqe_inline_mode[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002439 u8 state[0x4];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002440 u8 reg_umr[0x1];
2441 u8 reserved_at_d[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03002442
Matan Barakb4ff3a32016-02-09 14:57:42 +02002443 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002444 u8 user_index[0x18];
2445
Matan Barakb4ff3a32016-02-09 14:57:42 +02002446 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002447 u8 cqn[0x18];
2448
Saeed Mahameed74862162016-06-09 15:11:34 +03002449 u8 reserved_at_60[0x90];
Saeed Mahameede2816822015-05-28 22:28:40 +03002450
Saeed Mahameed74862162016-06-09 15:11:34 +03002451 u8 packet_pacing_rate_limit_index[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002452 u8 tis_lst_sz[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002453 u8 reserved_at_110[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002454
Matan Barakb4ff3a32016-02-09 14:57:42 +02002455 u8 reserved_at_120[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002456
Matan Barakb4ff3a32016-02-09 14:57:42 +02002457 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002458 u8 tis_num_0[0x18];
2459
2460 struct mlx5_ifc_wq_bits wq;
2461};
2462
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03002463enum {
2464 SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR = 0x0,
2465 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT = 0x1,
2466 SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC = 0x2,
2467 SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC = 0x3,
2468};
2469
2470struct mlx5_ifc_scheduling_context_bits {
2471 u8 element_type[0x8];
2472 u8 reserved_at_8[0x18];
2473
2474 u8 element_attributes[0x20];
2475
2476 u8 parent_element_id[0x20];
2477
2478 u8 reserved_at_60[0x40];
2479
2480 u8 bw_share[0x20];
2481
2482 u8 max_average_bw[0x20];
2483
2484 u8 reserved_at_e0[0x120];
2485};
2486
Saeed Mahameede2816822015-05-28 22:28:40 +03002487struct mlx5_ifc_rqtc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002488 u8 reserved_at_0[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002489
Matan Barakb4ff3a32016-02-09 14:57:42 +02002490 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002491 u8 rqt_max_size[0x10];
2492
Matan Barakb4ff3a32016-02-09 14:57:42 +02002493 u8 reserved_at_c0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002494 u8 rqt_actual_size[0x10];
2495
Matan Barakb4ff3a32016-02-09 14:57:42 +02002496 u8 reserved_at_e0[0x6a0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002497
2498 struct mlx5_ifc_rq_num_bits rq_num[0];
2499};
2500
2501enum {
2502 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE = 0x0,
2503 MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_RMP = 0x1,
2504};
2505
2506enum {
2507 MLX5_RQC_STATE_RST = 0x0,
2508 MLX5_RQC_STATE_RDY = 0x1,
2509 MLX5_RQC_STATE_ERR = 0x3,
2510};
2511
2512struct mlx5_ifc_rqc_bits {
2513 u8 rlky[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002514 u8 reserved_at_1[0x1];
2515 u8 scatter_fcs[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002516 u8 vsd[0x1];
2517 u8 mem_rq_type[0x4];
2518 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002519 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002520 u8 flush_in_error_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002521 u8 reserved_at_e[0x12];
Saeed Mahameede2816822015-05-28 22:28:40 +03002522
Matan Barakb4ff3a32016-02-09 14:57:42 +02002523 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002524 u8 user_index[0x18];
2525
Matan Barakb4ff3a32016-02-09 14:57:42 +02002526 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002527 u8 cqn[0x18];
2528
2529 u8 counter_set_id[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002530 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002531
Matan Barakb4ff3a32016-02-09 14:57:42 +02002532 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002533 u8 rmpn[0x18];
2534
Matan Barakb4ff3a32016-02-09 14:57:42 +02002535 u8 reserved_at_a0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002536
2537 struct mlx5_ifc_wq_bits wq;
2538};
2539
2540enum {
2541 MLX5_RMPC_STATE_RDY = 0x1,
2542 MLX5_RMPC_STATE_ERR = 0x3,
2543};
2544
2545struct mlx5_ifc_rmpc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002546 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002547 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002548 u8 reserved_at_c[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002549
2550 u8 basic_cyclic_rcv_wqe[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002551 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03002552
Matan Barakb4ff3a32016-02-09 14:57:42 +02002553 u8 reserved_at_40[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03002554
2555 struct mlx5_ifc_wq_bits wq;
2556};
2557
Saeed Mahameede2816822015-05-28 22:28:40 +03002558struct mlx5_ifc_nic_vport_context_bits {
Hadar Hen Zioncff92d72016-07-24 16:12:40 +03002559 u8 reserved_at_0[0x5];
2560 u8 min_wqe_inline_mode[0x3];
2561 u8 reserved_at_8[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03002562 u8 roce_en[0x1];
2563
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002564 u8 arm_change_event[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002565 u8 reserved_at_21[0x1a];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002566 u8 event_on_mtu[0x1];
2567 u8 event_on_promisc_change[0x1];
2568 u8 event_on_vlan_change[0x1];
2569 u8 event_on_mc_address_change[0x1];
2570 u8 event_on_uc_address_change[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002571
Matan Barakb4ff3a32016-02-09 14:57:42 +02002572 u8 reserved_at_40[0xf0];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002573
2574 u8 mtu[0x10];
2575
Achiad Shochat9efa7522015-12-23 18:47:20 +02002576 u8 system_image_guid[0x40];
2577 u8 port_guid[0x40];
2578 u8 node_guid[0x40];
2579
Matan Barakb4ff3a32016-02-09 14:57:42 +02002580 u8 reserved_at_200[0x140];
Achiad Shochat9efa7522015-12-23 18:47:20 +02002581 u8 qkey_violation_counter[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002582 u8 reserved_at_350[0x430];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02002583
2584 u8 promisc_uc[0x1];
2585 u8 promisc_mc[0x1];
2586 u8 promisc_all[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002587 u8 reserved_at_783[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002588 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002589 u8 reserved_at_788[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002590 u8 allowed_list_size[0xc];
2591
2592 struct mlx5_ifc_mac_address_layout_bits permanent_address;
2593
Matan Barakb4ff3a32016-02-09 14:57:42 +02002594 u8 reserved_at_7e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002595
2596 u8 current_uc_mac_address[0][0x40];
2597};
2598
2599enum {
2600 MLX5_MKC_ACCESS_MODE_PA = 0x0,
2601 MLX5_MKC_ACCESS_MODE_MTT = 0x1,
2602 MLX5_MKC_ACCESS_MODE_KLMS = 0x2,
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02002603 MLX5_MKC_ACCESS_MODE_KSM = 0x3,
Saeed Mahameede2816822015-05-28 22:28:40 +03002604};
2605
2606struct mlx5_ifc_mkc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002607 u8 reserved_at_0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002608 u8 free[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002609 u8 reserved_at_2[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002610 u8 small_fence_on_rdma_read_response[0x1];
2611 u8 umr_en[0x1];
2612 u8 a[0x1];
2613 u8 rw[0x1];
2614 u8 rr[0x1];
2615 u8 lw[0x1];
2616 u8 lr[0x1];
2617 u8 access_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002618 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002619
2620 u8 qpn[0x18];
2621 u8 mkey_7_0[0x8];
2622
Matan Barakb4ff3a32016-02-09 14:57:42 +02002623 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002624
2625 u8 length64[0x1];
2626 u8 bsf_en[0x1];
2627 u8 sync_umr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002628 u8 reserved_at_63[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03002629 u8 expected_sigerr_count[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002630 u8 reserved_at_66[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002631 u8 en_rinval[0x1];
2632 u8 pd[0x18];
2633
2634 u8 start_addr[0x40];
2635
2636 u8 len[0x40];
2637
2638 u8 bsf_octword_size[0x20];
2639
Matan Barakb4ff3a32016-02-09 14:57:42 +02002640 u8 reserved_at_120[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002641
2642 u8 translations_octword_size[0x20];
2643
Matan Barakb4ff3a32016-02-09 14:57:42 +02002644 u8 reserved_at_1c0[0x1b];
Saeed Mahameede2816822015-05-28 22:28:40 +03002645 u8 log_page_size[0x5];
2646
Matan Barakb4ff3a32016-02-09 14:57:42 +02002647 u8 reserved_at_1e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002648};
2649
2650struct mlx5_ifc_pkey_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002651 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002652 u8 pkey[0x10];
2653};
2654
2655struct mlx5_ifc_array128_auto_bits {
2656 u8 array128_auto[16][0x8];
2657};
2658
2659struct mlx5_ifc_hca_vport_context_bits {
2660 u8 field_select[0x20];
2661
Matan Barakb4ff3a32016-02-09 14:57:42 +02002662 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002663
2664 u8 sm_virt_aware[0x1];
2665 u8 has_smi[0x1];
2666 u8 has_raw[0x1];
2667 u8 grh_required[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002668 u8 reserved_at_104[0xc];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002669 u8 port_physical_state[0x4];
2670 u8 vport_state_policy[0x4];
2671 u8 port_state[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002672 u8 vport_state[0x4];
2673
Matan Barakb4ff3a32016-02-09 14:57:42 +02002674 u8 reserved_at_120[0x20];
Majd Dibbiny707c4602015-06-04 19:30:41 +03002675
2676 u8 system_image_guid[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002677
2678 u8 port_guid[0x40];
2679
2680 u8 node_guid[0x40];
2681
2682 u8 cap_mask1[0x20];
2683
2684 u8 cap_mask1_field_select[0x20];
2685
2686 u8 cap_mask2[0x20];
2687
2688 u8 cap_mask2_field_select[0x20];
2689
Matan Barakb4ff3a32016-02-09 14:57:42 +02002690 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002691
2692 u8 lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002693 u8 reserved_at_310[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002694 u8 init_type_reply[0x4];
2695 u8 lmc[0x3];
2696 u8 subnet_timeout[0x5];
2697
2698 u8 sm_lid[0x10];
2699 u8 sm_sl[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002700 u8 reserved_at_334[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03002701
2702 u8 qkey_violation_counter[0x10];
2703 u8 pkey_violation_counter[0x10];
2704
Matan Barakb4ff3a32016-02-09 14:57:42 +02002705 u8 reserved_at_360[0xca0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002706};
2707
Saeed Mahameedd6666752015-12-01 18:03:22 +02002708struct mlx5_ifc_esw_vport_context_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002709 u8 reserved_at_0[0x3];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002710 u8 vport_svlan_strip[0x1];
2711 u8 vport_cvlan_strip[0x1];
2712 u8 vport_svlan_insert[0x1];
2713 u8 vport_cvlan_insert[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002714 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002715
Matan Barakb4ff3a32016-02-09 14:57:42 +02002716 u8 reserved_at_20[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002717
2718 u8 svlan_cfi[0x1];
2719 u8 svlan_pcp[0x3];
2720 u8 svlan_id[0xc];
2721 u8 cvlan_cfi[0x1];
2722 u8 cvlan_pcp[0x3];
2723 u8 cvlan_id[0xc];
2724
Matan Barakb4ff3a32016-02-09 14:57:42 +02002725 u8 reserved_at_60[0x7a0];
Saeed Mahameedd6666752015-12-01 18:03:22 +02002726};
2727
Saeed Mahameede2816822015-05-28 22:28:40 +03002728enum {
2729 MLX5_EQC_STATUS_OK = 0x0,
2730 MLX5_EQC_STATUS_EQ_WRITE_FAILURE = 0xa,
2731};
2732
2733enum {
2734 MLX5_EQC_ST_ARMED = 0x9,
2735 MLX5_EQC_ST_FIRED = 0xa,
2736};
2737
2738struct mlx5_ifc_eqc_bits {
2739 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002740 u8 reserved_at_4[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03002741 u8 ec[0x1];
2742 u8 oi[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002743 u8 reserved_at_f[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002744 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002745 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002746
Matan Barakb4ff3a32016-02-09 14:57:42 +02002747 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002748
Matan Barakb4ff3a32016-02-09 14:57:42 +02002749 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002750 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002751 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002752
Matan Barakb4ff3a32016-02-09 14:57:42 +02002753 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002754 u8 log_eq_size[0x5];
2755 u8 uar_page[0x18];
2756
Matan Barakb4ff3a32016-02-09 14:57:42 +02002757 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002758
Matan Barakb4ff3a32016-02-09 14:57:42 +02002759 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002760 u8 intr[0x8];
2761
Matan Barakb4ff3a32016-02-09 14:57:42 +02002762 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002763 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002764 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002765
Matan Barakb4ff3a32016-02-09 14:57:42 +02002766 u8 reserved_at_e0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03002767
Matan Barakb4ff3a32016-02-09 14:57:42 +02002768 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002769 u8 consumer_counter[0x18];
2770
Matan Barakb4ff3a32016-02-09 14:57:42 +02002771 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002772 u8 producer_counter[0x18];
2773
Matan Barakb4ff3a32016-02-09 14:57:42 +02002774 u8 reserved_at_180[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03002775};
2776
2777enum {
2778 MLX5_DCTC_STATE_ACTIVE = 0x0,
2779 MLX5_DCTC_STATE_DRAINING = 0x1,
2780 MLX5_DCTC_STATE_DRAINED = 0x2,
2781};
2782
2783enum {
2784 MLX5_DCTC_CS_RES_DISABLE = 0x0,
2785 MLX5_DCTC_CS_RES_NA = 0x1,
2786 MLX5_DCTC_CS_RES_UP_TO_64B = 0x2,
2787};
2788
2789enum {
2790 MLX5_DCTC_MTU_256_BYTES = 0x1,
2791 MLX5_DCTC_MTU_512_BYTES = 0x2,
2792 MLX5_DCTC_MTU_1K_BYTES = 0x3,
2793 MLX5_DCTC_MTU_2K_BYTES = 0x4,
2794 MLX5_DCTC_MTU_4K_BYTES = 0x5,
2795};
2796
2797struct mlx5_ifc_dctc_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002798 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002799 u8 state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002800 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002801
Matan Barakb4ff3a32016-02-09 14:57:42 +02002802 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002803 u8 user_index[0x18];
2804
Matan Barakb4ff3a32016-02-09 14:57:42 +02002805 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002806 u8 cqn[0x18];
2807
2808 u8 counter_set_id[0x8];
2809 u8 atomic_mode[0x4];
2810 u8 rre[0x1];
2811 u8 rwe[0x1];
2812 u8 rae[0x1];
2813 u8 atomic_like_write_en[0x1];
2814 u8 latency_sensitive[0x1];
2815 u8 rlky[0x1];
2816 u8 free_ar[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002817 u8 reserved_at_73[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03002818
Matan Barakb4ff3a32016-02-09 14:57:42 +02002819 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002820 u8 cs_res[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002821 u8 reserved_at_90[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002822 u8 min_rnr_nak[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002823 u8 reserved_at_98[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002824
Matan Barakb4ff3a32016-02-09 14:57:42 +02002825 u8 reserved_at_a0[0x8];
Saeed Mahameed74862162016-06-09 15:11:34 +03002826 u8 srqn_xrqn[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002827
Matan Barakb4ff3a32016-02-09 14:57:42 +02002828 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002829 u8 pd[0x18];
2830
2831 u8 tclass[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002832 u8 reserved_at_e8[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002833 u8 flow_label[0x14];
2834
2835 u8 dc_access_key[0x40];
2836
Matan Barakb4ff3a32016-02-09 14:57:42 +02002837 u8 reserved_at_140[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03002838 u8 mtu[0x3];
2839 u8 port[0x8];
2840 u8 pkey_index[0x10];
2841
Matan Barakb4ff3a32016-02-09 14:57:42 +02002842 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002843 u8 my_addr_index[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002844 u8 reserved_at_170[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002845 u8 hop_limit[0x8];
2846
2847 u8 dc_access_key_violation_count[0x20];
2848
Matan Barakb4ff3a32016-02-09 14:57:42 +02002849 u8 reserved_at_1a0[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002850 u8 dei_cfi[0x1];
2851 u8 eth_prio[0x3];
2852 u8 ecn[0x2];
2853 u8 dscp[0x6];
2854
Matan Barakb4ff3a32016-02-09 14:57:42 +02002855 u8 reserved_at_1c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002856};
2857
2858enum {
2859 MLX5_CQC_STATUS_OK = 0x0,
2860 MLX5_CQC_STATUS_CQ_OVERFLOW = 0x9,
2861 MLX5_CQC_STATUS_CQ_WRITE_FAIL = 0xa,
2862};
2863
2864enum {
2865 MLX5_CQC_CQE_SZ_64_BYTES = 0x0,
2866 MLX5_CQC_CQE_SZ_128_BYTES = 0x1,
2867};
2868
2869enum {
2870 MLX5_CQC_ST_SOLICITED_NOTIFICATION_REQUEST_ARMED = 0x6,
2871 MLX5_CQC_ST_NOTIFICATION_REQUEST_ARMED = 0x9,
2872 MLX5_CQC_ST_FIRED = 0xa,
2873};
2874
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002875enum {
2876 MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
2877 MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
Saeed Mahameed74862162016-06-09 15:11:34 +03002878 MLX5_CQ_PERIOD_NUM_MODES
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002879};
2880
Saeed Mahameede2816822015-05-28 22:28:40 +03002881struct mlx5_ifc_cqc_bits {
2882 u8 status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002883 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002884 u8 cqe_sz[0x3];
2885 u8 cc[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002886 u8 reserved_at_c[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002887 u8 scqe_break_moderation_en[0x1];
2888 u8 oi[0x1];
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03002889 u8 cq_period_mode[0x2];
2890 u8 cqe_comp_en[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03002891 u8 mini_cqe_res_format[0x2];
2892 u8 st[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002893 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002894
Matan Barakb4ff3a32016-02-09 14:57:42 +02002895 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002896
Matan Barakb4ff3a32016-02-09 14:57:42 +02002897 u8 reserved_at_40[0x14];
Saeed Mahameede2816822015-05-28 22:28:40 +03002898 u8 page_offset[0x6];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002899 u8 reserved_at_5a[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03002900
Matan Barakb4ff3a32016-02-09 14:57:42 +02002901 u8 reserved_at_60[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002902 u8 log_cq_size[0x5];
2903 u8 uar_page[0x18];
2904
Matan Barakb4ff3a32016-02-09 14:57:42 +02002905 u8 reserved_at_80[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03002906 u8 cq_period[0xc];
2907 u8 cq_max_count[0x10];
2908
Matan Barakb4ff3a32016-02-09 14:57:42 +02002909 u8 reserved_at_a0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002910 u8 c_eqn[0x8];
2911
Matan Barakb4ff3a32016-02-09 14:57:42 +02002912 u8 reserved_at_c0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03002913 u8 log_page_size[0x5];
Matan Barakb4ff3a32016-02-09 14:57:42 +02002914 u8 reserved_at_c8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03002915
Matan Barakb4ff3a32016-02-09 14:57:42 +02002916 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03002917
Matan Barakb4ff3a32016-02-09 14:57:42 +02002918 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002919 u8 last_notified_index[0x18];
2920
Matan Barakb4ff3a32016-02-09 14:57:42 +02002921 u8 reserved_at_120[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002922 u8 last_solicit_index[0x18];
2923
Matan Barakb4ff3a32016-02-09 14:57:42 +02002924 u8 reserved_at_140[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002925 u8 consumer_counter[0x18];
2926
Matan Barakb4ff3a32016-02-09 14:57:42 +02002927 u8 reserved_at_160[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03002928 u8 producer_counter[0x18];
2929
Matan Barakb4ff3a32016-02-09 14:57:42 +02002930 u8 reserved_at_180[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03002931
2932 u8 dbr_addr[0x40];
2933};
2934
2935union mlx5_ifc_cong_control_roce_ecn_auto_bits {
2936 struct mlx5_ifc_cong_control_802_1qau_rp_bits cong_control_802_1qau_rp;
2937 struct mlx5_ifc_cong_control_r_roce_ecn_rp_bits cong_control_r_roce_ecn_rp;
2938 struct mlx5_ifc_cong_control_r_roce_ecn_np_bits cong_control_r_roce_ecn_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02002939 u8 reserved_at_0[0x800];
Saeed Mahameede2816822015-05-28 22:28:40 +03002940};
2941
2942struct mlx5_ifc_query_adapter_param_block_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02002943 u8 reserved_at_0[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03002944
Matan Barakb4ff3a32016-02-09 14:57:42 +02002945 u8 reserved_at_c0[0x8];
Majd Dibbiny211e6c82015-06-04 19:30:42 +03002946 u8 ieee_vendor_id[0x18];
2947
Matan Barakb4ff3a32016-02-09 14:57:42 +02002948 u8 reserved_at_e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03002949 u8 vsd_vendor_id[0x10];
2950
2951 u8 vsd[208][0x8];
2952
2953 u8 vsd_contd_psid[16][0x8];
2954};
2955
Saeed Mahameed74862162016-06-09 15:11:34 +03002956enum {
2957 MLX5_XRQC_STATE_GOOD = 0x0,
2958 MLX5_XRQC_STATE_ERROR = 0x1,
2959};
2960
2961enum {
2962 MLX5_XRQC_TOPOLOGY_NO_SPECIAL_TOPOLOGY = 0x0,
2963 MLX5_XRQC_TOPOLOGY_TAG_MATCHING = 0x1,
2964};
2965
2966enum {
2967 MLX5_XRQC_OFFLOAD_RNDV = 0x1,
2968};
2969
2970struct mlx5_ifc_tag_matching_topology_context_bits {
2971 u8 log_matching_list_sz[0x4];
2972 u8 reserved_at_4[0xc];
2973 u8 append_next_index[0x10];
2974
2975 u8 sw_phase_cnt[0x10];
2976 u8 hw_phase_cnt[0x10];
2977
2978 u8 reserved_at_40[0x40];
2979};
2980
2981struct mlx5_ifc_xrqc_bits {
2982 u8 state[0x4];
2983 u8 rlkey[0x1];
2984 u8 reserved_at_5[0xf];
2985 u8 topology[0x4];
2986 u8 reserved_at_18[0x4];
2987 u8 offload[0x4];
2988
2989 u8 reserved_at_20[0x8];
2990 u8 user_index[0x18];
2991
2992 u8 reserved_at_40[0x8];
2993 u8 cqn[0x18];
2994
2995 u8 reserved_at_60[0xa0];
2996
2997 struct mlx5_ifc_tag_matching_topology_context_bits tag_matching_topology_context;
2998
Artemy Kovalyov5579e152016-08-31 05:17:54 +00002999 u8 reserved_at_180[0x880];
Saeed Mahameed74862162016-06-09 15:11:34 +03003000
3001 struct mlx5_ifc_wq_bits wq;
3002};
3003
Saeed Mahameede2816822015-05-28 22:28:40 +03003004union mlx5_ifc_modify_field_select_resize_field_select_auto_bits {
3005 struct mlx5_ifc_modify_field_select_bits modify_field_select;
3006 struct mlx5_ifc_resize_field_select_bits resize_field_select;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003007 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003008};
3009
3010union mlx5_ifc_field_select_802_1_r_roce_auto_bits {
3011 struct mlx5_ifc_field_select_802_1qau_rp_bits field_select_802_1qau_rp;
3012 struct mlx5_ifc_field_select_r_roce_rp_bits field_select_r_roce_rp;
3013 struct mlx5_ifc_field_select_r_roce_np_bits field_select_r_roce_np;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003014 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003015};
3016
3017union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits {
3018 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
3019 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
3020 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
3021 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
3022 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
3023 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
3024 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02003025 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03003026 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
Gal Pressmand8dc0502016-09-27 17:04:51 +03003027 struct mlx5_ifc_phys_layer_statistical_cntrs_bits phys_layer_statistical_cntrs;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003028 u8 reserved_at_0[0x7c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003029};
3030
Gal Pressman8ed1a632016-11-17 13:46:01 +02003031union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits {
3032 struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits pcie_perf_cntrs_grp_data_layout;
3033 u8 reserved_at_0[0x7c0];
3034};
3035
Saeed Mahameede2816822015-05-28 22:28:40 +03003036union mlx5_ifc_event_auto_bits {
3037 struct mlx5_ifc_comp_event_bits comp_event;
3038 struct mlx5_ifc_dct_events_bits dct_events;
3039 struct mlx5_ifc_qp_events_bits qp_events;
3040 struct mlx5_ifc_wqe_associated_page_fault_event_bits wqe_associated_page_fault_event;
3041 struct mlx5_ifc_rdma_page_fault_event_bits rdma_page_fault_event;
3042 struct mlx5_ifc_cq_error_bits cq_error;
3043 struct mlx5_ifc_dropped_packet_logged_bits dropped_packet_logged;
3044 struct mlx5_ifc_port_state_change_event_bits port_state_change_event;
3045 struct mlx5_ifc_gpio_event_bits gpio_event;
3046 struct mlx5_ifc_db_bf_congestion_event_bits db_bf_congestion_event;
3047 struct mlx5_ifc_stall_vl_event_bits stall_vl_event;
3048 struct mlx5_ifc_cmd_inter_comp_event_bits cmd_inter_comp_event;
Matan Barakb4ff3a32016-02-09 14:57:42 +02003049 u8 reserved_at_0[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003050};
3051
3052struct mlx5_ifc_health_buffer_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02003053 u8 reserved_at_0[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03003054
3055 u8 assert_existptr[0x20];
3056
3057 u8 assert_callra[0x20];
3058
Matan Barakb4ff3a32016-02-09 14:57:42 +02003059 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003060
3061 u8 fw_version[0x20];
3062
3063 u8 hw_id[0x20];
3064
Matan Barakb4ff3a32016-02-09 14:57:42 +02003065 u8 reserved_at_1c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003066
3067 u8 irisc_index[0x8];
3068 u8 synd[0x8];
3069 u8 ext_synd[0x10];
3070};
3071
3072struct mlx5_ifc_register_loopback_control_bits {
3073 u8 no_lb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003074 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03003075 u8 port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003076 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003077
Matan Barakb4ff3a32016-02-09 14:57:42 +02003078 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003079};
3080
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003081struct mlx5_ifc_vport_tc_element_bits {
3082 u8 traffic_class[0x4];
3083 u8 reserved_at_4[0xc];
3084 u8 vport_number[0x10];
3085};
3086
3087struct mlx5_ifc_vport_element_bits {
3088 u8 reserved_at_0[0x10];
3089 u8 vport_number[0x10];
3090};
3091
3092enum {
3093 TSAR_ELEMENT_TSAR_TYPE_DWRR = 0x0,
3094 TSAR_ELEMENT_TSAR_TYPE_ROUND_ROBIN = 0x1,
3095 TSAR_ELEMENT_TSAR_TYPE_ETS = 0x2,
3096};
3097
3098struct mlx5_ifc_tsar_element_bits {
3099 u8 reserved_at_0[0x8];
3100 u8 tsar_type[0x8];
3101 u8 reserved_at_10[0x10];
3102};
3103
Majd Dibbiny8812c242017-02-09 14:20:12 +02003104enum {
3105 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_SUCCESS = 0x0,
3106 MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL = 0x1,
3107};
3108
Saeed Mahameede2816822015-05-28 22:28:40 +03003109struct mlx5_ifc_teardown_hca_out_bits {
3110 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003111 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003112
3113 u8 syndrome[0x20];
3114
Majd Dibbiny8812c242017-02-09 14:20:12 +02003115 u8 reserved_at_40[0x3f];
3116
3117 u8 force_state[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03003118};
3119
3120enum {
3121 MLX5_TEARDOWN_HCA_IN_PROFILE_GRACEFUL_CLOSE = 0x0,
Majd Dibbiny8812c242017-02-09 14:20:12 +02003122 MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003123};
3124
3125struct mlx5_ifc_teardown_hca_in_bits {
3126 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003127 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003128
Matan Barakb4ff3a32016-02-09 14:57:42 +02003129 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003130 u8 op_mod[0x10];
3131
Matan Barakb4ff3a32016-02-09 14:57:42 +02003132 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003133 u8 profile[0x10];
3134
Matan Barakb4ff3a32016-02-09 14:57:42 +02003135 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003136};
3137
3138struct mlx5_ifc_sqerr2rts_qp_out_bits {
3139 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003140 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003141
3142 u8 syndrome[0x20];
3143
Matan Barakb4ff3a32016-02-09 14:57:42 +02003144 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003145};
3146
3147struct mlx5_ifc_sqerr2rts_qp_in_bits {
3148 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003149 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003150
Matan Barakb4ff3a32016-02-09 14:57:42 +02003151 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003152 u8 op_mod[0x10];
3153
Matan Barakb4ff3a32016-02-09 14:57:42 +02003154 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003155 u8 qpn[0x18];
3156
Matan Barakb4ff3a32016-02-09 14:57:42 +02003157 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003158
3159 u8 opt_param_mask[0x20];
3160
Matan Barakb4ff3a32016-02-09 14:57:42 +02003161 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003162
3163 struct mlx5_ifc_qpc_bits qpc;
3164
Matan Barakb4ff3a32016-02-09 14:57:42 +02003165 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003166};
3167
3168struct mlx5_ifc_sqd2rts_qp_out_bits {
3169 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003170 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003171
3172 u8 syndrome[0x20];
3173
Matan Barakb4ff3a32016-02-09 14:57:42 +02003174 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003175};
3176
3177struct mlx5_ifc_sqd2rts_qp_in_bits {
3178 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003179 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003180
Matan Barakb4ff3a32016-02-09 14:57:42 +02003181 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003182 u8 op_mod[0x10];
3183
Matan Barakb4ff3a32016-02-09 14:57:42 +02003184 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003185 u8 qpn[0x18];
3186
Matan Barakb4ff3a32016-02-09 14:57:42 +02003187 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003188
3189 u8 opt_param_mask[0x20];
3190
Matan Barakb4ff3a32016-02-09 14:57:42 +02003191 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003192
3193 struct mlx5_ifc_qpc_bits qpc;
3194
Matan Barakb4ff3a32016-02-09 14:57:42 +02003195 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003196};
3197
3198struct mlx5_ifc_set_roce_address_out_bits {
3199 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003200 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003201
3202 u8 syndrome[0x20];
3203
Matan Barakb4ff3a32016-02-09 14:57:42 +02003204 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003205};
3206
3207struct mlx5_ifc_set_roce_address_in_bits {
3208 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003209 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003210
Matan Barakb4ff3a32016-02-09 14:57:42 +02003211 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003212 u8 op_mod[0x10];
3213
3214 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003215 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003216
Matan Barakb4ff3a32016-02-09 14:57:42 +02003217 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003218
3219 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3220};
3221
3222struct mlx5_ifc_set_mad_demux_out_bits {
3223 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003224 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003225
3226 u8 syndrome[0x20];
3227
Matan Barakb4ff3a32016-02-09 14:57:42 +02003228 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003229};
3230
3231enum {
3232 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_PASS_ALL = 0x0,
3233 MLX5_SET_MAD_DEMUX_IN_DEMUX_MODE_SELECTIVE = 0x2,
3234};
3235
3236struct mlx5_ifc_set_mad_demux_in_bits {
3237 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003238 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003239
Matan Barakb4ff3a32016-02-09 14:57:42 +02003240 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003241 u8 op_mod[0x10];
3242
Matan Barakb4ff3a32016-02-09 14:57:42 +02003243 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003244
Matan Barakb4ff3a32016-02-09 14:57:42 +02003245 u8 reserved_at_60[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03003246 u8 demux_mode[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003247 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003248};
3249
3250struct mlx5_ifc_set_l2_table_entry_out_bits {
3251 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003252 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003253
3254 u8 syndrome[0x20];
3255
Matan Barakb4ff3a32016-02-09 14:57:42 +02003256 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003257};
3258
3259struct mlx5_ifc_set_l2_table_entry_in_bits {
3260 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003261 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003262
Matan Barakb4ff3a32016-02-09 14:57:42 +02003263 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003264 u8 op_mod[0x10];
3265
Matan Barakb4ff3a32016-02-09 14:57:42 +02003266 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003267
Matan Barakb4ff3a32016-02-09 14:57:42 +02003268 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003269 u8 table_index[0x18];
3270
Matan Barakb4ff3a32016-02-09 14:57:42 +02003271 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003272
Matan Barakb4ff3a32016-02-09 14:57:42 +02003273 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03003274 u8 vlan_valid[0x1];
3275 u8 vlan[0xc];
3276
3277 struct mlx5_ifc_mac_address_layout_bits mac_address;
3278
Matan Barakb4ff3a32016-02-09 14:57:42 +02003279 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003280};
3281
3282struct mlx5_ifc_set_issi_out_bits {
3283 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003284 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003285
3286 u8 syndrome[0x20];
3287
Matan Barakb4ff3a32016-02-09 14:57:42 +02003288 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003289};
3290
3291struct mlx5_ifc_set_issi_in_bits {
3292 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003293 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003294
Matan Barakb4ff3a32016-02-09 14:57:42 +02003295 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003296 u8 op_mod[0x10];
3297
Matan Barakb4ff3a32016-02-09 14:57:42 +02003298 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003299 u8 current_issi[0x10];
3300
Matan Barakb4ff3a32016-02-09 14:57:42 +02003301 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003302};
3303
3304struct mlx5_ifc_set_hca_cap_out_bits {
3305 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003306 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003307
3308 u8 syndrome[0x20];
3309
Matan Barakb4ff3a32016-02-09 14:57:42 +02003310 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003311};
3312
3313struct mlx5_ifc_set_hca_cap_in_bits {
3314 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003315 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003316
Matan Barakb4ff3a32016-02-09 14:57:42 +02003317 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03003318 u8 op_mod[0x10];
3319
Matan Barakb4ff3a32016-02-09 14:57:42 +02003320 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03003321
Saeed Mahameede2816822015-05-28 22:28:40 +03003322 union mlx5_ifc_hca_cap_union_bits capability;
3323};
3324
Maor Gottlieb26a81452015-12-10 17:12:39 +02003325enum {
3326 MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION = 0x0,
3327 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_TAG = 0x1,
3328 MLX5_SET_FTE_MODIFY_ENABLE_MASK_DESTINATION_LIST = 0x2,
3329 MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS = 0x3
3330};
3331
Saeed Mahameede2816822015-05-28 22:28:40 +03003332struct mlx5_ifc_set_fte_out_bits {
3333 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003334 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003335
3336 u8 syndrome[0x20];
3337
Matan Barakb4ff3a32016-02-09 14:57:42 +02003338 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003339};
3340
3341struct mlx5_ifc_set_fte_in_bits {
3342 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003343 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003344
Matan Barakb4ff3a32016-02-09 14:57:42 +02003345 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003346 u8 op_mod[0x10];
3347
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03003348 u8 other_vport[0x1];
3349 u8 reserved_at_41[0xf];
3350 u8 vport_number[0x10];
3351
3352 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003353
3354 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003355 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003356
Matan Barakb4ff3a32016-02-09 14:57:42 +02003357 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003358 u8 table_id[0x18];
3359
Matan Barakb4ff3a32016-02-09 14:57:42 +02003360 u8 reserved_at_c0[0x18];
Maor Gottlieb26a81452015-12-10 17:12:39 +02003361 u8 modify_enable_mask[0x8];
3362
Matan Barakb4ff3a32016-02-09 14:57:42 +02003363 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003364
3365 u8 flow_index[0x20];
3366
Matan Barakb4ff3a32016-02-09 14:57:42 +02003367 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003368
3369 struct mlx5_ifc_flow_context_bits flow_context;
3370};
3371
3372struct mlx5_ifc_rts2rts_qp_out_bits {
3373 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003374 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003375
3376 u8 syndrome[0x20];
3377
Matan Barakb4ff3a32016-02-09 14:57:42 +02003378 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003379};
3380
3381struct mlx5_ifc_rts2rts_qp_in_bits {
3382 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003383 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003384
Matan Barakb4ff3a32016-02-09 14:57:42 +02003385 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003386 u8 op_mod[0x10];
3387
Matan Barakb4ff3a32016-02-09 14:57:42 +02003388 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003389 u8 qpn[0x18];
3390
Matan Barakb4ff3a32016-02-09 14:57:42 +02003391 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003392
3393 u8 opt_param_mask[0x20];
3394
Matan Barakb4ff3a32016-02-09 14:57:42 +02003395 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003396
3397 struct mlx5_ifc_qpc_bits qpc;
3398
Matan Barakb4ff3a32016-02-09 14:57:42 +02003399 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003400};
3401
3402struct mlx5_ifc_rtr2rts_qp_out_bits {
3403 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003404 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003405
3406 u8 syndrome[0x20];
3407
Matan Barakb4ff3a32016-02-09 14:57:42 +02003408 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003409};
3410
3411struct mlx5_ifc_rtr2rts_qp_in_bits {
3412 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003413 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003414
Matan Barakb4ff3a32016-02-09 14:57:42 +02003415 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003416 u8 op_mod[0x10];
3417
Matan Barakb4ff3a32016-02-09 14:57:42 +02003418 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003419 u8 qpn[0x18];
3420
Matan Barakb4ff3a32016-02-09 14:57:42 +02003421 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003422
3423 u8 opt_param_mask[0x20];
3424
Matan Barakb4ff3a32016-02-09 14:57:42 +02003425 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003426
3427 struct mlx5_ifc_qpc_bits qpc;
3428
Matan Barakb4ff3a32016-02-09 14:57:42 +02003429 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003430};
3431
3432struct mlx5_ifc_rst2init_qp_out_bits {
3433 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003434 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003435
3436 u8 syndrome[0x20];
3437
Matan Barakb4ff3a32016-02-09 14:57:42 +02003438 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003439};
3440
3441struct mlx5_ifc_rst2init_qp_in_bits {
3442 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003443 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003444
Matan Barakb4ff3a32016-02-09 14:57:42 +02003445 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003446 u8 op_mod[0x10];
3447
Matan Barakb4ff3a32016-02-09 14:57:42 +02003448 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003449 u8 qpn[0x18];
3450
Matan Barakb4ff3a32016-02-09 14:57:42 +02003451 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003452
3453 u8 opt_param_mask[0x20];
3454
Matan Barakb4ff3a32016-02-09 14:57:42 +02003455 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003456
3457 struct mlx5_ifc_qpc_bits qpc;
3458
Matan Barakb4ff3a32016-02-09 14:57:42 +02003459 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003460};
3461
Saeed Mahameed74862162016-06-09 15:11:34 +03003462struct mlx5_ifc_query_xrq_out_bits {
3463 u8 status[0x8];
3464 u8 reserved_at_8[0x18];
3465
3466 u8 syndrome[0x20];
3467
3468 u8 reserved_at_40[0x40];
3469
3470 struct mlx5_ifc_xrqc_bits xrq_context;
3471};
3472
3473struct mlx5_ifc_query_xrq_in_bits {
3474 u8 opcode[0x10];
3475 u8 reserved_at_10[0x10];
3476
3477 u8 reserved_at_20[0x10];
3478 u8 op_mod[0x10];
3479
3480 u8 reserved_at_40[0x8];
3481 u8 xrqn[0x18];
3482
3483 u8 reserved_at_60[0x20];
3484};
3485
Saeed Mahameede2816822015-05-28 22:28:40 +03003486struct mlx5_ifc_query_xrc_srq_out_bits {
3487 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003488 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003489
3490 u8 syndrome[0x20];
3491
Matan Barakb4ff3a32016-02-09 14:57:42 +02003492 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003493
3494 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
3495
Matan Barakb4ff3a32016-02-09 14:57:42 +02003496 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003497
3498 u8 pas[0][0x40];
3499};
3500
3501struct mlx5_ifc_query_xrc_srq_in_bits {
3502 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003503 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003504
Matan Barakb4ff3a32016-02-09 14:57:42 +02003505 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003506 u8 op_mod[0x10];
3507
Matan Barakb4ff3a32016-02-09 14:57:42 +02003508 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003509 u8 xrc_srqn[0x18];
3510
Matan Barakb4ff3a32016-02-09 14:57:42 +02003511 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003512};
3513
3514enum {
3515 MLX5_QUERY_VPORT_STATE_OUT_STATE_DOWN = 0x0,
3516 MLX5_QUERY_VPORT_STATE_OUT_STATE_UP = 0x1,
3517};
3518
3519struct mlx5_ifc_query_vport_state_out_bits {
3520 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003521 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003522
3523 u8 syndrome[0x20];
3524
Matan Barakb4ff3a32016-02-09 14:57:42 +02003525 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003526
Matan Barakb4ff3a32016-02-09 14:57:42 +02003527 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003528 u8 admin_state[0x4];
3529 u8 state[0x4];
3530};
3531
3532enum {
3533 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_VNIC_VPORT = 0x0,
Saeed Mahameede7546512015-12-01 18:03:13 +02003534 MLX5_QUERY_VPORT_STATE_IN_OP_MOD_ESW_VPORT = 0x1,
Saeed Mahameede2816822015-05-28 22:28:40 +03003535};
3536
3537struct mlx5_ifc_query_vport_state_in_bits {
3538 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003539 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003540
Matan Barakb4ff3a32016-02-09 14:57:42 +02003541 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003542 u8 op_mod[0x10];
3543
3544 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003545 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03003546 u8 vport_number[0x10];
3547
Matan Barakb4ff3a32016-02-09 14:57:42 +02003548 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003549};
3550
3551struct mlx5_ifc_query_vport_counter_out_bits {
3552 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003553 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003554
3555 u8 syndrome[0x20];
3556
Matan Barakb4ff3a32016-02-09 14:57:42 +02003557 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003558
3559 struct mlx5_ifc_traffic_counter_bits received_errors;
3560
3561 struct mlx5_ifc_traffic_counter_bits transmit_errors;
3562
3563 struct mlx5_ifc_traffic_counter_bits received_ib_unicast;
3564
3565 struct mlx5_ifc_traffic_counter_bits transmitted_ib_unicast;
3566
3567 struct mlx5_ifc_traffic_counter_bits received_ib_multicast;
3568
3569 struct mlx5_ifc_traffic_counter_bits transmitted_ib_multicast;
3570
3571 struct mlx5_ifc_traffic_counter_bits received_eth_broadcast;
3572
3573 struct mlx5_ifc_traffic_counter_bits transmitted_eth_broadcast;
3574
3575 struct mlx5_ifc_traffic_counter_bits received_eth_unicast;
3576
3577 struct mlx5_ifc_traffic_counter_bits transmitted_eth_unicast;
3578
3579 struct mlx5_ifc_traffic_counter_bits received_eth_multicast;
3580
3581 struct mlx5_ifc_traffic_counter_bits transmitted_eth_multicast;
3582
Matan Barakb4ff3a32016-02-09 14:57:42 +02003583 u8 reserved_at_680[0xa00];
Saeed Mahameede2816822015-05-28 22:28:40 +03003584};
3585
3586enum {
3587 MLX5_QUERY_VPORT_COUNTER_IN_OP_MOD_VPORT_COUNTERS = 0x0,
3588};
3589
3590struct mlx5_ifc_query_vport_counter_in_bits {
3591 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003592 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003593
Matan Barakb4ff3a32016-02-09 14:57:42 +02003594 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003595 u8 op_mod[0x10];
3596
3597 u8 other_vport[0x1];
Meny Yossefib54ba272016-02-18 18:14:59 +02003598 u8 reserved_at_41[0xb];
3599 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03003600 u8 vport_number[0x10];
3601
Matan Barakb4ff3a32016-02-09 14:57:42 +02003602 u8 reserved_at_60[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003603
3604 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003605 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003606
Matan Barakb4ff3a32016-02-09 14:57:42 +02003607 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003608};
3609
3610struct mlx5_ifc_query_tis_out_bits {
3611 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003612 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003613
3614 u8 syndrome[0x20];
3615
Matan Barakb4ff3a32016-02-09 14:57:42 +02003616 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003617
3618 struct mlx5_ifc_tisc_bits tis_context;
3619};
3620
3621struct mlx5_ifc_query_tis_in_bits {
3622 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003623 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003624
Matan Barakb4ff3a32016-02-09 14:57:42 +02003625 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003626 u8 op_mod[0x10];
3627
Matan Barakb4ff3a32016-02-09 14:57:42 +02003628 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003629 u8 tisn[0x18];
3630
Matan Barakb4ff3a32016-02-09 14:57:42 +02003631 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003632};
3633
3634struct mlx5_ifc_query_tir_out_bits {
3635 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003636 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003637
3638 u8 syndrome[0x20];
3639
Matan Barakb4ff3a32016-02-09 14:57:42 +02003640 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003641
3642 struct mlx5_ifc_tirc_bits tir_context;
3643};
3644
3645struct mlx5_ifc_query_tir_in_bits {
3646 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003647 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003648
Matan Barakb4ff3a32016-02-09 14:57:42 +02003649 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003650 u8 op_mod[0x10];
3651
Matan Barakb4ff3a32016-02-09 14:57:42 +02003652 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003653 u8 tirn[0x18];
3654
Matan Barakb4ff3a32016-02-09 14:57:42 +02003655 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003656};
3657
3658struct mlx5_ifc_query_srq_out_bits {
3659 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003660 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003661
3662 u8 syndrome[0x20];
3663
Matan Barakb4ff3a32016-02-09 14:57:42 +02003664 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003665
3666 struct mlx5_ifc_srqc_bits srq_context_entry;
3667
Matan Barakb4ff3a32016-02-09 14:57:42 +02003668 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03003669
3670 u8 pas[0][0x40];
3671};
3672
3673struct mlx5_ifc_query_srq_in_bits {
3674 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003675 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003676
Matan Barakb4ff3a32016-02-09 14:57:42 +02003677 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003678 u8 op_mod[0x10];
3679
Matan Barakb4ff3a32016-02-09 14:57:42 +02003680 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003681 u8 srqn[0x18];
3682
Matan Barakb4ff3a32016-02-09 14:57:42 +02003683 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003684};
3685
3686struct mlx5_ifc_query_sq_out_bits {
3687 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003688 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003689
3690 u8 syndrome[0x20];
3691
Matan Barakb4ff3a32016-02-09 14:57:42 +02003692 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003693
3694 struct mlx5_ifc_sqc_bits sq_context;
3695};
3696
3697struct mlx5_ifc_query_sq_in_bits {
3698 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003699 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003700
Matan Barakb4ff3a32016-02-09 14:57:42 +02003701 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003702 u8 op_mod[0x10];
3703
Matan Barakb4ff3a32016-02-09 14:57:42 +02003704 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003705 u8 sqn[0x18];
3706
Matan Barakb4ff3a32016-02-09 14:57:42 +02003707 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003708};
3709
3710struct mlx5_ifc_query_special_contexts_out_bits {
3711 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003712 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003713
3714 u8 syndrome[0x20];
3715
Saeed Mahameedec22eb52016-07-16 06:28:36 +03003716 u8 dump_fill_mkey[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003717
3718 u8 resd_lkey[0x20];
Artemy Kovalyovbcda1ac2017-01-02 11:37:41 +02003719
3720 u8 null_mkey[0x20];
3721
3722 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03003723};
3724
3725struct mlx5_ifc_query_special_contexts_in_bits {
3726 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003727 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003728
Matan Barakb4ff3a32016-02-09 14:57:42 +02003729 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003730 u8 op_mod[0x10];
3731
Matan Barakb4ff3a32016-02-09 14:57:42 +02003732 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003733};
3734
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03003735struct mlx5_ifc_query_scheduling_element_out_bits {
3736 u8 opcode[0x10];
3737 u8 reserved_at_10[0x10];
3738
3739 u8 reserved_at_20[0x10];
3740 u8 op_mod[0x10];
3741
3742 u8 reserved_at_40[0xc0];
3743
3744 struct mlx5_ifc_scheduling_context_bits scheduling_context;
3745
3746 u8 reserved_at_300[0x100];
3747};
3748
3749enum {
3750 SCHEDULING_HIERARCHY_E_SWITCH = 0x2,
3751};
3752
3753struct mlx5_ifc_query_scheduling_element_in_bits {
3754 u8 opcode[0x10];
3755 u8 reserved_at_10[0x10];
3756
3757 u8 reserved_at_20[0x10];
3758 u8 op_mod[0x10];
3759
3760 u8 scheduling_hierarchy[0x8];
3761 u8 reserved_at_48[0x18];
3762
3763 u8 scheduling_element_id[0x20];
3764
3765 u8 reserved_at_80[0x180];
3766};
3767
Saeed Mahameede2816822015-05-28 22:28:40 +03003768struct mlx5_ifc_query_rqt_out_bits {
3769 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003770 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003771
3772 u8 syndrome[0x20];
3773
Matan Barakb4ff3a32016-02-09 14:57:42 +02003774 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003775
3776 struct mlx5_ifc_rqtc_bits rqt_context;
3777};
3778
3779struct mlx5_ifc_query_rqt_in_bits {
3780 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003781 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003782
Matan Barakb4ff3a32016-02-09 14:57:42 +02003783 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003784 u8 op_mod[0x10];
3785
Matan Barakb4ff3a32016-02-09 14:57:42 +02003786 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003787 u8 rqtn[0x18];
3788
Matan Barakb4ff3a32016-02-09 14:57:42 +02003789 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003790};
3791
3792struct mlx5_ifc_query_rq_out_bits {
3793 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003794 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003795
3796 u8 syndrome[0x20];
3797
Matan Barakb4ff3a32016-02-09 14:57:42 +02003798 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003799
3800 struct mlx5_ifc_rqc_bits rq_context;
3801};
3802
3803struct mlx5_ifc_query_rq_in_bits {
3804 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003805 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003806
Matan Barakb4ff3a32016-02-09 14:57:42 +02003807 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003808 u8 op_mod[0x10];
3809
Matan Barakb4ff3a32016-02-09 14:57:42 +02003810 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003811 u8 rqn[0x18];
3812
Matan Barakb4ff3a32016-02-09 14:57:42 +02003813 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003814};
3815
3816struct mlx5_ifc_query_roce_address_out_bits {
3817 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003818 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003819
3820 u8 syndrome[0x20];
3821
Matan Barakb4ff3a32016-02-09 14:57:42 +02003822 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003823
3824 struct mlx5_ifc_roce_addr_layout_bits roce_address;
3825};
3826
3827struct mlx5_ifc_query_roce_address_in_bits {
3828 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003829 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003830
Matan Barakb4ff3a32016-02-09 14:57:42 +02003831 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003832 u8 op_mod[0x10];
3833
3834 u8 roce_address_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003835 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003836
Matan Barakb4ff3a32016-02-09 14:57:42 +02003837 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003838};
3839
3840struct mlx5_ifc_query_rmp_out_bits {
3841 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003842 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003843
3844 u8 syndrome[0x20];
3845
Matan Barakb4ff3a32016-02-09 14:57:42 +02003846 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003847
3848 struct mlx5_ifc_rmpc_bits rmp_context;
3849};
3850
3851struct mlx5_ifc_query_rmp_in_bits {
3852 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003853 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003854
Matan Barakb4ff3a32016-02-09 14:57:42 +02003855 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003856 u8 op_mod[0x10];
3857
Matan Barakb4ff3a32016-02-09 14:57:42 +02003858 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003859 u8 rmpn[0x18];
3860
Matan Barakb4ff3a32016-02-09 14:57:42 +02003861 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003862};
3863
3864struct mlx5_ifc_query_qp_out_bits {
3865 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003866 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003867
3868 u8 syndrome[0x20];
3869
Matan Barakb4ff3a32016-02-09 14:57:42 +02003870 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003871
3872 u8 opt_param_mask[0x20];
3873
Matan Barakb4ff3a32016-02-09 14:57:42 +02003874 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003875
3876 struct mlx5_ifc_qpc_bits qpc;
3877
Matan Barakb4ff3a32016-02-09 14:57:42 +02003878 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003879
3880 u8 pas[0][0x40];
3881};
3882
3883struct mlx5_ifc_query_qp_in_bits {
3884 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003885 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003886
Matan Barakb4ff3a32016-02-09 14:57:42 +02003887 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003888 u8 op_mod[0x10];
3889
Matan Barakb4ff3a32016-02-09 14:57:42 +02003890 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03003891 u8 qpn[0x18];
3892
Matan Barakb4ff3a32016-02-09 14:57:42 +02003893 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003894};
3895
3896struct mlx5_ifc_query_q_counter_out_bits {
3897 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003898 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003899
3900 u8 syndrome[0x20];
3901
Matan Barakb4ff3a32016-02-09 14:57:42 +02003902 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03003903
3904 u8 rx_write_requests[0x20];
3905
Matan Barakb4ff3a32016-02-09 14:57:42 +02003906 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003907
3908 u8 rx_read_requests[0x20];
3909
Matan Barakb4ff3a32016-02-09 14:57:42 +02003910 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003911
3912 u8 rx_atomic_requests[0x20];
3913
Matan Barakb4ff3a32016-02-09 14:57:42 +02003914 u8 reserved_at_120[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003915
3916 u8 rx_dct_connect[0x20];
3917
Matan Barakb4ff3a32016-02-09 14:57:42 +02003918 u8 reserved_at_160[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003919
3920 u8 out_of_buffer[0x20];
3921
Matan Barakb4ff3a32016-02-09 14:57:42 +02003922 u8 reserved_at_1a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003923
3924 u8 out_of_sequence[0x20];
3925
Saeed Mahameed74862162016-06-09 15:11:34 +03003926 u8 reserved_at_1e0[0x20];
3927
3928 u8 duplicate_request[0x20];
3929
3930 u8 reserved_at_220[0x20];
3931
3932 u8 rnr_nak_retry_err[0x20];
3933
3934 u8 reserved_at_260[0x20];
3935
3936 u8 packet_seq_err[0x20];
3937
3938 u8 reserved_at_2a0[0x20];
3939
3940 u8 implied_nak_seq_err[0x20];
3941
3942 u8 reserved_at_2e0[0x20];
3943
3944 u8 local_ack_timeout_err[0x20];
3945
3946 u8 reserved_at_320[0x4e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03003947};
3948
3949struct mlx5_ifc_query_q_counter_in_bits {
3950 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003951 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003952
Matan Barakb4ff3a32016-02-09 14:57:42 +02003953 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003954 u8 op_mod[0x10];
3955
Matan Barakb4ff3a32016-02-09 14:57:42 +02003956 u8 reserved_at_40[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03003957
3958 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003959 u8 reserved_at_c1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03003960
Matan Barakb4ff3a32016-02-09 14:57:42 +02003961 u8 reserved_at_e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003962 u8 counter_set_id[0x8];
3963};
3964
3965struct mlx5_ifc_query_pages_out_bits {
3966 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003967 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003968
3969 u8 syndrome[0x20];
3970
Matan Barakb4ff3a32016-02-09 14:57:42 +02003971 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003972 u8 function_id[0x10];
3973
3974 u8 num_pages[0x20];
3975};
3976
3977enum {
3978 MLX5_QUERY_PAGES_IN_OP_MOD_BOOT_PAGES = 0x1,
3979 MLX5_QUERY_PAGES_IN_OP_MOD_INIT_PAGES = 0x2,
3980 MLX5_QUERY_PAGES_IN_OP_MOD_REGULAR_PAGES = 0x3,
3981};
3982
3983struct mlx5_ifc_query_pages_in_bits {
3984 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003985 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003986
Matan Barakb4ff3a32016-02-09 14:57:42 +02003987 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003988 u8 op_mod[0x10];
3989
Matan Barakb4ff3a32016-02-09 14:57:42 +02003990 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03003991 u8 function_id[0x10];
3992
Matan Barakb4ff3a32016-02-09 14:57:42 +02003993 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03003994};
3995
3996struct mlx5_ifc_query_nic_vport_context_out_bits {
3997 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02003998 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03003999
4000 u8 syndrome[0x20];
4001
Matan Barakb4ff3a32016-02-09 14:57:42 +02004002 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004003
4004 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
4005};
4006
4007struct mlx5_ifc_query_nic_vport_context_in_bits {
4008 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004009 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004010
Matan Barakb4ff3a32016-02-09 14:57:42 +02004011 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004012 u8 op_mod[0x10];
4013
4014 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004015 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004016 u8 vport_number[0x10];
4017
Matan Barakb4ff3a32016-02-09 14:57:42 +02004018 u8 reserved_at_60[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03004019 u8 allowed_list_type[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004020 u8 reserved_at_68[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004021};
4022
4023struct mlx5_ifc_query_mkey_out_bits {
4024 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004025 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004026
4027 u8 syndrome[0x20];
4028
Matan Barakb4ff3a32016-02-09 14:57:42 +02004029 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004030
4031 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
4032
Matan Barakb4ff3a32016-02-09 14:57:42 +02004033 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004034
4035 u8 bsf0_klm0_pas_mtt0_1[16][0x8];
4036
4037 u8 bsf1_klm1_pas_mtt2_3[16][0x8];
4038};
4039
4040struct mlx5_ifc_query_mkey_in_bits {
4041 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004042 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004043
Matan Barakb4ff3a32016-02-09 14:57:42 +02004044 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004045 u8 op_mod[0x10];
4046
Matan Barakb4ff3a32016-02-09 14:57:42 +02004047 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004048 u8 mkey_index[0x18];
4049
4050 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004051 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004052};
4053
4054struct mlx5_ifc_query_mad_demux_out_bits {
4055 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004056 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004057
4058 u8 syndrome[0x20];
4059
Matan Barakb4ff3a32016-02-09 14:57:42 +02004060 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004061
4062 u8 mad_dumux_parameters_block[0x20];
4063};
4064
4065struct mlx5_ifc_query_mad_demux_in_bits {
4066 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004067 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004068
Matan Barakb4ff3a32016-02-09 14:57:42 +02004069 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004070 u8 op_mod[0x10];
4071
Matan Barakb4ff3a32016-02-09 14:57:42 +02004072 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004073};
4074
4075struct mlx5_ifc_query_l2_table_entry_out_bits {
4076 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004077 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004078
4079 u8 syndrome[0x20];
4080
Matan Barakb4ff3a32016-02-09 14:57:42 +02004081 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004082
Matan Barakb4ff3a32016-02-09 14:57:42 +02004083 u8 reserved_at_e0[0x13];
Saeed Mahameede2816822015-05-28 22:28:40 +03004084 u8 vlan_valid[0x1];
4085 u8 vlan[0xc];
4086
4087 struct mlx5_ifc_mac_address_layout_bits mac_address;
4088
Matan Barakb4ff3a32016-02-09 14:57:42 +02004089 u8 reserved_at_140[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004090};
4091
4092struct mlx5_ifc_query_l2_table_entry_in_bits {
4093 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004094 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004095
Matan Barakb4ff3a32016-02-09 14:57:42 +02004096 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004097 u8 op_mod[0x10];
4098
Matan Barakb4ff3a32016-02-09 14:57:42 +02004099 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03004100
Matan Barakb4ff3a32016-02-09 14:57:42 +02004101 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004102 u8 table_index[0x18];
4103
Matan Barakb4ff3a32016-02-09 14:57:42 +02004104 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004105};
4106
4107struct mlx5_ifc_query_issi_out_bits {
4108 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004109 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004110
4111 u8 syndrome[0x20];
4112
Matan Barakb4ff3a32016-02-09 14:57:42 +02004113 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004114 u8 current_issi[0x10];
4115
Matan Barakb4ff3a32016-02-09 14:57:42 +02004116 u8 reserved_at_60[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004117
Matan Barakb4ff3a32016-02-09 14:57:42 +02004118 u8 reserved_at_100[76][0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004119 u8 supported_issi_dw0[0x20];
4120};
4121
4122struct mlx5_ifc_query_issi_in_bits {
4123 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004124 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004125
Matan Barakb4ff3a32016-02-09 14:57:42 +02004126 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004127 u8 op_mod[0x10];
4128
Matan Barakb4ff3a32016-02-09 14:57:42 +02004129 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004130};
4131
Saeed Mahameed0dbc6fe2016-11-17 13:45:59 +02004132struct mlx5_ifc_set_driver_version_out_bits {
4133 u8 status[0x8];
4134 u8 reserved_0[0x18];
4135
4136 u8 syndrome[0x20];
4137 u8 reserved_1[0x40];
4138};
4139
4140struct mlx5_ifc_set_driver_version_in_bits {
4141 u8 opcode[0x10];
4142 u8 reserved_0[0x10];
4143
4144 u8 reserved_1[0x10];
4145 u8 op_mod[0x10];
4146
4147 u8 reserved_2[0x40];
4148 u8 driver_version[64][0x8];
4149};
4150
Saeed Mahameede2816822015-05-28 22:28:40 +03004151struct mlx5_ifc_query_hca_vport_pkey_out_bits {
4152 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004153 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004154
4155 u8 syndrome[0x20];
4156
Matan Barakb4ff3a32016-02-09 14:57:42 +02004157 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004158
4159 struct mlx5_ifc_pkey_bits pkey[0];
4160};
4161
4162struct mlx5_ifc_query_hca_vport_pkey_in_bits {
4163 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004164 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004165
Matan Barakb4ff3a32016-02-09 14:57:42 +02004166 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004167 u8 op_mod[0x10];
4168
4169 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004170 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004171 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004172 u8 vport_number[0x10];
4173
Matan Barakb4ff3a32016-02-09 14:57:42 +02004174 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004175 u8 pkey_index[0x10];
4176};
4177
Eli Coheneff901d2016-03-11 22:58:42 +02004178enum {
4179 MLX5_HCA_VPORT_SEL_PORT_GUID = 1 << 0,
4180 MLX5_HCA_VPORT_SEL_NODE_GUID = 1 << 1,
4181 MLX5_HCA_VPORT_SEL_STATE_POLICY = 1 << 2,
4182};
4183
Saeed Mahameede2816822015-05-28 22:28:40 +03004184struct mlx5_ifc_query_hca_vport_gid_out_bits {
4185 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004186 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004187
4188 u8 syndrome[0x20];
4189
Matan Barakb4ff3a32016-02-09 14:57:42 +02004190 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004191
4192 u8 gids_num[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004193 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004194
4195 struct mlx5_ifc_array128_auto_bits gid[0];
4196};
4197
4198struct mlx5_ifc_query_hca_vport_gid_in_bits {
4199 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004200 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004201
Matan Barakb4ff3a32016-02-09 14:57:42 +02004202 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004203 u8 op_mod[0x10];
4204
4205 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004206 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004207 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004208 u8 vport_number[0x10];
4209
Matan Barakb4ff3a32016-02-09 14:57:42 +02004210 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004211 u8 gid_index[0x10];
4212};
4213
4214struct mlx5_ifc_query_hca_vport_context_out_bits {
4215 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004216 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004217
4218 u8 syndrome[0x20];
4219
Matan Barakb4ff3a32016-02-09 14:57:42 +02004220 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004221
4222 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
4223};
4224
4225struct mlx5_ifc_query_hca_vport_context_in_bits {
4226 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004227 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004228
Matan Barakb4ff3a32016-02-09 14:57:42 +02004229 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004230 u8 op_mod[0x10];
4231
4232 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004233 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03004234 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004235 u8 vport_number[0x10];
4236
Matan Barakb4ff3a32016-02-09 14:57:42 +02004237 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004238};
4239
4240struct mlx5_ifc_query_hca_cap_out_bits {
4241 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004242 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004243
4244 u8 syndrome[0x20];
4245
Matan Barakb4ff3a32016-02-09 14:57:42 +02004246 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004247
4248 union mlx5_ifc_hca_cap_union_bits capability;
Eli Cohenb7755162014-10-02 12:19:44 +03004249};
4250
4251struct mlx5_ifc_query_hca_cap_in_bits {
4252 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004253 u8 reserved_at_10[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004254
Matan Barakb4ff3a32016-02-09 14:57:42 +02004255 u8 reserved_at_20[0x10];
Eli Cohenb7755162014-10-02 12:19:44 +03004256 u8 op_mod[0x10];
4257
Matan Barakb4ff3a32016-02-09 14:57:42 +02004258 u8 reserved_at_40[0x40];
Eli Cohenb7755162014-10-02 12:19:44 +03004259};
4260
Saeed Mahameede2816822015-05-28 22:28:40 +03004261struct mlx5_ifc_query_flow_table_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004262 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004263 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004264
4265 u8 syndrome[0x20];
4266
Matan Barakb4ff3a32016-02-09 14:57:42 +02004267 u8 reserved_at_40[0x80];
Eli Cohenb7755162014-10-02 12:19:44 +03004268
Matan Barakb4ff3a32016-02-09 14:57:42 +02004269 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004270 u8 level[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004271 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004272 u8 log_size[0x8];
4273
Matan Barakb4ff3a32016-02-09 14:57:42 +02004274 u8 reserved_at_e0[0x120];
Eli Cohenb7755162014-10-02 12:19:44 +03004275};
4276
Saeed Mahameede2816822015-05-28 22:28:40 +03004277struct mlx5_ifc_query_flow_table_in_bits {
4278 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004279 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004280
Matan Barakb4ff3a32016-02-09 14:57:42 +02004281 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004282 u8 op_mod[0x10];
4283
Matan Barakb4ff3a32016-02-09 14:57:42 +02004284 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004285
4286 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004287 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004288
Matan Barakb4ff3a32016-02-09 14:57:42 +02004289 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004290 u8 table_id[0x18];
4291
Matan Barakb4ff3a32016-02-09 14:57:42 +02004292 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03004293};
4294
4295struct mlx5_ifc_query_fte_out_bits {
4296 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004297 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004298
4299 u8 syndrome[0x20];
4300
Matan Barakb4ff3a32016-02-09 14:57:42 +02004301 u8 reserved_at_40[0x1c0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004302
4303 struct mlx5_ifc_flow_context_bits flow_context;
4304};
4305
4306struct mlx5_ifc_query_fte_in_bits {
4307 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004308 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004309
Matan Barakb4ff3a32016-02-09 14:57:42 +02004310 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004311 u8 op_mod[0x10];
4312
Matan Barakb4ff3a32016-02-09 14:57:42 +02004313 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004314
4315 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004316 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004317
Matan Barakb4ff3a32016-02-09 14:57:42 +02004318 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004319 u8 table_id[0x18];
4320
Matan Barakb4ff3a32016-02-09 14:57:42 +02004321 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004322
4323 u8 flow_index[0x20];
4324
Matan Barakb4ff3a32016-02-09 14:57:42 +02004325 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004326};
4327
4328enum {
4329 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
4330 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
4331 MLX5_QUERY_FLOW_GROUP_OUT_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
4332};
4333
4334struct mlx5_ifc_query_flow_group_out_bits {
4335 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004336 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004337
4338 u8 syndrome[0x20];
4339
Matan Barakb4ff3a32016-02-09 14:57:42 +02004340 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004341
4342 u8 start_flow_index[0x20];
4343
Matan Barakb4ff3a32016-02-09 14:57:42 +02004344 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004345
4346 u8 end_flow_index[0x20];
4347
Matan Barakb4ff3a32016-02-09 14:57:42 +02004348 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03004349
Matan Barakb4ff3a32016-02-09 14:57:42 +02004350 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004351 u8 match_criteria_enable[0x8];
4352
4353 struct mlx5_ifc_fte_match_param_bits match_criteria;
4354
Matan Barakb4ff3a32016-02-09 14:57:42 +02004355 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03004356};
4357
4358struct mlx5_ifc_query_flow_group_in_bits {
4359 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004360 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004361
Matan Barakb4ff3a32016-02-09 14:57:42 +02004362 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004363 u8 op_mod[0x10];
4364
Matan Barakb4ff3a32016-02-09 14:57:42 +02004365 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004366
4367 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004368 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004369
Matan Barakb4ff3a32016-02-09 14:57:42 +02004370 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004371 u8 table_id[0x18];
4372
4373 u8 group_id[0x20];
4374
Matan Barakb4ff3a32016-02-09 14:57:42 +02004375 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03004376};
4377
Amir Vadai9dc0b282016-05-13 12:55:39 +00004378struct mlx5_ifc_query_flow_counter_out_bits {
4379 u8 status[0x8];
4380 u8 reserved_at_8[0x18];
4381
4382 u8 syndrome[0x20];
4383
4384 u8 reserved_at_40[0x40];
4385
4386 struct mlx5_ifc_traffic_counter_bits flow_statistics[0];
4387};
4388
4389struct mlx5_ifc_query_flow_counter_in_bits {
4390 u8 opcode[0x10];
4391 u8 reserved_at_10[0x10];
4392
4393 u8 reserved_at_20[0x10];
4394 u8 op_mod[0x10];
4395
4396 u8 reserved_at_40[0x80];
4397
4398 u8 clear[0x1];
4399 u8 reserved_at_c1[0xf];
4400 u8 num_of_counters[0x10];
4401
4402 u8 reserved_at_e0[0x10];
4403 u8 flow_counter_id[0x10];
4404};
4405
Saeed Mahameedd6666752015-12-01 18:03:22 +02004406struct mlx5_ifc_query_esw_vport_context_out_bits {
4407 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004408 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004409
4410 u8 syndrome[0x20];
4411
Matan Barakb4ff3a32016-02-09 14:57:42 +02004412 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004413
4414 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4415};
4416
4417struct mlx5_ifc_query_esw_vport_context_in_bits {
4418 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004419 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004420
Matan Barakb4ff3a32016-02-09 14:57:42 +02004421 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004422 u8 op_mod[0x10];
4423
4424 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004425 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004426 u8 vport_number[0x10];
4427
Matan Barakb4ff3a32016-02-09 14:57:42 +02004428 u8 reserved_at_60[0x20];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004429};
4430
4431struct mlx5_ifc_modify_esw_vport_context_out_bits {
4432 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004433 u8 reserved_at_8[0x18];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004434
4435 u8 syndrome[0x20];
4436
Matan Barakb4ff3a32016-02-09 14:57:42 +02004437 u8 reserved_at_40[0x40];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004438};
4439
4440struct mlx5_ifc_esw_vport_context_fields_select_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004441 u8 reserved_at_0[0x1c];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004442 u8 vport_cvlan_insert[0x1];
4443 u8 vport_svlan_insert[0x1];
4444 u8 vport_cvlan_strip[0x1];
4445 u8 vport_svlan_strip[0x1];
4446};
4447
4448struct mlx5_ifc_modify_esw_vport_context_in_bits {
4449 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004450 u8 reserved_at_10[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004451
Matan Barakb4ff3a32016-02-09 14:57:42 +02004452 u8 reserved_at_20[0x10];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004453 u8 op_mod[0x10];
4454
4455 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004456 u8 reserved_at_41[0xf];
Saeed Mahameedd6666752015-12-01 18:03:22 +02004457 u8 vport_number[0x10];
4458
4459 struct mlx5_ifc_esw_vport_context_fields_select_bits field_select;
4460
4461 struct mlx5_ifc_esw_vport_context_bits esw_vport_context;
4462};
4463
Saeed Mahameede2816822015-05-28 22:28:40 +03004464struct mlx5_ifc_query_eq_out_bits {
Eli Cohenb7755162014-10-02 12:19:44 +03004465 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004466 u8 reserved_at_8[0x18];
Eli Cohenb7755162014-10-02 12:19:44 +03004467
4468 u8 syndrome[0x20];
4469
Matan Barakb4ff3a32016-02-09 14:57:42 +02004470 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004471
4472 struct mlx5_ifc_eqc_bits eq_context_entry;
4473
Matan Barakb4ff3a32016-02-09 14:57:42 +02004474 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004475
4476 u8 event_bitmask[0x40];
4477
Matan Barakb4ff3a32016-02-09 14:57:42 +02004478 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03004479
4480 u8 pas[0][0x40];
4481};
4482
4483struct mlx5_ifc_query_eq_in_bits {
4484 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004485 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004486
Matan Barakb4ff3a32016-02-09 14:57:42 +02004487 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004488 u8 op_mod[0x10];
4489
Matan Barakb4ff3a32016-02-09 14:57:42 +02004490 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004491 u8 eq_number[0x8];
4492
Matan Barakb4ff3a32016-02-09 14:57:42 +02004493 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004494};
4495
Hadar Hen Zion7adbde22016-08-03 15:08:33 +03004496struct mlx5_ifc_encap_header_in_bits {
4497 u8 reserved_at_0[0x5];
4498 u8 header_type[0x3];
4499 u8 reserved_at_8[0xe];
4500 u8 encap_header_size[0xa];
4501
4502 u8 reserved_at_20[0x10];
4503 u8 encap_header[2][0x8];
4504
4505 u8 more_encap_header[0][0x8];
4506};
4507
4508struct mlx5_ifc_query_encap_header_out_bits {
4509 u8 status[0x8];
4510 u8 reserved_at_8[0x18];
4511
4512 u8 syndrome[0x20];
4513
4514 u8 reserved_at_40[0xa0];
4515
4516 struct mlx5_ifc_encap_header_in_bits encap_header[0];
4517};
4518
4519struct mlx5_ifc_query_encap_header_in_bits {
4520 u8 opcode[0x10];
4521 u8 reserved_at_10[0x10];
4522
4523 u8 reserved_at_20[0x10];
4524 u8 op_mod[0x10];
4525
4526 u8 encap_id[0x20];
4527
4528 u8 reserved_at_60[0xa0];
4529};
4530
4531struct mlx5_ifc_alloc_encap_header_out_bits {
4532 u8 status[0x8];
4533 u8 reserved_at_8[0x18];
4534
4535 u8 syndrome[0x20];
4536
4537 u8 encap_id[0x20];
4538
4539 u8 reserved_at_60[0x20];
4540};
4541
4542struct mlx5_ifc_alloc_encap_header_in_bits {
4543 u8 opcode[0x10];
4544 u8 reserved_at_10[0x10];
4545
4546 u8 reserved_at_20[0x10];
4547 u8 op_mod[0x10];
4548
4549 u8 reserved_at_40[0xa0];
4550
4551 struct mlx5_ifc_encap_header_in_bits encap_header;
4552};
4553
4554struct mlx5_ifc_dealloc_encap_header_out_bits {
4555 u8 status[0x8];
4556 u8 reserved_at_8[0x18];
4557
4558 u8 syndrome[0x20];
4559
4560 u8 reserved_at_40[0x40];
4561};
4562
4563struct mlx5_ifc_dealloc_encap_header_in_bits {
4564 u8 opcode[0x10];
4565 u8 reserved_at_10[0x10];
4566
4567 u8 reserved_20[0x10];
4568 u8 op_mod[0x10];
4569
4570 u8 encap_id[0x20];
4571
4572 u8 reserved_60[0x20];
4573};
4574
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004575struct mlx5_ifc_set_action_in_bits {
4576 u8 action_type[0x4];
4577 u8 field[0xc];
4578 u8 reserved_at_10[0x3];
4579 u8 offset[0x5];
4580 u8 reserved_at_18[0x3];
4581 u8 length[0x5];
4582
4583 u8 data[0x20];
4584};
4585
4586struct mlx5_ifc_add_action_in_bits {
4587 u8 action_type[0x4];
4588 u8 field[0xc];
4589 u8 reserved_at_10[0x10];
4590
4591 u8 data[0x20];
4592};
4593
4594union mlx5_ifc_set_action_in_add_action_in_auto_bits {
4595 struct mlx5_ifc_set_action_in_bits set_action_in;
4596 struct mlx5_ifc_add_action_in_bits add_action_in;
4597 u8 reserved_at_0[0x40];
4598};
4599
4600enum {
4601 MLX5_ACTION_TYPE_SET = 0x1,
4602 MLX5_ACTION_TYPE_ADD = 0x2,
4603};
4604
4605enum {
4606 MLX5_ACTION_IN_FIELD_OUT_SMAC_47_16 = 0x1,
4607 MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0 = 0x2,
4608 MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE = 0x3,
4609 MLX5_ACTION_IN_FIELD_OUT_DMAC_47_16 = 0x4,
4610 MLX5_ACTION_IN_FIELD_OUT_DMAC_15_0 = 0x5,
4611 MLX5_ACTION_IN_FIELD_OUT_IP_DSCP = 0x6,
4612 MLX5_ACTION_IN_FIELD_OUT_TCP_FLAGS = 0x7,
4613 MLX5_ACTION_IN_FIELD_OUT_TCP_SPORT = 0x8,
4614 MLX5_ACTION_IN_FIELD_OUT_TCP_DPORT = 0x9,
4615 MLX5_ACTION_IN_FIELD_OUT_IP_TTL = 0xa,
4616 MLX5_ACTION_IN_FIELD_OUT_UDP_SPORT = 0xb,
4617 MLX5_ACTION_IN_FIELD_OUT_UDP_DPORT = 0xc,
4618 MLX5_ACTION_IN_FIELD_OUT_SIPV6_127_96 = 0xd,
4619 MLX5_ACTION_IN_FIELD_OUT_SIPV6_95_64 = 0xe,
4620 MLX5_ACTION_IN_FIELD_OUT_SIPV6_63_32 = 0xf,
4621 MLX5_ACTION_IN_FIELD_OUT_SIPV6_31_0 = 0x10,
4622 MLX5_ACTION_IN_FIELD_OUT_DIPV6_127_96 = 0x11,
4623 MLX5_ACTION_IN_FIELD_OUT_DIPV6_95_64 = 0x12,
4624 MLX5_ACTION_IN_FIELD_OUT_DIPV6_63_32 = 0x13,
4625 MLX5_ACTION_IN_FIELD_OUT_DIPV6_31_0 = 0x14,
4626 MLX5_ACTION_IN_FIELD_OUT_SIPV4 = 0x15,
4627 MLX5_ACTION_IN_FIELD_OUT_DIPV4 = 0x16,
Or Gerlitz0c0316f2017-06-13 11:09:57 +03004628 MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT = 0x47,
Or Gerlitz2a69cb92017-01-19 19:31:25 +02004629};
4630
4631struct mlx5_ifc_alloc_modify_header_context_out_bits {
4632 u8 status[0x8];
4633 u8 reserved_at_8[0x18];
4634
4635 u8 syndrome[0x20];
4636
4637 u8 modify_header_id[0x20];
4638
4639 u8 reserved_at_60[0x20];
4640};
4641
4642struct mlx5_ifc_alloc_modify_header_context_in_bits {
4643 u8 opcode[0x10];
4644 u8 reserved_at_10[0x10];
4645
4646 u8 reserved_at_20[0x10];
4647 u8 op_mod[0x10];
4648
4649 u8 reserved_at_40[0x20];
4650
4651 u8 table_type[0x8];
4652 u8 reserved_at_68[0x10];
4653 u8 num_of_actions[0x8];
4654
4655 union mlx5_ifc_set_action_in_add_action_in_auto_bits actions[0];
4656};
4657
4658struct mlx5_ifc_dealloc_modify_header_context_out_bits {
4659 u8 status[0x8];
4660 u8 reserved_at_8[0x18];
4661
4662 u8 syndrome[0x20];
4663
4664 u8 reserved_at_40[0x40];
4665};
4666
4667struct mlx5_ifc_dealloc_modify_header_context_in_bits {
4668 u8 opcode[0x10];
4669 u8 reserved_at_10[0x10];
4670
4671 u8 reserved_at_20[0x10];
4672 u8 op_mod[0x10];
4673
4674 u8 modify_header_id[0x20];
4675
4676 u8 reserved_at_60[0x20];
4677};
4678
Saeed Mahameede2816822015-05-28 22:28:40 +03004679struct mlx5_ifc_query_dct_out_bits {
4680 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004681 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004682
4683 u8 syndrome[0x20];
4684
Matan Barakb4ff3a32016-02-09 14:57:42 +02004685 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004686
4687 struct mlx5_ifc_dctc_bits dct_context_entry;
4688
Matan Barakb4ff3a32016-02-09 14:57:42 +02004689 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03004690};
4691
4692struct mlx5_ifc_query_dct_in_bits {
4693 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004694 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004695
Matan Barakb4ff3a32016-02-09 14:57:42 +02004696 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004697 u8 op_mod[0x10];
4698
Matan Barakb4ff3a32016-02-09 14:57:42 +02004699 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004700 u8 dctn[0x18];
4701
Matan Barakb4ff3a32016-02-09 14:57:42 +02004702 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004703};
4704
4705struct mlx5_ifc_query_cq_out_bits {
4706 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004707 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004708
4709 u8 syndrome[0x20];
4710
Matan Barakb4ff3a32016-02-09 14:57:42 +02004711 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004712
4713 struct mlx5_ifc_cqc_bits cq_context;
4714
Matan Barakb4ff3a32016-02-09 14:57:42 +02004715 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03004716
4717 u8 pas[0][0x40];
4718};
4719
4720struct mlx5_ifc_query_cq_in_bits {
4721 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004722 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004723
Matan Barakb4ff3a32016-02-09 14:57:42 +02004724 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004725 u8 op_mod[0x10];
4726
Matan Barakb4ff3a32016-02-09 14:57:42 +02004727 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004728 u8 cqn[0x18];
4729
Matan Barakb4ff3a32016-02-09 14:57:42 +02004730 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004731};
4732
4733struct mlx5_ifc_query_cong_status_out_bits {
4734 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004735 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004736
4737 u8 syndrome[0x20];
4738
Matan Barakb4ff3a32016-02-09 14:57:42 +02004739 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004740
4741 u8 enable[0x1];
4742 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004743 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03004744};
4745
4746struct mlx5_ifc_query_cong_status_in_bits {
4747 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004748 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004749
Matan Barakb4ff3a32016-02-09 14:57:42 +02004750 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004751 u8 op_mod[0x10];
4752
Matan Barakb4ff3a32016-02-09 14:57:42 +02004753 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004754 u8 priority[0x4];
4755 u8 cong_protocol[0x4];
4756
Matan Barakb4ff3a32016-02-09 14:57:42 +02004757 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004758};
4759
4760struct mlx5_ifc_query_cong_statistics_out_bits {
4761 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004762 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004763
4764 u8 syndrome[0x20];
4765
Matan Barakb4ff3a32016-02-09 14:57:42 +02004766 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004767
Parav Pandite1f24a72017-04-16 07:29:29 +03004768 u8 rp_cur_flows[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004769
4770 u8 sum_flows[0x20];
4771
Parav Pandite1f24a72017-04-16 07:29:29 +03004772 u8 rp_cnp_ignored_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004773
Parav Pandite1f24a72017-04-16 07:29:29 +03004774 u8 rp_cnp_ignored_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004775
Parav Pandite1f24a72017-04-16 07:29:29 +03004776 u8 rp_cnp_handled_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004777
Parav Pandite1f24a72017-04-16 07:29:29 +03004778 u8 rp_cnp_handled_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004779
Matan Barakb4ff3a32016-02-09 14:57:42 +02004780 u8 reserved_at_140[0x100];
Saeed Mahameede2816822015-05-28 22:28:40 +03004781
4782 u8 time_stamp_high[0x20];
4783
4784 u8 time_stamp_low[0x20];
4785
4786 u8 accumulators_period[0x20];
4787
Parav Pandite1f24a72017-04-16 07:29:29 +03004788 u8 np_ecn_marked_roce_packets_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004789
Parav Pandite1f24a72017-04-16 07:29:29 +03004790 u8 np_ecn_marked_roce_packets_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004791
Parav Pandite1f24a72017-04-16 07:29:29 +03004792 u8 np_cnp_sent_high[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004793
Parav Pandite1f24a72017-04-16 07:29:29 +03004794 u8 np_cnp_sent_low[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004795
Matan Barakb4ff3a32016-02-09 14:57:42 +02004796 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03004797};
4798
4799struct mlx5_ifc_query_cong_statistics_in_bits {
4800 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004801 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004802
Matan Barakb4ff3a32016-02-09 14:57:42 +02004803 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004804 u8 op_mod[0x10];
4805
4806 u8 clear[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004807 u8 reserved_at_41[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03004808
Matan Barakb4ff3a32016-02-09 14:57:42 +02004809 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004810};
4811
4812struct mlx5_ifc_query_cong_params_out_bits {
4813 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004814 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004815
4816 u8 syndrome[0x20];
4817
Matan Barakb4ff3a32016-02-09 14:57:42 +02004818 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004819
4820 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
4821};
4822
4823struct mlx5_ifc_query_cong_params_in_bits {
4824 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004825 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004826
Matan Barakb4ff3a32016-02-09 14:57:42 +02004827 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004828 u8 op_mod[0x10];
4829
Matan Barakb4ff3a32016-02-09 14:57:42 +02004830 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03004831 u8 cong_protocol[0x4];
4832
Matan Barakb4ff3a32016-02-09 14:57:42 +02004833 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004834};
4835
4836struct mlx5_ifc_query_adapter_out_bits {
4837 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004838 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004839
4840 u8 syndrome[0x20];
4841
Matan Barakb4ff3a32016-02-09 14:57:42 +02004842 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004843
4844 struct mlx5_ifc_query_adapter_param_block_bits query_adapter_struct;
4845};
4846
4847struct mlx5_ifc_query_adapter_in_bits {
4848 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004849 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004850
Matan Barakb4ff3a32016-02-09 14:57:42 +02004851 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004852 u8 op_mod[0x10];
4853
Matan Barakb4ff3a32016-02-09 14:57:42 +02004854 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004855};
4856
4857struct mlx5_ifc_qp_2rst_out_bits {
4858 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004859 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004860
4861 u8 syndrome[0x20];
4862
Matan Barakb4ff3a32016-02-09 14:57:42 +02004863 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004864};
4865
4866struct mlx5_ifc_qp_2rst_in_bits {
4867 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004868 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004869
Matan Barakb4ff3a32016-02-09 14:57:42 +02004870 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004871 u8 op_mod[0x10];
4872
Matan Barakb4ff3a32016-02-09 14:57:42 +02004873 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004874 u8 qpn[0x18];
4875
Matan Barakb4ff3a32016-02-09 14:57:42 +02004876 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004877};
4878
4879struct mlx5_ifc_qp_2err_out_bits {
4880 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004881 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004882
4883 u8 syndrome[0x20];
4884
Matan Barakb4ff3a32016-02-09 14:57:42 +02004885 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004886};
4887
4888struct mlx5_ifc_qp_2err_in_bits {
4889 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004890 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004891
Matan Barakb4ff3a32016-02-09 14:57:42 +02004892 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004893 u8 op_mod[0x10];
4894
Matan Barakb4ff3a32016-02-09 14:57:42 +02004895 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004896 u8 qpn[0x18];
4897
Matan Barakb4ff3a32016-02-09 14:57:42 +02004898 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004899};
4900
4901struct mlx5_ifc_page_fault_resume_out_bits {
4902 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004903 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004904
4905 u8 syndrome[0x20];
4906
Matan Barakb4ff3a32016-02-09 14:57:42 +02004907 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004908};
4909
4910struct mlx5_ifc_page_fault_resume_in_bits {
4911 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004912 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004913
Matan Barakb4ff3a32016-02-09 14:57:42 +02004914 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004915 u8 op_mod[0x10];
4916
4917 u8 error[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004918 u8 reserved_at_41[0x4];
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004919 u8 page_fault_type[0x3];
4920 u8 wq_number[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004921
Artemy Kovalyov223cdc72017-01-02 11:37:45 +02004922 u8 reserved_at_60[0x8];
4923 u8 token[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004924};
4925
4926struct mlx5_ifc_nop_out_bits {
4927 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004928 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004929
4930 u8 syndrome[0x20];
4931
Matan Barakb4ff3a32016-02-09 14:57:42 +02004932 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004933};
4934
4935struct mlx5_ifc_nop_in_bits {
4936 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004937 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004938
Matan Barakb4ff3a32016-02-09 14:57:42 +02004939 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004940 u8 op_mod[0x10];
4941
Matan Barakb4ff3a32016-02-09 14:57:42 +02004942 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004943};
4944
4945struct mlx5_ifc_modify_vport_state_out_bits {
4946 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004947 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004948
4949 u8 syndrome[0x20];
4950
Matan Barakb4ff3a32016-02-09 14:57:42 +02004951 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004952};
4953
4954struct mlx5_ifc_modify_vport_state_in_bits {
4955 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004956 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004957
Matan Barakb4ff3a32016-02-09 14:57:42 +02004958 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004959 u8 op_mod[0x10];
4960
4961 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004962 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03004963 u8 vport_number[0x10];
4964
Matan Barakb4ff3a32016-02-09 14:57:42 +02004965 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004966 u8 admin_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004967 u8 reserved_at_7c[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03004968};
4969
4970struct mlx5_ifc_modify_tis_out_bits {
4971 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004972 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03004973
4974 u8 syndrome[0x20];
4975
Matan Barakb4ff3a32016-02-09 14:57:42 +02004976 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03004977};
4978
majd@mellanox.com75850d02016-01-14 19:13:06 +02004979struct mlx5_ifc_modify_tis_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02004980 u8 reserved_at_0[0x20];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004981
Aviv Heller84df61e2016-05-10 13:47:50 +03004982 u8 reserved_at_20[0x1d];
4983 u8 lag_tx_port_affinity[0x1];
4984 u8 strict_lag_tx_port_affinity[0x1];
majd@mellanox.com75850d02016-01-14 19:13:06 +02004985 u8 prio[0x1];
4986};
4987
Saeed Mahameede2816822015-05-28 22:28:40 +03004988struct mlx5_ifc_modify_tis_in_bits {
4989 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02004990 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004991
Matan Barakb4ff3a32016-02-09 14:57:42 +02004992 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03004993 u8 op_mod[0x10];
4994
Matan Barakb4ff3a32016-02-09 14:57:42 +02004995 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03004996 u8 tisn[0x18];
4997
Matan Barakb4ff3a32016-02-09 14:57:42 +02004998 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03004999
majd@mellanox.com75850d02016-01-14 19:13:06 +02005000 struct mlx5_ifc_modify_tis_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005001
Matan Barakb4ff3a32016-02-09 14:57:42 +02005002 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005003
5004 struct mlx5_ifc_tisc_bits ctx;
5005};
5006
Achiad Shochatd9eea402015-08-04 14:05:42 +03005007struct mlx5_ifc_modify_tir_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005008 u8 reserved_at_0[0x20];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005009
Matan Barakb4ff3a32016-02-09 14:57:42 +02005010 u8 reserved_at_20[0x1b];
Tariq Toukan66189962015-11-12 19:35:26 +02005011 u8 self_lb_en[0x1];
Tariq Toukanbdfc0282016-02-29 21:17:12 +02005012 u8 reserved_at_3c[0x1];
5013 u8 hash[0x1];
5014 u8 reserved_at_3e[0x1];
Achiad Shochatd9eea402015-08-04 14:05:42 +03005015 u8 lro[0x1];
5016};
5017
Saeed Mahameede2816822015-05-28 22:28:40 +03005018struct mlx5_ifc_modify_tir_out_bits {
5019 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005020 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005021
5022 u8 syndrome[0x20];
5023
Matan Barakb4ff3a32016-02-09 14:57:42 +02005024 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005025};
5026
5027struct mlx5_ifc_modify_tir_in_bits {
5028 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005029 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005030
Matan Barakb4ff3a32016-02-09 14:57:42 +02005031 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005032 u8 op_mod[0x10];
5033
Matan Barakb4ff3a32016-02-09 14:57:42 +02005034 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005035 u8 tirn[0x18];
5036
Matan Barakb4ff3a32016-02-09 14:57:42 +02005037 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005038
Achiad Shochatd9eea402015-08-04 14:05:42 +03005039 struct mlx5_ifc_modify_tir_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005040
Matan Barakb4ff3a32016-02-09 14:57:42 +02005041 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005042
5043 struct mlx5_ifc_tirc_bits ctx;
5044};
5045
5046struct mlx5_ifc_modify_sq_out_bits {
5047 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005048 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005049
5050 u8 syndrome[0x20];
5051
Matan Barakb4ff3a32016-02-09 14:57:42 +02005052 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005053};
5054
5055struct mlx5_ifc_modify_sq_in_bits {
5056 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005057 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005058
Matan Barakb4ff3a32016-02-09 14:57:42 +02005059 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005060 u8 op_mod[0x10];
5061
5062 u8 sq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005063 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005064 u8 sqn[0x18];
5065
Matan Barakb4ff3a32016-02-09 14:57:42 +02005066 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005067
5068 u8 modify_bitmask[0x40];
5069
Matan Barakb4ff3a32016-02-09 14:57:42 +02005070 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005071
5072 struct mlx5_ifc_sqc_bits ctx;
5073};
5074
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005075struct mlx5_ifc_modify_scheduling_element_out_bits {
5076 u8 status[0x8];
5077 u8 reserved_at_8[0x18];
5078
5079 u8 syndrome[0x20];
5080
5081 u8 reserved_at_40[0x1c0];
5082};
5083
5084enum {
5085 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_BW_SHARE = 0x1,
5086 MODIFY_SCHEDULING_ELEMENT_IN_MODIFY_BITMASK_MAX_AVERAGE_BW = 0x2,
5087};
5088
5089struct mlx5_ifc_modify_scheduling_element_in_bits {
5090 u8 opcode[0x10];
5091 u8 reserved_at_10[0x10];
5092
5093 u8 reserved_at_20[0x10];
5094 u8 op_mod[0x10];
5095
5096 u8 scheduling_hierarchy[0x8];
5097 u8 reserved_at_48[0x18];
5098
5099 u8 scheduling_element_id[0x20];
5100
5101 u8 reserved_at_80[0x20];
5102
5103 u8 modify_bitmask[0x20];
5104
5105 u8 reserved_at_c0[0x40];
5106
5107 struct mlx5_ifc_scheduling_context_bits scheduling_context;
5108
5109 u8 reserved_at_300[0x100];
5110};
5111
Saeed Mahameede2816822015-05-28 22:28:40 +03005112struct mlx5_ifc_modify_rqt_out_bits {
5113 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005114 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005115
5116 u8 syndrome[0x20];
5117
Matan Barakb4ff3a32016-02-09 14:57:42 +02005118 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005119};
5120
Achiad Shochat5c503682015-08-04 14:05:43 +03005121struct mlx5_ifc_rqt_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005122 u8 reserved_at_0[0x20];
Achiad Shochat5c503682015-08-04 14:05:43 +03005123
Matan Barakb4ff3a32016-02-09 14:57:42 +02005124 u8 reserved_at_20[0x1f];
Achiad Shochat5c503682015-08-04 14:05:43 +03005125 u8 rqn_list[0x1];
5126};
5127
Saeed Mahameede2816822015-05-28 22:28:40 +03005128struct mlx5_ifc_modify_rqt_in_bits {
5129 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005130 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005131
Matan Barakb4ff3a32016-02-09 14:57:42 +02005132 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005133 u8 op_mod[0x10];
5134
Matan Barakb4ff3a32016-02-09 14:57:42 +02005135 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005136 u8 rqtn[0x18];
5137
Matan Barakb4ff3a32016-02-09 14:57:42 +02005138 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005139
Achiad Shochat5c503682015-08-04 14:05:43 +03005140 struct mlx5_ifc_rqt_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005141
Matan Barakb4ff3a32016-02-09 14:57:42 +02005142 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005143
5144 struct mlx5_ifc_rqtc_bits ctx;
5145};
5146
5147struct mlx5_ifc_modify_rq_out_bits {
5148 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005149 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005150
5151 u8 syndrome[0x20];
5152
Matan Barakb4ff3a32016-02-09 14:57:42 +02005153 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005154};
5155
Alex Vesker83b502a2016-08-04 17:32:02 +03005156enum {
5157 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_VSD = 1ULL << 1,
Guy Ergas102722f2017-02-20 16:18:17 +02005158 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_SCATTER_FCS = 1ULL << 2,
Majd Dibbiny23a69642017-01-18 15:25:10 +02005159 MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_RQ_COUNTER_SET_ID = 1ULL << 3,
Alex Vesker83b502a2016-08-04 17:32:02 +03005160};
5161
Saeed Mahameede2816822015-05-28 22:28:40 +03005162struct mlx5_ifc_modify_rq_in_bits {
5163 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005164 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005165
Matan Barakb4ff3a32016-02-09 14:57:42 +02005166 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005167 u8 op_mod[0x10];
5168
5169 u8 rq_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005170 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005171 u8 rqn[0x18];
5172
Matan Barakb4ff3a32016-02-09 14:57:42 +02005173 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005174
5175 u8 modify_bitmask[0x40];
5176
Matan Barakb4ff3a32016-02-09 14:57:42 +02005177 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005178
5179 struct mlx5_ifc_rqc_bits ctx;
5180};
5181
5182struct mlx5_ifc_modify_rmp_out_bits {
5183 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005184 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005185
5186 u8 syndrome[0x20];
5187
Matan Barakb4ff3a32016-02-09 14:57:42 +02005188 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005189};
5190
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005191struct mlx5_ifc_rmp_bitmask_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02005192 u8 reserved_at_0[0x20];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005193
Matan Barakb4ff3a32016-02-09 14:57:42 +02005194 u8 reserved_at_20[0x1f];
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005195 u8 lwm[0x1];
5196};
5197
Saeed Mahameede2816822015-05-28 22:28:40 +03005198struct mlx5_ifc_modify_rmp_in_bits {
5199 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005200 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005201
Matan Barakb4ff3a32016-02-09 14:57:42 +02005202 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005203 u8 op_mod[0x10];
5204
5205 u8 rmp_state[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005206 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005207 u8 rmpn[0x18];
5208
Matan Barakb4ff3a32016-02-09 14:57:42 +02005209 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005210
Haggai Abramonvsky01949d02015-06-04 19:30:38 +03005211 struct mlx5_ifc_rmp_bitmask_bits bitmask;
Saeed Mahameede2816822015-05-28 22:28:40 +03005212
Matan Barakb4ff3a32016-02-09 14:57:42 +02005213 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005214
5215 struct mlx5_ifc_rmpc_bits ctx;
5216};
5217
5218struct mlx5_ifc_modify_nic_vport_context_out_bits {
5219 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005220 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005221
5222 u8 syndrome[0x20];
5223
Matan Barakb4ff3a32016-02-09 14:57:42 +02005224 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005225};
5226
5227struct mlx5_ifc_modify_nic_vport_field_select_bits {
Noa Osherovich23898c72016-06-10 00:07:37 +03005228 u8 reserved_at_0[0x16];
5229 u8 node_guid[0x1];
5230 u8 port_guid[0x1];
Hadar Hen Zion9def7122016-08-03 17:27:30 +03005231 u8 min_inline[0x1];
Saeed Mahameedd82b7312015-12-01 18:03:14 +02005232 u8 mtu[0x1];
5233 u8 change_event[0x1];
5234 u8 promisc[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005235 u8 permanent_address[0x1];
5236 u8 addresses_list[0x1];
5237 u8 roce_en[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005238 u8 reserved_at_1f[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03005239};
5240
5241struct mlx5_ifc_modify_nic_vport_context_in_bits {
5242 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005243 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005244
Matan Barakb4ff3a32016-02-09 14:57:42 +02005245 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005246 u8 op_mod[0x10];
5247
5248 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005249 u8 reserved_at_41[0xf];
Saeed Mahameede2816822015-05-28 22:28:40 +03005250 u8 vport_number[0x10];
5251
5252 struct mlx5_ifc_modify_nic_vport_field_select_bits field_select;
5253
Matan Barakb4ff3a32016-02-09 14:57:42 +02005254 u8 reserved_at_80[0x780];
Saeed Mahameede2816822015-05-28 22:28:40 +03005255
5256 struct mlx5_ifc_nic_vport_context_bits nic_vport_context;
5257};
5258
5259struct mlx5_ifc_modify_hca_vport_context_out_bits {
5260 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005261 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005262
5263 u8 syndrome[0x20];
5264
Matan Barakb4ff3a32016-02-09 14:57:42 +02005265 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005266};
5267
5268struct mlx5_ifc_modify_hca_vport_context_in_bits {
5269 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005270 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005271
Matan Barakb4ff3a32016-02-09 14:57:42 +02005272 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005273 u8 op_mod[0x10];
5274
5275 u8 other_vport[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005276 u8 reserved_at_41[0xb];
Majd Dibbiny707c4602015-06-04 19:30:41 +03005277 u8 port_num[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03005278 u8 vport_number[0x10];
5279
Matan Barakb4ff3a32016-02-09 14:57:42 +02005280 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005281
5282 struct mlx5_ifc_hca_vport_context_bits hca_vport_context;
5283};
5284
5285struct mlx5_ifc_modify_cq_out_bits {
5286 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005287 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005288
5289 u8 syndrome[0x20];
5290
Matan Barakb4ff3a32016-02-09 14:57:42 +02005291 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005292};
5293
5294enum {
5295 MLX5_MODIFY_CQ_IN_OP_MOD_MODIFY_CQ = 0x0,
5296 MLX5_MODIFY_CQ_IN_OP_MOD_RESIZE_CQ = 0x1,
5297};
5298
5299struct mlx5_ifc_modify_cq_in_bits {
5300 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005301 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005302
Matan Barakb4ff3a32016-02-09 14:57:42 +02005303 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005304 u8 op_mod[0x10];
5305
Matan Barakb4ff3a32016-02-09 14:57:42 +02005306 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005307 u8 cqn[0x18];
5308
5309 union mlx5_ifc_modify_field_select_resize_field_select_auto_bits modify_field_select_resize_field_select;
5310
5311 struct mlx5_ifc_cqc_bits cq_context;
5312
Matan Barakb4ff3a32016-02-09 14:57:42 +02005313 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03005314
5315 u8 pas[0][0x40];
5316};
5317
5318struct mlx5_ifc_modify_cong_status_out_bits {
5319 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005320 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005321
5322 u8 syndrome[0x20];
5323
Matan Barakb4ff3a32016-02-09 14:57:42 +02005324 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005325};
5326
5327struct mlx5_ifc_modify_cong_status_in_bits {
5328 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005329 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005330
Matan Barakb4ff3a32016-02-09 14:57:42 +02005331 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005332 u8 op_mod[0x10];
5333
Matan Barakb4ff3a32016-02-09 14:57:42 +02005334 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005335 u8 priority[0x4];
5336 u8 cong_protocol[0x4];
5337
5338 u8 enable[0x1];
5339 u8 tag_enable[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005340 u8 reserved_at_62[0x1e];
Saeed Mahameede2816822015-05-28 22:28:40 +03005341};
5342
5343struct mlx5_ifc_modify_cong_params_out_bits {
5344 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005345 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005346
5347 u8 syndrome[0x20];
5348
Matan Barakb4ff3a32016-02-09 14:57:42 +02005349 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005350};
5351
5352struct mlx5_ifc_modify_cong_params_in_bits {
5353 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005354 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005355
Matan Barakb4ff3a32016-02-09 14:57:42 +02005356 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005357 u8 op_mod[0x10];
5358
Matan Barakb4ff3a32016-02-09 14:57:42 +02005359 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03005360 u8 cong_protocol[0x4];
5361
5362 union mlx5_ifc_field_select_802_1_r_roce_auto_bits field_select;
5363
Matan Barakb4ff3a32016-02-09 14:57:42 +02005364 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005365
5366 union mlx5_ifc_cong_control_roce_ecn_auto_bits congestion_parameters;
5367};
5368
5369struct mlx5_ifc_manage_pages_out_bits {
5370 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005371 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005372
5373 u8 syndrome[0x20];
5374
5375 u8 output_num_entries[0x20];
5376
Matan Barakb4ff3a32016-02-09 14:57:42 +02005377 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005378
5379 u8 pas[0][0x40];
5380};
5381
5382enum {
5383 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_FAIL = 0x0,
5384 MLX5_MANAGE_PAGES_IN_OP_MOD_ALLOCATION_SUCCESS = 0x1,
5385 MLX5_MANAGE_PAGES_IN_OP_MOD_HCA_RETURN_PAGES = 0x2,
5386};
5387
5388struct mlx5_ifc_manage_pages_in_bits {
5389 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005390 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005391
Matan Barakb4ff3a32016-02-09 14:57:42 +02005392 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005393 u8 op_mod[0x10];
5394
Matan Barakb4ff3a32016-02-09 14:57:42 +02005395 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005396 u8 function_id[0x10];
5397
5398 u8 input_num_entries[0x20];
5399
5400 u8 pas[0][0x40];
5401};
5402
5403struct mlx5_ifc_mad_ifc_out_bits {
5404 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005405 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005406
5407 u8 syndrome[0x20];
5408
Matan Barakb4ff3a32016-02-09 14:57:42 +02005409 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005410
5411 u8 response_mad_packet[256][0x8];
5412};
5413
5414struct mlx5_ifc_mad_ifc_in_bits {
5415 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005416 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005417
Matan Barakb4ff3a32016-02-09 14:57:42 +02005418 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005419 u8 op_mod[0x10];
5420
5421 u8 remote_lid[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005422 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005423 u8 port[0x8];
5424
Matan Barakb4ff3a32016-02-09 14:57:42 +02005425 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005426
5427 u8 mad[256][0x8];
5428};
5429
5430struct mlx5_ifc_init_hca_out_bits {
5431 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005432 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005433
5434 u8 syndrome[0x20];
5435
Matan Barakb4ff3a32016-02-09 14:57:42 +02005436 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005437};
5438
5439struct mlx5_ifc_init_hca_in_bits {
5440 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005441 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005442
Matan Barakb4ff3a32016-02-09 14:57:42 +02005443 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005444 u8 op_mod[0x10];
5445
Matan Barakb4ff3a32016-02-09 14:57:42 +02005446 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005447};
5448
5449struct mlx5_ifc_init2rtr_qp_out_bits {
5450 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005451 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005452
5453 u8 syndrome[0x20];
5454
Matan Barakb4ff3a32016-02-09 14:57:42 +02005455 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005456};
5457
5458struct mlx5_ifc_init2rtr_qp_in_bits {
5459 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005460 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005461
Matan Barakb4ff3a32016-02-09 14:57:42 +02005462 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005463 u8 op_mod[0x10];
5464
Matan Barakb4ff3a32016-02-09 14:57:42 +02005465 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005466 u8 qpn[0x18];
5467
Matan Barakb4ff3a32016-02-09 14:57:42 +02005468 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005469
5470 u8 opt_param_mask[0x20];
5471
Matan Barakb4ff3a32016-02-09 14:57:42 +02005472 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005473
5474 struct mlx5_ifc_qpc_bits qpc;
5475
Matan Barakb4ff3a32016-02-09 14:57:42 +02005476 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005477};
5478
5479struct mlx5_ifc_init2init_qp_out_bits {
5480 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005481 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005482
5483 u8 syndrome[0x20];
5484
Matan Barakb4ff3a32016-02-09 14:57:42 +02005485 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005486};
5487
5488struct mlx5_ifc_init2init_qp_in_bits {
5489 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005490 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005491
Matan Barakb4ff3a32016-02-09 14:57:42 +02005492 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005493 u8 op_mod[0x10];
5494
Matan Barakb4ff3a32016-02-09 14:57:42 +02005495 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005496 u8 qpn[0x18];
5497
Matan Barakb4ff3a32016-02-09 14:57:42 +02005498 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005499
5500 u8 opt_param_mask[0x20];
5501
Matan Barakb4ff3a32016-02-09 14:57:42 +02005502 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005503
5504 struct mlx5_ifc_qpc_bits qpc;
5505
Matan Barakb4ff3a32016-02-09 14:57:42 +02005506 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03005507};
5508
5509struct mlx5_ifc_get_dropped_packet_log_out_bits {
5510 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005511 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005512
5513 u8 syndrome[0x20];
5514
Matan Barakb4ff3a32016-02-09 14:57:42 +02005515 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005516
5517 u8 packet_headers_log[128][0x8];
5518
5519 u8 packet_syndrome[64][0x8];
5520};
5521
5522struct mlx5_ifc_get_dropped_packet_log_in_bits {
5523 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005524 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005525
Matan Barakb4ff3a32016-02-09 14:57:42 +02005526 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005527 u8 op_mod[0x10];
5528
Matan Barakb4ff3a32016-02-09 14:57:42 +02005529 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005530};
5531
5532struct mlx5_ifc_gen_eqe_in_bits {
5533 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005534 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005535
Matan Barakb4ff3a32016-02-09 14:57:42 +02005536 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005537 u8 op_mod[0x10];
5538
Matan Barakb4ff3a32016-02-09 14:57:42 +02005539 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005540 u8 eq_number[0x8];
5541
Matan Barakb4ff3a32016-02-09 14:57:42 +02005542 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005543
5544 u8 eqe[64][0x8];
5545};
5546
5547struct mlx5_ifc_gen_eq_out_bits {
5548 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005549 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005550
5551 u8 syndrome[0x20];
5552
Matan Barakb4ff3a32016-02-09 14:57:42 +02005553 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005554};
5555
5556struct mlx5_ifc_enable_hca_out_bits {
5557 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005558 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005559
5560 u8 syndrome[0x20];
5561
Matan Barakb4ff3a32016-02-09 14:57:42 +02005562 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005563};
5564
5565struct mlx5_ifc_enable_hca_in_bits {
5566 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005567 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005568
Matan Barakb4ff3a32016-02-09 14:57:42 +02005569 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005570 u8 op_mod[0x10];
5571
Matan Barakb4ff3a32016-02-09 14:57:42 +02005572 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005573 u8 function_id[0x10];
5574
Matan Barakb4ff3a32016-02-09 14:57:42 +02005575 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005576};
5577
5578struct mlx5_ifc_drain_dct_out_bits {
5579 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005580 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005581
5582 u8 syndrome[0x20];
5583
Matan Barakb4ff3a32016-02-09 14:57:42 +02005584 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005585};
5586
5587struct mlx5_ifc_drain_dct_in_bits {
5588 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005589 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005590
Matan Barakb4ff3a32016-02-09 14:57:42 +02005591 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005592 u8 op_mod[0x10];
5593
Matan Barakb4ff3a32016-02-09 14:57:42 +02005594 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005595 u8 dctn[0x18];
5596
Matan Barakb4ff3a32016-02-09 14:57:42 +02005597 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005598};
5599
5600struct mlx5_ifc_disable_hca_out_bits {
5601 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005602 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005603
5604 u8 syndrome[0x20];
5605
Matan Barakb4ff3a32016-02-09 14:57:42 +02005606 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005607};
5608
5609struct mlx5_ifc_disable_hca_in_bits {
5610 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005611 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005612
Matan Barakb4ff3a32016-02-09 14:57:42 +02005613 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005614 u8 op_mod[0x10];
5615
Matan Barakb4ff3a32016-02-09 14:57:42 +02005616 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005617 u8 function_id[0x10];
5618
Matan Barakb4ff3a32016-02-09 14:57:42 +02005619 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005620};
5621
5622struct mlx5_ifc_detach_from_mcg_out_bits {
5623 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005624 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005625
5626 u8 syndrome[0x20];
5627
Matan Barakb4ff3a32016-02-09 14:57:42 +02005628 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005629};
5630
5631struct mlx5_ifc_detach_from_mcg_in_bits {
5632 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005633 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005634
Matan Barakb4ff3a32016-02-09 14:57:42 +02005635 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005636 u8 op_mod[0x10];
5637
Matan Barakb4ff3a32016-02-09 14:57:42 +02005638 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005639 u8 qpn[0x18];
5640
Matan Barakb4ff3a32016-02-09 14:57:42 +02005641 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005642
5643 u8 multicast_gid[16][0x8];
5644};
5645
Saeed Mahameed74862162016-06-09 15:11:34 +03005646struct mlx5_ifc_destroy_xrq_out_bits {
5647 u8 status[0x8];
5648 u8 reserved_at_8[0x18];
5649
5650 u8 syndrome[0x20];
5651
5652 u8 reserved_at_40[0x40];
5653};
5654
5655struct mlx5_ifc_destroy_xrq_in_bits {
5656 u8 opcode[0x10];
5657 u8 reserved_at_10[0x10];
5658
5659 u8 reserved_at_20[0x10];
5660 u8 op_mod[0x10];
5661
5662 u8 reserved_at_40[0x8];
5663 u8 xrqn[0x18];
5664
5665 u8 reserved_at_60[0x20];
5666};
5667
Saeed Mahameede2816822015-05-28 22:28:40 +03005668struct mlx5_ifc_destroy_xrc_srq_out_bits {
5669 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005670 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005671
5672 u8 syndrome[0x20];
5673
Matan Barakb4ff3a32016-02-09 14:57:42 +02005674 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005675};
5676
5677struct mlx5_ifc_destroy_xrc_srq_in_bits {
5678 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005679 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005680
Matan Barakb4ff3a32016-02-09 14:57:42 +02005681 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005682 u8 op_mod[0x10];
5683
Matan Barakb4ff3a32016-02-09 14:57:42 +02005684 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005685 u8 xrc_srqn[0x18];
5686
Matan Barakb4ff3a32016-02-09 14:57:42 +02005687 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005688};
5689
5690struct mlx5_ifc_destroy_tis_out_bits {
5691 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005692 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005693
5694 u8 syndrome[0x20];
5695
Matan Barakb4ff3a32016-02-09 14:57:42 +02005696 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005697};
5698
5699struct mlx5_ifc_destroy_tis_in_bits {
5700 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005701 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005702
Matan Barakb4ff3a32016-02-09 14:57:42 +02005703 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005704 u8 op_mod[0x10];
5705
Matan Barakb4ff3a32016-02-09 14:57:42 +02005706 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005707 u8 tisn[0x18];
5708
Matan Barakb4ff3a32016-02-09 14:57:42 +02005709 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005710};
5711
5712struct mlx5_ifc_destroy_tir_out_bits {
5713 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005714 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005715
5716 u8 syndrome[0x20];
5717
Matan Barakb4ff3a32016-02-09 14:57:42 +02005718 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005719};
5720
5721struct mlx5_ifc_destroy_tir_in_bits {
5722 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005723 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005724
Matan Barakb4ff3a32016-02-09 14:57:42 +02005725 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005726 u8 op_mod[0x10];
5727
Matan Barakb4ff3a32016-02-09 14:57:42 +02005728 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005729 u8 tirn[0x18];
5730
Matan Barakb4ff3a32016-02-09 14:57:42 +02005731 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005732};
5733
5734struct mlx5_ifc_destroy_srq_out_bits {
5735 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005736 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005737
5738 u8 syndrome[0x20];
5739
Matan Barakb4ff3a32016-02-09 14:57:42 +02005740 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005741};
5742
5743struct mlx5_ifc_destroy_srq_in_bits {
5744 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005745 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005746
Matan Barakb4ff3a32016-02-09 14:57:42 +02005747 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005748 u8 op_mod[0x10];
5749
Matan Barakb4ff3a32016-02-09 14:57:42 +02005750 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005751 u8 srqn[0x18];
5752
Matan Barakb4ff3a32016-02-09 14:57:42 +02005753 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005754};
5755
5756struct mlx5_ifc_destroy_sq_out_bits {
5757 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005758 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005759
5760 u8 syndrome[0x20];
5761
Matan Barakb4ff3a32016-02-09 14:57:42 +02005762 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005763};
5764
5765struct mlx5_ifc_destroy_sq_in_bits {
5766 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005767 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005768
Matan Barakb4ff3a32016-02-09 14:57:42 +02005769 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005770 u8 op_mod[0x10];
5771
Matan Barakb4ff3a32016-02-09 14:57:42 +02005772 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005773 u8 sqn[0x18];
5774
Matan Barakb4ff3a32016-02-09 14:57:42 +02005775 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005776};
5777
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03005778struct mlx5_ifc_destroy_scheduling_element_out_bits {
5779 u8 status[0x8];
5780 u8 reserved_at_8[0x18];
5781
5782 u8 syndrome[0x20];
5783
5784 u8 reserved_at_40[0x1c0];
5785};
5786
5787struct mlx5_ifc_destroy_scheduling_element_in_bits {
5788 u8 opcode[0x10];
5789 u8 reserved_at_10[0x10];
5790
5791 u8 reserved_at_20[0x10];
5792 u8 op_mod[0x10];
5793
5794 u8 scheduling_hierarchy[0x8];
5795 u8 reserved_at_48[0x18];
5796
5797 u8 scheduling_element_id[0x20];
5798
5799 u8 reserved_at_80[0x180];
5800};
5801
Saeed Mahameede2816822015-05-28 22:28:40 +03005802struct mlx5_ifc_destroy_rqt_out_bits {
5803 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005804 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005805
5806 u8 syndrome[0x20];
5807
Matan Barakb4ff3a32016-02-09 14:57:42 +02005808 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005809};
5810
5811struct mlx5_ifc_destroy_rqt_in_bits {
5812 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005813 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005814
Matan Barakb4ff3a32016-02-09 14:57:42 +02005815 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005816 u8 op_mod[0x10];
5817
Matan Barakb4ff3a32016-02-09 14:57:42 +02005818 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005819 u8 rqtn[0x18];
5820
Matan Barakb4ff3a32016-02-09 14:57:42 +02005821 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005822};
5823
5824struct mlx5_ifc_destroy_rq_out_bits {
5825 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005826 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005827
5828 u8 syndrome[0x20];
5829
Matan Barakb4ff3a32016-02-09 14:57:42 +02005830 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005831};
5832
5833struct mlx5_ifc_destroy_rq_in_bits {
5834 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005835 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005836
Matan Barakb4ff3a32016-02-09 14:57:42 +02005837 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005838 u8 op_mod[0x10];
5839
Matan Barakb4ff3a32016-02-09 14:57:42 +02005840 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005841 u8 rqn[0x18];
5842
Matan Barakb4ff3a32016-02-09 14:57:42 +02005843 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005844};
5845
5846struct mlx5_ifc_destroy_rmp_out_bits {
5847 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005848 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005849
5850 u8 syndrome[0x20];
5851
Matan Barakb4ff3a32016-02-09 14:57:42 +02005852 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005853};
5854
5855struct mlx5_ifc_destroy_rmp_in_bits {
5856 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005857 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005858
Matan Barakb4ff3a32016-02-09 14:57:42 +02005859 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005860 u8 op_mod[0x10];
5861
Matan Barakb4ff3a32016-02-09 14:57:42 +02005862 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005863 u8 rmpn[0x18];
5864
Matan Barakb4ff3a32016-02-09 14:57:42 +02005865 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005866};
5867
5868struct mlx5_ifc_destroy_qp_out_bits {
5869 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005870 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005871
5872 u8 syndrome[0x20];
5873
Matan Barakb4ff3a32016-02-09 14:57:42 +02005874 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005875};
5876
5877struct mlx5_ifc_destroy_qp_in_bits {
5878 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005879 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005880
Matan Barakb4ff3a32016-02-09 14:57:42 +02005881 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005882 u8 op_mod[0x10];
5883
Matan Barakb4ff3a32016-02-09 14:57:42 +02005884 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005885 u8 qpn[0x18];
5886
Matan Barakb4ff3a32016-02-09 14:57:42 +02005887 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005888};
5889
5890struct mlx5_ifc_destroy_psv_out_bits {
5891 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005892 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005893
5894 u8 syndrome[0x20];
5895
Matan Barakb4ff3a32016-02-09 14:57:42 +02005896 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005897};
5898
5899struct mlx5_ifc_destroy_psv_in_bits {
5900 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005901 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005902
Matan Barakb4ff3a32016-02-09 14:57:42 +02005903 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005904 u8 op_mod[0x10];
5905
Matan Barakb4ff3a32016-02-09 14:57:42 +02005906 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005907 u8 psvn[0x18];
5908
Matan Barakb4ff3a32016-02-09 14:57:42 +02005909 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005910};
5911
5912struct mlx5_ifc_destroy_mkey_out_bits {
5913 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005914 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005915
5916 u8 syndrome[0x20];
5917
Matan Barakb4ff3a32016-02-09 14:57:42 +02005918 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005919};
5920
5921struct mlx5_ifc_destroy_mkey_in_bits {
5922 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005923 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005924
Matan Barakb4ff3a32016-02-09 14:57:42 +02005925 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005926 u8 op_mod[0x10];
5927
Matan Barakb4ff3a32016-02-09 14:57:42 +02005928 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005929 u8 mkey_index[0x18];
5930
Matan Barakb4ff3a32016-02-09 14:57:42 +02005931 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005932};
5933
5934struct mlx5_ifc_destroy_flow_table_out_bits {
5935 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005936 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005937
5938 u8 syndrome[0x20];
5939
Matan Barakb4ff3a32016-02-09 14:57:42 +02005940 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005941};
5942
5943struct mlx5_ifc_destroy_flow_table_in_bits {
5944 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005945 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005946
Matan Barakb4ff3a32016-02-09 14:57:42 +02005947 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005948 u8 op_mod[0x10];
5949
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005950 u8 other_vport[0x1];
5951 u8 reserved_at_41[0xf];
5952 u8 vport_number[0x10];
5953
5954 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005955
5956 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005957 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005958
Matan Barakb4ff3a32016-02-09 14:57:42 +02005959 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005960 u8 table_id[0x18];
5961
Matan Barakb4ff3a32016-02-09 14:57:42 +02005962 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03005963};
5964
5965struct mlx5_ifc_destroy_flow_group_out_bits {
5966 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005967 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005968
5969 u8 syndrome[0x20];
5970
Matan Barakb4ff3a32016-02-09 14:57:42 +02005971 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03005972};
5973
5974struct mlx5_ifc_destroy_flow_group_in_bits {
5975 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005976 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005977
Matan Barakb4ff3a32016-02-09 14:57:42 +02005978 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03005979 u8 op_mod[0x10];
5980
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03005981 u8 other_vport[0x1];
5982 u8 reserved_at_41[0xf];
5983 u8 vport_number[0x10];
5984
5985 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03005986
5987 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02005988 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03005989
Matan Barakb4ff3a32016-02-09 14:57:42 +02005990 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03005991 u8 table_id[0x18];
5992
5993 u8 group_id[0x20];
5994
Matan Barakb4ff3a32016-02-09 14:57:42 +02005995 u8 reserved_at_e0[0x120];
Saeed Mahameede2816822015-05-28 22:28:40 +03005996};
5997
5998struct mlx5_ifc_destroy_eq_out_bits {
5999 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006000 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006001
6002 u8 syndrome[0x20];
6003
Matan Barakb4ff3a32016-02-09 14:57:42 +02006004 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006005};
6006
6007struct mlx5_ifc_destroy_eq_in_bits {
6008 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006009 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006010
Matan Barakb4ff3a32016-02-09 14:57:42 +02006011 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006012 u8 op_mod[0x10];
6013
Matan Barakb4ff3a32016-02-09 14:57:42 +02006014 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006015 u8 eq_number[0x8];
6016
Matan Barakb4ff3a32016-02-09 14:57:42 +02006017 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006018};
6019
6020struct mlx5_ifc_destroy_dct_out_bits {
6021 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006022 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006023
6024 u8 syndrome[0x20];
6025
Matan Barakb4ff3a32016-02-09 14:57:42 +02006026 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006027};
6028
6029struct mlx5_ifc_destroy_dct_in_bits {
6030 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006031 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006032
Matan Barakb4ff3a32016-02-09 14:57:42 +02006033 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006034 u8 op_mod[0x10];
6035
Matan Barakb4ff3a32016-02-09 14:57:42 +02006036 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006037 u8 dctn[0x18];
6038
Matan Barakb4ff3a32016-02-09 14:57:42 +02006039 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006040};
6041
6042struct mlx5_ifc_destroy_cq_out_bits {
6043 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006044 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006045
6046 u8 syndrome[0x20];
6047
Matan Barakb4ff3a32016-02-09 14:57:42 +02006048 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006049};
6050
6051struct mlx5_ifc_destroy_cq_in_bits {
6052 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006053 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006054
Matan Barakb4ff3a32016-02-09 14:57:42 +02006055 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006056 u8 op_mod[0x10];
6057
Matan Barakb4ff3a32016-02-09 14:57:42 +02006058 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006059 u8 cqn[0x18];
6060
Matan Barakb4ff3a32016-02-09 14:57:42 +02006061 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006062};
6063
6064struct mlx5_ifc_delete_vxlan_udp_dport_out_bits {
6065 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006066 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006067
6068 u8 syndrome[0x20];
6069
Matan Barakb4ff3a32016-02-09 14:57:42 +02006070 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006071};
6072
6073struct mlx5_ifc_delete_vxlan_udp_dport_in_bits {
6074 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006075 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006076
Matan Barakb4ff3a32016-02-09 14:57:42 +02006077 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006078 u8 op_mod[0x10];
6079
Matan Barakb4ff3a32016-02-09 14:57:42 +02006080 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006081
Matan Barakb4ff3a32016-02-09 14:57:42 +02006082 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006083 u8 vxlan_udp_port[0x10];
6084};
6085
6086struct mlx5_ifc_delete_l2_table_entry_out_bits {
6087 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006088 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006089
6090 u8 syndrome[0x20];
6091
Matan Barakb4ff3a32016-02-09 14:57:42 +02006092 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006093};
6094
6095struct mlx5_ifc_delete_l2_table_entry_in_bits {
6096 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006097 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006098
Matan Barakb4ff3a32016-02-09 14:57:42 +02006099 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006100 u8 op_mod[0x10];
6101
Matan Barakb4ff3a32016-02-09 14:57:42 +02006102 u8 reserved_at_40[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03006103
Matan Barakb4ff3a32016-02-09 14:57:42 +02006104 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006105 u8 table_index[0x18];
6106
Matan Barakb4ff3a32016-02-09 14:57:42 +02006107 u8 reserved_at_c0[0x140];
Saeed Mahameede2816822015-05-28 22:28:40 +03006108};
6109
6110struct mlx5_ifc_delete_fte_out_bits {
6111 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006112 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006113
6114 u8 syndrome[0x20];
6115
Matan Barakb4ff3a32016-02-09 14:57:42 +02006116 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006117};
6118
6119struct mlx5_ifc_delete_fte_in_bits {
6120 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006121 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006122
Matan Barakb4ff3a32016-02-09 14:57:42 +02006123 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006124 u8 op_mod[0x10];
6125
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006126 u8 other_vport[0x1];
6127 u8 reserved_at_41[0xf];
6128 u8 vport_number[0x10];
6129
6130 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006131
6132 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006133 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006134
Matan Barakb4ff3a32016-02-09 14:57:42 +02006135 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006136 u8 table_id[0x18];
6137
Matan Barakb4ff3a32016-02-09 14:57:42 +02006138 u8 reserved_at_c0[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006139
6140 u8 flow_index[0x20];
6141
Matan Barakb4ff3a32016-02-09 14:57:42 +02006142 u8 reserved_at_120[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006143};
6144
6145struct mlx5_ifc_dealloc_xrcd_out_bits {
6146 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006147 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006148
6149 u8 syndrome[0x20];
6150
Matan Barakb4ff3a32016-02-09 14:57:42 +02006151 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006152};
6153
6154struct mlx5_ifc_dealloc_xrcd_in_bits {
6155 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006156 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006157
Matan Barakb4ff3a32016-02-09 14:57:42 +02006158 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006159 u8 op_mod[0x10];
6160
Matan Barakb4ff3a32016-02-09 14:57:42 +02006161 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006162 u8 xrcd[0x18];
6163
Matan Barakb4ff3a32016-02-09 14:57:42 +02006164 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006165};
6166
6167struct mlx5_ifc_dealloc_uar_out_bits {
6168 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006169 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006170
6171 u8 syndrome[0x20];
6172
Matan Barakb4ff3a32016-02-09 14:57:42 +02006173 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006174};
6175
6176struct mlx5_ifc_dealloc_uar_in_bits {
6177 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006178 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006179
Matan Barakb4ff3a32016-02-09 14:57:42 +02006180 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006181 u8 op_mod[0x10];
6182
Matan Barakb4ff3a32016-02-09 14:57:42 +02006183 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006184 u8 uar[0x18];
6185
Matan Barakb4ff3a32016-02-09 14:57:42 +02006186 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006187};
6188
6189struct mlx5_ifc_dealloc_transport_domain_out_bits {
6190 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006191 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006192
6193 u8 syndrome[0x20];
6194
Matan Barakb4ff3a32016-02-09 14:57:42 +02006195 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006196};
6197
6198struct mlx5_ifc_dealloc_transport_domain_in_bits {
6199 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006200 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006201
Matan Barakb4ff3a32016-02-09 14:57:42 +02006202 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006203 u8 op_mod[0x10];
6204
Matan Barakb4ff3a32016-02-09 14:57:42 +02006205 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006206 u8 transport_domain[0x18];
6207
Matan Barakb4ff3a32016-02-09 14:57:42 +02006208 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006209};
6210
6211struct mlx5_ifc_dealloc_q_counter_out_bits {
6212 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006213 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006214
6215 u8 syndrome[0x20];
6216
Matan Barakb4ff3a32016-02-09 14:57:42 +02006217 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006218};
6219
6220struct mlx5_ifc_dealloc_q_counter_in_bits {
6221 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006222 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006223
Matan Barakb4ff3a32016-02-09 14:57:42 +02006224 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006225 u8 op_mod[0x10];
6226
Matan Barakb4ff3a32016-02-09 14:57:42 +02006227 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006228 u8 counter_set_id[0x8];
6229
Matan Barakb4ff3a32016-02-09 14:57:42 +02006230 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006231};
6232
6233struct mlx5_ifc_dealloc_pd_out_bits {
6234 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006235 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006236
6237 u8 syndrome[0x20];
6238
Matan Barakb4ff3a32016-02-09 14:57:42 +02006239 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006240};
6241
6242struct mlx5_ifc_dealloc_pd_in_bits {
6243 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006244 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006245
Matan Barakb4ff3a32016-02-09 14:57:42 +02006246 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006247 u8 op_mod[0x10];
6248
Matan Barakb4ff3a32016-02-09 14:57:42 +02006249 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006250 u8 pd[0x18];
6251
Matan Barakb4ff3a32016-02-09 14:57:42 +02006252 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006253};
6254
Amir Vadai9dc0b282016-05-13 12:55:39 +00006255struct mlx5_ifc_dealloc_flow_counter_out_bits {
6256 u8 status[0x8];
6257 u8 reserved_at_8[0x18];
6258
6259 u8 syndrome[0x20];
6260
6261 u8 reserved_at_40[0x40];
6262};
6263
6264struct mlx5_ifc_dealloc_flow_counter_in_bits {
6265 u8 opcode[0x10];
6266 u8 reserved_at_10[0x10];
6267
6268 u8 reserved_at_20[0x10];
6269 u8 op_mod[0x10];
6270
6271 u8 reserved_at_40[0x10];
6272 u8 flow_counter_id[0x10];
6273
6274 u8 reserved_at_60[0x20];
6275};
6276
Saeed Mahameed74862162016-06-09 15:11:34 +03006277struct mlx5_ifc_create_xrq_out_bits {
6278 u8 status[0x8];
6279 u8 reserved_at_8[0x18];
6280
6281 u8 syndrome[0x20];
6282
6283 u8 reserved_at_40[0x8];
6284 u8 xrqn[0x18];
6285
6286 u8 reserved_at_60[0x20];
6287};
6288
6289struct mlx5_ifc_create_xrq_in_bits {
6290 u8 opcode[0x10];
6291 u8 reserved_at_10[0x10];
6292
6293 u8 reserved_at_20[0x10];
6294 u8 op_mod[0x10];
6295
6296 u8 reserved_at_40[0x40];
6297
6298 struct mlx5_ifc_xrqc_bits xrq_context;
6299};
6300
Saeed Mahameede2816822015-05-28 22:28:40 +03006301struct mlx5_ifc_create_xrc_srq_out_bits {
6302 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006303 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006304
6305 u8 syndrome[0x20];
6306
Matan Barakb4ff3a32016-02-09 14:57:42 +02006307 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006308 u8 xrc_srqn[0x18];
6309
Matan Barakb4ff3a32016-02-09 14:57:42 +02006310 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006311};
6312
6313struct mlx5_ifc_create_xrc_srq_in_bits {
6314 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006315 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006316
Matan Barakb4ff3a32016-02-09 14:57:42 +02006317 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006318 u8 op_mod[0x10];
6319
Matan Barakb4ff3a32016-02-09 14:57:42 +02006320 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006321
6322 struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
6323
Matan Barakb4ff3a32016-02-09 14:57:42 +02006324 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006325
6326 u8 pas[0][0x40];
6327};
6328
6329struct mlx5_ifc_create_tis_out_bits {
6330 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006331 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006332
6333 u8 syndrome[0x20];
6334
Matan Barakb4ff3a32016-02-09 14:57:42 +02006335 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006336 u8 tisn[0x18];
6337
Matan Barakb4ff3a32016-02-09 14:57:42 +02006338 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006339};
6340
6341struct mlx5_ifc_create_tis_in_bits {
6342 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006343 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006344
Matan Barakb4ff3a32016-02-09 14:57:42 +02006345 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006346 u8 op_mod[0x10];
6347
Matan Barakb4ff3a32016-02-09 14:57:42 +02006348 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006349
6350 struct mlx5_ifc_tisc_bits ctx;
6351};
6352
6353struct mlx5_ifc_create_tir_out_bits {
6354 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006355 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006356
6357 u8 syndrome[0x20];
6358
Matan Barakb4ff3a32016-02-09 14:57:42 +02006359 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006360 u8 tirn[0x18];
6361
Matan Barakb4ff3a32016-02-09 14:57:42 +02006362 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006363};
6364
6365struct mlx5_ifc_create_tir_in_bits {
6366 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006367 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006368
Matan Barakb4ff3a32016-02-09 14:57:42 +02006369 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006370 u8 op_mod[0x10];
6371
Matan Barakb4ff3a32016-02-09 14:57:42 +02006372 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006373
6374 struct mlx5_ifc_tirc_bits ctx;
6375};
6376
6377struct mlx5_ifc_create_srq_out_bits {
6378 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006379 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006380
6381 u8 syndrome[0x20];
6382
Matan Barakb4ff3a32016-02-09 14:57:42 +02006383 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006384 u8 srqn[0x18];
6385
Matan Barakb4ff3a32016-02-09 14:57:42 +02006386 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006387};
6388
6389struct mlx5_ifc_create_srq_in_bits {
6390 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006391 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006392
Matan Barakb4ff3a32016-02-09 14:57:42 +02006393 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006394 u8 op_mod[0x10];
6395
Matan Barakb4ff3a32016-02-09 14:57:42 +02006396 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006397
6398 struct mlx5_ifc_srqc_bits srq_context_entry;
6399
Matan Barakb4ff3a32016-02-09 14:57:42 +02006400 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006401
6402 u8 pas[0][0x40];
6403};
6404
6405struct mlx5_ifc_create_sq_out_bits {
6406 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006407 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006408
6409 u8 syndrome[0x20];
6410
Matan Barakb4ff3a32016-02-09 14:57:42 +02006411 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006412 u8 sqn[0x18];
6413
Matan Barakb4ff3a32016-02-09 14:57:42 +02006414 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006415};
6416
6417struct mlx5_ifc_create_sq_in_bits {
6418 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006419 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006420
Matan Barakb4ff3a32016-02-09 14:57:42 +02006421 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006422 u8 op_mod[0x10];
6423
Matan Barakb4ff3a32016-02-09 14:57:42 +02006424 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006425
6426 struct mlx5_ifc_sqc_bits ctx;
6427};
6428
Mohamad Haj Yahia813f8542016-08-11 11:21:39 +03006429struct mlx5_ifc_create_scheduling_element_out_bits {
6430 u8 status[0x8];
6431 u8 reserved_at_8[0x18];
6432
6433 u8 syndrome[0x20];
6434
6435 u8 reserved_at_40[0x40];
6436
6437 u8 scheduling_element_id[0x20];
6438
6439 u8 reserved_at_a0[0x160];
6440};
6441
6442struct mlx5_ifc_create_scheduling_element_in_bits {
6443 u8 opcode[0x10];
6444 u8 reserved_at_10[0x10];
6445
6446 u8 reserved_at_20[0x10];
6447 u8 op_mod[0x10];
6448
6449 u8 scheduling_hierarchy[0x8];
6450 u8 reserved_at_48[0x18];
6451
6452 u8 reserved_at_60[0xa0];
6453
6454 struct mlx5_ifc_scheduling_context_bits scheduling_context;
6455
6456 u8 reserved_at_300[0x100];
6457};
6458
Saeed Mahameede2816822015-05-28 22:28:40 +03006459struct mlx5_ifc_create_rqt_out_bits {
6460 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006461 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006462
6463 u8 syndrome[0x20];
6464
Matan Barakb4ff3a32016-02-09 14:57:42 +02006465 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006466 u8 rqtn[0x18];
6467
Matan Barakb4ff3a32016-02-09 14:57:42 +02006468 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006469};
6470
6471struct mlx5_ifc_create_rqt_in_bits {
6472 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006473 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006474
Matan Barakb4ff3a32016-02-09 14:57:42 +02006475 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006476 u8 op_mod[0x10];
6477
Matan Barakb4ff3a32016-02-09 14:57:42 +02006478 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006479
6480 struct mlx5_ifc_rqtc_bits rqt_context;
6481};
6482
6483struct mlx5_ifc_create_rq_out_bits {
6484 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006485 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006486
6487 u8 syndrome[0x20];
6488
Matan Barakb4ff3a32016-02-09 14:57:42 +02006489 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006490 u8 rqn[0x18];
6491
Matan Barakb4ff3a32016-02-09 14:57:42 +02006492 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006493};
6494
6495struct mlx5_ifc_create_rq_in_bits {
6496 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006497 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006498
Matan Barakb4ff3a32016-02-09 14:57:42 +02006499 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006500 u8 op_mod[0x10];
6501
Matan Barakb4ff3a32016-02-09 14:57:42 +02006502 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006503
6504 struct mlx5_ifc_rqc_bits ctx;
6505};
6506
6507struct mlx5_ifc_create_rmp_out_bits {
6508 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006509 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006510
6511 u8 syndrome[0x20];
6512
Matan Barakb4ff3a32016-02-09 14:57:42 +02006513 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006514 u8 rmpn[0x18];
6515
Matan Barakb4ff3a32016-02-09 14:57:42 +02006516 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006517};
6518
6519struct mlx5_ifc_create_rmp_in_bits {
6520 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006521 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006522
Matan Barakb4ff3a32016-02-09 14:57:42 +02006523 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006524 u8 op_mod[0x10];
6525
Matan Barakb4ff3a32016-02-09 14:57:42 +02006526 u8 reserved_at_40[0xc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006527
6528 struct mlx5_ifc_rmpc_bits ctx;
6529};
6530
6531struct mlx5_ifc_create_qp_out_bits {
6532 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006533 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006534
6535 u8 syndrome[0x20];
6536
Matan Barakb4ff3a32016-02-09 14:57:42 +02006537 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006538 u8 qpn[0x18];
6539
Matan Barakb4ff3a32016-02-09 14:57:42 +02006540 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006541};
6542
6543struct mlx5_ifc_create_qp_in_bits {
6544 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006545 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006546
Matan Barakb4ff3a32016-02-09 14:57:42 +02006547 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006548 u8 op_mod[0x10];
6549
Matan Barakb4ff3a32016-02-09 14:57:42 +02006550 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006551
6552 u8 opt_param_mask[0x20];
6553
Matan Barakb4ff3a32016-02-09 14:57:42 +02006554 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006555
6556 struct mlx5_ifc_qpc_bits qpc;
6557
Matan Barakb4ff3a32016-02-09 14:57:42 +02006558 u8 reserved_at_800[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006559
6560 u8 pas[0][0x40];
6561};
6562
6563struct mlx5_ifc_create_psv_out_bits {
6564 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006565 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006566
6567 u8 syndrome[0x20];
6568
Matan Barakb4ff3a32016-02-09 14:57:42 +02006569 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006570
Matan Barakb4ff3a32016-02-09 14:57:42 +02006571 u8 reserved_at_80[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006572 u8 psv0_index[0x18];
6573
Matan Barakb4ff3a32016-02-09 14:57:42 +02006574 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006575 u8 psv1_index[0x18];
6576
Matan Barakb4ff3a32016-02-09 14:57:42 +02006577 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006578 u8 psv2_index[0x18];
6579
Matan Barakb4ff3a32016-02-09 14:57:42 +02006580 u8 reserved_at_e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006581 u8 psv3_index[0x18];
6582};
6583
6584struct mlx5_ifc_create_psv_in_bits {
6585 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006586 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006587
Matan Barakb4ff3a32016-02-09 14:57:42 +02006588 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006589 u8 op_mod[0x10];
6590
6591 u8 num_psv[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006592 u8 reserved_at_44[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006593 u8 pd[0x18];
6594
Matan Barakb4ff3a32016-02-09 14:57:42 +02006595 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006596};
6597
6598struct mlx5_ifc_create_mkey_out_bits {
6599 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006600 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006601
6602 u8 syndrome[0x20];
6603
Matan Barakb4ff3a32016-02-09 14:57:42 +02006604 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006605 u8 mkey_index[0x18];
6606
Matan Barakb4ff3a32016-02-09 14:57:42 +02006607 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006608};
6609
6610struct mlx5_ifc_create_mkey_in_bits {
6611 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006612 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006613
Matan Barakb4ff3a32016-02-09 14:57:42 +02006614 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006615 u8 op_mod[0x10];
6616
Matan Barakb4ff3a32016-02-09 14:57:42 +02006617 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006618
6619 u8 pg_access[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006620 u8 reserved_at_61[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03006621
6622 struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
6623
Matan Barakb4ff3a32016-02-09 14:57:42 +02006624 u8 reserved_at_280[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03006625
6626 u8 translations_octword_actual_size[0x20];
6627
Matan Barakb4ff3a32016-02-09 14:57:42 +02006628 u8 reserved_at_320[0x560];
Saeed Mahameede2816822015-05-28 22:28:40 +03006629
6630 u8 klm_pas_mtt[0][0x20];
6631};
6632
6633struct mlx5_ifc_create_flow_table_out_bits {
6634 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006635 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006636
6637 u8 syndrome[0x20];
6638
Matan Barakb4ff3a32016-02-09 14:57:42 +02006639 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006640 u8 table_id[0x18];
6641
Matan Barakb4ff3a32016-02-09 14:57:42 +02006642 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006643};
6644
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006645struct mlx5_ifc_flow_table_context_bits {
6646 u8 encap_en[0x1];
6647 u8 decap_en[0x1];
6648 u8 reserved_at_2[0x2];
6649 u8 table_miss_action[0x4];
6650 u8 level[0x8];
6651 u8 reserved_at_10[0x8];
6652 u8 log_size[0x8];
6653
6654 u8 reserved_at_20[0x8];
6655 u8 table_miss_id[0x18];
6656
6657 u8 reserved_at_40[0x8];
6658 u8 lag_master_next_table_id[0x18];
6659
6660 u8 reserved_at_60[0xe0];
6661};
6662
Saeed Mahameede2816822015-05-28 22:28:40 +03006663struct mlx5_ifc_create_flow_table_in_bits {
6664 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006665 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006666
Matan Barakb4ff3a32016-02-09 14:57:42 +02006667 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006668 u8 op_mod[0x10];
6669
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006670 u8 other_vport[0x1];
6671 u8 reserved_at_41[0xf];
6672 u8 vport_number[0x10];
6673
6674 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006675
6676 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006677 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006678
Matan Barakb4ff3a32016-02-09 14:57:42 +02006679 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006680
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02006681 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Saeed Mahameede2816822015-05-28 22:28:40 +03006682};
6683
6684struct mlx5_ifc_create_flow_group_out_bits {
6685 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006686 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006687
6688 u8 syndrome[0x20];
6689
Matan Barakb4ff3a32016-02-09 14:57:42 +02006690 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006691 u8 group_id[0x18];
6692
Matan Barakb4ff3a32016-02-09 14:57:42 +02006693 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006694};
6695
6696enum {
6697 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_OUTER_HEADERS = 0x0,
6698 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_MISC_PARAMETERS = 0x1,
6699 MLX5_CREATE_FLOW_GROUP_IN_MATCH_CRITERIA_ENABLE_INNER_HEADERS = 0x2,
6700};
6701
6702struct mlx5_ifc_create_flow_group_in_bits {
6703 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006704 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006705
Matan Barakb4ff3a32016-02-09 14:57:42 +02006706 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006707 u8 op_mod[0x10];
6708
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03006709 u8 other_vport[0x1];
6710 u8 reserved_at_41[0xf];
6711 u8 vport_number[0x10];
6712
6713 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006714
6715 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006716 u8 reserved_at_88[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006717
Matan Barakb4ff3a32016-02-09 14:57:42 +02006718 u8 reserved_at_a0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006719 u8 table_id[0x18];
6720
Matan Barakb4ff3a32016-02-09 14:57:42 +02006721 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006722
6723 u8 start_flow_index[0x20];
6724
Matan Barakb4ff3a32016-02-09 14:57:42 +02006725 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006726
6727 u8 end_flow_index[0x20];
6728
Matan Barakb4ff3a32016-02-09 14:57:42 +02006729 u8 reserved_at_140[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03006730
Matan Barakb4ff3a32016-02-09 14:57:42 +02006731 u8 reserved_at_1e0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006732 u8 match_criteria_enable[0x8];
6733
6734 struct mlx5_ifc_fte_match_param_bits match_criteria;
6735
Matan Barakb4ff3a32016-02-09 14:57:42 +02006736 u8 reserved_at_1200[0xe00];
Saeed Mahameede2816822015-05-28 22:28:40 +03006737};
6738
6739struct mlx5_ifc_create_eq_out_bits {
6740 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006741 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006742
6743 u8 syndrome[0x20];
6744
Matan Barakb4ff3a32016-02-09 14:57:42 +02006745 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006746 u8 eq_number[0x8];
6747
Matan Barakb4ff3a32016-02-09 14:57:42 +02006748 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006749};
6750
6751struct mlx5_ifc_create_eq_in_bits {
6752 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006753 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006754
Matan Barakb4ff3a32016-02-09 14:57:42 +02006755 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006756 u8 op_mod[0x10];
6757
Matan Barakb4ff3a32016-02-09 14:57:42 +02006758 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006759
6760 struct mlx5_ifc_eqc_bits eq_context_entry;
6761
Matan Barakb4ff3a32016-02-09 14:57:42 +02006762 u8 reserved_at_280[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006763
6764 u8 event_bitmask[0x40];
6765
Matan Barakb4ff3a32016-02-09 14:57:42 +02006766 u8 reserved_at_300[0x580];
Saeed Mahameede2816822015-05-28 22:28:40 +03006767
6768 u8 pas[0][0x40];
6769};
6770
6771struct mlx5_ifc_create_dct_out_bits {
6772 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006773 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006774
6775 u8 syndrome[0x20];
6776
Matan Barakb4ff3a32016-02-09 14:57:42 +02006777 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006778 u8 dctn[0x18];
6779
Matan Barakb4ff3a32016-02-09 14:57:42 +02006780 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006781};
6782
6783struct mlx5_ifc_create_dct_in_bits {
6784 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006785 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006786
Matan Barakb4ff3a32016-02-09 14:57:42 +02006787 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006788 u8 op_mod[0x10];
6789
Matan Barakb4ff3a32016-02-09 14:57:42 +02006790 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006791
6792 struct mlx5_ifc_dctc_bits dct_context_entry;
6793
Matan Barakb4ff3a32016-02-09 14:57:42 +02006794 u8 reserved_at_280[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03006795};
6796
6797struct mlx5_ifc_create_cq_out_bits {
6798 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006799 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006800
6801 u8 syndrome[0x20];
6802
Matan Barakb4ff3a32016-02-09 14:57:42 +02006803 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006804 u8 cqn[0x18];
6805
Matan Barakb4ff3a32016-02-09 14:57:42 +02006806 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006807};
6808
6809struct mlx5_ifc_create_cq_in_bits {
6810 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006811 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006812
Matan Barakb4ff3a32016-02-09 14:57:42 +02006813 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006814 u8 op_mod[0x10];
6815
Matan Barakb4ff3a32016-02-09 14:57:42 +02006816 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006817
6818 struct mlx5_ifc_cqc_bits cq_context;
6819
Matan Barakb4ff3a32016-02-09 14:57:42 +02006820 u8 reserved_at_280[0x600];
Saeed Mahameede2816822015-05-28 22:28:40 +03006821
6822 u8 pas[0][0x40];
6823};
6824
6825struct mlx5_ifc_config_int_moderation_out_bits {
6826 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006827 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006828
6829 u8 syndrome[0x20];
6830
Matan Barakb4ff3a32016-02-09 14:57:42 +02006831 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006832 u8 min_delay[0xc];
6833 u8 int_vector[0x10];
6834
Matan Barakb4ff3a32016-02-09 14:57:42 +02006835 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006836};
6837
6838enum {
6839 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_WRITE = 0x0,
6840 MLX5_CONFIG_INT_MODERATION_IN_OP_MOD_READ = 0x1,
6841};
6842
6843struct mlx5_ifc_config_int_moderation_in_bits {
6844 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006845 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006846
Matan Barakb4ff3a32016-02-09 14:57:42 +02006847 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006848 u8 op_mod[0x10];
6849
Matan Barakb4ff3a32016-02-09 14:57:42 +02006850 u8 reserved_at_40[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03006851 u8 min_delay[0xc];
6852 u8 int_vector[0x10];
6853
Matan Barakb4ff3a32016-02-09 14:57:42 +02006854 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006855};
6856
6857struct mlx5_ifc_attach_to_mcg_out_bits {
6858 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006859 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006860
6861 u8 syndrome[0x20];
6862
Matan Barakb4ff3a32016-02-09 14:57:42 +02006863 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006864};
6865
6866struct mlx5_ifc_attach_to_mcg_in_bits {
6867 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006868 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006869
Matan Barakb4ff3a32016-02-09 14:57:42 +02006870 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006871 u8 op_mod[0x10];
6872
Matan Barakb4ff3a32016-02-09 14:57:42 +02006873 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006874 u8 qpn[0x18];
6875
Matan Barakb4ff3a32016-02-09 14:57:42 +02006876 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006877
6878 u8 multicast_gid[16][0x8];
6879};
6880
Saeed Mahameed74862162016-06-09 15:11:34 +03006881struct mlx5_ifc_arm_xrq_out_bits {
6882 u8 status[0x8];
6883 u8 reserved_at_8[0x18];
6884
6885 u8 syndrome[0x20];
6886
6887 u8 reserved_at_40[0x40];
6888};
6889
6890struct mlx5_ifc_arm_xrq_in_bits {
6891 u8 opcode[0x10];
6892 u8 reserved_at_10[0x10];
6893
6894 u8 reserved_at_20[0x10];
6895 u8 op_mod[0x10];
6896
6897 u8 reserved_at_40[0x8];
6898 u8 xrqn[0x18];
6899
6900 u8 reserved_at_60[0x10];
6901 u8 lwm[0x10];
6902};
6903
Saeed Mahameede2816822015-05-28 22:28:40 +03006904struct mlx5_ifc_arm_xrc_srq_out_bits {
6905 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006906 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006907
6908 u8 syndrome[0x20];
6909
Matan Barakb4ff3a32016-02-09 14:57:42 +02006910 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006911};
6912
6913enum {
6914 MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ = 0x1,
6915};
6916
6917struct mlx5_ifc_arm_xrc_srq_in_bits {
6918 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006919 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006920
Matan Barakb4ff3a32016-02-09 14:57:42 +02006921 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006922 u8 op_mod[0x10];
6923
Matan Barakb4ff3a32016-02-09 14:57:42 +02006924 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006925 u8 xrc_srqn[0x18];
6926
Matan Barakb4ff3a32016-02-09 14:57:42 +02006927 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006928 u8 lwm[0x10];
6929};
6930
6931struct mlx5_ifc_arm_rq_out_bits {
6932 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006933 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006934
6935 u8 syndrome[0x20];
6936
Matan Barakb4ff3a32016-02-09 14:57:42 +02006937 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006938};
6939
6940enum {
Saeed Mahameed74862162016-06-09 15:11:34 +03006941 MLX5_ARM_RQ_IN_OP_MOD_SRQ = 0x1,
6942 MLX5_ARM_RQ_IN_OP_MOD_XRQ = 0x2,
Saeed Mahameede2816822015-05-28 22:28:40 +03006943};
6944
6945struct mlx5_ifc_arm_rq_in_bits {
6946 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006947 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006948
Matan Barakb4ff3a32016-02-09 14:57:42 +02006949 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006950 u8 op_mod[0x10];
6951
Matan Barakb4ff3a32016-02-09 14:57:42 +02006952 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006953 u8 srq_number[0x18];
6954
Matan Barakb4ff3a32016-02-09 14:57:42 +02006955 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006956 u8 lwm[0x10];
6957};
6958
6959struct mlx5_ifc_arm_dct_out_bits {
6960 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006961 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006962
6963 u8 syndrome[0x20];
6964
Matan Barakb4ff3a32016-02-09 14:57:42 +02006965 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03006966};
6967
6968struct mlx5_ifc_arm_dct_in_bits {
6969 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006970 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006971
Matan Barakb4ff3a32016-02-09 14:57:42 +02006972 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006973 u8 op_mod[0x10];
6974
Matan Barakb4ff3a32016-02-09 14:57:42 +02006975 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006976 u8 dct_number[0x18];
6977
Matan Barakb4ff3a32016-02-09 14:57:42 +02006978 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006979};
6980
6981struct mlx5_ifc_alloc_xrcd_out_bits {
6982 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006983 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03006984
6985 u8 syndrome[0x20];
6986
Matan Barakb4ff3a32016-02-09 14:57:42 +02006987 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03006988 u8 xrcd[0x18];
6989
Matan Barakb4ff3a32016-02-09 14:57:42 +02006990 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03006991};
6992
6993struct mlx5_ifc_alloc_xrcd_in_bits {
6994 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02006995 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006996
Matan Barakb4ff3a32016-02-09 14:57:42 +02006997 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03006998 u8 op_mod[0x10];
6999
Matan Barakb4ff3a32016-02-09 14:57:42 +02007000 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007001};
7002
7003struct mlx5_ifc_alloc_uar_out_bits {
7004 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007005 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007006
7007 u8 syndrome[0x20];
7008
Matan Barakb4ff3a32016-02-09 14:57:42 +02007009 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007010 u8 uar[0x18];
7011
Matan Barakb4ff3a32016-02-09 14:57:42 +02007012 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007013};
7014
7015struct mlx5_ifc_alloc_uar_in_bits {
7016 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007017 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007018
Matan Barakb4ff3a32016-02-09 14:57:42 +02007019 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007020 u8 op_mod[0x10];
7021
Matan Barakb4ff3a32016-02-09 14:57:42 +02007022 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007023};
7024
7025struct mlx5_ifc_alloc_transport_domain_out_bits {
7026 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007027 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007028
7029 u8 syndrome[0x20];
7030
Matan Barakb4ff3a32016-02-09 14:57:42 +02007031 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007032 u8 transport_domain[0x18];
7033
Matan Barakb4ff3a32016-02-09 14:57:42 +02007034 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007035};
7036
7037struct mlx5_ifc_alloc_transport_domain_in_bits {
7038 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007039 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007040
Matan Barakb4ff3a32016-02-09 14:57:42 +02007041 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007042 u8 op_mod[0x10];
7043
Matan Barakb4ff3a32016-02-09 14:57:42 +02007044 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007045};
7046
7047struct mlx5_ifc_alloc_q_counter_out_bits {
7048 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007049 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007050
7051 u8 syndrome[0x20];
7052
Matan Barakb4ff3a32016-02-09 14:57:42 +02007053 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007054 u8 counter_set_id[0x8];
7055
Matan Barakb4ff3a32016-02-09 14:57:42 +02007056 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007057};
7058
7059struct mlx5_ifc_alloc_q_counter_in_bits {
7060 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007061 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007062
Matan Barakb4ff3a32016-02-09 14:57:42 +02007063 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007064 u8 op_mod[0x10];
7065
Matan Barakb4ff3a32016-02-09 14:57:42 +02007066 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007067};
7068
7069struct mlx5_ifc_alloc_pd_out_bits {
7070 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007071 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007072
7073 u8 syndrome[0x20];
7074
Matan Barakb4ff3a32016-02-09 14:57:42 +02007075 u8 reserved_at_40[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007076 u8 pd[0x18];
7077
Matan Barakb4ff3a32016-02-09 14:57:42 +02007078 u8 reserved_at_60[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007079};
7080
7081struct mlx5_ifc_alloc_pd_in_bits {
7082 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007083 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007084
Matan Barakb4ff3a32016-02-09 14:57:42 +02007085 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007086 u8 op_mod[0x10];
7087
Matan Barakb4ff3a32016-02-09 14:57:42 +02007088 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007089};
7090
Amir Vadai9dc0b282016-05-13 12:55:39 +00007091struct mlx5_ifc_alloc_flow_counter_out_bits {
7092 u8 status[0x8];
7093 u8 reserved_at_8[0x18];
7094
7095 u8 syndrome[0x20];
7096
7097 u8 reserved_at_40[0x10];
7098 u8 flow_counter_id[0x10];
7099
7100 u8 reserved_at_60[0x20];
7101};
7102
7103struct mlx5_ifc_alloc_flow_counter_in_bits {
7104 u8 opcode[0x10];
7105 u8 reserved_at_10[0x10];
7106
7107 u8 reserved_at_20[0x10];
7108 u8 op_mod[0x10];
7109
7110 u8 reserved_at_40[0x40];
7111};
7112
Saeed Mahameede2816822015-05-28 22:28:40 +03007113struct mlx5_ifc_add_vxlan_udp_dport_out_bits {
7114 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007115 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007116
7117 u8 syndrome[0x20];
7118
Matan Barakb4ff3a32016-02-09 14:57:42 +02007119 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007120};
7121
7122struct mlx5_ifc_add_vxlan_udp_dport_in_bits {
7123 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007124 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007125
Matan Barakb4ff3a32016-02-09 14:57:42 +02007126 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007127 u8 op_mod[0x10];
7128
Matan Barakb4ff3a32016-02-09 14:57:42 +02007129 u8 reserved_at_40[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007130
Matan Barakb4ff3a32016-02-09 14:57:42 +02007131 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007132 u8 vxlan_udp_port[0x10];
7133};
7134
Saeed Mahameed74862162016-06-09 15:11:34 +03007135struct mlx5_ifc_set_rate_limit_out_bits {
7136 u8 status[0x8];
7137 u8 reserved_at_8[0x18];
7138
7139 u8 syndrome[0x20];
7140
7141 u8 reserved_at_40[0x40];
7142};
7143
7144struct mlx5_ifc_set_rate_limit_in_bits {
7145 u8 opcode[0x10];
7146 u8 reserved_at_10[0x10];
7147
7148 u8 reserved_at_20[0x10];
7149 u8 op_mod[0x10];
7150
7151 u8 reserved_at_40[0x10];
7152 u8 rate_limit_index[0x10];
7153
7154 u8 reserved_at_60[0x20];
7155
7156 u8 rate_limit[0x20];
7157};
7158
Saeed Mahameede2816822015-05-28 22:28:40 +03007159struct mlx5_ifc_access_register_out_bits {
7160 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007161 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007162
7163 u8 syndrome[0x20];
7164
Matan Barakb4ff3a32016-02-09 14:57:42 +02007165 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007166
7167 u8 register_data[0][0x20];
7168};
7169
7170enum {
7171 MLX5_ACCESS_REGISTER_IN_OP_MOD_WRITE = 0x0,
7172 MLX5_ACCESS_REGISTER_IN_OP_MOD_READ = 0x1,
7173};
7174
7175struct mlx5_ifc_access_register_in_bits {
7176 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007177 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007178
Matan Barakb4ff3a32016-02-09 14:57:42 +02007179 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007180 u8 op_mod[0x10];
7181
Matan Barakb4ff3a32016-02-09 14:57:42 +02007182 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007183 u8 register_id[0x10];
7184
7185 u8 argument[0x20];
7186
7187 u8 register_data[0][0x20];
7188};
7189
7190struct mlx5_ifc_sltp_reg_bits {
7191 u8 status[0x4];
7192 u8 version[0x4];
7193 u8 local_port[0x8];
7194 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007195 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007196 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007197 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007198
Matan Barakb4ff3a32016-02-09 14:57:42 +02007199 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007200
Matan Barakb4ff3a32016-02-09 14:57:42 +02007201 u8 reserved_at_40[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007202 u8 polarity[0x1];
7203 u8 ob_tap0[0x8];
7204 u8 ob_tap1[0x8];
7205 u8 ob_tap2[0x8];
7206
Matan Barakb4ff3a32016-02-09 14:57:42 +02007207 u8 reserved_at_60[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007208 u8 ob_preemp_mode[0x4];
7209 u8 ob_reg[0x8];
7210 u8 ob_bias[0x8];
7211
Matan Barakb4ff3a32016-02-09 14:57:42 +02007212 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007213};
7214
7215struct mlx5_ifc_slrg_reg_bits {
7216 u8 status[0x4];
7217 u8 version[0x4];
7218 u8 local_port[0x8];
7219 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007220 u8 reserved_at_12[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007221 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007222 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007223
7224 u8 time_to_link_up[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007225 u8 reserved_at_30[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007226 u8 grade_lane_speed[0x4];
7227
7228 u8 grade_version[0x8];
7229 u8 grade[0x18];
7230
Matan Barakb4ff3a32016-02-09 14:57:42 +02007231 u8 reserved_at_60[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007232 u8 height_grade_type[0x4];
7233 u8 height_grade[0x18];
7234
7235 u8 height_dz[0x10];
7236 u8 height_dv[0x10];
7237
Matan Barakb4ff3a32016-02-09 14:57:42 +02007238 u8 reserved_at_a0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007239 u8 height_sigma[0x10];
7240
Matan Barakb4ff3a32016-02-09 14:57:42 +02007241 u8 reserved_at_c0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007242
Matan Barakb4ff3a32016-02-09 14:57:42 +02007243 u8 reserved_at_e0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007244 u8 phase_grade_type[0x4];
7245 u8 phase_grade[0x18];
7246
Matan Barakb4ff3a32016-02-09 14:57:42 +02007247 u8 reserved_at_100[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007248 u8 phase_eo_pos[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007249 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007250 u8 phase_eo_neg[0x8];
7251
7252 u8 ffe_set_tested[0x10];
7253 u8 test_errors_per_lane[0x10];
7254};
7255
7256struct mlx5_ifc_pvlc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007257 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007258 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007259 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007260
Matan Barakb4ff3a32016-02-09 14:57:42 +02007261 u8 reserved_at_20[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007262 u8 vl_hw_cap[0x4];
7263
Matan Barakb4ff3a32016-02-09 14:57:42 +02007264 u8 reserved_at_40[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007265 u8 vl_admin[0x4];
7266
Matan Barakb4ff3a32016-02-09 14:57:42 +02007267 u8 reserved_at_60[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007268 u8 vl_operational[0x4];
7269};
7270
7271struct mlx5_ifc_pude_reg_bits {
7272 u8 swid[0x8];
7273 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007274 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007275 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007276 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007277 u8 oper_status[0x4];
7278
Matan Barakb4ff3a32016-02-09 14:57:42 +02007279 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007280};
7281
7282struct mlx5_ifc_ptys_reg_bits {
Bodong Wange7e31ca2016-09-07 19:07:58 +03007283 u8 reserved_at_0[0x1];
Saeed Mahameed74862162016-06-09 15:11:34 +03007284 u8 an_disable_admin[0x1];
Bodong Wange7e31ca2016-09-07 19:07:58 +03007285 u8 an_disable_cap[0x1];
7286 u8 reserved_at_3[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007287 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007288 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007289 u8 proto_mask[0x3];
7290
Saeed Mahameed74862162016-06-09 15:11:34 +03007291 u8 an_status[0x4];
7292 u8 reserved_at_24[0x3c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007293
7294 u8 eth_proto_capability[0x20];
7295
7296 u8 ib_link_width_capability[0x10];
7297 u8 ib_proto_capability[0x10];
7298
Matan Barakb4ff3a32016-02-09 14:57:42 +02007299 u8 reserved_at_a0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007300
7301 u8 eth_proto_admin[0x20];
7302
7303 u8 ib_link_width_admin[0x10];
7304 u8 ib_proto_admin[0x10];
7305
Matan Barakb4ff3a32016-02-09 14:57:42 +02007306 u8 reserved_at_100[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007307
7308 u8 eth_proto_oper[0x20];
7309
7310 u8 ib_link_width_oper[0x10];
7311 u8 ib_proto_oper[0x10];
7312
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007313 u8 reserved_at_160[0x1c];
7314 u8 connector_type[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007315
7316 u8 eth_proto_lp_advertise[0x20];
7317
Matan Barakb4ff3a32016-02-09 14:57:42 +02007318 u8 reserved_at_1a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007319};
7320
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007321struct mlx5_ifc_mlcr_reg_bits {
7322 u8 reserved_at_0[0x8];
7323 u8 local_port[0x8];
7324 u8 reserved_at_10[0x20];
7325
7326 u8 beacon_duration[0x10];
7327 u8 reserved_at_40[0x10];
7328
7329 u8 beacon_remain[0x10];
7330};
7331
Saeed Mahameede2816822015-05-28 22:28:40 +03007332struct mlx5_ifc_ptas_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007333 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007334
7335 u8 algorithm_options[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007336 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007337 u8 repetitions_mode[0x4];
7338 u8 num_of_repetitions[0x8];
7339
7340 u8 grade_version[0x8];
7341 u8 height_grade_type[0x4];
7342 u8 phase_grade_type[0x4];
7343 u8 height_grade_weight[0x8];
7344 u8 phase_grade_weight[0x8];
7345
7346 u8 gisim_measure_bits[0x10];
7347 u8 adaptive_tap_measure_bits[0x10];
7348
7349 u8 ber_bath_high_error_threshold[0x10];
7350 u8 ber_bath_mid_error_threshold[0x10];
7351
7352 u8 ber_bath_low_error_threshold[0x10];
7353 u8 one_ratio_high_threshold[0x10];
7354
7355 u8 one_ratio_high_mid_threshold[0x10];
7356 u8 one_ratio_low_mid_threshold[0x10];
7357
7358 u8 one_ratio_low_threshold[0x10];
7359 u8 ndeo_error_threshold[0x10];
7360
7361 u8 mixer_offset_step_size[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007362 u8 reserved_at_110[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007363 u8 mix90_phase_for_voltage_bath[0x8];
7364
7365 u8 mixer_offset_start[0x10];
7366 u8 mixer_offset_end[0x10];
7367
Matan Barakb4ff3a32016-02-09 14:57:42 +02007368 u8 reserved_at_140[0x15];
Saeed Mahameede2816822015-05-28 22:28:40 +03007369 u8 ber_test_time[0xb];
7370};
7371
7372struct mlx5_ifc_pspa_reg_bits {
7373 u8 swid[0x8];
7374 u8 local_port[0x8];
7375 u8 sub_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007376 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007377
Matan Barakb4ff3a32016-02-09 14:57:42 +02007378 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007379};
7380
7381struct mlx5_ifc_pqdr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007382 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007383 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007384 u8 reserved_at_10[0x5];
Saeed Mahameede2816822015-05-28 22:28:40 +03007385 u8 prio[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007386 u8 reserved_at_18[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007387 u8 mode[0x2];
7388
Matan Barakb4ff3a32016-02-09 14:57:42 +02007389 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007390
Matan Barakb4ff3a32016-02-09 14:57:42 +02007391 u8 reserved_at_40[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007392 u8 min_threshold[0x10];
7393
Matan Barakb4ff3a32016-02-09 14:57:42 +02007394 u8 reserved_at_60[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007395 u8 max_threshold[0x10];
7396
Matan Barakb4ff3a32016-02-09 14:57:42 +02007397 u8 reserved_at_80[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007398 u8 mark_probability_denominator[0x10];
7399
Matan Barakb4ff3a32016-02-09 14:57:42 +02007400 u8 reserved_at_a0[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007401};
7402
7403struct mlx5_ifc_ppsc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007404 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007405 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007406 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007407
Matan Barakb4ff3a32016-02-09 14:57:42 +02007408 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007409
Matan Barakb4ff3a32016-02-09 14:57:42 +02007410 u8 reserved_at_80[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007411 u8 wrps_admin[0x4];
7412
Matan Barakb4ff3a32016-02-09 14:57:42 +02007413 u8 reserved_at_a0[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007414 u8 wrps_status[0x4];
7415
Matan Barakb4ff3a32016-02-09 14:57:42 +02007416 u8 reserved_at_c0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007417 u8 up_threshold[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007418 u8 reserved_at_d0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007419 u8 down_threshold[0x8];
7420
Matan Barakb4ff3a32016-02-09 14:57:42 +02007421 u8 reserved_at_e0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007422
Matan Barakb4ff3a32016-02-09 14:57:42 +02007423 u8 reserved_at_100[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007424 u8 srps_admin[0x4];
7425
Matan Barakb4ff3a32016-02-09 14:57:42 +02007426 u8 reserved_at_120[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007427 u8 srps_status[0x4];
7428
Matan Barakb4ff3a32016-02-09 14:57:42 +02007429 u8 reserved_at_140[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007430};
7431
7432struct mlx5_ifc_pplr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007433 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007434 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007435 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007436
Matan Barakb4ff3a32016-02-09 14:57:42 +02007437 u8 reserved_at_20[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007438 u8 lb_cap[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007439 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007440 u8 lb_en[0x8];
7441};
7442
7443struct mlx5_ifc_pplm_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007444 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007445 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007446 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007447
Matan Barakb4ff3a32016-02-09 14:57:42 +02007448 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007449
7450 u8 port_profile_mode[0x8];
7451 u8 static_port_profile[0x8];
7452 u8 active_port_profile[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007453 u8 reserved_at_58[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007454
7455 u8 retransmission_active[0x8];
7456 u8 fec_mode_active[0x18];
7457
Matan Barakb4ff3a32016-02-09 14:57:42 +02007458 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007459};
7460
7461struct mlx5_ifc_ppcnt_reg_bits {
7462 u8 swid[0x8];
7463 u8 local_port[0x8];
7464 u8 pnat[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007465 u8 reserved_at_12[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007466 u8 grp[0x6];
7467
7468 u8 clr[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007469 u8 reserved_at_21[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007470 u8 prio_tc[0x3];
7471
7472 union mlx5_ifc_eth_cntrs_grp_data_layout_auto_bits counter_set;
7473};
7474
Gal Pressman8ed1a632016-11-17 13:46:01 +02007475struct mlx5_ifc_mpcnt_reg_bits {
7476 u8 reserved_at_0[0x8];
7477 u8 pcie_index[0x8];
7478 u8 reserved_at_10[0xa];
7479 u8 grp[0x6];
7480
7481 u8 clr[0x1];
7482 u8 reserved_at_21[0x1f];
7483
7484 union mlx5_ifc_pcie_cntrs_grp_data_layout_auto_bits counter_set;
7485};
7486
Saeed Mahameede2816822015-05-28 22:28:40 +03007487struct mlx5_ifc_ppad_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007488 u8 reserved_at_0[0x3];
Saeed Mahameede2816822015-05-28 22:28:40 +03007489 u8 single_mac[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007490 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007491 u8 local_port[0x8];
7492 u8 mac_47_32[0x10];
7493
7494 u8 mac_31_0[0x20];
7495
Matan Barakb4ff3a32016-02-09 14:57:42 +02007496 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007497};
7498
7499struct mlx5_ifc_pmtu_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007500 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007501 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007502 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007503
7504 u8 max_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007505 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007506
7507 u8 admin_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007508 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007509
7510 u8 oper_mtu[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007511 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007512};
7513
7514struct mlx5_ifc_pmpr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007515 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007516 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007517 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007518
Matan Barakb4ff3a32016-02-09 14:57:42 +02007519 u8 reserved_at_20[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007520 u8 attenuation_5g[0x8];
7521
Matan Barakb4ff3a32016-02-09 14:57:42 +02007522 u8 reserved_at_40[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007523 u8 attenuation_7g[0x8];
7524
Matan Barakb4ff3a32016-02-09 14:57:42 +02007525 u8 reserved_at_60[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007526 u8 attenuation_12g[0x8];
7527};
7528
7529struct mlx5_ifc_pmpe_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007530 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007531 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007532 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007533 u8 module_status[0x4];
7534
Matan Barakb4ff3a32016-02-09 14:57:42 +02007535 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007536};
7537
7538struct mlx5_ifc_pmpc_reg_bits {
7539 u8 module_state_updated[32][0x8];
7540};
7541
7542struct mlx5_ifc_pmlpn_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007543 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007544 u8 mlpn_status[0x4];
7545 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007546 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007547
7548 u8 e[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007549 u8 reserved_at_21[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007550};
7551
7552struct mlx5_ifc_pmlp_reg_bits {
7553 u8 rxtx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007554 u8 reserved_at_1[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007555 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007556 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007557 u8 width[0x8];
7558
7559 u8 lane0_module_mapping[0x20];
7560
7561 u8 lane1_module_mapping[0x20];
7562
7563 u8 lane2_module_mapping[0x20];
7564
7565 u8 lane3_module_mapping[0x20];
7566
Matan Barakb4ff3a32016-02-09 14:57:42 +02007567 u8 reserved_at_a0[0x160];
Saeed Mahameede2816822015-05-28 22:28:40 +03007568};
7569
7570struct mlx5_ifc_pmaos_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007571 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007572 u8 module[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007573 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007574 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007575 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007576 u8 oper_status[0x4];
7577
7578 u8 ase[0x1];
7579 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007580 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007581 u8 e[0x2];
7582
Matan Barakb4ff3a32016-02-09 14:57:42 +02007583 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007584};
7585
7586struct mlx5_ifc_plpc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007587 u8 reserved_at_0[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007588 u8 profile_id[0xc];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007589 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007590 u8 proto_mask[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007591 u8 reserved_at_18[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007592
Matan Barakb4ff3a32016-02-09 14:57:42 +02007593 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007594 u8 lane_speed[0x10];
7595
Matan Barakb4ff3a32016-02-09 14:57:42 +02007596 u8 reserved_at_40[0x17];
Saeed Mahameede2816822015-05-28 22:28:40 +03007597 u8 lpbf[0x1];
7598 u8 fec_mode_policy[0x8];
7599
7600 u8 retransmission_capability[0x8];
7601 u8 fec_mode_capability[0x18];
7602
7603 u8 retransmission_support_admin[0x8];
7604 u8 fec_mode_support_admin[0x18];
7605
7606 u8 retransmission_request_admin[0x8];
7607 u8 fec_mode_request_admin[0x18];
7608
Matan Barakb4ff3a32016-02-09 14:57:42 +02007609 u8 reserved_at_c0[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007610};
7611
7612struct mlx5_ifc_plib_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007613 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007614 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007615 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007616 u8 ib_port[0x8];
7617
Matan Barakb4ff3a32016-02-09 14:57:42 +02007618 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007619};
7620
7621struct mlx5_ifc_plbf_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007622 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007623 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007624 u8 reserved_at_10[0xd];
Saeed Mahameede2816822015-05-28 22:28:40 +03007625 u8 lbf_mode[0x3];
7626
Matan Barakb4ff3a32016-02-09 14:57:42 +02007627 u8 reserved_at_20[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007628};
7629
7630struct mlx5_ifc_pipg_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007631 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007632 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007633 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007634
7635 u8 dic[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007636 u8 reserved_at_21[0x19];
Saeed Mahameede2816822015-05-28 22:28:40 +03007637 u8 ipg[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007638 u8 reserved_at_3e[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007639};
7640
7641struct mlx5_ifc_pifr_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007642 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007643 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007644 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007645
Matan Barakb4ff3a32016-02-09 14:57:42 +02007646 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007647
7648 u8 port_filter[8][0x20];
7649
7650 u8 port_filter_update_en[8][0x20];
7651};
7652
7653struct mlx5_ifc_pfcc_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007654 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007655 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007656 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007657
7658 u8 ppan[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007659 u8 reserved_at_24[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007660 u8 prio_mask_tx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007661 u8 reserved_at_30[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007662 u8 prio_mask_rx[0x8];
7663
7664 u8 pptx[0x1];
7665 u8 aptx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007666 u8 reserved_at_42[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007667 u8 pfctx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007668 u8 reserved_at_50[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007669
7670 u8 pprx[0x1];
7671 u8 aprx[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007672 u8 reserved_at_62[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007673 u8 pfcrx[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007674 u8 reserved_at_70[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007675
Matan Barakb4ff3a32016-02-09 14:57:42 +02007676 u8 reserved_at_80[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007677};
7678
7679struct mlx5_ifc_pelc_reg_bits {
7680 u8 op[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007681 u8 reserved_at_4[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007682 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007683 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007684
7685 u8 op_admin[0x8];
7686 u8 op_capability[0x8];
7687 u8 op_request[0x8];
7688 u8 op_active[0x8];
7689
7690 u8 admin[0x40];
7691
7692 u8 capability[0x40];
7693
7694 u8 request[0x40];
7695
7696 u8 active[0x40];
7697
Matan Barakb4ff3a32016-02-09 14:57:42 +02007698 u8 reserved_at_140[0x80];
Saeed Mahameede2816822015-05-28 22:28:40 +03007699};
7700
7701struct mlx5_ifc_peir_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007702 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007703 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007704 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007705
Matan Barakb4ff3a32016-02-09 14:57:42 +02007706 u8 reserved_at_20[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007707 u8 error_count[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007708 u8 reserved_at_30[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007709
Matan Barakb4ff3a32016-02-09 14:57:42 +02007710 u8 reserved_at_40[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007711 u8 lane[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007712 u8 reserved_at_50[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007713 u8 error_type[0x8];
7714};
7715
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007716struct mlx5_ifc_pcam_enhanced_features_bits {
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007717 u8 reserved_at_0[0x7c];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007718
Eran Ben Elisha5b4793f2017-02-13 14:00:59 +02007719 u8 ptys_connector_type[0x1];
7720 u8 reserved_at_7d[0x1];
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007721 u8 ppcnt_discard_group[0x1];
7722 u8 ppcnt_statistical_group[0x1];
7723};
7724
7725struct mlx5_ifc_pcam_reg_bits {
7726 u8 reserved_at_0[0x8];
7727 u8 feature_group[0x8];
7728 u8 reserved_at_10[0x8];
7729 u8 access_reg_group[0x8];
7730
7731 u8 reserved_at_20[0x20];
7732
7733 union {
7734 u8 reserved_at_0[0x80];
7735 } port_access_reg_cap_mask;
7736
7737 u8 reserved_at_c0[0x80];
7738
7739 union {
7740 struct mlx5_ifc_pcam_enhanced_features_bits enhanced_features;
7741 u8 reserved_at_0[0x80];
7742 } feature_cap_mask;
7743
7744 u8 reserved_at_1c0[0xc0];
7745};
7746
7747struct mlx5_ifc_mcam_enhanced_features_bits {
7748 u8 reserved_at_0[0x7f];
7749
7750 u8 pcie_performance_group[0x1];
7751};
7752
Or Gerlitz0ab87742017-06-11 15:25:38 +03007753struct mlx5_ifc_mcam_access_reg_bits {
7754 u8 reserved_at_0[0x1c];
7755 u8 mcda[0x1];
7756 u8 mcc[0x1];
7757 u8 mcqi[0x1];
7758 u8 reserved_at_1f[0x1];
7759
7760 u8 regs_95_to_64[0x20];
7761 u8 regs_63_to_32[0x20];
7762 u8 regs_31_to_0[0x20];
7763};
7764
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007765struct mlx5_ifc_mcam_reg_bits {
7766 u8 reserved_at_0[0x8];
7767 u8 feature_group[0x8];
7768 u8 reserved_at_10[0x8];
7769 u8 access_reg_group[0x8];
7770
7771 u8 reserved_at_20[0x20];
7772
7773 union {
Or Gerlitz0ab87742017-06-11 15:25:38 +03007774 struct mlx5_ifc_mcam_access_reg_bits access_regs;
Gal Pressmancfdcbcea2016-12-08 15:52:00 +02007775 u8 reserved_at_0[0x80];
7776 } mng_access_reg_cap_mask;
7777
7778 u8 reserved_at_c0[0x80];
7779
7780 union {
7781 struct mlx5_ifc_mcam_enhanced_features_bits enhanced_features;
7782 u8 reserved_at_0[0x80];
7783 } mng_feature_cap_mask;
7784
7785 u8 reserved_at_1c0[0x80];
7786};
7787
Saeed Mahameede2816822015-05-28 22:28:40 +03007788struct mlx5_ifc_pcap_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007789 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007790 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007791 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007792
7793 u8 port_capability_mask[4][0x20];
7794};
7795
7796struct mlx5_ifc_paos_reg_bits {
7797 u8 swid[0x8];
7798 u8 local_port[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007799 u8 reserved_at_10[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007800 u8 admin_status[0x4];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007801 u8 reserved_at_18[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007802 u8 oper_status[0x4];
7803
7804 u8 ase[0x1];
7805 u8 ee[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007806 u8 reserved_at_22[0x1c];
Saeed Mahameede2816822015-05-28 22:28:40 +03007807 u8 e[0x2];
7808
Matan Barakb4ff3a32016-02-09 14:57:42 +02007809 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03007810};
7811
7812struct mlx5_ifc_pamp_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007813 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007814 u8 opamp_group[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007815 u8 reserved_at_10[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007816 u8 opamp_group_type[0x4];
7817
7818 u8 start_index[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007819 u8 reserved_at_30[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03007820 u8 num_of_indices[0xc];
7821
7822 u8 index_data[18][0x10];
7823};
7824
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03007825struct mlx5_ifc_pcmr_reg_bits {
7826 u8 reserved_at_0[0x8];
7827 u8 local_port[0x8];
7828 u8 reserved_at_10[0x2e];
7829 u8 fcs_cap[0x1];
7830 u8 reserved_at_3f[0x1f];
7831 u8 fcs_chk[0x1];
7832 u8 reserved_at_5f[0x1];
7833};
7834
Saeed Mahameede2816822015-05-28 22:28:40 +03007835struct mlx5_ifc_lane_2_module_mapping_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007836 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007837 u8 rx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007838 u8 reserved_at_8[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007839 u8 tx_lane[0x2];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007840 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007841 u8 module[0x8];
7842};
7843
7844struct mlx5_ifc_bufferx_reg_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007845 u8 reserved_at_0[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03007846 u8 lossy[0x1];
7847 u8 epsb[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007848 u8 reserved_at_8[0xc];
Saeed Mahameede2816822015-05-28 22:28:40 +03007849 u8 size[0xc];
7850
7851 u8 xoff_threshold[0x10];
7852 u8 xon_threshold[0x10];
7853};
7854
7855struct mlx5_ifc_set_node_in_bits {
7856 u8 node_description[64][0x8];
7857};
7858
7859struct mlx5_ifc_register_power_settings_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007860 u8 reserved_at_0[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007861 u8 power_settings_level[0x8];
7862
Matan Barakb4ff3a32016-02-09 14:57:42 +02007863 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007864};
7865
7866struct mlx5_ifc_register_host_endianness_bits {
7867 u8 he[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007868 u8 reserved_at_1[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03007869
Matan Barakb4ff3a32016-02-09 14:57:42 +02007870 u8 reserved_at_20[0x60];
Saeed Mahameede2816822015-05-28 22:28:40 +03007871};
7872
7873struct mlx5_ifc_umr_pointer_desc_argument_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007874 u8 reserved_at_0[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007875
7876 u8 mkey[0x20];
7877
7878 u8 addressh_63_32[0x20];
7879
7880 u8 addressl_31_0[0x20];
7881};
7882
7883struct mlx5_ifc_ud_adrs_vector_bits {
7884 u8 dc_key[0x40];
7885
7886 u8 ext[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007887 u8 reserved_at_41[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007888 u8 destination_qp_dct[0x18];
7889
7890 u8 static_rate[0x4];
7891 u8 sl_eth_prio[0x4];
7892 u8 fl[0x1];
7893 u8 mlid[0x7];
7894 u8 rlid_udp_sport[0x10];
7895
Matan Barakb4ff3a32016-02-09 14:57:42 +02007896 u8 reserved_at_80[0x20];
Saeed Mahameede2816822015-05-28 22:28:40 +03007897
7898 u8 rmac_47_16[0x20];
7899
7900 u8 rmac_15_0[0x10];
7901 u8 tclass[0x8];
7902 u8 hop_limit[0x8];
7903
Matan Barakb4ff3a32016-02-09 14:57:42 +02007904 u8 reserved_at_e0[0x1];
Saeed Mahameede2816822015-05-28 22:28:40 +03007905 u8 grh[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007906 u8 reserved_at_e2[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03007907 u8 src_addr_index[0x8];
7908 u8 flow_label[0x14];
7909
7910 u8 rgid_rip[16][0x8];
7911};
7912
7913struct mlx5_ifc_pages_req_event_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007914 u8 reserved_at_0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007915 u8 function_id[0x10];
7916
7917 u8 num_pages[0x20];
7918
Matan Barakb4ff3a32016-02-09 14:57:42 +02007919 u8 reserved_at_40[0xa0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007920};
7921
7922struct mlx5_ifc_eqe_bits {
Matan Barakb4ff3a32016-02-09 14:57:42 +02007923 u8 reserved_at_0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007924 u8 event_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007925 u8 reserved_at_10[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007926 u8 event_sub_type[0x8];
7927
Matan Barakb4ff3a32016-02-09 14:57:42 +02007928 u8 reserved_at_20[0xe0];
Saeed Mahameede2816822015-05-28 22:28:40 +03007929
7930 union mlx5_ifc_event_auto_bits event_data;
7931
Matan Barakb4ff3a32016-02-09 14:57:42 +02007932 u8 reserved_at_1e0[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007933 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007934 u8 reserved_at_1f8[0x7];
Saeed Mahameede2816822015-05-28 22:28:40 +03007935 u8 owner[0x1];
7936};
7937
7938enum {
7939 MLX5_CMD_QUEUE_ENTRY_TYPE_PCIE_CMD_IF_TRANSPORT = 0x7,
7940};
7941
7942struct mlx5_ifc_cmd_queue_entry_bits {
7943 u8 type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007944 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007945
7946 u8 input_length[0x20];
7947
7948 u8 input_mailbox_pointer_63_32[0x20];
7949
7950 u8 input_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007951 u8 reserved_at_77[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007952
7953 u8 command_input_inline_data[16][0x8];
7954
7955 u8 command_output_inline_data[16][0x8];
7956
7957 u8 output_mailbox_pointer_63_32[0x20];
7958
7959 u8 output_mailbox_pointer_31_9[0x17];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007960 u8 reserved_at_1b7[0x9];
Saeed Mahameede2816822015-05-28 22:28:40 +03007961
7962 u8 output_length[0x20];
7963
7964 u8 token[0x8];
7965 u8 signature[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007966 u8 reserved_at_1f0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03007967 u8 status[0x7];
7968 u8 ownership[0x1];
7969};
7970
7971struct mlx5_ifc_cmd_out_bits {
7972 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007973 u8 reserved_at_8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03007974
7975 u8 syndrome[0x20];
7976
7977 u8 command_output[0x20];
7978};
7979
7980struct mlx5_ifc_cmd_in_bits {
7981 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007982 u8 reserved_at_10[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007983
Matan Barakb4ff3a32016-02-09 14:57:42 +02007984 u8 reserved_at_20[0x10];
Saeed Mahameede2816822015-05-28 22:28:40 +03007985 u8 op_mod[0x10];
7986
7987 u8 command[0][0x20];
7988};
7989
7990struct mlx5_ifc_cmd_if_box_bits {
7991 u8 mailbox_data[512][0x8];
7992
Matan Barakb4ff3a32016-02-09 14:57:42 +02007993 u8 reserved_at_1000[0x180];
Saeed Mahameede2816822015-05-28 22:28:40 +03007994
7995 u8 next_pointer_63_32[0x20];
7996
7997 u8 next_pointer_31_10[0x16];
Matan Barakb4ff3a32016-02-09 14:57:42 +02007998 u8 reserved_at_11b6[0xa];
Saeed Mahameede2816822015-05-28 22:28:40 +03007999
8000 u8 block_number[0x20];
8001
Matan Barakb4ff3a32016-02-09 14:57:42 +02008002 u8 reserved_at_11e0[0x8];
Saeed Mahameede2816822015-05-28 22:28:40 +03008003 u8 token[0x8];
8004 u8 ctrl_signature[0x8];
8005 u8 signature[0x8];
8006};
8007
8008struct mlx5_ifc_mtt_bits {
8009 u8 ptag_63_32[0x20];
8010
8011 u8 ptag_31_8[0x18];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008012 u8 reserved_at_38[0x6];
Saeed Mahameede2816822015-05-28 22:28:40 +03008013 u8 wr_en[0x1];
8014 u8 rd_en[0x1];
8015};
8016
Tariq Toukan928cfe82016-02-22 18:17:29 +02008017struct mlx5_ifc_query_wol_rol_out_bits {
8018 u8 status[0x8];
8019 u8 reserved_at_8[0x18];
8020
8021 u8 syndrome[0x20];
8022
8023 u8 reserved_at_40[0x10];
8024 u8 rol_mode[0x8];
8025 u8 wol_mode[0x8];
8026
8027 u8 reserved_at_60[0x20];
8028};
8029
8030struct mlx5_ifc_query_wol_rol_in_bits {
8031 u8 opcode[0x10];
8032 u8 reserved_at_10[0x10];
8033
8034 u8 reserved_at_20[0x10];
8035 u8 op_mod[0x10];
8036
8037 u8 reserved_at_40[0x40];
8038};
8039
8040struct mlx5_ifc_set_wol_rol_out_bits {
8041 u8 status[0x8];
8042 u8 reserved_at_8[0x18];
8043
8044 u8 syndrome[0x20];
8045
8046 u8 reserved_at_40[0x40];
8047};
8048
8049struct mlx5_ifc_set_wol_rol_in_bits {
8050 u8 opcode[0x10];
8051 u8 reserved_at_10[0x10];
8052
8053 u8 reserved_at_20[0x10];
8054 u8 op_mod[0x10];
8055
8056 u8 rol_mode_valid[0x1];
8057 u8 wol_mode_valid[0x1];
8058 u8 reserved_at_42[0xe];
8059 u8 rol_mode[0x8];
8060 u8 wol_mode[0x8];
8061
8062 u8 reserved_at_60[0x20];
8063};
8064
Saeed Mahameede2816822015-05-28 22:28:40 +03008065enum {
8066 MLX5_INITIAL_SEG_NIC_INTERFACE_FULL_DRIVER = 0x0,
8067 MLX5_INITIAL_SEG_NIC_INTERFACE_DISABLED = 0x1,
8068 MLX5_INITIAL_SEG_NIC_INTERFACE_NO_DRAM_NIC = 0x2,
8069};
8070
8071enum {
8072 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_FULL_DRIVER = 0x0,
8073 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_DISABLED = 0x1,
8074 MLX5_INITIAL_SEG_NIC_INTERFACE_SUPPORTED_NO_DRAM_NIC = 0x2,
8075};
8076
8077enum {
8078 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_INTERNAL_ERR = 0x1,
8079 MLX5_INITIAL_SEG_HEALTH_SYNDROME_DEAD_IRISC = 0x7,
8080 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HW_FATAL_ERR = 0x8,
8081 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FW_CRC_ERR = 0x9,
8082 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_FETCH_PCI_ERR = 0xa,
8083 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ICM_PAGE_ERR = 0xb,
8084 MLX5_INITIAL_SEG_HEALTH_SYNDROME_ASYNCHRONOUS_EQ_BUF_OVERRUN = 0xc,
8085 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_IN_ERR = 0xd,
8086 MLX5_INITIAL_SEG_HEALTH_SYNDROME_EQ_INV = 0xe,
8087 MLX5_INITIAL_SEG_HEALTH_SYNDROME_FFSER_ERR = 0xf,
8088 MLX5_INITIAL_SEG_HEALTH_SYNDROME_HIGH_TEMP_ERR = 0x10,
8089};
8090
8091struct mlx5_ifc_initial_seg_bits {
8092 u8 fw_rev_minor[0x10];
8093 u8 fw_rev_major[0x10];
8094
8095 u8 cmd_interface_rev[0x10];
8096 u8 fw_rev_subminor[0x10];
8097
Matan Barakb4ff3a32016-02-09 14:57:42 +02008098 u8 reserved_at_40[0x40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008099
8100 u8 cmdq_phy_addr_63_32[0x20];
8101
8102 u8 cmdq_phy_addr_31_12[0x14];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008103 u8 reserved_at_b4[0x2];
Saeed Mahameede2816822015-05-28 22:28:40 +03008104 u8 nic_interface[0x2];
8105 u8 log_cmdq_size[0x4];
8106 u8 log_cmdq_stride[0x4];
8107
8108 u8 command_doorbell_vector[0x20];
8109
Matan Barakb4ff3a32016-02-09 14:57:42 +02008110 u8 reserved_at_e0[0xf00];
Saeed Mahameede2816822015-05-28 22:28:40 +03008111
8112 u8 initializing[0x1];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008113 u8 reserved_at_fe1[0x4];
Saeed Mahameede2816822015-05-28 22:28:40 +03008114 u8 nic_interface_supported[0x3];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008115 u8 reserved_at_fe8[0x18];
Saeed Mahameede2816822015-05-28 22:28:40 +03008116
8117 struct mlx5_ifc_health_buffer_bits health_buffer;
8118
8119 u8 no_dram_nic_offset[0x20];
8120
Matan Barakb4ff3a32016-02-09 14:57:42 +02008121 u8 reserved_at_1220[0x6e40];
Saeed Mahameede2816822015-05-28 22:28:40 +03008122
Matan Barakb4ff3a32016-02-09 14:57:42 +02008123 u8 reserved_at_8060[0x1f];
Saeed Mahameede2816822015-05-28 22:28:40 +03008124 u8 clear_int[0x1];
8125
8126 u8 health_syndrome[0x8];
8127 u8 health_counter[0x18];
8128
Matan Barakb4ff3a32016-02-09 14:57:42 +02008129 u8 reserved_at_80a0[0x17fc0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008130};
8131
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008132struct mlx5_ifc_mtpps_reg_bits {
8133 u8 reserved_at_0[0xc];
8134 u8 cap_number_of_pps_pins[0x4];
8135 u8 reserved_at_10[0x4];
8136 u8 cap_max_num_of_pps_in_pins[0x4];
8137 u8 reserved_at_18[0x4];
8138 u8 cap_max_num_of_pps_out_pins[0x4];
8139
8140 u8 reserved_at_20[0x24];
8141 u8 cap_pin_3_mode[0x4];
8142 u8 reserved_at_48[0x4];
8143 u8 cap_pin_2_mode[0x4];
8144 u8 reserved_at_50[0x4];
8145 u8 cap_pin_1_mode[0x4];
8146 u8 reserved_at_58[0x4];
8147 u8 cap_pin_0_mode[0x4];
8148
8149 u8 reserved_at_60[0x4];
8150 u8 cap_pin_7_mode[0x4];
8151 u8 reserved_at_68[0x4];
8152 u8 cap_pin_6_mode[0x4];
8153 u8 reserved_at_70[0x4];
8154 u8 cap_pin_5_mode[0x4];
8155 u8 reserved_at_78[0x4];
8156 u8 cap_pin_4_mode[0x4];
8157
8158 u8 reserved_at_80[0x80];
8159
8160 u8 enable[0x1];
8161 u8 reserved_at_101[0xb];
8162 u8 pattern[0x4];
8163 u8 reserved_at_110[0x4];
8164 u8 pin_mode[0x4];
8165 u8 pin[0x8];
8166
8167 u8 reserved_at_120[0x20];
8168
8169 u8 time_stamp[0x40];
8170
8171 u8 out_pulse_duration[0x10];
8172 u8 out_periodic_adjustment[0x10];
8173
8174 u8 reserved_at_1a0[0x60];
8175};
8176
8177struct mlx5_ifc_mtppse_reg_bits {
8178 u8 reserved_at_0[0x18];
8179 u8 pin[0x8];
8180 u8 event_arm[0x1];
8181 u8 reserved_at_21[0x1b];
8182 u8 event_generation_mode[0x4];
8183 u8 reserved_at_40[0x40];
8184};
8185
Or Gerlitz47176282017-04-18 13:35:39 +03008186struct mlx5_ifc_mcqi_cap_bits {
8187 u8 supported_info_bitmask[0x20];
8188
8189 u8 component_size[0x20];
8190
8191 u8 max_component_size[0x20];
8192
8193 u8 log_mcda_word_size[0x4];
8194 u8 reserved_at_64[0xc];
8195 u8 mcda_max_write_size[0x10];
8196
8197 u8 rd_en[0x1];
8198 u8 reserved_at_81[0x1];
8199 u8 match_chip_id[0x1];
8200 u8 match_psid[0x1];
8201 u8 check_user_timestamp[0x1];
8202 u8 match_base_guid_mac[0x1];
8203 u8 reserved_at_86[0x1a];
8204};
8205
8206struct mlx5_ifc_mcqi_reg_bits {
8207 u8 read_pending_component[0x1];
8208 u8 reserved_at_1[0xf];
8209 u8 component_index[0x10];
8210
8211 u8 reserved_at_20[0x20];
8212
8213 u8 reserved_at_40[0x1b];
8214 u8 info_type[0x5];
8215
8216 u8 info_size[0x20];
8217
8218 u8 offset[0x20];
8219
8220 u8 reserved_at_a0[0x10];
8221 u8 data_size[0x10];
8222
8223 u8 data[0][0x20];
8224};
8225
8226struct mlx5_ifc_mcc_reg_bits {
8227 u8 reserved_at_0[0x4];
8228 u8 time_elapsed_since_last_cmd[0xc];
8229 u8 reserved_at_10[0x8];
8230 u8 instruction[0x8];
8231
8232 u8 reserved_at_20[0x10];
8233 u8 component_index[0x10];
8234
8235 u8 reserved_at_40[0x8];
8236 u8 update_handle[0x18];
8237
8238 u8 handle_owner_type[0x4];
8239 u8 handle_owner_host_id[0x4];
8240 u8 reserved_at_68[0x1];
8241 u8 control_progress[0x7];
8242 u8 error_code[0x8];
8243 u8 reserved_at_78[0x4];
8244 u8 control_state[0x4];
8245
8246 u8 component_size[0x20];
8247
8248 u8 reserved_at_a0[0x60];
8249};
8250
8251struct mlx5_ifc_mcda_reg_bits {
8252 u8 reserved_at_0[0x8];
8253 u8 update_handle[0x18];
8254
8255 u8 offset[0x20];
8256
8257 u8 reserved_at_40[0x10];
8258 u8 size[0x10];
8259
8260 u8 reserved_at_60[0x20];
8261
8262 u8 data[0][0x20];
8263};
8264
Saeed Mahameede2816822015-05-28 22:28:40 +03008265union mlx5_ifc_ports_control_registers_document_bits {
8266 struct mlx5_ifc_bufferx_reg_bits bufferx_reg;
8267 struct mlx5_ifc_eth_2819_cntrs_grp_data_layout_bits eth_2819_cntrs_grp_data_layout;
8268 struct mlx5_ifc_eth_2863_cntrs_grp_data_layout_bits eth_2863_cntrs_grp_data_layout;
8269 struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits eth_3635_cntrs_grp_data_layout;
8270 struct mlx5_ifc_eth_802_3_cntrs_grp_data_layout_bits eth_802_3_cntrs_grp_data_layout;
8271 struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits eth_extended_cntrs_grp_data_layout;
8272 struct mlx5_ifc_eth_per_prio_grp_data_layout_bits eth_per_prio_grp_data_layout;
8273 struct mlx5_ifc_eth_per_traffic_grp_data_layout_bits eth_per_traffic_grp_data_layout;
8274 struct mlx5_ifc_lane_2_module_mapping_bits lane_2_module_mapping;
8275 struct mlx5_ifc_pamp_reg_bits pamp_reg;
8276 struct mlx5_ifc_paos_reg_bits paos_reg;
8277 struct mlx5_ifc_pcap_reg_bits pcap_reg;
8278 struct mlx5_ifc_peir_reg_bits peir_reg;
8279 struct mlx5_ifc_pelc_reg_bits pelc_reg;
8280 struct mlx5_ifc_pfcc_reg_bits pfcc_reg;
Meny Yossefi1c64bf62016-02-18 18:15:00 +02008281 struct mlx5_ifc_ib_port_cntrs_grp_data_layout_bits ib_port_cntrs_grp_data_layout;
Saeed Mahameede2816822015-05-28 22:28:40 +03008282 struct mlx5_ifc_phys_layer_cntrs_bits phys_layer_cntrs;
8283 struct mlx5_ifc_pifr_reg_bits pifr_reg;
8284 struct mlx5_ifc_pipg_reg_bits pipg_reg;
8285 struct mlx5_ifc_plbf_reg_bits plbf_reg;
8286 struct mlx5_ifc_plib_reg_bits plib_reg;
8287 struct mlx5_ifc_plpc_reg_bits plpc_reg;
8288 struct mlx5_ifc_pmaos_reg_bits pmaos_reg;
8289 struct mlx5_ifc_pmlp_reg_bits pmlp_reg;
8290 struct mlx5_ifc_pmlpn_reg_bits pmlpn_reg;
8291 struct mlx5_ifc_pmpc_reg_bits pmpc_reg;
8292 struct mlx5_ifc_pmpe_reg_bits pmpe_reg;
8293 struct mlx5_ifc_pmpr_reg_bits pmpr_reg;
8294 struct mlx5_ifc_pmtu_reg_bits pmtu_reg;
8295 struct mlx5_ifc_ppad_reg_bits ppad_reg;
8296 struct mlx5_ifc_ppcnt_reg_bits ppcnt_reg;
Gal Pressman8ed1a632016-11-17 13:46:01 +02008297 struct mlx5_ifc_mpcnt_reg_bits mpcnt_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008298 struct mlx5_ifc_pplm_reg_bits pplm_reg;
8299 struct mlx5_ifc_pplr_reg_bits pplr_reg;
8300 struct mlx5_ifc_ppsc_reg_bits ppsc_reg;
8301 struct mlx5_ifc_pqdr_reg_bits pqdr_reg;
8302 struct mlx5_ifc_pspa_reg_bits pspa_reg;
8303 struct mlx5_ifc_ptas_reg_bits ptas_reg;
8304 struct mlx5_ifc_ptys_reg_bits ptys_reg;
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008305 struct mlx5_ifc_mlcr_reg_bits mlcr_reg;
Saeed Mahameede2816822015-05-28 22:28:40 +03008306 struct mlx5_ifc_pude_reg_bits pude_reg;
8307 struct mlx5_ifc_pvlc_reg_bits pvlc_reg;
8308 struct mlx5_ifc_slrg_reg_bits slrg_reg;
8309 struct mlx5_ifc_sltp_reg_bits sltp_reg;
Eugenia Emantayevf9a1ef72016-10-10 16:05:53 +03008310 struct mlx5_ifc_mtpps_reg_bits mtpps_reg;
8311 struct mlx5_ifc_mtppse_reg_bits mtppse_reg;
Ilan Tayaria9956d32017-04-18 13:10:41 +03008312 struct mlx5_ifc_fpga_access_reg_bits fpga_access_reg;
Ilan Tayarie29341f2017-03-13 20:05:45 +02008313 struct mlx5_ifc_fpga_ctrl_bits fpga_ctrl_bits;
8314 struct mlx5_ifc_fpga_cap_bits fpga_cap_bits;
Or Gerlitz47176282017-04-18 13:35:39 +03008315 struct mlx5_ifc_mcqi_reg_bits mcqi_reg;
8316 struct mlx5_ifc_mcc_reg_bits mcc_reg;
8317 struct mlx5_ifc_mcda_reg_bits mcda_reg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008318 u8 reserved_at_0[0x60e0];
Saeed Mahameede2816822015-05-28 22:28:40 +03008319};
8320
8321union mlx5_ifc_debug_enhancements_document_bits {
8322 struct mlx5_ifc_health_buffer_bits health_buffer;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008323 u8 reserved_at_0[0x200];
Saeed Mahameede2816822015-05-28 22:28:40 +03008324};
8325
8326union mlx5_ifc_uplink_pci_interface_document_bits {
8327 struct mlx5_ifc_initial_seg_bits initial_seg;
Matan Barakb4ff3a32016-02-09 14:57:42 +02008328 u8 reserved_at_0[0x20060];
Eli Cohenb7755162014-10-02 12:19:44 +03008329};
8330
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008331struct mlx5_ifc_set_flow_table_root_out_bits {
8332 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008333 u8 reserved_at_8[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008334
8335 u8 syndrome[0x20];
8336
Matan Barakb4ff3a32016-02-09 14:57:42 +02008337 u8 reserved_at_40[0x40];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008338};
8339
8340struct mlx5_ifc_set_flow_table_root_in_bits {
8341 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008342 u8 reserved_at_10[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008343
Matan Barakb4ff3a32016-02-09 14:57:42 +02008344 u8 reserved_at_20[0x10];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008345 u8 op_mod[0x10];
8346
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008347 u8 other_vport[0x1];
8348 u8 reserved_at_41[0xf];
8349 u8 vport_number[0x10];
8350
8351 u8 reserved_at_60[0x20];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008352
8353 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008354 u8 reserved_at_88[0x18];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008355
Matan Barakb4ff3a32016-02-09 14:57:42 +02008356 u8 reserved_at_a0[0x8];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008357 u8 table_id[0x18];
8358
Erez Shitrit500a3d02017-04-13 06:36:51 +03008359 u8 reserved_at_c0[0x8];
8360 u8 underlay_qpn[0x18];
8361 u8 reserved_at_e0[0x120];
Maor Gottlieb2cc43b42016-01-11 10:25:59 +02008362};
8363
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008364enum {
Aviv Heller84df61e2016-05-10 13:47:50 +03008365 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID = (1UL << 0),
8366 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID = (1UL << 15),
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008367};
8368
8369struct mlx5_ifc_modify_flow_table_out_bits {
8370 u8 status[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008371 u8 reserved_at_8[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008372
8373 u8 syndrome[0x20];
8374
Matan Barakb4ff3a32016-02-09 14:57:42 +02008375 u8 reserved_at_40[0x40];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008376};
8377
8378struct mlx5_ifc_modify_flow_table_in_bits {
8379 u8 opcode[0x10];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008380 u8 reserved_at_10[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008381
Matan Barakb4ff3a32016-02-09 14:57:42 +02008382 u8 reserved_at_20[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008383 u8 op_mod[0x10];
8384
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008385 u8 other_vport[0x1];
8386 u8 reserved_at_41[0xf];
8387 u8 vport_number[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008388
Matan Barakb4ff3a32016-02-09 14:57:42 +02008389 u8 reserved_at_60[0x10];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008390 u8 modify_field_select[0x10];
8391
8392 u8 table_type[0x8];
Matan Barakb4ff3a32016-02-09 14:57:42 +02008393 u8 reserved_at_88[0x18];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008394
Matan Barakb4ff3a32016-02-09 14:57:42 +02008395 u8 reserved_at_a0[0x8];
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008396 u8 table_id[0x18];
8397
Maor Gottlieb0c90e9c2017-03-12 11:35:23 +02008398 struct mlx5_ifc_flow_table_context_bits flow_table_context;
Maor Gottlieb34a40e62016-01-11 10:26:00 +02008399};
8400
Saeed Mahameed4f3961e2016-02-22 18:17:25 +02008401struct mlx5_ifc_ets_tcn_config_reg_bits {
8402 u8 g[0x1];
8403 u8 b[0x1];
8404 u8 r[0x1];
8405 u8 reserved_at_3[0x9];
8406 u8 group[0x4];
8407 u8 reserved_at_10[0x9];
8408 u8 bw_allocation[0x7];
8409
8410 u8 reserved_at_20[0xc];
8411 u8 max_bw_units[0x4];
8412 u8 reserved_at_30[0x8];
8413 u8 max_bw_value[0x8];
8414};
8415
8416struct mlx5_ifc_ets_global_config_reg_bits {
8417 u8 reserved_at_0[0x2];
8418 u8 r[0x1];
8419 u8 reserved_at_3[0x1d];
8420
8421 u8 reserved_at_20[0xc];
8422 u8 max_bw_units[0x4];
8423 u8 reserved_at_30[0x8];
8424 u8 max_bw_value[0x8];
8425};
8426
8427struct mlx5_ifc_qetc_reg_bits {
8428 u8 reserved_at_0[0x8];
8429 u8 port_number[0x8];
8430 u8 reserved_at_10[0x30];
8431
8432 struct mlx5_ifc_ets_tcn_config_reg_bits tc_configuration[0x8];
8433 struct mlx5_ifc_ets_global_config_reg_bits global_configuration;
8434};
8435
8436struct mlx5_ifc_qtct_reg_bits {
8437 u8 reserved_at_0[0x8];
8438 u8 port_number[0x8];
8439 u8 reserved_at_10[0xd];
8440 u8 prio[0x3];
8441
8442 u8 reserved_at_20[0x1d];
8443 u8 tclass[0x3];
8444};
8445
Saeed Mahameed7d5e1422016-04-11 23:10:22 +03008446struct mlx5_ifc_mcia_reg_bits {
8447 u8 l[0x1];
8448 u8 reserved_at_1[0x7];
8449 u8 module[0x8];
8450 u8 reserved_at_10[0x8];
8451 u8 status[0x8];
8452
8453 u8 i2c_device_address[0x8];
8454 u8 page_number[0x8];
8455 u8 device_address[0x10];
8456
8457 u8 reserved_at_40[0x10];
8458 u8 size[0x10];
8459
8460 u8 reserved_at_60[0x20];
8461
8462 u8 dword_0[0x20];
8463 u8 dword_1[0x20];
8464 u8 dword_2[0x20];
8465 u8 dword_3[0x20];
8466 u8 dword_4[0x20];
8467 u8 dword_5[0x20];
8468 u8 dword_6[0x20];
8469 u8 dword_7[0x20];
8470 u8 dword_8[0x20];
8471 u8 dword_9[0x20];
8472 u8 dword_10[0x20];
8473 u8 dword_11[0x20];
8474};
8475
Saeed Mahameed74862162016-06-09 15:11:34 +03008476struct mlx5_ifc_dcbx_param_bits {
8477 u8 dcbx_cee_cap[0x1];
8478 u8 dcbx_ieee_cap[0x1];
8479 u8 dcbx_standby_cap[0x1];
8480 u8 reserved_at_0[0x5];
8481 u8 port_number[0x8];
8482 u8 reserved_at_10[0xa];
8483 u8 max_application_table_size[6];
8484 u8 reserved_at_20[0x15];
8485 u8 version_oper[0x3];
8486 u8 reserved_at_38[5];
8487 u8 version_admin[0x3];
8488 u8 willing_admin[0x1];
8489 u8 reserved_at_41[0x3];
8490 u8 pfc_cap_oper[0x4];
8491 u8 reserved_at_48[0x4];
8492 u8 pfc_cap_admin[0x4];
8493 u8 reserved_at_50[0x4];
8494 u8 num_of_tc_oper[0x4];
8495 u8 reserved_at_58[0x4];
8496 u8 num_of_tc_admin[0x4];
8497 u8 remote_willing[0x1];
8498 u8 reserved_at_61[3];
8499 u8 remote_pfc_cap[4];
8500 u8 reserved_at_68[0x14];
8501 u8 remote_num_of_tc[0x4];
8502 u8 reserved_at_80[0x18];
8503 u8 error[0x8];
8504 u8 reserved_at_a0[0x160];
8505};
Aviv Heller84df61e2016-05-10 13:47:50 +03008506
8507struct mlx5_ifc_lagc_bits {
8508 u8 reserved_at_0[0x1d];
8509 u8 lag_state[0x3];
8510
8511 u8 reserved_at_20[0x14];
8512 u8 tx_remap_affinity_2[0x4];
8513 u8 reserved_at_38[0x4];
8514 u8 tx_remap_affinity_1[0x4];
8515};
8516
8517struct mlx5_ifc_create_lag_out_bits {
8518 u8 status[0x8];
8519 u8 reserved_at_8[0x18];
8520
8521 u8 syndrome[0x20];
8522
8523 u8 reserved_at_40[0x40];
8524};
8525
8526struct mlx5_ifc_create_lag_in_bits {
8527 u8 opcode[0x10];
8528 u8 reserved_at_10[0x10];
8529
8530 u8 reserved_at_20[0x10];
8531 u8 op_mod[0x10];
8532
8533 struct mlx5_ifc_lagc_bits ctx;
8534};
8535
8536struct mlx5_ifc_modify_lag_out_bits {
8537 u8 status[0x8];
8538 u8 reserved_at_8[0x18];
8539
8540 u8 syndrome[0x20];
8541
8542 u8 reserved_at_40[0x40];
8543};
8544
8545struct mlx5_ifc_modify_lag_in_bits {
8546 u8 opcode[0x10];
8547 u8 reserved_at_10[0x10];
8548
8549 u8 reserved_at_20[0x10];
8550 u8 op_mod[0x10];
8551
8552 u8 reserved_at_40[0x20];
8553 u8 field_select[0x20];
8554
8555 struct mlx5_ifc_lagc_bits ctx;
8556};
8557
8558struct mlx5_ifc_query_lag_out_bits {
8559 u8 status[0x8];
8560 u8 reserved_at_8[0x18];
8561
8562 u8 syndrome[0x20];
8563
8564 u8 reserved_at_40[0x40];
8565
8566 struct mlx5_ifc_lagc_bits ctx;
8567};
8568
8569struct mlx5_ifc_query_lag_in_bits {
8570 u8 opcode[0x10];
8571 u8 reserved_at_10[0x10];
8572
8573 u8 reserved_at_20[0x10];
8574 u8 op_mod[0x10];
8575
8576 u8 reserved_at_40[0x40];
8577};
8578
8579struct mlx5_ifc_destroy_lag_out_bits {
8580 u8 status[0x8];
8581 u8 reserved_at_8[0x18];
8582
8583 u8 syndrome[0x20];
8584
8585 u8 reserved_at_40[0x40];
8586};
8587
8588struct mlx5_ifc_destroy_lag_in_bits {
8589 u8 opcode[0x10];
8590 u8 reserved_at_10[0x10];
8591
8592 u8 reserved_at_20[0x10];
8593 u8 op_mod[0x10];
8594
8595 u8 reserved_at_40[0x40];
8596};
8597
8598struct mlx5_ifc_create_vport_lag_out_bits {
8599 u8 status[0x8];
8600 u8 reserved_at_8[0x18];
8601
8602 u8 syndrome[0x20];
8603
8604 u8 reserved_at_40[0x40];
8605};
8606
8607struct mlx5_ifc_create_vport_lag_in_bits {
8608 u8 opcode[0x10];
8609 u8 reserved_at_10[0x10];
8610
8611 u8 reserved_at_20[0x10];
8612 u8 op_mod[0x10];
8613
8614 u8 reserved_at_40[0x40];
8615};
8616
8617struct mlx5_ifc_destroy_vport_lag_out_bits {
8618 u8 status[0x8];
8619 u8 reserved_at_8[0x18];
8620
8621 u8 syndrome[0x20];
8622
8623 u8 reserved_at_40[0x40];
8624};
8625
8626struct mlx5_ifc_destroy_vport_lag_in_bits {
8627 u8 opcode[0x10];
8628 u8 reserved_at_10[0x10];
8629
8630 u8 reserved_at_20[0x10];
8631 u8 op_mod[0x10];
8632
8633 u8 reserved_at_40[0x40];
8634};
8635
Eli Cohend29b7962014-10-02 12:19:43 +03008636#endif /* MLX5_IFC_H */