Thomas Gleixner | 50acfb2 | 2019-05-29 07:18:00 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2012 Regents of the University of California |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 4 | * Copyright (C) 2019 Western Digital Corporation or its affiliates. |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <linux/init.h> |
| 8 | #include <linux/mm.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 9 | #include <linux/memblock.h> |
Mike Rapoport | 57c8a66 | 2018-10-30 15:09:49 -0700 | [diff] [blame] | 10 | #include <linux/initrd.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 11 | #include <linux/swap.h> |
Christoph Hellwig | 5ec9c4f | 2018-01-16 09:37:50 +0100 | [diff] [blame] | 12 | #include <linux/sizes.h> |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 13 | #include <linux/of_fdt.h> |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 14 | #include <linux/libfdt.h> |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 15 | #include <linux/set_memory.h> |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 16 | #include <linux/dma-map-ops.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 17 | |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 18 | #include <asm/fixmap.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 19 | #include <asm/tlbflush.h> |
| 20 | #include <asm/sections.h> |
Palmer Dabbelt | 2d26825 | 2020-04-14 13:43:24 +0900 | [diff] [blame] | 21 | #include <asm/soc.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 22 | #include <asm/io.h> |
Zong Li | b422d28 | 2020-06-03 16:03:55 -0700 | [diff] [blame] | 23 | #include <asm/ptdump.h> |
Atish Patra | 4f0e8ee | 2020-11-18 16:38:29 -0800 | [diff] [blame] | 24 | #include <asm/numa.h> |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 25 | |
Paul Walmsley | ffaee27 | 2019-10-17 15:00:17 -0700 | [diff] [blame] | 26 | #include "../kernel/head.h" |
| 27 | |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 28 | unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] |
| 29 | __page_aligned_bss; |
| 30 | EXPORT_SYMBOL(empty_zero_page); |
| 31 | |
Anup Patel | d90d45d | 2019-06-07 06:01:29 +0000 | [diff] [blame] | 32 | extern char _start[]; |
Anup Patel | 8f3a2b4 | 2020-09-17 15:37:10 -0700 | [diff] [blame] | 33 | #define DTB_EARLY_BASE_VA PGDIR_SIZE |
| 34 | void *dtb_early_va __initdata; |
| 35 | uintptr_t dtb_early_pa __initdata; |
Anup Patel | d90d45d | 2019-06-07 06:01:29 +0000 | [diff] [blame] | 36 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 37 | struct pt_alloc_ops { |
| 38 | pte_t *(*get_pte_virt)(phys_addr_t pa); |
| 39 | phys_addr_t (*alloc_pte)(uintptr_t va); |
| 40 | #ifndef __PAGETABLE_PMD_FOLDED |
| 41 | pmd_t *(*get_pmd_virt)(phys_addr_t pa); |
| 42 | phys_addr_t (*alloc_pmd)(uintptr_t va); |
| 43 | #endif |
| 44 | }; |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 45 | |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 46 | static phys_addr_t dma32_phys_limit __ro_after_init; |
| 47 | |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 48 | static void __init zone_sizes_init(void) |
| 49 | { |
Christoph Hellwig | 5ec9c4f | 2018-01-16 09:37:50 +0100 | [diff] [blame] | 50 | unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, }; |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 51 | |
Zong Li | d5fad48 | 2018-06-25 16:49:37 +0800 | [diff] [blame] | 52 | #ifdef CONFIG_ZONE_DMA32 |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 53 | max_zone_pfns[ZONE_DMA32] = PFN_DOWN(dma32_phys_limit); |
Zong Li | d5fad48 | 2018-06-25 16:49:37 +0800 | [diff] [blame] | 54 | #endif |
Christoph Hellwig | 5ec9c4f | 2018-01-16 09:37:50 +0100 | [diff] [blame] | 55 | max_zone_pfns[ZONE_NORMAL] = max_low_pfn; |
| 56 | |
Mike Rapoport | 9691a07 | 2020-06-03 15:57:10 -0700 | [diff] [blame] | 57 | free_area_init(max_zone_pfns); |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 58 | } |
| 59 | |
Christoph Hellwig | 6bd33e1 | 2019-10-28 13:10:41 +0100 | [diff] [blame] | 60 | static void setup_zero_page(void) |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 61 | { |
| 62 | memset((void *)empty_zero_page, 0, PAGE_SIZE); |
| 63 | } |
| 64 | |
Kefeng Wang | 8fa3cdf | 2020-05-14 19:53:35 +0800 | [diff] [blame] | 65 | #if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM) |
Yash Shah | 2cc6c4a | 2019-11-18 05:58:34 +0000 | [diff] [blame] | 66 | static inline void print_mlk(char *name, unsigned long b, unsigned long t) |
| 67 | { |
| 68 | pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t, |
| 69 | (((t) - (b)) >> 10)); |
| 70 | } |
| 71 | |
| 72 | static inline void print_mlm(char *name, unsigned long b, unsigned long t) |
| 73 | { |
| 74 | pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t, |
| 75 | (((t) - (b)) >> 20)); |
| 76 | } |
| 77 | |
| 78 | static void print_vm_layout(void) |
| 79 | { |
| 80 | pr_notice("Virtual kernel memory layout:\n"); |
| 81 | print_mlk("fixmap", (unsigned long)FIXADDR_START, |
| 82 | (unsigned long)FIXADDR_TOP); |
| 83 | print_mlm("pci io", (unsigned long)PCI_IO_START, |
| 84 | (unsigned long)PCI_IO_END); |
| 85 | print_mlm("vmemmap", (unsigned long)VMEMMAP_START, |
| 86 | (unsigned long)VMEMMAP_END); |
| 87 | print_mlm("vmalloc", (unsigned long)VMALLOC_START, |
| 88 | (unsigned long)VMALLOC_END); |
| 89 | print_mlm("lowmem", (unsigned long)PAGE_OFFSET, |
| 90 | (unsigned long)high_memory); |
| 91 | } |
| 92 | #else |
| 93 | static void print_vm_layout(void) { } |
| 94 | #endif /* CONFIG_DEBUG_VM */ |
| 95 | |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 96 | void __init mem_init(void) |
| 97 | { |
| 98 | #ifdef CONFIG_FLATMEM |
| 99 | BUG_ON(!mem_map); |
| 100 | #endif /* CONFIG_FLATMEM */ |
| 101 | |
| 102 | high_memory = (void *)(__va(PFN_PHYS(max_low_pfn))); |
Mike Rapoport | c6ffc5c | 2018-10-30 15:09:30 -0700 | [diff] [blame] | 103 | memblock_free_all(); |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 104 | |
| 105 | mem_init_print_info(NULL); |
Yash Shah | 2cc6c4a | 2019-11-18 05:58:34 +0000 | [diff] [blame] | 106 | print_vm_layout(); |
Palmer Dabbelt | 76d2a04 | 2017-07-10 18:00:26 -0700 | [diff] [blame] | 107 | } |
| 108 | |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 109 | void __init setup_bootmem(void) |
| 110 | { |
Zong Li | ac51e00 | 2020-01-02 11:12:40 +0800 | [diff] [blame] | 111 | phys_addr_t vmlinux_end = __pa_symbol(&_end); |
| 112 | phys_addr_t vmlinux_start = __pa_symbol(&_start); |
Kefeng Wang | dd2d082 | 2021-02-09 09:01:51 +0800 | [diff] [blame] | 113 | phys_addr_t dram_end = memblock_end_of_DRAM(); |
Atish Patra | abb8e86 | 2021-01-11 15:45:02 -0800 | [diff] [blame] | 114 | phys_addr_t max_mapped_addr = __pa(~(ulong)0); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 115 | |
Kefeng Wang | dd2d082 | 2021-02-09 09:01:51 +0800 | [diff] [blame] | 116 | /* The maximal physical memory size is -PAGE_OFFSET. */ |
Atish Patra | de043da | 2020-12-18 16:13:56 -0800 | [diff] [blame] | 117 | memblock_enforce_memory_limit(-PAGE_OFFSET); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 118 | |
Anup Patel | d90d45d | 2019-06-07 06:01:29 +0000 | [diff] [blame] | 119 | /* Reserve from the start of the kernel to the end of the kernel */ |
| 120 | memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start); |
| 121 | |
Atish Patra | abb8e86 | 2021-01-11 15:45:02 -0800 | [diff] [blame] | 122 | /* |
| 123 | * memblock allocator is not aware of the fact that last 4K bytes of |
| 124 | * the addressable memory can not be mapped because of IS_ERR_VALUE |
| 125 | * macro. Make sure that last 4k bytes are not usable by memblock |
| 126 | * if end of dram is equal to maximum addressable memory. |
| 127 | */ |
| 128 | if (max_mapped_addr == (dram_end - 1)) |
| 129 | memblock_set_current_limit(max_mapped_addr - 4096); |
| 130 | |
| 131 | max_pfn = PFN_DOWN(dram_end); |
Vincent Chen | c749bb2 | 2020-04-27 14:59:24 +0800 | [diff] [blame] | 132 | max_low_pfn = max_pfn; |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 133 | dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn)); |
Guo Ren | 336e8eb | 2021-01-21 14:31:17 +0800 | [diff] [blame] | 134 | set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 135 | |
Kefeng Wang | aec33b5 | 2021-01-15 13:46:06 +0800 | [diff] [blame] | 136 | reserve_initrd_mem(); |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 137 | /* |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 138 | * If DTB is built in, no need to reserve its memblock. |
| 139 | * Otherwise, do reserve it but avoid using |
| 140 | * early_init_fdt_reserve_self() since __pa() does |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 141 | * not work for DTB pointers that are fixmap addresses |
| 142 | */ |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 143 | if (!IS_ENABLED(CONFIG_BUILTIN_DTB)) |
| 144 | memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va)); |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 145 | |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 146 | early_init_fdt_scan_reserved_mem(); |
Kefeng Wang | da81558 | 2020-10-31 14:01:12 +0800 | [diff] [blame] | 147 | dma_contiguous_reserve(dma32_phys_limit); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 148 | memblock_allow_resize(); |
Anup Patel | 0651c26 | 2019-02-21 11:25:49 +0530 | [diff] [blame] | 149 | } |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 150 | |
Christoph Hellwig | 6bd33e1 | 2019-10-28 13:10:41 +0100 | [diff] [blame] | 151 | #ifdef CONFIG_MMU |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 152 | static struct pt_alloc_ops pt_ops; |
| 153 | |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 154 | unsigned long va_pa_offset; |
| 155 | EXPORT_SYMBOL(va_pa_offset); |
| 156 | unsigned long pfn_base; |
| 157 | EXPORT_SYMBOL(pfn_base); |
| 158 | |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 159 | pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 160 | pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss; |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 161 | pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 162 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 163 | pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE); |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 164 | |
| 165 | void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot) |
| 166 | { |
| 167 | unsigned long addr = __fix_to_virt(idx); |
| 168 | pte_t *ptep; |
| 169 | |
| 170 | BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses); |
| 171 | |
| 172 | ptep = &fixmap_pte[pte_index(addr)]; |
| 173 | |
Greentime Hu | 21190b7 | 2020-08-04 11:02:05 +0800 | [diff] [blame] | 174 | if (pgprot_val(prot)) |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 175 | set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot)); |
Greentime Hu | 21190b7 | 2020-08-04 11:02:05 +0800 | [diff] [blame] | 176 | else |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 177 | pte_clear(&init_mm, addr, ptep); |
Greentime Hu | 21190b7 | 2020-08-04 11:02:05 +0800 | [diff] [blame] | 178 | local_flush_tlb_page(addr); |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 179 | } |
| 180 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 181 | static inline pte_t *__init get_pte_virt_early(phys_addr_t pa) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 182 | { |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 183 | return (pte_t *)((uintptr_t)pa); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 184 | } |
| 185 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 186 | static inline pte_t *__init get_pte_virt_fixmap(phys_addr_t pa) |
| 187 | { |
| 188 | clear_fixmap(FIX_PTE); |
| 189 | return (pte_t *)set_fixmap_offset(FIX_PTE, pa); |
| 190 | } |
| 191 | |
| 192 | static inline pte_t *get_pte_virt_late(phys_addr_t pa) |
| 193 | { |
| 194 | return (pte_t *) __va(pa); |
| 195 | } |
| 196 | |
| 197 | static inline phys_addr_t __init alloc_pte_early(uintptr_t va) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 198 | { |
| 199 | /* |
| 200 | * We only create PMD or PGD early mappings so we |
| 201 | * should never reach here with MMU disabled. |
| 202 | */ |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 203 | BUG(); |
| 204 | } |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 205 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 206 | static inline phys_addr_t __init alloc_pte_fixmap(uintptr_t va) |
| 207 | { |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 208 | return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); |
| 209 | } |
| 210 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 211 | static phys_addr_t alloc_pte_late(uintptr_t va) |
| 212 | { |
| 213 | unsigned long vaddr; |
| 214 | |
| 215 | vaddr = __get_free_page(GFP_KERNEL); |
| 216 | if (!vaddr || !pgtable_pte_page_ctor(virt_to_page(vaddr))) |
| 217 | BUG(); |
| 218 | return __pa(vaddr); |
| 219 | } |
| 220 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 221 | static void __init create_pte_mapping(pte_t *ptep, |
| 222 | uintptr_t va, phys_addr_t pa, |
| 223 | phys_addr_t sz, pgprot_t prot) |
| 224 | { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 225 | uintptr_t pte_idx = pte_index(va); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 226 | |
| 227 | BUG_ON(sz != PAGE_SIZE); |
| 228 | |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 229 | if (pte_none(ptep[pte_idx])) |
| 230 | ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 231 | } |
| 232 | |
| 233 | #ifndef __PAGETABLE_PMD_FOLDED |
| 234 | |
| 235 | pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss; |
| 236 | pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss; |
Alexandre Ghiti | 0f02de4 | 2021-02-21 09:22:33 -0500 | [diff] [blame] | 237 | pmd_t early_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE); |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 238 | pmd_t early_dtb_pmd[PTRS_PER_PMD] __initdata __aligned(PAGE_SIZE); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 239 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 240 | static pmd_t *__init get_pmd_virt_early(phys_addr_t pa) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 241 | { |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 242 | /* Before MMU is enabled */ |
| 243 | return (pmd_t *)((uintptr_t)pa); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 244 | } |
| 245 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 246 | static pmd_t *__init get_pmd_virt_fixmap(phys_addr_t pa) |
| 247 | { |
| 248 | clear_fixmap(FIX_PMD); |
| 249 | return (pmd_t *)set_fixmap_offset(FIX_PMD, pa); |
| 250 | } |
| 251 | |
| 252 | static pmd_t *get_pmd_virt_late(phys_addr_t pa) |
| 253 | { |
| 254 | return (pmd_t *) __va(pa); |
| 255 | } |
| 256 | |
| 257 | static phys_addr_t __init alloc_pmd_early(uintptr_t va) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 258 | { |
Alexandre Ghiti | 0f02de4 | 2021-02-21 09:22:33 -0500 | [diff] [blame] | 259 | BUG_ON((va - PAGE_OFFSET) >> PGDIR_SHIFT); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 260 | |
Alexandre Ghiti | 0f02de4 | 2021-02-21 09:22:33 -0500 | [diff] [blame] | 261 | return (uintptr_t)early_pmd; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 262 | } |
| 263 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 264 | static phys_addr_t __init alloc_pmd_fixmap(uintptr_t va) |
| 265 | { |
| 266 | return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE); |
| 267 | } |
| 268 | |
| 269 | static phys_addr_t alloc_pmd_late(uintptr_t va) |
| 270 | { |
| 271 | unsigned long vaddr; |
| 272 | |
| 273 | vaddr = __get_free_page(GFP_KERNEL); |
| 274 | BUG_ON(!vaddr); |
| 275 | return __pa(vaddr); |
| 276 | } |
| 277 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 278 | static void __init create_pmd_mapping(pmd_t *pmdp, |
| 279 | uintptr_t va, phys_addr_t pa, |
| 280 | phys_addr_t sz, pgprot_t prot) |
| 281 | { |
| 282 | pte_t *ptep; |
| 283 | phys_addr_t pte_phys; |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 284 | uintptr_t pmd_idx = pmd_index(va); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 285 | |
| 286 | if (sz == PMD_SIZE) { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 287 | if (pmd_none(pmdp[pmd_idx])) |
| 288 | pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 289 | return; |
| 290 | } |
| 291 | |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 292 | if (pmd_none(pmdp[pmd_idx])) { |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 293 | pte_phys = pt_ops.alloc_pte(va); |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 294 | pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE); |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 295 | ptep = pt_ops.get_pte_virt(pte_phys); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 296 | memset(ptep, 0, PAGE_SIZE); |
| 297 | } else { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 298 | pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx])); |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 299 | ptep = pt_ops.get_pte_virt(pte_phys); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 300 | } |
| 301 | |
| 302 | create_pte_mapping(ptep, va, pa, sz, prot); |
| 303 | } |
| 304 | |
| 305 | #define pgd_next_t pmd_t |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 306 | #define alloc_pgd_next(__va) pt_ops.alloc_pmd(__va) |
| 307 | #define get_pgd_next_virt(__pa) pt_ops.get_pmd_virt(__pa) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 308 | #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \ |
| 309 | create_pmd_mapping(__nextp, __va, __pa, __sz, __prot) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 310 | #define fixmap_pgd_next fixmap_pmd |
| 311 | #else |
| 312 | #define pgd_next_t pte_t |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 313 | #define alloc_pgd_next(__va) pt_ops.alloc_pte(__va) |
| 314 | #define get_pgd_next_virt(__pa) pt_ops.get_pte_virt(__pa) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 315 | #define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \ |
| 316 | create_pte_mapping(__nextp, __va, __pa, __sz, __prot) |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 317 | #define fixmap_pgd_next fixmap_pte |
| 318 | #endif |
| 319 | |
Atish Patra | b91540d | 2020-09-17 15:37:15 -0700 | [diff] [blame] | 320 | void __init create_pgd_mapping(pgd_t *pgdp, |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 321 | uintptr_t va, phys_addr_t pa, |
| 322 | phys_addr_t sz, pgprot_t prot) |
| 323 | { |
| 324 | pgd_next_t *nextp; |
| 325 | phys_addr_t next_phys; |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 326 | uintptr_t pgd_idx = pgd_index(va); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 327 | |
| 328 | if (sz == PGDIR_SIZE) { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 329 | if (pgd_val(pgdp[pgd_idx]) == 0) |
| 330 | pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 331 | return; |
| 332 | } |
| 333 | |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 334 | if (pgd_val(pgdp[pgd_idx]) == 0) { |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 335 | next_phys = alloc_pgd_next(va); |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 336 | pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 337 | nextp = get_pgd_next_virt(next_phys); |
| 338 | memset(nextp, 0, PAGE_SIZE); |
| 339 | } else { |
Mike Rapoport | 974b9b2 | 2020-06-08 21:33:10 -0700 | [diff] [blame] | 340 | next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx])); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 341 | nextp = get_pgd_next_virt(next_phys); |
| 342 | } |
| 343 | |
| 344 | create_pgd_next_mapping(nextp, va, pa, sz, prot); |
| 345 | } |
| 346 | |
| 347 | static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size) |
| 348 | { |
Zong Li | 0fdc636 | 2019-11-08 01:00:40 -0800 | [diff] [blame] | 349 | /* Upgrade to PMD_SIZE mappings whenever possible */ |
| 350 | if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1))) |
| 351 | return PAGE_SIZE; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 352 | |
Zong Li | 0fdc636 | 2019-11-08 01:00:40 -0800 | [diff] [blame] | 353 | return PMD_SIZE; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 354 | } |
| 355 | |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 356 | /* |
| 357 | * setup_vm() is called from head.S with MMU-off. |
| 358 | * |
| 359 | * Following requirements should be honoured for setup_vm() to work |
| 360 | * correctly: |
| 361 | * 1) It should use PC-relative addressing for accessing kernel symbols. |
| 362 | * To achieve this we always use GCC cmodel=medany. |
| 363 | * 2) The compiler instrumentation for FTRACE will not work for setup_vm() |
| 364 | * so disable compiler instrumentation when FTRACE is enabled. |
| 365 | * |
| 366 | * Currently, the above requirements are honoured by using custom CFLAGS |
| 367 | * for init.o in mm/Makefile. |
| 368 | */ |
| 369 | |
| 370 | #ifndef __riscv_cmodel_medany |
Paul Walmsley | 6a527b6 | 2019-10-17 14:45:58 -0700 | [diff] [blame] | 371 | #error "setup_vm() is called from head.S before relocate so it should not use absolute addressing." |
Anup Patel | 387181d | 2019-03-26 08:03:47 +0000 | [diff] [blame] | 372 | #endif |
| 373 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 374 | asmlinkage void __init setup_vm(uintptr_t dtb_pa) |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 375 | { |
Anup Patel | 8f3a2b4 | 2020-09-17 15:37:10 -0700 | [diff] [blame] | 376 | uintptr_t va, pa, end_va; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 377 | uintptr_t load_pa = (uintptr_t)(&_start); |
| 378 | uintptr_t load_sz = (uintptr_t)(&_end) - load_pa; |
Alexandre Ghiti | 0f02de4 | 2021-02-21 09:22:33 -0500 | [diff] [blame] | 379 | uintptr_t map_size; |
Atish Patra | 6262f66 | 2020-09-17 15:37:11 -0700 | [diff] [blame] | 380 | #ifndef __PAGETABLE_PMD_FOLDED |
| 381 | pmd_t fix_bmap_spmd, fix_bmap_epmd; |
| 382 | #endif |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 383 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 384 | va_pa_offset = PAGE_OFFSET - load_pa; |
| 385 | pfn_base = PFN_DOWN(load_pa); |
| 386 | |
| 387 | /* |
| 388 | * Enforce boot alignment requirements of RV32 and |
| 389 | * RV64 by only allowing PMD or PGD mappings. |
| 390 | */ |
Alexandre Ghiti | 0f02de4 | 2021-02-21 09:22:33 -0500 | [diff] [blame] | 391 | map_size = PMD_SIZE; |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 392 | |
| 393 | /* Sanity check alignment and size */ |
| 394 | BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 395 | BUG_ON((load_pa % map_size) != 0); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 396 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 397 | pt_ops.alloc_pte = alloc_pte_early; |
| 398 | pt_ops.get_pte_virt = get_pte_virt_early; |
| 399 | #ifndef __PAGETABLE_PMD_FOLDED |
| 400 | pt_ops.alloc_pmd = alloc_pmd_early; |
| 401 | pt_ops.get_pmd_virt = get_pmd_virt_early; |
| 402 | #endif |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 403 | /* Setup early PGD for fixmap */ |
| 404 | create_pgd_mapping(early_pg_dir, FIXADDR_START, |
| 405 | (uintptr_t)fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE); |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 406 | |
| 407 | #ifndef __PAGETABLE_PMD_FOLDED |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 408 | /* Setup fixmap PMD */ |
| 409 | create_pmd_mapping(fixmap_pmd, FIXADDR_START, |
| 410 | (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE); |
| 411 | /* Setup trampoline PGD and PMD */ |
| 412 | create_pgd_mapping(trampoline_pg_dir, PAGE_OFFSET, |
| 413 | (uintptr_t)trampoline_pmd, PGDIR_SIZE, PAGE_TABLE); |
| 414 | create_pmd_mapping(trampoline_pmd, PAGE_OFFSET, |
| 415 | load_pa, PMD_SIZE, PAGE_KERNEL_EXEC); |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 416 | #else |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 417 | /* Setup trampoline PGD */ |
| 418 | create_pgd_mapping(trampoline_pg_dir, PAGE_OFFSET, |
| 419 | load_pa, PGDIR_SIZE, PAGE_KERNEL_EXEC); |
| 420 | #endif |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 421 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 422 | /* |
| 423 | * Setup early PGD covering entire kernel which will allows |
| 424 | * us to reach paging_init(). We map all memory banks later |
| 425 | * in setup_vm_final() below. |
| 426 | */ |
| 427 | end_va = PAGE_OFFSET + load_sz; |
| 428 | for (va = PAGE_OFFSET; va < end_va; va += map_size) |
| 429 | create_pgd_mapping(early_pg_dir, va, |
| 430 | load_pa + (va - PAGE_OFFSET), |
| 431 | map_size, PAGE_KERNEL_EXEC); |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 432 | |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 433 | #ifndef __PAGETABLE_PMD_FOLDED |
| 434 | /* Setup early PMD for DTB */ |
| 435 | create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA, |
| 436 | (uintptr_t)early_dtb_pmd, PGDIR_SIZE, PAGE_TABLE); |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 437 | #ifndef CONFIG_BUILTIN_DTB |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 438 | /* Create two consecutive PMD mappings for FDT early scan */ |
| 439 | pa = dtb_pa & ~(PMD_SIZE - 1); |
| 440 | create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA, |
| 441 | pa, PMD_SIZE, PAGE_KERNEL); |
| 442 | create_pmd_mapping(early_dtb_pmd, DTB_EARLY_BASE_VA + PMD_SIZE, |
| 443 | pa + PMD_SIZE, PMD_SIZE, PAGE_KERNEL); |
| 444 | dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PMD_SIZE - 1)); |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 445 | #else /* CONFIG_BUILTIN_DTB */ |
| 446 | dtb_early_va = __va(dtb_pa); |
| 447 | #endif /* CONFIG_BUILTIN_DTB */ |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 448 | #else |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 449 | #ifndef CONFIG_BUILTIN_DTB |
Anup Patel | 8f3a2b4 | 2020-09-17 15:37:10 -0700 | [diff] [blame] | 450 | /* Create two consecutive PGD mappings for FDT early scan */ |
| 451 | pa = dtb_pa & ~(PGDIR_SIZE - 1); |
| 452 | create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA, |
| 453 | pa, PGDIR_SIZE, PAGE_KERNEL); |
| 454 | create_pgd_mapping(early_pg_dir, DTB_EARLY_BASE_VA + PGDIR_SIZE, |
| 455 | pa + PGDIR_SIZE, PGDIR_SIZE, PAGE_KERNEL); |
| 456 | dtb_early_va = (void *)DTB_EARLY_BASE_VA + (dtb_pa & (PGDIR_SIZE - 1)); |
Vitaly Wool | f105aa9 | 2021-01-16 01:49:48 +0200 | [diff] [blame] | 457 | #else /* CONFIG_BUILTIN_DTB */ |
| 458 | dtb_early_va = __va(dtb_pa); |
| 459 | #endif /* CONFIG_BUILTIN_DTB */ |
Anup Patel | 1074dd4 | 2020-11-04 12:07:13 +0530 | [diff] [blame] | 460 | #endif |
Albert Ou | 922b037 | 2019-09-27 16:14:18 -0700 | [diff] [blame] | 461 | dtb_early_pa = dtb_pa; |
Atish Patra | 6262f66 | 2020-09-17 15:37:11 -0700 | [diff] [blame] | 462 | |
| 463 | /* |
| 464 | * Bootime fixmap only can handle PMD_SIZE mapping. Thus, boot-ioremap |
| 465 | * range can not span multiple pmds. |
| 466 | */ |
| 467 | BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT) |
| 468 | != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT)); |
| 469 | |
| 470 | #ifndef __PAGETABLE_PMD_FOLDED |
| 471 | /* |
| 472 | * Early ioremap fixmap is already created as it lies within first 2MB |
| 473 | * of fixmap region. We always map PMD_SIZE. Thus, both FIX_BTMAP_END |
| 474 | * FIX_BTMAP_BEGIN should lie in the same pmd. Verify that and warn |
| 475 | * the user if not. |
| 476 | */ |
| 477 | fix_bmap_spmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_BEGIN))]; |
| 478 | fix_bmap_epmd = fixmap_pmd[pmd_index(__fix_to_virt(FIX_BTMAP_END))]; |
| 479 | if (pmd_val(fix_bmap_spmd) != pmd_val(fix_bmap_epmd)) { |
| 480 | WARN_ON(1); |
| 481 | pr_warn("fixmap btmap start [%08lx] != end [%08lx]\n", |
| 482 | pmd_val(fix_bmap_spmd), pmd_val(fix_bmap_epmd)); |
| 483 | pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n", |
| 484 | fix_to_virt(FIX_BTMAP_BEGIN)); |
| 485 | pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n", |
| 486 | fix_to_virt(FIX_BTMAP_END)); |
| 487 | |
| 488 | pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END); |
| 489 | pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN); |
| 490 | } |
| 491 | #endif |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 492 | } |
| 493 | |
| 494 | static void __init setup_vm_final(void) |
| 495 | { |
| 496 | uintptr_t va, map_size; |
| 497 | phys_addr_t pa, start, end; |
Mike Rapoport | b10d6bc | 2020-10-13 16:58:08 -0700 | [diff] [blame] | 498 | u64 i; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 499 | |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 500 | /** |
| 501 | * MMU is enabled at this point. But page table setup is not complete yet. |
| 502 | * fixmap page table alloc functions should be used at this point |
| 503 | */ |
| 504 | pt_ops.alloc_pte = alloc_pte_fixmap; |
| 505 | pt_ops.get_pte_virt = get_pte_virt_fixmap; |
| 506 | #ifndef __PAGETABLE_PMD_FOLDED |
| 507 | pt_ops.alloc_pmd = alloc_pmd_fixmap; |
| 508 | pt_ops.get_pmd_virt = get_pmd_virt_fixmap; |
| 509 | #endif |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 510 | /* Setup swapper PGD for fixmap */ |
| 511 | create_pgd_mapping(swapper_pg_dir, FIXADDR_START, |
Zong Li | ac51e00 | 2020-01-02 11:12:40 +0800 | [diff] [blame] | 512 | __pa_symbol(fixmap_pgd_next), |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 513 | PGDIR_SIZE, PAGE_TABLE); |
| 514 | |
| 515 | /* Map all memory banks */ |
Mike Rapoport | b10d6bc | 2020-10-13 16:58:08 -0700 | [diff] [blame] | 516 | for_each_mem_range(i, &start, &end) { |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 517 | if (start >= end) |
| 518 | break; |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 519 | if (start <= __pa(PAGE_OFFSET) && |
| 520 | __pa(PAGE_OFFSET) < end) |
| 521 | start = __pa(PAGE_OFFSET); |
| 522 | |
| 523 | map_size = best_map_size(start, end - start); |
| 524 | for (pa = start; pa < end; pa += map_size) { |
| 525 | va = (uintptr_t)__va(pa); |
| 526 | create_pgd_mapping(swapper_pg_dir, va, pa, |
| 527 | map_size, PAGE_KERNEL_EXEC); |
| 528 | } |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 529 | } |
Anup Patel | f2c17aa | 2019-01-07 20:57:01 +0530 | [diff] [blame] | 530 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 531 | /* Clear fixmap PTE and PMD mappings */ |
| 532 | clear_fixmap(FIX_PTE); |
| 533 | clear_fixmap(FIX_PMD); |
| 534 | |
| 535 | /* Move to swapper page table */ |
Zong Li | ac51e00 | 2020-01-02 11:12:40 +0800 | [diff] [blame] | 536 | csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | SATP_MODE); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 537 | local_flush_tlb_all(); |
Atish Patra | e8dcb61 | 2020-09-17 15:37:12 -0700 | [diff] [blame] | 538 | |
| 539 | /* generic page allocation functions must be used to setup page table */ |
| 540 | pt_ops.alloc_pte = alloc_pte_late; |
| 541 | pt_ops.get_pte_virt = get_pte_virt_late; |
| 542 | #ifndef __PAGETABLE_PMD_FOLDED |
| 543 | pt_ops.alloc_pmd = alloc_pmd_late; |
| 544 | pt_ops.get_pmd_virt = get_pmd_virt_late; |
| 545 | #endif |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 546 | } |
Christoph Hellwig | 6bd33e1 | 2019-10-28 13:10:41 +0100 | [diff] [blame] | 547 | #else |
| 548 | asmlinkage void __init setup_vm(uintptr_t dtb_pa) |
| 549 | { |
| 550 | dtb_early_va = (void *)dtb_pa; |
Atish Patra | a78c6f5 | 2020-10-01 12:04:56 -0700 | [diff] [blame] | 551 | dtb_early_pa = dtb_pa; |
Christoph Hellwig | 6bd33e1 | 2019-10-28 13:10:41 +0100 | [diff] [blame] | 552 | } |
| 553 | |
| 554 | static inline void setup_vm_final(void) |
| 555 | { |
| 556 | } |
| 557 | #endif /* CONFIG_MMU */ |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 558 | |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 559 | #ifdef CONFIG_STRICT_KERNEL_RWX |
Atish Patra | 19a0086 | 2020-11-04 16:04:38 -0800 | [diff] [blame] | 560 | void protect_kernel_text_data(void) |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 561 | { |
Atish Patra | 19a0086 | 2020-11-04 16:04:38 -0800 | [diff] [blame] | 562 | unsigned long text_start = (unsigned long)_start; |
| 563 | unsigned long init_text_start = (unsigned long)__init_text_begin; |
| 564 | unsigned long init_data_start = (unsigned long)__init_data_begin; |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 565 | unsigned long rodata_start = (unsigned long)__start_rodata; |
| 566 | unsigned long data_start = (unsigned long)_data; |
| 567 | unsigned long max_low = (unsigned long)(__va(PFN_PHYS(max_low_pfn))); |
| 568 | |
Atish Patra | 19a0086 | 2020-11-04 16:04:38 -0800 | [diff] [blame] | 569 | set_memory_ro(text_start, (init_text_start - text_start) >> PAGE_SHIFT); |
| 570 | set_memory_ro(init_text_start, (init_data_start - init_text_start) >> PAGE_SHIFT); |
| 571 | set_memory_nx(init_data_start, (rodata_start - init_data_start) >> PAGE_SHIFT); |
| 572 | /* rodata section is marked readonly in mark_rodata_ro */ |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 573 | set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT); |
| 574 | set_memory_nx(data_start, (max_low - data_start) >> PAGE_SHIFT); |
Atish Patra | 19a0086 | 2020-11-04 16:04:38 -0800 | [diff] [blame] | 575 | } |
| 576 | |
| 577 | void mark_rodata_ro(void) |
| 578 | { |
| 579 | unsigned long rodata_start = (unsigned long)__start_rodata; |
| 580 | unsigned long data_start = (unsigned long)_data; |
| 581 | |
| 582 | set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT); |
Zong Li | b422d28 | 2020-06-03 16:03:55 -0700 | [diff] [blame] | 583 | |
| 584 | debug_checkwx(); |
Zong Li | d27c3c9 | 2020-03-10 00:55:41 +0800 | [diff] [blame] | 585 | } |
| 586 | #endif |
| 587 | |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 588 | void __init paging_init(void) |
| 589 | { |
| 590 | setup_vm_final(); |
| 591 | setup_zero_page(); |
Atish Patra | cbd34f4 | 2020-11-18 16:38:27 -0800 | [diff] [blame] | 592 | } |
| 593 | |
| 594 | void __init misc_mem_init(void) |
| 595 | { |
Atish Patra | 4f0e8ee | 2020-11-18 16:38:29 -0800 | [diff] [blame] | 596 | arch_numa_init(); |
Atish Patra | cbd34f4 | 2020-11-18 16:38:27 -0800 | [diff] [blame] | 597 | sparse_init(); |
Anup Patel | 671f9a3 | 2019-06-28 13:36:21 -0700 | [diff] [blame] | 598 | zone_sizes_init(); |
Atish Patra | 4f0e8ee | 2020-11-18 16:38:29 -0800 | [diff] [blame] | 599 | memblock_dump_all(); |
Anup Patel | 6f1e9e9 | 2019-02-13 16:38:36 +0530 | [diff] [blame] | 600 | } |
Logan Gunthorpe | d95f1a5 | 2019-08-28 15:40:54 -0600 | [diff] [blame] | 601 | |
Kefeng Wang | 9fe57d8 | 2019-10-23 11:23:02 +0800 | [diff] [blame] | 602 | #ifdef CONFIG_SPARSEMEM_VMEMMAP |
Logan Gunthorpe | d95f1a5 | 2019-08-28 15:40:54 -0600 | [diff] [blame] | 603 | int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, |
| 604 | struct vmem_altmap *altmap) |
| 605 | { |
Anshuman Khandual | 1d9cfee | 2020-08-06 23:23:19 -0700 | [diff] [blame] | 606 | return vmemmap_populate_basepages(start, end, node, NULL); |
Logan Gunthorpe | d95f1a5 | 2019-08-28 15:40:54 -0600 | [diff] [blame] | 607 | } |
| 608 | #endif |