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Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301/*
Vinayak Holikattie0eca632013-02-25 21:44:33 +05302 * Universal Flash Storage Host controller driver Core
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303 *
4 * This code is based on drivers/scsi/ufs/ufshcd.c
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05305 * Copyright (C) 2011-2013 Samsung India Software Operations
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02006 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308 * Authors:
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053011 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053016 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053018 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +053024 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
34 * this program.
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +030035 *
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053038 */
39
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053040#include <linux/async.h>
Sahitya Tummala856b3482014-09-25 15:32:34 +030041#include <linux/devfreq.h>
Yaniv Gardib573d482016-03-10 17:37:09 +020042#include <linux/nls.h>
Yaniv Gardi54b879b2016-03-10 17:37:05 +020043#include <linux/of.h>
Adrian Hunterad448372018-03-20 15:07:38 +020044#include <linux/bitfield.h>
Can Guofb276f72020-03-25 18:09:59 -070045#include <linux/blk-pm.h>
Vinayak Holikattie0eca632013-02-25 21:44:33 +053046#include "ufshcd.h"
Yaniv Gardic58ab7a2016-03-10 17:37:10 +020047#include "ufs_quirks.h"
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +053048#include "unipro.h"
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +020049#include "ufs-sysfs.h"
Avri Altmandf032bf2018-10-07 17:30:35 +030050#include "ufs_bsg.h"
Asutosh Das3d17b9b2020-04-22 14:41:42 -070051#include <asm/unaligned.h>
52#include <linux/blkdev.h>
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +053053
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -080054#define CREATE_TRACE_POINTS
55#include <trace/events/ufs.h>
56
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053057#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
58 UTP_TASK_REQ_COMPL |\
59 UFSHCD_ERROR_MASK)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +053060/* UIC command timeout, unit: ms */
61#define UIC_CMD_TIMEOUT 500
Seungwon Jeon2fbd0092013-06-26 22:39:27 +053062
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +053063/* NOP OUT retries waiting for NOP IN response */
64#define NOP_OUT_RETRIES 10
65/* Timeout after 30 msecs if NOP OUT hangs without response */
66#define NOP_OUT_TIMEOUT 30 /* msecs */
67
Dolev Raviv68078d52013-07-30 00:35:58 +053068/* Query request retries */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080069#define QUERY_REQ_RETRIES 3
Dolev Raviv68078d52013-07-30 00:35:58 +053070/* Query request timeout */
subhashj@codeaurora.org10fe5882016-11-23 16:31:52 -080071#define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
Dolev Raviv68078d52013-07-30 00:35:58 +053072
Sujit Reddy Thummae2933132014-05-26 10:59:12 +053073/* Task management command timeout */
74#define TM_CMD_TIMEOUT 100 /* msecs */
75
Yaniv Gardi64238fb2016-02-01 15:02:43 +020076/* maximum number of retries for a general UIC command */
77#define UFS_UIC_COMMAND_RETRIES 3
78
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030079/* maximum number of link-startup retries */
80#define DME_LINKSTARTUP_RETRIES 3
81
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +020082/* Maximum retries for Hibern8 enter */
83#define UIC_HIBERN8_ENTER_RETRIES 3
84
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +030085/* maximum number of reset retries before giving up */
86#define MAX_HOST_RESET_RETRIES 5
87
Dolev Raviv68078d52013-07-30 00:35:58 +053088/* Expose the flag value from utp_upiu_query.value */
89#define MASK_QUERY_UPIU_FLAG_LOC 0xFF
90
Seungwon Jeon7d568652013-08-31 21:40:20 +053091/* Interrupt aggregation default timeout, unit: 40us */
92#define INT_AGGR_DEF_TO 0x02
93
Stanley Chu49615ba2019-09-16 23:56:50 +080094/* default delay of autosuspend: 2000 ms */
95#define RPM_AUTOSUSPEND_DELAY_MS 2000
96
Can Guo09f17792020-02-10 19:40:49 -080097/* Default value of wait time before gating device ref clock */
98#define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */
99
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +0300100#define ufshcd_toggle_vreg(_dev, _vreg, _on) \
101 ({ \
102 int _ret; \
103 if (_on) \
104 _ret = ufshcd_enable_vreg(_dev, _vreg); \
105 else \
106 _ret = ufshcd_disable_vreg(_dev, _vreg); \
107 _ret; \
108 })
109
Tomas Winklerba809172018-06-14 11:14:09 +0300110#define ufshcd_hex_dump(prefix_str, buf, len) do { \
111 size_t __len = (len); \
112 print_hex_dump(KERN_ERR, prefix_str, \
113 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
114 16, 4, buf, __len, false); \
115} while (0)
116
117int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
118 const char *prefix)
119{
Marc Gonzalezd6724752019-01-22 18:29:22 +0100120 u32 *regs;
121 size_t pos;
122
123 if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
124 return -EINVAL;
Tomas Winklerba809172018-06-14 11:14:09 +0300125
Can Guocddaeba2019-11-14 22:09:27 -0800126 regs = kzalloc(len, GFP_ATOMIC);
Tomas Winklerba809172018-06-14 11:14:09 +0300127 if (!regs)
128 return -ENOMEM;
129
Marc Gonzalezd6724752019-01-22 18:29:22 +0100130 for (pos = 0; pos < len; pos += 4)
131 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
132
Tomas Winklerba809172018-06-14 11:14:09 +0300133 ufshcd_hex_dump(prefix, regs, len);
134 kfree(regs);
135
136 return 0;
137}
138EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800139
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530140enum {
141 UFSHCD_MAX_CHANNEL = 0,
142 UFSHCD_MAX_ID = 1,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530143 UFSHCD_CMD_PER_LUN = 32,
144 UFSHCD_CAN_QUEUE = 32,
145};
146
147/* UFSHCD states */
148enum {
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530149 UFSHCD_STATE_RESET,
150 UFSHCD_STATE_ERROR,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530151 UFSHCD_STATE_OPERATIONAL,
Zang Leigang141f8162016-11-16 11:29:37 +0800152 UFSHCD_STATE_EH_SCHEDULED,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530153};
154
155/* UFSHCD error handling flags */
156enum {
157 UFSHCD_EH_IN_PROGRESS = (1 << 0),
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530158};
159
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530160/* UFSHCD UIC layer error flags */
161enum {
162 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +0200163 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
164 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
165 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
166 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
167 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530168};
169
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530170#define ufshcd_set_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300171 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530172#define ufshcd_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300173 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530174#define ufshcd_clear_eh_in_progress(h) \
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +0300175 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530176
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +0200177struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300178 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
179 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
180 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
181 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
182 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
183 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
184};
185
186static inline enum ufs_dev_pwr_mode
187ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
188{
189 return ufs_pm_lvl_states[lvl].dev_state;
190}
191
192static inline enum uic_link_state
193ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
194{
195 return ufs_pm_lvl_states[lvl].link_state;
196}
197
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -0800198static inline enum ufs_pm_level
199ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
200 enum uic_link_state link_state)
201{
202 enum ufs_pm_level lvl;
203
204 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
205 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
206 (ufs_pm_lvl_states[lvl].link_state == link_state))
207 return lvl;
208 }
209
210 /* if no match found, return the level 0 */
211 return UFS_PM_LVL_0;
212}
213
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800214static struct ufs_dev_fix ufs_fixups[] = {
215 /* UFS cards deviations table */
216 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
217 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800218 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
219 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
220 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800221 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
222 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
223 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
224 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
225 UFS_DEVICE_QUIRK_PA_TACTIVATE),
226 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
227 UFS_DEVICE_QUIRK_PA_TACTIVATE),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800228 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
229 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
Wei Li8e4829c2018-11-08 09:08:29 -0800230 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
231 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
Subhash Jadavani56d4a182016-12-05 19:25:32 -0800232
233 END_FIX
234};
235
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -0800236static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530237static void ufshcd_async_scan(void *data, async_cookie_t cookie);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530238static int ufshcd_reset_and_restore(struct ufs_hba *hba);
Dolev Ravive7d38252016-12-22 18:40:07 -0800239static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +0530240static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +0300241static void ufshcd_hba_exit(struct ufs_hba *hba);
Bean Huo1b9e2142020-01-20 14:08:15 +0100242static int ufshcd_probe_hba(struct ufs_hba *hba, bool async);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300243static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
244 bool skip_ref_clk);
245static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +0300246static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
Yaniv Gardicad2e032015-03-31 17:37:14 +0300247static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300248static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800249static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
250static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -0800251static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -0800252static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300253static irqreturn_t ufshcd_intr(int irq, void *__hba);
Yaniv Gardi874237f2015-05-17 18:55:03 +0300254static int ufshcd_change_power_mode(struct ufs_hba *hba,
255 struct ufs_pa_layer_attr *pwr_mode);
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700256static bool ufshcd_wb_sup(struct ufs_hba *hba);
257static int ufshcd_wb_buf_flush_enable(struct ufs_hba *hba);
258static int ufshcd_wb_buf_flush_disable(struct ufs_hba *hba);
259static int ufshcd_wb_ctrl(struct ufs_hba *hba, bool enable);
260static int ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set);
261static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable);
262
Yaniv Gardi14497322016-02-01 15:02:39 +0200263static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
264{
265 return tag >= 0 && tag < hba->nutrs;
266}
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300267
Can Guo5231d382019-12-05 02:14:46 +0000268static inline void ufshcd_enable_irq(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300269{
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300270 if (!hba->is_irq_enabled) {
Can Guo5231d382019-12-05 02:14:46 +0000271 enable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300272 hba->is_irq_enabled = true;
273 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300274}
275
276static inline void ufshcd_disable_irq(struct ufs_hba *hba)
277{
278 if (hba->is_irq_enabled) {
Can Guo5231d382019-12-05 02:14:46 +0000279 disable_irq(hba->irq);
Subhash Jadavani57d104c2014-09-25 15:32:30 +0300280 hba->is_irq_enabled = false;
281 }
282}
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +0530283
Asutosh Das3d17b9b2020-04-22 14:41:42 -0700284static inline void ufshcd_wb_config(struct ufs_hba *hba)
285{
286 int ret;
287
288 if (!ufshcd_wb_sup(hba))
289 return;
290
291 ret = ufshcd_wb_ctrl(hba, true);
292 if (ret)
293 dev_err(hba->dev, "%s: Enable WB failed: %d\n", __func__, ret);
294 else
295 dev_info(hba->dev, "%s: Write Booster Configured\n", __func__);
296 ret = ufshcd_wb_toggle_flush_during_h8(hba, true);
297 if (ret)
298 dev_err(hba->dev, "%s: En WB flush during H8: failed: %d\n",
299 __func__, ret);
300 ufshcd_wb_toggle_flush(hba, true);
301}
302
Subhash Jadavani38135532018-05-03 16:37:18 +0530303static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
304{
305 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
306 scsi_unblock_requests(hba->host);
307}
308
309static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
310{
311 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
312 scsi_block_requests(hba->host);
313}
314
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300315static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
316 const char *str)
317{
318 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
319
320 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
321}
322
323static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
324 const char *str)
325{
326 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
327
328 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
329}
330
331static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
332 const char *str)
333{
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300334 int off = (int)tag - hba->nutrs;
Christoph Hellwig391e3882018-10-07 17:30:32 +0300335 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300336
Christoph Hellwig391e3882018-10-07 17:30:32 +0300337 trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
338 &descp->input_param1);
Ohad Sharabi6667e6d2018-03-28 12:42:18 +0300339}
340
Lee Susman1a07f2d2016-12-22 18:42:03 -0800341static void ufshcd_add_command_trace(struct ufs_hba *hba,
342 unsigned int tag, const char *str)
343{
344 sector_t lba = -1;
345 u8 opcode = 0;
346 u32 intr, doorbell;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300347 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800348 struct scsi_cmnd *cmd = lrbp->cmd;
Lee Susman1a07f2d2016-12-22 18:42:03 -0800349 int transfer_len = -1;
350
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300351 if (!trace_ufshcd_command_enabled()) {
352 /* trace UPIU W/O tracing command */
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800353 if (cmd)
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300354 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Lee Susman1a07f2d2016-12-22 18:42:03 -0800355 return;
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300356 }
Lee Susman1a07f2d2016-12-22 18:42:03 -0800357
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800358 if (cmd) { /* data phase exists */
Ohad Sharabie7c3b372018-08-05 16:26:23 +0300359 /* trace UPIU also */
360 ufshcd_add_cmd_upiu_trace(hba, tag, str);
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800361 opcode = cmd->cmnd[0];
Lee Susman1a07f2d2016-12-22 18:42:03 -0800362 if ((opcode == READ_10) || (opcode == WRITE_10)) {
363 /*
364 * Currently we only fully trace read(10) and write(10)
365 * commands
366 */
Bart Van Asschee4d2add2019-12-24 14:02:44 -0800367 if (cmd->request && cmd->request->bio)
368 lba = cmd->request->bio->bi_iter.bi_sector;
Lee Susman1a07f2d2016-12-22 18:42:03 -0800369 transfer_len = be32_to_cpu(
370 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
371 }
372 }
373
374 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
375 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
376 trace_ufshcd_command(dev_name(hba->dev), str, tag,
377 doorbell, transfer_len, intr, lba, opcode);
378}
379
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800380static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
381{
382 struct ufs_clk_info *clki;
383 struct list_head *head = &hba->clk_list_head;
384
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300385 if (list_empty(head))
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800386 return;
387
388 list_for_each_entry(clki, head, list) {
389 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
390 clki->max_freq)
391 dev_err(hba->dev, "clk: %s, rate: %u\n",
392 clki->name, clki->curr_freq);
393 }
394}
395
Stanley Chu48d5b972019-07-10 21:38:18 +0800396static void ufshcd_print_err_hist(struct ufs_hba *hba,
397 struct ufs_err_reg_hist *err_hist,
398 char *err_name)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800399{
400 int i;
Stanley Chu27752642019-01-28 22:04:26 +0800401 bool found = false;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800402
Stanley Chu48d5b972019-07-10 21:38:18 +0800403 for (i = 0; i < UFS_ERR_REG_HIST_LENGTH; i++) {
404 int p = (i + err_hist->pos) % UFS_ERR_REG_HIST_LENGTH;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800405
Stanley Chu645728a2020-01-04 22:26:06 +0800406 if (err_hist->tstamp[p] == 0)
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800407 continue;
Stanley Chuc5397f12019-07-10 21:38:20 +0800408 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800409 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
Stanley Chu27752642019-01-28 22:04:26 +0800410 found = true;
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800411 }
Stanley Chu27752642019-01-28 22:04:26 +0800412
413 if (!found)
Stanley Chufd1fb4d2020-01-04 22:26:08 +0800414 dev_err(hba->dev, "No record of %s\n", err_name);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800415}
416
Dolev Raviv66cc8202016-12-22 18:39:42 -0800417static void ufshcd_print_host_regs(struct ufs_hba *hba)
418{
Tomas Winklerba809172018-06-14 11:14:09 +0300419 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
Dolev Raviv66cc8202016-12-22 18:39:42 -0800420 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
421 hba->ufs_version, hba->capabilities);
422 dev_err(hba->dev,
423 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
424 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800425 dev_err(hba->dev,
426 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
427 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
428 hba->ufs_stats.hibern8_exit_cnt);
429
Stanley Chu48d5b972019-07-10 21:38:18 +0800430 ufshcd_print_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
431 ufshcd_print_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
432 ufshcd_print_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
433 ufshcd_print_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
434 ufshcd_print_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
Stanley Chud3c615b2019-07-10 21:38:19 +0800435 ufshcd_print_err_hist(hba, &hba->ufs_stats.auto_hibern8_err,
436 "auto_hibern8_err");
Stanley Chu8808b4e2019-07-10 21:38:21 +0800437 ufshcd_print_err_hist(hba, &hba->ufs_stats.fatal_err, "fatal_err");
438 ufshcd_print_err_hist(hba, &hba->ufs_stats.link_startup_err,
439 "link_startup_fail");
440 ufshcd_print_err_hist(hba, &hba->ufs_stats.resume_err, "resume_fail");
441 ufshcd_print_err_hist(hba, &hba->ufs_stats.suspend_err,
442 "suspend_fail");
443 ufshcd_print_err_hist(hba, &hba->ufs_stats.dev_reset, "dev_reset");
444 ufshcd_print_err_hist(hba, &hba->ufs_stats.host_reset, "host_reset");
445 ufshcd_print_err_hist(hba, &hba->ufs_stats.task_abort, "task_abort");
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800446
447 ufshcd_print_clk_freqs(hba);
448
Stanley Chu7c486d912019-12-24 21:01:06 +0800449 ufshcd_vops_dbg_register_dump(hba);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800450}
451
452static
453void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
454{
455 struct ufshcd_lrb *lrbp;
Gilad Broner7fabb772017-02-03 16:56:50 -0800456 int prdt_length;
Dolev Raviv66cc8202016-12-22 18:39:42 -0800457 int tag;
458
459 for_each_set_bit(tag, &bitmap, hba->nutrs) {
460 lrbp = &hba->lrb[tag];
461
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800462 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
463 tag, ktime_to_us(lrbp->issue_time_stamp));
Zang Leigang09017182017-09-27 10:06:06 +0800464 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
465 tag, ktime_to_us(lrbp->compl_time_stamp));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800466 dev_err(hba->dev,
467 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
468 tag, (u64)lrbp->utrd_dma_addr);
469
Dolev Raviv66cc8202016-12-22 18:39:42 -0800470 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
471 sizeof(struct utp_transfer_req_desc));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800472 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
473 (u64)lrbp->ucd_req_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800474 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
475 sizeof(struct utp_upiu_req));
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800476 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
477 (u64)lrbp->ucd_rsp_dma_addr);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800478 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
479 sizeof(struct utp_upiu_rsp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800480
Gilad Broner7fabb772017-02-03 16:56:50 -0800481 prdt_length = le16_to_cpu(
482 lrbp->utr_descriptor_ptr->prd_table_length);
483 dev_err(hba->dev,
484 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
485 tag, prdt_length,
486 (u64)lrbp->ucd_prdt_dma_addr);
487
488 if (pr_prdt)
Dolev Raviv66cc8202016-12-22 18:39:42 -0800489 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
Gilad Broner7fabb772017-02-03 16:56:50 -0800490 sizeof(struct ufshcd_sg_entry) * prdt_length);
Dolev Raviv66cc8202016-12-22 18:39:42 -0800491 }
492}
493
494static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
495{
Dolev Raviv66cc8202016-12-22 18:39:42 -0800496 int tag;
497
498 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
Christoph Hellwig391e3882018-10-07 17:30:32 +0300499 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
500
Dolev Raviv66cc8202016-12-22 18:39:42 -0800501 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
Christoph Hellwig391e3882018-10-07 17:30:32 +0300502 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
Dolev Raviv66cc8202016-12-22 18:39:42 -0800503 }
504}
505
Gilad Broner6ba65582017-02-03 16:57:28 -0800506static void ufshcd_print_host_state(struct ufs_hba *hba)
507{
508 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
Bart Van Assche7252a362019-12-09 10:13:08 -0800509 dev_err(hba->dev, "outstanding reqs=0x%lx tasks=0x%lx\n",
510 hba->outstanding_reqs, hba->outstanding_tasks);
Gilad Broner6ba65582017-02-03 16:57:28 -0800511 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
512 hba->saved_err, hba->saved_uic_err);
513 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
514 hba->curr_dev_pwr_mode, hba->uic_link_state);
515 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
516 hba->pm_op_in_progress, hba->is_sys_suspended);
517 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
518 hba->auto_bkops_enabled, hba->host->host_self_blocked);
519 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
520 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
521 hba->eh_flags, hba->req_abort_count);
522 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
523 hba->capabilities, hba->caps);
524 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
525 hba->dev_quirks);
526}
527
Dolev Ravivff8e20c2016-12-22 18:42:18 -0800528/**
529 * ufshcd_print_pwr_info - print power params as saved in hba
530 * power info
531 * @hba: per-adapter instance
532 */
533static void ufshcd_print_pwr_info(struct ufs_hba *hba)
534{
535 static const char * const names[] = {
536 "INVALID MODE",
537 "FAST MODE",
538 "SLOW_MODE",
539 "INVALID MODE",
540 "FASTAUTO_MODE",
541 "SLOWAUTO_MODE",
542 "INVALID MODE",
543 };
544
545 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
546 __func__,
547 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
548 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
549 names[hba->pwr_info.pwr_rx],
550 names[hba->pwr_info.pwr_tx],
551 hba->pwr_info.hs_rate);
552}
553
Stanley Chu5c955c12020-03-18 18:40:12 +0800554void ufshcd_delay_us(unsigned long us, unsigned long tolerance)
555{
556 if (!us)
557 return;
558
559 if (us < 10)
560 udelay(us);
561 else
562 usleep_range(us, us + tolerance);
563}
564EXPORT_SYMBOL_GPL(ufshcd_delay_us);
565
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530566/*
567 * ufshcd_wait_for_register - wait for register value to change
568 * @hba - per-adapter interface
569 * @reg - mmio register offset
570 * @mask - mask to apply to read register value
571 * @val - wait condition
572 * @interval_us - polling interval in microsecs
573 * @timeout_ms - timeout in millisecs
Yaniv Gardi596585a2016-03-10 17:37:08 +0200574 * @can_sleep - perform sleep or just spin
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530575 *
576 * Returns -ETIMEDOUT on error, zero on success
577 */
Yaniv Gardi596585a2016-03-10 17:37:08 +0200578int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
579 u32 val, unsigned long interval_us,
580 unsigned long timeout_ms, bool can_sleep)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530581{
582 int err = 0;
583 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
584
585 /* ignore bits that we don't intend to wait on */
586 val = val & mask;
587
588 while ((ufshcd_readl(hba, reg) & mask) != val) {
Yaniv Gardi596585a2016-03-10 17:37:08 +0200589 if (can_sleep)
590 usleep_range(interval_us, interval_us + 50);
591 else
592 udelay(interval_us);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530593 if (time_after(jiffies, timeout)) {
594 if ((ufshcd_readl(hba, reg) & mask) != val)
595 err = -ETIMEDOUT;
596 break;
597 }
598 }
599
600 return err;
601}
602
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530603/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530604 * ufshcd_get_intr_mask - Get the interrupt bit mask
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800605 * @hba: Pointer to adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530606 *
607 * Returns interrupt bit mask per version
608 */
609static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
610{
Yaniv Gardic01848c2016-12-05 19:25:02 -0800611 u32 intr_mask = 0;
612
613 switch (hba->ufs_version) {
614 case UFSHCI_VERSION_10:
615 intr_mask = INTERRUPT_MASK_ALL_VER_10;
616 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800617 case UFSHCI_VERSION_11:
618 case UFSHCI_VERSION_20:
619 intr_mask = INTERRUPT_MASK_ALL_VER_11;
620 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800621 case UFSHCI_VERSION_21:
622 default:
623 intr_mask = INTERRUPT_MASK_ALL_VER_21;
Tomohiro Kusumi031d1e02017-03-23 12:49:04 +0200624 break;
Yaniv Gardic01848c2016-12-05 19:25:02 -0800625 }
626
627 return intr_mask;
Seungwon Jeon2fbd0092013-06-26 22:39:27 +0530628}
629
630/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530631 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800632 * @hba: Pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530633 *
634 * Returns UFSHCI version supported by the controller
635 */
636static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
637{
Yaniv Gardi0263bcd2015-10-28 13:15:48 +0200638 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
639 return ufshcd_vops_get_ufs_hci_version(hba);
Yaniv Gardi9949e702015-05-17 18:55:05 +0300640
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530641 return ufshcd_readl(hba, REG_UFS_VERSION);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530642}
643
644/**
645 * ufshcd_is_device_present - Check if any device connected to
646 * the host controller
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300647 * @hba: pointer to adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530648 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300649 * Returns true if device present, false if no device detected
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530650 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300651static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530652{
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +0300653 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300654 DEVICE_PRESENT) ? true : false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530655}
656
657/**
658 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
Bart Van Assche8aa29f12018-03-01 15:07:20 -0800659 * @lrbp: pointer to local command reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530660 *
661 * This function is used to get the OCS field from UTRD
662 * Returns the OCS field in the UTRD
663 */
664static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
665{
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +0530666 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530667}
668
669/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530670 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
671 * @hba: per adapter instance
672 * @pos: position of the bit to be cleared
673 */
674static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
675{
Christoph Hellwig492001992020-02-21 06:08:11 -0800676 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
Alim Akhtar1399c5b2018-05-06 15:44:15 +0530677}
678
679/**
680 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
681 * @hba: per adapter instance
682 * @pos: position of the bit to be cleared
683 */
684static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
685{
Christoph Hellwig492001992020-02-21 06:08:11 -0800686 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530687}
688
689/**
Yaniv Gardia48353f2016-02-01 15:02:40 +0200690 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
691 * @hba: per adapter instance
692 * @tag: position of the bit to be cleared
693 */
694static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
695{
696 __clear_bit(tag, &hba->outstanding_reqs);
697}
698
699/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530700 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
701 * @reg: Register value of host controller status
702 *
703 * Returns integer, 0 on Success and positive value if failed
704 */
705static inline int ufshcd_get_lists_status(u32 reg)
706{
Tomohiro Kusumi6cf16112017-04-26 20:28:58 +0300707 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530708}
709
710/**
711 * ufshcd_get_uic_cmd_result - Get the UIC command result
712 * @hba: Pointer to adapter instance
713 *
714 * This function gets the result of UIC command completion
715 * Returns 0 on success, non zero value on error
716 */
717static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
718{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530719 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530720 MASK_UIC_COMMAND_RESULT;
721}
722
723/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +0530724 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
725 * @hba: Pointer to adapter instance
726 *
727 * This function gets UIC command argument3
728 * Returns 0 on success, non zero value on error
729 */
730static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
731{
732 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
733}
734
735/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530736 * ufshcd_get_req_rsp - returns the TR response transaction type
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530737 * @ucd_rsp_ptr: pointer to response UPIU
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530738 */
739static inline int
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530740ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530741{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +0530742 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530743}
744
745/**
746 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
747 * @ucd_rsp_ptr: pointer to response UPIU
748 *
749 * This function gets the response status and scsi_status from response UPIU
750 * Returns the response result code.
751 */
752static inline int
753ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
754{
755 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
756}
757
Seungwon Jeon1c2623c2013-08-31 21:40:19 +0530758/*
759 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
760 * from response UPIU
761 * @ucd_rsp_ptr: pointer to response UPIU
762 *
763 * Return the data segment length.
764 */
765static inline unsigned int
766ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
767{
768 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
769 MASK_RSP_UPIU_DATA_SEG_LEN;
770}
771
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530772/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +0530773 * ufshcd_is_exception_event - Check if the device raised an exception event
774 * @ucd_rsp_ptr: pointer to response UPIU
775 *
776 * The function checks if the device raised an exception event indicated in
777 * the Device Information field of response UPIU.
778 *
779 * Returns true if exception is raised, false otherwise.
780 */
781static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
782{
783 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
784 MASK_RSP_EXCEPTION_EVENT ? true : false;
785}
786
787/**
Seungwon Jeon7d568652013-08-31 21:40:20 +0530788 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530789 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530790 */
791static inline void
Seungwon Jeon7d568652013-08-31 21:40:20 +0530792ufshcd_reset_intr_aggr(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530793{
Seungwon Jeon7d568652013-08-31 21:40:20 +0530794 ufshcd_writel(hba, INT_AGGR_ENABLE |
795 INT_AGGR_COUNTER_AND_TIMER_RESET,
796 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
797}
798
799/**
800 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
801 * @hba: per adapter instance
802 * @cnt: Interrupt aggregation counter threshold
803 * @tmout: Interrupt aggregation timeout value
804 */
805static inline void
806ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
807{
808 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
809 INT_AGGR_COUNTER_THLD_VAL(cnt) |
810 INT_AGGR_TIMEOUT_VAL(tmout),
811 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530812}
813
814/**
Yaniv Gardib8521902015-05-17 18:54:57 +0300815 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
816 * @hba: per adapter instance
817 */
818static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
819{
820 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
821}
822
823/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530824 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
825 * When run-stop registers are set to 1, it indicates the
826 * host controller that it can process the requests
827 * @hba: per adapter instance
828 */
829static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
830{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530831 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
832 REG_UTP_TASK_REQ_LIST_RUN_STOP);
833 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
834 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530835}
836
837/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530838 * ufshcd_hba_start - Start controller initialization sequence
839 * @hba: per adapter instance
840 */
841static inline void ufshcd_hba_start(struct ufs_hba *hba)
842{
Seungwon Jeonb873a2752013-06-26 22:39:26 +0530843 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530844}
845
846/**
847 * ufshcd_is_hba_active - Get controller state
848 * @hba: per adapter instance
849 *
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300850 * Returns false if controller is active, true otherwise
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530851 */
Tomohiro Kusumic9e60102017-03-28 16:49:24 +0300852static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530853{
Tomohiro Kusumi4a8eec22017-03-28 16:49:25 +0300854 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
855 ? false : true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +0530856}
857
Yaniv Gardi37113102016-03-10 17:37:16 +0200858u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
859{
860 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
861 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
862 (hba->ufs_version == UFSHCI_VERSION_11))
863 return UFS_UNIPRO_VER_1_41;
864 else
865 return UFS_UNIPRO_VER_1_6;
866}
867EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
868
869static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
870{
871 /*
872 * If both host and device support UniPro ver1.6 or later, PA layer
873 * parameters tuning happens during link startup itself.
874 *
875 * We can manually tune PA layer parameters if either host or device
876 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
877 * logic simple, we will only do manual tuning if local unipro version
878 * doesn't support ver1.6 or later.
879 */
880 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
881 return true;
882 else
883 return false;
884}
885
Subhash Jadavani394b9492020-03-26 02:25:40 -0700886/**
887 * ufshcd_set_clk_freq - set UFS controller clock frequencies
888 * @hba: per adapter instance
889 * @scale_up: If True, set max possible frequency othewise set low frequency
890 *
891 * Returns 0 if successful
892 * Returns < 0 for any other errors
893 */
894static int ufshcd_set_clk_freq(struct ufs_hba *hba, bool scale_up)
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800895{
896 int ret = 0;
897 struct ufs_clk_info *clki;
898 struct list_head *head = &hba->clk_list_head;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800899
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300900 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800901 goto out;
902
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800903 list_for_each_entry(clki, head, list) {
904 if (!IS_ERR_OR_NULL(clki->clk)) {
905 if (scale_up && clki->max_freq) {
906 if (clki->curr_freq == clki->max_freq)
907 continue;
908
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800909 ret = clk_set_rate(clki->clk, clki->max_freq);
910 if (ret) {
911 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
912 __func__, clki->name,
913 clki->max_freq, ret);
914 break;
915 }
916 trace_ufshcd_clk_scaling(dev_name(hba->dev),
917 "scaled up", clki->name,
918 clki->curr_freq,
919 clki->max_freq);
920
921 clki->curr_freq = clki->max_freq;
922
923 } else if (!scale_up && clki->min_freq) {
924 if (clki->curr_freq == clki->min_freq)
925 continue;
926
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800927 ret = clk_set_rate(clki->clk, clki->min_freq);
928 if (ret) {
929 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
930 __func__, clki->name,
931 clki->min_freq, ret);
932 break;
933 }
934 trace_ufshcd_clk_scaling(dev_name(hba->dev),
935 "scaled down", clki->name,
936 clki->curr_freq,
937 clki->min_freq);
938 clki->curr_freq = clki->min_freq;
939 }
940 }
941 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
942 clki->name, clk_get_rate(clki->clk));
943 }
944
Subhash Jadavani394b9492020-03-26 02:25:40 -0700945out:
946 return ret;
947}
948
949/**
950 * ufshcd_scale_clks - scale up or scale down UFS controller clocks
951 * @hba: per adapter instance
952 * @scale_up: True if scaling up and false if scaling down
953 *
954 * Returns 0 if successful
955 * Returns < 0 for any other errors
956 */
957static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
958{
959 int ret = 0;
960 ktime_t start = ktime_get();
961
962 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
963 if (ret)
964 goto out;
965
966 ret = ufshcd_set_clk_freq(hba, scale_up);
967 if (ret)
968 goto out;
969
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800970 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
Subhash Jadavani394b9492020-03-26 02:25:40 -0700971 if (ret)
972 ufshcd_set_clk_freq(hba, !scale_up);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800973
974out:
Subhash Jadavani394b9492020-03-26 02:25:40 -0700975 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800976 (scale_up ? "up" : "down"),
977 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
978 return ret;
979}
980
981/**
982 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
983 * @hba: per adapter instance
984 * @scale_up: True if scaling up and false if scaling down
985 *
986 * Returns true if scaling is required, false otherwise.
987 */
988static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
989 bool scale_up)
990{
991 struct ufs_clk_info *clki;
992 struct list_head *head = &hba->clk_list_head;
993
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +0300994 if (list_empty(head))
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -0800995 return false;
996
997 list_for_each_entry(clki, head, list) {
998 if (!IS_ERR_OR_NULL(clki->clk)) {
999 if (scale_up && clki->max_freq) {
1000 if (clki->curr_freq == clki->max_freq)
1001 continue;
1002 return true;
1003 } else if (!scale_up && clki->min_freq) {
1004 if (clki->curr_freq == clki->min_freq)
1005 continue;
1006 return true;
1007 }
1008 }
1009 }
1010
1011 return false;
1012}
1013
1014static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
1015 u64 wait_timeout_us)
1016{
1017 unsigned long flags;
1018 int ret = 0;
1019 u32 tm_doorbell;
1020 u32 tr_doorbell;
1021 bool timeout = false, do_last_check = false;
1022 ktime_t start;
1023
1024 ufshcd_hold(hba, false);
1025 spin_lock_irqsave(hba->host->host_lock, flags);
1026 /*
1027 * Wait for all the outstanding tasks/transfer requests.
1028 * Verify by checking the doorbell registers are clear.
1029 */
1030 start = ktime_get();
1031 do {
1032 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1033 ret = -EBUSY;
1034 goto out;
1035 }
1036
1037 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1038 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1039 if (!tm_doorbell && !tr_doorbell) {
1040 timeout = false;
1041 break;
1042 } else if (do_last_check) {
1043 break;
1044 }
1045
1046 spin_unlock_irqrestore(hba->host->host_lock, flags);
1047 schedule();
1048 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1049 wait_timeout_us) {
1050 timeout = true;
1051 /*
1052 * We might have scheduled out for long time so make
1053 * sure to check if doorbells are cleared by this time
1054 * or not.
1055 */
1056 do_last_check = true;
1057 }
1058 spin_lock_irqsave(hba->host->host_lock, flags);
1059 } while (tm_doorbell || tr_doorbell);
1060
1061 if (timeout) {
1062 dev_err(hba->dev,
1063 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1064 __func__, tm_doorbell, tr_doorbell);
1065 ret = -EBUSY;
1066 }
1067out:
1068 spin_unlock_irqrestore(hba->host->host_lock, flags);
1069 ufshcd_release(hba);
1070 return ret;
1071}
1072
1073/**
1074 * ufshcd_scale_gear - scale up/down UFS gear
1075 * @hba: per adapter instance
1076 * @scale_up: True for scaling up gear and false for scaling down
1077 *
1078 * Returns 0 for success,
1079 * Returns -EBUSY if scaling can't happen at this time
1080 * Returns non-zero for any other errors
1081 */
1082static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1083{
1084 #define UFS_MIN_GEAR_TO_SCALE_DOWN UFS_HS_G1
1085 int ret = 0;
1086 struct ufs_pa_layer_attr new_pwr_info;
1087
1088 if (scale_up) {
1089 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1090 sizeof(struct ufs_pa_layer_attr));
1091 } else {
1092 memcpy(&new_pwr_info, &hba->pwr_info,
1093 sizeof(struct ufs_pa_layer_attr));
1094
1095 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1096 || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1097 /* save the current power mode */
1098 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1099 &hba->pwr_info,
1100 sizeof(struct ufs_pa_layer_attr));
1101
1102 /* scale down gear */
1103 new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1104 new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1105 }
1106 }
1107
1108 /* check if the power mode needs to be changed or not? */
Can Guo6a9df812020-02-11 21:38:28 -08001109 ret = ufshcd_config_pwr_mode(hba, &new_pwr_info);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001110 if (ret)
1111 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1112 __func__, ret,
1113 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1114 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1115
1116 return ret;
1117}
1118
1119static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1120{
1121 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1122 int ret = 0;
1123 /*
1124 * make sure that there are no outstanding requests when
1125 * clock scaling is in progress
1126 */
Subhash Jadavani38135532018-05-03 16:37:18 +05301127 ufshcd_scsi_block_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001128 down_write(&hba->clk_scaling_lock);
1129 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1130 ret = -EBUSY;
1131 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301132 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001133 }
1134
1135 return ret;
1136}
1137
1138static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1139{
1140 up_write(&hba->clk_scaling_lock);
Subhash Jadavani38135532018-05-03 16:37:18 +05301141 ufshcd_scsi_unblock_requests(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001142}
1143
1144/**
1145 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1146 * @hba: per adapter instance
1147 * @scale_up: True for scaling up and false for scalin down
1148 *
1149 * Returns 0 for success,
1150 * Returns -EBUSY if scaling can't happen at this time
1151 * Returns non-zero for any other errors
1152 */
1153static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1154{
1155 int ret = 0;
1156
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001157 /* let's not get into low power until clock scaling is completed */
1158 ufshcd_hold(hba, false);
1159
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001160 ret = ufshcd_clock_scaling_prepare(hba);
1161 if (ret)
Subhash Jadavani394b9492020-03-26 02:25:40 -07001162 goto out;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001163
1164 /* scale down the gear before scaling down clocks */
1165 if (!scale_up) {
1166 ret = ufshcd_scale_gear(hba, false);
1167 if (ret)
Subhash Jadavani394b9492020-03-26 02:25:40 -07001168 goto out_unprepare;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001169 }
1170
1171 ret = ufshcd_scale_clks(hba, scale_up);
1172 if (ret) {
1173 if (!scale_up)
1174 ufshcd_scale_gear(hba, true);
Subhash Jadavani394b9492020-03-26 02:25:40 -07001175 goto out_unprepare;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001176 }
1177
1178 /* scale up the gear after scaling up clocks */
1179 if (scale_up) {
1180 ret = ufshcd_scale_gear(hba, true);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001181 if (ret) {
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001182 ufshcd_scale_clks(hba, false);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001183 goto out_unprepare;
1184 }
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001185 }
1186
Asutosh Das3d17b9b2020-04-22 14:41:42 -07001187 /* Enable Write Booster if we have scaled up else disable it */
1188 up_write(&hba->clk_scaling_lock);
1189 ufshcd_wb_ctrl(hba, scale_up);
1190 down_write(&hba->clk_scaling_lock);
1191
Subhash Jadavani394b9492020-03-26 02:25:40 -07001192out_unprepare:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001193 ufshcd_clock_scaling_unprepare(hba);
Subhash Jadavani394b9492020-03-26 02:25:40 -07001194out:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001195 ufshcd_release(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001196 return ret;
1197}
1198
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001199static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1200{
1201 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1202 clk_scaling.suspend_work);
1203 unsigned long irq_flags;
1204
1205 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1206 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1207 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1208 return;
1209 }
1210 hba->clk_scaling.is_suspended = true;
1211 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1212
1213 __ufshcd_suspend_clkscaling(hba);
1214}
1215
1216static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1217{
1218 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1219 clk_scaling.resume_work);
1220 unsigned long irq_flags;
1221
1222 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1223 if (!hba->clk_scaling.is_suspended) {
1224 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1225 return;
1226 }
1227 hba->clk_scaling.is_suspended = false;
1228 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1229
1230 devfreq_resume_device(hba->devfreq);
1231}
1232
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001233static int ufshcd_devfreq_target(struct device *dev,
1234 unsigned long *freq, u32 flags)
1235{
1236 int ret = 0;
1237 struct ufs_hba *hba = dev_get_drvdata(dev);
1238 ktime_t start;
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001239 bool scale_up, sched_clk_scaling_suspend_work = false;
Bjorn Andersson092b4552018-05-17 23:26:37 -07001240 struct list_head *clk_list = &hba->clk_list_head;
1241 struct ufs_clk_info *clki;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001242 unsigned long irq_flags;
1243
1244 if (!ufshcd_is_clkscaling_supported(hba))
1245 return -EINVAL;
1246
Asutosh Das91831d32020-03-25 11:29:00 -07001247 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1248 /* Override with the closest supported frequency */
1249 *freq = (unsigned long) clk_round_rate(clki->clk, *freq);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001250 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1251 if (ufshcd_eh_in_progress(hba)) {
1252 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1253 return 0;
1254 }
1255
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001256 if (!hba->clk_scaling.active_reqs)
1257 sched_clk_scaling_suspend_work = true;
1258
Bjorn Andersson092b4552018-05-17 23:26:37 -07001259 if (list_empty(clk_list)) {
1260 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1261 goto out;
1262 }
1263
Asutosh Das91831d32020-03-25 11:29:00 -07001264 /* Decide based on the rounded-off frequency and update */
Bjorn Andersson092b4552018-05-17 23:26:37 -07001265 scale_up = (*freq == clki->max_freq) ? true : false;
Asutosh Das91831d32020-03-25 11:29:00 -07001266 if (!scale_up)
1267 *freq = clki->min_freq;
1268 /* Update the frequency */
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001269 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1270 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1271 ret = 0;
1272 goto out; /* no state change required */
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001273 }
1274 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1275
1276 start = ktime_get();
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001277 ret = ufshcd_devfreq_scale(hba, scale_up);
1278
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001279 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1280 (scale_up ? "up" : "down"),
1281 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1282
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001283out:
1284 if (sched_clk_scaling_suspend_work)
1285 queue_work(hba->clk_scaling.workq,
1286 &hba->clk_scaling.suspend_work);
1287
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001288 return ret;
1289}
1290
Bart Van Assche7252a362019-12-09 10:13:08 -08001291static bool ufshcd_is_busy(struct request *req, void *priv, bool reserved)
1292{
1293 int *busy = priv;
1294
1295 WARN_ON_ONCE(reserved);
1296 (*busy)++;
1297 return false;
1298}
1299
1300/* Whether or not any tag is in use by a request that is in progress. */
1301static bool ufshcd_any_tag_in_use(struct ufs_hba *hba)
1302{
1303 struct request_queue *q = hba->cmd_queue;
1304 int busy = 0;
1305
1306 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_is_busy, &busy);
1307 return busy;
1308}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001309
1310static int ufshcd_devfreq_get_dev_status(struct device *dev,
1311 struct devfreq_dev_status *stat)
1312{
1313 struct ufs_hba *hba = dev_get_drvdata(dev);
1314 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1315 unsigned long flags;
Asutosh Das91831d32020-03-25 11:29:00 -07001316 struct list_head *clk_list = &hba->clk_list_head;
1317 struct ufs_clk_info *clki;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001318
1319 if (!ufshcd_is_clkscaling_supported(hba))
1320 return -EINVAL;
1321
1322 memset(stat, 0, sizeof(*stat));
1323
1324 spin_lock_irqsave(hba->host->host_lock, flags);
1325 if (!scaling->window_start_t)
1326 goto start_window;
1327
Asutosh Das91831d32020-03-25 11:29:00 -07001328 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1329 /*
1330 * If current frequency is 0, then the ondemand governor considers
1331 * there's no initial frequency set. And it always requests to set
1332 * to max. frequency.
1333 */
1334 stat->current_frequency = clki->curr_freq;
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001335 if (scaling->is_busy_started)
1336 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1337 scaling->busy_start_t));
1338
1339 stat->total_time = jiffies_to_usecs((long)jiffies -
1340 (long)scaling->window_start_t);
1341 stat->busy_time = scaling->tot_busy_t;
1342start_window:
1343 scaling->window_start_t = jiffies;
1344 scaling->tot_busy_t = 0;
1345
1346 if (hba->outstanding_reqs) {
1347 scaling->busy_start_t = ktime_get();
1348 scaling->is_busy_started = true;
1349 } else {
1350 scaling->busy_start_t = 0;
1351 scaling->is_busy_started = false;
1352 }
1353 spin_unlock_irqrestore(hba->host->host_lock, flags);
1354 return 0;
1355}
1356
1357static struct devfreq_dev_profile ufs_devfreq_profile = {
1358 .polling_ms = 100,
1359 .target = ufshcd_devfreq_target,
1360 .get_dev_status = ufshcd_devfreq_get_dev_status,
1361};
1362
Asutosh Das2c75f9a52020-03-25 11:29:01 -07001363#if IS_ENABLED(CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND)
1364static struct devfreq_simple_ondemand_data ufs_ondemand_data = {
1365 .upthreshold = 70,
1366 .downdifferential = 5,
1367};
1368
1369static void *gov_data = &ufs_ondemand_data;
1370#else
1371static void *gov_data; /* NULL */
1372#endif
1373
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001374static int ufshcd_devfreq_init(struct ufs_hba *hba)
1375{
Bjorn Andersson092b4552018-05-17 23:26:37 -07001376 struct list_head *clk_list = &hba->clk_list_head;
1377 struct ufs_clk_info *clki;
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001378 struct devfreq *devfreq;
1379 int ret;
1380
Bjorn Andersson092b4552018-05-17 23:26:37 -07001381 /* Skip devfreq if we don't have any clocks in the list */
1382 if (list_empty(clk_list))
1383 return 0;
1384
1385 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1386 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1387 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1388
Asutosh Das2c75f9a52020-03-25 11:29:01 -07001389 ufshcd_vops_config_scaling_param(hba, &ufs_devfreq_profile,
1390 gov_data);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001391 devfreq = devfreq_add_device(hba->dev,
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001392 &ufs_devfreq_profile,
1393 DEVFREQ_GOV_SIMPLE_ONDEMAND,
Asutosh Das2c75f9a52020-03-25 11:29:01 -07001394 gov_data);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001395 if (IS_ERR(devfreq)) {
1396 ret = PTR_ERR(devfreq);
1397 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
Bjorn Andersson092b4552018-05-17 23:26:37 -07001398
1399 dev_pm_opp_remove(hba->dev, clki->min_freq);
1400 dev_pm_opp_remove(hba->dev, clki->max_freq);
Bjorn Anderssondeac4442018-05-17 23:26:36 -07001401 return ret;
1402 }
1403
1404 hba->devfreq = devfreq;
1405
1406 return 0;
1407}
1408
Bjorn Andersson092b4552018-05-17 23:26:37 -07001409static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1410{
1411 struct list_head *clk_list = &hba->clk_list_head;
1412 struct ufs_clk_info *clki;
1413
1414 if (!hba->devfreq)
1415 return;
1416
1417 devfreq_remove_device(hba->devfreq);
1418 hba->devfreq = NULL;
1419
1420 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1421 dev_pm_opp_remove(hba->dev, clki->min_freq);
1422 dev_pm_opp_remove(hba->dev, clki->max_freq);
1423}
1424
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001425static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1426{
1427 unsigned long flags;
1428
1429 devfreq_suspend_device(hba->devfreq);
1430 spin_lock_irqsave(hba->host->host_lock, flags);
1431 hba->clk_scaling.window_start_t = 0;
1432 spin_unlock_irqrestore(hba->host->host_lock, flags);
1433}
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001434
Gilad Bronera5082532016-10-17 17:10:00 -07001435static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1436{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001437 unsigned long flags;
1438 bool suspend = false;
1439
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001440 if (!ufshcd_is_clkscaling_supported(hba))
1441 return;
1442
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001443 spin_lock_irqsave(hba->host->host_lock, flags);
1444 if (!hba->clk_scaling.is_suspended) {
1445 suspend = true;
1446 hba->clk_scaling.is_suspended = true;
1447 }
1448 spin_unlock_irqrestore(hba->host->host_lock, flags);
1449
1450 if (suspend)
1451 __ufshcd_suspend_clkscaling(hba);
Gilad Bronera5082532016-10-17 17:10:00 -07001452}
1453
1454static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1455{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001456 unsigned long flags;
1457 bool resume = false;
1458
1459 if (!ufshcd_is_clkscaling_supported(hba))
1460 return;
1461
1462 spin_lock_irqsave(hba->host->host_lock, flags);
1463 if (hba->clk_scaling.is_suspended) {
1464 resume = true;
1465 hba->clk_scaling.is_suspended = false;
1466 }
1467 spin_unlock_irqrestore(hba->host->host_lock, flags);
1468
1469 if (resume)
1470 devfreq_resume_device(hba->devfreq);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001471}
1472
1473static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1474 struct device_attribute *attr, char *buf)
1475{
1476 struct ufs_hba *hba = dev_get_drvdata(dev);
1477
1478 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1479}
1480
1481static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1482 struct device_attribute *attr, const char *buf, size_t count)
1483{
1484 struct ufs_hba *hba = dev_get_drvdata(dev);
1485 u32 value;
1486 int err;
1487
1488 if (kstrtou32(buf, 0, &value))
1489 return -EINVAL;
1490
1491 value = !!value;
1492 if (value == hba->clk_scaling.is_allowed)
1493 goto out;
1494
1495 pm_runtime_get_sync(hba->dev);
1496 ufshcd_hold(hba, false);
1497
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001498 cancel_work_sync(&hba->clk_scaling.suspend_work);
1499 cancel_work_sync(&hba->clk_scaling.resume_work);
1500
1501 hba->clk_scaling.is_allowed = value;
1502
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001503 if (value) {
1504 ufshcd_resume_clkscaling(hba);
1505 } else {
1506 ufshcd_suspend_clkscaling(hba);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001507 err = ufshcd_devfreq_scale(hba, true);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001508 if (err)
1509 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1510 __func__, err);
1511 }
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001512
1513 ufshcd_release(hba);
1514 pm_runtime_put_sync(hba->dev);
1515out:
1516 return count;
Gilad Bronera5082532016-10-17 17:10:00 -07001517}
1518
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08001519static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1520{
1521 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1522 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1523 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1524 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1525 hba->clk_scaling.enable_attr.attr.mode = 0644;
1526 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1527 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1528}
1529
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001530static void ufshcd_ungate_work(struct work_struct *work)
1531{
1532 int ret;
1533 unsigned long flags;
1534 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1535 clk_gating.ungate_work);
1536
1537 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1538
1539 spin_lock_irqsave(hba->host->host_lock, flags);
1540 if (hba->clk_gating.state == CLKS_ON) {
1541 spin_unlock_irqrestore(hba->host->host_lock, flags);
1542 goto unblock_reqs;
1543 }
1544
1545 spin_unlock_irqrestore(hba->host->host_lock, flags);
1546 ufshcd_setup_clocks(hba, true);
1547
Stanley Chu8b0bbf02019-12-07 20:22:01 +08001548 ufshcd_enable_irq(hba);
1549
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001550 /* Exit from hibern8 */
1551 if (ufshcd_can_hibern8_during_gating(hba)) {
1552 /* Prevent gating in this path */
1553 hba->clk_gating.is_suspended = true;
1554 if (ufshcd_is_link_hibern8(hba)) {
1555 ret = ufshcd_uic_hibern8_exit(hba);
1556 if (ret)
1557 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1558 __func__, ret);
1559 else
1560 ufshcd_set_link_active(hba);
1561 }
1562 hba->clk_gating.is_suspended = false;
1563 }
1564unblock_reqs:
Subhash Jadavani38135532018-05-03 16:37:18 +05301565 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001566}
1567
1568/**
1569 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1570 * Also, exit from hibern8 mode and set the link as active.
1571 * @hba: per adapter instance
1572 * @async: This indicates whether caller should ungate clocks asynchronously.
1573 */
1574int ufshcd_hold(struct ufs_hba *hba, bool async)
1575{
1576 int rc = 0;
1577 unsigned long flags;
1578
1579 if (!ufshcd_is_clkgating_allowed(hba))
1580 goto out;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001581 spin_lock_irqsave(hba->host->host_lock, flags);
1582 hba->clk_gating.active_reqs++;
1583
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001584 if (ufshcd_eh_in_progress(hba)) {
1585 spin_unlock_irqrestore(hba->host->host_lock, flags);
1586 return 0;
1587 }
1588
Sahitya Tummala856b3482014-09-25 15:32:34 +03001589start:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001590 switch (hba->clk_gating.state) {
1591 case CLKS_ON:
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001592 /*
1593 * Wait for the ungate work to complete if in progress.
1594 * Though the clocks may be in ON state, the link could
1595 * still be in hibner8 state if hibern8 is allowed
1596 * during clock gating.
1597 * Make sure we exit hibern8 state also in addition to
1598 * clocks being ON.
1599 */
1600 if (ufshcd_can_hibern8_during_gating(hba) &&
1601 ufshcd_is_link_hibern8(hba)) {
Can Guoc63d6092020-02-10 19:40:48 -08001602 if (async) {
1603 rc = -EAGAIN;
1604 hba->clk_gating.active_reqs--;
1605 break;
1606 }
Venkat Gopalakrishnanf2a785a2016-10-17 17:10:53 -07001607 spin_unlock_irqrestore(hba->host->host_lock, flags);
1608 flush_work(&hba->clk_gating.ungate_work);
1609 spin_lock_irqsave(hba->host->host_lock, flags);
1610 goto start;
1611 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001612 break;
1613 case REQ_CLKS_OFF:
1614 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1615 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001616 trace_ufshcd_clk_gating(dev_name(hba->dev),
1617 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001618 break;
1619 }
1620 /*
Tomohiro Kusumi9c490d22017-03-28 16:49:26 +03001621 * If we are here, it means gating work is either done or
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001622 * currently running. Hence, fall through to cancel gating
1623 * work and to enable clocks.
1624 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001625 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001626 case CLKS_OFF:
Subhash Jadavani38135532018-05-03 16:37:18 +05301627 ufshcd_scsi_block_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001628 hba->clk_gating.state = REQ_CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001629 trace_ufshcd_clk_gating(dev_name(hba->dev),
1630 hba->clk_gating.state);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301631 queue_work(hba->clk_gating.clk_gating_workq,
1632 &hba->clk_gating.ungate_work);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001633 /*
1634 * fall through to check if we should wait for this
1635 * work to be done or not.
1636 */
Tomas Winkler30eb2e42018-11-26 10:10:34 +02001637 /* fallthrough */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001638 case REQ_CLKS_ON:
1639 if (async) {
1640 rc = -EAGAIN;
1641 hba->clk_gating.active_reqs--;
1642 break;
1643 }
1644
1645 spin_unlock_irqrestore(hba->host->host_lock, flags);
1646 flush_work(&hba->clk_gating.ungate_work);
1647 /* Make sure state is CLKS_ON before returning */
Sahitya Tummala856b3482014-09-25 15:32:34 +03001648 spin_lock_irqsave(hba->host->host_lock, flags);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001649 goto start;
1650 default:
1651 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1652 __func__, hba->clk_gating.state);
1653 break;
1654 }
1655 spin_unlock_irqrestore(hba->host->host_lock, flags);
1656out:
1657 return rc;
1658}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001659EXPORT_SYMBOL_GPL(ufshcd_hold);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001660
1661static void ufshcd_gate_work(struct work_struct *work)
1662{
1663 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1664 clk_gating.gate_work.work);
1665 unsigned long flags;
1666
1667 spin_lock_irqsave(hba->host->host_lock, flags);
Venkat Gopalakrishnan3f0c06d2016-10-17 17:11:07 -07001668 /*
1669 * In case you are here to cancel this work the gating state
1670 * would be marked as REQ_CLKS_ON. In this case save time by
1671 * skipping the gating work and exit after changing the clock
1672 * state to CLKS_ON.
1673 */
1674 if (hba->clk_gating.is_suspended ||
Asutosh Das18f013742019-11-14 22:09:29 -08001675 (hba->clk_gating.state != REQ_CLKS_OFF)) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001676 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001677 trace_ufshcd_clk_gating(dev_name(hba->dev),
1678 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001679 goto rel_lock;
1680 }
1681
1682 if (hba->clk_gating.active_reqs
1683 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
Bart Van Assche7252a362019-12-09 10:13:08 -08001684 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001685 || hba->active_uic_cmd || hba->uic_async_done)
1686 goto rel_lock;
1687
1688 spin_unlock_irqrestore(hba->host->host_lock, flags);
1689
1690 /* put the link into hibern8 mode before turning off clocks */
1691 if (ufshcd_can_hibern8_during_gating(hba)) {
1692 if (ufshcd_uic_hibern8_enter(hba)) {
1693 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001694 trace_ufshcd_clk_gating(dev_name(hba->dev),
1695 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001696 goto out;
1697 }
1698 ufshcd_set_link_hibern8(hba);
1699 }
1700
Stanley Chu8b0bbf02019-12-07 20:22:01 +08001701 ufshcd_disable_irq(hba);
1702
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001703 if (!ufshcd_is_link_active(hba))
1704 ufshcd_setup_clocks(hba, false);
1705 else
1706 /* If link is active, device ref_clk can't be switched off */
1707 __ufshcd_setup_clocks(hba, false, true);
1708
1709 /*
1710 * In case you are here to cancel this work the gating state
1711 * would be marked as REQ_CLKS_ON. In this case keep the state
1712 * as REQ_CLKS_ON which would anyway imply that clocks are off
1713 * and a request to turn them on is pending. By doing this way,
1714 * we keep the state machine in tact and this would ultimately
1715 * prevent from doing cancel work multiple times when there are
1716 * new requests arriving before the current cancel work is done.
1717 */
1718 spin_lock_irqsave(hba->host->host_lock, flags);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001719 if (hba->clk_gating.state == REQ_CLKS_OFF) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001720 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001721 trace_ufshcd_clk_gating(dev_name(hba->dev),
1722 hba->clk_gating.state);
1723 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001724rel_lock:
1725 spin_unlock_irqrestore(hba->host->host_lock, flags);
1726out:
1727 return;
1728}
1729
1730/* host lock must be held before calling this variant */
1731static void __ufshcd_release(struct ufs_hba *hba)
1732{
1733 if (!ufshcd_is_clkgating_allowed(hba))
1734 return;
1735
1736 hba->clk_gating.active_reqs--;
1737
1738 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1739 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
Bart Van Assche7252a362019-12-09 10:13:08 -08001740 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
Yaniv Gardi53c12d02016-02-01 15:02:45 +02001741 || hba->active_uic_cmd || hba->uic_async_done
1742 || ufshcd_eh_in_progress(hba))
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001743 return;
1744
1745 hba->clk_gating.state = REQ_CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08001746 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Evan Greenf4bb7702018-10-05 10:27:32 -07001747 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1748 &hba->clk_gating.gate_work,
1749 msecs_to_jiffies(hba->clk_gating.delay_ms));
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001750}
1751
1752void ufshcd_release(struct ufs_hba *hba)
1753{
1754 unsigned long flags;
1755
1756 spin_lock_irqsave(hba->host->host_lock, flags);
1757 __ufshcd_release(hba);
1758 spin_unlock_irqrestore(hba->host->host_lock, flags);
1759}
Yaniv Gardi6e3fd442015-10-28 13:15:50 +02001760EXPORT_SYMBOL_GPL(ufshcd_release);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001761
1762static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1763 struct device_attribute *attr, char *buf)
1764{
1765 struct ufs_hba *hba = dev_get_drvdata(dev);
1766
1767 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1768}
1769
1770static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1771 struct device_attribute *attr, const char *buf, size_t count)
1772{
1773 struct ufs_hba *hba = dev_get_drvdata(dev);
1774 unsigned long flags, value;
1775
1776 if (kstrtoul(buf, 0, &value))
1777 return -EINVAL;
1778
1779 spin_lock_irqsave(hba->host->host_lock, flags);
1780 hba->clk_gating.delay_ms = value;
1781 spin_unlock_irqrestore(hba->host->host_lock, flags);
1782 return count;
1783}
1784
Sahitya Tummalab4274112016-12-22 18:40:39 -08001785static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1786 struct device_attribute *attr, char *buf)
1787{
1788 struct ufs_hba *hba = dev_get_drvdata(dev);
1789
1790 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1791}
1792
1793static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1794 struct device_attribute *attr, const char *buf, size_t count)
1795{
1796 struct ufs_hba *hba = dev_get_drvdata(dev);
1797 unsigned long flags;
1798 u32 value;
1799
1800 if (kstrtou32(buf, 0, &value))
1801 return -EINVAL;
1802
1803 value = !!value;
1804 if (value == hba->clk_gating.is_enabled)
1805 goto out;
1806
1807 if (value) {
1808 ufshcd_release(hba);
1809 } else {
1810 spin_lock_irqsave(hba->host->host_lock, flags);
1811 hba->clk_gating.active_reqs++;
1812 spin_unlock_irqrestore(hba->host->host_lock, flags);
1813 }
1814
1815 hba->clk_gating.is_enabled = value;
1816out:
1817 return count;
1818}
1819
Vivek Gautameebcc192018-08-07 23:17:39 +05301820static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1821{
1822 char wq_name[sizeof("ufs_clkscaling_00")];
1823
1824 if (!ufshcd_is_clkscaling_supported(hba))
1825 return;
1826
1827 INIT_WORK(&hba->clk_scaling.suspend_work,
1828 ufshcd_clk_scaling_suspend_work);
1829 INIT_WORK(&hba->clk_scaling.resume_work,
1830 ufshcd_clk_scaling_resume_work);
1831
1832 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1833 hba->host->host_no);
1834 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1835
1836 ufshcd_clkscaling_init_sysfs(hba);
1837}
1838
1839static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1840{
1841 if (!ufshcd_is_clkscaling_supported(hba))
1842 return;
1843
1844 destroy_workqueue(hba->clk_scaling.workq);
1845 ufshcd_devfreq_remove(hba);
1846}
1847
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001848static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1849{
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301850 char wq_name[sizeof("ufs_clk_gating_00")];
1851
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001852 if (!ufshcd_is_clkgating_allowed(hba))
1853 return;
1854
1855 hba->clk_gating.delay_ms = 150;
1856 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1857 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1858
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301859 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1860 hba->host->host_no);
1861 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1862 WQ_MEM_RECLAIM);
1863
Sahitya Tummalab4274112016-12-22 18:40:39 -08001864 hba->clk_gating.is_enabled = true;
1865
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001866 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1867 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1868 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1869 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
Sahitya Tummalab4274112016-12-22 18:40:39 -08001870 hba->clk_gating.delay_attr.attr.mode = 0644;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001871 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1872 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
Sahitya Tummalab4274112016-12-22 18:40:39 -08001873
1874 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1875 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1876 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1877 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1878 hba->clk_gating.enable_attr.attr.mode = 0644;
1879 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1880 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001881}
1882
1883static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1884{
1885 if (!ufshcd_is_clkgating_allowed(hba))
1886 return;
1887 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
Sahitya Tummalab4274112016-12-22 18:40:39 -08001888 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
Akinobu Mita97cd6802014-11-24 14:24:18 +09001889 cancel_work_sync(&hba->clk_gating.ungate_work);
1890 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
Vijay Viswanath10e5e372018-05-03 16:37:22 +05301891 destroy_workqueue(hba->clk_gating.clk_gating_workq);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03001892}
1893
Sahitya Tummala856b3482014-09-25 15:32:34 +03001894/* Must be called with host lock acquired */
1895static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1896{
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001897 bool queue_resume_work = false;
1898
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001899 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001900 return;
1901
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08001902 if (!hba->clk_scaling.active_reqs++)
1903 queue_resume_work = true;
1904
1905 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1906 return;
1907
1908 if (queue_resume_work)
1909 queue_work(hba->clk_scaling.workq,
1910 &hba->clk_scaling.resume_work);
1911
1912 if (!hba->clk_scaling.window_start_t) {
1913 hba->clk_scaling.window_start_t = jiffies;
1914 hba->clk_scaling.tot_busy_t = 0;
1915 hba->clk_scaling.is_busy_started = false;
1916 }
1917
Sahitya Tummala856b3482014-09-25 15:32:34 +03001918 if (!hba->clk_scaling.is_busy_started) {
1919 hba->clk_scaling.busy_start_t = ktime_get();
1920 hba->clk_scaling.is_busy_started = true;
1921 }
1922}
1923
1924static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1925{
1926 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1927
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08001928 if (!ufshcd_is_clkscaling_supported(hba))
Sahitya Tummala856b3482014-09-25 15:32:34 +03001929 return;
1930
1931 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1932 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1933 scaling->busy_start_t));
Thomas Gleixner8b0e1952016-12-25 12:30:41 +01001934 scaling->busy_start_t = 0;
Sahitya Tummala856b3482014-09-25 15:32:34 +03001935 scaling->is_busy_started = false;
1936 }
1937}
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301938/**
1939 * ufshcd_send_command - Send SCSI or device management commands
1940 * @hba: per adapter instance
1941 * @task_tag: Task tag of the command
1942 */
1943static inline
1944void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1945{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08001946 hba->lrb[task_tag].issue_time_stamp = ktime_get();
Zang Leigang09017182017-09-27 10:06:06 +08001947 hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
Bart Van Asscheeacf36f2019-12-24 14:02:46 -08001948 ufshcd_add_command_trace(hba, task_tag, "send");
Sahitya Tummala856b3482014-09-25 15:32:34 +03001949 ufshcd_clk_scaling_start_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301950 __set_bit(task_tag, &hba->outstanding_reqs);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05301951 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07001952 /* Make sure that doorbell is committed immediately */
1953 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301954}
1955
1956/**
1957 * ufshcd_copy_sense_data - Copy sense data in case of check condition
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001958 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301959 */
1960static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1961{
1962 int len;
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05301963 if (lrbp->sense_buffer &&
1964 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001965 int len_to_copy;
1966
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05301967 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
Avri Altman09a5a242018-11-22 20:04:56 +02001968 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07001969
Avri Altman09a5a242018-11-22 20:04:56 +02001970 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
1971 len_to_copy);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05301972 }
1973}
1974
1975/**
Dolev Raviv68078d52013-07-30 00:35:58 +05301976 * ufshcd_copy_query_response() - Copy the Query Response and the data
1977 * descriptor
1978 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08001979 * @lrbp: pointer to local reference block
Dolev Raviv68078d52013-07-30 00:35:58 +05301980 */
1981static
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001982int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Dolev Raviv68078d52013-07-30 00:35:58 +05301983{
1984 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1985
Dolev Raviv68078d52013-07-30 00:35:58 +05301986 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05301987
Dolev Raviv68078d52013-07-30 00:35:58 +05301988 /* Get the descriptor */
Avri Altman1c908362019-05-21 11:24:22 +03001989 if (hba->dev_cmd.query.descriptor &&
1990 lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03001991 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
Dolev Raviv68078d52013-07-30 00:35:58 +05301992 GENERAL_UPIU_REQUEST_SIZE;
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001993 u16 resp_len;
1994 u16 buf_len;
Dolev Raviv68078d52013-07-30 00:35:58 +05301995
1996 /* data segment length */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03001997 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
Dolev Raviv68078d52013-07-30 00:35:58 +05301998 MASK_QUERY_DATA_SEG_LEN;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03001999 buf_len = be16_to_cpu(
2000 hba->dev_cmd.query.request.upiu_req.length);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002001 if (likely(buf_len >= resp_len)) {
2002 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
2003 } else {
2004 dev_warn(hba->dev,
Bean Huo3d4881d2019-11-12 23:34:35 +01002005 "%s: rsp size %d is bigger than buffer size %d",
2006 __func__, resp_len, buf_len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002007 return -EINVAL;
2008 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302009 }
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002010
2011 return 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302012}
2013
2014/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302015 * ufshcd_hba_capabilities - Read controller capabilities
2016 * @hba: per adapter instance
2017 */
2018static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
2019{
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302020 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302021
2022 /* nutrs and nutmrs are 0 based values */
2023 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
2024 hba->nutmrs =
2025 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
2026}
2027
2028/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302029 * ufshcd_ready_for_uic_cmd - Check if controller is ready
2030 * to accept UIC commands
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302031 * @hba: per adapter instance
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302032 * Return true on success, else false
2033 */
2034static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
2035{
2036 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
2037 return true;
2038 else
2039 return false;
2040}
2041
2042/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05302043 * ufshcd_get_upmcrs - Get the power mode change request status
2044 * @hba: Pointer to adapter instance
2045 *
2046 * This function gets the UPMCRS field of HCS register
2047 * Returns value of UPMCRS field
2048 */
2049static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
2050{
2051 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
2052}
2053
2054/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302055 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
2056 * @hba: per adapter instance
2057 * @uic_cmd: UIC command
2058 *
2059 * Mutex must be held.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302060 */
2061static inline void
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302062ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302063{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302064 WARN_ON(hba->active_uic_cmd);
2065
2066 hba->active_uic_cmd = uic_cmd;
2067
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302068 /* Write Args */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302069 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2070 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2071 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302072
2073 /* Write UIC Cmd */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302074 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
Seungwon Jeonb873a2752013-06-26 22:39:26 +05302075 REG_UIC_COMMAND);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302076}
2077
2078/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302079 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2080 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002081 * @uic_cmd: UIC command
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302082 *
2083 * Must be called with mutex held.
2084 * Returns 0 only if success.
2085 */
2086static int
2087ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2088{
2089 int ret;
2090 unsigned long flags;
2091
2092 if (wait_for_completion_timeout(&uic_cmd->done,
2093 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2094 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2095 else
2096 ret = -ETIMEDOUT;
2097
2098 spin_lock_irqsave(hba->host->host_lock, flags);
2099 hba->active_uic_cmd = NULL;
2100 spin_unlock_irqrestore(hba->host->host_lock, flags);
2101
2102 return ret;
2103}
2104
2105/**
2106 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2107 * @hba: per adapter instance
2108 * @uic_cmd: UIC command
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002109 * @completion: initialize the completion only if this is set to true
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302110 *
2111 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002112 * with mutex held and host_lock locked.
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302113 * Returns 0 only if success.
2114 */
2115static int
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002116__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2117 bool completion)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302118{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302119 if (!ufshcd_ready_for_uic_cmd(hba)) {
2120 dev_err(hba->dev,
2121 "Controller not ready to accept UIC commands\n");
2122 return -EIO;
2123 }
2124
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002125 if (completion)
2126 init_completion(&uic_cmd->done);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302127
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302128 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302129
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002130 return 0;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302131}
2132
2133/**
2134 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2135 * @hba: per adapter instance
2136 * @uic_cmd: UIC command
2137 *
2138 * Returns 0 only if success.
2139 */
Avri Altmane77044c52018-10-07 17:30:39 +03002140int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302141{
2142 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002143 unsigned long flags;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302144
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002145 ufshcd_hold(hba, false);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302146 mutex_lock(&hba->uic_cmd_mutex);
Yaniv Gardicad2e032015-03-31 17:37:14 +03002147 ufshcd_add_delay_before_dme_cmd(hba);
2148
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002149 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02002150 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03002151 spin_unlock_irqrestore(hba->host->host_lock, flags);
2152 if (!ret)
2153 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2154
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302155 mutex_unlock(&hba->uic_cmd_mutex);
2156
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002157 ufshcd_release(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05302158 return ret;
2159}
2160
2161/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302162 * ufshcd_map_sg - Map scatter-gather list to prdt
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002163 * @hba: per adapter instance
2164 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302165 *
2166 * Returns 0 in case of success, non-zero value in case of failure
2167 */
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002168static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302169{
2170 struct ufshcd_sg_entry *prd_table;
2171 struct scatterlist *sg;
2172 struct scsi_cmnd *cmd;
2173 int sg_segments;
2174 int i;
2175
2176 cmd = lrbp->cmd;
2177 sg_segments = scsi_dma_map(cmd);
2178 if (sg_segments < 0)
2179 return sg_segments;
2180
2181 if (sg_segments) {
Christoph Hellwig492001992020-02-21 06:08:11 -08002182 lrbp->utr_descriptor_ptr->prd_table_length =
2183 cpu_to_le16((u16)sg_segments);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302184
2185 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2186
2187 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2188 prd_table[i].size =
2189 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2190 prd_table[i].base_addr =
2191 cpu_to_le32(lower_32_bits(sg->dma_address));
2192 prd_table[i].upper_addr =
2193 cpu_to_le32(upper_32_bits(sg->dma_address));
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002194 prd_table[i].reserved = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302195 }
2196 } else {
2197 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2198 }
2199
2200 return 0;
2201}
2202
2203/**
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302204 * ufshcd_enable_intr - enable interrupts
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302205 * @hba: per adapter instance
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302206 * @intrs: interrupt bits
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302207 */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302208static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302209{
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302210 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2211
2212 if (hba->ufs_version == UFSHCI_VERSION_10) {
2213 u32 rw;
2214 rw = set & INTERRUPT_MASK_RW_VER_10;
2215 set = rw | ((set ^ intrs) & intrs);
2216 } else {
2217 set |= intrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302218 }
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05302219
2220 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2221}
2222
2223/**
2224 * ufshcd_disable_intr - disable interrupts
2225 * @hba: per adapter instance
2226 * @intrs: interrupt bits
2227 */
2228static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2229{
2230 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2231
2232 if (hba->ufs_version == UFSHCI_VERSION_10) {
2233 u32 rw;
2234 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2235 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2236 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2237
2238 } else {
2239 set &= ~intrs;
2240 }
2241
2242 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302243}
2244
2245/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302246 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2247 * descriptor according to request
2248 * @lrbp: pointer to local reference block
2249 * @upiu_flags: flags required in the header
2250 * @cmd_dir: requests data direction
2251 */
2252static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
Joao Pinto300bb132016-05-11 12:21:27 +01002253 u32 *upiu_flags, enum dma_data_direction cmd_dir)
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302254{
2255 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2256 u32 data_direction;
2257 u32 dword_0;
2258
2259 if (cmd_dir == DMA_FROM_DEVICE) {
2260 data_direction = UTP_DEVICE_TO_HOST;
2261 *upiu_flags = UPIU_CMD_FLAGS_READ;
2262 } else if (cmd_dir == DMA_TO_DEVICE) {
2263 data_direction = UTP_HOST_TO_DEVICE;
2264 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2265 } else {
2266 data_direction = UTP_NO_DATA_TRANSFER;
2267 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2268 }
2269
2270 dword_0 = data_direction | (lrbp->command_type
2271 << UPIU_COMMAND_TYPE_OFFSET);
2272 if (lrbp->intr_cmd)
2273 dword_0 |= UTP_REQ_DESC_INT_CMD;
2274
2275 /* Transfer request descriptor header fields */
2276 req_desc->header.dword_0 = cpu_to_le32(dword_0);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002277 /* dword_1 is reserved, hence it is set to 0 */
2278 req_desc->header.dword_1 = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302279 /*
2280 * assigning invalid value for command status. Controller
2281 * updates OCS on command completion, with the command
2282 * status
2283 */
2284 req_desc->header.dword_2 =
2285 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002286 /* dword_3 is reserved, hence it is set to 0 */
2287 req_desc->header.dword_3 = 0;
Yaniv Gardi51047262016-02-01 15:02:38 +02002288
2289 req_desc->prd_table_length = 0;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302290}
2291
2292/**
2293 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2294 * for scsi commands
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002295 * @lrbp: local reference block pointer
2296 * @upiu_flags: flags
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302297 */
2298static
2299void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2300{
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002301 struct scsi_cmnd *cmd = lrbp->cmd;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302302 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002303 unsigned short cdb_len;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302304
2305 /* command descriptor fields */
2306 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2307 UPIU_TRANSACTION_COMMAND, upiu_flags,
2308 lrbp->lun, lrbp->task_tag);
2309 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2310 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2311
2312 /* Total EHS length and Data segment length will be zero */
2313 ucd_req_ptr->header.dword_2 = 0;
2314
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002315 ucd_req_ptr->sc.exp_data_transfer_len = cpu_to_be32(cmd->sdb.length);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302316
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002317 cdb_len = min_t(unsigned short, cmd->cmd_len, UFS_CDB_SIZE);
Avri Altmana851b2b2018-10-07 17:30:34 +03002318 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
Bart Van Assche1b21b8f2019-12-24 14:02:45 -08002319 memcpy(ucd_req_ptr->sc.cdb, cmd->cmnd, cdb_len);
Yaniv Gardi52ac95f2016-02-01 15:02:37 +02002320
2321 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302322}
2323
Dolev Raviv68078d52013-07-30 00:35:58 +05302324/**
2325 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2326 * for query requsts
2327 * @hba: UFS hba
2328 * @lrbp: local reference block pointer
2329 * @upiu_flags: flags
2330 */
2331static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2332 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2333{
2334 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2335 struct ufs_query *query = &hba->dev_cmd.query;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302336 u16 len = be16_to_cpu(query->request.upiu_req.length);
Dolev Raviv68078d52013-07-30 00:35:58 +05302337
2338 /* Query request header */
2339 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2340 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2341 lrbp->lun, lrbp->task_tag);
2342 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2343 0, query->request.query_func, 0, 0);
2344
Zang Leigang68612852016-08-25 17:39:19 +08002345 /* Data segment length only need for WRITE_DESC */
2346 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2347 ucd_req_ptr->header.dword_2 =
2348 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2349 else
2350 ucd_req_ptr->header.dword_2 = 0;
Dolev Raviv68078d52013-07-30 00:35:58 +05302351
2352 /* Copy the Query Request buffer as is */
2353 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2354 QUERY_OSF_SIZE);
Dolev Raviv68078d52013-07-30 00:35:58 +05302355
2356 /* Copy the Descriptor */
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002357 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
Avri Altman220d17a62018-10-07 17:30:36 +03002358 memcpy(ucd_req_ptr + 1, query->descriptor, len);
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002359
Yaniv Gardi51047262016-02-01 15:02:38 +02002360 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Dolev Raviv68078d52013-07-30 00:35:58 +05302361}
2362
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302363static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2364{
2365 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2366
2367 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2368
2369 /* command descriptor fields */
2370 ucd_req_ptr->header.dword_0 =
2371 UPIU_HEADER_DWORD(
2372 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
Yaniv Gardi51047262016-02-01 15:02:38 +02002373 /* clear rest of the fields of basic header */
2374 ucd_req_ptr->header.dword_1 = 0;
2375 ucd_req_ptr->header.dword_2 = 0;
2376
2377 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302378}
2379
2380/**
Joao Pinto300bb132016-05-11 12:21:27 +01002381 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2382 * for Device Management Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002383 * @hba: per adapter instance
2384 * @lrbp: pointer to local reference block
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302385 */
Joao Pinto300bb132016-05-11 12:21:27 +01002386static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302387{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302388 u32 upiu_flags;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302389 int ret = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302390
kehuanlin83dc7e32017-09-06 17:58:39 +08002391 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2392 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002393 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
kehuanlin83dc7e32017-09-06 17:58:39 +08002394 else
2395 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002396
2397 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2398 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2399 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2400 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2401 ufshcd_prepare_utp_nop_upiu(lrbp);
2402 else
2403 ret = -EINVAL;
2404
2405 return ret;
2406}
2407
2408/**
2409 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2410 * for SCSI Purposes
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002411 * @hba: per adapter instance
2412 * @lrbp: pointer to local reference block
Joao Pinto300bb132016-05-11 12:21:27 +01002413 */
2414static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2415{
2416 u32 upiu_flags;
2417 int ret = 0;
2418
kehuanlin83dc7e32017-09-06 17:58:39 +08002419 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2420 (hba->ufs_version == UFSHCI_VERSION_11))
Joao Pinto300bb132016-05-11 12:21:27 +01002421 lrbp->command_type = UTP_CMD_TYPE_SCSI;
kehuanlin83dc7e32017-09-06 17:58:39 +08002422 else
2423 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
Joao Pinto300bb132016-05-11 12:21:27 +01002424
2425 if (likely(lrbp->cmd)) {
2426 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2427 lrbp->cmd->sc_data_direction);
2428 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2429 } else {
2430 ret = -EINVAL;
2431 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302432
2433 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302434}
2435
2436/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002437 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002438 * @upiu_wlun_id: UPIU W-LUN id
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002439 *
2440 * Returns SCSI W-LUN id
2441 */
2442static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2443{
2444 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2445}
2446
Bart Van Assche4d2b8d42020-01-22 19:56:35 -08002447static void ufshcd_init_lrb(struct ufs_hba *hba, struct ufshcd_lrb *lrb, int i)
2448{
2449 struct utp_transfer_cmd_desc *cmd_descp = hba->ucdl_base_addr;
2450 struct utp_transfer_req_desc *utrdlp = hba->utrdl_base_addr;
2451 dma_addr_t cmd_desc_element_addr = hba->ucdl_dma_addr +
2452 i * sizeof(struct utp_transfer_cmd_desc);
2453 u16 response_offset = offsetof(struct utp_transfer_cmd_desc,
2454 response_upiu);
2455 u16 prdt_offset = offsetof(struct utp_transfer_cmd_desc, prd_table);
2456
2457 lrb->utr_descriptor_ptr = utrdlp + i;
2458 lrb->utrd_dma_addr = hba->utrdl_dma_addr +
2459 i * sizeof(struct utp_transfer_req_desc);
2460 lrb->ucd_req_ptr = (struct utp_upiu_req *)(cmd_descp + i);
2461 lrb->ucd_req_dma_addr = cmd_desc_element_addr;
2462 lrb->ucd_rsp_ptr = (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
2463 lrb->ucd_rsp_dma_addr = cmd_desc_element_addr + response_offset;
2464 lrb->ucd_prdt_ptr = (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
2465 lrb->ucd_prdt_dma_addr = cmd_desc_element_addr + prdt_offset;
2466}
2467
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03002468/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302469 * ufshcd_queuecommand - main entry point for SCSI requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002470 * @host: SCSI host pointer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302471 * @cmd: command from SCSI Midlayer
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302472 *
2473 * Returns 0 for success, non-zero in case of failure
2474 */
2475static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2476{
2477 struct ufshcd_lrb *lrbp;
2478 struct ufs_hba *hba;
2479 unsigned long flags;
2480 int tag;
2481 int err = 0;
2482
2483 hba = shost_priv(host);
2484
2485 tag = cmd->request->tag;
Yaniv Gardi14497322016-02-01 15:02:39 +02002486 if (!ufshcd_valid_tag(hba, tag)) {
2487 dev_err(hba->dev,
2488 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2489 __func__, tag, cmd, cmd->request);
2490 BUG();
2491 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302492
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002493 if (!down_read_trylock(&hba->clk_scaling_lock))
2494 return SCSI_MLQUEUE_HOST_BUSY;
2495
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302496 spin_lock_irqsave(hba->host->host_lock, flags);
2497 switch (hba->ufshcd_state) {
2498 case UFSHCD_STATE_OPERATIONAL:
2499 break;
Zang Leigang141f8162016-11-16 11:29:37 +08002500 case UFSHCD_STATE_EH_SCHEDULED:
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302501 case UFSHCD_STATE_RESET:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302502 err = SCSI_MLQUEUE_HOST_BUSY;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302503 goto out_unlock;
2504 case UFSHCD_STATE_ERROR:
2505 set_host_byte(cmd, DID_ERROR);
2506 cmd->scsi_done(cmd);
2507 goto out_unlock;
2508 default:
2509 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2510 __func__, hba->ufshcd_state);
2511 set_host_byte(cmd, DID_BAD_TARGET);
2512 cmd->scsi_done(cmd);
2513 goto out_unlock;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302514 }
Yaniv Gardi53c12d02016-02-01 15:02:45 +02002515
2516 /* if error handling is in progress, don't issue commands */
2517 if (ufshcd_eh_in_progress(hba)) {
2518 set_host_byte(cmd, DID_ERROR);
2519 cmd->scsi_done(cmd);
2520 goto out_unlock;
2521 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302522 spin_unlock_irqrestore(hba->host->host_lock, flags);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302523
Gilad Broner7fabb772017-02-03 16:56:50 -08002524 hba->req_abort_count = 0;
2525
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002526 err = ufshcd_hold(hba, true);
2527 if (err) {
2528 err = SCSI_MLQUEUE_HOST_BUSY;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002529 goto out;
2530 }
2531 WARN_ON(hba->clk_gating.state != CLKS_ON);
2532
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302533 lrbp = &hba->lrb[tag];
2534
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302535 WARN_ON(lrbp->cmd);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302536 lrbp->cmd = cmd;
Avri Altman09a5a242018-11-22 20:04:56 +02002537 lrbp->sense_bufflen = UFS_SENSE_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302538 lrbp->sense_buffer = cmd->sense_buffer;
2539 lrbp->task_tag = tag;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03002540 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
Yaniv Gardib8521902015-05-17 18:54:57 +03002541 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
Gilad Bronere0b299e2017-02-03 16:56:40 -08002542 lrbp->req_abort_skip = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302543
Joao Pinto300bb132016-05-11 12:21:27 +01002544 ufshcd_comp_scsi_upiu(hba, lrbp);
2545
Kiwoong Kim75b1cc42016-11-22 17:06:59 +09002546 err = ufshcd_map_sg(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302547 if (err) {
2548 lrbp->cmd = NULL;
Can Guo17c7d352019-12-05 02:14:33 +00002549 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302550 goto out;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302551 }
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002552 /* Make sure descriptors are ready before ringing the doorbell */
2553 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302554
2555 /* issue command to the controller */
2556 spin_lock_irqsave(hba->host->host_lock, flags);
Bart Van Assche5905d462020-01-22 19:56:36 -08002557 ufshcd_vops_setup_xfer_req(hba, tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302558 ufshcd_send_command(hba, tag);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05302559out_unlock:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302560 spin_unlock_irqrestore(hba->host->host_lock, flags);
2561out:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002562 up_read(&hba->clk_scaling_lock);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302563 return err;
2564}
2565
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302566static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2567 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2568{
2569 lrbp->cmd = NULL;
2570 lrbp->sense_bufflen = 0;
2571 lrbp->sense_buffer = NULL;
2572 lrbp->task_tag = tag;
2573 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302574 lrbp->intr_cmd = true; /* No interrupt aggregation */
2575 hba->dev_cmd.type = cmd_type;
2576
Joao Pinto300bb132016-05-11 12:21:27 +01002577 return ufshcd_comp_devman_upiu(hba, lrbp);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302578}
2579
2580static int
2581ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2582{
2583 int err = 0;
2584 unsigned long flags;
2585 u32 mask = 1 << tag;
2586
2587 /* clear outstanding transaction before retry */
2588 spin_lock_irqsave(hba->host->host_lock, flags);
2589 ufshcd_utrl_clear(hba, tag);
2590 spin_unlock_irqrestore(hba->host->host_lock, flags);
2591
2592 /*
2593 * wait for for h/w to clear corresponding bit in door-bell.
2594 * max. wait is 1 sec.
2595 */
2596 err = ufshcd_wait_for_register(hba,
2597 REG_UTP_TRANSFER_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02002598 mask, ~mask, 1000, 1000, true);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302599
2600 return err;
2601}
2602
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002603static int
2604ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2605{
2606 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2607
2608 /* Get the UPIU response */
2609 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2610 UPIU_RSP_CODE_OFFSET;
2611 return query_res->response;
2612}
2613
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302614/**
2615 * ufshcd_dev_cmd_completion() - handles device management command responses
2616 * @hba: per adapter instance
2617 * @lrbp: pointer to local reference block
2618 */
2619static int
2620ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2621{
2622 int resp;
2623 int err = 0;
2624
Dolev Ravivff8e20c2016-12-22 18:42:18 -08002625 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302626 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2627
2628 switch (resp) {
2629 case UPIU_TRANSACTION_NOP_IN:
2630 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2631 err = -EINVAL;
2632 dev_err(hba->dev, "%s: unexpected response %x\n",
2633 __func__, resp);
2634 }
2635 break;
Dolev Raviv68078d52013-07-30 00:35:58 +05302636 case UPIU_TRANSACTION_QUERY_RSP:
Dolev Ravivc6d4a832014-06-29 09:40:18 +03002637 err = ufshcd_check_query_response(hba, lrbp);
2638 if (!err)
2639 err = ufshcd_copy_query_response(hba, lrbp);
Dolev Raviv68078d52013-07-30 00:35:58 +05302640 break;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302641 case UPIU_TRANSACTION_REJECT_UPIU:
2642 /* TODO: handle Reject UPIU Response */
2643 err = -EPERM;
2644 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2645 __func__);
2646 break;
2647 default:
2648 err = -EINVAL;
2649 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2650 __func__, resp);
2651 break;
2652 }
2653
2654 return err;
2655}
2656
2657static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2658 struct ufshcd_lrb *lrbp, int max_timeout)
2659{
2660 int err = 0;
2661 unsigned long time_left;
2662 unsigned long flags;
2663
2664 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2665 msecs_to_jiffies(max_timeout));
2666
Gilad Bronerad1a1b92016-10-17 17:09:36 -07002667 /* Make sure descriptors are ready before ringing the doorbell */
2668 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302669 spin_lock_irqsave(hba->host->host_lock, flags);
2670 hba->dev_cmd.complete = NULL;
2671 if (likely(time_left)) {
2672 err = ufshcd_get_tr_ocs(lrbp);
2673 if (!err)
2674 err = ufshcd_dev_cmd_completion(hba, lrbp);
2675 }
2676 spin_unlock_irqrestore(hba->host->host_lock, flags);
2677
2678 if (!time_left) {
2679 err = -ETIMEDOUT;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002680 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2681 __func__, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302682 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
Yaniv Gardia48353f2016-02-01 15:02:40 +02002683 /* successfully cleared the command, retry if needed */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302684 err = -EAGAIN;
Yaniv Gardia48353f2016-02-01 15:02:40 +02002685 /*
2686 * in case of an error, after clearing the doorbell,
2687 * we also need to clear the outstanding_request
2688 * field in hba
2689 */
2690 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302691 }
2692
2693 return err;
2694}
2695
2696/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302697 * ufshcd_exec_dev_cmd - API for sending device management requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002698 * @hba: UFS hba
2699 * @cmd_type: specifies the type (NOP, Query...)
2700 * @timeout: time in seconds
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302701 *
Dolev Raviv68078d52013-07-30 00:35:58 +05302702 * NOTE: Since there is only one available tag for device management commands,
2703 * it is expected you hold the hba->dev_cmd.lock mutex.
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302704 */
2705static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2706 enum dev_cmd_type cmd_type, int timeout)
2707{
Bart Van Assche7252a362019-12-09 10:13:08 -08002708 struct request_queue *q = hba->cmd_queue;
2709 struct request *req;
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302710 struct ufshcd_lrb *lrbp;
2711 int err;
2712 int tag;
2713 struct completion wait;
2714 unsigned long flags;
2715
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002716 down_read(&hba->clk_scaling_lock);
2717
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302718 /*
2719 * Get free slot, sleep if slots are unavailable.
2720 * Even though we use wait_event() which sleeps indefinitely,
2721 * the maximum wait time is bounded by SCSI request timeout.
2722 */
Bart Van Assche7252a362019-12-09 10:13:08 -08002723 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03002724 if (IS_ERR(req)) {
2725 err = PTR_ERR(req);
2726 goto out_unlock;
2727 }
Bart Van Assche7252a362019-12-09 10:13:08 -08002728 tag = req->tag;
2729 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302730
2731 init_completion(&wait);
2732 lrbp = &hba->lrb[tag];
2733 WARN_ON(lrbp->cmd);
2734 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2735 if (unlikely(err))
2736 goto out_put_tag;
2737
2738 hba->dev_cmd.complete = &wait;
2739
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002740 ufshcd_add_query_upiu_trace(hba, tag, "query_send");
Yaniv Gardie3dfdc52016-02-01 15:02:49 +02002741 /* Make sure descriptors are ready before ringing the doorbell */
2742 wmb();
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302743 spin_lock_irqsave(hba->host->host_lock, flags);
Bart Van Assche5905d462020-01-22 19:56:36 -08002744 ufshcd_vops_setup_xfer_req(hba, tag, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302745 ufshcd_send_command(hba, tag);
2746 spin_unlock_irqrestore(hba->host->host_lock, flags);
2747
2748 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2749
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03002750 ufshcd_add_query_upiu_trace(hba, tag,
2751 err ? "query_complete_err" : "query_complete");
2752
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302753out_put_tag:
Bart Van Assche7252a362019-12-09 10:13:08 -08002754 blk_put_request(req);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03002755out_unlock:
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08002756 up_read(&hba->clk_scaling_lock);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05302757 return err;
2758}
2759
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05302760/**
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002761 * ufshcd_init_query() - init the query response and request parameters
2762 * @hba: per-adapter instance
2763 * @request: address of the request pointer to be initialized
2764 * @response: address of the response pointer to be initialized
2765 * @opcode: operation to perform
2766 * @idn: flag idn to access
2767 * @index: LU number to access
2768 * @selector: query/flag/descriptor further identification
2769 */
2770static inline void ufshcd_init_query(struct ufs_hba *hba,
2771 struct ufs_query_req **request, struct ufs_query_res **response,
2772 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2773{
2774 *request = &hba->dev_cmd.query.request;
2775 *response = &hba->dev_cmd.query.response;
2776 memset(*request, 0, sizeof(struct ufs_query_req));
2777 memset(*response, 0, sizeof(struct ufs_query_res));
2778 (*request)->upiu_req.opcode = opcode;
2779 (*request)->upiu_req.idn = idn;
2780 (*request)->upiu_req.index = index;
2781 (*request)->upiu_req.selector = selector;
2782}
2783
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002784static int ufshcd_query_flag_retry(struct ufs_hba *hba,
Stanley Chu1f34eed2020-05-08 16:01:12 +08002785 enum query_opcode opcode, enum flag_idn idn, u8 index, bool *flag_res)
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002786{
2787 int ret;
2788 int retries;
2789
2790 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
Stanley Chu1f34eed2020-05-08 16:01:12 +08002791 ret = ufshcd_query_flag(hba, opcode, idn, index, flag_res);
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002792 if (ret)
2793 dev_dbg(hba->dev,
2794 "%s: failed with error %d, retries %d\n",
2795 __func__, ret, retries);
2796 else
2797 break;
2798 }
2799
2800 if (ret)
2801 dev_err(hba->dev,
2802 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2803 __func__, opcode, idn, ret, retries);
2804 return ret;
2805}
2806
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002807/**
Dolev Raviv68078d52013-07-30 00:35:58 +05302808 * ufshcd_query_flag() - API function for sending flag query requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002809 * @hba: per-adapter instance
2810 * @opcode: flag query to perform
2811 * @idn: flag idn to access
Stanley Chu1f34eed2020-05-08 16:01:12 +08002812 * @index: flag index to access
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002813 * @flag_res: the flag value after the query request completes
Dolev Raviv68078d52013-07-30 00:35:58 +05302814 *
2815 * Returns 0 for success, non-zero in case of failure
2816 */
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02002817int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
Stanley Chu1f34eed2020-05-08 16:01:12 +08002818 enum flag_idn idn, u8 index, bool *flag_res)
Dolev Raviv68078d52013-07-30 00:35:58 +05302819{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002820 struct ufs_query_req *request = NULL;
2821 struct ufs_query_res *response = NULL;
Stanley Chu1f34eed2020-05-08 16:01:12 +08002822 int err, selector = 0;
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002823 int timeout = QUERY_REQ_TIMEOUT;
Dolev Raviv68078d52013-07-30 00:35:58 +05302824
2825 BUG_ON(!hba);
2826
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002827 ufshcd_hold(hba, false);
Dolev Raviv68078d52013-07-30 00:35:58 +05302828 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002829 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2830 selector);
Dolev Raviv68078d52013-07-30 00:35:58 +05302831
2832 switch (opcode) {
2833 case UPIU_QUERY_OPCODE_SET_FLAG:
2834 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2835 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2836 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2837 break;
2838 case UPIU_QUERY_OPCODE_READ_FLAG:
2839 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2840 if (!flag_res) {
2841 /* No dummy reads */
2842 dev_err(hba->dev, "%s: Invalid argument for read request\n",
2843 __func__);
2844 err = -EINVAL;
2845 goto out_unlock;
2846 }
2847 break;
2848 default:
2849 dev_err(hba->dev,
2850 "%s: Expected query flag opcode but got = %d\n",
2851 __func__, opcode);
2852 err = -EINVAL;
2853 goto out_unlock;
2854 }
Dolev Raviv68078d52013-07-30 00:35:58 +05302855
Yaniv Gardie5ad4062016-02-01 15:02:41 +02002856 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
Dolev Raviv68078d52013-07-30 00:35:58 +05302857
2858 if (err) {
2859 dev_err(hba->dev,
2860 "%s: Sending flag query for idn %d failed, err = %d\n",
2861 __func__, idn, err);
2862 goto out_unlock;
2863 }
2864
2865 if (flag_res)
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302866 *flag_res = (be32_to_cpu(response->upiu_res.value) &
Dolev Raviv68078d52013-07-30 00:35:58 +05302867 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2868
2869out_unlock:
2870 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002871 ufshcd_release(hba);
Dolev Raviv68078d52013-07-30 00:35:58 +05302872 return err;
2873}
2874
2875/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302876 * ufshcd_query_attr - API function for sending attribute requests
Bart Van Assche8aa29f12018-03-01 15:07:20 -08002877 * @hba: per-adapter instance
2878 * @opcode: attribute opcode
2879 * @idn: attribute idn to access
2880 * @index: index field
2881 * @selector: selector field
2882 * @attr_val: the attribute value after the query request completes
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302883 *
2884 * Returns 0 for success, non-zero in case of failure
2885*/
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02002886int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2887 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302888{
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002889 struct ufs_query_req *request = NULL;
2890 struct ufs_query_res *response = NULL;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302891 int err;
2892
2893 BUG_ON(!hba);
2894
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002895 ufshcd_hold(hba, false);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302896 if (!attr_val) {
2897 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2898 __func__, opcode);
2899 err = -EINVAL;
2900 goto out;
2901 }
2902
2903 mutex_lock(&hba->dev_cmd.lock);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002904 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2905 selector);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302906
2907 switch (opcode) {
2908 case UPIU_QUERY_OPCODE_WRITE_ATTR:
2909 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302910 request->upiu_req.value = cpu_to_be32(*attr_val);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302911 break;
2912 case UPIU_QUERY_OPCODE_READ_ATTR:
2913 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2914 break;
2915 default:
2916 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2917 __func__, opcode);
2918 err = -EINVAL;
2919 goto out_unlock;
2920 }
2921
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002922 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302923
2924 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08002925 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2926 __func__, opcode, idn, index, err);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302927 goto out_unlock;
2928 }
2929
Sujit Reddy Thummae8c8e822014-05-26 10:59:10 +05302930 *attr_val = be32_to_cpu(response->upiu_res.value);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302931
2932out_unlock:
2933 mutex_unlock(&hba->dev_cmd.lock);
2934out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002935 ufshcd_release(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05302936 return err;
2937}
2938
2939/**
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02002940 * ufshcd_query_attr_retry() - API function for sending query
2941 * attribute with retries
2942 * @hba: per-adapter instance
2943 * @opcode: attribute opcode
2944 * @idn: attribute idn to access
2945 * @index: index field
2946 * @selector: selector field
2947 * @attr_val: the attribute value after the query request
2948 * completes
2949 *
2950 * Returns 0 for success, non-zero in case of failure
2951*/
2952static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2953 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2954 u32 *attr_val)
2955{
2956 int ret = 0;
2957 u32 retries;
2958
Bart Van Assche68c9fcf2019-12-24 14:02:43 -08002959 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02002960 ret = ufshcd_query_attr(hba, opcode, idn, index,
2961 selector, attr_val);
2962 if (ret)
2963 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2964 __func__, ret, retries);
2965 else
2966 break;
2967 }
2968
2969 if (ret)
2970 dev_err(hba->dev,
2971 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2972 __func__, idn, ret, QUERY_REQ_RETRIES);
2973 return ret;
2974}
2975
Yaniv Gardia70e91b2016-03-10 17:37:14 +02002976static int __ufshcd_query_descriptor(struct ufs_hba *hba,
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002977 enum query_opcode opcode, enum desc_idn idn, u8 index,
2978 u8 selector, u8 *desc_buf, int *buf_len)
2979{
2980 struct ufs_query_req *request = NULL;
2981 struct ufs_query_res *response = NULL;
2982 int err;
2983
2984 BUG_ON(!hba);
2985
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03002986 ufshcd_hold(hba, false);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002987 if (!desc_buf) {
2988 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2989 __func__, opcode);
2990 err = -EINVAL;
2991 goto out;
2992 }
2993
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00002994 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
Dolev Ravivd44a5f92014-06-29 09:40:17 +03002995 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2996 __func__, *buf_len);
2997 err = -EINVAL;
2998 goto out;
2999 }
3000
3001 mutex_lock(&hba->dev_cmd.lock);
3002 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
3003 selector);
3004 hba->dev_cmd.query.descriptor = desc_buf;
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03003005 request->upiu_req.length = cpu_to_be16(*buf_len);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003006
3007 switch (opcode) {
3008 case UPIU_QUERY_OPCODE_WRITE_DESC:
3009 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
3010 break;
3011 case UPIU_QUERY_OPCODE_READ_DESC:
3012 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
3013 break;
3014 default:
3015 dev_err(hba->dev,
3016 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
3017 __func__, opcode);
3018 err = -EINVAL;
3019 goto out_unlock;
3020 }
3021
3022 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
3023
3024 if (err) {
Yaniv Gardi4b761b52016-11-23 16:31:18 -08003025 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
3026 __func__, opcode, idn, index, err);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003027 goto out_unlock;
3028 }
3029
Sujit Reddy Thummaea2aab22014-07-23 09:31:12 +03003030 *buf_len = be16_to_cpu(response->upiu_res.length);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003031
3032out_unlock:
Bean Huocfcbae32019-11-12 23:34:36 +01003033 hba->dev_cmd.query.descriptor = NULL;
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003034 mutex_unlock(&hba->dev_cmd.lock);
3035out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003036 ufshcd_release(hba);
Dolev Ravivd44a5f92014-06-29 09:40:17 +03003037 return err;
3038}
3039
3040/**
Bart Van Assche8aa29f12018-03-01 15:07:20 -08003041 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
3042 * @hba: per-adapter instance
3043 * @opcode: attribute opcode
3044 * @idn: attribute idn to access
3045 * @index: index field
3046 * @selector: selector field
3047 * @desc_buf: the buffer that contains the descriptor
3048 * @buf_len: length parameter passed to the device
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003049 *
3050 * Returns 0 for success, non-zero in case of failure.
3051 * The buf_len parameter will contain, on return, the length parameter
3052 * received on the response.
3053 */
Stanislav Nijnikov2238d312018-02-15 14:14:07 +02003054int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3055 enum query_opcode opcode,
3056 enum desc_idn idn, u8 index,
3057 u8 selector,
3058 u8 *desc_buf, int *buf_len)
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003059{
3060 int err;
3061 int retries;
3062
3063 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3064 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3065 selector, desc_buf, buf_len);
3066 if (!err || err == -EINVAL)
3067 break;
3068 }
3069
3070 return err;
3071}
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003072
3073/**
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003074 * ufshcd_read_desc_length - read the specified descriptor length from header
3075 * @hba: Pointer to adapter instance
3076 * @desc_id: descriptor idn value
3077 * @desc_index: descriptor index
3078 * @desc_length: pointer to variable to read the length of descriptor
3079 *
3080 * Return 0 in case of success, non-zero otherwise
3081 */
3082static int ufshcd_read_desc_length(struct ufs_hba *hba,
3083 enum desc_idn desc_id,
3084 int desc_index,
3085 int *desc_length)
3086{
3087 int ret;
3088 u8 header[QUERY_DESC_HDR_SIZE];
3089 int header_len = QUERY_DESC_HDR_SIZE;
3090
3091 if (desc_id >= QUERY_DESC_IDN_MAX)
3092 return -EINVAL;
3093
3094 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3095 desc_id, desc_index, 0, header,
3096 &header_len);
3097
3098 if (ret) {
3099 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
3100 __func__, desc_id);
3101 return ret;
3102 } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
3103 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
3104 __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3105 desc_id);
3106 ret = -EINVAL;
3107 }
3108
3109 *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3110 return ret;
3111
3112}
3113
3114/**
3115 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3116 * @hba: Pointer to adapter instance
3117 * @desc_id: descriptor idn value
3118 * @desc_len: mapped desc length (out)
3119 *
3120 * Return 0 in case of success, non-zero otherwise
3121 */
3122int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3123 enum desc_idn desc_id, int *desc_len)
3124{
3125 switch (desc_id) {
3126 case QUERY_DESC_IDN_DEVICE:
3127 *desc_len = hba->desc_size.dev_desc;
3128 break;
3129 case QUERY_DESC_IDN_POWER:
3130 *desc_len = hba->desc_size.pwr_desc;
3131 break;
3132 case QUERY_DESC_IDN_GEOMETRY:
3133 *desc_len = hba->desc_size.geom_desc;
3134 break;
3135 case QUERY_DESC_IDN_CONFIGURATION:
3136 *desc_len = hba->desc_size.conf_desc;
3137 break;
3138 case QUERY_DESC_IDN_UNIT:
3139 *desc_len = hba->desc_size.unit_desc;
3140 break;
3141 case QUERY_DESC_IDN_INTERCONNECT:
3142 *desc_len = hba->desc_size.interc_desc;
3143 break;
3144 case QUERY_DESC_IDN_STRING:
3145 *desc_len = QUERY_DESC_MAX_SIZE;
3146 break;
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02003147 case QUERY_DESC_IDN_HEALTH:
3148 *desc_len = hba->desc_size.hlth_desc;
3149 break;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003150 case QUERY_DESC_IDN_RFU_0:
3151 case QUERY_DESC_IDN_RFU_1:
3152 *desc_len = 0;
3153 break;
3154 default:
3155 *desc_len = 0;
3156 return -EINVAL;
3157 }
3158 return 0;
3159}
3160EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3161
3162/**
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003163 * ufshcd_read_desc_param - read the specified descriptor parameter
3164 * @hba: Pointer to adapter instance
3165 * @desc_id: descriptor idn value
3166 * @desc_index: descriptor index
3167 * @param_offset: offset of the parameter to read
3168 * @param_read_buf: pointer to buffer where parameter would be read
3169 * @param_size: sizeof(param_read_buf)
3170 *
3171 * Return 0 in case of success, non-zero otherwise
3172 */
Stanislav Nijnikov45bced82018-02-15 14:14:02 +02003173int ufshcd_read_desc_param(struct ufs_hba *hba,
3174 enum desc_idn desc_id,
3175 int desc_index,
3176 u8 param_offset,
3177 u8 *param_read_buf,
3178 u8 param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003179{
3180 int ret;
3181 u8 *desc_buf;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003182 int buff_len;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003183 bool is_kmalloc = true;
3184
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003185 /* Safety check */
3186 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003187 return -EINVAL;
3188
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003189 /* Get the max length of descriptor from structure filled up at probe
3190 * time.
3191 */
3192 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003193
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003194 /* Sanity checks */
3195 if (ret || !buff_len) {
3196 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3197 __func__);
3198 return ret;
3199 }
3200
3201 /* Check whether we need temp memory */
3202 if (param_offset != 0 || param_size < buff_len) {
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003203 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3204 if (!desc_buf)
3205 return -ENOMEM;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003206 } else {
3207 desc_buf = param_read_buf;
3208 is_kmalloc = false;
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003209 }
3210
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003211 /* Request for full descriptor */
Yaniv Gardia70e91b2016-03-10 17:37:14 +02003212 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003213 desc_id, desc_index, 0,
3214 desc_buf, &buff_len);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003215
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003216 if (ret) {
3217 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3218 __func__, desc_id, desc_index, param_offset, ret);
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003219 goto out;
3220 }
3221
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003222 /* Sanity check */
3223 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3224 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3225 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3226 ret = -EINVAL;
3227 goto out;
3228 }
3229
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00003230 /* Check wherher we will not copy more data, than available */
3231 if (is_kmalloc && param_size > buff_len)
3232 param_size = buff_len;
subhashj@codeaurora.orgbde44bb2016-11-23 16:31:41 -08003233
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003234 if (is_kmalloc)
3235 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3236out:
3237 if (is_kmalloc)
3238 kfree(desc_buf);
3239 return ret;
3240}
3241
3242static inline int ufshcd_read_desc(struct ufs_hba *hba,
3243 enum desc_idn desc_id,
3244 int desc_index,
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003245 void *buf,
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003246 u32 size)
3247{
3248 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3249}
3250
Yaniv Gardib573d482016-03-10 17:37:09 +02003251
3252/**
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003253 * struct uc_string_id - unicode string
3254 *
3255 * @len: size of this descriptor inclusive
3256 * @type: descriptor type
3257 * @uc: unicode string character
3258 */
3259struct uc_string_id {
3260 u8 len;
3261 u8 type;
Gustavo A. R. Silvaec38c0a2020-05-07 14:25:50 -05003262 wchar_t uc[];
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003263} __packed;
3264
3265/* replace non-printable or non-ASCII characters with spaces */
3266static inline char ufshcd_remove_non_printable(u8 ch)
3267{
3268 return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3269}
3270
3271/**
Yaniv Gardib573d482016-03-10 17:37:09 +02003272 * ufshcd_read_string_desc - read string descriptor
3273 * @hba: pointer to adapter instance
3274 * @desc_index: descriptor index
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003275 * @buf: pointer to buffer where descriptor would be read,
3276 * the caller should free the memory.
Yaniv Gardib573d482016-03-10 17:37:09 +02003277 * @ascii: if true convert from unicode to ascii characters
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003278 * null terminated string.
Yaniv Gardib573d482016-03-10 17:37:09 +02003279 *
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003280 * Return:
3281 * * string size on success.
3282 * * -ENOMEM: on allocation failure
3283 * * -EINVAL: on a wrong parameter
Yaniv Gardib573d482016-03-10 17:37:09 +02003284 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003285int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3286 u8 **buf, bool ascii)
Yaniv Gardib573d482016-03-10 17:37:09 +02003287{
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003288 struct uc_string_id *uc_str;
3289 u8 *str;
3290 int ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003291
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003292 if (!buf)
3293 return -EINVAL;
Yaniv Gardib573d482016-03-10 17:37:09 +02003294
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003295 uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3296 if (!uc_str)
3297 return -ENOMEM;
3298
3299 ret = ufshcd_read_desc(hba, QUERY_DESC_IDN_STRING,
3300 desc_index, uc_str,
3301 QUERY_DESC_MAX_SIZE);
3302 if (ret < 0) {
3303 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3304 QUERY_REQ_RETRIES, ret);
3305 str = NULL;
3306 goto out;
3307 }
3308
3309 if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3310 dev_dbg(hba->dev, "String Desc is of zero length\n");
3311 str = NULL;
3312 ret = 0;
Yaniv Gardib573d482016-03-10 17:37:09 +02003313 goto out;
3314 }
3315
3316 if (ascii) {
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003317 ssize_t ascii_len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003318 int i;
Yaniv Gardib573d482016-03-10 17:37:09 +02003319 /* remove header and divide by 2 to move from UTF16 to UTF8 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003320 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3321 str = kzalloc(ascii_len, GFP_KERNEL);
3322 if (!str) {
3323 ret = -ENOMEM;
Tiezhu Yangfcbefc32016-06-25 12:35:22 +08003324 goto out;
Yaniv Gardib573d482016-03-10 17:37:09 +02003325 }
3326
3327 /*
3328 * the descriptor contains string in UTF16 format
3329 * we need to convert to utf-8 so it can be displayed
3330 */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003331 ret = utf16s_to_utf8s(uc_str->uc,
3332 uc_str->len - QUERY_DESC_HDR_SIZE,
3333 UTF16_BIG_ENDIAN, str, ascii_len);
Yaniv Gardib573d482016-03-10 17:37:09 +02003334
3335 /* replace non-printable or non-ASCII characters with spaces */
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003336 for (i = 0; i < ret; i++)
3337 str[i] = ufshcd_remove_non_printable(str[i]);
Yaniv Gardib573d482016-03-10 17:37:09 +02003338
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003339 str[ret++] = '\0';
3340
3341 } else {
YueHaibing5f577042019-08-31 12:44:24 +00003342 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003343 if (!str) {
3344 ret = -ENOMEM;
3345 goto out;
3346 }
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003347 ret = uc_str->len;
Yaniv Gardib573d482016-03-10 17:37:09 +02003348 }
3349out:
Tomas Winkler4b828fe2019-07-30 08:55:17 +03003350 *buf = str;
3351 kfree(uc_str);
3352 return ret;
Yaniv Gardib573d482016-03-10 17:37:09 +02003353}
Yaniv Gardib573d482016-03-10 17:37:09 +02003354
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003355/**
3356 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3357 * @hba: Pointer to adapter instance
3358 * @lun: lun id
3359 * @param_offset: offset of the parameter to read
3360 * @param_read_buf: pointer to buffer where parameter would be read
3361 * @param_size: sizeof(param_read_buf)
3362 *
3363 * Return 0 in case of success, non-zero otherwise
3364 */
3365static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3366 int lun,
3367 enum unit_desc_param param_offset,
3368 u8 *param_read_buf,
3369 u32 param_size)
3370{
3371 /*
3372 * Unit descriptors are only available for general purpose LUs (LUN id
3373 * from 0 to 7) and RPMB Well known LU.
3374 */
Bean Huo1baa8012020-01-20 14:08:20 +01003375 if (!ufs_is_valid_unit_desc_lun(&hba->dev_info, lun))
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003376 return -EOPNOTSUPP;
3377
3378 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3379 param_offset, param_read_buf, param_size);
3380}
3381
Can Guo09f17792020-02-10 19:40:49 -08003382static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
3383{
3384 int err = 0;
3385 u32 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3386
3387 if (hba->dev_info.wspecversion >= 0x300) {
3388 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
3389 QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, 0, 0,
3390 &gating_wait);
3391 if (err)
3392 dev_err(hba->dev, "Failed reading bRefClkGatingWait. err = %d, use default %uus\n",
3393 err, gating_wait);
3394
3395 if (gating_wait == 0) {
3396 gating_wait = UFSHCD_REF_CLK_GATING_WAIT_US;
3397 dev_err(hba->dev, "Undefined ref clk gating wait time, use default %uus\n",
3398 gating_wait);
3399 }
3400
3401 hba->dev_info.clk_gating_wait_us = gating_wait;
3402 }
3403
3404 return err;
3405}
3406
Subhash Jadavanida461ce2014-09-25 15:32:25 +03003407/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303408 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3409 * @hba: per adapter instance
3410 *
3411 * 1. Allocate DMA memory for Command Descriptor array
3412 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3413 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3414 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3415 * (UTMRDL)
3416 * 4. Allocate memory for local reference block(lrb).
3417 *
3418 * Returns 0 for success, non-zero in case of failure
3419 */
3420static int ufshcd_memory_alloc(struct ufs_hba *hba)
3421{
3422 size_t utmrdl_size, utrdl_size, ucdl_size;
3423
3424 /* Allocate memory for UTP command descriptors */
3425 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003426 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3427 ucdl_size,
3428 &hba->ucdl_dma_addr,
3429 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303430
3431 /*
3432 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3433 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3434 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3435 * be aligned to 128 bytes as well
3436 */
3437 if (!hba->ucdl_base_addr ||
3438 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303439 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303440 "Command Descriptor Memory allocation failed\n");
3441 goto out;
3442 }
3443
3444 /*
3445 * Allocate memory for UTP Transfer descriptors
3446 * UFSHCI requires 1024 byte alignment of UTRD
3447 */
3448 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
Seungwon Jeon2953f852013-06-27 13:31:54 +09003449 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3450 utrdl_size,
3451 &hba->utrdl_dma_addr,
3452 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303453 if (!hba->utrdl_base_addr ||
3454 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303455 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303456 "Transfer Descriptor Memory allocation failed\n");
3457 goto out;
3458 }
3459
3460 /*
3461 * Allocate memory for UTP Task Management descriptors
3462 * UFSHCI requires 1024 byte alignment of UTMRD
3463 */
3464 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
Seungwon Jeon2953f852013-06-27 13:31:54 +09003465 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3466 utmrdl_size,
3467 &hba->utmrdl_dma_addr,
3468 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303469 if (!hba->utmrdl_base_addr ||
3470 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303471 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303472 "Task Management Descriptor Memory allocation failed\n");
3473 goto out;
3474 }
3475
3476 /* Allocate memory for local reference block */
Kees Cooka86854d2018-06-12 14:07:58 -07003477 hba->lrb = devm_kcalloc(hba->dev,
3478 hba->nutrs, sizeof(struct ufshcd_lrb),
Seungwon Jeon2953f852013-06-27 13:31:54 +09003479 GFP_KERNEL);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303480 if (!hba->lrb) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05303481 dev_err(hba->dev, "LRB Memory allocation failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303482 goto out;
3483 }
3484 return 0;
3485out:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303486 return -ENOMEM;
3487}
3488
3489/**
3490 * ufshcd_host_memory_configure - configure local reference block with
3491 * memory offsets
3492 * @hba: per adapter instance
3493 *
3494 * Configure Host memory space
3495 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3496 * address.
3497 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3498 * and PRDT offset.
3499 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3500 * into local reference block.
3501 */
3502static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3503{
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303504 struct utp_transfer_req_desc *utrdlp;
3505 dma_addr_t cmd_desc_dma_addr;
3506 dma_addr_t cmd_desc_element_addr;
3507 u16 response_offset;
3508 u16 prdt_offset;
3509 int cmd_desc_size;
3510 int i;
3511
3512 utrdlp = hba->utrdl_base_addr;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303513
3514 response_offset =
3515 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3516 prdt_offset =
3517 offsetof(struct utp_transfer_cmd_desc, prd_table);
3518
3519 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3520 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3521
3522 for (i = 0; i < hba->nutrs; i++) {
3523 /* Configure UTRD with command descriptor base address */
3524 cmd_desc_element_addr =
3525 (cmd_desc_dma_addr + (cmd_desc_size * i));
3526 utrdlp[i].command_desc_base_addr_lo =
3527 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3528 utrdlp[i].command_desc_base_addr_hi =
3529 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3530
3531 /* Response upiu and prdt offset should be in double words */
Christoph Hellwig492001992020-02-21 06:08:11 -08003532 utrdlp[i].response_upiu_offset =
3533 cpu_to_le16(response_offset >> 2);
3534 utrdlp[i].prd_table_offset = cpu_to_le16(prdt_offset >> 2);
3535 utrdlp[i].response_upiu_length =
3536 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303537
Bart Van Assche4d2b8d42020-01-22 19:56:35 -08003538 ufshcd_init_lrb(hba, &hba->lrb[i], i);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303539 }
3540}
3541
3542/**
3543 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3544 * @hba: per adapter instance
3545 *
3546 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3547 * in order to initialize the Unipro link startup procedure.
3548 * Once the Unipro links are up, the device connected to the controller
3549 * is detected.
3550 *
3551 * Returns 0 on success, non-zero value on failure
3552 */
3553static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3554{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303555 struct uic_command uic_cmd = {0};
3556 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303557
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303558 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3559
3560 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3561 if (ret)
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003562 dev_dbg(hba->dev,
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05303563 "dme-link-startup: error code %d\n", ret);
3564 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303565}
3566
Yaniv Gardicad2e032015-03-31 17:37:14 +03003567static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3568{
3569 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3570 unsigned long min_sleep_time_us;
3571
3572 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3573 return;
3574
3575 /*
3576 * last_dme_cmd_tstamp will be 0 only for 1st call to
3577 * this function
3578 */
3579 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3580 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3581 } else {
3582 unsigned long delta =
3583 (unsigned long) ktime_to_us(
3584 ktime_sub(ktime_get(),
3585 hba->last_dme_cmd_tstamp));
3586
3587 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3588 min_sleep_time_us =
3589 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3590 else
3591 return; /* no more delay required */
3592 }
3593
3594 /* allow sleep for extra 50us if needed */
3595 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3596}
3597
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05303598/**
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303599 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3600 * @hba: per adapter instance
3601 * @attr_sel: uic command argument1
3602 * @attr_set: attribute set type as uic command argument2
3603 * @mib_val: setting value as uic command argument3
3604 * @peer: indicate whether peer or local
3605 *
3606 * Returns 0 on success, non-zero value on failure
3607 */
3608int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3609 u8 attr_set, u32 mib_val, u8 peer)
3610{
3611 struct uic_command uic_cmd = {0};
3612 static const char *const action[] = {
3613 "dme-set",
3614 "dme-peer-set"
3615 };
3616 const char *set = action[!!peer];
3617 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003618 int retries = UFS_UIC_COMMAND_RETRIES;
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303619
3620 uic_cmd.command = peer ?
3621 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3622 uic_cmd.argument1 = attr_sel;
3623 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3624 uic_cmd.argument3 = mib_val;
3625
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003626 do {
3627 /* for peer attributes we retry upon failure */
3628 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3629 if (ret)
3630 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3631 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3632 } while (ret && peer && --retries);
3633
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003634 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003635 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003636 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3637 UFS_UIC_COMMAND_RETRIES - retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303638
3639 return ret;
3640}
3641EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3642
3643/**
3644 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3645 * @hba: per adapter instance
3646 * @attr_sel: uic command argument1
3647 * @mib_val: the value of the attribute as returned by the UIC command
3648 * @peer: indicate whether peer or local
3649 *
3650 * Returns 0 on success, non-zero value on failure
3651 */
3652int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3653 u32 *mib_val, u8 peer)
3654{
3655 struct uic_command uic_cmd = {0};
3656 static const char *const action[] = {
3657 "dme-get",
3658 "dme-peer-get"
3659 };
3660 const char *get = action[!!peer];
3661 int ret;
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003662 int retries = UFS_UIC_COMMAND_RETRIES;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003663 struct ufs_pa_layer_attr orig_pwr_info;
3664 struct ufs_pa_layer_attr temp_pwr_info;
3665 bool pwr_mode_change = false;
3666
3667 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3668 orig_pwr_info = hba->pwr_info;
3669 temp_pwr_info = orig_pwr_info;
3670
3671 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3672 orig_pwr_info.pwr_rx == FAST_MODE) {
3673 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3674 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3675 pwr_mode_change = true;
3676 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3677 orig_pwr_info.pwr_rx == SLOW_MODE) {
3678 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3679 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3680 pwr_mode_change = true;
3681 }
3682 if (pwr_mode_change) {
3683 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3684 if (ret)
3685 goto out;
3686 }
3687 }
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303688
3689 uic_cmd.command = peer ?
3690 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3691 uic_cmd.argument1 = attr_sel;
3692
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003693 do {
3694 /* for peer attributes we retry upon failure */
3695 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3696 if (ret)
3697 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3698 get, UIC_GET_ATTR_ID(attr_sel), ret);
3699 } while (ret && peer && --retries);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303700
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003701 if (ret)
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003702 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
Yaniv Gardif37e9f82016-11-23 16:32:49 -08003703 get, UIC_GET_ATTR_ID(attr_sel),
3704 UFS_UIC_COMMAND_RETRIES - retries);
Yaniv Gardi64238fb2016-02-01 15:02:43 +02003705
3706 if (mib_val && !ret)
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303707 *mib_val = uic_cmd.argument3;
Yaniv Gardi874237f2015-05-17 18:55:03 +03003708
3709 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3710 && pwr_mode_change)
3711 ufshcd_change_power_mode(hba, &orig_pwr_info);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05303712out:
3713 return ret;
3714}
3715EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3716
3717/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003718 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3719 * state) and waits for it to take effect.
3720 *
3721 * @hba: per adapter instance
3722 * @cmd: UIC command to execute
3723 *
3724 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3725 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3726 * and device UniPro link and hence it's final completion would be indicated by
3727 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3728 * addition to normal UIC command completion Status (UCCS). This function only
3729 * returns after the relevant status bits indicate the completion.
3730 *
3731 * Returns 0 on success, non-zero value on failure
3732 */
3733static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3734{
3735 struct completion uic_async_done;
3736 unsigned long flags;
3737 u8 status;
3738 int ret;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003739 bool reenable_intr = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003740
3741 mutex_lock(&hba->uic_cmd_mutex);
3742 init_completion(&uic_async_done);
Yaniv Gardicad2e032015-03-31 17:37:14 +03003743 ufshcd_add_delay_before_dme_cmd(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003744
3745 spin_lock_irqsave(hba->host->host_lock, flags);
3746 hba->uic_async_done = &uic_async_done;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003747 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3748 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3749 /*
3750 * Make sure UIC command completion interrupt is disabled before
3751 * issuing UIC command.
3752 */
3753 wmb();
3754 reenable_intr = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003755 }
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003756 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3757 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003758 if (ret) {
3759 dev_err(hba->dev,
3760 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3761 cmd->command, cmd->argument3, ret);
3762 goto out;
3763 }
3764
3765 if (!wait_for_completion_timeout(hba->uic_async_done,
3766 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3767 dev_err(hba->dev,
3768 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3769 cmd->command, cmd->argument3);
3770 ret = -ETIMEDOUT;
3771 goto out;
3772 }
3773
3774 status = ufshcd_get_upmcrs(hba);
3775 if (status != PWR_LOCAL) {
3776 dev_err(hba->dev,
Zang Leigang479da362017-09-19 16:50:30 +08003777 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003778 cmd->command, status);
3779 ret = (status != PWR_OK) ? status : -1;
3780 }
3781out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08003782 if (ret) {
3783 ufshcd_print_host_state(hba);
3784 ufshcd_print_pwr_info(hba);
3785 ufshcd_print_host_regs(hba);
3786 }
3787
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003788 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003789 hba->active_uic_cmd = NULL;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003790 hba->uic_async_done = NULL;
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02003791 if (reenable_intr)
3792 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003793 spin_unlock_irqrestore(hba->host->host_lock, flags);
3794 mutex_unlock(&hba->uic_cmd_mutex);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003795
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003796 return ret;
3797}
3798
3799/**
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303800 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3801 * using DME_SET primitives.
3802 * @hba: per adapter instance
3803 * @mode: powr mode value
3804 *
3805 * Returns 0 on success, non-zero value on failure
3806 */
Sujit Reddy Thummabdbe5d22014-05-26 10:59:11 +05303807static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303808{
3809 struct uic_command uic_cmd = {0};
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003810 int ret;
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303811
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003812 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3813 ret = ufshcd_dme_set(hba,
3814 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3815 if (ret) {
3816 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3817 __func__, ret);
3818 goto out;
3819 }
3820 }
3821
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303822 uic_cmd.command = UIC_CMD_DME_SET;
3823 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3824 uic_cmd.argument3 = mode;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003825 ufshcd_hold(hba, false);
3826 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3827 ufshcd_release(hba);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303828
Yaniv Gardic3a2f9e2015-05-17 18:55:01 +03003829out:
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03003830 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003831}
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303832
Stanley Chu087c5ef2020-03-27 17:53:28 +08003833int ufshcd_link_recovery(struct ufs_hba *hba)
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003834{
3835 int ret;
3836 unsigned long flags;
3837
3838 spin_lock_irqsave(hba->host->host_lock, flags);
3839 hba->ufshcd_state = UFSHCD_STATE_RESET;
3840 ufshcd_set_eh_in_progress(hba);
3841 spin_unlock_irqrestore(hba->host->host_lock, flags);
3842
Can Guoebdd1df2019-11-14 22:09:24 -08003843 /* Reset the attached device */
3844 ufshcd_vops_device_reset(hba);
3845
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003846 ret = ufshcd_host_reset_and_restore(hba);
3847
3848 spin_lock_irqsave(hba->host->host_lock, flags);
3849 if (ret)
3850 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3851 ufshcd_clear_eh_in_progress(hba);
3852 spin_unlock_irqrestore(hba->host->host_lock, flags);
3853
3854 if (ret)
3855 dev_err(hba->dev, "%s: link recovery failed, err %d",
3856 __func__, ret);
3857
3858 return ret;
3859}
Stanley Chu087c5ef2020-03-27 17:53:28 +08003860EXPORT_SYMBOL_GPL(ufshcd_link_recovery);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003861
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003862static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003863{
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003864 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003865 struct uic_command uic_cmd = {0};
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003866 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003867
Kiwoong Kimee32c902016-11-10 21:17:43 +09003868 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3869
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003870 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003871 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003872 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3873 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003874
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003875 if (ret) {
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003876 int err;
3877
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003878 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3879 __func__, ret);
3880
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003881 /*
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003882 * If link recovery fails then return error code returned from
3883 * ufshcd_link_recovery().
3884 * If link recovery succeeds then return -EAGAIN to attempt
3885 * hibern8 enter retry again.
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003886 */
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003887 err = ufshcd_link_recovery(hba);
3888 if (err) {
3889 dev_err(hba->dev, "%s: link recovery failed", __func__);
3890 ret = err;
3891 } else {
3892 ret = -EAGAIN;
3893 }
Kiwoong Kimee32c902016-11-10 21:17:43 +09003894 } else
3895 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3896 POST_CHANGE);
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003897
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003898 return ret;
3899}
3900
3901static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3902{
3903 int ret = 0, retries;
3904
3905 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3906 ret = __ufshcd_uic_hibern8_enter(hba);
Subhash Jadavani6d303e42019-11-14 22:09:30 -08003907 if (!ret)
Yaniv Gardi87d0b4a2016-02-01 15:02:44 +02003908 goto out;
3909 }
3910out:
3911 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003912}
3913
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08003914int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003915{
3916 struct uic_command uic_cmd = {0};
3917 int ret;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003918 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003919
Kiwoong Kimee32c902016-11-10 21:17:43 +09003920 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3921
Subhash Jadavani57d104c2014-09-25 15:32:30 +03003922 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3923 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08003924 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3925 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3926
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303927 if (ret) {
Yaniv Gardi53c12d02016-02-01 15:02:45 +02003928 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3929 __func__, ret);
3930 ret = ufshcd_link_recovery(hba);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003931 } else {
Kiwoong Kimee32c902016-11-10 21:17:43 +09003932 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3933 POST_CHANGE);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08003934 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3935 hba->ufs_stats.hibern8_exit_cnt++;
3936 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303937
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303938 return ret;
3939}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08003940EXPORT_SYMBOL_GPL(ufshcd_uic_hibern8_exit);
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303941
Stanley Chuba7af5e2019-12-30 13:32:28 +08003942void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit)
3943{
3944 unsigned long flags;
Can Guobe7594a2020-03-05 00:53:07 -08003945 bool update = false;
Stanley Chuba7af5e2019-12-30 13:32:28 +08003946
Can Guobe7594a2020-03-05 00:53:07 -08003947 if (!ufshcd_is_auto_hibern8_supported(hba))
Stanley Chuba7af5e2019-12-30 13:32:28 +08003948 return;
3949
3950 spin_lock_irqsave(hba->host->host_lock, flags);
Can Guobe7594a2020-03-05 00:53:07 -08003951 if (hba->ahit != ahit) {
3952 hba->ahit = ahit;
3953 update = true;
3954 }
Stanley Chuba7af5e2019-12-30 13:32:28 +08003955 spin_unlock_irqrestore(hba->host->host_lock, flags);
Can Guobe7594a2020-03-05 00:53:07 -08003956
3957 if (update && !pm_runtime_suspended(hba->dev)) {
3958 pm_runtime_get_sync(hba->dev);
3959 ufshcd_hold(hba, false);
3960 ufshcd_auto_hibern8_enable(hba);
3961 ufshcd_release(hba);
3962 pm_runtime_put(hba->dev);
3963 }
Stanley Chuba7af5e2019-12-30 13:32:28 +08003964}
3965EXPORT_SYMBOL_GPL(ufshcd_auto_hibern8_update);
3966
Can Guo71d848b2019-11-14 22:09:26 -08003967void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
Adrian Hunterad448372018-03-20 15:07:38 +02003968{
3969 unsigned long flags;
3970
Stanley Chuee5f1042019-05-21 14:44:52 +08003971 if (!ufshcd_is_auto_hibern8_supported(hba) || !hba->ahit)
Adrian Hunterad448372018-03-20 15:07:38 +02003972 return;
3973
3974 spin_lock_irqsave(hba->host->host_lock, flags);
3975 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3976 spin_unlock_irqrestore(hba->host->host_lock, flags);
3977}
3978
Yaniv Gardi50646362014-10-23 13:25:13 +03003979 /**
3980 * ufshcd_init_pwr_info - setting the POR (power on reset)
3981 * values in hba power info
3982 * @hba: per-adapter instance
3983 */
3984static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3985{
3986 hba->pwr_info.gear_rx = UFS_PWM_G1;
3987 hba->pwr_info.gear_tx = UFS_PWM_G1;
3988 hba->pwr_info.lane_rx = 1;
3989 hba->pwr_info.lane_tx = 1;
3990 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3991 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3992 hba->pwr_info.hs_rate = 0;
3993}
3994
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05303995/**
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003996 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3997 * @hba: per-adapter instance
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05303998 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03003999static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304000{
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004001 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
4002
4003 if (hba->max_pwr_info.is_valid)
4004 return 0;
4005
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004006 pwr_info->pwr_tx = FAST_MODE;
4007 pwr_info->pwr_rx = FAST_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004008 pwr_info->hs_rate = PA_HS_MODE_B;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304009
4010 /* Get the connected lane count */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004011 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
4012 &pwr_info->lane_rx);
4013 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4014 &pwr_info->lane_tx);
4015
4016 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
4017 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
4018 __func__,
4019 pwr_info->lane_rx,
4020 pwr_info->lane_tx);
4021 return -EINVAL;
4022 }
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304023
4024 /*
4025 * First, get the maximum gears of HS speed.
4026 * If a zero value, it means there is no HSGEAR capability.
4027 * Then, get the maximum gears of PWM speed.
4028 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004029 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
4030 if (!pwr_info->gear_rx) {
4031 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
4032 &pwr_info->gear_rx);
4033 if (!pwr_info->gear_rx) {
4034 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
4035 __func__, pwr_info->gear_rx);
4036 return -EINVAL;
4037 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004038 pwr_info->pwr_rx = SLOW_MODE;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304039 }
4040
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004041 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
4042 &pwr_info->gear_tx);
4043 if (!pwr_info->gear_tx) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304044 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004045 &pwr_info->gear_tx);
4046 if (!pwr_info->gear_tx) {
4047 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
4048 __func__, pwr_info->gear_tx);
4049 return -EINVAL;
4050 }
subhashj@codeaurora.org2349b532016-11-23 16:33:19 -08004051 pwr_info->pwr_tx = SLOW_MODE;
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004052 }
4053
4054 hba->max_pwr_info.is_valid = true;
4055 return 0;
4056}
4057
4058static int ufshcd_change_power_mode(struct ufs_hba *hba,
4059 struct ufs_pa_layer_attr *pwr_mode)
4060{
4061 int ret;
4062
4063 /* if already configured to the requested pwr_mode */
4064 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4065 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4066 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4067 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4068 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4069 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4070 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4071 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4072 return 0;
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304073 }
4074
4075 /*
4076 * Configure attributes for power mode change with below.
4077 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4078 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4079 * - PA_HSSERIES
4080 */
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004081 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4082 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4083 pwr_mode->lane_rx);
4084 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4085 pwr_mode->pwr_rx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304086 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004087 else
4088 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304089
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004090 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4091 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4092 pwr_mode->lane_tx);
4093 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4094 pwr_mode->pwr_tx == FAST_MODE)
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304095 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004096 else
4097 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304098
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004099 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4100 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4101 pwr_mode->pwr_rx == FAST_MODE ||
4102 pwr_mode->pwr_tx == FAST_MODE)
4103 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4104 pwr_mode->hs_rate);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304105
Can Guo08342532019-12-05 02:14:42 +00004106 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
4107 DL_FC0ProtectionTimeOutVal_Default);
4108 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
4109 DL_TC0ReplayTimeOutVal_Default);
4110 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
4111 DL_AFC0ReqTimeOutVal_Default);
4112 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
4113 DL_FC1ProtectionTimeOutVal_Default);
4114 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
4115 DL_TC1ReplayTimeOutVal_Default);
4116 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
4117 DL_AFC1ReqTimeOutVal_Default);
4118
4119 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
4120 DL_FC0ProtectionTimeOutVal_Default);
4121 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
4122 DL_TC0ReplayTimeOutVal_Default);
4123 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
4124 DL_AFC0ReqTimeOutVal_Default);
4125
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004126 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4127 | pwr_mode->pwr_tx);
4128
4129 if (ret) {
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304130 dev_err(hba->dev,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004131 "%s: power mode change failed %d\n", __func__, ret);
4132 } else {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004133 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4134 pwr_mode);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004135
4136 memcpy(&hba->pwr_info, pwr_mode,
4137 sizeof(struct ufs_pa_layer_attr));
4138 }
4139
4140 return ret;
4141}
4142
4143/**
4144 * ufshcd_config_pwr_mode - configure a new power mode
4145 * @hba: per-adapter instance
4146 * @desired_pwr_mode: desired power configuration
4147 */
Alim Akhtar0d846e72018-05-06 15:44:18 +05304148int ufshcd_config_pwr_mode(struct ufs_hba *hba,
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004149 struct ufs_pa_layer_attr *desired_pwr_mode)
4150{
4151 struct ufs_pa_layer_attr final_params = { 0 };
4152 int ret;
4153
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004154 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4155 desired_pwr_mode, &final_params);
4156
4157 if (ret)
Dolev Raviv7eb584d2014-09-25 15:32:31 +03004158 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4159
4160 ret = ufshcd_change_power_mode(hba, &final_params);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304161
4162 return ret;
4163}
Alim Akhtar0d846e72018-05-06 15:44:18 +05304164EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05304165
4166/**
Dolev Raviv68078d52013-07-30 00:35:58 +05304167 * ufshcd_complete_dev_init() - checks device readiness
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004168 * @hba: per-adapter instance
Dolev Raviv68078d52013-07-30 00:35:58 +05304169 *
4170 * Set fDeviceInit flag and poll until device toggles it.
4171 */
4172static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4173{
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004174 int i;
4175 int err;
Jason Yan7dfdcc32020-04-26 17:43:05 +08004176 bool flag_res = true;
Dolev Raviv68078d52013-07-30 00:35:58 +05304177
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004178 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08004179 QUERY_FLAG_IDN_FDEVICEINIT, 0, NULL);
Dolev Raviv68078d52013-07-30 00:35:58 +05304180 if (err) {
4181 dev_err(hba->dev,
4182 "%s setting fDeviceInit flag failed with error %d\n",
4183 __func__, err);
4184 goto out;
4185 }
4186
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004187 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4188 for (i = 0; i < 1000 && !err && flag_res; i++)
4189 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08004190 QUERY_FLAG_IDN_FDEVICEINIT, 0, &flag_res);
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02004191
Dolev Raviv68078d52013-07-30 00:35:58 +05304192 if (err)
4193 dev_err(hba->dev,
4194 "%s reading fDeviceInit flag failed with error %d\n",
4195 __func__, err);
4196 else if (flag_res)
4197 dev_err(hba->dev,
4198 "%s fDeviceInit was not cleared by the device\n",
4199 __func__);
4200
4201out:
4202 return err;
4203}
4204
4205/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304206 * ufshcd_make_hba_operational - Make UFS controller operational
4207 * @hba: per adapter instance
4208 *
4209 * To bring UFS host controller to operational state,
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004210 * 1. Enable required interrupts
4211 * 2. Configure interrupt aggregation
Yaniv Gardi897efe62016-02-01 15:02:48 +02004212 * 3. Program UTRL and UTMRL base address
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004213 * 4. Configure run-stop-registers
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304214 *
4215 * Returns 0 on success, non-zero value on failure
4216 */
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004217int ufshcd_make_hba_operational(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304218{
4219 int err = 0;
4220 u32 reg;
4221
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304222 /* Enable required interrupts */
4223 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4224
4225 /* Configure interrupt aggregation */
Yaniv Gardib8521902015-05-17 18:54:57 +03004226 if (ufshcd_is_intr_aggr_allowed(hba))
4227 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4228 else
4229 ufshcd_disable_intr_aggr(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304230
4231 /* Configure UTRL and UTMRL base address registers */
4232 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4233 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4234 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4235 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4236 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4237 REG_UTP_TASK_REQ_LIST_BASE_L);
4238 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4239 REG_UTP_TASK_REQ_LIST_BASE_H);
4240
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304241 /*
Yaniv Gardi897efe62016-02-01 15:02:48 +02004242 * Make sure base address and interrupt setup are updated before
4243 * enabling the run/stop registers below.
4244 */
4245 wmb();
4246
4247 /*
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304248 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304249 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004250 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304251 if (!(ufshcd_get_lists_status(reg))) {
4252 ufshcd_enable_run_stop_reg(hba);
4253 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304254 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304255 "Host controller not ready to process requests");
4256 err = -EIO;
4257 goto out;
4258 }
4259
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304260out:
4261 return err;
4262}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004263EXPORT_SYMBOL_GPL(ufshcd_make_hba_operational);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304264
4265/**
Yaniv Gardi596585a2016-03-10 17:37:08 +02004266 * ufshcd_hba_stop - Send controller to reset state
4267 * @hba: per adapter instance
4268 * @can_sleep: perform sleep or just spin
4269 */
4270static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4271{
4272 int err;
4273
4274 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4275 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4276 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4277 10, 1, can_sleep);
4278 if (err)
4279 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4280}
4281
4282/**
Christoph Hellwig492001992020-02-21 06:08:11 -08004283 * ufshcd_hba_enable - initialize the controller
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304284 * @hba: per adapter instance
4285 *
4286 * The controller resets itself and controller firmware initialization
4287 * sequence kicks off. When controller is ready it will set
4288 * the Host Controller Enable bit to 1.
4289 *
4290 * Returns 0 on success, non-zero value on failure
4291 */
Christoph Hellwig492001992020-02-21 06:08:11 -08004292int ufshcd_hba_enable(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304293{
4294 int retry;
4295
Yaniv Gardi596585a2016-03-10 17:37:08 +02004296 if (!ufshcd_is_hba_active(hba))
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304297 /* change controller state to "reset state" */
Yaniv Gardi596585a2016-03-10 17:37:08 +02004298 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304299
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004300 /* UniPro link is disabled at this point */
4301 ufshcd_set_link_off(hba);
4302
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004303 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004304
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304305 /* start controller initialization sequence */
4306 ufshcd_hba_start(hba);
4307
4308 /*
4309 * To initialize a UFS host controller HCE bit must be set to 1.
4310 * During initialization the HCE bit value changes from 1->0->1.
4311 * When the host controller completes initialization sequence
4312 * it sets the value of HCE bit to 1. The same HCE bit is read back
4313 * to check if the controller has completed initialization sequence.
4314 * So without this delay the value HCE = 1, set in the previous
4315 * instruction might be read back.
4316 * This delay can be changed based on the controller.
4317 */
Stanley Chub9dc8ac2020-03-18 18:40:14 +08004318 ufshcd_delay_us(hba->hba_enable_delay_us, 100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304319
4320 /* wait for the host controller to complete initialization */
Stanley Chu9fc305e2020-03-18 18:40:15 +08004321 retry = 50;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304322 while (ufshcd_is_hba_active(hba)) {
4323 if (retry) {
4324 retry--;
4325 } else {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304326 dev_err(hba->dev,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304327 "Controller enable failed\n");
4328 return -EIO;
4329 }
Stanley Chu9fc305e2020-03-18 18:40:15 +08004330 usleep_range(1000, 1100);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304331 }
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004332
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004333 /* enable UIC related interrupts */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004334 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004335
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004336 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004337
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304338 return 0;
4339}
Stanley Chu9d19bf7a2020-01-17 11:51:07 +08004340EXPORT_SYMBOL_GPL(ufshcd_hba_enable);
4341
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004342static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4343{
Stanley Chuba0320f2020-03-18 18:40:10 +08004344 int tx_lanes = 0, i, err = 0;
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004345
4346 if (!peer)
4347 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4348 &tx_lanes);
4349 else
4350 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4351 &tx_lanes);
4352 for (i = 0; i < tx_lanes; i++) {
4353 if (!peer)
4354 err = ufshcd_dme_set(hba,
4355 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4356 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4357 0);
4358 else
4359 err = ufshcd_dme_peer_set(hba,
4360 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4361 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4362 0);
4363 if (err) {
4364 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4365 __func__, peer, i, err);
4366 break;
4367 }
4368 }
4369
4370 return err;
4371}
4372
4373static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4374{
4375 return ufshcd_disable_tx_lcc(hba, true);
4376}
4377
Stanley Chua5fe372d2020-01-04 22:26:07 +08004378void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist,
4379 u32 reg)
Stanley Chu8808b4e2019-07-10 21:38:21 +08004380{
4381 reg_hist->reg[reg_hist->pos] = reg;
4382 reg_hist->tstamp[reg_hist->pos] = ktime_get();
4383 reg_hist->pos = (reg_hist->pos + 1) % UFS_ERR_REG_HIST_LENGTH;
4384}
Stanley Chua5fe372d2020-01-04 22:26:07 +08004385EXPORT_SYMBOL_GPL(ufshcd_update_reg_hist);
Stanley Chu8808b4e2019-07-10 21:38:21 +08004386
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304387/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304388 * ufshcd_link_startup - Initialize unipro link startup
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304389 * @hba: per adapter instance
4390 *
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304391 * Returns 0 for success, non-zero in case of failure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304392 */
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304393static int ufshcd_link_startup(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304394{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304395 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004396 int retries = DME_LINKSTARTUP_RETRIES;
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004397 bool link_startup_again = false;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304398
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004399 /*
4400 * If UFS device isn't active then we will have to issue link startup
4401 * 2 times to make sure the device state move to active.
4402 */
4403 if (!ufshcd_is_ufs_dev_active(hba))
4404 link_startup_again = true;
4405
4406link_startup:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004407 do {
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004408 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304409
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004410 ret = ufshcd_dme_link_startup(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004411
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004412 /* check if device is detected by inter-connect layer */
4413 if (!ret && !ufshcd_is_device_present(hba)) {
Stanley Chu8808b4e2019-07-10 21:38:21 +08004414 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4415 0);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004416 dev_err(hba->dev, "%s: Device not present\n", __func__);
4417 ret = -ENXIO;
4418 goto out;
4419 }
4420
4421 /*
4422 * DME link lost indication is only received when link is up,
4423 * but we can't be sure if the link is up until link startup
4424 * succeeds. So reset the local Uni-Pro and try again.
4425 */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004426 if (ret && ufshcd_hba_enable(hba)) {
4427 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4428 (u32)ret);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004429 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004430 }
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004431 } while (ret && retries--);
4432
Stanley Chu8808b4e2019-07-10 21:38:21 +08004433 if (ret) {
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03004434 /* failed to get the link up... retire */
Stanley Chu8808b4e2019-07-10 21:38:21 +08004435 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4436 (u32)ret);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304437 goto out;
Stanley Chu8808b4e2019-07-10 21:38:21 +08004438 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304439
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08004440 if (link_startup_again) {
4441 link_startup_again = false;
4442 retries = DME_LINKSTARTUP_RETRIES;
4443 goto link_startup;
4444 }
4445
subhashj@codeaurora.orgd2aebb92016-12-22 18:41:33 -08004446 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4447 ufshcd_init_pwr_info(hba);
4448 ufshcd_print_pwr_info(hba);
4449
Yaniv Gardi7ca38cf2015-05-17 18:54:59 +03004450 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4451 ret = ufshcd_disable_device_tx_lcc(hba);
4452 if (ret)
4453 goto out;
4454 }
4455
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004456 /* Include any host controller configuration via UIC commands */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02004457 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4458 if (ret)
4459 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03004460
4461 ret = ufshcd_make_hba_operational(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304462out:
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004463 if (ret) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304464 dev_err(hba->dev, "link startup failed %d\n", ret);
Venkat Gopalakrishnan7942f7b2017-02-03 16:58:24 -08004465 ufshcd_print_host_state(hba);
4466 ufshcd_print_pwr_info(hba);
4467 ufshcd_print_host_regs(hba);
4468 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304469 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304470}
4471
4472/**
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304473 * ufshcd_verify_dev_init() - Verify device initialization
4474 * @hba: per-adapter instance
4475 *
4476 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4477 * device Transport Protocol (UTP) layer is ready after a reset.
4478 * If the UTP layer at the device side is not initialized, it may
4479 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4480 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4481 */
4482static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4483{
4484 int err = 0;
4485 int retries;
4486
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004487 ufshcd_hold(hba, false);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304488 mutex_lock(&hba->dev_cmd.lock);
4489 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4490 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4491 NOP_OUT_TIMEOUT);
4492
4493 if (!err || err == -ETIMEDOUT)
4494 break;
4495
4496 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4497 }
4498 mutex_unlock(&hba->dev_cmd.lock);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004499 ufshcd_release(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304500
4501 if (err)
4502 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4503 return err;
4504}
4505
4506/**
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004507 * ufshcd_set_queue_depth - set lun queue depth
4508 * @sdev: pointer to SCSI device
4509 *
4510 * Read bLUQueueDepth value and activate scsi tagged command
4511 * queueing. For WLUN, queue depth is set to 1. For best-effort
4512 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4513 * value that host can queue.
4514 */
4515static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4516{
4517 int ret = 0;
4518 u8 lun_qdepth;
4519 struct ufs_hba *hba;
4520
4521 hba = shost_priv(sdev->host);
4522
4523 lun_qdepth = hba->nutrs;
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02004524 ret = ufshcd_read_unit_desc_param(hba,
4525 ufshcd_scsi_to_upiu_lun(sdev->lun),
4526 UNIT_DESC_PARAM_LU_Q_DEPTH,
4527 &lun_qdepth,
4528 sizeof(lun_qdepth));
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004529
4530 /* Some WLUN doesn't support unit descriptor */
4531 if (ret == -EOPNOTSUPP)
4532 lun_qdepth = 1;
4533 else if (!lun_qdepth)
4534 /* eventually, we can figure out the real queue depth */
4535 lun_qdepth = hba->nutrs;
4536 else
4537 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4538
4539 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4540 __func__, lun_qdepth);
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004541 scsi_change_queue_depth(sdev, lun_qdepth);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004542}
4543
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004544/*
4545 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4546 * @hba: per-adapter instance
4547 * @lun: UFS device lun id
4548 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4549 *
4550 * Returns 0 in case of success and b_lu_write_protect status would be returned
4551 * @b_lu_write_protect parameter.
4552 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4553 * Returns -EINVAL in case of invalid parameters passed to this function.
4554 */
4555static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4556 u8 lun,
4557 u8 *b_lu_write_protect)
4558{
4559 int ret;
4560
4561 if (!b_lu_write_protect)
4562 ret = -EINVAL;
4563 /*
4564 * According to UFS device spec, RPMB LU can't be write
4565 * protected so skip reading bLUWriteProtect parameter for
4566 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4567 */
Bean Huo1baa8012020-01-20 14:08:20 +01004568 else if (lun >= hba->dev_info.max_lu_supported)
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004569 ret = -ENOTSUPP;
4570 else
4571 ret = ufshcd_read_unit_desc_param(hba,
4572 lun,
4573 UNIT_DESC_PARAM_LU_WR_PROTECT,
4574 b_lu_write_protect,
4575 sizeof(*b_lu_write_protect));
4576 return ret;
4577}
4578
4579/**
4580 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4581 * status
4582 * @hba: per-adapter instance
4583 * @sdev: pointer to SCSI device
4584 *
4585 */
4586static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4587 struct scsi_device *sdev)
4588{
4589 if (hba->dev_info.f_power_on_wp_en &&
4590 !hba->dev_info.is_lu_power_on_wp) {
4591 u8 b_lu_write_protect;
4592
4593 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4594 &b_lu_write_protect) &&
4595 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4596 hba->dev_info.is_lu_power_on_wp = true;
4597 }
4598}
4599
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004600/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304601 * ufshcd_slave_alloc - handle initial SCSI device configurations
4602 * @sdev: pointer to SCSI device
4603 *
4604 * Returns success
4605 */
4606static int ufshcd_slave_alloc(struct scsi_device *sdev)
4607{
4608 struct ufs_hba *hba;
4609
4610 hba = shost_priv(sdev->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304611
4612 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4613 sdev->use_10_for_ms = 1;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304614
Can Guoa3a76392019-12-05 02:14:30 +00004615 /* DBD field should be set to 1 in mode sense(10) */
4616 sdev->set_dbd_for_ms = 1;
4617
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304618 /* allow SCSI layer to restart the device in case of errors */
4619 sdev->allow_restart = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004620
Sujit Reddy Thummab2a6c522014-07-01 12:22:38 +03004621 /* REPORT SUPPORTED OPERATION CODES is not supported */
4622 sdev->no_report_opcodes = 1;
4623
Sujit Reddy Thumma84af7e82018-01-24 09:52:35 +05304624 /* WRITE_SAME command is not supported */
4625 sdev->no_write_same = 1;
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004626
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004627 ufshcd_set_queue_depth(sdev);
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004628
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004629 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4630
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004631 return 0;
4632}
4633
4634/**
4635 * ufshcd_change_queue_depth - change queue depth
4636 * @sdev: pointer to SCSI device
4637 * @depth: required depth to set
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004638 *
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004639 * Change queue depth and make sure the max. limits are not crossed.
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004640 */
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004641static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03004642{
4643 struct ufs_hba *hba = shost_priv(sdev->host);
4644
4645 if (depth > hba->nutrs)
4646 depth = hba->nutrs;
Christoph Hellwigdb5ed4d2014-11-13 15:08:42 +01004647 return scsi_change_queue_depth(sdev, depth);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304648}
4649
4650/**
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004651 * ufshcd_slave_configure - adjust SCSI device configurations
4652 * @sdev: pointer to SCSI device
4653 */
4654static int ufshcd_slave_configure(struct scsi_device *sdev)
4655{
Stanley Chu49615ba2019-09-16 23:56:50 +08004656 struct ufs_hba *hba = shost_priv(sdev->host);
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004657 struct request_queue *q = sdev->request_queue;
4658
4659 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
Stanley Chu49615ba2019-09-16 23:56:50 +08004660
4661 if (ufshcd_is_rpm_autosuspend_allowed(hba))
4662 sdev->rpm_autosuspend = 1;
4663
Akinobu Mitaeeda4742014-07-01 23:00:32 +09004664 return 0;
4665}
4666
4667/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304668 * ufshcd_slave_destroy - remove SCSI device configurations
4669 * @sdev: pointer to SCSI device
4670 */
4671static void ufshcd_slave_destroy(struct scsi_device *sdev)
4672{
4673 struct ufs_hba *hba;
4674
4675 hba = shost_priv(sdev->host);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004676 /* Drop the reference as it won't be needed anymore */
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004677 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4678 unsigned long flags;
4679
4680 spin_lock_irqsave(hba->host->host_lock, flags);
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03004681 hba->sdev_ufs_device = NULL;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03004682 spin_unlock_irqrestore(hba->host->host_lock, flags);
4683 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304684}
4685
4686/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304687 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004688 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304689 * @scsi_status: SCSI command status
4690 *
4691 * Returns value base on SCSI command status
4692 */
4693static inline int
4694ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4695{
4696 int result = 0;
4697
4698 switch (scsi_status) {
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304699 case SAM_STAT_CHECK_CONDITION:
4700 ufshcd_copy_sense_data(lrbp);
Tomas Winkler30eb2e42018-11-26 10:10:34 +02004701 /* fallthrough */
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304702 case SAM_STAT_GOOD:
4703 result |= DID_OK << 16 |
4704 COMMAND_COMPLETE << 8 |
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304705 scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304706 break;
4707 case SAM_STAT_TASK_SET_FULL:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304708 case SAM_STAT_BUSY:
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304709 case SAM_STAT_TASK_ABORTED:
Seungwon Jeon1c2623c2013-08-31 21:40:19 +05304710 ufshcd_copy_sense_data(lrbp);
4711 result |= scsi_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304712 break;
4713 default:
4714 result |= DID_ERROR << 16;
4715 break;
4716 } /* end of switch */
4717
4718 return result;
4719}
4720
4721/**
4722 * ufshcd_transfer_rsp_status - Get overall status of the response
4723 * @hba: per adapter instance
Bart Van Assche8aa29f12018-03-01 15:07:20 -08004724 * @lrbp: pointer to local reference block of completed command
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304725 *
4726 * Returns result of the command to notify SCSI midlayer
4727 */
4728static inline int
4729ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4730{
4731 int result = 0;
4732 int scsi_status;
4733 int ocs;
4734
4735 /* overall command status of utrd */
4736 ocs = ufshcd_get_tr_ocs(lrbp);
4737
4738 switch (ocs) {
4739 case OCS_SUCCESS:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304740 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004741 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304742 switch (result) {
4743 case UPIU_TRANSACTION_RESPONSE:
4744 /*
4745 * get the response UPIU result to extract
4746 * the SCSI command status
4747 */
4748 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4749
4750 /*
4751 * get the result based on SCSI status response
4752 * to notify the SCSI midlayer of the command status
4753 */
4754 scsi_status = result & MASK_SCSI_STATUS;
4755 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304756
Yaniv Gardif05ac2e2016-02-01 15:02:42 +02004757 /*
4758 * Currently we are only supporting BKOPs exception
4759 * events hence we can ignore BKOPs exception event
4760 * during power management callbacks. BKOPs exception
4761 * event is not expected to be raised in runtime suspend
4762 * callback as it allows the urgent bkops.
4763 * During system suspend, we are anyway forcefully
4764 * disabling the bkops and if urgent bkops is needed
4765 * it will be enabled on system resume. Long term
4766 * solution could be to abort the system suspend if
4767 * UFS device needs urgent BKOPs.
4768 */
4769 if (!hba->pm_op_in_progress &&
Sayali Lokhande2824ec92020-02-10 19:40:44 -08004770 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr) &&
4771 schedule_work(&hba->eeh_work)) {
4772 /*
4773 * Prevent suspend once eeh_work is scheduled
4774 * to avoid deadlock between ufshcd_suspend
4775 * and exception event handler.
4776 */
4777 pm_runtime_get_noresume(hba->dev);
4778 }
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304779 break;
4780 case UPIU_TRANSACTION_REJECT_UPIU:
4781 /* TODO: handle Reject UPIU Response */
4782 result = DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304783 dev_err(hba->dev,
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304784 "Reject UPIU not fully implemented\n");
4785 break;
4786 default:
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304787 dev_err(hba->dev,
4788 "Unexpected request response code = %x\n",
4789 result);
Stanley Chue0347d82019-04-15 20:23:38 +08004790 result = DID_ERROR << 16;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304791 break;
4792 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304793 break;
4794 case OCS_ABORTED:
4795 result |= DID_ABORT << 16;
4796 break;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05304797 case OCS_INVALID_COMMAND_STATUS:
4798 result |= DID_REQUEUE << 16;
4799 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304800 case OCS_INVALID_CMD_TABLE_ATTR:
4801 case OCS_INVALID_PRDT_ATTR:
4802 case OCS_MISMATCH_DATA_BUF_SIZE:
4803 case OCS_MISMATCH_RESP_UPIU_SIZE:
4804 case OCS_PEER_COMM_FAILURE:
4805 case OCS_FATAL_ERROR:
4806 default:
4807 result |= DID_ERROR << 16;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05304808 dev_err(hba->dev,
Dolev Ravivff8e20c2016-12-22 18:42:18 -08004809 "OCS error from controller = %x for tag %d\n",
4810 ocs, lrbp->task_tag);
4811 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08004812 ufshcd_print_host_state(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304813 break;
4814 } /* end of switch */
4815
Can Guo2df74b62019-11-25 22:53:33 -08004816 if ((host_byte(result) != DID_OK) && !hba->silence_err_logs)
Dolev Raviv66cc8202016-12-22 18:39:42 -08004817 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304818 return result;
4819}
4820
4821/**
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304822 * ufshcd_uic_cmd_compl - handle completion of uic command
4823 * @hba: per adapter instance
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304824 * @intr_status: interrupt status generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004825 *
4826 * Returns
4827 * IRQ_HANDLED - If interrupt is valid
4828 * IRQ_NONE - If invalid interrupt
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304829 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004830static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304831{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004832 irqreturn_t retval = IRQ_NONE;
4833
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304834 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304835 hba->active_uic_cmd->argument2 |=
4836 ufshcd_get_uic_cmd_result(hba);
Seungwon Jeon12b4fdb2013-08-31 21:40:21 +05304837 hba->active_uic_cmd->argument3 =
4838 ufshcd_get_dme_attr_val(hba);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304839 complete(&hba->active_uic_cmd->done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004840 retval = IRQ_HANDLED;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304841 }
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05304842
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004843 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03004844 complete(hba->uic_async_done);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004845 retval = IRQ_HANDLED;
4846 }
4847 return retval;
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05304848}
4849
4850/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004851 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304852 * @hba: per adapter instance
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004853 * @completed_reqs: requests to complete
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304854 */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004855static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4856 unsigned long completed_reqs)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304857{
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05304858 struct ufshcd_lrb *lrbp;
4859 struct scsi_cmnd *cmd;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304860 int result;
4861 int index;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004862
Dolev Ravive9d501b2014-07-01 12:22:37 +03004863 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4864 lrbp = &hba->lrb[index];
4865 cmd = lrbp->cmd;
4866 if (cmd) {
Lee Susman1a07f2d2016-12-22 18:42:03 -08004867 ufshcd_add_command_trace(hba, index, "complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004868 result = ufshcd_transfer_rsp_status(hba, lrbp);
4869 scsi_dma_unmap(cmd);
4870 cmd->result = result;
4871 /* Mark completed command as NULL in LRB */
4872 lrbp->cmd = NULL;
Can Guo74a527a2019-11-25 22:53:32 -08004873 lrbp->compl_time_stamp = ktime_get();
Dolev Ravive9d501b2014-07-01 12:22:37 +03004874 /* Do not touch lrbp after scsi done */
4875 cmd->scsi_done(cmd);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03004876 __ufshcd_release(hba);
Joao Pinto300bb132016-05-11 12:21:27 +01004877 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4878 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
Can Guo74a527a2019-11-25 22:53:32 -08004879 lrbp->compl_time_stamp = ktime_get();
Lee Susman1a07f2d2016-12-22 18:42:03 -08004880 if (hba->dev_cmd.complete) {
4881 ufshcd_add_command_trace(hba, index,
4882 "dev_complete");
Dolev Ravive9d501b2014-07-01 12:22:37 +03004883 complete(hba->dev_cmd.complete);
Lee Susman1a07f2d2016-12-22 18:42:03 -08004884 }
Dolev Ravive9d501b2014-07-01 12:22:37 +03004885 }
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08004886 if (ufshcd_is_clkscaling_supported(hba))
4887 hba->clk_scaling.active_reqs--;
Dolev Ravive9d501b2014-07-01 12:22:37 +03004888 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304889
4890 /* clear corresponding bits of completed commands */
4891 hba->outstanding_reqs ^= completed_reqs;
4892
Sahitya Tummala856b3482014-09-25 15:32:34 +03004893 ufshcd_clk_scaling_update_busy(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05304894}
4895
4896/**
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004897 * ufshcd_transfer_req_compl - handle SCSI and query command completion
4898 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004899 *
4900 * Returns
4901 * IRQ_HANDLED - If interrupt is valid
4902 * IRQ_NONE - If invalid interrupt
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004903 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004904static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba)
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004905{
4906 unsigned long completed_reqs;
4907 u32 tr_doorbell;
4908
4909 /* Resetting interrupt aggregation counters first and reading the
4910 * DOOR_BELL afterward allows us to handle all the completed requests.
4911 * In order to prevent other interrupts starvation the DB is read once
4912 * after reset. The down side of this solution is the possibility of
4913 * false interrupt if device completes another request after resetting
4914 * aggregation and before reading the DB.
4915 */
Christoph Hellwig492001992020-02-21 06:08:11 -08004916 if (ufshcd_is_intr_aggr_allowed(hba))
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004917 ufshcd_reset_intr_aggr(hba);
4918
4919 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4920 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4921
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08004922 if (completed_reqs) {
4923 __ufshcd_transfer_req_compl(hba, completed_reqs);
4924 return IRQ_HANDLED;
4925 } else {
4926 return IRQ_NONE;
4927 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02004928}
4929
4930/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304931 * ufshcd_disable_ee - disable exception event
4932 * @hba: per-adapter instance
4933 * @mask: exception event to disable
4934 *
4935 * Disables exception event in the device so that the EVENT_ALERT
4936 * bit is not set.
4937 *
4938 * Returns zero on success, non-zero error value on failure.
4939 */
4940static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4941{
4942 int err = 0;
4943 u32 val;
4944
4945 if (!(hba->ee_ctrl_mask & mask))
4946 goto out;
4947
4948 val = hba->ee_ctrl_mask & ~mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004949 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004950 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304951 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4952 if (!err)
4953 hba->ee_ctrl_mask &= ~mask;
4954out:
4955 return err;
4956}
4957
4958/**
4959 * ufshcd_enable_ee - enable exception event
4960 * @hba: per-adapter instance
4961 * @mask: exception event to enable
4962 *
4963 * Enable corresponding exception event in the device to allow
4964 * device to alert host in critical scenarios.
4965 *
4966 * Returns zero on success, non-zero error value on failure.
4967 */
4968static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4969{
4970 int err = 0;
4971 u32 val;
4972
4973 if (hba->ee_ctrl_mask & mask)
4974 goto out;
4975
4976 val = hba->ee_ctrl_mask | mask;
Tomohiro Kusumid7e2ddd2017-04-20 15:01:44 +03004977 val &= MASK_EE_STATUS;
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02004978 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05304979 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4980 if (!err)
4981 hba->ee_ctrl_mask |= mask;
4982out:
4983 return err;
4984}
4985
4986/**
4987 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4988 * @hba: per-adapter instance
4989 *
4990 * Allow device to manage background operations on its own. Enabling
4991 * this might lead to inconsistent latencies during normal data transfers
4992 * as the device is allowed to manage its own way of handling background
4993 * operations.
4994 *
4995 * Returns zero on success, non-zero on failure.
4996 */
4997static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4998{
4999 int err = 0;
5000
5001 if (hba->auto_bkops_enabled)
5002 goto out;
5003
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005004 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08005005 QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305006 if (err) {
5007 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
5008 __func__, err);
5009 goto out;
5010 }
5011
5012 hba->auto_bkops_enabled = true;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08005013 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305014
5015 /* No need of URGENT_BKOPS exception from the device */
5016 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5017 if (err)
5018 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
5019 __func__, err);
5020out:
5021 return err;
5022}
5023
5024/**
5025 * ufshcd_disable_auto_bkops - block device in doing background operations
5026 * @hba: per-adapter instance
5027 *
5028 * Disabling background operations improves command response latency but
5029 * has drawback of device moving into critical state where the device is
5030 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
5031 * host is idle so that BKOPS are managed effectively without any negative
5032 * impacts.
5033 *
5034 * Returns zero on success, non-zero on failure.
5035 */
5036static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
5037{
5038 int err = 0;
5039
5040 if (!hba->auto_bkops_enabled)
5041 goto out;
5042
5043 /*
5044 * If host assisted BKOPs is to be enabled, make sure
5045 * urgent bkops exception is allowed.
5046 */
5047 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
5048 if (err) {
5049 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
5050 __func__, err);
5051 goto out;
5052 }
5053
Yaniv Gardidc3c8d32016-02-01 15:02:46 +02005054 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08005055 QUERY_FLAG_IDN_BKOPS_EN, 0, NULL);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305056 if (err) {
5057 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5058 __func__, err);
5059 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5060 goto out;
5061 }
5062
5063 hba->auto_bkops_enabled = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08005064 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
Asutosh Das24366c2a2019-11-25 22:53:30 -08005065 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305066out:
5067 return err;
5068}
5069
5070/**
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005071 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305072 * @hba: per adapter instance
5073 *
5074 * After a device reset the device may toggle the BKOPS_EN flag
5075 * to default value. The s/w tracking variables should be updated
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005076 * as well. This function would change the auto-bkops state based on
5077 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305078 */
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005079static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305080{
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08005081 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5082 hba->auto_bkops_enabled = false;
5083 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5084 ufshcd_enable_auto_bkops(hba);
5085 } else {
5086 hba->auto_bkops_enabled = true;
5087 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5088 ufshcd_disable_auto_bkops(hba);
5089 }
Asutosh Das24366c2a2019-11-25 22:53:30 -08005090 hba->is_urgent_bkops_lvl_checked = false;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305091}
5092
5093static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5094{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005095 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305096 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5097}
5098
5099/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005100 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5101 * @hba: per-adapter instance
5102 * @status: bkops_status value
5103 *
5104 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5105 * flag in the device to permit background operations if the device
5106 * bkops_status is greater than or equal to "status" argument passed to
5107 * this function, disable otherwise.
5108 *
5109 * Returns 0 for success, non-zero in case of failure.
5110 *
5111 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5112 * to know whether auto bkops is enabled or disabled after this function
5113 * returns control to it.
5114 */
5115static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5116 enum bkops_status status)
5117{
5118 int err;
5119 u32 curr_status = 0;
5120
5121 err = ufshcd_get_bkops_status(hba, &curr_status);
5122 if (err) {
5123 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5124 __func__, err);
5125 goto out;
5126 } else if (curr_status > BKOPS_STATUS_MAX) {
5127 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5128 __func__, curr_status);
5129 err = -EINVAL;
5130 goto out;
5131 }
5132
5133 if (curr_status >= status)
5134 err = ufshcd_enable_auto_bkops(hba);
5135 else
5136 err = ufshcd_disable_auto_bkops(hba);
Asutosh Das24366c2a2019-11-25 22:53:30 -08005137 hba->urgent_bkops_lvl = curr_status;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005138out:
5139 return err;
5140}
5141
5142/**
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305143 * ufshcd_urgent_bkops - handle urgent bkops exception event
5144 * @hba: per-adapter instance
5145 *
5146 * Enable fBackgroundOpsEn flag in the device to permit background
5147 * operations.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03005148 *
5149 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5150 * and negative error value for any other failure.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305151 */
5152static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5153{
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005154 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305155}
5156
5157static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5158{
Yaniv Gardi5e86ae42016-02-01 15:02:50 +02005159 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305160 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5161}
5162
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005163static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5164{
5165 int err;
5166 u32 curr_status = 0;
5167
5168 if (hba->is_urgent_bkops_lvl_checked)
5169 goto enable_auto_bkops;
5170
5171 err = ufshcd_get_bkops_status(hba, &curr_status);
5172 if (err) {
5173 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5174 __func__, err);
5175 goto out;
5176 }
5177
5178 /*
5179 * We are seeing that some devices are raising the urgent bkops
5180 * exception events even when BKOPS status doesn't indicate performace
5181 * impacted or critical. Handle these device by determining their urgent
5182 * bkops status at runtime.
5183 */
5184 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5185 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5186 __func__, curr_status);
5187 /* update the current status as the urgent bkops level */
5188 hba->urgent_bkops_lvl = curr_status;
5189 hba->is_urgent_bkops_lvl_checked = true;
5190 }
5191
5192enable_auto_bkops:
5193 err = ufshcd_enable_auto_bkops(hba);
5194out:
5195 if (err < 0)
5196 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5197 __func__, err);
5198}
5199
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005200static bool ufshcd_wb_sup(struct ufs_hba *hba)
5201{
5202 return ufshcd_is_wb_allowed(hba);
5203}
5204
5205static int ufshcd_wb_ctrl(struct ufs_hba *hba, bool enable)
5206{
5207 int ret;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005208 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005209 enum query_opcode opcode;
5210
5211 if (!ufshcd_wb_sup(hba))
5212 return 0;
5213
5214 if (!(enable ^ hba->wb_enabled))
5215 return 0;
5216 if (enable)
5217 opcode = UPIU_QUERY_OPCODE_SET_FLAG;
5218 else
5219 opcode = UPIU_QUERY_OPCODE_CLEAR_FLAG;
5220
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005221 index = ufshcd_wb_get_flag_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005222 ret = ufshcd_query_flag_retry(hba, opcode,
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005223 QUERY_FLAG_IDN_WB_EN, index, NULL);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005224 if (ret) {
5225 dev_err(hba->dev, "%s write booster %s failed %d\n",
5226 __func__, enable ? "enable" : "disable", ret);
5227 return ret;
5228 }
5229
5230 hba->wb_enabled = enable;
5231 dev_dbg(hba->dev, "%s write booster %s %d\n",
5232 __func__, enable ? "enable" : "disable", ret);
5233
5234 return ret;
5235}
5236
5237static int ufshcd_wb_toggle_flush_during_h8(struct ufs_hba *hba, bool set)
5238{
5239 int val;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005240 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005241
5242 if (set)
5243 val = UPIU_QUERY_OPCODE_SET_FLAG;
5244 else
5245 val = UPIU_QUERY_OPCODE_CLEAR_FLAG;
5246
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005247 index = ufshcd_wb_get_flag_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005248 return ufshcd_query_flag_retry(hba, val,
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005249 QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8,
5250 index, NULL);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005251}
5252
5253static inline void ufshcd_wb_toggle_flush(struct ufs_hba *hba, bool enable)
5254{
5255 if (enable)
5256 ufshcd_wb_buf_flush_enable(hba);
5257 else
5258 ufshcd_wb_buf_flush_disable(hba);
5259
5260}
5261
5262static int ufshcd_wb_buf_flush_enable(struct ufs_hba *hba)
5263{
5264 int ret;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005265 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005266
5267 if (!ufshcd_wb_sup(hba) || hba->wb_buf_flush_enabled)
5268 return 0;
5269
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005270 index = ufshcd_wb_get_flag_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005271 ret = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08005272 QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN,
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005273 index, NULL);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005274 if (ret)
5275 dev_err(hba->dev, "%s WB - buf flush enable failed %d\n",
5276 __func__, ret);
5277 else
5278 hba->wb_buf_flush_enabled = true;
5279
5280 dev_dbg(hba->dev, "WB - Flush enabled: %d\n", ret);
5281 return ret;
5282}
5283
5284static int ufshcd_wb_buf_flush_disable(struct ufs_hba *hba)
5285{
5286 int ret;
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005287 u8 index;
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005288
5289 if (!ufshcd_wb_sup(hba) || !hba->wb_buf_flush_enabled)
5290 return 0;
5291
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005292 index = ufshcd_wb_get_flag_index(hba);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005293 ret = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
Stanley Chu6f8d5a62020-05-08 16:01:13 +08005294 QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN,
5295 index, NULL);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07005296 if (ret) {
5297 dev_warn(hba->dev, "%s: WB - buf flush disable failed %d\n",
5298 __func__, ret);
5299 } else {
5300 hba->wb_buf_flush_enabled = false;
5301 dev_dbg(hba->dev, "WB - Flush disabled: %d\n", ret);
5302 }
5303
5304 return ret;
5305}
5306
5307static bool ufshcd_wb_presrv_usrspc_keep_vcc_on(struct ufs_hba *hba,
5308 u32 avail_buf)
5309{
5310 u32 cur_buf;
5311 int ret;
5312
5313 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5314 QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE,
5315 0, 0, &cur_buf);
5316 if (ret) {
5317 dev_err(hba->dev, "%s dCurWriteBoosterBufferSize read failed %d\n",
5318 __func__, ret);
5319 return false;
5320 }
5321
5322 if (!cur_buf) {
5323 dev_info(hba->dev, "dCurWBBuf: %d WB disabled until free-space is available\n",
5324 cur_buf);
5325 return false;
5326 }
5327 /* Let it continue to flush when >60% full */
5328 if (avail_buf < UFS_WB_40_PERCENT_BUF_REMAIN)
5329 return true;
5330
5331 return false;
5332}
5333
5334static bool ufshcd_wb_keep_vcc_on(struct ufs_hba *hba)
5335{
5336 int ret;
5337 u32 avail_buf;
5338
5339 if (!ufshcd_wb_sup(hba))
5340 return false;
5341 /*
5342 * The ufs device needs the vcc to be ON to flush.
5343 * With user-space reduction enabled, it's enough to enable flush
5344 * by checking only the available buffer. The threshold
5345 * defined here is > 90% full.
5346 * With user-space preserved enabled, the current-buffer
5347 * should be checked too because the wb buffer size can reduce
5348 * when disk tends to be full. This info is provided by current
5349 * buffer (dCurrentWriteBoosterBufferSize). There's no point in
5350 * keeping vcc on when current buffer is empty.
5351 */
5352 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5353 QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE,
5354 0, 0, &avail_buf);
5355 if (ret) {
5356 dev_warn(hba->dev, "%s dAvailableWriteBoosterBufferSize read failed %d\n",
5357 __func__, ret);
5358 return false;
5359 }
5360
5361 if (!hba->dev_info.b_presrv_uspc_en) {
5362 if (avail_buf <= UFS_WB_10_PERCENT_BUF_REMAIN)
5363 return true;
5364 return false;
5365 }
5366
5367 return ufshcd_wb_presrv_usrspc_keep_vcc_on(hba, avail_buf);
5368}
5369
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305370/**
5371 * ufshcd_exception_event_handler - handle exceptions raised by device
5372 * @work: pointer to work data
5373 *
5374 * Read bExceptionEventStatus attribute from the device and handle the
5375 * exception event accordingly.
5376 */
5377static void ufshcd_exception_event_handler(struct work_struct *work)
5378{
5379 struct ufs_hba *hba;
5380 int err;
5381 u32 status = 0;
5382 hba = container_of(work, struct ufs_hba, eeh_work);
5383
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305384 pm_runtime_get_sync(hba->dev);
Stanley Chu03e1d282019-12-24 21:01:05 +08005385 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305386 err = ufshcd_get_ee_status(hba, &status);
5387 if (err) {
5388 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5389 __func__, err);
5390 goto out;
5391 }
5392
5393 status &= hba->ee_ctrl_mask;
Yaniv Gardiafdfff52016-03-10 17:37:15 +02005394
5395 if (status & MASK_EE_URGENT_BKOPS)
5396 ufshcd_bkops_exception_event_handler(hba);
5397
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305398out:
Stanley Chu03e1d282019-12-24 21:01:05 +08005399 ufshcd_scsi_unblock_requests(hba);
Sayali Lokhande2824ec92020-02-10 19:40:44 -08005400 /*
5401 * pm_runtime_get_noresume is called while scheduling
5402 * eeh_work to avoid suspend racing with exception work.
5403 * Hence decrement usage counter using pm_runtime_put_noidle
5404 * to allow suspend on completion of exception event handler.
5405 */
5406 pm_runtime_put_noidle(hba->dev);
5407 pm_runtime_put(hba->dev);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305408 return;
5409}
5410
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005411/* Complete requests that have door-bell cleared */
5412static void ufshcd_complete_requests(struct ufs_hba *hba)
5413{
5414 ufshcd_transfer_req_compl(hba);
5415 ufshcd_tmc_handler(hba);
5416}
5417
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05305418/**
Yaniv Gardi583fa622016-03-10 17:37:13 +02005419 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5420 * to recover from the DL NAC errors or not.
5421 * @hba: per-adapter instance
5422 *
5423 * Returns true if error handling is required, false otherwise
5424 */
5425static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5426{
5427 unsigned long flags;
5428 bool err_handling = true;
5429
5430 spin_lock_irqsave(hba->host->host_lock, flags);
5431 /*
5432 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5433 * device fatal error and/or DL NAC & REPLAY timeout errors.
5434 */
5435 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5436 goto out;
5437
5438 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5439 ((hba->saved_err & UIC_ERROR) &&
5440 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5441 goto out;
5442
5443 if ((hba->saved_err & UIC_ERROR) &&
5444 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5445 int err;
5446 /*
5447 * wait for 50ms to see if we can get any other errors or not.
5448 */
5449 spin_unlock_irqrestore(hba->host->host_lock, flags);
5450 msleep(50);
5451 spin_lock_irqsave(hba->host->host_lock, flags);
5452
5453 /*
5454 * now check if we have got any other severe errors other than
5455 * DL NAC error?
5456 */
5457 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5458 ((hba->saved_err & UIC_ERROR) &&
5459 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5460 goto out;
5461
5462 /*
5463 * As DL NAC is the only error received so far, send out NOP
5464 * command to confirm if link is still active or not.
5465 * - If we don't get any response then do error recovery.
5466 * - If we get response then clear the DL NAC error bit.
5467 */
5468
5469 spin_unlock_irqrestore(hba->host->host_lock, flags);
5470 err = ufshcd_verify_dev_init(hba);
5471 spin_lock_irqsave(hba->host->host_lock, flags);
5472
5473 if (err)
5474 goto out;
5475
5476 /* Link seems to be alive hence ignore the DL NAC errors */
5477 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5478 hba->saved_err &= ~UIC_ERROR;
5479 /* clear NAC error */
5480 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5481 if (!hba->saved_uic_err) {
5482 err_handling = false;
5483 goto out;
5484 }
5485 }
5486out:
5487 spin_unlock_irqrestore(hba->host->host_lock, flags);
5488 return err_handling;
5489}
5490
5491/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305492 * ufshcd_err_handler - handle UFS errors that require s/w attention
5493 * @work: pointer to work structure
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305494 */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305495static void ufshcd_err_handler(struct work_struct *work)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305496{
5497 struct ufs_hba *hba;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305498 unsigned long flags;
5499 u32 err_xfer = 0;
5500 u32 err_tm = 0;
5501 int err = 0;
5502 int tag;
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005503 bool needs_reset = false;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305504
5505 hba = container_of(work, struct ufs_hba, eh_work);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305506
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305507 pm_runtime_get_sync(hba->dev);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005508 ufshcd_hold(hba, false);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305509
5510 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005511 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305512 goto out;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305513
5514 hba->ufshcd_state = UFSHCD_STATE_RESET;
5515 ufshcd_set_eh_in_progress(hba);
5516
5517 /* Complete requests that have door-bell cleared by h/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005518 ufshcd_complete_requests(hba);
Yaniv Gardi583fa622016-03-10 17:37:13 +02005519
5520 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5521 bool ret;
5522
5523 spin_unlock_irqrestore(hba->host->host_lock, flags);
5524 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5525 ret = ufshcd_quirk_dl_nac_errors(hba);
5526 spin_lock_irqsave(hba->host->host_lock, flags);
5527 if (!ret)
5528 goto skip_err_handling;
5529 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005530 if ((hba->saved_err & INT_FATAL_ERRORS) ||
Stanley Chu82174442019-05-21 14:44:54 +08005531 (hba->saved_err & UFSHCD_UIC_HIBERN8_MASK) ||
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005532 ((hba->saved_err & UIC_ERROR) &&
5533 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5534 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5535 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5536 needs_reset = true;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305537
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005538 /*
5539 * if host reset is required then skip clearing the pending
Can Guo2df74b62019-11-25 22:53:33 -08005540 * transfers forcefully because they will get cleared during
5541 * host reset and restore
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005542 */
5543 if (needs_reset)
5544 goto skip_pending_xfer_clear;
5545
5546 /* release lock as clear command might sleep */
5547 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305548 /* Clear pending transfer requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005549 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5550 if (ufshcd_clear_cmd(hba, tag)) {
5551 err_xfer = true;
5552 goto lock_skip_pending_xfer_clear;
5553 }
5554 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305555
5556 /* Clear pending task management requests */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005557 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5558 if (ufshcd_clear_tm_cmd(hba, tag)) {
5559 err_tm = true;
5560 goto lock_skip_pending_xfer_clear;
5561 }
5562 }
5563
5564lock_skip_pending_xfer_clear:
5565 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305566
5567 /* Complete the requests that are cleared by s/w */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005568 ufshcd_complete_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305569
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005570 if (err_xfer || err_tm)
5571 needs_reset = true;
5572
5573skip_pending_xfer_clear:
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305574 /* Fatal errors need reset */
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005575 if (needs_reset) {
5576 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5577
5578 /*
5579 * ufshcd_reset_and_restore() does the link reinitialization
5580 * which will need atleast one empty doorbell slot to send the
5581 * device management commands (NOP and query commands).
5582 * If there is no slot empty at this moment then free up last
5583 * slot forcefully.
5584 */
5585 if (hba->outstanding_reqs == max_doorbells)
5586 __ufshcd_transfer_req_compl(hba,
5587 (1UL << (hba->nutrs - 1)));
5588
5589 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305590 err = ufshcd_reset_and_restore(hba);
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005591 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305592 if (err) {
5593 dev_err(hba->dev, "%s: reset and restore failed\n",
5594 __func__);
5595 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5596 }
5597 /*
5598 * Inform scsi mid-layer that we did reset and allow to handle
5599 * Unit Attention properly.
5600 */
5601 scsi_report_bus_reset(hba->host, 0);
5602 hba->saved_err = 0;
5603 hba->saved_uic_err = 0;
5604 }
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005605
Yaniv Gardi583fa622016-03-10 17:37:13 +02005606skip_err_handling:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005607 if (!needs_reset) {
5608 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5609 if (hba->saved_err || hba->saved_uic_err)
5610 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5611 __func__, hba->saved_err, hba->saved_uic_err);
5612 }
5613
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305614 ufshcd_clear_eh_in_progress(hba);
5615
5616out:
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005617 spin_unlock_irqrestore(hba->host->host_lock, flags);
Subhash Jadavani38135532018-05-03 16:37:18 +05305618 ufshcd_scsi_unblock_requests(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005619 ufshcd_release(hba);
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05305620 pm_runtime_put_sync(hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305621}
5622
5623/**
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305624 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5625 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005626 *
5627 * Returns
5628 * IRQ_HANDLED - If interrupt is valid
5629 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305630 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005631static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305632{
5633 u32 reg;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005634 irqreturn_t retval = IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305635
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005636 /* PHY layer lane error */
5637 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5638 /* Ignore LINERESET indication, as this is not an error */
5639 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005640 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005641 /*
5642 * To know whether this error is fatal or not, DB timeout
5643 * must be checked but this error is handled separately.
5644 */
5645 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
Stanley Chu48d5b972019-07-10 21:38:18 +08005646 ufshcd_update_reg_hist(&hba->ufs_stats.pa_err, reg);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005647 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005648 }
Dolev Ravivfb7b45f2016-11-23 16:32:32 -08005649
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305650 /* PA_INIT_ERROR is fatal and needs UIC reset */
5651 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005652 if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
5653 (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005654 ufshcd_update_reg_hist(&hba->ufs_stats.dl_err, reg);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005655
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005656 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5657 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
5658 else if (hba->dev_quirks &
5659 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5660 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5661 hba->uic_error |=
5662 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5663 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5664 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5665 }
5666 retval |= IRQ_HANDLED;
Yaniv Gardi583fa622016-03-10 17:37:13 +02005667 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305668
5669 /* UIC NL/TL/DME errors needs software retry */
5670 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005671 if ((reg & UIC_NETWORK_LAYER_ERROR) &&
5672 (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005673 ufshcd_update_reg_hist(&hba->ufs_stats.nl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305674 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005675 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005676 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305677
5678 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005679 if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
5680 (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005681 ufshcd_update_reg_hist(&hba->ufs_stats.tl_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305682 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005683 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005684 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305685
5686 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005687 if ((reg & UIC_DME_ERROR) &&
5688 (reg & UIC_DME_ERROR_CODE_MASK)) {
Stanley Chu48d5b972019-07-10 21:38:18 +08005689 ufshcd_update_reg_hist(&hba->ufs_stats.dme_err, reg);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305690 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005691 retval |= IRQ_HANDLED;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08005692 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305693
5694 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5695 __func__, hba->uic_error);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005696 return retval;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305697}
5698
Stanley Chu82174442019-05-21 14:44:54 +08005699static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5700 u32 intr_mask)
5701{
Stanley Chu5a244e02020-01-29 18:52:50 +08005702 if (!ufshcd_is_auto_hibern8_supported(hba) ||
5703 !ufshcd_is_auto_hibern8_enabled(hba))
Stanley Chu82174442019-05-21 14:44:54 +08005704 return false;
5705
5706 if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5707 return false;
5708
5709 if (hba->active_uic_cmd &&
5710 (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5711 hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5712 return false;
5713
5714 return true;
5715}
5716
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305717/**
5718 * ufshcd_check_errors - Check for errors that need s/w attention
5719 * @hba: per-adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005720 *
5721 * Returns
5722 * IRQ_HANDLED - If interrupt is valid
5723 * IRQ_NONE - If invalid interrupt
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305724 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005725static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba)
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305726{
5727 bool queue_eh_work = false;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005728 irqreturn_t retval = IRQ_NONE;
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305729
Stanley Chud3c615b2019-07-10 21:38:19 +08005730 if (hba->errors & INT_FATAL_ERRORS) {
5731 ufshcd_update_reg_hist(&hba->ufs_stats.fatal_err, hba->errors);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305732 queue_eh_work = true;
Stanley Chud3c615b2019-07-10 21:38:19 +08005733 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305734
5735 if (hba->errors & UIC_ERROR) {
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305736 hba->uic_error = 0;
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005737 retval = ufshcd_update_uic_error(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305738 if (hba->uic_error)
5739 queue_eh_work = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305740 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305741
Stanley Chu82174442019-05-21 14:44:54 +08005742 if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
5743 dev_err(hba->dev,
5744 "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
5745 __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
5746 "Enter" : "Exit",
5747 hba->errors, ufshcd_get_upmcrs(hba));
Stanley Chud3c615b2019-07-10 21:38:19 +08005748 ufshcd_update_reg_hist(&hba->ufs_stats.auto_hibern8_err,
5749 hba->errors);
Stanley Chu82174442019-05-21 14:44:54 +08005750 queue_eh_work = true;
5751 }
5752
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305753 if (queue_eh_work) {
Yaniv Gardi9a47ec72016-03-10 17:37:12 +02005754 /*
5755 * update the transfer error masks to sticky bits, let's do this
5756 * irrespective of current ufshcd_state.
5757 */
5758 hba->saved_err |= hba->errors;
5759 hba->saved_uic_err |= hba->uic_error;
5760
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305761 /* handle fatal errors only when link is functional */
5762 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5763 /* block commands from scsi mid-layer */
Subhash Jadavani38135532018-05-03 16:37:18 +05305764 ufshcd_scsi_block_requests(hba);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305765
Zang Leigang141f8162016-11-16 11:29:37 +08005766 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
Dolev Raviv66cc8202016-12-22 18:39:42 -08005767
5768 /* dump controller state before resetting */
5769 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5770 bool pr_prdt = !!(hba->saved_err &
5771 SYSTEM_BUS_FATAL_ERROR);
5772
5773 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5774 __func__, hba->saved_err,
5775 hba->saved_uic_err);
5776
5777 ufshcd_print_host_regs(hba);
5778 ufshcd_print_pwr_info(hba);
5779 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5780 ufshcd_print_trs(hba, hba->outstanding_reqs,
5781 pr_prdt);
5782 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305783 schedule_work(&hba->eh_work);
5784 }
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005785 retval |= IRQ_HANDLED;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05305786 }
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05305787 /*
5788 * if (!queue_eh_work) -
5789 * Other errors are either non-fatal where host recovers
5790 * itself without s/w intervention or errors that will be
5791 * handled by the SCSI core layer.
5792 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005793 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305794}
5795
Bart Van Assche69a6c262019-12-09 10:13:09 -08005796struct ctm_info {
5797 struct ufs_hba *hba;
5798 unsigned long pending;
5799 unsigned int ncpl;
5800};
5801
5802static bool ufshcd_compl_tm(struct request *req, void *priv, bool reserved)
5803{
5804 struct ctm_info *const ci = priv;
5805 struct completion *c;
5806
5807 WARN_ON_ONCE(reserved);
5808 if (test_bit(req->tag, &ci->pending))
5809 return true;
5810 ci->ncpl++;
5811 c = req->end_io_data;
5812 if (c)
5813 complete(c);
5814 return true;
5815}
5816
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305817/**
5818 * ufshcd_tmc_handler - handle task management function completion
5819 * @hba: per adapter instance
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005820 *
5821 * Returns
5822 * IRQ_HANDLED - If interrupt is valid
5823 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305824 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005825static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305826{
Bart Van Assche69a6c262019-12-09 10:13:09 -08005827 struct request_queue *q = hba->tmf_queue;
5828 struct ctm_info ci = {
5829 .hba = hba,
5830 .pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL),
5831 };
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305832
Bart Van Assche69a6c262019-12-09 10:13:09 -08005833 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_compl_tm, &ci);
5834 return ci.ncpl ? IRQ_HANDLED : IRQ_NONE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305835}
5836
5837/**
5838 * ufshcd_sl_intr - Interrupt service routine
5839 * @hba: per adapter instance
5840 * @intr_status: contains interrupts generated by the controller
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005841 *
5842 * Returns
5843 * IRQ_HANDLED - If interrupt is valid
5844 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305845 */
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005846static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305847{
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005848 irqreturn_t retval = IRQ_NONE;
5849
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305850 hba->errors = UFSHCD_ERROR_MASK & intr_status;
Stanley Chu82174442019-05-21 14:44:54 +08005851
5852 if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5853 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5854
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305855 if (hba->errors)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005856 retval |= ufshcd_check_errors(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305857
Seungwon Jeon53b3d9c2013-08-31 21:40:22 +05305858 if (intr_status & UFSHCD_UIC_MASK)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005859 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305860
5861 if (intr_status & UTP_TASK_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005862 retval |= ufshcd_tmc_handler(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305863
5864 if (intr_status & UTP_TRANSFER_REQ_COMPL)
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005865 retval |= ufshcd_transfer_req_compl(hba);
5866
5867 return retval;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305868}
5869
5870/**
5871 * ufshcd_intr - Main interrupt service routine
5872 * @irq: irq number
5873 * @__hba: pointer to adapter instance
5874 *
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005875 * Returns
5876 * IRQ_HANDLED - If interrupt is valid
5877 * IRQ_NONE - If invalid interrupt
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305878 */
5879static irqreturn_t ufshcd_intr(int irq, void *__hba)
5880{
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005881 u32 intr_status, enabled_intr_status;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305882 irqreturn_t retval = IRQ_NONE;
5883 struct ufs_hba *hba = __hba;
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305884 int retries = hba->nutrs;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305885
5886 spin_lock(hba->host->host_lock);
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305887 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305888
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305889 /*
5890 * There could be max of hba->nutrs reqs in flight and in worst case
5891 * if the reqs get finished 1 by 1 after the interrupt status is
5892 * read, make sure we handle them by checking the interrupt status
5893 * again in a loop until we process all of the reqs before returning.
5894 */
5895 do {
5896 enabled_intr_status =
5897 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5898 if (intr_status)
5899 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005900 if (enabled_intr_status)
5901 retval |= ufshcd_sl_intr(hba, enabled_intr_status);
Yaniv Gardid75f7fe2016-02-01 15:02:47 +02005902
Venkat Gopalakrishnan7f6ba4f2018-05-03 16:37:20 +05305903 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5904 } while (intr_status && --retries);
5905
Venkat Gopalakrishnan9333d772019-11-14 22:09:28 -08005906 if (retval == IRQ_NONE) {
5907 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x\n",
5908 __func__, intr_status);
5909 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
5910 }
5911
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305912 spin_unlock(hba->host->host_lock);
5913 return retval;
5914}
5915
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305916static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5917{
5918 int err = 0;
5919 u32 mask = 1 << tag;
5920 unsigned long flags;
5921
5922 if (!test_bit(tag, &hba->outstanding_tasks))
5923 goto out;
5924
5925 spin_lock_irqsave(hba->host->host_lock, flags);
Alim Akhtar1399c5b2018-05-06 15:44:15 +05305926 ufshcd_utmrl_clear(hba, tag);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305927 spin_unlock_irqrestore(hba->host->host_lock, flags);
5928
5929 /* poll for max. 1 sec to clear door bell register by h/w */
5930 err = ufshcd_wait_for_register(hba,
5931 REG_UTP_TASK_REQ_DOOR_BELL,
Yaniv Gardi596585a2016-03-10 17:37:08 +02005932 mask, 0, 1000, 1000, true);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305933out:
5934 return err;
5935}
5936
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005937static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
5938 struct utp_task_req_desc *treq, u8 tm_function)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305939{
Bart Van Assche69a6c262019-12-09 10:13:09 -08005940 struct request_queue *q = hba->tmf_queue;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005941 struct Scsi_Host *host = hba->host;
Bart Van Assche69a6c262019-12-09 10:13:09 -08005942 DECLARE_COMPLETION_ONSTACK(wait);
5943 struct request *req;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305944 unsigned long flags;
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005945 int free_slot, task_tag, err;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305946
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305947 /*
5948 * Get free slot, sleep if slots are unavailable.
5949 * Even though we use wait_event() which sleeps indefinitely,
5950 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5951 */
Bart Van Assche69a6c262019-12-09 10:13:09 -08005952 req = blk_get_request(q, REQ_OP_DRV_OUT, BLK_MQ_REQ_RESERVED);
5953 req->end_io_data = &wait;
5954 free_slot = req->tag;
5955 WARN_ON_ONCE(free_slot < 0 || free_slot >= hba->nutmrs);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03005956 ufshcd_hold(hba, false);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305957
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305958 spin_lock_irqsave(host->host_lock, flags);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305959 task_tag = hba->nutrs + free_slot;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305960
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005961 treq->req_header.dword_0 |= cpu_to_be32(task_tag);
5962
5963 memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
Kiwoong Kimd2877be2016-11-10 21:16:15 +09005964 ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5965
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305966 /* send command to the controller */
5967 __set_bit(free_slot, &hba->outstanding_tasks);
Yaniv Gardi897efe62016-02-01 15:02:48 +02005968
5969 /* Make sure descriptors are ready before ringing the task doorbell */
5970 wmb();
5971
Seungwon Jeonb873a2752013-06-26 22:39:26 +05305972 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
Gilad Bronerad1a1b92016-10-17 17:09:36 -07005973 /* Make sure that doorbell is committed immediately */
5974 wmb();
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305975
5976 spin_unlock_irqrestore(host->host_lock, flags);
5977
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005978 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");
5979
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305980 /* wait until the task management command is completed */
Bart Van Assche69a6c262019-12-09 10:13:09 -08005981 err = wait_for_completion_io_timeout(&wait,
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305982 msecs_to_jiffies(TM_CMD_TIMEOUT));
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05305983 if (!err) {
Bart Van Assche69a6c262019-12-09 10:13:09 -08005984 /*
5985 * Make sure that ufshcd_compl_tm() does not trigger a
5986 * use-after-free.
5987 */
5988 req->end_io_data = NULL;
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03005989 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05305990 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5991 __func__, tm_function);
5992 if (ufshcd_clear_tm_cmd(hba, free_slot))
5993 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5994 __func__, free_slot);
5995 err = -ETIMEDOUT;
5996 } else {
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03005997 err = 0;
5998 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));
5999
Ohad Sharabi6667e6d2018-03-28 12:42:18 +03006000 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306001 }
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306002
Stanley Chub5572172019-08-19 21:43:28 +08006003 spin_lock_irqsave(hba->host->host_lock, flags);
6004 __clear_bit(free_slot, &hba->outstanding_tasks);
6005 spin_unlock_irqrestore(hba->host->host_lock, flags);
6006
Bart Van Assche69a6c262019-12-09 10:13:09 -08006007 blk_put_request(req);
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306008
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006009 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306010 return err;
6011}
6012
6013/**
Christoph Hellwigc6049cd2018-10-07 17:30:33 +03006014 * ufshcd_issue_tm_cmd - issues task management commands to controller
6015 * @hba: per adapter instance
6016 * @lun_id: LUN ID to which TM command is sent
6017 * @task_id: task ID to which the TM command is applicable
6018 * @tm_function: task management function opcode
6019 * @tm_response: task management service response return value
6020 *
6021 * Returns non-zero value on error, zero on success.
6022 */
6023static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
6024 u8 tm_function, u8 *tm_response)
6025{
6026 struct utp_task_req_desc treq = { { 0 }, };
6027 int ocs_value, err;
6028
6029 /* Configure task request descriptor */
6030 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6031 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6032
6033 /* Configure task request UPIU */
6034 treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
6035 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
6036 treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);
6037
6038 /*
6039 * The host shall provide the same value for LUN field in the basic
6040 * header and for Input Parameter.
6041 */
6042 treq.input_param1 = cpu_to_be32(lun_id);
6043 treq.input_param2 = cpu_to_be32(task_id);
6044
6045 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
6046 if (err == -ETIMEDOUT)
6047 return err;
6048
6049 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6050 if (ocs_value != OCS_SUCCESS)
6051 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
6052 __func__, ocs_value);
6053 else if (tm_response)
6054 *tm_response = be32_to_cpu(treq.output_param1) &
6055 MASK_TM_SERVICE_RESP;
6056 return err;
6057}
6058
6059/**
Avri Altman5e0a86e2018-10-07 17:30:37 +03006060 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
6061 * @hba: per-adapter instance
6062 * @req_upiu: upiu request
6063 * @rsp_upiu: upiu reply
Avri Altman5e0a86e2018-10-07 17:30:37 +03006064 * @desc_buff: pointer to descriptor buffer, NULL if NA
6065 * @buff_len: descriptor size, 0 if NA
Bart Van Assched0e97602019-10-29 16:07:08 -07006066 * @cmd_type: specifies the type (NOP, Query...)
Avri Altman5e0a86e2018-10-07 17:30:37 +03006067 * @desc_op: descriptor operation
6068 *
6069 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
6070 * Therefore, it "rides" the device management infrastructure: uses its tag and
6071 * tasks work queues.
6072 *
6073 * Since there is only one available tag for device management commands,
6074 * the caller is expected to hold the hba->dev_cmd.lock mutex.
6075 */
6076static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
6077 struct utp_upiu_req *req_upiu,
6078 struct utp_upiu_req *rsp_upiu,
6079 u8 *desc_buff, int *buff_len,
Bart Van Assche7f674c32019-10-29 16:07:09 -07006080 enum dev_cmd_type cmd_type,
Avri Altman5e0a86e2018-10-07 17:30:37 +03006081 enum query_opcode desc_op)
6082{
Bart Van Assche7252a362019-12-09 10:13:08 -08006083 struct request_queue *q = hba->cmd_queue;
6084 struct request *req;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006085 struct ufshcd_lrb *lrbp;
6086 int err = 0;
6087 int tag;
6088 struct completion wait;
6089 unsigned long flags;
6090 u32 upiu_flags;
6091
6092 down_read(&hba->clk_scaling_lock);
6093
Bart Van Assche7252a362019-12-09 10:13:08 -08006094 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03006095 if (IS_ERR(req)) {
6096 err = PTR_ERR(req);
6097 goto out_unlock;
6098 }
Bart Van Assche7252a362019-12-09 10:13:08 -08006099 tag = req->tag;
6100 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
Avri Altman5e0a86e2018-10-07 17:30:37 +03006101
6102 init_completion(&wait);
6103 lrbp = &hba->lrb[tag];
6104 WARN_ON(lrbp->cmd);
6105
6106 lrbp->cmd = NULL;
6107 lrbp->sense_bufflen = 0;
6108 lrbp->sense_buffer = NULL;
6109 lrbp->task_tag = tag;
6110 lrbp->lun = 0;
6111 lrbp->intr_cmd = true;
6112 hba->dev_cmd.type = cmd_type;
6113
6114 switch (hba->ufs_version) {
6115 case UFSHCI_VERSION_10:
6116 case UFSHCI_VERSION_11:
6117 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
6118 break;
6119 default:
6120 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
6121 break;
6122 }
6123
6124 /* update the task tag in the request upiu */
6125 req_upiu->header.dword_0 |= cpu_to_be32(tag);
6126
6127 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
6128
6129 /* just copy the upiu request as it is */
6130 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
6131 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
6132 /* The Data Segment Area is optional depending upon the query
6133 * function value. for WRITE DESCRIPTOR, the data segment
6134 * follows right after the tsf.
6135 */
6136 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
6137 *buff_len = 0;
6138 }
6139
6140 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
6141
6142 hba->dev_cmd.complete = &wait;
6143
6144 /* Make sure descriptors are ready before ringing the doorbell */
6145 wmb();
6146 spin_lock_irqsave(hba->host->host_lock, flags);
6147 ufshcd_send_command(hba, tag);
6148 spin_unlock_irqrestore(hba->host->host_lock, flags);
6149
6150 /*
6151 * ignore the returning value here - ufshcd_check_query_response is
6152 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
6153 * read the response directly ignoring all errors.
6154 */
6155 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
6156
6157 /* just copy the upiu response as it is */
6158 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
Avri Altman4bbbe242019-02-20 09:11:13 +02006159 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
6160 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
6161 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
6162 MASK_QUERY_DATA_SEG_LEN;
6163
6164 if (*buff_len >= resp_len) {
6165 memcpy(desc_buff, descp, resp_len);
6166 *buff_len = resp_len;
6167 } else {
Bean Huo3d4881d2019-11-12 23:34:35 +01006168 dev_warn(hba->dev,
6169 "%s: rsp size %d is bigger than buffer size %d",
6170 __func__, resp_len, *buff_len);
Avri Altman4bbbe242019-02-20 09:11:13 +02006171 *buff_len = 0;
6172 err = -EINVAL;
6173 }
6174 }
Avri Altman5e0a86e2018-10-07 17:30:37 +03006175
Bart Van Assche7252a362019-12-09 10:13:08 -08006176 blk_put_request(req);
Dan Carpenterbb14dd12019-12-13 13:48:28 +03006177out_unlock:
Avri Altman5e0a86e2018-10-07 17:30:37 +03006178 up_read(&hba->clk_scaling_lock);
6179 return err;
6180}
6181
6182/**
6183 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
6184 * @hba: per-adapter instance
6185 * @req_upiu: upiu request
6186 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
6187 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
6188 * @desc_buff: pointer to descriptor buffer, NULL if NA
6189 * @buff_len: descriptor size, 0 if NA
6190 * @desc_op: descriptor operation
6191 *
6192 * Supports UTP Transfer requests (nop and query), and UTP Task
6193 * Management requests.
6194 * It is up to the caller to fill the upiu conent properly, as it will
6195 * be copied without any further input validations.
6196 */
6197int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
6198 struct utp_upiu_req *req_upiu,
6199 struct utp_upiu_req *rsp_upiu,
6200 int msgcode,
6201 u8 *desc_buff, int *buff_len,
6202 enum query_opcode desc_op)
6203{
6204 int err;
Bart Van Assche7f674c32019-10-29 16:07:09 -07006205 enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
Avri Altman5e0a86e2018-10-07 17:30:37 +03006206 struct utp_task_req_desc treq = { { 0 }, };
6207 int ocs_value;
6208 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
6209
Avri Altman5e0a86e2018-10-07 17:30:37 +03006210 switch (msgcode) {
6211 case UPIU_TRANSACTION_NOP_OUT:
6212 cmd_type = DEV_CMD_TYPE_NOP;
6213 /* fall through */
6214 case UPIU_TRANSACTION_QUERY_REQ:
6215 ufshcd_hold(hba, false);
6216 mutex_lock(&hba->dev_cmd.lock);
6217 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
6218 desc_buff, buff_len,
6219 cmd_type, desc_op);
6220 mutex_unlock(&hba->dev_cmd.lock);
6221 ufshcd_release(hba);
6222
6223 break;
6224 case UPIU_TRANSACTION_TASK_REQ:
6225 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
6226 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
6227
6228 memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));
6229
6230 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
6231 if (err == -ETIMEDOUT)
6232 break;
6233
6234 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6235 if (ocs_value != OCS_SUCCESS) {
6236 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
6237 ocs_value);
6238 break;
6239 }
6240
6241 memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));
6242
6243 break;
6244 default:
6245 err = -EINVAL;
6246
6247 break;
6248 }
6249
Avri Altman5e0a86e2018-10-07 17:30:37 +03006250 return err;
6251}
6252
6253/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306254 * ufshcd_eh_device_reset_handler - device reset handler registered to
6255 * scsi layer.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306256 * @cmd: SCSI command pointer
6257 *
6258 * Returns SUCCESS/FAILED
6259 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306260static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306261{
6262 struct Scsi_Host *host;
6263 struct ufs_hba *hba;
6264 unsigned int tag;
6265 u32 pos;
6266 int err;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306267 u8 resp = 0xF;
6268 struct ufshcd_lrb *lrbp;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306269 unsigned long flags;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306270
6271 host = cmd->device->host;
6272 hba = shost_priv(host);
6273 tag = cmd->request->tag;
6274
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306275 lrbp = &hba->lrb[tag];
6276 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
6277 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306278 if (!err)
6279 err = resp;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306280 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306281 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306282
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306283 /* clear the commands that were pending for corresponding LUN */
6284 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6285 if (hba->lrb[pos].lun == lrbp->lun) {
6286 err = ufshcd_clear_cmd(hba, pos);
6287 if (err)
6288 break;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306289 }
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306290 }
6291 spin_lock_irqsave(host->host_lock, flags);
6292 ufshcd_transfer_req_compl(hba);
6293 spin_unlock_irqrestore(host->host_lock, flags);
Gilad Broner7fabb772017-02-03 16:56:50 -08006294
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306295out:
Gilad Broner7fabb772017-02-03 16:56:50 -08006296 hba->req_abort_count = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08006297 ufshcd_update_reg_hist(&hba->ufs_stats.dev_reset, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306298 if (!err) {
6299 err = SUCCESS;
6300 } else {
6301 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6302 err = FAILED;
6303 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306304 return err;
6305}
6306
Gilad Bronere0b299e2017-02-03 16:56:40 -08006307static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6308{
6309 struct ufshcd_lrb *lrbp;
6310 int tag;
6311
6312 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6313 lrbp = &hba->lrb[tag];
6314 lrbp->req_abort_skip = true;
6315 }
6316}
6317
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306318/**
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306319 * ufshcd_abort - abort a specific command
6320 * @cmd: SCSI command pointer
6321 *
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306322 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6323 * command, and in host controller by clearing the door-bell register. There can
6324 * be race between controller sending the command to the device while abort is
6325 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6326 * really issued and then try to abort it.
6327 *
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306328 * Returns SUCCESS/FAILED
6329 */
6330static int ufshcd_abort(struct scsi_cmnd *cmd)
6331{
6332 struct Scsi_Host *host;
6333 struct ufs_hba *hba;
6334 unsigned long flags;
6335 unsigned int tag;
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306336 int err = 0;
6337 int poll_cnt;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306338 u8 resp = 0xF;
6339 struct ufshcd_lrb *lrbp;
Dolev Ravive9d501b2014-07-01 12:22:37 +03006340 u32 reg;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306341
6342 host = cmd->device->host;
6343 hba = shost_priv(host);
6344 tag = cmd->request->tag;
Dolev Ravive7d38252016-12-22 18:40:07 -08006345 lrbp = &hba->lrb[tag];
Yaniv Gardi14497322016-02-01 15:02:39 +02006346 if (!ufshcd_valid_tag(hba, tag)) {
6347 dev_err(hba->dev,
6348 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
6349 __func__, tag, cmd, cmd->request);
6350 BUG();
6351 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306352
Dolev Ravive7d38252016-12-22 18:40:07 -08006353 /*
6354 * Task abort to the device W-LUN is illegal. When this command
6355 * will fail, due to spec violation, scsi err handling next step
6356 * will be to send LU reset which, again, is a spec violation.
6357 * To avoid these unnecessary/illegal step we skip to the last error
6358 * handling stage: reset and restore.
6359 */
6360 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
6361 return ufshcd_eh_host_reset_handler(cmd);
6362
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006363 ufshcd_hold(hba, false);
Dolev Ravive9d501b2014-07-01 12:22:37 +03006364 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
Yaniv Gardi14497322016-02-01 15:02:39 +02006365 /* If command is already aborted/completed, return SUCCESS */
6366 if (!(test_bit(tag, &hba->outstanding_reqs))) {
6367 dev_err(hba->dev,
6368 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
6369 __func__, tag, hba->outstanding_reqs, reg);
6370 goto out;
6371 }
6372
Dolev Ravive9d501b2014-07-01 12:22:37 +03006373 if (!(reg & (1 << tag))) {
6374 dev_err(hba->dev,
6375 "%s: cmd was completed, but without a notifying intr, tag = %d",
6376 __func__, tag);
6377 }
6378
Dolev Raviv66cc8202016-12-22 18:39:42 -08006379 /* Print Transfer Request of aborted task */
6380 dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
Dolev Raviv66cc8202016-12-22 18:39:42 -08006381
Gilad Broner7fabb772017-02-03 16:56:50 -08006382 /*
6383 * Print detailed info about aborted request.
6384 * As more than one request might get aborted at the same time,
6385 * print full information only for the first aborted request in order
6386 * to reduce repeated printouts. For other aborted requests only print
6387 * basic details.
6388 */
6389 scsi_print_command(hba->lrb[tag].cmd);
6390 if (!hba->req_abort_count) {
Stanley Chu8808b4e2019-07-10 21:38:21 +08006391 ufshcd_update_reg_hist(&hba->ufs_stats.task_abort, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08006392 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08006393 ufshcd_print_host_state(hba);
Gilad Broner7fabb772017-02-03 16:56:50 -08006394 ufshcd_print_pwr_info(hba);
6395 ufshcd_print_trs(hba, 1 << tag, true);
6396 } else {
6397 ufshcd_print_trs(hba, 1 << tag, false);
6398 }
6399 hba->req_abort_count++;
Gilad Bronere0b299e2017-02-03 16:56:40 -08006400
6401 /* Skip task abort in case previous aborts failed and report failure */
6402 if (lrbp->req_abort_skip) {
6403 err = -EIO;
6404 goto out;
6405 }
6406
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306407 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6408 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6409 UFS_QUERY_TASK, &resp);
6410 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6411 /* cmd pending in the device */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006412 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6413 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306414 break;
6415 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306416 /*
6417 * cmd not pending in the device, check if it is
6418 * in transition.
6419 */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006420 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6421 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306422 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6423 if (reg & (1 << tag)) {
6424 /* sleep for max. 200us to stabilize */
6425 usleep_range(100, 200);
6426 continue;
6427 }
6428 /* command completed already */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006429 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6430 __func__, tag);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306431 goto out;
6432 } else {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006433 dev_err(hba->dev,
6434 "%s: no response from device. tag = %d, err %d\n",
6435 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306436 if (!err)
6437 err = resp; /* service response error */
6438 goto out;
6439 }
6440 }
6441
6442 if (!poll_cnt) {
6443 err = -EBUSY;
6444 goto out;
6445 }
6446
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306447 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6448 UFS_ABORT_TASK, &resp);
6449 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006450 if (!err) {
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306451 err = resp; /* service response error */
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006452 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6453 __func__, tag, err);
6454 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306455 goto out;
Sujit Reddy Thummae2933132014-05-26 10:59:12 +05306456 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306457
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306458 err = ufshcd_clear_cmd(hba, tag);
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006459 if (err) {
6460 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6461 __func__, tag, err);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306462 goto out;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08006463 }
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306464
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306465 scsi_dma_unmap(cmd);
6466
6467 spin_lock_irqsave(host->host_lock, flags);
Yaniv Gardia48353f2016-02-01 15:02:40 +02006468 ufshcd_outstanding_req_clear(hba, tag);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306469 hba->lrb[tag].cmd = NULL;
6470 spin_unlock_irqrestore(host->host_lock, flags);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05306471
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306472out:
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306473 if (!err) {
6474 err = SUCCESS;
6475 } else {
6476 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
Gilad Bronere0b299e2017-02-03 16:56:40 -08006477 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
Sujit Reddy Thummaf20810d2014-05-26 10:59:13 +05306478 err = FAILED;
6479 }
6480
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006481 /*
6482 * This ufshcd_release() corresponds to the original scsi cmd that got
6483 * aborted here (as we won't get any IRQ for it).
6484 */
6485 ufshcd_release(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05306486 return err;
6487}
6488
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05306489/**
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306490 * ufshcd_host_reset_and_restore - reset and restore host controller
6491 * @hba: per-adapter instance
6492 *
6493 * Note that host controller reset may issue DME_RESET to
6494 * local and remote (device) Uni-Pro stack and the attributes
6495 * are reset to default state.
6496 *
6497 * Returns zero on success, non-zero on failure
6498 */
6499static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6500{
6501 int err;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306502 unsigned long flags;
6503
Can Guo2df74b62019-11-25 22:53:33 -08006504 /*
6505 * Stop the host controller and complete the requests
6506 * cleared by h/w
6507 */
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306508 spin_lock_irqsave(hba->host->host_lock, flags);
Yaniv Gardi596585a2016-03-10 17:37:08 +02006509 ufshcd_hba_stop(hba, false);
Can Guo2df74b62019-11-25 22:53:33 -08006510 hba->silence_err_logs = true;
6511 ufshcd_complete_requests(hba);
6512 hba->silence_err_logs = false;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306513 spin_unlock_irqrestore(hba->host->host_lock, flags);
6514
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08006515 /* scale up clocks to max frequency before full reinitialization */
Subhash Jadavani394b9492020-03-26 02:25:40 -07006516 ufshcd_set_clk_freq(hba, true);
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08006517
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306518 err = ufshcd_hba_enable(hba);
6519 if (err)
6520 goto out;
6521
6522 /* Establish the link again and restore the device */
Bean Huo1b9e2142020-01-20 14:08:15 +01006523 err = ufshcd_probe_hba(hba, false);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006524
6525 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306526 err = -EIO;
6527out:
6528 if (err)
6529 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
Stanley Chu8808b4e2019-07-10 21:38:21 +08006530 ufshcd_update_reg_hist(&hba->ufs_stats.host_reset, (u32)err);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306531 return err;
6532}
6533
6534/**
6535 * ufshcd_reset_and_restore - reset and re-initialize host/device
6536 * @hba: per-adapter instance
6537 *
6538 * Reset and recover device, host and re-establish link. This
6539 * is helpful to recover the communication in fatal error conditions.
6540 *
6541 * Returns zero on success, non-zero on failure
6542 */
6543static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6544{
6545 int err = 0;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006546 int retries = MAX_HOST_RESET_RETRIES;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306547
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006548 do {
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07006549 /* Reset the attached device */
6550 ufshcd_vops_device_reset(hba);
6551
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03006552 err = ufshcd_host_reset_and_restore(hba);
6553 } while (err && --retries);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306554
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306555 return err;
6556}
6557
6558/**
6559 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006560 * @cmd: SCSI command pointer
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306561 *
6562 * Returns SUCCESS/FAILED
6563 */
6564static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6565{
6566 int err;
6567 unsigned long flags;
6568 struct ufs_hba *hba;
6569
6570 hba = shost_priv(cmd->device->host);
6571
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006572 ufshcd_hold(hba, false);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306573 /*
6574 * Check if there is any race with fatal error handling.
6575 * If so, wait for it to complete. Even though fatal error
6576 * handling does reset and restore in some cases, don't assume
6577 * anything out of it. We are just avoiding race here.
6578 */
6579 do {
6580 spin_lock_irqsave(hba->host->host_lock, flags);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306581 if (!(work_pending(&hba->eh_work) ||
Zang Leigang8dc0da72017-06-24 19:14:32 +08006582 hba->ufshcd_state == UFSHCD_STATE_RESET ||
6583 hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306584 break;
6585 spin_unlock_irqrestore(hba->host->host_lock, flags);
6586 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05306587 flush_work(&hba->eh_work);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306588 } while (1);
6589
6590 hba->ufshcd_state = UFSHCD_STATE_RESET;
6591 ufshcd_set_eh_in_progress(hba);
6592 spin_unlock_irqrestore(hba->host->host_lock, flags);
6593
6594 err = ufshcd_reset_and_restore(hba);
6595
6596 spin_lock_irqsave(hba->host->host_lock, flags);
6597 if (!err) {
6598 err = SUCCESS;
6599 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6600 } else {
6601 err = FAILED;
6602 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6603 }
6604 ufshcd_clear_eh_in_progress(hba);
6605 spin_unlock_irqrestore(hba->host->host_lock, flags);
6606
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03006607 ufshcd_release(hba);
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05306608 return err;
6609}
6610
6611/**
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006612 * ufshcd_get_max_icc_level - calculate the ICC level
6613 * @sup_curr_uA: max. current supported by the regulator
6614 * @start_scan: row at the desc table to start scan from
6615 * @buff: power descriptor buffer
6616 *
6617 * Returns calculated max ICC level for specific regulator
6618 */
6619static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6620{
6621 int i;
6622 int curr_uA;
6623 u16 data;
6624 u16 unit;
6625
6626 for (i = start_scan; i >= 0; i--) {
Tomas Winklerd79713f2017-01-05 10:45:11 +02006627 data = be16_to_cpup((__be16 *)&buff[2 * i]);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006628 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6629 ATTR_ICC_LVL_UNIT_OFFSET;
6630 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6631 switch (unit) {
6632 case UFSHCD_NANO_AMP:
6633 curr_uA = curr_uA / 1000;
6634 break;
6635 case UFSHCD_MILI_AMP:
6636 curr_uA = curr_uA * 1000;
6637 break;
6638 case UFSHCD_AMP:
6639 curr_uA = curr_uA * 1000 * 1000;
6640 break;
6641 case UFSHCD_MICRO_AMP:
6642 default:
6643 break;
6644 }
6645 if (sup_curr_uA >= curr_uA)
6646 break;
6647 }
6648 if (i < 0) {
6649 i = 0;
6650 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6651 }
6652
6653 return (u32)i;
6654}
6655
6656/**
6657 * ufshcd_calc_icc_level - calculate the max ICC level
6658 * In case regulators are not initialized we'll return 0
6659 * @hba: per-adapter instance
6660 * @desc_buf: power descriptor buffer to extract ICC levels from.
6661 * @len: length of desc_buff
6662 *
6663 * Returns calculated ICC level
6664 */
6665static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6666 u8 *desc_buf, int len)
6667{
6668 u32 icc_level = 0;
6669
6670 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6671 !hba->vreg_info.vccq2) {
6672 dev_err(hba->dev,
6673 "%s: Regulator capability was not set, actvIccLevel=%d",
6674 __func__, icc_level);
6675 goto out;
6676 }
6677
Stanley Chu0487fff2019-03-28 17:16:25 +08006678 if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006679 icc_level = ufshcd_get_max_icc_level(
6680 hba->vreg_info.vcc->max_uA,
6681 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6682 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6683
Stanley Chu0487fff2019-03-28 17:16:25 +08006684 if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006685 icc_level = ufshcd_get_max_icc_level(
6686 hba->vreg_info.vccq->max_uA,
6687 icc_level,
6688 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6689
Stanley Chu0487fff2019-03-28 17:16:25 +08006690 if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006691 icc_level = ufshcd_get_max_icc_level(
6692 hba->vreg_info.vccq2->max_uA,
6693 icc_level,
6694 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6695out:
6696 return icc_level;
6697}
6698
Can Guoe89860f2020-03-26 02:25:41 -07006699static void ufshcd_set_active_icc_lvl(struct ufs_hba *hba)
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006700{
6701 int ret;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00006702 int buff_len = hba->desc_size.pwr_desc;
Kees Cookbbe21d72018-05-02 16:58:09 -07006703 u8 *desc_buf;
Can Guoe89860f2020-03-26 02:25:41 -07006704 u32 icc_level;
Kees Cookbbe21d72018-05-02 16:58:09 -07006705
6706 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6707 if (!desc_buf)
6708 return;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006709
Bean Huo8c9a51b2020-01-20 14:08:17 +01006710 ret = ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0,
6711 desc_buf, buff_len);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006712 if (ret) {
6713 dev_err(hba->dev,
6714 "%s: Failed reading power descriptor.len = %d ret = %d",
6715 __func__, buff_len, ret);
Kees Cookbbe21d72018-05-02 16:58:09 -07006716 goto out;
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006717 }
6718
Can Guoe89860f2020-03-26 02:25:41 -07006719 icc_level = ufshcd_find_max_sup_active_icc_level(hba, desc_buf,
6720 buff_len);
6721 dev_dbg(hba->dev, "%s: setting icc_level 0x%x", __func__, icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006722
Szymon Mielczarekdbd34a62017-03-29 08:19:21 +02006723 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
Can Guoe89860f2020-03-26 02:25:41 -07006724 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0, &icc_level);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006725
6726 if (ret)
6727 dev_err(hba->dev,
6728 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
Can Guoe89860f2020-03-26 02:25:41 -07006729 __func__, icc_level, ret);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006730
Kees Cookbbe21d72018-05-02 16:58:09 -07006731out:
6732 kfree(desc_buf);
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006733}
6734
Can Guofb276f72020-03-25 18:09:59 -07006735static inline void ufshcd_blk_pm_runtime_init(struct scsi_device *sdev)
6736{
6737 scsi_autopm_get_device(sdev);
6738 blk_pm_runtime_init(sdev->request_queue, &sdev->sdev_gendev);
6739 if (sdev->rpm_autosuspend)
6740 pm_runtime_set_autosuspend_delay(&sdev->sdev_gendev,
6741 RPM_AUTOSUSPEND_DELAY_MS);
6742 scsi_autopm_put_device(sdev);
6743}
6744
Yaniv Gardi3a4bf062014-09-25 15:32:27 +03006745/**
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006746 * ufshcd_scsi_add_wlus - Adds required W-LUs
6747 * @hba: per-adapter instance
6748 *
6749 * UFS device specification requires the UFS devices to support 4 well known
6750 * logical units:
6751 * "REPORT_LUNS" (address: 01h)
6752 * "UFS Device" (address: 50h)
6753 * "RPMB" (address: 44h)
6754 * "BOOT" (address: 30h)
6755 * UFS device's power management needs to be controlled by "POWER CONDITION"
6756 * field of SSU (START STOP UNIT) command. But this "power condition" field
6757 * will take effect only when its sent to "UFS device" well known logical unit
6758 * hence we require the scsi_device instance to represent this logical unit in
6759 * order for the UFS host driver to send the SSU command for power management.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006760 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006761 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6762 * Block) LU so user space process can control this LU. User space may also
6763 * want to have access to BOOT LU.
Bart Van Assche8aa29f12018-03-01 15:07:20 -08006764 *
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006765 * This function adds scsi device instances for each of all well known LUs
6766 * (except "REPORT LUNS" LU).
6767 *
6768 * Returns zero on success (all required W-LUs are added successfully),
6769 * non-zero error value on failure (if failed to add any of the required W-LU).
6770 */
6771static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6772{
6773 int ret = 0;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006774 struct scsi_device *sdev_rpmb;
6775 struct scsi_device *sdev_boot;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006776
6777 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6778 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6779 if (IS_ERR(hba->sdev_ufs_device)) {
6780 ret = PTR_ERR(hba->sdev_ufs_device);
6781 hba->sdev_ufs_device = NULL;
6782 goto out;
6783 }
Can Guofb276f72020-03-25 18:09:59 -07006784 ufshcd_blk_pm_runtime_init(hba->sdev_ufs_device);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006785 scsi_device_put(hba->sdev_ufs_device);
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006786
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006787 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006788 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006789 if (IS_ERR(sdev_rpmb)) {
6790 ret = PTR_ERR(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006791 goto remove_sdev_ufs_device;
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006792 }
Can Guofb276f72020-03-25 18:09:59 -07006793 ufshcd_blk_pm_runtime_init(sdev_rpmb);
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03006794 scsi_device_put(sdev_rpmb);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006795
6796 sdev_boot = __scsi_add_device(hba->host, 0, 0,
6797 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
Can Guofb276f72020-03-25 18:09:59 -07006798 if (IS_ERR(sdev_boot)) {
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006799 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
Can Guofb276f72020-03-25 18:09:59 -07006800 } else {
6801 ufshcd_blk_pm_runtime_init(sdev_boot);
Huanlin Ke3d21fbd2017-09-22 18:31:47 +08006802 scsi_device_put(sdev_boot);
Can Guofb276f72020-03-25 18:09:59 -07006803 }
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006804 goto out;
6805
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006806remove_sdev_ufs_device:
6807 scsi_remove_device(hba->sdev_ufs_device);
6808out:
6809 return ret;
6810}
6811
Asutosh Das3d17b9b2020-04-22 14:41:42 -07006812static void ufshcd_wb_probe(struct ufs_hba *hba, u8 *desc_buf)
6813{
Stanley Chu6f8d5a62020-05-08 16:01:13 +08006814 u8 lun;
6815 u32 d_lu_wb_buf_alloc;
6816
Stanley Chu817d7e12020-05-08 16:01:08 +08006817 if (!ufshcd_is_wb_allowed(hba))
6818 return;
6819
6820 if (hba->desc_size.dev_desc < DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP + 4)
6821 goto wb_disabled;
6822
Asutosh Das3d17b9b2020-04-22 14:41:42 -07006823 hba->dev_info.d_ext_ufs_feature_sup =
6824 get_unaligned_be32(desc_buf +
6825 DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP);
Stanley Chu817d7e12020-05-08 16:01:08 +08006826
6827 if (!(hba->dev_info.d_ext_ufs_feature_sup & UFS_DEV_WRITE_BOOSTER_SUP))
6828 goto wb_disabled;
6829
Asutosh Das3d17b9b2020-04-22 14:41:42 -07006830 /*
6831 * WB may be supported but not configured while provisioning.
6832 * The spec says, in dedicated wb buffer mode,
6833 * a max of 1 lun would have wb buffer configured.
6834 * Now only shared buffer mode is supported.
6835 */
6836 hba->dev_info.b_wb_buffer_type =
6837 desc_buf[DEVICE_DESC_PARAM_WB_TYPE];
6838
Asutosh Das3d17b9b2020-04-22 14:41:42 -07006839 hba->dev_info.b_presrv_uspc_en =
6840 desc_buf[DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN];
6841
Stanley Chu6f8d5a62020-05-08 16:01:13 +08006842 if (hba->dev_info.b_wb_buffer_type == WB_BUF_MODE_SHARED) {
6843 hba->dev_info.d_wb_alloc_units =
6844 get_unaligned_be32(desc_buf +
6845 DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS);
6846 if (!hba->dev_info.d_wb_alloc_units)
6847 goto wb_disabled;
6848 } else {
6849 for (lun = 0; lun < UFS_UPIU_MAX_WB_LUN_ID; lun++) {
6850 d_lu_wb_buf_alloc = 0;
6851 ufshcd_read_unit_desc_param(hba,
6852 lun,
6853 UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS,
6854 (u8 *)&d_lu_wb_buf_alloc,
6855 sizeof(d_lu_wb_buf_alloc));
6856 if (d_lu_wb_buf_alloc) {
6857 hba->dev_info.wb_dedicated_lu = lun;
6858 break;
6859 }
6860 }
Stanley Chu817d7e12020-05-08 16:01:08 +08006861
Stanley Chu6f8d5a62020-05-08 16:01:13 +08006862 if (!d_lu_wb_buf_alloc)
6863 goto wb_disabled;
6864 }
Stanley Chu817d7e12020-05-08 16:01:08 +08006865 return;
6866
6867wb_disabled:
6868 hba->caps &= ~UFSHCD_CAP_WB_EN;
6869}
6870
Stanley Chu8db269a2020-05-08 16:01:10 +08006871void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups)
Stanley Chu817d7e12020-05-08 16:01:08 +08006872{
6873 struct ufs_dev_fix *f;
6874 struct ufs_dev_info *dev_info = &hba->dev_info;
6875
Stanley Chu8db269a2020-05-08 16:01:10 +08006876 if (!fixups)
6877 return;
6878
6879 for (f = fixups; f->quirk; f++) {
Stanley Chu817d7e12020-05-08 16:01:08 +08006880 if ((f->wmanufacturerid == dev_info->wmanufacturerid ||
6881 f->wmanufacturerid == UFS_ANY_VENDOR) &&
6882 ((dev_info->model &&
6883 STR_PRFX_EQUAL(f->model, dev_info->model)) ||
6884 !strcmp(f->model, UFS_ANY_MODEL)))
6885 hba->dev_quirks |= f->quirk;
6886 }
Asutosh Das3d17b9b2020-04-22 14:41:42 -07006887}
Stanley Chu8db269a2020-05-08 16:01:10 +08006888EXPORT_SYMBOL_GPL(ufshcd_fixup_dev_quirks);
Asutosh Das3d17b9b2020-04-22 14:41:42 -07006889
Stanley Chuc28c00b2020-05-08 16:01:09 +08006890static void ufs_fixup_device_setup(struct ufs_hba *hba)
6891{
6892 /* fix by general quirk table */
Stanley Chu8db269a2020-05-08 16:01:10 +08006893 ufshcd_fixup_dev_quirks(hba, ufs_fixups);
Stanley Chuc28c00b2020-05-08 16:01:09 +08006894
6895 /* allow vendors to fix quirks */
6896 ufshcd_vops_fixup_dev_quirks(hba);
6897}
6898
Bean Huo09750062020-01-20 14:08:14 +01006899static int ufs_get_device_desc(struct ufs_hba *hba)
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006900{
6901 int err;
Kees Cookbbe21d72018-05-02 16:58:09 -07006902 size_t buff_len;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006903 u8 model_index;
Kees Cookbbe21d72018-05-02 16:58:09 -07006904 u8 *desc_buf;
Bean Huo09750062020-01-20 14:08:14 +01006905 struct ufs_dev_info *dev_info = &hba->dev_info;
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006906
Kees Cookbbe21d72018-05-02 16:58:09 -07006907 buff_len = max_t(size_t, hba->desc_size.dev_desc,
6908 QUERY_DESC_MAX_SIZE + 1);
6909 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6910 if (!desc_buf) {
6911 err = -ENOMEM;
6912 goto out;
6913 }
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006914
Bean Huo8c9a51b2020-01-20 14:08:17 +01006915 err = ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, desc_buf,
6916 hba->desc_size.dev_desc);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006917 if (err) {
6918 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6919 __func__, err);
6920 goto out;
6921 }
6922
6923 /*
6924 * getting vendor (manufacturerID) and Bank Index in big endian
6925 * format
6926 */
Bean Huo09750062020-01-20 14:08:14 +01006927 dev_info->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006928 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6929
Can Guo09f17792020-02-10 19:40:49 -08006930 /* getting Specification Version in big endian format */
6931 dev_info->wspecversion = desc_buf[DEVICE_DESC_PARAM_SPEC_VER] << 8 |
6932 desc_buf[DEVICE_DESC_PARAM_SPEC_VER + 1];
6933
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006934 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
Asutosh Das3d17b9b2020-04-22 14:41:42 -07006935
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006936 err = ufshcd_read_string_desc(hba, model_index,
Bean Huo09750062020-01-20 14:08:14 +01006937 &dev_info->model, SD_ASCII_STD);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006938 if (err < 0) {
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006939 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6940 __func__, err);
6941 goto out;
6942 }
6943
Stanley Chu817d7e12020-05-08 16:01:08 +08006944 ufs_fixup_device_setup(hba);
6945
6946 /*
6947 * Probe WB only for UFS-3.1 devices or UFS devices with quirk
6948 * UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES enabled
6949 */
6950 if (dev_info->wspecversion >= 0x310 ||
6951 (hba->dev_quirks & UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES))
6952 ufshcd_wb_probe(hba, desc_buf);
6953
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006954 /*
6955 * ufshcd_read_string_desc returns size of the string
6956 * reset the error value
6957 */
6958 err = 0;
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006959
6960out:
Kees Cookbbe21d72018-05-02 16:58:09 -07006961 kfree(desc_buf);
Yaniv Gardic58ab7a2016-03-10 17:37:10 +02006962 return err;
6963}
6964
Bean Huo09750062020-01-20 14:08:14 +01006965static void ufs_put_device_desc(struct ufs_hba *hba)
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006966{
Bean Huo09750062020-01-20 14:08:14 +01006967 struct ufs_dev_info *dev_info = &hba->dev_info;
6968
6969 kfree(dev_info->model);
6970 dev_info->model = NULL;
Tomas Winkler4b828fe2019-07-30 08:55:17 +03006971}
6972
Subhash Jadavani2a8fa602014-09-25 15:32:28 +03006973/**
Yaniv Gardi37113102016-03-10 17:37:16 +02006974 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6975 * @hba: per-adapter instance
6976 *
6977 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6978 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6979 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6980 * the hibern8 exit latency.
6981 *
6982 * Returns zero on success, non-zero error value on failure.
6983 */
6984static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6985{
6986 int ret = 0;
6987 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6988
6989 ret = ufshcd_dme_peer_get(hba,
6990 UIC_ARG_MIB_SEL(
6991 RX_MIN_ACTIVATETIME_CAPABILITY,
6992 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6993 &peer_rx_min_activatetime);
6994 if (ret)
6995 goto out;
6996
6997 /* make sure proper unit conversion is applied */
6998 tuned_pa_tactivate =
6999 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
7000 / PA_TACTIVATE_TIME_UNIT_US);
7001 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7002 tuned_pa_tactivate);
7003
7004out:
7005 return ret;
7006}
7007
7008/**
7009 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
7010 * @hba: per-adapter instance
7011 *
7012 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
7013 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
7014 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
7015 * This optimal value can help reduce the hibern8 exit latency.
7016 *
7017 * Returns zero on success, non-zero error value on failure.
7018 */
7019static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
7020{
7021 int ret = 0;
7022 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
7023 u32 max_hibern8_time, tuned_pa_hibern8time;
7024
7025 ret = ufshcd_dme_get(hba,
7026 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
7027 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
7028 &local_tx_hibern8_time_cap);
7029 if (ret)
7030 goto out;
7031
7032 ret = ufshcd_dme_peer_get(hba,
7033 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
7034 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
7035 &peer_rx_hibern8_time_cap);
7036 if (ret)
7037 goto out;
7038
7039 max_hibern8_time = max(local_tx_hibern8_time_cap,
7040 peer_rx_hibern8_time_cap);
7041 /* make sure proper unit conversion is applied */
7042 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
7043 / PA_HIBERN8_TIME_UNIT_US);
7044 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
7045 tuned_pa_hibern8time);
7046out:
7047 return ret;
7048}
7049
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08007050/**
7051 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
7052 * less than device PA_TACTIVATE time.
7053 * @hba: per-adapter instance
7054 *
7055 * Some UFS devices require host PA_TACTIVATE to be lower than device
7056 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
7057 * for such devices.
7058 *
7059 * Returns zero on success, non-zero error value on failure.
7060 */
7061static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
7062{
7063 int ret = 0;
7064 u32 granularity, peer_granularity;
7065 u32 pa_tactivate, peer_pa_tactivate;
7066 u32 pa_tactivate_us, peer_pa_tactivate_us;
7067 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
7068
7069 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7070 &granularity);
7071 if (ret)
7072 goto out;
7073
7074 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
7075 &peer_granularity);
7076 if (ret)
7077 goto out;
7078
7079 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
7080 (granularity > PA_GRANULARITY_MAX_VAL)) {
7081 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
7082 __func__, granularity);
7083 return -EINVAL;
7084 }
7085
7086 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
7087 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
7088 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
7089 __func__, peer_granularity);
7090 return -EINVAL;
7091 }
7092
7093 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
7094 if (ret)
7095 goto out;
7096
7097 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
7098 &peer_pa_tactivate);
7099 if (ret)
7100 goto out;
7101
7102 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
7103 peer_pa_tactivate_us = peer_pa_tactivate *
7104 gran_to_us_table[peer_granularity - 1];
7105
7106 if (pa_tactivate_us > peer_pa_tactivate_us) {
7107 u32 new_peer_pa_tactivate;
7108
7109 new_peer_pa_tactivate = pa_tactivate_us /
7110 gran_to_us_table[peer_granularity - 1];
7111 new_peer_pa_tactivate++;
7112 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
7113 new_peer_pa_tactivate);
7114 }
7115
7116out:
7117 return ret;
7118}
7119
Bean Huo09750062020-01-20 14:08:14 +01007120static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
Yaniv Gardi37113102016-03-10 17:37:16 +02007121{
7122 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
7123 ufshcd_tune_pa_tactivate(hba);
7124 ufshcd_tune_pa_hibern8time(hba);
7125 }
7126
Can Guoe91ed9e2020-02-23 20:09:21 -08007127 ufshcd_vops_apply_dev_quirks(hba);
7128
Yaniv Gardi37113102016-03-10 17:37:16 +02007129 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
7130 /* set 1ms timeout for PA_TACTIVATE */
7131 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
subhashj@codeaurora.orgc6a6db42016-11-23 16:32:08 -08007132
7133 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
7134 ufshcd_quirk_tune_host_pa_tactivate(hba);
Yaniv Gardi37113102016-03-10 17:37:16 +02007135}
7136
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007137static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
7138{
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007139 hba->ufs_stats.hibern8_exit_cnt = 0;
7140 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
Gilad Broner7fabb772017-02-03 16:56:50 -08007141 hba->req_abort_count = 0;
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007142}
7143
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00007144static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
7145{
7146 int err;
7147
7148 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
7149 &hba->desc_size.dev_desc);
7150 if (err)
7151 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
7152
7153 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
7154 &hba->desc_size.pwr_desc);
7155 if (err)
7156 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
7157
7158 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
7159 &hba->desc_size.interc_desc);
7160 if (err)
7161 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
7162
7163 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
7164 &hba->desc_size.conf_desc);
7165 if (err)
7166 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
7167
7168 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
7169 &hba->desc_size.unit_desc);
7170 if (err)
7171 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
7172
7173 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
7174 &hba->desc_size.geom_desc);
7175 if (err)
7176 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
Bean Huo059efd82019-10-29 14:22:45 +00007177
Stanislav Nijnikovc648c2d2018-02-15 14:14:05 +02007178 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
7179 &hba->desc_size.hlth_desc);
7180 if (err)
7181 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00007182}
7183
Bean Huo731f0622020-01-20 14:08:19 +01007184static int ufshcd_device_geo_params_init(struct ufs_hba *hba)
7185{
7186 int err;
7187 size_t buff_len;
7188 u8 *desc_buf;
7189
7190 buff_len = hba->desc_size.geom_desc;
7191 desc_buf = kmalloc(buff_len, GFP_KERNEL);
7192 if (!desc_buf) {
7193 err = -ENOMEM;
7194 goto out;
7195 }
7196
7197 err = ufshcd_read_desc(hba, QUERY_DESC_IDN_GEOMETRY, 0,
7198 desc_buf, buff_len);
7199 if (err) {
7200 dev_err(hba->dev, "%s: Failed reading Geometry Desc. err = %d\n",
7201 __func__, err);
7202 goto out;
7203 }
7204
7205 if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 1)
7206 hba->dev_info.max_lu_supported = 32;
7207 else if (desc_buf[GEOMETRY_DESC_PARAM_MAX_NUM_LUN] == 0)
7208 hba->dev_info.max_lu_supported = 8;
7209
7210out:
7211 kfree(desc_buf);
7212 return err;
7213}
7214
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307215static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
7216 {19200000, REF_CLK_FREQ_19_2_MHZ},
7217 {26000000, REF_CLK_FREQ_26_MHZ},
7218 {38400000, REF_CLK_FREQ_38_4_MHZ},
7219 {52000000, REF_CLK_FREQ_52_MHZ},
7220 {0, REF_CLK_FREQ_INVAL},
7221};
7222
7223static enum ufs_ref_clk_freq
7224ufs_get_bref_clk_from_hz(unsigned long freq)
7225{
7226 int i;
7227
7228 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
7229 if (ufs_ref_clk_freqs[i].freq_hz == freq)
7230 return ufs_ref_clk_freqs[i].val;
7231
7232 return REF_CLK_FREQ_INVAL;
7233}
7234
7235void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
7236{
7237 unsigned long freq;
7238
7239 freq = clk_get_rate(refclk);
7240
7241 hba->dev_ref_clk_freq =
7242 ufs_get_bref_clk_from_hz(freq);
7243
7244 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
7245 dev_err(hba->dev,
7246 "invalid ref_clk setting = %ld\n", freq);
7247}
7248
7249static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
7250{
7251 int err;
7252 u32 ref_clk;
7253 u32 freq = hba->dev_ref_clk_freq;
7254
7255 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
7256 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
7257
7258 if (err) {
7259 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
7260 err);
7261 goto out;
7262 }
7263
7264 if (ref_clk == freq)
7265 goto out; /* nothing to update */
7266
7267 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
7268 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
7269
7270 if (err) {
7271 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
7272 ufs_ref_clk_freqs[freq].freq_hz);
7273 goto out;
7274 }
7275
7276 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
7277 ufs_ref_clk_freqs[freq].freq_hz);
7278
7279out:
7280 return err;
7281}
7282
Bean Huo1b9e2142020-01-20 14:08:15 +01007283static int ufshcd_device_params_init(struct ufs_hba *hba)
7284{
7285 bool flag;
7286 int ret;
7287
Bean Huo731f0622020-01-20 14:08:19 +01007288 /* Clear any previous UFS device information */
7289 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
7290
Bean Huo1b9e2142020-01-20 14:08:15 +01007291 /* Init check for device descriptor sizes */
7292 ufshcd_init_desc_sizes(hba);
7293
Bean Huo731f0622020-01-20 14:08:19 +01007294 /* Init UFS geometry descriptor related parameters */
7295 ret = ufshcd_device_geo_params_init(hba);
7296 if (ret)
7297 goto out;
7298
Bean Huo1b9e2142020-01-20 14:08:15 +01007299 /* Check and apply UFS device quirks */
7300 ret = ufs_get_device_desc(hba);
7301 if (ret) {
7302 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
7303 __func__, ret);
7304 goto out;
7305 }
7306
Can Guo09f17792020-02-10 19:40:49 -08007307 ufshcd_get_ref_clk_gating_wait(hba);
7308
Bean Huo1b9e2142020-01-20 14:08:15 +01007309 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
Stanley Chu1f34eed2020-05-08 16:01:12 +08007310 QUERY_FLAG_IDN_PWR_ON_WPE, 0, &flag))
Bean Huo1b9e2142020-01-20 14:08:15 +01007311 hba->dev_info.f_power_on_wp_en = flag;
7312
Bean Huo2b35b2a2020-01-20 14:08:16 +01007313 /* Probe maximum power mode co-supported by both UFS host and device */
7314 if (ufshcd_get_max_pwr_mode(hba))
7315 dev_err(hba->dev,
7316 "%s: Failed getting max supported power mode\n",
7317 __func__);
Bean Huo1b9e2142020-01-20 14:08:15 +01007318out:
7319 return ret;
7320}
7321
7322/**
7323 * ufshcd_add_lus - probe and add UFS logical units
7324 * @hba: per-adapter instance
7325 */
7326static int ufshcd_add_lus(struct ufs_hba *hba)
7327{
7328 int ret;
7329
Bean Huo1b9e2142020-01-20 14:08:15 +01007330 /* Add required well known logical units to scsi mid layer */
7331 ret = ufshcd_scsi_add_wlus(hba);
7332 if (ret)
7333 goto out;
7334
7335 /* Initialize devfreq after UFS device is detected */
7336 if (ufshcd_is_clkscaling_supported(hba)) {
7337 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7338 &hba->pwr_info,
7339 sizeof(struct ufs_pa_layer_attr));
7340 hba->clk_scaling.saved_pwr_info.is_valid = true;
7341 if (!hba->devfreq) {
7342 ret = ufshcd_devfreq_init(hba);
7343 if (ret)
7344 goto out;
7345 }
7346
7347 hba->clk_scaling.is_allowed = true;
7348 }
7349
7350 ufs_bsg_probe(hba);
7351 scsi_scan_host(hba->host);
7352 pm_runtime_put_sync(hba->dev);
7353
Bean Huo1b9e2142020-01-20 14:08:15 +01007354out:
7355 return ret;
7356}
7357
Yaniv Gardi37113102016-03-10 17:37:16 +02007358/**
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007359 * ufshcd_probe_hba - probe hba to detect device and initialize
7360 * @hba: per-adapter instance
Bean Huo1b9e2142020-01-20 14:08:15 +01007361 * @async: asynchronous execution or not
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007362 *
7363 * Execute link-startup and verify device initialization
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307364 */
Bean Huo1b9e2142020-01-20 14:08:15 +01007365static int ufshcd_probe_hba(struct ufs_hba *hba, bool async)
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307366{
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307367 int ret;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007368 ktime_t start = ktime_get();
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307369
7370 ret = ufshcd_link_startup(hba);
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307371 if (ret)
7372 goto out;
7373
Yaniv Gardiafdfff52016-03-10 17:37:15 +02007374 /* set the default level for urgent bkops */
7375 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
7376 hba->is_urgent_bkops_lvl_checked = false;
7377
Dolev Ravivff8e20c2016-12-22 18:42:18 -08007378 /* Debug counters initialization */
7379 ufshcd_clear_dbg_ufs_stats(hba);
7380
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007381 /* UniPro link is active now */
7382 ufshcd_set_link_active(hba);
Seungwon Jeond3e89ba2013-08-31 21:40:24 +05307383
Bean Huo1b9e2142020-01-20 14:08:15 +01007384 /* Verify device initialization by sending NOP OUT UPIU */
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307385 ret = ufshcd_verify_dev_init(hba);
7386 if (ret)
7387 goto out;
7388
Bean Huo1b9e2142020-01-20 14:08:15 +01007389 /* Initiate UFS initialization, and waiting until completion */
Dolev Raviv68078d52013-07-30 00:35:58 +05307390 ret = ufshcd_complete_dev_init(hba);
7391 if (ret)
7392 goto out;
7393
Bean Huo1b9e2142020-01-20 14:08:15 +01007394 /*
7395 * Initialize UFS device parameters used by driver, these
7396 * parameters are associated with UFS descriptors.
7397 */
7398 if (async) {
7399 ret = ufshcd_device_params_init(hba);
7400 if (ret)
7401 goto out;
Tomas Winkler93fdd5a2017-01-05 10:45:12 +02007402 }
7403
Bean Huo09750062020-01-20 14:08:14 +01007404 ufshcd_tune_unipro_params(hba);
Tomas Winkler4b828fe2019-07-30 08:55:17 +03007405
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007406 /* UFS device is also active now */
7407 ufshcd_set_ufs_dev_active(hba);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05307408 ufshcd_force_reset_auto_bkops(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007409 hba->wlun_dev_clr_ua = true;
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307410
Bean Huo2b35b2a2020-01-20 14:08:16 +01007411 /* Gear up to HS gear if supported */
7412 if (hba->max_pwr_info.is_valid) {
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307413 /*
7414 * Set the right value to bRefClkFreq before attempting to
7415 * switch to HS gears.
7416 */
7417 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
7418 ufshcd_set_dev_ref_clk(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007419 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
Dov Levenglick8643ae62016-10-17 17:10:14 -07007420 if (ret) {
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007421 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
7422 __func__, ret);
Dov Levenglick8643ae62016-10-17 17:10:14 -07007423 goto out;
7424 }
Can Guo6a9df812020-02-11 21:38:28 -08007425 ufshcd_print_pwr_info(hba);
Dolev Raviv7eb584d2014-09-25 15:32:31 +03007426 }
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007427
Can Guoe89860f2020-03-26 02:25:41 -07007428 /*
7429 * bActiveICCLevel is volatile for UFS device (as per latest v2.1 spec)
7430 * and for removable UFS card as well, hence always set the parameter.
7431 * Note: Error handler may issue the device reset hence resetting
7432 * bActiveICCLevel as well so it is always safe to set this here.
7433 */
7434 ufshcd_set_active_icc_lvl(hba);
7435
Yaniv Gardi53c12d02016-02-01 15:02:45 +02007436 /* set the state as operational after switching to desired gear */
7437 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
Potomski, MichalXa4b0e8a2017-02-23 09:05:30 +00007438
Asutosh Das3d17b9b2020-04-22 14:41:42 -07007439 ufshcd_wb_config(hba);
Can Guo71d848b2019-11-14 22:09:26 -08007440 /* Enable Auto-Hibernate if configured */
7441 ufshcd_auto_hibern8_enable(hba);
7442
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05307443out:
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007444
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007445 trace_ufshcd_init(dev_name(hba->dev), ret,
7446 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08007447 hba->curr_dev_pwr_mode, hba->uic_link_state);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007448 return ret;
7449}
7450
7451/**
7452 * ufshcd_async_scan - asynchronous execution for probing hba
7453 * @data: data pointer to pass to this function
7454 * @cookie: cookie data
7455 */
7456static void ufshcd_async_scan(void *data, async_cookie_t cookie)
7457{
7458 struct ufs_hba *hba = (struct ufs_hba *)data;
Bean Huo1b9e2142020-01-20 14:08:15 +01007459 int ret;
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007460
Bean Huo1b9e2142020-01-20 14:08:15 +01007461 /* Initialize hba, detect and initialize UFS device */
7462 ret = ufshcd_probe_hba(hba, true);
7463 if (ret)
7464 goto out;
7465
7466 /* Probe and add UFS logical units */
7467 ret = ufshcd_add_lus(hba);
7468out:
7469 /*
7470 * If we failed to initialize the device or the device is not
7471 * present, turn off the power/clocks etc.
7472 */
7473 if (ret) {
7474 pm_runtime_put_sync(hba->dev);
7475 ufshcd_exit_clk_scaling(hba);
7476 ufshcd_hba_exit(hba);
7477 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05307478}
7479
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007480static const struct attribute_group *ufshcd_driver_groups[] = {
7481 &ufs_sysfs_unit_descriptor_group,
Stanislav Nijnikovec92b592018-02-15 14:14:11 +02007482 &ufs_sysfs_lun_attributes_group,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007483 NULL,
7484};
7485
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307486static struct scsi_host_template ufshcd_driver_template = {
7487 .module = THIS_MODULE,
7488 .name = UFSHCD,
7489 .proc_name = UFSHCD,
7490 .queuecommand = ufshcd_queuecommand,
7491 .slave_alloc = ufshcd_slave_alloc,
Akinobu Mitaeeda4742014-07-01 23:00:32 +09007492 .slave_configure = ufshcd_slave_configure,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307493 .slave_destroy = ufshcd_slave_destroy,
Sujit Reddy Thumma4264fd62014-06-29 09:40:20 +03007494 .change_queue_depth = ufshcd_change_queue_depth,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307495 .eh_abort_handler = ufshcd_abort,
Sujit Reddy Thumma3441da72014-05-26 10:59:14 +05307496 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
7497 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307498 .this_id = -1,
7499 .sg_tablesize = SG_ALL,
7500 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
7501 .can_queue = UFSHCD_CAN_QUEUE,
Christoph Hellwig552a9902019-06-17 14:19:55 +02007502 .max_segment_size = PRDT_DATA_BYTE_COUNT_MAX,
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007503 .max_host_blocked = 1,
Christoph Hellwigc40ecc12014-11-13 14:25:11 +01007504 .track_queue_depth = 1,
Stanislav Nijnikovd829fc82018-02-15 14:14:09 +02007505 .sdev_groups = ufshcd_driver_groups,
Christoph Hellwig4af14d12018-12-13 16:17:09 +01007506 .dma_boundary = PAGE_SIZE - 1,
Stanley Chu49615ba2019-09-16 23:56:50 +08007507 .rpm_autosuspend_delay = RPM_AUTOSUSPEND_DELAY_MS,
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307508};
7509
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007510static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
7511 int ua)
7512{
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007513 int ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007514
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007515 if (!vreg)
7516 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007517
Stanley Chu0487fff2019-03-28 17:16:25 +08007518 /*
7519 * "set_load" operation shall be required on those regulators
7520 * which specifically configured current limitation. Otherwise
7521 * zero max_uA may cause unexpected behavior when regulator is
7522 * enabled or set as high power mode.
7523 */
7524 if (!vreg->max_uA)
7525 return 0;
7526
Bjorn Andersson7b16a072015-02-11 19:35:28 -08007527 ret = regulator_set_load(vreg->reg, ua);
7528 if (ret < 0) {
7529 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
7530 __func__, vreg->name, ua, ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007531 }
7532
7533 return ret;
7534}
7535
7536static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7537 struct ufs_vreg *vreg)
7538{
Marc Gonzalez73067982019-02-27 11:41:45 +01007539 return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007540}
7541
7542static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7543 struct ufs_vreg *vreg)
7544{
Adrian Hunter7c7cfdc2019-08-14 15:59:50 +03007545 if (!vreg)
7546 return 0;
7547
Marc Gonzalez73067982019-02-27 11:41:45 +01007548 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007549}
7550
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007551static int ufshcd_config_vreg(struct device *dev,
7552 struct ufs_vreg *vreg, bool on)
7553{
7554 int ret = 0;
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007555 struct regulator *reg;
7556 const char *name;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007557 int min_uV, uA_load;
7558
7559 BUG_ON(!vreg);
7560
Gustavo A. R. Silva72753592017-11-20 08:12:29 -06007561 reg = vreg->reg;
7562 name = vreg->name;
7563
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007564 if (regulator_count_voltages(reg) > 0) {
Asutosh Das90d88f42020-02-10 19:40:45 -08007565 uA_load = on ? vreg->max_uA : 0;
7566 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7567 if (ret)
7568 goto out;
7569
Stanley Chu3b141e82019-03-28 17:16:24 +08007570 if (vreg->min_uV && vreg->max_uV) {
7571 min_uV = on ? vreg->min_uV : 0;
7572 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7573 if (ret) {
7574 dev_err(dev,
7575 "%s: %s set voltage failed, err=%d\n",
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007576 __func__, name, ret);
Stanley Chu3b141e82019-03-28 17:16:24 +08007577 goto out;
7578 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007579 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007580 }
7581out:
7582 return ret;
7583}
7584
7585static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7586{
7587 int ret = 0;
7588
Marc Gonzalez73067982019-02-27 11:41:45 +01007589 if (!vreg || vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007590 goto out;
7591
7592 ret = ufshcd_config_vreg(dev, vreg, true);
7593 if (!ret)
7594 ret = regulator_enable(vreg->reg);
7595
7596 if (!ret)
7597 vreg->enabled = true;
7598 else
7599 dev_err(dev, "%s: %s enable failed, err=%d\n",
7600 __func__, vreg->name, ret);
7601out:
7602 return ret;
7603}
7604
7605static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7606{
7607 int ret = 0;
7608
Marc Gonzalez73067982019-02-27 11:41:45 +01007609 if (!vreg || !vreg->enabled)
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007610 goto out;
7611
7612 ret = regulator_disable(vreg->reg);
7613
7614 if (!ret) {
7615 /* ignore errors on applying disable config */
7616 ufshcd_config_vreg(dev, vreg, false);
7617 vreg->enabled = false;
7618 } else {
7619 dev_err(dev, "%s: %s disable failed, err=%d\n",
7620 __func__, vreg->name, ret);
7621 }
7622out:
7623 return ret;
7624}
7625
7626static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7627{
7628 int ret = 0;
7629 struct device *dev = hba->dev;
7630 struct ufs_vreg_info *info = &hba->vreg_info;
7631
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007632 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7633 if (ret)
7634 goto out;
7635
7636 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7637 if (ret)
7638 goto out;
7639
7640 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7641 if (ret)
7642 goto out;
7643
7644out:
7645 if (ret) {
7646 ufshcd_toggle_vreg(dev, info->vccq2, false);
7647 ufshcd_toggle_vreg(dev, info->vccq, false);
7648 ufshcd_toggle_vreg(dev, info->vcc, false);
7649 }
7650 return ret;
7651}
7652
Raviv Shvili6a771a62014-09-25 15:32:24 +03007653static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7654{
7655 struct ufs_vreg_info *info = &hba->vreg_info;
7656
Zeng Guangyue60b7b822019-03-30 17:03:13 +08007657 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007658}
7659
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007660static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7661{
7662 int ret = 0;
7663
7664 if (!vreg)
7665 goto out;
7666
7667 vreg->reg = devm_regulator_get(dev, vreg->name);
7668 if (IS_ERR(vreg->reg)) {
7669 ret = PTR_ERR(vreg->reg);
7670 dev_err(dev, "%s: %s get failed, err=%d\n",
7671 __func__, vreg->name, ret);
7672 }
7673out:
7674 return ret;
7675}
7676
7677static int ufshcd_init_vreg(struct ufs_hba *hba)
7678{
7679 int ret = 0;
7680 struct device *dev = hba->dev;
7681 struct ufs_vreg_info *info = &hba->vreg_info;
7682
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007683 ret = ufshcd_get_vreg(dev, info->vcc);
7684 if (ret)
7685 goto out;
7686
7687 ret = ufshcd_get_vreg(dev, info->vccq);
7688 if (ret)
7689 goto out;
7690
7691 ret = ufshcd_get_vreg(dev, info->vccq2);
7692out:
7693 return ret;
7694}
7695
Raviv Shvili6a771a62014-09-25 15:32:24 +03007696static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7697{
7698 struct ufs_vreg_info *info = &hba->vreg_info;
7699
7700 if (info)
7701 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7702
7703 return 0;
7704}
7705
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007706static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7707 bool skip_ref_clk)
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007708{
7709 int ret = 0;
7710 struct ufs_clk_info *clki;
7711 struct list_head *head = &hba->clk_list_head;
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007712 unsigned long flags;
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007713 ktime_t start = ktime_get();
7714 bool clk_state_changed = false;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007715
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007716 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007717 goto out;
7718
Can Guo38f32422020-02-10 19:40:47 -08007719 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
7720 if (ret)
7721 return ret;
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007722
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007723 list_for_each_entry(clki, head, list) {
7724 if (!IS_ERR_OR_NULL(clki->clk)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007725 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7726 continue;
7727
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007728 clk_state_changed = on ^ clki->enabled;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007729 if (on && !clki->enabled) {
7730 ret = clk_prepare_enable(clki->clk);
7731 if (ret) {
7732 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7733 __func__, clki->name, ret);
7734 goto out;
7735 }
7736 } else if (!on && clki->enabled) {
7737 clk_disable_unprepare(clki->clk);
7738 }
7739 clki->enabled = on;
7740 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7741 clki->name, on ? "en" : "dis");
7742 }
7743 }
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007744
Can Guo38f32422020-02-10 19:40:47 -08007745 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
7746 if (ret)
7747 return ret;
Subhash Jadavani1e879e82016-10-06 21:48:22 -07007748
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007749out:
7750 if (ret) {
7751 list_for_each_entry(clki, head, list) {
7752 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7753 clk_disable_unprepare(clki->clk);
7754 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007755 } else if (!ret && on) {
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007756 spin_lock_irqsave(hba->host->host_lock, flags);
7757 hba->clk_gating.state = CLKS_ON;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007758 trace_ufshcd_clk_gating(dev_name(hba->dev),
7759 hba->clk_gating.state);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03007760 spin_unlock_irqrestore(hba->host->host_lock, flags);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007761 }
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08007762
subhashj@codeaurora.org911a0772016-12-22 18:41:48 -08007763 if (clk_state_changed)
7764 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7765 (on ? "on" : "off"),
7766 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007767 return ret;
7768}
7769
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007770static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
7771{
7772 return __ufshcd_setup_clocks(hba, on, false);
7773}
7774
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007775static int ufshcd_init_clocks(struct ufs_hba *hba)
7776{
7777 int ret = 0;
7778 struct ufs_clk_info *clki;
7779 struct device *dev = hba->dev;
7780 struct list_head *head = &hba->clk_list_head;
7781
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03007782 if (list_empty(head))
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007783 goto out;
7784
7785 list_for_each_entry(clki, head, list) {
7786 if (!clki->name)
7787 continue;
7788
7789 clki->clk = devm_clk_get(dev, clki->name);
7790 if (IS_ERR(clki->clk)) {
7791 ret = PTR_ERR(clki->clk);
7792 dev_err(dev, "%s: %s clk get failed, %d\n",
7793 __func__, clki->name, ret);
7794 goto out;
7795 }
7796
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05307797 /*
7798 * Parse device ref clk freq as per device tree "ref_clk".
7799 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
7800 * in ufshcd_alloc_host().
7801 */
7802 if (!strcmp(clki->name, "ref_clk"))
7803 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
7804
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007805 if (clki->max_freq) {
7806 ret = clk_set_rate(clki->clk, clki->max_freq);
7807 if (ret) {
7808 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7809 __func__, clki->name,
7810 clki->max_freq, ret);
7811 goto out;
7812 }
Sahitya Tummala856b3482014-09-25 15:32:34 +03007813 clki->curr_freq = clki->max_freq;
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007814 }
7815 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7816 clki->name, clk_get_rate(clki->clk));
7817 }
7818out:
7819 return ret;
7820}
7821
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007822static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7823{
7824 int err = 0;
7825
7826 if (!hba->vops)
7827 goto out;
7828
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007829 err = ufshcd_vops_init(hba);
7830 if (err)
7831 goto out;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007832
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007833 err = ufshcd_vops_setup_regulators(hba, true);
7834 if (err)
7835 goto out_exit;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007836
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007837 goto out;
7838
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007839out_exit:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007840 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007841out:
7842 if (err)
7843 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007844 __func__, ufshcd_get_var_name(hba), err);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007845 return err;
7846}
7847
7848static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7849{
7850 if (!hba->vops)
7851 return;
7852
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007853 ufshcd_vops_setup_regulators(hba, false);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007854
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02007855 ufshcd_vops_exit(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03007856}
7857
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007858static int ufshcd_hba_init(struct ufs_hba *hba)
7859{
7860 int err;
7861
Raviv Shvili6a771a62014-09-25 15:32:24 +03007862 /*
7863 * Handle host controller power separately from the UFS device power
7864 * rails as it will help controlling the UFS host controller power
7865 * collapse easily which is different than UFS device power collapse.
7866 * Also, enable the host controller power before we go ahead with rest
7867 * of the initialization here.
7868 */
7869 err = ufshcd_init_hba_vreg(hba);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007870 if (err)
7871 goto out;
7872
Raviv Shvili6a771a62014-09-25 15:32:24 +03007873 err = ufshcd_setup_hba_vreg(hba, true);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007874 if (err)
7875 goto out;
7876
Raviv Shvili6a771a62014-09-25 15:32:24 +03007877 err = ufshcd_init_clocks(hba);
7878 if (err)
7879 goto out_disable_hba_vreg;
7880
7881 err = ufshcd_setup_clocks(hba, true);
7882 if (err)
7883 goto out_disable_hba_vreg;
7884
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007885 err = ufshcd_init_vreg(hba);
7886 if (err)
7887 goto out_disable_clks;
7888
7889 err = ufshcd_setup_vreg(hba, true);
7890 if (err)
7891 goto out_disable_clks;
7892
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007893 err = ufshcd_variant_hba_init(hba);
7894 if (err)
7895 goto out_disable_vreg;
7896
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007897 hba->is_powered = true;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007898 goto out;
7899
7900out_disable_vreg:
7901 ufshcd_setup_vreg(hba, false);
Sujit Reddy Thummac6e79da2014-09-25 15:32:23 +03007902out_disable_clks:
7903 ufshcd_setup_clocks(hba, false);
Raviv Shvili6a771a62014-09-25 15:32:24 +03007904out_disable_hba_vreg:
7905 ufshcd_setup_hba_vreg(hba, false);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007906out:
7907 return err;
7908}
7909
7910static void ufshcd_hba_exit(struct ufs_hba *hba)
7911{
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007912 if (hba->is_powered) {
7913 ufshcd_variant_hba_exit(hba);
7914 ufshcd_setup_vreg(hba, false);
Gilad Bronera5082532016-10-17 17:10:00 -07007915 ufshcd_suspend_clkscaling(hba);
Vivek Gautameebcc192018-08-07 23:17:39 +05307916 if (ufshcd_is_clkscaling_supported(hba))
subhashj@codeaurora.org0701e492017-02-03 16:58:01 -08007917 if (hba->devfreq)
7918 ufshcd_suspend_clkscaling(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007919 ufshcd_setup_clocks(hba, false);
7920 ufshcd_setup_hba_vreg(hba, false);
7921 hba->is_powered = false;
Bean Huo09750062020-01-20 14:08:14 +01007922 ufs_put_device_desc(hba);
Sujit Reddy Thumma1d337ec2014-09-25 15:32:26 +03007923 }
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03007924}
7925
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007926static int
7927ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307928{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007929 unsigned char cmd[6] = {REQUEST_SENSE,
7930 0,
7931 0,
7932 0,
Avri Altman09a5a242018-11-22 20:04:56 +02007933 UFS_SENSE_SIZE,
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007934 0};
7935 char *buffer;
7936 int ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307937
Avri Altman09a5a242018-11-22 20:04:56 +02007938 buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007939 if (!buffer) {
7940 ret = -ENOMEM;
7941 goto out;
7942 }
7943
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007944 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
Avri Altman09a5a242018-11-22 20:04:56 +02007945 UFS_SENSE_SIZE, NULL, NULL,
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01007946 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007947 if (ret)
7948 pr_err("%s: failed with err %d\n", __func__, ret);
7949
7950 kfree(buffer);
7951out:
7952 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307953}
7954
7955/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007956 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7957 * power mode
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05307958 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007959 * @pwr_mode: device power mode to set
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307960 *
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007961 * Returns 0 if requested power mode is set successfully
7962 * Returns non-zero if failed to set the requested power mode
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307963 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007964static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7965 enum ufs_dev_pwr_mode pwr_mode)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307966{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007967 unsigned char cmd[6] = { START_STOP };
7968 struct scsi_sense_hdr sshdr;
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007969 struct scsi_device *sdp;
7970 unsigned long flags;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007971 int ret;
7972
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03007973 spin_lock_irqsave(hba->host->host_lock, flags);
7974 sdp = hba->sdev_ufs_device;
7975 if (sdp) {
7976 ret = scsi_device_get(sdp);
7977 if (!ret && !scsi_device_online(sdp)) {
7978 ret = -ENODEV;
7979 scsi_device_put(sdp);
7980 }
7981 } else {
7982 ret = -ENODEV;
7983 }
7984 spin_unlock_irqrestore(hba->host->host_lock, flags);
7985
7986 if (ret)
7987 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007988
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307989 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007990 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7991 * handling, which would wait for host to be resumed. Since we know
7992 * we are functional while we are here, skip host resume in error
7993 * handling context.
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05307994 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03007995 hba->host->eh_noresume = 1;
7996 if (hba->wlun_dev_clr_ua) {
7997 ret = ufshcd_send_request_sense(hba, sdp);
7998 if (ret)
7999 goto out;
8000 /* Unit attention condition is cleared now */
8001 hba->wlun_dev_clr_ua = false;
8002 }
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308003
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008004 cmd[4] = pwr_mode << 4;
8005
8006 /*
8007 * Current function would be generally called from the power management
Christoph Hellwige8064022016-10-20 15:12:13 +02008008 * callbacks hence set the RQF_PM flag so that it doesn't resume the
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008009 * already suspended childs.
8010 */
Christoph Hellwigfcbfffe2017-02-23 16:02:37 +01008011 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
8012 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008013 if (ret) {
8014 sdev_printk(KERN_WARNING, sdp,
Hannes Reineckeef613292014-10-24 14:27:00 +02008015 "START_STOP failed for power mode: %d, result %x\n",
8016 pwr_mode, ret);
Johannes Thumshirnc65be1a2018-06-25 13:20:58 +02008017 if (driver_byte(ret) == DRIVER_SENSE)
Hannes Reinecke21045512015-01-08 07:43:46 +01008018 scsi_print_sense_hdr(sdp, NULL, &sshdr);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008019 }
8020
8021 if (!ret)
8022 hba->curr_dev_pwr_mode = pwr_mode;
8023out:
Akinobu Mita7c48bfd2014-10-23 13:25:12 +03008024 scsi_device_put(sdp);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008025 hba->host->eh_noresume = 0;
8026 return ret;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308027}
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308028
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008029static int ufshcd_link_state_transition(struct ufs_hba *hba,
8030 enum uic_link_state req_link_state,
8031 int check_for_bkops)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308032{
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008033 int ret = 0;
8034
8035 if (req_link_state == hba->uic_link_state)
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308036 return 0;
8037
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008038 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
8039 ret = ufshcd_uic_hibern8_enter(hba);
8040 if (!ret)
8041 ufshcd_set_link_hibern8(hba);
8042 else
8043 goto out;
8044 }
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308045 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008046 * If autobkops is enabled, link can't be turned off because
8047 * turning off the link would also turn off the device.
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308048 */
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008049 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
Dan Carpenterdc30c9e2019-12-13 13:49:35 +03008050 (!check_for_bkops || !hba->auto_bkops_enabled)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008051 /*
Yaniv Gardif3099fb2016-03-10 17:37:17 +02008052 * Let's make sure that link is in low power mode, we are doing
8053 * this currently by putting the link in Hibern8. Otherway to
8054 * put the link in low power mode is to send the DME end point
8055 * to device and then send the DME reset command to local
8056 * unipro. But putting the link in hibern8 is much faster.
8057 */
8058 ret = ufshcd_uic_hibern8_enter(hba);
8059 if (ret)
8060 goto out;
8061 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008062 * Change controller state to "reset state" which
8063 * should also put the link in off/reset state
8064 */
Yaniv Gardi596585a2016-03-10 17:37:08 +02008065 ufshcd_hba_stop(hba, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008066 /*
8067 * TODO: Check if we need any delay to make sure that
8068 * controller is reset
8069 */
8070 ufshcd_set_link_off(hba);
8071 }
8072
8073out:
8074 return ret;
8075}
8076
8077static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
8078{
8079 /*
Yaniv Gardib799fdf2016-03-10 17:37:18 +02008080 * It seems some UFS devices may keep drawing more than sleep current
8081 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
8082 * To avoid this situation, add 2ms delay before putting these UFS
8083 * rails in LPM mode.
8084 */
8085 if (!ufshcd_is_link_active(hba) &&
8086 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
8087 usleep_range(2000, 2100);
8088
8089 /*
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008090 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
8091 * power.
8092 *
8093 * If UFS device and link is in OFF state, all power supplies (VCC,
8094 * VCCQ, VCCQ2) can be turned off if power on write protect is not
8095 * required. If UFS link is inactive (Hibern8 or OFF state) and device
8096 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
8097 *
8098 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
8099 * in low power state which would save some power.
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008100 *
8101 * If Write Booster is enabled and the device needs to flush the WB
8102 * buffer OR if bkops status is urgent for WB, keep Vcc on.
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008103 */
8104 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8105 !hba->dev_info.is_lu_power_on_wp) {
8106 ufshcd_setup_vreg(hba, false);
8107 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008108 if (!hba->dev_info.keep_vcc_on)
8109 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008110 if (!ufshcd_is_link_active(hba)) {
8111 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8112 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
8113 }
8114 }
8115}
8116
8117static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
8118{
8119 int ret = 0;
8120
8121 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
8122 !hba->dev_info.is_lu_power_on_wp) {
8123 ret = ufshcd_setup_vreg(hba, true);
8124 } else if (!ufshcd_is_ufs_dev_active(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008125 if (!ret && !ufshcd_is_link_active(hba)) {
8126 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
8127 if (ret)
8128 goto vcc_disable;
8129 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
8130 if (ret)
8131 goto vccq_lpm;
8132 }
Subhash Jadavani69d72ac2016-10-27 17:26:24 -07008133 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008134 }
8135 goto out;
8136
8137vccq_lpm:
8138 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
8139vcc_disable:
8140 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
8141out:
8142 return ret;
8143}
8144
8145static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
8146{
8147 if (ufshcd_is_link_off(hba))
8148 ufshcd_setup_hba_vreg(hba, false);
8149}
8150
8151static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
8152{
8153 if (ufshcd_is_link_off(hba))
8154 ufshcd_setup_hba_vreg(hba, true);
8155}
8156
8157/**
8158 * ufshcd_suspend - helper function for suspend operations
8159 * @hba: per adapter instance
8160 * @pm_op: desired low power operation type
8161 *
8162 * This function will try to put the UFS device and link into low power
8163 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
8164 * (System PM level).
8165 *
8166 * If this function is called during shutdown, it will make sure that
8167 * both UFS device and UFS link is powered off.
8168 *
8169 * NOTE: UFS device & link must be active before we enter in this function.
8170 *
8171 * Returns 0 for success and non-zero for failure
8172 */
8173static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8174{
8175 int ret = 0;
8176 enum ufs_pm_level pm_lvl;
8177 enum ufs_dev_pwr_mode req_dev_pwr_mode;
8178 enum uic_link_state req_link_state;
8179
8180 hba->pm_op_in_progress = 1;
8181 if (!ufshcd_is_shutdown_pm(pm_op)) {
8182 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
8183 hba->rpm_lvl : hba->spm_lvl;
8184 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
8185 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
8186 } else {
8187 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
8188 req_link_state = UIC_LINK_OFF_STATE;
8189 }
8190
8191 /*
8192 * If we can't transition into any of the low power modes
8193 * just gate the clocks.
8194 */
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008195 ufshcd_hold(hba, false);
8196 hba->clk_gating.is_suspended = true;
8197
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08008198 if (hba->clk_scaling.is_allowed) {
8199 cancel_work_sync(&hba->clk_scaling.suspend_work);
8200 cancel_work_sync(&hba->clk_scaling.resume_work);
8201 ufshcd_suspend_clkscaling(hba);
8202 }
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07008203
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008204 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
8205 req_link_state == UIC_LINK_ACTIVE_STATE) {
8206 goto disable_clks;
8207 }
8208
8209 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
8210 (req_link_state == hba->uic_link_state))
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07008211 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008212
8213 /* UFS device & link must be active before we enter in this function */
8214 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
8215 ret = -EINVAL;
Subhash Jadavanid6fcf812016-10-27 17:26:09 -07008216 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008217 }
8218
8219 if (ufshcd_is_runtime_pm(pm_op)) {
Subhash Jadavani374a2462014-09-25 15:32:35 +03008220 if (ufshcd_can_autobkops_during_suspend(hba)) {
8221 /*
8222 * The device is idle with no requests in the queue,
8223 * allow background operations if bkops status shows
8224 * that performance might be impacted.
8225 */
8226 ret = ufshcd_urgent_bkops(hba);
8227 if (ret)
8228 goto enable_gating;
8229 } else {
8230 /* make sure that auto bkops is disabled */
8231 ufshcd_disable_auto_bkops(hba);
8232 }
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008233 /*
8234 * With wb enabled, if the bkops is enabled or if the
8235 * configured WB type is 70% full, keep vcc ON
8236 * for the device to flush the wb buffer
8237 */
8238 if ((hba->auto_bkops_enabled && ufshcd_wb_sup(hba)) ||
8239 ufshcd_wb_keep_vcc_on(hba))
8240 hba->dev_info.keep_vcc_on = true;
8241 else
8242 hba->dev_info.keep_vcc_on = false;
8243 } else if (!ufshcd_is_runtime_pm(pm_op)) {
8244 hba->dev_info.keep_vcc_on = false;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008245 }
8246
8247 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
Asutosh Das3d17b9b2020-04-22 14:41:42 -07008248 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
8249 !ufshcd_is_runtime_pm(pm_op))) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008250 /* ensure that bkops is disabled */
8251 ufshcd_disable_auto_bkops(hba);
8252 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
8253 if (ret)
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008254 goto enable_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008255 }
8256
Sayali Lokhande2824ec92020-02-10 19:40:44 -08008257 flush_work(&hba->eeh_work);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008258 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
8259 if (ret)
8260 goto set_dev_active;
8261
8262 ufshcd_vreg_set_lpm(hba);
8263
8264disable_clks:
8265 /*
8266 * Call vendor specific suspend callback. As these callbacks may access
8267 * vendor specific host controller register space call them before the
8268 * host clocks are ON.
8269 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008270 ret = ufshcd_vops_suspend(hba, pm_op);
8271 if (ret)
8272 goto set_link_active;
Stanley Chudcb6cec2019-12-07 20:22:00 +08008273 /*
8274 * Disable the host irq as host controller as there won't be any
8275 * host controller transaction expected till resume.
8276 */
8277 ufshcd_disable_irq(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008278
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008279 if (!ufshcd_is_link_active(hba))
8280 ufshcd_setup_clocks(hba, false);
8281 else
8282 /* If link is active, device ref_clk can't be switched off */
8283 __ufshcd_setup_clocks(hba, false, true);
8284
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008285 hba->clk_gating.state = CLKS_OFF;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008286 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
Stanley Chudcb6cec2019-12-07 20:22:00 +08008287
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008288 /* Put the host controller in low power mode if possible */
8289 ufshcd_hba_vreg_set_lpm(hba);
8290 goto out;
8291
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008292set_link_active:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08008293 if (hba->clk_scaling.is_allowed)
8294 ufshcd_resume_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008295 ufshcd_vreg_set_hpm(hba);
8296 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
8297 ufshcd_set_link_active(hba);
8298 else if (ufshcd_is_link_off(hba))
8299 ufshcd_host_reset_and_restore(hba);
8300set_dev_active:
8301 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
8302 ufshcd_disable_auto_bkops(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008303enable_gating:
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08008304 if (hba->clk_scaling.is_allowed)
8305 ufshcd_resume_clkscaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008306 hba->clk_gating.is_suspended = false;
8307 ufshcd_release(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008308out:
8309 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08008310 if (ret)
8311 ufshcd_update_reg_hist(&hba->ufs_stats.suspend_err, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008312 return ret;
8313}
8314
8315/**
8316 * ufshcd_resume - helper function for resume operations
8317 * @hba: per adapter instance
8318 * @pm_op: runtime PM or system PM
8319 *
8320 * This function basically brings the UFS device, UniPro link and controller
8321 * to active state.
8322 *
8323 * Returns 0 for success and non-zero for failure
8324 */
8325static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
8326{
8327 int ret;
8328 enum uic_link_state old_link_state;
8329
8330 hba->pm_op_in_progress = 1;
8331 old_link_state = hba->uic_link_state;
8332
8333 ufshcd_hba_vreg_set_hpm(hba);
8334 /* Make sure clocks are enabled before accessing controller */
8335 ret = ufshcd_setup_clocks(hba, true);
8336 if (ret)
8337 goto out;
8338
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008339 /* enable the host irq as host controller would be active soon */
Can Guo5231d382019-12-05 02:14:46 +00008340 ufshcd_enable_irq(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008341
8342 ret = ufshcd_vreg_set_hpm(hba);
8343 if (ret)
8344 goto disable_irq_and_vops_clks;
8345
8346 /*
8347 * Call vendor specific resume callback. As these callbacks may access
8348 * vendor specific host controller register space call them when the
8349 * host clocks are ON.
8350 */
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008351 ret = ufshcd_vops_resume(hba, pm_op);
8352 if (ret)
8353 goto disable_vreg;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008354
8355 if (ufshcd_is_link_hibern8(hba)) {
8356 ret = ufshcd_uic_hibern8_exit(hba);
8357 if (!ret)
8358 ufshcd_set_link_active(hba);
8359 else
8360 goto vendor_suspend;
8361 } else if (ufshcd_is_link_off(hba)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008362 /*
Asutosh Das089f5b62020-04-13 23:14:48 -07008363 * A full initialization of the host and the device is
8364 * required since the link was put to off during suspend.
8365 */
8366 ret = ufshcd_reset_and_restore(hba);
8367 /*
8368 * ufshcd_reset_and_restore() should have already
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008369 * set the link state as active
8370 */
8371 if (ret || !ufshcd_is_link_active(hba))
8372 goto vendor_suspend;
8373 }
8374
8375 if (!ufshcd_is_ufs_dev_active(hba)) {
8376 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
8377 if (ret)
8378 goto set_old_link_state;
8379 }
8380
subhashj@codeaurora.org4e768e72016-12-22 18:41:22 -08008381 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
8382 ufshcd_enable_auto_bkops(hba);
8383 else
8384 /*
8385 * If BKOPs operations are urgently needed at this moment then
8386 * keep auto-bkops enabled or else disable it.
8387 */
8388 ufshcd_urgent_bkops(hba);
8389
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008390 hba->clk_gating.is_suspended = false;
8391
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08008392 if (hba->clk_scaling.is_allowed)
8393 ufshcd_resume_clkscaling(hba);
Sahitya Tummala856b3482014-09-25 15:32:34 +03008394
Adrian Hunterad448372018-03-20 15:07:38 +02008395 /* Enable Auto-Hibernate if configured */
8396 ufshcd_auto_hibern8_enable(hba);
8397
Can Guo71d848b2019-11-14 22:09:26 -08008398 /* Schedule clock gating in case of no access to UFS device yet */
8399 ufshcd_release(hba);
8400
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008401 goto out;
8402
8403set_old_link_state:
8404 ufshcd_link_state_transition(hba, old_link_state, 0);
8405vendor_suspend:
Yaniv Gardi0263bcd2015-10-28 13:15:48 +02008406 ufshcd_vops_suspend(hba, pm_op);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008407disable_vreg:
8408 ufshcd_vreg_set_lpm(hba);
8409disable_irq_and_vops_clks:
8410 ufshcd_disable_irq(hba);
subhashj@codeaurora.org401f1e42017-02-03 16:57:39 -08008411 if (hba->clk_scaling.is_allowed)
8412 ufshcd_suspend_clkscaling(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008413 ufshcd_setup_clocks(hba, false);
8414out:
8415 hba->pm_op_in_progress = 0;
Stanley Chu8808b4e2019-07-10 21:38:21 +08008416 if (ret)
8417 ufshcd_update_reg_hist(&hba->ufs_stats.resume_err, (u32)ret);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008418 return ret;
8419}
8420
8421/**
8422 * ufshcd_system_suspend - system suspend routine
8423 * @hba: per adapter instance
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008424 *
8425 * Check the description of ufshcd_suspend() function for more details.
8426 *
8427 * Returns 0 for success and non-zero for failure
8428 */
8429int ufshcd_system_suspend(struct ufs_hba *hba)
8430{
8431 int ret = 0;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008432 ktime_t start = ktime_get();
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008433
8434 if (!hba || !hba->is_powered)
Dolev Raviv233b5942014-10-23 13:25:14 +03008435 return 0;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008436
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008437 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
8438 hba->curr_dev_pwr_mode) &&
8439 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
8440 hba->uic_link_state))
8441 goto out;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008442
subhashj@codeaurora.org0b257732016-11-23 16:33:08 -08008443 if (pm_runtime_suspended(hba->dev)) {
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008444 /*
8445 * UFS device and/or UFS link low power states during runtime
8446 * suspend seems to be different than what is expected during
8447 * system suspend. Hence runtime resume the devic & link and
8448 * let the system suspend low power states to take effect.
8449 * TODO: If resume takes longer time, we might have optimize
8450 * it in future by not resuming everything if possible.
8451 */
8452 ret = ufshcd_runtime_resume(hba);
8453 if (ret)
8454 goto out;
8455 }
8456
8457 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
8458out:
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008459 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
8460 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008461 hba->curr_dev_pwr_mode, hba->uic_link_state);
Dolev Ravive7850602014-09-25 15:32:36 +03008462 if (!ret)
8463 hba->is_sys_suspended = true;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008464 return ret;
8465}
8466EXPORT_SYMBOL(ufshcd_system_suspend);
8467
8468/**
8469 * ufshcd_system_resume - system resume routine
8470 * @hba: per adapter instance
8471 *
8472 * Returns 0 for success and non-zero for failure
8473 */
8474
8475int ufshcd_system_resume(struct ufs_hba *hba)
8476{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008477 int ret = 0;
8478 ktime_t start = ktime_get();
8479
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008480 if (!hba)
8481 return -EINVAL;
8482
8483 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008484 /*
8485 * Let the runtime resume take care of resuming
8486 * if runtime suspended.
8487 */
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008488 goto out;
8489 else
8490 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
8491out:
8492 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
8493 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008494 hba->curr_dev_pwr_mode, hba->uic_link_state);
Stanley Chuce9e7bc2019-01-07 22:19:34 +08008495 if (!ret)
8496 hba->is_sys_suspended = false;
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008497 return ret;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008498}
8499EXPORT_SYMBOL(ufshcd_system_resume);
8500
8501/**
8502 * ufshcd_runtime_suspend - runtime suspend routine
8503 * @hba: per adapter instance
8504 *
8505 * Check the description of ufshcd_suspend() function for more details.
8506 *
8507 * Returns 0 for success and non-zero for failure
8508 */
8509int ufshcd_runtime_suspend(struct ufs_hba *hba)
8510{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008511 int ret = 0;
8512 ktime_t start = ktime_get();
8513
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008514 if (!hba)
8515 return -EINVAL;
8516
8517 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008518 goto out;
8519 else
8520 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
8521out:
8522 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
8523 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008524 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008525 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308526}
8527EXPORT_SYMBOL(ufshcd_runtime_suspend);
8528
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008529/**
8530 * ufshcd_runtime_resume - runtime resume routine
8531 * @hba: per adapter instance
8532 *
8533 * This function basically brings the UFS device, UniPro link and controller
8534 * to active state. Following operations are done in this function:
8535 *
8536 * 1. Turn on all the controller related clocks
8537 * 2. Bring the UniPro link out of Hibernate state
8538 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
8539 * to active state.
8540 * 4. If auto-bkops is enabled on the device, disable it.
8541 *
8542 * So following would be the possible power state after this function return
8543 * successfully:
8544 * S1: UFS device in Active state with VCC rail ON
8545 * UniPro link in Active state
8546 * All the UFS/UniPro controller clocks are ON
8547 *
8548 * Returns 0 for success and non-zero for failure
8549 */
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308550int ufshcd_runtime_resume(struct ufs_hba *hba)
8551{
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008552 int ret = 0;
8553 ktime_t start = ktime_get();
8554
Yaniv Gardie3ce73d2016-10-17 17:09:24 -07008555 if (!hba)
8556 return -EINVAL;
8557
8558 if (!hba->is_powered)
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008559 goto out;
8560 else
8561 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8562out:
8563 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8564 ktime_to_us(ktime_sub(ktime_get(), start)),
Subhash Jadavani73eba2b2017-01-10 16:48:25 -08008565 hba->curr_dev_pwr_mode, hba->uic_link_state);
subhashj@codeaurora.org7ff5ab42016-12-22 18:39:51 -08008566 return ret;
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308567}
8568EXPORT_SYMBOL(ufshcd_runtime_resume);
8569
8570int ufshcd_runtime_idle(struct ufs_hba *hba)
8571{
8572 return 0;
8573}
8574EXPORT_SYMBOL(ufshcd_runtime_idle);
8575
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308576/**
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008577 * ufshcd_shutdown - shutdown routine
8578 * @hba: per adapter instance
8579 *
8580 * This function would power off both UFS device and UFS link.
8581 *
8582 * Returns 0 always to allow force shutdown even in case of errors.
8583 */
8584int ufshcd_shutdown(struct ufs_hba *hba)
8585{
8586 int ret = 0;
8587
Stanley Chuf51913e2019-09-18 12:20:38 +08008588 if (!hba->is_powered)
8589 goto out;
8590
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008591 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
8592 goto out;
8593
8594 if (pm_runtime_suspended(hba->dev)) {
8595 ret = ufshcd_runtime_resume(hba);
8596 if (ret)
8597 goto out;
8598 }
8599
8600 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
8601out:
8602 if (ret)
8603 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
8604 /* allow force shutdown even in case of errors */
8605 return 0;
8606}
8607EXPORT_SYMBOL(ufshcd_shutdown);
8608
8609/**
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308610 * ufshcd_remove - de-allocate SCSI host and host memory space
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308611 * data structure memory
Bart Van Assche8aa29f12018-03-01 15:07:20 -08008612 * @hba: per adapter instance
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308613 */
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308614void ufshcd_remove(struct ufs_hba *hba)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308615{
Avri Altmandf032bf2018-10-07 17:30:35 +03008616 ufs_bsg_remove(hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008617 ufs_sysfs_remove_nodes(hba->dev);
Bart Van Assche69a6c262019-12-09 10:13:09 -08008618 blk_cleanup_queue(hba->tmf_queue);
8619 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08008620 blk_cleanup_queue(hba->cmd_queue);
Akinobu Mitacfdf9c92013-07-30 00:36:03 +05308621 scsi_remove_host(hba->host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308622 /* disable interrupts */
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308623 ufshcd_disable_intr(hba, hba->intr_mask);
Yaniv Gardi596585a2016-03-10 17:37:08 +02008624 ufshcd_hba_stop(hba, true);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308625
Vivek Gautameebcc192018-08-07 23:17:39 +05308626 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008627 ufshcd_exit_clk_gating(hba);
Sahitya Tummalafcb0c4b2016-12-22 18:40:50 -08008628 if (ufshcd_is_clkscaling_supported(hba))
8629 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008630 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308631}
8632EXPORT_SYMBOL_GPL(ufshcd_remove);
8633
8634/**
Yaniv Gardi47555a52015-10-28 13:15:49 +02008635 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8636 * @hba: pointer to Host Bus Adapter (HBA)
8637 */
8638void ufshcd_dealloc_host(struct ufs_hba *hba)
8639{
8640 scsi_host_put(hba->host);
8641}
8642EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8643
8644/**
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008645 * ufshcd_set_dma_mask - Set dma mask based on the controller
8646 * addressing capability
8647 * @hba: per adapter instance
8648 *
8649 * Returns 0 for success, non-zero for failure
8650 */
8651static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8652{
8653 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8654 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8655 return 0;
8656 }
8657 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8658}
8659
8660/**
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008661 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308662 * @dev: pointer to device handle
8663 * @hba_handle: driver private handle
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308664 * Returns 0 on success, non-zero value on failure
8665 */
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008666int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308667{
8668 struct Scsi_Host *host;
8669 struct ufs_hba *hba;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008670 int err = 0;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308671
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308672 if (!dev) {
8673 dev_err(dev,
8674 "Invalid memory reference for dev is NULL\n");
8675 err = -ENODEV;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308676 goto out_error;
8677 }
8678
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308679 host = scsi_host_alloc(&ufshcd_driver_template,
8680 sizeof(struct ufs_hba));
8681 if (!host) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308682 dev_err(dev, "scsi_host_alloc failed\n");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308683 err = -ENOMEM;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308684 goto out_error;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308685 }
8686 hba = shost_priv(host);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308687 hba->host = host;
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308688 hba->dev = dev;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008689 *hba_handle = hba;
Subhash Jadavani9e1e8a72018-10-16 14:29:41 +05308690 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008691
Szymon Mielczarek566ec9a2017-06-05 11:36:54 +03008692 INIT_LIST_HEAD(&hba->clk_list_head);
8693
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008694out_error:
8695 return err;
8696}
8697EXPORT_SYMBOL(ufshcd_alloc_host);
8698
Bart Van Assche69a6c262019-12-09 10:13:09 -08008699/* This function exists because blk_mq_alloc_tag_set() requires this. */
8700static blk_status_t ufshcd_queue_tmf(struct blk_mq_hw_ctx *hctx,
8701 const struct blk_mq_queue_data *qd)
8702{
8703 WARN_ON_ONCE(true);
8704 return BLK_STS_NOTSUPP;
8705}
8706
8707static const struct blk_mq_ops ufshcd_tmf_ops = {
8708 .queue_rq = ufshcd_queue_tmf,
8709};
8710
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008711/**
8712 * ufshcd_init - Driver initialization routine
8713 * @hba: per-adapter instance
8714 * @mmio_base: base register address
8715 * @irq: Interrupt line of device
8716 * Returns 0 on success, non-zero value on failure
8717 */
8718int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
8719{
8720 int err;
8721 struct Scsi_Host *host = hba->host;
8722 struct device *dev = hba->dev;
8723
8724 if (!mmio_base) {
8725 dev_err(hba->dev,
8726 "Invalid memory reference for mmio_base is NULL\n");
8727 err = -ENODEV;
8728 goto out_error;
8729 }
8730
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308731 hba->mmio_base = mmio_base;
8732 hba->irq = irq;
Stanley Chub9dc8ac2020-03-18 18:40:14 +08008733 hba->hba_enable_delay_us = 1000;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308734
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008735 err = ufshcd_hba_init(hba);
Sujit Reddy Thumma5c0c28a2014-09-25 15:32:21 +03008736 if (err)
8737 goto out_error;
8738
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308739 /* Read capabilities registers */
8740 ufshcd_hba_capabilities(hba);
8741
8742 /* Get UFS version supported by the controller */
8743 hba->ufs_version = ufshcd_get_ufs_version(hba);
8744
Yaniv Gardic01848c2016-12-05 19:25:02 -08008745 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
8746 (hba->ufs_version != UFSHCI_VERSION_11) &&
8747 (hba->ufs_version != UFSHCI_VERSION_20) &&
8748 (hba->ufs_version != UFSHCI_VERSION_21))
8749 dev_err(hba->dev, "invalid UFS version 0x%x\n",
8750 hba->ufs_version);
8751
Seungwon Jeon2fbd0092013-06-26 22:39:27 +05308752 /* Get Interrupt bit mask per version */
8753 hba->intr_mask = ufshcd_get_intr_mask(hba);
8754
Akinobu Mitaca3d7bf2014-07-13 21:24:46 +09008755 err = ufshcd_set_dma_mask(hba);
8756 if (err) {
8757 dev_err(hba->dev, "set dma mask failed\n");
8758 goto out_disable;
8759 }
8760
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308761 /* Allocate memory for host memory space */
8762 err = ufshcd_memory_alloc(hba);
8763 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308764 dev_err(hba->dev, "Memory allocation failed\n");
8765 goto out_disable;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308766 }
8767
8768 /* Configure LRB */
8769 ufshcd_host_memory_configure(hba);
8770
8771 host->can_queue = hba->nutrs;
8772 host->cmd_per_lun = hba->nutrs;
8773 host->max_id = UFSHCD_MAX_ID;
Subhash Jadavani0ce147d2014-09-25 15:32:29 +03008774 host->max_lun = UFS_MAX_LUNS;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308775 host->max_channel = UFSHCD_MAX_CHANNEL;
8776 host->unique_id = host->host_no;
Avri Altmana851b2b2018-10-07 17:30:34 +03008777 host->max_cmd_len = UFS_CDB_SIZE;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308778
Dolev Raviv7eb584d2014-09-25 15:32:31 +03008779 hba->max_pwr_info.is_valid = false;
8780
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308781 /* Initialize work queues */
Sujit Reddy Thummae8e7f272014-05-26 10:59:15 +05308782 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
Sujit Reddy Thumma66ec6d52013-07-30 00:35:59 +05308783 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308784
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308785 /* Initialize UIC command mutex */
8786 mutex_init(&hba->uic_cmd_mutex);
8787
Sujit Reddy Thumma5a0b0cb2013-07-30 00:35:57 +05308788 /* Initialize mutex for device management commands */
8789 mutex_init(&hba->dev_cmd.lock);
8790
subhashj@codeaurora.orga3cd5ec2017-02-03 16:57:02 -08008791 init_rwsem(&hba->clk_scaling_lock);
8792
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008793 ufshcd_init_clk_gating(hba);
Yaniv Gardi199ef132016-03-10 17:37:06 +02008794
Vivek Gautameebcc192018-08-07 23:17:39 +05308795 ufshcd_init_clk_scaling(hba);
8796
Yaniv Gardi199ef132016-03-10 17:37:06 +02008797 /*
8798 * In order to avoid any spurious interrupt immediately after
8799 * registering UFS controller interrupt handler, clear any pending UFS
8800 * interrupt status and disable all the UFS interrupts.
8801 */
8802 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
8803 REG_INTERRUPT_STATUS);
8804 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
8805 /*
8806 * Make sure that UFS interrupts are disabled and any pending interrupt
8807 * status is cleared before registering UFS interrupt handler.
8808 */
8809 mb();
8810
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308811 /* IRQ registration */
Seungwon Jeon2953f852013-06-27 13:31:54 +09008812 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308813 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308814 dev_err(hba->dev, "request irq failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008815 goto exit_gating;
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008816 } else {
8817 hba->is_irq_enabled = true;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308818 }
8819
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308820 err = scsi_add_host(host, hba->dev);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308821 if (err) {
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308822 dev_err(hba->dev, "scsi_add_host failed\n");
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008823 goto exit_gating;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308824 }
8825
Bart Van Assche7252a362019-12-09 10:13:08 -08008826 hba->cmd_queue = blk_mq_init_queue(&hba->host->tag_set);
8827 if (IS_ERR(hba->cmd_queue)) {
8828 err = PTR_ERR(hba->cmd_queue);
8829 goto out_remove_scsi_host;
8830 }
8831
Bart Van Assche69a6c262019-12-09 10:13:09 -08008832 hba->tmf_tag_set = (struct blk_mq_tag_set) {
8833 .nr_hw_queues = 1,
8834 .queue_depth = hba->nutmrs,
8835 .ops = &ufshcd_tmf_ops,
8836 .flags = BLK_MQ_F_NO_SCHED,
8837 };
8838 err = blk_mq_alloc_tag_set(&hba->tmf_tag_set);
8839 if (err < 0)
8840 goto free_cmd_queue;
8841 hba->tmf_queue = blk_mq_init_queue(&hba->tmf_tag_set);
8842 if (IS_ERR(hba->tmf_queue)) {
8843 err = PTR_ERR(hba->tmf_queue);
8844 goto free_tmf_tag_set;
8845 }
8846
Bjorn Anderssond8d9f792019-08-28 12:17:54 -07008847 /* Reset the attached device */
8848 ufshcd_vops_device_reset(hba);
8849
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308850 /* Host controller enable */
8851 err = ufshcd_hba_enable(hba);
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308852 if (err) {
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308853 dev_err(hba->dev, "Host controller enable failed\n");
Dolev Raviv66cc8202016-12-22 18:39:42 -08008854 ufshcd_print_host_regs(hba);
Gilad Broner6ba65582017-02-03 16:57:28 -08008855 ufshcd_print_host_state(hba);
Bart Van Assche69a6c262019-12-09 10:13:09 -08008856 goto free_tmf_queue;
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308857 }
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308858
subhashj@codeaurora.org0c8f7582016-12-22 18:41:11 -08008859 /*
8860 * Set the default power management level for runtime and system PM.
8861 * Default power saving mode is to keep UFS link in Hibern8 state
8862 * and UFS device in sleep state.
8863 */
8864 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8865 UFS_SLEEP_PWR_MODE,
8866 UIC_LINK_HIBERN8_STATE);
8867 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8868 UFS_SLEEP_PWR_MODE,
8869 UIC_LINK_HIBERN8_STATE);
8870
Adrian Hunterad448372018-03-20 15:07:38 +02008871 /* Set the default auto-hiberate idle timer value to 150 ms */
Stanley Chuf571b372019-05-21 14:44:53 +08008872 if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
Adrian Hunterad448372018-03-20 15:07:38 +02008873 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8874 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8875 }
8876
Sujit Reddy Thumma62694732013-07-30 00:36:00 +05308877 /* Hold auto suspend until async scan completes */
8878 pm_runtime_get_sync(dev);
Subhash Jadavani38135532018-05-03 16:37:18 +05308879 atomic_set(&hba->scsi_block_reqs_cnt, 0);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008880 /*
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008881 * We are assuming that device wasn't put in sleep/power-down
8882 * state exclusively during the boot stage before kernel.
8883 * This assumption helps avoid doing link startup twice during
8884 * ufshcd_probe_hba().
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008885 */
subhashj@codeaurora.org7caf4892016-11-23 16:32:20 -08008886 ufshcd_set_ufs_dev_active(hba);
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008887
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308888 async_schedule(ufshcd_async_scan, hba);
Stanislav Nijnikovcbb68132018-02-15 14:14:01 +02008889 ufs_sysfs_add_nodes(hba->dev);
Seungwon Jeon6ccf44fe2013-06-26 22:39:29 +05308890
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308891 return 0;
8892
Bart Van Assche69a6c262019-12-09 10:13:09 -08008893free_tmf_queue:
8894 blk_cleanup_queue(hba->tmf_queue);
8895free_tmf_tag_set:
8896 blk_mq_free_tag_set(&hba->tmf_tag_set);
Bart Van Assche7252a362019-12-09 10:13:08 -08008897free_cmd_queue:
8898 blk_cleanup_queue(hba->cmd_queue);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308899out_remove_scsi_host:
8900 scsi_remove_host(hba->host);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008901exit_gating:
Vivek Gautameebcc192018-08-07 23:17:39 +05308902 ufshcd_exit_clk_scaling(hba);
Sahitya Tummala1ab27c92014-09-25 15:32:32 +03008903 ufshcd_exit_clk_gating(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308904out_disable:
Subhash Jadavani57d104c2014-09-25 15:32:30 +03008905 hba->is_irq_enabled = false;
Sujit Reddy Thummaaa497612014-09-25 15:32:22 +03008906 ufshcd_hba_exit(hba);
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308907out_error:
8908 return err;
8909}
8910EXPORT_SYMBOL_GPL(ufshcd_init);
8911
Vinayak Holikatti3b1d0582013-02-25 21:44:32 +05308912MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8913MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
Vinayak Holikattie0eca632013-02-25 21:44:33 +05308914MODULE_DESCRIPTION("Generic UFS host controller driver Core");
Santosh Yaraganavi7a3e97b2012-02-29 12:11:50 +05308915MODULE_LICENSE("GPL");
8916MODULE_VERSION(UFSHCD_DRIVER_VERSION);