blob: 8d22973bde40653ff7860a2ba1e06c3719671f70 [file] [log] [blame]
Thomas Gleixner50acfb22019-05-29 07:18:00 -07001// SPDX-License-Identifier: GPL-2.0-only
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07002/*
3 * Copyright (C) 2012 Regents of the University of California
Anup Patel671f9a32019-06-28 13:36:21 -07004 * Copyright (C) 2019 Western Digital Corporation or its affiliates.
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07005 */
6
7#include <linux/init.h>
8#include <linux/mm.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -07009#include <linux/memblock.h>
Mike Rapoport57c8a662018-10-30 15:09:49 -070010#include <linux/initrd.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070011#include <linux/swap.h>
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010012#include <linux/sizes.h>
Anup Patel0651c262019-02-21 11:25:49 +053013#include <linux/of_fdt.h>
Albert Ou922b0372019-09-27 16:14:18 -070014#include <linux/libfdt.h>
Zong Lid27c3c92020-03-10 00:55:41 +080015#include <linux/set_memory.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070016
Anup Patelf2c17aa2019-01-07 20:57:01 +053017#include <asm/fixmap.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070018#include <asm/tlbflush.h>
19#include <asm/sections.h>
Palmer Dabbelt2d268252020-04-14 13:43:24 +090020#include <asm/soc.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070021#include <asm/io.h>
Zong Lib422d282020-06-03 16:03:55 -070022#include <asm/ptdump.h>
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070023
Paul Walmsleyffaee272019-10-17 15:00:17 -070024#include "../kernel/head.h"
25
Anup Patel387181d2019-03-26 08:03:47 +000026unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
27 __page_aligned_bss;
28EXPORT_SYMBOL(empty_zero_page);
29
Anup Pateld90d45d2019-06-07 06:01:29 +000030extern char _start[];
Christoph Hellwig6bd33e12019-10-28 13:10:41 +010031void *dtb_early_va;
Anup Pateld90d45d2019-06-07 06:01:29 +000032
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070033static void __init zone_sizes_init(void)
34{
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010035 unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070036
Zong Lid5fad482018-06-25 16:49:37 +080037#ifdef CONFIG_ZONE_DMA32
Guo Ren28198c42019-01-12 16:16:27 +080038 max_zone_pfns[ZONE_DMA32] = PFN_DOWN(min(4UL * SZ_1G,
39 (unsigned long) PFN_PHYS(max_low_pfn)));
Zong Lid5fad482018-06-25 16:49:37 +080040#endif
Christoph Hellwig5ec9c4f2018-01-16 09:37:50 +010041 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
42
Mike Rapoport9691a072020-06-03 15:57:10 -070043 free_area_init(max_zone_pfns);
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070044}
45
Christoph Hellwig6bd33e12019-10-28 13:10:41 +010046static void setup_zero_page(void)
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070047{
48 memset((void *)empty_zero_page, 0, PAGE_SIZE);
49}
50
Kefeng Wang8fa3cdf2020-05-14 19:53:35 +080051#if defined(CONFIG_MMU) && defined(CONFIG_DEBUG_VM)
Yash Shah2cc6c4a2019-11-18 05:58:34 +000052static inline void print_mlk(char *name, unsigned long b, unsigned long t)
53{
54 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld kB)\n", name, b, t,
55 (((t) - (b)) >> 10));
56}
57
58static inline void print_mlm(char *name, unsigned long b, unsigned long t)
59{
60 pr_notice("%12s : 0x%08lx - 0x%08lx (%4ld MB)\n", name, b, t,
61 (((t) - (b)) >> 20));
62}
63
64static void print_vm_layout(void)
65{
66 pr_notice("Virtual kernel memory layout:\n");
67 print_mlk("fixmap", (unsigned long)FIXADDR_START,
68 (unsigned long)FIXADDR_TOP);
69 print_mlm("pci io", (unsigned long)PCI_IO_START,
70 (unsigned long)PCI_IO_END);
71 print_mlm("vmemmap", (unsigned long)VMEMMAP_START,
72 (unsigned long)VMEMMAP_END);
73 print_mlm("vmalloc", (unsigned long)VMALLOC_START,
74 (unsigned long)VMALLOC_END);
75 print_mlm("lowmem", (unsigned long)PAGE_OFFSET,
76 (unsigned long)high_memory);
77}
78#else
79static void print_vm_layout(void) { }
80#endif /* CONFIG_DEBUG_VM */
81
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070082void __init mem_init(void)
83{
84#ifdef CONFIG_FLATMEM
85 BUG_ON(!mem_map);
86#endif /* CONFIG_FLATMEM */
87
88 high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
Mike Rapoportc6ffc5c2018-10-30 15:09:30 -070089 memblock_free_all();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070090
91 mem_init_print_info(NULL);
Yash Shah2cc6c4a2019-11-18 05:58:34 +000092 print_vm_layout();
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070093}
94
Palmer Dabbelt76d2a042017-07-10 18:00:26 -070095#ifdef CONFIG_BLK_DEV_INITRD
Anup Patel0651c262019-02-21 11:25:49 +053096static void __init setup_initrd(void)
97{
98 unsigned long size;
99
100 if (initrd_start >= initrd_end) {
101 pr_info("initrd not found or empty");
102 goto disable;
103 }
Zong Liac51e002020-01-02 11:12:40 +0800104 if (__pa_symbol(initrd_end) > PFN_PHYS(max_low_pfn)) {
Anup Patel0651c262019-02-21 11:25:49 +0530105 pr_err("initrd extends beyond end of memory");
106 goto disable;
107 }
108
109 size = initrd_end - initrd_start;
Zong Liac51e002020-01-02 11:12:40 +0800110 memblock_reserve(__pa_symbol(initrd_start), size);
Anup Patel0651c262019-02-21 11:25:49 +0530111 initrd_below_start_ok = 1;
112
113 pr_info("Initial ramdisk at: 0x%p (%lu bytes)\n",
114 (void *)(initrd_start), size);
115 return;
116disable:
117 pr_cont(" - disabling initrd\n");
118 initrd_start = 0;
119 initrd_end = 0;
120}
Palmer Dabbelt76d2a042017-07-10 18:00:26 -0700121#endif /* CONFIG_BLK_DEV_INITRD */
Anup Patel0651c262019-02-21 11:25:49 +0530122
Albert Ou922b0372019-09-27 16:14:18 -0700123static phys_addr_t dtb_early_pa __initdata;
124
Anup Patel0651c262019-02-21 11:25:49 +0530125void __init setup_bootmem(void)
126{
127 struct memblock_region *reg;
128 phys_addr_t mem_size = 0;
Zong Liac51e002020-01-02 11:12:40 +0800129 phys_addr_t vmlinux_end = __pa_symbol(&_end);
130 phys_addr_t vmlinux_start = __pa_symbol(&_start);
Anup Patel0651c262019-02-21 11:25:49 +0530131
132 /* Find the memory region containing the kernel */
133 for_each_memblock(memory, reg) {
Anup Patel0651c262019-02-21 11:25:49 +0530134 phys_addr_t end = reg->base + reg->size;
135
Alexandre Ghitia160eed2020-02-17 00:28:47 -0500136 if (reg->base <= vmlinux_start && vmlinux_end <= end) {
Anup Patel0651c262019-02-21 11:25:49 +0530137 mem_size = min(reg->size, (phys_addr_t)-PAGE_OFFSET);
Anup Patelf05badd2019-04-05 05:49:34 +0000138
139 /*
140 * Remove memblock from the end of usable area to the
141 * end of region
142 */
143 if (reg->base + mem_size < end)
144 memblock_remove(reg->base + mem_size,
145 end - reg->base - mem_size);
Anup Patel0651c262019-02-21 11:25:49 +0530146 }
147 }
148 BUG_ON(mem_size == 0);
149
Anup Pateld90d45d2019-06-07 06:01:29 +0000150 /* Reserve from the start of the kernel to the end of the kernel */
151 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
152
Vincent Chenc749bb22020-04-27 14:59:24 +0800153 max_pfn = PFN_DOWN(memblock_end_of_DRAM());
154 max_low_pfn = max_pfn;
Atish Patrad0d8aae2020-07-15 16:30:07 -0700155 set_max_mapnr(max_low_pfn);
Anup Patel0651c262019-02-21 11:25:49 +0530156
157#ifdef CONFIG_BLK_DEV_INITRD
158 setup_initrd();
159#endif /* CONFIG_BLK_DEV_INITRD */
160
Albert Ou922b0372019-09-27 16:14:18 -0700161 /*
162 * Avoid using early_init_fdt_reserve_self() since __pa() does
163 * not work for DTB pointers that are fixmap addresses
164 */
165 memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va));
166
Anup Patel0651c262019-02-21 11:25:49 +0530167 early_init_fdt_scan_reserved_mem();
168 memblock_allow_resize();
169 memblock_dump_all();
170
171 for_each_memblock(memory, reg) {
172 unsigned long start_pfn = memblock_region_memory_base_pfn(reg);
173 unsigned long end_pfn = memblock_region_memory_end_pfn(reg);
174
175 memblock_set_node(PFN_PHYS(start_pfn),
176 PFN_PHYS(end_pfn - start_pfn),
177 &memblock.memory, 0);
178 }
179}
Anup Patel6f1e9e92019-02-13 16:38:36 +0530180
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100181#ifdef CONFIG_MMU
Anup Patel387181d2019-03-26 08:03:47 +0000182unsigned long va_pa_offset;
183EXPORT_SYMBOL(va_pa_offset);
184unsigned long pfn_base;
185EXPORT_SYMBOL(pfn_base);
186
Anup Patel6f1e9e92019-02-13 16:38:36 +0530187pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700188pgd_t trampoline_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
Anup Patelf2c17aa2019-01-07 20:57:01 +0530189pte_t fixmap_pte[PTRS_PER_PTE] __page_aligned_bss;
Anup Patel671f9a32019-06-28 13:36:21 -0700190static bool mmu_enabled;
191
192#define MAX_EARLY_MAPPING_SIZE SZ_128M
193
194pgd_t early_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530195
196void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t prot)
197{
198 unsigned long addr = __fix_to_virt(idx);
199 pte_t *ptep;
200
201 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
202
203 ptep = &fixmap_pte[pte_index(addr)];
204
205 if (pgprot_val(prot)) {
206 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, prot));
207 } else {
208 pte_clear(&init_mm, addr, ptep);
209 local_flush_tlb_page(addr);
210 }
211}
212
Anup Patel671f9a32019-06-28 13:36:21 -0700213static pte_t *__init get_pte_virt(phys_addr_t pa)
214{
215 if (mmu_enabled) {
216 clear_fixmap(FIX_PTE);
217 return (pte_t *)set_fixmap_offset(FIX_PTE, pa);
218 } else {
219 return (pte_t *)((uintptr_t)pa);
220 }
221}
222
223static phys_addr_t __init alloc_pte(uintptr_t va)
224{
225 /*
226 * We only create PMD or PGD early mappings so we
227 * should never reach here with MMU disabled.
228 */
229 BUG_ON(!mmu_enabled);
230
231 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
232}
233
234static void __init create_pte_mapping(pte_t *ptep,
235 uintptr_t va, phys_addr_t pa,
236 phys_addr_t sz, pgprot_t prot)
237{
Mike Rapoport974b9b22020-06-08 21:33:10 -0700238 uintptr_t pte_idx = pte_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700239
240 BUG_ON(sz != PAGE_SIZE);
241
Mike Rapoport974b9b22020-06-08 21:33:10 -0700242 if (pte_none(ptep[pte_idx]))
243 ptep[pte_idx] = pfn_pte(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700244}
245
246#ifndef __PAGETABLE_PMD_FOLDED
247
248pmd_t trampoline_pmd[PTRS_PER_PMD] __page_aligned_bss;
249pmd_t fixmap_pmd[PTRS_PER_PMD] __page_aligned_bss;
250
251#if MAX_EARLY_MAPPING_SIZE < PGDIR_SIZE
252#define NUM_EARLY_PMDS 1UL
253#else
254#define NUM_EARLY_PMDS (1UL + MAX_EARLY_MAPPING_SIZE / PGDIR_SIZE)
255#endif
256pmd_t early_pmd[PTRS_PER_PMD * NUM_EARLY_PMDS] __initdata __aligned(PAGE_SIZE);
257
258static pmd_t *__init get_pmd_virt(phys_addr_t pa)
259{
260 if (mmu_enabled) {
261 clear_fixmap(FIX_PMD);
262 return (pmd_t *)set_fixmap_offset(FIX_PMD, pa);
263 } else {
264 return (pmd_t *)((uintptr_t)pa);
265 }
266}
267
268static phys_addr_t __init alloc_pmd(uintptr_t va)
269{
270 uintptr_t pmd_num;
271
272 if (mmu_enabled)
273 return memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
274
275 pmd_num = (va - PAGE_OFFSET) >> PGDIR_SHIFT;
276 BUG_ON(pmd_num >= NUM_EARLY_PMDS);
277 return (uintptr_t)&early_pmd[pmd_num * PTRS_PER_PMD];
278}
279
280static void __init create_pmd_mapping(pmd_t *pmdp,
281 uintptr_t va, phys_addr_t pa,
282 phys_addr_t sz, pgprot_t prot)
283{
284 pte_t *ptep;
285 phys_addr_t pte_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700286 uintptr_t pmd_idx = pmd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700287
288 if (sz == PMD_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700289 if (pmd_none(pmdp[pmd_idx]))
290 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700291 return;
292 }
293
Mike Rapoport974b9b22020-06-08 21:33:10 -0700294 if (pmd_none(pmdp[pmd_idx])) {
Anup Patel671f9a32019-06-28 13:36:21 -0700295 pte_phys = alloc_pte(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700296 pmdp[pmd_idx] = pfn_pmd(PFN_DOWN(pte_phys), PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700297 ptep = get_pte_virt(pte_phys);
298 memset(ptep, 0, PAGE_SIZE);
299 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700300 pte_phys = PFN_PHYS(_pmd_pfn(pmdp[pmd_idx]));
Anup Patel671f9a32019-06-28 13:36:21 -0700301 ptep = get_pte_virt(pte_phys);
302 }
303
304 create_pte_mapping(ptep, va, pa, sz, prot);
305}
306
307#define pgd_next_t pmd_t
308#define alloc_pgd_next(__va) alloc_pmd(__va)
309#define get_pgd_next_virt(__pa) get_pmd_virt(__pa)
310#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
311 create_pmd_mapping(__nextp, __va, __pa, __sz, __prot)
Anup Patel671f9a32019-06-28 13:36:21 -0700312#define fixmap_pgd_next fixmap_pmd
313#else
314#define pgd_next_t pte_t
315#define alloc_pgd_next(__va) alloc_pte(__va)
316#define get_pgd_next_virt(__pa) get_pte_virt(__pa)
317#define create_pgd_next_mapping(__nextp, __va, __pa, __sz, __prot) \
318 create_pte_mapping(__nextp, __va, __pa, __sz, __prot)
Anup Patel671f9a32019-06-28 13:36:21 -0700319#define fixmap_pgd_next fixmap_pte
320#endif
321
322static void __init create_pgd_mapping(pgd_t *pgdp,
323 uintptr_t va, phys_addr_t pa,
324 phys_addr_t sz, pgprot_t prot)
325{
326 pgd_next_t *nextp;
327 phys_addr_t next_phys;
Mike Rapoport974b9b22020-06-08 21:33:10 -0700328 uintptr_t pgd_idx = pgd_index(va);
Anup Patel671f9a32019-06-28 13:36:21 -0700329
330 if (sz == PGDIR_SIZE) {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700331 if (pgd_val(pgdp[pgd_idx]) == 0)
332 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(pa), prot);
Anup Patel671f9a32019-06-28 13:36:21 -0700333 return;
334 }
335
Mike Rapoport974b9b22020-06-08 21:33:10 -0700336 if (pgd_val(pgdp[pgd_idx]) == 0) {
Anup Patel671f9a32019-06-28 13:36:21 -0700337 next_phys = alloc_pgd_next(va);
Mike Rapoport974b9b22020-06-08 21:33:10 -0700338 pgdp[pgd_idx] = pfn_pgd(PFN_DOWN(next_phys), PAGE_TABLE);
Anup Patel671f9a32019-06-28 13:36:21 -0700339 nextp = get_pgd_next_virt(next_phys);
340 memset(nextp, 0, PAGE_SIZE);
341 } else {
Mike Rapoport974b9b22020-06-08 21:33:10 -0700342 next_phys = PFN_PHYS(_pgd_pfn(pgdp[pgd_idx]));
Anup Patel671f9a32019-06-28 13:36:21 -0700343 nextp = get_pgd_next_virt(next_phys);
344 }
345
346 create_pgd_next_mapping(nextp, va, pa, sz, prot);
347}
348
349static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
350{
Zong Li0fdc6362019-11-08 01:00:40 -0800351 /* Upgrade to PMD_SIZE mappings whenever possible */
352 if ((base & (PMD_SIZE - 1)) || (size & (PMD_SIZE - 1)))
353 return PAGE_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700354
Zong Li0fdc6362019-11-08 01:00:40 -0800355 return PMD_SIZE;
Anup Patel671f9a32019-06-28 13:36:21 -0700356}
357
Anup Patel387181d2019-03-26 08:03:47 +0000358/*
359 * setup_vm() is called from head.S with MMU-off.
360 *
361 * Following requirements should be honoured for setup_vm() to work
362 * correctly:
363 * 1) It should use PC-relative addressing for accessing kernel symbols.
364 * To achieve this we always use GCC cmodel=medany.
365 * 2) The compiler instrumentation for FTRACE will not work for setup_vm()
366 * so disable compiler instrumentation when FTRACE is enabled.
367 *
368 * Currently, the above requirements are honoured by using custom CFLAGS
369 * for init.o in mm/Makefile.
370 */
371
372#ifndef __riscv_cmodel_medany
Paul Walmsley6a527b62019-10-17 14:45:58 -0700373#error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
Anup Patel387181d2019-03-26 08:03:47 +0000374#endif
375
Anup Patel671f9a32019-06-28 13:36:21 -0700376asmlinkage void __init setup_vm(uintptr_t dtb_pa)
Anup Patel6f1e9e92019-02-13 16:38:36 +0530377{
Anup Patel671f9a32019-06-28 13:36:21 -0700378 uintptr_t va, end_va;
379 uintptr_t load_pa = (uintptr_t)(&_start);
380 uintptr_t load_sz = (uintptr_t)(&_end) - load_pa;
381 uintptr_t map_size = best_map_size(load_pa, MAX_EARLY_MAPPING_SIZE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530382
Anup Patel671f9a32019-06-28 13:36:21 -0700383 va_pa_offset = PAGE_OFFSET - load_pa;
384 pfn_base = PFN_DOWN(load_pa);
385
386 /*
387 * Enforce boot alignment requirements of RV32 and
388 * RV64 by only allowing PMD or PGD mappings.
389 */
390 BUG_ON(map_size == PAGE_SIZE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530391
392 /* Sanity check alignment and size */
393 BUG_ON((PAGE_OFFSET % PGDIR_SIZE) != 0);
Anup Patel671f9a32019-06-28 13:36:21 -0700394 BUG_ON((load_pa % map_size) != 0);
395 BUG_ON(load_sz > MAX_EARLY_MAPPING_SIZE);
396
397 /* Setup early PGD for fixmap */
398 create_pgd_mapping(early_pg_dir, FIXADDR_START,
399 (uintptr_t)fixmap_pgd_next, PGDIR_SIZE, PAGE_TABLE);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530400
401#ifndef __PAGETABLE_PMD_FOLDED
Anup Patel671f9a32019-06-28 13:36:21 -0700402 /* Setup fixmap PMD */
403 create_pmd_mapping(fixmap_pmd, FIXADDR_START,
404 (uintptr_t)fixmap_pte, PMD_SIZE, PAGE_TABLE);
405 /* Setup trampoline PGD and PMD */
406 create_pgd_mapping(trampoline_pg_dir, PAGE_OFFSET,
407 (uintptr_t)trampoline_pmd, PGDIR_SIZE, PAGE_TABLE);
408 create_pmd_mapping(trampoline_pmd, PAGE_OFFSET,
409 load_pa, PMD_SIZE, PAGE_KERNEL_EXEC);
Anup Patel6f1e9e92019-02-13 16:38:36 +0530410#else
Anup Patel671f9a32019-06-28 13:36:21 -0700411 /* Setup trampoline PGD */
412 create_pgd_mapping(trampoline_pg_dir, PAGE_OFFSET,
413 load_pa, PGDIR_SIZE, PAGE_KERNEL_EXEC);
414#endif
Anup Patel6f1e9e92019-02-13 16:38:36 +0530415
Anup Patel671f9a32019-06-28 13:36:21 -0700416 /*
417 * Setup early PGD covering entire kernel which will allows
418 * us to reach paging_init(). We map all memory banks later
419 * in setup_vm_final() below.
420 */
421 end_va = PAGE_OFFSET + load_sz;
422 for (va = PAGE_OFFSET; va < end_va; va += map_size)
423 create_pgd_mapping(early_pg_dir, va,
424 load_pa + (va - PAGE_OFFSET),
425 map_size, PAGE_KERNEL_EXEC);
Anup Patelf2c17aa2019-01-07 20:57:01 +0530426
Anup Patel671f9a32019-06-28 13:36:21 -0700427 /* Create fixed mapping for early FDT parsing */
428 end_va = __fix_to_virt(FIX_FDT) + FIX_FDT_SIZE;
429 for (va = __fix_to_virt(FIX_FDT); va < end_va; va += PAGE_SIZE)
430 create_pte_mapping(fixmap_pte, va,
431 dtb_pa + (va - __fix_to_virt(FIX_FDT)),
432 PAGE_SIZE, PAGE_KERNEL);
433
434 /* Save pointer to DTB for early FDT parsing */
435 dtb_early_va = (void *)fix_to_virt(FIX_FDT) + (dtb_pa & ~PAGE_MASK);
Albert Ou922b0372019-09-27 16:14:18 -0700436 /* Save physical address for memblock reservation */
437 dtb_early_pa = dtb_pa;
Anup Patel671f9a32019-06-28 13:36:21 -0700438}
439
440static void __init setup_vm_final(void)
441{
442 uintptr_t va, map_size;
443 phys_addr_t pa, start, end;
444 struct memblock_region *reg;
445
446 /* Set mmu_enabled flag */
447 mmu_enabled = true;
448
449 /* Setup swapper PGD for fixmap */
450 create_pgd_mapping(swapper_pg_dir, FIXADDR_START,
Zong Liac51e002020-01-02 11:12:40 +0800451 __pa_symbol(fixmap_pgd_next),
Anup Patel671f9a32019-06-28 13:36:21 -0700452 PGDIR_SIZE, PAGE_TABLE);
453
454 /* Map all memory banks */
455 for_each_memblock(memory, reg) {
456 start = reg->base;
457 end = start + reg->size;
458
459 if (start >= end)
460 break;
461 if (memblock_is_nomap(reg))
462 continue;
463 if (start <= __pa(PAGE_OFFSET) &&
464 __pa(PAGE_OFFSET) < end)
465 start = __pa(PAGE_OFFSET);
466
467 map_size = best_map_size(start, end - start);
468 for (pa = start; pa < end; pa += map_size) {
469 va = (uintptr_t)__va(pa);
470 create_pgd_mapping(swapper_pg_dir, va, pa,
471 map_size, PAGE_KERNEL_EXEC);
472 }
Anup Patel6f1e9e92019-02-13 16:38:36 +0530473 }
Anup Patelf2c17aa2019-01-07 20:57:01 +0530474
Anup Patel671f9a32019-06-28 13:36:21 -0700475 /* Clear fixmap PTE and PMD mappings */
476 clear_fixmap(FIX_PTE);
477 clear_fixmap(FIX_PMD);
478
479 /* Move to swapper page table */
Zong Liac51e002020-01-02 11:12:40 +0800480 csr_write(CSR_SATP, PFN_DOWN(__pa_symbol(swapper_pg_dir)) | SATP_MODE);
Anup Patel671f9a32019-06-28 13:36:21 -0700481 local_flush_tlb_all();
482}
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100483#else
484asmlinkage void __init setup_vm(uintptr_t dtb_pa)
485{
Palmer Dabbelt2d268252020-04-14 13:43:24 +0900486#ifdef CONFIG_BUILTIN_DTB
487 dtb_early_va = soc_lookup_builtin_dtb();
488 if (!dtb_early_va) {
489 /* Fallback to first available DTS */
490 dtb_early_va = (void *) __dtb_start;
491 }
492#else
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100493 dtb_early_va = (void *)dtb_pa;
Palmer Dabbelt2d268252020-04-14 13:43:24 +0900494#endif
Christoph Hellwig6bd33e12019-10-28 13:10:41 +0100495}
496
497static inline void setup_vm_final(void)
498{
499}
500#endif /* CONFIG_MMU */
Anup Patel671f9a32019-06-28 13:36:21 -0700501
Zong Lid27c3c92020-03-10 00:55:41 +0800502#ifdef CONFIG_STRICT_KERNEL_RWX
Zong Lid27c3c92020-03-10 00:55:41 +0800503void mark_rodata_ro(void)
504{
505 unsigned long text_start = (unsigned long)_text;
506 unsigned long text_end = (unsigned long)_etext;
507 unsigned long rodata_start = (unsigned long)__start_rodata;
508 unsigned long data_start = (unsigned long)_data;
509 unsigned long max_low = (unsigned long)(__va(PFN_PHYS(max_low_pfn)));
510
511 set_memory_ro(text_start, (text_end - text_start) >> PAGE_SHIFT);
512 set_memory_ro(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
513 set_memory_nx(rodata_start, (data_start - rodata_start) >> PAGE_SHIFT);
514 set_memory_nx(data_start, (max_low - data_start) >> PAGE_SHIFT);
Zong Lib422d282020-06-03 16:03:55 -0700515
516 debug_checkwx();
Zong Lid27c3c92020-03-10 00:55:41 +0800517}
518#endif
519
Anup Patel671f9a32019-06-28 13:36:21 -0700520void __init paging_init(void)
521{
522 setup_vm_final();
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600523 memblocks_present();
524 sparse_init();
Anup Patel671f9a32019-06-28 13:36:21 -0700525 setup_zero_page();
526 zone_sizes_init();
Anup Patel6f1e9e92019-02-13 16:38:36 +0530527}
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600528
Kefeng Wang9fe57d82019-10-23 11:23:02 +0800529#ifdef CONFIG_SPARSEMEM_VMEMMAP
Logan Gunthorped95f1a52019-08-28 15:40:54 -0600530int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
531 struct vmem_altmap *altmap)
532{
533 return vmemmap_populate_basepages(start, end, node);
534}
535#endif