Thomas Gleixner | caab277 | 2019-06-03 07:44:50 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 2 | /* |
Jeykumar Sankaran | 25fdd59 | 2018-06-27 15:26:09 -0400 | [diff] [blame] | 3 | * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 4 | * Copyright (C) 2013 Red Hat |
| 5 | * Author: Rob Clark <robdclark@gmail.com> |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __MSM_DRV_H__ |
| 9 | #define __MSM_DRV_H__ |
| 10 | |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/clk.h> |
| 13 | #include <linux/cpufreq.h> |
| 14 | #include <linux/module.h> |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 15 | #include <linux/component.h> |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 16 | #include <linux/platform_device.h> |
| 17 | #include <linux/pm.h> |
| 18 | #include <linux/pm_runtime.h> |
| 19 | #include <linux/slab.h> |
| 20 | #include <linux/list.h> |
| 21 | #include <linux/iommu.h> |
| 22 | #include <linux/types.h> |
Archit Taneja | 3d6df06 | 2015-06-09 14:17:22 +0530 | [diff] [blame] | 23 | #include <linux/of_graph.h> |
Archit Taneja | e9fbdaf | 2015-11-18 12:15:14 +0530 | [diff] [blame] | 24 | #include <linux/of_device.h> |
Masahiro Yamada | 87dfb31 | 2019-05-14 15:46:51 -0700 | [diff] [blame] | 25 | #include <linux/sizes.h> |
Jeykumar Sankaran | 25fdd59 | 2018-06-27 15:26:09 -0400 | [diff] [blame] | 26 | #include <linux/kthread.h> |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 27 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 28 | #include <drm/drmP.h> |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 29 | #include <drm/drm_atomic.h> |
| 30 | #include <drm/drm_atomic_helper.h> |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 31 | #include <drm/drm_plane_helper.h> |
Daniel Vetter | fcd70cd | 2019-01-17 22:03:34 +0100 | [diff] [blame] | 32 | #include <drm/drm_probe_helper.h> |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 33 | #include <drm/drm_fb_helper.h> |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 34 | #include <drm/msm_drm.h> |
Daniel Vetter | d9fc941 | 2014-09-23 15:46:53 +0200 | [diff] [blame] | 35 | #include <drm/drm_gem.h> |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 36 | |
| 37 | struct msm_kms; |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 38 | struct msm_gpu; |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 39 | struct msm_mmu; |
Archit Taneja | 990a400 | 2016-05-07 23:11:25 +0530 | [diff] [blame] | 40 | struct msm_mdss; |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 41 | struct msm_rd_state; |
Rob Clark | 70c70f0 | 2014-05-30 14:49:43 -0400 | [diff] [blame] | 42 | struct msm_perf_state; |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 43 | struct msm_gem_submit; |
Rob Clark | ca762a8 | 2016-03-15 17:22:13 -0400 | [diff] [blame] | 44 | struct msm_fence_context; |
Rob Clark | 667ce33 | 2016-09-28 19:58:32 -0400 | [diff] [blame] | 45 | struct msm_gem_address_space; |
| 46 | struct msm_gem_vma; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 47 | |
Jeykumar Sankaran | 7305a0c | 2018-06-27 14:55:25 -0400 | [diff] [blame] | 48 | #define MAX_CRTCS 8 |
Jeykumar Sankaran | 25fdd59 | 2018-06-27 15:26:09 -0400 | [diff] [blame] | 49 | #define MAX_PLANES 20 |
Jeykumar Sankaran | 7305a0c | 2018-06-27 14:55:25 -0400 | [diff] [blame] | 50 | #define MAX_ENCODERS 8 |
| 51 | #define MAX_BRIDGES 8 |
| 52 | #define MAX_CONNECTORS 8 |
| 53 | |
Sean Paul | 96fc56a | 2018-08-29 13:49:47 -0400 | [diff] [blame] | 54 | #define FRAC_16_16(mult, div) (((mult) << 16) / (div)) |
| 55 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 56 | struct msm_file_private { |
Jordan Crouse | f7de154 | 2017-10-20 11:06:55 -0600 | [diff] [blame] | 57 | rwlock_t queuelock; |
| 58 | struct list_head submitqueues; |
| 59 | int queueid; |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 60 | }; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 61 | |
jilai wang | 1298778 | 2015-06-25 17:37:42 -0400 | [diff] [blame] | 62 | enum msm_mdp_plane_property { |
| 63 | PLANE_PROP_ZPOS, |
| 64 | PLANE_PROP_ALPHA, |
| 65 | PLANE_PROP_PREMULTIPLIED, |
| 66 | PLANE_PROP_MAX_NUM |
| 67 | }; |
| 68 | |
Jordan Crouse | b1fc283 | 2017-10-20 11:07:01 -0600 | [diff] [blame] | 69 | #define MSM_GPU_MAX_RINGS 4 |
Jeykumar Sankaran | 25fdd59 | 2018-06-27 15:26:09 -0400 | [diff] [blame] | 70 | #define MAX_H_TILES_PER_DISPLAY 2 |
| 71 | |
| 72 | /** |
| 73 | * enum msm_display_caps - features/capabilities supported by displays |
| 74 | * @MSM_DISPLAY_CAP_VID_MODE: Video or "active" mode supported |
| 75 | * @MSM_DISPLAY_CAP_CMD_MODE: Command mode supported |
| 76 | * @MSM_DISPLAY_CAP_HOT_PLUG: Hot plug detection supported |
| 77 | * @MSM_DISPLAY_CAP_EDID: EDID supported |
| 78 | */ |
| 79 | enum msm_display_caps { |
| 80 | MSM_DISPLAY_CAP_VID_MODE = BIT(0), |
| 81 | MSM_DISPLAY_CAP_CMD_MODE = BIT(1), |
| 82 | MSM_DISPLAY_CAP_HOT_PLUG = BIT(2), |
| 83 | MSM_DISPLAY_CAP_EDID = BIT(3), |
| 84 | }; |
| 85 | |
| 86 | /** |
| 87 | * enum msm_event_wait - type of HW events to wait for |
| 88 | * @MSM_ENC_COMMIT_DONE - wait for the driver to flush the registers to HW |
| 89 | * @MSM_ENC_TX_COMPLETE - wait for the HW to transfer the frame to panel |
| 90 | * @MSM_ENC_VBLANK - wait for the HW VBLANK event (for driver-internal waiters) |
| 91 | */ |
| 92 | enum msm_event_wait { |
| 93 | MSM_ENC_COMMIT_DONE = 0, |
| 94 | MSM_ENC_TX_COMPLETE, |
| 95 | MSM_ENC_VBLANK, |
| 96 | }; |
| 97 | |
| 98 | /** |
| 99 | * struct msm_display_topology - defines a display topology pipeline |
| 100 | * @num_lm: number of layer mixers used |
| 101 | * @num_enc: number of compression encoder blocks used |
| 102 | * @num_intf: number of interfaces the panel is mounted on |
| 103 | */ |
| 104 | struct msm_display_topology { |
| 105 | u32 num_lm; |
| 106 | u32 num_enc; |
| 107 | u32 num_intf; |
| 108 | }; |
| 109 | |
| 110 | /** |
| 111 | * struct msm_display_info - defines display properties |
Jeykumar Sankaran | 9b9c8e7 | 2018-12-17 14:35:03 -0800 | [diff] [blame] | 112 | * @intf_type: DRM_MODE_ENCODER_ type |
Jeykumar Sankaran | 25fdd59 | 2018-06-27 15:26:09 -0400 | [diff] [blame] | 113 | * @capabilities: Bitmask of display flags |
| 114 | * @num_of_h_tiles: Number of horizontal tiles in case of split interface |
| 115 | * @h_tile_instance: Controller instance used per tile. Number of elements is |
| 116 | * based on num_of_h_tiles |
| 117 | * @is_te_using_watchdog_timer: Boolean to indicate watchdog TE is |
| 118 | * used instead of panel TE in cmd mode panels |
| 119 | */ |
| 120 | struct msm_display_info { |
| 121 | int intf_type; |
| 122 | uint32_t capabilities; |
| 123 | uint32_t num_of_h_tiles; |
| 124 | uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY]; |
| 125 | bool is_te_using_watchdog_timer; |
| 126 | }; |
| 127 | |
| 128 | /* Commit/Event thread specific structure */ |
| 129 | struct msm_drm_thread { |
| 130 | struct drm_device *dev; |
| 131 | struct task_struct *thread; |
| 132 | unsigned int crtc_id; |
| 133 | struct kthread_worker worker; |
| 134 | }; |
Jordan Crouse | f97deca | 2017-10-20 11:06:57 -0600 | [diff] [blame] | 135 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 136 | struct msm_drm_private { |
| 137 | |
Rob Clark | 6820939 | 2016-05-17 16:19:32 -0400 | [diff] [blame] | 138 | struct drm_device *dev; |
| 139 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 140 | struct msm_kms *kms; |
| 141 | |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 142 | /* subordinate devices, if present: */ |
Rob Clark | 067fef3 | 2014-11-04 13:33:14 -0500 | [diff] [blame] | 143 | struct platform_device *gpu_pdev; |
| 144 | |
Jeykumar Sankaran | 25fdd59 | 2018-06-27 15:26:09 -0400 | [diff] [blame] | 145 | /* top level MDSS wrapper device (for MDP5/DPU only) */ |
Archit Taneja | 990a400 | 2016-05-07 23:11:25 +0530 | [diff] [blame] | 146 | struct msm_mdss *mdss; |
| 147 | |
Rob Clark | 067fef3 | 2014-11-04 13:33:14 -0500 | [diff] [blame] | 148 | /* possibly this should be in the kms component, but it is |
| 149 | * shared by both mdp4 and mdp5.. |
| 150 | */ |
| 151 | struct hdmi *hdmi; |
Rob Clark | 060530f | 2014-03-03 14:19:12 -0500 | [diff] [blame] | 152 | |
Hai Li | ab5b010 | 2015-01-07 18:47:44 -0500 | [diff] [blame] | 153 | /* eDP is for mdp5 only, but kms has not been created |
| 154 | * when edp_bind() and edp_init() are called. Here is the only |
| 155 | * place to keep the edp instance. |
| 156 | */ |
| 157 | struct msm_edp *edp; |
| 158 | |
Hai Li | a689554 | 2015-03-31 14:36:33 -0400 | [diff] [blame] | 159 | /* DSI is shared by mdp4 and mdp5 */ |
| 160 | struct msm_dsi *dsi[2]; |
| 161 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 162 | /* when we have more than one 'msm_gpu' these need to be an array: */ |
| 163 | struct msm_gpu *gpu; |
| 164 | struct msm_file_private *lastctx; |
Jonathan Marek | c2052a4 | 2018-11-14 17:08:04 -0500 | [diff] [blame] | 165 | /* gpu is only set on open(), but we need this info earlier */ |
| 166 | bool is_a2xx; |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 167 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 168 | struct drm_fb_helper *fbdev; |
| 169 | |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 170 | struct msm_rd_state *rd; /* debugfs to dump all submits */ |
| 171 | struct msm_rd_state *hangrd; /* debugfs to dump hanging submits */ |
Rob Clark | 70c70f0 | 2014-05-30 14:49:43 -0400 | [diff] [blame] | 172 | struct msm_perf_state *perf; |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 173 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 174 | /* list of GEM objects: */ |
| 175 | struct list_head inactive_list; |
| 176 | |
Kristian H. Kristensen | 48e7f18 | 2019-03-20 10:09:08 -0700 | [diff] [blame] | 177 | /* worker for delayed free of objects: */ |
| 178 | struct work_struct free_work; |
| 179 | struct llist_head free_list; |
| 180 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 181 | struct workqueue_struct *wq; |
| 182 | |
Rob Clark | a862391 | 2013-10-08 12:57:48 -0400 | [diff] [blame] | 183 | unsigned int num_planes; |
Jeykumar Sankaran | 7305a0c | 2018-06-27 14:55:25 -0400 | [diff] [blame] | 184 | struct drm_plane *planes[MAX_PLANES]; |
Rob Clark | a862391 | 2013-10-08 12:57:48 -0400 | [diff] [blame] | 185 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 186 | unsigned int num_crtcs; |
Jeykumar Sankaran | 7305a0c | 2018-06-27 14:55:25 -0400 | [diff] [blame] | 187 | struct drm_crtc *crtcs[MAX_CRTCS]; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 188 | |
Jeykumar Sankaran | 25fdd59 | 2018-06-27 15:26:09 -0400 | [diff] [blame] | 189 | struct msm_drm_thread event_thread[MAX_CRTCS]; |
| 190 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 191 | unsigned int num_encoders; |
Jeykumar Sankaran | 7305a0c | 2018-06-27 14:55:25 -0400 | [diff] [blame] | 192 | struct drm_encoder *encoders[MAX_ENCODERS]; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 193 | |
Rob Clark | a3376e3 | 2013-08-30 13:02:15 -0400 | [diff] [blame] | 194 | unsigned int num_bridges; |
Jeykumar Sankaran | 7305a0c | 2018-06-27 14:55:25 -0400 | [diff] [blame] | 195 | struct drm_bridge *bridges[MAX_BRIDGES]; |
Rob Clark | a3376e3 | 2013-08-30 13:02:15 -0400 | [diff] [blame] | 196 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 197 | unsigned int num_connectors; |
Jeykumar Sankaran | 7305a0c | 2018-06-27 14:55:25 -0400 | [diff] [blame] | 198 | struct drm_connector *connectors[MAX_CONNECTORS]; |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 199 | |
jilai wang | 1298778 | 2015-06-25 17:37:42 -0400 | [diff] [blame] | 200 | /* Properties */ |
| 201 | struct drm_property *plane_property[PLANE_PROP_MAX_NUM]; |
| 202 | |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 203 | /* VRAM carveout, used when no IOMMU: */ |
| 204 | struct { |
| 205 | unsigned long size; |
| 206 | dma_addr_t paddr; |
| 207 | /* NOTE: mm managed at the page level, size is in # of pages |
| 208 | * and position mm_node->start is in # of pages: |
| 209 | */ |
| 210 | struct drm_mm mm; |
Sushmita Susheelendra | 0e08270 | 2017-06-13 16:52:54 -0600 | [diff] [blame] | 211 | spinlock_t lock; /* Protects drm_mm node allocation/removal */ |
Rob Clark | 871d812 | 2013-11-16 12:56:06 -0500 | [diff] [blame] | 212 | } vram; |
Hai Li | 78b1d47 | 2015-07-27 13:49:45 -0400 | [diff] [blame] | 213 | |
Rob Clark | e1e9db2 | 2016-05-27 11:16:28 -0400 | [diff] [blame] | 214 | struct notifier_block vmap_notifier; |
Rob Clark | 6820939 | 2016-05-17 16:19:32 -0400 | [diff] [blame] | 215 | struct shrinker shrinker; |
| 216 | |
Daniel Mack | ec446d0 | 2018-05-28 21:53:38 +0200 | [diff] [blame] | 217 | struct drm_atomic_state *pm_state; |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 218 | }; |
| 219 | |
| 220 | struct msm_format { |
| 221 | uint32_t pixel_format; |
| 222 | }; |
| 223 | |
Sean Paul | db8f4d5 | 2018-04-03 10:42:23 -0400 | [diff] [blame] | 224 | int msm_atomic_prepare_fb(struct drm_plane *plane, |
| 225 | struct drm_plane_state *new_state); |
Sean Paul | d14659f | 2018-02-28 14:19:05 -0500 | [diff] [blame] | 226 | void msm_atomic_commit_tail(struct drm_atomic_state *state); |
Rob Clark | 870d738 | 2016-11-04 13:51:42 -0400 | [diff] [blame] | 227 | struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev); |
| 228 | void msm_atomic_state_clear(struct drm_atomic_state *state); |
| 229 | void msm_atomic_state_free(struct drm_atomic_state *state); |
Rob Clark | cf3a7e4 | 2014-11-08 13:21:06 -0500 | [diff] [blame] | 230 | |
Jordan Crouse | c0ee979 | 2018-11-07 15:35:48 -0700 | [diff] [blame] | 231 | int msm_gem_init_vma(struct msm_gem_address_space *aspace, |
| 232 | struct msm_gem_vma *vma, int npages); |
Jordan Crouse | 7ad0e8c | 2018-11-07 15:35:51 -0700 | [diff] [blame] | 233 | void msm_gem_purge_vma(struct msm_gem_address_space *aspace, |
| 234 | struct msm_gem_vma *vma); |
Rob Clark | 667ce33 | 2016-09-28 19:58:32 -0400 | [diff] [blame] | 235 | void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, |
Jordan Crouse | 70dc51b | 2018-11-07 15:35:47 -0700 | [diff] [blame] | 236 | struct msm_gem_vma *vma); |
Rob Clark | 667ce33 | 2016-09-28 19:58:32 -0400 | [diff] [blame] | 237 | int msm_gem_map_vma(struct msm_gem_address_space *aspace, |
Rob Clark | bbc2cd0 | 2019-01-09 14:25:05 -0500 | [diff] [blame] | 238 | struct msm_gem_vma *vma, int prot, |
| 239 | struct sg_table *sgt, int npages); |
Jordan Crouse | 7ad0e8c | 2018-11-07 15:35:51 -0700 | [diff] [blame] | 240 | void msm_gem_close_vma(struct msm_gem_address_space *aspace, |
| 241 | struct msm_gem_vma *vma); |
Rob Clark | 667ce33 | 2016-09-28 19:58:32 -0400 | [diff] [blame] | 242 | |
Jordan Crouse | ee546cd | 2017-03-07 10:02:52 -0700 | [diff] [blame] | 243 | void msm_gem_address_space_put(struct msm_gem_address_space *aspace); |
| 244 | |
Rob Clark | 667ce33 | 2016-09-28 19:58:32 -0400 | [diff] [blame] | 245 | struct msm_gem_address_space * |
| 246 | msm_gem_address_space_create(struct device *dev, struct iommu_domain *domain, |
| 247 | const char *name); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 248 | |
Jonathan Marek | c2052a4 | 2018-11-14 17:08:04 -0500 | [diff] [blame] | 249 | struct msm_gem_address_space * |
| 250 | msm_gem_address_space_create_a2xx(struct device *dev, struct msm_gpu *gpu, |
| 251 | const char *name, uint64_t va_start, uint64_t va_end); |
| 252 | |
Jeykumar Sankaran | 25fdd59 | 2018-06-27 15:26:09 -0400 | [diff] [blame] | 253 | int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu); |
| 254 | void msm_unregister_mmu(struct drm_device *dev, struct msm_mmu *mmu); |
| 255 | |
Jonathan Marek | c2052a4 | 2018-11-14 17:08:04 -0500 | [diff] [blame] | 256 | bool msm_use_mmu(struct drm_device *dev); |
| 257 | |
Rob Clark | 40e6815 | 2016-05-03 09:50:26 -0400 | [diff] [blame] | 258 | void msm_gem_submit_free(struct msm_gem_submit *submit); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 259 | int msm_ioctl_gem_submit(struct drm_device *dev, void *data, |
| 260 | struct drm_file *file); |
| 261 | |
Rob Clark | 6820939 | 2016-05-17 16:19:32 -0400 | [diff] [blame] | 262 | void msm_gem_shrinker_init(struct drm_device *dev); |
| 263 | void msm_gem_shrinker_cleanup(struct drm_device *dev); |
| 264 | |
Daniel Thompson | 77a147e | 2014-11-12 11:38:14 +0000 | [diff] [blame] | 265 | int msm_gem_mmap_obj(struct drm_gem_object *obj, |
| 266 | struct vm_area_struct *vma); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 267 | int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma); |
Souptick Joarder | a5f74ec | 2018-05-21 22:59:48 +0530 | [diff] [blame] | 268 | vm_fault_t msm_gem_fault(struct vm_fault *vmf); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 269 | uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj); |
Rob Clark | 8bdcd94 | 2017-06-13 11:07:08 -0400 | [diff] [blame] | 270 | int msm_gem_get_iova(struct drm_gem_object *obj, |
| 271 | struct msm_gem_address_space *aspace, uint64_t *iova); |
Jordan Crouse | 9fe041f | 2018-11-07 15:35:50 -0700 | [diff] [blame] | 272 | int msm_gem_get_and_pin_iova(struct drm_gem_object *obj, |
| 273 | struct msm_gem_address_space *aspace, uint64_t *iova); |
Rob Clark | 8bdcd94 | 2017-06-13 11:07:08 -0400 | [diff] [blame] | 274 | uint64_t msm_gem_iova(struct drm_gem_object *obj, |
| 275 | struct msm_gem_address_space *aspace); |
Jordan Crouse | 7ad0e8c | 2018-11-07 15:35:51 -0700 | [diff] [blame] | 276 | void msm_gem_unpin_iova(struct drm_gem_object *obj, |
| 277 | struct msm_gem_address_space *aspace); |
Rob Clark | 05b8491 | 2013-09-28 11:28:35 -0400 | [diff] [blame] | 278 | struct page **msm_gem_get_pages(struct drm_gem_object *obj); |
| 279 | void msm_gem_put_pages(struct drm_gem_object *obj); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 280 | int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev, |
| 281 | struct drm_mode_create_dumb *args); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 282 | int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev, |
| 283 | uint32_t handle, uint64_t *offset); |
Rob Clark | 05b8491 | 2013-09-28 11:28:35 -0400 | [diff] [blame] | 284 | struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj); |
| 285 | void *msm_gem_prime_vmap(struct drm_gem_object *obj); |
| 286 | void msm_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); |
Daniel Thompson | 77a147e | 2014-11-12 11:38:14 +0000 | [diff] [blame] | 287 | int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma); |
Rob Clark | 05b8491 | 2013-09-28 11:28:35 -0400 | [diff] [blame] | 288 | struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev, |
Maarten Lankhorst | b5e9c1a | 2014-01-09 11:03:14 +0100 | [diff] [blame] | 289 | struct dma_buf_attachment *attach, struct sg_table *sg); |
Rob Clark | 05b8491 | 2013-09-28 11:28:35 -0400 | [diff] [blame] | 290 | int msm_gem_prime_pin(struct drm_gem_object *obj); |
| 291 | void msm_gem_prime_unpin(struct drm_gem_object *obj); |
Rob Clark | 18f2304 | 2016-05-26 16:24:35 -0400 | [diff] [blame] | 292 | void *msm_gem_get_vaddr(struct drm_gem_object *obj); |
Rob Clark | fad33f4 | 2017-09-15 08:38:20 -0400 | [diff] [blame] | 293 | void *msm_gem_get_vaddr_active(struct drm_gem_object *obj); |
Rob Clark | 18f2304 | 2016-05-26 16:24:35 -0400 | [diff] [blame] | 294 | void msm_gem_put_vaddr(struct drm_gem_object *obj); |
Rob Clark | 4cd33c4 | 2016-05-17 15:44:49 -0400 | [diff] [blame] | 295 | int msm_gem_madvise(struct drm_gem_object *obj, unsigned madv); |
Rob Clark | b6295f9 | 2016-03-15 18:26:28 -0400 | [diff] [blame] | 296 | int msm_gem_sync_object(struct drm_gem_object *obj, |
| 297 | struct msm_fence_context *fctx, bool exclusive); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 298 | void msm_gem_move_to_active(struct drm_gem_object *obj, |
Chris Wilson | f54d186 | 2016-10-25 13:00:45 +0100 | [diff] [blame] | 299 | struct msm_gpu *gpu, bool exclusive, struct dma_fence *fence); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 300 | void msm_gem_move_to_inactive(struct drm_gem_object *obj); |
Rob Clark | ba00c3f | 2016-03-16 18:18:17 -0400 | [diff] [blame] | 301 | int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t *timeout); |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 302 | int msm_gem_cpu_fini(struct drm_gem_object *obj); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 303 | void msm_gem_free_object(struct drm_gem_object *obj); |
| 304 | int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file, |
Jordan Crouse | 0815d77 | 2018-11-07 15:35:52 -0700 | [diff] [blame] | 305 | uint32_t size, uint32_t flags, uint32_t *handle, char *name); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 306 | struct drm_gem_object *msm_gem_new(struct drm_device *dev, |
| 307 | uint32_t size, uint32_t flags); |
Sushmita Susheelendra | 0e08270 | 2017-06-13 16:52:54 -0600 | [diff] [blame] | 308 | struct drm_gem_object *msm_gem_new_locked(struct drm_device *dev, |
| 309 | uint32_t size, uint32_t flags); |
Jordan Crouse | 8223286 | 2017-07-27 10:42:40 -0600 | [diff] [blame] | 310 | void *msm_gem_kernel_new(struct drm_device *dev, uint32_t size, |
| 311 | uint32_t flags, struct msm_gem_address_space *aspace, |
| 312 | struct drm_gem_object **bo, uint64_t *iova); |
| 313 | void *msm_gem_kernel_new_locked(struct drm_device *dev, uint32_t size, |
| 314 | uint32_t flags, struct msm_gem_address_space *aspace, |
| 315 | struct drm_gem_object **bo, uint64_t *iova); |
Jordan Crouse | 1e29dff | 2018-11-07 15:35:46 -0700 | [diff] [blame] | 316 | void msm_gem_kernel_put(struct drm_gem_object *bo, |
| 317 | struct msm_gem_address_space *aspace, bool locked); |
Rob Clark | 05b8491 | 2013-09-28 11:28:35 -0400 | [diff] [blame] | 318 | struct drm_gem_object *msm_gem_import(struct drm_device *dev, |
Rob Clark | 79f0e20 | 2016-03-16 12:40:35 -0400 | [diff] [blame] | 319 | struct dma_buf *dmabuf, struct sg_table *sgt); |
Kristian H. Kristensen | 48e7f18 | 2019-03-20 10:09:08 -0700 | [diff] [blame] | 320 | void msm_gem_free_work(struct work_struct *work); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 321 | |
Joe Perches | 023014e | 2019-01-17 14:17:36 -0800 | [diff] [blame] | 322 | __printf(2, 3) |
Jordan Crouse | 0815d77 | 2018-11-07 15:35:52 -0700 | [diff] [blame] | 323 | void msm_gem_object_set_name(struct drm_gem_object *bo, const char *fmt, ...); |
| 324 | |
Rob Clark | 8bdcd94 | 2017-06-13 11:07:08 -0400 | [diff] [blame] | 325 | int msm_framebuffer_prepare(struct drm_framebuffer *fb, |
| 326 | struct msm_gem_address_space *aspace); |
| 327 | void msm_framebuffer_cleanup(struct drm_framebuffer *fb, |
| 328 | struct msm_gem_address_space *aspace); |
| 329 | uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb, |
| 330 | struct msm_gem_address_space *aspace, int plane); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 331 | struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane); |
| 332 | const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 333 | struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev, |
Ville Syrjälä | 1eb8345 | 2015-11-11 19:11:29 +0200 | [diff] [blame] | 334 | struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd); |
Rob Clark | 466e560 | 2017-07-11 10:40:13 -0400 | [diff] [blame] | 335 | struct drm_framebuffer * msm_alloc_stolen_fb(struct drm_device *dev, |
| 336 | int w, int h, int p, uint32_t format); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 337 | |
| 338 | struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev); |
Archit Taneja | 1aaa57f | 2016-02-25 11:19:45 +0530 | [diff] [blame] | 339 | void msm_fbdev_free(struct drm_device *dev); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 340 | |
Rob Clark | dada25b | 2013-12-01 12:12:54 -0500 | [diff] [blame] | 341 | struct hdmi; |
Arnd Bergmann | fcda50c | 2016-02-22 22:08:35 +0100 | [diff] [blame] | 342 | int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev, |
Rob Clark | 067fef3 | 2014-11-04 13:33:14 -0500 | [diff] [blame] | 343 | struct drm_encoder *encoder); |
Arnd Bergmann | fcda50c | 2016-02-22 22:08:35 +0100 | [diff] [blame] | 344 | void __init msm_hdmi_register(void); |
| 345 | void __exit msm_hdmi_unregister(void); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 346 | |
Hai Li | 0045398 | 2014-12-12 14:41:17 -0500 | [diff] [blame] | 347 | struct msm_edp; |
| 348 | void __init msm_edp_register(void); |
| 349 | void __exit msm_edp_unregister(void); |
| 350 | int msm_edp_modeset_init(struct msm_edp *edp, struct drm_device *dev, |
| 351 | struct drm_encoder *encoder); |
| 352 | |
Hai Li | a689554 | 2015-03-31 14:36:33 -0400 | [diff] [blame] | 353 | struct msm_dsi; |
Hai Li | a689554 | 2015-03-31 14:36:33 -0400 | [diff] [blame] | 354 | #ifdef CONFIG_DRM_MSM_DSI |
| 355 | void __init msm_dsi_register(void); |
| 356 | void __exit msm_dsi_unregister(void); |
| 357 | int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev, |
Archit Taneja | 97e00119 | 2017-01-16 09:42:03 +0530 | [diff] [blame] | 358 | struct drm_encoder *encoder); |
Hai Li | a689554 | 2015-03-31 14:36:33 -0400 | [diff] [blame] | 359 | #else |
| 360 | static inline void __init msm_dsi_register(void) |
| 361 | { |
| 362 | } |
| 363 | static inline void __exit msm_dsi_unregister(void) |
| 364 | { |
| 365 | } |
| 366 | static inline int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, |
Archit Taneja | 97e00119 | 2017-01-16 09:42:03 +0530 | [diff] [blame] | 367 | struct drm_device *dev, |
| 368 | struct drm_encoder *encoder) |
Hai Li | a689554 | 2015-03-31 14:36:33 -0400 | [diff] [blame] | 369 | { |
| 370 | return -EINVAL; |
| 371 | } |
| 372 | #endif |
| 373 | |
Archit Taneja | 1dd0a0b | 2016-05-30 16:36:50 +0530 | [diff] [blame] | 374 | void __init msm_mdp_register(void); |
| 375 | void __exit msm_mdp_unregister(void); |
Jeykumar Sankaran | 25fdd59 | 2018-06-27 15:26:09 -0400 | [diff] [blame] | 376 | void __init msm_dpu_register(void); |
| 377 | void __exit msm_dpu_unregister(void); |
Archit Taneja | 1dd0a0b | 2016-05-30 16:36:50 +0530 | [diff] [blame] | 378 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 379 | #ifdef CONFIG_DEBUG_FS |
| 380 | void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m); |
| 381 | void msm_gem_describe_objects(struct list_head *list, struct seq_file *m); |
| 382 | void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m); |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 383 | int msm_debugfs_late_init(struct drm_device *dev); |
| 384 | int msm_rd_debugfs_init(struct drm_minor *minor); |
Noralf Trønnes | 85eac47 | 2017-03-07 21:49:22 +0100 | [diff] [blame] | 385 | void msm_rd_debugfs_cleanup(struct msm_drm_private *priv); |
Joe Perches | 023014e | 2019-01-17 14:17:36 -0800 | [diff] [blame] | 386 | __printf(3, 4) |
Rob Clark | 998b9a5 | 2017-09-15 10:46:45 -0400 | [diff] [blame] | 387 | void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit, |
| 388 | const char *fmt, ...); |
Rob Clark | 70c70f0 | 2014-05-30 14:49:43 -0400 | [diff] [blame] | 389 | int msm_perf_debugfs_init(struct drm_minor *minor); |
Noralf Trønnes | 85eac47 | 2017-03-07 21:49:22 +0100 | [diff] [blame] | 390 | void msm_perf_debugfs_cleanup(struct msm_drm_private *priv); |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 391 | #else |
| 392 | static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; } |
Joe Perches | 023014e | 2019-01-17 14:17:36 -0800 | [diff] [blame] | 393 | __printf(3, 4) |
Arnd Bergmann | e6756d7 | 2017-11-02 12:21:32 +0100 | [diff] [blame] | 394 | static inline void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit, |
| 395 | const char *fmt, ...) {} |
Arnd Bergmann | 3a270e4 | 2017-03-20 10:39:25 +0100 | [diff] [blame] | 396 | static inline void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) {} |
| 397 | static inline void msm_perf_debugfs_cleanup(struct msm_drm_private *priv) {} |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 398 | #endif |
| 399 | |
Rob Clark | 720c3bb | 2017-01-30 11:30:58 -0500 | [diff] [blame] | 400 | struct clk *msm_clk_get(struct platform_device *pdev, const char *name); |
Jordan Crouse | 8e54eea | 2018-08-06 11:33:21 -0600 | [diff] [blame] | 401 | int msm_clk_bulk_get(struct device *dev, struct clk_bulk_data **bulk); |
| 402 | |
| 403 | struct clk *msm_clk_bulk_get_clock(struct clk_bulk_data *bulk, int count, |
| 404 | const char *name); |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 405 | void __iomem *msm_ioremap(struct platform_device *pdev, const char *name, |
| 406 | const char *dbgname); |
| 407 | void msm_writel(u32 data, void __iomem *addr); |
| 408 | u32 msm_readl(const void __iomem *addr); |
| 409 | |
Jordan Crouse | f7de154 | 2017-10-20 11:06:55 -0600 | [diff] [blame] | 410 | struct msm_gpu_submitqueue; |
Jordan Crouse | f97deca | 2017-10-20 11:06:57 -0600 | [diff] [blame] | 411 | int msm_submitqueue_init(struct drm_device *drm, struct msm_file_private *ctx); |
Jordan Crouse | f7de154 | 2017-10-20 11:06:55 -0600 | [diff] [blame] | 412 | struct msm_gpu_submitqueue *msm_submitqueue_get(struct msm_file_private *ctx, |
| 413 | u32 id); |
Jordan Crouse | f97deca | 2017-10-20 11:06:57 -0600 | [diff] [blame] | 414 | int msm_submitqueue_create(struct drm_device *drm, struct msm_file_private *ctx, |
| 415 | u32 prio, u32 flags, u32 *id); |
Jordan Crouse | b0fb660 | 2019-03-22 14:21:22 -0600 | [diff] [blame] | 416 | int msm_submitqueue_query(struct drm_device *drm, struct msm_file_private *ctx, |
| 417 | struct drm_msm_submitqueue_query *args); |
Jordan Crouse | f7de154 | 2017-10-20 11:06:55 -0600 | [diff] [blame] | 418 | int msm_submitqueue_remove(struct msm_file_private *ctx, u32 id); |
| 419 | void msm_submitqueue_close(struct msm_file_private *ctx); |
| 420 | |
| 421 | void msm_submitqueue_destroy(struct kref *kref); |
| 422 | |
| 423 | |
Rob Clark | 7ed216e | 2016-11-01 17:42:33 -0400 | [diff] [blame] | 424 | #define DBG(fmt, ...) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__) |
| 425 | #define VERB(fmt, ...) if (0) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__) |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 426 | |
| 427 | static inline int align_pitch(int width, int bpp) |
| 428 | { |
| 429 | int bytespp = (bpp + 7) / 8; |
| 430 | /* adreno needs pitch aligned to 32 pixels: */ |
| 431 | return bytespp * ALIGN(width, 32); |
| 432 | } |
| 433 | |
| 434 | /* for the generated headers: */ |
| 435 | #define INVALID_IDX(idx) ({BUG(); 0;}) |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 436 | #define fui(x) ({BUG(); 0;}) |
| 437 | #define util_float_to_half(x) ({BUG(); 0;}) |
| 438 | |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 439 | |
| 440 | #define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT) |
| 441 | |
| 442 | /* for conditionally setting boolean flag(s): */ |
| 443 | #define COND(bool, val) ((bool) ? (val) : 0) |
| 444 | |
Rob Clark | 340ff41 | 2016-03-16 14:57:22 -0400 | [diff] [blame] | 445 | static inline unsigned long timeout_to_jiffies(const ktime_t *timeout) |
| 446 | { |
| 447 | ktime_t now = ktime_get(); |
| 448 | unsigned long remaining_jiffies; |
| 449 | |
| 450 | if (ktime_compare(*timeout, now) < 0) { |
| 451 | remaining_jiffies = 0; |
| 452 | } else { |
| 453 | ktime_t rem = ktime_sub(*timeout, now); |
| 454 | struct timespec ts = ktime_to_timespec(rem); |
| 455 | remaining_jiffies = timespec_to_jiffies(&ts); |
| 456 | } |
| 457 | |
| 458 | return remaining_jiffies; |
| 459 | } |
Rob Clark | c8afe68 | 2013-06-26 12:44:06 -0400 | [diff] [blame] | 460 | |
| 461 | #endif /* __MSM_DRV_H__ */ |