blob: 64e7874c95f4c84f459b52036e23a376d791fa13 [file] [log] [blame]
Andrew Lunna2443fd2019-01-21 19:05:50 +01001// SPDX-License-Identifier: GPL-2.0+
Andy Fleming00db8182005-07-30 19:31:23 -04002/*
3 * drivers/net/phy/marvell.c
4 *
5 * Driver for Marvell PHYs
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 *
Michael Stapelberg3871c382013-03-11 13:56:45 +000011 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
Andy Fleming00db8182005-07-30 19:31:23 -040012 */
Andy Fleming00db8182005-07-30 19:31:23 -040013#include <linux/kernel.h>
Andy Fleming00db8182005-07-30 19:31:23 -040014#include <linux/string.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010015#include <linux/ctype.h>
Andy Fleming00db8182005-07-30 19:31:23 -040016#include <linux/errno.h>
17#include <linux/unistd.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010018#include <linux/hwmon.h>
Andy Fleming00db8182005-07-30 19:31:23 -040019#include <linux/interrupt.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/netdevice.h>
23#include <linux/etherdevice.h>
24#include <linux/skbuff.h>
25#include <linux/spinlock.h>
26#include <linux/mm.h>
27#include <linux/module.h>
Andy Fleming00db8182005-07-30 19:31:23 -040028#include <linux/mii.h>
29#include <linux/ethtool.h>
Andrew Lunnfc879f72020-05-10 21:12:38 +020030#include <linux/ethtool_netlink.h>
Andy Fleming00db8182005-07-30 19:31:23 -040031#include <linux/phy.h>
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +100032#include <linux/marvell_phy.h>
Heiner Kallweit69f42be2019-03-25 19:35:41 +010033#include <linux/bitfield.h>
David Daneycf41a512010-11-19 12:13:18 +000034#include <linux/of.h>
Ivan Bornyakovb697d9d2021-08-12 16:42:56 +030035#include <linux/sfp.h>
Andy Fleming00db8182005-07-30 19:31:23 -040036
Avinash Kumareea3b202013-09-30 09:36:44 +053037#include <linux/io.h>
Andy Fleming00db8182005-07-30 19:31:23 -040038#include <asm/irq.h>
Avinash Kumareea3b202013-09-30 09:36:44 +053039#include <linux/uaccess.h>
Andy Fleming00db8182005-07-30 19:31:23 -040040
David Daney27d916d2010-11-19 11:58:52 +000041#define MII_MARVELL_PHY_PAGE 22
Andrew Lunn52295662017-05-25 21:42:08 +020042#define MII_MARVELL_COPPER_PAGE 0x00
43#define MII_MARVELL_FIBER_PAGE 0x01
44#define MII_MARVELL_MSCR_PAGE 0x02
45#define MII_MARVELL_LED_PAGE 0x03
Andrew Lunn0c9bcc12020-05-27 00:21:40 +020046#define MII_MARVELL_VCT5_PAGE 0x05
Andrew Lunn52295662017-05-25 21:42:08 +020047#define MII_MARVELL_MISC_TEST_PAGE 0x06
Andrew Lunnfc879f72020-05-10 21:12:38 +020048#define MII_MARVELL_VCT7_PAGE 0x07
Andrew Lunn52295662017-05-25 21:42:08 +020049#define MII_MARVELL_WOL_PAGE 0x11
Ivan Bornyakovb697d9d2021-08-12 16:42:56 +030050#define MII_MARVELL_MODE_PAGE 0x12
David Daney27d916d2010-11-19 11:58:52 +000051
Andy Fleming00db8182005-07-30 19:31:23 -040052#define MII_M1011_IEVENT 0x13
53#define MII_M1011_IEVENT_CLEAR 0x0000
54
55#define MII_M1011_IMASK 0x12
56#define MII_M1011_IMASK_INIT 0x6400
57#define MII_M1011_IMASK_CLEAR 0x0000
58
Andrew Lunnfecd5e92017-07-30 22:41:49 +020059#define MII_M1011_PHY_SCR 0x10
60#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
Heiner Kallweitf8d975b2019-10-28 20:52:22 +010061#define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +020062#define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
Andrew Lunnfecd5e92017-07-30 22:41:49 +020063#define MII_M1011_PHY_SCR_MDI (0x0 << 5)
64#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
65#define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
Andy Fleming76884672007-02-09 18:13:58 -060066
Heiner Kallweita3bdfce2019-10-19 15:57:33 +020067#define MII_M1011_PHY_SSR 0x11
68#define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
69
Andy Fleming76884672007-02-09 18:13:58 -060070#define MII_M1111_PHY_LED_CONTROL 0x18
71#define MII_M1111_PHY_LED_DIRECT 0x4100
72#define MII_M1111_PHY_LED_COMBINE 0x411c
Kim Phillips895ee682007-06-05 18:46:47 +080073#define MII_M1111_PHY_EXT_CR 0x14
Heiner Kallweit5c6bc512019-10-28 20:53:25 +010074#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
75#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
76#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
Andrew Lunn61111592017-07-30 22:41:46 +020077#define MII_M1111_RGMII_RX_DELAY BIT(7)
78#define MII_M1111_RGMII_TX_DELAY BIT(1)
Kim Phillips895ee682007-06-05 18:46:47 +080079#define MII_M1111_PHY_EXT_SR 0x1b
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030080
81#define MII_M1111_HWCFG_MODE_MASK 0xf
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030082#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
Kapil Juneja4117b5b2007-05-11 18:25:18 -050083#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
Andrew Lunn865b813a2017-07-30 22:41:47 +020084#define MII_M1111_HWCFG_MODE_RTBI 0x7
Robert Hancock18870232020-10-28 11:15:40 -060085#define MII_M1111_HWCFG_MODE_COPPER_1000X_AN 0x8
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +000086#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
Andrew Lunn865b813a2017-07-30 22:41:47 +020087#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
Robert Hancock18870232020-10-28 11:15:40 -060088#define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN 0xc
89#define MII_M1111_HWCFG_SERIAL_AN_BYPASS BIT(12)
Andrew Lunn865b813a2017-07-30 22:41:47 +020090#define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
91#define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030092
Cyril Chemparathyc477d042010-08-02 09:44:53 +000093#define MII_88E1121_PHY_MSCR_REG 21
94#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
95#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
Russell King424ca4c2018-01-02 10:58:48 +000096#define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
Cyril Chemparathyc477d042010-08-02 09:44:53 +000097
Andrew Lunn0b046802017-01-20 01:37:49 +010098#define MII_88E1121_MISC_TEST 0x1a
99#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
100#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
101#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
102#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
103#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
104#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
105
106#define MII_88E1510_TEMP_SENSOR 0x1b
107#define MII_88E1510_TEMP_SENSOR_MASK 0xff
108
Heiner Kallweit69f42be2019-03-25 19:35:41 +0100109#define MII_88E1540_COPPER_CTRL3 0x1a
110#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
111#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
112#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
113#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
114#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
115#define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
116
Andrew Lunnfee2d542018-01-09 22:42:09 +0100117#define MII_88E6390_MISC_TEST 0x1b
Marek Behún4f920c292021-04-20 09:54:00 +0200118#define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S (0x0 << 14)
119#define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE (0x1 << 14)
120#define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT (0x2 << 14)
121#define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE (0x3 << 14)
122#define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK (0x3 << 14)
Marek Behúna978f7c2021-04-20 09:54:03 +0200123#define MII_88E6393_MISC_TEST_SAMPLES_2048 (0x0 << 11)
124#define MII_88E6393_MISC_TEST_SAMPLES_4096 (0x1 << 11)
125#define MII_88E6393_MISC_TEST_SAMPLES_8192 (0x2 << 11)
126#define MII_88E6393_MISC_TEST_SAMPLES_16384 (0x3 << 11)
127#define MII_88E6393_MISC_TEST_SAMPLES_MASK (0x3 << 11)
128#define MII_88E6393_MISC_TEST_RATE_2_3MS (0x5 << 8)
129#define MII_88E6393_MISC_TEST_RATE_6_4MS (0x6 << 8)
130#define MII_88E6393_MISC_TEST_RATE_11_9MS (0x7 << 8)
131#define MII_88E6393_MISC_TEST_RATE_MASK (0x7 << 8)
Andrew Lunnfee2d542018-01-09 22:42:09 +0100132
133#define MII_88E6390_TEMP_SENSOR 0x1c
Marek Behúna978f7c2021-04-20 09:54:03 +0200134#define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK 0xff00
135#define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT 8
136#define MII_88E6390_TEMP_SENSOR_MASK 0xff
137#define MII_88E6390_TEMP_SENSOR_SAMPLES 10
Andrew Lunnfee2d542018-01-09 22:42:09 +0100138
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700139#define MII_88E1318S_PHY_MSCR1_REG 16
140#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700141
Michael Stapelberg3871c382013-03-11 13:56:45 +0000142/* Copper Specific Interrupt Enable Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200143#define MII_88E1318S_PHY_CSIER 0x12
Michael Stapelberg3871c382013-03-11 13:56:45 +0000144/* WOL Event Interrupt Enable */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200145#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000146
147/* LED Timer Control Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200148#define MII_88E1318S_PHY_LED_TCR 0x12
149#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
150#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
151#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000152
153/* Magic Packet MAC address registers */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200154#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
155#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
156#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
Michael Stapelberg3871c382013-03-11 13:56:45 +0000157
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200158#define MII_88E1318S_PHY_WOL_CTRL 0x10
159#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
Song Yoong Siang61646592021-08-13 16:45:08 +0800160#define MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE BIT(13)
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200161#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000162
Wang Dongsheng07777242018-07-01 23:15:46 -0700163#define MII_PHY_LED_CTRL 16
Sergei Poselenov140bc922009-04-07 02:01:41 +0000164#define MII_88E1121_PHY_LED_DEF 0x0030
Wang Dongsheng07777242018-07-01 23:15:46 -0700165#define MII_88E1510_PHY_LED_DEF 0x1177
Jian Shena93f7fe2019-04-22 21:52:23 +0800166#define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
Sergei Poselenov140bc922009-04-07 02:01:41 +0000167
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300168#define MII_M1011_PHY_STATUS 0x11
169#define MII_M1011_PHY_STATUS_1000 0x8000
170#define MII_M1011_PHY_STATUS_100 0x4000
171#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
172#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
173#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
174#define MII_M1011_PHY_STATUS_LINK 0x0400
175
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200176#define MII_88E3016_PHY_SPEC_CTRL 0x10
177#define MII_88E3016_DISABLE_SCRAMBLER 0x0200
178#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
Andy Fleming76884672007-02-09 18:13:58 -0600179
Stefan Roese930b37e2016-02-18 10:59:07 +0100180#define MII_88E1510_GEN_CTRL_REG_1 0x14
181#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
Ivan Bornyakovb697d9d2021-08-12 16:42:56 +0300182#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII 0x0 /* RGMII to copper */
Stefan Roese930b37e2016-02-18 10:59:07 +0100183#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
Ivan Bornyakovb697d9d2021-08-12 16:42:56 +0300184/* RGMII to 1000BASE-X */
185#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X 0x2
186/* RGMII to 100BASE-FX */
187#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX 0x3
188/* RGMII to SGMII */
189#define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII 0x4
Stefan Roese930b37e2016-02-18 10:59:07 +0100190#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
191
Andrew Lunn0c9bcc12020-05-27 00:21:40 +0200192#define MII_VCT5_TX_RX_MDI0_COUPLING 0x10
193#define MII_VCT5_TX_RX_MDI1_COUPLING 0x11
194#define MII_VCT5_TX_RX_MDI2_COUPLING 0x12
195#define MII_VCT5_TX_RX_MDI3_COUPLING 0x13
196#define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00
197#define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8
198#define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15)
199
200#define MII_VCT5_CTRL 0x17
201#define MII_VCT5_CTRL_ENABLE BIT(15)
202#define MII_VCT5_CTRL_COMPLETE BIT(14)
203#define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11)
204#define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11)
205#define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11)
206#define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11)
207#define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11)
208#define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8)
209#define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8)
210#define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8)
211#define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8)
212#define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8)
213#define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8)
214#define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8)
215#define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8)
216#define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8)
217#define MII_VCT5_CTRL_SAMPLES_SHIFT 8
218#define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6)
219#define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6)
220#define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6)
221#define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6)
222#define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3
223
224#define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18
Andrew Lunnf2bc8ad2020-05-27 00:21:41 +0200225#define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511
Andrew Lunn0c9bcc12020-05-27 00:21:40 +0200226#define MII_VCT5_TX_PULSE_CTRL 0x1c
227#define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12)
228#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10)
229#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10)
230#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10)
231#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10)
232#define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10
233#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8)
234#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8)
235#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8)
236#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8)
237#define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8
238#define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7)
239#define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0)
240
Andrew Lunndb8668a2020-05-27 00:21:43 +0200241/* For TDR measurements less than 11 meters, a short pulse should be
242 * used.
243 */
244#define TDR_SHORT_CABLE_LENGTH 11
245
Andrew Lunnfc879f72020-05-10 21:12:38 +0200246#define MII_VCT7_PAIR_0_DISTANCE 0x10
247#define MII_VCT7_PAIR_1_DISTANCE 0x11
248#define MII_VCT7_PAIR_2_DISTANCE 0x12
249#define MII_VCT7_PAIR_3_DISTANCE 0x13
250
251#define MII_VCT7_RESULTS 0x14
252#define MII_VCT7_RESULTS_PAIR3_MASK 0xf000
253#define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00
254#define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0
255#define MII_VCT7_RESULTS_PAIR0_MASK 0x000f
256#define MII_VCT7_RESULTS_PAIR3_SHIFT 12
257#define MII_VCT7_RESULTS_PAIR2_SHIFT 8
258#define MII_VCT7_RESULTS_PAIR1_SHIFT 4
259#define MII_VCT7_RESULTS_PAIR0_SHIFT 0
260#define MII_VCT7_RESULTS_INVALID 0
261#define MII_VCT7_RESULTS_OK 1
262#define MII_VCT7_RESULTS_OPEN 2
263#define MII_VCT7_RESULTS_SAME_SHORT 3
264#define MII_VCT7_RESULTS_CROSS_SHORT 4
265#define MII_VCT7_RESULTS_BUSY 9
266
267#define MII_VCT7_CTRL 0x15
268#define MII_VCT7_CTRL_RUN_NOW BIT(15)
269#define MII_VCT7_CTRL_RUN_ANEG BIT(14)
270#define MII_VCT7_CTRL_DISABLE_CROSS BIT(13)
271#define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12)
272#define MII_VCT7_CTRL_IN_PROGRESS BIT(11)
273#define MII_VCT7_CTRL_METERS BIT(10)
274#define MII_VCT7_CTRL_CENTIMETERS 0
275
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200276#define LPA_PAUSE_FIBER 0x180
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200277#define LPA_PAUSE_ASYM_FIBER 0x100
278
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200279#define NB_FIBER_STATS 1
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200280
Andy Fleming00db8182005-07-30 19:31:23 -0400281MODULE_DESCRIPTION("Marvell PHY driver");
282MODULE_AUTHOR("Andy Fleming");
283MODULE_LICENSE("GPL");
284
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100285struct marvell_hw_stat {
286 const char *string;
287 u8 page;
288 u8 reg;
289 u8 bits;
290};
291
292static struct marvell_hw_stat marvell_hw_stats[] = {
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200293 { "phy_receive_errors_copper", 0, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100294 { "phy_idle_errors", 0, 10, 8 },
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200295 { "phy_receive_errors_fiber", 1, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100296};
297
298struct marvell_priv {
299 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
Andrew Lunn0b046802017-01-20 01:37:49 +0100300 char *hwmon_name;
301 struct device *hwmon_dev;
Andrew Lunn0c9bcc12020-05-27 00:21:40 +0200302 bool cable_test_tdr;
Andrew Lunnf2bc8ad2020-05-27 00:21:41 +0200303 u32 first;
304 u32 last;
305 u32 step;
306 s8 pair;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100307};
308
Russell King424ca4c2018-01-02 10:58:48 +0000309static int marvell_read_page(struct phy_device *phydev)
Andrew Lunn6427bb22017-05-17 03:26:03 +0200310{
Russell King424ca4c2018-01-02 10:58:48 +0000311 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
312}
313
314static int marvell_write_page(struct phy_device *phydev, int page)
315{
316 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
Andrew Lunn6427bb22017-05-17 03:26:03 +0200317}
318
319static int marvell_set_page(struct phy_device *phydev, int page)
320{
321 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
322}
323
Andy Fleming00db8182005-07-30 19:31:23 -0400324static int marvell_ack_interrupt(struct phy_device *phydev)
325{
326 int err;
327
328 /* Clear the interrupts by reading the reg */
329 err = phy_read(phydev, MII_M1011_IEVENT);
330
331 if (err < 0)
332 return err;
333
334 return 0;
335}
336
337static int marvell_config_intr(struct phy_device *phydev)
338{
339 int err;
340
Ioana Ciornei1f6d0f22020-11-13 18:52:14 +0200341 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
342 err = marvell_ack_interrupt(phydev);
343 if (err)
344 return err;
345
Andrew Lunn23beb382017-05-17 03:26:04 +0200346 err = phy_write(phydev, MII_M1011_IMASK,
347 MII_M1011_IMASK_INIT);
Ioana Ciornei1f6d0f22020-11-13 18:52:14 +0200348 } else {
Andrew Lunn23beb382017-05-17 03:26:04 +0200349 err = phy_write(phydev, MII_M1011_IMASK,
350 MII_M1011_IMASK_CLEAR);
Ioana Ciornei1f6d0f22020-11-13 18:52:14 +0200351 if (err)
352 return err;
353
354 err = marvell_ack_interrupt(phydev);
355 }
Andy Fleming00db8182005-07-30 19:31:23 -0400356
357 return err;
358}
359
Ioana Ciorneia0723b32020-11-13 18:52:13 +0200360static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
361{
362 int irq_status;
363
364 irq_status = phy_read(phydev, MII_M1011_IEVENT);
365 if (irq_status < 0) {
366 phy_error(phydev);
367 return IRQ_NONE;
368 }
369
370 if (!(irq_status & MII_M1011_IMASK_INIT))
371 return IRQ_NONE;
372
373 phy_trigger_machine(phydev);
374
375 return IRQ_HANDLED;
376}
377
David Thomson239aa552015-07-10 16:28:25 +1200378static int marvell_set_polarity(struct phy_device *phydev, int polarity)
379{
Russell Kingfeb938f2021-06-03 14:01:10 +0100380 u16 val;
David Thomson239aa552015-07-10 16:28:25 +1200381
David Thomson239aa552015-07-10 16:28:25 +1200382 switch (polarity) {
383 case ETH_TP_MDI:
Russell Kingfeb938f2021-06-03 14:01:10 +0100384 val = MII_M1011_PHY_SCR_MDI;
David Thomson239aa552015-07-10 16:28:25 +1200385 break;
386 case ETH_TP_MDI_X:
Russell Kingfeb938f2021-06-03 14:01:10 +0100387 val = MII_M1011_PHY_SCR_MDI_X;
David Thomson239aa552015-07-10 16:28:25 +1200388 break;
389 case ETH_TP_MDI_AUTO:
390 case ETH_TP_MDI_INVALID:
391 default:
Russell Kingfeb938f2021-06-03 14:01:10 +0100392 val = MII_M1011_PHY_SCR_AUTO_CROSS;
David Thomson239aa552015-07-10 16:28:25 +1200393 break;
394 }
395
Russell Kingfeb938f2021-06-03 14:01:10 +0100396 return phy_modify_changed(phydev, MII_M1011_PHY_SCR,
397 MII_M1011_PHY_SCR_AUTO_CROSS, val);
David Thomson239aa552015-07-10 16:28:25 +1200398}
399
Andy Fleming00db8182005-07-30 19:31:23 -0400400static int marvell_config_aneg(struct phy_device *phydev)
401{
Florian Fainellid6ab9332018-09-25 11:28:46 -0700402 int changed = 0;
Andy Fleming00db8182005-07-30 19:31:23 -0400403 int err;
404
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530405 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Andy Fleming76884672007-02-09 18:13:58 -0600406 if (err < 0)
407 return err;
408
Florian Fainellid6ab9332018-09-25 11:28:46 -0700409 changed = err;
410
Andy Fleming76884672007-02-09 18:13:58 -0600411 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
412 MII_M1111_PHY_LED_DIRECT);
413 if (err < 0)
414 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400415
416 err = genphy_config_aneg(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000417 if (err < 0)
418 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400419
Florian Fainellid6ab9332018-09-25 11:28:46 -0700420 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200421 /* A write to speed/duplex bits (that is performed by
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000422 * genphy_config_aneg() call above) must be followed by
423 * a software reset. Otherwise, the write has no effect.
424 */
Andrew Lunn34386342017-07-30 22:41:45 +0200425 err = genphy_soft_reset(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000426 if (err < 0)
427 return err;
428 }
429
430 return 0;
Andy Fleming00db8182005-07-30 19:31:23 -0400431}
432
Andrew Lunnf2899782017-05-23 17:49:13 +0200433static int m88e1101_config_aneg(struct phy_device *phydev)
434{
435 int err;
436
437 /* This Marvell PHY has an errata which requires
438 * that certain registers get written in order
439 * to restart autonegotiation
440 */
Andrew Lunn34386342017-07-30 22:41:45 +0200441 err = genphy_soft_reset(phydev);
Andrew Lunnf2899782017-05-23 17:49:13 +0200442 if (err < 0)
443 return err;
444
445 err = phy_write(phydev, 0x1d, 0x1f);
446 if (err < 0)
447 return err;
448
449 err = phy_write(phydev, 0x1e, 0x200c);
450 if (err < 0)
451 return err;
452
453 err = phy_write(phydev, 0x1d, 0x5);
454 if (err < 0)
455 return err;
456
457 err = phy_write(phydev, 0x1e, 0);
458 if (err < 0)
459 return err;
460
461 err = phy_write(phydev, 0x1e, 0x100);
462 if (err < 0)
463 return err;
464
465 return marvell_config_aneg(phydev);
466}
467
Dan Murphy5cd119d2020-06-05 09:01:06 -0500468#if IS_ENABLED(CONFIG_OF_MDIO)
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200469/* Set and/or override some configuration registers based on the
David Daneycf41a512010-11-19 12:13:18 +0000470 * marvell,reg-init property stored in the of_node for the phydev.
471 *
472 * marvell,reg-init = <reg-page reg mask value>,...;
473 *
474 * There may be one or more sets of <reg-page reg mask value>:
475 *
476 * reg-page: which register bank to use.
477 * reg: the register.
478 * mask: if non-zero, ANDed with existing register value.
479 * value: ORed with the masked value and written to the regiser.
480 *
481 */
482static int marvell_of_reg_init(struct phy_device *phydev)
483{
484 const __be32 *paddr;
Russell King424ca4c2018-01-02 10:58:48 +0000485 int len, i, saved_page, current_page, ret = 0;
David Daneycf41a512010-11-19 12:13:18 +0000486
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100487 if (!phydev->mdio.dev.of_node)
David Daneycf41a512010-11-19 12:13:18 +0000488 return 0;
489
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100490 paddr = of_get_property(phydev->mdio.dev.of_node,
491 "marvell,reg-init", &len);
David Daneycf41a512010-11-19 12:13:18 +0000492 if (!paddr || len < (4 * sizeof(*paddr)))
493 return 0;
494
Russell King424ca4c2018-01-02 10:58:48 +0000495 saved_page = phy_save_page(phydev);
David Daneycf41a512010-11-19 12:13:18 +0000496 if (saved_page < 0)
Russell King424ca4c2018-01-02 10:58:48 +0000497 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000498 current_page = saved_page;
499
David Daneycf41a512010-11-19 12:13:18 +0000500 len /= sizeof(*paddr);
501 for (i = 0; i < len - 3; i += 4) {
Andrew Lunn6427bb22017-05-17 03:26:03 +0200502 u16 page = be32_to_cpup(paddr + i);
David Daneycf41a512010-11-19 12:13:18 +0000503 u16 reg = be32_to_cpup(paddr + i + 1);
504 u16 mask = be32_to_cpup(paddr + i + 2);
505 u16 val_bits = be32_to_cpup(paddr + i + 3);
506 int val;
507
Andrew Lunn6427bb22017-05-17 03:26:03 +0200508 if (page != current_page) {
509 current_page = page;
Russell King424ca4c2018-01-02 10:58:48 +0000510 ret = marvell_write_page(phydev, page);
David Daneycf41a512010-11-19 12:13:18 +0000511 if (ret < 0)
512 goto err;
513 }
514
515 val = 0;
516 if (mask) {
Russell King424ca4c2018-01-02 10:58:48 +0000517 val = __phy_read(phydev, reg);
David Daneycf41a512010-11-19 12:13:18 +0000518 if (val < 0) {
519 ret = val;
520 goto err;
521 }
522 val &= mask;
523 }
524 val |= val_bits;
525
Russell King424ca4c2018-01-02 10:58:48 +0000526 ret = __phy_write(phydev, reg, val);
David Daneycf41a512010-11-19 12:13:18 +0000527 if (ret < 0)
528 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000529 }
530err:
Russell King424ca4c2018-01-02 10:58:48 +0000531 return phy_restore_page(phydev, saved_page, ret);
David Daneycf41a512010-11-19 12:13:18 +0000532}
533#else
534static int marvell_of_reg_init(struct phy_device *phydev)
535{
536 return 0;
537}
538#endif /* CONFIG_OF_MDIO */
539
Andrew Lunn864dc722017-07-30 22:41:48 +0200540static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
Sergei Poselenov140bc922009-04-07 02:01:41 +0000541{
Russell King424ca4c2018-01-02 10:58:48 +0000542 int mscr;
Andrew Lunn864dc722017-07-30 22:41:48 +0200543
544 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
Russell King424ca4c2018-01-02 10:58:48 +0000545 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
546 MII_88E1121_PHY_MSCR_TX_DELAY;
Andrew Lunn864dc722017-07-30 22:41:48 +0200547 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
Russell King424ca4c2018-01-02 10:58:48 +0000548 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
Andrew Lunn864dc722017-07-30 22:41:48 +0200549 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
Russell King424ca4c2018-01-02 10:58:48 +0000550 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
551 else
552 mscr = 0;
Andrew Lunn864dc722017-07-30 22:41:48 +0200553
Russell King424ca4c2018-01-02 10:58:48 +0000554 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
555 MII_88E1121_PHY_MSCR_REG,
556 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
Andrew Lunn864dc722017-07-30 22:41:48 +0200557}
558
559static int m88e1121_config_aneg(struct phy_device *phydev)
560{
Florian Fainellid6ab9332018-09-25 11:28:46 -0700561 int changed = 0;
Andrew Lunn864dc722017-07-30 22:41:48 +0200562 int err = 0;
563
564 if (phy_interface_is_rgmii(phydev)) {
565 err = m88e1121_config_aneg_rgmii_delays(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000566 if (err < 0)
Andrew Lunn864dc722017-07-30 22:41:48 +0200567 return err;
568 }
569
Andrew Lunnfecd5e92017-07-30 22:41:49 +0200570 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000571 if (err < 0)
572 return err;
573
Florian Fainellid6ab9332018-09-25 11:28:46 -0700574 changed = err;
575
576 err = genphy_config_aneg(phydev);
577 if (err < 0)
578 return err;
579
David S. Miller4b1bd692018-09-25 22:41:31 -0700580 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
Florian Fainellid6ab9332018-09-25 11:28:46 -0700581 /* A software reset is used to ensure a "commit" of the
582 * changes is done.
583 */
584 err = genphy_soft_reset(phydev);
585 if (err < 0)
586 return err;
587 }
588
589 return 0;
Sergei Poselenov140bc922009-04-07 02:01:41 +0000590}
591
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700592static int m88e1318_config_aneg(struct phy_device *phydev)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700593{
Russell King424ca4c2018-01-02 10:58:48 +0000594 int err;
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700595
Russell King424ca4c2018-01-02 10:58:48 +0000596 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
597 MII_88E1318S_PHY_MSCR1_REG,
598 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700599 if (err < 0)
600 return err;
601
602 return m88e1121_config_aneg(phydev);
603}
604
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200605/**
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100606 * linkmode_adv_to_fiber_adv_t
607 * @advertise: the linkmode advertisement settings
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200608 *
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100609 * A small helper function that translates linkmode advertisement
610 * settings to phy autonegotiation advertisements for the MII_ADV
611 * register for fiber link.
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200612 */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100613static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200614{
615 u32 result = 0;
616
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100617 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
Russell King20ecf422019-12-17 13:39:42 +0000618 result |= ADVERTISE_1000XHALF;
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100619 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
Russell King20ecf422019-12-17 13:39:42 +0000620 result |= ADVERTISE_1000XFULL;
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200621
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100622 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
623 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
Russell King20ecf422019-12-17 13:39:42 +0000624 result |= ADVERTISE_1000XPSE_ASYM;
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100625 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
Russell King20ecf422019-12-17 13:39:42 +0000626 result |= ADVERTISE_1000XPAUSE;
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200627
628 return result;
629}
630
631/**
632 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
633 * @phydev: target phy_device struct
634 *
635 * Description: If auto-negotiation is enabled, we configure the
636 * advertising, and then restart auto-negotiation. If it is not
637 * enabled, then we write the BMCR. Adapted for fiber link in
638 * some Marvell's devices.
639 */
640static int marvell_config_aneg_fiber(struct phy_device *phydev)
641{
642 int changed = 0;
643 int err;
Russell King9f4bae72019-12-17 13:39:47 +0000644 u16 adv;
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200645
646 if (phydev->autoneg != AUTONEG_ENABLE)
647 return genphy_setup_forced(phydev);
648
649 /* Only allow advertising what this PHY supports */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100650 linkmode_and(phydev->advertising, phydev->advertising,
651 phydev->supported);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200652
Russell King9f4bae72019-12-17 13:39:47 +0000653 adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
654
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200655 /* Setup fiber advertisement */
Russell King9f4bae72019-12-17 13:39:47 +0000656 err = phy_modify_changed(phydev, MII_ADVERTISE,
657 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
658 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
659 adv);
660 if (err < 0)
661 return err;
662 if (err > 0)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200663 changed = 1;
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200664
Russell Kingb5abac22019-12-17 13:39:52 +0000665 return genphy_check_and_restart_aneg(phydev, changed);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200666}
667
Robert Hancock18870232020-10-28 11:15:40 -0600668static int m88e1111_config_aneg(struct phy_device *phydev)
669{
670 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
671 int err;
672
673 if (extsr < 0)
674 return extsr;
675
676 /* If not using SGMII or copper 1000BaseX modes, use normal process.
677 * Steps below are only required for these modes.
678 */
679 if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
680 (extsr & MII_M1111_HWCFG_MODE_MASK) !=
681 MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
682 return marvell_config_aneg(phydev);
683
684 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
685 if (err < 0)
686 goto error;
687
688 /* Configure the copper link first */
689 err = marvell_config_aneg(phydev);
690 if (err < 0)
691 goto error;
692
Robert Hancock18870232020-10-28 11:15:40 -0600693 /* Then the fiber link */
694 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
695 if (err < 0)
696 goto error;
697
Robert Hancock06b334f2021-02-16 14:53:30 -0600698 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
699 /* Do not touch the fiber advertisement if we're in copper->sgmii mode.
700 * Just ensure that SGMII-side autonegotiation is enabled.
701 * If we switched from some other mode to SGMII it may not be.
702 */
703 err = genphy_check_and_restart_aneg(phydev, false);
704 else
705 err = marvell_config_aneg_fiber(phydev);
Robert Hancock18870232020-10-28 11:15:40 -0600706 if (err < 0)
707 goto error;
708
709 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
710
711error:
712 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
713 return err;
714}
715
Michal Simek10e24caa2013-05-30 20:08:27 +0000716static int m88e1510_config_aneg(struct phy_device *phydev)
717{
718 int err;
719
Andrew Lunn52295662017-05-25 21:42:08 +0200720 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200721 if (err < 0)
722 goto error;
723
724 /* Configure the copper link first */
Michal Simek10e24caa2013-05-30 20:08:27 +0000725 err = m88e1318_config_aneg(phydev);
726 if (err < 0)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200727 goto error;
Michal Simek10e24caa2013-05-30 20:08:27 +0000728
Russell Kingde9c4e02017-12-13 09:22:03 +0000729 /* Do not touch the fiber page if we're in copper->sgmii mode */
730 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
731 return 0;
732
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200733 /* Then the fiber link */
Andrew Lunn52295662017-05-25 21:42:08 +0200734 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200735 if (err < 0)
736 goto error;
737
738 err = marvell_config_aneg_fiber(phydev);
739 if (err < 0)
740 goto error;
741
Andrew Lunn52295662017-05-25 21:42:08 +0200742 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200743
744error:
Andrew Lunn52295662017-05-25 21:42:08 +0200745 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200746 return err;
Clemens Gruber79be1a12016-02-15 23:46:45 +0100747}
748
Wang Dongsheng07777242018-07-01 23:15:46 -0700749static void marvell_config_led(struct phy_device *phydev)
750{
751 u16 def_config;
752 int err;
753
754 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
755 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
756 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
757 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
758 def_config = MII_88E1121_PHY_LED_DEF;
759 break;
760 /* Default PHY LED config:
761 * LED[0] .. 1000Mbps Link
762 * LED[1] .. 100Mbps Link
763 * LED[2] .. Blink, Activity
764 */
765 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
Jian Shena93f7fe2019-04-22 21:52:23 +0800766 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
767 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
768 else
769 def_config = MII_88E1510_PHY_LED_DEF;
Wang Dongsheng07777242018-07-01 23:15:46 -0700770 break;
771 default:
772 return;
773 }
774
775 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
776 def_config);
777 if (err < 0)
Andrew Lunnab2a6052018-09-29 23:04:10 +0200778 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
Wang Dongsheng07777242018-07-01 23:15:46 -0700779}
780
Clemens Gruber79be1a12016-02-15 23:46:45 +0100781static int marvell_config_init(struct phy_device *phydev)
782{
Bhaskar Chowdhury85bec4b2020-10-29 15:25:25 +0530783 /* Set default LED */
Wang Dongsheng07777242018-07-01 23:15:46 -0700784 marvell_config_led(phydev);
785
Clemens Gruber79be1a12016-02-15 23:46:45 +0100786 /* Set registers from marvell,reg-init DT property */
Michal Simek10e24caa2013-05-30 20:08:27 +0000787 return marvell_of_reg_init(phydev);
788}
789
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200790static int m88e3016_config_init(struct phy_device *phydev)
791{
Russell Kingfea23fb2018-01-02 10:58:58 +0000792 int ret;
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200793
794 /* Enable Scrambler and Auto-Crossover */
Russell Kingfea23fb2018-01-02 10:58:58 +0000795 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
Russell Kingf1028522018-01-05 16:07:10 +0000796 MII_88E3016_DISABLE_SCRAMBLER,
Russell Kingfea23fb2018-01-02 10:58:58 +0000797 MII_88E3016_AUTO_MDIX_CROSSOVER);
798 if (ret < 0)
799 return ret;
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200800
Clemens Gruber79be1a12016-02-15 23:46:45 +0100801 return marvell_config_init(phydev);
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200802}
803
Andrew Lunn865b813a2017-07-30 22:41:47 +0200804static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
805 u16 mode,
806 int fibre_copper_auto)
807{
Andrew Lunn865b813a2017-07-30 22:41:47 +0200808 if (fibre_copper_auto)
Russell Kingfea23fb2018-01-02 10:58:58 +0000809 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
Andrew Lunn865b813a2017-07-30 22:41:47 +0200810
Russell Kingfea23fb2018-01-02 10:58:58 +0000811 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
Russell Kingf1028522018-01-05 16:07:10 +0000812 MII_M1111_HWCFG_MODE_MASK |
813 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
814 MII_M1111_HWCFG_FIBER_COPPER_RES,
Russell Kingfea23fb2018-01-02 10:58:58 +0000815 mode);
Andrew Lunn865b813a2017-07-30 22:41:47 +0200816}
817
Andrew Lunn61111592017-07-30 22:41:46 +0200818static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
Kim Phillips895ee682007-06-05 18:46:47 +0800819{
Russell Kingfea23fb2018-01-02 10:58:58 +0000820 int delay;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200821
Weihang Li16d4d652021-06-16 18:01:26 +0800822 switch (phydev->interface) {
823 case PHY_INTERFACE_MODE_RGMII_ID:
Russell Kingfea23fb2018-01-02 10:58:58 +0000824 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
Weihang Li16d4d652021-06-16 18:01:26 +0800825 break;
826 case PHY_INTERFACE_MODE_RGMII_RXID:
Russell Kingfea23fb2018-01-02 10:58:58 +0000827 delay = MII_M1111_RGMII_RX_DELAY;
Weihang Li16d4d652021-06-16 18:01:26 +0800828 break;
829 case PHY_INTERFACE_MODE_RGMII_TXID:
Russell Kingfea23fb2018-01-02 10:58:58 +0000830 delay = MII_M1111_RGMII_TX_DELAY;
Weihang Li16d4d652021-06-16 18:01:26 +0800831 break;
832 default:
Russell Kingfea23fb2018-01-02 10:58:58 +0000833 delay = 0;
Weihang Li16d4d652021-06-16 18:01:26 +0800834 break;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200835 }
836
Russell Kingfea23fb2018-01-02 10:58:58 +0000837 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
Russell Kingf1028522018-01-05 16:07:10 +0000838 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
Russell Kingfea23fb2018-01-02 10:58:58 +0000839 delay);
Andrew Lunn61111592017-07-30 22:41:46 +0200840}
841
842static int m88e1111_config_init_rgmii(struct phy_device *phydev)
843{
844 int temp;
845 int err;
846
847 err = m88e1111_config_init_rgmii_delays(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200848 if (err < 0)
849 return err;
850
851 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
852 if (temp < 0)
853 return temp;
854
855 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
856
857 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
858 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
859 else
860 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
861
862 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
863}
864
865static int m88e1111_config_init_sgmii(struct phy_device *phydev)
866{
867 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200868
Andrew Lunn865b813a2017-07-30 22:41:47 +0200869 err = m88e1111_config_init_hwcfg_mode(
870 phydev,
871 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
872 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200873 if (err < 0)
874 return err;
875
876 /* make sure copper is selected */
Andrew Lunn52295662017-05-25 21:42:08 +0200877 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200878}
879
880static int m88e1111_config_init_rtbi(struct phy_device *phydev)
881{
Andrew Lunn61111592017-07-30 22:41:46 +0200882 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200883
Andrew Lunn61111592017-07-30 22:41:46 +0200884 err = m88e1111_config_init_rgmii_delays(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000885 if (err < 0)
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200886 return err;
887
Andrew Lunn865b813a2017-07-30 22:41:47 +0200888 err = m88e1111_config_init_hwcfg_mode(
889 phydev,
890 MII_M1111_HWCFG_MODE_RTBI,
891 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200892 if (err < 0)
893 return err;
894
895 /* soft reset */
Andrew Lunn34386342017-07-30 22:41:45 +0200896 err = genphy_soft_reset(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200897 if (err < 0)
898 return err;
899
Andrew Lunn865b813a2017-07-30 22:41:47 +0200900 return m88e1111_config_init_hwcfg_mode(
901 phydev,
902 MII_M1111_HWCFG_MODE_RTBI,
903 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200904}
905
Robert Hancock18870232020-10-28 11:15:40 -0600906static int m88e1111_config_init_1000basex(struct phy_device *phydev)
907{
908 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
909 int err, mode;
910
911 if (extsr < 0)
912 return extsr;
913
914 /* If using copper mode, ensure 1000BaseX auto-negotiation is enabled */
915 mode = extsr & MII_M1111_HWCFG_MODE_MASK;
916 if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
917 err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
918 MII_M1111_HWCFG_MODE_MASK |
919 MII_M1111_HWCFG_SERIAL_AN_BYPASS,
920 MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
921 MII_M1111_HWCFG_SERIAL_AN_BYPASS);
922 if (err < 0)
923 return err;
924 }
925 return 0;
926}
927
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200928static int m88e1111_config_init(struct phy_device *phydev)
929{
930 int err;
931
Florian Fainelli32a64162015-05-26 12:19:59 -0700932 if (phy_interface_is_rgmii(phydev)) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200933 err = m88e1111_config_init_rgmii(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000934 if (err < 0)
Kim Phillips895ee682007-06-05 18:46:47 +0800935 return err;
936 }
937
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500938 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200939 err = m88e1111_config_init_sgmii(phydev);
Madalin Bucur07151bc2015-08-07 17:07:50 +0800940 if (err < 0)
941 return err;
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500942 }
943
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000944 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200945 err = m88e1111_config_init_rtbi(phydev);
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000946 if (err < 0)
947 return err;
948 }
949
Robert Hancock18870232020-10-28 11:15:40 -0600950 if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
951 err = m88e1111_config_init_1000basex(phydev);
952 if (err < 0)
953 return err;
954 }
955
David Daneycf41a512010-11-19 12:13:18 +0000956 err = marvell_of_reg_init(phydev);
957 if (err < 0)
958 return err;
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000959
Andrew Lunn34386342017-07-30 22:41:45 +0200960 return genphy_soft_reset(phydev);
Kim Phillips895ee682007-06-05 18:46:47 +0800961}
962
Heiner Kallweit5c6bc512019-10-28 20:53:25 +0100963static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
964{
965 int val, cnt, enable;
966
967 val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
968 if (val < 0)
969 return val;
970
971 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
972 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
973
974 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
975
976 return 0;
977}
978
979static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
980{
Maxim Kochetkove7679c52021-04-22 13:46:44 +0300981 int val, err;
Heiner Kallweit5c6bc512019-10-28 20:53:25 +0100982
983 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
984 return -E2BIG;
985
Maxim Kochetkove7679c52021-04-22 13:46:44 +0300986 if (!cnt) {
987 err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
988 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
989 } else {
990 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
991 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
Heiner Kallweit5c6bc512019-10-28 20:53:25 +0100992
Maxim Kochetkove7679c52021-04-22 13:46:44 +0300993 err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
994 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
995 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
996 val);
997 }
Heiner Kallweit5c6bc512019-10-28 20:53:25 +0100998
Maxim Kochetkove7679c52021-04-22 13:46:44 +0300999 if (err < 0)
1000 return err;
1001
1002 return genphy_soft_reset(phydev);
Heiner Kallweit5c6bc512019-10-28 20:53:25 +01001003}
1004
1005static int m88e1111_get_tunable(struct phy_device *phydev,
1006 struct ethtool_tunable *tuna, void *data)
1007{
1008 switch (tuna->id) {
1009 case ETHTOOL_PHY_DOWNSHIFT:
1010 return m88e1111_get_downshift(phydev, data);
1011 default:
1012 return -EOPNOTSUPP;
1013 }
1014}
1015
1016static int m88e1111_set_tunable(struct phy_device *phydev,
1017 struct ethtool_tunable *tuna, const void *data)
1018{
1019 switch (tuna->id) {
1020 case ETHTOOL_PHY_DOWNSHIFT:
1021 return m88e1111_set_downshift(phydev, *(const u8 *)data);
1022 default:
1023 return -EOPNOTSUPP;
1024 }
1025}
1026
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001027static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001028{
1029 int val, cnt, enable;
1030
1031 val = phy_read(phydev, MII_M1011_PHY_SCR);
1032 if (val < 0)
1033 return val;
1034
1035 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
Heiner Kallweitf8d975b2019-10-28 20:52:22 +01001036 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001037
1038 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1039
1040 return 0;
1041}
1042
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001043static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001044{
Maxim Kochetkov990875b2021-04-22 13:46:43 +03001045 int val, err;
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001046
1047 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
1048 return -E2BIG;
1049
Maxim Kochetkov990875b2021-04-22 13:46:43 +03001050 if (!cnt) {
1051 err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
1052 MII_M1011_PHY_SCR_DOWNSHIFT_EN);
1053 } else {
1054 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
1055 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001056
Maxim Kochetkov990875b2021-04-22 13:46:43 +03001057 err = phy_modify(phydev, MII_M1011_PHY_SCR,
1058 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
1059 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
1060 val);
1061 }
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001062
Maxim Kochetkov990875b2021-04-22 13:46:43 +03001063 if (err < 0)
1064 return err;
1065
1066 return genphy_soft_reset(phydev);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001067}
1068
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001069static int m88e1011_get_tunable(struct phy_device *phydev,
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001070 struct ethtool_tunable *tuna, void *data)
1071{
1072 switch (tuna->id) {
1073 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001074 return m88e1011_get_downshift(phydev, data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001075 default:
1076 return -EOPNOTSUPP;
1077 }
1078}
1079
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001080static int m88e1011_set_tunable(struct phy_device *phydev,
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001081 struct ethtool_tunable *tuna, const void *data)
1082{
1083 switch (tuna->id) {
1084 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001085 return m88e1011_set_downshift(phydev, *(const u8 *)data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001086 default:
1087 return -EOPNOTSUPP;
1088 }
1089}
1090
Maxim Kochetkov8385b1f2021-04-30 07:57:33 +03001091static int m88e1112_config_init(struct phy_device *phydev)
1092{
1093 int err;
1094
1095 err = m88e1011_set_downshift(phydev, 3);
1096 if (err < 0)
1097 return err;
1098
1099 return m88e1111_config_init(phydev);
1100}
1101
1102static int m88e1111gbe_config_init(struct phy_device *phydev)
1103{
1104 int err;
1105
1106 err = m88e1111_set_downshift(phydev, 3);
1107 if (err < 0)
1108 return err;
1109
1110 return m88e1111_config_init(phydev);
1111}
1112
1113static int marvell_1011gbe_config_init(struct phy_device *phydev)
1114{
1115 int err;
1116
1117 err = m88e1011_set_downshift(phydev, 3);
1118 if (err < 0)
1119 return err;
1120
1121 return marvell_config_init(phydev);
1122}
Heiner Kallweite2d861c2019-10-19 15:58:19 +02001123static int m88e1116r_config_init(struct phy_device *phydev)
1124{
1125 int err;
1126
1127 err = genphy_soft_reset(phydev);
1128 if (err < 0)
1129 return err;
1130
1131 msleep(500);
1132
1133 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1134 if (err < 0)
1135 return err;
1136
1137 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1138 if (err < 0)
1139 return err;
1140
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001141 err = m88e1011_set_downshift(phydev, 8);
Heiner Kallweite2d861c2019-10-19 15:58:19 +02001142 if (err < 0)
1143 return err;
1144
1145 if (phy_interface_is_rgmii(phydev)) {
1146 err = m88e1121_config_aneg_rgmii_delays(phydev);
1147 if (err < 0)
1148 return err;
1149 }
1150
1151 err = genphy_soft_reset(phydev);
1152 if (err < 0)
1153 return err;
1154
1155 return marvell_config_init(phydev);
1156}
1157
Esben Haabendaldd9a1222018-04-05 22:40:29 +02001158static int m88e1318_config_init(struct phy_device *phydev)
1159{
1160 if (phy_interrupt_is_valid(phydev)) {
1161 int err = phy_modify_paged(
1162 phydev, MII_MARVELL_LED_PAGE,
1163 MII_88E1318S_PHY_LED_TCR,
1164 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1165 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1166 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1167 if (err < 0)
1168 return err;
1169 }
1170
Wang Dongsheng07777242018-07-01 23:15:46 -07001171 return marvell_config_init(phydev);
Esben Haabendaldd9a1222018-04-05 22:40:29 +02001172}
1173
Clemens Gruber407353e2016-02-23 20:16:58 +01001174static int m88e1510_config_init(struct phy_device *phydev)
1175{
1176 int err;
Clemens Gruber407353e2016-02-23 20:16:58 +01001177
1178 /* SGMII-to-Copper mode initialization */
1179 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1180 /* Select page 18 */
Andrew Lunn6427bb22017-05-17 03:26:03 +02001181 err = marvell_set_page(phydev, 18);
Clemens Gruber407353e2016-02-23 20:16:58 +01001182 if (err < 0)
1183 return err;
1184
1185 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
Russell Kingfea23fb2018-01-02 10:58:58 +00001186 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
Russell Kingf1028522018-01-05 16:07:10 +00001187 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
Russell Kingfea23fb2018-01-02 10:58:58 +00001188 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
Clemens Gruber407353e2016-02-23 20:16:58 +01001189 if (err < 0)
1190 return err;
1191
1192 /* PHY reset is necessary after changing MODE[2:0] */
Yejune Deng832913c2020-11-30 18:41:35 +08001193 err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
1194 MII_88E1510_GEN_CTRL_REG_1_RESET);
Clemens Gruber407353e2016-02-23 20:16:58 +01001195 if (err < 0)
1196 return err;
1197
1198 /* Reset page selection */
Andrew Lunn52295662017-05-25 21:42:08 +02001199 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Clemens Gruber407353e2016-02-23 20:16:58 +01001200 if (err < 0)
1201 return err;
1202 }
Maxim Kochetkov8385b1f2021-04-30 07:57:33 +03001203 err = m88e1011_set_downshift(phydev, 3);
1204 if (err < 0)
1205 return err;
Clemens Gruber407353e2016-02-23 20:16:58 +01001206
Esben Haabendaldd9a1222018-04-05 22:40:29 +02001207 return m88e1318_config_init(phydev);
Clemens Gruber407353e2016-02-23 20:16:58 +01001208}
1209
Ron Madrid605f1962008-11-06 09:05:26 +00001210static int m88e1118_config_aneg(struct phy_device *phydev)
1211{
1212 int err;
1213
Andrew Lunn34386342017-07-30 22:41:45 +02001214 err = genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +00001215 if (err < 0)
1216 return err;
1217
Andrew Lunnfecd5e92017-07-30 22:41:49 +02001218 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Ron Madrid605f1962008-11-06 09:05:26 +00001219 if (err < 0)
1220 return err;
1221
1222 err = genphy_config_aneg(phydev);
1223 return 0;
1224}
1225
1226static int m88e1118_config_init(struct phy_device *phydev)
1227{
Russell King (Oracle)5b8f9702022-01-04 16:38:13 +00001228 u16 leds;
Ron Madrid605f1962008-11-06 09:05:26 +00001229 int err;
1230
Ron Madrid605f1962008-11-06 09:05:26 +00001231 /* Enable 1000 Mbit */
Russell King (Oracle)5b8f9702022-01-04 16:38:13 +00001232 err = phy_write_paged(phydev, MII_MARVELL_MSCR_PAGE,
1233 MII_88E1121_PHY_MSCR_REG, 0x1070);
Ron Madrid605f1962008-11-06 09:05:26 +00001234 if (err < 0)
1235 return err;
1236
1237 /* Adjust LED Control */
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001238 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
Russell King (Oracle)5b8f9702022-01-04 16:38:13 +00001239 leds = 0x1100;
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001240 else
Russell King (Oracle)5b8f9702022-01-04 16:38:13 +00001241 leds = 0x021e;
1242
1243 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 0x10, leds);
Ron Madrid605f1962008-11-06 09:05:26 +00001244 if (err < 0)
1245 return err;
1246
David Daneycf41a512010-11-19 12:13:18 +00001247 err = marvell_of_reg_init(phydev);
1248 if (err < 0)
1249 return err;
1250
Russell King (Oracle)5b8f9702022-01-04 16:38:13 +00001251 /* Reset page register */
Andrew Lunn52295662017-05-25 21:42:08 +02001252 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +00001253 if (err < 0)
1254 return err;
1255
Andrew Lunn34386342017-07-30 22:41:45 +02001256 return genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +00001257}
1258
David Daney90600732010-11-19 11:58:53 +00001259static int m88e1149_config_init(struct phy_device *phydev)
1260{
1261 int err;
1262
1263 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +02001264 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
David Daney90600732010-11-19 11:58:53 +00001265 if (err < 0)
1266 return err;
1267
1268 /* Enable 1000 Mbit */
1269 err = phy_write(phydev, 0x15, 0x1048);
1270 if (err < 0)
1271 return err;
1272
David Daneycf41a512010-11-19 12:13:18 +00001273 err = marvell_of_reg_init(phydev);
1274 if (err < 0)
1275 return err;
1276
David Daney90600732010-11-19 11:58:53 +00001277 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +02001278 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
David Daney90600732010-11-19 11:58:53 +00001279 if (err < 0)
1280 return err;
1281
Andrew Lunn34386342017-07-30 22:41:45 +02001282 return genphy_soft_reset(phydev);
David Daney90600732010-11-19 11:58:53 +00001283}
1284
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001285static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1286{
1287 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001288
Andrew Lunn61111592017-07-30 22:41:46 +02001289 err = m88e1111_config_init_rgmii_delays(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001290 if (err < 0)
1291 return err;
1292
1293 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1294 err = phy_write(phydev, 0x1d, 0x0012);
1295 if (err < 0)
1296 return err;
1297
Russell Kingf1028522018-01-05 16:07:10 +00001298 err = phy_modify(phydev, 0x1e, 0x0fc0,
Russell Kingfea23fb2018-01-02 10:58:58 +00001299 2 << 9 | /* 36 ohm */
1300 2 << 6); /* 39 ohm */
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001301 if (err < 0)
1302 return err;
1303
1304 err = phy_write(phydev, 0x1d, 0x3);
1305 if (err < 0)
1306 return err;
1307
1308 err = phy_write(phydev, 0x1e, 0x8000);
1309 }
1310 return err;
1311}
1312
1313static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1314{
Andrew Lunn865b813a2017-07-30 22:41:47 +02001315 return m88e1111_config_init_hwcfg_mode(
1316 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1317 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001318}
1319
Andy Fleming76884672007-02-09 18:13:58 -06001320static int m88e1145_config_init(struct phy_device *phydev)
1321{
1322 int err;
1323
1324 /* Take care of errata E0 & E1 */
1325 err = phy_write(phydev, 0x1d, 0x001b);
1326 if (err < 0)
1327 return err;
1328
1329 err = phy_write(phydev, 0x1e, 0x418f);
1330 if (err < 0)
1331 return err;
1332
1333 err = phy_write(phydev, 0x1d, 0x0016);
1334 if (err < 0)
1335 return err;
1336
1337 err = phy_write(phydev, 0x1e, 0xa2da);
1338 if (err < 0)
1339 return err;
1340
Kim Phillips895ee682007-06-05 18:46:47 +08001341 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001342 err = m88e1145_config_init_rgmii(phydev);
Andy Fleming76884672007-02-09 18:13:58 -06001343 if (err < 0)
1344 return err;
Andy Fleming76884672007-02-09 18:13:58 -06001345 }
1346
Viet Nga Daob0224172014-10-23 19:41:53 -07001347 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001348 err = m88e1145_config_init_sgmii(phydev);
Viet Nga Daob0224172014-10-23 19:41:53 -07001349 if (err < 0)
1350 return err;
1351 }
Maxim Kochetkov8385b1f2021-04-30 07:57:33 +03001352 err = m88e1111_set_downshift(phydev, 3);
1353 if (err < 0)
1354 return err;
Viet Nga Daob0224172014-10-23 19:41:53 -07001355
David Daneycf41a512010-11-19 12:13:18 +00001356 err = marvell_of_reg_init(phydev);
1357 if (err < 0)
1358 return err;
1359
Andy Fleming76884672007-02-09 18:13:58 -06001360 return 0;
1361}
Andy Fleming00db8182005-07-30 19:31:23 -04001362
Heiner Kallweit69f42be2019-03-25 19:35:41 +01001363static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1364{
1365 int val;
1366
1367 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1368 if (val < 0)
1369 return val;
1370
1371 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1372 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1373 return 0;
1374 }
1375
1376 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1377
1378 switch (val) {
1379 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1380 *msecs = 0;
1381 break;
1382 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1383 *msecs = 10;
1384 break;
1385 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1386 *msecs = 20;
1387 break;
1388 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1389 *msecs = 40;
1390 break;
1391 default:
1392 return -EINVAL;
1393 }
1394
1395 return 0;
1396}
1397
1398static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1399{
1400 struct ethtool_eee eee;
1401 int val, ret;
1402
1403 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1404 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1405 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1406
1407 /* According to the Marvell data sheet EEE must be disabled for
1408 * Fast Link Down detection to work properly
1409 */
1410 ret = phy_ethtool_get_eee(phydev, &eee);
1411 if (!ret && eee.eee_enabled) {
1412 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1413 return -EBUSY;
1414 }
1415
1416 if (*msecs <= 5)
1417 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1418 else if (*msecs <= 15)
1419 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1420 else if (*msecs <= 30)
1421 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1422 else
1423 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1424
1425 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1426
1427 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1428 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1429 if (ret)
1430 return ret;
1431
1432 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1433 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1434}
1435
1436static int m88e1540_get_tunable(struct phy_device *phydev,
1437 struct ethtool_tunable *tuna, void *data)
1438{
1439 switch (tuna->id) {
1440 case ETHTOOL_PHY_FAST_LINK_DOWN:
1441 return m88e1540_get_fld(phydev, data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001442 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001443 return m88e1011_get_downshift(phydev, data);
Heiner Kallweit69f42be2019-03-25 19:35:41 +01001444 default:
1445 return -EOPNOTSUPP;
1446 }
1447}
1448
1449static int m88e1540_set_tunable(struct phy_device *phydev,
1450 struct ethtool_tunable *tuna, const void *data)
1451{
1452 switch (tuna->id) {
1453 case ETHTOOL_PHY_FAST_LINK_DOWN:
1454 return m88e1540_set_fld(phydev, data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001455 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001456 return m88e1011_set_downshift(phydev, *(const u8 *)data);
Heiner Kallweit69f42be2019-03-25 19:35:41 +01001457 default:
1458 return -EOPNOTSUPP;
1459 }
1460}
1461
Andrew Lunn8cbcdc12019-01-10 22:48:36 +01001462/* The VOD can be out of specification on link up. Poke an
1463 * undocumented register, in an undocumented page, with a magic value
1464 * to fix this.
1465 */
1466static int m88e6390_errata(struct phy_device *phydev)
1467{
1468 int err;
1469
1470 err = phy_write(phydev, MII_BMCR,
1471 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1472 if (err)
1473 return err;
1474
1475 usleep_range(300, 400);
1476
1477 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1478 if (err)
1479 return err;
1480
1481 return genphy_soft_reset(phydev);
1482}
1483
1484static int m88e6390_config_aneg(struct phy_device *phydev)
1485{
1486 int err;
1487
1488 err = m88e6390_errata(phydev);
1489 if (err)
1490 return err;
1491
1492 return m88e1510_config_aneg(phydev);
1493}
1494
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001495/**
Andrew Lunnab9cb722018-12-05 21:49:42 +01001496 * fiber_lpa_mod_linkmode_lpa_t
Andrew Lunnc0ec3c22018-11-10 23:43:34 +01001497 * @advertising: the linkmode advertisement settings
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001498 * @lpa: value of the MII_LPA register for fiber link
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001499 *
Andrew Lunnab9cb722018-12-05 21:49:42 +01001500 * A small helper function that translates MII_LPA bits to linkmode LP
1501 * advertisement settings. Other bits in advertising are left
1502 * unchanged.
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001503 */
Andrew Lunnab9cb722018-12-05 21:49:42 +01001504static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001505{
Andrew Lunnab9cb722018-12-05 21:49:42 +01001506 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
Russell King20ecf422019-12-17 13:39:42 +00001507 advertising, lpa & LPA_1000XHALF);
Andrew Lunnab9cb722018-12-05 21:49:42 +01001508
1509 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
Russell King20ecf422019-12-17 13:39:42 +00001510 advertising, lpa & LPA_1000XFULL);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001511}
1512
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001513static int marvell_read_status_page_an(struct phy_device *phydev,
Russell Kingd2004e22019-12-17 13:39:36 +00001514 int fiber, int status)
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001515{
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001516 int lpa;
Russell Kingfcf1f592019-12-17 13:39:21 +00001517 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001518
Clemens Gruber3b72f842020-04-11 18:51:25 +02001519 if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
1520 phydev->link = 0;
1521 return 0;
1522 }
1523
1524 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1525 phydev->duplex = DUPLEX_FULL;
1526 else
1527 phydev->duplex = DUPLEX_HALF;
1528
1529 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1530 case MII_M1011_PHY_STATUS_1000:
1531 phydev->speed = SPEED_1000;
1532 break;
1533
1534 case MII_M1011_PHY_STATUS_100:
1535 phydev->speed = SPEED_100;
1536 break;
1537
1538 default:
1539 phydev->speed = SPEED_10;
1540 break;
1541 }
1542
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001543 if (!fiber) {
Russell Kingfcf1f592019-12-17 13:39:21 +00001544 err = genphy_read_lpa(phydev);
1545 if (err < 0)
1546 return err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001547
Russell Kingaf006242019-12-17 13:39:06 +00001548 phy_resolve_aneg_pause(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001549 } else {
Russell Kingfcf1f592019-12-17 13:39:21 +00001550 lpa = phy_read(phydev, MII_LPA);
1551 if (lpa < 0)
1552 return lpa;
1553
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001554 /* The fiber link is only 1000M capable */
Andrew Lunnab9cb722018-12-05 21:49:42 +01001555 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001556
1557 if (phydev->duplex == DUPLEX_FULL) {
1558 if (!(lpa & LPA_PAUSE_FIBER)) {
1559 phydev->pause = 0;
1560 phydev->asym_pause = 0;
1561 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1562 phydev->pause = 1;
1563 phydev->asym_pause = 1;
1564 } else {
1565 phydev->pause = 1;
1566 phydev->asym_pause = 0;
1567 }
1568 }
1569 }
Russell Kingfcf1f592019-12-17 13:39:21 +00001570
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001571 return 0;
1572}
1573
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001574/* marvell_read_status_page
1575 *
Jeff Garzikf0c88f92008-03-25 23:53:24 -04001576 * Description:
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001577 * Check the link, then figure out the current state
1578 * by comparing what we advertise with what the link partner
1579 * advertises. Start by checking the gigabit possibilities,
1580 * then move on to 10/100.
1581 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001582static int marvell_read_status_page(struct phy_device *phydev, int page)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001583{
Russell Kingd2004e22019-12-17 13:39:36 +00001584 int status;
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001585 int fiber;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001586 int err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001587
Russell Kingd2004e22019-12-17 13:39:36 +00001588 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1589 if (status < 0)
1590 return status;
1591
1592 /* Use the generic register for copper link status,
1593 * and the PHY status register for fiber link status.
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001594 */
Russell Kingd2004e22019-12-17 13:39:36 +00001595 if (page == MII_MARVELL_FIBER_PAGE) {
1596 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1597 } else {
1598 err = genphy_update_link(phydev);
1599 if (err)
1600 return err;
1601 }
1602
Andrew Lunn52295662017-05-25 21:42:08 +02001603 if (page == MII_MARVELL_FIBER_PAGE)
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001604 fiber = 1;
1605 else
1606 fiber = 0;
1607
Russell King98f92832019-12-17 13:39:26 +00001608 linkmode_zero(phydev->lp_advertising);
1609 phydev->pause = 0;
1610 phydev->asym_pause = 0;
Russell Kingb82cf172020-02-27 09:44:49 +00001611 phydev->speed = SPEED_UNKNOWN;
1612 phydev->duplex = DUPLEX_UNKNOWN;
Michael Walle4217a642021-02-09 17:38:52 +01001613 phydev->port = fiber ? PORT_FIBRE : PORT_TP;
Russell King98f92832019-12-17 13:39:26 +00001614
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001615 if (phydev->autoneg == AUTONEG_ENABLE)
Russell Kingd2004e22019-12-17 13:39:36 +00001616 err = marvell_read_status_page_an(phydev, fiber, status);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001617 else
Russell King98f92832019-12-17 13:39:26 +00001618 err = genphy_read_status_fixed(phydev);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001619
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001620 return err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001621}
1622
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001623/* marvell_read_status
1624 *
1625 * Some Marvell's phys have two modes: fiber and copper.
1626 * Both need status checked.
1627 * Description:
1628 * First, check the fiber link and status.
1629 * If the fiber link is down, check the copper link and status which
1630 * will be the default value if both link are down.
1631 */
1632static int marvell_read_status(struct phy_device *phydev)
1633{
1634 int err;
1635
1636 /* Check the fiber mode first */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001637 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1638 phydev->supported) &&
Russell Kinga13c06522017-01-10 23:13:45 +00001639 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
Andrew Lunn52295662017-05-25 21:42:08 +02001640 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001641 if (err < 0)
1642 goto error;
1643
Andrew Lunn52295662017-05-25 21:42:08 +02001644 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001645 if (err < 0)
1646 goto error;
1647
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001648 /* If the fiber link is up, it is the selected and
1649 * used link. In this case, we need to stay in the
1650 * fiber page. Please to be careful about that, avoid
1651 * to restore Copper page in other functions which
1652 * could break the behaviour for some fiber phy like
1653 * 88E1512.
1654 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001655 if (phydev->link)
1656 return 0;
1657
1658 /* If fiber link is down, check and save copper mode state */
Andrew Lunn52295662017-05-25 21:42:08 +02001659 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001660 if (err < 0)
1661 goto error;
1662 }
1663
Andrew Lunn52295662017-05-25 21:42:08 +02001664 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001665
1666error:
Andrew Lunn52295662017-05-25 21:42:08 +02001667 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001668 return err;
1669}
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001670
1671/* marvell_suspend
1672 *
1673 * Some Marvell's phys have two modes: fiber and copper.
1674 * Both need to be suspended
1675 */
1676static int marvell_suspend(struct phy_device *phydev)
1677{
1678 int err;
1679
1680 /* Suspend the fiber mode first */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001681 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1682 phydev->supported)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001683 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001684 if (err < 0)
1685 goto error;
1686
1687 /* With the page set, use the generic suspend */
1688 err = genphy_suspend(phydev);
1689 if (err < 0)
1690 goto error;
1691
1692 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001693 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001694 if (err < 0)
1695 goto error;
1696 }
1697
1698 /* With the page set, use the generic suspend */
1699 return genphy_suspend(phydev);
1700
1701error:
Andrew Lunn52295662017-05-25 21:42:08 +02001702 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001703 return err;
1704}
1705
1706/* marvell_resume
1707 *
1708 * Some Marvell's phys have two modes: fiber and copper.
1709 * Both need to be resumed
1710 */
1711static int marvell_resume(struct phy_device *phydev)
1712{
1713 int err;
1714
1715 /* Resume the fiber mode first */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001716 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1717 phydev->supported)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001718 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001719 if (err < 0)
1720 goto error;
1721
1722 /* With the page set, use the generic resume */
1723 err = genphy_resume(phydev);
1724 if (err < 0)
1725 goto error;
1726
1727 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001728 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001729 if (err < 0)
1730 goto error;
1731 }
1732
1733 /* With the page set, use the generic resume */
1734 return genphy_resume(phydev);
1735
1736error:
Andrew Lunn52295662017-05-25 21:42:08 +02001737 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001738 return err;
1739}
1740
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001741static int marvell_aneg_done(struct phy_device *phydev)
1742{
1743 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
Andrew Lunne69d9ed2017-05-17 03:26:00 +02001744
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001745 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1746}
1747
Andrew Lunn23beb382017-05-17 03:26:04 +02001748static void m88e1318_get_wol(struct phy_device *phydev,
1749 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001750{
Jisheng Zhangf4f9dcc2020-10-05 17:19:50 +08001751 int ret;
Russell King424ca4c2018-01-02 10:58:48 +00001752
Song Yoong Siang61646592021-08-13 16:45:08 +08001753 wol->supported = WAKE_MAGIC | WAKE_PHY;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001754 wol->wolopts = 0;
1755
Jisheng Zhangf4f9dcc2020-10-05 17:19:50 +08001756 ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
1757 MII_88E1318S_PHY_WOL_CTRL);
Song Yoong Siang61646592021-08-13 16:45:08 +08001758 if (ret < 0)
1759 return;
1760
1761 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001762 wol->wolopts |= WAKE_MAGIC;
Song Yoong Siang61646592021-08-13 16:45:08 +08001763
1764 if (ret & MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE)
1765 wol->wolopts |= WAKE_PHY;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001766}
1767
Andrew Lunn23beb382017-05-17 03:26:04 +02001768static int m88e1318_set_wol(struct phy_device *phydev,
1769 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001770{
Russell King424ca4c2018-01-02 10:58:48 +00001771 int err = 0, oldpage;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001772
Russell King424ca4c2018-01-02 10:58:48 +00001773 oldpage = phy_save_page(phydev);
1774 if (oldpage < 0)
1775 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001776
Song Yoong Siang61646592021-08-13 16:45:08 +08001777 if (wol->wolopts & (WAKE_MAGIC | WAKE_PHY)) {
Michael Stapelberg3871c382013-03-11 13:56:45 +00001778 /* Explicitly switch to page 0x00, just to be sure */
Russell King424ca4c2018-01-02 10:58:48 +00001779 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001780 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001781 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001782
Jingju Houb6a930f2018-04-23 15:22:49 +08001783 /* If WOL event happened once, the LED[2] interrupt pin
1784 * will not be cleared unless we reading the interrupt status
1785 * register. If interrupts are in use, the normal interrupt
1786 * handling will clear the WOL event. Clear the WOL event
1787 * before enabling it if !phy_interrupt_is_valid()
1788 */
1789 if (!phy_interrupt_is_valid(phydev))
Andrew Lunne0a73282019-01-11 00:15:21 +01001790 __phy_read(phydev, MII_M1011_IEVENT);
Jingju Houb6a930f2018-04-23 15:22:49 +08001791
Michael Stapelberg3871c382013-03-11 13:56:45 +00001792 /* Enable the WOL interrupt */
Yejune Deng832913c2020-11-30 18:41:35 +08001793 err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
1794 MII_88E1318S_PHY_CSIER_WOL_EIE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001795 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001796 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001797
Russell King424ca4c2018-01-02 10:58:48 +00001798 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001799 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001800 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001801
1802 /* Setup LED[2] as interrupt pin (active low) */
Russell King424ca4c2018-01-02 10:58:48 +00001803 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
Russell Kingf1028522018-01-05 16:07:10 +00001804 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
Russell King424ca4c2018-01-02 10:58:48 +00001805 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1806 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001807 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001808 goto error;
Song Yoong Siang61646592021-08-13 16:45:08 +08001809 }
Michael Stapelberg3871c382013-03-11 13:56:45 +00001810
Song Yoong Siang61646592021-08-13 16:45:08 +08001811 if (wol->wolopts & WAKE_MAGIC) {
Russell King424ca4c2018-01-02 10:58:48 +00001812 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001813 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001814 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001815
1816 /* Store the device address for the magic packet */
Russell King424ca4c2018-01-02 10:58:48 +00001817 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001818 ((phydev->attached_dev->dev_addr[5] << 8) |
1819 phydev->attached_dev->dev_addr[4]));
1820 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001821 goto error;
1822 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001823 ((phydev->attached_dev->dev_addr[3] << 8) |
1824 phydev->attached_dev->dev_addr[2]));
1825 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001826 goto error;
1827 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001828 ((phydev->attached_dev->dev_addr[1] << 8) |
1829 phydev->attached_dev->dev_addr[0]));
1830 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001831 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001832
1833 /* Clear WOL status and enable magic packet matching */
Yejune Deng832913c2020-11-30 18:41:35 +08001834 err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
1835 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1836 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001837 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001838 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001839 } else {
Russell King424ca4c2018-01-02 10:58:48 +00001840 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001841 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001842 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001843
1844 /* Clear WOL status and disable magic packet matching */
Russell King424ca4c2018-01-02 10:58:48 +00001845 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
Russell Kingf1028522018-01-05 16:07:10 +00001846 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
Russell King424ca4c2018-01-02 10:58:48 +00001847 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001848 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001849 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001850 }
1851
Song Yoong Siang61646592021-08-13 16:45:08 +08001852 if (wol->wolopts & WAKE_PHY) {
1853 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1854 if (err < 0)
1855 goto error;
1856
1857 /* Clear WOL status and enable link up event */
1858 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1859 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1860 MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE);
1861 if (err < 0)
1862 goto error;
1863 } else {
1864 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1865 if (err < 0)
1866 goto error;
1867
1868 /* Clear WOL status and disable link up event */
1869 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1870 MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE,
1871 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1872 if (err < 0)
1873 goto error;
1874 }
1875
Russell King424ca4c2018-01-02 10:58:48 +00001876error:
1877 return phy_restore_page(phydev, oldpage, err);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001878}
1879
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001880static int marvell_get_sset_count(struct phy_device *phydev)
1881{
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001882 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1883 phydev->supported))
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +02001884 return ARRAY_SIZE(marvell_hw_stats);
1885 else
1886 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001887}
1888
1889static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1890{
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001891 int count = marvell_get_sset_count(phydev);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001892 int i;
1893
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001894 for (i = 0; i < count; i++) {
Florian Fainelli98409b22018-03-02 15:08:37 -08001895 strlcpy(data + i * ETH_GSTRING_LEN,
1896 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001897 }
1898}
1899
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001900static u64 marvell_get_stat(struct phy_device *phydev, int i)
1901{
1902 struct marvell_hw_stat stat = marvell_hw_stats[i];
1903 struct marvell_priv *priv = phydev->priv;
Russell King424ca4c2018-01-02 10:58:48 +00001904 int val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001905 u64 ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001906
Russell King424ca4c2018-01-02 10:58:48 +00001907 val = phy_read_paged(phydev, stat.page, stat.reg);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001908 if (val < 0) {
Jisheng Zhang6c3442f2018-04-27 16:18:58 +08001909 ret = U64_MAX;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001910 } else {
1911 val = val & ((1 << stat.bits) - 1);
1912 priv->stats[i] += val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001913 ret = priv->stats[i];
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001914 }
1915
Andrew Lunn321b4d42016-02-20 00:35:29 +01001916 return ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001917}
1918
1919static void marvell_get_stats(struct phy_device *phydev,
1920 struct ethtool_stats *stats, u64 *data)
1921{
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001922 int count = marvell_get_sset_count(phydev);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001923 int i;
1924
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001925 for (i = 0; i < count; i++)
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001926 data[i] = marvell_get_stat(phydev, i);
1927}
1928
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02001929static int marvell_vct5_wait_complete(struct phy_device *phydev)
1930{
1931 int i;
1932 int val;
1933
1934 for (i = 0; i < 32; i++) {
Andrew Lunna618e86d2020-05-27 00:21:42 +02001935 val = __phy_read(phydev, MII_VCT5_CTRL);
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02001936 if (val < 0)
1937 return val;
1938
1939 if (val & MII_VCT5_CTRL_COMPLETE)
1940 return 0;
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02001941 }
1942
1943 phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
1944 return -ETIMEDOUT;
1945}
1946
1947static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
1948{
1949 int amplitude;
1950 int val;
1951 int reg;
1952
1953 reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
Andrew Lunna618e86d2020-05-27 00:21:42 +02001954 val = __phy_read(phydev, reg);
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02001955
1956 if (val < 0)
1957 return 0;
1958
1959 amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
1960 MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
1961
1962 if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
1963 amplitude = -amplitude;
1964
1965 return 1000 * amplitude / 128;
1966}
1967
1968static u32 marvell_vct5_distance2cm(int distance)
1969{
1970 return distance * 805 / 10;
1971}
1972
Andrew Lunnf2bc8ad2020-05-27 00:21:41 +02001973static u32 marvell_vct5_cm2distance(int cm)
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02001974{
Andrew Lunnf2bc8ad2020-05-27 00:21:41 +02001975 return cm * 10 / 805;
1976}
1977
1978static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
1979 int distance, int pair)
1980{
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02001981 u16 reg;
1982 int err;
Andrew Lunnf2bc8ad2020-05-27 00:21:41 +02001983 int mV;
1984 int i;
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02001985
Andrew Lunna618e86d2020-05-27 00:21:42 +02001986 err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
1987 distance);
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02001988 if (err)
1989 return err;
1990
1991 reg = MII_VCT5_CTRL_ENABLE |
1992 MII_VCT5_CTRL_TX_SAME_CHANNEL |
1993 MII_VCT5_CTRL_SAMPLES_DEFAULT |
1994 MII_VCT5_CTRL_SAMPLE_POINT |
1995 MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
Andrew Lunna618e86d2020-05-27 00:21:42 +02001996 err = __phy_write(phydev, MII_VCT5_CTRL, reg);
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02001997 if (err)
1998 return err;
1999
2000 err = marvell_vct5_wait_complete(phydev);
2001 if (err)
2002 return err;
2003
Andrew Lunnf2bc8ad2020-05-27 00:21:41 +02002004 for (i = 0; i < 4; i++) {
2005 if (pair != PHY_PAIR_ALL && i != pair)
2006 continue;
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02002007
Andrew Lunnf2bc8ad2020-05-27 00:21:41 +02002008 mV = marvell_vct5_amplitude(phydev, i);
2009 ethnl_cable_test_amplitude(phydev, i, mV);
2010 }
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02002011
2012 return 0;
2013}
2014
2015static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
2016{
Andrew Lunnf2bc8ad2020-05-27 00:21:41 +02002017 struct marvell_priv *priv = phydev->priv;
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02002018 int distance;
Andrew Lunndb8668a2020-05-27 00:21:43 +02002019 u16 width;
Andrew Lunna618e86d2020-05-27 00:21:42 +02002020 int page;
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02002021 int err;
2022 u16 reg;
2023
Andrew Lunndb8668a2020-05-27 00:21:43 +02002024 if (priv->first <= TDR_SHORT_CABLE_LENGTH)
2025 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
2026 else
2027 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2028
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02002029 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2030 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
Andrew Lunndb8668a2020-05-27 00:21:43 +02002031 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02002032
2033 err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2034 MII_VCT5_TX_PULSE_CTRL, reg);
2035 if (err)
2036 return err;
2037
Andrew Lunna618e86d2020-05-27 00:21:42 +02002038 /* Reading the TDR data is very MDIO heavy. We need to optimize
2039 * access to keep the time to a minimum. So lock the bus once,
2040 * and don't release it until complete. We can then avoid having
2041 * to change the page for every access, greatly speeding things
2042 * up.
2043 */
2044 page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
2045 if (page < 0)
Dan Carpenter830f5ce2020-05-29 13:02:07 +03002046 goto restore_page;
Andrew Lunna618e86d2020-05-27 00:21:42 +02002047
Andrew Lunnf2bc8ad2020-05-27 00:21:41 +02002048 for (distance = priv->first;
2049 distance <= priv->last;
2050 distance += priv->step) {
2051 err = marvell_vct5_amplitude_distance(phydev, distance,
2052 priv->pair);
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02002053 if (err)
Andrew Lunna618e86d2020-05-27 00:21:42 +02002054 goto restore_page;
Andrew Lunndb8668a2020-05-27 00:21:43 +02002055
2056 if (distance > TDR_SHORT_CABLE_LENGTH &&
2057 width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
2058 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2059 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2060 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2061 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2062 err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
2063 if (err)
2064 goto restore_page;
2065 }
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02002066 }
2067
Andrew Lunna618e86d2020-05-27 00:21:42 +02002068restore_page:
2069 return phy_restore_page(phydev, page, err);
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02002070}
2071
2072static int marvell_cable_test_start_common(struct phy_device *phydev)
Andrew Lunnfc879f72020-05-10 21:12:38 +02002073{
2074 int bmcr, bmsr, ret;
2075
2076 /* If auto-negotiation is enabled, but not complete, the cable
2077 * test never completes. So disable auto-neg.
2078 */
2079 bmcr = phy_read(phydev, MII_BMCR);
2080 if (bmcr < 0)
2081 return bmcr;
2082
2083 bmsr = phy_read(phydev, MII_BMSR);
2084
2085 if (bmsr < 0)
2086 return bmsr;
2087
2088 if (bmcr & BMCR_ANENABLE) {
Yejune Deng832913c2020-11-30 18:41:35 +08002089 ret = phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
Andrew Lunnfc879f72020-05-10 21:12:38 +02002090 if (ret < 0)
2091 return ret;
2092 ret = genphy_soft_reset(phydev);
2093 if (ret < 0)
2094 return ret;
2095 }
2096
2097 /* If the link is up, allow it some time to go down */
2098 if (bmsr & BMSR_LSTATUS)
2099 msleep(1500);
2100
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02002101 return 0;
2102}
2103
2104static int marvell_vct7_cable_test_start(struct phy_device *phydev)
2105{
2106 struct marvell_priv *priv = phydev->priv;
2107 int ret;
2108
2109 ret = marvell_cable_test_start_common(phydev);
2110 if (ret)
2111 return ret;
2112
2113 priv->cable_test_tdr = false;
2114
2115 /* Reset the VCT5 API control to defaults, otherwise
2116 * VCT7 does not work correctly.
2117 */
2118 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2119 MII_VCT5_CTRL,
2120 MII_VCT5_CTRL_TX_SAME_CHANNEL |
2121 MII_VCT5_CTRL_SAMPLES_DEFAULT |
2122 MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
2123 MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
2124 if (ret)
2125 return ret;
2126
2127 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2128 MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
2129 if (ret)
2130 return ret;
2131
Andrew Lunnfc879f72020-05-10 21:12:38 +02002132 return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2133 MII_VCT7_CTRL,
2134 MII_VCT7_CTRL_RUN_NOW |
2135 MII_VCT7_CTRL_CENTIMETERS);
2136}
2137
Andrew Lunnf2bc8ad2020-05-27 00:21:41 +02002138static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
2139 const struct phy_tdr_config *cfg)
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02002140{
2141 struct marvell_priv *priv = phydev->priv;
2142 int ret;
2143
Andrew Lunnf2bc8ad2020-05-27 00:21:41 +02002144 priv->cable_test_tdr = true;
2145 priv->first = marvell_vct5_cm2distance(cfg->first);
2146 priv->last = marvell_vct5_cm2distance(cfg->last);
2147 priv->step = marvell_vct5_cm2distance(cfg->step);
2148 priv->pair = cfg->pair;
2149
2150 if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2151 return -EINVAL;
2152
2153 if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2154 return -EINVAL;
2155
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02002156 /* Disable VCT7 */
2157 ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2158 MII_VCT7_CTRL, 0);
2159 if (ret)
2160 return ret;
2161
2162 ret = marvell_cable_test_start_common(phydev);
2163 if (ret)
2164 return ret;
2165
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02002166 ret = ethnl_cable_test_pulse(phydev, 1000);
2167 if (ret)
2168 return ret;
2169
2170 return ethnl_cable_test_step(phydev,
Andrew Lunnf2bc8ad2020-05-27 00:21:41 +02002171 marvell_vct5_distance2cm(priv->first),
2172 marvell_vct5_distance2cm(priv->last),
2173 marvell_vct5_distance2cm(priv->step));
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02002174}
2175
Andrew Lunnfc879f72020-05-10 21:12:38 +02002176static int marvell_vct7_distance_to_length(int distance, bool meter)
2177{
2178 if (meter)
2179 distance *= 100;
2180
2181 return distance;
2182}
2183
2184static bool marvell_vct7_distance_valid(int result)
2185{
2186 switch (result) {
2187 case MII_VCT7_RESULTS_OPEN:
2188 case MII_VCT7_RESULTS_SAME_SHORT:
2189 case MII_VCT7_RESULTS_CROSS_SHORT:
2190 return true;
2191 }
2192 return false;
2193}
2194
2195static int marvell_vct7_report_length(struct phy_device *phydev,
2196 int pair, bool meter)
2197{
2198 int length;
2199 int ret;
2200
2201 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2202 MII_VCT7_PAIR_0_DISTANCE + pair);
2203 if (ret < 0)
2204 return ret;
2205
2206 length = marvell_vct7_distance_to_length(ret, meter);
2207
2208 ethnl_cable_test_fault_length(phydev, pair, length);
2209
2210 return 0;
2211}
2212
2213static int marvell_vct7_cable_test_report_trans(int result)
2214{
2215 switch (result) {
2216 case MII_VCT7_RESULTS_OK:
2217 return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2218 case MII_VCT7_RESULTS_OPEN:
2219 return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2220 case MII_VCT7_RESULTS_SAME_SHORT:
2221 return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2222 case MII_VCT7_RESULTS_CROSS_SHORT:
2223 return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2224 default:
2225 return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2226 }
2227}
2228
2229static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2230{
2231 int pair0, pair1, pair2, pair3;
2232 bool meter;
2233 int ret;
2234
2235 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2236 MII_VCT7_RESULTS);
2237 if (ret < 0)
2238 return ret;
2239
2240 pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2241 MII_VCT7_RESULTS_PAIR3_SHIFT;
2242 pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2243 MII_VCT7_RESULTS_PAIR2_SHIFT;
2244 pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2245 MII_VCT7_RESULTS_PAIR1_SHIFT;
2246 pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2247 MII_VCT7_RESULTS_PAIR0_SHIFT;
2248
2249 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2250 marvell_vct7_cable_test_report_trans(pair0));
2251 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2252 marvell_vct7_cable_test_report_trans(pair1));
2253 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
2254 marvell_vct7_cable_test_report_trans(pair2));
2255 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
2256 marvell_vct7_cable_test_report_trans(pair3));
2257
2258 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2259 if (ret < 0)
2260 return ret;
2261
2262 meter = ret & MII_VCT7_CTRL_METERS;
2263
2264 if (marvell_vct7_distance_valid(pair0))
2265 marvell_vct7_report_length(phydev, 0, meter);
2266 if (marvell_vct7_distance_valid(pair1))
2267 marvell_vct7_report_length(phydev, 1, meter);
2268 if (marvell_vct7_distance_valid(pair2))
2269 marvell_vct7_report_length(phydev, 2, meter);
2270 if (marvell_vct7_distance_valid(pair3))
2271 marvell_vct7_report_length(phydev, 3, meter);
2272
2273 return 0;
2274}
2275
2276static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2277 bool *finished)
2278{
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02002279 struct marvell_priv *priv = phydev->priv;
Andrew Lunnfc879f72020-05-10 21:12:38 +02002280 int ret;
2281
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02002282 if (priv->cable_test_tdr) {
2283 ret = marvell_vct5_amplitude_graph(phydev);
2284 *finished = true;
2285 return ret;
2286 }
2287
Andrew Lunnfc879f72020-05-10 21:12:38 +02002288 *finished = false;
2289
2290 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2291 MII_VCT7_CTRL);
2292
2293 if (ret < 0)
2294 return ret;
2295
2296 if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2297 *finished = true;
2298
2299 return marvell_vct7_cable_test_report(phydev);
2300 }
2301
2302 return 0;
2303}
2304
Andrew Lunn0b046802017-01-20 01:37:49 +01002305#ifdef CONFIG_HWMON
Marek Behún41d26bf2021-04-20 09:53:59 +02002306struct marvell_hwmon_ops {
Marek Behúna978f7c2021-04-20 09:54:03 +02002307 int (*config)(struct phy_device *phydev);
Marek Behún41d26bf2021-04-20 09:53:59 +02002308 int (*get_temp)(struct phy_device *phydev, long *temp);
2309 int (*get_temp_critical)(struct phy_device *phydev, long *temp);
2310 int (*set_temp_critical)(struct phy_device *phydev, long temp);
2311 int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
2312};
2313
2314static const struct marvell_hwmon_ops *
2315to_marvell_hwmon_ops(const struct phy_device *phydev)
2316{
2317 return phydev->drv->driver_data;
2318}
2319
Andrew Lunn0b046802017-01-20 01:37:49 +01002320static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
2321{
Andrew Lunn975b3882017-05-25 21:42:06 +02002322 int oldpage;
Russell King424ca4c2018-01-02 10:58:48 +00002323 int ret = 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01002324 int val;
2325
2326 *temp = 0;
2327
Russell King424ca4c2018-01-02 10:58:48 +00002328 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2329 if (oldpage < 0)
2330 goto error;
Andrew Lunn975b3882017-05-25 21:42:06 +02002331
Andrew Lunn0b046802017-01-20 01:37:49 +01002332 /* Enable temperature sensor */
Russell King424ca4c2018-01-02 10:58:48 +00002333 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01002334 if (ret < 0)
2335 goto error;
2336
Russell King424ca4c2018-01-02 10:58:48 +00002337 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2338 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
Andrew Lunn0b046802017-01-20 01:37:49 +01002339 if (ret < 0)
2340 goto error;
2341
2342 /* Wait for temperature to stabilize */
2343 usleep_range(10000, 12000);
2344
Russell King424ca4c2018-01-02 10:58:48 +00002345 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01002346 if (val < 0) {
2347 ret = val;
2348 goto error;
2349 }
2350
2351 /* Disable temperature sensor */
Russell King424ca4c2018-01-02 10:58:48 +00002352 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2353 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
Andrew Lunn0b046802017-01-20 01:37:49 +01002354 if (ret < 0)
2355 goto error;
2356
2357 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
2358
2359error:
Russell King424ca4c2018-01-02 10:58:48 +00002360 return phy_restore_page(phydev, oldpage, ret);
Andrew Lunn0b046802017-01-20 01:37:49 +01002361}
2362
Andrew Lunn0b046802017-01-20 01:37:49 +01002363static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
2364{
2365 int ret;
2366
2367 *temp = 0;
2368
Russell King424ca4c2018-01-02 10:58:48 +00002369 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2370 MII_88E1510_TEMP_SENSOR);
Andrew Lunn0b046802017-01-20 01:37:49 +01002371 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00002372 return ret;
Andrew Lunn0b046802017-01-20 01:37:49 +01002373
2374 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
2375
Russell King424ca4c2018-01-02 10:58:48 +00002376 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01002377}
2378
Colin Ian Kingf0a45812017-06-02 15:13:34 +01002379static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01002380{
2381 int ret;
2382
2383 *temp = 0;
2384
Russell King424ca4c2018-01-02 10:58:48 +00002385 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2386 MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01002387 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00002388 return ret;
Andrew Lunn0b046802017-01-20 01:37:49 +01002389
2390 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
2391 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
2392 /* convert to mC */
2393 *temp *= 1000;
2394
Russell King424ca4c2018-01-02 10:58:48 +00002395 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01002396}
2397
Colin Ian Kingf0a45812017-06-02 15:13:34 +01002398static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01002399{
Andrew Lunn0b046802017-01-20 01:37:49 +01002400 temp = temp / 1000;
2401 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
Andrew Lunn0b046802017-01-20 01:37:49 +01002402
Russell King424ca4c2018-01-02 10:58:48 +00002403 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2404 MII_88E1121_MISC_TEST,
2405 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2406 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
Andrew Lunn0b046802017-01-20 01:37:49 +01002407}
2408
Colin Ian Kingf0a45812017-06-02 15:13:34 +01002409static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
Andrew Lunn0b046802017-01-20 01:37:49 +01002410{
2411 int ret;
2412
2413 *alarm = false;
2414
Russell King424ca4c2018-01-02 10:58:48 +00002415 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2416 MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01002417 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00002418 return ret;
2419
Andrew Lunn0b046802017-01-20 01:37:49 +01002420 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
2421
Russell King424ca4c2018-01-02 10:58:48 +00002422 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01002423}
2424
Andrew Lunnfee2d542018-01-09 22:42:09 +01002425static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2426{
2427 int sum = 0;
2428 int oldpage;
2429 int ret = 0;
2430 int i;
2431
2432 *temp = 0;
2433
2434 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2435 if (oldpage < 0)
2436 goto error;
2437
2438 /* Enable temperature sensor */
2439 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2440 if (ret < 0)
2441 goto error;
2442
Marek Behún00218172021-04-20 09:54:01 +02002443 ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
Marek Behún4f920c292021-04-20 09:54:00 +02002444 ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
Andrew Lunnfee2d542018-01-09 22:42:09 +01002445
2446 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2447 if (ret < 0)
2448 goto error;
2449
2450 /* Wait for temperature to stabilize */
2451 usleep_range(10000, 12000);
2452
2453 /* Reading the temperature sense has an errata. You need to read
2454 * a number of times and take an average.
2455 */
2456 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2457 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2458 if (ret < 0)
2459 goto error;
2460 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2461 }
2462
2463 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2464 *temp = (sum - 75) * 1000;
2465
2466 /* Disable temperature sensor */
2467 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2468 if (ret < 0)
2469 goto error;
2470
Marek Behún4f920c292021-04-20 09:54:00 +02002471 ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2472 ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
Andrew Lunnfee2d542018-01-09 22:42:09 +01002473
2474 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2475
2476error:
2477 phy_restore_page(phydev, oldpage, ret);
2478
2479 return ret;
2480}
2481
Marek Behúna978f7c2021-04-20 09:54:03 +02002482static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
2483{
2484 int err;
2485
2486 err = m88e1510_get_temp(phydev, temp);
2487
2488 /* 88E1510 measures T + 25, while the PHY on 88E6393X switch
2489 * T + 75, so we have to subtract another 50
2490 */
2491 *temp -= 50000;
2492
2493 return err;
2494}
2495
2496static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
2497{
2498 int ret;
2499
2500 *temp = 0;
2501
2502 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2503 MII_88E6390_TEMP_SENSOR);
2504 if (ret < 0)
2505 return ret;
2506
2507 *temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
2508 MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
2509
2510 return 0;
2511}
2512
2513static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
2514{
2515 temp = (temp / 1000) + 75;
2516
2517 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2518 MII_88E6390_TEMP_SENSOR,
2519 MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
2520 temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
2521}
2522
2523static int m88e6393_hwmon_config(struct phy_device *phydev)
2524{
2525 int err;
2526
2527 err = m88e6393_set_temp_critical(phydev, 100000);
2528 if (err)
2529 return err;
2530
2531 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2532 MII_88E6390_MISC_TEST,
2533 MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
2534 MII_88E6393_MISC_TEST_SAMPLES_MASK |
2535 MII_88E6393_MISC_TEST_RATE_MASK,
2536 MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
2537 MII_88E6393_MISC_TEST_SAMPLES_2048 |
2538 MII_88E6393_MISC_TEST_RATE_2_3MS);
2539}
2540
Marek Behún41d26bf2021-04-20 09:53:59 +02002541static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
2542 u32 attr, int channel, long *temp)
Andrew Lunnfee2d542018-01-09 22:42:09 +01002543{
2544 struct phy_device *phydev = dev_get_drvdata(dev);
Marek Behún41d26bf2021-04-20 09:53:59 +02002545 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2546 int err = -EOPNOTSUPP;
Andrew Lunnfee2d542018-01-09 22:42:09 +01002547
2548 switch (attr) {
2549 case hwmon_temp_input:
Marek Behún41d26bf2021-04-20 09:53:59 +02002550 if (ops->get_temp)
2551 err = ops->get_temp(phydev, temp);
Andrew Lunnfee2d542018-01-09 22:42:09 +01002552 break;
Marek Behún41d26bf2021-04-20 09:53:59 +02002553 case hwmon_temp_crit:
2554 if (ops->get_temp_critical)
2555 err = ops->get_temp_critical(phydev, temp);
2556 break;
2557 case hwmon_temp_max_alarm:
2558 if (ops->get_temp_alarm)
2559 err = ops->get_temp_alarm(phydev, temp);
2560 break;
Andrew Lunnfee2d542018-01-09 22:42:09 +01002561 }
2562
2563 return err;
2564}
2565
Marek Behún41d26bf2021-04-20 09:53:59 +02002566static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
2567 u32 attr, int channel, long temp)
Andrew Lunnfee2d542018-01-09 22:42:09 +01002568{
Marek Behún41d26bf2021-04-20 09:53:59 +02002569 struct phy_device *phydev = dev_get_drvdata(dev);
2570 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2571 int err = -EOPNOTSUPP;
2572
2573 switch (attr) {
2574 case hwmon_temp_crit:
2575 if (ops->set_temp_critical)
2576 err = ops->set_temp_critical(phydev, temp);
2577 break;
Marek Behún41d26bf2021-04-20 09:53:59 +02002578 }
2579
2580 return err;
2581}
2582
2583static umode_t marvell_hwmon_is_visible(const void *data,
2584 enum hwmon_sensor_types type,
2585 u32 attr, int channel)
2586{
2587 const struct phy_device *phydev = data;
2588 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2589
Andrew Lunnfee2d542018-01-09 22:42:09 +01002590 if (type != hwmon_temp)
2591 return 0;
2592
2593 switch (attr) {
2594 case hwmon_temp_input:
Marek Behún41d26bf2021-04-20 09:53:59 +02002595 return ops->get_temp ? 0444 : 0;
2596 case hwmon_temp_max_alarm:
2597 return ops->get_temp_alarm ? 0444 : 0;
2598 case hwmon_temp_crit:
2599 return (ops->get_temp_critical ? 0444 : 0) |
2600 (ops->set_temp_critical ? 0200 : 0);
Andrew Lunnfee2d542018-01-09 22:42:09 +01002601 default:
2602 return 0;
2603 }
2604}
2605
Marek Behún41d26bf2021-04-20 09:53:59 +02002606static u32 marvell_hwmon_chip_config[] = {
2607 HWMON_C_REGISTER_TZ,
Andrew Lunnfee2d542018-01-09 22:42:09 +01002608 0
2609};
2610
Marek Behún41d26bf2021-04-20 09:53:59 +02002611static const struct hwmon_channel_info marvell_hwmon_chip = {
2612 .type = hwmon_chip,
2613 .config = marvell_hwmon_chip_config,
Andrew Lunnfee2d542018-01-09 22:42:09 +01002614};
2615
Marek Behún41d26bf2021-04-20 09:53:59 +02002616/* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
2617 * defined for all PHYs, because the hwmon code checks whether the attributes
2618 * exists via the .is_visible method
2619 */
2620static u32 marvell_hwmon_temp_config[] = {
2621 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
2622 0
2623};
2624
2625static const struct hwmon_channel_info marvell_hwmon_temp = {
2626 .type = hwmon_temp,
2627 .config = marvell_hwmon_temp_config,
2628};
2629
2630static const struct hwmon_channel_info *marvell_hwmon_info[] = {
2631 &marvell_hwmon_chip,
2632 &marvell_hwmon_temp,
Andrew Lunnfee2d542018-01-09 22:42:09 +01002633 NULL
2634};
2635
Marek Behún41d26bf2021-04-20 09:53:59 +02002636static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
2637 .is_visible = marvell_hwmon_is_visible,
2638 .read = marvell_hwmon_read,
2639 .write = marvell_hwmon_write,
Andrew Lunnfee2d542018-01-09 22:42:09 +01002640};
2641
Marek Behún41d26bf2021-04-20 09:53:59 +02002642static const struct hwmon_chip_info marvell_hwmon_chip_info = {
2643 .ops = &marvell_hwmon_hwmon_ops,
2644 .info = marvell_hwmon_info,
Andrew Lunnfee2d542018-01-09 22:42:09 +01002645};
2646
Andrew Lunn0b046802017-01-20 01:37:49 +01002647static int marvell_hwmon_name(struct phy_device *phydev)
2648{
2649 struct marvell_priv *priv = phydev->priv;
2650 struct device *dev = &phydev->mdio.dev;
2651 const char *devname = dev_name(dev);
2652 size_t len = strlen(devname);
2653 int i, j;
2654
2655 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2656 if (!priv->hwmon_name)
2657 return -ENOMEM;
2658
2659 for (i = j = 0; i < len && devname[i]; i++) {
2660 if (isalnum(devname[i]))
2661 priv->hwmon_name[j++] = devname[i];
2662 }
2663
2664 return 0;
2665}
2666
Marek Behún41d26bf2021-04-20 09:53:59 +02002667static int marvell_hwmon_probe(struct phy_device *phydev)
Andrew Lunn0b046802017-01-20 01:37:49 +01002668{
Marek Behún41d26bf2021-04-20 09:53:59 +02002669 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
Andrew Lunn0b046802017-01-20 01:37:49 +01002670 struct marvell_priv *priv = phydev->priv;
2671 struct device *dev = &phydev->mdio.dev;
2672 int err;
2673
Marek Behún41d26bf2021-04-20 09:53:59 +02002674 if (!ops)
2675 return 0;
2676
Andrew Lunn0b046802017-01-20 01:37:49 +01002677 err = marvell_hwmon_name(phydev);
2678 if (err)
2679 return err;
2680
2681 priv->hwmon_dev = devm_hwmon_device_register_with_info(
Marek Behún41d26bf2021-04-20 09:53:59 +02002682 dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL);
Marek Behúna978f7c2021-04-20 09:54:03 +02002683 if (IS_ERR(priv->hwmon_dev))
2684 return PTR_ERR(priv->hwmon_dev);
Andrew Lunn0b046802017-01-20 01:37:49 +01002685
Marek Behúna978f7c2021-04-20 09:54:03 +02002686 if (ops->config)
2687 err = ops->config(phydev);
2688
2689 return err;
Andrew Lunn0b046802017-01-20 01:37:49 +01002690}
2691
Marek Behún41d26bf2021-04-20 09:53:59 +02002692static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
2693 .get_temp = m88e1121_get_temp,
2694};
Andrew Lunn0b046802017-01-20 01:37:49 +01002695
Marek Behún41d26bf2021-04-20 09:53:59 +02002696static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
2697 .get_temp = m88e1510_get_temp,
2698 .get_temp_critical = m88e1510_get_temp_critical,
2699 .set_temp_critical = m88e1510_set_temp_critical,
2700 .get_temp_alarm = m88e1510_get_temp_alarm,
2701};
Andrew Lunnfee2d542018-01-09 22:42:09 +01002702
Marek Behún41d26bf2021-04-20 09:53:59 +02002703static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
2704 .get_temp = m88e6390_get_temp,
2705};
2706
Marek Behúna978f7c2021-04-20 09:54:03 +02002707static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
2708 .config = m88e6393_hwmon_config,
2709 .get_temp = m88e6393_get_temp,
2710 .get_temp_critical = m88e6393_get_temp_critical,
2711 .set_temp_critical = m88e6393_set_temp_critical,
2712 .get_temp_alarm = m88e1510_get_temp_alarm,
2713};
2714
Marek Behún41d26bf2021-04-20 09:53:59 +02002715#define DEF_MARVELL_HWMON_OPS(s) (&(s))
2716
Andrew Lunn0b046802017-01-20 01:37:49 +01002717#else
Andrew Lunn0b046802017-01-20 01:37:49 +01002718
Marek Behún41d26bf2021-04-20 09:53:59 +02002719#define DEF_MARVELL_HWMON_OPS(s) NULL
Andrew Lunnfee2d542018-01-09 22:42:09 +01002720
Marek Behún41d26bf2021-04-20 09:53:59 +02002721static int marvell_hwmon_probe(struct phy_device *phydev)
Andrew Lunnfee2d542018-01-09 22:42:09 +01002722{
2723 return 0;
2724}
Andrew Lunn0b046802017-01-20 01:37:49 +01002725#endif
2726
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002727static int marvell_probe(struct phy_device *phydev)
2728{
2729 struct marvell_priv *priv;
2730
Andrew Lunne5a03bf2016-01-06 20:11:16 +01002731 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002732 if (!priv)
2733 return -ENOMEM;
2734
2735 phydev->priv = priv;
2736
Marek Behún41d26bf2021-04-20 09:53:59 +02002737 return marvell_hwmon_probe(phydev);
Andrew Lunnfee2d542018-01-09 22:42:09 +01002738}
2739
Ivan Bornyakovb697d9d2021-08-12 16:42:56 +03002740static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
2741{
2742 struct phy_device *phydev = upstream;
2743 phy_interface_t interface;
2744 struct device *dev;
2745 int oldpage;
2746 int ret = 0;
2747 u16 mode;
2748
2749 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
2750
2751 dev = &phydev->mdio.dev;
2752
2753 sfp_parse_support(phydev->sfp_bus, id, supported);
2754 interface = sfp_select_interface(phydev->sfp_bus, supported);
2755
2756 dev_info(dev, "%s SFP module inserted\n", phy_modes(interface));
2757
2758 switch (interface) {
2759 case PHY_INTERFACE_MODE_1000BASEX:
2760 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X;
2761
2762 break;
2763 case PHY_INTERFACE_MODE_100BASEX:
2764 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX;
2765
2766 break;
2767 case PHY_INTERFACE_MODE_SGMII:
2768 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII;
2769
2770 break;
2771 default:
2772 dev_err(dev, "Incompatible SFP module inserted\n");
2773
2774 return -EINVAL;
2775 }
2776
2777 oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
2778 if (oldpage < 0)
2779 goto error;
2780
2781 ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
2782 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode);
2783 if (ret < 0)
2784 goto error;
2785
2786 ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
2787 MII_88E1510_GEN_CTRL_REG_1_RESET);
2788
2789error:
2790 return phy_restore_page(phydev, oldpage, ret);
2791}
2792
2793static void m88e1510_sfp_remove(void *upstream)
2794{
2795 struct phy_device *phydev = upstream;
2796 int oldpage;
2797 int ret = 0;
2798
2799 oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
2800 if (oldpage < 0)
2801 goto error;
2802
2803 ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
2804 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
2805 MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII);
2806 if (ret < 0)
2807 goto error;
2808
2809 ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
2810 MII_88E1510_GEN_CTRL_REG_1_RESET);
2811
2812error:
2813 phy_restore_page(phydev, oldpage, ret);
2814}
2815
2816static const struct sfp_upstream_ops m88e1510_sfp_ops = {
2817 .module_insert = m88e1510_sfp_insert,
2818 .module_remove = m88e1510_sfp_remove,
2819 .attach = phy_sfp_attach,
2820 .detach = phy_sfp_detach,
2821};
2822
2823static int m88e1510_probe(struct phy_device *phydev)
2824{
2825 int err;
2826
2827 err = marvell_probe(phydev);
2828 if (err)
2829 return err;
2830
2831 return phy_sfp_probe(phydev, &m88e1510_sfp_ops);
2832}
2833
Olof Johanssone5479232007-07-03 16:23:46 -05002834static struct phy_driver marvell_drivers[] = {
2835 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002836 .phy_id = MARVELL_PHY_ID_88E1101,
2837 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002838 .name = "Marvell 88E1101",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002839 /* PHY_GBIT_FEATURES */
Arnd Bergmann18702412017-01-23 13:18:41 +01002840 .probe = marvell_probe,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002841 .config_init = marvell_config_init,
2842 .config_aneg = m88e1101_config_aneg,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002843 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02002844 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002845 .resume = genphy_resume,
2846 .suspend = genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002847 .read_page = marvell_read_page,
2848 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002849 .get_sset_count = marvell_get_sset_count,
2850 .get_strings = marvell_get_strings,
2851 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05002852 },
2853 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002854 .phy_id = MARVELL_PHY_ID_88E1112,
2855 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johansson85cfb532007-07-03 16:24:32 -05002856 .name = "Marvell 88E1112",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002857 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002858 .probe = marvell_probe,
Maxim Kochetkov8385b1f2021-04-30 07:57:33 +03002859 .config_init = m88e1112_config_init,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002860 .config_aneg = marvell_config_aneg,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002861 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02002862 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002863 .resume = genphy_resume,
2864 .suspend = genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002865 .read_page = marvell_read_page,
2866 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002867 .get_sset_count = marvell_get_sset_count,
2868 .get_strings = marvell_get_strings,
2869 .get_stats = marvell_get_stats,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002870 .get_tunable = m88e1011_get_tunable,
2871 .set_tunable = m88e1011_set_tunable,
Olof Johansson85cfb532007-07-03 16:24:32 -05002872 },
2873 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002874 .phy_id = MARVELL_PHY_ID_88E1111,
2875 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002876 .name = "Marvell 88E1111",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002877 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002878 .probe = marvell_probe,
Maxim Kochetkov8385b1f2021-04-30 07:57:33 +03002879 .config_init = m88e1111gbe_config_init,
Robert Hancock18870232020-10-28 11:15:40 -06002880 .config_aneg = m88e1111_config_aneg,
2881 .read_status = marvell_read_status,
Robert Hancock18870232020-10-28 11:15:40 -06002882 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02002883 .handle_interrupt = marvell_handle_interrupt,
Robert Hancock18870232020-10-28 11:15:40 -06002884 .resume = genphy_resume,
2885 .suspend = genphy_suspend,
2886 .read_page = marvell_read_page,
2887 .write_page = marvell_write_page,
2888 .get_sset_count = marvell_get_sset_count,
2889 .get_strings = marvell_get_strings,
2890 .get_stats = marvell_get_stats,
2891 .get_tunable = m88e1111_get_tunable,
2892 .set_tunable = m88e1111_set_tunable,
2893 },
2894 {
2895 .phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
2896 .phy_id_mask = MARVELL_PHY_ID_MASK,
2897 .name = "Marvell 88E1111 (Finisar)",
2898 /* PHY_GBIT_FEATURES */
2899 .probe = marvell_probe,
Maxim Kochetkov8385b1f2021-04-30 07:57:33 +03002900 .config_init = m88e1111gbe_config_init,
Robert Hancock18870232020-10-28 11:15:40 -06002901 .config_aneg = m88e1111_config_aneg,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002902 .read_status = marvell_read_status,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002903 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02002904 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002905 .resume = genphy_resume,
2906 .suspend = genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002907 .read_page = marvell_read_page,
2908 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002909 .get_sset_count = marvell_get_sset_count,
2910 .get_strings = marvell_get_strings,
2911 .get_stats = marvell_get_stats,
Heiner Kallweit5c6bc512019-10-28 20:53:25 +01002912 .get_tunable = m88e1111_get_tunable,
2913 .set_tunable = m88e1111_set_tunable,
Olof Johanssone5479232007-07-03 16:23:46 -05002914 },
2915 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002916 .phy_id = MARVELL_PHY_ID_88E1118,
2917 .phy_id_mask = MARVELL_PHY_ID_MASK,
Ron Madrid605f1962008-11-06 09:05:26 +00002918 .name = "Marvell 88E1118",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002919 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002920 .probe = marvell_probe,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002921 .config_init = m88e1118_config_init,
2922 .config_aneg = m88e1118_config_aneg,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002923 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02002924 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002925 .resume = genphy_resume,
2926 .suspend = genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002927 .read_page = marvell_read_page,
2928 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002929 .get_sset_count = marvell_get_sset_count,
2930 .get_strings = marvell_get_strings,
2931 .get_stats = marvell_get_stats,
Ron Madrid605f1962008-11-06 09:05:26 +00002932 },
2933 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002934 .phy_id = MARVELL_PHY_ID_88E1121R,
2935 .phy_id_mask = MARVELL_PHY_ID_MASK,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002936 .name = "Marvell 88E1121R",
Marek Behún41d26bf2021-04-20 09:53:59 +02002937 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002938 /* PHY_GBIT_FEATURES */
Marek Behún41d26bf2021-04-20 09:53:59 +02002939 .probe = marvell_probe,
Maxim Kochetkov8385b1f2021-04-30 07:57:33 +03002940 .config_init = marvell_1011gbe_config_init,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002941 .config_aneg = m88e1121_config_aneg,
2942 .read_status = marvell_read_status,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002943 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02002944 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002945 .resume = genphy_resume,
2946 .suspend = genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002947 .read_page = marvell_read_page,
2948 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002949 .get_sset_count = marvell_get_sset_count,
2950 .get_strings = marvell_get_strings,
2951 .get_stats = marvell_get_stats,
Heiner Kallweit911af5e2019-10-28 20:52:55 +01002952 .get_tunable = m88e1011_get_tunable,
2953 .set_tunable = m88e1011_set_tunable,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002954 },
2955 {
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002956 .phy_id = MARVELL_PHY_ID_88E1318S,
Linus Torvalds6ba74012010-08-04 11:47:58 -07002957 .phy_id_mask = MARVELL_PHY_ID_MASK,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002958 .name = "Marvell 88E1318S",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002959 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002960 .probe = marvell_probe,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002961 .config_init = m88e1318_config_init,
2962 .config_aneg = m88e1318_config_aneg,
2963 .read_status = marvell_read_status,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002964 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02002965 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002966 .get_wol = m88e1318_get_wol,
2967 .set_wol = m88e1318_set_wol,
2968 .resume = genphy_resume,
2969 .suspend = genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002970 .read_page = marvell_read_page,
2971 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002972 .get_sset_count = marvell_get_sset_count,
2973 .get_strings = marvell_get_strings,
2974 .get_stats = marvell_get_stats,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002975 },
2976 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002977 .phy_id = MARVELL_PHY_ID_88E1145,
2978 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002979 .name = "Marvell 88E1145",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002980 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002981 .probe = marvell_probe,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002982 .config_init = m88e1145_config_init,
2983 .config_aneg = m88e1101_config_aneg,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002984 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02002985 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03002986 .resume = genphy_resume,
2987 .suspend = genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002988 .read_page = marvell_read_page,
2989 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002990 .get_sset_count = marvell_get_sset_count,
2991 .get_strings = marvell_get_strings,
2992 .get_stats = marvell_get_stats,
Heiner Kallweita319fb52019-10-29 20:25:26 +01002993 .get_tunable = m88e1111_get_tunable,
2994 .set_tunable = m88e1111_set_tunable,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002995 },
2996 {
David Daney90600732010-11-19 11:58:53 +00002997 .phy_id = MARVELL_PHY_ID_88E1149R,
2998 .phy_id_mask = MARVELL_PHY_ID_MASK,
2999 .name = "Marvell 88E1149R",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02003000 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01003001 .probe = marvell_probe,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003002 .config_init = m88e1149_config_init,
3003 .config_aneg = m88e1118_config_aneg,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003004 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02003005 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003006 .resume = genphy_resume,
3007 .suspend = genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00003008 .read_page = marvell_read_page,
3009 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01003010 .get_sset_count = marvell_get_sset_count,
3011 .get_strings = marvell_get_strings,
3012 .get_stats = marvell_get_stats,
David Daney90600732010-11-19 11:58:53 +00003013 },
3014 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10003015 .phy_id = MARVELL_PHY_ID_88E1240,
3016 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssonac8c6352007-11-04 16:08:51 -06003017 .name = "Marvell 88E1240",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02003018 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01003019 .probe = marvell_probe,
Maxim Kochetkov8385b1f2021-04-30 07:57:33 +03003020 .config_init = m88e1112_config_init,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003021 .config_aneg = marvell_config_aneg,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003022 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02003023 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003024 .resume = genphy_resume,
3025 .suspend = genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00003026 .read_page = marvell_read_page,
3027 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01003028 .get_sset_count = marvell_get_sset_count,
3029 .get_strings = marvell_get_strings,
3030 .get_stats = marvell_get_stats,
Maxim Kochetkov65ad85f2021-04-28 12:53:56 +03003031 .get_tunable = m88e1011_get_tunable,
3032 .set_tunable = m88e1011_set_tunable,
Olof Johanssonac8c6352007-11-04 16:08:51 -06003033 },
Michal Simek3da09a52013-05-30 20:08:26 +00003034 {
3035 .phy_id = MARVELL_PHY_ID_88E1116R,
3036 .phy_id_mask = MARVELL_PHY_ID_MASK,
3037 .name = "Marvell 88E1116R",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02003038 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01003039 .probe = marvell_probe,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003040 .config_init = m88e1116r_config_init,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003041 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02003042 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003043 .resume = genphy_resume,
3044 .suspend = genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00003045 .read_page = marvell_read_page,
3046 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01003047 .get_sset_count = marvell_get_sset_count,
3048 .get_strings = marvell_get_strings,
3049 .get_stats = marvell_get_stats,
Heiner Kallweit262caf42019-10-28 20:54:17 +01003050 .get_tunable = m88e1011_get_tunable,
3051 .set_tunable = m88e1011_set_tunable,
Michal Simek3da09a52013-05-30 20:08:26 +00003052 },
Michal Simek10e24caa2013-05-30 20:08:27 +00003053 {
3054 .phy_id = MARVELL_PHY_ID_88E1510,
3055 .phy_id_mask = MARVELL_PHY_ID_MASK,
3056 .name = "Marvell 88E1510",
Marek Behún41d26bf2021-04-20 09:53:59 +02003057 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
Andrew Lunn719655a2018-09-29 23:04:16 +02003058 .features = PHY_GBIT_FIBRE_FEATURES,
Andrew Lunnfc879f72020-05-10 21:12:38 +02003059 .flags = PHY_POLL_CABLE_TEST,
Ivan Bornyakovb697d9d2021-08-12 16:42:56 +03003060 .probe = m88e1510_probe,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003061 .config_init = m88e1510_config_init,
3062 .config_aneg = m88e1510_config_aneg,
3063 .read_status = marvell_read_status,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003064 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02003065 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003066 .get_wol = m88e1318_get_wol,
3067 .set_wol = m88e1318_set_wol,
3068 .resume = marvell_resume,
3069 .suspend = marvell_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00003070 .read_page = marvell_read_page,
3071 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01003072 .get_sset_count = marvell_get_sset_count,
3073 .get_strings = marvell_get_strings,
3074 .get_stats = marvell_get_stats,
Lin Yun Shengf0f9b4e2017-06-30 17:44:15 +08003075 .set_loopback = genphy_loopback,
Heiner Kallweit262caf42019-10-28 20:54:17 +01003076 .get_tunable = m88e1011_get_tunable,
3077 .set_tunable = m88e1011_set_tunable,
Andrew Lunnfc879f72020-05-10 21:12:38 +02003078 .cable_test_start = marvell_vct7_cable_test_start,
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02003079 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
Andrew Lunnfc879f72020-05-10 21:12:38 +02003080 .cable_test_get_status = marvell_vct7_cable_test_get_status,
Michal Simek10e24caa2013-05-30 20:08:27 +00003081 },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02003082 {
Andrew Lunn819ec8e2015-11-16 23:34:41 +01003083 .phy_id = MARVELL_PHY_ID_88E1540,
3084 .phy_id_mask = MARVELL_PHY_ID_MASK,
3085 .name = "Marvell 88E1540",
Marek Behún41d26bf2021-04-20 09:53:59 +02003086 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02003087 /* PHY_GBIT_FEATURES */
Andrew Lunnfc879f72020-05-10 21:12:38 +02003088 .flags = PHY_POLL_CABLE_TEST,
Marek Behún41d26bf2021-04-20 09:53:59 +02003089 .probe = marvell_probe,
Maxim Kochetkov8385b1f2021-04-30 07:57:33 +03003090 .config_init = marvell_1011gbe_config_init,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003091 .config_aneg = m88e1510_config_aneg,
3092 .read_status = marvell_read_status,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003093 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02003094 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003095 .resume = genphy_resume,
3096 .suspend = genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00003097 .read_page = marvell_read_page,
3098 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01003099 .get_sset_count = marvell_get_sset_count,
3100 .get_strings = marvell_get_strings,
3101 .get_stats = marvell_get_stats,
Heiner Kallweit69f42be2019-03-25 19:35:41 +01003102 .get_tunable = m88e1540_get_tunable,
3103 .set_tunable = m88e1540_set_tunable,
Andrew Lunnfc879f72020-05-10 21:12:38 +02003104 .cable_test_start = marvell_vct7_cable_test_start,
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02003105 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
Andrew Lunnfc879f72020-05-10 21:12:38 +02003106 .cable_test_get_status = marvell_vct7_cable_test_get_status,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01003107 },
3108 {
Andrew Lunn60f06fd2017-02-02 00:35:03 +01003109 .phy_id = MARVELL_PHY_ID_88E1545,
3110 .phy_id_mask = MARVELL_PHY_ID_MASK,
3111 .name = "Marvell 88E1545",
Marek Behún41d26bf2021-04-20 09:53:59 +02003112 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3113 .probe = marvell_probe,
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02003114 /* PHY_GBIT_FEATURES */
Andrew Lunnfc879f72020-05-10 21:12:38 +02003115 .flags = PHY_POLL_CABLE_TEST,
Maxim Kochetkov8385b1f2021-04-30 07:57:33 +03003116 .config_init = marvell_1011gbe_config_init,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003117 .config_aneg = m88e1510_config_aneg,
3118 .read_status = marvell_read_status,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003119 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02003120 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003121 .resume = genphy_resume,
3122 .suspend = genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00003123 .read_page = marvell_read_page,
3124 .write_page = marvell_write_page,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01003125 .get_sset_count = marvell_get_sset_count,
3126 .get_strings = marvell_get_strings,
3127 .get_stats = marvell_get_stats,
Heiner Kallweit262caf42019-10-28 20:54:17 +01003128 .get_tunable = m88e1540_get_tunable,
3129 .set_tunable = m88e1540_set_tunable,
Andrew Lunnfc879f72020-05-10 21:12:38 +02003130 .cable_test_start = marvell_vct7_cable_test_start,
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02003131 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
Andrew Lunnfc879f72020-05-10 21:12:38 +02003132 .cable_test_get_status = marvell_vct7_cable_test_get_status,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01003133 },
3134 {
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02003135 .phy_id = MARVELL_PHY_ID_88E3016,
3136 .phy_id_mask = MARVELL_PHY_ID_MASK,
3137 .name = "Marvell 88E3016",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02003138 /* PHY_BASIC_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01003139 .probe = marvell_probe,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003140 .config_init = m88e3016_config_init,
3141 .aneg_done = marvell_aneg_done,
3142 .read_status = marvell_read_status,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003143 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02003144 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003145 .resume = genphy_resume,
3146 .suspend = genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00003147 .read_page = marvell_read_page,
3148 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01003149 .get_sset_count = marvell_get_sset_count,
3150 .get_strings = marvell_get_strings,
3151 .get_stats = marvell_get_stats,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02003152 },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01003153 {
Pali Rohár1fe976d2021-04-12 18:57:39 +02003154 .phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01003155 .phy_id_mask = MARVELL_PHY_ID_MASK,
Pali Rohár1fe976d2021-04-12 18:57:39 +02003156 .name = "Marvell 88E6341 Family",
Marek Behún41d26bf2021-04-20 09:53:59 +02003157 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
Pali Rohár1fe976d2021-04-12 18:57:39 +02003158 /* PHY_GBIT_FEATURES */
3159 .flags = PHY_POLL_CABLE_TEST,
Marek Behún41d26bf2021-04-20 09:53:59 +02003160 .probe = marvell_probe,
Maxim Kochetkov8385b1f2021-04-30 07:57:33 +03003161 .config_init = marvell_1011gbe_config_init,
Pali Rohár1fe976d2021-04-12 18:57:39 +02003162 .config_aneg = m88e6390_config_aneg,
3163 .read_status = marvell_read_status,
3164 .config_intr = marvell_config_intr,
3165 .handle_interrupt = marvell_handle_interrupt,
3166 .resume = genphy_resume,
3167 .suspend = genphy_suspend,
3168 .read_page = marvell_read_page,
3169 .write_page = marvell_write_page,
3170 .get_sset_count = marvell_get_sset_count,
3171 .get_strings = marvell_get_strings,
3172 .get_stats = marvell_get_stats,
3173 .get_tunable = m88e1540_get_tunable,
3174 .set_tunable = m88e1540_set_tunable,
3175 .cable_test_start = marvell_vct7_cable_test_start,
3176 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3177 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3178 },
3179 {
3180 .phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
3181 .phy_id_mask = MARVELL_PHY_ID_MASK,
3182 .name = "Marvell 88E6390 Family",
Marek Behún41d26bf2021-04-20 09:53:59 +02003183 .driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02003184 /* PHY_GBIT_FEATURES */
Andrew Lunnfc879f72020-05-10 21:12:38 +02003185 .flags = PHY_POLL_CABLE_TEST,
Marek Behún41d26bf2021-04-20 09:53:59 +02003186 .probe = marvell_probe,
Maxim Kochetkov8385b1f2021-04-30 07:57:33 +03003187 .config_init = marvell_1011gbe_config_init,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003188 .config_aneg = m88e6390_config_aneg,
3189 .read_status = marvell_read_status,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003190 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02003191 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkovef0f9542020-06-21 10:59:50 +03003192 .resume = genphy_resume,
3193 .suspend = genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00003194 .read_page = marvell_read_page,
3195 .write_page = marvell_write_page,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01003196 .get_sset_count = marvell_get_sset_count,
3197 .get_strings = marvell_get_strings,
3198 .get_stats = marvell_get_stats,
Heiner Kallweit69f42be2019-03-25 19:35:41 +01003199 .get_tunable = m88e1540_get_tunable,
3200 .set_tunable = m88e1540_set_tunable,
Andrew Lunnfc879f72020-05-10 21:12:38 +02003201 .cable_test_start = marvell_vct7_cable_test_start,
Andrew Lunn0c9bcc12020-05-27 00:21:40 +02003202 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
Andrew Lunnfc879f72020-05-10 21:12:38 +02003203 .cable_test_get_status = marvell_vct7_cable_test_get_status,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01003204 },
Maxim Kochetkova602ea82020-06-21 10:59:51 +03003205 {
Marek Behúna978f7c2021-04-20 09:54:03 +02003206 .phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
3207 .phy_id_mask = MARVELL_PHY_ID_MASK,
3208 .name = "Marvell 88E6393 Family",
3209 .driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
3210 /* PHY_GBIT_FEATURES */
3211 .flags = PHY_POLL_CABLE_TEST,
3212 .probe = marvell_probe,
Maxim Kochetkov8385b1f2021-04-30 07:57:33 +03003213 .config_init = marvell_1011gbe_config_init,
Marek Behúna978f7c2021-04-20 09:54:03 +02003214 .config_aneg = m88e1510_config_aneg,
3215 .read_status = marvell_read_status,
3216 .config_intr = marvell_config_intr,
3217 .handle_interrupt = marvell_handle_interrupt,
3218 .resume = genphy_resume,
3219 .suspend = genphy_suspend,
3220 .read_page = marvell_read_page,
3221 .write_page = marvell_write_page,
3222 .get_sset_count = marvell_get_sset_count,
3223 .get_strings = marvell_get_strings,
3224 .get_stats = marvell_get_stats,
3225 .get_tunable = m88e1540_get_tunable,
3226 .set_tunable = m88e1540_set_tunable,
3227 .cable_test_start = marvell_vct7_cable_test_start,
3228 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3229 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3230 },
3231 {
Maxim Kochetkova602ea82020-06-21 10:59:51 +03003232 .phy_id = MARVELL_PHY_ID_88E1340S,
3233 .phy_id_mask = MARVELL_PHY_ID_MASK,
3234 .name = "Marvell 88E1340S",
Marek Behún41d26bf2021-04-20 09:53:59 +02003235 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3236 .probe = marvell_probe,
Maxim Kochetkova602ea82020-06-21 10:59:51 +03003237 /* PHY_GBIT_FEATURES */
Maxim Kochetkov8385b1f2021-04-30 07:57:33 +03003238 .config_init = marvell_1011gbe_config_init,
Maxim Kochetkova602ea82020-06-21 10:59:51 +03003239 .config_aneg = m88e1510_config_aneg,
3240 .read_status = marvell_read_status,
Maxim Kochetkova602ea82020-06-21 10:59:51 +03003241 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02003242 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkova602ea82020-06-21 10:59:51 +03003243 .resume = genphy_resume,
3244 .suspend = genphy_suspend,
3245 .read_page = marvell_read_page,
3246 .write_page = marvell_write_page,
3247 .get_sset_count = marvell_get_sset_count,
3248 .get_strings = marvell_get_strings,
3249 .get_stats = marvell_get_stats,
3250 .get_tunable = m88e1540_get_tunable,
3251 .set_tunable = m88e1540_set_tunable,
3252 },
Maxim Kochetkovf59babf2020-06-21 10:59:52 +03003253 {
3254 .phy_id = MARVELL_PHY_ID_88E1548P,
3255 .phy_id_mask = MARVELL_PHY_ID_MASK,
3256 .name = "Marvell 88E1548P",
Marek Behún41d26bf2021-04-20 09:53:59 +02003257 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3258 .probe = marvell_probe,
Maxim Kochetkovf59babf2020-06-21 10:59:52 +03003259 .features = PHY_GBIT_FIBRE_FEATURES,
Maxim Kochetkov8385b1f2021-04-30 07:57:33 +03003260 .config_init = marvell_1011gbe_config_init,
Maxim Kochetkovf59babf2020-06-21 10:59:52 +03003261 .config_aneg = m88e1510_config_aneg,
3262 .read_status = marvell_read_status,
Maxim Kochetkovf59babf2020-06-21 10:59:52 +03003263 .config_intr = marvell_config_intr,
Ioana Ciorneia0723b32020-11-13 18:52:13 +02003264 .handle_interrupt = marvell_handle_interrupt,
Maxim Kochetkovf59babf2020-06-21 10:59:52 +03003265 .resume = genphy_resume,
3266 .suspend = genphy_suspend,
3267 .read_page = marvell_read_page,
3268 .write_page = marvell_write_page,
3269 .get_sset_count = marvell_get_sset_count,
3270 .get_strings = marvell_get_strings,
3271 .get_stats = marvell_get_stats,
3272 .get_tunable = m88e1540_get_tunable,
3273 .set_tunable = m88e1540_set_tunable,
3274 },
Andy Fleming00db8182005-07-30 19:31:23 -04003275};
3276
Johan Hovold50fd7152014-11-11 19:45:59 +01003277module_phy_driver(marvell_drivers);
David Woodhouse4e4f10f2010-04-02 01:05:56 +00003278
Uwe Kleine-Königcf93c942010-10-03 23:43:32 +00003279static struct mdio_device_id __maybe_unused marvell_tbl[] = {
Michal Simekf5e1cab2013-05-30 20:08:25 +00003280 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
3281 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
3282 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
Robert Hancock18870232020-10-28 11:15:40 -06003283 { MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
Michal Simekf5e1cab2013-05-30 20:08:25 +00003284 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
3285 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
3286 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
3287 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
3288 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
3289 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
Michal Simek3da09a52013-05-30 20:08:26 +00003290 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
Michal Simek10e24caa2013-05-30 20:08:27 +00003291 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
Andrew Lunn819ec8e2015-11-16 23:34:41 +01003292 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
Andrew Lunn60f06fd2017-02-02 00:35:03 +01003293 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02003294 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
Pali Rohár1fe976d2021-04-12 18:57:39 +02003295 { MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
3296 { MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
Marek Behúna978f7c2021-04-20 09:54:03 +02003297 { MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
Maxim Kochetkova602ea82020-06-21 10:59:51 +03003298 { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
Maxim Kochetkovf59babf2020-06-21 10:59:52 +03003299 { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
David Woodhouse4e4f10f2010-04-02 01:05:56 +00003300 { }
3301};
3302
3303MODULE_DEVICE_TABLE(mdio, marvell_tbl);