blob: 7da64208365bd9a6475cdaee67d88affc4359773 [file] [log] [blame]
Andrew Lunna2443fd2019-01-21 19:05:50 +01001// SPDX-License-Identifier: GPL-2.0+
Andy Fleming00db8182005-07-30 19:31:23 -04002/*
3 * drivers/net/phy/marvell.c
4 *
5 * Driver for Marvell PHYs
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 *
Michael Stapelberg3871c382013-03-11 13:56:45 +000011 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
Andy Fleming00db8182005-07-30 19:31:23 -040012 */
Andy Fleming00db8182005-07-30 19:31:23 -040013#include <linux/kernel.h>
Andy Fleming00db8182005-07-30 19:31:23 -040014#include <linux/string.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010015#include <linux/ctype.h>
Andy Fleming00db8182005-07-30 19:31:23 -040016#include <linux/errno.h>
17#include <linux/unistd.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010018#include <linux/hwmon.h>
Andy Fleming00db8182005-07-30 19:31:23 -040019#include <linux/interrupt.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/netdevice.h>
23#include <linux/etherdevice.h>
24#include <linux/skbuff.h>
25#include <linux/spinlock.h>
26#include <linux/mm.h>
27#include <linux/module.h>
Andy Fleming00db8182005-07-30 19:31:23 -040028#include <linux/mii.h>
29#include <linux/ethtool.h>
30#include <linux/phy.h>
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +100031#include <linux/marvell_phy.h>
Heiner Kallweit69f42be2019-03-25 19:35:41 +010032#include <linux/bitfield.h>
David Daneycf41a512010-11-19 12:13:18 +000033#include <linux/of.h>
Andy Fleming00db8182005-07-30 19:31:23 -040034
Avinash Kumareea3b202013-09-30 09:36:44 +053035#include <linux/io.h>
Andy Fleming00db8182005-07-30 19:31:23 -040036#include <asm/irq.h>
Avinash Kumareea3b202013-09-30 09:36:44 +053037#include <linux/uaccess.h>
Andy Fleming00db8182005-07-30 19:31:23 -040038
David Daney27d916d2010-11-19 11:58:52 +000039#define MII_MARVELL_PHY_PAGE 22
Andrew Lunn52295662017-05-25 21:42:08 +020040#define MII_MARVELL_COPPER_PAGE 0x00
41#define MII_MARVELL_FIBER_PAGE 0x01
42#define MII_MARVELL_MSCR_PAGE 0x02
43#define MII_MARVELL_LED_PAGE 0x03
44#define MII_MARVELL_MISC_TEST_PAGE 0x06
45#define MII_MARVELL_WOL_PAGE 0x11
David Daney27d916d2010-11-19 11:58:52 +000046
Andy Fleming00db8182005-07-30 19:31:23 -040047#define MII_M1011_IEVENT 0x13
48#define MII_M1011_IEVENT_CLEAR 0x0000
49
50#define MII_M1011_IMASK 0x12
51#define MII_M1011_IMASK_INIT 0x6400
52#define MII_M1011_IMASK_CLEAR 0x0000
53
Andrew Lunnfecd5e92017-07-30 22:41:49 +020054#define MII_M1011_PHY_SCR 0x10
55#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
Heiner Kallweitf8d975b2019-10-28 20:52:22 +010056#define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +020057#define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
Andrew Lunnfecd5e92017-07-30 22:41:49 +020058#define MII_M1011_PHY_SCR_MDI (0x0 << 5)
59#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
60#define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
Andy Fleming76884672007-02-09 18:13:58 -060061
Heiner Kallweita3bdfce2019-10-19 15:57:33 +020062#define MII_M1011_PHY_SSR 0x11
63#define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
64
Andy Fleming76884672007-02-09 18:13:58 -060065#define MII_M1111_PHY_LED_CONTROL 0x18
66#define MII_M1111_PHY_LED_DIRECT 0x4100
67#define MII_M1111_PHY_LED_COMBINE 0x411c
Kim Phillips895ee682007-06-05 18:46:47 +080068#define MII_M1111_PHY_EXT_CR 0x14
Heiner Kallweit5c6bc512019-10-28 20:53:25 +010069#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
70#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
71#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
Andrew Lunn61111592017-07-30 22:41:46 +020072#define MII_M1111_RGMII_RX_DELAY BIT(7)
73#define MII_M1111_RGMII_TX_DELAY BIT(1)
Kim Phillips895ee682007-06-05 18:46:47 +080074#define MII_M1111_PHY_EXT_SR 0x1b
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030075
76#define MII_M1111_HWCFG_MODE_MASK 0xf
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030077#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
Kapil Juneja4117b5b2007-05-11 18:25:18 -050078#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
Andrew Lunn865b813a2017-07-30 22:41:47 +020079#define MII_M1111_HWCFG_MODE_RTBI 0x7
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +000080#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
Andrew Lunn865b813a2017-07-30 22:41:47 +020081#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
82#define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
83#define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030084
Cyril Chemparathyc477d042010-08-02 09:44:53 +000085#define MII_88E1121_PHY_MSCR_REG 21
86#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
87#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
Russell King424ca4c2018-01-02 10:58:48 +000088#define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
Cyril Chemparathyc477d042010-08-02 09:44:53 +000089
Andrew Lunn0b046802017-01-20 01:37:49 +010090#define MII_88E1121_MISC_TEST 0x1a
91#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
92#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
93#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
94#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
95#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
96#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
97
98#define MII_88E1510_TEMP_SENSOR 0x1b
99#define MII_88E1510_TEMP_SENSOR_MASK 0xff
100
Heiner Kallweit69f42be2019-03-25 19:35:41 +0100101#define MII_88E1540_COPPER_CTRL3 0x1a
102#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
103#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
104#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
105#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
106#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
107#define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
108
Andrew Lunnfee2d542018-01-09 22:42:09 +0100109#define MII_88E6390_MISC_TEST 0x1b
110#define MII_88E6390_MISC_TEST_SAMPLE_1S 0
111#define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
112#define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
113#define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
114#define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
115
116#define MII_88E6390_TEMP_SENSOR 0x1c
117#define MII_88E6390_TEMP_SENSOR_MASK 0xff
118#define MII_88E6390_TEMP_SENSOR_SAMPLES 10
119
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700120#define MII_88E1318S_PHY_MSCR1_REG 16
121#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700122
Michael Stapelberg3871c382013-03-11 13:56:45 +0000123/* Copper Specific Interrupt Enable Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200124#define MII_88E1318S_PHY_CSIER 0x12
Michael Stapelberg3871c382013-03-11 13:56:45 +0000125/* WOL Event Interrupt Enable */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200126#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000127
128/* LED Timer Control Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200129#define MII_88E1318S_PHY_LED_TCR 0x12
130#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
131#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
132#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000133
134/* Magic Packet MAC address registers */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200135#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
136#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
137#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
Michael Stapelberg3871c382013-03-11 13:56:45 +0000138
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200139#define MII_88E1318S_PHY_WOL_CTRL 0x10
140#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
141#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000142
Wang Dongsheng07777242018-07-01 23:15:46 -0700143#define MII_PHY_LED_CTRL 16
Sergei Poselenov140bc922009-04-07 02:01:41 +0000144#define MII_88E1121_PHY_LED_DEF 0x0030
Wang Dongsheng07777242018-07-01 23:15:46 -0700145#define MII_88E1510_PHY_LED_DEF 0x1177
Jian Shena93f7fe2019-04-22 21:52:23 +0800146#define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
Sergei Poselenov140bc922009-04-07 02:01:41 +0000147
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300148#define MII_M1011_PHY_STATUS 0x11
149#define MII_M1011_PHY_STATUS_1000 0x8000
150#define MII_M1011_PHY_STATUS_100 0x4000
151#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
152#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
153#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
154#define MII_M1011_PHY_STATUS_LINK 0x0400
155
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200156#define MII_88E3016_PHY_SPEC_CTRL 0x10
157#define MII_88E3016_DISABLE_SCRAMBLER 0x0200
158#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
Andy Fleming76884672007-02-09 18:13:58 -0600159
Stefan Roese930b37e2016-02-18 10:59:07 +0100160#define MII_88E1510_GEN_CTRL_REG_1 0x14
161#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
162#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
163#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
164
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200165#define LPA_PAUSE_FIBER 0x180
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200166#define LPA_PAUSE_ASYM_FIBER 0x100
167
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200168#define NB_FIBER_STATS 1
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200169
Andy Fleming00db8182005-07-30 19:31:23 -0400170MODULE_DESCRIPTION("Marvell PHY driver");
171MODULE_AUTHOR("Andy Fleming");
172MODULE_LICENSE("GPL");
173
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100174struct marvell_hw_stat {
175 const char *string;
176 u8 page;
177 u8 reg;
178 u8 bits;
179};
180
181static struct marvell_hw_stat marvell_hw_stats[] = {
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200182 { "phy_receive_errors_copper", 0, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100183 { "phy_idle_errors", 0, 10, 8 },
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200184 { "phy_receive_errors_fiber", 1, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100185};
186
187struct marvell_priv {
188 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
Andrew Lunn0b046802017-01-20 01:37:49 +0100189 char *hwmon_name;
190 struct device *hwmon_dev;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100191};
192
Russell King424ca4c2018-01-02 10:58:48 +0000193static int marvell_read_page(struct phy_device *phydev)
Andrew Lunn6427bb22017-05-17 03:26:03 +0200194{
Russell King424ca4c2018-01-02 10:58:48 +0000195 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
196}
197
198static int marvell_write_page(struct phy_device *phydev, int page)
199{
200 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
Andrew Lunn6427bb22017-05-17 03:26:03 +0200201}
202
203static int marvell_set_page(struct phy_device *phydev, int page)
204{
205 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
206}
207
Andy Fleming00db8182005-07-30 19:31:23 -0400208static int marvell_ack_interrupt(struct phy_device *phydev)
209{
210 int err;
211
212 /* Clear the interrupts by reading the reg */
213 err = phy_read(phydev, MII_M1011_IEVENT);
214
215 if (err < 0)
216 return err;
217
218 return 0;
219}
220
221static int marvell_config_intr(struct phy_device *phydev)
222{
223 int err;
224
Andy Fleming76884672007-02-09 18:13:58 -0600225 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
Andrew Lunn23beb382017-05-17 03:26:04 +0200226 err = phy_write(phydev, MII_M1011_IMASK,
227 MII_M1011_IMASK_INIT);
Andy Fleming00db8182005-07-30 19:31:23 -0400228 else
Andrew Lunn23beb382017-05-17 03:26:04 +0200229 err = phy_write(phydev, MII_M1011_IMASK,
230 MII_M1011_IMASK_CLEAR);
Andy Fleming00db8182005-07-30 19:31:23 -0400231
232 return err;
233}
234
David Thomson239aa552015-07-10 16:28:25 +1200235static int marvell_set_polarity(struct phy_device *phydev, int polarity)
236{
237 int reg;
238 int err;
239 int val;
240
241 /* get the current settings */
242 reg = phy_read(phydev, MII_M1011_PHY_SCR);
243 if (reg < 0)
244 return reg;
245
246 val = reg;
247 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
248 switch (polarity) {
249 case ETH_TP_MDI:
250 val |= MII_M1011_PHY_SCR_MDI;
251 break;
252 case ETH_TP_MDI_X:
253 val |= MII_M1011_PHY_SCR_MDI_X;
254 break;
255 case ETH_TP_MDI_AUTO:
256 case ETH_TP_MDI_INVALID:
257 default:
258 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
259 break;
260 }
261
262 if (val != reg) {
263 /* Set the new polarity value in the register */
264 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
265 if (err)
266 return err;
267 }
268
Florian Fainellid6ab9332018-09-25 11:28:46 -0700269 return val != reg;
David Thomson239aa552015-07-10 16:28:25 +1200270}
271
Andy Fleming00db8182005-07-30 19:31:23 -0400272static int marvell_config_aneg(struct phy_device *phydev)
273{
Florian Fainellid6ab9332018-09-25 11:28:46 -0700274 int changed = 0;
Andy Fleming00db8182005-07-30 19:31:23 -0400275 int err;
276
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530277 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Andy Fleming76884672007-02-09 18:13:58 -0600278 if (err < 0)
279 return err;
280
Florian Fainellid6ab9332018-09-25 11:28:46 -0700281 changed = err;
282
Andy Fleming76884672007-02-09 18:13:58 -0600283 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
284 MII_M1111_PHY_LED_DIRECT);
285 if (err < 0)
286 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400287
288 err = genphy_config_aneg(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000289 if (err < 0)
290 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400291
Florian Fainellid6ab9332018-09-25 11:28:46 -0700292 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200293 /* A write to speed/duplex bits (that is performed by
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000294 * genphy_config_aneg() call above) must be followed by
295 * a software reset. Otherwise, the write has no effect.
296 */
Andrew Lunn34386342017-07-30 22:41:45 +0200297 err = genphy_soft_reset(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000298 if (err < 0)
299 return err;
300 }
301
302 return 0;
Andy Fleming00db8182005-07-30 19:31:23 -0400303}
304
Andrew Lunnf2899782017-05-23 17:49:13 +0200305static int m88e1101_config_aneg(struct phy_device *phydev)
306{
307 int err;
308
309 /* This Marvell PHY has an errata which requires
310 * that certain registers get written in order
311 * to restart autonegotiation
312 */
Andrew Lunn34386342017-07-30 22:41:45 +0200313 err = genphy_soft_reset(phydev);
Andrew Lunnf2899782017-05-23 17:49:13 +0200314 if (err < 0)
315 return err;
316
317 err = phy_write(phydev, 0x1d, 0x1f);
318 if (err < 0)
319 return err;
320
321 err = phy_write(phydev, 0x1e, 0x200c);
322 if (err < 0)
323 return err;
324
325 err = phy_write(phydev, 0x1d, 0x5);
326 if (err < 0)
327 return err;
328
329 err = phy_write(phydev, 0x1e, 0);
330 if (err < 0)
331 return err;
332
333 err = phy_write(phydev, 0x1e, 0x100);
334 if (err < 0)
335 return err;
336
337 return marvell_config_aneg(phydev);
338}
339
David Daneycf41a512010-11-19 12:13:18 +0000340#ifdef CONFIG_OF_MDIO
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200341/* Set and/or override some configuration registers based on the
David Daneycf41a512010-11-19 12:13:18 +0000342 * marvell,reg-init property stored in the of_node for the phydev.
343 *
344 * marvell,reg-init = <reg-page reg mask value>,...;
345 *
346 * There may be one or more sets of <reg-page reg mask value>:
347 *
348 * reg-page: which register bank to use.
349 * reg: the register.
350 * mask: if non-zero, ANDed with existing register value.
351 * value: ORed with the masked value and written to the regiser.
352 *
353 */
354static int marvell_of_reg_init(struct phy_device *phydev)
355{
356 const __be32 *paddr;
Russell King424ca4c2018-01-02 10:58:48 +0000357 int len, i, saved_page, current_page, ret = 0;
David Daneycf41a512010-11-19 12:13:18 +0000358
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100359 if (!phydev->mdio.dev.of_node)
David Daneycf41a512010-11-19 12:13:18 +0000360 return 0;
361
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100362 paddr = of_get_property(phydev->mdio.dev.of_node,
363 "marvell,reg-init", &len);
David Daneycf41a512010-11-19 12:13:18 +0000364 if (!paddr || len < (4 * sizeof(*paddr)))
365 return 0;
366
Russell King424ca4c2018-01-02 10:58:48 +0000367 saved_page = phy_save_page(phydev);
David Daneycf41a512010-11-19 12:13:18 +0000368 if (saved_page < 0)
Russell King424ca4c2018-01-02 10:58:48 +0000369 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000370 current_page = saved_page;
371
David Daneycf41a512010-11-19 12:13:18 +0000372 len /= sizeof(*paddr);
373 for (i = 0; i < len - 3; i += 4) {
Andrew Lunn6427bb22017-05-17 03:26:03 +0200374 u16 page = be32_to_cpup(paddr + i);
David Daneycf41a512010-11-19 12:13:18 +0000375 u16 reg = be32_to_cpup(paddr + i + 1);
376 u16 mask = be32_to_cpup(paddr + i + 2);
377 u16 val_bits = be32_to_cpup(paddr + i + 3);
378 int val;
379
Andrew Lunn6427bb22017-05-17 03:26:03 +0200380 if (page != current_page) {
381 current_page = page;
Russell King424ca4c2018-01-02 10:58:48 +0000382 ret = marvell_write_page(phydev, page);
David Daneycf41a512010-11-19 12:13:18 +0000383 if (ret < 0)
384 goto err;
385 }
386
387 val = 0;
388 if (mask) {
Russell King424ca4c2018-01-02 10:58:48 +0000389 val = __phy_read(phydev, reg);
David Daneycf41a512010-11-19 12:13:18 +0000390 if (val < 0) {
391 ret = val;
392 goto err;
393 }
394 val &= mask;
395 }
396 val |= val_bits;
397
Russell King424ca4c2018-01-02 10:58:48 +0000398 ret = __phy_write(phydev, reg, val);
David Daneycf41a512010-11-19 12:13:18 +0000399 if (ret < 0)
400 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000401 }
402err:
Russell King424ca4c2018-01-02 10:58:48 +0000403 return phy_restore_page(phydev, saved_page, ret);
David Daneycf41a512010-11-19 12:13:18 +0000404}
405#else
406static int marvell_of_reg_init(struct phy_device *phydev)
407{
408 return 0;
409}
410#endif /* CONFIG_OF_MDIO */
411
Andrew Lunn864dc722017-07-30 22:41:48 +0200412static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
Sergei Poselenov140bc922009-04-07 02:01:41 +0000413{
Russell King424ca4c2018-01-02 10:58:48 +0000414 int mscr;
Andrew Lunn864dc722017-07-30 22:41:48 +0200415
416 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
Russell King424ca4c2018-01-02 10:58:48 +0000417 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
418 MII_88E1121_PHY_MSCR_TX_DELAY;
Andrew Lunn864dc722017-07-30 22:41:48 +0200419 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
Russell King424ca4c2018-01-02 10:58:48 +0000420 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
Andrew Lunn864dc722017-07-30 22:41:48 +0200421 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
Russell King424ca4c2018-01-02 10:58:48 +0000422 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
423 else
424 mscr = 0;
Andrew Lunn864dc722017-07-30 22:41:48 +0200425
Russell King424ca4c2018-01-02 10:58:48 +0000426 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
427 MII_88E1121_PHY_MSCR_REG,
428 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
Andrew Lunn864dc722017-07-30 22:41:48 +0200429}
430
431static int m88e1121_config_aneg(struct phy_device *phydev)
432{
Florian Fainellid6ab9332018-09-25 11:28:46 -0700433 int changed = 0;
Andrew Lunn864dc722017-07-30 22:41:48 +0200434 int err = 0;
435
436 if (phy_interface_is_rgmii(phydev)) {
437 err = m88e1121_config_aneg_rgmii_delays(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000438 if (err < 0)
Andrew Lunn864dc722017-07-30 22:41:48 +0200439 return err;
440 }
441
Andrew Lunnfecd5e92017-07-30 22:41:49 +0200442 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000443 if (err < 0)
444 return err;
445
Florian Fainellid6ab9332018-09-25 11:28:46 -0700446 changed = err;
447
448 err = genphy_config_aneg(phydev);
449 if (err < 0)
450 return err;
451
David S. Miller4b1bd692018-09-25 22:41:31 -0700452 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
Florian Fainellid6ab9332018-09-25 11:28:46 -0700453 /* A software reset is used to ensure a "commit" of the
454 * changes is done.
455 */
456 err = genphy_soft_reset(phydev);
457 if (err < 0)
458 return err;
459 }
460
461 return 0;
Sergei Poselenov140bc922009-04-07 02:01:41 +0000462}
463
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700464static int m88e1318_config_aneg(struct phy_device *phydev)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700465{
Russell King424ca4c2018-01-02 10:58:48 +0000466 int err;
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700467
Russell King424ca4c2018-01-02 10:58:48 +0000468 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
469 MII_88E1318S_PHY_MSCR1_REG,
470 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700471 if (err < 0)
472 return err;
473
474 return m88e1121_config_aneg(phydev);
475}
476
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200477/**
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100478 * linkmode_adv_to_fiber_adv_t
479 * @advertise: the linkmode advertisement settings
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200480 *
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100481 * A small helper function that translates linkmode advertisement
482 * settings to phy autonegotiation advertisements for the MII_ADV
483 * register for fiber link.
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200484 */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100485static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200486{
487 u32 result = 0;
488
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100489 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
Russell King20ecf422019-12-17 13:39:42 +0000490 result |= ADVERTISE_1000XHALF;
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100491 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
Russell King20ecf422019-12-17 13:39:42 +0000492 result |= ADVERTISE_1000XFULL;
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200493
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100494 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
495 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
Russell King20ecf422019-12-17 13:39:42 +0000496 result |= ADVERTISE_1000XPSE_ASYM;
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100497 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
Russell King20ecf422019-12-17 13:39:42 +0000498 result |= ADVERTISE_1000XPAUSE;
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200499
500 return result;
501}
502
503/**
504 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
505 * @phydev: target phy_device struct
506 *
507 * Description: If auto-negotiation is enabled, we configure the
508 * advertising, and then restart auto-negotiation. If it is not
509 * enabled, then we write the BMCR. Adapted for fiber link in
510 * some Marvell's devices.
511 */
512static int marvell_config_aneg_fiber(struct phy_device *phydev)
513{
514 int changed = 0;
515 int err;
Russell King9f4bae72019-12-17 13:39:47 +0000516 u16 adv;
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200517
518 if (phydev->autoneg != AUTONEG_ENABLE)
519 return genphy_setup_forced(phydev);
520
521 /* Only allow advertising what this PHY supports */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100522 linkmode_and(phydev->advertising, phydev->advertising,
523 phydev->supported);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200524
Russell King9f4bae72019-12-17 13:39:47 +0000525 adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
526
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200527 /* Setup fiber advertisement */
Russell King9f4bae72019-12-17 13:39:47 +0000528 err = phy_modify_changed(phydev, MII_ADVERTISE,
529 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
530 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
531 adv);
532 if (err < 0)
533 return err;
534 if (err > 0)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200535 changed = 1;
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200536
537 if (changed == 0) {
538 /* Advertisement hasn't changed, but maybe aneg was never on to
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200539 * begin with? Or maybe phy was isolated?
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200540 */
541 int ctl = phy_read(phydev, MII_BMCR);
542
543 if (ctl < 0)
544 return ctl;
545
546 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
547 changed = 1; /* do restart aneg */
548 }
549
550 /* Only restart aneg if we are advertising something different
551 * than we were before.
552 */
553 if (changed > 0)
554 changed = genphy_restart_aneg(phydev);
555
556 return changed;
557}
558
Michal Simek10e24caa2013-05-30 20:08:27 +0000559static int m88e1510_config_aneg(struct phy_device *phydev)
560{
561 int err;
562
Andrew Lunn52295662017-05-25 21:42:08 +0200563 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200564 if (err < 0)
565 goto error;
566
567 /* Configure the copper link first */
Michal Simek10e24caa2013-05-30 20:08:27 +0000568 err = m88e1318_config_aneg(phydev);
569 if (err < 0)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200570 goto error;
Michal Simek10e24caa2013-05-30 20:08:27 +0000571
Russell Kingde9c4e02017-12-13 09:22:03 +0000572 /* Do not touch the fiber page if we're in copper->sgmii mode */
573 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
574 return 0;
575
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200576 /* Then the fiber link */
Andrew Lunn52295662017-05-25 21:42:08 +0200577 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200578 if (err < 0)
579 goto error;
580
581 err = marvell_config_aneg_fiber(phydev);
582 if (err < 0)
583 goto error;
584
Andrew Lunn52295662017-05-25 21:42:08 +0200585 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200586
587error:
Andrew Lunn52295662017-05-25 21:42:08 +0200588 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200589 return err;
Clemens Gruber79be1a12016-02-15 23:46:45 +0100590}
591
Wang Dongsheng07777242018-07-01 23:15:46 -0700592static void marvell_config_led(struct phy_device *phydev)
593{
594 u16 def_config;
595 int err;
596
597 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
598 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
599 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
600 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
601 def_config = MII_88E1121_PHY_LED_DEF;
602 break;
603 /* Default PHY LED config:
604 * LED[0] .. 1000Mbps Link
605 * LED[1] .. 100Mbps Link
606 * LED[2] .. Blink, Activity
607 */
608 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
Jian Shena93f7fe2019-04-22 21:52:23 +0800609 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
610 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
611 else
612 def_config = MII_88E1510_PHY_LED_DEF;
Wang Dongsheng07777242018-07-01 23:15:46 -0700613 break;
614 default:
615 return;
616 }
617
618 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
619 def_config);
620 if (err < 0)
Andrew Lunnab2a6052018-09-29 23:04:10 +0200621 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
Wang Dongsheng07777242018-07-01 23:15:46 -0700622}
623
Clemens Gruber79be1a12016-02-15 23:46:45 +0100624static int marvell_config_init(struct phy_device *phydev)
625{
Wang Dongsheng07777242018-07-01 23:15:46 -0700626 /* Set defalut LED */
627 marvell_config_led(phydev);
628
Clemens Gruber79be1a12016-02-15 23:46:45 +0100629 /* Set registers from marvell,reg-init DT property */
Michal Simek10e24caa2013-05-30 20:08:27 +0000630 return marvell_of_reg_init(phydev);
631}
632
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200633static int m88e3016_config_init(struct phy_device *phydev)
634{
Russell Kingfea23fb2018-01-02 10:58:58 +0000635 int ret;
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200636
637 /* Enable Scrambler and Auto-Crossover */
Russell Kingfea23fb2018-01-02 10:58:58 +0000638 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
Russell Kingf1028522018-01-05 16:07:10 +0000639 MII_88E3016_DISABLE_SCRAMBLER,
Russell Kingfea23fb2018-01-02 10:58:58 +0000640 MII_88E3016_AUTO_MDIX_CROSSOVER);
641 if (ret < 0)
642 return ret;
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200643
Clemens Gruber79be1a12016-02-15 23:46:45 +0100644 return marvell_config_init(phydev);
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200645}
646
Andrew Lunn865b813a2017-07-30 22:41:47 +0200647static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
648 u16 mode,
649 int fibre_copper_auto)
650{
Andrew Lunn865b813a2017-07-30 22:41:47 +0200651 if (fibre_copper_auto)
Russell Kingfea23fb2018-01-02 10:58:58 +0000652 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
Andrew Lunn865b813a2017-07-30 22:41:47 +0200653
Russell Kingfea23fb2018-01-02 10:58:58 +0000654 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
Russell Kingf1028522018-01-05 16:07:10 +0000655 MII_M1111_HWCFG_MODE_MASK |
656 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
657 MII_M1111_HWCFG_FIBER_COPPER_RES,
Russell Kingfea23fb2018-01-02 10:58:58 +0000658 mode);
Andrew Lunn865b813a2017-07-30 22:41:47 +0200659}
660
Andrew Lunn61111592017-07-30 22:41:46 +0200661static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
Kim Phillips895ee682007-06-05 18:46:47 +0800662{
Russell Kingfea23fb2018-01-02 10:58:58 +0000663 int delay;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200664
665 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Russell Kingfea23fb2018-01-02 10:58:58 +0000666 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200667 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
Russell Kingfea23fb2018-01-02 10:58:58 +0000668 delay = MII_M1111_RGMII_RX_DELAY;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200669 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
Russell Kingfea23fb2018-01-02 10:58:58 +0000670 delay = MII_M1111_RGMII_TX_DELAY;
671 } else {
672 delay = 0;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200673 }
674
Russell Kingfea23fb2018-01-02 10:58:58 +0000675 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
Russell Kingf1028522018-01-05 16:07:10 +0000676 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
Russell Kingfea23fb2018-01-02 10:58:58 +0000677 delay);
Andrew Lunn61111592017-07-30 22:41:46 +0200678}
679
680static int m88e1111_config_init_rgmii(struct phy_device *phydev)
681{
682 int temp;
683 int err;
684
685 err = m88e1111_config_init_rgmii_delays(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200686 if (err < 0)
687 return err;
688
689 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
690 if (temp < 0)
691 return temp;
692
693 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
694
695 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
696 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
697 else
698 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
699
700 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
701}
702
703static int m88e1111_config_init_sgmii(struct phy_device *phydev)
704{
705 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200706
Andrew Lunn865b813a2017-07-30 22:41:47 +0200707 err = m88e1111_config_init_hwcfg_mode(
708 phydev,
709 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
710 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200711 if (err < 0)
712 return err;
713
714 /* make sure copper is selected */
Andrew Lunn52295662017-05-25 21:42:08 +0200715 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200716}
717
718static int m88e1111_config_init_rtbi(struct phy_device *phydev)
719{
Andrew Lunn61111592017-07-30 22:41:46 +0200720 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200721
Andrew Lunn61111592017-07-30 22:41:46 +0200722 err = m88e1111_config_init_rgmii_delays(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000723 if (err < 0)
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200724 return err;
725
Andrew Lunn865b813a2017-07-30 22:41:47 +0200726 err = m88e1111_config_init_hwcfg_mode(
727 phydev,
728 MII_M1111_HWCFG_MODE_RTBI,
729 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200730 if (err < 0)
731 return err;
732
733 /* soft reset */
Andrew Lunn34386342017-07-30 22:41:45 +0200734 err = genphy_soft_reset(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200735 if (err < 0)
736 return err;
737
Andrew Lunn865b813a2017-07-30 22:41:47 +0200738 return m88e1111_config_init_hwcfg_mode(
739 phydev,
740 MII_M1111_HWCFG_MODE_RTBI,
741 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200742}
743
744static int m88e1111_config_init(struct phy_device *phydev)
745{
746 int err;
747
Florian Fainelli32a64162015-05-26 12:19:59 -0700748 if (phy_interface_is_rgmii(phydev)) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200749 err = m88e1111_config_init_rgmii(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000750 if (err < 0)
Kim Phillips895ee682007-06-05 18:46:47 +0800751 return err;
752 }
753
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500754 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200755 err = m88e1111_config_init_sgmii(phydev);
Madalin Bucur07151bc2015-08-07 17:07:50 +0800756 if (err < 0)
757 return err;
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500758 }
759
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000760 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200761 err = m88e1111_config_init_rtbi(phydev);
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000762 if (err < 0)
763 return err;
764 }
765
David Daneycf41a512010-11-19 12:13:18 +0000766 err = marvell_of_reg_init(phydev);
767 if (err < 0)
768 return err;
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000769
Andrew Lunn34386342017-07-30 22:41:45 +0200770 return genphy_soft_reset(phydev);
Kim Phillips895ee682007-06-05 18:46:47 +0800771}
772
Heiner Kallweit5c6bc512019-10-28 20:53:25 +0100773static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
774{
775 int val, cnt, enable;
776
777 val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
778 if (val < 0)
779 return val;
780
781 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
782 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
783
784 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
785
786 return 0;
787}
788
789static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
790{
791 int val;
792
793 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
794 return -E2BIG;
795
796 if (!cnt)
797 return phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
798 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
799
800 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
801 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
802
803 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
804 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
805 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
806 val);
807}
808
809static int m88e1111_get_tunable(struct phy_device *phydev,
810 struct ethtool_tunable *tuna, void *data)
811{
812 switch (tuna->id) {
813 case ETHTOOL_PHY_DOWNSHIFT:
814 return m88e1111_get_downshift(phydev, data);
815 default:
816 return -EOPNOTSUPP;
817 }
818}
819
820static int m88e1111_set_tunable(struct phy_device *phydev,
821 struct ethtool_tunable *tuna, const void *data)
822{
823 switch (tuna->id) {
824 case ETHTOOL_PHY_DOWNSHIFT:
825 return m88e1111_set_downshift(phydev, *(const u8 *)data);
826 default:
827 return -EOPNOTSUPP;
828 }
829}
830
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100831static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200832{
833 int val, cnt, enable;
834
835 val = phy_read(phydev, MII_M1011_PHY_SCR);
836 if (val < 0)
837 return val;
838
839 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
Heiner Kallweitf8d975b2019-10-28 20:52:22 +0100840 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200841
842 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
843
844 return 0;
845}
846
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100847static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200848{
849 int val;
850
851 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
852 return -E2BIG;
853
854 if (!cnt)
855 return phy_clear_bits(phydev, MII_M1011_PHY_SCR,
856 MII_M1011_PHY_SCR_DOWNSHIFT_EN);
857
858 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
Heiner Kallweitf8d975b2019-10-28 20:52:22 +0100859 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200860
861 return phy_modify(phydev, MII_M1011_PHY_SCR,
862 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
Heiner Kallweitf8d975b2019-10-28 20:52:22 +0100863 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200864 val);
865}
866
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100867static int m88e1011_get_tunable(struct phy_device *phydev,
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200868 struct ethtool_tunable *tuna, void *data)
869{
870 switch (tuna->id) {
871 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100872 return m88e1011_get_downshift(phydev, data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200873 default:
874 return -EOPNOTSUPP;
875 }
876}
877
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100878static int m88e1011_set_tunable(struct phy_device *phydev,
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200879 struct ethtool_tunable *tuna, const void *data)
880{
881 switch (tuna->id) {
882 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100883 return m88e1011_set_downshift(phydev, *(const u8 *)data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200884 default:
885 return -EOPNOTSUPP;
886 }
887}
888
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100889static void m88e1011_link_change_notify(struct phy_device *phydev)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200890{
891 int status;
892
893 if (phydev->state != PHY_RUNNING)
894 return;
895
896 /* we may be on fiber page currently */
897 status = phy_read_paged(phydev, MII_MARVELL_COPPER_PAGE,
898 MII_M1011_PHY_SSR);
899
900 if (status > 0 && status & MII_M1011_PHY_SSR_DOWNSHIFT)
901 phydev_warn(phydev, "Downshift occurred! Cabling may be defective.\n");
902}
903
Heiner Kallweite2d861c2019-10-19 15:58:19 +0200904static int m88e1116r_config_init(struct phy_device *phydev)
905{
906 int err;
907
908 err = genphy_soft_reset(phydev);
909 if (err < 0)
910 return err;
911
912 msleep(500);
913
914 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
915 if (err < 0)
916 return err;
917
918 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
919 if (err < 0)
920 return err;
921
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100922 err = m88e1011_set_downshift(phydev, 8);
Heiner Kallweite2d861c2019-10-19 15:58:19 +0200923 if (err < 0)
924 return err;
925
926 if (phy_interface_is_rgmii(phydev)) {
927 err = m88e1121_config_aneg_rgmii_delays(phydev);
928 if (err < 0)
929 return err;
930 }
931
932 err = genphy_soft_reset(phydev);
933 if (err < 0)
934 return err;
935
936 return marvell_config_init(phydev);
937}
938
Esben Haabendaldd9a1222018-04-05 22:40:29 +0200939static int m88e1318_config_init(struct phy_device *phydev)
940{
941 if (phy_interrupt_is_valid(phydev)) {
942 int err = phy_modify_paged(
943 phydev, MII_MARVELL_LED_PAGE,
944 MII_88E1318S_PHY_LED_TCR,
945 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
946 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
947 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
948 if (err < 0)
949 return err;
950 }
951
Wang Dongsheng07777242018-07-01 23:15:46 -0700952 return marvell_config_init(phydev);
Esben Haabendaldd9a1222018-04-05 22:40:29 +0200953}
954
Clemens Gruber407353e2016-02-23 20:16:58 +0100955static int m88e1510_config_init(struct phy_device *phydev)
956{
957 int err;
Clemens Gruber407353e2016-02-23 20:16:58 +0100958
959 /* SGMII-to-Copper mode initialization */
960 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
961 /* Select page 18 */
Andrew Lunn6427bb22017-05-17 03:26:03 +0200962 err = marvell_set_page(phydev, 18);
Clemens Gruber407353e2016-02-23 20:16:58 +0100963 if (err < 0)
964 return err;
965
966 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
Russell Kingfea23fb2018-01-02 10:58:58 +0000967 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
Russell Kingf1028522018-01-05 16:07:10 +0000968 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
Russell Kingfea23fb2018-01-02 10:58:58 +0000969 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
Clemens Gruber407353e2016-02-23 20:16:58 +0100970 if (err < 0)
971 return err;
972
973 /* PHY reset is necessary after changing MODE[2:0] */
Russell Kingfea23fb2018-01-02 10:58:58 +0000974 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
975 MII_88E1510_GEN_CTRL_REG_1_RESET);
Clemens Gruber407353e2016-02-23 20:16:58 +0100976 if (err < 0)
977 return err;
978
979 /* Reset page selection */
Andrew Lunn52295662017-05-25 21:42:08 +0200980 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Clemens Gruber407353e2016-02-23 20:16:58 +0100981 if (err < 0)
982 return err;
983 }
984
Esben Haabendaldd9a1222018-04-05 22:40:29 +0200985 return m88e1318_config_init(phydev);
Clemens Gruber407353e2016-02-23 20:16:58 +0100986}
987
Ron Madrid605f1962008-11-06 09:05:26 +0000988static int m88e1118_config_aneg(struct phy_device *phydev)
989{
990 int err;
991
Andrew Lunn34386342017-07-30 22:41:45 +0200992 err = genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +0000993 if (err < 0)
994 return err;
995
Andrew Lunnfecd5e92017-07-30 22:41:49 +0200996 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Ron Madrid605f1962008-11-06 09:05:26 +0000997 if (err < 0)
998 return err;
999
1000 err = genphy_config_aneg(phydev);
1001 return 0;
1002}
1003
1004static int m88e1118_config_init(struct phy_device *phydev)
1005{
1006 int err;
1007
1008 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +02001009 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +00001010 if (err < 0)
1011 return err;
1012
1013 /* Enable 1000 Mbit */
1014 err = phy_write(phydev, 0x15, 0x1070);
1015 if (err < 0)
1016 return err;
1017
1018 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +02001019 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +00001020 if (err < 0)
1021 return err;
1022
1023 /* Adjust LED Control */
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001024 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1025 err = phy_write(phydev, 0x10, 0x1100);
1026 else
1027 err = phy_write(phydev, 0x10, 0x021e);
Ron Madrid605f1962008-11-06 09:05:26 +00001028 if (err < 0)
1029 return err;
1030
David Daneycf41a512010-11-19 12:13:18 +00001031 err = marvell_of_reg_init(phydev);
1032 if (err < 0)
1033 return err;
1034
Ron Madrid605f1962008-11-06 09:05:26 +00001035 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +02001036 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +00001037 if (err < 0)
1038 return err;
1039
Andrew Lunn34386342017-07-30 22:41:45 +02001040 return genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +00001041}
1042
David Daney90600732010-11-19 11:58:53 +00001043static int m88e1149_config_init(struct phy_device *phydev)
1044{
1045 int err;
1046
1047 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +02001048 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
David Daney90600732010-11-19 11:58:53 +00001049 if (err < 0)
1050 return err;
1051
1052 /* Enable 1000 Mbit */
1053 err = phy_write(phydev, 0x15, 0x1048);
1054 if (err < 0)
1055 return err;
1056
David Daneycf41a512010-11-19 12:13:18 +00001057 err = marvell_of_reg_init(phydev);
1058 if (err < 0)
1059 return err;
1060
David Daney90600732010-11-19 11:58:53 +00001061 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +02001062 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
David Daney90600732010-11-19 11:58:53 +00001063 if (err < 0)
1064 return err;
1065
Andrew Lunn34386342017-07-30 22:41:45 +02001066 return genphy_soft_reset(phydev);
David Daney90600732010-11-19 11:58:53 +00001067}
1068
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001069static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1070{
1071 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001072
Andrew Lunn61111592017-07-30 22:41:46 +02001073 err = m88e1111_config_init_rgmii_delays(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001074 if (err < 0)
1075 return err;
1076
1077 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1078 err = phy_write(phydev, 0x1d, 0x0012);
1079 if (err < 0)
1080 return err;
1081
Russell Kingf1028522018-01-05 16:07:10 +00001082 err = phy_modify(phydev, 0x1e, 0x0fc0,
Russell Kingfea23fb2018-01-02 10:58:58 +00001083 2 << 9 | /* 36 ohm */
1084 2 << 6); /* 39 ohm */
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001085 if (err < 0)
1086 return err;
1087
1088 err = phy_write(phydev, 0x1d, 0x3);
1089 if (err < 0)
1090 return err;
1091
1092 err = phy_write(phydev, 0x1e, 0x8000);
1093 }
1094 return err;
1095}
1096
1097static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1098{
Andrew Lunn865b813a2017-07-30 22:41:47 +02001099 return m88e1111_config_init_hwcfg_mode(
1100 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1101 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001102}
1103
Andy Fleming76884672007-02-09 18:13:58 -06001104static int m88e1145_config_init(struct phy_device *phydev)
1105{
1106 int err;
1107
1108 /* Take care of errata E0 & E1 */
1109 err = phy_write(phydev, 0x1d, 0x001b);
1110 if (err < 0)
1111 return err;
1112
1113 err = phy_write(phydev, 0x1e, 0x418f);
1114 if (err < 0)
1115 return err;
1116
1117 err = phy_write(phydev, 0x1d, 0x0016);
1118 if (err < 0)
1119 return err;
1120
1121 err = phy_write(phydev, 0x1e, 0xa2da);
1122 if (err < 0)
1123 return err;
1124
Kim Phillips895ee682007-06-05 18:46:47 +08001125 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001126 err = m88e1145_config_init_rgmii(phydev);
Andy Fleming76884672007-02-09 18:13:58 -06001127 if (err < 0)
1128 return err;
Andy Fleming76884672007-02-09 18:13:58 -06001129 }
1130
Viet Nga Daob0224172014-10-23 19:41:53 -07001131 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001132 err = m88e1145_config_init_sgmii(phydev);
Viet Nga Daob0224172014-10-23 19:41:53 -07001133 if (err < 0)
1134 return err;
1135 }
1136
David Daneycf41a512010-11-19 12:13:18 +00001137 err = marvell_of_reg_init(phydev);
1138 if (err < 0)
1139 return err;
1140
Andy Fleming76884672007-02-09 18:13:58 -06001141 return 0;
1142}
Andy Fleming00db8182005-07-30 19:31:23 -04001143
Heiner Kallweit69f42be2019-03-25 19:35:41 +01001144static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1145{
1146 int val;
1147
1148 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1149 if (val < 0)
1150 return val;
1151
1152 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1153 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1154 return 0;
1155 }
1156
1157 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1158
1159 switch (val) {
1160 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1161 *msecs = 0;
1162 break;
1163 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1164 *msecs = 10;
1165 break;
1166 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1167 *msecs = 20;
1168 break;
1169 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1170 *msecs = 40;
1171 break;
1172 default:
1173 return -EINVAL;
1174 }
1175
1176 return 0;
1177}
1178
1179static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1180{
1181 struct ethtool_eee eee;
1182 int val, ret;
1183
1184 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1185 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1186 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1187
1188 /* According to the Marvell data sheet EEE must be disabled for
1189 * Fast Link Down detection to work properly
1190 */
1191 ret = phy_ethtool_get_eee(phydev, &eee);
1192 if (!ret && eee.eee_enabled) {
1193 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1194 return -EBUSY;
1195 }
1196
1197 if (*msecs <= 5)
1198 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1199 else if (*msecs <= 15)
1200 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1201 else if (*msecs <= 30)
1202 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1203 else
1204 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1205
1206 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1207
1208 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1209 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1210 if (ret)
1211 return ret;
1212
1213 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1214 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1215}
1216
1217static int m88e1540_get_tunable(struct phy_device *phydev,
1218 struct ethtool_tunable *tuna, void *data)
1219{
1220 switch (tuna->id) {
1221 case ETHTOOL_PHY_FAST_LINK_DOWN:
1222 return m88e1540_get_fld(phydev, data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001223 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001224 return m88e1011_get_downshift(phydev, data);
Heiner Kallweit69f42be2019-03-25 19:35:41 +01001225 default:
1226 return -EOPNOTSUPP;
1227 }
1228}
1229
1230static int m88e1540_set_tunable(struct phy_device *phydev,
1231 struct ethtool_tunable *tuna, const void *data)
1232{
1233 switch (tuna->id) {
1234 case ETHTOOL_PHY_FAST_LINK_DOWN:
1235 return m88e1540_set_fld(phydev, data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001236 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001237 return m88e1011_set_downshift(phydev, *(const u8 *)data);
Heiner Kallweit69f42be2019-03-25 19:35:41 +01001238 default:
1239 return -EOPNOTSUPP;
1240 }
1241}
1242
Andrew Lunn8cbcdc12019-01-10 22:48:36 +01001243/* The VOD can be out of specification on link up. Poke an
1244 * undocumented register, in an undocumented page, with a magic value
1245 * to fix this.
1246 */
1247static int m88e6390_errata(struct phy_device *phydev)
1248{
1249 int err;
1250
1251 err = phy_write(phydev, MII_BMCR,
1252 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1253 if (err)
1254 return err;
1255
1256 usleep_range(300, 400);
1257
1258 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1259 if (err)
1260 return err;
1261
1262 return genphy_soft_reset(phydev);
1263}
1264
1265static int m88e6390_config_aneg(struct phy_device *phydev)
1266{
1267 int err;
1268
1269 err = m88e6390_errata(phydev);
1270 if (err)
1271 return err;
1272
1273 return m88e1510_config_aneg(phydev);
1274}
1275
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001276/**
Andrew Lunnab9cb722018-12-05 21:49:42 +01001277 * fiber_lpa_mod_linkmode_lpa_t
Andrew Lunnc0ec3c22018-11-10 23:43:34 +01001278 * @advertising: the linkmode advertisement settings
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001279 * @lpa: value of the MII_LPA register for fiber link
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001280 *
Andrew Lunnab9cb722018-12-05 21:49:42 +01001281 * A small helper function that translates MII_LPA bits to linkmode LP
1282 * advertisement settings. Other bits in advertising are left
1283 * unchanged.
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001284 */
Andrew Lunnab9cb722018-12-05 21:49:42 +01001285static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001286{
Andrew Lunnab9cb722018-12-05 21:49:42 +01001287 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
Russell King20ecf422019-12-17 13:39:42 +00001288 advertising, lpa & LPA_1000XHALF);
Andrew Lunnab9cb722018-12-05 21:49:42 +01001289
1290 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
Russell King20ecf422019-12-17 13:39:42 +00001291 advertising, lpa & LPA_1000XFULL);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001292}
1293
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001294static int marvell_read_status_page_an(struct phy_device *phydev,
Russell Kingd2004e22019-12-17 13:39:36 +00001295 int fiber, int status)
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001296{
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001297 int lpa;
Russell Kingfcf1f592019-12-17 13:39:21 +00001298 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001299
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001300 if (!fiber) {
Russell Kingfcf1f592019-12-17 13:39:21 +00001301 err = genphy_read_lpa(phydev);
1302 if (err < 0)
1303 return err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001304
Russell Kingaf006242019-12-17 13:39:06 +00001305 phy_resolve_aneg_pause(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001306 } else {
Russell Kingfcf1f592019-12-17 13:39:21 +00001307 lpa = phy_read(phydev, MII_LPA);
1308 if (lpa < 0)
1309 return lpa;
1310
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001311 /* The fiber link is only 1000M capable */
Andrew Lunnab9cb722018-12-05 21:49:42 +01001312 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001313
1314 if (phydev->duplex == DUPLEX_FULL) {
1315 if (!(lpa & LPA_PAUSE_FIBER)) {
1316 phydev->pause = 0;
1317 phydev->asym_pause = 0;
1318 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1319 phydev->pause = 1;
1320 phydev->asym_pause = 1;
1321 } else {
1322 phydev->pause = 1;
1323 phydev->asym_pause = 0;
1324 }
1325 }
1326 }
Russell Kingfcf1f592019-12-17 13:39:21 +00001327
1328 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1329 phydev->duplex = DUPLEX_FULL;
1330 else
1331 phydev->duplex = DUPLEX_HALF;
1332
1333 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1334 case MII_M1011_PHY_STATUS_1000:
1335 phydev->speed = SPEED_1000;
1336 break;
1337
1338 case MII_M1011_PHY_STATUS_100:
1339 phydev->speed = SPEED_100;
1340 break;
1341
1342 default:
1343 phydev->speed = SPEED_10;
1344 break;
1345 }
1346
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001347 return 0;
1348}
1349
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001350/* marvell_read_status_page
1351 *
Jeff Garzikf0c88f92008-03-25 23:53:24 -04001352 * Description:
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001353 * Check the link, then figure out the current state
1354 * by comparing what we advertise with what the link partner
1355 * advertises. Start by checking the gigabit possibilities,
1356 * then move on to 10/100.
1357 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001358static int marvell_read_status_page(struct phy_device *phydev, int page)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001359{
Russell Kingd2004e22019-12-17 13:39:36 +00001360 int status;
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001361 int fiber;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001362 int err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001363
Russell Kingd2004e22019-12-17 13:39:36 +00001364 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1365 if (status < 0)
1366 return status;
1367
1368 /* Use the generic register for copper link status,
1369 * and the PHY status register for fiber link status.
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001370 */
Russell Kingd2004e22019-12-17 13:39:36 +00001371 if (page == MII_MARVELL_FIBER_PAGE) {
1372 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1373 } else {
1374 err = genphy_update_link(phydev);
1375 if (err)
1376 return err;
1377 }
1378
Andrew Lunn52295662017-05-25 21:42:08 +02001379 if (page == MII_MARVELL_FIBER_PAGE)
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001380 fiber = 1;
1381 else
1382 fiber = 0;
1383
Russell King98f92832019-12-17 13:39:26 +00001384 linkmode_zero(phydev->lp_advertising);
1385 phydev->pause = 0;
1386 phydev->asym_pause = 0;
1387
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001388 if (phydev->autoneg == AUTONEG_ENABLE)
Russell Kingd2004e22019-12-17 13:39:36 +00001389 err = marvell_read_status_page_an(phydev, fiber, status);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001390 else
Russell King98f92832019-12-17 13:39:26 +00001391 err = genphy_read_status_fixed(phydev);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001392
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001393 return err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001394}
1395
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001396/* marvell_read_status
1397 *
1398 * Some Marvell's phys have two modes: fiber and copper.
1399 * Both need status checked.
1400 * Description:
1401 * First, check the fiber link and status.
1402 * If the fiber link is down, check the copper link and status which
1403 * will be the default value if both link are down.
1404 */
1405static int marvell_read_status(struct phy_device *phydev)
1406{
1407 int err;
1408
1409 /* Check the fiber mode first */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001410 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1411 phydev->supported) &&
Russell Kinga13c06522017-01-10 23:13:45 +00001412 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
Andrew Lunn52295662017-05-25 21:42:08 +02001413 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001414 if (err < 0)
1415 goto error;
1416
Andrew Lunn52295662017-05-25 21:42:08 +02001417 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001418 if (err < 0)
1419 goto error;
1420
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001421 /* If the fiber link is up, it is the selected and
1422 * used link. In this case, we need to stay in the
1423 * fiber page. Please to be careful about that, avoid
1424 * to restore Copper page in other functions which
1425 * could break the behaviour for some fiber phy like
1426 * 88E1512.
1427 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001428 if (phydev->link)
1429 return 0;
1430
1431 /* If fiber link is down, check and save copper mode state */
Andrew Lunn52295662017-05-25 21:42:08 +02001432 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001433 if (err < 0)
1434 goto error;
1435 }
1436
Andrew Lunn52295662017-05-25 21:42:08 +02001437 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001438
1439error:
Andrew Lunn52295662017-05-25 21:42:08 +02001440 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001441 return err;
1442}
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001443
1444/* marvell_suspend
1445 *
1446 * Some Marvell's phys have two modes: fiber and copper.
1447 * Both need to be suspended
1448 */
1449static int marvell_suspend(struct phy_device *phydev)
1450{
1451 int err;
1452
1453 /* Suspend the fiber mode first */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001454 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1455 phydev->supported)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001456 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001457 if (err < 0)
1458 goto error;
1459
1460 /* With the page set, use the generic suspend */
1461 err = genphy_suspend(phydev);
1462 if (err < 0)
1463 goto error;
1464
1465 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001466 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001467 if (err < 0)
1468 goto error;
1469 }
1470
1471 /* With the page set, use the generic suspend */
1472 return genphy_suspend(phydev);
1473
1474error:
Andrew Lunn52295662017-05-25 21:42:08 +02001475 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001476 return err;
1477}
1478
1479/* marvell_resume
1480 *
1481 * Some Marvell's phys have two modes: fiber and copper.
1482 * Both need to be resumed
1483 */
1484static int marvell_resume(struct phy_device *phydev)
1485{
1486 int err;
1487
1488 /* Resume the fiber mode first */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001489 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1490 phydev->supported)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001491 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001492 if (err < 0)
1493 goto error;
1494
1495 /* With the page set, use the generic resume */
1496 err = genphy_resume(phydev);
1497 if (err < 0)
1498 goto error;
1499
1500 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001501 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001502 if (err < 0)
1503 goto error;
1504 }
1505
1506 /* With the page set, use the generic resume */
1507 return genphy_resume(phydev);
1508
1509error:
Andrew Lunn52295662017-05-25 21:42:08 +02001510 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001511 return err;
1512}
1513
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001514static int marvell_aneg_done(struct phy_device *phydev)
1515{
1516 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
Andrew Lunne69d9ed2017-05-17 03:26:00 +02001517
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001518 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1519}
1520
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00001521static int m88e1121_did_interrupt(struct phy_device *phydev)
1522{
1523 int imask;
1524
1525 imask = phy_read(phydev, MII_M1011_IEVENT);
1526
1527 if (imask & MII_M1011_IMASK_INIT)
1528 return 1;
1529
1530 return 0;
1531}
1532
Andrew Lunn23beb382017-05-17 03:26:04 +02001533static void m88e1318_get_wol(struct phy_device *phydev,
1534 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001535{
Russell King424ca4c2018-01-02 10:58:48 +00001536 int oldpage, ret = 0;
1537
Michael Stapelberg3871c382013-03-11 13:56:45 +00001538 wol->supported = WAKE_MAGIC;
1539 wol->wolopts = 0;
1540
Russell King424ca4c2018-01-02 10:58:48 +00001541 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1542 if (oldpage < 0)
1543 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001544
Russell King424ca4c2018-01-02 10:58:48 +00001545 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1546 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001547 wol->wolopts |= WAKE_MAGIC;
1548
Russell King424ca4c2018-01-02 10:58:48 +00001549error:
1550 phy_restore_page(phydev, oldpage, ret);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001551}
1552
Andrew Lunn23beb382017-05-17 03:26:04 +02001553static int m88e1318_set_wol(struct phy_device *phydev,
1554 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001555{
Russell King424ca4c2018-01-02 10:58:48 +00001556 int err = 0, oldpage;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001557
Russell King424ca4c2018-01-02 10:58:48 +00001558 oldpage = phy_save_page(phydev);
1559 if (oldpage < 0)
1560 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001561
1562 if (wol->wolopts & WAKE_MAGIC) {
1563 /* Explicitly switch to page 0x00, just to be sure */
Russell King424ca4c2018-01-02 10:58:48 +00001564 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001565 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001566 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001567
Jingju Houb6a930f2018-04-23 15:22:49 +08001568 /* If WOL event happened once, the LED[2] interrupt pin
1569 * will not be cleared unless we reading the interrupt status
1570 * register. If interrupts are in use, the normal interrupt
1571 * handling will clear the WOL event. Clear the WOL event
1572 * before enabling it if !phy_interrupt_is_valid()
1573 */
1574 if (!phy_interrupt_is_valid(phydev))
Andrew Lunne0a73282019-01-11 00:15:21 +01001575 __phy_read(phydev, MII_M1011_IEVENT);
Jingju Houb6a930f2018-04-23 15:22:49 +08001576
Michael Stapelberg3871c382013-03-11 13:56:45 +00001577 /* Enable the WOL interrupt */
Russell King424ca4c2018-01-02 10:58:48 +00001578 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1579 MII_88E1318S_PHY_CSIER_WOL_EIE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001580 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001581 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001582
Russell King424ca4c2018-01-02 10:58:48 +00001583 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001584 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001585 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001586
1587 /* Setup LED[2] as interrupt pin (active low) */
Russell King424ca4c2018-01-02 10:58:48 +00001588 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
Russell Kingf1028522018-01-05 16:07:10 +00001589 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
Russell King424ca4c2018-01-02 10:58:48 +00001590 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1591 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001592 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001593 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001594
Russell King424ca4c2018-01-02 10:58:48 +00001595 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001596 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001597 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001598
1599 /* Store the device address for the magic packet */
Russell King424ca4c2018-01-02 10:58:48 +00001600 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001601 ((phydev->attached_dev->dev_addr[5] << 8) |
1602 phydev->attached_dev->dev_addr[4]));
1603 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001604 goto error;
1605 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001606 ((phydev->attached_dev->dev_addr[3] << 8) |
1607 phydev->attached_dev->dev_addr[2]));
1608 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001609 goto error;
1610 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001611 ((phydev->attached_dev->dev_addr[1] << 8) |
1612 phydev->attached_dev->dev_addr[0]));
1613 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001614 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001615
1616 /* Clear WOL status and enable magic packet matching */
Russell King424ca4c2018-01-02 10:58:48 +00001617 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1618 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1619 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001620 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001621 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001622 } else {
Russell King424ca4c2018-01-02 10:58:48 +00001623 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001624 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001625 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001626
1627 /* Clear WOL status and disable magic packet matching */
Russell King424ca4c2018-01-02 10:58:48 +00001628 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
Russell Kingf1028522018-01-05 16:07:10 +00001629 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
Russell King424ca4c2018-01-02 10:58:48 +00001630 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001631 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001632 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001633 }
1634
Russell King424ca4c2018-01-02 10:58:48 +00001635error:
1636 return phy_restore_page(phydev, oldpage, err);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001637}
1638
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001639static int marvell_get_sset_count(struct phy_device *phydev)
1640{
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001641 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1642 phydev->supported))
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +02001643 return ARRAY_SIZE(marvell_hw_stats);
1644 else
1645 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001646}
1647
1648static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1649{
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001650 int count = marvell_get_sset_count(phydev);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001651 int i;
1652
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001653 for (i = 0; i < count; i++) {
Florian Fainelli98409b22018-03-02 15:08:37 -08001654 strlcpy(data + i * ETH_GSTRING_LEN,
1655 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001656 }
1657}
1658
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001659static u64 marvell_get_stat(struct phy_device *phydev, int i)
1660{
1661 struct marvell_hw_stat stat = marvell_hw_stats[i];
1662 struct marvell_priv *priv = phydev->priv;
Russell King424ca4c2018-01-02 10:58:48 +00001663 int val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001664 u64 ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001665
Russell King424ca4c2018-01-02 10:58:48 +00001666 val = phy_read_paged(phydev, stat.page, stat.reg);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001667 if (val < 0) {
Jisheng Zhang6c3442f2018-04-27 16:18:58 +08001668 ret = U64_MAX;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001669 } else {
1670 val = val & ((1 << stat.bits) - 1);
1671 priv->stats[i] += val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001672 ret = priv->stats[i];
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001673 }
1674
Andrew Lunn321b4d42016-02-20 00:35:29 +01001675 return ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001676}
1677
1678static void marvell_get_stats(struct phy_device *phydev,
1679 struct ethtool_stats *stats, u64 *data)
1680{
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001681 int count = marvell_get_sset_count(phydev);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001682 int i;
1683
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001684 for (i = 0; i < count; i++)
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001685 data[i] = marvell_get_stat(phydev, i);
1686}
1687
Andrew Lunn0b046802017-01-20 01:37:49 +01001688#ifdef CONFIG_HWMON
1689static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1690{
Andrew Lunn975b3882017-05-25 21:42:06 +02001691 int oldpage;
Russell King424ca4c2018-01-02 10:58:48 +00001692 int ret = 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001693 int val;
1694
1695 *temp = 0;
1696
Russell King424ca4c2018-01-02 10:58:48 +00001697 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1698 if (oldpage < 0)
1699 goto error;
Andrew Lunn975b3882017-05-25 21:42:06 +02001700
Andrew Lunn0b046802017-01-20 01:37:49 +01001701 /* Enable temperature sensor */
Russell King424ca4c2018-01-02 10:58:48 +00001702 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001703 if (ret < 0)
1704 goto error;
1705
Russell King424ca4c2018-01-02 10:58:48 +00001706 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1707 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
Andrew Lunn0b046802017-01-20 01:37:49 +01001708 if (ret < 0)
1709 goto error;
1710
1711 /* Wait for temperature to stabilize */
1712 usleep_range(10000, 12000);
1713
Russell King424ca4c2018-01-02 10:58:48 +00001714 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001715 if (val < 0) {
1716 ret = val;
1717 goto error;
1718 }
1719
1720 /* Disable temperature sensor */
Russell King424ca4c2018-01-02 10:58:48 +00001721 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1722 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
Andrew Lunn0b046802017-01-20 01:37:49 +01001723 if (ret < 0)
1724 goto error;
1725
1726 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1727
1728error:
Russell King424ca4c2018-01-02 10:58:48 +00001729 return phy_restore_page(phydev, oldpage, ret);
Andrew Lunn0b046802017-01-20 01:37:49 +01001730}
1731
1732static int m88e1121_hwmon_read(struct device *dev,
1733 enum hwmon_sensor_types type,
1734 u32 attr, int channel, long *temp)
1735{
1736 struct phy_device *phydev = dev_get_drvdata(dev);
1737 int err;
1738
1739 switch (attr) {
1740 case hwmon_temp_input:
1741 err = m88e1121_get_temp(phydev, temp);
1742 break;
1743 default:
1744 return -EOPNOTSUPP;
1745 }
1746
1747 return err;
1748}
1749
1750static umode_t m88e1121_hwmon_is_visible(const void *data,
1751 enum hwmon_sensor_types type,
1752 u32 attr, int channel)
1753{
1754 if (type != hwmon_temp)
1755 return 0;
1756
1757 switch (attr) {
1758 case hwmon_temp_input:
1759 return 0444;
1760 default:
1761 return 0;
1762 }
1763}
1764
1765static u32 m88e1121_hwmon_chip_config[] = {
1766 HWMON_C_REGISTER_TZ,
1767 0
1768};
1769
1770static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1771 .type = hwmon_chip,
1772 .config = m88e1121_hwmon_chip_config,
1773};
1774
1775static u32 m88e1121_hwmon_temp_config[] = {
1776 HWMON_T_INPUT,
1777 0
1778};
1779
1780static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1781 .type = hwmon_temp,
1782 .config = m88e1121_hwmon_temp_config,
1783};
1784
1785static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1786 &m88e1121_hwmon_chip,
1787 &m88e1121_hwmon_temp,
1788 NULL
1789};
1790
1791static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1792 .is_visible = m88e1121_hwmon_is_visible,
1793 .read = m88e1121_hwmon_read,
1794};
1795
1796static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1797 .ops = &m88e1121_hwmon_hwmon_ops,
1798 .info = m88e1121_hwmon_info,
1799};
1800
1801static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1802{
1803 int ret;
1804
1805 *temp = 0;
1806
Russell King424ca4c2018-01-02 10:58:48 +00001807 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1808 MII_88E1510_TEMP_SENSOR);
Andrew Lunn0b046802017-01-20 01:37:49 +01001809 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001810 return ret;
Andrew Lunn0b046802017-01-20 01:37:49 +01001811
1812 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1813
Russell King424ca4c2018-01-02 10:58:48 +00001814 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001815}
1816
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001817static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001818{
1819 int ret;
1820
1821 *temp = 0;
1822
Russell King424ca4c2018-01-02 10:58:48 +00001823 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1824 MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001825 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001826 return ret;
Andrew Lunn0b046802017-01-20 01:37:49 +01001827
1828 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1829 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1830 /* convert to mC */
1831 *temp *= 1000;
1832
Russell King424ca4c2018-01-02 10:58:48 +00001833 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001834}
1835
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001836static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001837{
Andrew Lunn0b046802017-01-20 01:37:49 +01001838 temp = temp / 1000;
1839 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
Andrew Lunn0b046802017-01-20 01:37:49 +01001840
Russell King424ca4c2018-01-02 10:58:48 +00001841 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1842 MII_88E1121_MISC_TEST,
1843 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1844 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
Andrew Lunn0b046802017-01-20 01:37:49 +01001845}
1846
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001847static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
Andrew Lunn0b046802017-01-20 01:37:49 +01001848{
1849 int ret;
1850
1851 *alarm = false;
1852
Russell King424ca4c2018-01-02 10:58:48 +00001853 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1854 MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001855 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001856 return ret;
1857
Andrew Lunn0b046802017-01-20 01:37:49 +01001858 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1859
Russell King424ca4c2018-01-02 10:58:48 +00001860 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001861}
1862
1863static int m88e1510_hwmon_read(struct device *dev,
1864 enum hwmon_sensor_types type,
1865 u32 attr, int channel, long *temp)
1866{
1867 struct phy_device *phydev = dev_get_drvdata(dev);
1868 int err;
1869
1870 switch (attr) {
1871 case hwmon_temp_input:
1872 err = m88e1510_get_temp(phydev, temp);
1873 break;
1874 case hwmon_temp_crit:
1875 err = m88e1510_get_temp_critical(phydev, temp);
1876 break;
1877 case hwmon_temp_max_alarm:
1878 err = m88e1510_get_temp_alarm(phydev, temp);
1879 break;
1880 default:
1881 return -EOPNOTSUPP;
1882 }
1883
1884 return err;
1885}
1886
1887static int m88e1510_hwmon_write(struct device *dev,
1888 enum hwmon_sensor_types type,
1889 u32 attr, int channel, long temp)
1890{
1891 struct phy_device *phydev = dev_get_drvdata(dev);
1892 int err;
1893
1894 switch (attr) {
1895 case hwmon_temp_crit:
1896 err = m88e1510_set_temp_critical(phydev, temp);
1897 break;
1898 default:
1899 return -EOPNOTSUPP;
1900 }
1901 return err;
1902}
1903
1904static umode_t m88e1510_hwmon_is_visible(const void *data,
1905 enum hwmon_sensor_types type,
1906 u32 attr, int channel)
1907{
1908 if (type != hwmon_temp)
1909 return 0;
1910
1911 switch (attr) {
1912 case hwmon_temp_input:
1913 case hwmon_temp_max_alarm:
1914 return 0444;
1915 case hwmon_temp_crit:
1916 return 0644;
1917 default:
1918 return 0;
1919 }
1920}
1921
1922static u32 m88e1510_hwmon_temp_config[] = {
1923 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1924 0
1925};
1926
1927static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1928 .type = hwmon_temp,
1929 .config = m88e1510_hwmon_temp_config,
1930};
1931
1932static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1933 &m88e1121_hwmon_chip,
1934 &m88e1510_hwmon_temp,
1935 NULL
1936};
1937
1938static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1939 .is_visible = m88e1510_hwmon_is_visible,
1940 .read = m88e1510_hwmon_read,
1941 .write = m88e1510_hwmon_write,
1942};
1943
1944static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1945 .ops = &m88e1510_hwmon_hwmon_ops,
1946 .info = m88e1510_hwmon_info,
1947};
1948
Andrew Lunnfee2d542018-01-09 22:42:09 +01001949static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
1950{
1951 int sum = 0;
1952 int oldpage;
1953 int ret = 0;
1954 int i;
1955
1956 *temp = 0;
1957
1958 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1959 if (oldpage < 0)
1960 goto error;
1961
1962 /* Enable temperature sensor */
1963 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1964 if (ret < 0)
1965 goto error;
1966
1967 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1968 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
1969 MII_88E6390_MISC_TEST_SAMPLE_1S;
1970
1971 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1972 if (ret < 0)
1973 goto error;
1974
1975 /* Wait for temperature to stabilize */
1976 usleep_range(10000, 12000);
1977
1978 /* Reading the temperature sense has an errata. You need to read
1979 * a number of times and take an average.
1980 */
1981 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
1982 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
1983 if (ret < 0)
1984 goto error;
1985 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
1986 }
1987
1988 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
1989 *temp = (sum - 75) * 1000;
1990
1991 /* Disable temperature sensor */
1992 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1993 if (ret < 0)
1994 goto error;
1995
1996 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1997 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
1998
1999 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2000
2001error:
2002 phy_restore_page(phydev, oldpage, ret);
2003
2004 return ret;
2005}
2006
2007static int m88e6390_hwmon_read(struct device *dev,
2008 enum hwmon_sensor_types type,
2009 u32 attr, int channel, long *temp)
2010{
2011 struct phy_device *phydev = dev_get_drvdata(dev);
2012 int err;
2013
2014 switch (attr) {
2015 case hwmon_temp_input:
2016 err = m88e6390_get_temp(phydev, temp);
2017 break;
2018 default:
2019 return -EOPNOTSUPP;
2020 }
2021
2022 return err;
2023}
2024
2025static umode_t m88e6390_hwmon_is_visible(const void *data,
2026 enum hwmon_sensor_types type,
2027 u32 attr, int channel)
2028{
2029 if (type != hwmon_temp)
2030 return 0;
2031
2032 switch (attr) {
2033 case hwmon_temp_input:
2034 return 0444;
2035 default:
2036 return 0;
2037 }
2038}
2039
2040static u32 m88e6390_hwmon_temp_config[] = {
2041 HWMON_T_INPUT,
2042 0
2043};
2044
2045static const struct hwmon_channel_info m88e6390_hwmon_temp = {
2046 .type = hwmon_temp,
2047 .config = m88e6390_hwmon_temp_config,
2048};
2049
2050static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
2051 &m88e1121_hwmon_chip,
2052 &m88e6390_hwmon_temp,
2053 NULL
2054};
2055
2056static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
2057 .is_visible = m88e6390_hwmon_is_visible,
2058 .read = m88e6390_hwmon_read,
2059};
2060
2061static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
2062 .ops = &m88e6390_hwmon_hwmon_ops,
2063 .info = m88e6390_hwmon_info,
2064};
2065
Andrew Lunn0b046802017-01-20 01:37:49 +01002066static int marvell_hwmon_name(struct phy_device *phydev)
2067{
2068 struct marvell_priv *priv = phydev->priv;
2069 struct device *dev = &phydev->mdio.dev;
2070 const char *devname = dev_name(dev);
2071 size_t len = strlen(devname);
2072 int i, j;
2073
2074 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2075 if (!priv->hwmon_name)
2076 return -ENOMEM;
2077
2078 for (i = j = 0; i < len && devname[i]; i++) {
2079 if (isalnum(devname[i]))
2080 priv->hwmon_name[j++] = devname[i];
2081 }
2082
2083 return 0;
2084}
2085
2086static int marvell_hwmon_probe(struct phy_device *phydev,
2087 const struct hwmon_chip_info *chip)
2088{
2089 struct marvell_priv *priv = phydev->priv;
2090 struct device *dev = &phydev->mdio.dev;
2091 int err;
2092
2093 err = marvell_hwmon_name(phydev);
2094 if (err)
2095 return err;
2096
2097 priv->hwmon_dev = devm_hwmon_device_register_with_info(
2098 dev, priv->hwmon_name, phydev, chip, NULL);
2099
2100 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
2101}
2102
2103static int m88e1121_hwmon_probe(struct phy_device *phydev)
2104{
2105 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
2106}
2107
2108static int m88e1510_hwmon_probe(struct phy_device *phydev)
2109{
2110 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
2111}
Andrew Lunnfee2d542018-01-09 22:42:09 +01002112
2113static int m88e6390_hwmon_probe(struct phy_device *phydev)
2114{
2115 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
2116}
Andrew Lunn0b046802017-01-20 01:37:49 +01002117#else
2118static int m88e1121_hwmon_probe(struct phy_device *phydev)
2119{
2120 return 0;
2121}
2122
2123static int m88e1510_hwmon_probe(struct phy_device *phydev)
2124{
2125 return 0;
2126}
Andrew Lunnfee2d542018-01-09 22:42:09 +01002127
2128static int m88e6390_hwmon_probe(struct phy_device *phydev)
2129{
2130 return 0;
2131}
Andrew Lunn0b046802017-01-20 01:37:49 +01002132#endif
2133
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002134static int marvell_probe(struct phy_device *phydev)
2135{
2136 struct marvell_priv *priv;
2137
Andrew Lunne5a03bf2016-01-06 20:11:16 +01002138 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002139 if (!priv)
2140 return -ENOMEM;
2141
2142 phydev->priv = priv;
2143
2144 return 0;
2145}
2146
Andrew Lunn0b046802017-01-20 01:37:49 +01002147static int m88e1121_probe(struct phy_device *phydev)
2148{
2149 int err;
2150
2151 err = marvell_probe(phydev);
2152 if (err)
2153 return err;
2154
2155 return m88e1121_hwmon_probe(phydev);
2156}
2157
2158static int m88e1510_probe(struct phy_device *phydev)
2159{
2160 int err;
2161
2162 err = marvell_probe(phydev);
2163 if (err)
2164 return err;
2165
2166 return m88e1510_hwmon_probe(phydev);
2167}
2168
Andrew Lunnfee2d542018-01-09 22:42:09 +01002169static int m88e6390_probe(struct phy_device *phydev)
2170{
2171 int err;
2172
2173 err = marvell_probe(phydev);
2174 if (err)
2175 return err;
2176
2177 return m88e6390_hwmon_probe(phydev);
2178}
2179
Olof Johanssone5479232007-07-03 16:23:46 -05002180static struct phy_driver marvell_drivers[] = {
2181 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002182 .phy_id = MARVELL_PHY_ID_88E1101,
2183 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002184 .name = "Marvell 88E1101",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002185 /* PHY_GBIT_FEATURES */
Arnd Bergmann18702412017-01-23 13:18:41 +01002186 .probe = marvell_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01002187 .config_init = &marvell_config_init,
Andrew Lunnf2899782017-05-23 17:49:13 +02002188 .config_aneg = &m88e1101_config_aneg,
Olof Johanssone5479232007-07-03 16:23:46 -05002189 .ack_interrupt = &marvell_ack_interrupt,
2190 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002191 .resume = &genphy_resume,
2192 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002193 .read_page = marvell_read_page,
2194 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002195 .get_sset_count = marvell_get_sset_count,
2196 .get_strings = marvell_get_strings,
2197 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05002198 },
2199 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002200 .phy_id = MARVELL_PHY_ID_88E1112,
2201 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johansson85cfb532007-07-03 16:24:32 -05002202 .name = "Marvell 88E1112",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002203 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002204 .probe = marvell_probe,
Olof Johansson85cfb532007-07-03 16:24:32 -05002205 .config_init = &m88e1111_config_init,
2206 .config_aneg = &marvell_config_aneg,
Olof Johansson85cfb532007-07-03 16:24:32 -05002207 .ack_interrupt = &marvell_ack_interrupt,
2208 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002209 .resume = &genphy_resume,
2210 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002211 .read_page = marvell_read_page,
2212 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002213 .get_sset_count = marvell_get_sset_count,
2214 .get_strings = marvell_get_strings,
2215 .get_stats = marvell_get_stats,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002216 .get_tunable = m88e1011_get_tunable,
2217 .set_tunable = m88e1011_set_tunable,
2218 .link_change_notify = m88e1011_link_change_notify,
Olof Johansson85cfb532007-07-03 16:24:32 -05002219 },
2220 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002221 .phy_id = MARVELL_PHY_ID_88E1111,
2222 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002223 .name = "Marvell 88E1111",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002224 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002225 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002226 .config_init = &m88e1111_config_init,
Florian Fainellid6ab9332018-09-25 11:28:46 -07002227 .config_aneg = &marvell_config_aneg,
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03002228 .read_status = &marvell_read_status,
Olof Johanssone5479232007-07-03 16:23:46 -05002229 .ack_interrupt = &marvell_ack_interrupt,
2230 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002231 .resume = &genphy_resume,
2232 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002233 .read_page = marvell_read_page,
2234 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002235 .get_sset_count = marvell_get_sset_count,
2236 .get_strings = marvell_get_strings,
2237 .get_stats = marvell_get_stats,
Heiner Kallweit5c6bc512019-10-28 20:53:25 +01002238 .get_tunable = m88e1111_get_tunable,
2239 .set_tunable = m88e1111_set_tunable,
2240 .link_change_notify = m88e1011_link_change_notify,
Olof Johanssone5479232007-07-03 16:23:46 -05002241 },
2242 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002243 .phy_id = MARVELL_PHY_ID_88E1118,
2244 .phy_id_mask = MARVELL_PHY_ID_MASK,
Ron Madrid605f1962008-11-06 09:05:26 +00002245 .name = "Marvell 88E1118",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002246 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002247 .probe = marvell_probe,
Ron Madrid605f1962008-11-06 09:05:26 +00002248 .config_init = &m88e1118_config_init,
2249 .config_aneg = &m88e1118_config_aneg,
Ron Madrid605f1962008-11-06 09:05:26 +00002250 .ack_interrupt = &marvell_ack_interrupt,
2251 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002252 .resume = &genphy_resume,
2253 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002254 .read_page = marvell_read_page,
2255 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002256 .get_sset_count = marvell_get_sset_count,
2257 .get_strings = marvell_get_strings,
2258 .get_stats = marvell_get_stats,
Ron Madrid605f1962008-11-06 09:05:26 +00002259 },
2260 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002261 .phy_id = MARVELL_PHY_ID_88E1121R,
2262 .phy_id_mask = MARVELL_PHY_ID_MASK,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002263 .name = "Marvell 88E1121R",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002264 /* PHY_GBIT_FEATURES */
Arnd Bergmann18702412017-01-23 13:18:41 +01002265 .probe = &m88e1121_probe,
Wang Dongsheng07777242018-07-01 23:15:46 -07002266 .config_init = &marvell_config_init,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002267 .config_aneg = &m88e1121_config_aneg,
2268 .read_status = &marvell_read_status,
2269 .ack_interrupt = &marvell_ack_interrupt,
2270 .config_intr = &marvell_config_intr,
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00002271 .did_interrupt = &m88e1121_did_interrupt,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002272 .resume = &genphy_resume,
2273 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002274 .read_page = marvell_read_page,
2275 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002276 .get_sset_count = marvell_get_sset_count,
2277 .get_strings = marvell_get_strings,
2278 .get_stats = marvell_get_stats,
Heiner Kallweit911af5e2019-10-28 20:52:55 +01002279 .get_tunable = m88e1011_get_tunable,
2280 .set_tunable = m88e1011_set_tunable,
2281 .link_change_notify = m88e1011_link_change_notify,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002282 },
2283 {
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002284 .phy_id = MARVELL_PHY_ID_88E1318S,
Linus Torvalds6ba74012010-08-04 11:47:58 -07002285 .phy_id_mask = MARVELL_PHY_ID_MASK,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002286 .name = "Marvell 88E1318S",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002287 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002288 .probe = marvell_probe,
Esben Haabendaldd9a1222018-04-05 22:40:29 +02002289 .config_init = &m88e1318_config_init,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002290 .config_aneg = &m88e1318_config_aneg,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002291 .read_status = &marvell_read_status,
2292 .ack_interrupt = &marvell_ack_interrupt,
2293 .config_intr = &marvell_config_intr,
2294 .did_interrupt = &m88e1121_did_interrupt,
Michael Stapelberg3871c382013-03-11 13:56:45 +00002295 .get_wol = &m88e1318_get_wol,
2296 .set_wol = &m88e1318_set_wol,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002297 .resume = &genphy_resume,
2298 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002299 .read_page = marvell_read_page,
2300 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002301 .get_sset_count = marvell_get_sset_count,
2302 .get_strings = marvell_get_strings,
2303 .get_stats = marvell_get_stats,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002304 },
2305 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002306 .phy_id = MARVELL_PHY_ID_88E1145,
2307 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002308 .name = "Marvell 88E1145",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002309 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002310 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002311 .config_init = &m88e1145_config_init,
Zhao Qiangc5058732017-12-18 10:26:43 +08002312 .config_aneg = &m88e1101_config_aneg,
Olof Johanssone5479232007-07-03 16:23:46 -05002313 .read_status = &genphy_read_status,
2314 .ack_interrupt = &marvell_ack_interrupt,
2315 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002316 .resume = &genphy_resume,
2317 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002318 .read_page = marvell_read_page,
2319 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002320 .get_sset_count = marvell_get_sset_count,
2321 .get_strings = marvell_get_strings,
2322 .get_stats = marvell_get_stats,
Heiner Kallweita319fb52019-10-29 20:25:26 +01002323 .get_tunable = m88e1111_get_tunable,
2324 .set_tunable = m88e1111_set_tunable,
2325 .link_change_notify = m88e1011_link_change_notify,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002326 },
2327 {
David Daney90600732010-11-19 11:58:53 +00002328 .phy_id = MARVELL_PHY_ID_88E1149R,
2329 .phy_id_mask = MARVELL_PHY_ID_MASK,
2330 .name = "Marvell 88E1149R",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002331 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002332 .probe = marvell_probe,
David Daney90600732010-11-19 11:58:53 +00002333 .config_init = &m88e1149_config_init,
2334 .config_aneg = &m88e1118_config_aneg,
David Daney90600732010-11-19 11:58:53 +00002335 .ack_interrupt = &marvell_ack_interrupt,
2336 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002337 .resume = &genphy_resume,
2338 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002339 .read_page = marvell_read_page,
2340 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002341 .get_sset_count = marvell_get_sset_count,
2342 .get_strings = marvell_get_strings,
2343 .get_stats = marvell_get_stats,
David Daney90600732010-11-19 11:58:53 +00002344 },
2345 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002346 .phy_id = MARVELL_PHY_ID_88E1240,
2347 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002348 .name = "Marvell 88E1240",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002349 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002350 .probe = marvell_probe,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002351 .config_init = &m88e1111_config_init,
2352 .config_aneg = &marvell_config_aneg,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002353 .ack_interrupt = &marvell_ack_interrupt,
2354 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002355 .resume = &genphy_resume,
2356 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002357 .read_page = marvell_read_page,
2358 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002359 .get_sset_count = marvell_get_sset_count,
2360 .get_strings = marvell_get_strings,
2361 .get_stats = marvell_get_stats,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002362 },
Michal Simek3da09a52013-05-30 20:08:26 +00002363 {
2364 .phy_id = MARVELL_PHY_ID_88E1116R,
2365 .phy_id_mask = MARVELL_PHY_ID_MASK,
2366 .name = "Marvell 88E1116R",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002367 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002368 .probe = marvell_probe,
Michal Simek3da09a52013-05-30 20:08:26 +00002369 .config_init = &m88e1116r_config_init,
Michal Simek3da09a52013-05-30 20:08:26 +00002370 .ack_interrupt = &marvell_ack_interrupt,
2371 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002372 .resume = &genphy_resume,
2373 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002374 .read_page = marvell_read_page,
2375 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002376 .get_sset_count = marvell_get_sset_count,
2377 .get_strings = marvell_get_strings,
2378 .get_stats = marvell_get_stats,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002379 .get_tunable = m88e1011_get_tunable,
2380 .set_tunable = m88e1011_set_tunable,
2381 .link_change_notify = m88e1011_link_change_notify,
Michal Simek3da09a52013-05-30 20:08:26 +00002382 },
Michal Simek10e24caa2013-05-30 20:08:27 +00002383 {
2384 .phy_id = MARVELL_PHY_ID_88E1510,
2385 .phy_id_mask = MARVELL_PHY_ID_MASK,
2386 .name = "Marvell 88E1510",
Andrew Lunn719655a2018-09-29 23:04:16 +02002387 .features = PHY_GBIT_FIBRE_FEATURES,
Andrew Lunn0b046802017-01-20 01:37:49 +01002388 .probe = &m88e1510_probe,
Stefan Roese930b37e2016-02-18 10:59:07 +01002389 .config_init = &m88e1510_config_init,
Michal Simek10e24caa2013-05-30 20:08:27 +00002390 .config_aneg = &m88e1510_config_aneg,
2391 .read_status = &marvell_read_status,
2392 .ack_interrupt = &marvell_ack_interrupt,
2393 .config_intr = &marvell_config_intr,
2394 .did_interrupt = &m88e1121_did_interrupt,
Jingju Houf39aac72017-01-22 18:20:56 +08002395 .get_wol = &m88e1318_get_wol,
2396 .set_wol = &m88e1318_set_wol,
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02002397 .resume = &marvell_resume,
2398 .suspend = &marvell_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002399 .read_page = marvell_read_page,
2400 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002401 .get_sset_count = marvell_get_sset_count,
2402 .get_strings = marvell_get_strings,
2403 .get_stats = marvell_get_stats,
Lin Yun Shengf0f9b4e2017-06-30 17:44:15 +08002404 .set_loopback = genphy_loopback,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002405 .get_tunable = m88e1011_get_tunable,
2406 .set_tunable = m88e1011_set_tunable,
2407 .link_change_notify = m88e1011_link_change_notify,
Michal Simek10e24caa2013-05-30 20:08:27 +00002408 },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002409 {
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002410 .phy_id = MARVELL_PHY_ID_88E1540,
2411 .phy_id_mask = MARVELL_PHY_ID_MASK,
2412 .name = "Marvell 88E1540",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002413 /* PHY_GBIT_FEATURES */
Arnd Bergmann18702412017-01-23 13:18:41 +01002414 .probe = m88e1510_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01002415 .config_init = &marvell_config_init,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002416 .config_aneg = &m88e1510_config_aneg,
2417 .read_status = &marvell_read_status,
2418 .ack_interrupt = &marvell_ack_interrupt,
2419 .config_intr = &marvell_config_intr,
2420 .did_interrupt = &m88e1121_did_interrupt,
2421 .resume = &genphy_resume,
2422 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002423 .read_page = marvell_read_page,
2424 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002425 .get_sset_count = marvell_get_sset_count,
2426 .get_strings = marvell_get_strings,
2427 .get_stats = marvell_get_stats,
Heiner Kallweit69f42be2019-03-25 19:35:41 +01002428 .get_tunable = m88e1540_get_tunable,
2429 .set_tunable = m88e1540_set_tunable,
Heiner Kallweit911af5e2019-10-28 20:52:55 +01002430 .link_change_notify = m88e1011_link_change_notify,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002431 },
2432 {
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002433 .phy_id = MARVELL_PHY_ID_88E1545,
2434 .phy_id_mask = MARVELL_PHY_ID_MASK,
2435 .name = "Marvell 88E1545",
2436 .probe = m88e1510_probe,
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002437 /* PHY_GBIT_FEATURES */
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002438 .config_init = &marvell_config_init,
2439 .config_aneg = &m88e1510_config_aneg,
2440 .read_status = &marvell_read_status,
2441 .ack_interrupt = &marvell_ack_interrupt,
2442 .config_intr = &marvell_config_intr,
2443 .did_interrupt = &m88e1121_did_interrupt,
2444 .resume = &genphy_resume,
2445 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002446 .read_page = marvell_read_page,
2447 .write_page = marvell_write_page,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002448 .get_sset_count = marvell_get_sset_count,
2449 .get_strings = marvell_get_strings,
2450 .get_stats = marvell_get_stats,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002451 .get_tunable = m88e1540_get_tunable,
2452 .set_tunable = m88e1540_set_tunable,
2453 .link_change_notify = m88e1011_link_change_notify,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002454 },
2455 {
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002456 .phy_id = MARVELL_PHY_ID_88E3016,
2457 .phy_id_mask = MARVELL_PHY_ID_MASK,
2458 .name = "Marvell 88E3016",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002459 /* PHY_BASIC_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002460 .probe = marvell_probe,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002461 .config_init = &m88e3016_config_init,
2462 .aneg_done = &marvell_aneg_done,
2463 .read_status = &marvell_read_status,
2464 .ack_interrupt = &marvell_ack_interrupt,
2465 .config_intr = &marvell_config_intr,
2466 .did_interrupt = &m88e1121_did_interrupt,
2467 .resume = &genphy_resume,
2468 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002469 .read_page = marvell_read_page,
2470 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002471 .get_sset_count = marvell_get_sset_count,
2472 .get_strings = marvell_get_strings,
2473 .get_stats = marvell_get_stats,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002474 },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002475 {
2476 .phy_id = MARVELL_PHY_ID_88E6390,
2477 .phy_id_mask = MARVELL_PHY_ID_MASK,
2478 .name = "Marvell 88E6390",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002479 /* PHY_GBIT_FEATURES */
Andrew Lunnfee2d542018-01-09 22:42:09 +01002480 .probe = m88e6390_probe,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002481 .config_init = &marvell_config_init,
Andrew Lunn8cbcdc12019-01-10 22:48:36 +01002482 .config_aneg = &m88e6390_config_aneg,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002483 .read_status = &marvell_read_status,
2484 .ack_interrupt = &marvell_ack_interrupt,
2485 .config_intr = &marvell_config_intr,
2486 .did_interrupt = &m88e1121_did_interrupt,
2487 .resume = &genphy_resume,
2488 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002489 .read_page = marvell_read_page,
2490 .write_page = marvell_write_page,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002491 .get_sset_count = marvell_get_sset_count,
2492 .get_strings = marvell_get_strings,
2493 .get_stats = marvell_get_stats,
Heiner Kallweit69f42be2019-03-25 19:35:41 +01002494 .get_tunable = m88e1540_get_tunable,
2495 .set_tunable = m88e1540_set_tunable,
Heiner Kallweit911af5e2019-10-28 20:52:55 +01002496 .link_change_notify = m88e1011_link_change_notify,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002497 },
Andy Fleming00db8182005-07-30 19:31:23 -04002498};
2499
Johan Hovold50fd7152014-11-11 19:45:59 +01002500module_phy_driver(marvell_drivers);
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002501
Uwe Kleine-Königcf93c942010-10-03 23:43:32 +00002502static struct mdio_device_id __maybe_unused marvell_tbl[] = {
Michal Simekf5e1cab2013-05-30 20:08:25 +00002503 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2504 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2505 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2506 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2507 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2508 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2509 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2510 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2511 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
Michal Simek3da09a52013-05-30 20:08:26 +00002512 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
Michal Simek10e24caa2013-05-30 20:08:27 +00002513 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002514 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002515 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002516 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002517 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002518 { }
2519};
2520
2521MODULE_DEVICE_TABLE(mdio, marvell_tbl);