blob: 9a8badafea8ac95e123d14694437f60bc44eb453 [file] [log] [blame]
Andrew Lunna2443fd2019-01-21 19:05:50 +01001// SPDX-License-Identifier: GPL-2.0+
Andy Fleming00db8182005-07-30 19:31:23 -04002/*
3 * drivers/net/phy/marvell.c
4 *
5 * Driver for Marvell PHYs
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 *
Michael Stapelberg3871c382013-03-11 13:56:45 +000011 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
Andy Fleming00db8182005-07-30 19:31:23 -040012 */
Andy Fleming00db8182005-07-30 19:31:23 -040013#include <linux/kernel.h>
Andy Fleming00db8182005-07-30 19:31:23 -040014#include <linux/string.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010015#include <linux/ctype.h>
Andy Fleming00db8182005-07-30 19:31:23 -040016#include <linux/errno.h>
17#include <linux/unistd.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010018#include <linux/hwmon.h>
Andy Fleming00db8182005-07-30 19:31:23 -040019#include <linux/interrupt.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/netdevice.h>
23#include <linux/etherdevice.h>
24#include <linux/skbuff.h>
25#include <linux/spinlock.h>
26#include <linux/mm.h>
27#include <linux/module.h>
Andy Fleming00db8182005-07-30 19:31:23 -040028#include <linux/mii.h>
29#include <linux/ethtool.h>
30#include <linux/phy.h>
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +100031#include <linux/marvell_phy.h>
Heiner Kallweit69f42be2019-03-25 19:35:41 +010032#include <linux/bitfield.h>
David Daneycf41a512010-11-19 12:13:18 +000033#include <linux/of.h>
Andy Fleming00db8182005-07-30 19:31:23 -040034
Avinash Kumareea3b202013-09-30 09:36:44 +053035#include <linux/io.h>
Andy Fleming00db8182005-07-30 19:31:23 -040036#include <asm/irq.h>
Avinash Kumareea3b202013-09-30 09:36:44 +053037#include <linux/uaccess.h>
Andy Fleming00db8182005-07-30 19:31:23 -040038
David Daney27d916d2010-11-19 11:58:52 +000039#define MII_MARVELL_PHY_PAGE 22
Andrew Lunn52295662017-05-25 21:42:08 +020040#define MII_MARVELL_COPPER_PAGE 0x00
41#define MII_MARVELL_FIBER_PAGE 0x01
42#define MII_MARVELL_MSCR_PAGE 0x02
43#define MII_MARVELL_LED_PAGE 0x03
44#define MII_MARVELL_MISC_TEST_PAGE 0x06
45#define MII_MARVELL_WOL_PAGE 0x11
David Daney27d916d2010-11-19 11:58:52 +000046
Andy Fleming00db8182005-07-30 19:31:23 -040047#define MII_M1011_IEVENT 0x13
48#define MII_M1011_IEVENT_CLEAR 0x0000
49
50#define MII_M1011_IMASK 0x12
51#define MII_M1011_IMASK_INIT 0x6400
52#define MII_M1011_IMASK_CLEAR 0x0000
53
Andrew Lunnfecd5e92017-07-30 22:41:49 +020054#define MII_M1011_PHY_SCR 0x10
55#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
Heiner Kallweitf8d975b2019-10-28 20:52:22 +010056#define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +020057#define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
Andrew Lunnfecd5e92017-07-30 22:41:49 +020058#define MII_M1011_PHY_SCR_MDI (0x0 << 5)
59#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
60#define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
Andy Fleming76884672007-02-09 18:13:58 -060061
Heiner Kallweita3bdfce2019-10-19 15:57:33 +020062#define MII_M1011_PHY_SSR 0x11
63#define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
64
Andy Fleming76884672007-02-09 18:13:58 -060065#define MII_M1111_PHY_LED_CONTROL 0x18
66#define MII_M1111_PHY_LED_DIRECT 0x4100
67#define MII_M1111_PHY_LED_COMBINE 0x411c
Kim Phillips895ee682007-06-05 18:46:47 +080068#define MII_M1111_PHY_EXT_CR 0x14
Heiner Kallweit5c6bc512019-10-28 20:53:25 +010069#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
70#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
71#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
Andrew Lunn61111592017-07-30 22:41:46 +020072#define MII_M1111_RGMII_RX_DELAY BIT(7)
73#define MII_M1111_RGMII_TX_DELAY BIT(1)
Kim Phillips895ee682007-06-05 18:46:47 +080074#define MII_M1111_PHY_EXT_SR 0x1b
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030075
76#define MII_M1111_HWCFG_MODE_MASK 0xf
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030077#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
Kapil Juneja4117b5b2007-05-11 18:25:18 -050078#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
Andrew Lunn865b813a2017-07-30 22:41:47 +020079#define MII_M1111_HWCFG_MODE_RTBI 0x7
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +000080#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
Andrew Lunn865b813a2017-07-30 22:41:47 +020081#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
82#define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
83#define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030084
Cyril Chemparathyc477d042010-08-02 09:44:53 +000085#define MII_88E1121_PHY_MSCR_REG 21
86#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
87#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
Russell King424ca4c2018-01-02 10:58:48 +000088#define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
Cyril Chemparathyc477d042010-08-02 09:44:53 +000089
Andrew Lunn0b046802017-01-20 01:37:49 +010090#define MII_88E1121_MISC_TEST 0x1a
91#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
92#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
93#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
94#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
95#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
96#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
97
98#define MII_88E1510_TEMP_SENSOR 0x1b
99#define MII_88E1510_TEMP_SENSOR_MASK 0xff
100
Heiner Kallweit69f42be2019-03-25 19:35:41 +0100101#define MII_88E1540_COPPER_CTRL3 0x1a
102#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
103#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
104#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
105#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
106#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
107#define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
108
Andrew Lunnfee2d542018-01-09 22:42:09 +0100109#define MII_88E6390_MISC_TEST 0x1b
110#define MII_88E6390_MISC_TEST_SAMPLE_1S 0
111#define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
112#define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
113#define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
114#define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
115
116#define MII_88E6390_TEMP_SENSOR 0x1c
117#define MII_88E6390_TEMP_SENSOR_MASK 0xff
118#define MII_88E6390_TEMP_SENSOR_SAMPLES 10
119
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700120#define MII_88E1318S_PHY_MSCR1_REG 16
121#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700122
Michael Stapelberg3871c382013-03-11 13:56:45 +0000123/* Copper Specific Interrupt Enable Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200124#define MII_88E1318S_PHY_CSIER 0x12
Michael Stapelberg3871c382013-03-11 13:56:45 +0000125/* WOL Event Interrupt Enable */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200126#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000127
128/* LED Timer Control Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200129#define MII_88E1318S_PHY_LED_TCR 0x12
130#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
131#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
132#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000133
134/* Magic Packet MAC address registers */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200135#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
136#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
137#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
Michael Stapelberg3871c382013-03-11 13:56:45 +0000138
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200139#define MII_88E1318S_PHY_WOL_CTRL 0x10
140#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
141#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000142
Wang Dongsheng07777242018-07-01 23:15:46 -0700143#define MII_PHY_LED_CTRL 16
Sergei Poselenov140bc922009-04-07 02:01:41 +0000144#define MII_88E1121_PHY_LED_DEF 0x0030
Wang Dongsheng07777242018-07-01 23:15:46 -0700145#define MII_88E1510_PHY_LED_DEF 0x1177
Jian Shena93f7fe2019-04-22 21:52:23 +0800146#define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
Sergei Poselenov140bc922009-04-07 02:01:41 +0000147
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300148#define MII_M1011_PHY_STATUS 0x11
149#define MII_M1011_PHY_STATUS_1000 0x8000
150#define MII_M1011_PHY_STATUS_100 0x4000
151#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
152#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
153#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
154#define MII_M1011_PHY_STATUS_LINK 0x0400
155
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200156#define MII_88E3016_PHY_SPEC_CTRL 0x10
157#define MII_88E3016_DISABLE_SCRAMBLER 0x0200
158#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
Andy Fleming76884672007-02-09 18:13:58 -0600159
Stefan Roese930b37e2016-02-18 10:59:07 +0100160#define MII_88E1510_GEN_CTRL_REG_1 0x14
161#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
162#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
163#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
164
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200165#define LPA_PAUSE_FIBER 0x180
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200166#define LPA_PAUSE_ASYM_FIBER 0x100
167
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200168#define NB_FIBER_STATS 1
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200169
Andy Fleming00db8182005-07-30 19:31:23 -0400170MODULE_DESCRIPTION("Marvell PHY driver");
171MODULE_AUTHOR("Andy Fleming");
172MODULE_LICENSE("GPL");
173
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100174struct marvell_hw_stat {
175 const char *string;
176 u8 page;
177 u8 reg;
178 u8 bits;
179};
180
181static struct marvell_hw_stat marvell_hw_stats[] = {
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200182 { "phy_receive_errors_copper", 0, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100183 { "phy_idle_errors", 0, 10, 8 },
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200184 { "phy_receive_errors_fiber", 1, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100185};
186
187struct marvell_priv {
188 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
Andrew Lunn0b046802017-01-20 01:37:49 +0100189 char *hwmon_name;
190 struct device *hwmon_dev;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100191};
192
Russell King424ca4c2018-01-02 10:58:48 +0000193static int marvell_read_page(struct phy_device *phydev)
Andrew Lunn6427bb22017-05-17 03:26:03 +0200194{
Russell King424ca4c2018-01-02 10:58:48 +0000195 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
196}
197
198static int marvell_write_page(struct phy_device *phydev, int page)
199{
200 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
Andrew Lunn6427bb22017-05-17 03:26:03 +0200201}
202
203static int marvell_set_page(struct phy_device *phydev, int page)
204{
205 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
206}
207
Andy Fleming00db8182005-07-30 19:31:23 -0400208static int marvell_ack_interrupt(struct phy_device *phydev)
209{
210 int err;
211
212 /* Clear the interrupts by reading the reg */
213 err = phy_read(phydev, MII_M1011_IEVENT);
214
215 if (err < 0)
216 return err;
217
218 return 0;
219}
220
221static int marvell_config_intr(struct phy_device *phydev)
222{
223 int err;
224
Andy Fleming76884672007-02-09 18:13:58 -0600225 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
Andrew Lunn23beb382017-05-17 03:26:04 +0200226 err = phy_write(phydev, MII_M1011_IMASK,
227 MII_M1011_IMASK_INIT);
Andy Fleming00db8182005-07-30 19:31:23 -0400228 else
Andrew Lunn23beb382017-05-17 03:26:04 +0200229 err = phy_write(phydev, MII_M1011_IMASK,
230 MII_M1011_IMASK_CLEAR);
Andy Fleming00db8182005-07-30 19:31:23 -0400231
232 return err;
233}
234
David Thomson239aa552015-07-10 16:28:25 +1200235static int marvell_set_polarity(struct phy_device *phydev, int polarity)
236{
237 int reg;
238 int err;
239 int val;
240
241 /* get the current settings */
242 reg = phy_read(phydev, MII_M1011_PHY_SCR);
243 if (reg < 0)
244 return reg;
245
246 val = reg;
247 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
248 switch (polarity) {
249 case ETH_TP_MDI:
250 val |= MII_M1011_PHY_SCR_MDI;
251 break;
252 case ETH_TP_MDI_X:
253 val |= MII_M1011_PHY_SCR_MDI_X;
254 break;
255 case ETH_TP_MDI_AUTO:
256 case ETH_TP_MDI_INVALID:
257 default:
258 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
259 break;
260 }
261
262 if (val != reg) {
263 /* Set the new polarity value in the register */
264 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
265 if (err)
266 return err;
267 }
268
Florian Fainellid6ab9332018-09-25 11:28:46 -0700269 return val != reg;
David Thomson239aa552015-07-10 16:28:25 +1200270}
271
Andy Fleming00db8182005-07-30 19:31:23 -0400272static int marvell_config_aneg(struct phy_device *phydev)
273{
Florian Fainellid6ab9332018-09-25 11:28:46 -0700274 int changed = 0;
Andy Fleming00db8182005-07-30 19:31:23 -0400275 int err;
276
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530277 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Andy Fleming76884672007-02-09 18:13:58 -0600278 if (err < 0)
279 return err;
280
Florian Fainellid6ab9332018-09-25 11:28:46 -0700281 changed = err;
282
Andy Fleming76884672007-02-09 18:13:58 -0600283 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
284 MII_M1111_PHY_LED_DIRECT);
285 if (err < 0)
286 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400287
288 err = genphy_config_aneg(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000289 if (err < 0)
290 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400291
Florian Fainellid6ab9332018-09-25 11:28:46 -0700292 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200293 /* A write to speed/duplex bits (that is performed by
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000294 * genphy_config_aneg() call above) must be followed by
295 * a software reset. Otherwise, the write has no effect.
296 */
Andrew Lunn34386342017-07-30 22:41:45 +0200297 err = genphy_soft_reset(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000298 if (err < 0)
299 return err;
300 }
301
302 return 0;
Andy Fleming00db8182005-07-30 19:31:23 -0400303}
304
Andrew Lunnf2899782017-05-23 17:49:13 +0200305static int m88e1101_config_aneg(struct phy_device *phydev)
306{
307 int err;
308
309 /* This Marvell PHY has an errata which requires
310 * that certain registers get written in order
311 * to restart autonegotiation
312 */
Andrew Lunn34386342017-07-30 22:41:45 +0200313 err = genphy_soft_reset(phydev);
Andrew Lunnf2899782017-05-23 17:49:13 +0200314 if (err < 0)
315 return err;
316
317 err = phy_write(phydev, 0x1d, 0x1f);
318 if (err < 0)
319 return err;
320
321 err = phy_write(phydev, 0x1e, 0x200c);
322 if (err < 0)
323 return err;
324
325 err = phy_write(phydev, 0x1d, 0x5);
326 if (err < 0)
327 return err;
328
329 err = phy_write(phydev, 0x1e, 0);
330 if (err < 0)
331 return err;
332
333 err = phy_write(phydev, 0x1e, 0x100);
334 if (err < 0)
335 return err;
336
337 return marvell_config_aneg(phydev);
338}
339
David Daneycf41a512010-11-19 12:13:18 +0000340#ifdef CONFIG_OF_MDIO
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200341/* Set and/or override some configuration registers based on the
David Daneycf41a512010-11-19 12:13:18 +0000342 * marvell,reg-init property stored in the of_node for the phydev.
343 *
344 * marvell,reg-init = <reg-page reg mask value>,...;
345 *
346 * There may be one or more sets of <reg-page reg mask value>:
347 *
348 * reg-page: which register bank to use.
349 * reg: the register.
350 * mask: if non-zero, ANDed with existing register value.
351 * value: ORed with the masked value and written to the regiser.
352 *
353 */
354static int marvell_of_reg_init(struct phy_device *phydev)
355{
356 const __be32 *paddr;
Russell King424ca4c2018-01-02 10:58:48 +0000357 int len, i, saved_page, current_page, ret = 0;
David Daneycf41a512010-11-19 12:13:18 +0000358
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100359 if (!phydev->mdio.dev.of_node)
David Daneycf41a512010-11-19 12:13:18 +0000360 return 0;
361
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100362 paddr = of_get_property(phydev->mdio.dev.of_node,
363 "marvell,reg-init", &len);
David Daneycf41a512010-11-19 12:13:18 +0000364 if (!paddr || len < (4 * sizeof(*paddr)))
365 return 0;
366
Russell King424ca4c2018-01-02 10:58:48 +0000367 saved_page = phy_save_page(phydev);
David Daneycf41a512010-11-19 12:13:18 +0000368 if (saved_page < 0)
Russell King424ca4c2018-01-02 10:58:48 +0000369 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000370 current_page = saved_page;
371
David Daneycf41a512010-11-19 12:13:18 +0000372 len /= sizeof(*paddr);
373 for (i = 0; i < len - 3; i += 4) {
Andrew Lunn6427bb22017-05-17 03:26:03 +0200374 u16 page = be32_to_cpup(paddr + i);
David Daneycf41a512010-11-19 12:13:18 +0000375 u16 reg = be32_to_cpup(paddr + i + 1);
376 u16 mask = be32_to_cpup(paddr + i + 2);
377 u16 val_bits = be32_to_cpup(paddr + i + 3);
378 int val;
379
Andrew Lunn6427bb22017-05-17 03:26:03 +0200380 if (page != current_page) {
381 current_page = page;
Russell King424ca4c2018-01-02 10:58:48 +0000382 ret = marvell_write_page(phydev, page);
David Daneycf41a512010-11-19 12:13:18 +0000383 if (ret < 0)
384 goto err;
385 }
386
387 val = 0;
388 if (mask) {
Russell King424ca4c2018-01-02 10:58:48 +0000389 val = __phy_read(phydev, reg);
David Daneycf41a512010-11-19 12:13:18 +0000390 if (val < 0) {
391 ret = val;
392 goto err;
393 }
394 val &= mask;
395 }
396 val |= val_bits;
397
Russell King424ca4c2018-01-02 10:58:48 +0000398 ret = __phy_write(phydev, reg, val);
David Daneycf41a512010-11-19 12:13:18 +0000399 if (ret < 0)
400 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000401 }
402err:
Russell King424ca4c2018-01-02 10:58:48 +0000403 return phy_restore_page(phydev, saved_page, ret);
David Daneycf41a512010-11-19 12:13:18 +0000404}
405#else
406static int marvell_of_reg_init(struct phy_device *phydev)
407{
408 return 0;
409}
410#endif /* CONFIG_OF_MDIO */
411
Andrew Lunn864dc722017-07-30 22:41:48 +0200412static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
Sergei Poselenov140bc922009-04-07 02:01:41 +0000413{
Russell King424ca4c2018-01-02 10:58:48 +0000414 int mscr;
Andrew Lunn864dc722017-07-30 22:41:48 +0200415
416 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
Russell King424ca4c2018-01-02 10:58:48 +0000417 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
418 MII_88E1121_PHY_MSCR_TX_DELAY;
Andrew Lunn864dc722017-07-30 22:41:48 +0200419 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
Russell King424ca4c2018-01-02 10:58:48 +0000420 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
Andrew Lunn864dc722017-07-30 22:41:48 +0200421 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
Russell King424ca4c2018-01-02 10:58:48 +0000422 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
423 else
424 mscr = 0;
Andrew Lunn864dc722017-07-30 22:41:48 +0200425
Russell King424ca4c2018-01-02 10:58:48 +0000426 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
427 MII_88E1121_PHY_MSCR_REG,
428 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
Andrew Lunn864dc722017-07-30 22:41:48 +0200429}
430
431static int m88e1121_config_aneg(struct phy_device *phydev)
432{
Florian Fainellid6ab9332018-09-25 11:28:46 -0700433 int changed = 0;
Andrew Lunn864dc722017-07-30 22:41:48 +0200434 int err = 0;
435
436 if (phy_interface_is_rgmii(phydev)) {
437 err = m88e1121_config_aneg_rgmii_delays(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000438 if (err < 0)
Andrew Lunn864dc722017-07-30 22:41:48 +0200439 return err;
440 }
441
Andrew Lunnfecd5e92017-07-30 22:41:49 +0200442 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000443 if (err < 0)
444 return err;
445
Florian Fainellid6ab9332018-09-25 11:28:46 -0700446 changed = err;
447
448 err = genphy_config_aneg(phydev);
449 if (err < 0)
450 return err;
451
David S. Miller4b1bd692018-09-25 22:41:31 -0700452 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
Florian Fainellid6ab9332018-09-25 11:28:46 -0700453 /* A software reset is used to ensure a "commit" of the
454 * changes is done.
455 */
456 err = genphy_soft_reset(phydev);
457 if (err < 0)
458 return err;
459 }
460
461 return 0;
Sergei Poselenov140bc922009-04-07 02:01:41 +0000462}
463
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700464static int m88e1318_config_aneg(struct phy_device *phydev)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700465{
Russell King424ca4c2018-01-02 10:58:48 +0000466 int err;
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700467
Russell King424ca4c2018-01-02 10:58:48 +0000468 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
469 MII_88E1318S_PHY_MSCR1_REG,
470 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700471 if (err < 0)
472 return err;
473
474 return m88e1121_config_aneg(phydev);
475}
476
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200477/**
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100478 * linkmode_adv_to_fiber_adv_t
479 * @advertise: the linkmode advertisement settings
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200480 *
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100481 * A small helper function that translates linkmode advertisement
482 * settings to phy autonegotiation advertisements for the MII_ADV
483 * register for fiber link.
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200484 */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100485static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200486{
487 u32 result = 0;
488
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100489 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
Russell King20ecf422019-12-17 13:39:42 +0000490 result |= ADVERTISE_1000XHALF;
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100491 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
Russell King20ecf422019-12-17 13:39:42 +0000492 result |= ADVERTISE_1000XFULL;
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200493
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100494 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
495 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
Russell King20ecf422019-12-17 13:39:42 +0000496 result |= ADVERTISE_1000XPSE_ASYM;
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100497 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
Russell King20ecf422019-12-17 13:39:42 +0000498 result |= ADVERTISE_1000XPAUSE;
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200499
500 return result;
501}
502
503/**
504 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
505 * @phydev: target phy_device struct
506 *
507 * Description: If auto-negotiation is enabled, we configure the
508 * advertising, and then restart auto-negotiation. If it is not
509 * enabled, then we write the BMCR. Adapted for fiber link in
510 * some Marvell's devices.
511 */
512static int marvell_config_aneg_fiber(struct phy_device *phydev)
513{
514 int changed = 0;
515 int err;
Russell King9f4bae72019-12-17 13:39:47 +0000516 u16 adv;
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200517
518 if (phydev->autoneg != AUTONEG_ENABLE)
519 return genphy_setup_forced(phydev);
520
521 /* Only allow advertising what this PHY supports */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100522 linkmode_and(phydev->advertising, phydev->advertising,
523 phydev->supported);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200524
Russell King9f4bae72019-12-17 13:39:47 +0000525 adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
526
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200527 /* Setup fiber advertisement */
Russell King9f4bae72019-12-17 13:39:47 +0000528 err = phy_modify_changed(phydev, MII_ADVERTISE,
529 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
530 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
531 adv);
532 if (err < 0)
533 return err;
534 if (err > 0)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200535 changed = 1;
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200536
Russell Kingb5abac22019-12-17 13:39:52 +0000537 return genphy_check_and_restart_aneg(phydev, changed);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200538}
539
Michal Simek10e24caa2013-05-30 20:08:27 +0000540static int m88e1510_config_aneg(struct phy_device *phydev)
541{
542 int err;
543
Andrew Lunn52295662017-05-25 21:42:08 +0200544 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200545 if (err < 0)
546 goto error;
547
548 /* Configure the copper link first */
Michal Simek10e24caa2013-05-30 20:08:27 +0000549 err = m88e1318_config_aneg(phydev);
550 if (err < 0)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200551 goto error;
Michal Simek10e24caa2013-05-30 20:08:27 +0000552
Russell Kingde9c4e02017-12-13 09:22:03 +0000553 /* Do not touch the fiber page if we're in copper->sgmii mode */
554 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
555 return 0;
556
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200557 /* Then the fiber link */
Andrew Lunn52295662017-05-25 21:42:08 +0200558 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200559 if (err < 0)
560 goto error;
561
562 err = marvell_config_aneg_fiber(phydev);
563 if (err < 0)
564 goto error;
565
Andrew Lunn52295662017-05-25 21:42:08 +0200566 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200567
568error:
Andrew Lunn52295662017-05-25 21:42:08 +0200569 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200570 return err;
Clemens Gruber79be1a12016-02-15 23:46:45 +0100571}
572
Wang Dongsheng07777242018-07-01 23:15:46 -0700573static void marvell_config_led(struct phy_device *phydev)
574{
575 u16 def_config;
576 int err;
577
578 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
579 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
580 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
581 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
582 def_config = MII_88E1121_PHY_LED_DEF;
583 break;
584 /* Default PHY LED config:
585 * LED[0] .. 1000Mbps Link
586 * LED[1] .. 100Mbps Link
587 * LED[2] .. Blink, Activity
588 */
589 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
Jian Shena93f7fe2019-04-22 21:52:23 +0800590 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
591 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
592 else
593 def_config = MII_88E1510_PHY_LED_DEF;
Wang Dongsheng07777242018-07-01 23:15:46 -0700594 break;
595 default:
596 return;
597 }
598
599 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
600 def_config);
601 if (err < 0)
Andrew Lunnab2a6052018-09-29 23:04:10 +0200602 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
Wang Dongsheng07777242018-07-01 23:15:46 -0700603}
604
Clemens Gruber79be1a12016-02-15 23:46:45 +0100605static int marvell_config_init(struct phy_device *phydev)
606{
Wang Dongsheng07777242018-07-01 23:15:46 -0700607 /* Set defalut LED */
608 marvell_config_led(phydev);
609
Clemens Gruber79be1a12016-02-15 23:46:45 +0100610 /* Set registers from marvell,reg-init DT property */
Michal Simek10e24caa2013-05-30 20:08:27 +0000611 return marvell_of_reg_init(phydev);
612}
613
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200614static int m88e3016_config_init(struct phy_device *phydev)
615{
Russell Kingfea23fb2018-01-02 10:58:58 +0000616 int ret;
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200617
618 /* Enable Scrambler and Auto-Crossover */
Russell Kingfea23fb2018-01-02 10:58:58 +0000619 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
Russell Kingf1028522018-01-05 16:07:10 +0000620 MII_88E3016_DISABLE_SCRAMBLER,
Russell Kingfea23fb2018-01-02 10:58:58 +0000621 MII_88E3016_AUTO_MDIX_CROSSOVER);
622 if (ret < 0)
623 return ret;
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200624
Clemens Gruber79be1a12016-02-15 23:46:45 +0100625 return marvell_config_init(phydev);
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200626}
627
Andrew Lunn865b813a2017-07-30 22:41:47 +0200628static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
629 u16 mode,
630 int fibre_copper_auto)
631{
Andrew Lunn865b813a2017-07-30 22:41:47 +0200632 if (fibre_copper_auto)
Russell Kingfea23fb2018-01-02 10:58:58 +0000633 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
Andrew Lunn865b813a2017-07-30 22:41:47 +0200634
Russell Kingfea23fb2018-01-02 10:58:58 +0000635 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
Russell Kingf1028522018-01-05 16:07:10 +0000636 MII_M1111_HWCFG_MODE_MASK |
637 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
638 MII_M1111_HWCFG_FIBER_COPPER_RES,
Russell Kingfea23fb2018-01-02 10:58:58 +0000639 mode);
Andrew Lunn865b813a2017-07-30 22:41:47 +0200640}
641
Andrew Lunn61111592017-07-30 22:41:46 +0200642static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
Kim Phillips895ee682007-06-05 18:46:47 +0800643{
Russell Kingfea23fb2018-01-02 10:58:58 +0000644 int delay;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200645
646 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Russell Kingfea23fb2018-01-02 10:58:58 +0000647 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200648 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
Russell Kingfea23fb2018-01-02 10:58:58 +0000649 delay = MII_M1111_RGMII_RX_DELAY;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200650 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
Russell Kingfea23fb2018-01-02 10:58:58 +0000651 delay = MII_M1111_RGMII_TX_DELAY;
652 } else {
653 delay = 0;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200654 }
655
Russell Kingfea23fb2018-01-02 10:58:58 +0000656 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
Russell Kingf1028522018-01-05 16:07:10 +0000657 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
Russell Kingfea23fb2018-01-02 10:58:58 +0000658 delay);
Andrew Lunn61111592017-07-30 22:41:46 +0200659}
660
661static int m88e1111_config_init_rgmii(struct phy_device *phydev)
662{
663 int temp;
664 int err;
665
666 err = m88e1111_config_init_rgmii_delays(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200667 if (err < 0)
668 return err;
669
670 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
671 if (temp < 0)
672 return temp;
673
674 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
675
676 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
677 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
678 else
679 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
680
681 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
682}
683
684static int m88e1111_config_init_sgmii(struct phy_device *phydev)
685{
686 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200687
Andrew Lunn865b813a2017-07-30 22:41:47 +0200688 err = m88e1111_config_init_hwcfg_mode(
689 phydev,
690 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
691 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200692 if (err < 0)
693 return err;
694
695 /* make sure copper is selected */
Andrew Lunn52295662017-05-25 21:42:08 +0200696 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200697}
698
699static int m88e1111_config_init_rtbi(struct phy_device *phydev)
700{
Andrew Lunn61111592017-07-30 22:41:46 +0200701 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200702
Andrew Lunn61111592017-07-30 22:41:46 +0200703 err = m88e1111_config_init_rgmii_delays(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000704 if (err < 0)
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200705 return err;
706
Andrew Lunn865b813a2017-07-30 22:41:47 +0200707 err = m88e1111_config_init_hwcfg_mode(
708 phydev,
709 MII_M1111_HWCFG_MODE_RTBI,
710 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200711 if (err < 0)
712 return err;
713
714 /* soft reset */
Andrew Lunn34386342017-07-30 22:41:45 +0200715 err = genphy_soft_reset(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200716 if (err < 0)
717 return err;
718
Andrew Lunn865b813a2017-07-30 22:41:47 +0200719 return m88e1111_config_init_hwcfg_mode(
720 phydev,
721 MII_M1111_HWCFG_MODE_RTBI,
722 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200723}
724
725static int m88e1111_config_init(struct phy_device *phydev)
726{
727 int err;
728
Florian Fainelli32a64162015-05-26 12:19:59 -0700729 if (phy_interface_is_rgmii(phydev)) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200730 err = m88e1111_config_init_rgmii(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000731 if (err < 0)
Kim Phillips895ee682007-06-05 18:46:47 +0800732 return err;
733 }
734
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500735 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200736 err = m88e1111_config_init_sgmii(phydev);
Madalin Bucur07151bc2015-08-07 17:07:50 +0800737 if (err < 0)
738 return err;
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500739 }
740
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000741 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200742 err = m88e1111_config_init_rtbi(phydev);
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000743 if (err < 0)
744 return err;
745 }
746
David Daneycf41a512010-11-19 12:13:18 +0000747 err = marvell_of_reg_init(phydev);
748 if (err < 0)
749 return err;
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000750
Andrew Lunn34386342017-07-30 22:41:45 +0200751 return genphy_soft_reset(phydev);
Kim Phillips895ee682007-06-05 18:46:47 +0800752}
753
Heiner Kallweit5c6bc512019-10-28 20:53:25 +0100754static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
755{
756 int val, cnt, enable;
757
758 val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
759 if (val < 0)
760 return val;
761
762 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
763 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
764
765 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
766
767 return 0;
768}
769
770static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
771{
772 int val;
773
774 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
775 return -E2BIG;
776
777 if (!cnt)
778 return phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
779 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
780
781 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
782 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
783
784 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
785 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
786 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
787 val);
788}
789
790static int m88e1111_get_tunable(struct phy_device *phydev,
791 struct ethtool_tunable *tuna, void *data)
792{
793 switch (tuna->id) {
794 case ETHTOOL_PHY_DOWNSHIFT:
795 return m88e1111_get_downshift(phydev, data);
796 default:
797 return -EOPNOTSUPP;
798 }
799}
800
801static int m88e1111_set_tunable(struct phy_device *phydev,
802 struct ethtool_tunable *tuna, const void *data)
803{
804 switch (tuna->id) {
805 case ETHTOOL_PHY_DOWNSHIFT:
806 return m88e1111_set_downshift(phydev, *(const u8 *)data);
807 default:
808 return -EOPNOTSUPP;
809 }
810}
811
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100812static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200813{
814 int val, cnt, enable;
815
816 val = phy_read(phydev, MII_M1011_PHY_SCR);
817 if (val < 0)
818 return val;
819
820 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
Heiner Kallweitf8d975b2019-10-28 20:52:22 +0100821 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200822
823 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
824
825 return 0;
826}
827
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100828static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200829{
830 int val;
831
832 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
833 return -E2BIG;
834
835 if (!cnt)
836 return phy_clear_bits(phydev, MII_M1011_PHY_SCR,
837 MII_M1011_PHY_SCR_DOWNSHIFT_EN);
838
839 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
Heiner Kallweitf8d975b2019-10-28 20:52:22 +0100840 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200841
842 return phy_modify(phydev, MII_M1011_PHY_SCR,
843 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
Heiner Kallweitf8d975b2019-10-28 20:52:22 +0100844 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200845 val);
846}
847
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100848static int m88e1011_get_tunable(struct phy_device *phydev,
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200849 struct ethtool_tunable *tuna, void *data)
850{
851 switch (tuna->id) {
852 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100853 return m88e1011_get_downshift(phydev, data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200854 default:
855 return -EOPNOTSUPP;
856 }
857}
858
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100859static int m88e1011_set_tunable(struct phy_device *phydev,
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200860 struct ethtool_tunable *tuna, const void *data)
861{
862 switch (tuna->id) {
863 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100864 return m88e1011_set_downshift(phydev, *(const u8 *)data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200865 default:
866 return -EOPNOTSUPP;
867 }
868}
869
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100870static void m88e1011_link_change_notify(struct phy_device *phydev)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200871{
872 int status;
873
874 if (phydev->state != PHY_RUNNING)
875 return;
876
877 /* we may be on fiber page currently */
878 status = phy_read_paged(phydev, MII_MARVELL_COPPER_PAGE,
879 MII_M1011_PHY_SSR);
880
881 if (status > 0 && status & MII_M1011_PHY_SSR_DOWNSHIFT)
882 phydev_warn(phydev, "Downshift occurred! Cabling may be defective.\n");
883}
884
Heiner Kallweite2d861c2019-10-19 15:58:19 +0200885static int m88e1116r_config_init(struct phy_device *phydev)
886{
887 int err;
888
889 err = genphy_soft_reset(phydev);
890 if (err < 0)
891 return err;
892
893 msleep(500);
894
895 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
896 if (err < 0)
897 return err;
898
899 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
900 if (err < 0)
901 return err;
902
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100903 err = m88e1011_set_downshift(phydev, 8);
Heiner Kallweite2d861c2019-10-19 15:58:19 +0200904 if (err < 0)
905 return err;
906
907 if (phy_interface_is_rgmii(phydev)) {
908 err = m88e1121_config_aneg_rgmii_delays(phydev);
909 if (err < 0)
910 return err;
911 }
912
913 err = genphy_soft_reset(phydev);
914 if (err < 0)
915 return err;
916
917 return marvell_config_init(phydev);
918}
919
Esben Haabendaldd9a1222018-04-05 22:40:29 +0200920static int m88e1318_config_init(struct phy_device *phydev)
921{
922 if (phy_interrupt_is_valid(phydev)) {
923 int err = phy_modify_paged(
924 phydev, MII_MARVELL_LED_PAGE,
925 MII_88E1318S_PHY_LED_TCR,
926 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
927 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
928 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
929 if (err < 0)
930 return err;
931 }
932
Wang Dongsheng07777242018-07-01 23:15:46 -0700933 return marvell_config_init(phydev);
Esben Haabendaldd9a1222018-04-05 22:40:29 +0200934}
935
Clemens Gruber407353e2016-02-23 20:16:58 +0100936static int m88e1510_config_init(struct phy_device *phydev)
937{
938 int err;
Clemens Gruber407353e2016-02-23 20:16:58 +0100939
940 /* SGMII-to-Copper mode initialization */
941 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
942 /* Select page 18 */
Andrew Lunn6427bb22017-05-17 03:26:03 +0200943 err = marvell_set_page(phydev, 18);
Clemens Gruber407353e2016-02-23 20:16:58 +0100944 if (err < 0)
945 return err;
946
947 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
Russell Kingfea23fb2018-01-02 10:58:58 +0000948 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
Russell Kingf1028522018-01-05 16:07:10 +0000949 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
Russell Kingfea23fb2018-01-02 10:58:58 +0000950 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
Clemens Gruber407353e2016-02-23 20:16:58 +0100951 if (err < 0)
952 return err;
953
954 /* PHY reset is necessary after changing MODE[2:0] */
Russell Kingfea23fb2018-01-02 10:58:58 +0000955 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
956 MII_88E1510_GEN_CTRL_REG_1_RESET);
Clemens Gruber407353e2016-02-23 20:16:58 +0100957 if (err < 0)
958 return err;
959
960 /* Reset page selection */
Andrew Lunn52295662017-05-25 21:42:08 +0200961 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Clemens Gruber407353e2016-02-23 20:16:58 +0100962 if (err < 0)
963 return err;
964 }
965
Esben Haabendaldd9a1222018-04-05 22:40:29 +0200966 return m88e1318_config_init(phydev);
Clemens Gruber407353e2016-02-23 20:16:58 +0100967}
968
Ron Madrid605f1962008-11-06 09:05:26 +0000969static int m88e1118_config_aneg(struct phy_device *phydev)
970{
971 int err;
972
Andrew Lunn34386342017-07-30 22:41:45 +0200973 err = genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +0000974 if (err < 0)
975 return err;
976
Andrew Lunnfecd5e92017-07-30 22:41:49 +0200977 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Ron Madrid605f1962008-11-06 09:05:26 +0000978 if (err < 0)
979 return err;
980
981 err = genphy_config_aneg(phydev);
982 return 0;
983}
984
985static int m88e1118_config_init(struct phy_device *phydev)
986{
987 int err;
988
989 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +0200990 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +0000991 if (err < 0)
992 return err;
993
994 /* Enable 1000 Mbit */
995 err = phy_write(phydev, 0x15, 0x1070);
996 if (err < 0)
997 return err;
998
999 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +02001000 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +00001001 if (err < 0)
1002 return err;
1003
1004 /* Adjust LED Control */
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001005 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1006 err = phy_write(phydev, 0x10, 0x1100);
1007 else
1008 err = phy_write(phydev, 0x10, 0x021e);
Ron Madrid605f1962008-11-06 09:05:26 +00001009 if (err < 0)
1010 return err;
1011
David Daneycf41a512010-11-19 12:13:18 +00001012 err = marvell_of_reg_init(phydev);
1013 if (err < 0)
1014 return err;
1015
Ron Madrid605f1962008-11-06 09:05:26 +00001016 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +02001017 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +00001018 if (err < 0)
1019 return err;
1020
Andrew Lunn34386342017-07-30 22:41:45 +02001021 return genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +00001022}
1023
David Daney90600732010-11-19 11:58:53 +00001024static int m88e1149_config_init(struct phy_device *phydev)
1025{
1026 int err;
1027
1028 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +02001029 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
David Daney90600732010-11-19 11:58:53 +00001030 if (err < 0)
1031 return err;
1032
1033 /* Enable 1000 Mbit */
1034 err = phy_write(phydev, 0x15, 0x1048);
1035 if (err < 0)
1036 return err;
1037
David Daneycf41a512010-11-19 12:13:18 +00001038 err = marvell_of_reg_init(phydev);
1039 if (err < 0)
1040 return err;
1041
David Daney90600732010-11-19 11:58:53 +00001042 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +02001043 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
David Daney90600732010-11-19 11:58:53 +00001044 if (err < 0)
1045 return err;
1046
Andrew Lunn34386342017-07-30 22:41:45 +02001047 return genphy_soft_reset(phydev);
David Daney90600732010-11-19 11:58:53 +00001048}
1049
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001050static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1051{
1052 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001053
Andrew Lunn61111592017-07-30 22:41:46 +02001054 err = m88e1111_config_init_rgmii_delays(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001055 if (err < 0)
1056 return err;
1057
1058 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1059 err = phy_write(phydev, 0x1d, 0x0012);
1060 if (err < 0)
1061 return err;
1062
Russell Kingf1028522018-01-05 16:07:10 +00001063 err = phy_modify(phydev, 0x1e, 0x0fc0,
Russell Kingfea23fb2018-01-02 10:58:58 +00001064 2 << 9 | /* 36 ohm */
1065 2 << 6); /* 39 ohm */
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001066 if (err < 0)
1067 return err;
1068
1069 err = phy_write(phydev, 0x1d, 0x3);
1070 if (err < 0)
1071 return err;
1072
1073 err = phy_write(phydev, 0x1e, 0x8000);
1074 }
1075 return err;
1076}
1077
1078static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1079{
Andrew Lunn865b813a2017-07-30 22:41:47 +02001080 return m88e1111_config_init_hwcfg_mode(
1081 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1082 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001083}
1084
Andy Fleming76884672007-02-09 18:13:58 -06001085static int m88e1145_config_init(struct phy_device *phydev)
1086{
1087 int err;
1088
1089 /* Take care of errata E0 & E1 */
1090 err = phy_write(phydev, 0x1d, 0x001b);
1091 if (err < 0)
1092 return err;
1093
1094 err = phy_write(phydev, 0x1e, 0x418f);
1095 if (err < 0)
1096 return err;
1097
1098 err = phy_write(phydev, 0x1d, 0x0016);
1099 if (err < 0)
1100 return err;
1101
1102 err = phy_write(phydev, 0x1e, 0xa2da);
1103 if (err < 0)
1104 return err;
1105
Kim Phillips895ee682007-06-05 18:46:47 +08001106 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001107 err = m88e1145_config_init_rgmii(phydev);
Andy Fleming76884672007-02-09 18:13:58 -06001108 if (err < 0)
1109 return err;
Andy Fleming76884672007-02-09 18:13:58 -06001110 }
1111
Viet Nga Daob0224172014-10-23 19:41:53 -07001112 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001113 err = m88e1145_config_init_sgmii(phydev);
Viet Nga Daob0224172014-10-23 19:41:53 -07001114 if (err < 0)
1115 return err;
1116 }
1117
David Daneycf41a512010-11-19 12:13:18 +00001118 err = marvell_of_reg_init(phydev);
1119 if (err < 0)
1120 return err;
1121
Andy Fleming76884672007-02-09 18:13:58 -06001122 return 0;
1123}
Andy Fleming00db8182005-07-30 19:31:23 -04001124
Heiner Kallweit69f42be2019-03-25 19:35:41 +01001125static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1126{
1127 int val;
1128
1129 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1130 if (val < 0)
1131 return val;
1132
1133 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1134 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1135 return 0;
1136 }
1137
1138 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1139
1140 switch (val) {
1141 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1142 *msecs = 0;
1143 break;
1144 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1145 *msecs = 10;
1146 break;
1147 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1148 *msecs = 20;
1149 break;
1150 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1151 *msecs = 40;
1152 break;
1153 default:
1154 return -EINVAL;
1155 }
1156
1157 return 0;
1158}
1159
1160static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1161{
1162 struct ethtool_eee eee;
1163 int val, ret;
1164
1165 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1166 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1167 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1168
1169 /* According to the Marvell data sheet EEE must be disabled for
1170 * Fast Link Down detection to work properly
1171 */
1172 ret = phy_ethtool_get_eee(phydev, &eee);
1173 if (!ret && eee.eee_enabled) {
1174 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1175 return -EBUSY;
1176 }
1177
1178 if (*msecs <= 5)
1179 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1180 else if (*msecs <= 15)
1181 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1182 else if (*msecs <= 30)
1183 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1184 else
1185 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1186
1187 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1188
1189 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1190 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1191 if (ret)
1192 return ret;
1193
1194 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1195 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1196}
1197
1198static int m88e1540_get_tunable(struct phy_device *phydev,
1199 struct ethtool_tunable *tuna, void *data)
1200{
1201 switch (tuna->id) {
1202 case ETHTOOL_PHY_FAST_LINK_DOWN:
1203 return m88e1540_get_fld(phydev, data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001204 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001205 return m88e1011_get_downshift(phydev, data);
Heiner Kallweit69f42be2019-03-25 19:35:41 +01001206 default:
1207 return -EOPNOTSUPP;
1208 }
1209}
1210
1211static int m88e1540_set_tunable(struct phy_device *phydev,
1212 struct ethtool_tunable *tuna, const void *data)
1213{
1214 switch (tuna->id) {
1215 case ETHTOOL_PHY_FAST_LINK_DOWN:
1216 return m88e1540_set_fld(phydev, data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001217 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001218 return m88e1011_set_downshift(phydev, *(const u8 *)data);
Heiner Kallweit69f42be2019-03-25 19:35:41 +01001219 default:
1220 return -EOPNOTSUPP;
1221 }
1222}
1223
Andrew Lunn8cbcdc12019-01-10 22:48:36 +01001224/* The VOD can be out of specification on link up. Poke an
1225 * undocumented register, in an undocumented page, with a magic value
1226 * to fix this.
1227 */
1228static int m88e6390_errata(struct phy_device *phydev)
1229{
1230 int err;
1231
1232 err = phy_write(phydev, MII_BMCR,
1233 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1234 if (err)
1235 return err;
1236
1237 usleep_range(300, 400);
1238
1239 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1240 if (err)
1241 return err;
1242
1243 return genphy_soft_reset(phydev);
1244}
1245
1246static int m88e6390_config_aneg(struct phy_device *phydev)
1247{
1248 int err;
1249
1250 err = m88e6390_errata(phydev);
1251 if (err)
1252 return err;
1253
1254 return m88e1510_config_aneg(phydev);
1255}
1256
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001257/**
Andrew Lunnab9cb722018-12-05 21:49:42 +01001258 * fiber_lpa_mod_linkmode_lpa_t
Andrew Lunnc0ec3c22018-11-10 23:43:34 +01001259 * @advertising: the linkmode advertisement settings
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001260 * @lpa: value of the MII_LPA register for fiber link
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001261 *
Andrew Lunnab9cb722018-12-05 21:49:42 +01001262 * A small helper function that translates MII_LPA bits to linkmode LP
1263 * advertisement settings. Other bits in advertising are left
1264 * unchanged.
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001265 */
Andrew Lunnab9cb722018-12-05 21:49:42 +01001266static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001267{
Andrew Lunnab9cb722018-12-05 21:49:42 +01001268 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
Russell King20ecf422019-12-17 13:39:42 +00001269 advertising, lpa & LPA_1000XHALF);
Andrew Lunnab9cb722018-12-05 21:49:42 +01001270
1271 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
Russell King20ecf422019-12-17 13:39:42 +00001272 advertising, lpa & LPA_1000XFULL);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001273}
1274
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001275static int marvell_read_status_page_an(struct phy_device *phydev,
Russell Kingd2004e22019-12-17 13:39:36 +00001276 int fiber, int status)
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001277{
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001278 int lpa;
Russell Kingfcf1f592019-12-17 13:39:21 +00001279 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001280
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001281 if (!fiber) {
Russell Kingfcf1f592019-12-17 13:39:21 +00001282 err = genphy_read_lpa(phydev);
1283 if (err < 0)
1284 return err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001285
Russell Kingaf006242019-12-17 13:39:06 +00001286 phy_resolve_aneg_pause(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001287 } else {
Russell Kingfcf1f592019-12-17 13:39:21 +00001288 lpa = phy_read(phydev, MII_LPA);
1289 if (lpa < 0)
1290 return lpa;
1291
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001292 /* The fiber link is only 1000M capable */
Andrew Lunnab9cb722018-12-05 21:49:42 +01001293 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001294
1295 if (phydev->duplex == DUPLEX_FULL) {
1296 if (!(lpa & LPA_PAUSE_FIBER)) {
1297 phydev->pause = 0;
1298 phydev->asym_pause = 0;
1299 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1300 phydev->pause = 1;
1301 phydev->asym_pause = 1;
1302 } else {
1303 phydev->pause = 1;
1304 phydev->asym_pause = 0;
1305 }
1306 }
1307 }
Russell Kingfcf1f592019-12-17 13:39:21 +00001308
Russell Kingb82cf172020-02-27 09:44:49 +00001309 if (!(status & MII_M1011_PHY_STATUS_RESOLVED))
1310 return 0;
1311
Russell Kingfcf1f592019-12-17 13:39:21 +00001312 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1313 phydev->duplex = DUPLEX_FULL;
1314 else
1315 phydev->duplex = DUPLEX_HALF;
1316
1317 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1318 case MII_M1011_PHY_STATUS_1000:
1319 phydev->speed = SPEED_1000;
1320 break;
1321
1322 case MII_M1011_PHY_STATUS_100:
1323 phydev->speed = SPEED_100;
1324 break;
1325
1326 default:
1327 phydev->speed = SPEED_10;
1328 break;
1329 }
1330
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001331 return 0;
1332}
1333
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001334/* marvell_read_status_page
1335 *
Jeff Garzikf0c88f92008-03-25 23:53:24 -04001336 * Description:
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001337 * Check the link, then figure out the current state
1338 * by comparing what we advertise with what the link partner
1339 * advertises. Start by checking the gigabit possibilities,
1340 * then move on to 10/100.
1341 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001342static int marvell_read_status_page(struct phy_device *phydev, int page)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001343{
Russell Kingd2004e22019-12-17 13:39:36 +00001344 int status;
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001345 int fiber;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001346 int err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001347
Russell Kingd2004e22019-12-17 13:39:36 +00001348 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1349 if (status < 0)
1350 return status;
1351
1352 /* Use the generic register for copper link status,
1353 * and the PHY status register for fiber link status.
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001354 */
Russell Kingd2004e22019-12-17 13:39:36 +00001355 if (page == MII_MARVELL_FIBER_PAGE) {
1356 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1357 } else {
1358 err = genphy_update_link(phydev);
1359 if (err)
1360 return err;
1361 }
1362
Andrew Lunn52295662017-05-25 21:42:08 +02001363 if (page == MII_MARVELL_FIBER_PAGE)
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001364 fiber = 1;
1365 else
1366 fiber = 0;
1367
Russell King98f92832019-12-17 13:39:26 +00001368 linkmode_zero(phydev->lp_advertising);
1369 phydev->pause = 0;
1370 phydev->asym_pause = 0;
Russell Kingb82cf172020-02-27 09:44:49 +00001371 phydev->speed = SPEED_UNKNOWN;
1372 phydev->duplex = DUPLEX_UNKNOWN;
Russell King98f92832019-12-17 13:39:26 +00001373
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001374 if (phydev->autoneg == AUTONEG_ENABLE)
Russell Kingd2004e22019-12-17 13:39:36 +00001375 err = marvell_read_status_page_an(phydev, fiber, status);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001376 else
Russell King98f92832019-12-17 13:39:26 +00001377 err = genphy_read_status_fixed(phydev);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001378
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001379 return err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001380}
1381
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001382/* marvell_read_status
1383 *
1384 * Some Marvell's phys have two modes: fiber and copper.
1385 * Both need status checked.
1386 * Description:
1387 * First, check the fiber link and status.
1388 * If the fiber link is down, check the copper link and status which
1389 * will be the default value if both link are down.
1390 */
1391static int marvell_read_status(struct phy_device *phydev)
1392{
1393 int err;
1394
1395 /* Check the fiber mode first */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001396 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1397 phydev->supported) &&
Russell Kinga13c06522017-01-10 23:13:45 +00001398 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
Andrew Lunn52295662017-05-25 21:42:08 +02001399 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001400 if (err < 0)
1401 goto error;
1402
Andrew Lunn52295662017-05-25 21:42:08 +02001403 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001404 if (err < 0)
1405 goto error;
1406
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001407 /* If the fiber link is up, it is the selected and
1408 * used link. In this case, we need to stay in the
1409 * fiber page. Please to be careful about that, avoid
1410 * to restore Copper page in other functions which
1411 * could break the behaviour for some fiber phy like
1412 * 88E1512.
1413 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001414 if (phydev->link)
1415 return 0;
1416
1417 /* If fiber link is down, check and save copper mode state */
Andrew Lunn52295662017-05-25 21:42:08 +02001418 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001419 if (err < 0)
1420 goto error;
1421 }
1422
Andrew Lunn52295662017-05-25 21:42:08 +02001423 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001424
1425error:
Andrew Lunn52295662017-05-25 21:42:08 +02001426 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001427 return err;
1428}
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001429
1430/* marvell_suspend
1431 *
1432 * Some Marvell's phys have two modes: fiber and copper.
1433 * Both need to be suspended
1434 */
1435static int marvell_suspend(struct phy_device *phydev)
1436{
1437 int err;
1438
1439 /* Suspend the fiber mode first */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001440 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1441 phydev->supported)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001442 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001443 if (err < 0)
1444 goto error;
1445
1446 /* With the page set, use the generic suspend */
1447 err = genphy_suspend(phydev);
1448 if (err < 0)
1449 goto error;
1450
1451 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001452 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001453 if (err < 0)
1454 goto error;
1455 }
1456
1457 /* With the page set, use the generic suspend */
1458 return genphy_suspend(phydev);
1459
1460error:
Andrew Lunn52295662017-05-25 21:42:08 +02001461 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001462 return err;
1463}
1464
1465/* marvell_resume
1466 *
1467 * Some Marvell's phys have two modes: fiber and copper.
1468 * Both need to be resumed
1469 */
1470static int marvell_resume(struct phy_device *phydev)
1471{
1472 int err;
1473
1474 /* Resume the fiber mode first */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001475 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1476 phydev->supported)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001477 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001478 if (err < 0)
1479 goto error;
1480
1481 /* With the page set, use the generic resume */
1482 err = genphy_resume(phydev);
1483 if (err < 0)
1484 goto error;
1485
1486 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001487 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001488 if (err < 0)
1489 goto error;
1490 }
1491
1492 /* With the page set, use the generic resume */
1493 return genphy_resume(phydev);
1494
1495error:
Andrew Lunn52295662017-05-25 21:42:08 +02001496 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001497 return err;
1498}
1499
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001500static int marvell_aneg_done(struct phy_device *phydev)
1501{
1502 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
Andrew Lunne69d9ed2017-05-17 03:26:00 +02001503
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001504 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1505}
1506
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00001507static int m88e1121_did_interrupt(struct phy_device *phydev)
1508{
1509 int imask;
1510
1511 imask = phy_read(phydev, MII_M1011_IEVENT);
1512
1513 if (imask & MII_M1011_IMASK_INIT)
1514 return 1;
1515
1516 return 0;
1517}
1518
Andrew Lunn23beb382017-05-17 03:26:04 +02001519static void m88e1318_get_wol(struct phy_device *phydev,
1520 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001521{
Russell King424ca4c2018-01-02 10:58:48 +00001522 int oldpage, ret = 0;
1523
Michael Stapelberg3871c382013-03-11 13:56:45 +00001524 wol->supported = WAKE_MAGIC;
1525 wol->wolopts = 0;
1526
Russell King424ca4c2018-01-02 10:58:48 +00001527 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1528 if (oldpage < 0)
1529 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001530
Russell King424ca4c2018-01-02 10:58:48 +00001531 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1532 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001533 wol->wolopts |= WAKE_MAGIC;
1534
Russell King424ca4c2018-01-02 10:58:48 +00001535error:
1536 phy_restore_page(phydev, oldpage, ret);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001537}
1538
Andrew Lunn23beb382017-05-17 03:26:04 +02001539static int m88e1318_set_wol(struct phy_device *phydev,
1540 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001541{
Russell King424ca4c2018-01-02 10:58:48 +00001542 int err = 0, oldpage;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001543
Russell King424ca4c2018-01-02 10:58:48 +00001544 oldpage = phy_save_page(phydev);
1545 if (oldpage < 0)
1546 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001547
1548 if (wol->wolopts & WAKE_MAGIC) {
1549 /* Explicitly switch to page 0x00, just to be sure */
Russell King424ca4c2018-01-02 10:58:48 +00001550 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001551 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001552 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001553
Jingju Houb6a930f2018-04-23 15:22:49 +08001554 /* If WOL event happened once, the LED[2] interrupt pin
1555 * will not be cleared unless we reading the interrupt status
1556 * register. If interrupts are in use, the normal interrupt
1557 * handling will clear the WOL event. Clear the WOL event
1558 * before enabling it if !phy_interrupt_is_valid()
1559 */
1560 if (!phy_interrupt_is_valid(phydev))
Andrew Lunne0a73282019-01-11 00:15:21 +01001561 __phy_read(phydev, MII_M1011_IEVENT);
Jingju Houb6a930f2018-04-23 15:22:49 +08001562
Michael Stapelberg3871c382013-03-11 13:56:45 +00001563 /* Enable the WOL interrupt */
Russell King424ca4c2018-01-02 10:58:48 +00001564 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1565 MII_88E1318S_PHY_CSIER_WOL_EIE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001566 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001567 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001568
Russell King424ca4c2018-01-02 10:58:48 +00001569 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001570 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001571 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001572
1573 /* Setup LED[2] as interrupt pin (active low) */
Russell King424ca4c2018-01-02 10:58:48 +00001574 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
Russell Kingf1028522018-01-05 16:07:10 +00001575 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
Russell King424ca4c2018-01-02 10:58:48 +00001576 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1577 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001578 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001579 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001580
Russell King424ca4c2018-01-02 10:58:48 +00001581 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001582 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001583 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001584
1585 /* Store the device address for the magic packet */
Russell King424ca4c2018-01-02 10:58:48 +00001586 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001587 ((phydev->attached_dev->dev_addr[5] << 8) |
1588 phydev->attached_dev->dev_addr[4]));
1589 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001590 goto error;
1591 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001592 ((phydev->attached_dev->dev_addr[3] << 8) |
1593 phydev->attached_dev->dev_addr[2]));
1594 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001595 goto error;
1596 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001597 ((phydev->attached_dev->dev_addr[1] << 8) |
1598 phydev->attached_dev->dev_addr[0]));
1599 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001600 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001601
1602 /* Clear WOL status and enable magic packet matching */
Russell King424ca4c2018-01-02 10:58:48 +00001603 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1604 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1605 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001606 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001607 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001608 } else {
Russell King424ca4c2018-01-02 10:58:48 +00001609 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001610 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001611 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001612
1613 /* Clear WOL status and disable magic packet matching */
Russell King424ca4c2018-01-02 10:58:48 +00001614 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
Russell Kingf1028522018-01-05 16:07:10 +00001615 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
Russell King424ca4c2018-01-02 10:58:48 +00001616 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001617 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001618 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001619 }
1620
Russell King424ca4c2018-01-02 10:58:48 +00001621error:
1622 return phy_restore_page(phydev, oldpage, err);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001623}
1624
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001625static int marvell_get_sset_count(struct phy_device *phydev)
1626{
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001627 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1628 phydev->supported))
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +02001629 return ARRAY_SIZE(marvell_hw_stats);
1630 else
1631 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001632}
1633
1634static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1635{
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001636 int count = marvell_get_sset_count(phydev);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001637 int i;
1638
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001639 for (i = 0; i < count; i++) {
Florian Fainelli98409b22018-03-02 15:08:37 -08001640 strlcpy(data + i * ETH_GSTRING_LEN,
1641 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001642 }
1643}
1644
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001645static u64 marvell_get_stat(struct phy_device *phydev, int i)
1646{
1647 struct marvell_hw_stat stat = marvell_hw_stats[i];
1648 struct marvell_priv *priv = phydev->priv;
Russell King424ca4c2018-01-02 10:58:48 +00001649 int val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001650 u64 ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001651
Russell King424ca4c2018-01-02 10:58:48 +00001652 val = phy_read_paged(phydev, stat.page, stat.reg);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001653 if (val < 0) {
Jisheng Zhang6c3442f2018-04-27 16:18:58 +08001654 ret = U64_MAX;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001655 } else {
1656 val = val & ((1 << stat.bits) - 1);
1657 priv->stats[i] += val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001658 ret = priv->stats[i];
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001659 }
1660
Andrew Lunn321b4d42016-02-20 00:35:29 +01001661 return ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001662}
1663
1664static void marvell_get_stats(struct phy_device *phydev,
1665 struct ethtool_stats *stats, u64 *data)
1666{
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001667 int count = marvell_get_sset_count(phydev);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001668 int i;
1669
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001670 for (i = 0; i < count; i++)
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001671 data[i] = marvell_get_stat(phydev, i);
1672}
1673
Andrew Lunn0b046802017-01-20 01:37:49 +01001674#ifdef CONFIG_HWMON
1675static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1676{
Andrew Lunn975b3882017-05-25 21:42:06 +02001677 int oldpage;
Russell King424ca4c2018-01-02 10:58:48 +00001678 int ret = 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001679 int val;
1680
1681 *temp = 0;
1682
Russell King424ca4c2018-01-02 10:58:48 +00001683 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1684 if (oldpage < 0)
1685 goto error;
Andrew Lunn975b3882017-05-25 21:42:06 +02001686
Andrew Lunn0b046802017-01-20 01:37:49 +01001687 /* Enable temperature sensor */
Russell King424ca4c2018-01-02 10:58:48 +00001688 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001689 if (ret < 0)
1690 goto error;
1691
Russell King424ca4c2018-01-02 10:58:48 +00001692 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1693 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
Andrew Lunn0b046802017-01-20 01:37:49 +01001694 if (ret < 0)
1695 goto error;
1696
1697 /* Wait for temperature to stabilize */
1698 usleep_range(10000, 12000);
1699
Russell King424ca4c2018-01-02 10:58:48 +00001700 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001701 if (val < 0) {
1702 ret = val;
1703 goto error;
1704 }
1705
1706 /* Disable temperature sensor */
Russell King424ca4c2018-01-02 10:58:48 +00001707 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1708 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
Andrew Lunn0b046802017-01-20 01:37:49 +01001709 if (ret < 0)
1710 goto error;
1711
1712 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1713
1714error:
Russell King424ca4c2018-01-02 10:58:48 +00001715 return phy_restore_page(phydev, oldpage, ret);
Andrew Lunn0b046802017-01-20 01:37:49 +01001716}
1717
1718static int m88e1121_hwmon_read(struct device *dev,
1719 enum hwmon_sensor_types type,
1720 u32 attr, int channel, long *temp)
1721{
1722 struct phy_device *phydev = dev_get_drvdata(dev);
1723 int err;
1724
1725 switch (attr) {
1726 case hwmon_temp_input:
1727 err = m88e1121_get_temp(phydev, temp);
1728 break;
1729 default:
1730 return -EOPNOTSUPP;
1731 }
1732
1733 return err;
1734}
1735
1736static umode_t m88e1121_hwmon_is_visible(const void *data,
1737 enum hwmon_sensor_types type,
1738 u32 attr, int channel)
1739{
1740 if (type != hwmon_temp)
1741 return 0;
1742
1743 switch (attr) {
1744 case hwmon_temp_input:
1745 return 0444;
1746 default:
1747 return 0;
1748 }
1749}
1750
1751static u32 m88e1121_hwmon_chip_config[] = {
1752 HWMON_C_REGISTER_TZ,
1753 0
1754};
1755
1756static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1757 .type = hwmon_chip,
1758 .config = m88e1121_hwmon_chip_config,
1759};
1760
1761static u32 m88e1121_hwmon_temp_config[] = {
1762 HWMON_T_INPUT,
1763 0
1764};
1765
1766static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1767 .type = hwmon_temp,
1768 .config = m88e1121_hwmon_temp_config,
1769};
1770
1771static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1772 &m88e1121_hwmon_chip,
1773 &m88e1121_hwmon_temp,
1774 NULL
1775};
1776
1777static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1778 .is_visible = m88e1121_hwmon_is_visible,
1779 .read = m88e1121_hwmon_read,
1780};
1781
1782static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1783 .ops = &m88e1121_hwmon_hwmon_ops,
1784 .info = m88e1121_hwmon_info,
1785};
1786
1787static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1788{
1789 int ret;
1790
1791 *temp = 0;
1792
Russell King424ca4c2018-01-02 10:58:48 +00001793 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1794 MII_88E1510_TEMP_SENSOR);
Andrew Lunn0b046802017-01-20 01:37:49 +01001795 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001796 return ret;
Andrew Lunn0b046802017-01-20 01:37:49 +01001797
1798 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1799
Russell King424ca4c2018-01-02 10:58:48 +00001800 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001801}
1802
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001803static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001804{
1805 int ret;
1806
1807 *temp = 0;
1808
Russell King424ca4c2018-01-02 10:58:48 +00001809 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1810 MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001811 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001812 return ret;
Andrew Lunn0b046802017-01-20 01:37:49 +01001813
1814 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1815 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1816 /* convert to mC */
1817 *temp *= 1000;
1818
Russell King424ca4c2018-01-02 10:58:48 +00001819 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001820}
1821
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001822static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001823{
Andrew Lunn0b046802017-01-20 01:37:49 +01001824 temp = temp / 1000;
1825 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
Andrew Lunn0b046802017-01-20 01:37:49 +01001826
Russell King424ca4c2018-01-02 10:58:48 +00001827 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1828 MII_88E1121_MISC_TEST,
1829 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1830 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
Andrew Lunn0b046802017-01-20 01:37:49 +01001831}
1832
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001833static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
Andrew Lunn0b046802017-01-20 01:37:49 +01001834{
1835 int ret;
1836
1837 *alarm = false;
1838
Russell King424ca4c2018-01-02 10:58:48 +00001839 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1840 MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001841 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001842 return ret;
1843
Andrew Lunn0b046802017-01-20 01:37:49 +01001844 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1845
Russell King424ca4c2018-01-02 10:58:48 +00001846 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001847}
1848
1849static int m88e1510_hwmon_read(struct device *dev,
1850 enum hwmon_sensor_types type,
1851 u32 attr, int channel, long *temp)
1852{
1853 struct phy_device *phydev = dev_get_drvdata(dev);
1854 int err;
1855
1856 switch (attr) {
1857 case hwmon_temp_input:
1858 err = m88e1510_get_temp(phydev, temp);
1859 break;
1860 case hwmon_temp_crit:
1861 err = m88e1510_get_temp_critical(phydev, temp);
1862 break;
1863 case hwmon_temp_max_alarm:
1864 err = m88e1510_get_temp_alarm(phydev, temp);
1865 break;
1866 default:
1867 return -EOPNOTSUPP;
1868 }
1869
1870 return err;
1871}
1872
1873static int m88e1510_hwmon_write(struct device *dev,
1874 enum hwmon_sensor_types type,
1875 u32 attr, int channel, long temp)
1876{
1877 struct phy_device *phydev = dev_get_drvdata(dev);
1878 int err;
1879
1880 switch (attr) {
1881 case hwmon_temp_crit:
1882 err = m88e1510_set_temp_critical(phydev, temp);
1883 break;
1884 default:
1885 return -EOPNOTSUPP;
1886 }
1887 return err;
1888}
1889
1890static umode_t m88e1510_hwmon_is_visible(const void *data,
1891 enum hwmon_sensor_types type,
1892 u32 attr, int channel)
1893{
1894 if (type != hwmon_temp)
1895 return 0;
1896
1897 switch (attr) {
1898 case hwmon_temp_input:
1899 case hwmon_temp_max_alarm:
1900 return 0444;
1901 case hwmon_temp_crit:
1902 return 0644;
1903 default:
1904 return 0;
1905 }
1906}
1907
1908static u32 m88e1510_hwmon_temp_config[] = {
1909 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1910 0
1911};
1912
1913static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1914 .type = hwmon_temp,
1915 .config = m88e1510_hwmon_temp_config,
1916};
1917
1918static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1919 &m88e1121_hwmon_chip,
1920 &m88e1510_hwmon_temp,
1921 NULL
1922};
1923
1924static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1925 .is_visible = m88e1510_hwmon_is_visible,
1926 .read = m88e1510_hwmon_read,
1927 .write = m88e1510_hwmon_write,
1928};
1929
1930static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1931 .ops = &m88e1510_hwmon_hwmon_ops,
1932 .info = m88e1510_hwmon_info,
1933};
1934
Andrew Lunnfee2d542018-01-09 22:42:09 +01001935static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
1936{
1937 int sum = 0;
1938 int oldpage;
1939 int ret = 0;
1940 int i;
1941
1942 *temp = 0;
1943
1944 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1945 if (oldpage < 0)
1946 goto error;
1947
1948 /* Enable temperature sensor */
1949 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1950 if (ret < 0)
1951 goto error;
1952
1953 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1954 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
1955 MII_88E6390_MISC_TEST_SAMPLE_1S;
1956
1957 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1958 if (ret < 0)
1959 goto error;
1960
1961 /* Wait for temperature to stabilize */
1962 usleep_range(10000, 12000);
1963
1964 /* Reading the temperature sense has an errata. You need to read
1965 * a number of times and take an average.
1966 */
1967 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
1968 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
1969 if (ret < 0)
1970 goto error;
1971 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
1972 }
1973
1974 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
1975 *temp = (sum - 75) * 1000;
1976
1977 /* Disable temperature sensor */
1978 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1979 if (ret < 0)
1980 goto error;
1981
1982 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1983 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
1984
1985 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1986
1987error:
1988 phy_restore_page(phydev, oldpage, ret);
1989
1990 return ret;
1991}
1992
1993static int m88e6390_hwmon_read(struct device *dev,
1994 enum hwmon_sensor_types type,
1995 u32 attr, int channel, long *temp)
1996{
1997 struct phy_device *phydev = dev_get_drvdata(dev);
1998 int err;
1999
2000 switch (attr) {
2001 case hwmon_temp_input:
2002 err = m88e6390_get_temp(phydev, temp);
2003 break;
2004 default:
2005 return -EOPNOTSUPP;
2006 }
2007
2008 return err;
2009}
2010
2011static umode_t m88e6390_hwmon_is_visible(const void *data,
2012 enum hwmon_sensor_types type,
2013 u32 attr, int channel)
2014{
2015 if (type != hwmon_temp)
2016 return 0;
2017
2018 switch (attr) {
2019 case hwmon_temp_input:
2020 return 0444;
2021 default:
2022 return 0;
2023 }
2024}
2025
2026static u32 m88e6390_hwmon_temp_config[] = {
2027 HWMON_T_INPUT,
2028 0
2029};
2030
2031static const struct hwmon_channel_info m88e6390_hwmon_temp = {
2032 .type = hwmon_temp,
2033 .config = m88e6390_hwmon_temp_config,
2034};
2035
2036static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
2037 &m88e1121_hwmon_chip,
2038 &m88e6390_hwmon_temp,
2039 NULL
2040};
2041
2042static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
2043 .is_visible = m88e6390_hwmon_is_visible,
2044 .read = m88e6390_hwmon_read,
2045};
2046
2047static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
2048 .ops = &m88e6390_hwmon_hwmon_ops,
2049 .info = m88e6390_hwmon_info,
2050};
2051
Andrew Lunn0b046802017-01-20 01:37:49 +01002052static int marvell_hwmon_name(struct phy_device *phydev)
2053{
2054 struct marvell_priv *priv = phydev->priv;
2055 struct device *dev = &phydev->mdio.dev;
2056 const char *devname = dev_name(dev);
2057 size_t len = strlen(devname);
2058 int i, j;
2059
2060 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2061 if (!priv->hwmon_name)
2062 return -ENOMEM;
2063
2064 for (i = j = 0; i < len && devname[i]; i++) {
2065 if (isalnum(devname[i]))
2066 priv->hwmon_name[j++] = devname[i];
2067 }
2068
2069 return 0;
2070}
2071
2072static int marvell_hwmon_probe(struct phy_device *phydev,
2073 const struct hwmon_chip_info *chip)
2074{
2075 struct marvell_priv *priv = phydev->priv;
2076 struct device *dev = &phydev->mdio.dev;
2077 int err;
2078
2079 err = marvell_hwmon_name(phydev);
2080 if (err)
2081 return err;
2082
2083 priv->hwmon_dev = devm_hwmon_device_register_with_info(
2084 dev, priv->hwmon_name, phydev, chip, NULL);
2085
2086 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
2087}
2088
2089static int m88e1121_hwmon_probe(struct phy_device *phydev)
2090{
2091 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
2092}
2093
2094static int m88e1510_hwmon_probe(struct phy_device *phydev)
2095{
2096 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
2097}
Andrew Lunnfee2d542018-01-09 22:42:09 +01002098
2099static int m88e6390_hwmon_probe(struct phy_device *phydev)
2100{
2101 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
2102}
Andrew Lunn0b046802017-01-20 01:37:49 +01002103#else
2104static int m88e1121_hwmon_probe(struct phy_device *phydev)
2105{
2106 return 0;
2107}
2108
2109static int m88e1510_hwmon_probe(struct phy_device *phydev)
2110{
2111 return 0;
2112}
Andrew Lunnfee2d542018-01-09 22:42:09 +01002113
2114static int m88e6390_hwmon_probe(struct phy_device *phydev)
2115{
2116 return 0;
2117}
Andrew Lunn0b046802017-01-20 01:37:49 +01002118#endif
2119
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002120static int marvell_probe(struct phy_device *phydev)
2121{
2122 struct marvell_priv *priv;
2123
Andrew Lunne5a03bf2016-01-06 20:11:16 +01002124 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002125 if (!priv)
2126 return -ENOMEM;
2127
2128 phydev->priv = priv;
2129
2130 return 0;
2131}
2132
Andrew Lunn0b046802017-01-20 01:37:49 +01002133static int m88e1121_probe(struct phy_device *phydev)
2134{
2135 int err;
2136
2137 err = marvell_probe(phydev);
2138 if (err)
2139 return err;
2140
2141 return m88e1121_hwmon_probe(phydev);
2142}
2143
2144static int m88e1510_probe(struct phy_device *phydev)
2145{
2146 int err;
2147
2148 err = marvell_probe(phydev);
2149 if (err)
2150 return err;
2151
2152 return m88e1510_hwmon_probe(phydev);
2153}
2154
Andrew Lunnfee2d542018-01-09 22:42:09 +01002155static int m88e6390_probe(struct phy_device *phydev)
2156{
2157 int err;
2158
2159 err = marvell_probe(phydev);
2160 if (err)
2161 return err;
2162
2163 return m88e6390_hwmon_probe(phydev);
2164}
2165
Olof Johanssone5479232007-07-03 16:23:46 -05002166static struct phy_driver marvell_drivers[] = {
2167 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002168 .phy_id = MARVELL_PHY_ID_88E1101,
2169 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002170 .name = "Marvell 88E1101",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002171 /* PHY_GBIT_FEATURES */
Arnd Bergmann18702412017-01-23 13:18:41 +01002172 .probe = marvell_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01002173 .config_init = &marvell_config_init,
Andrew Lunnf2899782017-05-23 17:49:13 +02002174 .config_aneg = &m88e1101_config_aneg,
Olof Johanssone5479232007-07-03 16:23:46 -05002175 .ack_interrupt = &marvell_ack_interrupt,
2176 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002177 .resume = &genphy_resume,
2178 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002179 .read_page = marvell_read_page,
2180 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002181 .get_sset_count = marvell_get_sset_count,
2182 .get_strings = marvell_get_strings,
2183 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05002184 },
2185 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002186 .phy_id = MARVELL_PHY_ID_88E1112,
2187 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johansson85cfb532007-07-03 16:24:32 -05002188 .name = "Marvell 88E1112",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002189 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002190 .probe = marvell_probe,
Olof Johansson85cfb532007-07-03 16:24:32 -05002191 .config_init = &m88e1111_config_init,
2192 .config_aneg = &marvell_config_aneg,
Olof Johansson85cfb532007-07-03 16:24:32 -05002193 .ack_interrupt = &marvell_ack_interrupt,
2194 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002195 .resume = &genphy_resume,
2196 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002197 .read_page = marvell_read_page,
2198 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002199 .get_sset_count = marvell_get_sset_count,
2200 .get_strings = marvell_get_strings,
2201 .get_stats = marvell_get_stats,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002202 .get_tunable = m88e1011_get_tunable,
2203 .set_tunable = m88e1011_set_tunable,
2204 .link_change_notify = m88e1011_link_change_notify,
Olof Johansson85cfb532007-07-03 16:24:32 -05002205 },
2206 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002207 .phy_id = MARVELL_PHY_ID_88E1111,
2208 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002209 .name = "Marvell 88E1111",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002210 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002211 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002212 .config_init = &m88e1111_config_init,
Florian Fainellid6ab9332018-09-25 11:28:46 -07002213 .config_aneg = &marvell_config_aneg,
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03002214 .read_status = &marvell_read_status,
Olof Johanssone5479232007-07-03 16:23:46 -05002215 .ack_interrupt = &marvell_ack_interrupt,
2216 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002217 .resume = &genphy_resume,
2218 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002219 .read_page = marvell_read_page,
2220 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002221 .get_sset_count = marvell_get_sset_count,
2222 .get_strings = marvell_get_strings,
2223 .get_stats = marvell_get_stats,
Heiner Kallweit5c6bc512019-10-28 20:53:25 +01002224 .get_tunable = m88e1111_get_tunable,
2225 .set_tunable = m88e1111_set_tunable,
2226 .link_change_notify = m88e1011_link_change_notify,
Olof Johanssone5479232007-07-03 16:23:46 -05002227 },
2228 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002229 .phy_id = MARVELL_PHY_ID_88E1118,
2230 .phy_id_mask = MARVELL_PHY_ID_MASK,
Ron Madrid605f1962008-11-06 09:05:26 +00002231 .name = "Marvell 88E1118",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002232 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002233 .probe = marvell_probe,
Ron Madrid605f1962008-11-06 09:05:26 +00002234 .config_init = &m88e1118_config_init,
2235 .config_aneg = &m88e1118_config_aneg,
Ron Madrid605f1962008-11-06 09:05:26 +00002236 .ack_interrupt = &marvell_ack_interrupt,
2237 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002238 .resume = &genphy_resume,
2239 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002240 .read_page = marvell_read_page,
2241 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002242 .get_sset_count = marvell_get_sset_count,
2243 .get_strings = marvell_get_strings,
2244 .get_stats = marvell_get_stats,
Ron Madrid605f1962008-11-06 09:05:26 +00002245 },
2246 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002247 .phy_id = MARVELL_PHY_ID_88E1121R,
2248 .phy_id_mask = MARVELL_PHY_ID_MASK,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002249 .name = "Marvell 88E1121R",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002250 /* PHY_GBIT_FEATURES */
Arnd Bergmann18702412017-01-23 13:18:41 +01002251 .probe = &m88e1121_probe,
Wang Dongsheng07777242018-07-01 23:15:46 -07002252 .config_init = &marvell_config_init,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002253 .config_aneg = &m88e1121_config_aneg,
2254 .read_status = &marvell_read_status,
2255 .ack_interrupt = &marvell_ack_interrupt,
2256 .config_intr = &marvell_config_intr,
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00002257 .did_interrupt = &m88e1121_did_interrupt,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002258 .resume = &genphy_resume,
2259 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002260 .read_page = marvell_read_page,
2261 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002262 .get_sset_count = marvell_get_sset_count,
2263 .get_strings = marvell_get_strings,
2264 .get_stats = marvell_get_stats,
Heiner Kallweit911af5e2019-10-28 20:52:55 +01002265 .get_tunable = m88e1011_get_tunable,
2266 .set_tunable = m88e1011_set_tunable,
2267 .link_change_notify = m88e1011_link_change_notify,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002268 },
2269 {
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002270 .phy_id = MARVELL_PHY_ID_88E1318S,
Linus Torvalds6ba74012010-08-04 11:47:58 -07002271 .phy_id_mask = MARVELL_PHY_ID_MASK,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002272 .name = "Marvell 88E1318S",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002273 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002274 .probe = marvell_probe,
Esben Haabendaldd9a1222018-04-05 22:40:29 +02002275 .config_init = &m88e1318_config_init,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002276 .config_aneg = &m88e1318_config_aneg,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002277 .read_status = &marvell_read_status,
2278 .ack_interrupt = &marvell_ack_interrupt,
2279 .config_intr = &marvell_config_intr,
2280 .did_interrupt = &m88e1121_did_interrupt,
Michael Stapelberg3871c382013-03-11 13:56:45 +00002281 .get_wol = &m88e1318_get_wol,
2282 .set_wol = &m88e1318_set_wol,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002283 .resume = &genphy_resume,
2284 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002285 .read_page = marvell_read_page,
2286 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002287 .get_sset_count = marvell_get_sset_count,
2288 .get_strings = marvell_get_strings,
2289 .get_stats = marvell_get_stats,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002290 },
2291 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002292 .phy_id = MARVELL_PHY_ID_88E1145,
2293 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002294 .name = "Marvell 88E1145",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002295 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002296 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002297 .config_init = &m88e1145_config_init,
Zhao Qiangc5058732017-12-18 10:26:43 +08002298 .config_aneg = &m88e1101_config_aneg,
Olof Johanssone5479232007-07-03 16:23:46 -05002299 .read_status = &genphy_read_status,
2300 .ack_interrupt = &marvell_ack_interrupt,
2301 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002302 .resume = &genphy_resume,
2303 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002304 .read_page = marvell_read_page,
2305 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002306 .get_sset_count = marvell_get_sset_count,
2307 .get_strings = marvell_get_strings,
2308 .get_stats = marvell_get_stats,
Heiner Kallweita319fb52019-10-29 20:25:26 +01002309 .get_tunable = m88e1111_get_tunable,
2310 .set_tunable = m88e1111_set_tunable,
2311 .link_change_notify = m88e1011_link_change_notify,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002312 },
2313 {
David Daney90600732010-11-19 11:58:53 +00002314 .phy_id = MARVELL_PHY_ID_88E1149R,
2315 .phy_id_mask = MARVELL_PHY_ID_MASK,
2316 .name = "Marvell 88E1149R",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002317 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002318 .probe = marvell_probe,
David Daney90600732010-11-19 11:58:53 +00002319 .config_init = &m88e1149_config_init,
2320 .config_aneg = &m88e1118_config_aneg,
David Daney90600732010-11-19 11:58:53 +00002321 .ack_interrupt = &marvell_ack_interrupt,
2322 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002323 .resume = &genphy_resume,
2324 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002325 .read_page = marvell_read_page,
2326 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002327 .get_sset_count = marvell_get_sset_count,
2328 .get_strings = marvell_get_strings,
2329 .get_stats = marvell_get_stats,
David Daney90600732010-11-19 11:58:53 +00002330 },
2331 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002332 .phy_id = MARVELL_PHY_ID_88E1240,
2333 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002334 .name = "Marvell 88E1240",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002335 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002336 .probe = marvell_probe,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002337 .config_init = &m88e1111_config_init,
2338 .config_aneg = &marvell_config_aneg,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002339 .ack_interrupt = &marvell_ack_interrupt,
2340 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002341 .resume = &genphy_resume,
2342 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002343 .read_page = marvell_read_page,
2344 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002345 .get_sset_count = marvell_get_sset_count,
2346 .get_strings = marvell_get_strings,
2347 .get_stats = marvell_get_stats,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002348 },
Michal Simek3da09a52013-05-30 20:08:26 +00002349 {
2350 .phy_id = MARVELL_PHY_ID_88E1116R,
2351 .phy_id_mask = MARVELL_PHY_ID_MASK,
2352 .name = "Marvell 88E1116R",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002353 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002354 .probe = marvell_probe,
Michal Simek3da09a52013-05-30 20:08:26 +00002355 .config_init = &m88e1116r_config_init,
Michal Simek3da09a52013-05-30 20:08:26 +00002356 .ack_interrupt = &marvell_ack_interrupt,
2357 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002358 .resume = &genphy_resume,
2359 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002360 .read_page = marvell_read_page,
2361 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002362 .get_sset_count = marvell_get_sset_count,
2363 .get_strings = marvell_get_strings,
2364 .get_stats = marvell_get_stats,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002365 .get_tunable = m88e1011_get_tunable,
2366 .set_tunable = m88e1011_set_tunable,
2367 .link_change_notify = m88e1011_link_change_notify,
Michal Simek3da09a52013-05-30 20:08:26 +00002368 },
Michal Simek10e24caa2013-05-30 20:08:27 +00002369 {
2370 .phy_id = MARVELL_PHY_ID_88E1510,
2371 .phy_id_mask = MARVELL_PHY_ID_MASK,
2372 .name = "Marvell 88E1510",
Andrew Lunn719655a2018-09-29 23:04:16 +02002373 .features = PHY_GBIT_FIBRE_FEATURES,
Andrew Lunn0b046802017-01-20 01:37:49 +01002374 .probe = &m88e1510_probe,
Stefan Roese930b37e2016-02-18 10:59:07 +01002375 .config_init = &m88e1510_config_init,
Michal Simek10e24caa2013-05-30 20:08:27 +00002376 .config_aneg = &m88e1510_config_aneg,
2377 .read_status = &marvell_read_status,
2378 .ack_interrupt = &marvell_ack_interrupt,
2379 .config_intr = &marvell_config_intr,
2380 .did_interrupt = &m88e1121_did_interrupt,
Jingju Houf39aac72017-01-22 18:20:56 +08002381 .get_wol = &m88e1318_get_wol,
2382 .set_wol = &m88e1318_set_wol,
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02002383 .resume = &marvell_resume,
2384 .suspend = &marvell_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002385 .read_page = marvell_read_page,
2386 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002387 .get_sset_count = marvell_get_sset_count,
2388 .get_strings = marvell_get_strings,
2389 .get_stats = marvell_get_stats,
Lin Yun Shengf0f9b4e2017-06-30 17:44:15 +08002390 .set_loopback = genphy_loopback,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002391 .get_tunable = m88e1011_get_tunable,
2392 .set_tunable = m88e1011_set_tunable,
2393 .link_change_notify = m88e1011_link_change_notify,
Michal Simek10e24caa2013-05-30 20:08:27 +00002394 },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002395 {
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002396 .phy_id = MARVELL_PHY_ID_88E1540,
2397 .phy_id_mask = MARVELL_PHY_ID_MASK,
2398 .name = "Marvell 88E1540",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002399 /* PHY_GBIT_FEATURES */
Arnd Bergmann18702412017-01-23 13:18:41 +01002400 .probe = m88e1510_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01002401 .config_init = &marvell_config_init,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002402 .config_aneg = &m88e1510_config_aneg,
2403 .read_status = &marvell_read_status,
2404 .ack_interrupt = &marvell_ack_interrupt,
2405 .config_intr = &marvell_config_intr,
2406 .did_interrupt = &m88e1121_did_interrupt,
2407 .resume = &genphy_resume,
2408 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002409 .read_page = marvell_read_page,
2410 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002411 .get_sset_count = marvell_get_sset_count,
2412 .get_strings = marvell_get_strings,
2413 .get_stats = marvell_get_stats,
Heiner Kallweit69f42be2019-03-25 19:35:41 +01002414 .get_tunable = m88e1540_get_tunable,
2415 .set_tunable = m88e1540_set_tunable,
Heiner Kallweit911af5e2019-10-28 20:52:55 +01002416 .link_change_notify = m88e1011_link_change_notify,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002417 },
2418 {
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002419 .phy_id = MARVELL_PHY_ID_88E1545,
2420 .phy_id_mask = MARVELL_PHY_ID_MASK,
2421 .name = "Marvell 88E1545",
2422 .probe = m88e1510_probe,
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002423 /* PHY_GBIT_FEATURES */
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002424 .config_init = &marvell_config_init,
2425 .config_aneg = &m88e1510_config_aneg,
2426 .read_status = &marvell_read_status,
2427 .ack_interrupt = &marvell_ack_interrupt,
2428 .config_intr = &marvell_config_intr,
2429 .did_interrupt = &m88e1121_did_interrupt,
2430 .resume = &genphy_resume,
2431 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002432 .read_page = marvell_read_page,
2433 .write_page = marvell_write_page,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002434 .get_sset_count = marvell_get_sset_count,
2435 .get_strings = marvell_get_strings,
2436 .get_stats = marvell_get_stats,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002437 .get_tunable = m88e1540_get_tunable,
2438 .set_tunable = m88e1540_set_tunable,
2439 .link_change_notify = m88e1011_link_change_notify,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002440 },
2441 {
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002442 .phy_id = MARVELL_PHY_ID_88E3016,
2443 .phy_id_mask = MARVELL_PHY_ID_MASK,
2444 .name = "Marvell 88E3016",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002445 /* PHY_BASIC_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002446 .probe = marvell_probe,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002447 .config_init = &m88e3016_config_init,
2448 .aneg_done = &marvell_aneg_done,
2449 .read_status = &marvell_read_status,
2450 .ack_interrupt = &marvell_ack_interrupt,
2451 .config_intr = &marvell_config_intr,
2452 .did_interrupt = &m88e1121_did_interrupt,
2453 .resume = &genphy_resume,
2454 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002455 .read_page = marvell_read_page,
2456 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002457 .get_sset_count = marvell_get_sset_count,
2458 .get_strings = marvell_get_strings,
2459 .get_stats = marvell_get_stats,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002460 },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002461 {
2462 .phy_id = MARVELL_PHY_ID_88E6390,
2463 .phy_id_mask = MARVELL_PHY_ID_MASK,
2464 .name = "Marvell 88E6390",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002465 /* PHY_GBIT_FEATURES */
Andrew Lunnfee2d542018-01-09 22:42:09 +01002466 .probe = m88e6390_probe,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002467 .config_init = &marvell_config_init,
Andrew Lunn8cbcdc12019-01-10 22:48:36 +01002468 .config_aneg = &m88e6390_config_aneg,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002469 .read_status = &marvell_read_status,
2470 .ack_interrupt = &marvell_ack_interrupt,
2471 .config_intr = &marvell_config_intr,
2472 .did_interrupt = &m88e1121_did_interrupt,
2473 .resume = &genphy_resume,
2474 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002475 .read_page = marvell_read_page,
2476 .write_page = marvell_write_page,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002477 .get_sset_count = marvell_get_sset_count,
2478 .get_strings = marvell_get_strings,
2479 .get_stats = marvell_get_stats,
Heiner Kallweit69f42be2019-03-25 19:35:41 +01002480 .get_tunable = m88e1540_get_tunable,
2481 .set_tunable = m88e1540_set_tunable,
Heiner Kallweit911af5e2019-10-28 20:52:55 +01002482 .link_change_notify = m88e1011_link_change_notify,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002483 },
Andy Fleming00db8182005-07-30 19:31:23 -04002484};
2485
Johan Hovold50fd7152014-11-11 19:45:59 +01002486module_phy_driver(marvell_drivers);
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002487
Uwe Kleine-Königcf93c942010-10-03 23:43:32 +00002488static struct mdio_device_id __maybe_unused marvell_tbl[] = {
Michal Simekf5e1cab2013-05-30 20:08:25 +00002489 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2490 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2491 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2492 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2493 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2494 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2495 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2496 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2497 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
Michal Simek3da09a52013-05-30 20:08:26 +00002498 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
Michal Simek10e24caa2013-05-30 20:08:27 +00002499 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002500 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002501 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002502 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002503 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002504 { }
2505};
2506
2507MODULE_DEVICE_TABLE(mdio, marvell_tbl);