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Andrew Lunna2443fd2019-01-21 19:05:50 +01001// SPDX-License-Identifier: GPL-2.0+
Andy Fleming00db8182005-07-30 19:31:23 -04002/*
3 * drivers/net/phy/marvell.c
4 *
5 * Driver for Marvell PHYs
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 *
Michael Stapelberg3871c382013-03-11 13:56:45 +000011 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
Andy Fleming00db8182005-07-30 19:31:23 -040012 */
Andy Fleming00db8182005-07-30 19:31:23 -040013#include <linux/kernel.h>
Andy Fleming00db8182005-07-30 19:31:23 -040014#include <linux/string.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010015#include <linux/ctype.h>
Andy Fleming00db8182005-07-30 19:31:23 -040016#include <linux/errno.h>
17#include <linux/unistd.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010018#include <linux/hwmon.h>
Andy Fleming00db8182005-07-30 19:31:23 -040019#include <linux/interrupt.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/netdevice.h>
23#include <linux/etherdevice.h>
24#include <linux/skbuff.h>
25#include <linux/spinlock.h>
26#include <linux/mm.h>
27#include <linux/module.h>
Andy Fleming00db8182005-07-30 19:31:23 -040028#include <linux/mii.h>
29#include <linux/ethtool.h>
30#include <linux/phy.h>
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +100031#include <linux/marvell_phy.h>
Heiner Kallweit69f42be2019-03-25 19:35:41 +010032#include <linux/bitfield.h>
David Daneycf41a512010-11-19 12:13:18 +000033#include <linux/of.h>
Andy Fleming00db8182005-07-30 19:31:23 -040034
Avinash Kumareea3b202013-09-30 09:36:44 +053035#include <linux/io.h>
Andy Fleming00db8182005-07-30 19:31:23 -040036#include <asm/irq.h>
Avinash Kumareea3b202013-09-30 09:36:44 +053037#include <linux/uaccess.h>
Andy Fleming00db8182005-07-30 19:31:23 -040038
David Daney27d916d2010-11-19 11:58:52 +000039#define MII_MARVELL_PHY_PAGE 22
Andrew Lunn52295662017-05-25 21:42:08 +020040#define MII_MARVELL_COPPER_PAGE 0x00
41#define MII_MARVELL_FIBER_PAGE 0x01
42#define MII_MARVELL_MSCR_PAGE 0x02
43#define MII_MARVELL_LED_PAGE 0x03
44#define MII_MARVELL_MISC_TEST_PAGE 0x06
45#define MII_MARVELL_WOL_PAGE 0x11
David Daney27d916d2010-11-19 11:58:52 +000046
Andy Fleming00db8182005-07-30 19:31:23 -040047#define MII_M1011_IEVENT 0x13
48#define MII_M1011_IEVENT_CLEAR 0x0000
49
50#define MII_M1011_IMASK 0x12
51#define MII_M1011_IMASK_INIT 0x6400
52#define MII_M1011_IMASK_CLEAR 0x0000
53
Andrew Lunnfecd5e92017-07-30 22:41:49 +020054#define MII_M1011_PHY_SCR 0x10
55#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
Heiner Kallweitf8d975b2019-10-28 20:52:22 +010056#define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +020057#define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
Andrew Lunnfecd5e92017-07-30 22:41:49 +020058#define MII_M1011_PHY_SCR_MDI (0x0 << 5)
59#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
60#define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
Andy Fleming76884672007-02-09 18:13:58 -060061
Heiner Kallweita3bdfce2019-10-19 15:57:33 +020062#define MII_M1011_PHY_SSR 0x11
63#define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
64
Andy Fleming76884672007-02-09 18:13:58 -060065#define MII_M1111_PHY_LED_CONTROL 0x18
66#define MII_M1111_PHY_LED_DIRECT 0x4100
67#define MII_M1111_PHY_LED_COMBINE 0x411c
Kim Phillips895ee682007-06-05 18:46:47 +080068#define MII_M1111_PHY_EXT_CR 0x14
Heiner Kallweit5c6bc512019-10-28 20:53:25 +010069#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
70#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
71#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
Andrew Lunn61111592017-07-30 22:41:46 +020072#define MII_M1111_RGMII_RX_DELAY BIT(7)
73#define MII_M1111_RGMII_TX_DELAY BIT(1)
Kim Phillips895ee682007-06-05 18:46:47 +080074#define MII_M1111_PHY_EXT_SR 0x1b
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030075
76#define MII_M1111_HWCFG_MODE_MASK 0xf
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030077#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
Kapil Juneja4117b5b2007-05-11 18:25:18 -050078#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
Andrew Lunn865b813a2017-07-30 22:41:47 +020079#define MII_M1111_HWCFG_MODE_RTBI 0x7
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +000080#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
Andrew Lunn865b813a2017-07-30 22:41:47 +020081#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
82#define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
83#define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030084
Cyril Chemparathyc477d042010-08-02 09:44:53 +000085#define MII_88E1121_PHY_MSCR_REG 21
86#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
87#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
Russell King424ca4c2018-01-02 10:58:48 +000088#define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
Cyril Chemparathyc477d042010-08-02 09:44:53 +000089
Andrew Lunn0b046802017-01-20 01:37:49 +010090#define MII_88E1121_MISC_TEST 0x1a
91#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
92#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
93#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
94#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
95#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
96#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
97
98#define MII_88E1510_TEMP_SENSOR 0x1b
99#define MII_88E1510_TEMP_SENSOR_MASK 0xff
100
Heiner Kallweit69f42be2019-03-25 19:35:41 +0100101#define MII_88E1540_COPPER_CTRL3 0x1a
102#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
103#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
104#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
105#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
106#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
107#define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
108
Andrew Lunnfee2d542018-01-09 22:42:09 +0100109#define MII_88E6390_MISC_TEST 0x1b
110#define MII_88E6390_MISC_TEST_SAMPLE_1S 0
111#define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
112#define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
113#define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
114#define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
115
116#define MII_88E6390_TEMP_SENSOR 0x1c
117#define MII_88E6390_TEMP_SENSOR_MASK 0xff
118#define MII_88E6390_TEMP_SENSOR_SAMPLES 10
119
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700120#define MII_88E1318S_PHY_MSCR1_REG 16
121#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700122
Michael Stapelberg3871c382013-03-11 13:56:45 +0000123/* Copper Specific Interrupt Enable Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200124#define MII_88E1318S_PHY_CSIER 0x12
Michael Stapelberg3871c382013-03-11 13:56:45 +0000125/* WOL Event Interrupt Enable */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200126#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000127
128/* LED Timer Control Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200129#define MII_88E1318S_PHY_LED_TCR 0x12
130#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
131#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
132#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000133
134/* Magic Packet MAC address registers */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200135#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
136#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
137#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
Michael Stapelberg3871c382013-03-11 13:56:45 +0000138
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200139#define MII_88E1318S_PHY_WOL_CTRL 0x10
140#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
141#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000142
Wang Dongsheng07777242018-07-01 23:15:46 -0700143#define MII_PHY_LED_CTRL 16
Sergei Poselenov140bc922009-04-07 02:01:41 +0000144#define MII_88E1121_PHY_LED_DEF 0x0030
Wang Dongsheng07777242018-07-01 23:15:46 -0700145#define MII_88E1510_PHY_LED_DEF 0x1177
Jian Shena93f7fe2019-04-22 21:52:23 +0800146#define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
Sergei Poselenov140bc922009-04-07 02:01:41 +0000147
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300148#define MII_M1011_PHY_STATUS 0x11
149#define MII_M1011_PHY_STATUS_1000 0x8000
150#define MII_M1011_PHY_STATUS_100 0x4000
151#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
152#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
153#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
154#define MII_M1011_PHY_STATUS_LINK 0x0400
155
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200156#define MII_88E3016_PHY_SPEC_CTRL 0x10
157#define MII_88E3016_DISABLE_SCRAMBLER 0x0200
158#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
Andy Fleming76884672007-02-09 18:13:58 -0600159
Stefan Roese930b37e2016-02-18 10:59:07 +0100160#define MII_88E1510_GEN_CTRL_REG_1 0x14
161#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
162#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
163#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
164
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200165#define LPA_FIBER_1000HALF 0x40
166#define LPA_FIBER_1000FULL 0x20
167
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200168#define LPA_PAUSE_FIBER 0x180
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200169#define LPA_PAUSE_ASYM_FIBER 0x100
170
171#define ADVERTISE_FIBER_1000HALF 0x40
172#define ADVERTISE_FIBER_1000FULL 0x20
173
174#define ADVERTISE_PAUSE_FIBER 0x180
175#define ADVERTISE_PAUSE_ASYM_FIBER 0x100
176
177#define REGISTER_LINK_STATUS 0x400
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200178#define NB_FIBER_STATS 1
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200179
Andy Fleming00db8182005-07-30 19:31:23 -0400180MODULE_DESCRIPTION("Marvell PHY driver");
181MODULE_AUTHOR("Andy Fleming");
182MODULE_LICENSE("GPL");
183
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100184struct marvell_hw_stat {
185 const char *string;
186 u8 page;
187 u8 reg;
188 u8 bits;
189};
190
191static struct marvell_hw_stat marvell_hw_stats[] = {
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200192 { "phy_receive_errors_copper", 0, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100193 { "phy_idle_errors", 0, 10, 8 },
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200194 { "phy_receive_errors_fiber", 1, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100195};
196
197struct marvell_priv {
198 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
Andrew Lunn0b046802017-01-20 01:37:49 +0100199 char *hwmon_name;
200 struct device *hwmon_dev;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100201};
202
Russell King424ca4c2018-01-02 10:58:48 +0000203static int marvell_read_page(struct phy_device *phydev)
Andrew Lunn6427bb22017-05-17 03:26:03 +0200204{
Russell King424ca4c2018-01-02 10:58:48 +0000205 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
206}
207
208static int marvell_write_page(struct phy_device *phydev, int page)
209{
210 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
Andrew Lunn6427bb22017-05-17 03:26:03 +0200211}
212
213static int marvell_set_page(struct phy_device *phydev, int page)
214{
215 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
216}
217
Andy Fleming00db8182005-07-30 19:31:23 -0400218static int marvell_ack_interrupt(struct phy_device *phydev)
219{
220 int err;
221
222 /* Clear the interrupts by reading the reg */
223 err = phy_read(phydev, MII_M1011_IEVENT);
224
225 if (err < 0)
226 return err;
227
228 return 0;
229}
230
231static int marvell_config_intr(struct phy_device *phydev)
232{
233 int err;
234
Andy Fleming76884672007-02-09 18:13:58 -0600235 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
Andrew Lunn23beb382017-05-17 03:26:04 +0200236 err = phy_write(phydev, MII_M1011_IMASK,
237 MII_M1011_IMASK_INIT);
Andy Fleming00db8182005-07-30 19:31:23 -0400238 else
Andrew Lunn23beb382017-05-17 03:26:04 +0200239 err = phy_write(phydev, MII_M1011_IMASK,
240 MII_M1011_IMASK_CLEAR);
Andy Fleming00db8182005-07-30 19:31:23 -0400241
242 return err;
243}
244
David Thomson239aa552015-07-10 16:28:25 +1200245static int marvell_set_polarity(struct phy_device *phydev, int polarity)
246{
247 int reg;
248 int err;
249 int val;
250
251 /* get the current settings */
252 reg = phy_read(phydev, MII_M1011_PHY_SCR);
253 if (reg < 0)
254 return reg;
255
256 val = reg;
257 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
258 switch (polarity) {
259 case ETH_TP_MDI:
260 val |= MII_M1011_PHY_SCR_MDI;
261 break;
262 case ETH_TP_MDI_X:
263 val |= MII_M1011_PHY_SCR_MDI_X;
264 break;
265 case ETH_TP_MDI_AUTO:
266 case ETH_TP_MDI_INVALID:
267 default:
268 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
269 break;
270 }
271
272 if (val != reg) {
273 /* Set the new polarity value in the register */
274 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
275 if (err)
276 return err;
277 }
278
Florian Fainellid6ab9332018-09-25 11:28:46 -0700279 return val != reg;
David Thomson239aa552015-07-10 16:28:25 +1200280}
281
Andy Fleming00db8182005-07-30 19:31:23 -0400282static int marvell_config_aneg(struct phy_device *phydev)
283{
Florian Fainellid6ab9332018-09-25 11:28:46 -0700284 int changed = 0;
Andy Fleming00db8182005-07-30 19:31:23 -0400285 int err;
286
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530287 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Andy Fleming76884672007-02-09 18:13:58 -0600288 if (err < 0)
289 return err;
290
Florian Fainellid6ab9332018-09-25 11:28:46 -0700291 changed = err;
292
Andy Fleming76884672007-02-09 18:13:58 -0600293 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
294 MII_M1111_PHY_LED_DIRECT);
295 if (err < 0)
296 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400297
298 err = genphy_config_aneg(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000299 if (err < 0)
300 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400301
Florian Fainellid6ab9332018-09-25 11:28:46 -0700302 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200303 /* A write to speed/duplex bits (that is performed by
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000304 * genphy_config_aneg() call above) must be followed by
305 * a software reset. Otherwise, the write has no effect.
306 */
Andrew Lunn34386342017-07-30 22:41:45 +0200307 err = genphy_soft_reset(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000308 if (err < 0)
309 return err;
310 }
311
312 return 0;
Andy Fleming00db8182005-07-30 19:31:23 -0400313}
314
Andrew Lunnf2899782017-05-23 17:49:13 +0200315static int m88e1101_config_aneg(struct phy_device *phydev)
316{
317 int err;
318
319 /* This Marvell PHY has an errata which requires
320 * that certain registers get written in order
321 * to restart autonegotiation
322 */
Andrew Lunn34386342017-07-30 22:41:45 +0200323 err = genphy_soft_reset(phydev);
Andrew Lunnf2899782017-05-23 17:49:13 +0200324 if (err < 0)
325 return err;
326
327 err = phy_write(phydev, 0x1d, 0x1f);
328 if (err < 0)
329 return err;
330
331 err = phy_write(phydev, 0x1e, 0x200c);
332 if (err < 0)
333 return err;
334
335 err = phy_write(phydev, 0x1d, 0x5);
336 if (err < 0)
337 return err;
338
339 err = phy_write(phydev, 0x1e, 0);
340 if (err < 0)
341 return err;
342
343 err = phy_write(phydev, 0x1e, 0x100);
344 if (err < 0)
345 return err;
346
347 return marvell_config_aneg(phydev);
348}
349
David Daneycf41a512010-11-19 12:13:18 +0000350#ifdef CONFIG_OF_MDIO
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200351/* Set and/or override some configuration registers based on the
David Daneycf41a512010-11-19 12:13:18 +0000352 * marvell,reg-init property stored in the of_node for the phydev.
353 *
354 * marvell,reg-init = <reg-page reg mask value>,...;
355 *
356 * There may be one or more sets of <reg-page reg mask value>:
357 *
358 * reg-page: which register bank to use.
359 * reg: the register.
360 * mask: if non-zero, ANDed with existing register value.
361 * value: ORed with the masked value and written to the regiser.
362 *
363 */
364static int marvell_of_reg_init(struct phy_device *phydev)
365{
366 const __be32 *paddr;
Russell King424ca4c2018-01-02 10:58:48 +0000367 int len, i, saved_page, current_page, ret = 0;
David Daneycf41a512010-11-19 12:13:18 +0000368
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100369 if (!phydev->mdio.dev.of_node)
David Daneycf41a512010-11-19 12:13:18 +0000370 return 0;
371
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100372 paddr = of_get_property(phydev->mdio.dev.of_node,
373 "marvell,reg-init", &len);
David Daneycf41a512010-11-19 12:13:18 +0000374 if (!paddr || len < (4 * sizeof(*paddr)))
375 return 0;
376
Russell King424ca4c2018-01-02 10:58:48 +0000377 saved_page = phy_save_page(phydev);
David Daneycf41a512010-11-19 12:13:18 +0000378 if (saved_page < 0)
Russell King424ca4c2018-01-02 10:58:48 +0000379 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000380 current_page = saved_page;
381
David Daneycf41a512010-11-19 12:13:18 +0000382 len /= sizeof(*paddr);
383 for (i = 0; i < len - 3; i += 4) {
Andrew Lunn6427bb22017-05-17 03:26:03 +0200384 u16 page = be32_to_cpup(paddr + i);
David Daneycf41a512010-11-19 12:13:18 +0000385 u16 reg = be32_to_cpup(paddr + i + 1);
386 u16 mask = be32_to_cpup(paddr + i + 2);
387 u16 val_bits = be32_to_cpup(paddr + i + 3);
388 int val;
389
Andrew Lunn6427bb22017-05-17 03:26:03 +0200390 if (page != current_page) {
391 current_page = page;
Russell King424ca4c2018-01-02 10:58:48 +0000392 ret = marvell_write_page(phydev, page);
David Daneycf41a512010-11-19 12:13:18 +0000393 if (ret < 0)
394 goto err;
395 }
396
397 val = 0;
398 if (mask) {
Russell King424ca4c2018-01-02 10:58:48 +0000399 val = __phy_read(phydev, reg);
David Daneycf41a512010-11-19 12:13:18 +0000400 if (val < 0) {
401 ret = val;
402 goto err;
403 }
404 val &= mask;
405 }
406 val |= val_bits;
407
Russell King424ca4c2018-01-02 10:58:48 +0000408 ret = __phy_write(phydev, reg, val);
David Daneycf41a512010-11-19 12:13:18 +0000409 if (ret < 0)
410 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000411 }
412err:
Russell King424ca4c2018-01-02 10:58:48 +0000413 return phy_restore_page(phydev, saved_page, ret);
David Daneycf41a512010-11-19 12:13:18 +0000414}
415#else
416static int marvell_of_reg_init(struct phy_device *phydev)
417{
418 return 0;
419}
420#endif /* CONFIG_OF_MDIO */
421
Andrew Lunn864dc722017-07-30 22:41:48 +0200422static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
Sergei Poselenov140bc922009-04-07 02:01:41 +0000423{
Russell King424ca4c2018-01-02 10:58:48 +0000424 int mscr;
Andrew Lunn864dc722017-07-30 22:41:48 +0200425
426 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
Russell King424ca4c2018-01-02 10:58:48 +0000427 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
428 MII_88E1121_PHY_MSCR_TX_DELAY;
Andrew Lunn864dc722017-07-30 22:41:48 +0200429 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
Russell King424ca4c2018-01-02 10:58:48 +0000430 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
Andrew Lunn864dc722017-07-30 22:41:48 +0200431 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
Russell King424ca4c2018-01-02 10:58:48 +0000432 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
433 else
434 mscr = 0;
Andrew Lunn864dc722017-07-30 22:41:48 +0200435
Russell King424ca4c2018-01-02 10:58:48 +0000436 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
437 MII_88E1121_PHY_MSCR_REG,
438 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
Andrew Lunn864dc722017-07-30 22:41:48 +0200439}
440
441static int m88e1121_config_aneg(struct phy_device *phydev)
442{
Florian Fainellid6ab9332018-09-25 11:28:46 -0700443 int changed = 0;
Andrew Lunn864dc722017-07-30 22:41:48 +0200444 int err = 0;
445
446 if (phy_interface_is_rgmii(phydev)) {
447 err = m88e1121_config_aneg_rgmii_delays(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000448 if (err < 0)
Andrew Lunn864dc722017-07-30 22:41:48 +0200449 return err;
450 }
451
Andrew Lunnfecd5e92017-07-30 22:41:49 +0200452 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000453 if (err < 0)
454 return err;
455
Florian Fainellid6ab9332018-09-25 11:28:46 -0700456 changed = err;
457
458 err = genphy_config_aneg(phydev);
459 if (err < 0)
460 return err;
461
David S. Miller4b1bd692018-09-25 22:41:31 -0700462 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
Florian Fainellid6ab9332018-09-25 11:28:46 -0700463 /* A software reset is used to ensure a "commit" of the
464 * changes is done.
465 */
466 err = genphy_soft_reset(phydev);
467 if (err < 0)
468 return err;
469 }
470
471 return 0;
Sergei Poselenov140bc922009-04-07 02:01:41 +0000472}
473
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700474static int m88e1318_config_aneg(struct phy_device *phydev)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700475{
Russell King424ca4c2018-01-02 10:58:48 +0000476 int err;
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700477
Russell King424ca4c2018-01-02 10:58:48 +0000478 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
479 MII_88E1318S_PHY_MSCR1_REG,
480 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700481 if (err < 0)
482 return err;
483
484 return m88e1121_config_aneg(phydev);
485}
486
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200487/**
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100488 * linkmode_adv_to_fiber_adv_t
489 * @advertise: the linkmode advertisement settings
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200490 *
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100491 * A small helper function that translates linkmode advertisement
492 * settings to phy autonegotiation advertisements for the MII_ADV
493 * register for fiber link.
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200494 */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100495static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200496{
497 u32 result = 0;
498
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100499 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200500 result |= ADVERTISE_FIBER_1000HALF;
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100501 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200502 result |= ADVERTISE_FIBER_1000FULL;
503
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100504 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
505 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200506 result |= LPA_PAUSE_ASYM_FIBER;
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100507 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200508 result |= (ADVERTISE_PAUSE_FIBER
509 & (~ADVERTISE_PAUSE_ASYM_FIBER));
510
511 return result;
512}
513
514/**
515 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
516 * @phydev: target phy_device struct
517 *
518 * Description: If auto-negotiation is enabled, we configure the
519 * advertising, and then restart auto-negotiation. If it is not
520 * enabled, then we write the BMCR. Adapted for fiber link in
521 * some Marvell's devices.
522 */
523static int marvell_config_aneg_fiber(struct phy_device *phydev)
524{
525 int changed = 0;
526 int err;
527 int adv, oldadv;
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200528
529 if (phydev->autoneg != AUTONEG_ENABLE)
530 return genphy_setup_forced(phydev);
531
532 /* Only allow advertising what this PHY supports */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100533 linkmode_and(phydev->advertising, phydev->advertising,
534 phydev->supported);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200535
536 /* Setup fiber advertisement */
537 adv = phy_read(phydev, MII_ADVERTISE);
538 if (adv < 0)
539 return adv;
540
541 oldadv = adv;
542 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
543 | LPA_PAUSE_FIBER);
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100544 adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200545
546 if (adv != oldadv) {
547 err = phy_write(phydev, MII_ADVERTISE, adv);
548 if (err < 0)
549 return err;
550
551 changed = 1;
552 }
553
554 if (changed == 0) {
555 /* Advertisement hasn't changed, but maybe aneg was never on to
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200556 * begin with? Or maybe phy was isolated?
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200557 */
558 int ctl = phy_read(phydev, MII_BMCR);
559
560 if (ctl < 0)
561 return ctl;
562
563 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
564 changed = 1; /* do restart aneg */
565 }
566
567 /* Only restart aneg if we are advertising something different
568 * than we were before.
569 */
570 if (changed > 0)
571 changed = genphy_restart_aneg(phydev);
572
573 return changed;
574}
575
Michal Simek10e24caa2013-05-30 20:08:27 +0000576static int m88e1510_config_aneg(struct phy_device *phydev)
577{
578 int err;
579
Andrew Lunn52295662017-05-25 21:42:08 +0200580 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200581 if (err < 0)
582 goto error;
583
584 /* Configure the copper link first */
Michal Simek10e24caa2013-05-30 20:08:27 +0000585 err = m88e1318_config_aneg(phydev);
586 if (err < 0)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200587 goto error;
Michal Simek10e24caa2013-05-30 20:08:27 +0000588
Russell Kingde9c4e02017-12-13 09:22:03 +0000589 /* Do not touch the fiber page if we're in copper->sgmii mode */
590 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
591 return 0;
592
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200593 /* Then the fiber link */
Andrew Lunn52295662017-05-25 21:42:08 +0200594 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200595 if (err < 0)
596 goto error;
597
598 err = marvell_config_aneg_fiber(phydev);
599 if (err < 0)
600 goto error;
601
Andrew Lunn52295662017-05-25 21:42:08 +0200602 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200603
604error:
Andrew Lunn52295662017-05-25 21:42:08 +0200605 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200606 return err;
Clemens Gruber79be1a12016-02-15 23:46:45 +0100607}
608
Wang Dongsheng07777242018-07-01 23:15:46 -0700609static void marvell_config_led(struct phy_device *phydev)
610{
611 u16 def_config;
612 int err;
613
614 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
615 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
616 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
617 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
618 def_config = MII_88E1121_PHY_LED_DEF;
619 break;
620 /* Default PHY LED config:
621 * LED[0] .. 1000Mbps Link
622 * LED[1] .. 100Mbps Link
623 * LED[2] .. Blink, Activity
624 */
625 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
Jian Shena93f7fe2019-04-22 21:52:23 +0800626 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
627 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
628 else
629 def_config = MII_88E1510_PHY_LED_DEF;
Wang Dongsheng07777242018-07-01 23:15:46 -0700630 break;
631 default:
632 return;
633 }
634
635 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
636 def_config);
637 if (err < 0)
Andrew Lunnab2a6052018-09-29 23:04:10 +0200638 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
Wang Dongsheng07777242018-07-01 23:15:46 -0700639}
640
Clemens Gruber79be1a12016-02-15 23:46:45 +0100641static int marvell_config_init(struct phy_device *phydev)
642{
Wang Dongsheng07777242018-07-01 23:15:46 -0700643 /* Set defalut LED */
644 marvell_config_led(phydev);
645
Clemens Gruber79be1a12016-02-15 23:46:45 +0100646 /* Set registers from marvell,reg-init DT property */
Michal Simek10e24caa2013-05-30 20:08:27 +0000647 return marvell_of_reg_init(phydev);
648}
649
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200650static int m88e3016_config_init(struct phy_device *phydev)
651{
Russell Kingfea23fb2018-01-02 10:58:58 +0000652 int ret;
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200653
654 /* Enable Scrambler and Auto-Crossover */
Russell Kingfea23fb2018-01-02 10:58:58 +0000655 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
Russell Kingf1028522018-01-05 16:07:10 +0000656 MII_88E3016_DISABLE_SCRAMBLER,
Russell Kingfea23fb2018-01-02 10:58:58 +0000657 MII_88E3016_AUTO_MDIX_CROSSOVER);
658 if (ret < 0)
659 return ret;
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200660
Clemens Gruber79be1a12016-02-15 23:46:45 +0100661 return marvell_config_init(phydev);
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200662}
663
Andrew Lunn865b813a2017-07-30 22:41:47 +0200664static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
665 u16 mode,
666 int fibre_copper_auto)
667{
Andrew Lunn865b813a2017-07-30 22:41:47 +0200668 if (fibre_copper_auto)
Russell Kingfea23fb2018-01-02 10:58:58 +0000669 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
Andrew Lunn865b813a2017-07-30 22:41:47 +0200670
Russell Kingfea23fb2018-01-02 10:58:58 +0000671 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
Russell Kingf1028522018-01-05 16:07:10 +0000672 MII_M1111_HWCFG_MODE_MASK |
673 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
674 MII_M1111_HWCFG_FIBER_COPPER_RES,
Russell Kingfea23fb2018-01-02 10:58:58 +0000675 mode);
Andrew Lunn865b813a2017-07-30 22:41:47 +0200676}
677
Andrew Lunn61111592017-07-30 22:41:46 +0200678static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
Kim Phillips895ee682007-06-05 18:46:47 +0800679{
Russell Kingfea23fb2018-01-02 10:58:58 +0000680 int delay;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200681
682 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Russell Kingfea23fb2018-01-02 10:58:58 +0000683 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200684 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
Russell Kingfea23fb2018-01-02 10:58:58 +0000685 delay = MII_M1111_RGMII_RX_DELAY;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200686 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
Russell Kingfea23fb2018-01-02 10:58:58 +0000687 delay = MII_M1111_RGMII_TX_DELAY;
688 } else {
689 delay = 0;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200690 }
691
Russell Kingfea23fb2018-01-02 10:58:58 +0000692 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
Russell Kingf1028522018-01-05 16:07:10 +0000693 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
Russell Kingfea23fb2018-01-02 10:58:58 +0000694 delay);
Andrew Lunn61111592017-07-30 22:41:46 +0200695}
696
697static int m88e1111_config_init_rgmii(struct phy_device *phydev)
698{
699 int temp;
700 int err;
701
702 err = m88e1111_config_init_rgmii_delays(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200703 if (err < 0)
704 return err;
705
706 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
707 if (temp < 0)
708 return temp;
709
710 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
711
712 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
713 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
714 else
715 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
716
717 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
718}
719
720static int m88e1111_config_init_sgmii(struct phy_device *phydev)
721{
722 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200723
Andrew Lunn865b813a2017-07-30 22:41:47 +0200724 err = m88e1111_config_init_hwcfg_mode(
725 phydev,
726 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
727 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200728 if (err < 0)
729 return err;
730
731 /* make sure copper is selected */
Andrew Lunn52295662017-05-25 21:42:08 +0200732 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200733}
734
735static int m88e1111_config_init_rtbi(struct phy_device *phydev)
736{
Andrew Lunn61111592017-07-30 22:41:46 +0200737 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200738
Andrew Lunn61111592017-07-30 22:41:46 +0200739 err = m88e1111_config_init_rgmii_delays(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000740 if (err < 0)
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200741 return err;
742
Andrew Lunn865b813a2017-07-30 22:41:47 +0200743 err = m88e1111_config_init_hwcfg_mode(
744 phydev,
745 MII_M1111_HWCFG_MODE_RTBI,
746 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200747 if (err < 0)
748 return err;
749
750 /* soft reset */
Andrew Lunn34386342017-07-30 22:41:45 +0200751 err = genphy_soft_reset(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200752 if (err < 0)
753 return err;
754
Andrew Lunn865b813a2017-07-30 22:41:47 +0200755 return m88e1111_config_init_hwcfg_mode(
756 phydev,
757 MII_M1111_HWCFG_MODE_RTBI,
758 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200759}
760
761static int m88e1111_config_init(struct phy_device *phydev)
762{
763 int err;
764
Florian Fainelli32a64162015-05-26 12:19:59 -0700765 if (phy_interface_is_rgmii(phydev)) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200766 err = m88e1111_config_init_rgmii(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000767 if (err < 0)
Kim Phillips895ee682007-06-05 18:46:47 +0800768 return err;
769 }
770
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500771 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200772 err = m88e1111_config_init_sgmii(phydev);
Madalin Bucur07151bc2015-08-07 17:07:50 +0800773 if (err < 0)
774 return err;
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500775 }
776
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000777 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200778 err = m88e1111_config_init_rtbi(phydev);
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000779 if (err < 0)
780 return err;
781 }
782
David Daneycf41a512010-11-19 12:13:18 +0000783 err = marvell_of_reg_init(phydev);
784 if (err < 0)
785 return err;
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000786
Andrew Lunn34386342017-07-30 22:41:45 +0200787 return genphy_soft_reset(phydev);
Kim Phillips895ee682007-06-05 18:46:47 +0800788}
789
Heiner Kallweit5c6bc512019-10-28 20:53:25 +0100790static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
791{
792 int val, cnt, enable;
793
794 val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
795 if (val < 0)
796 return val;
797
798 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
799 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
800
801 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
802
803 return 0;
804}
805
806static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
807{
808 int val;
809
810 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
811 return -E2BIG;
812
813 if (!cnt)
814 return phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
815 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
816
817 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
818 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
819
820 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
821 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
822 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
823 val);
824}
825
826static int m88e1111_get_tunable(struct phy_device *phydev,
827 struct ethtool_tunable *tuna, void *data)
828{
829 switch (tuna->id) {
830 case ETHTOOL_PHY_DOWNSHIFT:
831 return m88e1111_get_downshift(phydev, data);
832 default:
833 return -EOPNOTSUPP;
834 }
835}
836
837static int m88e1111_set_tunable(struct phy_device *phydev,
838 struct ethtool_tunable *tuna, const void *data)
839{
840 switch (tuna->id) {
841 case ETHTOOL_PHY_DOWNSHIFT:
842 return m88e1111_set_downshift(phydev, *(const u8 *)data);
843 default:
844 return -EOPNOTSUPP;
845 }
846}
847
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100848static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200849{
850 int val, cnt, enable;
851
852 val = phy_read(phydev, MII_M1011_PHY_SCR);
853 if (val < 0)
854 return val;
855
856 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
Heiner Kallweitf8d975b2019-10-28 20:52:22 +0100857 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200858
859 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
860
861 return 0;
862}
863
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100864static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200865{
866 int val;
867
868 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
869 return -E2BIG;
870
871 if (!cnt)
872 return phy_clear_bits(phydev, MII_M1011_PHY_SCR,
873 MII_M1011_PHY_SCR_DOWNSHIFT_EN);
874
875 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
Heiner Kallweitf8d975b2019-10-28 20:52:22 +0100876 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200877
878 return phy_modify(phydev, MII_M1011_PHY_SCR,
879 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
Heiner Kallweitf8d975b2019-10-28 20:52:22 +0100880 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200881 val);
882}
883
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100884static int m88e1011_get_tunable(struct phy_device *phydev,
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200885 struct ethtool_tunable *tuna, void *data)
886{
887 switch (tuna->id) {
888 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100889 return m88e1011_get_downshift(phydev, data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200890 default:
891 return -EOPNOTSUPP;
892 }
893}
894
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100895static int m88e1011_set_tunable(struct phy_device *phydev,
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200896 struct ethtool_tunable *tuna, const void *data)
897{
898 switch (tuna->id) {
899 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100900 return m88e1011_set_downshift(phydev, *(const u8 *)data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200901 default:
902 return -EOPNOTSUPP;
903 }
904}
905
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100906static void m88e1011_link_change_notify(struct phy_device *phydev)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200907{
908 int status;
909
910 if (phydev->state != PHY_RUNNING)
911 return;
912
913 /* we may be on fiber page currently */
914 status = phy_read_paged(phydev, MII_MARVELL_COPPER_PAGE,
915 MII_M1011_PHY_SSR);
916
917 if (status > 0 && status & MII_M1011_PHY_SSR_DOWNSHIFT)
918 phydev_warn(phydev, "Downshift occurred! Cabling may be defective.\n");
919}
920
Heiner Kallweite2d861c2019-10-19 15:58:19 +0200921static int m88e1116r_config_init(struct phy_device *phydev)
922{
923 int err;
924
925 err = genphy_soft_reset(phydev);
926 if (err < 0)
927 return err;
928
929 msleep(500);
930
931 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
932 if (err < 0)
933 return err;
934
935 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
936 if (err < 0)
937 return err;
938
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100939 err = m88e1011_set_downshift(phydev, 8);
Heiner Kallweite2d861c2019-10-19 15:58:19 +0200940 if (err < 0)
941 return err;
942
943 if (phy_interface_is_rgmii(phydev)) {
944 err = m88e1121_config_aneg_rgmii_delays(phydev);
945 if (err < 0)
946 return err;
947 }
948
949 err = genphy_soft_reset(phydev);
950 if (err < 0)
951 return err;
952
953 return marvell_config_init(phydev);
954}
955
Esben Haabendaldd9a1222018-04-05 22:40:29 +0200956static int m88e1318_config_init(struct phy_device *phydev)
957{
958 if (phy_interrupt_is_valid(phydev)) {
959 int err = phy_modify_paged(
960 phydev, MII_MARVELL_LED_PAGE,
961 MII_88E1318S_PHY_LED_TCR,
962 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
963 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
964 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
965 if (err < 0)
966 return err;
967 }
968
Wang Dongsheng07777242018-07-01 23:15:46 -0700969 return marvell_config_init(phydev);
Esben Haabendaldd9a1222018-04-05 22:40:29 +0200970}
971
Clemens Gruber407353e2016-02-23 20:16:58 +0100972static int m88e1510_config_init(struct phy_device *phydev)
973{
974 int err;
Clemens Gruber407353e2016-02-23 20:16:58 +0100975
976 /* SGMII-to-Copper mode initialization */
977 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
978 /* Select page 18 */
Andrew Lunn6427bb22017-05-17 03:26:03 +0200979 err = marvell_set_page(phydev, 18);
Clemens Gruber407353e2016-02-23 20:16:58 +0100980 if (err < 0)
981 return err;
982
983 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
Russell Kingfea23fb2018-01-02 10:58:58 +0000984 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
Russell Kingf1028522018-01-05 16:07:10 +0000985 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
Russell Kingfea23fb2018-01-02 10:58:58 +0000986 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
Clemens Gruber407353e2016-02-23 20:16:58 +0100987 if (err < 0)
988 return err;
989
990 /* PHY reset is necessary after changing MODE[2:0] */
Russell Kingfea23fb2018-01-02 10:58:58 +0000991 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
992 MII_88E1510_GEN_CTRL_REG_1_RESET);
Clemens Gruber407353e2016-02-23 20:16:58 +0100993 if (err < 0)
994 return err;
995
996 /* Reset page selection */
Andrew Lunn52295662017-05-25 21:42:08 +0200997 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Clemens Gruber407353e2016-02-23 20:16:58 +0100998 if (err < 0)
999 return err;
1000 }
1001
Esben Haabendaldd9a1222018-04-05 22:40:29 +02001002 return m88e1318_config_init(phydev);
Clemens Gruber407353e2016-02-23 20:16:58 +01001003}
1004
Ron Madrid605f1962008-11-06 09:05:26 +00001005static int m88e1118_config_aneg(struct phy_device *phydev)
1006{
1007 int err;
1008
Andrew Lunn34386342017-07-30 22:41:45 +02001009 err = genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +00001010 if (err < 0)
1011 return err;
1012
Andrew Lunnfecd5e92017-07-30 22:41:49 +02001013 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Ron Madrid605f1962008-11-06 09:05:26 +00001014 if (err < 0)
1015 return err;
1016
1017 err = genphy_config_aneg(phydev);
1018 return 0;
1019}
1020
1021static int m88e1118_config_init(struct phy_device *phydev)
1022{
1023 int err;
1024
1025 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +02001026 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +00001027 if (err < 0)
1028 return err;
1029
1030 /* Enable 1000 Mbit */
1031 err = phy_write(phydev, 0x15, 0x1070);
1032 if (err < 0)
1033 return err;
1034
1035 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +02001036 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +00001037 if (err < 0)
1038 return err;
1039
1040 /* Adjust LED Control */
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001041 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1042 err = phy_write(phydev, 0x10, 0x1100);
1043 else
1044 err = phy_write(phydev, 0x10, 0x021e);
Ron Madrid605f1962008-11-06 09:05:26 +00001045 if (err < 0)
1046 return err;
1047
David Daneycf41a512010-11-19 12:13:18 +00001048 err = marvell_of_reg_init(phydev);
1049 if (err < 0)
1050 return err;
1051
Ron Madrid605f1962008-11-06 09:05:26 +00001052 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +02001053 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +00001054 if (err < 0)
1055 return err;
1056
Andrew Lunn34386342017-07-30 22:41:45 +02001057 return genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +00001058}
1059
David Daney90600732010-11-19 11:58:53 +00001060static int m88e1149_config_init(struct phy_device *phydev)
1061{
1062 int err;
1063
1064 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +02001065 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
David Daney90600732010-11-19 11:58:53 +00001066 if (err < 0)
1067 return err;
1068
1069 /* Enable 1000 Mbit */
1070 err = phy_write(phydev, 0x15, 0x1048);
1071 if (err < 0)
1072 return err;
1073
David Daneycf41a512010-11-19 12:13:18 +00001074 err = marvell_of_reg_init(phydev);
1075 if (err < 0)
1076 return err;
1077
David Daney90600732010-11-19 11:58:53 +00001078 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +02001079 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
David Daney90600732010-11-19 11:58:53 +00001080 if (err < 0)
1081 return err;
1082
Andrew Lunn34386342017-07-30 22:41:45 +02001083 return genphy_soft_reset(phydev);
David Daney90600732010-11-19 11:58:53 +00001084}
1085
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001086static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1087{
1088 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001089
Andrew Lunn61111592017-07-30 22:41:46 +02001090 err = m88e1111_config_init_rgmii_delays(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001091 if (err < 0)
1092 return err;
1093
1094 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1095 err = phy_write(phydev, 0x1d, 0x0012);
1096 if (err < 0)
1097 return err;
1098
Russell Kingf1028522018-01-05 16:07:10 +00001099 err = phy_modify(phydev, 0x1e, 0x0fc0,
Russell Kingfea23fb2018-01-02 10:58:58 +00001100 2 << 9 | /* 36 ohm */
1101 2 << 6); /* 39 ohm */
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001102 if (err < 0)
1103 return err;
1104
1105 err = phy_write(phydev, 0x1d, 0x3);
1106 if (err < 0)
1107 return err;
1108
1109 err = phy_write(phydev, 0x1e, 0x8000);
1110 }
1111 return err;
1112}
1113
1114static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1115{
Andrew Lunn865b813a2017-07-30 22:41:47 +02001116 return m88e1111_config_init_hwcfg_mode(
1117 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1118 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001119}
1120
Andy Fleming76884672007-02-09 18:13:58 -06001121static int m88e1145_config_init(struct phy_device *phydev)
1122{
1123 int err;
1124
1125 /* Take care of errata E0 & E1 */
1126 err = phy_write(phydev, 0x1d, 0x001b);
1127 if (err < 0)
1128 return err;
1129
1130 err = phy_write(phydev, 0x1e, 0x418f);
1131 if (err < 0)
1132 return err;
1133
1134 err = phy_write(phydev, 0x1d, 0x0016);
1135 if (err < 0)
1136 return err;
1137
1138 err = phy_write(phydev, 0x1e, 0xa2da);
1139 if (err < 0)
1140 return err;
1141
Kim Phillips895ee682007-06-05 18:46:47 +08001142 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001143 err = m88e1145_config_init_rgmii(phydev);
Andy Fleming76884672007-02-09 18:13:58 -06001144 if (err < 0)
1145 return err;
Andy Fleming76884672007-02-09 18:13:58 -06001146 }
1147
Viet Nga Daob0224172014-10-23 19:41:53 -07001148 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001149 err = m88e1145_config_init_sgmii(phydev);
Viet Nga Daob0224172014-10-23 19:41:53 -07001150 if (err < 0)
1151 return err;
1152 }
1153
David Daneycf41a512010-11-19 12:13:18 +00001154 err = marvell_of_reg_init(phydev);
1155 if (err < 0)
1156 return err;
1157
Andy Fleming76884672007-02-09 18:13:58 -06001158 return 0;
1159}
Andy Fleming00db8182005-07-30 19:31:23 -04001160
Heiner Kallweit69f42be2019-03-25 19:35:41 +01001161static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1162{
1163 int val;
1164
1165 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1166 if (val < 0)
1167 return val;
1168
1169 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1170 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1171 return 0;
1172 }
1173
1174 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1175
1176 switch (val) {
1177 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1178 *msecs = 0;
1179 break;
1180 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1181 *msecs = 10;
1182 break;
1183 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1184 *msecs = 20;
1185 break;
1186 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1187 *msecs = 40;
1188 break;
1189 default:
1190 return -EINVAL;
1191 }
1192
1193 return 0;
1194}
1195
1196static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1197{
1198 struct ethtool_eee eee;
1199 int val, ret;
1200
1201 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1202 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1203 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1204
1205 /* According to the Marvell data sheet EEE must be disabled for
1206 * Fast Link Down detection to work properly
1207 */
1208 ret = phy_ethtool_get_eee(phydev, &eee);
1209 if (!ret && eee.eee_enabled) {
1210 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1211 return -EBUSY;
1212 }
1213
1214 if (*msecs <= 5)
1215 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1216 else if (*msecs <= 15)
1217 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1218 else if (*msecs <= 30)
1219 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1220 else
1221 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1222
1223 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1224
1225 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1226 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1227 if (ret)
1228 return ret;
1229
1230 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1231 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1232}
1233
1234static int m88e1540_get_tunable(struct phy_device *phydev,
1235 struct ethtool_tunable *tuna, void *data)
1236{
1237 switch (tuna->id) {
1238 case ETHTOOL_PHY_FAST_LINK_DOWN:
1239 return m88e1540_get_fld(phydev, data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001240 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001241 return m88e1011_get_downshift(phydev, data);
Heiner Kallweit69f42be2019-03-25 19:35:41 +01001242 default:
1243 return -EOPNOTSUPP;
1244 }
1245}
1246
1247static int m88e1540_set_tunable(struct phy_device *phydev,
1248 struct ethtool_tunable *tuna, const void *data)
1249{
1250 switch (tuna->id) {
1251 case ETHTOOL_PHY_FAST_LINK_DOWN:
1252 return m88e1540_set_fld(phydev, data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001253 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001254 return m88e1011_set_downshift(phydev, *(const u8 *)data);
Heiner Kallweit69f42be2019-03-25 19:35:41 +01001255 default:
1256 return -EOPNOTSUPP;
1257 }
1258}
1259
Andrew Lunn8cbcdc12019-01-10 22:48:36 +01001260/* The VOD can be out of specification on link up. Poke an
1261 * undocumented register, in an undocumented page, with a magic value
1262 * to fix this.
1263 */
1264static int m88e6390_errata(struct phy_device *phydev)
1265{
1266 int err;
1267
1268 err = phy_write(phydev, MII_BMCR,
1269 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1270 if (err)
1271 return err;
1272
1273 usleep_range(300, 400);
1274
1275 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1276 if (err)
1277 return err;
1278
1279 return genphy_soft_reset(phydev);
1280}
1281
1282static int m88e6390_config_aneg(struct phy_device *phydev)
1283{
1284 int err;
1285
1286 err = m88e6390_errata(phydev);
1287 if (err)
1288 return err;
1289
1290 return m88e1510_config_aneg(phydev);
1291}
1292
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001293/**
Andrew Lunnab9cb722018-12-05 21:49:42 +01001294 * fiber_lpa_mod_linkmode_lpa_t
Andrew Lunnc0ec3c22018-11-10 23:43:34 +01001295 * @advertising: the linkmode advertisement settings
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001296 * @lpa: value of the MII_LPA register for fiber link
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001297 *
Andrew Lunnab9cb722018-12-05 21:49:42 +01001298 * A small helper function that translates MII_LPA bits to linkmode LP
1299 * advertisement settings. Other bits in advertising are left
1300 * unchanged.
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001301 */
Andrew Lunnab9cb722018-12-05 21:49:42 +01001302static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001303{
Andrew Lunnab9cb722018-12-05 21:49:42 +01001304 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1305 advertising, lpa & LPA_FIBER_1000HALF);
1306
1307 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1308 advertising, lpa & LPA_FIBER_1000FULL);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001309}
1310
1311/**
1312 * marvell_update_link - update link status in real time in @phydev
1313 * @phydev: target phy_device struct
1314 *
1315 * Description: Update the value in phydev->link to reflect the
1316 * current link value.
1317 */
1318static int marvell_update_link(struct phy_device *phydev, int fiber)
1319{
1320 int status;
1321
1322 /* Use the generic register for copper link, or specific
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001323 * register for fiber case
1324 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001325 if (fiber) {
1326 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1327 if (status < 0)
1328 return status;
1329
1330 if ((status & REGISTER_LINK_STATUS) == 0)
1331 phydev->link = 0;
1332 else
1333 phydev->link = 1;
1334 } else {
1335 return genphy_update_link(phydev);
1336 }
1337
1338 return 0;
1339}
1340
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001341static int marvell_read_status_page_an(struct phy_device *phydev,
1342 int fiber)
1343{
1344 int status;
1345 int lpa;
Russell Kingfcf1f592019-12-17 13:39:21 +00001346 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001347
1348 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1349 if (status < 0)
1350 return status;
1351
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001352 if (!fiber) {
Russell Kingfcf1f592019-12-17 13:39:21 +00001353 err = genphy_read_lpa(phydev);
1354 if (err < 0)
1355 return err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001356
Russell Kingfcf1f592019-12-17 13:39:21 +00001357 phydev->pause = 0;
1358 phydev->asym_pause = 0;
Russell Kingaf006242019-12-17 13:39:06 +00001359 phy_resolve_aneg_pause(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001360 } else {
Russell Kingfcf1f592019-12-17 13:39:21 +00001361 lpa = phy_read(phydev, MII_LPA);
1362 if (lpa < 0)
1363 return lpa;
1364
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001365 /* The fiber link is only 1000M capable */
Andrew Lunnab9cb722018-12-05 21:49:42 +01001366 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001367
Russell Kingfcf1f592019-12-17 13:39:21 +00001368 phydev->pause = 0;
1369 phydev->asym_pause = 0;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001370 if (phydev->duplex == DUPLEX_FULL) {
1371 if (!(lpa & LPA_PAUSE_FIBER)) {
1372 phydev->pause = 0;
1373 phydev->asym_pause = 0;
1374 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1375 phydev->pause = 1;
1376 phydev->asym_pause = 1;
1377 } else {
1378 phydev->pause = 1;
1379 phydev->asym_pause = 0;
1380 }
1381 }
1382 }
Russell Kingfcf1f592019-12-17 13:39:21 +00001383
1384 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1385 phydev->duplex = DUPLEX_FULL;
1386 else
1387 phydev->duplex = DUPLEX_HALF;
1388
1389 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1390 case MII_M1011_PHY_STATUS_1000:
1391 phydev->speed = SPEED_1000;
1392 break;
1393
1394 case MII_M1011_PHY_STATUS_100:
1395 phydev->speed = SPEED_100;
1396 break;
1397
1398 default:
1399 phydev->speed = SPEED_10;
1400 break;
1401 }
1402
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001403 return 0;
1404}
1405
1406static int marvell_read_status_page_fixed(struct phy_device *phydev)
1407{
Russell King0efc2862019-12-17 13:39:16 +00001408 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001409
Russell King0efc2862019-12-17 13:39:16 +00001410 err = genphy_read_status_fixed(phydev);
1411 if (err < 0)
1412 return err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001413
1414 phydev->pause = 0;
1415 phydev->asym_pause = 0;
Andrew Lunnc0ec3c22018-11-10 23:43:34 +01001416 linkmode_zero(phydev->lp_advertising);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001417
1418 return 0;
1419}
1420
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001421/* marvell_read_status_page
1422 *
Jeff Garzikf0c88f92008-03-25 23:53:24 -04001423 * Description:
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001424 * Check the link, then figure out the current state
1425 * by comparing what we advertise with what the link partner
1426 * advertises. Start by checking the gigabit possibilities,
1427 * then move on to 10/100.
1428 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001429static int marvell_read_status_page(struct phy_device *phydev, int page)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001430{
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001431 int fiber;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001432 int err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001433
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001434 /* Detect and update the link, but return if there
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001435 * was an error
1436 */
Andrew Lunn52295662017-05-25 21:42:08 +02001437 if (page == MII_MARVELL_FIBER_PAGE)
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001438 fiber = 1;
1439 else
1440 fiber = 0;
1441
1442 err = marvell_update_link(phydev, fiber);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001443 if (err)
1444 return err;
1445
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001446 if (phydev->autoneg == AUTONEG_ENABLE)
1447 err = marvell_read_status_page_an(phydev, fiber);
1448 else
1449 err = marvell_read_status_page_fixed(phydev);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001450
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001451 return err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001452}
1453
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001454/* marvell_read_status
1455 *
1456 * Some Marvell's phys have two modes: fiber and copper.
1457 * Both need status checked.
1458 * Description:
1459 * First, check the fiber link and status.
1460 * If the fiber link is down, check the copper link and status which
1461 * will be the default value if both link are down.
1462 */
1463static int marvell_read_status(struct phy_device *phydev)
1464{
1465 int err;
1466
1467 /* Check the fiber mode first */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001468 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1469 phydev->supported) &&
Russell Kinga13c06522017-01-10 23:13:45 +00001470 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
Andrew Lunn52295662017-05-25 21:42:08 +02001471 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001472 if (err < 0)
1473 goto error;
1474
Andrew Lunn52295662017-05-25 21:42:08 +02001475 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001476 if (err < 0)
1477 goto error;
1478
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001479 /* If the fiber link is up, it is the selected and
1480 * used link. In this case, we need to stay in the
1481 * fiber page. Please to be careful about that, avoid
1482 * to restore Copper page in other functions which
1483 * could break the behaviour for some fiber phy like
1484 * 88E1512.
1485 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001486 if (phydev->link)
1487 return 0;
1488
1489 /* If fiber link is down, check and save copper mode state */
Andrew Lunn52295662017-05-25 21:42:08 +02001490 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001491 if (err < 0)
1492 goto error;
1493 }
1494
Andrew Lunn52295662017-05-25 21:42:08 +02001495 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001496
1497error:
Andrew Lunn52295662017-05-25 21:42:08 +02001498 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001499 return err;
1500}
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001501
1502/* marvell_suspend
1503 *
1504 * Some Marvell's phys have two modes: fiber and copper.
1505 * Both need to be suspended
1506 */
1507static int marvell_suspend(struct phy_device *phydev)
1508{
1509 int err;
1510
1511 /* Suspend the fiber mode first */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001512 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1513 phydev->supported)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001514 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001515 if (err < 0)
1516 goto error;
1517
1518 /* With the page set, use the generic suspend */
1519 err = genphy_suspend(phydev);
1520 if (err < 0)
1521 goto error;
1522
1523 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001524 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001525 if (err < 0)
1526 goto error;
1527 }
1528
1529 /* With the page set, use the generic suspend */
1530 return genphy_suspend(phydev);
1531
1532error:
Andrew Lunn52295662017-05-25 21:42:08 +02001533 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001534 return err;
1535}
1536
1537/* marvell_resume
1538 *
1539 * Some Marvell's phys have two modes: fiber and copper.
1540 * Both need to be resumed
1541 */
1542static int marvell_resume(struct phy_device *phydev)
1543{
1544 int err;
1545
1546 /* Resume the fiber mode first */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001547 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1548 phydev->supported)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001549 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001550 if (err < 0)
1551 goto error;
1552
1553 /* With the page set, use the generic resume */
1554 err = genphy_resume(phydev);
1555 if (err < 0)
1556 goto error;
1557
1558 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001559 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001560 if (err < 0)
1561 goto error;
1562 }
1563
1564 /* With the page set, use the generic resume */
1565 return genphy_resume(phydev);
1566
1567error:
Andrew Lunn52295662017-05-25 21:42:08 +02001568 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001569 return err;
1570}
1571
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001572static int marvell_aneg_done(struct phy_device *phydev)
1573{
1574 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
Andrew Lunne69d9ed2017-05-17 03:26:00 +02001575
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001576 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1577}
1578
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00001579static int m88e1121_did_interrupt(struct phy_device *phydev)
1580{
1581 int imask;
1582
1583 imask = phy_read(phydev, MII_M1011_IEVENT);
1584
1585 if (imask & MII_M1011_IMASK_INIT)
1586 return 1;
1587
1588 return 0;
1589}
1590
Andrew Lunn23beb382017-05-17 03:26:04 +02001591static void m88e1318_get_wol(struct phy_device *phydev,
1592 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001593{
Russell King424ca4c2018-01-02 10:58:48 +00001594 int oldpage, ret = 0;
1595
Michael Stapelberg3871c382013-03-11 13:56:45 +00001596 wol->supported = WAKE_MAGIC;
1597 wol->wolopts = 0;
1598
Russell King424ca4c2018-01-02 10:58:48 +00001599 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1600 if (oldpage < 0)
1601 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001602
Russell King424ca4c2018-01-02 10:58:48 +00001603 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1604 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001605 wol->wolopts |= WAKE_MAGIC;
1606
Russell King424ca4c2018-01-02 10:58:48 +00001607error:
1608 phy_restore_page(phydev, oldpage, ret);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001609}
1610
Andrew Lunn23beb382017-05-17 03:26:04 +02001611static int m88e1318_set_wol(struct phy_device *phydev,
1612 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001613{
Russell King424ca4c2018-01-02 10:58:48 +00001614 int err = 0, oldpage;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001615
Russell King424ca4c2018-01-02 10:58:48 +00001616 oldpage = phy_save_page(phydev);
1617 if (oldpage < 0)
1618 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001619
1620 if (wol->wolopts & WAKE_MAGIC) {
1621 /* Explicitly switch to page 0x00, just to be sure */
Russell King424ca4c2018-01-02 10:58:48 +00001622 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001623 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001624 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001625
Jingju Houb6a930f2018-04-23 15:22:49 +08001626 /* If WOL event happened once, the LED[2] interrupt pin
1627 * will not be cleared unless we reading the interrupt status
1628 * register. If interrupts are in use, the normal interrupt
1629 * handling will clear the WOL event. Clear the WOL event
1630 * before enabling it if !phy_interrupt_is_valid()
1631 */
1632 if (!phy_interrupt_is_valid(phydev))
Andrew Lunne0a73282019-01-11 00:15:21 +01001633 __phy_read(phydev, MII_M1011_IEVENT);
Jingju Houb6a930f2018-04-23 15:22:49 +08001634
Michael Stapelberg3871c382013-03-11 13:56:45 +00001635 /* Enable the WOL interrupt */
Russell King424ca4c2018-01-02 10:58:48 +00001636 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1637 MII_88E1318S_PHY_CSIER_WOL_EIE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001638 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001639 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001640
Russell King424ca4c2018-01-02 10:58:48 +00001641 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001642 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001643 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001644
1645 /* Setup LED[2] as interrupt pin (active low) */
Russell King424ca4c2018-01-02 10:58:48 +00001646 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
Russell Kingf1028522018-01-05 16:07:10 +00001647 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
Russell King424ca4c2018-01-02 10:58:48 +00001648 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1649 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001650 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001651 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001652
Russell King424ca4c2018-01-02 10:58:48 +00001653 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001654 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001655 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001656
1657 /* Store the device address for the magic packet */
Russell King424ca4c2018-01-02 10:58:48 +00001658 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001659 ((phydev->attached_dev->dev_addr[5] << 8) |
1660 phydev->attached_dev->dev_addr[4]));
1661 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001662 goto error;
1663 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001664 ((phydev->attached_dev->dev_addr[3] << 8) |
1665 phydev->attached_dev->dev_addr[2]));
1666 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001667 goto error;
1668 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001669 ((phydev->attached_dev->dev_addr[1] << 8) |
1670 phydev->attached_dev->dev_addr[0]));
1671 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001672 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001673
1674 /* Clear WOL status and enable magic packet matching */
Russell King424ca4c2018-01-02 10:58:48 +00001675 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1676 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1677 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001678 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001679 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001680 } else {
Russell King424ca4c2018-01-02 10:58:48 +00001681 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001682 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001683 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001684
1685 /* Clear WOL status and disable magic packet matching */
Russell King424ca4c2018-01-02 10:58:48 +00001686 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
Russell Kingf1028522018-01-05 16:07:10 +00001687 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
Russell King424ca4c2018-01-02 10:58:48 +00001688 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001689 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001690 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001691 }
1692
Russell King424ca4c2018-01-02 10:58:48 +00001693error:
1694 return phy_restore_page(phydev, oldpage, err);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001695}
1696
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001697static int marvell_get_sset_count(struct phy_device *phydev)
1698{
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001699 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1700 phydev->supported))
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +02001701 return ARRAY_SIZE(marvell_hw_stats);
1702 else
1703 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001704}
1705
1706static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1707{
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001708 int count = marvell_get_sset_count(phydev);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001709 int i;
1710
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001711 for (i = 0; i < count; i++) {
Florian Fainelli98409b22018-03-02 15:08:37 -08001712 strlcpy(data + i * ETH_GSTRING_LEN,
1713 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001714 }
1715}
1716
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001717static u64 marvell_get_stat(struct phy_device *phydev, int i)
1718{
1719 struct marvell_hw_stat stat = marvell_hw_stats[i];
1720 struct marvell_priv *priv = phydev->priv;
Russell King424ca4c2018-01-02 10:58:48 +00001721 int val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001722 u64 ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001723
Russell King424ca4c2018-01-02 10:58:48 +00001724 val = phy_read_paged(phydev, stat.page, stat.reg);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001725 if (val < 0) {
Jisheng Zhang6c3442f2018-04-27 16:18:58 +08001726 ret = U64_MAX;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001727 } else {
1728 val = val & ((1 << stat.bits) - 1);
1729 priv->stats[i] += val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001730 ret = priv->stats[i];
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001731 }
1732
Andrew Lunn321b4d42016-02-20 00:35:29 +01001733 return ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001734}
1735
1736static void marvell_get_stats(struct phy_device *phydev,
1737 struct ethtool_stats *stats, u64 *data)
1738{
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001739 int count = marvell_get_sset_count(phydev);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001740 int i;
1741
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001742 for (i = 0; i < count; i++)
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001743 data[i] = marvell_get_stat(phydev, i);
1744}
1745
Andrew Lunn0b046802017-01-20 01:37:49 +01001746#ifdef CONFIG_HWMON
1747static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1748{
Andrew Lunn975b3882017-05-25 21:42:06 +02001749 int oldpage;
Russell King424ca4c2018-01-02 10:58:48 +00001750 int ret = 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001751 int val;
1752
1753 *temp = 0;
1754
Russell King424ca4c2018-01-02 10:58:48 +00001755 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1756 if (oldpage < 0)
1757 goto error;
Andrew Lunn975b3882017-05-25 21:42:06 +02001758
Andrew Lunn0b046802017-01-20 01:37:49 +01001759 /* Enable temperature sensor */
Russell King424ca4c2018-01-02 10:58:48 +00001760 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001761 if (ret < 0)
1762 goto error;
1763
Russell King424ca4c2018-01-02 10:58:48 +00001764 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1765 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
Andrew Lunn0b046802017-01-20 01:37:49 +01001766 if (ret < 0)
1767 goto error;
1768
1769 /* Wait for temperature to stabilize */
1770 usleep_range(10000, 12000);
1771
Russell King424ca4c2018-01-02 10:58:48 +00001772 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001773 if (val < 0) {
1774 ret = val;
1775 goto error;
1776 }
1777
1778 /* Disable temperature sensor */
Russell King424ca4c2018-01-02 10:58:48 +00001779 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1780 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
Andrew Lunn0b046802017-01-20 01:37:49 +01001781 if (ret < 0)
1782 goto error;
1783
1784 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1785
1786error:
Russell King424ca4c2018-01-02 10:58:48 +00001787 return phy_restore_page(phydev, oldpage, ret);
Andrew Lunn0b046802017-01-20 01:37:49 +01001788}
1789
1790static int m88e1121_hwmon_read(struct device *dev,
1791 enum hwmon_sensor_types type,
1792 u32 attr, int channel, long *temp)
1793{
1794 struct phy_device *phydev = dev_get_drvdata(dev);
1795 int err;
1796
1797 switch (attr) {
1798 case hwmon_temp_input:
1799 err = m88e1121_get_temp(phydev, temp);
1800 break;
1801 default:
1802 return -EOPNOTSUPP;
1803 }
1804
1805 return err;
1806}
1807
1808static umode_t m88e1121_hwmon_is_visible(const void *data,
1809 enum hwmon_sensor_types type,
1810 u32 attr, int channel)
1811{
1812 if (type != hwmon_temp)
1813 return 0;
1814
1815 switch (attr) {
1816 case hwmon_temp_input:
1817 return 0444;
1818 default:
1819 return 0;
1820 }
1821}
1822
1823static u32 m88e1121_hwmon_chip_config[] = {
1824 HWMON_C_REGISTER_TZ,
1825 0
1826};
1827
1828static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1829 .type = hwmon_chip,
1830 .config = m88e1121_hwmon_chip_config,
1831};
1832
1833static u32 m88e1121_hwmon_temp_config[] = {
1834 HWMON_T_INPUT,
1835 0
1836};
1837
1838static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1839 .type = hwmon_temp,
1840 .config = m88e1121_hwmon_temp_config,
1841};
1842
1843static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1844 &m88e1121_hwmon_chip,
1845 &m88e1121_hwmon_temp,
1846 NULL
1847};
1848
1849static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1850 .is_visible = m88e1121_hwmon_is_visible,
1851 .read = m88e1121_hwmon_read,
1852};
1853
1854static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1855 .ops = &m88e1121_hwmon_hwmon_ops,
1856 .info = m88e1121_hwmon_info,
1857};
1858
1859static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1860{
1861 int ret;
1862
1863 *temp = 0;
1864
Russell King424ca4c2018-01-02 10:58:48 +00001865 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1866 MII_88E1510_TEMP_SENSOR);
Andrew Lunn0b046802017-01-20 01:37:49 +01001867 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001868 return ret;
Andrew Lunn0b046802017-01-20 01:37:49 +01001869
1870 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1871
Russell King424ca4c2018-01-02 10:58:48 +00001872 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001873}
1874
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001875static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001876{
1877 int ret;
1878
1879 *temp = 0;
1880
Russell King424ca4c2018-01-02 10:58:48 +00001881 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1882 MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001883 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001884 return ret;
Andrew Lunn0b046802017-01-20 01:37:49 +01001885
1886 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1887 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1888 /* convert to mC */
1889 *temp *= 1000;
1890
Russell King424ca4c2018-01-02 10:58:48 +00001891 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001892}
1893
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001894static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001895{
Andrew Lunn0b046802017-01-20 01:37:49 +01001896 temp = temp / 1000;
1897 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
Andrew Lunn0b046802017-01-20 01:37:49 +01001898
Russell King424ca4c2018-01-02 10:58:48 +00001899 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1900 MII_88E1121_MISC_TEST,
1901 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1902 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
Andrew Lunn0b046802017-01-20 01:37:49 +01001903}
1904
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001905static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
Andrew Lunn0b046802017-01-20 01:37:49 +01001906{
1907 int ret;
1908
1909 *alarm = false;
1910
Russell King424ca4c2018-01-02 10:58:48 +00001911 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1912 MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001913 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001914 return ret;
1915
Andrew Lunn0b046802017-01-20 01:37:49 +01001916 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1917
Russell King424ca4c2018-01-02 10:58:48 +00001918 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001919}
1920
1921static int m88e1510_hwmon_read(struct device *dev,
1922 enum hwmon_sensor_types type,
1923 u32 attr, int channel, long *temp)
1924{
1925 struct phy_device *phydev = dev_get_drvdata(dev);
1926 int err;
1927
1928 switch (attr) {
1929 case hwmon_temp_input:
1930 err = m88e1510_get_temp(phydev, temp);
1931 break;
1932 case hwmon_temp_crit:
1933 err = m88e1510_get_temp_critical(phydev, temp);
1934 break;
1935 case hwmon_temp_max_alarm:
1936 err = m88e1510_get_temp_alarm(phydev, temp);
1937 break;
1938 default:
1939 return -EOPNOTSUPP;
1940 }
1941
1942 return err;
1943}
1944
1945static int m88e1510_hwmon_write(struct device *dev,
1946 enum hwmon_sensor_types type,
1947 u32 attr, int channel, long temp)
1948{
1949 struct phy_device *phydev = dev_get_drvdata(dev);
1950 int err;
1951
1952 switch (attr) {
1953 case hwmon_temp_crit:
1954 err = m88e1510_set_temp_critical(phydev, temp);
1955 break;
1956 default:
1957 return -EOPNOTSUPP;
1958 }
1959 return err;
1960}
1961
1962static umode_t m88e1510_hwmon_is_visible(const void *data,
1963 enum hwmon_sensor_types type,
1964 u32 attr, int channel)
1965{
1966 if (type != hwmon_temp)
1967 return 0;
1968
1969 switch (attr) {
1970 case hwmon_temp_input:
1971 case hwmon_temp_max_alarm:
1972 return 0444;
1973 case hwmon_temp_crit:
1974 return 0644;
1975 default:
1976 return 0;
1977 }
1978}
1979
1980static u32 m88e1510_hwmon_temp_config[] = {
1981 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1982 0
1983};
1984
1985static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1986 .type = hwmon_temp,
1987 .config = m88e1510_hwmon_temp_config,
1988};
1989
1990static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1991 &m88e1121_hwmon_chip,
1992 &m88e1510_hwmon_temp,
1993 NULL
1994};
1995
1996static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1997 .is_visible = m88e1510_hwmon_is_visible,
1998 .read = m88e1510_hwmon_read,
1999 .write = m88e1510_hwmon_write,
2000};
2001
2002static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
2003 .ops = &m88e1510_hwmon_hwmon_ops,
2004 .info = m88e1510_hwmon_info,
2005};
2006
Andrew Lunnfee2d542018-01-09 22:42:09 +01002007static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2008{
2009 int sum = 0;
2010 int oldpage;
2011 int ret = 0;
2012 int i;
2013
2014 *temp = 0;
2015
2016 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2017 if (oldpage < 0)
2018 goto error;
2019
2020 /* Enable temperature sensor */
2021 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2022 if (ret < 0)
2023 goto error;
2024
2025 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
2026 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
2027 MII_88E6390_MISC_TEST_SAMPLE_1S;
2028
2029 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2030 if (ret < 0)
2031 goto error;
2032
2033 /* Wait for temperature to stabilize */
2034 usleep_range(10000, 12000);
2035
2036 /* Reading the temperature sense has an errata. You need to read
2037 * a number of times and take an average.
2038 */
2039 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2040 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2041 if (ret < 0)
2042 goto error;
2043 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2044 }
2045
2046 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2047 *temp = (sum - 75) * 1000;
2048
2049 /* Disable temperature sensor */
2050 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2051 if (ret < 0)
2052 goto error;
2053
2054 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
2055 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
2056
2057 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2058
2059error:
2060 phy_restore_page(phydev, oldpage, ret);
2061
2062 return ret;
2063}
2064
2065static int m88e6390_hwmon_read(struct device *dev,
2066 enum hwmon_sensor_types type,
2067 u32 attr, int channel, long *temp)
2068{
2069 struct phy_device *phydev = dev_get_drvdata(dev);
2070 int err;
2071
2072 switch (attr) {
2073 case hwmon_temp_input:
2074 err = m88e6390_get_temp(phydev, temp);
2075 break;
2076 default:
2077 return -EOPNOTSUPP;
2078 }
2079
2080 return err;
2081}
2082
2083static umode_t m88e6390_hwmon_is_visible(const void *data,
2084 enum hwmon_sensor_types type,
2085 u32 attr, int channel)
2086{
2087 if (type != hwmon_temp)
2088 return 0;
2089
2090 switch (attr) {
2091 case hwmon_temp_input:
2092 return 0444;
2093 default:
2094 return 0;
2095 }
2096}
2097
2098static u32 m88e6390_hwmon_temp_config[] = {
2099 HWMON_T_INPUT,
2100 0
2101};
2102
2103static const struct hwmon_channel_info m88e6390_hwmon_temp = {
2104 .type = hwmon_temp,
2105 .config = m88e6390_hwmon_temp_config,
2106};
2107
2108static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
2109 &m88e1121_hwmon_chip,
2110 &m88e6390_hwmon_temp,
2111 NULL
2112};
2113
2114static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
2115 .is_visible = m88e6390_hwmon_is_visible,
2116 .read = m88e6390_hwmon_read,
2117};
2118
2119static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
2120 .ops = &m88e6390_hwmon_hwmon_ops,
2121 .info = m88e6390_hwmon_info,
2122};
2123
Andrew Lunn0b046802017-01-20 01:37:49 +01002124static int marvell_hwmon_name(struct phy_device *phydev)
2125{
2126 struct marvell_priv *priv = phydev->priv;
2127 struct device *dev = &phydev->mdio.dev;
2128 const char *devname = dev_name(dev);
2129 size_t len = strlen(devname);
2130 int i, j;
2131
2132 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2133 if (!priv->hwmon_name)
2134 return -ENOMEM;
2135
2136 for (i = j = 0; i < len && devname[i]; i++) {
2137 if (isalnum(devname[i]))
2138 priv->hwmon_name[j++] = devname[i];
2139 }
2140
2141 return 0;
2142}
2143
2144static int marvell_hwmon_probe(struct phy_device *phydev,
2145 const struct hwmon_chip_info *chip)
2146{
2147 struct marvell_priv *priv = phydev->priv;
2148 struct device *dev = &phydev->mdio.dev;
2149 int err;
2150
2151 err = marvell_hwmon_name(phydev);
2152 if (err)
2153 return err;
2154
2155 priv->hwmon_dev = devm_hwmon_device_register_with_info(
2156 dev, priv->hwmon_name, phydev, chip, NULL);
2157
2158 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
2159}
2160
2161static int m88e1121_hwmon_probe(struct phy_device *phydev)
2162{
2163 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
2164}
2165
2166static int m88e1510_hwmon_probe(struct phy_device *phydev)
2167{
2168 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
2169}
Andrew Lunnfee2d542018-01-09 22:42:09 +01002170
2171static int m88e6390_hwmon_probe(struct phy_device *phydev)
2172{
2173 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
2174}
Andrew Lunn0b046802017-01-20 01:37:49 +01002175#else
2176static int m88e1121_hwmon_probe(struct phy_device *phydev)
2177{
2178 return 0;
2179}
2180
2181static int m88e1510_hwmon_probe(struct phy_device *phydev)
2182{
2183 return 0;
2184}
Andrew Lunnfee2d542018-01-09 22:42:09 +01002185
2186static int m88e6390_hwmon_probe(struct phy_device *phydev)
2187{
2188 return 0;
2189}
Andrew Lunn0b046802017-01-20 01:37:49 +01002190#endif
2191
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002192static int marvell_probe(struct phy_device *phydev)
2193{
2194 struct marvell_priv *priv;
2195
Andrew Lunne5a03bf2016-01-06 20:11:16 +01002196 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002197 if (!priv)
2198 return -ENOMEM;
2199
2200 phydev->priv = priv;
2201
2202 return 0;
2203}
2204
Andrew Lunn0b046802017-01-20 01:37:49 +01002205static int m88e1121_probe(struct phy_device *phydev)
2206{
2207 int err;
2208
2209 err = marvell_probe(phydev);
2210 if (err)
2211 return err;
2212
2213 return m88e1121_hwmon_probe(phydev);
2214}
2215
2216static int m88e1510_probe(struct phy_device *phydev)
2217{
2218 int err;
2219
2220 err = marvell_probe(phydev);
2221 if (err)
2222 return err;
2223
2224 return m88e1510_hwmon_probe(phydev);
2225}
2226
Andrew Lunnfee2d542018-01-09 22:42:09 +01002227static int m88e6390_probe(struct phy_device *phydev)
2228{
2229 int err;
2230
2231 err = marvell_probe(phydev);
2232 if (err)
2233 return err;
2234
2235 return m88e6390_hwmon_probe(phydev);
2236}
2237
Olof Johanssone5479232007-07-03 16:23:46 -05002238static struct phy_driver marvell_drivers[] = {
2239 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002240 .phy_id = MARVELL_PHY_ID_88E1101,
2241 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002242 .name = "Marvell 88E1101",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002243 /* PHY_GBIT_FEATURES */
Arnd Bergmann18702412017-01-23 13:18:41 +01002244 .probe = marvell_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01002245 .config_init = &marvell_config_init,
Andrew Lunnf2899782017-05-23 17:49:13 +02002246 .config_aneg = &m88e1101_config_aneg,
Olof Johanssone5479232007-07-03 16:23:46 -05002247 .ack_interrupt = &marvell_ack_interrupt,
2248 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002249 .resume = &genphy_resume,
2250 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002251 .read_page = marvell_read_page,
2252 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002253 .get_sset_count = marvell_get_sset_count,
2254 .get_strings = marvell_get_strings,
2255 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05002256 },
2257 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002258 .phy_id = MARVELL_PHY_ID_88E1112,
2259 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johansson85cfb532007-07-03 16:24:32 -05002260 .name = "Marvell 88E1112",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002261 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002262 .probe = marvell_probe,
Olof Johansson85cfb532007-07-03 16:24:32 -05002263 .config_init = &m88e1111_config_init,
2264 .config_aneg = &marvell_config_aneg,
Olof Johansson85cfb532007-07-03 16:24:32 -05002265 .ack_interrupt = &marvell_ack_interrupt,
2266 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002267 .resume = &genphy_resume,
2268 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002269 .read_page = marvell_read_page,
2270 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002271 .get_sset_count = marvell_get_sset_count,
2272 .get_strings = marvell_get_strings,
2273 .get_stats = marvell_get_stats,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002274 .get_tunable = m88e1011_get_tunable,
2275 .set_tunable = m88e1011_set_tunable,
2276 .link_change_notify = m88e1011_link_change_notify,
Olof Johansson85cfb532007-07-03 16:24:32 -05002277 },
2278 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002279 .phy_id = MARVELL_PHY_ID_88E1111,
2280 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002281 .name = "Marvell 88E1111",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002282 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002283 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002284 .config_init = &m88e1111_config_init,
Florian Fainellid6ab9332018-09-25 11:28:46 -07002285 .config_aneg = &marvell_config_aneg,
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03002286 .read_status = &marvell_read_status,
Olof Johanssone5479232007-07-03 16:23:46 -05002287 .ack_interrupt = &marvell_ack_interrupt,
2288 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002289 .resume = &genphy_resume,
2290 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002291 .read_page = marvell_read_page,
2292 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002293 .get_sset_count = marvell_get_sset_count,
2294 .get_strings = marvell_get_strings,
2295 .get_stats = marvell_get_stats,
Heiner Kallweit5c6bc512019-10-28 20:53:25 +01002296 .get_tunable = m88e1111_get_tunable,
2297 .set_tunable = m88e1111_set_tunable,
2298 .link_change_notify = m88e1011_link_change_notify,
Olof Johanssone5479232007-07-03 16:23:46 -05002299 },
2300 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002301 .phy_id = MARVELL_PHY_ID_88E1118,
2302 .phy_id_mask = MARVELL_PHY_ID_MASK,
Ron Madrid605f1962008-11-06 09:05:26 +00002303 .name = "Marvell 88E1118",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002304 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002305 .probe = marvell_probe,
Ron Madrid605f1962008-11-06 09:05:26 +00002306 .config_init = &m88e1118_config_init,
2307 .config_aneg = &m88e1118_config_aneg,
Ron Madrid605f1962008-11-06 09:05:26 +00002308 .ack_interrupt = &marvell_ack_interrupt,
2309 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002310 .resume = &genphy_resume,
2311 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002312 .read_page = marvell_read_page,
2313 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002314 .get_sset_count = marvell_get_sset_count,
2315 .get_strings = marvell_get_strings,
2316 .get_stats = marvell_get_stats,
Ron Madrid605f1962008-11-06 09:05:26 +00002317 },
2318 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002319 .phy_id = MARVELL_PHY_ID_88E1121R,
2320 .phy_id_mask = MARVELL_PHY_ID_MASK,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002321 .name = "Marvell 88E1121R",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002322 /* PHY_GBIT_FEATURES */
Arnd Bergmann18702412017-01-23 13:18:41 +01002323 .probe = &m88e1121_probe,
Wang Dongsheng07777242018-07-01 23:15:46 -07002324 .config_init = &marvell_config_init,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002325 .config_aneg = &m88e1121_config_aneg,
2326 .read_status = &marvell_read_status,
2327 .ack_interrupt = &marvell_ack_interrupt,
2328 .config_intr = &marvell_config_intr,
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00002329 .did_interrupt = &m88e1121_did_interrupt,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002330 .resume = &genphy_resume,
2331 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002332 .read_page = marvell_read_page,
2333 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002334 .get_sset_count = marvell_get_sset_count,
2335 .get_strings = marvell_get_strings,
2336 .get_stats = marvell_get_stats,
Heiner Kallweit911af5e2019-10-28 20:52:55 +01002337 .get_tunable = m88e1011_get_tunable,
2338 .set_tunable = m88e1011_set_tunable,
2339 .link_change_notify = m88e1011_link_change_notify,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002340 },
2341 {
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002342 .phy_id = MARVELL_PHY_ID_88E1318S,
Linus Torvalds6ba74012010-08-04 11:47:58 -07002343 .phy_id_mask = MARVELL_PHY_ID_MASK,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002344 .name = "Marvell 88E1318S",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002345 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002346 .probe = marvell_probe,
Esben Haabendaldd9a1222018-04-05 22:40:29 +02002347 .config_init = &m88e1318_config_init,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002348 .config_aneg = &m88e1318_config_aneg,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002349 .read_status = &marvell_read_status,
2350 .ack_interrupt = &marvell_ack_interrupt,
2351 .config_intr = &marvell_config_intr,
2352 .did_interrupt = &m88e1121_did_interrupt,
Michael Stapelberg3871c382013-03-11 13:56:45 +00002353 .get_wol = &m88e1318_get_wol,
2354 .set_wol = &m88e1318_set_wol,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002355 .resume = &genphy_resume,
2356 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002357 .read_page = marvell_read_page,
2358 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002359 .get_sset_count = marvell_get_sset_count,
2360 .get_strings = marvell_get_strings,
2361 .get_stats = marvell_get_stats,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002362 },
2363 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002364 .phy_id = MARVELL_PHY_ID_88E1145,
2365 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002366 .name = "Marvell 88E1145",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002367 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002368 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002369 .config_init = &m88e1145_config_init,
Zhao Qiangc5058732017-12-18 10:26:43 +08002370 .config_aneg = &m88e1101_config_aneg,
Olof Johanssone5479232007-07-03 16:23:46 -05002371 .read_status = &genphy_read_status,
2372 .ack_interrupt = &marvell_ack_interrupt,
2373 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002374 .resume = &genphy_resume,
2375 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002376 .read_page = marvell_read_page,
2377 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002378 .get_sset_count = marvell_get_sset_count,
2379 .get_strings = marvell_get_strings,
2380 .get_stats = marvell_get_stats,
Heiner Kallweita319fb52019-10-29 20:25:26 +01002381 .get_tunable = m88e1111_get_tunable,
2382 .set_tunable = m88e1111_set_tunable,
2383 .link_change_notify = m88e1011_link_change_notify,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002384 },
2385 {
David Daney90600732010-11-19 11:58:53 +00002386 .phy_id = MARVELL_PHY_ID_88E1149R,
2387 .phy_id_mask = MARVELL_PHY_ID_MASK,
2388 .name = "Marvell 88E1149R",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002389 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002390 .probe = marvell_probe,
David Daney90600732010-11-19 11:58:53 +00002391 .config_init = &m88e1149_config_init,
2392 .config_aneg = &m88e1118_config_aneg,
David Daney90600732010-11-19 11:58:53 +00002393 .ack_interrupt = &marvell_ack_interrupt,
2394 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002395 .resume = &genphy_resume,
2396 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002397 .read_page = marvell_read_page,
2398 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002399 .get_sset_count = marvell_get_sset_count,
2400 .get_strings = marvell_get_strings,
2401 .get_stats = marvell_get_stats,
David Daney90600732010-11-19 11:58:53 +00002402 },
2403 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002404 .phy_id = MARVELL_PHY_ID_88E1240,
2405 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002406 .name = "Marvell 88E1240",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002407 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002408 .probe = marvell_probe,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002409 .config_init = &m88e1111_config_init,
2410 .config_aneg = &marvell_config_aneg,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002411 .ack_interrupt = &marvell_ack_interrupt,
2412 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002413 .resume = &genphy_resume,
2414 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002415 .read_page = marvell_read_page,
2416 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002417 .get_sset_count = marvell_get_sset_count,
2418 .get_strings = marvell_get_strings,
2419 .get_stats = marvell_get_stats,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002420 },
Michal Simek3da09a52013-05-30 20:08:26 +00002421 {
2422 .phy_id = MARVELL_PHY_ID_88E1116R,
2423 .phy_id_mask = MARVELL_PHY_ID_MASK,
2424 .name = "Marvell 88E1116R",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002425 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002426 .probe = marvell_probe,
Michal Simek3da09a52013-05-30 20:08:26 +00002427 .config_init = &m88e1116r_config_init,
Michal Simek3da09a52013-05-30 20:08:26 +00002428 .ack_interrupt = &marvell_ack_interrupt,
2429 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002430 .resume = &genphy_resume,
2431 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002432 .read_page = marvell_read_page,
2433 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002434 .get_sset_count = marvell_get_sset_count,
2435 .get_strings = marvell_get_strings,
2436 .get_stats = marvell_get_stats,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002437 .get_tunable = m88e1011_get_tunable,
2438 .set_tunable = m88e1011_set_tunable,
2439 .link_change_notify = m88e1011_link_change_notify,
Michal Simek3da09a52013-05-30 20:08:26 +00002440 },
Michal Simek10e24caa2013-05-30 20:08:27 +00002441 {
2442 .phy_id = MARVELL_PHY_ID_88E1510,
2443 .phy_id_mask = MARVELL_PHY_ID_MASK,
2444 .name = "Marvell 88E1510",
Andrew Lunn719655a2018-09-29 23:04:16 +02002445 .features = PHY_GBIT_FIBRE_FEATURES,
Andrew Lunn0b046802017-01-20 01:37:49 +01002446 .probe = &m88e1510_probe,
Stefan Roese930b37e2016-02-18 10:59:07 +01002447 .config_init = &m88e1510_config_init,
Michal Simek10e24caa2013-05-30 20:08:27 +00002448 .config_aneg = &m88e1510_config_aneg,
2449 .read_status = &marvell_read_status,
2450 .ack_interrupt = &marvell_ack_interrupt,
2451 .config_intr = &marvell_config_intr,
2452 .did_interrupt = &m88e1121_did_interrupt,
Jingju Houf39aac72017-01-22 18:20:56 +08002453 .get_wol = &m88e1318_get_wol,
2454 .set_wol = &m88e1318_set_wol,
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02002455 .resume = &marvell_resume,
2456 .suspend = &marvell_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002457 .read_page = marvell_read_page,
2458 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002459 .get_sset_count = marvell_get_sset_count,
2460 .get_strings = marvell_get_strings,
2461 .get_stats = marvell_get_stats,
Lin Yun Shengf0f9b4e2017-06-30 17:44:15 +08002462 .set_loopback = genphy_loopback,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002463 .get_tunable = m88e1011_get_tunable,
2464 .set_tunable = m88e1011_set_tunable,
2465 .link_change_notify = m88e1011_link_change_notify,
Michal Simek10e24caa2013-05-30 20:08:27 +00002466 },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002467 {
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002468 .phy_id = MARVELL_PHY_ID_88E1540,
2469 .phy_id_mask = MARVELL_PHY_ID_MASK,
2470 .name = "Marvell 88E1540",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002471 /* PHY_GBIT_FEATURES */
Arnd Bergmann18702412017-01-23 13:18:41 +01002472 .probe = m88e1510_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01002473 .config_init = &marvell_config_init,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002474 .config_aneg = &m88e1510_config_aneg,
2475 .read_status = &marvell_read_status,
2476 .ack_interrupt = &marvell_ack_interrupt,
2477 .config_intr = &marvell_config_intr,
2478 .did_interrupt = &m88e1121_did_interrupt,
2479 .resume = &genphy_resume,
2480 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002481 .read_page = marvell_read_page,
2482 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002483 .get_sset_count = marvell_get_sset_count,
2484 .get_strings = marvell_get_strings,
2485 .get_stats = marvell_get_stats,
Heiner Kallweit69f42be2019-03-25 19:35:41 +01002486 .get_tunable = m88e1540_get_tunable,
2487 .set_tunable = m88e1540_set_tunable,
Heiner Kallweit911af5e2019-10-28 20:52:55 +01002488 .link_change_notify = m88e1011_link_change_notify,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002489 },
2490 {
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002491 .phy_id = MARVELL_PHY_ID_88E1545,
2492 .phy_id_mask = MARVELL_PHY_ID_MASK,
2493 .name = "Marvell 88E1545",
2494 .probe = m88e1510_probe,
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002495 /* PHY_GBIT_FEATURES */
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002496 .config_init = &marvell_config_init,
2497 .config_aneg = &m88e1510_config_aneg,
2498 .read_status = &marvell_read_status,
2499 .ack_interrupt = &marvell_ack_interrupt,
2500 .config_intr = &marvell_config_intr,
2501 .did_interrupt = &m88e1121_did_interrupt,
2502 .resume = &genphy_resume,
2503 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002504 .read_page = marvell_read_page,
2505 .write_page = marvell_write_page,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002506 .get_sset_count = marvell_get_sset_count,
2507 .get_strings = marvell_get_strings,
2508 .get_stats = marvell_get_stats,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002509 .get_tunable = m88e1540_get_tunable,
2510 .set_tunable = m88e1540_set_tunable,
2511 .link_change_notify = m88e1011_link_change_notify,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002512 },
2513 {
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002514 .phy_id = MARVELL_PHY_ID_88E3016,
2515 .phy_id_mask = MARVELL_PHY_ID_MASK,
2516 .name = "Marvell 88E3016",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002517 /* PHY_BASIC_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002518 .probe = marvell_probe,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002519 .config_init = &m88e3016_config_init,
2520 .aneg_done = &marvell_aneg_done,
2521 .read_status = &marvell_read_status,
2522 .ack_interrupt = &marvell_ack_interrupt,
2523 .config_intr = &marvell_config_intr,
2524 .did_interrupt = &m88e1121_did_interrupt,
2525 .resume = &genphy_resume,
2526 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002527 .read_page = marvell_read_page,
2528 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002529 .get_sset_count = marvell_get_sset_count,
2530 .get_strings = marvell_get_strings,
2531 .get_stats = marvell_get_stats,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002532 },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002533 {
2534 .phy_id = MARVELL_PHY_ID_88E6390,
2535 .phy_id_mask = MARVELL_PHY_ID_MASK,
2536 .name = "Marvell 88E6390",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002537 /* PHY_GBIT_FEATURES */
Andrew Lunnfee2d542018-01-09 22:42:09 +01002538 .probe = m88e6390_probe,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002539 .config_init = &marvell_config_init,
Andrew Lunn8cbcdc12019-01-10 22:48:36 +01002540 .config_aneg = &m88e6390_config_aneg,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002541 .read_status = &marvell_read_status,
2542 .ack_interrupt = &marvell_ack_interrupt,
2543 .config_intr = &marvell_config_intr,
2544 .did_interrupt = &m88e1121_did_interrupt,
2545 .resume = &genphy_resume,
2546 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002547 .read_page = marvell_read_page,
2548 .write_page = marvell_write_page,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002549 .get_sset_count = marvell_get_sset_count,
2550 .get_strings = marvell_get_strings,
2551 .get_stats = marvell_get_stats,
Heiner Kallweit69f42be2019-03-25 19:35:41 +01002552 .get_tunable = m88e1540_get_tunable,
2553 .set_tunable = m88e1540_set_tunable,
Heiner Kallweit911af5e2019-10-28 20:52:55 +01002554 .link_change_notify = m88e1011_link_change_notify,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002555 },
Andy Fleming00db8182005-07-30 19:31:23 -04002556};
2557
Johan Hovold50fd7152014-11-11 19:45:59 +01002558module_phy_driver(marvell_drivers);
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002559
Uwe Kleine-Königcf93c942010-10-03 23:43:32 +00002560static struct mdio_device_id __maybe_unused marvell_tbl[] = {
Michal Simekf5e1cab2013-05-30 20:08:25 +00002561 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2562 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2563 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2564 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2565 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2566 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2567 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2568 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2569 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
Michal Simek3da09a52013-05-30 20:08:26 +00002570 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
Michal Simek10e24caa2013-05-30 20:08:27 +00002571 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002572 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002573 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002574 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002575 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002576 { }
2577};
2578
2579MODULE_DEVICE_TABLE(mdio, marvell_tbl);