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Andrew Lunna2443fd2019-01-21 19:05:50 +01001// SPDX-License-Identifier: GPL-2.0+
Andy Fleming00db8182005-07-30 19:31:23 -04002/*
3 * drivers/net/phy/marvell.c
4 *
5 * Driver for Marvell PHYs
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 *
Michael Stapelberg3871c382013-03-11 13:56:45 +000011 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
Andy Fleming00db8182005-07-30 19:31:23 -040012 */
Andy Fleming00db8182005-07-30 19:31:23 -040013#include <linux/kernel.h>
Andy Fleming00db8182005-07-30 19:31:23 -040014#include <linux/string.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010015#include <linux/ctype.h>
Andy Fleming00db8182005-07-30 19:31:23 -040016#include <linux/errno.h>
17#include <linux/unistd.h>
Andrew Lunn0b046802017-01-20 01:37:49 +010018#include <linux/hwmon.h>
Andy Fleming00db8182005-07-30 19:31:23 -040019#include <linux/interrupt.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/netdevice.h>
23#include <linux/etherdevice.h>
24#include <linux/skbuff.h>
25#include <linux/spinlock.h>
26#include <linux/mm.h>
27#include <linux/module.h>
Andy Fleming00db8182005-07-30 19:31:23 -040028#include <linux/mii.h>
29#include <linux/ethtool.h>
30#include <linux/phy.h>
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +100031#include <linux/marvell_phy.h>
Heiner Kallweit69f42be2019-03-25 19:35:41 +010032#include <linux/bitfield.h>
David Daneycf41a512010-11-19 12:13:18 +000033#include <linux/of.h>
Andy Fleming00db8182005-07-30 19:31:23 -040034
Avinash Kumareea3b202013-09-30 09:36:44 +053035#include <linux/io.h>
Andy Fleming00db8182005-07-30 19:31:23 -040036#include <asm/irq.h>
Avinash Kumareea3b202013-09-30 09:36:44 +053037#include <linux/uaccess.h>
Andy Fleming00db8182005-07-30 19:31:23 -040038
David Daney27d916d2010-11-19 11:58:52 +000039#define MII_MARVELL_PHY_PAGE 22
Andrew Lunn52295662017-05-25 21:42:08 +020040#define MII_MARVELL_COPPER_PAGE 0x00
41#define MII_MARVELL_FIBER_PAGE 0x01
42#define MII_MARVELL_MSCR_PAGE 0x02
43#define MII_MARVELL_LED_PAGE 0x03
44#define MII_MARVELL_MISC_TEST_PAGE 0x06
45#define MII_MARVELL_WOL_PAGE 0x11
David Daney27d916d2010-11-19 11:58:52 +000046
Andy Fleming00db8182005-07-30 19:31:23 -040047#define MII_M1011_IEVENT 0x13
48#define MII_M1011_IEVENT_CLEAR 0x0000
49
50#define MII_M1011_IMASK 0x12
51#define MII_M1011_IMASK_INIT 0x6400
52#define MII_M1011_IMASK_CLEAR 0x0000
53
Andrew Lunnfecd5e92017-07-30 22:41:49 +020054#define MII_M1011_PHY_SCR 0x10
55#define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
Heiner Kallweitf8d975b2019-10-28 20:52:22 +010056#define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +020057#define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
Andrew Lunnfecd5e92017-07-30 22:41:49 +020058#define MII_M1011_PHY_SCR_MDI (0x0 << 5)
59#define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
60#define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
Andy Fleming76884672007-02-09 18:13:58 -060061
Heiner Kallweita3bdfce2019-10-19 15:57:33 +020062#define MII_M1011_PHY_SSR 0x11
63#define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
64
Andy Fleming76884672007-02-09 18:13:58 -060065#define MII_M1111_PHY_LED_CONTROL 0x18
66#define MII_M1111_PHY_LED_DIRECT 0x4100
67#define MII_M1111_PHY_LED_COMBINE 0x411c
Kim Phillips895ee682007-06-05 18:46:47 +080068#define MII_M1111_PHY_EXT_CR 0x14
Heiner Kallweit5c6bc512019-10-28 20:53:25 +010069#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
70#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
71#define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
Andrew Lunn61111592017-07-30 22:41:46 +020072#define MII_M1111_RGMII_RX_DELAY BIT(7)
73#define MII_M1111_RGMII_TX_DELAY BIT(1)
Kim Phillips895ee682007-06-05 18:46:47 +080074#define MII_M1111_PHY_EXT_SR 0x1b
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030075
76#define MII_M1111_HWCFG_MODE_MASK 0xf
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030077#define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
Kapil Juneja4117b5b2007-05-11 18:25:18 -050078#define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
Andrew Lunn865b813a2017-07-30 22:41:47 +020079#define MII_M1111_HWCFG_MODE_RTBI 0x7
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +000080#define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
Andrew Lunn865b813a2017-07-30 22:41:47 +020081#define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
82#define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
83#define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +030084
Cyril Chemparathyc477d042010-08-02 09:44:53 +000085#define MII_88E1121_PHY_MSCR_REG 21
86#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
87#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
Russell King424ca4c2018-01-02 10:58:48 +000088#define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
Cyril Chemparathyc477d042010-08-02 09:44:53 +000089
Andrew Lunn0b046802017-01-20 01:37:49 +010090#define MII_88E1121_MISC_TEST 0x1a
91#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
92#define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
93#define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
94#define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
95#define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
96#define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
97
98#define MII_88E1510_TEMP_SENSOR 0x1b
99#define MII_88E1510_TEMP_SENSOR_MASK 0xff
100
Heiner Kallweit69f42be2019-03-25 19:35:41 +0100101#define MII_88E1540_COPPER_CTRL3 0x1a
102#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
103#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
104#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
105#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
106#define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
107#define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
108
Andrew Lunnfee2d542018-01-09 22:42:09 +0100109#define MII_88E6390_MISC_TEST 0x1b
110#define MII_88E6390_MISC_TEST_SAMPLE_1S 0
111#define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
112#define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
113#define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
114#define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
115
116#define MII_88E6390_TEMP_SENSOR 0x1c
117#define MII_88E6390_TEMP_SENSOR_MASK 0xff
118#define MII_88E6390_TEMP_SENSOR_SAMPLES 10
119
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700120#define MII_88E1318S_PHY_MSCR1_REG 16
121#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700122
Michael Stapelberg3871c382013-03-11 13:56:45 +0000123/* Copper Specific Interrupt Enable Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200124#define MII_88E1318S_PHY_CSIER 0x12
Michael Stapelberg3871c382013-03-11 13:56:45 +0000125/* WOL Event Interrupt Enable */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200126#define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000127
128/* LED Timer Control Register */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200129#define MII_88E1318S_PHY_LED_TCR 0x12
130#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
131#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
132#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000133
134/* Magic Packet MAC address registers */
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200135#define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
136#define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
137#define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
Michael Stapelberg3871c382013-03-11 13:56:45 +0000138
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200139#define MII_88E1318S_PHY_WOL_CTRL 0x10
140#define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
141#define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
Michael Stapelberg3871c382013-03-11 13:56:45 +0000142
Wang Dongsheng07777242018-07-01 23:15:46 -0700143#define MII_PHY_LED_CTRL 16
Sergei Poselenov140bc922009-04-07 02:01:41 +0000144#define MII_88E1121_PHY_LED_DEF 0x0030
Wang Dongsheng07777242018-07-01 23:15:46 -0700145#define MII_88E1510_PHY_LED_DEF 0x1177
Jian Shena93f7fe2019-04-22 21:52:23 +0800146#define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
Sergei Poselenov140bc922009-04-07 02:01:41 +0000147
Alexandr Smirnovbe937f12008-03-19 00:37:24 +0300148#define MII_M1011_PHY_STATUS 0x11
149#define MII_M1011_PHY_STATUS_1000 0x8000
150#define MII_M1011_PHY_STATUS_100 0x4000
151#define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
152#define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
153#define MII_M1011_PHY_STATUS_RESOLVED 0x0800
154#define MII_M1011_PHY_STATUS_LINK 0x0400
155
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200156#define MII_88E3016_PHY_SPEC_CTRL 0x10
157#define MII_88E3016_DISABLE_SCRAMBLER 0x0200
158#define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
Andy Fleming76884672007-02-09 18:13:58 -0600159
Stefan Roese930b37e2016-02-18 10:59:07 +0100160#define MII_88E1510_GEN_CTRL_REG_1 0x14
161#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
162#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
163#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
164
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200165#define LPA_PAUSE_FIBER 0x180
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200166#define LPA_PAUSE_ASYM_FIBER 0x100
167
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200168#define NB_FIBER_STATS 1
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +0200169
Andy Fleming00db8182005-07-30 19:31:23 -0400170MODULE_DESCRIPTION("Marvell PHY driver");
171MODULE_AUTHOR("Andy Fleming");
172MODULE_LICENSE("GPL");
173
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100174struct marvell_hw_stat {
175 const char *string;
176 u8 page;
177 u8 reg;
178 u8 bits;
179};
180
181static struct marvell_hw_stat marvell_hw_stats[] = {
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200182 { "phy_receive_errors_copper", 0, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100183 { "phy_idle_errors", 0, 10, 8 },
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +0200184 { "phy_receive_errors_fiber", 1, 21, 16},
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100185};
186
187struct marvell_priv {
188 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
Andrew Lunn0b046802017-01-20 01:37:49 +0100189 char *hwmon_name;
190 struct device *hwmon_dev;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +0100191};
192
Russell King424ca4c2018-01-02 10:58:48 +0000193static int marvell_read_page(struct phy_device *phydev)
Andrew Lunn6427bb22017-05-17 03:26:03 +0200194{
Russell King424ca4c2018-01-02 10:58:48 +0000195 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
196}
197
198static int marvell_write_page(struct phy_device *phydev, int page)
199{
200 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
Andrew Lunn6427bb22017-05-17 03:26:03 +0200201}
202
203static int marvell_set_page(struct phy_device *phydev, int page)
204{
205 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
206}
207
Andy Fleming00db8182005-07-30 19:31:23 -0400208static int marvell_ack_interrupt(struct phy_device *phydev)
209{
210 int err;
211
212 /* Clear the interrupts by reading the reg */
213 err = phy_read(phydev, MII_M1011_IEVENT);
214
215 if (err < 0)
216 return err;
217
218 return 0;
219}
220
221static int marvell_config_intr(struct phy_device *phydev)
222{
223 int err;
224
Andy Fleming76884672007-02-09 18:13:58 -0600225 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
Andrew Lunn23beb382017-05-17 03:26:04 +0200226 err = phy_write(phydev, MII_M1011_IMASK,
227 MII_M1011_IMASK_INIT);
Andy Fleming00db8182005-07-30 19:31:23 -0400228 else
Andrew Lunn23beb382017-05-17 03:26:04 +0200229 err = phy_write(phydev, MII_M1011_IMASK,
230 MII_M1011_IMASK_CLEAR);
Andy Fleming00db8182005-07-30 19:31:23 -0400231
232 return err;
233}
234
David Thomson239aa552015-07-10 16:28:25 +1200235static int marvell_set_polarity(struct phy_device *phydev, int polarity)
236{
237 int reg;
238 int err;
239 int val;
240
241 /* get the current settings */
242 reg = phy_read(phydev, MII_M1011_PHY_SCR);
243 if (reg < 0)
244 return reg;
245
246 val = reg;
247 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
248 switch (polarity) {
249 case ETH_TP_MDI:
250 val |= MII_M1011_PHY_SCR_MDI;
251 break;
252 case ETH_TP_MDI_X:
253 val |= MII_M1011_PHY_SCR_MDI_X;
254 break;
255 case ETH_TP_MDI_AUTO:
256 case ETH_TP_MDI_INVALID:
257 default:
258 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
259 break;
260 }
261
262 if (val != reg) {
263 /* Set the new polarity value in the register */
264 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
265 if (err)
266 return err;
267 }
268
Florian Fainellid6ab9332018-09-25 11:28:46 -0700269 return val != reg;
David Thomson239aa552015-07-10 16:28:25 +1200270}
271
Andy Fleming00db8182005-07-30 19:31:23 -0400272static int marvell_config_aneg(struct phy_device *phydev)
273{
Florian Fainellid6ab9332018-09-25 11:28:46 -0700274 int changed = 0;
Andy Fleming00db8182005-07-30 19:31:23 -0400275 int err;
276
Raju Lakkaraju4e26c5c2016-11-29 15:16:49 +0530277 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Andy Fleming76884672007-02-09 18:13:58 -0600278 if (err < 0)
279 return err;
280
Florian Fainellid6ab9332018-09-25 11:28:46 -0700281 changed = err;
282
Andy Fleming76884672007-02-09 18:13:58 -0600283 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
284 MII_M1111_PHY_LED_DIRECT);
285 if (err < 0)
286 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400287
288 err = genphy_config_aneg(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000289 if (err < 0)
290 return err;
Andy Fleming00db8182005-07-30 19:31:23 -0400291
Florian Fainellid6ab9332018-09-25 11:28:46 -0700292 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200293 /* A write to speed/duplex bits (that is performed by
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000294 * genphy_config_aneg() call above) must be followed by
295 * a software reset. Otherwise, the write has no effect.
296 */
Andrew Lunn34386342017-07-30 22:41:45 +0200297 err = genphy_soft_reset(phydev);
Anton Vorontsov8ff44982009-09-09 16:01:30 +0000298 if (err < 0)
299 return err;
300 }
301
302 return 0;
Andy Fleming00db8182005-07-30 19:31:23 -0400303}
304
Andrew Lunnf2899782017-05-23 17:49:13 +0200305static int m88e1101_config_aneg(struct phy_device *phydev)
306{
307 int err;
308
309 /* This Marvell PHY has an errata which requires
310 * that certain registers get written in order
311 * to restart autonegotiation
312 */
Andrew Lunn34386342017-07-30 22:41:45 +0200313 err = genphy_soft_reset(phydev);
Andrew Lunnf2899782017-05-23 17:49:13 +0200314 if (err < 0)
315 return err;
316
317 err = phy_write(phydev, 0x1d, 0x1f);
318 if (err < 0)
319 return err;
320
321 err = phy_write(phydev, 0x1e, 0x200c);
322 if (err < 0)
323 return err;
324
325 err = phy_write(phydev, 0x1d, 0x5);
326 if (err < 0)
327 return err;
328
329 err = phy_write(phydev, 0x1e, 0);
330 if (err < 0)
331 return err;
332
333 err = phy_write(phydev, 0x1e, 0x100);
334 if (err < 0)
335 return err;
336
337 return marvell_config_aneg(phydev);
338}
339
David Daneycf41a512010-11-19 12:13:18 +0000340#ifdef CONFIG_OF_MDIO
Andrew Lunn0c3439b2017-05-17 03:25:59 +0200341/* Set and/or override some configuration registers based on the
David Daneycf41a512010-11-19 12:13:18 +0000342 * marvell,reg-init property stored in the of_node for the phydev.
343 *
344 * marvell,reg-init = <reg-page reg mask value>,...;
345 *
346 * There may be one or more sets of <reg-page reg mask value>:
347 *
348 * reg-page: which register bank to use.
349 * reg: the register.
350 * mask: if non-zero, ANDed with existing register value.
351 * value: ORed with the masked value and written to the regiser.
352 *
353 */
354static int marvell_of_reg_init(struct phy_device *phydev)
355{
356 const __be32 *paddr;
Russell King424ca4c2018-01-02 10:58:48 +0000357 int len, i, saved_page, current_page, ret = 0;
David Daneycf41a512010-11-19 12:13:18 +0000358
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100359 if (!phydev->mdio.dev.of_node)
David Daneycf41a512010-11-19 12:13:18 +0000360 return 0;
361
Andrew Lunne5a03bf2016-01-06 20:11:16 +0100362 paddr = of_get_property(phydev->mdio.dev.of_node,
363 "marvell,reg-init", &len);
David Daneycf41a512010-11-19 12:13:18 +0000364 if (!paddr || len < (4 * sizeof(*paddr)))
365 return 0;
366
Russell King424ca4c2018-01-02 10:58:48 +0000367 saved_page = phy_save_page(phydev);
David Daneycf41a512010-11-19 12:13:18 +0000368 if (saved_page < 0)
Russell King424ca4c2018-01-02 10:58:48 +0000369 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000370 current_page = saved_page;
371
David Daneycf41a512010-11-19 12:13:18 +0000372 len /= sizeof(*paddr);
373 for (i = 0; i < len - 3; i += 4) {
Andrew Lunn6427bb22017-05-17 03:26:03 +0200374 u16 page = be32_to_cpup(paddr + i);
David Daneycf41a512010-11-19 12:13:18 +0000375 u16 reg = be32_to_cpup(paddr + i + 1);
376 u16 mask = be32_to_cpup(paddr + i + 2);
377 u16 val_bits = be32_to_cpup(paddr + i + 3);
378 int val;
379
Andrew Lunn6427bb22017-05-17 03:26:03 +0200380 if (page != current_page) {
381 current_page = page;
Russell King424ca4c2018-01-02 10:58:48 +0000382 ret = marvell_write_page(phydev, page);
David Daneycf41a512010-11-19 12:13:18 +0000383 if (ret < 0)
384 goto err;
385 }
386
387 val = 0;
388 if (mask) {
Russell King424ca4c2018-01-02 10:58:48 +0000389 val = __phy_read(phydev, reg);
David Daneycf41a512010-11-19 12:13:18 +0000390 if (val < 0) {
391 ret = val;
392 goto err;
393 }
394 val &= mask;
395 }
396 val |= val_bits;
397
Russell King424ca4c2018-01-02 10:58:48 +0000398 ret = __phy_write(phydev, reg, val);
David Daneycf41a512010-11-19 12:13:18 +0000399 if (ret < 0)
400 goto err;
David Daneycf41a512010-11-19 12:13:18 +0000401 }
402err:
Russell King424ca4c2018-01-02 10:58:48 +0000403 return phy_restore_page(phydev, saved_page, ret);
David Daneycf41a512010-11-19 12:13:18 +0000404}
405#else
406static int marvell_of_reg_init(struct phy_device *phydev)
407{
408 return 0;
409}
410#endif /* CONFIG_OF_MDIO */
411
Andrew Lunn864dc722017-07-30 22:41:48 +0200412static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
Sergei Poselenov140bc922009-04-07 02:01:41 +0000413{
Russell King424ca4c2018-01-02 10:58:48 +0000414 int mscr;
Andrew Lunn864dc722017-07-30 22:41:48 +0200415
416 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
Russell King424ca4c2018-01-02 10:58:48 +0000417 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
418 MII_88E1121_PHY_MSCR_TX_DELAY;
Andrew Lunn864dc722017-07-30 22:41:48 +0200419 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
Russell King424ca4c2018-01-02 10:58:48 +0000420 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
Andrew Lunn864dc722017-07-30 22:41:48 +0200421 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
Russell King424ca4c2018-01-02 10:58:48 +0000422 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
423 else
424 mscr = 0;
Andrew Lunn864dc722017-07-30 22:41:48 +0200425
Russell King424ca4c2018-01-02 10:58:48 +0000426 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
427 MII_88E1121_PHY_MSCR_REG,
428 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
Andrew Lunn864dc722017-07-30 22:41:48 +0200429}
430
431static int m88e1121_config_aneg(struct phy_device *phydev)
432{
Florian Fainellid6ab9332018-09-25 11:28:46 -0700433 int changed = 0;
Andrew Lunn864dc722017-07-30 22:41:48 +0200434 int err = 0;
435
436 if (phy_interface_is_rgmii(phydev)) {
437 err = m88e1121_config_aneg_rgmii_delays(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000438 if (err < 0)
Andrew Lunn864dc722017-07-30 22:41:48 +0200439 return err;
440 }
441
Andrew Lunnfecd5e92017-07-30 22:41:49 +0200442 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Sergei Poselenov140bc922009-04-07 02:01:41 +0000443 if (err < 0)
444 return err;
445
Florian Fainellid6ab9332018-09-25 11:28:46 -0700446 changed = err;
447
448 err = genphy_config_aneg(phydev);
449 if (err < 0)
450 return err;
451
David S. Miller4b1bd692018-09-25 22:41:31 -0700452 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
Florian Fainellid6ab9332018-09-25 11:28:46 -0700453 /* A software reset is used to ensure a "commit" of the
454 * changes is done.
455 */
456 err = genphy_soft_reset(phydev);
457 if (err < 0)
458 return err;
459 }
460
461 return 0;
Sergei Poselenov140bc922009-04-07 02:01:41 +0000462}
463
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -0700464static int m88e1318_config_aneg(struct phy_device *phydev)
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700465{
Russell King424ca4c2018-01-02 10:58:48 +0000466 int err;
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700467
Russell King424ca4c2018-01-02 10:58:48 +0000468 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
469 MII_88E1318S_PHY_MSCR1_REG,
470 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -0700471 if (err < 0)
472 return err;
473
474 return m88e1121_config_aneg(phydev);
475}
476
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200477/**
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100478 * linkmode_adv_to_fiber_adv_t
479 * @advertise: the linkmode advertisement settings
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200480 *
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100481 * A small helper function that translates linkmode advertisement
482 * settings to phy autonegotiation advertisements for the MII_ADV
483 * register for fiber link.
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200484 */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100485static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200486{
487 u32 result = 0;
488
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100489 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
Russell King20ecf422019-12-17 13:39:42 +0000490 result |= ADVERTISE_1000XHALF;
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100491 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
Russell King20ecf422019-12-17 13:39:42 +0000492 result |= ADVERTISE_1000XFULL;
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200493
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100494 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
495 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
Russell King20ecf422019-12-17 13:39:42 +0000496 result |= ADVERTISE_1000XPSE_ASYM;
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100497 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
Russell King20ecf422019-12-17 13:39:42 +0000498 result |= ADVERTISE_1000XPAUSE;
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200499
500 return result;
501}
502
503/**
504 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
505 * @phydev: target phy_device struct
506 *
507 * Description: If auto-negotiation is enabled, we configure the
508 * advertising, and then restart auto-negotiation. If it is not
509 * enabled, then we write the BMCR. Adapted for fiber link in
510 * some Marvell's devices.
511 */
512static int marvell_config_aneg_fiber(struct phy_device *phydev)
513{
514 int changed = 0;
515 int err;
516 int adv, oldadv;
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200517
518 if (phydev->autoneg != AUTONEG_ENABLE)
519 return genphy_setup_forced(phydev);
520
521 /* Only allow advertising what this PHY supports */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100522 linkmode_and(phydev->advertising, phydev->advertising,
523 phydev->supported);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200524
525 /* Setup fiber advertisement */
526 adv = phy_read(phydev, MII_ADVERTISE);
527 if (adv < 0)
528 return adv;
529
530 oldadv = adv;
Russell King20ecf422019-12-17 13:39:42 +0000531 adv &= ~(ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
532 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM);
Andrew Lunn3c1bcc82018-11-10 23:43:33 +0100533 adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200534
535 if (adv != oldadv) {
536 err = phy_write(phydev, MII_ADVERTISE, adv);
537 if (err < 0)
538 return err;
539
540 changed = 1;
541 }
542
543 if (changed == 0) {
544 /* Advertisement hasn't changed, but maybe aneg was never on to
Andrew Lunn8cf8b872017-07-30 22:41:44 +0200545 * begin with? Or maybe phy was isolated?
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200546 */
547 int ctl = phy_read(phydev, MII_BMCR);
548
549 if (ctl < 0)
550 return ctl;
551
552 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
553 changed = 1; /* do restart aneg */
554 }
555
556 /* Only restart aneg if we are advertising something different
557 * than we were before.
558 */
559 if (changed > 0)
560 changed = genphy_restart_aneg(phydev);
561
562 return changed;
563}
564
Michal Simek10e24caa2013-05-30 20:08:27 +0000565static int m88e1510_config_aneg(struct phy_device *phydev)
566{
567 int err;
568
Andrew Lunn52295662017-05-25 21:42:08 +0200569 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200570 if (err < 0)
571 goto error;
572
573 /* Configure the copper link first */
Michal Simek10e24caa2013-05-30 20:08:27 +0000574 err = m88e1318_config_aneg(phydev);
575 if (err < 0)
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200576 goto error;
Michal Simek10e24caa2013-05-30 20:08:27 +0000577
Russell Kingde9c4e02017-12-13 09:22:03 +0000578 /* Do not touch the fiber page if we're in copper->sgmii mode */
579 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
580 return 0;
581
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200582 /* Then the fiber link */
Andrew Lunn52295662017-05-25 21:42:08 +0200583 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200584 if (err < 0)
585 goto error;
586
587 err = marvell_config_aneg_fiber(phydev);
588 if (err < 0)
589 goto error;
590
Andrew Lunn52295662017-05-25 21:42:08 +0200591 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200592
593error:
Andrew Lunn52295662017-05-25 21:42:08 +0200594 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret78301eb2016-07-19 11:13:12 +0200595 return err;
Clemens Gruber79be1a12016-02-15 23:46:45 +0100596}
597
Wang Dongsheng07777242018-07-01 23:15:46 -0700598static void marvell_config_led(struct phy_device *phydev)
599{
600 u16 def_config;
601 int err;
602
603 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
604 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
605 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
606 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
607 def_config = MII_88E1121_PHY_LED_DEF;
608 break;
609 /* Default PHY LED config:
610 * LED[0] .. 1000Mbps Link
611 * LED[1] .. 100Mbps Link
612 * LED[2] .. Blink, Activity
613 */
614 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
Jian Shena93f7fe2019-04-22 21:52:23 +0800615 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
616 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
617 else
618 def_config = MII_88E1510_PHY_LED_DEF;
Wang Dongsheng07777242018-07-01 23:15:46 -0700619 break;
620 default:
621 return;
622 }
623
624 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
625 def_config);
626 if (err < 0)
Andrew Lunnab2a6052018-09-29 23:04:10 +0200627 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
Wang Dongsheng07777242018-07-01 23:15:46 -0700628}
629
Clemens Gruber79be1a12016-02-15 23:46:45 +0100630static int marvell_config_init(struct phy_device *phydev)
631{
Wang Dongsheng07777242018-07-01 23:15:46 -0700632 /* Set defalut LED */
633 marvell_config_led(phydev);
634
Clemens Gruber79be1a12016-02-15 23:46:45 +0100635 /* Set registers from marvell,reg-init DT property */
Michal Simek10e24caa2013-05-30 20:08:27 +0000636 return marvell_of_reg_init(phydev);
637}
638
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200639static int m88e3016_config_init(struct phy_device *phydev)
640{
Russell Kingfea23fb2018-01-02 10:58:58 +0000641 int ret;
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200642
643 /* Enable Scrambler and Auto-Crossover */
Russell Kingfea23fb2018-01-02 10:58:58 +0000644 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
Russell Kingf1028522018-01-05 16:07:10 +0000645 MII_88E3016_DISABLE_SCRAMBLER,
Russell Kingfea23fb2018-01-02 10:58:58 +0000646 MII_88E3016_AUTO_MDIX_CROSSOVER);
647 if (ret < 0)
648 return ret;
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200649
Clemens Gruber79be1a12016-02-15 23:46:45 +0100650 return marvell_config_init(phydev);
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +0200651}
652
Andrew Lunn865b813a2017-07-30 22:41:47 +0200653static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
654 u16 mode,
655 int fibre_copper_auto)
656{
Andrew Lunn865b813a2017-07-30 22:41:47 +0200657 if (fibre_copper_auto)
Russell Kingfea23fb2018-01-02 10:58:58 +0000658 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
Andrew Lunn865b813a2017-07-30 22:41:47 +0200659
Russell Kingfea23fb2018-01-02 10:58:58 +0000660 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
Russell Kingf1028522018-01-05 16:07:10 +0000661 MII_M1111_HWCFG_MODE_MASK |
662 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
663 MII_M1111_HWCFG_FIBER_COPPER_RES,
Russell Kingfea23fb2018-01-02 10:58:58 +0000664 mode);
Andrew Lunn865b813a2017-07-30 22:41:47 +0200665}
666
Andrew Lunn61111592017-07-30 22:41:46 +0200667static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
Kim Phillips895ee682007-06-05 18:46:47 +0800668{
Russell Kingfea23fb2018-01-02 10:58:58 +0000669 int delay;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200670
671 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Russell Kingfea23fb2018-01-02 10:58:58 +0000672 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200673 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
Russell Kingfea23fb2018-01-02 10:58:58 +0000674 delay = MII_M1111_RGMII_RX_DELAY;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200675 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
Russell Kingfea23fb2018-01-02 10:58:58 +0000676 delay = MII_M1111_RGMII_TX_DELAY;
677 } else {
678 delay = 0;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200679 }
680
Russell Kingfea23fb2018-01-02 10:58:58 +0000681 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
Russell Kingf1028522018-01-05 16:07:10 +0000682 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
Russell Kingfea23fb2018-01-02 10:58:58 +0000683 delay);
Andrew Lunn61111592017-07-30 22:41:46 +0200684}
685
686static int m88e1111_config_init_rgmii(struct phy_device *phydev)
687{
688 int temp;
689 int err;
690
691 err = m88e1111_config_init_rgmii_delays(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200692 if (err < 0)
693 return err;
694
695 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
696 if (temp < 0)
697 return temp;
698
699 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
700
701 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
702 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
703 else
704 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
705
706 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
707}
708
709static int m88e1111_config_init_sgmii(struct phy_device *phydev)
710{
711 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200712
Andrew Lunn865b813a2017-07-30 22:41:47 +0200713 err = m88e1111_config_init_hwcfg_mode(
714 phydev,
715 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
716 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200717 if (err < 0)
718 return err;
719
720 /* make sure copper is selected */
Andrew Lunn52295662017-05-25 21:42:08 +0200721 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200722}
723
724static int m88e1111_config_init_rtbi(struct phy_device *phydev)
725{
Andrew Lunn61111592017-07-30 22:41:46 +0200726 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200727
Andrew Lunn61111592017-07-30 22:41:46 +0200728 err = m88e1111_config_init_rgmii_delays(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000729 if (err < 0)
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200730 return err;
731
Andrew Lunn865b813a2017-07-30 22:41:47 +0200732 err = m88e1111_config_init_hwcfg_mode(
733 phydev,
734 MII_M1111_HWCFG_MODE_RTBI,
735 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200736 if (err < 0)
737 return err;
738
739 /* soft reset */
Andrew Lunn34386342017-07-30 22:41:45 +0200740 err = genphy_soft_reset(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200741 if (err < 0)
742 return err;
743
Andrew Lunn865b813a2017-07-30 22:41:47 +0200744 return m88e1111_config_init_hwcfg_mode(
745 phydev,
746 MII_M1111_HWCFG_MODE_RTBI,
747 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200748}
749
750static int m88e1111_config_init(struct phy_device *phydev)
751{
752 int err;
753
Florian Fainelli32a64162015-05-26 12:19:59 -0700754 if (phy_interface_is_rgmii(phydev)) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200755 err = m88e1111_config_init_rgmii(phydev);
Russell Kingfea23fb2018-01-02 10:58:58 +0000756 if (err < 0)
Kim Phillips895ee682007-06-05 18:46:47 +0800757 return err;
758 }
759
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500760 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200761 err = m88e1111_config_init_sgmii(phydev);
Madalin Bucur07151bc2015-08-07 17:07:50 +0800762 if (err < 0)
763 return err;
Kapil Juneja4117b5b2007-05-11 18:25:18 -0500764 }
765
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000766 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +0200767 err = m88e1111_config_init_rtbi(phydev);
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000768 if (err < 0)
769 return err;
770 }
771
David Daneycf41a512010-11-19 12:13:18 +0000772 err = marvell_of_reg_init(phydev);
773 if (err < 0)
774 return err;
Liu Yu-B132015f8cbc12010-01-13 22:13:19 +0000775
Andrew Lunn34386342017-07-30 22:41:45 +0200776 return genphy_soft_reset(phydev);
Kim Phillips895ee682007-06-05 18:46:47 +0800777}
778
Heiner Kallweit5c6bc512019-10-28 20:53:25 +0100779static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
780{
781 int val, cnt, enable;
782
783 val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
784 if (val < 0)
785 return val;
786
787 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
788 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
789
790 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
791
792 return 0;
793}
794
795static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
796{
797 int val;
798
799 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
800 return -E2BIG;
801
802 if (!cnt)
803 return phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
804 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
805
806 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
807 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
808
809 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
810 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
811 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
812 val);
813}
814
815static int m88e1111_get_tunable(struct phy_device *phydev,
816 struct ethtool_tunable *tuna, void *data)
817{
818 switch (tuna->id) {
819 case ETHTOOL_PHY_DOWNSHIFT:
820 return m88e1111_get_downshift(phydev, data);
821 default:
822 return -EOPNOTSUPP;
823 }
824}
825
826static int m88e1111_set_tunable(struct phy_device *phydev,
827 struct ethtool_tunable *tuna, const void *data)
828{
829 switch (tuna->id) {
830 case ETHTOOL_PHY_DOWNSHIFT:
831 return m88e1111_set_downshift(phydev, *(const u8 *)data);
832 default:
833 return -EOPNOTSUPP;
834 }
835}
836
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100837static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200838{
839 int val, cnt, enable;
840
841 val = phy_read(phydev, MII_M1011_PHY_SCR);
842 if (val < 0)
843 return val;
844
845 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
Heiner Kallweitf8d975b2019-10-28 20:52:22 +0100846 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200847
848 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
849
850 return 0;
851}
852
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100853static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200854{
855 int val;
856
857 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
858 return -E2BIG;
859
860 if (!cnt)
861 return phy_clear_bits(phydev, MII_M1011_PHY_SCR,
862 MII_M1011_PHY_SCR_DOWNSHIFT_EN);
863
864 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
Heiner Kallweitf8d975b2019-10-28 20:52:22 +0100865 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200866
867 return phy_modify(phydev, MII_M1011_PHY_SCR,
868 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
Heiner Kallweitf8d975b2019-10-28 20:52:22 +0100869 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200870 val);
871}
872
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100873static int m88e1011_get_tunable(struct phy_device *phydev,
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200874 struct ethtool_tunable *tuna, void *data)
875{
876 switch (tuna->id) {
877 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100878 return m88e1011_get_downshift(phydev, data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200879 default:
880 return -EOPNOTSUPP;
881 }
882}
883
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100884static int m88e1011_set_tunable(struct phy_device *phydev,
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200885 struct ethtool_tunable *tuna, const void *data)
886{
887 switch (tuna->id) {
888 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100889 return m88e1011_set_downshift(phydev, *(const u8 *)data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200890 default:
891 return -EOPNOTSUPP;
892 }
893}
894
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100895static void m88e1011_link_change_notify(struct phy_device *phydev)
Heiner Kallweita3bdfce2019-10-19 15:57:33 +0200896{
897 int status;
898
899 if (phydev->state != PHY_RUNNING)
900 return;
901
902 /* we may be on fiber page currently */
903 status = phy_read_paged(phydev, MII_MARVELL_COPPER_PAGE,
904 MII_M1011_PHY_SSR);
905
906 if (status > 0 && status & MII_M1011_PHY_SSR_DOWNSHIFT)
907 phydev_warn(phydev, "Downshift occurred! Cabling may be defective.\n");
908}
909
Heiner Kallweite2d861c2019-10-19 15:58:19 +0200910static int m88e1116r_config_init(struct phy_device *phydev)
911{
912 int err;
913
914 err = genphy_soft_reset(phydev);
915 if (err < 0)
916 return err;
917
918 msleep(500);
919
920 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
921 if (err < 0)
922 return err;
923
924 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
925 if (err < 0)
926 return err;
927
Heiner Kallweit911af5e2019-10-28 20:52:55 +0100928 err = m88e1011_set_downshift(phydev, 8);
Heiner Kallweite2d861c2019-10-19 15:58:19 +0200929 if (err < 0)
930 return err;
931
932 if (phy_interface_is_rgmii(phydev)) {
933 err = m88e1121_config_aneg_rgmii_delays(phydev);
934 if (err < 0)
935 return err;
936 }
937
938 err = genphy_soft_reset(phydev);
939 if (err < 0)
940 return err;
941
942 return marvell_config_init(phydev);
943}
944
Esben Haabendaldd9a1222018-04-05 22:40:29 +0200945static int m88e1318_config_init(struct phy_device *phydev)
946{
947 if (phy_interrupt_is_valid(phydev)) {
948 int err = phy_modify_paged(
949 phydev, MII_MARVELL_LED_PAGE,
950 MII_88E1318S_PHY_LED_TCR,
951 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
952 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
953 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
954 if (err < 0)
955 return err;
956 }
957
Wang Dongsheng07777242018-07-01 23:15:46 -0700958 return marvell_config_init(phydev);
Esben Haabendaldd9a1222018-04-05 22:40:29 +0200959}
960
Clemens Gruber407353e2016-02-23 20:16:58 +0100961static int m88e1510_config_init(struct phy_device *phydev)
962{
963 int err;
Clemens Gruber407353e2016-02-23 20:16:58 +0100964
965 /* SGMII-to-Copper mode initialization */
966 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
967 /* Select page 18 */
Andrew Lunn6427bb22017-05-17 03:26:03 +0200968 err = marvell_set_page(phydev, 18);
Clemens Gruber407353e2016-02-23 20:16:58 +0100969 if (err < 0)
970 return err;
971
972 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
Russell Kingfea23fb2018-01-02 10:58:58 +0000973 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
Russell Kingf1028522018-01-05 16:07:10 +0000974 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
Russell Kingfea23fb2018-01-02 10:58:58 +0000975 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
Clemens Gruber407353e2016-02-23 20:16:58 +0100976 if (err < 0)
977 return err;
978
979 /* PHY reset is necessary after changing MODE[2:0] */
Russell Kingfea23fb2018-01-02 10:58:58 +0000980 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
981 MII_88E1510_GEN_CTRL_REG_1_RESET);
Clemens Gruber407353e2016-02-23 20:16:58 +0100982 if (err < 0)
983 return err;
984
985 /* Reset page selection */
Andrew Lunn52295662017-05-25 21:42:08 +0200986 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Clemens Gruber407353e2016-02-23 20:16:58 +0100987 if (err < 0)
988 return err;
989 }
990
Esben Haabendaldd9a1222018-04-05 22:40:29 +0200991 return m88e1318_config_init(phydev);
Clemens Gruber407353e2016-02-23 20:16:58 +0100992}
993
Ron Madrid605f1962008-11-06 09:05:26 +0000994static int m88e1118_config_aneg(struct phy_device *phydev)
995{
996 int err;
997
Andrew Lunn34386342017-07-30 22:41:45 +0200998 err = genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +0000999 if (err < 0)
1000 return err;
1001
Andrew Lunnfecd5e92017-07-30 22:41:49 +02001002 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
Ron Madrid605f1962008-11-06 09:05:26 +00001003 if (err < 0)
1004 return err;
1005
1006 err = genphy_config_aneg(phydev);
1007 return 0;
1008}
1009
1010static int m88e1118_config_init(struct phy_device *phydev)
1011{
1012 int err;
1013
1014 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +02001015 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +00001016 if (err < 0)
1017 return err;
1018
1019 /* Enable 1000 Mbit */
1020 err = phy_write(phydev, 0x15, 0x1070);
1021 if (err < 0)
1022 return err;
1023
1024 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +02001025 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +00001026 if (err < 0)
1027 return err;
1028
1029 /* Adjust LED Control */
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10001030 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1031 err = phy_write(phydev, 0x10, 0x1100);
1032 else
1033 err = phy_write(phydev, 0x10, 0x021e);
Ron Madrid605f1962008-11-06 09:05:26 +00001034 if (err < 0)
1035 return err;
1036
David Daneycf41a512010-11-19 12:13:18 +00001037 err = marvell_of_reg_init(phydev);
1038 if (err < 0)
1039 return err;
1040
Ron Madrid605f1962008-11-06 09:05:26 +00001041 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +02001042 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Ron Madrid605f1962008-11-06 09:05:26 +00001043 if (err < 0)
1044 return err;
1045
Andrew Lunn34386342017-07-30 22:41:45 +02001046 return genphy_soft_reset(phydev);
Ron Madrid605f1962008-11-06 09:05:26 +00001047}
1048
David Daney90600732010-11-19 11:58:53 +00001049static int m88e1149_config_init(struct phy_device *phydev)
1050{
1051 int err;
1052
1053 /* Change address */
Andrew Lunn52295662017-05-25 21:42:08 +02001054 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
David Daney90600732010-11-19 11:58:53 +00001055 if (err < 0)
1056 return err;
1057
1058 /* Enable 1000 Mbit */
1059 err = phy_write(phydev, 0x15, 0x1048);
1060 if (err < 0)
1061 return err;
1062
David Daneycf41a512010-11-19 12:13:18 +00001063 err = marvell_of_reg_init(phydev);
1064 if (err < 0)
1065 return err;
1066
David Daney90600732010-11-19 11:58:53 +00001067 /* Reset address */
Andrew Lunn52295662017-05-25 21:42:08 +02001068 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
David Daney90600732010-11-19 11:58:53 +00001069 if (err < 0)
1070 return err;
1071
Andrew Lunn34386342017-07-30 22:41:45 +02001072 return genphy_soft_reset(phydev);
David Daney90600732010-11-19 11:58:53 +00001073}
1074
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001075static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1076{
1077 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001078
Andrew Lunn61111592017-07-30 22:41:46 +02001079 err = m88e1111_config_init_rgmii_delays(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001080 if (err < 0)
1081 return err;
1082
1083 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1084 err = phy_write(phydev, 0x1d, 0x0012);
1085 if (err < 0)
1086 return err;
1087
Russell Kingf1028522018-01-05 16:07:10 +00001088 err = phy_modify(phydev, 0x1e, 0x0fc0,
Russell Kingfea23fb2018-01-02 10:58:58 +00001089 2 << 9 | /* 36 ohm */
1090 2 << 6); /* 39 ohm */
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001091 if (err < 0)
1092 return err;
1093
1094 err = phy_write(phydev, 0x1d, 0x3);
1095 if (err < 0)
1096 return err;
1097
1098 err = phy_write(phydev, 0x1e, 0x8000);
1099 }
1100 return err;
1101}
1102
1103static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1104{
Andrew Lunn865b813a2017-07-30 22:41:47 +02001105 return m88e1111_config_init_hwcfg_mode(
1106 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1107 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001108}
1109
Andy Fleming76884672007-02-09 18:13:58 -06001110static int m88e1145_config_init(struct phy_device *phydev)
1111{
1112 int err;
1113
1114 /* Take care of errata E0 & E1 */
1115 err = phy_write(phydev, 0x1d, 0x001b);
1116 if (err < 0)
1117 return err;
1118
1119 err = phy_write(phydev, 0x1e, 0x418f);
1120 if (err < 0)
1121 return err;
1122
1123 err = phy_write(phydev, 0x1d, 0x0016);
1124 if (err < 0)
1125 return err;
1126
1127 err = phy_write(phydev, 0x1e, 0xa2da);
1128 if (err < 0)
1129 return err;
1130
Kim Phillips895ee682007-06-05 18:46:47 +08001131 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001132 err = m88e1145_config_init_rgmii(phydev);
Andy Fleming76884672007-02-09 18:13:58 -06001133 if (err < 0)
1134 return err;
Andy Fleming76884672007-02-09 18:13:58 -06001135 }
1136
Viet Nga Daob0224172014-10-23 19:41:53 -07001137 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001138 err = m88e1145_config_init_sgmii(phydev);
Viet Nga Daob0224172014-10-23 19:41:53 -07001139 if (err < 0)
1140 return err;
1141 }
1142
David Daneycf41a512010-11-19 12:13:18 +00001143 err = marvell_of_reg_init(phydev);
1144 if (err < 0)
1145 return err;
1146
Andy Fleming76884672007-02-09 18:13:58 -06001147 return 0;
1148}
Andy Fleming00db8182005-07-30 19:31:23 -04001149
Heiner Kallweit69f42be2019-03-25 19:35:41 +01001150static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1151{
1152 int val;
1153
1154 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1155 if (val < 0)
1156 return val;
1157
1158 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1159 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1160 return 0;
1161 }
1162
1163 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1164
1165 switch (val) {
1166 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1167 *msecs = 0;
1168 break;
1169 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1170 *msecs = 10;
1171 break;
1172 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1173 *msecs = 20;
1174 break;
1175 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1176 *msecs = 40;
1177 break;
1178 default:
1179 return -EINVAL;
1180 }
1181
1182 return 0;
1183}
1184
1185static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1186{
1187 struct ethtool_eee eee;
1188 int val, ret;
1189
1190 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1191 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1192 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1193
1194 /* According to the Marvell data sheet EEE must be disabled for
1195 * Fast Link Down detection to work properly
1196 */
1197 ret = phy_ethtool_get_eee(phydev, &eee);
1198 if (!ret && eee.eee_enabled) {
1199 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1200 return -EBUSY;
1201 }
1202
1203 if (*msecs <= 5)
1204 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1205 else if (*msecs <= 15)
1206 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1207 else if (*msecs <= 30)
1208 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1209 else
1210 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1211
1212 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1213
1214 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1215 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1216 if (ret)
1217 return ret;
1218
1219 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1220 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1221}
1222
1223static int m88e1540_get_tunable(struct phy_device *phydev,
1224 struct ethtool_tunable *tuna, void *data)
1225{
1226 switch (tuna->id) {
1227 case ETHTOOL_PHY_FAST_LINK_DOWN:
1228 return m88e1540_get_fld(phydev, data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001229 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001230 return m88e1011_get_downshift(phydev, data);
Heiner Kallweit69f42be2019-03-25 19:35:41 +01001231 default:
1232 return -EOPNOTSUPP;
1233 }
1234}
1235
1236static int m88e1540_set_tunable(struct phy_device *phydev,
1237 struct ethtool_tunable *tuna, const void *data)
1238{
1239 switch (tuna->id) {
1240 case ETHTOOL_PHY_FAST_LINK_DOWN:
1241 return m88e1540_set_fld(phydev, data);
Heiner Kallweita3bdfce2019-10-19 15:57:33 +02001242 case ETHTOOL_PHY_DOWNSHIFT:
Heiner Kallweit911af5e2019-10-28 20:52:55 +01001243 return m88e1011_set_downshift(phydev, *(const u8 *)data);
Heiner Kallweit69f42be2019-03-25 19:35:41 +01001244 default:
1245 return -EOPNOTSUPP;
1246 }
1247}
1248
Andrew Lunn8cbcdc12019-01-10 22:48:36 +01001249/* The VOD can be out of specification on link up. Poke an
1250 * undocumented register, in an undocumented page, with a magic value
1251 * to fix this.
1252 */
1253static int m88e6390_errata(struct phy_device *phydev)
1254{
1255 int err;
1256
1257 err = phy_write(phydev, MII_BMCR,
1258 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1259 if (err)
1260 return err;
1261
1262 usleep_range(300, 400);
1263
1264 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1265 if (err)
1266 return err;
1267
1268 return genphy_soft_reset(phydev);
1269}
1270
1271static int m88e6390_config_aneg(struct phy_device *phydev)
1272{
1273 int err;
1274
1275 err = m88e6390_errata(phydev);
1276 if (err)
1277 return err;
1278
1279 return m88e1510_config_aneg(phydev);
1280}
1281
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001282/**
Andrew Lunnab9cb722018-12-05 21:49:42 +01001283 * fiber_lpa_mod_linkmode_lpa_t
Andrew Lunnc0ec3c22018-11-10 23:43:34 +01001284 * @advertising: the linkmode advertisement settings
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001285 * @lpa: value of the MII_LPA register for fiber link
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001286 *
Andrew Lunnab9cb722018-12-05 21:49:42 +01001287 * A small helper function that translates MII_LPA bits to linkmode LP
1288 * advertisement settings. Other bits in advertising are left
1289 * unchanged.
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001290 */
Andrew Lunnab9cb722018-12-05 21:49:42 +01001291static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001292{
Andrew Lunnab9cb722018-12-05 21:49:42 +01001293 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
Russell King20ecf422019-12-17 13:39:42 +00001294 advertising, lpa & LPA_1000XHALF);
Andrew Lunnab9cb722018-12-05 21:49:42 +01001295
1296 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
Russell King20ecf422019-12-17 13:39:42 +00001297 advertising, lpa & LPA_1000XFULL);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001298}
1299
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001300static int marvell_read_status_page_an(struct phy_device *phydev,
Russell Kingd2004e22019-12-17 13:39:36 +00001301 int fiber, int status)
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001302{
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001303 int lpa;
Russell Kingfcf1f592019-12-17 13:39:21 +00001304 int err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001305
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001306 if (!fiber) {
Russell Kingfcf1f592019-12-17 13:39:21 +00001307 err = genphy_read_lpa(phydev);
1308 if (err < 0)
1309 return err;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001310
Russell Kingaf006242019-12-17 13:39:06 +00001311 phy_resolve_aneg_pause(phydev);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001312 } else {
Russell Kingfcf1f592019-12-17 13:39:21 +00001313 lpa = phy_read(phydev, MII_LPA);
1314 if (lpa < 0)
1315 return lpa;
1316
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001317 /* The fiber link is only 1000M capable */
Andrew Lunnab9cb722018-12-05 21:49:42 +01001318 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001319
1320 if (phydev->duplex == DUPLEX_FULL) {
1321 if (!(lpa & LPA_PAUSE_FIBER)) {
1322 phydev->pause = 0;
1323 phydev->asym_pause = 0;
1324 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1325 phydev->pause = 1;
1326 phydev->asym_pause = 1;
1327 } else {
1328 phydev->pause = 1;
1329 phydev->asym_pause = 0;
1330 }
1331 }
1332 }
Russell Kingfcf1f592019-12-17 13:39:21 +00001333
1334 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1335 phydev->duplex = DUPLEX_FULL;
1336 else
1337 phydev->duplex = DUPLEX_HALF;
1338
1339 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1340 case MII_M1011_PHY_STATUS_1000:
1341 phydev->speed = SPEED_1000;
1342 break;
1343
1344 case MII_M1011_PHY_STATUS_100:
1345 phydev->speed = SPEED_100;
1346 break;
1347
1348 default:
1349 phydev->speed = SPEED_10;
1350 break;
1351 }
1352
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001353 return 0;
1354}
1355
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001356/* marvell_read_status_page
1357 *
Jeff Garzikf0c88f92008-03-25 23:53:24 -04001358 * Description:
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001359 * Check the link, then figure out the current state
1360 * by comparing what we advertise with what the link partner
1361 * advertises. Start by checking the gigabit possibilities,
1362 * then move on to 10/100.
1363 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001364static int marvell_read_status_page(struct phy_device *phydev, int page)
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001365{
Russell Kingd2004e22019-12-17 13:39:36 +00001366 int status;
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001367 int fiber;
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001368 int err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001369
Russell Kingd2004e22019-12-17 13:39:36 +00001370 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1371 if (status < 0)
1372 return status;
1373
1374 /* Use the generic register for copper link status,
1375 * and the PHY status register for fiber link status.
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001376 */
Russell Kingd2004e22019-12-17 13:39:36 +00001377 if (page == MII_MARVELL_FIBER_PAGE) {
1378 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1379 } else {
1380 err = genphy_update_link(phydev);
1381 if (err)
1382 return err;
1383 }
1384
Andrew Lunn52295662017-05-25 21:42:08 +02001385 if (page == MII_MARVELL_FIBER_PAGE)
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001386 fiber = 1;
1387 else
1388 fiber = 0;
1389
Russell King98f92832019-12-17 13:39:26 +00001390 linkmode_zero(phydev->lp_advertising);
1391 phydev->pause = 0;
1392 phydev->asym_pause = 0;
1393
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001394 if (phydev->autoneg == AUTONEG_ENABLE)
Russell Kingd2004e22019-12-17 13:39:36 +00001395 err = marvell_read_status_page_an(phydev, fiber, status);
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001396 else
Russell King98f92832019-12-17 13:39:26 +00001397 err = genphy_read_status_fixed(phydev);
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001398
Andrew Lunne1dde8d2017-05-17 03:26:02 +02001399 return err;
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03001400}
1401
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001402/* marvell_read_status
1403 *
1404 * Some Marvell's phys have two modes: fiber and copper.
1405 * Both need status checked.
1406 * Description:
1407 * First, check the fiber link and status.
1408 * If the fiber link is down, check the copper link and status which
1409 * will be the default value if both link are down.
1410 */
1411static int marvell_read_status(struct phy_device *phydev)
1412{
1413 int err;
1414
1415 /* Check the fiber mode first */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001416 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1417 phydev->supported) &&
Russell Kinga13c06522017-01-10 23:13:45 +00001418 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
Andrew Lunn52295662017-05-25 21:42:08 +02001419 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001420 if (err < 0)
1421 goto error;
1422
Andrew Lunn52295662017-05-25 21:42:08 +02001423 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001424 if (err < 0)
1425 goto error;
1426
Andrew Lunn0c3439b2017-05-17 03:25:59 +02001427 /* If the fiber link is up, it is the selected and
1428 * used link. In this case, we need to stay in the
1429 * fiber page. Please to be careful about that, avoid
1430 * to restore Copper page in other functions which
1431 * could break the behaviour for some fiber phy like
1432 * 88E1512.
1433 */
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001434 if (phydev->link)
1435 return 0;
1436
1437 /* If fiber link is down, check and save copper mode state */
Andrew Lunn52295662017-05-25 21:42:08 +02001438 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001439 if (err < 0)
1440 goto error;
1441 }
1442
Andrew Lunn52295662017-05-25 21:42:08 +02001443 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001444
1445error:
Andrew Lunn52295662017-05-25 21:42:08 +02001446 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret6cfb3bc2016-07-19 11:13:10 +02001447 return err;
1448}
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001449
1450/* marvell_suspend
1451 *
1452 * Some Marvell's phys have two modes: fiber and copper.
1453 * Both need to be suspended
1454 */
1455static int marvell_suspend(struct phy_device *phydev)
1456{
1457 int err;
1458
1459 /* Suspend the fiber mode first */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001460 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1461 phydev->supported)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001462 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001463 if (err < 0)
1464 goto error;
1465
1466 /* With the page set, use the generic suspend */
1467 err = genphy_suspend(phydev);
1468 if (err < 0)
1469 goto error;
1470
1471 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001472 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001473 if (err < 0)
1474 goto error;
1475 }
1476
1477 /* With the page set, use the generic suspend */
1478 return genphy_suspend(phydev);
1479
1480error:
Andrew Lunn52295662017-05-25 21:42:08 +02001481 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001482 return err;
1483}
1484
1485/* marvell_resume
1486 *
1487 * Some Marvell's phys have two modes: fiber and copper.
1488 * Both need to be resumed
1489 */
1490static int marvell_resume(struct phy_device *phydev)
1491{
1492 int err;
1493
1494 /* Resume the fiber mode first */
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001495 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1496 phydev->supported)) {
Andrew Lunn52295662017-05-25 21:42:08 +02001497 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001498 if (err < 0)
1499 goto error;
1500
1501 /* With the page set, use the generic resume */
1502 err = genphy_resume(phydev);
1503 if (err < 0)
1504 goto error;
1505
1506 /* Then, the copper link */
Andrew Lunn52295662017-05-25 21:42:08 +02001507 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001508 if (err < 0)
1509 goto error;
1510 }
1511
1512 /* With the page set, use the generic resume */
1513 return genphy_resume(phydev);
1514
1515error:
Andrew Lunn52295662017-05-25 21:42:08 +02001516 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02001517 return err;
1518}
1519
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001520static int marvell_aneg_done(struct phy_device *phydev)
1521{
1522 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
Andrew Lunne69d9ed2017-05-17 03:26:00 +02001523
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02001524 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1525}
1526
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00001527static int m88e1121_did_interrupt(struct phy_device *phydev)
1528{
1529 int imask;
1530
1531 imask = phy_read(phydev, MII_M1011_IEVENT);
1532
1533 if (imask & MII_M1011_IMASK_INIT)
1534 return 1;
1535
1536 return 0;
1537}
1538
Andrew Lunn23beb382017-05-17 03:26:04 +02001539static void m88e1318_get_wol(struct phy_device *phydev,
1540 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001541{
Russell King424ca4c2018-01-02 10:58:48 +00001542 int oldpage, ret = 0;
1543
Michael Stapelberg3871c382013-03-11 13:56:45 +00001544 wol->supported = WAKE_MAGIC;
1545 wol->wolopts = 0;
1546
Russell King424ca4c2018-01-02 10:58:48 +00001547 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1548 if (oldpage < 0)
1549 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001550
Russell King424ca4c2018-01-02 10:58:48 +00001551 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1552 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001553 wol->wolopts |= WAKE_MAGIC;
1554
Russell King424ca4c2018-01-02 10:58:48 +00001555error:
1556 phy_restore_page(phydev, oldpage, ret);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001557}
1558
Andrew Lunn23beb382017-05-17 03:26:04 +02001559static int m88e1318_set_wol(struct phy_device *phydev,
1560 struct ethtool_wolinfo *wol)
Michael Stapelberg3871c382013-03-11 13:56:45 +00001561{
Russell King424ca4c2018-01-02 10:58:48 +00001562 int err = 0, oldpage;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001563
Russell King424ca4c2018-01-02 10:58:48 +00001564 oldpage = phy_save_page(phydev);
1565 if (oldpage < 0)
1566 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001567
1568 if (wol->wolopts & WAKE_MAGIC) {
1569 /* Explicitly switch to page 0x00, just to be sure */
Russell King424ca4c2018-01-02 10:58:48 +00001570 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001571 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001572 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001573
Jingju Houb6a930f2018-04-23 15:22:49 +08001574 /* If WOL event happened once, the LED[2] interrupt pin
1575 * will not be cleared unless we reading the interrupt status
1576 * register. If interrupts are in use, the normal interrupt
1577 * handling will clear the WOL event. Clear the WOL event
1578 * before enabling it if !phy_interrupt_is_valid()
1579 */
1580 if (!phy_interrupt_is_valid(phydev))
Andrew Lunne0a73282019-01-11 00:15:21 +01001581 __phy_read(phydev, MII_M1011_IEVENT);
Jingju Houb6a930f2018-04-23 15:22:49 +08001582
Michael Stapelberg3871c382013-03-11 13:56:45 +00001583 /* Enable the WOL interrupt */
Russell King424ca4c2018-01-02 10:58:48 +00001584 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1585 MII_88E1318S_PHY_CSIER_WOL_EIE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001586 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001587 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001588
Russell King424ca4c2018-01-02 10:58:48 +00001589 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001590 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001591 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001592
1593 /* Setup LED[2] as interrupt pin (active low) */
Russell King424ca4c2018-01-02 10:58:48 +00001594 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
Russell Kingf1028522018-01-05 16:07:10 +00001595 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
Russell King424ca4c2018-01-02 10:58:48 +00001596 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1597 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001598 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001599 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001600
Russell King424ca4c2018-01-02 10:58:48 +00001601 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001602 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001603 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001604
1605 /* Store the device address for the magic packet */
Russell King424ca4c2018-01-02 10:58:48 +00001606 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001607 ((phydev->attached_dev->dev_addr[5] << 8) |
1608 phydev->attached_dev->dev_addr[4]));
1609 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001610 goto error;
1611 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001612 ((phydev->attached_dev->dev_addr[3] << 8) |
1613 phydev->attached_dev->dev_addr[2]));
1614 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001615 goto error;
1616 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
Michael Stapelberg3871c382013-03-11 13:56:45 +00001617 ((phydev->attached_dev->dev_addr[1] << 8) |
1618 phydev->attached_dev->dev_addr[0]));
1619 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001620 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001621
1622 /* Clear WOL status and enable magic packet matching */
Russell King424ca4c2018-01-02 10:58:48 +00001623 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1624 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1625 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001626 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001627 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001628 } else {
Russell King424ca4c2018-01-02 10:58:48 +00001629 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001630 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001631 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001632
1633 /* Clear WOL status and disable magic packet matching */
Russell King424ca4c2018-01-02 10:58:48 +00001634 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
Russell Kingf1028522018-01-05 16:07:10 +00001635 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
Russell King424ca4c2018-01-02 10:58:48 +00001636 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001637 if (err < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001638 goto error;
Michael Stapelberg3871c382013-03-11 13:56:45 +00001639 }
1640
Russell King424ca4c2018-01-02 10:58:48 +00001641error:
1642 return phy_restore_page(phydev, oldpage, err);
Michael Stapelberg3871c382013-03-11 13:56:45 +00001643}
1644
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001645static int marvell_get_sset_count(struct phy_device *phydev)
1646{
Andrew Lunn3c1bcc82018-11-10 23:43:33 +01001647 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1648 phydev->supported))
Charles-Antoine Couret2170fef2016-07-19 11:13:11 +02001649 return ARRAY_SIZE(marvell_hw_stats);
1650 else
1651 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001652}
1653
1654static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1655{
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001656 int count = marvell_get_sset_count(phydev);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001657 int i;
1658
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001659 for (i = 0; i < count; i++) {
Florian Fainelli98409b22018-03-02 15:08:37 -08001660 strlcpy(data + i * ETH_GSTRING_LEN,
1661 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001662 }
1663}
1664
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001665static u64 marvell_get_stat(struct phy_device *phydev, int i)
1666{
1667 struct marvell_hw_stat stat = marvell_hw_stats[i];
1668 struct marvell_priv *priv = phydev->priv;
Russell King424ca4c2018-01-02 10:58:48 +00001669 int val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001670 u64 ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001671
Russell King424ca4c2018-01-02 10:58:48 +00001672 val = phy_read_paged(phydev, stat.page, stat.reg);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001673 if (val < 0) {
Jisheng Zhang6c3442f2018-04-27 16:18:58 +08001674 ret = U64_MAX;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001675 } else {
1676 val = val & ((1 << stat.bits) - 1);
1677 priv->stats[i] += val;
Andrew Lunn321b4d42016-02-20 00:35:29 +01001678 ret = priv->stats[i];
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001679 }
1680
Andrew Lunn321b4d42016-02-20 00:35:29 +01001681 return ret;
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001682}
1683
1684static void marvell_get_stats(struct phy_device *phydev,
1685 struct ethtool_stats *stats, u64 *data)
1686{
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001687 int count = marvell_get_sset_count(phydev);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001688 int i;
1689
Andrew Lunnfdfdf862019-04-25 00:33:00 +02001690 for (i = 0; i < count; i++)
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01001691 data[i] = marvell_get_stat(phydev, i);
1692}
1693
Andrew Lunn0b046802017-01-20 01:37:49 +01001694#ifdef CONFIG_HWMON
1695static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1696{
Andrew Lunn975b3882017-05-25 21:42:06 +02001697 int oldpage;
Russell King424ca4c2018-01-02 10:58:48 +00001698 int ret = 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001699 int val;
1700
1701 *temp = 0;
1702
Russell King424ca4c2018-01-02 10:58:48 +00001703 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1704 if (oldpage < 0)
1705 goto error;
Andrew Lunn975b3882017-05-25 21:42:06 +02001706
Andrew Lunn0b046802017-01-20 01:37:49 +01001707 /* Enable temperature sensor */
Russell King424ca4c2018-01-02 10:58:48 +00001708 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001709 if (ret < 0)
1710 goto error;
1711
Russell King424ca4c2018-01-02 10:58:48 +00001712 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1713 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
Andrew Lunn0b046802017-01-20 01:37:49 +01001714 if (ret < 0)
1715 goto error;
1716
1717 /* Wait for temperature to stabilize */
1718 usleep_range(10000, 12000);
1719
Russell King424ca4c2018-01-02 10:58:48 +00001720 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001721 if (val < 0) {
1722 ret = val;
1723 goto error;
1724 }
1725
1726 /* Disable temperature sensor */
Russell King424ca4c2018-01-02 10:58:48 +00001727 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1728 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
Andrew Lunn0b046802017-01-20 01:37:49 +01001729 if (ret < 0)
1730 goto error;
1731
1732 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1733
1734error:
Russell King424ca4c2018-01-02 10:58:48 +00001735 return phy_restore_page(phydev, oldpage, ret);
Andrew Lunn0b046802017-01-20 01:37:49 +01001736}
1737
1738static int m88e1121_hwmon_read(struct device *dev,
1739 enum hwmon_sensor_types type,
1740 u32 attr, int channel, long *temp)
1741{
1742 struct phy_device *phydev = dev_get_drvdata(dev);
1743 int err;
1744
1745 switch (attr) {
1746 case hwmon_temp_input:
1747 err = m88e1121_get_temp(phydev, temp);
1748 break;
1749 default:
1750 return -EOPNOTSUPP;
1751 }
1752
1753 return err;
1754}
1755
1756static umode_t m88e1121_hwmon_is_visible(const void *data,
1757 enum hwmon_sensor_types type,
1758 u32 attr, int channel)
1759{
1760 if (type != hwmon_temp)
1761 return 0;
1762
1763 switch (attr) {
1764 case hwmon_temp_input:
1765 return 0444;
1766 default:
1767 return 0;
1768 }
1769}
1770
1771static u32 m88e1121_hwmon_chip_config[] = {
1772 HWMON_C_REGISTER_TZ,
1773 0
1774};
1775
1776static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1777 .type = hwmon_chip,
1778 .config = m88e1121_hwmon_chip_config,
1779};
1780
1781static u32 m88e1121_hwmon_temp_config[] = {
1782 HWMON_T_INPUT,
1783 0
1784};
1785
1786static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1787 .type = hwmon_temp,
1788 .config = m88e1121_hwmon_temp_config,
1789};
1790
1791static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1792 &m88e1121_hwmon_chip,
1793 &m88e1121_hwmon_temp,
1794 NULL
1795};
1796
1797static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1798 .is_visible = m88e1121_hwmon_is_visible,
1799 .read = m88e1121_hwmon_read,
1800};
1801
1802static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1803 .ops = &m88e1121_hwmon_hwmon_ops,
1804 .info = m88e1121_hwmon_info,
1805};
1806
1807static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1808{
1809 int ret;
1810
1811 *temp = 0;
1812
Russell King424ca4c2018-01-02 10:58:48 +00001813 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1814 MII_88E1510_TEMP_SENSOR);
Andrew Lunn0b046802017-01-20 01:37:49 +01001815 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001816 return ret;
Andrew Lunn0b046802017-01-20 01:37:49 +01001817
1818 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1819
Russell King424ca4c2018-01-02 10:58:48 +00001820 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001821}
1822
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001823static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001824{
1825 int ret;
1826
1827 *temp = 0;
1828
Russell King424ca4c2018-01-02 10:58:48 +00001829 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1830 MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001831 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001832 return ret;
Andrew Lunn0b046802017-01-20 01:37:49 +01001833
1834 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1835 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1836 /* convert to mC */
1837 *temp *= 1000;
1838
Russell King424ca4c2018-01-02 10:58:48 +00001839 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001840}
1841
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001842static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
Andrew Lunn0b046802017-01-20 01:37:49 +01001843{
Andrew Lunn0b046802017-01-20 01:37:49 +01001844 temp = temp / 1000;
1845 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
Andrew Lunn0b046802017-01-20 01:37:49 +01001846
Russell King424ca4c2018-01-02 10:58:48 +00001847 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1848 MII_88E1121_MISC_TEST,
1849 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1850 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
Andrew Lunn0b046802017-01-20 01:37:49 +01001851}
1852
Colin Ian Kingf0a45812017-06-02 15:13:34 +01001853static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
Andrew Lunn0b046802017-01-20 01:37:49 +01001854{
1855 int ret;
1856
1857 *alarm = false;
1858
Russell King424ca4c2018-01-02 10:58:48 +00001859 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1860 MII_88E1121_MISC_TEST);
Andrew Lunn0b046802017-01-20 01:37:49 +01001861 if (ret < 0)
Russell King424ca4c2018-01-02 10:58:48 +00001862 return ret;
1863
Andrew Lunn0b046802017-01-20 01:37:49 +01001864 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1865
Russell King424ca4c2018-01-02 10:58:48 +00001866 return 0;
Andrew Lunn0b046802017-01-20 01:37:49 +01001867}
1868
1869static int m88e1510_hwmon_read(struct device *dev,
1870 enum hwmon_sensor_types type,
1871 u32 attr, int channel, long *temp)
1872{
1873 struct phy_device *phydev = dev_get_drvdata(dev);
1874 int err;
1875
1876 switch (attr) {
1877 case hwmon_temp_input:
1878 err = m88e1510_get_temp(phydev, temp);
1879 break;
1880 case hwmon_temp_crit:
1881 err = m88e1510_get_temp_critical(phydev, temp);
1882 break;
1883 case hwmon_temp_max_alarm:
1884 err = m88e1510_get_temp_alarm(phydev, temp);
1885 break;
1886 default:
1887 return -EOPNOTSUPP;
1888 }
1889
1890 return err;
1891}
1892
1893static int m88e1510_hwmon_write(struct device *dev,
1894 enum hwmon_sensor_types type,
1895 u32 attr, int channel, long temp)
1896{
1897 struct phy_device *phydev = dev_get_drvdata(dev);
1898 int err;
1899
1900 switch (attr) {
1901 case hwmon_temp_crit:
1902 err = m88e1510_set_temp_critical(phydev, temp);
1903 break;
1904 default:
1905 return -EOPNOTSUPP;
1906 }
1907 return err;
1908}
1909
1910static umode_t m88e1510_hwmon_is_visible(const void *data,
1911 enum hwmon_sensor_types type,
1912 u32 attr, int channel)
1913{
1914 if (type != hwmon_temp)
1915 return 0;
1916
1917 switch (attr) {
1918 case hwmon_temp_input:
1919 case hwmon_temp_max_alarm:
1920 return 0444;
1921 case hwmon_temp_crit:
1922 return 0644;
1923 default:
1924 return 0;
1925 }
1926}
1927
1928static u32 m88e1510_hwmon_temp_config[] = {
1929 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1930 0
1931};
1932
1933static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1934 .type = hwmon_temp,
1935 .config = m88e1510_hwmon_temp_config,
1936};
1937
1938static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1939 &m88e1121_hwmon_chip,
1940 &m88e1510_hwmon_temp,
1941 NULL
1942};
1943
1944static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1945 .is_visible = m88e1510_hwmon_is_visible,
1946 .read = m88e1510_hwmon_read,
1947 .write = m88e1510_hwmon_write,
1948};
1949
1950static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1951 .ops = &m88e1510_hwmon_hwmon_ops,
1952 .info = m88e1510_hwmon_info,
1953};
1954
Andrew Lunnfee2d542018-01-09 22:42:09 +01001955static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
1956{
1957 int sum = 0;
1958 int oldpage;
1959 int ret = 0;
1960 int i;
1961
1962 *temp = 0;
1963
1964 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1965 if (oldpage < 0)
1966 goto error;
1967
1968 /* Enable temperature sensor */
1969 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1970 if (ret < 0)
1971 goto error;
1972
1973 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1974 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
1975 MII_88E6390_MISC_TEST_SAMPLE_1S;
1976
1977 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1978 if (ret < 0)
1979 goto error;
1980
1981 /* Wait for temperature to stabilize */
1982 usleep_range(10000, 12000);
1983
1984 /* Reading the temperature sense has an errata. You need to read
1985 * a number of times and take an average.
1986 */
1987 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
1988 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
1989 if (ret < 0)
1990 goto error;
1991 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
1992 }
1993
1994 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
1995 *temp = (sum - 75) * 1000;
1996
1997 /* Disable temperature sensor */
1998 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1999 if (ret < 0)
2000 goto error;
2001
2002 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
2003 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
2004
2005 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2006
2007error:
2008 phy_restore_page(phydev, oldpage, ret);
2009
2010 return ret;
2011}
2012
2013static int m88e6390_hwmon_read(struct device *dev,
2014 enum hwmon_sensor_types type,
2015 u32 attr, int channel, long *temp)
2016{
2017 struct phy_device *phydev = dev_get_drvdata(dev);
2018 int err;
2019
2020 switch (attr) {
2021 case hwmon_temp_input:
2022 err = m88e6390_get_temp(phydev, temp);
2023 break;
2024 default:
2025 return -EOPNOTSUPP;
2026 }
2027
2028 return err;
2029}
2030
2031static umode_t m88e6390_hwmon_is_visible(const void *data,
2032 enum hwmon_sensor_types type,
2033 u32 attr, int channel)
2034{
2035 if (type != hwmon_temp)
2036 return 0;
2037
2038 switch (attr) {
2039 case hwmon_temp_input:
2040 return 0444;
2041 default:
2042 return 0;
2043 }
2044}
2045
2046static u32 m88e6390_hwmon_temp_config[] = {
2047 HWMON_T_INPUT,
2048 0
2049};
2050
2051static const struct hwmon_channel_info m88e6390_hwmon_temp = {
2052 .type = hwmon_temp,
2053 .config = m88e6390_hwmon_temp_config,
2054};
2055
2056static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
2057 &m88e1121_hwmon_chip,
2058 &m88e6390_hwmon_temp,
2059 NULL
2060};
2061
2062static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
2063 .is_visible = m88e6390_hwmon_is_visible,
2064 .read = m88e6390_hwmon_read,
2065};
2066
2067static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
2068 .ops = &m88e6390_hwmon_hwmon_ops,
2069 .info = m88e6390_hwmon_info,
2070};
2071
Andrew Lunn0b046802017-01-20 01:37:49 +01002072static int marvell_hwmon_name(struct phy_device *phydev)
2073{
2074 struct marvell_priv *priv = phydev->priv;
2075 struct device *dev = &phydev->mdio.dev;
2076 const char *devname = dev_name(dev);
2077 size_t len = strlen(devname);
2078 int i, j;
2079
2080 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2081 if (!priv->hwmon_name)
2082 return -ENOMEM;
2083
2084 for (i = j = 0; i < len && devname[i]; i++) {
2085 if (isalnum(devname[i]))
2086 priv->hwmon_name[j++] = devname[i];
2087 }
2088
2089 return 0;
2090}
2091
2092static int marvell_hwmon_probe(struct phy_device *phydev,
2093 const struct hwmon_chip_info *chip)
2094{
2095 struct marvell_priv *priv = phydev->priv;
2096 struct device *dev = &phydev->mdio.dev;
2097 int err;
2098
2099 err = marvell_hwmon_name(phydev);
2100 if (err)
2101 return err;
2102
2103 priv->hwmon_dev = devm_hwmon_device_register_with_info(
2104 dev, priv->hwmon_name, phydev, chip, NULL);
2105
2106 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
2107}
2108
2109static int m88e1121_hwmon_probe(struct phy_device *phydev)
2110{
2111 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
2112}
2113
2114static int m88e1510_hwmon_probe(struct phy_device *phydev)
2115{
2116 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
2117}
Andrew Lunnfee2d542018-01-09 22:42:09 +01002118
2119static int m88e6390_hwmon_probe(struct phy_device *phydev)
2120{
2121 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
2122}
Andrew Lunn0b046802017-01-20 01:37:49 +01002123#else
2124static int m88e1121_hwmon_probe(struct phy_device *phydev)
2125{
2126 return 0;
2127}
2128
2129static int m88e1510_hwmon_probe(struct phy_device *phydev)
2130{
2131 return 0;
2132}
Andrew Lunnfee2d542018-01-09 22:42:09 +01002133
2134static int m88e6390_hwmon_probe(struct phy_device *phydev)
2135{
2136 return 0;
2137}
Andrew Lunn0b046802017-01-20 01:37:49 +01002138#endif
2139
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002140static int marvell_probe(struct phy_device *phydev)
2141{
2142 struct marvell_priv *priv;
2143
Andrew Lunne5a03bf2016-01-06 20:11:16 +01002144 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002145 if (!priv)
2146 return -ENOMEM;
2147
2148 phydev->priv = priv;
2149
2150 return 0;
2151}
2152
Andrew Lunn0b046802017-01-20 01:37:49 +01002153static int m88e1121_probe(struct phy_device *phydev)
2154{
2155 int err;
2156
2157 err = marvell_probe(phydev);
2158 if (err)
2159 return err;
2160
2161 return m88e1121_hwmon_probe(phydev);
2162}
2163
2164static int m88e1510_probe(struct phy_device *phydev)
2165{
2166 int err;
2167
2168 err = marvell_probe(phydev);
2169 if (err)
2170 return err;
2171
2172 return m88e1510_hwmon_probe(phydev);
2173}
2174
Andrew Lunnfee2d542018-01-09 22:42:09 +01002175static int m88e6390_probe(struct phy_device *phydev)
2176{
2177 int err;
2178
2179 err = marvell_probe(phydev);
2180 if (err)
2181 return err;
2182
2183 return m88e6390_hwmon_probe(phydev);
2184}
2185
Olof Johanssone5479232007-07-03 16:23:46 -05002186static struct phy_driver marvell_drivers[] = {
2187 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002188 .phy_id = MARVELL_PHY_ID_88E1101,
2189 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002190 .name = "Marvell 88E1101",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002191 /* PHY_GBIT_FEATURES */
Arnd Bergmann18702412017-01-23 13:18:41 +01002192 .probe = marvell_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01002193 .config_init = &marvell_config_init,
Andrew Lunnf2899782017-05-23 17:49:13 +02002194 .config_aneg = &m88e1101_config_aneg,
Olof Johanssone5479232007-07-03 16:23:46 -05002195 .ack_interrupt = &marvell_ack_interrupt,
2196 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002197 .resume = &genphy_resume,
2198 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002199 .read_page = marvell_read_page,
2200 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002201 .get_sset_count = marvell_get_sset_count,
2202 .get_strings = marvell_get_strings,
2203 .get_stats = marvell_get_stats,
Olof Johanssone5479232007-07-03 16:23:46 -05002204 },
2205 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002206 .phy_id = MARVELL_PHY_ID_88E1112,
2207 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johansson85cfb532007-07-03 16:24:32 -05002208 .name = "Marvell 88E1112",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002209 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002210 .probe = marvell_probe,
Olof Johansson85cfb532007-07-03 16:24:32 -05002211 .config_init = &m88e1111_config_init,
2212 .config_aneg = &marvell_config_aneg,
Olof Johansson85cfb532007-07-03 16:24:32 -05002213 .ack_interrupt = &marvell_ack_interrupt,
2214 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002215 .resume = &genphy_resume,
2216 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002217 .read_page = marvell_read_page,
2218 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002219 .get_sset_count = marvell_get_sset_count,
2220 .get_strings = marvell_get_strings,
2221 .get_stats = marvell_get_stats,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002222 .get_tunable = m88e1011_get_tunable,
2223 .set_tunable = m88e1011_set_tunable,
2224 .link_change_notify = m88e1011_link_change_notify,
Olof Johansson85cfb532007-07-03 16:24:32 -05002225 },
2226 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002227 .phy_id = MARVELL_PHY_ID_88E1111,
2228 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002229 .name = "Marvell 88E1111",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002230 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002231 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002232 .config_init = &m88e1111_config_init,
Florian Fainellid6ab9332018-09-25 11:28:46 -07002233 .config_aneg = &marvell_config_aneg,
Alexandr Smirnovbe937f12008-03-19 00:37:24 +03002234 .read_status = &marvell_read_status,
Olof Johanssone5479232007-07-03 16:23:46 -05002235 .ack_interrupt = &marvell_ack_interrupt,
2236 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002237 .resume = &genphy_resume,
2238 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002239 .read_page = marvell_read_page,
2240 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002241 .get_sset_count = marvell_get_sset_count,
2242 .get_strings = marvell_get_strings,
2243 .get_stats = marvell_get_stats,
Heiner Kallweit5c6bc512019-10-28 20:53:25 +01002244 .get_tunable = m88e1111_get_tunable,
2245 .set_tunable = m88e1111_set_tunable,
2246 .link_change_notify = m88e1011_link_change_notify,
Olof Johanssone5479232007-07-03 16:23:46 -05002247 },
2248 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002249 .phy_id = MARVELL_PHY_ID_88E1118,
2250 .phy_id_mask = MARVELL_PHY_ID_MASK,
Ron Madrid605f1962008-11-06 09:05:26 +00002251 .name = "Marvell 88E1118",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002252 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002253 .probe = marvell_probe,
Ron Madrid605f1962008-11-06 09:05:26 +00002254 .config_init = &m88e1118_config_init,
2255 .config_aneg = &m88e1118_config_aneg,
Ron Madrid605f1962008-11-06 09:05:26 +00002256 .ack_interrupt = &marvell_ack_interrupt,
2257 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002258 .resume = &genphy_resume,
2259 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002260 .read_page = marvell_read_page,
2261 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002262 .get_sset_count = marvell_get_sset_count,
2263 .get_strings = marvell_get_strings,
2264 .get_stats = marvell_get_stats,
Ron Madrid605f1962008-11-06 09:05:26 +00002265 },
2266 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002267 .phy_id = MARVELL_PHY_ID_88E1121R,
2268 .phy_id_mask = MARVELL_PHY_ID_MASK,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002269 .name = "Marvell 88E1121R",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002270 /* PHY_GBIT_FEATURES */
Arnd Bergmann18702412017-01-23 13:18:41 +01002271 .probe = &m88e1121_probe,
Wang Dongsheng07777242018-07-01 23:15:46 -07002272 .config_init = &marvell_config_init,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002273 .config_aneg = &m88e1121_config_aneg,
2274 .read_status = &marvell_read_status,
2275 .ack_interrupt = &marvell_ack_interrupt,
2276 .config_intr = &marvell_config_intr,
Anatolij Gustschindcd07be2009-04-07 02:01:43 +00002277 .did_interrupt = &m88e1121_did_interrupt,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002278 .resume = &genphy_resume,
2279 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002280 .read_page = marvell_read_page,
2281 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002282 .get_sset_count = marvell_get_sset_count,
2283 .get_strings = marvell_get_strings,
2284 .get_stats = marvell_get_stats,
Heiner Kallweit911af5e2019-10-28 20:52:55 +01002285 .get_tunable = m88e1011_get_tunable,
2286 .set_tunable = m88e1011_set_tunable,
2287 .link_change_notify = m88e1011_link_change_notify,
Sergei Poselenov140bc922009-04-07 02:01:41 +00002288 },
2289 {
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002290 .phy_id = MARVELL_PHY_ID_88E1318S,
Linus Torvalds6ba74012010-08-04 11:47:58 -07002291 .phy_id_mask = MARVELL_PHY_ID_MASK,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002292 .name = "Marvell 88E1318S",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002293 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002294 .probe = marvell_probe,
Esben Haabendaldd9a1222018-04-05 22:40:29 +02002295 .config_init = &m88e1318_config_init,
Cyril Chemparathy337ac9d2010-10-29 13:50:25 -07002296 .config_aneg = &m88e1318_config_aneg,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002297 .read_status = &marvell_read_status,
2298 .ack_interrupt = &marvell_ack_interrupt,
2299 .config_intr = &marvell_config_intr,
2300 .did_interrupt = &m88e1121_did_interrupt,
Michael Stapelberg3871c382013-03-11 13:56:45 +00002301 .get_wol = &m88e1318_get_wol,
2302 .set_wol = &m88e1318_set_wol,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002303 .resume = &genphy_resume,
2304 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002305 .read_page = marvell_read_page,
2306 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002307 .get_sset_count = marvell_get_sset_count,
2308 .get_strings = marvell_get_strings,
2309 .get_stats = marvell_get_stats,
Cyril Chemparathy3ff1c252010-08-03 19:36:06 -07002310 },
2311 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002312 .phy_id = MARVELL_PHY_ID_88E1145,
2313 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssone5479232007-07-03 16:23:46 -05002314 .name = "Marvell 88E1145",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002315 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002316 .probe = marvell_probe,
Olof Johanssone5479232007-07-03 16:23:46 -05002317 .config_init = &m88e1145_config_init,
Zhao Qiangc5058732017-12-18 10:26:43 +08002318 .config_aneg = &m88e1101_config_aneg,
Olof Johanssone5479232007-07-03 16:23:46 -05002319 .read_status = &genphy_read_status,
2320 .ack_interrupt = &marvell_ack_interrupt,
2321 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002322 .resume = &genphy_resume,
2323 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002324 .read_page = marvell_read_page,
2325 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002326 .get_sset_count = marvell_get_sset_count,
2327 .get_strings = marvell_get_strings,
2328 .get_stats = marvell_get_stats,
Heiner Kallweita319fb52019-10-29 20:25:26 +01002329 .get_tunable = m88e1111_get_tunable,
2330 .set_tunable = m88e1111_set_tunable,
2331 .link_change_notify = m88e1011_link_change_notify,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002332 },
2333 {
David Daney90600732010-11-19 11:58:53 +00002334 .phy_id = MARVELL_PHY_ID_88E1149R,
2335 .phy_id_mask = MARVELL_PHY_ID_MASK,
2336 .name = "Marvell 88E1149R",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002337 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002338 .probe = marvell_probe,
David Daney90600732010-11-19 11:58:53 +00002339 .config_init = &m88e1149_config_init,
2340 .config_aneg = &m88e1118_config_aneg,
David Daney90600732010-11-19 11:58:53 +00002341 .ack_interrupt = &marvell_ack_interrupt,
2342 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002343 .resume = &genphy_resume,
2344 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002345 .read_page = marvell_read_page,
2346 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002347 .get_sset_count = marvell_get_sset_count,
2348 .get_strings = marvell_get_strings,
2349 .get_stats = marvell_get_stats,
David Daney90600732010-11-19 11:58:53 +00002350 },
2351 {
Benjamin Herrenschmidt2f495c32010-06-21 13:20:46 +10002352 .phy_id = MARVELL_PHY_ID_88E1240,
2353 .phy_id_mask = MARVELL_PHY_ID_MASK,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002354 .name = "Marvell 88E1240",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002355 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002356 .probe = marvell_probe,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002357 .config_init = &m88e1111_config_init,
2358 .config_aneg = &marvell_config_aneg,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002359 .ack_interrupt = &marvell_ack_interrupt,
2360 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002361 .resume = &genphy_resume,
2362 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002363 .read_page = marvell_read_page,
2364 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002365 .get_sset_count = marvell_get_sset_count,
2366 .get_strings = marvell_get_strings,
2367 .get_stats = marvell_get_stats,
Olof Johanssonac8c6352007-11-04 16:08:51 -06002368 },
Michal Simek3da09a52013-05-30 20:08:26 +00002369 {
2370 .phy_id = MARVELL_PHY_ID_88E1116R,
2371 .phy_id_mask = MARVELL_PHY_ID_MASK,
2372 .name = "Marvell 88E1116R",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002373 /* PHY_GBIT_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002374 .probe = marvell_probe,
Michal Simek3da09a52013-05-30 20:08:26 +00002375 .config_init = &m88e1116r_config_init,
Michal Simek3da09a52013-05-30 20:08:26 +00002376 .ack_interrupt = &marvell_ack_interrupt,
2377 .config_intr = &marvell_config_intr,
Sebastian Hesselbarth0898b442013-12-13 10:20:26 +01002378 .resume = &genphy_resume,
2379 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002380 .read_page = marvell_read_page,
2381 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002382 .get_sset_count = marvell_get_sset_count,
2383 .get_strings = marvell_get_strings,
2384 .get_stats = marvell_get_stats,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002385 .get_tunable = m88e1011_get_tunable,
2386 .set_tunable = m88e1011_set_tunable,
2387 .link_change_notify = m88e1011_link_change_notify,
Michal Simek3da09a52013-05-30 20:08:26 +00002388 },
Michal Simek10e24caa2013-05-30 20:08:27 +00002389 {
2390 .phy_id = MARVELL_PHY_ID_88E1510,
2391 .phy_id_mask = MARVELL_PHY_ID_MASK,
2392 .name = "Marvell 88E1510",
Andrew Lunn719655a2018-09-29 23:04:16 +02002393 .features = PHY_GBIT_FIBRE_FEATURES,
Andrew Lunn0b046802017-01-20 01:37:49 +01002394 .probe = &m88e1510_probe,
Stefan Roese930b37e2016-02-18 10:59:07 +01002395 .config_init = &m88e1510_config_init,
Michal Simek10e24caa2013-05-30 20:08:27 +00002396 .config_aneg = &m88e1510_config_aneg,
2397 .read_status = &marvell_read_status,
2398 .ack_interrupt = &marvell_ack_interrupt,
2399 .config_intr = &marvell_config_intr,
2400 .did_interrupt = &m88e1121_did_interrupt,
Jingju Houf39aac72017-01-22 18:20:56 +08002401 .get_wol = &m88e1318_get_wol,
2402 .set_wol = &m88e1318_set_wol,
Charles-Antoine Couret3758be32016-07-19 11:13:13 +02002403 .resume = &marvell_resume,
2404 .suspend = &marvell_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002405 .read_page = marvell_read_page,
2406 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002407 .get_sset_count = marvell_get_sset_count,
2408 .get_strings = marvell_get_strings,
2409 .get_stats = marvell_get_stats,
Lin Yun Shengf0f9b4e2017-06-30 17:44:15 +08002410 .set_loopback = genphy_loopback,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002411 .get_tunable = m88e1011_get_tunable,
2412 .set_tunable = m88e1011_set_tunable,
2413 .link_change_notify = m88e1011_link_change_notify,
Michal Simek10e24caa2013-05-30 20:08:27 +00002414 },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002415 {
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002416 .phy_id = MARVELL_PHY_ID_88E1540,
2417 .phy_id_mask = MARVELL_PHY_ID_MASK,
2418 .name = "Marvell 88E1540",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002419 /* PHY_GBIT_FEATURES */
Arnd Bergmann18702412017-01-23 13:18:41 +01002420 .probe = m88e1510_probe,
Clemens Gruber79be1a12016-02-15 23:46:45 +01002421 .config_init = &marvell_config_init,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002422 .config_aneg = &m88e1510_config_aneg,
2423 .read_status = &marvell_read_status,
2424 .ack_interrupt = &marvell_ack_interrupt,
2425 .config_intr = &marvell_config_intr,
2426 .did_interrupt = &m88e1121_did_interrupt,
2427 .resume = &genphy_resume,
2428 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002429 .read_page = marvell_read_page,
2430 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002431 .get_sset_count = marvell_get_sset_count,
2432 .get_strings = marvell_get_strings,
2433 .get_stats = marvell_get_stats,
Heiner Kallweit69f42be2019-03-25 19:35:41 +01002434 .get_tunable = m88e1540_get_tunable,
2435 .set_tunable = m88e1540_set_tunable,
Heiner Kallweit911af5e2019-10-28 20:52:55 +01002436 .link_change_notify = m88e1011_link_change_notify,
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002437 },
2438 {
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002439 .phy_id = MARVELL_PHY_ID_88E1545,
2440 .phy_id_mask = MARVELL_PHY_ID_MASK,
2441 .name = "Marvell 88E1545",
2442 .probe = m88e1510_probe,
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002443 /* PHY_GBIT_FEATURES */
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002444 .config_init = &marvell_config_init,
2445 .config_aneg = &m88e1510_config_aneg,
2446 .read_status = &marvell_read_status,
2447 .ack_interrupt = &marvell_ack_interrupt,
2448 .config_intr = &marvell_config_intr,
2449 .did_interrupt = &m88e1121_did_interrupt,
2450 .resume = &genphy_resume,
2451 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002452 .read_page = marvell_read_page,
2453 .write_page = marvell_write_page,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002454 .get_sset_count = marvell_get_sset_count,
2455 .get_strings = marvell_get_strings,
2456 .get_stats = marvell_get_stats,
Heiner Kallweit262caf42019-10-28 20:54:17 +01002457 .get_tunable = m88e1540_get_tunable,
2458 .set_tunable = m88e1540_set_tunable,
2459 .link_change_notify = m88e1011_link_change_notify,
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002460 },
2461 {
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002462 .phy_id = MARVELL_PHY_ID_88E3016,
2463 .phy_id_mask = MARVELL_PHY_ID_MASK,
2464 .name = "Marvell 88E3016",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002465 /* PHY_BASIC_FEATURES */
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002466 .probe = marvell_probe,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002467 .config_init = &m88e3016_config_init,
2468 .aneg_done = &marvell_aneg_done,
2469 .read_status = &marvell_read_status,
2470 .ack_interrupt = &marvell_ack_interrupt,
2471 .config_intr = &marvell_config_intr,
2472 .did_interrupt = &m88e1121_did_interrupt,
2473 .resume = &genphy_resume,
2474 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002475 .read_page = marvell_read_page,
2476 .write_page = marvell_write_page,
Andrew Lunnd2fa47d2015-12-30 16:28:26 +01002477 .get_sset_count = marvell_get_sset_count,
2478 .get_strings = marvell_get_strings,
2479 .get_stats = marvell_get_stats,
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002480 },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002481 {
2482 .phy_id = MARVELL_PHY_ID_88E6390,
2483 .phy_id_mask = MARVELL_PHY_ID_MASK,
2484 .name = "Marvell 88E6390",
Heiner Kallweitdcdecdc2019-04-12 20:47:03 +02002485 /* PHY_GBIT_FEATURES */
Andrew Lunnfee2d542018-01-09 22:42:09 +01002486 .probe = m88e6390_probe,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002487 .config_init = &marvell_config_init,
Andrew Lunn8cbcdc12019-01-10 22:48:36 +01002488 .config_aneg = &m88e6390_config_aneg,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002489 .read_status = &marvell_read_status,
2490 .ack_interrupt = &marvell_ack_interrupt,
2491 .config_intr = &marvell_config_intr,
2492 .did_interrupt = &m88e1121_did_interrupt,
2493 .resume = &genphy_resume,
2494 .suspend = &genphy_suspend,
Russell King424ca4c2018-01-02 10:58:48 +00002495 .read_page = marvell_read_page,
2496 .write_page = marvell_write_page,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002497 .get_sset_count = marvell_get_sset_count,
2498 .get_strings = marvell_get_strings,
2499 .get_stats = marvell_get_stats,
Heiner Kallweit69f42be2019-03-25 19:35:41 +01002500 .get_tunable = m88e1540_get_tunable,
2501 .set_tunable = m88e1540_set_tunable,
Heiner Kallweit911af5e2019-10-28 20:52:55 +01002502 .link_change_notify = m88e1011_link_change_notify,
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002503 },
Andy Fleming00db8182005-07-30 19:31:23 -04002504};
2505
Johan Hovold50fd7152014-11-11 19:45:59 +01002506module_phy_driver(marvell_drivers);
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002507
Uwe Kleine-Königcf93c942010-10-03 23:43:32 +00002508static struct mdio_device_id __maybe_unused marvell_tbl[] = {
Michal Simekf5e1cab2013-05-30 20:08:25 +00002509 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2510 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2511 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2512 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2513 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2514 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2515 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2516 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2517 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
Michal Simek3da09a52013-05-30 20:08:26 +00002518 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
Michal Simek10e24caa2013-05-30 20:08:27 +00002519 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
Andrew Lunn819ec8e2015-11-16 23:34:41 +01002520 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
Andrew Lunn60f06fd2017-02-02 00:35:03 +01002521 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
Sebastian Hesselbarth6b358ae2014-10-22 20:26:44 +02002522 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
Andrew Lunne4cf8a32017-02-01 03:40:06 +01002523 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
David Woodhouse4e4f10f2010-04-02 01:05:56 +00002524 { }
2525};
2526
2527MODULE_DEVICE_TABLE(mdio, marvell_tbl);