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Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
Jiri Pirko22a67762017-02-03 10:29:07 +01003 * Copyright (c) 2015-2017 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015-2017 Jiri Pirko <jiri@mellanox.com>
Jiri Pirko56ade8f2015-10-16 14:01:37 +02005 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
Jiri Pirko1d20d232016-10-27 15:12:59 +020040#include <linux/pci.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020041#include <linux/netdevice.h>
42#include <linux/etherdevice.h>
43#include <linux/ethtool.h>
44#include <linux/slab.h>
45#include <linux/device.h>
46#include <linux/skbuff.h>
47#include <linux/if_vlan.h>
48#include <linux/if_bridge.h>
49#include <linux/workqueue.h>
50#include <linux/jiffies.h>
51#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010052#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020053#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020054#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020055#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020056#include <net/switchdev.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Yotam Gigi98d0f7b2017-01-23 11:07:11 +010060#include <net/tc_act/tc_sample.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020061
62#include "spectrum.h"
Jiri Pirko1d20d232016-10-27 15:12:59 +020063#include "pci.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020064#include "core.h"
65#include "reg.h"
66#include "port.h"
67#include "trap.h"
68#include "txheader.h"
69
70static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
71static const char mlxsw_sp_driver_version[] = "1.0";
72
73/* tx_hdr_version
74 * Tx header version.
75 * Must be set to 1.
76 */
77MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
78
79/* tx_hdr_ctl
80 * Packet control type.
81 * 0 - Ethernet control (e.g. EMADs, LACP)
82 * 1 - Ethernet data
83 */
84MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
85
86/* tx_hdr_proto
87 * Packet protocol type. Must be set to 1 (Ethernet).
88 */
89MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
90
91/* tx_hdr_rx_is_router
92 * Packet is sent from the router. Valid for data packets only.
93 */
94MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
95
96/* tx_hdr_fid_valid
97 * Indicates if the 'fid' field is valid and should be used for
98 * forwarding lookup. Valid for data packets only.
99 */
100MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
101
102/* tx_hdr_swid
103 * Switch partition ID. Must be set to 0.
104 */
105MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
106
107/* tx_hdr_control_tclass
108 * Indicates if the packet should use the control TClass and not one
109 * of the data TClasses.
110 */
111MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
112
113/* tx_hdr_etclass
114 * Egress TClass to be used on the egress device on the egress port.
115 */
116MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
117
118/* tx_hdr_port_mid
119 * Destination local port for unicast packets.
120 * Destination multicast ID for multicast packets.
121 *
122 * Control packets are directed to a specific egress port, while data
123 * packets are transmitted through the CPU port (0) into the switch partition,
124 * where forwarding rules are applied.
125 */
126MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
127
128/* tx_hdr_fid
129 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
130 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
131 * Valid for data packets only.
132 */
133MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
134
135/* tx_hdr_type
136 * 0 - Data packets
137 * 6 - Control packets
138 */
139MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
140
141static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
142 const struct mlxsw_tx_info *tx_info)
143{
144 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
145
146 memset(txhdr, 0, MLXSW_TXHDR_LEN);
147
148 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
149 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
150 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
151 mlxsw_tx_hdr_swid_set(txhdr, 0);
152 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
153 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
154 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
155}
156
157static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
158{
Elad Raz5b090742016-10-28 21:35:46 +0200159 char spad_pl[MLXSW_REG_SPAD_LEN] = {0};
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200160 int err;
161
162 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
163 if (err)
164 return err;
165 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
166 return 0;
167}
168
Yotam Gigi763b4b72016-07-21 12:03:17 +0200169static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
170{
Yotam Gigi763b4b72016-07-21 12:03:17 +0200171 int i;
172
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200173 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN))
Yotam Gigi763b4b72016-07-21 12:03:17 +0200174 return -EIO;
175
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200176 mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core,
177 MAX_SPAN);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200178 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
179 sizeof(struct mlxsw_sp_span_entry),
180 GFP_KERNEL);
181 if (!mlxsw_sp->span.entries)
182 return -ENOMEM;
183
184 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
185 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
186
187 return 0;
188}
189
190static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
191{
192 int i;
193
194 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
195 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
196
197 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
198 }
199 kfree(mlxsw_sp->span.entries);
200}
201
202static struct mlxsw_sp_span_entry *
203mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
204{
205 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
206 struct mlxsw_sp_span_entry *span_entry;
207 char mpat_pl[MLXSW_REG_MPAT_LEN];
208 u8 local_port = port->local_port;
209 int index;
210 int i;
211 int err;
212
213 /* find a free entry to use */
214 index = -1;
215 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
216 if (!mlxsw_sp->span.entries[i].used) {
217 index = i;
218 span_entry = &mlxsw_sp->span.entries[i];
219 break;
220 }
221 }
222 if (index < 0)
223 return NULL;
224
225 /* create a new port analayzer entry for local_port */
226 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
227 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
228 if (err)
229 return NULL;
230
231 span_entry->used = true;
232 span_entry->id = index;
Yotam Gigi2d644d42016-11-11 16:34:25 +0100233 span_entry->ref_count = 1;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200234 span_entry->local_port = local_port;
235 return span_entry;
236}
237
238static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
239 struct mlxsw_sp_span_entry *span_entry)
240{
241 u8 local_port = span_entry->local_port;
242 char mpat_pl[MLXSW_REG_MPAT_LEN];
243 int pa_id = span_entry->id;
244
245 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
246 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
247 span_entry->used = false;
248}
249
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200250static struct mlxsw_sp_span_entry *
251mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200252{
253 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
254 int i;
255
256 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
257 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
258
259 if (curr->used && curr->local_port == port->local_port)
260 return curr;
261 }
262 return NULL;
263}
264
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200265static struct mlxsw_sp_span_entry
266*mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200267{
268 struct mlxsw_sp_span_entry *span_entry;
269
270 span_entry = mlxsw_sp_span_entry_find(port);
271 if (span_entry) {
Yotam Gigi2d644d42016-11-11 16:34:25 +0100272 /* Already exists, just take a reference */
Yotam Gigi763b4b72016-07-21 12:03:17 +0200273 span_entry->ref_count++;
274 return span_entry;
275 }
276
277 return mlxsw_sp_span_entry_create(port);
278}
279
280static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
281 struct mlxsw_sp_span_entry *span_entry)
282{
Yotam Gigi2d644d42016-11-11 16:34:25 +0100283 WARN_ON(!span_entry->ref_count);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200284 if (--span_entry->ref_count == 0)
285 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
286 return 0;
287}
288
289static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
290{
291 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
292 struct mlxsw_sp_span_inspected_port *p;
293 int i;
294
295 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
296 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
297
298 list_for_each_entry(p, &curr->bound_ports_list, list)
299 if (p->local_port == port->local_port &&
300 p->type == MLXSW_SP_SPAN_EGRESS)
301 return true;
302 }
303
304 return false;
305}
306
307static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
308{
309 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
310}
311
312static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
313{
314 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
315 char sbib_pl[MLXSW_REG_SBIB_LEN];
316 int err;
317
318 /* If port is egress mirrored, the shared buffer size should be
319 * updated according to the mtu value
320 */
321 if (mlxsw_sp_span_is_egress_mirror(port)) {
322 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
323 mlxsw_sp_span_mtu_to_buffsize(mtu));
324 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
325 if (err) {
326 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
327 return err;
328 }
329 }
330
331 return 0;
332}
333
334static struct mlxsw_sp_span_inspected_port *
335mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
336 struct mlxsw_sp_span_entry *span_entry)
337{
338 struct mlxsw_sp_span_inspected_port *p;
339
340 list_for_each_entry(p, &span_entry->bound_ports_list, list)
341 if (port->local_port == p->local_port)
342 return p;
343 return NULL;
344}
345
346static int
347mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
348 struct mlxsw_sp_span_entry *span_entry,
349 enum mlxsw_sp_span_type type)
350{
351 struct mlxsw_sp_span_inspected_port *inspected_port;
352 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
353 char mpar_pl[MLXSW_REG_MPAR_LEN];
354 char sbib_pl[MLXSW_REG_SBIB_LEN];
355 int pa_id = span_entry->id;
356 int err;
357
358 /* if it is an egress SPAN, bind a shared buffer to it */
359 if (type == MLXSW_SP_SPAN_EGRESS) {
360 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
361 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
362 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
363 if (err) {
364 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
365 return err;
366 }
367 }
368
369 /* bind the port to the SPAN entry */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200370 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
371 (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200372 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
373 if (err)
374 goto err_mpar_reg_write;
375
376 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
377 if (!inspected_port) {
378 err = -ENOMEM;
379 goto err_inspected_port_alloc;
380 }
381 inspected_port->local_port = port->local_port;
382 inspected_port->type = type;
383 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
384
385 return 0;
386
387err_mpar_reg_write:
388err_inspected_port_alloc:
389 if (type == MLXSW_SP_SPAN_EGRESS) {
390 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
391 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
392 }
393 return err;
394}
395
396static void
397mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
398 struct mlxsw_sp_span_entry *span_entry,
399 enum mlxsw_sp_span_type type)
400{
401 struct mlxsw_sp_span_inspected_port *inspected_port;
402 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
403 char mpar_pl[MLXSW_REG_MPAR_LEN];
404 char sbib_pl[MLXSW_REG_SBIB_LEN];
405 int pa_id = span_entry->id;
406
407 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
408 if (!inspected_port)
409 return;
410
411 /* remove the inspected port */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200412 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
413 (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200414 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
415
416 /* remove the SBIB buffer if it was egress SPAN */
417 if (type == MLXSW_SP_SPAN_EGRESS) {
418 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
419 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
420 }
421
422 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
423
424 list_del(&inspected_port->list);
425 kfree(inspected_port);
426}
427
428static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
429 struct mlxsw_sp_port *to,
430 enum mlxsw_sp_span_type type)
431{
432 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
433 struct mlxsw_sp_span_entry *span_entry;
434 int err;
435
436 span_entry = mlxsw_sp_span_entry_get(to);
437 if (!span_entry)
438 return -ENOENT;
439
440 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
441 span_entry->id);
442
443 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
444 if (err)
445 goto err_port_bind;
446
447 return 0;
448
449err_port_bind:
450 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
451 return err;
452}
453
454static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
455 struct mlxsw_sp_port *to,
456 enum mlxsw_sp_span_type type)
457{
458 struct mlxsw_sp_span_entry *span_entry;
459
460 span_entry = mlxsw_sp_span_entry_find(to);
461 if (!span_entry) {
462 netdev_err(from->dev, "no span entry found\n");
463 return;
464 }
465
466 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
467 span_entry->id);
468 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
469}
470
Yotam Gigi98d0f7b2017-01-23 11:07:11 +0100471static int mlxsw_sp_port_sample_set(struct mlxsw_sp_port *mlxsw_sp_port,
472 bool enable, u32 rate)
473{
474 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
475 char mpsc_pl[MLXSW_REG_MPSC_LEN];
476
477 mlxsw_reg_mpsc_pack(mpsc_pl, mlxsw_sp_port->local_port, enable, rate);
478 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpsc), mpsc_pl);
479}
480
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200481static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
482 bool is_up)
483{
484 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
485 char paos_pl[MLXSW_REG_PAOS_LEN];
486
487 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
488 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
489 MLXSW_PORT_ADMIN_STATUS_DOWN);
490 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
491}
492
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200493static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
494 unsigned char *addr)
495{
496 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
497 char ppad_pl[MLXSW_REG_PPAD_LEN];
498
499 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
500 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
501 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
502}
503
504static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
505{
506 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
507 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
508
509 ether_addr_copy(addr, mlxsw_sp->base_mac);
510 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
511 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
512}
513
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200514static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
515{
516 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
517 char pmtu_pl[MLXSW_REG_PMTU_LEN];
518 int max_mtu;
519 int err;
520
521 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
522 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
523 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
524 if (err)
525 return err;
526 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
527
528 if (mtu > max_mtu)
529 return -EINVAL;
530
531 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
532 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
533}
534
Ido Schimmelbe945352016-06-09 09:51:39 +0200535static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
536 u8 swid)
537{
538 char pspa_pl[MLXSW_REG_PSPA_LEN];
539
540 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
541 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
542}
543
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200544static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
545{
546 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200547
Ido Schimmelbe945352016-06-09 09:51:39 +0200548 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
549 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200550}
551
552static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
553 bool enable)
554{
555 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
556 char svpe_pl[MLXSW_REG_SVPE_LEN];
557
558 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
559 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
560}
561
562int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
563 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
564 u16 vid)
565{
566 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
567 char svfa_pl[MLXSW_REG_SVFA_LEN];
568
569 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
570 fid, vid);
571 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
572}
573
Ido Schimmel584d73d2016-08-24 12:00:26 +0200574int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
575 u16 vid_begin, u16 vid_end,
576 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200577{
578 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
579 char *spvmlr_pl;
580 int err;
581
582 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
583 if (!spvmlr_pl)
584 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200585 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
586 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200587 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
588 kfree(spvmlr_pl);
589 return err;
590}
591
Ido Schimmel584d73d2016-08-24 12:00:26 +0200592static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
593 u16 vid, bool learn_enable)
594{
595 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
596 learn_enable);
597}
598
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200599static int
600mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
601{
602 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
603 char sspr_pl[MLXSW_REG_SSPR_LEN];
604
605 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
606 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
607}
608
Ido Schimmeld664b412016-06-09 09:51:40 +0200609static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
610 u8 local_port, u8 *p_module,
611 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200612{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200613 char pmlp_pl[MLXSW_REG_PMLP_LEN];
614 int err;
615
Ido Schimmel558c2d52016-02-26 17:32:29 +0100616 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200617 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
618 if (err)
619 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100620 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
621 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200622 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200623 return 0;
624}
625
Ido Schimmel18f1e702016-02-26 17:32:31 +0100626static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
627 u8 module, u8 width, u8 lane)
628{
629 char pmlp_pl[MLXSW_REG_PMLP_LEN];
630 int i;
631
632 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
633 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
634 for (i = 0; i < width; i++) {
635 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
636 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
637 }
638
639 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
640}
641
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100642static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
643{
644 char pmlp_pl[MLXSW_REG_PMLP_LEN];
645
646 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
647 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
648 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
649}
650
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200651static int mlxsw_sp_port_open(struct net_device *dev)
652{
653 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
654 int err;
655
656 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
657 if (err)
658 return err;
659 netif_start_queue(dev);
660 return 0;
661}
662
663static int mlxsw_sp_port_stop(struct net_device *dev)
664{
665 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
666
667 netif_stop_queue(dev);
668 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
669}
670
671static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
672 struct net_device *dev)
673{
674 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
675 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
676 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
677 const struct mlxsw_tx_info tx_info = {
678 .local_port = mlxsw_sp_port->local_port,
679 .is_emad = false,
680 };
681 u64 len;
682 int err;
683
Jiri Pirko307c2432016-04-08 19:11:22 +0200684 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200685 return NETDEV_TX_BUSY;
686
687 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
688 struct sk_buff *skb_orig = skb;
689
690 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
691 if (!skb) {
692 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
693 dev_kfree_skb_any(skb_orig);
694 return NETDEV_TX_OK;
695 }
Arkadi Sharshevsky36bf38d2017-01-12 09:10:37 +0100696 dev_consume_skb_any(skb_orig);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200697 }
698
699 if (eth_skb_pad(skb)) {
700 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
701 return NETDEV_TX_OK;
702 }
703
704 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200705 /* TX header is consumed by HW on the way so we shouldn't count its
706 * bytes as being sent.
707 */
708 len = skb->len - MLXSW_TXHDR_LEN;
709
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200710 /* Due to a race we might fail here because of a full queue. In that
711 * unlikely case we simply drop the packet.
712 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200713 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200714
715 if (!err) {
716 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
717 u64_stats_update_begin(&pcpu_stats->syncp);
718 pcpu_stats->tx_packets++;
719 pcpu_stats->tx_bytes += len;
720 u64_stats_update_end(&pcpu_stats->syncp);
721 } else {
722 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
723 dev_kfree_skb_any(skb);
724 }
725 return NETDEV_TX_OK;
726}
727
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100728static void mlxsw_sp_set_rx_mode(struct net_device *dev)
729{
730}
731
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200732static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
733{
734 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
735 struct sockaddr *addr = p;
736 int err;
737
738 if (!is_valid_ether_addr(addr->sa_data))
739 return -EADDRNOTAVAIL;
740
741 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
742 if (err)
743 return err;
744 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
745 return 0;
746}
747
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200748static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200749 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200750{
751 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
752
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200753 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
754 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200755
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200756 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200757 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200758 pg_size + delay, pg_size);
759 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200760 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200761}
762
763int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200764 u8 *prio_tc, bool pause_en,
765 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200766{
767 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200768 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
769 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200770 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200771 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200772
773 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
774 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
775 if (err)
776 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200777
778 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
779 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200780 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200781
782 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
783 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200784 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200785 configure = true;
786 break;
787 }
788 }
789
790 if (!configure)
791 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200792 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200793 }
794
Ido Schimmelff6551e2016-04-06 17:10:03 +0200795 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
796}
797
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200798static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200799 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200800{
801 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
802 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200803 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200804 u8 *prio_tc;
805
806 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200807 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200808
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200809 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200810 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200811}
812
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200813static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
814{
815 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200816 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200817 int err;
818
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200819 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200820 if (err)
821 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200822 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
823 if (err)
824 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200825 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
826 if (err)
827 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200828 dev->mtu = mtu;
829 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200830
831err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200832 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
833err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200834 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200835 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200836}
837
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300838static int
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200839mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
840 struct rtnl_link_stats64 *stats)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200841{
842 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
843 struct mlxsw_sp_port_pcpu_stats *p;
844 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
845 u32 tx_dropped = 0;
846 unsigned int start;
847 int i;
848
849 for_each_possible_cpu(i) {
850 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
851 do {
852 start = u64_stats_fetch_begin_irq(&p->syncp);
853 rx_packets = p->rx_packets;
854 rx_bytes = p->rx_bytes;
855 tx_packets = p->tx_packets;
856 tx_bytes = p->tx_bytes;
857 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
858
859 stats->rx_packets += rx_packets;
860 stats->rx_bytes += rx_bytes;
861 stats->tx_packets += tx_packets;
862 stats->tx_bytes += tx_bytes;
863 /* tx_dropped is u32, updated without syncp protection. */
864 tx_dropped += p->tx_dropped;
865 }
866 stats->tx_dropped = tx_dropped;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200867 return 0;
868}
869
Or Gerlitz3df5b3c2016-11-22 23:09:54 +0200870static bool mlxsw_sp_port_has_offload_stats(const struct net_device *dev, int attr_id)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200871{
872 switch (attr_id) {
873 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
874 return true;
875 }
876
877 return false;
878}
879
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300880static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
881 void *sp)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200882{
883 switch (attr_id) {
884 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
885 return mlxsw_sp_port_get_sw_stats64(dev, sp);
886 }
887
888 return -EINVAL;
889}
890
891static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
892 int prio, char *ppcnt_pl)
893{
894 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
895 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
896
897 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
898 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
899}
900
901static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
902 struct rtnl_link_stats64 *stats)
903{
904 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
905 int err;
906
907 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
908 0, ppcnt_pl);
909 if (err)
910 goto out;
911
912 stats->tx_packets =
913 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
914 stats->rx_packets =
915 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
916 stats->tx_bytes =
917 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
918 stats->rx_bytes =
919 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
920 stats->multicast =
921 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
922
923 stats->rx_crc_errors =
924 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
925 stats->rx_frame_errors =
926 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
927
928 stats->rx_length_errors = (
929 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
930 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
931 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
932
933 stats->rx_errors = (stats->rx_crc_errors +
934 stats->rx_frame_errors + stats->rx_length_errors);
935
936out:
937 return err;
938}
939
940static void update_stats_cache(struct work_struct *work)
941{
942 struct mlxsw_sp_port *mlxsw_sp_port =
943 container_of(work, struct mlxsw_sp_port,
944 hw_stats.update_dw.work);
945
946 if (!netif_carrier_ok(mlxsw_sp_port->dev))
947 goto out;
948
949 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
950 mlxsw_sp_port->hw_stats.cache);
951
952out:
953 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
954 MLXSW_HW_STATS_UPDATE_TIME);
955}
956
957/* Return the stats from a cache that is updated periodically,
958 * as this function might get called in an atomic context.
959 */
stephen hemmingerbc1f4472017-01-06 19:12:52 -0800960static void
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200961mlxsw_sp_port_get_stats64(struct net_device *dev,
962 struct rtnl_link_stats64 *stats)
963{
964 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
965
966 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200967}
968
969int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
970 u16 vid_end, bool is_member, bool untagged)
971{
972 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
973 char *spvm_pl;
974 int err;
975
976 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
977 if (!spvm_pl)
978 return -ENOMEM;
979
980 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
981 vid_end, is_member, untagged);
982 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
983 kfree(spvm_pl);
984 return err;
985}
986
987static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
988{
989 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
990 u16 vid, last_visited_vid;
991 int err;
992
993 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
994 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
995 vid);
996 if (err) {
997 last_visited_vid = vid;
998 goto err_port_vid_to_fid_set;
999 }
1000 }
1001
1002 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
1003 if (err) {
1004 last_visited_vid = VLAN_N_VID;
1005 goto err_port_vid_to_fid_set;
1006 }
1007
1008 return 0;
1009
1010err_port_vid_to_fid_set:
1011 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
1012 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
1013 vid);
1014 return err;
1015}
1016
1017static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1018{
1019 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1020 u16 vid;
1021 int err;
1022
1023 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1024 if (err)
1025 return err;
1026
1027 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1028 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1029 vid, vid);
1030 if (err)
1031 return err;
1032 }
1033
1034 return 0;
1035}
1036
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001037static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +02001038mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001039{
1040 struct mlxsw_sp_port *mlxsw_sp_vport;
1041
1042 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1043 if (!mlxsw_sp_vport)
1044 return NULL;
1045
1046 /* dev will be set correctly after the VLAN device is linked
1047 * with the real device. In case of bridge SELF invocation, dev
1048 * will remain as is.
1049 */
1050 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1051 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1052 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1053 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +01001054 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1055 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +02001056 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001057
1058 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1059
1060 return mlxsw_sp_vport;
1061}
1062
1063static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1064{
1065 list_del(&mlxsw_sp_vport->vport.list);
1066 kfree(mlxsw_sp_vport);
1067}
1068
Ido Schimmel05978482016-08-17 16:39:30 +02001069static int mlxsw_sp_port_add_vid(struct net_device *dev,
1070 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001071{
1072 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001073 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +02001074 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001075 int err;
1076
1077 /* VLAN 0 is added to HW filter when device goes up, but it is
1078 * reserved in our case, so simply return.
1079 */
1080 if (!vid)
1081 return 0;
1082
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001083 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001084 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001085
Ido Schimmel0355b592016-06-20 23:04:13 +02001086 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001087 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02001088 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001089
1090 /* When adding the first VLAN interface on a bridged port we need to
1091 * transition all the active 802.1Q bridge VLANs to use explicit
1092 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1093 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001094 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001095 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001096 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001097 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001098 }
1099
Ido Schimmel52697a92016-07-02 11:00:09 +02001100 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001101 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001102 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001103
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001104 return 0;
1105
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001106err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001107 if (list_is_singular(&mlxsw_sp_port->vports_list))
1108 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1109err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001110 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001111 return err;
1112}
1113
Ido Schimmel32d863f2016-07-02 11:00:10 +02001114static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1115 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001116{
1117 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001118 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001119 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001120
1121 /* VLAN 0 is removed from HW filter when device goes down, but
1122 * it is reserved in our case, so simply return.
1123 */
1124 if (!vid)
1125 return 0;
1126
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001127 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001128 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001129 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001130
Ido Schimmel7a355832016-08-17 16:39:28 +02001131 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001132
Ido Schimmel1c800752016-06-20 23:04:20 +02001133 /* Drop FID reference. If this was the last reference the
1134 * resources will be freed.
1135 */
1136 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1137 if (f && !WARN_ON(!f->leave))
1138 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001139
1140 /* When removing the last VLAN interface on a bridged port we need to
1141 * transition all active 802.1Q bridge VLANs to use VID to FID
1142 * mappings and set port's mode to VLAN mode.
1143 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001144 if (list_is_singular(&mlxsw_sp_port->vports_list))
1145 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001146
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001147 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1148
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001149 return 0;
1150}
1151
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001152static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1153 size_t len)
1154{
1155 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001156 u8 module = mlxsw_sp_port->mapping.module;
1157 u8 width = mlxsw_sp_port->mapping.width;
1158 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001159 int err;
1160
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001161 if (!mlxsw_sp_port->split)
1162 err = snprintf(name, len, "p%d", module + 1);
1163 else
1164 err = snprintf(name, len, "p%ds%d", module + 1,
1165 lane / width);
1166
1167 if (err >= len)
1168 return -EINVAL;
1169
1170 return 0;
1171}
1172
Yotam Gigi763b4b72016-07-21 12:03:17 +02001173static struct mlxsw_sp_port_mall_tc_entry *
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001174mlxsw_sp_port_mall_tc_entry_find(struct mlxsw_sp_port *port,
1175 unsigned long cookie) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001176 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1177
1178 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1179 if (mall_tc_entry->cookie == cookie)
1180 return mall_tc_entry;
1181
1182 return NULL;
1183}
1184
1185static int
1186mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001187 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001188 const struct tc_action *a,
1189 bool ingress)
1190{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001191 struct net *net = dev_net(mlxsw_sp_port->dev);
1192 enum mlxsw_sp_span_type span_type;
1193 struct mlxsw_sp_port *to_port;
1194 struct net_device *to_dev;
1195 int ifindex;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001196
1197 ifindex = tcf_mirred_ifindex(a);
1198 to_dev = __dev_get_by_index(net, ifindex);
1199 if (!to_dev) {
1200 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1201 return -EINVAL;
1202 }
1203
1204 if (!mlxsw_sp_port_dev_check(to_dev)) {
1205 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
Yotam Gigie915ac62017-01-09 11:25:48 +01001206 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001207 }
1208 to_port = netdev_priv(to_dev);
1209
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001210 mirror->to_local_port = to_port->local_port;
1211 mirror->ingress = ingress;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001212 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001213 return mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1214}
Yotam Gigi763b4b72016-07-21 12:03:17 +02001215
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001216static void
1217mlxsw_sp_port_del_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1218 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror)
1219{
1220 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1221 enum mlxsw_sp_span_type span_type;
1222 struct mlxsw_sp_port *to_port;
1223
1224 to_port = mlxsw_sp->ports[mirror->to_local_port];
1225 span_type = mirror->ingress ?
1226 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1227 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001228}
1229
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001230static int
1231mlxsw_sp_port_add_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port,
1232 struct tc_cls_matchall_offload *cls,
1233 const struct tc_action *a,
1234 bool ingress)
1235{
1236 int err;
1237
1238 if (!mlxsw_sp_port->sample)
1239 return -EOPNOTSUPP;
1240 if (rtnl_dereference(mlxsw_sp_port->sample->psample_group)) {
1241 netdev_err(mlxsw_sp_port->dev, "sample already active\n");
1242 return -EEXIST;
1243 }
1244 if (tcf_sample_rate(a) > MLXSW_REG_MPSC_RATE_MAX) {
1245 netdev_err(mlxsw_sp_port->dev, "sample rate not supported\n");
1246 return -EOPNOTSUPP;
1247 }
1248
1249 rcu_assign_pointer(mlxsw_sp_port->sample->psample_group,
1250 tcf_sample_psample_group(a));
1251 mlxsw_sp_port->sample->truncate = tcf_sample_truncate(a);
1252 mlxsw_sp_port->sample->trunc_size = tcf_sample_trunc_size(a);
1253 mlxsw_sp_port->sample->rate = tcf_sample_rate(a);
1254
1255 err = mlxsw_sp_port_sample_set(mlxsw_sp_port, true, tcf_sample_rate(a));
1256 if (err)
1257 goto err_port_sample_set;
1258 return 0;
1259
1260err_port_sample_set:
1261 RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1262 return err;
1263}
1264
1265static void
1266mlxsw_sp_port_del_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port)
1267{
1268 if (!mlxsw_sp_port->sample)
1269 return;
1270
1271 mlxsw_sp_port_sample_set(mlxsw_sp_port, false, 1);
1272 RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1273}
1274
Yotam Gigi763b4b72016-07-21 12:03:17 +02001275static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1276 __be16 protocol,
1277 struct tc_cls_matchall_offload *cls,
1278 bool ingress)
1279{
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001280 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001281 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001282 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001283 int err;
1284
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001285 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001286 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
Yotam Gigie915ac62017-01-09 11:25:48 +01001287 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001288 }
1289
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001290 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1291 if (!mall_tc_entry)
1292 return -ENOMEM;
1293 mall_tc_entry->cookie = cls->cookie;
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001294
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001295 tcf_exts_to_list(cls->exts, &actions);
1296 a = list_first_entry(&actions, struct tc_action, list);
1297
1298 if (is_tcf_mirred_egress_mirror(a) && protocol == htons(ETH_P_ALL)) {
1299 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror;
1300
1301 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1302 mirror = &mall_tc_entry->mirror;
1303 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port,
1304 mirror, a, ingress);
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001305 } else if (is_tcf_sample(a) && protocol == htons(ETH_P_ALL)) {
1306 mall_tc_entry->type = MLXSW_SP_PORT_MALL_SAMPLE;
1307 err = mlxsw_sp_port_add_cls_matchall_sample(mlxsw_sp_port, cls,
1308 a, ingress);
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001309 } else {
1310 err = -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001311 }
1312
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001313 if (err)
1314 goto err_add_action;
1315
1316 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001317 return 0;
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001318
1319err_add_action:
1320 kfree(mall_tc_entry);
1321 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001322}
1323
1324static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1325 struct tc_cls_matchall_offload *cls)
1326{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001327 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001328
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001329 mall_tc_entry = mlxsw_sp_port_mall_tc_entry_find(mlxsw_sp_port,
1330 cls->cookie);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001331 if (!mall_tc_entry) {
1332 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1333 return;
1334 }
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001335 list_del(&mall_tc_entry->list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001336
1337 switch (mall_tc_entry->type) {
1338 case MLXSW_SP_PORT_MALL_MIRROR:
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001339 mlxsw_sp_port_del_cls_matchall_mirror(mlxsw_sp_port,
1340 &mall_tc_entry->mirror);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001341 break;
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01001342 case MLXSW_SP_PORT_MALL_SAMPLE:
1343 mlxsw_sp_port_del_cls_matchall_sample(mlxsw_sp_port);
1344 break;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001345 default:
1346 WARN_ON(1);
1347 }
1348
Yotam Gigi763b4b72016-07-21 12:03:17 +02001349 kfree(mall_tc_entry);
1350}
1351
1352static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1353 __be16 proto, struct tc_to_netdev *tc)
1354{
1355 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1356 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1357
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +01001358 switch (tc->type) {
1359 case TC_SETUP_MATCHALL:
Yotam Gigi763b4b72016-07-21 12:03:17 +02001360 switch (tc->cls_mall->command) {
1361 case TC_CLSMATCHALL_REPLACE:
1362 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1363 proto,
1364 tc->cls_mall,
1365 ingress);
1366 case TC_CLSMATCHALL_DESTROY:
1367 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1368 tc->cls_mall);
1369 return 0;
1370 default:
1371 return -EINVAL;
1372 }
Jiri Pirko7aa0f5a2017-02-03 10:29:09 +01001373 case TC_SETUP_CLSFLOWER:
1374 switch (tc->cls_flower->command) {
1375 case TC_CLSFLOWER_REPLACE:
1376 return mlxsw_sp_flower_replace(mlxsw_sp_port, ingress,
1377 proto, tc->cls_flower);
1378 case TC_CLSFLOWER_DESTROY:
1379 mlxsw_sp_flower_destroy(mlxsw_sp_port, ingress,
1380 tc->cls_flower);
1381 return 0;
1382 default:
1383 return -EOPNOTSUPP;
1384 }
Yotam Gigi763b4b72016-07-21 12:03:17 +02001385 }
1386
Yotam Gigie915ac62017-01-09 11:25:48 +01001387 return -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001388}
1389
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001390static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1391 .ndo_open = mlxsw_sp_port_open,
1392 .ndo_stop = mlxsw_sp_port_stop,
1393 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001394 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001395 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001396 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1397 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1398 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001399 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1400 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001401 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1402 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
1403 .ndo_fdb_add = switchdev_port_fdb_add,
1404 .ndo_fdb_del = switchdev_port_fdb_del,
1405 .ndo_fdb_dump = switchdev_port_fdb_dump,
1406 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1407 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1408 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001409 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001410};
1411
1412static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1413 struct ethtool_drvinfo *drvinfo)
1414{
1415 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1416 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1417
1418 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1419 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1420 sizeof(drvinfo->version));
1421 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1422 "%d.%d.%d",
1423 mlxsw_sp->bus_info->fw_rev.major,
1424 mlxsw_sp->bus_info->fw_rev.minor,
1425 mlxsw_sp->bus_info->fw_rev.subminor);
1426 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1427 sizeof(drvinfo->bus_info));
1428}
1429
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001430static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1431 struct ethtool_pauseparam *pause)
1432{
1433 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1434
1435 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1436 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1437}
1438
1439static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1440 struct ethtool_pauseparam *pause)
1441{
1442 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1443
1444 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1445 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1446 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1447
1448 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1449 pfcc_pl);
1450}
1451
1452static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1453 struct ethtool_pauseparam *pause)
1454{
1455 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1456 bool pause_en = pause->tx_pause || pause->rx_pause;
1457 int err;
1458
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001459 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1460 netdev_err(dev, "PFC already enabled on port\n");
1461 return -EINVAL;
1462 }
1463
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001464 if (pause->autoneg) {
1465 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1466 return -EINVAL;
1467 }
1468
1469 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1470 if (err) {
1471 netdev_err(dev, "Failed to configure port's headroom\n");
1472 return err;
1473 }
1474
1475 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1476 if (err) {
1477 netdev_err(dev, "Failed to set PAUSE parameters\n");
1478 goto err_port_pause_configure;
1479 }
1480
1481 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1482 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1483
1484 return 0;
1485
1486err_port_pause_configure:
1487 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1488 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1489 return err;
1490}
1491
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001492struct mlxsw_sp_port_hw_stats {
1493 char str[ETH_GSTRING_LEN];
Jiri Pirko412791d2016-10-21 16:07:19 +02001494 u64 (*getter)(const char *payload);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001495};
1496
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001497static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001498 {
1499 .str = "a_frames_transmitted_ok",
1500 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1501 },
1502 {
1503 .str = "a_frames_received_ok",
1504 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1505 },
1506 {
1507 .str = "a_frame_check_sequence_errors",
1508 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1509 },
1510 {
1511 .str = "a_alignment_errors",
1512 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1513 },
1514 {
1515 .str = "a_octets_transmitted_ok",
1516 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1517 },
1518 {
1519 .str = "a_octets_received_ok",
1520 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1521 },
1522 {
1523 .str = "a_multicast_frames_xmitted_ok",
1524 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1525 },
1526 {
1527 .str = "a_broadcast_frames_xmitted_ok",
1528 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1529 },
1530 {
1531 .str = "a_multicast_frames_received_ok",
1532 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1533 },
1534 {
1535 .str = "a_broadcast_frames_received_ok",
1536 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1537 },
1538 {
1539 .str = "a_in_range_length_errors",
1540 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1541 },
1542 {
1543 .str = "a_out_of_range_length_field",
1544 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1545 },
1546 {
1547 .str = "a_frame_too_long_errors",
1548 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1549 },
1550 {
1551 .str = "a_symbol_error_during_carrier",
1552 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1553 },
1554 {
1555 .str = "a_mac_control_frames_transmitted",
1556 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1557 },
1558 {
1559 .str = "a_mac_control_frames_received",
1560 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1561 },
1562 {
1563 .str = "a_unsupported_opcodes_received",
1564 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1565 },
1566 {
1567 .str = "a_pause_mac_ctrl_frames_received",
1568 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1569 },
1570 {
1571 .str = "a_pause_mac_ctrl_frames_xmitted",
1572 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1573 },
1574};
1575
1576#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1577
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001578static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1579 {
1580 .str = "rx_octets_prio",
1581 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1582 },
1583 {
1584 .str = "rx_frames_prio",
1585 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1586 },
1587 {
1588 .str = "tx_octets_prio",
1589 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1590 },
1591 {
1592 .str = "tx_frames_prio",
1593 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1594 },
1595 {
1596 .str = "rx_pause_prio",
1597 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1598 },
1599 {
1600 .str = "rx_pause_duration_prio",
1601 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1602 },
1603 {
1604 .str = "tx_pause_prio",
1605 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1606 },
1607 {
1608 .str = "tx_pause_duration_prio",
1609 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1610 },
1611};
1612
1613#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1614
Jiri Pirko412791d2016-10-21 16:07:19 +02001615static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(const char *ppcnt_pl)
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001616{
1617 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1618
1619 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1620}
1621
1622static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1623 {
1624 .str = "tc_transmit_queue_tc",
1625 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1626 },
1627 {
1628 .str = "tc_no_buffer_discard_uc_tc",
1629 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1630 },
1631};
1632
1633#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1634
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001635#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001636 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1637 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001638 IEEE_8021QAZ_MAX_TCS)
1639
1640static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1641{
1642 int i;
1643
1644 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1645 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1646 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1647 *p += ETH_GSTRING_LEN;
1648 }
1649}
1650
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001651static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1652{
1653 int i;
1654
1655 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1656 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1657 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1658 *p += ETH_GSTRING_LEN;
1659 }
1660}
1661
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001662static void mlxsw_sp_port_get_strings(struct net_device *dev,
1663 u32 stringset, u8 *data)
1664{
1665 u8 *p = data;
1666 int i;
1667
1668 switch (stringset) {
1669 case ETH_SS_STATS:
1670 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1671 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1672 ETH_GSTRING_LEN);
1673 p += ETH_GSTRING_LEN;
1674 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001675
1676 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1677 mlxsw_sp_port_get_prio_strings(&p, i);
1678
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001679 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1680 mlxsw_sp_port_get_tc_strings(&p, i);
1681
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001682 break;
1683 }
1684}
1685
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001686static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1687 enum ethtool_phys_id_state state)
1688{
1689 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1690 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1691 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1692 bool active;
1693
1694 switch (state) {
1695 case ETHTOOL_ID_ACTIVE:
1696 active = true;
1697 break;
1698 case ETHTOOL_ID_INACTIVE:
1699 active = false;
1700 break;
1701 default:
1702 return -EOPNOTSUPP;
1703 }
1704
1705 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1706 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1707}
1708
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001709static int
1710mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1711 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1712{
1713 switch (grp) {
1714 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1715 *p_hw_stats = mlxsw_sp_port_hw_stats;
1716 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1717 break;
1718 case MLXSW_REG_PPCNT_PRIO_CNT:
1719 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1720 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1721 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001722 case MLXSW_REG_PPCNT_TC_CNT:
1723 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1724 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1725 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001726 default:
1727 WARN_ON(1);
Yotam Gigie915ac62017-01-09 11:25:48 +01001728 return -EOPNOTSUPP;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001729 }
1730 return 0;
1731}
1732
1733static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1734 enum mlxsw_reg_ppcnt_grp grp, int prio,
1735 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001736{
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001737 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001738 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001739 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001740 int err;
1741
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001742 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1743 if (err)
1744 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001745 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001746 for (i = 0; i < len; i++)
Colin Ian Kingfaac0ff2016-09-23 12:02:45 +01001747 data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001748}
1749
1750static void mlxsw_sp_port_get_stats(struct net_device *dev,
1751 struct ethtool_stats *stats, u64 *data)
1752{
1753 int i, data_index = 0;
1754
1755 /* IEEE 802.3 Counters */
1756 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1757 data, data_index);
1758 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1759
1760 /* Per-Priority Counters */
1761 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1762 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1763 data, data_index);
1764 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1765 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001766
1767 /* Per-TC Counters */
1768 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1769 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1770 data, data_index);
1771 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1772 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001773}
1774
1775static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1776{
1777 switch (sset) {
1778 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001779 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001780 default:
1781 return -EOPNOTSUPP;
1782 }
1783}
1784
1785struct mlxsw_sp_port_link_mode {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001786 enum ethtool_link_mode_bit_indices mask_ethtool;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001787 u32 mask;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001788 u32 speed;
1789};
1790
1791static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1792 {
1793 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001794 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1795 .speed = SPEED_100,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001796 },
1797 {
1798 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1799 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001800 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1801 .speed = SPEED_1000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001802 },
1803 {
1804 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001805 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1806 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001807 },
1808 {
1809 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1810 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001811 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1812 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001813 },
1814 {
1815 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1816 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1817 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1818 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001819 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1820 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001821 },
1822 {
1823 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001824 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1825 .speed = SPEED_20000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001826 },
1827 {
1828 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001829 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1830 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001831 },
1832 {
1833 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001834 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1835 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001836 },
1837 {
1838 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001839 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1840 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001841 },
1842 {
1843 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001844 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1845 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001846 },
1847 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001848 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
1849 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1850 .speed = SPEED_25000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001851 },
1852 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001853 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
1854 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1855 .speed = SPEED_25000,
1856 },
1857 {
1858 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1859 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1860 .speed = SPEED_25000,
1861 },
1862 {
1863 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1864 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1865 .speed = SPEED_25000,
1866 },
1867 {
1868 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
1869 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1870 .speed = SPEED_50000,
1871 },
1872 {
1873 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1874 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1875 .speed = SPEED_50000,
1876 },
1877 {
1878 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
1879 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1880 .speed = SPEED_50000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001881 },
1882 {
1883 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001884 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
1885 .speed = SPEED_56000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001886 },
1887 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001888 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1889 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
1890 .speed = SPEED_56000,
1891 },
1892 {
1893 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1894 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
1895 .speed = SPEED_56000,
1896 },
1897 {
1898 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1899 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
1900 .speed = SPEED_56000,
1901 },
1902 {
1903 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
1904 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1905 .speed = SPEED_100000,
1906 },
1907 {
1908 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
1909 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1910 .speed = SPEED_100000,
1911 },
1912 {
1913 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
1914 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1915 .speed = SPEED_100000,
1916 },
1917 {
1918 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1919 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1920 .speed = SPEED_100000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001921 },
1922};
1923
1924#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1925
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001926static void
1927mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
1928 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001929{
1930 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1931 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1932 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1933 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1934 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1935 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001936 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001937
1938 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1939 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1940 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1941 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1942 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001943 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001944}
1945
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001946static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001947{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001948 int i;
1949
1950 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1951 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001952 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1953 mode);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001954 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001955}
1956
1957static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001958 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001959{
1960 u32 speed = SPEED_UNKNOWN;
1961 u8 duplex = DUPLEX_UNKNOWN;
1962 int i;
1963
1964 if (!carrier_ok)
1965 goto out;
1966
1967 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1968 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1969 speed = mlxsw_sp_port_link_mode[i].speed;
1970 duplex = DUPLEX_FULL;
1971 break;
1972 }
1973 }
1974out:
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001975 cmd->base.speed = speed;
1976 cmd->base.duplex = duplex;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001977}
1978
1979static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1980{
1981 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1982 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1983 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1984 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1985 return PORT_FIBRE;
1986
1987 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1988 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1989 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1990 return PORT_DA;
1991
1992 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1993 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1994 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1995 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1996 return PORT_NONE;
1997
1998 return PORT_OTHER;
1999}
2000
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002001static u32
2002mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002003{
2004 u32 ptys_proto = 0;
2005 int i;
2006
2007 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002008 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
2009 cmd->link_modes.advertising))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002010 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2011 }
2012 return ptys_proto;
2013}
2014
2015static u32 mlxsw_sp_to_ptys_speed(u32 speed)
2016{
2017 u32 ptys_proto = 0;
2018 int i;
2019
2020 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2021 if (speed == mlxsw_sp_port_link_mode[i].speed)
2022 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2023 }
2024 return ptys_proto;
2025}
2026
Ido Schimmel18f1e702016-02-26 17:32:31 +01002027static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
2028{
2029 u32 ptys_proto = 0;
2030 int i;
2031
2032 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2033 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
2034 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
2035 }
2036 return ptys_proto;
2037}
2038
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002039static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
2040 struct ethtool_link_ksettings *cmd)
2041{
2042 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
2043 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
2044 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
2045
2046 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
2047 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
2048}
2049
2050static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
2051 struct ethtool_link_ksettings *cmd)
2052{
2053 if (!autoneg)
2054 return;
2055
2056 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
2057 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
2058}
2059
2060static void
2061mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
2062 struct ethtool_link_ksettings *cmd)
2063{
2064 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
2065 return;
2066
2067 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
2068 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
2069}
2070
2071static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
2072 struct ethtool_link_ksettings *cmd)
2073{
2074 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
2075 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2076 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2077 char ptys_pl[MLXSW_REG_PTYS_LEN];
2078 u8 autoneg_status;
2079 bool autoneg;
2080 int err;
2081
2082 autoneg = mlxsw_sp_port->link.autoneg;
Elad Raz401c8b42016-10-28 21:35:52 +02002083 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002084 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2085 if (err)
2086 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002087 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2088 &eth_proto_oper);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002089
2090 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2091
2092 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2093
2094 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2095 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2096 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2097
2098 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2099 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2100 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2101 cmd);
2102
2103 return 0;
2104}
2105
2106static int
2107mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2108 const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002109{
2110 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2111 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2112 char ptys_pl[MLXSW_REG_PTYS_LEN];
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002113 u32 eth_proto_cap, eth_proto_new;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002114 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002115 int err;
2116
Elad Raz401c8b42016-10-28 21:35:52 +02002117 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002118 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002119 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002120 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002121 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002122
2123 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2124 eth_proto_new = autoneg ?
2125 mlxsw_sp_to_ptys_advert_link(cmd) :
2126 mlxsw_sp_to_ptys_speed(cmd->base.speed);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002127
2128 eth_proto_new = eth_proto_new & eth_proto_cap;
2129 if (!eth_proto_new) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002130 netdev_err(dev, "No supported speed requested\n");
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002131 return -EINVAL;
2132 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002133
Elad Raz401c8b42016-10-28 21:35:52 +02002134 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2135 eth_proto_new);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002136 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002137 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002138 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002139
Ido Schimmel6277d462016-07-15 11:14:58 +02002140 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002141 return 0;
2142
Ido Schimmel0c83f882016-09-12 13:26:23 +02002143 mlxsw_sp_port->link.autoneg = autoneg;
2144
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002145 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2146 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002147
2148 return 0;
2149}
2150
2151static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2152 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2153 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02002154 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2155 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002156 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01002157 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002158 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2159 .get_sset_count = mlxsw_sp_port_get_sset_count,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002160 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2161 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002162};
2163
Ido Schimmel18f1e702016-02-26 17:32:31 +01002164static int
2165mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2166{
2167 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2168 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2169 char ptys_pl[MLXSW_REG_PTYS_LEN];
2170 u32 eth_proto_admin;
2171
2172 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
Elad Raz401c8b42016-10-28 21:35:52 +02002173 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2174 eth_proto_admin);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002175 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2176}
2177
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002178int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2179 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2180 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02002181{
2182 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2183 char qeec_pl[MLXSW_REG_QEEC_LEN];
2184
2185 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2186 next_index);
2187 mlxsw_reg_qeec_de_set(qeec_pl, true);
2188 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2189 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2190 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2191}
2192
Ido Schimmelcc7cf512016-04-06 17:10:11 +02002193int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2194 enum mlxsw_reg_qeec_hr hr, u8 index,
2195 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02002196{
2197 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2198 char qeec_pl[MLXSW_REG_QEEC_LEN];
2199
2200 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2201 next_index);
2202 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2203 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2204 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2205}
2206
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002207int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2208 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002209{
2210 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2211 char qtct_pl[MLXSW_REG_QTCT_LEN];
2212
2213 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2214 tclass);
2215 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2216}
2217
2218static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2219{
2220 int err, i;
2221
2222 /* Setup the elements hierarcy, so that each TC is linked to
2223 * one subgroup, which are all member in the same group.
2224 */
2225 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2226 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2227 0);
2228 if (err)
2229 return err;
2230 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2231 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2232 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2233 0, false, 0);
2234 if (err)
2235 return err;
2236 }
2237 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2238 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2239 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2240 false, 0);
2241 if (err)
2242 return err;
2243 }
2244
2245 /* Make sure the max shaper is disabled in all hierarcies that
2246 * support it.
2247 */
2248 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2249 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2250 MLXSW_REG_QEEC_MAS_DIS);
2251 if (err)
2252 return err;
2253 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2254 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2255 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2256 i, 0,
2257 MLXSW_REG_QEEC_MAS_DIS);
2258 if (err)
2259 return err;
2260 }
2261 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2262 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2263 MLXSW_REG_QEEC_HIERARCY_TC,
2264 i, i,
2265 MLXSW_REG_QEEC_MAS_DIS);
2266 if (err)
2267 return err;
2268 }
2269
2270 /* Map all priorities to traffic class 0. */
2271 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2272 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2273 if (err)
2274 return err;
2275 }
2276
2277 return 0;
2278}
2279
Ido Schimmel05978482016-08-17 16:39:30 +02002280static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2281{
2282 mlxsw_sp_port->pvid = 1;
2283
2284 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2285}
2286
2287static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2288{
2289 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2290}
2291
Jiri Pirko67963a32016-10-28 21:35:55 +02002292static int __mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2293 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002294{
2295 struct mlxsw_sp_port *mlxsw_sp_port;
2296 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002297 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002298 int err;
2299
2300 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2301 if (!dev)
2302 return -ENOMEM;
Jiri Pirkof20a91f2016-10-27 15:13:00 +02002303 SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002304 mlxsw_sp_port = netdev_priv(dev);
2305 mlxsw_sp_port->dev = dev;
2306 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2307 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002308 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002309 mlxsw_sp_port->mapping.module = module;
2310 mlxsw_sp_port->mapping.width = width;
2311 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002312 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002313 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2314 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2315 if (!mlxsw_sp_port->active_vlans) {
2316 err = -ENOMEM;
2317 goto err_port_active_vlans_alloc;
2318 }
Elad Razfc1273a2016-01-06 13:01:11 +01002319 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2320 if (!mlxsw_sp_port->untagged_vlans) {
2321 err = -ENOMEM;
2322 goto err_port_untagged_vlans_alloc;
2323 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002324 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002325 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002326
2327 mlxsw_sp_port->pcpu_stats =
2328 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2329 if (!mlxsw_sp_port->pcpu_stats) {
2330 err = -ENOMEM;
2331 goto err_alloc_stats;
2332 }
2333
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002334 mlxsw_sp_port->sample = kzalloc(sizeof(*mlxsw_sp_port->sample),
2335 GFP_KERNEL);
2336 if (!mlxsw_sp_port->sample) {
2337 err = -ENOMEM;
2338 goto err_alloc_sample;
2339 }
2340
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002341 mlxsw_sp_port->hw_stats.cache =
2342 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2343
2344 if (!mlxsw_sp_port->hw_stats.cache) {
2345 err = -ENOMEM;
2346 goto err_alloc_hw_stats;
2347 }
2348 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2349 &update_stats_cache);
2350
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002351 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2352 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2353
Ido Schimmel3247ff22016-09-08 08:16:02 +02002354 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2355 if (err) {
2356 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2357 mlxsw_sp_port->local_port);
2358 goto err_port_swid_set;
2359 }
2360
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002361 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2362 if (err) {
2363 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2364 mlxsw_sp_port->local_port);
2365 goto err_dev_addr_init;
2366 }
2367
2368 netif_carrier_off(dev);
2369
2370 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002371 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2372 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002373
Jarod Wilsond894be52016-10-20 13:55:16 -04002374 dev->min_mtu = 0;
2375 dev->max_mtu = ETH_MAX_MTU;
2376
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002377 /* Each packet needs to have a Tx header (metadata) on top all other
2378 * headers.
2379 */
Yotam Gigifeb7d382016-10-04 09:46:04 +02002380 dev->needed_headroom = MLXSW_TXHDR_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002381
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002382 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2383 if (err) {
2384 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2385 mlxsw_sp_port->local_port);
2386 goto err_port_system_port_mapping_set;
2387 }
2388
Ido Schimmel18f1e702016-02-26 17:32:31 +01002389 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2390 if (err) {
2391 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2392 mlxsw_sp_port->local_port);
2393 goto err_port_speed_by_width_set;
2394 }
2395
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002396 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2397 if (err) {
2398 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2399 mlxsw_sp_port->local_port);
2400 goto err_port_mtu_set;
2401 }
2402
2403 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2404 if (err)
2405 goto err_port_admin_status_set;
2406
2407 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2408 if (err) {
2409 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2410 mlxsw_sp_port->local_port);
2411 goto err_port_buffers_init;
2412 }
2413
Ido Schimmel90183b92016-04-06 17:10:08 +02002414 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2415 if (err) {
2416 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2417 mlxsw_sp_port->local_port);
2418 goto err_port_ets_init;
2419 }
2420
Ido Schimmelf00817d2016-04-06 17:10:09 +02002421 /* ETS and buffers must be initialized before DCB. */
2422 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2423 if (err) {
2424 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2425 mlxsw_sp_port->local_port);
2426 goto err_port_dcb_init;
2427 }
2428
Ido Schimmel05978482016-08-17 16:39:30 +02002429 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2430 if (err) {
2431 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2432 mlxsw_sp_port->local_port);
2433 goto err_port_pvid_vport_create;
2434 }
2435
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002436 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002437 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002438 err = register_netdev(dev);
2439 if (err) {
2440 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2441 mlxsw_sp_port->local_port);
2442 goto err_register_netdev;
2443 }
2444
Elad Razd808c7e2016-10-28 21:35:57 +02002445 mlxsw_core_port_eth_set(mlxsw_sp->core, mlxsw_sp_port->local_port,
2446 mlxsw_sp_port, dev, mlxsw_sp_port->split,
2447 module);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002448 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002449 return 0;
2450
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002451err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002452 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002453 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002454 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2455err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002456 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002457err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002458err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002459err_port_buffers_init:
2460err_port_admin_status_set:
2461err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002462err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002463err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002464err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002465 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2466err_port_swid_set:
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002467 kfree(mlxsw_sp_port->hw_stats.cache);
2468err_alloc_hw_stats:
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002469 kfree(mlxsw_sp_port->sample);
2470err_alloc_sample:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002471 free_percpu(mlxsw_sp_port->pcpu_stats);
2472err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002473 kfree(mlxsw_sp_port->untagged_vlans);
2474err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002475 kfree(mlxsw_sp_port->active_vlans);
2476err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002477 free_netdev(dev);
2478 return err;
2479}
2480
Jiri Pirko67963a32016-10-28 21:35:55 +02002481static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2482 bool split, u8 module, u8 width, u8 lane)
2483{
2484 int err;
2485
2486 err = mlxsw_core_port_init(mlxsw_sp->core, local_port);
2487 if (err) {
2488 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2489 local_port);
2490 return err;
2491 }
Ido Schimmel9a60c902016-12-16 19:29:03 +01002492 err = __mlxsw_sp_port_create(mlxsw_sp, local_port, split,
Jiri Pirko67963a32016-10-28 21:35:55 +02002493 module, width, lane);
2494 if (err)
2495 goto err_port_create;
2496 return 0;
2497
2498err_port_create:
2499 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2500 return err;
2501}
2502
2503static void __mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002504{
2505 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2506
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002507 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
Jiri Pirko67963a32016-10-28 21:35:55 +02002508 mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002509 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002510 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002511 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002512 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002513 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002514 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2515 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002516 kfree(mlxsw_sp_port->hw_stats.cache);
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002517 kfree(mlxsw_sp_port->sample);
Yotam Gigi136f1442017-01-09 11:25:47 +01002518 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01002519 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002520 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002521 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002522 free_netdev(mlxsw_sp_port->dev);
2523}
2524
Jiri Pirko67963a32016-10-28 21:35:55 +02002525static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2526{
2527 __mlxsw_sp_port_remove(mlxsw_sp, local_port);
2528 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2529}
2530
Jiri Pirkof83e2102016-10-28 21:35:49 +02002531static bool mlxsw_sp_port_created(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2532{
2533 return mlxsw_sp->ports[local_port] != NULL;
2534}
2535
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002536static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2537{
2538 int i;
2539
2540 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002541 if (mlxsw_sp_port_created(mlxsw_sp, i))
2542 mlxsw_sp_port_remove(mlxsw_sp, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002543 kfree(mlxsw_sp->ports);
2544}
2545
2546static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2547{
Ido Schimmeld664b412016-06-09 09:51:40 +02002548 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002549 size_t alloc_size;
2550 int i;
2551 int err;
2552
2553 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2554 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2555 if (!mlxsw_sp->ports)
2556 return -ENOMEM;
2557
2558 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002559 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002560 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002561 if (err)
2562 goto err_port_module_info_get;
2563 if (!width)
2564 continue;
2565 mlxsw_sp->port_to_module[i] = module;
Jiri Pirko67963a32016-10-28 21:35:55 +02002566 err = mlxsw_sp_port_create(mlxsw_sp, i, false,
2567 module, width, lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002568 if (err)
2569 goto err_port_create;
2570 }
2571 return 0;
2572
2573err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002574err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002575 for (i--; i >= 1; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002576 if (mlxsw_sp_port_created(mlxsw_sp, i))
2577 mlxsw_sp_port_remove(mlxsw_sp, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002578 kfree(mlxsw_sp->ports);
2579 return err;
2580}
2581
Ido Schimmel18f1e702016-02-26 17:32:31 +01002582static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2583{
2584 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2585
2586 return local_port - offset;
2587}
2588
Ido Schimmelbe945352016-06-09 09:51:39 +02002589static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2590 u8 module, unsigned int count)
2591{
2592 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2593 int err, i;
2594
2595 for (i = 0; i < count; i++) {
2596 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2597 width, i * width);
2598 if (err)
2599 goto err_port_module_map;
2600 }
2601
2602 for (i = 0; i < count; i++) {
2603 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2604 if (err)
2605 goto err_port_swid_set;
2606 }
2607
2608 for (i = 0; i < count; i++) {
2609 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002610 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002611 if (err)
2612 goto err_port_create;
2613 }
2614
2615 return 0;
2616
2617err_port_create:
2618 for (i--; i >= 0; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002619 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2620 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmelbe945352016-06-09 09:51:39 +02002621 i = count;
2622err_port_swid_set:
2623 for (i--; i >= 0; i--)
2624 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2625 MLXSW_PORT_SWID_DISABLED_PORT);
2626 i = count;
2627err_port_module_map:
2628 for (i--; i >= 0; i--)
2629 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2630 return err;
2631}
2632
2633static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2634 u8 base_port, unsigned int count)
2635{
2636 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2637 int i;
2638
2639 /* Split by four means we need to re-create two ports, otherwise
2640 * only one.
2641 */
2642 count = count / 2;
2643
2644 for (i = 0; i < count; i++) {
2645 local_port = base_port + i * 2;
2646 module = mlxsw_sp->port_to_module[local_port];
2647
2648 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2649 0);
2650 }
2651
2652 for (i = 0; i < count; i++)
2653 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2654
2655 for (i = 0; i < count; i++) {
2656 local_port = base_port + i * 2;
2657 module = mlxsw_sp->port_to_module[local_port];
2658
2659 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002660 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002661 }
2662}
2663
Jiri Pirkob2f10572016-04-08 19:11:23 +02002664static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2665 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002666{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002667 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002668 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002669 u8 module, cur_width, base_port;
2670 int i;
2671 int err;
2672
2673 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2674 if (!mlxsw_sp_port) {
2675 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2676 local_port);
2677 return -EINVAL;
2678 }
2679
Ido Schimmeld664b412016-06-09 09:51:40 +02002680 module = mlxsw_sp_port->mapping.module;
2681 cur_width = mlxsw_sp_port->mapping.width;
2682
Ido Schimmel18f1e702016-02-26 17:32:31 +01002683 if (count != 2 && count != 4) {
2684 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2685 return -EINVAL;
2686 }
2687
Ido Schimmel18f1e702016-02-26 17:32:31 +01002688 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2689 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2690 return -EINVAL;
2691 }
2692
2693 /* Make sure we have enough slave (even) ports for the split. */
2694 if (count == 2) {
2695 base_port = local_port;
2696 if (mlxsw_sp->ports[base_port + 1]) {
2697 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2698 return -EINVAL;
2699 }
2700 } else {
2701 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2702 if (mlxsw_sp->ports[base_port + 1] ||
2703 mlxsw_sp->ports[base_port + 3]) {
2704 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2705 return -EINVAL;
2706 }
2707 }
2708
2709 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002710 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2711 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002712
Ido Schimmelbe945352016-06-09 09:51:39 +02002713 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2714 if (err) {
2715 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2716 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002717 }
2718
2719 return 0;
2720
Ido Schimmelbe945352016-06-09 09:51:39 +02002721err_port_split_create:
2722 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002723 return err;
2724}
2725
Jiri Pirkob2f10572016-04-08 19:11:23 +02002726static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002727{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002728 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002729 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002730 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002731 unsigned int count;
2732 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002733
2734 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2735 if (!mlxsw_sp_port) {
2736 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2737 local_port);
2738 return -EINVAL;
2739 }
2740
2741 if (!mlxsw_sp_port->split) {
2742 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2743 return -EINVAL;
2744 }
2745
Ido Schimmeld664b412016-06-09 09:51:40 +02002746 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002747 count = cur_width == 1 ? 4 : 2;
2748
2749 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2750
2751 /* Determine which ports to remove. */
2752 if (count == 2 && local_port >= base_port + 2)
2753 base_port = base_port + 2;
2754
2755 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002756 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2757 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002758
Ido Schimmelbe945352016-06-09 09:51:39 +02002759 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002760
2761 return 0;
2762}
2763
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002764static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2765 char *pude_pl, void *priv)
2766{
2767 struct mlxsw_sp *mlxsw_sp = priv;
2768 struct mlxsw_sp_port *mlxsw_sp_port;
2769 enum mlxsw_reg_pude_oper_status status;
2770 u8 local_port;
2771
2772 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2773 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002774 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002775 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002776
2777 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2778 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2779 netdev_info(mlxsw_sp_port->dev, "link up\n");
2780 netif_carrier_on(mlxsw_sp_port->dev);
2781 } else {
2782 netdev_info(mlxsw_sp_port->dev, "link down\n");
2783 netif_carrier_off(mlxsw_sp_port->dev);
2784 }
2785}
2786
Nogah Frankel14eeda92016-11-25 10:33:32 +01002787static void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb,
2788 u8 local_port, void *priv)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002789{
2790 struct mlxsw_sp *mlxsw_sp = priv;
2791 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2792 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2793
2794 if (unlikely(!mlxsw_sp_port)) {
2795 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2796 local_port);
2797 return;
2798 }
2799
2800 skb->dev = mlxsw_sp_port->dev;
2801
2802 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2803 u64_stats_update_begin(&pcpu_stats->syncp);
2804 pcpu_stats->rx_packets++;
2805 pcpu_stats->rx_bytes += skb->len;
2806 u64_stats_update_end(&pcpu_stats->syncp);
2807
2808 skb->protocol = eth_type_trans(skb, skb->dev);
2809 netif_receive_skb(skb);
2810}
2811
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002812static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2813 void *priv)
2814{
2815 skb->offload_fwd_mark = 1;
Nogah Frankel14eeda92016-11-25 10:33:32 +01002816 return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002817}
2818
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002819static void mlxsw_sp_rx_listener_sample_func(struct sk_buff *skb, u8 local_port,
2820 void *priv)
2821{
2822 struct mlxsw_sp *mlxsw_sp = priv;
2823 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2824 struct psample_group *psample_group;
2825 u32 size;
2826
2827 if (unlikely(!mlxsw_sp_port)) {
2828 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received for non-existent port\n",
2829 local_port);
2830 goto out;
2831 }
2832 if (unlikely(!mlxsw_sp_port->sample)) {
2833 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received on unsupported port\n",
2834 local_port);
2835 goto out;
2836 }
2837
2838 size = mlxsw_sp_port->sample->truncate ?
2839 mlxsw_sp_port->sample->trunc_size : skb->len;
2840
2841 rcu_read_lock();
2842 psample_group = rcu_dereference(mlxsw_sp_port->sample->psample_group);
2843 if (!psample_group)
2844 goto out_unlock;
2845 psample_sample_packet(psample_group, skb, size,
2846 mlxsw_sp_port->dev->ifindex, 0,
2847 mlxsw_sp_port->sample->rate);
2848out_unlock:
2849 rcu_read_unlock();
2850out:
2851 consume_skb(skb);
2852}
2853
Nogah Frankel117b0da2016-11-25 10:33:44 +01002854#define MLXSW_SP_RXL_NO_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel0fb78a42016-11-25 10:33:39 +01002855 MLXSW_RXL(mlxsw_sp_rx_listener_no_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01002856 _is_ctrl, SP_##_trap_group, DISCARD)
Ido Schimmel93393b32016-08-25 18:42:38 +02002857
Nogah Frankel117b0da2016-11-25 10:33:44 +01002858#define MLXSW_SP_RXL_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel14eeda92016-11-25 10:33:32 +01002859 MLXSW_RXL(mlxsw_sp_rx_listener_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01002860 _is_ctrl, SP_##_trap_group, DISCARD)
2861
2862#define MLXSW_SP_EVENTL(_func, _trap_id) \
2863 MLXSW_EVENTL(_func, _trap_id, SP_EVENT)
Nogah Frankel14eeda92016-11-25 10:33:32 +01002864
Nogah Frankel45449132016-11-25 10:33:35 +01002865static const struct mlxsw_listener mlxsw_sp_listener[] = {
2866 /* Events */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002867 MLXSW_SP_EVENTL(mlxsw_sp_pude_event_func, PUDE),
Nogah Frankelee4a60d2016-11-25 10:33:29 +01002868 /* L2 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002869 MLXSW_SP_RXL_NO_MARK(STP, TRAP_TO_CPU, STP, true),
2870 MLXSW_SP_RXL_NO_MARK(LACP, TRAP_TO_CPU, LACP, true),
2871 MLXSW_SP_RXL_NO_MARK(LLDP, TRAP_TO_CPU, LLDP, true),
2872 MLXSW_SP_RXL_MARK(DHCP, MIRROR_TO_CPU, DHCP, false),
2873 MLXSW_SP_RXL_MARK(IGMP_QUERY, MIRROR_TO_CPU, IGMP, false),
2874 MLXSW_SP_RXL_NO_MARK(IGMP_V1_REPORT, TRAP_TO_CPU, IGMP, false),
2875 MLXSW_SP_RXL_NO_MARK(IGMP_V2_REPORT, TRAP_TO_CPU, IGMP, false),
2876 MLXSW_SP_RXL_NO_MARK(IGMP_V2_LEAVE, TRAP_TO_CPU, IGMP, false),
2877 MLXSW_SP_RXL_NO_MARK(IGMP_V3_REPORT, TRAP_TO_CPU, IGMP, false),
2878 MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU, ARP, false),
2879 MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU, ARP, false),
Ido Schimmel93393b32016-08-25 18:42:38 +02002880 /* L3 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002881 MLXSW_SP_RXL_NO_MARK(MTUERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2882 MLXSW_SP_RXL_NO_MARK(TTLERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2883 MLXSW_SP_RXL_NO_MARK(LBERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2884 MLXSW_SP_RXL_MARK(OSPF, TRAP_TO_CPU, OSPF, false),
2885 MLXSW_SP_RXL_NO_MARK(IP2ME, TRAP_TO_CPU, IP2ME, false),
2886 MLXSW_SP_RXL_NO_MARK(RTR_INGRESS0, TRAP_TO_CPU, REMOTE_ROUTE, false),
2887 MLXSW_SP_RXL_NO_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, ARP_MISS, false),
2888 MLXSW_SP_RXL_NO_MARK(BGP_IPV4, TRAP_TO_CPU, BGP_IPV4, false),
Yotam Gigi98d0f7b2017-01-23 11:07:11 +01002889 /* PKT Sample trap */
2890 MLXSW_RXL(mlxsw_sp_rx_listener_sample_func, PKT_SAMPLE, MIRROR_TO_CPU,
2891 false, SP_IP2ME, DISCARD)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002892};
2893
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002894static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core)
2895{
2896 char qpcr_pl[MLXSW_REG_QPCR_LEN];
2897 enum mlxsw_reg_qpcr_ir_units ir_units;
2898 int max_cpu_policers;
2899 bool is_bytes;
2900 u8 burst_size;
2901 u32 rate;
2902 int i, err;
2903
2904 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS))
2905 return -EIO;
2906
2907 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
2908
2909 ir_units = MLXSW_REG_QPCR_IR_UNITS_M;
2910 for (i = 0; i < max_cpu_policers; i++) {
2911 is_bytes = false;
2912 switch (i) {
2913 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2914 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2915 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2916 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2917 rate = 128;
2918 burst_size = 7;
2919 break;
2920 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2921 rate = 16 * 1024;
2922 burst_size = 10;
2923 break;
2924 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2925 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2926 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2927 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2928 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2929 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2930 rate = 1024;
2931 burst_size = 7;
2932 break;
2933 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2934 is_bytes = true;
2935 rate = 4 * 1024;
2936 burst_size = 4;
2937 break;
2938 default:
2939 continue;
2940 }
2941
2942 mlxsw_reg_qpcr_pack(qpcr_pl, i, ir_units, is_bytes, rate,
2943 burst_size);
2944 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl);
2945 if (err)
2946 return err;
2947 }
2948
2949 return 0;
2950}
2951
Nogah Frankel579c82e2016-11-25 10:33:42 +01002952static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002953{
2954 char htgt_pl[MLXSW_REG_HTGT_LEN];
Nogah Frankel117b0da2016-11-25 10:33:44 +01002955 enum mlxsw_reg_htgt_trap_group i;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002956 int max_cpu_policers;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002957 int max_trap_groups;
2958 u8 priority, tc;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002959 u16 policer_id;
Nogah Frankel117b0da2016-11-25 10:33:44 +01002960 int err;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002961
2962 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS))
2963 return -EIO;
2964
2965 max_trap_groups = MLXSW_CORE_RES_GET(mlxsw_core, MAX_TRAP_GROUPS);
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002966 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
Nogah Frankel579c82e2016-11-25 10:33:42 +01002967
2968 for (i = 0; i < max_trap_groups; i++) {
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002969 policer_id = i;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002970 switch (i) {
Nogah Frankel117b0da2016-11-25 10:33:44 +01002971 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2972 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2973 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2974 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2975 priority = 5;
2976 tc = 5;
2977 break;
2978 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2979 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2980 priority = 4;
2981 tc = 4;
2982 break;
2983 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2984 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2985 priority = 3;
2986 tc = 3;
2987 break;
2988 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2989 priority = 2;
2990 tc = 2;
2991 break;
2992 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2993 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2994 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2995 priority = 1;
2996 tc = 1;
2997 break;
2998 case MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT:
Nogah Frankel579c82e2016-11-25 10:33:42 +01002999 priority = MLXSW_REG_HTGT_DEFAULT_PRIORITY;
3000 tc = MLXSW_REG_HTGT_DEFAULT_TC;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003001 policer_id = MLXSW_REG_HTGT_INVALID_POLICER;
Nogah Frankel579c82e2016-11-25 10:33:42 +01003002 break;
3003 default:
3004 continue;
3005 }
Nogah Frankel117b0da2016-11-25 10:33:44 +01003006
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003007 if (max_cpu_policers <= policer_id &&
3008 policer_id != MLXSW_REG_HTGT_INVALID_POLICER)
3009 return -EIO;
3010
3011 mlxsw_reg_htgt_pack(htgt_pl, i, policer_id, priority, tc);
Nogah Frankel579c82e2016-11-25 10:33:42 +01003012 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3013 if (err)
3014 return err;
3015 }
3016
3017 return 0;
3018}
3019
3020static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
3021{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003022 int i;
3023 int err;
3024
Nogah Frankel9148e7c2016-11-25 10:33:47 +01003025 err = mlxsw_sp_cpu_policers_set(mlxsw_sp->core);
3026 if (err)
3027 return err;
3028
Nogah Frankel579c82e2016-11-25 10:33:42 +01003029 err = mlxsw_sp_trap_groups_set(mlxsw_sp->core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003030 if (err)
3031 return err;
3032
Nogah Frankel45449132016-11-25 10:33:35 +01003033 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003034 err = mlxsw_core_trap_register(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003035 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003036 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003037 if (err)
Nogah Frankel45449132016-11-25 10:33:35 +01003038 goto err_listener_register;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003039
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003040 }
3041 return 0;
3042
Nogah Frankel45449132016-11-25 10:33:35 +01003043err_listener_register:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003044 for (i--; i >= 0; i--) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003045 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003046 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003047 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003048 }
3049 return err;
3050}
3051
3052static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
3053{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003054 int i;
3055
Nogah Frankel45449132016-11-25 10:33:35 +01003056 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01003057 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01003058 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01003059 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003060 }
3061}
3062
3063static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
3064 enum mlxsw_reg_sfgc_type type,
3065 enum mlxsw_reg_sfgc_bridge_type bridge_type)
3066{
3067 enum mlxsw_flood_table_type table_type;
3068 enum mlxsw_sp_flood_table flood_table;
3069 char sfgc_pl[MLXSW_REG_SFGC_LEN];
3070
Ido Schimmel19ae6122015-12-15 16:03:39 +01003071 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003072 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01003073 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003074 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01003075
Nogah Frankel71c365b2017-02-09 14:54:46 +01003076 switch (type) {
3077 case MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST:
Ido Schimmel19ae6122015-12-15 16:03:39 +01003078 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
Nogah Frankel71c365b2017-02-09 14:54:46 +01003079 break;
3080 case MLXSW_REG_SFGC_TYPE_UNREGISTERED_MULTICAST_IPV4:
3081 case MLXSW_REG_SFGC_TYPE_UNREGISTERED_MULTICAST_IPV6:
3082 flood_table = MLXSW_SP_FLOOD_TABLE_MC;
3083 break;
3084 default:
3085 flood_table = MLXSW_SP_FLOOD_TABLE_BC;
3086 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003087
3088 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
3089 flood_table);
3090 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
3091}
3092
3093static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
3094{
3095 int type, err;
3096
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003097 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
3098 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
3099 continue;
3100
3101 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
3102 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
3103 if (err)
3104 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003105
3106 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
3107 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
3108 if (err)
3109 return err;
3110 }
3111
3112 return 0;
3113}
3114
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003115static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
3116{
3117 char slcr_pl[MLXSW_REG_SLCR_LEN];
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003118 int err;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003119
3120 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
3121 MLXSW_REG_SLCR_LAG_HASH_DMAC |
3122 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
3123 MLXSW_REG_SLCR_LAG_HASH_VLANID |
3124 MLXSW_REG_SLCR_LAG_HASH_SIP |
3125 MLXSW_REG_SLCR_LAG_HASH_DIP |
3126 MLXSW_REG_SLCR_LAG_HASH_SPORT |
3127 MLXSW_REG_SLCR_LAG_HASH_DPORT |
3128 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003129 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
3130 if (err)
3131 return err;
3132
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003133 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) ||
3134 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS))
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003135 return -EIO;
3136
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003137 mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG),
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003138 sizeof(struct mlxsw_sp_upper),
3139 GFP_KERNEL);
3140 if (!mlxsw_sp->lags)
3141 return -ENOMEM;
3142
3143 return 0;
3144}
3145
3146static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
3147{
3148 kfree(mlxsw_sp->lags);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003149}
3150
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003151static int mlxsw_sp_basic_trap_groups_set(struct mlxsw_core *mlxsw_core)
3152{
3153 char htgt_pl[MLXSW_REG_HTGT_LEN];
3154
Nogah Frankel579c82e2016-11-25 10:33:42 +01003155 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD,
3156 MLXSW_REG_HTGT_INVALID_POLICER,
3157 MLXSW_REG_HTGT_DEFAULT_PRIORITY,
3158 MLXSW_REG_HTGT_DEFAULT_TC);
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003159 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3160}
3161
Jiri Pirkob2f10572016-04-08 19:11:23 +02003162static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003163 const struct mlxsw_bus_info *mlxsw_bus_info)
3164{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003165 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003166 int err;
3167
3168 mlxsw_sp->core = mlxsw_core;
3169 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02003170 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003171 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01003172 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003173
3174 err = mlxsw_sp_base_mac_get(mlxsw_sp);
3175 if (err) {
3176 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
3177 return err;
3178 }
3179
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003180 err = mlxsw_sp_traps_init(mlxsw_sp);
3181 if (err) {
Nogah Frankel45449132016-11-25 10:33:35 +01003182 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps\n");
3183 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003184 }
3185
3186 err = mlxsw_sp_flood_init(mlxsw_sp);
3187 if (err) {
3188 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
3189 goto err_flood_init;
3190 }
3191
3192 err = mlxsw_sp_buffers_init(mlxsw_sp);
3193 if (err) {
3194 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
3195 goto err_buffers_init;
3196 }
3197
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003198 err = mlxsw_sp_lag_init(mlxsw_sp);
3199 if (err) {
3200 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
3201 goto err_lag_init;
3202 }
3203
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003204 err = mlxsw_sp_switchdev_init(mlxsw_sp);
3205 if (err) {
3206 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
3207 goto err_switchdev_init;
3208 }
3209
Ido Schimmel464dce12016-07-02 11:00:15 +02003210 err = mlxsw_sp_router_init(mlxsw_sp);
3211 if (err) {
3212 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
3213 goto err_router_init;
3214 }
3215
Yotam Gigi763b4b72016-07-21 12:03:17 +02003216 err = mlxsw_sp_span_init(mlxsw_sp);
3217 if (err) {
3218 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
3219 goto err_span_init;
3220 }
3221
Jiri Pirko22a67762017-02-03 10:29:07 +01003222 err = mlxsw_sp_acl_init(mlxsw_sp);
3223 if (err) {
3224 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize ACL\n");
3225 goto err_acl_init;
3226 }
3227
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003228 err = mlxsw_sp_ports_create(mlxsw_sp);
3229 if (err) {
3230 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
3231 goto err_ports_create;
3232 }
3233
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003234 return 0;
3235
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003236err_ports_create:
Jiri Pirko22a67762017-02-03 10:29:07 +01003237 mlxsw_sp_acl_fini(mlxsw_sp);
3238err_acl_init:
Yotam Gigi763b4b72016-07-21 12:03:17 +02003239 mlxsw_sp_span_fini(mlxsw_sp);
3240err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02003241 mlxsw_sp_router_fini(mlxsw_sp);
3242err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003243 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003244err_switchdev_init:
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003245 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003246err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02003247 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003248err_buffers_init:
3249err_flood_init:
3250 mlxsw_sp_traps_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003251 return err;
3252}
3253
Jiri Pirkob2f10572016-04-08 19:11:23 +02003254static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003255{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003256 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003257
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003258 mlxsw_sp_ports_remove(mlxsw_sp);
Jiri Pirko22a67762017-02-03 10:29:07 +01003259 mlxsw_sp_acl_fini(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02003260 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02003261 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003262 mlxsw_sp_switchdev_fini(mlxsw_sp);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003263 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02003264 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003265 mlxsw_sp_traps_fini(mlxsw_sp);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003266 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02003267 WARN_ON(!list_empty(&mlxsw_sp->fids));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003268}
3269
3270static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3271 .used_max_vepa_channels = 1,
3272 .max_vepa_channels = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003273 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01003274 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003275 .used_max_pgt = 1,
3276 .max_pgt = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003277 .used_flood_tables = 1,
3278 .used_flood_mode = 1,
3279 .flood_mode = 3,
Nogah Frankel71c365b2017-02-09 14:54:46 +01003280 .max_fid_offset_flood_tables = 3,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003281 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Nogah Frankel71c365b2017-02-09 14:54:46 +01003282 .max_fid_flood_tables = 3,
Ido Schimmel19ae6122015-12-15 16:03:39 +01003283 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003284 .used_max_ib_mc = 1,
3285 .max_ib_mc = 0,
3286 .used_max_pkey = 1,
3287 .max_pkey = 0,
Nogah Frankel403547d2016-09-20 11:16:52 +02003288 .used_kvd_split_data = 1,
3289 .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
3290 .kvd_hash_single_parts = 2,
3291 .kvd_hash_double_parts = 1,
Jiri Pirkoc6022422016-07-05 11:27:46 +02003292 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003293 .swid_config = {
3294 {
3295 .used_type = 1,
3296 .type = MLXSW_PORT_SWID_TYPE_ETH,
3297 }
3298 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02003299 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003300};
3301
3302static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko1d20d232016-10-27 15:12:59 +02003303 .kind = mlxsw_sp_driver_name,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003304 .priv_size = sizeof(struct mlxsw_sp),
3305 .init = mlxsw_sp_init,
3306 .fini = mlxsw_sp_fini,
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003307 .basic_trap_groups_set = mlxsw_sp_basic_trap_groups_set,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003308 .port_split = mlxsw_sp_port_split,
3309 .port_unsplit = mlxsw_sp_port_unsplit,
3310 .sb_pool_get = mlxsw_sp_sb_pool_get,
3311 .sb_pool_set = mlxsw_sp_sb_pool_set,
3312 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3313 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3314 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3315 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3316 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3317 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3318 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3319 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3320 .txhdr_construct = mlxsw_sp_txhdr_construct,
3321 .txhdr_len = MLXSW_TXHDR_LEN,
3322 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003323};
3324
Jiri Pirko22a67762017-02-03 10:29:07 +01003325bool mlxsw_sp_port_dev_check(const struct net_device *dev)
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003326{
3327 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3328}
3329
David Aherndd823642016-10-17 19:15:49 -07003330static int mlxsw_lower_dev_walk(struct net_device *lower_dev, void *data)
3331{
3332 struct mlxsw_sp_port **port = data;
3333 int ret = 0;
3334
3335 if (mlxsw_sp_port_dev_check(lower_dev)) {
3336 *port = netdev_priv(lower_dev);
3337 ret = 1;
3338 }
3339
3340 return ret;
3341}
3342
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003343static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3344{
David Aherndd823642016-10-17 19:15:49 -07003345 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003346
3347 if (mlxsw_sp_port_dev_check(dev))
3348 return netdev_priv(dev);
3349
David Aherndd823642016-10-17 19:15:49 -07003350 port = NULL;
3351 netdev_walk_all_lower_dev(dev, mlxsw_lower_dev_walk, &port);
3352
3353 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003354}
3355
3356static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3357{
3358 struct mlxsw_sp_port *mlxsw_sp_port;
3359
3360 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3361 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3362}
3363
3364static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3365{
David Aherndd823642016-10-17 19:15:49 -07003366 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003367
3368 if (mlxsw_sp_port_dev_check(dev))
3369 return netdev_priv(dev);
3370
David Aherndd823642016-10-17 19:15:49 -07003371 port = NULL;
3372 netdev_walk_all_lower_dev_rcu(dev, mlxsw_lower_dev_walk, &port);
3373
3374 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003375}
3376
3377struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3378{
3379 struct mlxsw_sp_port *mlxsw_sp_port;
3380
3381 rcu_read_lock();
3382 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3383 if (mlxsw_sp_port)
3384 dev_hold(mlxsw_sp_port->dev);
3385 rcu_read_unlock();
3386 return mlxsw_sp_port;
3387}
3388
3389void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3390{
3391 dev_put(mlxsw_sp_port->dev);
3392}
3393
Ido Schimmel99724c12016-07-04 08:23:14 +02003394static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3395 unsigned long event)
3396{
3397 switch (event) {
3398 case NETDEV_UP:
3399 if (!r)
3400 return true;
3401 r->ref_count++;
3402 return false;
3403 case NETDEV_DOWN:
3404 if (r && --r->ref_count == 0)
3405 return true;
3406 /* It is possible we already removed the RIF ourselves
3407 * if it was assigned to a netdev that is now a bridge
3408 * or LAG slave.
3409 */
3410 return false;
3411 }
3412
3413 return false;
3414}
3415
3416static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3417{
3418 int i;
3419
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003420 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++)
Ido Schimmel99724c12016-07-04 08:23:14 +02003421 if (!mlxsw_sp->rifs[i])
3422 return i;
3423
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003424 return MLXSW_SP_INVALID_RIF;
Ido Schimmel99724c12016-07-04 08:23:14 +02003425}
3426
3427static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3428 bool *p_lagged, u16 *p_system_port)
3429{
3430 u8 local_port = mlxsw_sp_vport->local_port;
3431
3432 *p_lagged = mlxsw_sp_vport->lagged;
3433 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3434}
3435
3436static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3437 struct net_device *l3_dev, u16 rif,
3438 bool create)
3439{
3440 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3441 bool lagged = mlxsw_sp_vport->lagged;
3442 char ritr_pl[MLXSW_REG_RITR_LEN];
3443 u16 system_port;
3444
3445 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3446 l3_dev->mtu, l3_dev->dev_addr);
3447
3448 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3449 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3450 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3451
3452 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3453}
3454
3455static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3456
3457static struct mlxsw_sp_fid *
3458mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3459{
3460 struct mlxsw_sp_fid *f;
3461
3462 f = kzalloc(sizeof(*f), GFP_KERNEL);
3463 if (!f)
3464 return NULL;
3465
3466 f->leave = mlxsw_sp_vport_rif_sp_leave;
3467 f->ref_count = 0;
3468 f->dev = l3_dev;
3469 f->fid = fid;
3470
3471 return f;
3472}
3473
3474static struct mlxsw_sp_rif *
3475mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3476{
3477 struct mlxsw_sp_rif *r;
3478
3479 r = kzalloc(sizeof(*r), GFP_KERNEL);
3480 if (!r)
3481 return NULL;
3482
Ido Schimmel9665b742017-02-08 11:16:42 +01003483 INIT_LIST_HEAD(&r->nexthop_list);
3484 INIT_LIST_HEAD(&r->neigh_list);
Ido Schimmel99724c12016-07-04 08:23:14 +02003485 ether_addr_copy(r->addr, l3_dev->dev_addr);
3486 r->mtu = l3_dev->mtu;
3487 r->ref_count = 1;
3488 r->dev = l3_dev;
3489 r->rif = rif;
3490 r->f = f;
3491
3492 return r;
3493}
3494
3495static struct mlxsw_sp_rif *
3496mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3497 struct net_device *l3_dev)
3498{
3499 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3500 struct mlxsw_sp_fid *f;
3501 struct mlxsw_sp_rif *r;
3502 u16 fid, rif;
3503 int err;
3504
3505 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003506 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99724c12016-07-04 08:23:14 +02003507 return ERR_PTR(-ERANGE);
3508
3509 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3510 if (err)
3511 return ERR_PTR(err);
3512
3513 fid = mlxsw_sp_rif_sp_to_fid(rif);
3514 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3515 if (err)
3516 goto err_rif_fdb_op;
3517
3518 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3519 if (!f) {
3520 err = -ENOMEM;
3521 goto err_rfid_alloc;
3522 }
3523
3524 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3525 if (!r) {
3526 err = -ENOMEM;
3527 goto err_rif_alloc;
3528 }
3529
3530 f->r = r;
3531 mlxsw_sp->rifs[rif] = r;
3532
3533 return r;
3534
3535err_rif_alloc:
3536 kfree(f);
3537err_rfid_alloc:
3538 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3539err_rif_fdb_op:
3540 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3541 return ERR_PTR(err);
3542}
3543
3544static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3545 struct mlxsw_sp_rif *r)
3546{
3547 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3548 struct net_device *l3_dev = r->dev;
3549 struct mlxsw_sp_fid *f = r->f;
3550 u16 fid = f->fid;
3551 u16 rif = r->rif;
3552
Ido Schimmel9665b742017-02-08 11:16:42 +01003553 mlxsw_sp_router_rif_gone_sync(mlxsw_sp, r);
3554
Ido Schimmel99724c12016-07-04 08:23:14 +02003555 mlxsw_sp->rifs[rif] = NULL;
3556 f->r = NULL;
3557
3558 kfree(r);
3559
3560 kfree(f);
3561
3562 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3563
3564 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3565}
3566
3567static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3568 struct net_device *l3_dev)
3569{
3570 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3571 struct mlxsw_sp_rif *r;
3572
3573 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3574 if (!r) {
3575 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3576 if (IS_ERR(r))
3577 return PTR_ERR(r);
3578 }
3579
3580 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3581 r->f->ref_count++;
3582
3583 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3584
3585 return 0;
3586}
3587
3588static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3589{
3590 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3591
3592 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3593
3594 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3595 if (--f->ref_count == 0)
3596 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3597}
3598
3599static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3600 struct net_device *port_dev,
3601 unsigned long event, u16 vid)
3602{
3603 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3604 struct mlxsw_sp_port *mlxsw_sp_vport;
3605
3606 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3607 if (WARN_ON(!mlxsw_sp_vport))
3608 return -EINVAL;
3609
3610 switch (event) {
3611 case NETDEV_UP:
3612 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3613 case NETDEV_DOWN:
3614 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3615 break;
3616 }
3617
3618 return 0;
3619}
3620
3621static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3622 unsigned long event)
3623{
3624 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3625 return 0;
3626
3627 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3628}
3629
3630static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3631 struct net_device *lag_dev,
3632 unsigned long event, u16 vid)
3633{
3634 struct net_device *port_dev;
3635 struct list_head *iter;
3636 int err;
3637
3638 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3639 if (mlxsw_sp_port_dev_check(port_dev)) {
3640 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3641 event, vid);
3642 if (err)
3643 return err;
3644 }
3645 }
3646
3647 return 0;
3648}
3649
3650static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3651 unsigned long event)
3652{
3653 if (netif_is_bridge_port(lag_dev))
3654 return 0;
3655
3656 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3657}
3658
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003659static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3660 struct net_device *l3_dev)
3661{
3662 u16 fid;
3663
3664 if (is_vlan_dev(l3_dev))
3665 fid = vlan_dev_vlan_id(l3_dev);
3666 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3667 fid = 1;
3668 else
3669 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3670
3671 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3672}
3673
Ido Schimmelf888f582016-08-24 11:18:51 +02003674static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3675{
3676 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3677 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3678}
3679
3680static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3681{
3682 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3683}
3684
3685static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3686 bool set)
3687{
3688 enum mlxsw_flood_table_type table_type;
3689 char *sftr_pl;
3690 u16 index;
3691 int err;
3692
3693 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3694 if (!sftr_pl)
3695 return -ENOMEM;
3696
3697 table_type = mlxsw_sp_flood_table_type_get(fid);
3698 index = mlxsw_sp_flood_table_index_get(fid);
Nogah Frankel71c365b2017-02-09 14:54:46 +01003699 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BC, index, table_type,
Ido Schimmelf888f582016-08-24 11:18:51 +02003700 1, MLXSW_PORT_ROUTER_PORT, set);
3701 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3702
3703 kfree(sftr_pl);
3704 return err;
3705}
3706
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003707static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3708{
3709 if (mlxsw_sp_fid_is_vfid(fid))
3710 return MLXSW_REG_RITR_FID_IF;
3711 else
3712 return MLXSW_REG_RITR_VLAN_IF;
3713}
3714
3715static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3716 struct net_device *l3_dev,
3717 u16 fid, u16 rif,
3718 bool create)
3719{
3720 enum mlxsw_reg_ritr_if_type rif_type;
3721 char ritr_pl[MLXSW_REG_RITR_LEN];
3722
3723 rif_type = mlxsw_sp_rif_type_get(fid);
3724 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3725 l3_dev->dev_addr);
3726 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3727
3728 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3729}
3730
3731static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3732 struct net_device *l3_dev,
3733 struct mlxsw_sp_fid *f)
3734{
3735 struct mlxsw_sp_rif *r;
3736 u16 rif;
3737 int err;
3738
3739 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003740 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003741 return -ERANGE;
3742
Ido Schimmelf888f582016-08-24 11:18:51 +02003743 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003744 if (err)
3745 return err;
3746
Ido Schimmelf888f582016-08-24 11:18:51 +02003747 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3748 if (err)
3749 goto err_rif_bridge_op;
3750
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003751 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3752 if (err)
3753 goto err_rif_fdb_op;
3754
3755 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3756 if (!r) {
3757 err = -ENOMEM;
3758 goto err_rif_alloc;
3759 }
3760
3761 f->r = r;
3762 mlxsw_sp->rifs[rif] = r;
3763
3764 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3765
3766 return 0;
3767
3768err_rif_alloc:
3769 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3770err_rif_fdb_op:
3771 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
Ido Schimmelf888f582016-08-24 11:18:51 +02003772err_rif_bridge_op:
3773 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003774 return err;
3775}
3776
3777void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3778 struct mlxsw_sp_rif *r)
3779{
3780 struct net_device *l3_dev = r->dev;
3781 struct mlxsw_sp_fid *f = r->f;
3782 u16 rif = r->rif;
3783
Ido Schimmel9665b742017-02-08 11:16:42 +01003784 mlxsw_sp_router_rif_gone_sync(mlxsw_sp, r);
3785
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003786 mlxsw_sp->rifs[rif] = NULL;
3787 f->r = NULL;
3788
3789 kfree(r);
3790
3791 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3792
3793 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3794
Ido Schimmelf888f582016-08-24 11:18:51 +02003795 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3796
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003797 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3798}
3799
3800static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3801 struct net_device *br_dev,
3802 unsigned long event)
3803{
3804 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3805 struct mlxsw_sp_fid *f;
3806
3807 /* FID can either be an actual FID if the L3 device is the
3808 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3809 * L3 device is a VLAN-unaware bridge and we get a vFID.
3810 */
3811 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3812 if (WARN_ON(!f))
3813 return -EINVAL;
3814
3815 switch (event) {
3816 case NETDEV_UP:
3817 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3818 case NETDEV_DOWN:
3819 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3820 break;
3821 }
3822
3823 return 0;
3824}
3825
Ido Schimmel99724c12016-07-04 08:23:14 +02003826static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3827 unsigned long event)
3828{
3829 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003830 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003831 u16 vid = vlan_dev_vlan_id(vlan_dev);
3832
3833 if (mlxsw_sp_port_dev_check(real_dev))
3834 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3835 vid);
3836 else if (netif_is_lag_master(real_dev))
3837 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3838 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003839 else if (netif_is_bridge_master(real_dev) &&
3840 mlxsw_sp->master_bridge.dev == real_dev)
3841 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3842 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003843
3844 return 0;
3845}
3846
3847static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3848 unsigned long event, void *ptr)
3849{
3850 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3851 struct net_device *dev = ifa->ifa_dev->dev;
3852 struct mlxsw_sp *mlxsw_sp;
3853 struct mlxsw_sp_rif *r;
3854 int err = 0;
3855
3856 mlxsw_sp = mlxsw_sp_lower_get(dev);
3857 if (!mlxsw_sp)
3858 goto out;
3859
3860 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3861 if (!mlxsw_sp_rif_should_config(r, event))
3862 goto out;
3863
3864 if (mlxsw_sp_port_dev_check(dev))
3865 err = mlxsw_sp_inetaddr_port_event(dev, event);
3866 else if (netif_is_lag_master(dev))
3867 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003868 else if (netif_is_bridge_master(dev))
3869 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003870 else if (is_vlan_dev(dev))
3871 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3872
3873out:
3874 return notifier_from_errno(err);
3875}
3876
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003877static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3878 const char *mac, int mtu)
3879{
3880 char ritr_pl[MLXSW_REG_RITR_LEN];
3881 int err;
3882
3883 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3884 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3885 if (err)
3886 return err;
3887
3888 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3889 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3890 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3891 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3892}
3893
3894static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3895{
3896 struct mlxsw_sp *mlxsw_sp;
3897 struct mlxsw_sp_rif *r;
3898 int err;
3899
3900 mlxsw_sp = mlxsw_sp_lower_get(dev);
3901 if (!mlxsw_sp)
3902 return 0;
3903
3904 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3905 if (!r)
3906 return 0;
3907
3908 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3909 if (err)
3910 return err;
3911
3912 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3913 if (err)
3914 goto err_rif_edit;
3915
3916 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3917 if (err)
3918 goto err_rif_fdb_op;
3919
3920 ether_addr_copy(r->addr, dev->dev_addr);
3921 r->mtu = dev->mtu;
3922
3923 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3924
3925 return 0;
3926
3927err_rif_fdb_op:
3928 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3929err_rif_edit:
3930 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3931 return err;
3932}
3933
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003934static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3935 u16 fid)
3936{
3937 if (mlxsw_sp_fid_is_vfid(fid))
3938 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3939 else
3940 return test_bit(fid, lag_port->active_vlans);
3941}
3942
3943static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3944 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003945{
3946 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003947 u8 local_port = mlxsw_sp_port->local_port;
3948 u16 lag_id = mlxsw_sp_port->lag_id;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003949 u64 max_lag_members;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003950 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003951
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003952 if (!mlxsw_sp_port->lagged)
3953 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003954
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003955 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3956 MAX_LAG_MEMBERS);
3957 for (i = 0; i < max_lag_members; i++) {
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003958 struct mlxsw_sp_port *lag_port;
3959
3960 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3961 if (!lag_port || lag_port->local_port == local_port)
3962 continue;
3963 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3964 count++;
3965 }
3966
3967 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003968}
3969
3970static int
3971mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3972 u16 fid)
3973{
3974 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3975 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3976
3977 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3978 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3979 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3980 mlxsw_sp_port->local_port);
3981
Ido Schimmel22305372016-06-20 23:04:21 +02003982 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3983 mlxsw_sp_port->local_port, fid);
3984
Ido Schimmel039c49a2016-01-27 15:20:18 +01003985 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3986}
3987
3988static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003989mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3990 u16 fid)
3991{
3992 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3993 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3994
3995 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3996 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3997 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3998
Ido Schimmel22305372016-06-20 23:04:21 +02003999 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
4000 mlxsw_sp_port->lag_id, fid);
4001
Ido Schimmel039c49a2016-01-27 15:20:18 +01004002 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
4003}
4004
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004005int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01004006{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004007 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
4008 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004009
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004010 if (mlxsw_sp_port->lagged)
4011 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01004012 fid);
4013 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004014 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01004015}
4016
Ido Schimmel701b1862016-07-04 08:23:16 +02004017static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
4018{
4019 struct mlxsw_sp_fid *f, *tmp;
4020
4021 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
4022 if (--f->ref_count == 0)
4023 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4024 else
4025 WARN_ON_ONCE(1);
4026}
4027
Ido Schimmel7117a572016-06-20 23:04:06 +02004028static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
4029 struct net_device *br_dev)
4030{
4031 return !mlxsw_sp->master_bridge.dev ||
4032 mlxsw_sp->master_bridge.dev == br_dev;
4033}
4034
4035static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
4036 struct net_device *br_dev)
4037{
4038 mlxsw_sp->master_bridge.dev = br_dev;
4039 mlxsw_sp->master_bridge.ref_count++;
4040}
4041
4042static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
4043{
Ido Schimmel701b1862016-07-04 08:23:16 +02004044 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004045 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02004046 /* It's possible upper VLAN devices are still holding
4047 * references to underlying FIDs. Drop the reference
4048 * and release the resources if it was the last one.
4049 * If it wasn't, then something bad happened.
4050 */
4051 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
4052 }
Ido Schimmel7117a572016-06-20 23:04:06 +02004053}
4054
4055static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
4056 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004057{
4058 struct net_device *dev = mlxsw_sp_port->dev;
4059 int err;
4060
4061 /* When port is not bridged untagged packets are tagged with
4062 * PVID=VID=1, thereby creating an implicit VLAN interface in
4063 * the device. Remove it and let bridge code take care of its
4064 * own VLANs.
4065 */
4066 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01004067 if (err)
4068 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004069
Ido Schimmel7117a572016-06-20 23:04:06 +02004070 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
4071
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01004072 mlxsw_sp_port->learning = 1;
4073 mlxsw_sp_port->learning_sync = 1;
4074 mlxsw_sp_port->uc_flood = 1;
Nogah Frankel71c365b2017-02-09 14:54:46 +01004075 mlxsw_sp_port->mc_flood = 1;
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01004076 mlxsw_sp_port->bridged = 1;
4077
4078 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004079}
4080
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004081static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004082{
4083 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01004084
Ido Schimmel28a01d22016-02-18 11:30:02 +01004085 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
4086
Ido Schimmel7117a572016-06-20 23:04:06 +02004087 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
4088
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01004089 mlxsw_sp_port->learning = 0;
4090 mlxsw_sp_port->learning_sync = 0;
4091 mlxsw_sp_port->uc_flood = 0;
Nogah Frankel71c365b2017-02-09 14:54:46 +01004092 mlxsw_sp_port->mc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01004093 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004094
4095 /* Add implicit VLAN interface in the device, so that untagged
4096 * packets will be classified to the default vFID.
4097 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02004098 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004099}
4100
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004101static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004102{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004103 char sldr_pl[MLXSW_REG_SLDR_LEN];
4104
4105 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
4106 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4107}
4108
4109static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
4110{
4111 char sldr_pl[MLXSW_REG_SLDR_LEN];
4112
4113 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
4114 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4115}
4116
4117static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4118 u16 lag_id, u8 port_index)
4119{
4120 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4121 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4122
4123 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
4124 lag_id, port_index);
4125 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4126}
4127
4128static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4129 u16 lag_id)
4130{
4131 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4132 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4133
4134 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
4135 lag_id);
4136 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4137}
4138
4139static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
4140 u16 lag_id)
4141{
4142 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4143 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4144
4145 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
4146 lag_id);
4147 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4148}
4149
4150static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
4151 u16 lag_id)
4152{
4153 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4154 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4155
4156 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
4157 lag_id);
4158 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4159}
4160
4161static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4162 struct net_device *lag_dev,
4163 u16 *p_lag_id)
4164{
4165 struct mlxsw_sp_upper *lag;
4166 int free_lag_id = -1;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004167 u64 max_lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004168 int i;
4169
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004170 max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG);
4171 for (i = 0; i < max_lag; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004172 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
4173 if (lag->ref_count) {
4174 if (lag->dev == lag_dev) {
4175 *p_lag_id = i;
4176 return 0;
4177 }
4178 } else if (free_lag_id < 0) {
4179 free_lag_id = i;
4180 }
4181 }
4182 if (free_lag_id < 0)
4183 return -EBUSY;
4184 *p_lag_id = free_lag_id;
4185 return 0;
4186}
4187
4188static bool
4189mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
4190 struct net_device *lag_dev,
4191 struct netdev_lag_upper_info *lag_upper_info)
4192{
4193 u16 lag_id;
4194
4195 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
4196 return false;
4197 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
4198 return false;
4199 return true;
4200}
4201
4202static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4203 u16 lag_id, u8 *p_port_index)
4204{
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004205 u64 max_lag_members;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004206 int i;
4207
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004208 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
4209 MAX_LAG_MEMBERS);
4210 for (i = 0; i < max_lag_members; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004211 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
4212 *p_port_index = i;
4213 return 0;
4214 }
4215 }
4216 return -EBUSY;
4217}
4218
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004219static void
4220mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4221 u16 lag_id)
4222{
4223 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004224 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004225
4226 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4227 if (WARN_ON(!mlxsw_sp_vport))
4228 return;
4229
Ido Schimmel11943ff2016-07-02 11:00:12 +02004230 /* If vPort is assigned a RIF, then leave it since it's no
4231 * longer valid.
4232 */
4233 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4234 if (f)
4235 f->leave(mlxsw_sp_vport);
4236
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004237 mlxsw_sp_vport->lag_id = lag_id;
4238 mlxsw_sp_vport->lagged = 1;
4239}
4240
4241static void
4242mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4243{
4244 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004245 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004246
4247 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4248 if (WARN_ON(!mlxsw_sp_vport))
4249 return;
4250
Ido Schimmel11943ff2016-07-02 11:00:12 +02004251 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4252 if (f)
4253 f->leave(mlxsw_sp_vport);
4254
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004255 mlxsw_sp_vport->lagged = 0;
4256}
4257
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004258static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4259 struct net_device *lag_dev)
4260{
4261 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4262 struct mlxsw_sp_upper *lag;
4263 u16 lag_id;
4264 u8 port_index;
4265 int err;
4266
4267 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
4268 if (err)
4269 return err;
4270 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4271 if (!lag->ref_count) {
4272 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
4273 if (err)
4274 return err;
4275 lag->dev = lag_dev;
4276 }
4277
4278 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
4279 if (err)
4280 return err;
4281 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
4282 if (err)
4283 goto err_col_port_add;
4284 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
4285 if (err)
4286 goto err_col_port_enable;
4287
4288 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
4289 mlxsw_sp_port->local_port);
4290 mlxsw_sp_port->lag_id = lag_id;
4291 mlxsw_sp_port->lagged = 1;
4292 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004293
4294 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
4295
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004296 return 0;
4297
Ido Schimmel51554db2016-05-06 22:18:39 +02004298err_col_port_enable:
4299 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004300err_col_port_add:
4301 if (!lag->ref_count)
4302 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004303 return err;
4304}
4305
Ido Schimmel82e6db02016-06-20 23:04:04 +02004306static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
4307 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004308{
4309 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004310 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02004311 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004312
4313 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004314 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004315 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4316 WARN_ON(lag->ref_count == 0);
4317
Ido Schimmel82e6db02016-06-20 23:04:04 +02004318 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
4319 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004320
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004321 if (mlxsw_sp_port->bridged) {
4322 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004323 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004324 }
4325
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004326 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004327 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004328
4329 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4330 mlxsw_sp_port->local_port);
4331 mlxsw_sp_port->lagged = 0;
4332 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004333
4334 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004335}
4336
Jiri Pirko74581202015-12-03 12:12:30 +01004337static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4338 u16 lag_id)
4339{
4340 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4341 char sldr_pl[MLXSW_REG_SLDR_LEN];
4342
4343 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4344 mlxsw_sp_port->local_port);
4345 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4346}
4347
4348static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4349 u16 lag_id)
4350{
4351 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4352 char sldr_pl[MLXSW_REG_SLDR_LEN];
4353
4354 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4355 mlxsw_sp_port->local_port);
4356 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4357}
4358
4359static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4360 bool lag_tx_enabled)
4361{
4362 if (lag_tx_enabled)
4363 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4364 mlxsw_sp_port->lag_id);
4365 else
4366 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4367 mlxsw_sp_port->lag_id);
4368}
4369
4370static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4371 struct netdev_lag_lower_state_info *info)
4372{
4373 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4374}
4375
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004376static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4377 struct net_device *vlan_dev)
4378{
4379 struct mlxsw_sp_port *mlxsw_sp_vport;
4380 u16 vid = vlan_dev_vlan_id(vlan_dev);
4381
4382 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004383 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004384 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004385
4386 mlxsw_sp_vport->dev = vlan_dev;
4387
4388 return 0;
4389}
4390
Ido Schimmel82e6db02016-06-20 23:04:04 +02004391static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4392 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004393{
4394 struct mlxsw_sp_port *mlxsw_sp_vport;
4395 u16 vid = vlan_dev_vlan_id(vlan_dev);
4396
4397 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004398 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02004399 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004400
4401 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004402}
4403
Jiri Pirko74581202015-12-03 12:12:30 +01004404static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4405 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004406{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004407 struct netdev_notifier_changeupper_info *info;
4408 struct mlxsw_sp_port *mlxsw_sp_port;
4409 struct net_device *upper_dev;
4410 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004411 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004412
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004413 mlxsw_sp_port = netdev_priv(dev);
4414 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4415 info = ptr;
4416
4417 switch (event) {
4418 case NETDEV_PRECHANGEUPPER:
4419 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004420 if (!is_vlan_dev(upper_dev) &&
4421 !netif_is_lag_master(upper_dev) &&
4422 !netif_is_bridge_master(upper_dev))
4423 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004424 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004425 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004426 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004427 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004428 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004429 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004430 if (netif_is_lag_master(upper_dev) &&
4431 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4432 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004433 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004434 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4435 return -EINVAL;
4436 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4437 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4438 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004439 break;
4440 case NETDEV_CHANGEUPPER:
4441 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004442 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004443 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004444 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4445 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004446 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004447 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4448 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004449 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004450 if (info->linking)
4451 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4452 upper_dev);
4453 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004454 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004455 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004456 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004457 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4458 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004459 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004460 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4461 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004462 } else {
4463 err = -EINVAL;
4464 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004465 }
4466 break;
4467 }
4468
Ido Schimmel80bedf12016-06-20 23:03:59 +02004469 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004470}
4471
Jiri Pirko74581202015-12-03 12:12:30 +01004472static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4473 unsigned long event, void *ptr)
4474{
4475 struct netdev_notifier_changelowerstate_info *info;
4476 struct mlxsw_sp_port *mlxsw_sp_port;
4477 int err;
4478
4479 mlxsw_sp_port = netdev_priv(dev);
4480 info = ptr;
4481
4482 switch (event) {
4483 case NETDEV_CHANGELOWERSTATE:
4484 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4485 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4486 info->lower_state_info);
4487 if (err)
4488 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4489 }
4490 break;
4491 }
4492
Ido Schimmel80bedf12016-06-20 23:03:59 +02004493 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004494}
4495
4496static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4497 unsigned long event, void *ptr)
4498{
4499 switch (event) {
4500 case NETDEV_PRECHANGEUPPER:
4501 case NETDEV_CHANGEUPPER:
4502 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4503 case NETDEV_CHANGELOWERSTATE:
4504 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4505 }
4506
Ido Schimmel80bedf12016-06-20 23:03:59 +02004507 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004508}
4509
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004510static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4511 unsigned long event, void *ptr)
4512{
4513 struct net_device *dev;
4514 struct list_head *iter;
4515 int ret;
4516
4517 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4518 if (mlxsw_sp_port_dev_check(dev)) {
4519 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004520 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004521 return ret;
4522 }
4523 }
4524
Ido Schimmel80bedf12016-06-20 23:03:59 +02004525 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004526}
4527
Ido Schimmel701b1862016-07-04 08:23:16 +02004528static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4529 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004530{
Ido Schimmel701b1862016-07-04 08:23:16 +02004531 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004532 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004533
Ido Schimmel701b1862016-07-04 08:23:16 +02004534 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4535 if (!f) {
4536 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4537 if (IS_ERR(f))
4538 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004539 }
4540
Ido Schimmel701b1862016-07-04 08:23:16 +02004541 f->ref_count++;
4542
4543 return 0;
4544}
4545
4546static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4547 struct net_device *vlan_dev)
4548{
4549 u16 fid = vlan_dev_vlan_id(vlan_dev);
4550 struct mlxsw_sp_fid *f;
4551
4552 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004553 if (f && f->r)
4554 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004555 if (f && --f->ref_count == 0)
4556 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4557}
4558
4559static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4560 unsigned long event, void *ptr)
4561{
4562 struct netdev_notifier_changeupper_info *info;
4563 struct net_device *upper_dev;
4564 struct mlxsw_sp *mlxsw_sp;
4565 int err;
4566
4567 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4568 if (!mlxsw_sp)
4569 return 0;
4570 if (br_dev != mlxsw_sp->master_bridge.dev)
4571 return 0;
4572
4573 info = ptr;
4574
4575 switch (event) {
4576 case NETDEV_CHANGEUPPER:
4577 upper_dev = info->upper_dev;
4578 if (!is_vlan_dev(upper_dev))
4579 break;
4580 if (info->linking) {
4581 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4582 upper_dev);
4583 if (err)
4584 return err;
4585 } else {
4586 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4587 }
4588 break;
4589 }
4590
4591 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004592}
4593
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004594static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004595{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004596 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004597 MLXSW_SP_VFID_MAX);
4598}
4599
4600static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4601{
4602 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4603
4604 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4605 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004606}
4607
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004608static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004609
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004610static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4611 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004612{
4613 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004614 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004615 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004616 int err;
4617
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004618 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004619 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004620 dev_err(dev, "No available vFIDs\n");
4621 return ERR_PTR(-ERANGE);
4622 }
4623
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004624 fid = mlxsw_sp_vfid_to_fid(vfid);
4625 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004626 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004627 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004628 return ERR_PTR(err);
4629 }
4630
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004631 f = kzalloc(sizeof(*f), GFP_KERNEL);
4632 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004633 goto err_allocate_vfid;
4634
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004635 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004636 f->fid = fid;
4637 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004638
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004639 list_add(&f->list, &mlxsw_sp->vfids.list);
4640 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004641
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004642 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004643
4644err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004645 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004646 return ERR_PTR(-ENOMEM);
4647}
4648
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004649static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4650 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004651{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004652 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004653 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004654
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004655 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004656 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004657
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004658 if (f->r)
4659 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004660
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004661 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004662
4663 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004664}
4665
Ido Schimmel99724c12016-07-04 08:23:14 +02004666static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4667 bool valid)
4668{
4669 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4670 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4671
4672 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4673 vid);
4674}
4675
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004676static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4677 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004678{
Ido Schimmel0355b592016-06-20 23:04:13 +02004679 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004680 int err;
4681
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004682 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004683 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004684 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004685 if (IS_ERR(f))
4686 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004687 }
4688
Ido Schimmel0355b592016-06-20 23:04:13 +02004689 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4690 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004691 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004692
Ido Schimmel0355b592016-06-20 23:04:13 +02004693 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4694 if (err)
4695 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004696
Ido Schimmel41b996c2016-06-20 23:04:17 +02004697 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004698 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004699
Ido Schimmel22305372016-06-20 23:04:21 +02004700 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4701
Ido Schimmel0355b592016-06-20 23:04:13 +02004702 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004703
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004704err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004705 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4706err_vport_flood_set:
4707 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004708 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004709 return err;
4710}
4711
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004712static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004713{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004714 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004715
Ido Schimmel22305372016-06-20 23:04:21 +02004716 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4717
Ido Schimmel0355b592016-06-20 23:04:13 +02004718 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4719
4720 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4721
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004722 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4723
Ido Schimmel41b996c2016-06-20 23:04:17 +02004724 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004725 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004726 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004727}
4728
4729static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4730 struct net_device *br_dev)
4731{
Ido Schimmel99724c12016-07-04 08:23:14 +02004732 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004733 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4734 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004735 int err;
4736
Ido Schimmel99724c12016-07-04 08:23:14 +02004737 if (f && !WARN_ON(!f->leave))
4738 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004739
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004740 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004741 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004742 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004743 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004744 }
4745
4746 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4747 if (err) {
4748 netdev_err(dev, "Failed to enable learning\n");
4749 goto err_port_vid_learning_set;
4750 }
4751
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004752 mlxsw_sp_vport->learning = 1;
4753 mlxsw_sp_vport->learning_sync = 1;
4754 mlxsw_sp_vport->uc_flood = 1;
Nogah Frankel71c365b2017-02-09 14:54:46 +01004755 mlxsw_sp_vport->mc_flood = 1;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004756 mlxsw_sp_vport->bridged = 1;
4757
4758 return 0;
4759
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004760err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004761 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004762 return err;
4763}
4764
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004765static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004766{
4767 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004768
4769 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4770
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004771 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004772
Ido Schimmel0355b592016-06-20 23:04:13 +02004773 mlxsw_sp_vport->learning = 0;
4774 mlxsw_sp_vport->learning_sync = 0;
4775 mlxsw_sp_vport->uc_flood = 0;
Nogah Frankel71c365b2017-02-09 14:54:46 +01004776 mlxsw_sp_vport->mc_flood = 0;
Ido Schimmel0355b592016-06-20 23:04:13 +02004777 mlxsw_sp_vport->bridged = 0;
4778}
4779
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004780static bool
4781mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4782 const struct net_device *br_dev)
4783{
4784 struct mlxsw_sp_port *mlxsw_sp_vport;
4785
4786 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4787 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004788 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004789
4790 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004791 return false;
4792 }
4793
4794 return true;
4795}
4796
4797static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4798 unsigned long event, void *ptr,
4799 u16 vid)
4800{
4801 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4802 struct netdev_notifier_changeupper_info *info = ptr;
4803 struct mlxsw_sp_port *mlxsw_sp_vport;
4804 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004805 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004806
4807 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4808
4809 switch (event) {
4810 case NETDEV_PRECHANGEUPPER:
4811 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004812 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004813 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004814 if (!info->linking)
4815 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004816 /* We can't have multiple VLAN interfaces configured on
4817 * the same port and being members in the same bridge.
4818 */
4819 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4820 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004821 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004822 break;
4823 case NETDEV_CHANGEUPPER:
4824 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004825 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004826 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004827 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004828 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4829 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004830 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004831 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004832 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004833 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004834 }
4835 }
4836
Ido Schimmel80bedf12016-06-20 23:03:59 +02004837 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004838}
4839
Ido Schimmel272c4472015-12-15 16:03:47 +01004840static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4841 unsigned long event, void *ptr,
4842 u16 vid)
4843{
4844 struct net_device *dev;
4845 struct list_head *iter;
4846 int ret;
4847
4848 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4849 if (mlxsw_sp_port_dev_check(dev)) {
4850 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4851 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004852 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004853 return ret;
4854 }
4855 }
4856
Ido Schimmel80bedf12016-06-20 23:03:59 +02004857 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004858}
4859
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004860static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4861 unsigned long event, void *ptr)
4862{
4863 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4864 u16 vid = vlan_dev_vlan_id(vlan_dev);
4865
Ido Schimmel272c4472015-12-15 16:03:47 +01004866 if (mlxsw_sp_port_dev_check(real_dev))
4867 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4868 vid);
4869 else if (netif_is_lag_master(real_dev))
4870 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4871 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004872
Ido Schimmel80bedf12016-06-20 23:03:59 +02004873 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004874}
4875
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004876static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4877 unsigned long event, void *ptr)
4878{
4879 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004880 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004881
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004882 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4883 err = mlxsw_sp_netdevice_router_port_event(dev);
4884 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004885 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4886 else if (netif_is_lag_master(dev))
4887 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004888 else if (netif_is_bridge_master(dev))
4889 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004890 else if (is_vlan_dev(dev))
4891 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004892
Ido Schimmel80bedf12016-06-20 23:03:59 +02004893 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004894}
4895
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004896static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4897 .notifier_call = mlxsw_sp_netdevice_event,
4898};
4899
Ido Schimmel99724c12016-07-04 08:23:14 +02004900static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4901 .notifier_call = mlxsw_sp_inetaddr_event,
4902 .priority = 10, /* Must be called before FIB notifier block */
4903};
4904
Jiri Pirkoe7322632016-09-01 10:37:43 +02004905static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4906 .notifier_call = mlxsw_sp_router_netevent_event,
4907};
4908
Jiri Pirko1d20d232016-10-27 15:12:59 +02004909static const struct pci_device_id mlxsw_sp_pci_id_table[] = {
4910 {PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
4911 {0, },
4912};
4913
4914static struct pci_driver mlxsw_sp_pci_driver = {
4915 .name = mlxsw_sp_driver_name,
4916 .id_table = mlxsw_sp_pci_id_table,
4917};
4918
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004919static int __init mlxsw_sp_module_init(void)
4920{
4921 int err;
4922
4923 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004924 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004925 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4926
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004927 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4928 if (err)
4929 goto err_core_driver_register;
Jiri Pirko1d20d232016-10-27 15:12:59 +02004930
4931 err = mlxsw_pci_driver_register(&mlxsw_sp_pci_driver);
4932 if (err)
4933 goto err_pci_driver_register;
4934
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004935 return 0;
4936
Jiri Pirko1d20d232016-10-27 15:12:59 +02004937err_pci_driver_register:
4938 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004939err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004940 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004941 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004942 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4943 return err;
4944}
4945
4946static void __exit mlxsw_sp_module_exit(void)
4947{
Jiri Pirko1d20d232016-10-27 15:12:59 +02004948 mlxsw_pci_driver_unregister(&mlxsw_sp_pci_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004949 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004950 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004951 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004952 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4953}
4954
4955module_init(mlxsw_sp_module_init);
4956module_exit(mlxsw_sp_module_exit);
4957
4958MODULE_LICENSE("Dual BSD/GPL");
4959MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4960MODULE_DESCRIPTION("Mellanox Spectrum driver");
Jiri Pirko1d20d232016-10-27 15:12:59 +02004961MODULE_DEVICE_TABLE(pci, mlxsw_sp_pci_id_table);