blob: 27bbcaf9cfcd06732be53ce747f0ff96335ebbd2 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010051#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020052#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020053#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020054#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020055#include <net/switchdev.h>
56#include <generated/utsrelease.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020060
61#include "spectrum.h"
62#include "core.h"
63#include "reg.h"
64#include "port.h"
65#include "trap.h"
66#include "txheader.h"
67
68static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
69static const char mlxsw_sp_driver_version[] = "1.0";
70
71/* tx_hdr_version
72 * Tx header version.
73 * Must be set to 1.
74 */
75MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
76
77/* tx_hdr_ctl
78 * Packet control type.
79 * 0 - Ethernet control (e.g. EMADs, LACP)
80 * 1 - Ethernet data
81 */
82MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
83
84/* tx_hdr_proto
85 * Packet protocol type. Must be set to 1 (Ethernet).
86 */
87MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
88
89/* tx_hdr_rx_is_router
90 * Packet is sent from the router. Valid for data packets only.
91 */
92MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
93
94/* tx_hdr_fid_valid
95 * Indicates if the 'fid' field is valid and should be used for
96 * forwarding lookup. Valid for data packets only.
97 */
98MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
99
100/* tx_hdr_swid
101 * Switch partition ID. Must be set to 0.
102 */
103MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
104
105/* tx_hdr_control_tclass
106 * Indicates if the packet should use the control TClass and not one
107 * of the data TClasses.
108 */
109MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
110
111/* tx_hdr_etclass
112 * Egress TClass to be used on the egress device on the egress port.
113 */
114MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
115
116/* tx_hdr_port_mid
117 * Destination local port for unicast packets.
118 * Destination multicast ID for multicast packets.
119 *
120 * Control packets are directed to a specific egress port, while data
121 * packets are transmitted through the CPU port (0) into the switch partition,
122 * where forwarding rules are applied.
123 */
124MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
125
126/* tx_hdr_fid
127 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
128 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
129 * Valid for data packets only.
130 */
131MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
132
133/* tx_hdr_type
134 * 0 - Data packets
135 * 6 - Control packets
136 */
137MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
138
Yotam Gigi763b4b72016-07-21 12:03:17 +0200139static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
140
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200141static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
142 const struct mlxsw_tx_info *tx_info)
143{
144 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
145
146 memset(txhdr, 0, MLXSW_TXHDR_LEN);
147
148 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
149 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
150 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
151 mlxsw_tx_hdr_swid_set(txhdr, 0);
152 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
153 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
154 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
155}
156
157static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
158{
159 char spad_pl[MLXSW_REG_SPAD_LEN];
160 int err;
161
162 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
163 if (err)
164 return err;
165 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
166 return 0;
167}
168
Yotam Gigi763b4b72016-07-21 12:03:17 +0200169static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
170{
171 struct mlxsw_resources *resources;
172 int i;
173
174 resources = mlxsw_core_resources_get(mlxsw_sp->core);
175 if (!resources->max_span_valid)
176 return -EIO;
177
178 mlxsw_sp->span.entries_count = resources->max_span;
179 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
180 sizeof(struct mlxsw_sp_span_entry),
181 GFP_KERNEL);
182 if (!mlxsw_sp->span.entries)
183 return -ENOMEM;
184
185 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
186 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
187
188 return 0;
189}
190
191static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
192{
193 int i;
194
195 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
196 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
197
198 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
199 }
200 kfree(mlxsw_sp->span.entries);
201}
202
203static struct mlxsw_sp_span_entry *
204mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
205{
206 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
207 struct mlxsw_sp_span_entry *span_entry;
208 char mpat_pl[MLXSW_REG_MPAT_LEN];
209 u8 local_port = port->local_port;
210 int index;
211 int i;
212 int err;
213
214 /* find a free entry to use */
215 index = -1;
216 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
217 if (!mlxsw_sp->span.entries[i].used) {
218 index = i;
219 span_entry = &mlxsw_sp->span.entries[i];
220 break;
221 }
222 }
223 if (index < 0)
224 return NULL;
225
226 /* create a new port analayzer entry for local_port */
227 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
228 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
229 if (err)
230 return NULL;
231
232 span_entry->used = true;
233 span_entry->id = index;
234 span_entry->ref_count = 0;
235 span_entry->local_port = local_port;
236 return span_entry;
237}
238
239static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
240 struct mlxsw_sp_span_entry *span_entry)
241{
242 u8 local_port = span_entry->local_port;
243 char mpat_pl[MLXSW_REG_MPAT_LEN];
244 int pa_id = span_entry->id;
245
246 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
247 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
248 span_entry->used = false;
249}
250
251struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
252{
253 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
254 int i;
255
256 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
257 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
258
259 if (curr->used && curr->local_port == port->local_port)
260 return curr;
261 }
262 return NULL;
263}
264
265struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
266{
267 struct mlxsw_sp_span_entry *span_entry;
268
269 span_entry = mlxsw_sp_span_entry_find(port);
270 if (span_entry) {
271 span_entry->ref_count++;
272 return span_entry;
273 }
274
275 return mlxsw_sp_span_entry_create(port);
276}
277
278static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
279 struct mlxsw_sp_span_entry *span_entry)
280{
281 if (--span_entry->ref_count == 0)
282 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
283 return 0;
284}
285
286static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
287{
288 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
289 struct mlxsw_sp_span_inspected_port *p;
290 int i;
291
292 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
293 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
294
295 list_for_each_entry(p, &curr->bound_ports_list, list)
296 if (p->local_port == port->local_port &&
297 p->type == MLXSW_SP_SPAN_EGRESS)
298 return true;
299 }
300
301 return false;
302}
303
304static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
305{
306 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
307}
308
309static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
310{
311 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
312 char sbib_pl[MLXSW_REG_SBIB_LEN];
313 int err;
314
315 /* If port is egress mirrored, the shared buffer size should be
316 * updated according to the mtu value
317 */
318 if (mlxsw_sp_span_is_egress_mirror(port)) {
319 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
320 mlxsw_sp_span_mtu_to_buffsize(mtu));
321 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
322 if (err) {
323 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
324 return err;
325 }
326 }
327
328 return 0;
329}
330
331static struct mlxsw_sp_span_inspected_port *
332mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
333 struct mlxsw_sp_span_entry *span_entry)
334{
335 struct mlxsw_sp_span_inspected_port *p;
336
337 list_for_each_entry(p, &span_entry->bound_ports_list, list)
338 if (port->local_port == p->local_port)
339 return p;
340 return NULL;
341}
342
343static int
344mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
345 struct mlxsw_sp_span_entry *span_entry,
346 enum mlxsw_sp_span_type type)
347{
348 struct mlxsw_sp_span_inspected_port *inspected_port;
349 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
350 char mpar_pl[MLXSW_REG_MPAR_LEN];
351 char sbib_pl[MLXSW_REG_SBIB_LEN];
352 int pa_id = span_entry->id;
353 int err;
354
355 /* if it is an egress SPAN, bind a shared buffer to it */
356 if (type == MLXSW_SP_SPAN_EGRESS) {
357 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
358 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
359 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
360 if (err) {
361 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
362 return err;
363 }
364 }
365
366 /* bind the port to the SPAN entry */
367 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, true, pa_id);
368 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
369 if (err)
370 goto err_mpar_reg_write;
371
372 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
373 if (!inspected_port) {
374 err = -ENOMEM;
375 goto err_inspected_port_alloc;
376 }
377 inspected_port->local_port = port->local_port;
378 inspected_port->type = type;
379 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
380
381 return 0;
382
383err_mpar_reg_write:
384err_inspected_port_alloc:
385 if (type == MLXSW_SP_SPAN_EGRESS) {
386 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
387 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
388 }
389 return err;
390}
391
392static void
393mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
394 struct mlxsw_sp_span_entry *span_entry,
395 enum mlxsw_sp_span_type type)
396{
397 struct mlxsw_sp_span_inspected_port *inspected_port;
398 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
399 char mpar_pl[MLXSW_REG_MPAR_LEN];
400 char sbib_pl[MLXSW_REG_SBIB_LEN];
401 int pa_id = span_entry->id;
402
403 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
404 if (!inspected_port)
405 return;
406
407 /* remove the inspected port */
408 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, false, pa_id);
409 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
410
411 /* remove the SBIB buffer if it was egress SPAN */
412 if (type == MLXSW_SP_SPAN_EGRESS) {
413 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
414 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
415 }
416
417 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
418
419 list_del(&inspected_port->list);
420 kfree(inspected_port);
421}
422
423static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
424 struct mlxsw_sp_port *to,
425 enum mlxsw_sp_span_type type)
426{
427 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
428 struct mlxsw_sp_span_entry *span_entry;
429 int err;
430
431 span_entry = mlxsw_sp_span_entry_get(to);
432 if (!span_entry)
433 return -ENOENT;
434
435 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
436 span_entry->id);
437
438 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
439 if (err)
440 goto err_port_bind;
441
442 return 0;
443
444err_port_bind:
445 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
446 return err;
447}
448
449static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
450 struct mlxsw_sp_port *to,
451 enum mlxsw_sp_span_type type)
452{
453 struct mlxsw_sp_span_entry *span_entry;
454
455 span_entry = mlxsw_sp_span_entry_find(to);
456 if (!span_entry) {
457 netdev_err(from->dev, "no span entry found\n");
458 return;
459 }
460
461 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
462 span_entry->id);
463 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
464}
465
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200466static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
467 bool is_up)
468{
469 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
470 char paos_pl[MLXSW_REG_PAOS_LEN];
471
472 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
473 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
474 MLXSW_PORT_ADMIN_STATUS_DOWN);
475 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
476}
477
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200478static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
479 unsigned char *addr)
480{
481 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
482 char ppad_pl[MLXSW_REG_PPAD_LEN];
483
484 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
485 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
486 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
487}
488
489static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
490{
491 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
492 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
493
494 ether_addr_copy(addr, mlxsw_sp->base_mac);
495 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
496 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
497}
498
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200499static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
500{
501 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
502 char pmtu_pl[MLXSW_REG_PMTU_LEN];
503 int max_mtu;
504 int err;
505
506 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
507 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
508 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
509 if (err)
510 return err;
511 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
512
513 if (mtu > max_mtu)
514 return -EINVAL;
515
516 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
517 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
518}
519
Ido Schimmelbe945352016-06-09 09:51:39 +0200520static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
521 u8 swid)
522{
523 char pspa_pl[MLXSW_REG_PSPA_LEN];
524
525 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
526 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
527}
528
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200529static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
530{
531 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200532
Ido Schimmelbe945352016-06-09 09:51:39 +0200533 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
534 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200535}
536
537static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
538 bool enable)
539{
540 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
541 char svpe_pl[MLXSW_REG_SVPE_LEN];
542
543 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
544 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
545}
546
547int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
548 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
549 u16 vid)
550{
551 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
552 char svfa_pl[MLXSW_REG_SVFA_LEN];
553
554 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
555 fid, vid);
556 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
557}
558
Ido Schimmel584d73d2016-08-24 12:00:26 +0200559int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
560 u16 vid_begin, u16 vid_end,
561 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200562{
563 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
564 char *spvmlr_pl;
565 int err;
566
567 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
568 if (!spvmlr_pl)
569 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200570 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
571 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200572 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
573 kfree(spvmlr_pl);
574 return err;
575}
576
Ido Schimmel584d73d2016-08-24 12:00:26 +0200577static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
578 u16 vid, bool learn_enable)
579{
580 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
581 learn_enable);
582}
583
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200584static int
585mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
586{
587 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
588 char sspr_pl[MLXSW_REG_SSPR_LEN];
589
590 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
591 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
592}
593
Ido Schimmeld664b412016-06-09 09:51:40 +0200594static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
595 u8 local_port, u8 *p_module,
596 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200597{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200598 char pmlp_pl[MLXSW_REG_PMLP_LEN];
599 int err;
600
Ido Schimmel558c2d52016-02-26 17:32:29 +0100601 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200602 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
603 if (err)
604 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100605 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
606 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200607 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200608 return 0;
609}
610
Ido Schimmel18f1e702016-02-26 17:32:31 +0100611static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
612 u8 module, u8 width, u8 lane)
613{
614 char pmlp_pl[MLXSW_REG_PMLP_LEN];
615 int i;
616
617 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
618 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
619 for (i = 0; i < width; i++) {
620 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
621 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
622 }
623
624 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
625}
626
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100627static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
628{
629 char pmlp_pl[MLXSW_REG_PMLP_LEN];
630
631 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
632 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
633 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
634}
635
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200636static int mlxsw_sp_port_open(struct net_device *dev)
637{
638 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
639 int err;
640
641 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
642 if (err)
643 return err;
644 netif_start_queue(dev);
645 return 0;
646}
647
648static int mlxsw_sp_port_stop(struct net_device *dev)
649{
650 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
651
652 netif_stop_queue(dev);
653 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
654}
655
656static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
657 struct net_device *dev)
658{
659 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
660 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
661 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
662 const struct mlxsw_tx_info tx_info = {
663 .local_port = mlxsw_sp_port->local_port,
664 .is_emad = false,
665 };
666 u64 len;
667 int err;
668
Jiri Pirko307c2432016-04-08 19:11:22 +0200669 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200670 return NETDEV_TX_BUSY;
671
672 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
673 struct sk_buff *skb_orig = skb;
674
675 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
676 if (!skb) {
677 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
678 dev_kfree_skb_any(skb_orig);
679 return NETDEV_TX_OK;
680 }
681 }
682
683 if (eth_skb_pad(skb)) {
684 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
685 return NETDEV_TX_OK;
686 }
687
688 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200689 /* TX header is consumed by HW on the way so we shouldn't count its
690 * bytes as being sent.
691 */
692 len = skb->len - MLXSW_TXHDR_LEN;
693
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200694 /* Due to a race we might fail here because of a full queue. In that
695 * unlikely case we simply drop the packet.
696 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200697 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200698
699 if (!err) {
700 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
701 u64_stats_update_begin(&pcpu_stats->syncp);
702 pcpu_stats->tx_packets++;
703 pcpu_stats->tx_bytes += len;
704 u64_stats_update_end(&pcpu_stats->syncp);
705 } else {
706 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
707 dev_kfree_skb_any(skb);
708 }
709 return NETDEV_TX_OK;
710}
711
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100712static void mlxsw_sp_set_rx_mode(struct net_device *dev)
713{
714}
715
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200716static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
717{
718 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
719 struct sockaddr *addr = p;
720 int err;
721
722 if (!is_valid_ether_addr(addr->sa_data))
723 return -EADDRNOTAVAIL;
724
725 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
726 if (err)
727 return err;
728 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
729 return 0;
730}
731
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200732static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200733 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200734{
735 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
736
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200737 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
738 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200739
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200740 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200741 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200742 pg_size + delay, pg_size);
743 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200744 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200745}
746
747int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200748 u8 *prio_tc, bool pause_en,
749 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200750{
751 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200752 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
753 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200754 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200755 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200756
757 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
758 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
759 if (err)
760 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200761
762 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
763 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200764 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200765
766 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
767 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200768 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200769 configure = true;
770 break;
771 }
772 }
773
774 if (!configure)
775 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200776 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200777 }
778
Ido Schimmelff6551e2016-04-06 17:10:03 +0200779 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
780}
781
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200782static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200783 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200784{
785 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
786 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200787 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200788 u8 *prio_tc;
789
790 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200791 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200792
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200793 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200794 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200795}
796
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200797static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
798{
799 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200800 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200801 int err;
802
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200803 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200804 if (err)
805 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200806 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
807 if (err)
808 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200809 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
810 if (err)
811 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200812 dev->mtu = mtu;
813 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200814
815err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200816 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
817err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200818 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200819 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200820}
821
822static struct rtnl_link_stats64 *
823mlxsw_sp_port_get_stats64(struct net_device *dev,
824 struct rtnl_link_stats64 *stats)
825{
826 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
827 struct mlxsw_sp_port_pcpu_stats *p;
828 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
829 u32 tx_dropped = 0;
830 unsigned int start;
831 int i;
832
833 for_each_possible_cpu(i) {
834 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
835 do {
836 start = u64_stats_fetch_begin_irq(&p->syncp);
837 rx_packets = p->rx_packets;
838 rx_bytes = p->rx_bytes;
839 tx_packets = p->tx_packets;
840 tx_bytes = p->tx_bytes;
841 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
842
843 stats->rx_packets += rx_packets;
844 stats->rx_bytes += rx_bytes;
845 stats->tx_packets += tx_packets;
846 stats->tx_bytes += tx_bytes;
847 /* tx_dropped is u32, updated without syncp protection. */
848 tx_dropped += p->tx_dropped;
849 }
850 stats->tx_dropped = tx_dropped;
851 return stats;
852}
853
854int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
855 u16 vid_end, bool is_member, bool untagged)
856{
857 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
858 char *spvm_pl;
859 int err;
860
861 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
862 if (!spvm_pl)
863 return -ENOMEM;
864
865 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
866 vid_end, is_member, untagged);
867 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
868 kfree(spvm_pl);
869 return err;
870}
871
872static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
873{
874 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
875 u16 vid, last_visited_vid;
876 int err;
877
878 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
879 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
880 vid);
881 if (err) {
882 last_visited_vid = vid;
883 goto err_port_vid_to_fid_set;
884 }
885 }
886
887 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
888 if (err) {
889 last_visited_vid = VLAN_N_VID;
890 goto err_port_vid_to_fid_set;
891 }
892
893 return 0;
894
895err_port_vid_to_fid_set:
896 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
897 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
898 vid);
899 return err;
900}
901
902static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
903{
904 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
905 u16 vid;
906 int err;
907
908 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
909 if (err)
910 return err;
911
912 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
913 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
914 vid, vid);
915 if (err)
916 return err;
917 }
918
919 return 0;
920}
921
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100922static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +0200923mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100924{
925 struct mlxsw_sp_port *mlxsw_sp_vport;
926
927 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
928 if (!mlxsw_sp_vport)
929 return NULL;
930
931 /* dev will be set correctly after the VLAN device is linked
932 * with the real device. In case of bridge SELF invocation, dev
933 * will remain as is.
934 */
935 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
936 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
937 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
938 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +0100939 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
940 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +0200941 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100942
943 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
944
945 return mlxsw_sp_vport;
946}
947
948static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
949{
950 list_del(&mlxsw_sp_vport->vport.list);
951 kfree(mlxsw_sp_vport);
952}
953
Ido Schimmel05978482016-08-17 16:39:30 +0200954static int mlxsw_sp_port_add_vid(struct net_device *dev,
955 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200956{
957 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100958 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +0200959 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200960 int err;
961
962 /* VLAN 0 is added to HW filter when device goes up, but it is
963 * reserved in our case, so simply return.
964 */
965 if (!vid)
966 return 0;
967
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200968 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200969 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200970
Ido Schimmel0355b592016-06-20 23:04:13 +0200971 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200972 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +0200973 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200974
975 /* When adding the first VLAN interface on a bridged port we need to
976 * transition all the active 802.1Q bridge VLANs to use explicit
977 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
978 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100979 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200980 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200981 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100982 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200983 }
984
Ido Schimmel52697a92016-07-02 11:00:09 +0200985 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +0200986 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200987 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200988
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200989 return 0;
990
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200991err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100992 if (list_is_singular(&mlxsw_sp_port->vports_list))
993 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
994err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100995 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200996 return err;
997}
998
Ido Schimmel32d863f2016-07-02 11:00:10 +0200999static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1000 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001001{
1002 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001003 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001004 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001005
1006 /* VLAN 0 is removed from HW filter when device goes down, but
1007 * it is reserved in our case, so simply return.
1008 */
1009 if (!vid)
1010 return 0;
1011
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001012 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001013 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001014 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001015
Ido Schimmel7a355832016-08-17 16:39:28 +02001016 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001017
Ido Schimmel1c800752016-06-20 23:04:20 +02001018 /* Drop FID reference. If this was the last reference the
1019 * resources will be freed.
1020 */
1021 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1022 if (f && !WARN_ON(!f->leave))
1023 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001024
1025 /* When removing the last VLAN interface on a bridged port we need to
1026 * transition all active 802.1Q bridge VLANs to use VID to FID
1027 * mappings and set port's mode to VLAN mode.
1028 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001029 if (list_is_singular(&mlxsw_sp_port->vports_list))
1030 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001031
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001032 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1033
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001034 return 0;
1035}
1036
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001037static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1038 size_t len)
1039{
1040 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001041 u8 module = mlxsw_sp_port->mapping.module;
1042 u8 width = mlxsw_sp_port->mapping.width;
1043 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001044 int err;
1045
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001046 if (!mlxsw_sp_port->split)
1047 err = snprintf(name, len, "p%d", module + 1);
1048 else
1049 err = snprintf(name, len, "p%ds%d", module + 1,
1050 lane / width);
1051
1052 if (err >= len)
1053 return -EINVAL;
1054
1055 return 0;
1056}
1057
Yotam Gigi763b4b72016-07-21 12:03:17 +02001058static struct mlxsw_sp_port_mall_tc_entry *
1059mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1060 unsigned long cookie) {
1061 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1062
1063 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1064 if (mall_tc_entry->cookie == cookie)
1065 return mall_tc_entry;
1066
1067 return NULL;
1068}
1069
1070static int
1071mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1072 struct tc_cls_matchall_offload *cls,
1073 const struct tc_action *a,
1074 bool ingress)
1075{
1076 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1077 struct net *net = dev_net(mlxsw_sp_port->dev);
1078 enum mlxsw_sp_span_type span_type;
1079 struct mlxsw_sp_port *to_port;
1080 struct net_device *to_dev;
1081 int ifindex;
1082 int err;
1083
1084 ifindex = tcf_mirred_ifindex(a);
1085 to_dev = __dev_get_by_index(net, ifindex);
1086 if (!to_dev) {
1087 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1088 return -EINVAL;
1089 }
1090
1091 if (!mlxsw_sp_port_dev_check(to_dev)) {
1092 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1093 return -ENOTSUPP;
1094 }
1095 to_port = netdev_priv(to_dev);
1096
1097 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1098 if (!mall_tc_entry)
1099 return -ENOMEM;
1100
1101 mall_tc_entry->cookie = cls->cookie;
1102 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1103 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1104 mall_tc_entry->mirror.ingress = ingress;
1105 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1106
1107 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1108 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1109 if (err)
1110 goto err_mirror_add;
1111 return 0;
1112
1113err_mirror_add:
1114 list_del(&mall_tc_entry->list);
1115 kfree(mall_tc_entry);
1116 return err;
1117}
1118
1119static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1120 __be16 protocol,
1121 struct tc_cls_matchall_offload *cls,
1122 bool ingress)
1123{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001124 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001125 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001126 int err;
1127
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001128 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001129 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1130 return -ENOTSUPP;
1131 }
1132
WANG Cong22dc13c2016-08-13 22:35:00 -07001133 tcf_exts_to_list(cls->exts, &actions);
1134 list_for_each_entry(a, &actions, list) {
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001135 if (!is_tcf_mirred_mirror(a) || protocol != htons(ETH_P_ALL))
1136 return -ENOTSUPP;
1137
Yotam Gigi763b4b72016-07-21 12:03:17 +02001138 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1139 a, ingress);
1140 if (err)
1141 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001142 }
1143
1144 return 0;
1145}
1146
1147static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1148 struct tc_cls_matchall_offload *cls)
1149{
1150 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1151 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1152 enum mlxsw_sp_span_type span_type;
1153 struct mlxsw_sp_port *to_port;
1154
1155 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1156 cls->cookie);
1157 if (!mall_tc_entry) {
1158 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1159 return;
1160 }
1161
1162 switch (mall_tc_entry->type) {
1163 case MLXSW_SP_PORT_MALL_MIRROR:
1164 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1165 span_type = mall_tc_entry->mirror.ingress ?
1166 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1167
1168 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1169 break;
1170 default:
1171 WARN_ON(1);
1172 }
1173
1174 list_del(&mall_tc_entry->list);
1175 kfree(mall_tc_entry);
1176}
1177
1178static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1179 __be16 proto, struct tc_to_netdev *tc)
1180{
1181 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1182 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1183
1184 if (tc->type == TC_SETUP_MATCHALL) {
1185 switch (tc->cls_mall->command) {
1186 case TC_CLSMATCHALL_REPLACE:
1187 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1188 proto,
1189 tc->cls_mall,
1190 ingress);
1191 case TC_CLSMATCHALL_DESTROY:
1192 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1193 tc->cls_mall);
1194 return 0;
1195 default:
1196 return -EINVAL;
1197 }
1198 }
1199
1200 return -ENOTSUPP;
1201}
1202
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001203static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1204 .ndo_open = mlxsw_sp_port_open,
1205 .ndo_stop = mlxsw_sp_port_stop,
1206 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001207 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001208 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001209 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1210 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1211 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
1212 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1213 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001214 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1215 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001216 .ndo_fdb_add = switchdev_port_fdb_add,
1217 .ndo_fdb_del = switchdev_port_fdb_del,
1218 .ndo_fdb_dump = switchdev_port_fdb_dump,
1219 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1220 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1221 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001222 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001223};
1224
1225static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1226 struct ethtool_drvinfo *drvinfo)
1227{
1228 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1229 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1230
1231 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1232 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1233 sizeof(drvinfo->version));
1234 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1235 "%d.%d.%d",
1236 mlxsw_sp->bus_info->fw_rev.major,
1237 mlxsw_sp->bus_info->fw_rev.minor,
1238 mlxsw_sp->bus_info->fw_rev.subminor);
1239 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1240 sizeof(drvinfo->bus_info));
1241}
1242
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001243static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1244 struct ethtool_pauseparam *pause)
1245{
1246 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1247
1248 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1249 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1250}
1251
1252static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1253 struct ethtool_pauseparam *pause)
1254{
1255 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1256
1257 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1258 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1259 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1260
1261 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1262 pfcc_pl);
1263}
1264
1265static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1266 struct ethtool_pauseparam *pause)
1267{
1268 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1269 bool pause_en = pause->tx_pause || pause->rx_pause;
1270 int err;
1271
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001272 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1273 netdev_err(dev, "PFC already enabled on port\n");
1274 return -EINVAL;
1275 }
1276
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001277 if (pause->autoneg) {
1278 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1279 return -EINVAL;
1280 }
1281
1282 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1283 if (err) {
1284 netdev_err(dev, "Failed to configure port's headroom\n");
1285 return err;
1286 }
1287
1288 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1289 if (err) {
1290 netdev_err(dev, "Failed to set PAUSE parameters\n");
1291 goto err_port_pause_configure;
1292 }
1293
1294 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1295 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1296
1297 return 0;
1298
1299err_port_pause_configure:
1300 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1301 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1302 return err;
1303}
1304
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001305struct mlxsw_sp_port_hw_stats {
1306 char str[ETH_GSTRING_LEN];
1307 u64 (*getter)(char *payload);
1308};
1309
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001310static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001311 {
1312 .str = "a_frames_transmitted_ok",
1313 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1314 },
1315 {
1316 .str = "a_frames_received_ok",
1317 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1318 },
1319 {
1320 .str = "a_frame_check_sequence_errors",
1321 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1322 },
1323 {
1324 .str = "a_alignment_errors",
1325 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1326 },
1327 {
1328 .str = "a_octets_transmitted_ok",
1329 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1330 },
1331 {
1332 .str = "a_octets_received_ok",
1333 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1334 },
1335 {
1336 .str = "a_multicast_frames_xmitted_ok",
1337 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1338 },
1339 {
1340 .str = "a_broadcast_frames_xmitted_ok",
1341 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1342 },
1343 {
1344 .str = "a_multicast_frames_received_ok",
1345 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1346 },
1347 {
1348 .str = "a_broadcast_frames_received_ok",
1349 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1350 },
1351 {
1352 .str = "a_in_range_length_errors",
1353 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1354 },
1355 {
1356 .str = "a_out_of_range_length_field",
1357 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1358 },
1359 {
1360 .str = "a_frame_too_long_errors",
1361 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1362 },
1363 {
1364 .str = "a_symbol_error_during_carrier",
1365 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1366 },
1367 {
1368 .str = "a_mac_control_frames_transmitted",
1369 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1370 },
1371 {
1372 .str = "a_mac_control_frames_received",
1373 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1374 },
1375 {
1376 .str = "a_unsupported_opcodes_received",
1377 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1378 },
1379 {
1380 .str = "a_pause_mac_ctrl_frames_received",
1381 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1382 },
1383 {
1384 .str = "a_pause_mac_ctrl_frames_xmitted",
1385 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1386 },
1387};
1388
1389#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1390
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001391static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1392 {
1393 .str = "rx_octets_prio",
1394 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1395 },
1396 {
1397 .str = "rx_frames_prio",
1398 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1399 },
1400 {
1401 .str = "tx_octets_prio",
1402 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1403 },
1404 {
1405 .str = "tx_frames_prio",
1406 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1407 },
1408 {
1409 .str = "rx_pause_prio",
1410 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1411 },
1412 {
1413 .str = "rx_pause_duration_prio",
1414 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1415 },
1416 {
1417 .str = "tx_pause_prio",
1418 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1419 },
1420 {
1421 .str = "tx_pause_duration_prio",
1422 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1423 },
1424};
1425
1426#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1427
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001428static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
1429{
1430 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1431
1432 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1433}
1434
1435static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1436 {
1437 .str = "tc_transmit_queue_tc",
1438 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1439 },
1440 {
1441 .str = "tc_no_buffer_discard_uc_tc",
1442 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1443 },
1444};
1445
1446#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1447
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001448#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001449 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1450 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001451 IEEE_8021QAZ_MAX_TCS)
1452
1453static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1454{
1455 int i;
1456
1457 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1458 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1459 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1460 *p += ETH_GSTRING_LEN;
1461 }
1462}
1463
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001464static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1465{
1466 int i;
1467
1468 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1469 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1470 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1471 *p += ETH_GSTRING_LEN;
1472 }
1473}
1474
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001475static void mlxsw_sp_port_get_strings(struct net_device *dev,
1476 u32 stringset, u8 *data)
1477{
1478 u8 *p = data;
1479 int i;
1480
1481 switch (stringset) {
1482 case ETH_SS_STATS:
1483 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1484 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1485 ETH_GSTRING_LEN);
1486 p += ETH_GSTRING_LEN;
1487 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001488
1489 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1490 mlxsw_sp_port_get_prio_strings(&p, i);
1491
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001492 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1493 mlxsw_sp_port_get_tc_strings(&p, i);
1494
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001495 break;
1496 }
1497}
1498
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001499static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1500 enum ethtool_phys_id_state state)
1501{
1502 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1503 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1504 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1505 bool active;
1506
1507 switch (state) {
1508 case ETHTOOL_ID_ACTIVE:
1509 active = true;
1510 break;
1511 case ETHTOOL_ID_INACTIVE:
1512 active = false;
1513 break;
1514 default:
1515 return -EOPNOTSUPP;
1516 }
1517
1518 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1519 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1520}
1521
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001522static int
1523mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1524 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1525{
1526 switch (grp) {
1527 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1528 *p_hw_stats = mlxsw_sp_port_hw_stats;
1529 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1530 break;
1531 case MLXSW_REG_PPCNT_PRIO_CNT:
1532 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1533 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1534 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001535 case MLXSW_REG_PPCNT_TC_CNT:
1536 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1537 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1538 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001539 default:
1540 WARN_ON(1);
1541 return -ENOTSUPP;
1542 }
1543 return 0;
1544}
1545
1546static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1547 enum mlxsw_reg_ppcnt_grp grp, int prio,
1548 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001549{
1550 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1551 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001552 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001553 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001554 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001555 int err;
1556
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001557 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1558 if (err)
1559 return;
1560 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001561 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001562 for (i = 0; i < len; i++)
1563 data[data_index + i] = !err ? hw_stats[i].getter(ppcnt_pl) : 0;
1564}
1565
1566static void mlxsw_sp_port_get_stats(struct net_device *dev,
1567 struct ethtool_stats *stats, u64 *data)
1568{
1569 int i, data_index = 0;
1570
1571 /* IEEE 802.3 Counters */
1572 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1573 data, data_index);
1574 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1575
1576 /* Per-Priority Counters */
1577 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1578 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1579 data, data_index);
1580 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1581 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001582
1583 /* Per-TC Counters */
1584 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1585 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1586 data, data_index);
1587 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1588 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001589}
1590
1591static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1592{
1593 switch (sset) {
1594 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001595 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001596 default:
1597 return -EOPNOTSUPP;
1598 }
1599}
1600
1601struct mlxsw_sp_port_link_mode {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001602 enum ethtool_link_mode_bit_indices mask_ethtool;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001603 u32 mask;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001604 u32 speed;
1605};
1606
1607static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1608 {
1609 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001610 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1611 .speed = SPEED_100,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001612 },
1613 {
1614 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1615 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001616 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1617 .speed = SPEED_1000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001618 },
1619 {
1620 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001621 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1622 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001623 },
1624 {
1625 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1626 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001627 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1628 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001629 },
1630 {
1631 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1632 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1633 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1634 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001635 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1636 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001637 },
1638 {
1639 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001640 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1641 .speed = SPEED_20000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001642 },
1643 {
1644 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001645 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1646 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001647 },
1648 {
1649 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001650 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1651 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001652 },
1653 {
1654 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001655 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1656 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001657 },
1658 {
1659 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001660 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1661 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001662 },
1663 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001664 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
1665 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1666 .speed = SPEED_25000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001667 },
1668 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001669 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
1670 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1671 .speed = SPEED_25000,
1672 },
1673 {
1674 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1675 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1676 .speed = SPEED_25000,
1677 },
1678 {
1679 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1680 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1681 .speed = SPEED_25000,
1682 },
1683 {
1684 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
1685 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1686 .speed = SPEED_50000,
1687 },
1688 {
1689 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1690 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1691 .speed = SPEED_50000,
1692 },
1693 {
1694 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
1695 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1696 .speed = SPEED_50000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001697 },
1698 {
1699 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001700 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
1701 .speed = SPEED_56000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001702 },
1703 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001704 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1705 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
1706 .speed = SPEED_56000,
1707 },
1708 {
1709 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1710 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
1711 .speed = SPEED_56000,
1712 },
1713 {
1714 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1715 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
1716 .speed = SPEED_56000,
1717 },
1718 {
1719 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
1720 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1721 .speed = SPEED_100000,
1722 },
1723 {
1724 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
1725 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1726 .speed = SPEED_100000,
1727 },
1728 {
1729 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
1730 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1731 .speed = SPEED_100000,
1732 },
1733 {
1734 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1735 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1736 .speed = SPEED_100000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001737 },
1738};
1739
1740#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1741
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001742static void
1743mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
1744 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001745{
1746 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1747 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1748 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1749 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1750 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1751 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001752 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001753
1754 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1755 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1756 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1757 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1758 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001759 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001760}
1761
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001762static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001763{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001764 int i;
1765
1766 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1767 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001768 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1769 mode);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001770 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001771}
1772
1773static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001774 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001775{
1776 u32 speed = SPEED_UNKNOWN;
1777 u8 duplex = DUPLEX_UNKNOWN;
1778 int i;
1779
1780 if (!carrier_ok)
1781 goto out;
1782
1783 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1784 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1785 speed = mlxsw_sp_port_link_mode[i].speed;
1786 duplex = DUPLEX_FULL;
1787 break;
1788 }
1789 }
1790out:
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001791 cmd->base.speed = speed;
1792 cmd->base.duplex = duplex;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001793}
1794
1795static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1796{
1797 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1798 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1799 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1800 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1801 return PORT_FIBRE;
1802
1803 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1804 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1805 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1806 return PORT_DA;
1807
1808 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1809 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1810 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1811 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1812 return PORT_NONE;
1813
1814 return PORT_OTHER;
1815}
1816
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001817static u32
1818mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001819{
1820 u32 ptys_proto = 0;
1821 int i;
1822
1823 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001824 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1825 cmd->link_modes.advertising))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001826 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1827 }
1828 return ptys_proto;
1829}
1830
1831static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1832{
1833 u32 ptys_proto = 0;
1834 int i;
1835
1836 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1837 if (speed == mlxsw_sp_port_link_mode[i].speed)
1838 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1839 }
1840 return ptys_proto;
1841}
1842
Ido Schimmel18f1e702016-02-26 17:32:31 +01001843static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1844{
1845 u32 ptys_proto = 0;
1846 int i;
1847
1848 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1849 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1850 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1851 }
1852 return ptys_proto;
1853}
1854
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001855static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
1856 struct ethtool_link_ksettings *cmd)
1857{
1858 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
1859 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
1860 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
1861
1862 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
1863 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
1864}
1865
1866static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
1867 struct ethtool_link_ksettings *cmd)
1868{
1869 if (!autoneg)
1870 return;
1871
1872 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
1873 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
1874}
1875
1876static void
1877mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
1878 struct ethtool_link_ksettings *cmd)
1879{
1880 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
1881 return;
1882
1883 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
1884 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
1885}
1886
1887static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
1888 struct ethtool_link_ksettings *cmd)
1889{
1890 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
1891 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1892 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1893 char ptys_pl[MLXSW_REG_PTYS_LEN];
1894 u8 autoneg_status;
1895 bool autoneg;
1896 int err;
1897
1898 autoneg = mlxsw_sp_port->link.autoneg;
1899 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1900 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1901 if (err)
1902 return err;
1903 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
1904 &eth_proto_oper);
1905
1906 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
1907
1908 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
1909
1910 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
1911 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
1912 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
1913
1914 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
1915 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
1916 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
1917 cmd);
1918
1919 return 0;
1920}
1921
1922static int
1923mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
1924 const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001925{
1926 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1927 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1928 char ptys_pl[MLXSW_REG_PTYS_LEN];
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001929 u32 eth_proto_cap, eth_proto_new;
Ido Schimmel0c83f882016-09-12 13:26:23 +02001930 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001931 int err;
1932
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001933 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1934 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001935 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001936 return err;
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001937 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
1938
1939 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
1940 eth_proto_new = autoneg ?
1941 mlxsw_sp_to_ptys_advert_link(cmd) :
1942 mlxsw_sp_to_ptys_speed(cmd->base.speed);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001943
1944 eth_proto_new = eth_proto_new & eth_proto_cap;
1945 if (!eth_proto_new) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001946 netdev_err(dev, "No supported speed requested\n");
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001947 return -EINVAL;
1948 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001949
1950 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1951 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001952 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001953 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001954
Ido Schimmel6277d462016-07-15 11:14:58 +02001955 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001956 return 0;
1957
Ido Schimmel0c83f882016-09-12 13:26:23 +02001958 mlxsw_sp_port->link.autoneg = autoneg;
1959
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001960 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1961 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001962
1963 return 0;
1964}
1965
1966static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1967 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
1968 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001969 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
1970 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001971 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001972 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001973 .get_ethtool_stats = mlxsw_sp_port_get_stats,
1974 .get_sset_count = mlxsw_sp_port_get_sset_count,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001975 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
1976 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001977};
1978
Ido Schimmel18f1e702016-02-26 17:32:31 +01001979static int
1980mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
1981{
1982 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1983 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
1984 char ptys_pl[MLXSW_REG_PTYS_LEN];
1985 u32 eth_proto_admin;
1986
1987 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
1988 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
1989 eth_proto_admin);
1990 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1991}
1992
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001993int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
1994 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
1995 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02001996{
1997 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1998 char qeec_pl[MLXSW_REG_QEEC_LEN];
1999
2000 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2001 next_index);
2002 mlxsw_reg_qeec_de_set(qeec_pl, true);
2003 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2004 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2005 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2006}
2007
Ido Schimmelcc7cf512016-04-06 17:10:11 +02002008int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2009 enum mlxsw_reg_qeec_hr hr, u8 index,
2010 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02002011{
2012 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2013 char qeec_pl[MLXSW_REG_QEEC_LEN];
2014
2015 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2016 next_index);
2017 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2018 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2019 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2020}
2021
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002022int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2023 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002024{
2025 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2026 char qtct_pl[MLXSW_REG_QTCT_LEN];
2027
2028 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2029 tclass);
2030 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2031}
2032
2033static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2034{
2035 int err, i;
2036
2037 /* Setup the elements hierarcy, so that each TC is linked to
2038 * one subgroup, which are all member in the same group.
2039 */
2040 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2041 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2042 0);
2043 if (err)
2044 return err;
2045 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2046 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2047 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2048 0, false, 0);
2049 if (err)
2050 return err;
2051 }
2052 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2053 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2054 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2055 false, 0);
2056 if (err)
2057 return err;
2058 }
2059
2060 /* Make sure the max shaper is disabled in all hierarcies that
2061 * support it.
2062 */
2063 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2064 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2065 MLXSW_REG_QEEC_MAS_DIS);
2066 if (err)
2067 return err;
2068 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2069 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2070 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2071 i, 0,
2072 MLXSW_REG_QEEC_MAS_DIS);
2073 if (err)
2074 return err;
2075 }
2076 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2077 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2078 MLXSW_REG_QEEC_HIERARCY_TC,
2079 i, i,
2080 MLXSW_REG_QEEC_MAS_DIS);
2081 if (err)
2082 return err;
2083 }
2084
2085 /* Map all priorities to traffic class 0. */
2086 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2087 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2088 if (err)
2089 return err;
2090 }
2091
2092 return 0;
2093}
2094
Ido Schimmel05978482016-08-17 16:39:30 +02002095static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2096{
2097 mlxsw_sp_port->pvid = 1;
2098
2099 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2100}
2101
2102static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2103{
2104 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2105}
2106
Ido Schimmelbe945352016-06-09 09:51:39 +02002107static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
Ido Schimmeld664b412016-06-09 09:51:40 +02002108 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002109{
2110 struct mlxsw_sp_port *mlxsw_sp_port;
2111 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002112 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002113 int err;
2114
2115 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2116 if (!dev)
2117 return -ENOMEM;
2118 mlxsw_sp_port = netdev_priv(dev);
2119 mlxsw_sp_port->dev = dev;
2120 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2121 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002122 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002123 mlxsw_sp_port->mapping.module = module;
2124 mlxsw_sp_port->mapping.width = width;
2125 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002126 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002127 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2128 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2129 if (!mlxsw_sp_port->active_vlans) {
2130 err = -ENOMEM;
2131 goto err_port_active_vlans_alloc;
2132 }
Elad Razfc1273a2016-01-06 13:01:11 +01002133 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2134 if (!mlxsw_sp_port->untagged_vlans) {
2135 err = -ENOMEM;
2136 goto err_port_untagged_vlans_alloc;
2137 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002138 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002139 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002140
2141 mlxsw_sp_port->pcpu_stats =
2142 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2143 if (!mlxsw_sp_port->pcpu_stats) {
2144 err = -ENOMEM;
2145 goto err_alloc_stats;
2146 }
2147
2148 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2149 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2150
Ido Schimmel3247ff22016-09-08 08:16:02 +02002151 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2152 if (err) {
2153 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2154 mlxsw_sp_port->local_port);
2155 goto err_port_swid_set;
2156 }
2157
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002158 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2159 if (err) {
2160 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2161 mlxsw_sp_port->local_port);
2162 goto err_dev_addr_init;
2163 }
2164
2165 netif_carrier_off(dev);
2166
2167 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002168 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2169 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002170
2171 /* Each packet needs to have a Tx header (metadata) on top all other
2172 * headers.
2173 */
2174 dev->hard_header_len += MLXSW_TXHDR_LEN;
2175
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002176 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2177 if (err) {
2178 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2179 mlxsw_sp_port->local_port);
2180 goto err_port_system_port_mapping_set;
2181 }
2182
Ido Schimmel18f1e702016-02-26 17:32:31 +01002183 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2184 if (err) {
2185 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2186 mlxsw_sp_port->local_port);
2187 goto err_port_speed_by_width_set;
2188 }
2189
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002190 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2191 if (err) {
2192 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2193 mlxsw_sp_port->local_port);
2194 goto err_port_mtu_set;
2195 }
2196
2197 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2198 if (err)
2199 goto err_port_admin_status_set;
2200
2201 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2202 if (err) {
2203 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2204 mlxsw_sp_port->local_port);
2205 goto err_port_buffers_init;
2206 }
2207
Ido Schimmel90183b92016-04-06 17:10:08 +02002208 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2209 if (err) {
2210 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2211 mlxsw_sp_port->local_port);
2212 goto err_port_ets_init;
2213 }
2214
Ido Schimmelf00817d2016-04-06 17:10:09 +02002215 /* ETS and buffers must be initialized before DCB. */
2216 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2217 if (err) {
2218 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2219 mlxsw_sp_port->local_port);
2220 goto err_port_dcb_init;
2221 }
2222
Ido Schimmel05978482016-08-17 16:39:30 +02002223 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2224 if (err) {
2225 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2226 mlxsw_sp_port->local_port);
2227 goto err_port_pvid_vport_create;
2228 }
2229
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002230 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002231 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002232 err = register_netdev(dev);
2233 if (err) {
2234 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2235 mlxsw_sp_port->local_port);
2236 goto err_register_netdev;
2237 }
2238
Jiri Pirko932762b2016-04-08 19:11:21 +02002239 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
2240 mlxsw_sp_port->local_port, dev,
2241 mlxsw_sp_port->split, module);
2242 if (err) {
2243 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2244 mlxsw_sp_port->local_port);
2245 goto err_core_port_init;
2246 }
Jiri Pirkoc4745502016-02-26 17:32:26 +01002247
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002248 return 0;
2249
Jiri Pirko932762b2016-04-08 19:11:21 +02002250err_core_port_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002251 unregister_netdev(dev);
2252err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002253 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002254 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002255 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2256err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002257 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002258err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002259err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002260err_port_buffers_init:
2261err_port_admin_status_set:
2262err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002263err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002264err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002265err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002266 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2267err_port_swid_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002268 free_percpu(mlxsw_sp_port->pcpu_stats);
2269err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002270 kfree(mlxsw_sp_port->untagged_vlans);
2271err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002272 kfree(mlxsw_sp_port->active_vlans);
2273err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002274 free_netdev(dev);
2275 return err;
2276}
2277
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002278static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2279{
2280 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2281
2282 if (!mlxsw_sp_port)
2283 return;
Jiri Pirko932762b2016-04-08 19:11:21 +02002284 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002285 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002286 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002287 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002288 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002289 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002290 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2291 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002292 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01002293 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002294 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002295 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002296 free_netdev(mlxsw_sp_port->dev);
2297}
2298
2299static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2300{
2301 int i;
2302
2303 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2304 mlxsw_sp_port_remove(mlxsw_sp, i);
2305 kfree(mlxsw_sp->ports);
2306}
2307
2308static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2309{
Ido Schimmeld664b412016-06-09 09:51:40 +02002310 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002311 size_t alloc_size;
2312 int i;
2313 int err;
2314
2315 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2316 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2317 if (!mlxsw_sp->ports)
2318 return -ENOMEM;
2319
2320 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002321 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002322 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002323 if (err)
2324 goto err_port_module_info_get;
2325 if (!width)
2326 continue;
2327 mlxsw_sp->port_to_module[i] = module;
Ido Schimmeld664b412016-06-09 09:51:40 +02002328 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
2329 lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002330 if (err)
2331 goto err_port_create;
2332 }
2333 return 0;
2334
2335err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002336err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002337 for (i--; i >= 1; i--)
2338 mlxsw_sp_port_remove(mlxsw_sp, i);
2339 kfree(mlxsw_sp->ports);
2340 return err;
2341}
2342
Ido Schimmel18f1e702016-02-26 17:32:31 +01002343static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2344{
2345 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2346
2347 return local_port - offset;
2348}
2349
Ido Schimmelbe945352016-06-09 09:51:39 +02002350static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2351 u8 module, unsigned int count)
2352{
2353 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2354 int err, i;
2355
2356 for (i = 0; i < count; i++) {
2357 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2358 width, i * width);
2359 if (err)
2360 goto err_port_module_map;
2361 }
2362
2363 for (i = 0; i < count; i++) {
2364 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2365 if (err)
2366 goto err_port_swid_set;
2367 }
2368
2369 for (i = 0; i < count; i++) {
2370 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002371 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002372 if (err)
2373 goto err_port_create;
2374 }
2375
2376 return 0;
2377
2378err_port_create:
2379 for (i--; i >= 0; i--)
2380 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2381 i = count;
2382err_port_swid_set:
2383 for (i--; i >= 0; i--)
2384 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2385 MLXSW_PORT_SWID_DISABLED_PORT);
2386 i = count;
2387err_port_module_map:
2388 for (i--; i >= 0; i--)
2389 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2390 return err;
2391}
2392
2393static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2394 u8 base_port, unsigned int count)
2395{
2396 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2397 int i;
2398
2399 /* Split by four means we need to re-create two ports, otherwise
2400 * only one.
2401 */
2402 count = count / 2;
2403
2404 for (i = 0; i < count; i++) {
2405 local_port = base_port + i * 2;
2406 module = mlxsw_sp->port_to_module[local_port];
2407
2408 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2409 0);
2410 }
2411
2412 for (i = 0; i < count; i++)
2413 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2414
2415 for (i = 0; i < count; i++) {
2416 local_port = base_port + i * 2;
2417 module = mlxsw_sp->port_to_module[local_port];
2418
2419 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002420 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002421 }
2422}
2423
Jiri Pirkob2f10572016-04-08 19:11:23 +02002424static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2425 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002426{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002427 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002428 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002429 u8 module, cur_width, base_port;
2430 int i;
2431 int err;
2432
2433 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2434 if (!mlxsw_sp_port) {
2435 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2436 local_port);
2437 return -EINVAL;
2438 }
2439
Ido Schimmeld664b412016-06-09 09:51:40 +02002440 module = mlxsw_sp_port->mapping.module;
2441 cur_width = mlxsw_sp_port->mapping.width;
2442
Ido Schimmel18f1e702016-02-26 17:32:31 +01002443 if (count != 2 && count != 4) {
2444 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2445 return -EINVAL;
2446 }
2447
Ido Schimmel18f1e702016-02-26 17:32:31 +01002448 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2449 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2450 return -EINVAL;
2451 }
2452
2453 /* Make sure we have enough slave (even) ports for the split. */
2454 if (count == 2) {
2455 base_port = local_port;
2456 if (mlxsw_sp->ports[base_port + 1]) {
2457 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2458 return -EINVAL;
2459 }
2460 } else {
2461 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2462 if (mlxsw_sp->ports[base_port + 1] ||
2463 mlxsw_sp->ports[base_port + 3]) {
2464 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2465 return -EINVAL;
2466 }
2467 }
2468
2469 for (i = 0; i < count; i++)
2470 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2471
Ido Schimmelbe945352016-06-09 09:51:39 +02002472 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2473 if (err) {
2474 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2475 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002476 }
2477
2478 return 0;
2479
Ido Schimmelbe945352016-06-09 09:51:39 +02002480err_port_split_create:
2481 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002482 return err;
2483}
2484
Jiri Pirkob2f10572016-04-08 19:11:23 +02002485static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002486{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002487 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002488 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002489 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002490 unsigned int count;
2491 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002492
2493 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2494 if (!mlxsw_sp_port) {
2495 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2496 local_port);
2497 return -EINVAL;
2498 }
2499
2500 if (!mlxsw_sp_port->split) {
2501 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2502 return -EINVAL;
2503 }
2504
Ido Schimmeld664b412016-06-09 09:51:40 +02002505 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002506 count = cur_width == 1 ? 4 : 2;
2507
2508 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2509
2510 /* Determine which ports to remove. */
2511 if (count == 2 && local_port >= base_port + 2)
2512 base_port = base_port + 2;
2513
2514 for (i = 0; i < count; i++)
2515 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2516
Ido Schimmelbe945352016-06-09 09:51:39 +02002517 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002518
2519 return 0;
2520}
2521
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002522static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2523 char *pude_pl, void *priv)
2524{
2525 struct mlxsw_sp *mlxsw_sp = priv;
2526 struct mlxsw_sp_port *mlxsw_sp_port;
2527 enum mlxsw_reg_pude_oper_status status;
2528 u8 local_port;
2529
2530 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2531 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002532 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002533 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002534
2535 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2536 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2537 netdev_info(mlxsw_sp_port->dev, "link up\n");
2538 netif_carrier_on(mlxsw_sp_port->dev);
2539 } else {
2540 netdev_info(mlxsw_sp_port->dev, "link down\n");
2541 netif_carrier_off(mlxsw_sp_port->dev);
2542 }
2543}
2544
2545static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2546 .func = mlxsw_sp_pude_event_func,
2547 .trap_id = MLXSW_TRAP_ID_PUDE,
2548};
2549
2550static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2551 enum mlxsw_event_trap_id trap_id)
2552{
2553 struct mlxsw_event_listener *el;
2554 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2555 int err;
2556
2557 switch (trap_id) {
2558 case MLXSW_TRAP_ID_PUDE:
2559 el = &mlxsw_sp_pude_event;
2560 break;
2561 }
2562 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2563 if (err)
2564 return err;
2565
2566 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2567 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2568 if (err)
2569 goto err_event_trap_set;
2570
2571 return 0;
2572
2573err_event_trap_set:
2574 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2575 return err;
2576}
2577
2578static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2579 enum mlxsw_event_trap_id trap_id)
2580{
2581 struct mlxsw_event_listener *el;
2582
2583 switch (trap_id) {
2584 case MLXSW_TRAP_ID_PUDE:
2585 el = &mlxsw_sp_pude_event;
2586 break;
2587 }
2588 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2589}
2590
2591static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2592 void *priv)
2593{
2594 struct mlxsw_sp *mlxsw_sp = priv;
2595 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2596 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2597
2598 if (unlikely(!mlxsw_sp_port)) {
2599 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2600 local_port);
2601 return;
2602 }
2603
2604 skb->dev = mlxsw_sp_port->dev;
2605
2606 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2607 u64_stats_update_begin(&pcpu_stats->syncp);
2608 pcpu_stats->rx_packets++;
2609 pcpu_stats->rx_bytes += skb->len;
2610 u64_stats_update_end(&pcpu_stats->syncp);
2611
2612 skb->protocol = eth_type_trans(skb, skb->dev);
2613 netif_receive_skb(skb);
2614}
2615
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002616static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2617 void *priv)
2618{
2619 skb->offload_fwd_mark = 1;
2620 return mlxsw_sp_rx_listener_func(skb, local_port, priv);
2621}
2622
Ido Schimmel63a81142016-08-25 18:42:39 +02002623#define MLXSW_SP_RXL(_func, _trap_id, _action) \
2624 { \
2625 .func = _func, \
2626 .local_port = MLXSW_PORT_DONT_CARE, \
2627 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
2628 .action = MLXSW_REG_HPKT_ACTION_##_action, \
Ido Schimmel93393b32016-08-25 18:42:38 +02002629 }
2630
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002631static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
Ido Schimmel63a81142016-08-25 18:42:39 +02002632 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, FDB_MC, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002633 /* Traps for specific L2 packet types, not trapped as FDB MC */
Ido Schimmel63a81142016-08-25 18:42:39 +02002634 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, STP, TRAP_TO_CPU),
2635 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LACP, TRAP_TO_CPU),
2636 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, EAPOL, TRAP_TO_CPU),
2637 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LLDP, TRAP_TO_CPU),
2638 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MMRP, TRAP_TO_CPU),
2639 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MVRP, TRAP_TO_CPU),
2640 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RPVST, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002641 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, DHCP, MIRROR_TO_CPU),
2642 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, IGMP_QUERY, MIRROR_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002643 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V1_REPORT, TRAP_TO_CPU),
2644 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_REPORT, TRAP_TO_CPU),
2645 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_LEAVE, TRAP_TO_CPU),
2646 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V3_REPORT, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002647 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPBC, MIRROR_TO_CPU),
2648 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPUC, MIRROR_TO_CPU),
Ido Schimmel93393b32016-08-25 18:42:38 +02002649 /* L3 traps */
Ido Schimmel63a81142016-08-25 18:42:39 +02002650 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MTUERROR, TRAP_TO_CPU),
2651 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, TTLERROR, TRAP_TO_CPU),
2652 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LBERROR, TRAP_TO_CPU),
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002653 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, OSPF, TRAP_TO_CPU),
Ido Schimmel63a81142016-08-25 18:42:39 +02002654 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IP2ME, TRAP_TO_CPU),
2655 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RTR_INGRESS0, TRAP_TO_CPU),
2656 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, HOST_MISS_IPV4, TRAP_TO_CPU),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002657};
2658
2659static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2660{
2661 char htgt_pl[MLXSW_REG_HTGT_LEN];
2662 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2663 int i;
2664 int err;
2665
2666 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2667 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2668 if (err)
2669 return err;
2670
2671 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2672 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2673 if (err)
2674 return err;
2675
2676 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2677 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2678 &mlxsw_sp_rx_listener[i],
2679 mlxsw_sp);
2680 if (err)
2681 goto err_rx_listener_register;
2682
Ido Schimmel63a81142016-08-25 18:42:39 +02002683 mlxsw_reg_hpkt_pack(hpkt_pl, mlxsw_sp_rx_listener[i].action,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002684 mlxsw_sp_rx_listener[i].trap_id);
2685 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2686 if (err)
2687 goto err_rx_trap_set;
2688 }
2689 return 0;
2690
2691err_rx_trap_set:
2692 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2693 &mlxsw_sp_rx_listener[i],
2694 mlxsw_sp);
2695err_rx_listener_register:
2696 for (i--; i >= 0; i--) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002697 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002698 mlxsw_sp_rx_listener[i].trap_id);
2699 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2700
2701 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2702 &mlxsw_sp_rx_listener[i],
2703 mlxsw_sp);
2704 }
2705 return err;
2706}
2707
2708static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2709{
2710 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2711 int i;
2712
2713 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002714 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002715 mlxsw_sp_rx_listener[i].trap_id);
2716 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2717
2718 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2719 &mlxsw_sp_rx_listener[i],
2720 mlxsw_sp);
2721 }
2722}
2723
2724static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2725 enum mlxsw_reg_sfgc_type type,
2726 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2727{
2728 enum mlxsw_flood_table_type table_type;
2729 enum mlxsw_sp_flood_table flood_table;
2730 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2731
Ido Schimmel19ae6122015-12-15 16:03:39 +01002732 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002733 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002734 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002735 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002736
2737 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2738 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2739 else
2740 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002741
2742 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2743 flood_table);
2744 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2745}
2746
2747static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2748{
2749 int type, err;
2750
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002751 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2752 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2753 continue;
2754
2755 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2756 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2757 if (err)
2758 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002759
2760 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2761 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2762 if (err)
2763 return err;
2764 }
2765
2766 return 0;
2767}
2768
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002769static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2770{
2771 char slcr_pl[MLXSW_REG_SLCR_LEN];
2772
2773 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2774 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2775 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2776 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2777 MLXSW_REG_SLCR_LAG_HASH_SIP |
2778 MLXSW_REG_SLCR_LAG_HASH_DIP |
2779 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2780 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2781 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
2782 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2783}
2784
Jiri Pirkob2f10572016-04-08 19:11:23 +02002785static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002786 const struct mlxsw_bus_info *mlxsw_bus_info)
2787{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002788 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002789 int err;
2790
2791 mlxsw_sp->core = mlxsw_core;
2792 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02002793 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002794 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01002795 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002796
2797 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2798 if (err) {
2799 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2800 return err;
2801 }
2802
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002803 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2804 if (err) {
2805 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002806 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002807 }
2808
2809 err = mlxsw_sp_traps_init(mlxsw_sp);
2810 if (err) {
2811 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2812 goto err_rx_listener_register;
2813 }
2814
2815 err = mlxsw_sp_flood_init(mlxsw_sp);
2816 if (err) {
2817 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2818 goto err_flood_init;
2819 }
2820
2821 err = mlxsw_sp_buffers_init(mlxsw_sp);
2822 if (err) {
2823 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2824 goto err_buffers_init;
2825 }
2826
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002827 err = mlxsw_sp_lag_init(mlxsw_sp);
2828 if (err) {
2829 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2830 goto err_lag_init;
2831 }
2832
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002833 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2834 if (err) {
2835 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2836 goto err_switchdev_init;
2837 }
2838
Ido Schimmel464dce12016-07-02 11:00:15 +02002839 err = mlxsw_sp_router_init(mlxsw_sp);
2840 if (err) {
2841 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2842 goto err_router_init;
2843 }
2844
Yotam Gigi763b4b72016-07-21 12:03:17 +02002845 err = mlxsw_sp_span_init(mlxsw_sp);
2846 if (err) {
2847 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
2848 goto err_span_init;
2849 }
2850
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002851 err = mlxsw_sp_ports_create(mlxsw_sp);
2852 if (err) {
2853 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2854 goto err_ports_create;
2855 }
2856
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002857 return 0;
2858
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002859err_ports_create:
Yotam Gigi763b4b72016-07-21 12:03:17 +02002860 mlxsw_sp_span_fini(mlxsw_sp);
2861err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02002862 mlxsw_sp_router_fini(mlxsw_sp);
2863err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002864 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002865err_switchdev_init:
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002866err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02002867 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002868err_buffers_init:
2869err_flood_init:
2870 mlxsw_sp_traps_fini(mlxsw_sp);
2871err_rx_listener_register:
2872 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002873 return err;
2874}
2875
Jiri Pirkob2f10572016-04-08 19:11:23 +02002876static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002877{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002878 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002879 int i;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002880
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002881 mlxsw_sp_ports_remove(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002882 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02002883 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002884 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02002885 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002886 mlxsw_sp_traps_fini(mlxsw_sp);
2887 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002888 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02002889 WARN_ON(!list_empty(&mlxsw_sp->fids));
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002890 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
2891 WARN_ON_ONCE(mlxsw_sp->rifs[i]);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002892}
2893
2894static struct mlxsw_config_profile mlxsw_sp_config_profile = {
2895 .used_max_vepa_channels = 1,
2896 .max_vepa_channels = 0,
2897 .used_max_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002898 .max_lag = MLXSW_SP_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002899 .used_max_port_per_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002900 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002901 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01002902 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002903 .used_max_pgt = 1,
2904 .max_pgt = 0,
2905 .used_max_system_port = 1,
2906 .max_system_port = 64,
2907 .used_max_vlan_groups = 1,
2908 .max_vlan_groups = 127,
2909 .used_max_regions = 1,
2910 .max_regions = 400,
2911 .used_flood_tables = 1,
2912 .used_flood_mode = 1,
2913 .flood_mode = 3,
2914 .max_fid_offset_flood_tables = 2,
2915 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01002916 .max_fid_flood_tables = 2,
2917 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002918 .used_max_ib_mc = 1,
2919 .max_ib_mc = 0,
2920 .used_max_pkey = 1,
2921 .max_pkey = 0,
Jiri Pirkoc6022422016-07-05 11:27:46 +02002922 .used_kvd_sizes = 1,
2923 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
2924 .kvd_hash_single_size = MLXSW_SP_KVD_HASH_SINGLE_SIZE,
2925 .kvd_hash_double_size = MLXSW_SP_KVD_HASH_DOUBLE_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002926 .swid_config = {
2927 {
2928 .used_type = 1,
2929 .type = MLXSW_PORT_SWID_TYPE_ETH,
2930 }
2931 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02002932 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002933};
2934
2935static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko2d0ed392016-04-14 18:19:30 +02002936 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
2937 .owner = THIS_MODULE,
2938 .priv_size = sizeof(struct mlxsw_sp),
2939 .init = mlxsw_sp_init,
2940 .fini = mlxsw_sp_fini,
2941 .port_split = mlxsw_sp_port_split,
2942 .port_unsplit = mlxsw_sp_port_unsplit,
2943 .sb_pool_get = mlxsw_sp_sb_pool_get,
2944 .sb_pool_set = mlxsw_sp_sb_pool_set,
2945 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
2946 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
2947 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
2948 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
2949 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
2950 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
2951 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
2952 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
2953 .txhdr_construct = mlxsw_sp_txhdr_construct,
2954 .txhdr_len = MLXSW_TXHDR_LEN,
2955 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002956};
2957
Jiri Pirko7ce856a2016-07-04 08:23:12 +02002958static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
2959{
2960 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
2961}
2962
2963static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
2964{
2965 struct net_device *lower_dev;
2966 struct list_head *iter;
2967
2968 if (mlxsw_sp_port_dev_check(dev))
2969 return netdev_priv(dev);
2970
2971 netdev_for_each_all_lower_dev(dev, lower_dev, iter) {
2972 if (mlxsw_sp_port_dev_check(lower_dev))
2973 return netdev_priv(lower_dev);
2974 }
2975 return NULL;
2976}
2977
2978static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
2979{
2980 struct mlxsw_sp_port *mlxsw_sp_port;
2981
2982 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
2983 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
2984}
2985
2986static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
2987{
2988 struct net_device *lower_dev;
2989 struct list_head *iter;
2990
2991 if (mlxsw_sp_port_dev_check(dev))
2992 return netdev_priv(dev);
2993
2994 netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) {
2995 if (mlxsw_sp_port_dev_check(lower_dev))
2996 return netdev_priv(lower_dev);
2997 }
2998 return NULL;
2999}
3000
3001struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3002{
3003 struct mlxsw_sp_port *mlxsw_sp_port;
3004
3005 rcu_read_lock();
3006 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3007 if (mlxsw_sp_port)
3008 dev_hold(mlxsw_sp_port->dev);
3009 rcu_read_unlock();
3010 return mlxsw_sp_port;
3011}
3012
3013void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3014{
3015 dev_put(mlxsw_sp_port->dev);
3016}
3017
Ido Schimmel99724c12016-07-04 08:23:14 +02003018static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3019 unsigned long event)
3020{
3021 switch (event) {
3022 case NETDEV_UP:
3023 if (!r)
3024 return true;
3025 r->ref_count++;
3026 return false;
3027 case NETDEV_DOWN:
3028 if (r && --r->ref_count == 0)
3029 return true;
3030 /* It is possible we already removed the RIF ourselves
3031 * if it was assigned to a netdev that is now a bridge
3032 * or LAG slave.
3033 */
3034 return false;
3035 }
3036
3037 return false;
3038}
3039
3040static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3041{
3042 int i;
3043
3044 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
3045 if (!mlxsw_sp->rifs[i])
3046 return i;
3047
3048 return MLXSW_SP_RIF_MAX;
3049}
3050
3051static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3052 bool *p_lagged, u16 *p_system_port)
3053{
3054 u8 local_port = mlxsw_sp_vport->local_port;
3055
3056 *p_lagged = mlxsw_sp_vport->lagged;
3057 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3058}
3059
3060static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3061 struct net_device *l3_dev, u16 rif,
3062 bool create)
3063{
3064 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3065 bool lagged = mlxsw_sp_vport->lagged;
3066 char ritr_pl[MLXSW_REG_RITR_LEN];
3067 u16 system_port;
3068
3069 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3070 l3_dev->mtu, l3_dev->dev_addr);
3071
3072 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3073 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3074 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3075
3076 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3077}
3078
3079static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3080
3081static struct mlxsw_sp_fid *
3082mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3083{
3084 struct mlxsw_sp_fid *f;
3085
3086 f = kzalloc(sizeof(*f), GFP_KERNEL);
3087 if (!f)
3088 return NULL;
3089
3090 f->leave = mlxsw_sp_vport_rif_sp_leave;
3091 f->ref_count = 0;
3092 f->dev = l3_dev;
3093 f->fid = fid;
3094
3095 return f;
3096}
3097
3098static struct mlxsw_sp_rif *
3099mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3100{
3101 struct mlxsw_sp_rif *r;
3102
3103 r = kzalloc(sizeof(*r), GFP_KERNEL);
3104 if (!r)
3105 return NULL;
3106
3107 ether_addr_copy(r->addr, l3_dev->dev_addr);
3108 r->mtu = l3_dev->mtu;
3109 r->ref_count = 1;
3110 r->dev = l3_dev;
3111 r->rif = rif;
3112 r->f = f;
3113
3114 return r;
3115}
3116
3117static struct mlxsw_sp_rif *
3118mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3119 struct net_device *l3_dev)
3120{
3121 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3122 struct mlxsw_sp_fid *f;
3123 struct mlxsw_sp_rif *r;
3124 u16 fid, rif;
3125 int err;
3126
3127 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3128 if (rif == MLXSW_SP_RIF_MAX)
3129 return ERR_PTR(-ERANGE);
3130
3131 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3132 if (err)
3133 return ERR_PTR(err);
3134
3135 fid = mlxsw_sp_rif_sp_to_fid(rif);
3136 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3137 if (err)
3138 goto err_rif_fdb_op;
3139
3140 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3141 if (!f) {
3142 err = -ENOMEM;
3143 goto err_rfid_alloc;
3144 }
3145
3146 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3147 if (!r) {
3148 err = -ENOMEM;
3149 goto err_rif_alloc;
3150 }
3151
3152 f->r = r;
3153 mlxsw_sp->rifs[rif] = r;
3154
3155 return r;
3156
3157err_rif_alloc:
3158 kfree(f);
3159err_rfid_alloc:
3160 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3161err_rif_fdb_op:
3162 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3163 return ERR_PTR(err);
3164}
3165
3166static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3167 struct mlxsw_sp_rif *r)
3168{
3169 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3170 struct net_device *l3_dev = r->dev;
3171 struct mlxsw_sp_fid *f = r->f;
3172 u16 fid = f->fid;
3173 u16 rif = r->rif;
3174
3175 mlxsw_sp->rifs[rif] = NULL;
3176 f->r = NULL;
3177
3178 kfree(r);
3179
3180 kfree(f);
3181
3182 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3183
3184 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3185}
3186
3187static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3188 struct net_device *l3_dev)
3189{
3190 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3191 struct mlxsw_sp_rif *r;
3192
3193 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3194 if (!r) {
3195 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3196 if (IS_ERR(r))
3197 return PTR_ERR(r);
3198 }
3199
3200 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3201 r->f->ref_count++;
3202
3203 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3204
3205 return 0;
3206}
3207
3208static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3209{
3210 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3211
3212 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3213
3214 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3215 if (--f->ref_count == 0)
3216 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3217}
3218
3219static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3220 struct net_device *port_dev,
3221 unsigned long event, u16 vid)
3222{
3223 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3224 struct mlxsw_sp_port *mlxsw_sp_vport;
3225
3226 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3227 if (WARN_ON(!mlxsw_sp_vport))
3228 return -EINVAL;
3229
3230 switch (event) {
3231 case NETDEV_UP:
3232 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3233 case NETDEV_DOWN:
3234 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3235 break;
3236 }
3237
3238 return 0;
3239}
3240
3241static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3242 unsigned long event)
3243{
3244 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3245 return 0;
3246
3247 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3248}
3249
3250static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3251 struct net_device *lag_dev,
3252 unsigned long event, u16 vid)
3253{
3254 struct net_device *port_dev;
3255 struct list_head *iter;
3256 int err;
3257
3258 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3259 if (mlxsw_sp_port_dev_check(port_dev)) {
3260 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3261 event, vid);
3262 if (err)
3263 return err;
3264 }
3265 }
3266
3267 return 0;
3268}
3269
3270static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3271 unsigned long event)
3272{
3273 if (netif_is_bridge_port(lag_dev))
3274 return 0;
3275
3276 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3277}
3278
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003279static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3280 struct net_device *l3_dev)
3281{
3282 u16 fid;
3283
3284 if (is_vlan_dev(l3_dev))
3285 fid = vlan_dev_vlan_id(l3_dev);
3286 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3287 fid = 1;
3288 else
3289 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3290
3291 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3292}
3293
Ido Schimmelf888f582016-08-24 11:18:51 +02003294static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3295{
3296 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3297 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3298}
3299
3300static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3301{
3302 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3303}
3304
3305static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3306 bool set)
3307{
3308 enum mlxsw_flood_table_type table_type;
3309 char *sftr_pl;
3310 u16 index;
3311 int err;
3312
3313 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3314 if (!sftr_pl)
3315 return -ENOMEM;
3316
3317 table_type = mlxsw_sp_flood_table_type_get(fid);
3318 index = mlxsw_sp_flood_table_index_get(fid);
3319 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3320 1, MLXSW_PORT_ROUTER_PORT, set);
3321 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3322
3323 kfree(sftr_pl);
3324 return err;
3325}
3326
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003327static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3328{
3329 if (mlxsw_sp_fid_is_vfid(fid))
3330 return MLXSW_REG_RITR_FID_IF;
3331 else
3332 return MLXSW_REG_RITR_VLAN_IF;
3333}
3334
3335static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3336 struct net_device *l3_dev,
3337 u16 fid, u16 rif,
3338 bool create)
3339{
3340 enum mlxsw_reg_ritr_if_type rif_type;
3341 char ritr_pl[MLXSW_REG_RITR_LEN];
3342
3343 rif_type = mlxsw_sp_rif_type_get(fid);
3344 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3345 l3_dev->dev_addr);
3346 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3347
3348 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3349}
3350
3351static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3352 struct net_device *l3_dev,
3353 struct mlxsw_sp_fid *f)
3354{
3355 struct mlxsw_sp_rif *r;
3356 u16 rif;
3357 int err;
3358
3359 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3360 if (rif == MLXSW_SP_RIF_MAX)
3361 return -ERANGE;
3362
Ido Schimmelf888f582016-08-24 11:18:51 +02003363 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003364 if (err)
3365 return err;
3366
Ido Schimmelf888f582016-08-24 11:18:51 +02003367 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3368 if (err)
3369 goto err_rif_bridge_op;
3370
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003371 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3372 if (err)
3373 goto err_rif_fdb_op;
3374
3375 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3376 if (!r) {
3377 err = -ENOMEM;
3378 goto err_rif_alloc;
3379 }
3380
3381 f->r = r;
3382 mlxsw_sp->rifs[rif] = r;
3383
3384 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3385
3386 return 0;
3387
3388err_rif_alloc:
3389 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3390err_rif_fdb_op:
3391 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
Ido Schimmelf888f582016-08-24 11:18:51 +02003392err_rif_bridge_op:
3393 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003394 return err;
3395}
3396
3397void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3398 struct mlxsw_sp_rif *r)
3399{
3400 struct net_device *l3_dev = r->dev;
3401 struct mlxsw_sp_fid *f = r->f;
3402 u16 rif = r->rif;
3403
3404 mlxsw_sp->rifs[rif] = NULL;
3405 f->r = NULL;
3406
3407 kfree(r);
3408
3409 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3410
3411 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3412
Ido Schimmelf888f582016-08-24 11:18:51 +02003413 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3414
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003415 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3416}
3417
3418static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3419 struct net_device *br_dev,
3420 unsigned long event)
3421{
3422 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3423 struct mlxsw_sp_fid *f;
3424
3425 /* FID can either be an actual FID if the L3 device is the
3426 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3427 * L3 device is a VLAN-unaware bridge and we get a vFID.
3428 */
3429 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3430 if (WARN_ON(!f))
3431 return -EINVAL;
3432
3433 switch (event) {
3434 case NETDEV_UP:
3435 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3436 case NETDEV_DOWN:
3437 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3438 break;
3439 }
3440
3441 return 0;
3442}
3443
Ido Schimmel99724c12016-07-04 08:23:14 +02003444static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3445 unsigned long event)
3446{
3447 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003448 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003449 u16 vid = vlan_dev_vlan_id(vlan_dev);
3450
3451 if (mlxsw_sp_port_dev_check(real_dev))
3452 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3453 vid);
3454 else if (netif_is_lag_master(real_dev))
3455 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3456 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003457 else if (netif_is_bridge_master(real_dev) &&
3458 mlxsw_sp->master_bridge.dev == real_dev)
3459 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3460 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003461
3462 return 0;
3463}
3464
3465static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3466 unsigned long event, void *ptr)
3467{
3468 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3469 struct net_device *dev = ifa->ifa_dev->dev;
3470 struct mlxsw_sp *mlxsw_sp;
3471 struct mlxsw_sp_rif *r;
3472 int err = 0;
3473
3474 mlxsw_sp = mlxsw_sp_lower_get(dev);
3475 if (!mlxsw_sp)
3476 goto out;
3477
3478 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3479 if (!mlxsw_sp_rif_should_config(r, event))
3480 goto out;
3481
3482 if (mlxsw_sp_port_dev_check(dev))
3483 err = mlxsw_sp_inetaddr_port_event(dev, event);
3484 else if (netif_is_lag_master(dev))
3485 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003486 else if (netif_is_bridge_master(dev))
3487 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003488 else if (is_vlan_dev(dev))
3489 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3490
3491out:
3492 return notifier_from_errno(err);
3493}
3494
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003495static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3496 const char *mac, int mtu)
3497{
3498 char ritr_pl[MLXSW_REG_RITR_LEN];
3499 int err;
3500
3501 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3502 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3503 if (err)
3504 return err;
3505
3506 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3507 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3508 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3509 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3510}
3511
3512static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3513{
3514 struct mlxsw_sp *mlxsw_sp;
3515 struct mlxsw_sp_rif *r;
3516 int err;
3517
3518 mlxsw_sp = mlxsw_sp_lower_get(dev);
3519 if (!mlxsw_sp)
3520 return 0;
3521
3522 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3523 if (!r)
3524 return 0;
3525
3526 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3527 if (err)
3528 return err;
3529
3530 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3531 if (err)
3532 goto err_rif_edit;
3533
3534 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3535 if (err)
3536 goto err_rif_fdb_op;
3537
3538 ether_addr_copy(r->addr, dev->dev_addr);
3539 r->mtu = dev->mtu;
3540
3541 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3542
3543 return 0;
3544
3545err_rif_fdb_op:
3546 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3547err_rif_edit:
3548 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3549 return err;
3550}
3551
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003552static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3553 u16 fid)
3554{
3555 if (mlxsw_sp_fid_is_vfid(fid))
3556 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3557 else
3558 return test_bit(fid, lag_port->active_vlans);
3559}
3560
3561static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3562 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003563{
3564 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003565 u8 local_port = mlxsw_sp_port->local_port;
3566 u16 lag_id = mlxsw_sp_port->lag_id;
3567 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003568
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003569 if (!mlxsw_sp_port->lagged)
3570 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003571
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003572 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3573 struct mlxsw_sp_port *lag_port;
3574
3575 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3576 if (!lag_port || lag_port->local_port == local_port)
3577 continue;
3578 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3579 count++;
3580 }
3581
3582 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003583}
3584
3585static int
3586mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3587 u16 fid)
3588{
3589 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3590 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3591
3592 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3593 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3594 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3595 mlxsw_sp_port->local_port);
3596
Ido Schimmel22305372016-06-20 23:04:21 +02003597 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3598 mlxsw_sp_port->local_port, fid);
3599
Ido Schimmel039c49a2016-01-27 15:20:18 +01003600 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3601}
3602
3603static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003604mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3605 u16 fid)
3606{
3607 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3608 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3609
3610 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3611 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3612 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3613
Ido Schimmel22305372016-06-20 23:04:21 +02003614 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3615 mlxsw_sp_port->lag_id, fid);
3616
Ido Schimmel039c49a2016-01-27 15:20:18 +01003617 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3618}
3619
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003620int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003621{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003622 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3623 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003624
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003625 if (mlxsw_sp_port->lagged)
3626 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003627 fid);
3628 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003629 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003630}
3631
Ido Schimmel701b1862016-07-04 08:23:16 +02003632static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3633{
3634 struct mlxsw_sp_fid *f, *tmp;
3635
3636 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3637 if (--f->ref_count == 0)
3638 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3639 else
3640 WARN_ON_ONCE(1);
3641}
3642
Ido Schimmel7117a572016-06-20 23:04:06 +02003643static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3644 struct net_device *br_dev)
3645{
3646 return !mlxsw_sp->master_bridge.dev ||
3647 mlxsw_sp->master_bridge.dev == br_dev;
3648}
3649
3650static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3651 struct net_device *br_dev)
3652{
3653 mlxsw_sp->master_bridge.dev = br_dev;
3654 mlxsw_sp->master_bridge.ref_count++;
3655}
3656
3657static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3658{
Ido Schimmel701b1862016-07-04 08:23:16 +02003659 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003660 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003661 /* It's possible upper VLAN devices are still holding
3662 * references to underlying FIDs. Drop the reference
3663 * and release the resources if it was the last one.
3664 * If it wasn't, then something bad happened.
3665 */
3666 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3667 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003668}
3669
3670static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3671 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003672{
3673 struct net_device *dev = mlxsw_sp_port->dev;
3674 int err;
3675
3676 /* When port is not bridged untagged packets are tagged with
3677 * PVID=VID=1, thereby creating an implicit VLAN interface in
3678 * the device. Remove it and let bridge code take care of its
3679 * own VLANs.
3680 */
3681 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003682 if (err)
3683 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003684
Ido Schimmel7117a572016-06-20 23:04:06 +02003685 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3686
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003687 mlxsw_sp_port->learning = 1;
3688 mlxsw_sp_port->learning_sync = 1;
3689 mlxsw_sp_port->uc_flood = 1;
3690 mlxsw_sp_port->bridged = 1;
3691
3692 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003693}
3694
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003695static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003696{
3697 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003698
Ido Schimmel28a01d22016-02-18 11:30:02 +01003699 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3700
Ido Schimmel7117a572016-06-20 23:04:06 +02003701 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3702
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003703 mlxsw_sp_port->learning = 0;
3704 mlxsw_sp_port->learning_sync = 0;
3705 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003706 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003707
3708 /* Add implicit VLAN interface in the device, so that untagged
3709 * packets will be classified to the default vFID.
3710 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003711 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003712}
3713
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003714static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003715{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003716 char sldr_pl[MLXSW_REG_SLDR_LEN];
3717
3718 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3719 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3720}
3721
3722static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3723{
3724 char sldr_pl[MLXSW_REG_SLDR_LEN];
3725
3726 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3727 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3728}
3729
3730static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3731 u16 lag_id, u8 port_index)
3732{
3733 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3734 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3735
3736 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3737 lag_id, port_index);
3738 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3739}
3740
3741static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3742 u16 lag_id)
3743{
3744 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3745 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3746
3747 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3748 lag_id);
3749 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3750}
3751
3752static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3753 u16 lag_id)
3754{
3755 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3756 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3757
3758 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3759 lag_id);
3760 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3761}
3762
3763static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3764 u16 lag_id)
3765{
3766 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3767 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3768
3769 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3770 lag_id);
3771 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3772}
3773
3774static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3775 struct net_device *lag_dev,
3776 u16 *p_lag_id)
3777{
3778 struct mlxsw_sp_upper *lag;
3779 int free_lag_id = -1;
3780 int i;
3781
3782 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
3783 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3784 if (lag->ref_count) {
3785 if (lag->dev == lag_dev) {
3786 *p_lag_id = i;
3787 return 0;
3788 }
3789 } else if (free_lag_id < 0) {
3790 free_lag_id = i;
3791 }
3792 }
3793 if (free_lag_id < 0)
3794 return -EBUSY;
3795 *p_lag_id = free_lag_id;
3796 return 0;
3797}
3798
3799static bool
3800mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3801 struct net_device *lag_dev,
3802 struct netdev_lag_upper_info *lag_upper_info)
3803{
3804 u16 lag_id;
3805
3806 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3807 return false;
3808 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3809 return false;
3810 return true;
3811}
3812
3813static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3814 u16 lag_id, u8 *p_port_index)
3815{
3816 int i;
3817
3818 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3819 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3820 *p_port_index = i;
3821 return 0;
3822 }
3823 }
3824 return -EBUSY;
3825}
3826
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003827static void
3828mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3829 u16 lag_id)
3830{
3831 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003832 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003833
3834 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3835 if (WARN_ON(!mlxsw_sp_vport))
3836 return;
3837
Ido Schimmel11943ff2016-07-02 11:00:12 +02003838 /* If vPort is assigned a RIF, then leave it since it's no
3839 * longer valid.
3840 */
3841 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3842 if (f)
3843 f->leave(mlxsw_sp_vport);
3844
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003845 mlxsw_sp_vport->lag_id = lag_id;
3846 mlxsw_sp_vport->lagged = 1;
3847}
3848
3849static void
3850mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3851{
3852 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003853 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003854
3855 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3856 if (WARN_ON(!mlxsw_sp_vport))
3857 return;
3858
Ido Schimmel11943ff2016-07-02 11:00:12 +02003859 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3860 if (f)
3861 f->leave(mlxsw_sp_vport);
3862
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003863 mlxsw_sp_vport->lagged = 0;
3864}
3865
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003866static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3867 struct net_device *lag_dev)
3868{
3869 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3870 struct mlxsw_sp_upper *lag;
3871 u16 lag_id;
3872 u8 port_index;
3873 int err;
3874
3875 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
3876 if (err)
3877 return err;
3878 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3879 if (!lag->ref_count) {
3880 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
3881 if (err)
3882 return err;
3883 lag->dev = lag_dev;
3884 }
3885
3886 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
3887 if (err)
3888 return err;
3889 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
3890 if (err)
3891 goto err_col_port_add;
3892 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
3893 if (err)
3894 goto err_col_port_enable;
3895
3896 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
3897 mlxsw_sp_port->local_port);
3898 mlxsw_sp_port->lag_id = lag_id;
3899 mlxsw_sp_port->lagged = 1;
3900 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003901
3902 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
3903
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003904 return 0;
3905
Ido Schimmel51554db2016-05-06 22:18:39 +02003906err_col_port_enable:
3907 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003908err_col_port_add:
3909 if (!lag->ref_count)
3910 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003911 return err;
3912}
3913
Ido Schimmel82e6db02016-06-20 23:04:04 +02003914static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
3915 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003916{
3917 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003918 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02003919 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003920
3921 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003922 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003923 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3924 WARN_ON(lag->ref_count == 0);
3925
Ido Schimmel82e6db02016-06-20 23:04:04 +02003926 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
3927 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003928
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003929 if (mlxsw_sp_port->bridged) {
3930 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003931 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003932 }
3933
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003934 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003935 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003936
3937 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
3938 mlxsw_sp_port->local_port);
3939 mlxsw_sp_port->lagged = 0;
3940 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003941
3942 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003943}
3944
Jiri Pirko74581202015-12-03 12:12:30 +01003945static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3946 u16 lag_id)
3947{
3948 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3949 char sldr_pl[MLXSW_REG_SLDR_LEN];
3950
3951 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
3952 mlxsw_sp_port->local_port);
3953 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3954}
3955
3956static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3957 u16 lag_id)
3958{
3959 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3960 char sldr_pl[MLXSW_REG_SLDR_LEN];
3961
3962 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
3963 mlxsw_sp_port->local_port);
3964 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3965}
3966
3967static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
3968 bool lag_tx_enabled)
3969{
3970 if (lag_tx_enabled)
3971 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
3972 mlxsw_sp_port->lag_id);
3973 else
3974 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
3975 mlxsw_sp_port->lag_id);
3976}
3977
3978static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
3979 struct netdev_lag_lower_state_info *info)
3980{
3981 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
3982}
3983
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003984static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
3985 struct net_device *vlan_dev)
3986{
3987 struct mlxsw_sp_port *mlxsw_sp_vport;
3988 u16 vid = vlan_dev_vlan_id(vlan_dev);
3989
3990 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02003991 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003992 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003993
3994 mlxsw_sp_vport->dev = vlan_dev;
3995
3996 return 0;
3997}
3998
Ido Schimmel82e6db02016-06-20 23:04:04 +02003999static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4000 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004001{
4002 struct mlxsw_sp_port *mlxsw_sp_vport;
4003 u16 vid = vlan_dev_vlan_id(vlan_dev);
4004
4005 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004006 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02004007 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004008
4009 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004010}
4011
Jiri Pirko74581202015-12-03 12:12:30 +01004012static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4013 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004014{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004015 struct netdev_notifier_changeupper_info *info;
4016 struct mlxsw_sp_port *mlxsw_sp_port;
4017 struct net_device *upper_dev;
4018 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004019 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004020
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004021 mlxsw_sp_port = netdev_priv(dev);
4022 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4023 info = ptr;
4024
4025 switch (event) {
4026 case NETDEV_PRECHANGEUPPER:
4027 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004028 if (!is_vlan_dev(upper_dev) &&
4029 !netif_is_lag_master(upper_dev) &&
4030 !netif_is_bridge_master(upper_dev))
4031 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004032 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004033 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004034 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004035 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004036 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004037 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004038 if (netif_is_lag_master(upper_dev) &&
4039 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4040 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004041 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004042 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4043 return -EINVAL;
4044 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4045 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4046 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004047 break;
4048 case NETDEV_CHANGEUPPER:
4049 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004050 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004051 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004052 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4053 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004054 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004055 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4056 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004057 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004058 if (info->linking)
4059 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4060 upper_dev);
4061 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004062 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004063 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004064 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004065 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4066 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004067 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004068 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4069 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004070 } else {
4071 err = -EINVAL;
4072 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004073 }
4074 break;
4075 }
4076
Ido Schimmel80bedf12016-06-20 23:03:59 +02004077 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004078}
4079
Jiri Pirko74581202015-12-03 12:12:30 +01004080static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4081 unsigned long event, void *ptr)
4082{
4083 struct netdev_notifier_changelowerstate_info *info;
4084 struct mlxsw_sp_port *mlxsw_sp_port;
4085 int err;
4086
4087 mlxsw_sp_port = netdev_priv(dev);
4088 info = ptr;
4089
4090 switch (event) {
4091 case NETDEV_CHANGELOWERSTATE:
4092 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4093 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4094 info->lower_state_info);
4095 if (err)
4096 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4097 }
4098 break;
4099 }
4100
Ido Schimmel80bedf12016-06-20 23:03:59 +02004101 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004102}
4103
4104static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4105 unsigned long event, void *ptr)
4106{
4107 switch (event) {
4108 case NETDEV_PRECHANGEUPPER:
4109 case NETDEV_CHANGEUPPER:
4110 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4111 case NETDEV_CHANGELOWERSTATE:
4112 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4113 }
4114
Ido Schimmel80bedf12016-06-20 23:03:59 +02004115 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004116}
4117
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004118static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4119 unsigned long event, void *ptr)
4120{
4121 struct net_device *dev;
4122 struct list_head *iter;
4123 int ret;
4124
4125 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4126 if (mlxsw_sp_port_dev_check(dev)) {
4127 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004128 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004129 return ret;
4130 }
4131 }
4132
Ido Schimmel80bedf12016-06-20 23:03:59 +02004133 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004134}
4135
Ido Schimmel701b1862016-07-04 08:23:16 +02004136static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4137 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004138{
Ido Schimmel701b1862016-07-04 08:23:16 +02004139 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004140 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004141
Ido Schimmel701b1862016-07-04 08:23:16 +02004142 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4143 if (!f) {
4144 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4145 if (IS_ERR(f))
4146 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004147 }
4148
Ido Schimmel701b1862016-07-04 08:23:16 +02004149 f->ref_count++;
4150
4151 return 0;
4152}
4153
4154static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4155 struct net_device *vlan_dev)
4156{
4157 u16 fid = vlan_dev_vlan_id(vlan_dev);
4158 struct mlxsw_sp_fid *f;
4159
4160 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004161 if (f && f->r)
4162 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004163 if (f && --f->ref_count == 0)
4164 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4165}
4166
4167static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4168 unsigned long event, void *ptr)
4169{
4170 struct netdev_notifier_changeupper_info *info;
4171 struct net_device *upper_dev;
4172 struct mlxsw_sp *mlxsw_sp;
4173 int err;
4174
4175 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4176 if (!mlxsw_sp)
4177 return 0;
4178 if (br_dev != mlxsw_sp->master_bridge.dev)
4179 return 0;
4180
4181 info = ptr;
4182
4183 switch (event) {
4184 case NETDEV_CHANGEUPPER:
4185 upper_dev = info->upper_dev;
4186 if (!is_vlan_dev(upper_dev))
4187 break;
4188 if (info->linking) {
4189 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4190 upper_dev);
4191 if (err)
4192 return err;
4193 } else {
4194 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4195 }
4196 break;
4197 }
4198
4199 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004200}
4201
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004202static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004203{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004204 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004205 MLXSW_SP_VFID_MAX);
4206}
4207
4208static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4209{
4210 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4211
4212 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4213 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004214}
4215
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004216static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004217
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004218static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4219 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004220{
4221 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004222 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004223 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004224 int err;
4225
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004226 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004227 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004228 dev_err(dev, "No available vFIDs\n");
4229 return ERR_PTR(-ERANGE);
4230 }
4231
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004232 fid = mlxsw_sp_vfid_to_fid(vfid);
4233 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004234 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004235 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004236 return ERR_PTR(err);
4237 }
4238
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004239 f = kzalloc(sizeof(*f), GFP_KERNEL);
4240 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004241 goto err_allocate_vfid;
4242
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004243 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004244 f->fid = fid;
4245 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004246
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004247 list_add(&f->list, &mlxsw_sp->vfids.list);
4248 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004249
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004250 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004251
4252err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004253 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004254 return ERR_PTR(-ENOMEM);
4255}
4256
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004257static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4258 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004259{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004260 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004261 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004262
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004263 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004264 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004265
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004266 if (f->r)
4267 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004268
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004269 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004270
4271 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004272}
4273
Ido Schimmel99724c12016-07-04 08:23:14 +02004274static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4275 bool valid)
4276{
4277 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4278 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4279
4280 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4281 vid);
4282}
4283
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004284static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4285 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004286{
Ido Schimmel0355b592016-06-20 23:04:13 +02004287 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004288 int err;
4289
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004290 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004291 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004292 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004293 if (IS_ERR(f))
4294 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004295 }
4296
Ido Schimmel0355b592016-06-20 23:04:13 +02004297 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4298 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004299 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004300
Ido Schimmel0355b592016-06-20 23:04:13 +02004301 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4302 if (err)
4303 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004304
Ido Schimmel41b996c2016-06-20 23:04:17 +02004305 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004306 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004307
Ido Schimmel22305372016-06-20 23:04:21 +02004308 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4309
Ido Schimmel0355b592016-06-20 23:04:13 +02004310 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004311
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004312err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004313 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4314err_vport_flood_set:
4315 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004316 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004317 return err;
4318}
4319
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004320static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004321{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004322 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004323
Ido Schimmel22305372016-06-20 23:04:21 +02004324 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4325
Ido Schimmel0355b592016-06-20 23:04:13 +02004326 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4327
4328 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4329
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004330 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4331
Ido Schimmel41b996c2016-06-20 23:04:17 +02004332 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004333 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004334 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004335}
4336
4337static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4338 struct net_device *br_dev)
4339{
Ido Schimmel99724c12016-07-04 08:23:14 +02004340 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004341 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4342 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004343 int err;
4344
Ido Schimmel99724c12016-07-04 08:23:14 +02004345 if (f && !WARN_ON(!f->leave))
4346 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004347
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004348 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004349 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004350 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004351 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004352 }
4353
4354 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4355 if (err) {
4356 netdev_err(dev, "Failed to enable learning\n");
4357 goto err_port_vid_learning_set;
4358 }
4359
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004360 mlxsw_sp_vport->learning = 1;
4361 mlxsw_sp_vport->learning_sync = 1;
4362 mlxsw_sp_vport->uc_flood = 1;
4363 mlxsw_sp_vport->bridged = 1;
4364
4365 return 0;
4366
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004367err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004368 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004369 return err;
4370}
4371
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004372static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004373{
4374 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004375
4376 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4377
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004378 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004379
Ido Schimmel0355b592016-06-20 23:04:13 +02004380 mlxsw_sp_vport->learning = 0;
4381 mlxsw_sp_vport->learning_sync = 0;
4382 mlxsw_sp_vport->uc_flood = 0;
4383 mlxsw_sp_vport->bridged = 0;
4384}
4385
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004386static bool
4387mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4388 const struct net_device *br_dev)
4389{
4390 struct mlxsw_sp_port *mlxsw_sp_vport;
4391
4392 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4393 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004394 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004395
4396 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004397 return false;
4398 }
4399
4400 return true;
4401}
4402
4403static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4404 unsigned long event, void *ptr,
4405 u16 vid)
4406{
4407 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4408 struct netdev_notifier_changeupper_info *info = ptr;
4409 struct mlxsw_sp_port *mlxsw_sp_vport;
4410 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004411 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004412
4413 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4414
4415 switch (event) {
4416 case NETDEV_PRECHANGEUPPER:
4417 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004418 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004419 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004420 if (!info->linking)
4421 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004422 /* We can't have multiple VLAN interfaces configured on
4423 * the same port and being members in the same bridge.
4424 */
4425 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4426 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004427 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004428 break;
4429 case NETDEV_CHANGEUPPER:
4430 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004431 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004432 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004433 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004434 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4435 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004436 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004437 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004438 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004439 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004440 }
4441 }
4442
Ido Schimmel80bedf12016-06-20 23:03:59 +02004443 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004444}
4445
Ido Schimmel272c4472015-12-15 16:03:47 +01004446static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4447 unsigned long event, void *ptr,
4448 u16 vid)
4449{
4450 struct net_device *dev;
4451 struct list_head *iter;
4452 int ret;
4453
4454 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4455 if (mlxsw_sp_port_dev_check(dev)) {
4456 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4457 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004458 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004459 return ret;
4460 }
4461 }
4462
Ido Schimmel80bedf12016-06-20 23:03:59 +02004463 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004464}
4465
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004466static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4467 unsigned long event, void *ptr)
4468{
4469 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4470 u16 vid = vlan_dev_vlan_id(vlan_dev);
4471
Ido Schimmel272c4472015-12-15 16:03:47 +01004472 if (mlxsw_sp_port_dev_check(real_dev))
4473 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4474 vid);
4475 else if (netif_is_lag_master(real_dev))
4476 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4477 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004478
Ido Schimmel80bedf12016-06-20 23:03:59 +02004479 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004480}
4481
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004482static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4483 unsigned long event, void *ptr)
4484{
4485 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004486 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004487
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004488 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4489 err = mlxsw_sp_netdevice_router_port_event(dev);
4490 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004491 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4492 else if (netif_is_lag_master(dev))
4493 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004494 else if (netif_is_bridge_master(dev))
4495 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004496 else if (is_vlan_dev(dev))
4497 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004498
Ido Schimmel80bedf12016-06-20 23:03:59 +02004499 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004500}
4501
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004502static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4503 .notifier_call = mlxsw_sp_netdevice_event,
4504};
4505
Ido Schimmel99724c12016-07-04 08:23:14 +02004506static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4507 .notifier_call = mlxsw_sp_inetaddr_event,
4508 .priority = 10, /* Must be called before FIB notifier block */
4509};
4510
Jiri Pirkoe7322632016-09-01 10:37:43 +02004511static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4512 .notifier_call = mlxsw_sp_router_netevent_event,
4513};
4514
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004515static int __init mlxsw_sp_module_init(void)
4516{
4517 int err;
4518
4519 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004520 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004521 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4522
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004523 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4524 if (err)
4525 goto err_core_driver_register;
4526 return 0;
4527
4528err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004529 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004530 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004531 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4532 return err;
4533}
4534
4535static void __exit mlxsw_sp_module_exit(void)
4536{
4537 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004538 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004539 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004540 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4541}
4542
4543module_init(mlxsw_sp_module_init);
4544module_exit(mlxsw_sp_module_exit);
4545
4546MODULE_LICENSE("Dual BSD/GPL");
4547MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4548MODULE_DESCRIPTION("Mellanox Spectrum driver");
4549MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);