blob: 552636b73416772ae2e50222ec38e4a9c4a92faa [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010051#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020052#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020053#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020054#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020055#include <net/switchdev.h>
56#include <generated/utsrelease.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020059
60#include "spectrum.h"
61#include "core.h"
62#include "reg.h"
63#include "port.h"
64#include "trap.h"
65#include "txheader.h"
66
67static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
68static const char mlxsw_sp_driver_version[] = "1.0";
69
70/* tx_hdr_version
71 * Tx header version.
72 * Must be set to 1.
73 */
74MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
75
76/* tx_hdr_ctl
77 * Packet control type.
78 * 0 - Ethernet control (e.g. EMADs, LACP)
79 * 1 - Ethernet data
80 */
81MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
82
83/* tx_hdr_proto
84 * Packet protocol type. Must be set to 1 (Ethernet).
85 */
86MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
87
88/* tx_hdr_rx_is_router
89 * Packet is sent from the router. Valid for data packets only.
90 */
91MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
92
93/* tx_hdr_fid_valid
94 * Indicates if the 'fid' field is valid and should be used for
95 * forwarding lookup. Valid for data packets only.
96 */
97MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
98
99/* tx_hdr_swid
100 * Switch partition ID. Must be set to 0.
101 */
102MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
103
104/* tx_hdr_control_tclass
105 * Indicates if the packet should use the control TClass and not one
106 * of the data TClasses.
107 */
108MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
109
110/* tx_hdr_etclass
111 * Egress TClass to be used on the egress device on the egress port.
112 */
113MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
114
115/* tx_hdr_port_mid
116 * Destination local port for unicast packets.
117 * Destination multicast ID for multicast packets.
118 *
119 * Control packets are directed to a specific egress port, while data
120 * packets are transmitted through the CPU port (0) into the switch partition,
121 * where forwarding rules are applied.
122 */
123MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
124
125/* tx_hdr_fid
126 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
127 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
128 * Valid for data packets only.
129 */
130MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
131
132/* tx_hdr_type
133 * 0 - Data packets
134 * 6 - Control packets
135 */
136MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
137
Yotam Gigi763b4b72016-07-21 12:03:17 +0200138static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
139
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200140static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
141 const struct mlxsw_tx_info *tx_info)
142{
143 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
144
145 memset(txhdr, 0, MLXSW_TXHDR_LEN);
146
147 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
148 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
149 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
150 mlxsw_tx_hdr_swid_set(txhdr, 0);
151 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
152 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
153 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
154}
155
156static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
157{
158 char spad_pl[MLXSW_REG_SPAD_LEN];
159 int err;
160
161 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
162 if (err)
163 return err;
164 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
165 return 0;
166}
167
Yotam Gigi763b4b72016-07-21 12:03:17 +0200168static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
169{
170 struct mlxsw_resources *resources;
171 int i;
172
173 resources = mlxsw_core_resources_get(mlxsw_sp->core);
174 if (!resources->max_span_valid)
175 return -EIO;
176
177 mlxsw_sp->span.entries_count = resources->max_span;
178 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
179 sizeof(struct mlxsw_sp_span_entry),
180 GFP_KERNEL);
181 if (!mlxsw_sp->span.entries)
182 return -ENOMEM;
183
184 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
185 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
186
187 return 0;
188}
189
190static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
191{
192 int i;
193
194 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
195 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
196
197 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
198 }
199 kfree(mlxsw_sp->span.entries);
200}
201
202static struct mlxsw_sp_span_entry *
203mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
204{
205 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
206 struct mlxsw_sp_span_entry *span_entry;
207 char mpat_pl[MLXSW_REG_MPAT_LEN];
208 u8 local_port = port->local_port;
209 int index;
210 int i;
211 int err;
212
213 /* find a free entry to use */
214 index = -1;
215 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
216 if (!mlxsw_sp->span.entries[i].used) {
217 index = i;
218 span_entry = &mlxsw_sp->span.entries[i];
219 break;
220 }
221 }
222 if (index < 0)
223 return NULL;
224
225 /* create a new port analayzer entry for local_port */
226 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
227 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
228 if (err)
229 return NULL;
230
231 span_entry->used = true;
232 span_entry->id = index;
233 span_entry->ref_count = 0;
234 span_entry->local_port = local_port;
235 return span_entry;
236}
237
238static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
239 struct mlxsw_sp_span_entry *span_entry)
240{
241 u8 local_port = span_entry->local_port;
242 char mpat_pl[MLXSW_REG_MPAT_LEN];
243 int pa_id = span_entry->id;
244
245 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
246 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
247 span_entry->used = false;
248}
249
250struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
251{
252 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
253 int i;
254
255 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
256 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
257
258 if (curr->used && curr->local_port == port->local_port)
259 return curr;
260 }
261 return NULL;
262}
263
264struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
265{
266 struct mlxsw_sp_span_entry *span_entry;
267
268 span_entry = mlxsw_sp_span_entry_find(port);
269 if (span_entry) {
270 span_entry->ref_count++;
271 return span_entry;
272 }
273
274 return mlxsw_sp_span_entry_create(port);
275}
276
277static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
278 struct mlxsw_sp_span_entry *span_entry)
279{
280 if (--span_entry->ref_count == 0)
281 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
282 return 0;
283}
284
285static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
286{
287 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
288 struct mlxsw_sp_span_inspected_port *p;
289 int i;
290
291 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
292 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
293
294 list_for_each_entry(p, &curr->bound_ports_list, list)
295 if (p->local_port == port->local_port &&
296 p->type == MLXSW_SP_SPAN_EGRESS)
297 return true;
298 }
299
300 return false;
301}
302
303static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
304{
305 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
306}
307
308static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
309{
310 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
311 char sbib_pl[MLXSW_REG_SBIB_LEN];
312 int err;
313
314 /* If port is egress mirrored, the shared buffer size should be
315 * updated according to the mtu value
316 */
317 if (mlxsw_sp_span_is_egress_mirror(port)) {
318 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
319 mlxsw_sp_span_mtu_to_buffsize(mtu));
320 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
321 if (err) {
322 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
323 return err;
324 }
325 }
326
327 return 0;
328}
329
330static struct mlxsw_sp_span_inspected_port *
331mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
332 struct mlxsw_sp_span_entry *span_entry)
333{
334 struct mlxsw_sp_span_inspected_port *p;
335
336 list_for_each_entry(p, &span_entry->bound_ports_list, list)
337 if (port->local_port == p->local_port)
338 return p;
339 return NULL;
340}
341
342static int
343mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
344 struct mlxsw_sp_span_entry *span_entry,
345 enum mlxsw_sp_span_type type)
346{
347 struct mlxsw_sp_span_inspected_port *inspected_port;
348 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
349 char mpar_pl[MLXSW_REG_MPAR_LEN];
350 char sbib_pl[MLXSW_REG_SBIB_LEN];
351 int pa_id = span_entry->id;
352 int err;
353
354 /* if it is an egress SPAN, bind a shared buffer to it */
355 if (type == MLXSW_SP_SPAN_EGRESS) {
356 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
357 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
358 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
359 if (err) {
360 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
361 return err;
362 }
363 }
364
365 /* bind the port to the SPAN entry */
366 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, true, pa_id);
367 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
368 if (err)
369 goto err_mpar_reg_write;
370
371 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
372 if (!inspected_port) {
373 err = -ENOMEM;
374 goto err_inspected_port_alloc;
375 }
376 inspected_port->local_port = port->local_port;
377 inspected_port->type = type;
378 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
379
380 return 0;
381
382err_mpar_reg_write:
383err_inspected_port_alloc:
384 if (type == MLXSW_SP_SPAN_EGRESS) {
385 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
386 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
387 }
388 return err;
389}
390
391static void
392mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
393 struct mlxsw_sp_span_entry *span_entry,
394 enum mlxsw_sp_span_type type)
395{
396 struct mlxsw_sp_span_inspected_port *inspected_port;
397 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
398 char mpar_pl[MLXSW_REG_MPAR_LEN];
399 char sbib_pl[MLXSW_REG_SBIB_LEN];
400 int pa_id = span_entry->id;
401
402 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
403 if (!inspected_port)
404 return;
405
406 /* remove the inspected port */
407 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, false, pa_id);
408 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
409
410 /* remove the SBIB buffer if it was egress SPAN */
411 if (type == MLXSW_SP_SPAN_EGRESS) {
412 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
413 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
414 }
415
416 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
417
418 list_del(&inspected_port->list);
419 kfree(inspected_port);
420}
421
422static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
423 struct mlxsw_sp_port *to,
424 enum mlxsw_sp_span_type type)
425{
426 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
427 struct mlxsw_sp_span_entry *span_entry;
428 int err;
429
430 span_entry = mlxsw_sp_span_entry_get(to);
431 if (!span_entry)
432 return -ENOENT;
433
434 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
435 span_entry->id);
436
437 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
438 if (err)
439 goto err_port_bind;
440
441 return 0;
442
443err_port_bind:
444 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
445 return err;
446}
447
448static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
449 struct mlxsw_sp_port *to,
450 enum mlxsw_sp_span_type type)
451{
452 struct mlxsw_sp_span_entry *span_entry;
453
454 span_entry = mlxsw_sp_span_entry_find(to);
455 if (!span_entry) {
456 netdev_err(from->dev, "no span entry found\n");
457 return;
458 }
459
460 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
461 span_entry->id);
462 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
463}
464
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200465static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
466 bool is_up)
467{
468 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
469 char paos_pl[MLXSW_REG_PAOS_LEN];
470
471 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
472 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
473 MLXSW_PORT_ADMIN_STATUS_DOWN);
474 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
475}
476
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200477static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
478 unsigned char *addr)
479{
480 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
481 char ppad_pl[MLXSW_REG_PPAD_LEN];
482
483 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
484 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
485 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
486}
487
488static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
489{
490 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
491 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
492
493 ether_addr_copy(addr, mlxsw_sp->base_mac);
494 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
495 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
496}
497
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200498static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
499{
500 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
501 char pmtu_pl[MLXSW_REG_PMTU_LEN];
502 int max_mtu;
503 int err;
504
505 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
506 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
507 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
508 if (err)
509 return err;
510 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
511
512 if (mtu > max_mtu)
513 return -EINVAL;
514
515 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
516 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
517}
518
Ido Schimmelbe945352016-06-09 09:51:39 +0200519static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
520 u8 swid)
521{
522 char pspa_pl[MLXSW_REG_PSPA_LEN];
523
524 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
525 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
526}
527
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200528static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
529{
530 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200531
Ido Schimmelbe945352016-06-09 09:51:39 +0200532 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
533 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200534}
535
536static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
537 bool enable)
538{
539 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
540 char svpe_pl[MLXSW_REG_SVPE_LEN];
541
542 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
543 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
544}
545
546int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
547 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
548 u16 vid)
549{
550 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
551 char svfa_pl[MLXSW_REG_SVFA_LEN];
552
553 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
554 fid, vid);
555 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
556}
557
558static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
559 u16 vid, bool learn_enable)
560{
561 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
562 char *spvmlr_pl;
563 int err;
564
565 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
566 if (!spvmlr_pl)
567 return -ENOMEM;
568 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid,
569 learn_enable);
570 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
571 kfree(spvmlr_pl);
572 return err;
573}
574
575static int
576mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
577{
578 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
579 char sspr_pl[MLXSW_REG_SSPR_LEN];
580
581 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
582 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
583}
584
Ido Schimmeld664b412016-06-09 09:51:40 +0200585static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
586 u8 local_port, u8 *p_module,
587 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200588{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200589 char pmlp_pl[MLXSW_REG_PMLP_LEN];
590 int err;
591
Ido Schimmel558c2d52016-02-26 17:32:29 +0100592 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200593 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
594 if (err)
595 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100596 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
597 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200598 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200599 return 0;
600}
601
Ido Schimmel18f1e702016-02-26 17:32:31 +0100602static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
603 u8 module, u8 width, u8 lane)
604{
605 char pmlp_pl[MLXSW_REG_PMLP_LEN];
606 int i;
607
608 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
609 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
610 for (i = 0; i < width; i++) {
611 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
612 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
613 }
614
615 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
616}
617
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100618static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
619{
620 char pmlp_pl[MLXSW_REG_PMLP_LEN];
621
622 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
623 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
624 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
625}
626
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200627static int mlxsw_sp_port_open(struct net_device *dev)
628{
629 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
630 int err;
631
632 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
633 if (err)
634 return err;
635 netif_start_queue(dev);
636 return 0;
637}
638
639static int mlxsw_sp_port_stop(struct net_device *dev)
640{
641 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
642
643 netif_stop_queue(dev);
644 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
645}
646
647static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
648 struct net_device *dev)
649{
650 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
651 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
652 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
653 const struct mlxsw_tx_info tx_info = {
654 .local_port = mlxsw_sp_port->local_port,
655 .is_emad = false,
656 };
657 u64 len;
658 int err;
659
Jiri Pirko307c2432016-04-08 19:11:22 +0200660 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200661 return NETDEV_TX_BUSY;
662
663 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
664 struct sk_buff *skb_orig = skb;
665
666 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
667 if (!skb) {
668 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
669 dev_kfree_skb_any(skb_orig);
670 return NETDEV_TX_OK;
671 }
672 }
673
674 if (eth_skb_pad(skb)) {
675 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
676 return NETDEV_TX_OK;
677 }
678
679 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200680 /* TX header is consumed by HW on the way so we shouldn't count its
681 * bytes as being sent.
682 */
683 len = skb->len - MLXSW_TXHDR_LEN;
684
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200685 /* Due to a race we might fail here because of a full queue. In that
686 * unlikely case we simply drop the packet.
687 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200688 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200689
690 if (!err) {
691 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
692 u64_stats_update_begin(&pcpu_stats->syncp);
693 pcpu_stats->tx_packets++;
694 pcpu_stats->tx_bytes += len;
695 u64_stats_update_end(&pcpu_stats->syncp);
696 } else {
697 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
698 dev_kfree_skb_any(skb);
699 }
700 return NETDEV_TX_OK;
701}
702
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100703static void mlxsw_sp_set_rx_mode(struct net_device *dev)
704{
705}
706
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200707static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
708{
709 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
710 struct sockaddr *addr = p;
711 int err;
712
713 if (!is_valid_ether_addr(addr->sa_data))
714 return -EADDRNOTAVAIL;
715
716 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
717 if (err)
718 return err;
719 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
720 return 0;
721}
722
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200723static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200724 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200725{
726 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
727
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200728 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
729 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200730
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200731 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200732 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200733 pg_size + delay, pg_size);
734 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200735 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200736}
737
738int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200739 u8 *prio_tc, bool pause_en,
740 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200741{
742 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200743 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
744 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200745 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200746 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200747
748 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
749 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
750 if (err)
751 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200752
753 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
754 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200755 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200756
757 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
758 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200759 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200760 configure = true;
761 break;
762 }
763 }
764
765 if (!configure)
766 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200767 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200768 }
769
Ido Schimmelff6551e2016-04-06 17:10:03 +0200770 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
771}
772
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200773static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200774 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200775{
776 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
777 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200778 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200779 u8 *prio_tc;
780
781 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200782 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200783
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200784 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200785 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200786}
787
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200788static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
789{
790 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200791 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200792 int err;
793
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200794 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200795 if (err)
796 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200797 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
798 if (err)
799 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200800 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
801 if (err)
802 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200803 dev->mtu = mtu;
804 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200805
806err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200807 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
808err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200809 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200810 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200811}
812
813static struct rtnl_link_stats64 *
814mlxsw_sp_port_get_stats64(struct net_device *dev,
815 struct rtnl_link_stats64 *stats)
816{
817 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
818 struct mlxsw_sp_port_pcpu_stats *p;
819 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
820 u32 tx_dropped = 0;
821 unsigned int start;
822 int i;
823
824 for_each_possible_cpu(i) {
825 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
826 do {
827 start = u64_stats_fetch_begin_irq(&p->syncp);
828 rx_packets = p->rx_packets;
829 rx_bytes = p->rx_bytes;
830 tx_packets = p->tx_packets;
831 tx_bytes = p->tx_bytes;
832 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
833
834 stats->rx_packets += rx_packets;
835 stats->rx_bytes += rx_bytes;
836 stats->tx_packets += tx_packets;
837 stats->tx_bytes += tx_bytes;
838 /* tx_dropped is u32, updated without syncp protection. */
839 tx_dropped += p->tx_dropped;
840 }
841 stats->tx_dropped = tx_dropped;
842 return stats;
843}
844
845int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
846 u16 vid_end, bool is_member, bool untagged)
847{
848 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
849 char *spvm_pl;
850 int err;
851
852 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
853 if (!spvm_pl)
854 return -ENOMEM;
855
856 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
857 vid_end, is_member, untagged);
858 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
859 kfree(spvm_pl);
860 return err;
861}
862
863static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
864{
865 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
866 u16 vid, last_visited_vid;
867 int err;
868
869 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
870 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
871 vid);
872 if (err) {
873 last_visited_vid = vid;
874 goto err_port_vid_to_fid_set;
875 }
876 }
877
878 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
879 if (err) {
880 last_visited_vid = VLAN_N_VID;
881 goto err_port_vid_to_fid_set;
882 }
883
884 return 0;
885
886err_port_vid_to_fid_set:
887 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
888 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
889 vid);
890 return err;
891}
892
893static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
894{
895 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
896 u16 vid;
897 int err;
898
899 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
900 if (err)
901 return err;
902
903 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
904 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
905 vid, vid);
906 if (err)
907 return err;
908 }
909
910 return 0;
911}
912
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100913static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +0200914mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100915{
916 struct mlxsw_sp_port *mlxsw_sp_vport;
917
918 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
919 if (!mlxsw_sp_vport)
920 return NULL;
921
922 /* dev will be set correctly after the VLAN device is linked
923 * with the real device. In case of bridge SELF invocation, dev
924 * will remain as is.
925 */
926 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
927 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
928 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
929 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +0100930 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
931 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +0200932 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100933
934 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
935
936 return mlxsw_sp_vport;
937}
938
939static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
940{
941 list_del(&mlxsw_sp_vport->vport.list);
942 kfree(mlxsw_sp_vport);
943}
944
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200945int mlxsw_sp_port_add_vid(struct net_device *dev, __be16 __always_unused proto,
946 u16 vid)
947{
948 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100949 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +0200950 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200951 int err;
952
953 /* VLAN 0 is added to HW filter when device goes up, but it is
954 * reserved in our case, so simply return.
955 */
956 if (!vid)
957 return 0;
958
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100959 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200960 netdev_warn(dev, "VID=%d already configured\n", vid);
961 return 0;
962 }
963
Ido Schimmel0355b592016-06-20 23:04:13 +0200964 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100965 if (!mlxsw_sp_vport) {
966 netdev_err(dev, "Failed to create vPort for VID=%d\n", vid);
Ido Schimmel0355b592016-06-20 23:04:13 +0200967 return -ENOMEM;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100968 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200969
970 /* When adding the first VLAN interface on a bridged port we need to
971 * transition all the active 802.1Q bridge VLANs to use explicit
972 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
973 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100974 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200975 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
976 if (err) {
977 netdev_err(dev, "Failed to set to Virtual mode\n");
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100978 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200979 }
980 }
981
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100982 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200983 if (err) {
984 netdev_err(dev, "Failed to disable learning for VID=%d\n", vid);
985 goto err_port_vid_learning_set;
986 }
987
Ido Schimmel52697a92016-07-02 11:00:09 +0200988 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200989 if (err) {
990 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
991 vid);
992 goto err_port_add_vid;
993 }
994
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200995 return 0;
996
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200997err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100998 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200999err_port_vid_learning_set:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001000 if (list_is_singular(&mlxsw_sp_port->vports_list))
1001 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1002err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001003 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001004 return err;
1005}
1006
Ido Schimmel32d863f2016-07-02 11:00:10 +02001007static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1008 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001009{
1010 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001011 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001012 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001013 int err;
1014
1015 /* VLAN 0 is removed from HW filter when device goes down, but
1016 * it is reserved in our case, so simply return.
1017 */
1018 if (!vid)
1019 return 0;
1020
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001021 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
1022 if (!mlxsw_sp_vport) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001023 netdev_warn(dev, "VID=%d does not exist\n", vid);
1024 return 0;
1025 }
1026
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001027 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001028 if (err) {
1029 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
1030 vid);
1031 return err;
1032 }
1033
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001034 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001035 if (err) {
1036 netdev_err(dev, "Failed to enable learning for VID=%d\n", vid);
1037 return err;
1038 }
1039
Ido Schimmel1c800752016-06-20 23:04:20 +02001040 /* Drop FID reference. If this was the last reference the
1041 * resources will be freed.
1042 */
1043 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1044 if (f && !WARN_ON(!f->leave))
1045 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001046
1047 /* When removing the last VLAN interface on a bridged port we need to
1048 * transition all active 802.1Q bridge VLANs to use VID to FID
1049 * mappings and set port's mode to VLAN mode.
1050 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001051 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001052 err = mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1053 if (err) {
1054 netdev_err(dev, "Failed to set to VLAN mode\n");
1055 return err;
1056 }
1057 }
1058
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001059 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1060
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001061 return 0;
1062}
1063
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001064static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1065 size_t len)
1066{
1067 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001068 u8 module = mlxsw_sp_port->mapping.module;
1069 u8 width = mlxsw_sp_port->mapping.width;
1070 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001071 int err;
1072
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001073 if (!mlxsw_sp_port->split)
1074 err = snprintf(name, len, "p%d", module + 1);
1075 else
1076 err = snprintf(name, len, "p%ds%d", module + 1,
1077 lane / width);
1078
1079 if (err >= len)
1080 return -EINVAL;
1081
1082 return 0;
1083}
1084
Yotam Gigi763b4b72016-07-21 12:03:17 +02001085static struct mlxsw_sp_port_mall_tc_entry *
1086mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1087 unsigned long cookie) {
1088 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1089
1090 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1091 if (mall_tc_entry->cookie == cookie)
1092 return mall_tc_entry;
1093
1094 return NULL;
1095}
1096
1097static int
1098mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1099 struct tc_cls_matchall_offload *cls,
1100 const struct tc_action *a,
1101 bool ingress)
1102{
1103 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1104 struct net *net = dev_net(mlxsw_sp_port->dev);
1105 enum mlxsw_sp_span_type span_type;
1106 struct mlxsw_sp_port *to_port;
1107 struct net_device *to_dev;
1108 int ifindex;
1109 int err;
1110
1111 ifindex = tcf_mirred_ifindex(a);
1112 to_dev = __dev_get_by_index(net, ifindex);
1113 if (!to_dev) {
1114 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1115 return -EINVAL;
1116 }
1117
1118 if (!mlxsw_sp_port_dev_check(to_dev)) {
1119 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1120 return -ENOTSUPP;
1121 }
1122 to_port = netdev_priv(to_dev);
1123
1124 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1125 if (!mall_tc_entry)
1126 return -ENOMEM;
1127
1128 mall_tc_entry->cookie = cls->cookie;
1129 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1130 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1131 mall_tc_entry->mirror.ingress = ingress;
1132 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1133
1134 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1135 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1136 if (err)
1137 goto err_mirror_add;
1138 return 0;
1139
1140err_mirror_add:
1141 list_del(&mall_tc_entry->list);
1142 kfree(mall_tc_entry);
1143 return err;
1144}
1145
1146static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1147 __be16 protocol,
1148 struct tc_cls_matchall_offload *cls,
1149 bool ingress)
1150{
1151 struct tcf_exts *exts = cls->exts;
1152 const struct tc_action *a;
1153 int err;
1154
1155 if (!list_is_singular(&exts->actions)) {
1156 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1157 return -ENOTSUPP;
1158 }
1159
1160 a = list_first_entry(&exts->actions, struct tc_action, list);
1161 if (is_tcf_mirred_mirror(a) && protocol == htons(ETH_P_ALL)) {
1162 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1163 a, ingress);
1164 if (err)
1165 return err;
1166 } else {
1167 return -ENOTSUPP;
1168 }
1169
1170 return 0;
1171}
1172
1173static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1174 struct tc_cls_matchall_offload *cls)
1175{
1176 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1177 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1178 enum mlxsw_sp_span_type span_type;
1179 struct mlxsw_sp_port *to_port;
1180
1181 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1182 cls->cookie);
1183 if (!mall_tc_entry) {
1184 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1185 return;
1186 }
1187
1188 switch (mall_tc_entry->type) {
1189 case MLXSW_SP_PORT_MALL_MIRROR:
1190 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1191 span_type = mall_tc_entry->mirror.ingress ?
1192 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1193
1194 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1195 break;
1196 default:
1197 WARN_ON(1);
1198 }
1199
1200 list_del(&mall_tc_entry->list);
1201 kfree(mall_tc_entry);
1202}
1203
1204static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1205 __be16 proto, struct tc_to_netdev *tc)
1206{
1207 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1208 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1209
1210 if (tc->type == TC_SETUP_MATCHALL) {
1211 switch (tc->cls_mall->command) {
1212 case TC_CLSMATCHALL_REPLACE:
1213 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1214 proto,
1215 tc->cls_mall,
1216 ingress);
1217 case TC_CLSMATCHALL_DESTROY:
1218 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1219 tc->cls_mall);
1220 return 0;
1221 default:
1222 return -EINVAL;
1223 }
1224 }
1225
1226 return -ENOTSUPP;
1227}
1228
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001229static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1230 .ndo_open = mlxsw_sp_port_open,
1231 .ndo_stop = mlxsw_sp_port_stop,
1232 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001233 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001234 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001235 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1236 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1237 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
1238 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1239 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001240 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1241 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001242 .ndo_fdb_add = switchdev_port_fdb_add,
1243 .ndo_fdb_del = switchdev_port_fdb_del,
1244 .ndo_fdb_dump = switchdev_port_fdb_dump,
1245 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1246 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1247 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001248 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001249};
1250
1251static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1252 struct ethtool_drvinfo *drvinfo)
1253{
1254 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1255 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1256
1257 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1258 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1259 sizeof(drvinfo->version));
1260 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1261 "%d.%d.%d",
1262 mlxsw_sp->bus_info->fw_rev.major,
1263 mlxsw_sp->bus_info->fw_rev.minor,
1264 mlxsw_sp->bus_info->fw_rev.subminor);
1265 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1266 sizeof(drvinfo->bus_info));
1267}
1268
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001269static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1270 struct ethtool_pauseparam *pause)
1271{
1272 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1273
1274 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1275 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1276}
1277
1278static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1279 struct ethtool_pauseparam *pause)
1280{
1281 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1282
1283 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1284 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1285 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1286
1287 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1288 pfcc_pl);
1289}
1290
1291static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1292 struct ethtool_pauseparam *pause)
1293{
1294 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1295 bool pause_en = pause->tx_pause || pause->rx_pause;
1296 int err;
1297
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001298 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1299 netdev_err(dev, "PFC already enabled on port\n");
1300 return -EINVAL;
1301 }
1302
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001303 if (pause->autoneg) {
1304 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1305 return -EINVAL;
1306 }
1307
1308 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1309 if (err) {
1310 netdev_err(dev, "Failed to configure port's headroom\n");
1311 return err;
1312 }
1313
1314 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1315 if (err) {
1316 netdev_err(dev, "Failed to set PAUSE parameters\n");
1317 goto err_port_pause_configure;
1318 }
1319
1320 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1321 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1322
1323 return 0;
1324
1325err_port_pause_configure:
1326 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1327 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1328 return err;
1329}
1330
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001331struct mlxsw_sp_port_hw_stats {
1332 char str[ETH_GSTRING_LEN];
1333 u64 (*getter)(char *payload);
1334};
1335
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001336static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001337 {
1338 .str = "a_frames_transmitted_ok",
1339 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1340 },
1341 {
1342 .str = "a_frames_received_ok",
1343 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1344 },
1345 {
1346 .str = "a_frame_check_sequence_errors",
1347 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1348 },
1349 {
1350 .str = "a_alignment_errors",
1351 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1352 },
1353 {
1354 .str = "a_octets_transmitted_ok",
1355 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1356 },
1357 {
1358 .str = "a_octets_received_ok",
1359 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1360 },
1361 {
1362 .str = "a_multicast_frames_xmitted_ok",
1363 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1364 },
1365 {
1366 .str = "a_broadcast_frames_xmitted_ok",
1367 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1368 },
1369 {
1370 .str = "a_multicast_frames_received_ok",
1371 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1372 },
1373 {
1374 .str = "a_broadcast_frames_received_ok",
1375 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1376 },
1377 {
1378 .str = "a_in_range_length_errors",
1379 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1380 },
1381 {
1382 .str = "a_out_of_range_length_field",
1383 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1384 },
1385 {
1386 .str = "a_frame_too_long_errors",
1387 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1388 },
1389 {
1390 .str = "a_symbol_error_during_carrier",
1391 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1392 },
1393 {
1394 .str = "a_mac_control_frames_transmitted",
1395 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1396 },
1397 {
1398 .str = "a_mac_control_frames_received",
1399 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1400 },
1401 {
1402 .str = "a_unsupported_opcodes_received",
1403 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1404 },
1405 {
1406 .str = "a_pause_mac_ctrl_frames_received",
1407 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1408 },
1409 {
1410 .str = "a_pause_mac_ctrl_frames_xmitted",
1411 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1412 },
1413};
1414
1415#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1416
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001417static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1418 {
1419 .str = "rx_octets_prio",
1420 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1421 },
1422 {
1423 .str = "rx_frames_prio",
1424 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1425 },
1426 {
1427 .str = "tx_octets_prio",
1428 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1429 },
1430 {
1431 .str = "tx_frames_prio",
1432 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1433 },
1434 {
1435 .str = "rx_pause_prio",
1436 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1437 },
1438 {
1439 .str = "rx_pause_duration_prio",
1440 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1441 },
1442 {
1443 .str = "tx_pause_prio",
1444 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1445 },
1446 {
1447 .str = "tx_pause_duration_prio",
1448 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1449 },
1450};
1451
1452#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1453
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001454static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
1455{
1456 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1457
1458 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1459}
1460
1461static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1462 {
1463 .str = "tc_transmit_queue_tc",
1464 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1465 },
1466 {
1467 .str = "tc_no_buffer_discard_uc_tc",
1468 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1469 },
1470};
1471
1472#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1473
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001474#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001475 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1476 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001477 IEEE_8021QAZ_MAX_TCS)
1478
1479static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1480{
1481 int i;
1482
1483 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1484 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1485 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1486 *p += ETH_GSTRING_LEN;
1487 }
1488}
1489
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001490static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1491{
1492 int i;
1493
1494 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1495 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1496 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1497 *p += ETH_GSTRING_LEN;
1498 }
1499}
1500
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001501static void mlxsw_sp_port_get_strings(struct net_device *dev,
1502 u32 stringset, u8 *data)
1503{
1504 u8 *p = data;
1505 int i;
1506
1507 switch (stringset) {
1508 case ETH_SS_STATS:
1509 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1510 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1511 ETH_GSTRING_LEN);
1512 p += ETH_GSTRING_LEN;
1513 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001514
1515 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1516 mlxsw_sp_port_get_prio_strings(&p, i);
1517
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001518 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1519 mlxsw_sp_port_get_tc_strings(&p, i);
1520
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001521 break;
1522 }
1523}
1524
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001525static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1526 enum ethtool_phys_id_state state)
1527{
1528 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1529 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1530 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1531 bool active;
1532
1533 switch (state) {
1534 case ETHTOOL_ID_ACTIVE:
1535 active = true;
1536 break;
1537 case ETHTOOL_ID_INACTIVE:
1538 active = false;
1539 break;
1540 default:
1541 return -EOPNOTSUPP;
1542 }
1543
1544 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1545 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1546}
1547
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001548static int
1549mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1550 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1551{
1552 switch (grp) {
1553 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1554 *p_hw_stats = mlxsw_sp_port_hw_stats;
1555 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1556 break;
1557 case MLXSW_REG_PPCNT_PRIO_CNT:
1558 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1559 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1560 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001561 case MLXSW_REG_PPCNT_TC_CNT:
1562 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1563 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1564 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001565 default:
1566 WARN_ON(1);
1567 return -ENOTSUPP;
1568 }
1569 return 0;
1570}
1571
1572static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1573 enum mlxsw_reg_ppcnt_grp grp, int prio,
1574 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001575{
1576 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1577 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001578 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001579 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001580 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001581 int err;
1582
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001583 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1584 if (err)
1585 return;
1586 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001587 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001588 for (i = 0; i < len; i++)
1589 data[data_index + i] = !err ? hw_stats[i].getter(ppcnt_pl) : 0;
1590}
1591
1592static void mlxsw_sp_port_get_stats(struct net_device *dev,
1593 struct ethtool_stats *stats, u64 *data)
1594{
1595 int i, data_index = 0;
1596
1597 /* IEEE 802.3 Counters */
1598 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1599 data, data_index);
1600 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1601
1602 /* Per-Priority Counters */
1603 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1604 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1605 data, data_index);
1606 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1607 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001608
1609 /* Per-TC Counters */
1610 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1611 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1612 data, data_index);
1613 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1614 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001615}
1616
1617static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1618{
1619 switch (sset) {
1620 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001621 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001622 default:
1623 return -EOPNOTSUPP;
1624 }
1625}
1626
1627struct mlxsw_sp_port_link_mode {
1628 u32 mask;
1629 u32 supported;
1630 u32 advertised;
1631 u32 speed;
1632};
1633
1634static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1635 {
1636 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1637 .supported = SUPPORTED_100baseT_Full,
1638 .advertised = ADVERTISED_100baseT_Full,
1639 .speed = 100,
1640 },
1641 {
1642 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
1643 .speed = 100,
1644 },
1645 {
1646 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1647 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1648 .supported = SUPPORTED_1000baseKX_Full,
1649 .advertised = ADVERTISED_1000baseKX_Full,
1650 .speed = 1000,
1651 },
1652 {
1653 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1654 .supported = SUPPORTED_10000baseT_Full,
1655 .advertised = ADVERTISED_10000baseT_Full,
1656 .speed = 10000,
1657 },
1658 {
1659 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1660 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1661 .supported = SUPPORTED_10000baseKX4_Full,
1662 .advertised = ADVERTISED_10000baseKX4_Full,
1663 .speed = 10000,
1664 },
1665 {
1666 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1667 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1668 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1669 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1670 .supported = SUPPORTED_10000baseKR_Full,
1671 .advertised = ADVERTISED_10000baseKR_Full,
1672 .speed = 10000,
1673 },
1674 {
1675 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1676 .supported = SUPPORTED_20000baseKR2_Full,
1677 .advertised = ADVERTISED_20000baseKR2_Full,
1678 .speed = 20000,
1679 },
1680 {
1681 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1682 .supported = SUPPORTED_40000baseCR4_Full,
1683 .advertised = ADVERTISED_40000baseCR4_Full,
1684 .speed = 40000,
1685 },
1686 {
1687 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1688 .supported = SUPPORTED_40000baseKR4_Full,
1689 .advertised = ADVERTISED_40000baseKR4_Full,
1690 .speed = 40000,
1691 },
1692 {
1693 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1694 .supported = SUPPORTED_40000baseSR4_Full,
1695 .advertised = ADVERTISED_40000baseSR4_Full,
1696 .speed = 40000,
1697 },
1698 {
1699 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1700 .supported = SUPPORTED_40000baseLR4_Full,
1701 .advertised = ADVERTISED_40000baseLR4_Full,
1702 .speed = 40000,
1703 },
1704 {
1705 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
1706 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
1707 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1708 .speed = 25000,
1709 },
1710 {
1711 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
1712 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
1713 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1714 .speed = 50000,
1715 },
1716 {
1717 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1718 .supported = SUPPORTED_56000baseKR4_Full,
1719 .advertised = ADVERTISED_56000baseKR4_Full,
1720 .speed = 56000,
1721 },
1722 {
1723 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
1724 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1725 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1726 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1727 .speed = 100000,
1728 },
1729};
1730
1731#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1732
1733static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
1734{
1735 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1736 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1737 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1738 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1739 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1740 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1741 return SUPPORTED_FIBRE;
1742
1743 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1744 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1745 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1746 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1747 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1748 return SUPPORTED_Backplane;
1749 return 0;
1750}
1751
1752static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1753{
1754 u32 modes = 0;
1755 int i;
1756
1757 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1758 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1759 modes |= mlxsw_sp_port_link_mode[i].supported;
1760 }
1761 return modes;
1762}
1763
1764static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1765{
1766 u32 modes = 0;
1767 int i;
1768
1769 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1770 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1771 modes |= mlxsw_sp_port_link_mode[i].advertised;
1772 }
1773 return modes;
1774}
1775
1776static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1777 struct ethtool_cmd *cmd)
1778{
1779 u32 speed = SPEED_UNKNOWN;
1780 u8 duplex = DUPLEX_UNKNOWN;
1781 int i;
1782
1783 if (!carrier_ok)
1784 goto out;
1785
1786 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1787 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1788 speed = mlxsw_sp_port_link_mode[i].speed;
1789 duplex = DUPLEX_FULL;
1790 break;
1791 }
1792 }
1793out:
1794 ethtool_cmd_speed_set(cmd, speed);
1795 cmd->duplex = duplex;
1796}
1797
1798static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1799{
1800 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1801 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1802 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1803 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1804 return PORT_FIBRE;
1805
1806 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1807 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1808 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1809 return PORT_DA;
1810
1811 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1812 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1813 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1814 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1815 return PORT_NONE;
1816
1817 return PORT_OTHER;
1818}
1819
1820static int mlxsw_sp_port_get_settings(struct net_device *dev,
1821 struct ethtool_cmd *cmd)
1822{
1823 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1824 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1825 char ptys_pl[MLXSW_REG_PTYS_LEN];
1826 u32 eth_proto_cap;
1827 u32 eth_proto_admin;
1828 u32 eth_proto_oper;
1829 int err;
1830
1831 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1832 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1833 if (err) {
1834 netdev_err(dev, "Failed to get proto");
1835 return err;
1836 }
1837 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap,
1838 &eth_proto_admin, &eth_proto_oper);
1839
1840 cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1841 mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
Ido Schimmelc3f15762016-07-15 11:14:59 +02001842 SUPPORTED_Pause | SUPPORTED_Asym_Pause |
1843 SUPPORTED_Autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001844 cmd->advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1845 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1846 eth_proto_oper, cmd);
1847
1848 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1849 cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
1850 cmd->lp_advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_oper);
1851
1852 cmd->transceiver = XCVR_INTERNAL;
1853 return 0;
1854}
1855
1856static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1857{
1858 u32 ptys_proto = 0;
1859 int i;
1860
1861 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1862 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1863 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1864 }
1865 return ptys_proto;
1866}
1867
1868static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1869{
1870 u32 ptys_proto = 0;
1871 int i;
1872
1873 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1874 if (speed == mlxsw_sp_port_link_mode[i].speed)
1875 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1876 }
1877 return ptys_proto;
1878}
1879
Ido Schimmel18f1e702016-02-26 17:32:31 +01001880static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1881{
1882 u32 ptys_proto = 0;
1883 int i;
1884
1885 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1886 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1887 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1888 }
1889 return ptys_proto;
1890}
1891
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001892static int mlxsw_sp_port_set_settings(struct net_device *dev,
1893 struct ethtool_cmd *cmd)
1894{
1895 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1896 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1897 char ptys_pl[MLXSW_REG_PTYS_LEN];
1898 u32 speed;
1899 u32 eth_proto_new;
1900 u32 eth_proto_cap;
1901 u32 eth_proto_admin;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001902 int err;
1903
1904 speed = ethtool_cmd_speed(cmd);
1905
1906 eth_proto_new = cmd->autoneg == AUTONEG_ENABLE ?
1907 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1908 mlxsw_sp_to_ptys_speed(speed);
1909
1910 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1911 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1912 if (err) {
1913 netdev_err(dev, "Failed to get proto");
1914 return err;
1915 }
1916 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin, NULL);
1917
1918 eth_proto_new = eth_proto_new & eth_proto_cap;
1919 if (!eth_proto_new) {
1920 netdev_err(dev, "Not supported proto admin requested");
1921 return -EINVAL;
1922 }
1923 if (eth_proto_new == eth_proto_admin)
1924 return 0;
1925
1926 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1927 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1928 if (err) {
1929 netdev_err(dev, "Failed to set proto admin");
1930 return err;
1931 }
1932
Ido Schimmel6277d462016-07-15 11:14:58 +02001933 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001934 return 0;
1935
1936 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1937 if (err) {
1938 netdev_err(dev, "Failed to set admin status");
1939 return err;
1940 }
1941
1942 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1943 if (err) {
1944 netdev_err(dev, "Failed to set admin status");
1945 return err;
1946 }
1947
1948 return 0;
1949}
1950
1951static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1952 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
1953 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001954 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
1955 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001956 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001957 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001958 .get_ethtool_stats = mlxsw_sp_port_get_stats,
1959 .get_sset_count = mlxsw_sp_port_get_sset_count,
1960 .get_settings = mlxsw_sp_port_get_settings,
1961 .set_settings = mlxsw_sp_port_set_settings,
1962};
1963
Ido Schimmel18f1e702016-02-26 17:32:31 +01001964static int
1965mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
1966{
1967 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1968 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
1969 char ptys_pl[MLXSW_REG_PTYS_LEN];
1970 u32 eth_proto_admin;
1971
1972 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
1973 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
1974 eth_proto_admin);
1975 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1976}
1977
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02001978int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
1979 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
1980 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02001981{
1982 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1983 char qeec_pl[MLXSW_REG_QEEC_LEN];
1984
1985 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1986 next_index);
1987 mlxsw_reg_qeec_de_set(qeec_pl, true);
1988 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
1989 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
1990 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1991}
1992
Ido Schimmelcc7cf512016-04-06 17:10:11 +02001993int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
1994 enum mlxsw_reg_qeec_hr hr, u8 index,
1995 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02001996{
1997 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1998 char qeec_pl[MLXSW_REG_QEEC_LEN];
1999
2000 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2001 next_index);
2002 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2003 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2004 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2005}
2006
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002007int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2008 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002009{
2010 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2011 char qtct_pl[MLXSW_REG_QTCT_LEN];
2012
2013 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2014 tclass);
2015 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2016}
2017
2018static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2019{
2020 int err, i;
2021
2022 /* Setup the elements hierarcy, so that each TC is linked to
2023 * one subgroup, which are all member in the same group.
2024 */
2025 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2026 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2027 0);
2028 if (err)
2029 return err;
2030 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2031 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2032 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2033 0, false, 0);
2034 if (err)
2035 return err;
2036 }
2037 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2038 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2039 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2040 false, 0);
2041 if (err)
2042 return err;
2043 }
2044
2045 /* Make sure the max shaper is disabled in all hierarcies that
2046 * support it.
2047 */
2048 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2049 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2050 MLXSW_REG_QEEC_MAS_DIS);
2051 if (err)
2052 return err;
2053 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2054 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2055 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2056 i, 0,
2057 MLXSW_REG_QEEC_MAS_DIS);
2058 if (err)
2059 return err;
2060 }
2061 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2062 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2063 MLXSW_REG_QEEC_HIERARCY_TC,
2064 i, i,
2065 MLXSW_REG_QEEC_MAS_DIS);
2066 if (err)
2067 return err;
2068 }
2069
2070 /* Map all priorities to traffic class 0. */
2071 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2072 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2073 if (err)
2074 return err;
2075 }
2076
2077 return 0;
2078}
2079
Ido Schimmelbe945352016-06-09 09:51:39 +02002080static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
Ido Schimmeld664b412016-06-09 09:51:40 +02002081 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002082{
2083 struct mlxsw_sp_port *mlxsw_sp_port;
2084 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002085 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002086 int err;
2087
2088 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2089 if (!dev)
2090 return -ENOMEM;
2091 mlxsw_sp_port = netdev_priv(dev);
2092 mlxsw_sp_port->dev = dev;
2093 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2094 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002095 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002096 mlxsw_sp_port->mapping.module = module;
2097 mlxsw_sp_port->mapping.width = width;
2098 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002099 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2100 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2101 if (!mlxsw_sp_port->active_vlans) {
2102 err = -ENOMEM;
2103 goto err_port_active_vlans_alloc;
2104 }
Elad Razfc1273a2016-01-06 13:01:11 +01002105 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2106 if (!mlxsw_sp_port->untagged_vlans) {
2107 err = -ENOMEM;
2108 goto err_port_untagged_vlans_alloc;
2109 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002110 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002111 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002112
2113 mlxsw_sp_port->pcpu_stats =
2114 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2115 if (!mlxsw_sp_port->pcpu_stats) {
2116 err = -ENOMEM;
2117 goto err_alloc_stats;
2118 }
2119
2120 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2121 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2122
2123 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2124 if (err) {
2125 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2126 mlxsw_sp_port->local_port);
2127 goto err_dev_addr_init;
2128 }
2129
2130 netif_carrier_off(dev);
2131
2132 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002133 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2134 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002135
2136 /* Each packet needs to have a Tx header (metadata) on top all other
2137 * headers.
2138 */
2139 dev->hard_header_len += MLXSW_TXHDR_LEN;
2140
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002141 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2142 if (err) {
2143 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2144 mlxsw_sp_port->local_port);
2145 goto err_port_system_port_mapping_set;
2146 }
2147
2148 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2149 if (err) {
2150 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2151 mlxsw_sp_port->local_port);
2152 goto err_port_swid_set;
2153 }
2154
Ido Schimmel18f1e702016-02-26 17:32:31 +01002155 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2156 if (err) {
2157 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2158 mlxsw_sp_port->local_port);
2159 goto err_port_speed_by_width_set;
2160 }
2161
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002162 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2163 if (err) {
2164 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2165 mlxsw_sp_port->local_port);
2166 goto err_port_mtu_set;
2167 }
2168
2169 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2170 if (err)
2171 goto err_port_admin_status_set;
2172
2173 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2174 if (err) {
2175 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2176 mlxsw_sp_port->local_port);
2177 goto err_port_buffers_init;
2178 }
2179
Ido Schimmel90183b92016-04-06 17:10:08 +02002180 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2181 if (err) {
2182 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2183 mlxsw_sp_port->local_port);
2184 goto err_port_ets_init;
2185 }
2186
Ido Schimmelf00817d2016-04-06 17:10:09 +02002187 /* ETS and buffers must be initialized before DCB. */
2188 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2189 if (err) {
2190 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2191 mlxsw_sp_port->local_port);
2192 goto err_port_dcb_init;
2193 }
2194
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002195 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
2196 err = register_netdev(dev);
2197 if (err) {
2198 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2199 mlxsw_sp_port->local_port);
2200 goto err_register_netdev;
2201 }
2202
Jiri Pirko932762b2016-04-08 19:11:21 +02002203 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
2204 mlxsw_sp_port->local_port, dev,
2205 mlxsw_sp_port->split, module);
2206 if (err) {
2207 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2208 mlxsw_sp_port->local_port);
2209 goto err_core_port_init;
2210 }
Jiri Pirkoc4745502016-02-26 17:32:26 +01002211
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002212 err = mlxsw_sp_port_vlan_init(mlxsw_sp_port);
2213 if (err)
2214 goto err_port_vlan_init;
2215
2216 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
2217 return 0;
2218
2219err_port_vlan_init:
Jiri Pirko932762b2016-04-08 19:11:21 +02002220 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
2221err_core_port_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002222 unregister_netdev(dev);
2223err_register_netdev:
Ido Schimmelf00817d2016-04-06 17:10:09 +02002224err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002225err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002226err_port_buffers_init:
2227err_port_admin_status_set:
2228err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002229err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002230err_port_swid_set:
2231err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002232err_dev_addr_init:
2233 free_percpu(mlxsw_sp_port->pcpu_stats);
2234err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002235 kfree(mlxsw_sp_port->untagged_vlans);
2236err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002237 kfree(mlxsw_sp_port->active_vlans);
2238err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002239 free_netdev(dev);
2240 return err;
2241}
2242
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002243static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2244{
2245 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2246
2247 if (!mlxsw_sp_port)
2248 return;
Ido Schimmela1333182016-02-26 17:32:30 +01002249 mlxsw_sp->ports[local_port] = NULL;
Jiri Pirko932762b2016-04-08 19:11:21 +02002250 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002251 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmelf00817d2016-04-06 17:10:09 +02002252 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002253 mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002254 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002255 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2256 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002257 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01002258 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002259 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002260 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002261 free_netdev(mlxsw_sp_port->dev);
2262}
2263
2264static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2265{
2266 int i;
2267
2268 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2269 mlxsw_sp_port_remove(mlxsw_sp, i);
2270 kfree(mlxsw_sp->ports);
2271}
2272
2273static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2274{
Ido Schimmeld664b412016-06-09 09:51:40 +02002275 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002276 size_t alloc_size;
2277 int i;
2278 int err;
2279
2280 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2281 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2282 if (!mlxsw_sp->ports)
2283 return -ENOMEM;
2284
2285 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002286 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002287 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002288 if (err)
2289 goto err_port_module_info_get;
2290 if (!width)
2291 continue;
2292 mlxsw_sp->port_to_module[i] = module;
Ido Schimmeld664b412016-06-09 09:51:40 +02002293 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
2294 lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002295 if (err)
2296 goto err_port_create;
2297 }
2298 return 0;
2299
2300err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002301err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002302 for (i--; i >= 1; i--)
2303 mlxsw_sp_port_remove(mlxsw_sp, i);
2304 kfree(mlxsw_sp->ports);
2305 return err;
2306}
2307
Ido Schimmel18f1e702016-02-26 17:32:31 +01002308static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2309{
2310 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2311
2312 return local_port - offset;
2313}
2314
Ido Schimmelbe945352016-06-09 09:51:39 +02002315static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2316 u8 module, unsigned int count)
2317{
2318 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2319 int err, i;
2320
2321 for (i = 0; i < count; i++) {
2322 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2323 width, i * width);
2324 if (err)
2325 goto err_port_module_map;
2326 }
2327
2328 for (i = 0; i < count; i++) {
2329 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2330 if (err)
2331 goto err_port_swid_set;
2332 }
2333
2334 for (i = 0; i < count; i++) {
2335 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002336 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002337 if (err)
2338 goto err_port_create;
2339 }
2340
2341 return 0;
2342
2343err_port_create:
2344 for (i--; i >= 0; i--)
2345 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2346 i = count;
2347err_port_swid_set:
2348 for (i--; i >= 0; i--)
2349 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2350 MLXSW_PORT_SWID_DISABLED_PORT);
2351 i = count;
2352err_port_module_map:
2353 for (i--; i >= 0; i--)
2354 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2355 return err;
2356}
2357
2358static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2359 u8 base_port, unsigned int count)
2360{
2361 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2362 int i;
2363
2364 /* Split by four means we need to re-create two ports, otherwise
2365 * only one.
2366 */
2367 count = count / 2;
2368
2369 for (i = 0; i < count; i++) {
2370 local_port = base_port + i * 2;
2371 module = mlxsw_sp->port_to_module[local_port];
2372
2373 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2374 0);
2375 }
2376
2377 for (i = 0; i < count; i++)
2378 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2379
2380 for (i = 0; i < count; i++) {
2381 local_port = base_port + i * 2;
2382 module = mlxsw_sp->port_to_module[local_port];
2383
2384 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002385 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002386 }
2387}
2388
Jiri Pirkob2f10572016-04-08 19:11:23 +02002389static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2390 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002391{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002392 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002393 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002394 u8 module, cur_width, base_port;
2395 int i;
2396 int err;
2397
2398 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2399 if (!mlxsw_sp_port) {
2400 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2401 local_port);
2402 return -EINVAL;
2403 }
2404
Ido Schimmeld664b412016-06-09 09:51:40 +02002405 module = mlxsw_sp_port->mapping.module;
2406 cur_width = mlxsw_sp_port->mapping.width;
2407
Ido Schimmel18f1e702016-02-26 17:32:31 +01002408 if (count != 2 && count != 4) {
2409 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2410 return -EINVAL;
2411 }
2412
Ido Schimmel18f1e702016-02-26 17:32:31 +01002413 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2414 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2415 return -EINVAL;
2416 }
2417
2418 /* Make sure we have enough slave (even) ports for the split. */
2419 if (count == 2) {
2420 base_port = local_port;
2421 if (mlxsw_sp->ports[base_port + 1]) {
2422 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2423 return -EINVAL;
2424 }
2425 } else {
2426 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2427 if (mlxsw_sp->ports[base_port + 1] ||
2428 mlxsw_sp->ports[base_port + 3]) {
2429 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2430 return -EINVAL;
2431 }
2432 }
2433
2434 for (i = 0; i < count; i++)
2435 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2436
Ido Schimmelbe945352016-06-09 09:51:39 +02002437 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2438 if (err) {
2439 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2440 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002441 }
2442
2443 return 0;
2444
Ido Schimmelbe945352016-06-09 09:51:39 +02002445err_port_split_create:
2446 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002447 return err;
2448}
2449
Jiri Pirkob2f10572016-04-08 19:11:23 +02002450static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002451{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002452 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002453 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002454 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002455 unsigned int count;
2456 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002457
2458 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2459 if (!mlxsw_sp_port) {
2460 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2461 local_port);
2462 return -EINVAL;
2463 }
2464
2465 if (!mlxsw_sp_port->split) {
2466 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2467 return -EINVAL;
2468 }
2469
Ido Schimmeld664b412016-06-09 09:51:40 +02002470 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002471 count = cur_width == 1 ? 4 : 2;
2472
2473 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2474
2475 /* Determine which ports to remove. */
2476 if (count == 2 && local_port >= base_port + 2)
2477 base_port = base_port + 2;
2478
2479 for (i = 0; i < count; i++)
2480 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2481
Ido Schimmelbe945352016-06-09 09:51:39 +02002482 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002483
2484 return 0;
2485}
2486
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002487static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2488 char *pude_pl, void *priv)
2489{
2490 struct mlxsw_sp *mlxsw_sp = priv;
2491 struct mlxsw_sp_port *mlxsw_sp_port;
2492 enum mlxsw_reg_pude_oper_status status;
2493 u8 local_port;
2494
2495 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2496 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002497 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002498 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002499
2500 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2501 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2502 netdev_info(mlxsw_sp_port->dev, "link up\n");
2503 netif_carrier_on(mlxsw_sp_port->dev);
2504 } else {
2505 netdev_info(mlxsw_sp_port->dev, "link down\n");
2506 netif_carrier_off(mlxsw_sp_port->dev);
2507 }
2508}
2509
2510static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2511 .func = mlxsw_sp_pude_event_func,
2512 .trap_id = MLXSW_TRAP_ID_PUDE,
2513};
2514
2515static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2516 enum mlxsw_event_trap_id trap_id)
2517{
2518 struct mlxsw_event_listener *el;
2519 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2520 int err;
2521
2522 switch (trap_id) {
2523 case MLXSW_TRAP_ID_PUDE:
2524 el = &mlxsw_sp_pude_event;
2525 break;
2526 }
2527 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2528 if (err)
2529 return err;
2530
2531 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2532 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2533 if (err)
2534 goto err_event_trap_set;
2535
2536 return 0;
2537
2538err_event_trap_set:
2539 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2540 return err;
2541}
2542
2543static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2544 enum mlxsw_event_trap_id trap_id)
2545{
2546 struct mlxsw_event_listener *el;
2547
2548 switch (trap_id) {
2549 case MLXSW_TRAP_ID_PUDE:
2550 el = &mlxsw_sp_pude_event;
2551 break;
2552 }
2553 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2554}
2555
2556static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2557 void *priv)
2558{
2559 struct mlxsw_sp *mlxsw_sp = priv;
2560 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2561 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2562
2563 if (unlikely(!mlxsw_sp_port)) {
2564 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2565 local_port);
2566 return;
2567 }
2568
2569 skb->dev = mlxsw_sp_port->dev;
2570
2571 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2572 u64_stats_update_begin(&pcpu_stats->syncp);
2573 pcpu_stats->rx_packets++;
2574 pcpu_stats->rx_bytes += skb->len;
2575 u64_stats_update_end(&pcpu_stats->syncp);
2576
2577 skb->protocol = eth_type_trans(skb, skb->dev);
2578 netif_receive_skb(skb);
2579}
2580
2581static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
2582 {
2583 .func = mlxsw_sp_rx_listener_func,
2584 .local_port = MLXSW_PORT_DONT_CARE,
2585 .trap_id = MLXSW_TRAP_ID_FDB_MC,
2586 },
2587 /* Traps for specific L2 packet types, not trapped as FDB MC */
2588 {
2589 .func = mlxsw_sp_rx_listener_func,
2590 .local_port = MLXSW_PORT_DONT_CARE,
2591 .trap_id = MLXSW_TRAP_ID_STP,
2592 },
2593 {
2594 .func = mlxsw_sp_rx_listener_func,
2595 .local_port = MLXSW_PORT_DONT_CARE,
2596 .trap_id = MLXSW_TRAP_ID_LACP,
2597 },
2598 {
2599 .func = mlxsw_sp_rx_listener_func,
2600 .local_port = MLXSW_PORT_DONT_CARE,
2601 .trap_id = MLXSW_TRAP_ID_EAPOL,
2602 },
2603 {
2604 .func = mlxsw_sp_rx_listener_func,
2605 .local_port = MLXSW_PORT_DONT_CARE,
2606 .trap_id = MLXSW_TRAP_ID_LLDP,
2607 },
2608 {
2609 .func = mlxsw_sp_rx_listener_func,
2610 .local_port = MLXSW_PORT_DONT_CARE,
2611 .trap_id = MLXSW_TRAP_ID_MMRP,
2612 },
2613 {
2614 .func = mlxsw_sp_rx_listener_func,
2615 .local_port = MLXSW_PORT_DONT_CARE,
2616 .trap_id = MLXSW_TRAP_ID_MVRP,
2617 },
2618 {
2619 .func = mlxsw_sp_rx_listener_func,
2620 .local_port = MLXSW_PORT_DONT_CARE,
2621 .trap_id = MLXSW_TRAP_ID_RPVST,
2622 },
2623 {
2624 .func = mlxsw_sp_rx_listener_func,
2625 .local_port = MLXSW_PORT_DONT_CARE,
2626 .trap_id = MLXSW_TRAP_ID_DHCP,
2627 },
2628 {
2629 .func = mlxsw_sp_rx_listener_func,
2630 .local_port = MLXSW_PORT_DONT_CARE,
2631 .trap_id = MLXSW_TRAP_ID_IGMP_QUERY,
2632 },
2633 {
2634 .func = mlxsw_sp_rx_listener_func,
2635 .local_port = MLXSW_PORT_DONT_CARE,
2636 .trap_id = MLXSW_TRAP_ID_IGMP_V1_REPORT,
2637 },
2638 {
2639 .func = mlxsw_sp_rx_listener_func,
2640 .local_port = MLXSW_PORT_DONT_CARE,
2641 .trap_id = MLXSW_TRAP_ID_IGMP_V2_REPORT,
2642 },
2643 {
2644 .func = mlxsw_sp_rx_listener_func,
2645 .local_port = MLXSW_PORT_DONT_CARE,
2646 .trap_id = MLXSW_TRAP_ID_IGMP_V2_LEAVE,
2647 },
2648 {
2649 .func = mlxsw_sp_rx_listener_func,
2650 .local_port = MLXSW_PORT_DONT_CARE,
2651 .trap_id = MLXSW_TRAP_ID_IGMP_V3_REPORT,
2652 },
Jiri Pirko7b27ce72016-07-02 11:00:20 +02002653 {
2654 .func = mlxsw_sp_rx_listener_func,
2655 .local_port = MLXSW_PORT_DONT_CARE,
2656 .trap_id = MLXSW_TRAP_ID_ARPBC,
2657 },
2658 {
2659 .func = mlxsw_sp_rx_listener_func,
2660 .local_port = MLXSW_PORT_DONT_CARE,
2661 .trap_id = MLXSW_TRAP_ID_ARPUC,
2662 },
2663 {
2664 .func = mlxsw_sp_rx_listener_func,
2665 .local_port = MLXSW_PORT_DONT_CARE,
2666 .trap_id = MLXSW_TRAP_ID_IP2ME,
2667 },
2668 {
2669 .func = mlxsw_sp_rx_listener_func,
2670 .local_port = MLXSW_PORT_DONT_CARE,
2671 .trap_id = MLXSW_TRAP_ID_RTR_INGRESS0,
2672 },
2673 {
2674 .func = mlxsw_sp_rx_listener_func,
2675 .local_port = MLXSW_PORT_DONT_CARE,
2676 .trap_id = MLXSW_TRAP_ID_HOST_MISS_IPV4,
2677 },
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002678};
2679
2680static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2681{
2682 char htgt_pl[MLXSW_REG_HTGT_LEN];
2683 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2684 int i;
2685 int err;
2686
2687 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2688 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2689 if (err)
2690 return err;
2691
2692 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2693 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2694 if (err)
2695 return err;
2696
2697 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2698 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2699 &mlxsw_sp_rx_listener[i],
2700 mlxsw_sp);
2701 if (err)
2702 goto err_rx_listener_register;
2703
2704 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,
2705 mlxsw_sp_rx_listener[i].trap_id);
2706 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2707 if (err)
2708 goto err_rx_trap_set;
2709 }
2710 return 0;
2711
2712err_rx_trap_set:
2713 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2714 &mlxsw_sp_rx_listener[i],
2715 mlxsw_sp);
2716err_rx_listener_register:
2717 for (i--; i >= 0; i--) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002718 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002719 mlxsw_sp_rx_listener[i].trap_id);
2720 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2721
2722 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2723 &mlxsw_sp_rx_listener[i],
2724 mlxsw_sp);
2725 }
2726 return err;
2727}
2728
2729static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2730{
2731 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2732 int i;
2733
2734 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
Ido Schimmel10f00aa2016-07-02 11:00:19 +02002735 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002736 mlxsw_sp_rx_listener[i].trap_id);
2737 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2738
2739 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2740 &mlxsw_sp_rx_listener[i],
2741 mlxsw_sp);
2742 }
2743}
2744
2745static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2746 enum mlxsw_reg_sfgc_type type,
2747 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2748{
2749 enum mlxsw_flood_table_type table_type;
2750 enum mlxsw_sp_flood_table flood_table;
2751 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2752
Ido Schimmel19ae6122015-12-15 16:03:39 +01002753 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002754 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002755 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002756 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002757
2758 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2759 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2760 else
2761 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002762
2763 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2764 flood_table);
2765 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2766}
2767
2768static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2769{
2770 int type, err;
2771
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002772 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2773 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2774 continue;
2775
2776 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2777 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2778 if (err)
2779 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002780
2781 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2782 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2783 if (err)
2784 return err;
2785 }
2786
2787 return 0;
2788}
2789
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002790static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2791{
2792 char slcr_pl[MLXSW_REG_SLCR_LEN];
2793
2794 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2795 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2796 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2797 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2798 MLXSW_REG_SLCR_LAG_HASH_SIP |
2799 MLXSW_REG_SLCR_LAG_HASH_DIP |
2800 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2801 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2802 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
2803 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2804}
2805
Jiri Pirkob2f10572016-04-08 19:11:23 +02002806static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002807 const struct mlxsw_bus_info *mlxsw_bus_info)
2808{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002809 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002810 int err;
2811
2812 mlxsw_sp->core = mlxsw_core;
2813 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02002814 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002815 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01002816 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002817
2818 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2819 if (err) {
2820 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2821 return err;
2822 }
2823
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002824 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2825 if (err) {
2826 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002827 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002828 }
2829
2830 err = mlxsw_sp_traps_init(mlxsw_sp);
2831 if (err) {
2832 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2833 goto err_rx_listener_register;
2834 }
2835
2836 err = mlxsw_sp_flood_init(mlxsw_sp);
2837 if (err) {
2838 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2839 goto err_flood_init;
2840 }
2841
2842 err = mlxsw_sp_buffers_init(mlxsw_sp);
2843 if (err) {
2844 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2845 goto err_buffers_init;
2846 }
2847
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002848 err = mlxsw_sp_lag_init(mlxsw_sp);
2849 if (err) {
2850 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2851 goto err_lag_init;
2852 }
2853
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002854 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2855 if (err) {
2856 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2857 goto err_switchdev_init;
2858 }
2859
Ido Schimmel464dce12016-07-02 11:00:15 +02002860 err = mlxsw_sp_router_init(mlxsw_sp);
2861 if (err) {
2862 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2863 goto err_router_init;
2864 }
2865
Yotam Gigi763b4b72016-07-21 12:03:17 +02002866 err = mlxsw_sp_span_init(mlxsw_sp);
2867 if (err) {
2868 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
2869 goto err_span_init;
2870 }
2871
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002872 err = mlxsw_sp_ports_create(mlxsw_sp);
2873 if (err) {
2874 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2875 goto err_ports_create;
2876 }
2877
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002878 return 0;
2879
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002880err_ports_create:
Yotam Gigi763b4b72016-07-21 12:03:17 +02002881 mlxsw_sp_span_fini(mlxsw_sp);
2882err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02002883 mlxsw_sp_router_fini(mlxsw_sp);
2884err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002885 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002886err_switchdev_init:
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002887err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02002888 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002889err_buffers_init:
2890err_flood_init:
2891 mlxsw_sp_traps_fini(mlxsw_sp);
2892err_rx_listener_register:
2893 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002894 return err;
2895}
2896
Jiri Pirkob2f10572016-04-08 19:11:23 +02002897static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002898{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002899 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002900 int i;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002901
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002902 mlxsw_sp_ports_remove(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002903 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02002904 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002905 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02002906 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002907 mlxsw_sp_traps_fini(mlxsw_sp);
2908 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02002909 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02002910 WARN_ON(!list_empty(&mlxsw_sp->fids));
Ido Schimmelfa3054f2016-07-02 11:00:16 +02002911 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
2912 WARN_ON_ONCE(mlxsw_sp->rifs[i]);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002913}
2914
2915static struct mlxsw_config_profile mlxsw_sp_config_profile = {
2916 .used_max_vepa_channels = 1,
2917 .max_vepa_channels = 0,
2918 .used_max_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002919 .max_lag = MLXSW_SP_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002920 .used_max_port_per_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002921 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002922 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01002923 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002924 .used_max_pgt = 1,
2925 .max_pgt = 0,
2926 .used_max_system_port = 1,
2927 .max_system_port = 64,
2928 .used_max_vlan_groups = 1,
2929 .max_vlan_groups = 127,
2930 .used_max_regions = 1,
2931 .max_regions = 400,
2932 .used_flood_tables = 1,
2933 .used_flood_mode = 1,
2934 .flood_mode = 3,
2935 .max_fid_offset_flood_tables = 2,
2936 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01002937 .max_fid_flood_tables = 2,
2938 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002939 .used_max_ib_mc = 1,
2940 .max_ib_mc = 0,
2941 .used_max_pkey = 1,
2942 .max_pkey = 0,
Jiri Pirkoc6022422016-07-05 11:27:46 +02002943 .used_kvd_sizes = 1,
2944 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
2945 .kvd_hash_single_size = MLXSW_SP_KVD_HASH_SINGLE_SIZE,
2946 .kvd_hash_double_size = MLXSW_SP_KVD_HASH_DOUBLE_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002947 .swid_config = {
2948 {
2949 .used_type = 1,
2950 .type = MLXSW_PORT_SWID_TYPE_ETH,
2951 }
2952 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02002953 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002954};
2955
2956static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko2d0ed392016-04-14 18:19:30 +02002957 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
2958 .owner = THIS_MODULE,
2959 .priv_size = sizeof(struct mlxsw_sp),
2960 .init = mlxsw_sp_init,
2961 .fini = mlxsw_sp_fini,
2962 .port_split = mlxsw_sp_port_split,
2963 .port_unsplit = mlxsw_sp_port_unsplit,
2964 .sb_pool_get = mlxsw_sp_sb_pool_get,
2965 .sb_pool_set = mlxsw_sp_sb_pool_set,
2966 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
2967 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
2968 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
2969 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
2970 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
2971 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
2972 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
2973 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
2974 .txhdr_construct = mlxsw_sp_txhdr_construct,
2975 .txhdr_len = MLXSW_TXHDR_LEN,
2976 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002977};
2978
Jiri Pirko7ce856a2016-07-04 08:23:12 +02002979static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
2980{
2981 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
2982}
2983
2984static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
2985{
2986 struct net_device *lower_dev;
2987 struct list_head *iter;
2988
2989 if (mlxsw_sp_port_dev_check(dev))
2990 return netdev_priv(dev);
2991
2992 netdev_for_each_all_lower_dev(dev, lower_dev, iter) {
2993 if (mlxsw_sp_port_dev_check(lower_dev))
2994 return netdev_priv(lower_dev);
2995 }
2996 return NULL;
2997}
2998
2999static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3000{
3001 struct mlxsw_sp_port *mlxsw_sp_port;
3002
3003 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3004 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3005}
3006
3007static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3008{
3009 struct net_device *lower_dev;
3010 struct list_head *iter;
3011
3012 if (mlxsw_sp_port_dev_check(dev))
3013 return netdev_priv(dev);
3014
3015 netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) {
3016 if (mlxsw_sp_port_dev_check(lower_dev))
3017 return netdev_priv(lower_dev);
3018 }
3019 return NULL;
3020}
3021
3022struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3023{
3024 struct mlxsw_sp_port *mlxsw_sp_port;
3025
3026 rcu_read_lock();
3027 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3028 if (mlxsw_sp_port)
3029 dev_hold(mlxsw_sp_port->dev);
3030 rcu_read_unlock();
3031 return mlxsw_sp_port;
3032}
3033
3034void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3035{
3036 dev_put(mlxsw_sp_port->dev);
3037}
3038
Ido Schimmel99724c12016-07-04 08:23:14 +02003039static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3040 unsigned long event)
3041{
3042 switch (event) {
3043 case NETDEV_UP:
3044 if (!r)
3045 return true;
3046 r->ref_count++;
3047 return false;
3048 case NETDEV_DOWN:
3049 if (r && --r->ref_count == 0)
3050 return true;
3051 /* It is possible we already removed the RIF ourselves
3052 * if it was assigned to a netdev that is now a bridge
3053 * or LAG slave.
3054 */
3055 return false;
3056 }
3057
3058 return false;
3059}
3060
3061static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3062{
3063 int i;
3064
3065 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
3066 if (!mlxsw_sp->rifs[i])
3067 return i;
3068
3069 return MLXSW_SP_RIF_MAX;
3070}
3071
3072static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3073 bool *p_lagged, u16 *p_system_port)
3074{
3075 u8 local_port = mlxsw_sp_vport->local_port;
3076
3077 *p_lagged = mlxsw_sp_vport->lagged;
3078 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3079}
3080
3081static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3082 struct net_device *l3_dev, u16 rif,
3083 bool create)
3084{
3085 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3086 bool lagged = mlxsw_sp_vport->lagged;
3087 char ritr_pl[MLXSW_REG_RITR_LEN];
3088 u16 system_port;
3089
3090 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3091 l3_dev->mtu, l3_dev->dev_addr);
3092
3093 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3094 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3095 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3096
3097 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3098}
3099
3100static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3101
3102static struct mlxsw_sp_fid *
3103mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3104{
3105 struct mlxsw_sp_fid *f;
3106
3107 f = kzalloc(sizeof(*f), GFP_KERNEL);
3108 if (!f)
3109 return NULL;
3110
3111 f->leave = mlxsw_sp_vport_rif_sp_leave;
3112 f->ref_count = 0;
3113 f->dev = l3_dev;
3114 f->fid = fid;
3115
3116 return f;
3117}
3118
3119static struct mlxsw_sp_rif *
3120mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3121{
3122 struct mlxsw_sp_rif *r;
3123
3124 r = kzalloc(sizeof(*r), GFP_KERNEL);
3125 if (!r)
3126 return NULL;
3127
3128 ether_addr_copy(r->addr, l3_dev->dev_addr);
3129 r->mtu = l3_dev->mtu;
3130 r->ref_count = 1;
3131 r->dev = l3_dev;
3132 r->rif = rif;
3133 r->f = f;
3134
3135 return r;
3136}
3137
3138static struct mlxsw_sp_rif *
3139mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3140 struct net_device *l3_dev)
3141{
3142 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3143 struct mlxsw_sp_fid *f;
3144 struct mlxsw_sp_rif *r;
3145 u16 fid, rif;
3146 int err;
3147
3148 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3149 if (rif == MLXSW_SP_RIF_MAX)
3150 return ERR_PTR(-ERANGE);
3151
3152 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3153 if (err)
3154 return ERR_PTR(err);
3155
3156 fid = mlxsw_sp_rif_sp_to_fid(rif);
3157 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3158 if (err)
3159 goto err_rif_fdb_op;
3160
3161 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3162 if (!f) {
3163 err = -ENOMEM;
3164 goto err_rfid_alloc;
3165 }
3166
3167 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3168 if (!r) {
3169 err = -ENOMEM;
3170 goto err_rif_alloc;
3171 }
3172
3173 f->r = r;
3174 mlxsw_sp->rifs[rif] = r;
3175
3176 return r;
3177
3178err_rif_alloc:
3179 kfree(f);
3180err_rfid_alloc:
3181 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3182err_rif_fdb_op:
3183 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3184 return ERR_PTR(err);
3185}
3186
3187static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3188 struct mlxsw_sp_rif *r)
3189{
3190 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3191 struct net_device *l3_dev = r->dev;
3192 struct mlxsw_sp_fid *f = r->f;
3193 u16 fid = f->fid;
3194 u16 rif = r->rif;
3195
3196 mlxsw_sp->rifs[rif] = NULL;
3197 f->r = NULL;
3198
3199 kfree(r);
3200
3201 kfree(f);
3202
3203 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3204
3205 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3206}
3207
3208static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3209 struct net_device *l3_dev)
3210{
3211 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3212 struct mlxsw_sp_rif *r;
3213
3214 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3215 if (!r) {
3216 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3217 if (IS_ERR(r))
3218 return PTR_ERR(r);
3219 }
3220
3221 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3222 r->f->ref_count++;
3223
3224 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3225
3226 return 0;
3227}
3228
3229static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3230{
3231 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3232
3233 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3234
3235 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3236 if (--f->ref_count == 0)
3237 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3238}
3239
3240static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3241 struct net_device *port_dev,
3242 unsigned long event, u16 vid)
3243{
3244 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3245 struct mlxsw_sp_port *mlxsw_sp_vport;
3246
3247 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3248 if (WARN_ON(!mlxsw_sp_vport))
3249 return -EINVAL;
3250
3251 switch (event) {
3252 case NETDEV_UP:
3253 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3254 case NETDEV_DOWN:
3255 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3256 break;
3257 }
3258
3259 return 0;
3260}
3261
3262static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3263 unsigned long event)
3264{
3265 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3266 return 0;
3267
3268 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3269}
3270
3271static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3272 struct net_device *lag_dev,
3273 unsigned long event, u16 vid)
3274{
3275 struct net_device *port_dev;
3276 struct list_head *iter;
3277 int err;
3278
3279 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3280 if (mlxsw_sp_port_dev_check(port_dev)) {
3281 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3282 event, vid);
3283 if (err)
3284 return err;
3285 }
3286 }
3287
3288 return 0;
3289}
3290
3291static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3292 unsigned long event)
3293{
3294 if (netif_is_bridge_port(lag_dev))
3295 return 0;
3296
3297 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3298}
3299
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003300static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3301 struct net_device *l3_dev)
3302{
3303 u16 fid;
3304
3305 if (is_vlan_dev(l3_dev))
3306 fid = vlan_dev_vlan_id(l3_dev);
3307 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3308 fid = 1;
3309 else
3310 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3311
3312 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3313}
3314
3315static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3316{
3317 if (mlxsw_sp_fid_is_vfid(fid))
3318 return MLXSW_REG_RITR_FID_IF;
3319 else
3320 return MLXSW_REG_RITR_VLAN_IF;
3321}
3322
3323static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3324 struct net_device *l3_dev,
3325 u16 fid, u16 rif,
3326 bool create)
3327{
3328 enum mlxsw_reg_ritr_if_type rif_type;
3329 char ritr_pl[MLXSW_REG_RITR_LEN];
3330
3331 rif_type = mlxsw_sp_rif_type_get(fid);
3332 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3333 l3_dev->dev_addr);
3334 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3335
3336 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3337}
3338
3339static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3340 struct net_device *l3_dev,
3341 struct mlxsw_sp_fid *f)
3342{
3343 struct mlxsw_sp_rif *r;
3344 u16 rif;
3345 int err;
3346
3347 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3348 if (rif == MLXSW_SP_RIF_MAX)
3349 return -ERANGE;
3350
3351 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3352 if (err)
3353 return err;
3354
3355 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3356 if (err)
3357 goto err_rif_fdb_op;
3358
3359 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3360 if (!r) {
3361 err = -ENOMEM;
3362 goto err_rif_alloc;
3363 }
3364
3365 f->r = r;
3366 mlxsw_sp->rifs[rif] = r;
3367
3368 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3369
3370 return 0;
3371
3372err_rif_alloc:
3373 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3374err_rif_fdb_op:
3375 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3376 return err;
3377}
3378
3379void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3380 struct mlxsw_sp_rif *r)
3381{
3382 struct net_device *l3_dev = r->dev;
3383 struct mlxsw_sp_fid *f = r->f;
3384 u16 rif = r->rif;
3385
3386 mlxsw_sp->rifs[rif] = NULL;
3387 f->r = NULL;
3388
3389 kfree(r);
3390
3391 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3392
3393 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3394
3395 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3396}
3397
3398static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3399 struct net_device *br_dev,
3400 unsigned long event)
3401{
3402 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3403 struct mlxsw_sp_fid *f;
3404
3405 /* FID can either be an actual FID if the L3 device is the
3406 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3407 * L3 device is a VLAN-unaware bridge and we get a vFID.
3408 */
3409 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3410 if (WARN_ON(!f))
3411 return -EINVAL;
3412
3413 switch (event) {
3414 case NETDEV_UP:
3415 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3416 case NETDEV_DOWN:
3417 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3418 break;
3419 }
3420
3421 return 0;
3422}
3423
Ido Schimmel99724c12016-07-04 08:23:14 +02003424static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3425 unsigned long event)
3426{
3427 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003428 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003429 u16 vid = vlan_dev_vlan_id(vlan_dev);
3430
3431 if (mlxsw_sp_port_dev_check(real_dev))
3432 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3433 vid);
3434 else if (netif_is_lag_master(real_dev))
3435 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3436 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003437 else if (netif_is_bridge_master(real_dev) &&
3438 mlxsw_sp->master_bridge.dev == real_dev)
3439 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3440 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003441
3442 return 0;
3443}
3444
3445static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3446 unsigned long event, void *ptr)
3447{
3448 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3449 struct net_device *dev = ifa->ifa_dev->dev;
3450 struct mlxsw_sp *mlxsw_sp;
3451 struct mlxsw_sp_rif *r;
3452 int err = 0;
3453
3454 mlxsw_sp = mlxsw_sp_lower_get(dev);
3455 if (!mlxsw_sp)
3456 goto out;
3457
3458 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3459 if (!mlxsw_sp_rif_should_config(r, event))
3460 goto out;
3461
3462 if (mlxsw_sp_port_dev_check(dev))
3463 err = mlxsw_sp_inetaddr_port_event(dev, event);
3464 else if (netif_is_lag_master(dev))
3465 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003466 else if (netif_is_bridge_master(dev))
3467 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003468 else if (is_vlan_dev(dev))
3469 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3470
3471out:
3472 return notifier_from_errno(err);
3473}
3474
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003475static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3476 const char *mac, int mtu)
3477{
3478 char ritr_pl[MLXSW_REG_RITR_LEN];
3479 int err;
3480
3481 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3482 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3483 if (err)
3484 return err;
3485
3486 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3487 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3488 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3489 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3490}
3491
3492static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3493{
3494 struct mlxsw_sp *mlxsw_sp;
3495 struct mlxsw_sp_rif *r;
3496 int err;
3497
3498 mlxsw_sp = mlxsw_sp_lower_get(dev);
3499 if (!mlxsw_sp)
3500 return 0;
3501
3502 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3503 if (!r)
3504 return 0;
3505
3506 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3507 if (err)
3508 return err;
3509
3510 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3511 if (err)
3512 goto err_rif_edit;
3513
3514 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3515 if (err)
3516 goto err_rif_fdb_op;
3517
3518 ether_addr_copy(r->addr, dev->dev_addr);
3519 r->mtu = dev->mtu;
3520
3521 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3522
3523 return 0;
3524
3525err_rif_fdb_op:
3526 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3527err_rif_edit:
3528 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3529 return err;
3530}
3531
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003532static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3533 u16 fid)
3534{
3535 if (mlxsw_sp_fid_is_vfid(fid))
3536 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3537 else
3538 return test_bit(fid, lag_port->active_vlans);
3539}
3540
3541static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3542 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003543{
3544 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003545 u8 local_port = mlxsw_sp_port->local_port;
3546 u16 lag_id = mlxsw_sp_port->lag_id;
3547 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003548
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003549 if (!mlxsw_sp_port->lagged)
3550 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003551
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003552 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3553 struct mlxsw_sp_port *lag_port;
3554
3555 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3556 if (!lag_port || lag_port->local_port == local_port)
3557 continue;
3558 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3559 count++;
3560 }
3561
3562 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003563}
3564
3565static int
3566mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3567 u16 fid)
3568{
3569 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3570 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3571
3572 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3573 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3574 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3575 mlxsw_sp_port->local_port);
3576
Ido Schimmel22305372016-06-20 23:04:21 +02003577 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3578 mlxsw_sp_port->local_port, fid);
3579
Ido Schimmel039c49a2016-01-27 15:20:18 +01003580 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3581}
3582
3583static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003584mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3585 u16 fid)
3586{
3587 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3588 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3589
3590 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3591 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3592 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3593
Ido Schimmel22305372016-06-20 23:04:21 +02003594 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3595 mlxsw_sp_port->lag_id, fid);
3596
Ido Schimmel039c49a2016-01-27 15:20:18 +01003597 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3598}
3599
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003600int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003601{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003602 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3603 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003604
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003605 if (mlxsw_sp_port->lagged)
3606 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003607 fid);
3608 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003609 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003610}
3611
Ido Schimmel701b1862016-07-04 08:23:16 +02003612static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3613{
3614 struct mlxsw_sp_fid *f, *tmp;
3615
3616 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3617 if (--f->ref_count == 0)
3618 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3619 else
3620 WARN_ON_ONCE(1);
3621}
3622
Ido Schimmel7117a572016-06-20 23:04:06 +02003623static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3624 struct net_device *br_dev)
3625{
3626 return !mlxsw_sp->master_bridge.dev ||
3627 mlxsw_sp->master_bridge.dev == br_dev;
3628}
3629
3630static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3631 struct net_device *br_dev)
3632{
3633 mlxsw_sp->master_bridge.dev = br_dev;
3634 mlxsw_sp->master_bridge.ref_count++;
3635}
3636
3637static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3638{
Ido Schimmel701b1862016-07-04 08:23:16 +02003639 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003640 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003641 /* It's possible upper VLAN devices are still holding
3642 * references to underlying FIDs. Drop the reference
3643 * and release the resources if it was the last one.
3644 * If it wasn't, then something bad happened.
3645 */
3646 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3647 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003648}
3649
3650static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3651 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003652{
3653 struct net_device *dev = mlxsw_sp_port->dev;
3654 int err;
3655
3656 /* When port is not bridged untagged packets are tagged with
3657 * PVID=VID=1, thereby creating an implicit VLAN interface in
3658 * the device. Remove it and let bridge code take care of its
3659 * own VLANs.
3660 */
3661 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003662 if (err)
3663 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003664
Ido Schimmel7117a572016-06-20 23:04:06 +02003665 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3666
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003667 mlxsw_sp_port->learning = 1;
3668 mlxsw_sp_port->learning_sync = 1;
3669 mlxsw_sp_port->uc_flood = 1;
3670 mlxsw_sp_port->bridged = 1;
3671
3672 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003673}
3674
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003675static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003676{
3677 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003678
Ido Schimmel28a01d22016-02-18 11:30:02 +01003679 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3680
Ido Schimmel7117a572016-06-20 23:04:06 +02003681 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3682
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003683 mlxsw_sp_port->learning = 0;
3684 mlxsw_sp_port->learning_sync = 0;
3685 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003686 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003687
3688 /* Add implicit VLAN interface in the device, so that untagged
3689 * packets will be classified to the default vFID.
3690 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003691 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003692}
3693
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003694static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003695{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003696 char sldr_pl[MLXSW_REG_SLDR_LEN];
3697
3698 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3699 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3700}
3701
3702static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3703{
3704 char sldr_pl[MLXSW_REG_SLDR_LEN];
3705
3706 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3707 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3708}
3709
3710static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3711 u16 lag_id, u8 port_index)
3712{
3713 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3714 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3715
3716 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3717 lag_id, port_index);
3718 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3719}
3720
3721static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3722 u16 lag_id)
3723{
3724 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3725 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3726
3727 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3728 lag_id);
3729 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3730}
3731
3732static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3733 u16 lag_id)
3734{
3735 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3736 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3737
3738 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3739 lag_id);
3740 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3741}
3742
3743static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3744 u16 lag_id)
3745{
3746 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3747 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3748
3749 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3750 lag_id);
3751 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3752}
3753
3754static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3755 struct net_device *lag_dev,
3756 u16 *p_lag_id)
3757{
3758 struct mlxsw_sp_upper *lag;
3759 int free_lag_id = -1;
3760 int i;
3761
3762 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
3763 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3764 if (lag->ref_count) {
3765 if (lag->dev == lag_dev) {
3766 *p_lag_id = i;
3767 return 0;
3768 }
3769 } else if (free_lag_id < 0) {
3770 free_lag_id = i;
3771 }
3772 }
3773 if (free_lag_id < 0)
3774 return -EBUSY;
3775 *p_lag_id = free_lag_id;
3776 return 0;
3777}
3778
3779static bool
3780mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3781 struct net_device *lag_dev,
3782 struct netdev_lag_upper_info *lag_upper_info)
3783{
3784 u16 lag_id;
3785
3786 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3787 return false;
3788 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3789 return false;
3790 return true;
3791}
3792
3793static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3794 u16 lag_id, u8 *p_port_index)
3795{
3796 int i;
3797
3798 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3799 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3800 *p_port_index = i;
3801 return 0;
3802 }
3803 }
3804 return -EBUSY;
3805}
3806
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003807static void
3808mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3809 u16 lag_id)
3810{
3811 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003812 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003813
3814 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3815 if (WARN_ON(!mlxsw_sp_vport))
3816 return;
3817
Ido Schimmel11943ff2016-07-02 11:00:12 +02003818 /* If vPort is assigned a RIF, then leave it since it's no
3819 * longer valid.
3820 */
3821 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3822 if (f)
3823 f->leave(mlxsw_sp_vport);
3824
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003825 mlxsw_sp_vport->lag_id = lag_id;
3826 mlxsw_sp_vport->lagged = 1;
3827}
3828
3829static void
3830mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3831{
3832 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02003833 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003834
3835 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3836 if (WARN_ON(!mlxsw_sp_vport))
3837 return;
3838
Ido Schimmel11943ff2016-07-02 11:00:12 +02003839 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3840 if (f)
3841 f->leave(mlxsw_sp_vport);
3842
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003843 mlxsw_sp_vport->lagged = 0;
3844}
3845
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003846static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3847 struct net_device *lag_dev)
3848{
3849 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3850 struct mlxsw_sp_upper *lag;
3851 u16 lag_id;
3852 u8 port_index;
3853 int err;
3854
3855 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
3856 if (err)
3857 return err;
3858 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3859 if (!lag->ref_count) {
3860 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
3861 if (err)
3862 return err;
3863 lag->dev = lag_dev;
3864 }
3865
3866 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
3867 if (err)
3868 return err;
3869 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
3870 if (err)
3871 goto err_col_port_add;
3872 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
3873 if (err)
3874 goto err_col_port_enable;
3875
3876 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
3877 mlxsw_sp_port->local_port);
3878 mlxsw_sp_port->lag_id = lag_id;
3879 mlxsw_sp_port->lagged = 1;
3880 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003881
3882 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
3883
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003884 return 0;
3885
Ido Schimmel51554db2016-05-06 22:18:39 +02003886err_col_port_enable:
3887 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003888err_col_port_add:
3889 if (!lag->ref_count)
3890 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003891 return err;
3892}
3893
Ido Schimmel82e6db02016-06-20 23:04:04 +02003894static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
3895 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003896{
3897 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003898 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02003899 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003900
3901 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003902 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003903 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3904 WARN_ON(lag->ref_count == 0);
3905
Ido Schimmel82e6db02016-06-20 23:04:04 +02003906 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
3907 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003908
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003909 if (mlxsw_sp_port->bridged) {
3910 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003911 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01003912 }
3913
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003914 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02003915 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003916
3917 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
3918 mlxsw_sp_port->local_port);
3919 mlxsw_sp_port->lagged = 0;
3920 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02003921
3922 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003923}
3924
Jiri Pirko74581202015-12-03 12:12:30 +01003925static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3926 u16 lag_id)
3927{
3928 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3929 char sldr_pl[MLXSW_REG_SLDR_LEN];
3930
3931 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
3932 mlxsw_sp_port->local_port);
3933 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3934}
3935
3936static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3937 u16 lag_id)
3938{
3939 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3940 char sldr_pl[MLXSW_REG_SLDR_LEN];
3941
3942 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
3943 mlxsw_sp_port->local_port);
3944 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3945}
3946
3947static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
3948 bool lag_tx_enabled)
3949{
3950 if (lag_tx_enabled)
3951 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
3952 mlxsw_sp_port->lag_id);
3953 else
3954 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
3955 mlxsw_sp_port->lag_id);
3956}
3957
3958static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
3959 struct netdev_lag_lower_state_info *info)
3960{
3961 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
3962}
3963
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003964static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
3965 struct net_device *vlan_dev)
3966{
3967 struct mlxsw_sp_port *mlxsw_sp_vport;
3968 u16 vid = vlan_dev_vlan_id(vlan_dev);
3969
3970 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02003971 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003972 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003973
3974 mlxsw_sp_vport->dev = vlan_dev;
3975
3976 return 0;
3977}
3978
Ido Schimmel82e6db02016-06-20 23:04:04 +02003979static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
3980 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003981{
3982 struct mlxsw_sp_port *mlxsw_sp_vport;
3983 u16 vid = vlan_dev_vlan_id(vlan_dev);
3984
3985 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02003986 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02003987 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003988
3989 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01003990}
3991
Jiri Pirko74581202015-12-03 12:12:30 +01003992static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
3993 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003994{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003995 struct netdev_notifier_changeupper_info *info;
3996 struct mlxsw_sp_port *mlxsw_sp_port;
3997 struct net_device *upper_dev;
3998 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02003999 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004000
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004001 mlxsw_sp_port = netdev_priv(dev);
4002 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4003 info = ptr;
4004
4005 switch (event) {
4006 case NETDEV_PRECHANGEUPPER:
4007 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004008 if (!is_vlan_dev(upper_dev) &&
4009 !netif_is_lag_master(upper_dev) &&
4010 !netif_is_bridge_master(upper_dev))
4011 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004012 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004013 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004014 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004015 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004016 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004017 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004018 if (netif_is_lag_master(upper_dev) &&
4019 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4020 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004021 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004022 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4023 return -EINVAL;
4024 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4025 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4026 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004027 break;
4028 case NETDEV_CHANGEUPPER:
4029 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004030 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004031 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004032 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4033 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004034 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004035 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4036 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004037 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004038 if (info->linking)
4039 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4040 upper_dev);
4041 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004042 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004043 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004044 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004045 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4046 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004047 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004048 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4049 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004050 } else {
4051 err = -EINVAL;
4052 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004053 }
4054 break;
4055 }
4056
Ido Schimmel80bedf12016-06-20 23:03:59 +02004057 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004058}
4059
Jiri Pirko74581202015-12-03 12:12:30 +01004060static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4061 unsigned long event, void *ptr)
4062{
4063 struct netdev_notifier_changelowerstate_info *info;
4064 struct mlxsw_sp_port *mlxsw_sp_port;
4065 int err;
4066
4067 mlxsw_sp_port = netdev_priv(dev);
4068 info = ptr;
4069
4070 switch (event) {
4071 case NETDEV_CHANGELOWERSTATE:
4072 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4073 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4074 info->lower_state_info);
4075 if (err)
4076 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4077 }
4078 break;
4079 }
4080
Ido Schimmel80bedf12016-06-20 23:03:59 +02004081 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004082}
4083
4084static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4085 unsigned long event, void *ptr)
4086{
4087 switch (event) {
4088 case NETDEV_PRECHANGEUPPER:
4089 case NETDEV_CHANGEUPPER:
4090 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4091 case NETDEV_CHANGELOWERSTATE:
4092 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4093 }
4094
Ido Schimmel80bedf12016-06-20 23:03:59 +02004095 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004096}
4097
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004098static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4099 unsigned long event, void *ptr)
4100{
4101 struct net_device *dev;
4102 struct list_head *iter;
4103 int ret;
4104
4105 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4106 if (mlxsw_sp_port_dev_check(dev)) {
4107 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004108 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004109 return ret;
4110 }
4111 }
4112
Ido Schimmel80bedf12016-06-20 23:03:59 +02004113 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004114}
4115
Ido Schimmel701b1862016-07-04 08:23:16 +02004116static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4117 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004118{
Ido Schimmel701b1862016-07-04 08:23:16 +02004119 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004120 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004121
Ido Schimmel701b1862016-07-04 08:23:16 +02004122 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4123 if (!f) {
4124 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4125 if (IS_ERR(f))
4126 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004127 }
4128
Ido Schimmel701b1862016-07-04 08:23:16 +02004129 f->ref_count++;
4130
4131 return 0;
4132}
4133
4134static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4135 struct net_device *vlan_dev)
4136{
4137 u16 fid = vlan_dev_vlan_id(vlan_dev);
4138 struct mlxsw_sp_fid *f;
4139
4140 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004141 if (f && f->r)
4142 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004143 if (f && --f->ref_count == 0)
4144 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4145}
4146
4147static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4148 unsigned long event, void *ptr)
4149{
4150 struct netdev_notifier_changeupper_info *info;
4151 struct net_device *upper_dev;
4152 struct mlxsw_sp *mlxsw_sp;
4153 int err;
4154
4155 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4156 if (!mlxsw_sp)
4157 return 0;
4158 if (br_dev != mlxsw_sp->master_bridge.dev)
4159 return 0;
4160
4161 info = ptr;
4162
4163 switch (event) {
4164 case NETDEV_CHANGEUPPER:
4165 upper_dev = info->upper_dev;
4166 if (!is_vlan_dev(upper_dev))
4167 break;
4168 if (info->linking) {
4169 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4170 upper_dev);
4171 if (err)
4172 return err;
4173 } else {
4174 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4175 }
4176 break;
4177 }
4178
4179 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004180}
4181
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004182static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004183{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004184 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004185 MLXSW_SP_VFID_MAX);
4186}
4187
4188static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4189{
4190 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4191
4192 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4193 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004194}
4195
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004196static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004197
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004198static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4199 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004200{
4201 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004202 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004203 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004204 int err;
4205
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004206 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004207 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004208 dev_err(dev, "No available vFIDs\n");
4209 return ERR_PTR(-ERANGE);
4210 }
4211
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004212 fid = mlxsw_sp_vfid_to_fid(vfid);
4213 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004214 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004215 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004216 return ERR_PTR(err);
4217 }
4218
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004219 f = kzalloc(sizeof(*f), GFP_KERNEL);
4220 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004221 goto err_allocate_vfid;
4222
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004223 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004224 f->fid = fid;
4225 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004226
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004227 list_add(&f->list, &mlxsw_sp->vfids.list);
4228 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004229
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004230 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004231
4232err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004233 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004234 return ERR_PTR(-ENOMEM);
4235}
4236
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004237static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4238 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004239{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004240 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004241 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004242
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004243 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004244 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004245
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004246 if (f->r)
4247 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004248
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004249 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004250
4251 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004252}
4253
Ido Schimmel99724c12016-07-04 08:23:14 +02004254static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4255 bool valid)
4256{
4257 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4258 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4259
4260 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4261 vid);
4262}
4263
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004264static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4265 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004266{
Ido Schimmel0355b592016-06-20 23:04:13 +02004267 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004268 int err;
4269
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004270 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004271 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004272 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004273 if (IS_ERR(f))
4274 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004275 }
4276
Ido Schimmel0355b592016-06-20 23:04:13 +02004277 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4278 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004279 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004280
Ido Schimmel0355b592016-06-20 23:04:13 +02004281 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4282 if (err)
4283 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004284
Ido Schimmel41b996c2016-06-20 23:04:17 +02004285 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004286 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004287
Ido Schimmel22305372016-06-20 23:04:21 +02004288 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4289
Ido Schimmel0355b592016-06-20 23:04:13 +02004290 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004291
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004292err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004293 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4294err_vport_flood_set:
4295 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004296 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004297 return err;
4298}
4299
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004300static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004301{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004302 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004303
Ido Schimmel22305372016-06-20 23:04:21 +02004304 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4305
Ido Schimmel0355b592016-06-20 23:04:13 +02004306 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4307
4308 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4309
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004310 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4311
Ido Schimmel41b996c2016-06-20 23:04:17 +02004312 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004313 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004314 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004315}
4316
4317static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4318 struct net_device *br_dev)
4319{
Ido Schimmel99724c12016-07-04 08:23:14 +02004320 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004321 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4322 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004323 int err;
4324
Ido Schimmel99724c12016-07-04 08:23:14 +02004325 if (f && !WARN_ON(!f->leave))
4326 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004327
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004328 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004329 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004330 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004331 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004332 }
4333
4334 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4335 if (err) {
4336 netdev_err(dev, "Failed to enable learning\n");
4337 goto err_port_vid_learning_set;
4338 }
4339
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004340 mlxsw_sp_vport->learning = 1;
4341 mlxsw_sp_vport->learning_sync = 1;
4342 mlxsw_sp_vport->uc_flood = 1;
4343 mlxsw_sp_vport->bridged = 1;
4344
4345 return 0;
4346
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004347err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004348 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004349 return err;
4350}
4351
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004352static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004353{
4354 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004355
4356 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4357
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004358 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004359
Ido Schimmel0355b592016-06-20 23:04:13 +02004360 mlxsw_sp_vport->learning = 0;
4361 mlxsw_sp_vport->learning_sync = 0;
4362 mlxsw_sp_vport->uc_flood = 0;
4363 mlxsw_sp_vport->bridged = 0;
4364}
4365
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004366static bool
4367mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4368 const struct net_device *br_dev)
4369{
4370 struct mlxsw_sp_port *mlxsw_sp_vport;
4371
4372 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4373 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004374 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004375
4376 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004377 return false;
4378 }
4379
4380 return true;
4381}
4382
4383static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4384 unsigned long event, void *ptr,
4385 u16 vid)
4386{
4387 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4388 struct netdev_notifier_changeupper_info *info = ptr;
4389 struct mlxsw_sp_port *mlxsw_sp_vport;
4390 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004391 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004392
4393 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4394
4395 switch (event) {
4396 case NETDEV_PRECHANGEUPPER:
4397 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004398 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004399 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004400 if (!info->linking)
4401 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004402 /* We can't have multiple VLAN interfaces configured on
4403 * the same port and being members in the same bridge.
4404 */
4405 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4406 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004407 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004408 break;
4409 case NETDEV_CHANGEUPPER:
4410 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004411 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004412 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004413 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004414 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4415 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004416 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004417 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004418 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004419 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004420 }
4421 }
4422
Ido Schimmel80bedf12016-06-20 23:03:59 +02004423 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004424}
4425
Ido Schimmel272c4472015-12-15 16:03:47 +01004426static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4427 unsigned long event, void *ptr,
4428 u16 vid)
4429{
4430 struct net_device *dev;
4431 struct list_head *iter;
4432 int ret;
4433
4434 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4435 if (mlxsw_sp_port_dev_check(dev)) {
4436 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4437 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004438 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004439 return ret;
4440 }
4441 }
4442
Ido Schimmel80bedf12016-06-20 23:03:59 +02004443 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004444}
4445
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004446static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4447 unsigned long event, void *ptr)
4448{
4449 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4450 u16 vid = vlan_dev_vlan_id(vlan_dev);
4451
Ido Schimmel272c4472015-12-15 16:03:47 +01004452 if (mlxsw_sp_port_dev_check(real_dev))
4453 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4454 vid);
4455 else if (netif_is_lag_master(real_dev))
4456 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4457 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004458
Ido Schimmel80bedf12016-06-20 23:03:59 +02004459 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004460}
4461
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004462static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4463 unsigned long event, void *ptr)
4464{
4465 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004466 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004467
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004468 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4469 err = mlxsw_sp_netdevice_router_port_event(dev);
4470 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004471 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4472 else if (netif_is_lag_master(dev))
4473 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004474 else if (netif_is_bridge_master(dev))
4475 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004476 else if (is_vlan_dev(dev))
4477 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004478
Ido Schimmel80bedf12016-06-20 23:03:59 +02004479 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004480}
4481
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004482static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4483 .notifier_call = mlxsw_sp_netdevice_event,
4484};
4485
Ido Schimmel99724c12016-07-04 08:23:14 +02004486static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4487 .notifier_call = mlxsw_sp_inetaddr_event,
4488 .priority = 10, /* Must be called before FIB notifier block */
4489};
4490
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004491static int __init mlxsw_sp_module_init(void)
4492{
4493 int err;
4494
4495 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004496 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004497 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4498 if (err)
4499 goto err_core_driver_register;
4500 return 0;
4501
4502err_core_driver_register:
4503 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4504 return err;
4505}
4506
4507static void __exit mlxsw_sp_module_exit(void)
4508{
4509 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Ido Schimmel99724c12016-07-04 08:23:14 +02004510 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004511 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4512}
4513
4514module_init(mlxsw_sp_module_init);
4515module_exit(mlxsw_sp_module_exit);
4516
4517MODULE_LICENSE("Dual BSD/GPL");
4518MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4519MODULE_DESCRIPTION("Mellanox Spectrum driver");
4520MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);