blob: 1f4fdce7efa48977c0633016d4ac5cc3199df27f [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
Jiri Pirko1d20d232016-10-27 15:12:59 +020040#include <linux/pci.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020041#include <linux/netdevice.h>
42#include <linux/etherdevice.h>
43#include <linux/ethtool.h>
44#include <linux/slab.h>
45#include <linux/device.h>
46#include <linux/skbuff.h>
47#include <linux/if_vlan.h>
48#include <linux/if_bridge.h>
49#include <linux/workqueue.h>
50#include <linux/jiffies.h>
51#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010052#include <linux/list.h>
Ido Schimmel80bedf12016-06-20 23:03:59 +020053#include <linux/notifier.h>
Ido Schimmel90183b92016-04-06 17:10:08 +020054#include <linux/dcbnl.h>
Ido Schimmel99724c12016-07-04 08:23:14 +020055#include <linux/inetdevice.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020056#include <net/switchdev.h>
Yotam Gigi763b4b72016-07-21 12:03:17 +020057#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
Jiri Pirkoe7322632016-09-01 10:37:43 +020059#include <net/netevent.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020060
61#include "spectrum.h"
Jiri Pirko1d20d232016-10-27 15:12:59 +020062#include "pci.h"
Jiri Pirko56ade8f2015-10-16 14:01:37 +020063#include "core.h"
64#include "reg.h"
65#include "port.h"
66#include "trap.h"
67#include "txheader.h"
68
69static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
70static const char mlxsw_sp_driver_version[] = "1.0";
71
72/* tx_hdr_version
73 * Tx header version.
74 * Must be set to 1.
75 */
76MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
77
78/* tx_hdr_ctl
79 * Packet control type.
80 * 0 - Ethernet control (e.g. EMADs, LACP)
81 * 1 - Ethernet data
82 */
83MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
84
85/* tx_hdr_proto
86 * Packet protocol type. Must be set to 1 (Ethernet).
87 */
88MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
89
90/* tx_hdr_rx_is_router
91 * Packet is sent from the router. Valid for data packets only.
92 */
93MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
94
95/* tx_hdr_fid_valid
96 * Indicates if the 'fid' field is valid and should be used for
97 * forwarding lookup. Valid for data packets only.
98 */
99MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
100
101/* tx_hdr_swid
102 * Switch partition ID. Must be set to 0.
103 */
104MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
105
106/* tx_hdr_control_tclass
107 * Indicates if the packet should use the control TClass and not one
108 * of the data TClasses.
109 */
110MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
111
112/* tx_hdr_etclass
113 * Egress TClass to be used on the egress device on the egress port.
114 */
115MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
116
117/* tx_hdr_port_mid
118 * Destination local port for unicast packets.
119 * Destination multicast ID for multicast packets.
120 *
121 * Control packets are directed to a specific egress port, while data
122 * packets are transmitted through the CPU port (0) into the switch partition,
123 * where forwarding rules are applied.
124 */
125MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
126
127/* tx_hdr_fid
128 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
129 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
130 * Valid for data packets only.
131 */
132MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
133
134/* tx_hdr_type
135 * 0 - Data packets
136 * 6 - Control packets
137 */
138MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
139
Yotam Gigi763b4b72016-07-21 12:03:17 +0200140static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
141
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200142static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
143 const struct mlxsw_tx_info *tx_info)
144{
145 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
146
147 memset(txhdr, 0, MLXSW_TXHDR_LEN);
148
149 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
150 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
151 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
152 mlxsw_tx_hdr_swid_set(txhdr, 0);
153 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
154 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
155 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
156}
157
158static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
159{
Elad Raz5b090742016-10-28 21:35:46 +0200160 char spad_pl[MLXSW_REG_SPAD_LEN] = {0};
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200161 int err;
162
163 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
164 if (err)
165 return err;
166 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
167 return 0;
168}
169
Yotam Gigi763b4b72016-07-21 12:03:17 +0200170static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
171{
Yotam Gigi763b4b72016-07-21 12:03:17 +0200172 int i;
173
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200174 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_SPAN))
Yotam Gigi763b4b72016-07-21 12:03:17 +0200175 return -EIO;
176
Jiri Pirkoc1a38312016-10-21 16:07:23 +0200177 mlxsw_sp->span.entries_count = MLXSW_CORE_RES_GET(mlxsw_sp->core,
178 MAX_SPAN);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200179 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
180 sizeof(struct mlxsw_sp_span_entry),
181 GFP_KERNEL);
182 if (!mlxsw_sp->span.entries)
183 return -ENOMEM;
184
185 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
186 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
187
188 return 0;
189}
190
191static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
192{
193 int i;
194
195 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
196 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
197
198 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
199 }
200 kfree(mlxsw_sp->span.entries);
201}
202
203static struct mlxsw_sp_span_entry *
204mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
205{
206 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
207 struct mlxsw_sp_span_entry *span_entry;
208 char mpat_pl[MLXSW_REG_MPAT_LEN];
209 u8 local_port = port->local_port;
210 int index;
211 int i;
212 int err;
213
214 /* find a free entry to use */
215 index = -1;
216 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
217 if (!mlxsw_sp->span.entries[i].used) {
218 index = i;
219 span_entry = &mlxsw_sp->span.entries[i];
220 break;
221 }
222 }
223 if (index < 0)
224 return NULL;
225
226 /* create a new port analayzer entry for local_port */
227 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
228 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
229 if (err)
230 return NULL;
231
232 span_entry->used = true;
233 span_entry->id = index;
Yotam Gigi2d644d42016-11-11 16:34:25 +0100234 span_entry->ref_count = 1;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200235 span_entry->local_port = local_port;
236 return span_entry;
237}
238
239static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
240 struct mlxsw_sp_span_entry *span_entry)
241{
242 u8 local_port = span_entry->local_port;
243 char mpat_pl[MLXSW_REG_MPAT_LEN];
244 int pa_id = span_entry->id;
245
246 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
247 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
248 span_entry->used = false;
249}
250
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200251static struct mlxsw_sp_span_entry *
252mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200253{
254 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
255 int i;
256
257 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
258 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
259
260 if (curr->used && curr->local_port == port->local_port)
261 return curr;
262 }
263 return NULL;
264}
265
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200266static struct mlxsw_sp_span_entry
267*mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
Yotam Gigi763b4b72016-07-21 12:03:17 +0200268{
269 struct mlxsw_sp_span_entry *span_entry;
270
271 span_entry = mlxsw_sp_span_entry_find(port);
272 if (span_entry) {
Yotam Gigi2d644d42016-11-11 16:34:25 +0100273 /* Already exists, just take a reference */
Yotam Gigi763b4b72016-07-21 12:03:17 +0200274 span_entry->ref_count++;
275 return span_entry;
276 }
277
278 return mlxsw_sp_span_entry_create(port);
279}
280
281static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
282 struct mlxsw_sp_span_entry *span_entry)
283{
Yotam Gigi2d644d42016-11-11 16:34:25 +0100284 WARN_ON(!span_entry->ref_count);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200285 if (--span_entry->ref_count == 0)
286 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
287 return 0;
288}
289
290static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
291{
292 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
293 struct mlxsw_sp_span_inspected_port *p;
294 int i;
295
296 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
297 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
298
299 list_for_each_entry(p, &curr->bound_ports_list, list)
300 if (p->local_port == port->local_port &&
301 p->type == MLXSW_SP_SPAN_EGRESS)
302 return true;
303 }
304
305 return false;
306}
307
308static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
309{
310 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
311}
312
313static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
314{
315 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
316 char sbib_pl[MLXSW_REG_SBIB_LEN];
317 int err;
318
319 /* If port is egress mirrored, the shared buffer size should be
320 * updated according to the mtu value
321 */
322 if (mlxsw_sp_span_is_egress_mirror(port)) {
323 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
324 mlxsw_sp_span_mtu_to_buffsize(mtu));
325 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
326 if (err) {
327 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
328 return err;
329 }
330 }
331
332 return 0;
333}
334
335static struct mlxsw_sp_span_inspected_port *
336mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
337 struct mlxsw_sp_span_entry *span_entry)
338{
339 struct mlxsw_sp_span_inspected_port *p;
340
341 list_for_each_entry(p, &span_entry->bound_ports_list, list)
342 if (port->local_port == p->local_port)
343 return p;
344 return NULL;
345}
346
347static int
348mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
349 struct mlxsw_sp_span_entry *span_entry,
350 enum mlxsw_sp_span_type type)
351{
352 struct mlxsw_sp_span_inspected_port *inspected_port;
353 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
354 char mpar_pl[MLXSW_REG_MPAR_LEN];
355 char sbib_pl[MLXSW_REG_SBIB_LEN];
356 int pa_id = span_entry->id;
357 int err;
358
359 /* if it is an egress SPAN, bind a shared buffer to it */
360 if (type == MLXSW_SP_SPAN_EGRESS) {
361 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
362 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
363 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
364 if (err) {
365 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
366 return err;
367 }
368 }
369
370 /* bind the port to the SPAN entry */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200371 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
372 (enum mlxsw_reg_mpar_i_e) type, true, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200373 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
374 if (err)
375 goto err_mpar_reg_write;
376
377 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
378 if (!inspected_port) {
379 err = -ENOMEM;
380 goto err_inspected_port_alloc;
381 }
382 inspected_port->local_port = port->local_port;
383 inspected_port->type = type;
384 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
385
386 return 0;
387
388err_mpar_reg_write:
389err_inspected_port_alloc:
390 if (type == MLXSW_SP_SPAN_EGRESS) {
391 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
392 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
393 }
394 return err;
395}
396
397static void
398mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
399 struct mlxsw_sp_span_entry *span_entry,
400 enum mlxsw_sp_span_type type)
401{
402 struct mlxsw_sp_span_inspected_port *inspected_port;
403 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
404 char mpar_pl[MLXSW_REG_MPAR_LEN];
405 char sbib_pl[MLXSW_REG_SBIB_LEN];
406 int pa_id = span_entry->id;
407
408 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
409 if (!inspected_port)
410 return;
411
412 /* remove the inspected port */
Ido Schimmel1a9234e662016-09-19 08:29:26 +0200413 mlxsw_reg_mpar_pack(mpar_pl, port->local_port,
414 (enum mlxsw_reg_mpar_i_e) type, false, pa_id);
Yotam Gigi763b4b72016-07-21 12:03:17 +0200415 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
416
417 /* remove the SBIB buffer if it was egress SPAN */
418 if (type == MLXSW_SP_SPAN_EGRESS) {
419 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
420 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
421 }
422
423 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
424
425 list_del(&inspected_port->list);
426 kfree(inspected_port);
427}
428
429static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
430 struct mlxsw_sp_port *to,
431 enum mlxsw_sp_span_type type)
432{
433 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
434 struct mlxsw_sp_span_entry *span_entry;
435 int err;
436
437 span_entry = mlxsw_sp_span_entry_get(to);
438 if (!span_entry)
439 return -ENOENT;
440
441 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
442 span_entry->id);
443
444 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
445 if (err)
446 goto err_port_bind;
447
448 return 0;
449
450err_port_bind:
451 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
452 return err;
453}
454
455static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
456 struct mlxsw_sp_port *to,
457 enum mlxsw_sp_span_type type)
458{
459 struct mlxsw_sp_span_entry *span_entry;
460
461 span_entry = mlxsw_sp_span_entry_find(to);
462 if (!span_entry) {
463 netdev_err(from->dev, "no span entry found\n");
464 return;
465 }
466
467 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
468 span_entry->id);
469 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
470}
471
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200472static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
473 bool is_up)
474{
475 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
476 char paos_pl[MLXSW_REG_PAOS_LEN];
477
478 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
479 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
480 MLXSW_PORT_ADMIN_STATUS_DOWN);
481 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
482}
483
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200484static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
485 unsigned char *addr)
486{
487 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
488 char ppad_pl[MLXSW_REG_PPAD_LEN];
489
490 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
491 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
492 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
493}
494
495static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
496{
497 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
498 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
499
500 ether_addr_copy(addr, mlxsw_sp->base_mac);
501 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
502 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
503}
504
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200505static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
506{
507 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
508 char pmtu_pl[MLXSW_REG_PMTU_LEN];
509 int max_mtu;
510 int err;
511
512 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
513 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
514 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
515 if (err)
516 return err;
517 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
518
519 if (mtu > max_mtu)
520 return -EINVAL;
521
522 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
523 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
524}
525
Ido Schimmelbe945352016-06-09 09:51:39 +0200526static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
527 u8 swid)
528{
529 char pspa_pl[MLXSW_REG_PSPA_LEN];
530
531 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
532 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
533}
534
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200535static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
536{
537 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200538
Ido Schimmelbe945352016-06-09 09:51:39 +0200539 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
540 swid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200541}
542
543static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
544 bool enable)
545{
546 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
547 char svpe_pl[MLXSW_REG_SVPE_LEN];
548
549 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
550 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
551}
552
553int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
554 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
555 u16 vid)
556{
557 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
558 char svfa_pl[MLXSW_REG_SVFA_LEN];
559
560 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
561 fid, vid);
562 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
563}
564
Ido Schimmel584d73d2016-08-24 12:00:26 +0200565int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
566 u16 vid_begin, u16 vid_end,
567 bool learn_enable)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200568{
569 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
570 char *spvmlr_pl;
571 int err;
572
573 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
574 if (!spvmlr_pl)
575 return -ENOMEM;
Ido Schimmel584d73d2016-08-24 12:00:26 +0200576 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
577 vid_end, learn_enable);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200578 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
579 kfree(spvmlr_pl);
580 return err;
581}
582
Ido Schimmel584d73d2016-08-24 12:00:26 +0200583static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
584 u16 vid, bool learn_enable)
585{
586 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
587 learn_enable);
588}
589
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200590static int
591mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
592{
593 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
594 char sspr_pl[MLXSW_REG_SSPR_LEN];
595
596 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
597 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
598}
599
Ido Schimmeld664b412016-06-09 09:51:40 +0200600static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
601 u8 local_port, u8 *p_module,
602 u8 *p_width, u8 *p_lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200603{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200604 char pmlp_pl[MLXSW_REG_PMLP_LEN];
605 int err;
606
Ido Schimmel558c2d52016-02-26 17:32:29 +0100607 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200608 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
609 if (err)
610 return err;
Ido Schimmel558c2d52016-02-26 17:32:29 +0100611 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
612 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
Ido Schimmel2bf9a582016-04-05 10:20:04 +0200613 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200614 return 0;
615}
616
Ido Schimmel18f1e702016-02-26 17:32:31 +0100617static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
618 u8 module, u8 width, u8 lane)
619{
620 char pmlp_pl[MLXSW_REG_PMLP_LEN];
621 int i;
622
623 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
624 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
625 for (i = 0; i < width; i++) {
626 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
627 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
628 }
629
630 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
631}
632
Ido Schimmel3e9b27b2016-02-26 17:32:28 +0100633static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
634{
635 char pmlp_pl[MLXSW_REG_PMLP_LEN];
636
637 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
638 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
639 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
640}
641
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200642static int mlxsw_sp_port_open(struct net_device *dev)
643{
644 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
645 int err;
646
647 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
648 if (err)
649 return err;
650 netif_start_queue(dev);
651 return 0;
652}
653
654static int mlxsw_sp_port_stop(struct net_device *dev)
655{
656 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
657
658 netif_stop_queue(dev);
659 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
660}
661
662static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
663 struct net_device *dev)
664{
665 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
666 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
667 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
668 const struct mlxsw_tx_info tx_info = {
669 .local_port = mlxsw_sp_port->local_port,
670 .is_emad = false,
671 };
672 u64 len;
673 int err;
674
Jiri Pirko307c2432016-04-08 19:11:22 +0200675 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200676 return NETDEV_TX_BUSY;
677
678 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
679 struct sk_buff *skb_orig = skb;
680
681 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
682 if (!skb) {
683 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
684 dev_kfree_skb_any(skb_orig);
685 return NETDEV_TX_OK;
686 }
687 }
688
689 if (eth_skb_pad(skb)) {
690 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
691 return NETDEV_TX_OK;
692 }
693
694 mlxsw_sp_txhdr_construct(skb, &tx_info);
Nogah Frankel63dcdd32016-06-17 15:09:05 +0200695 /* TX header is consumed by HW on the way so we shouldn't count its
696 * bytes as being sent.
697 */
698 len = skb->len - MLXSW_TXHDR_LEN;
699
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200700 /* Due to a race we might fail here because of a full queue. In that
701 * unlikely case we simply drop the packet.
702 */
Jiri Pirko307c2432016-04-08 19:11:22 +0200703 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200704
705 if (!err) {
706 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
707 u64_stats_update_begin(&pcpu_stats->syncp);
708 pcpu_stats->tx_packets++;
709 pcpu_stats->tx_bytes += len;
710 u64_stats_update_end(&pcpu_stats->syncp);
711 } else {
712 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
713 dev_kfree_skb_any(skb);
714 }
715 return NETDEV_TX_OK;
716}
717
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100718static void mlxsw_sp_set_rx_mode(struct net_device *dev)
719{
720}
721
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200722static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
723{
724 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
725 struct sockaddr *addr = p;
726 int err;
727
728 if (!is_valid_ether_addr(addr->sa_data))
729 return -EADDRNOTAVAIL;
730
731 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
732 if (err)
733 return err;
734 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
735 return 0;
736}
737
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200738static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200739 bool pause_en, bool pfc_en, u16 delay)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200740{
741 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
742
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200743 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
744 MLXSW_SP_PAUSE_DELAY;
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200745
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200746 if (pause_en || pfc_en)
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200747 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200748 pg_size + delay, pg_size);
749 else
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200750 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200751}
752
753int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200754 u8 *prio_tc, bool pause_en,
755 struct ieee_pfc *my_pfc)
Ido Schimmelff6551e2016-04-06 17:10:03 +0200756{
757 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200758 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
759 u16 delay = !!my_pfc ? my_pfc->delay : 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200760 char pbmc_pl[MLXSW_REG_PBMC_LEN];
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200761 int i, j, err;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200762
763 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
764 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
765 if (err)
766 return err;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200767
768 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
769 bool configure = false;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200770 bool pfc = false;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200771
772 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
773 if (prio_tc[j] == i) {
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200774 pfc = pfc_en & BIT(j);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200775 configure = true;
776 break;
777 }
778 }
779
780 if (!configure)
781 continue;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200782 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200783 }
784
Ido Schimmelff6551e2016-04-06 17:10:03 +0200785 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
786}
787
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200788static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200789 int mtu, bool pause_en)
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200790{
791 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
792 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200793 struct ieee_pfc *my_pfc;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200794 u8 *prio_tc;
795
796 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200797 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200798
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200799 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
Ido Schimmeld81a6bd2016-04-06 17:10:16 +0200800 pause_en, my_pfc);
Ido Schimmel8e8dfe92016-04-06 17:10:10 +0200801}
802
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200803static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
804{
805 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200806 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200807 int err;
808
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200809 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200810 if (err)
811 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +0200812 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
813 if (err)
814 goto err_span_port_mtu_update;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200815 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
816 if (err)
817 goto err_port_mtu_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200818 dev->mtu = mtu;
819 return 0;
Ido Schimmelff6551e2016-04-06 17:10:03 +0200820
821err_port_mtu_set:
Yotam Gigi763b4b72016-07-21 12:03:17 +0200822 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
823err_span_port_mtu_update:
Ido Schimmel9f7ec052016-04-06 17:10:14 +0200824 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
Ido Schimmelff6551e2016-04-06 17:10:03 +0200825 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200826}
827
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300828static int
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200829mlxsw_sp_port_get_sw_stats64(const struct net_device *dev,
830 struct rtnl_link_stats64 *stats)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200831{
832 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
833 struct mlxsw_sp_port_pcpu_stats *p;
834 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
835 u32 tx_dropped = 0;
836 unsigned int start;
837 int i;
838
839 for_each_possible_cpu(i) {
840 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
841 do {
842 start = u64_stats_fetch_begin_irq(&p->syncp);
843 rx_packets = p->rx_packets;
844 rx_bytes = p->rx_bytes;
845 tx_packets = p->tx_packets;
846 tx_bytes = p->tx_bytes;
847 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
848
849 stats->rx_packets += rx_packets;
850 stats->rx_bytes += rx_bytes;
851 stats->tx_packets += tx_packets;
852 stats->tx_bytes += tx_bytes;
853 /* tx_dropped is u32, updated without syncp protection. */
854 tx_dropped += p->tx_dropped;
855 }
856 stats->tx_dropped = tx_dropped;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200857 return 0;
858}
859
Or Gerlitz3df5b3c2016-11-22 23:09:54 +0200860static bool mlxsw_sp_port_has_offload_stats(const struct net_device *dev, int attr_id)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200861{
862 switch (attr_id) {
863 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
864 return true;
865 }
866
867 return false;
868}
869
Or Gerlitz4bdcc6c2016-09-20 08:14:08 +0300870static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev,
871 void *sp)
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200872{
873 switch (attr_id) {
874 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
875 return mlxsw_sp_port_get_sw_stats64(dev, sp);
876 }
877
878 return -EINVAL;
879}
880
881static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
882 int prio, char *ppcnt_pl)
883{
884 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
885 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
886
887 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
888 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
889}
890
891static int mlxsw_sp_port_get_hw_stats(struct net_device *dev,
892 struct rtnl_link_stats64 *stats)
893{
894 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
895 int err;
896
897 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT,
898 0, ppcnt_pl);
899 if (err)
900 goto out;
901
902 stats->tx_packets =
903 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl);
904 stats->rx_packets =
905 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl);
906 stats->tx_bytes =
907 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl);
908 stats->rx_bytes =
909 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl);
910 stats->multicast =
911 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl);
912
913 stats->rx_crc_errors =
914 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl);
915 stats->rx_frame_errors =
916 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl);
917
918 stats->rx_length_errors = (
919 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) +
920 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) +
921 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl));
922
923 stats->rx_errors = (stats->rx_crc_errors +
924 stats->rx_frame_errors + stats->rx_length_errors);
925
926out:
927 return err;
928}
929
930static void update_stats_cache(struct work_struct *work)
931{
932 struct mlxsw_sp_port *mlxsw_sp_port =
933 container_of(work, struct mlxsw_sp_port,
934 hw_stats.update_dw.work);
935
936 if (!netif_carrier_ok(mlxsw_sp_port->dev))
937 goto out;
938
939 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev,
940 mlxsw_sp_port->hw_stats.cache);
941
942out:
943 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw,
944 MLXSW_HW_STATS_UPDATE_TIME);
945}
946
947/* Return the stats from a cache that is updated periodically,
948 * as this function might get called in an atomic context.
949 */
stephen hemmingerbc1f4472017-01-06 19:12:52 -0800950static void
Nogah Frankelfc1bbb02016-09-16 15:05:38 +0200951mlxsw_sp_port_get_stats64(struct net_device *dev,
952 struct rtnl_link_stats64 *stats)
953{
954 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
955
956 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats));
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200957}
958
959int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
960 u16 vid_end, bool is_member, bool untagged)
961{
962 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
963 char *spvm_pl;
964 int err;
965
966 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
967 if (!spvm_pl)
968 return -ENOMEM;
969
970 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
971 vid_end, is_member, untagged);
972 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
973 kfree(spvm_pl);
974 return err;
975}
976
977static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
978{
979 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
980 u16 vid, last_visited_vid;
981 int err;
982
983 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
984 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
985 vid);
986 if (err) {
987 last_visited_vid = vid;
988 goto err_port_vid_to_fid_set;
989 }
990 }
991
992 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
993 if (err) {
994 last_visited_vid = VLAN_N_VID;
995 goto err_port_vid_to_fid_set;
996 }
997
998 return 0;
999
1000err_port_vid_to_fid_set:
1001 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
1002 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
1003 vid);
1004 return err;
1005}
1006
1007static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
1008{
1009 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
1010 u16 vid;
1011 int err;
1012
1013 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
1014 if (err)
1015 return err;
1016
1017 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1018 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
1019 vid, vid);
1020 if (err)
1021 return err;
1022 }
1023
1024 return 0;
1025}
1026
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001027static struct mlxsw_sp_port *
Ido Schimmel0355b592016-06-20 23:04:13 +02001028mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001029{
1030 struct mlxsw_sp_port *mlxsw_sp_vport;
1031
1032 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
1033 if (!mlxsw_sp_vport)
1034 return NULL;
1035
1036 /* dev will be set correctly after the VLAN device is linked
1037 * with the real device. In case of bridge SELF invocation, dev
1038 * will remain as is.
1039 */
1040 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
1041 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1042 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
1043 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
Ido Schimmel272c4472015-12-15 16:03:47 +01001044 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
1045 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel0355b592016-06-20 23:04:13 +02001046 mlxsw_sp_vport->vport.vid = vid;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001047
1048 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
1049
1050 return mlxsw_sp_vport;
1051}
1052
1053static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
1054{
1055 list_del(&mlxsw_sp_vport->vport.list);
1056 kfree(mlxsw_sp_vport);
1057}
1058
Ido Schimmel05978482016-08-17 16:39:30 +02001059static int mlxsw_sp_port_add_vid(struct net_device *dev,
1060 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001061{
1062 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001063 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel52697a92016-07-02 11:00:09 +02001064 bool untagged = vid == 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001065 int err;
1066
1067 /* VLAN 0 is added to HW filter when device goes up, but it is
1068 * reserved in our case, so simply return.
1069 */
1070 if (!vid)
1071 return 0;
1072
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001073 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001074 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001075
Ido Schimmel0355b592016-06-20 23:04:13 +02001076 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001077 if (!mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02001078 return -ENOMEM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001079
1080 /* When adding the first VLAN interface on a bridged port we need to
1081 * transition all the active 802.1Q bridge VLANs to use explicit
1082 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
1083 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001084 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001085 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001086 if (err)
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001087 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001088 }
1089
Ido Schimmel52697a92016-07-02 11:00:09 +02001090 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
Ido Schimmelfa66d7e2016-08-17 16:39:29 +02001091 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001092 goto err_port_add_vid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001093
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001094 return 0;
1095
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001096err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001097 if (list_is_singular(&mlxsw_sp_port->vports_list))
1098 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
1099err_port_vp_mode_trans:
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001100 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001101 return err;
1102}
1103
Ido Schimmel32d863f2016-07-02 11:00:10 +02001104static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1105 __be16 __always_unused proto, u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001106{
1107 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001108 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel1c800752016-06-20 23:04:20 +02001109 struct mlxsw_sp_fid *f;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001110
1111 /* VLAN 0 is removed from HW filter when device goes down, but
1112 * it is reserved in our case, so simply return.
1113 */
1114 if (!vid)
1115 return 0;
1116
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001117 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel7a355832016-08-17 16:39:28 +02001118 if (WARN_ON(!mlxsw_sp_vport))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001119 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001120
Ido Schimmel7a355832016-08-17 16:39:28 +02001121 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001122
Ido Schimmel1c800752016-06-20 23:04:20 +02001123 /* Drop FID reference. If this was the last reference the
1124 * resources will be freed.
1125 */
1126 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1127 if (f && !WARN_ON(!f->leave))
1128 f->leave(mlxsw_sp_vport);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001129
1130 /* When removing the last VLAN interface on a bridged port we need to
1131 * transition all active 802.1Q bridge VLANs to use VID to FID
1132 * mappings and set port's mode to VLAN mode.
1133 */
Ido Schimmel7a355832016-08-17 16:39:28 +02001134 if (list_is_singular(&mlxsw_sp_port->vports_list))
1135 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001136
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001137 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1138
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001139 return 0;
1140}
1141
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001142static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1143 size_t len)
1144{
1145 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmeld664b412016-06-09 09:51:40 +02001146 u8 module = mlxsw_sp_port->mapping.module;
1147 u8 width = mlxsw_sp_port->mapping.width;
1148 u8 lane = mlxsw_sp_port->mapping.lane;
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001149 int err;
1150
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001151 if (!mlxsw_sp_port->split)
1152 err = snprintf(name, len, "p%d", module + 1);
1153 else
1154 err = snprintf(name, len, "p%ds%d", module + 1,
1155 lane / width);
1156
1157 if (err >= len)
1158 return -EINVAL;
1159
1160 return 0;
1161}
1162
Yotam Gigi763b4b72016-07-21 12:03:17 +02001163static struct mlxsw_sp_port_mall_tc_entry *
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001164mlxsw_sp_port_mall_tc_entry_find(struct mlxsw_sp_port *port,
1165 unsigned long cookie) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001166 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1167
1168 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1169 if (mall_tc_entry->cookie == cookie)
1170 return mall_tc_entry;
1171
1172 return NULL;
1173}
1174
1175static int
1176mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001177 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001178 const struct tc_action *a,
1179 bool ingress)
1180{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001181 struct net *net = dev_net(mlxsw_sp_port->dev);
1182 enum mlxsw_sp_span_type span_type;
1183 struct mlxsw_sp_port *to_port;
1184 struct net_device *to_dev;
1185 int ifindex;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001186
1187 ifindex = tcf_mirred_ifindex(a);
1188 to_dev = __dev_get_by_index(net, ifindex);
1189 if (!to_dev) {
1190 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1191 return -EINVAL;
1192 }
1193
1194 if (!mlxsw_sp_port_dev_check(to_dev)) {
1195 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1196 return -ENOTSUPP;
1197 }
1198 to_port = netdev_priv(to_dev);
1199
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001200 mirror->to_local_port = to_port->local_port;
1201 mirror->ingress = ingress;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001202 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001203 return mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1204}
Yotam Gigi763b4b72016-07-21 12:03:17 +02001205
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001206static void
1207mlxsw_sp_port_del_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1208 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror)
1209{
1210 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1211 enum mlxsw_sp_span_type span_type;
1212 struct mlxsw_sp_port *to_port;
1213
1214 to_port = mlxsw_sp->ports[mirror->to_local_port];
1215 span_type = mirror->ingress ?
1216 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1217 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001218}
1219
1220static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1221 __be16 protocol,
1222 struct tc_cls_matchall_offload *cls,
1223 bool ingress)
1224{
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001225 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001226 const struct tc_action *a;
WANG Cong22dc13c2016-08-13 22:35:00 -07001227 LIST_HEAD(actions);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001228 int err;
1229
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001230 if (!tc_single_action(cls->exts)) {
Yotam Gigi763b4b72016-07-21 12:03:17 +02001231 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1232 return -ENOTSUPP;
1233 }
1234
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001235 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1236 if (!mall_tc_entry)
1237 return -ENOMEM;
1238 mall_tc_entry->cookie = cls->cookie;
Ido Schimmel86cb13e2016-07-25 13:12:33 +03001239
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001240 tcf_exts_to_list(cls->exts, &actions);
1241 a = list_first_entry(&actions, struct tc_action, list);
1242
1243 if (is_tcf_mirred_egress_mirror(a) && protocol == htons(ETH_P_ALL)) {
1244 struct mlxsw_sp_port_mall_mirror_tc_entry *mirror;
1245
1246 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1247 mirror = &mall_tc_entry->mirror;
1248 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port,
1249 mirror, a, ingress);
1250 } else {
1251 err = -EOPNOTSUPP;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001252 }
1253
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001254 if (err)
1255 goto err_add_action;
1256
1257 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001258 return 0;
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001259
1260err_add_action:
1261 kfree(mall_tc_entry);
1262 return err;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001263}
1264
1265static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1266 struct tc_cls_matchall_offload *cls)
1267{
Yotam Gigi763b4b72016-07-21 12:03:17 +02001268 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
Yotam Gigi763b4b72016-07-21 12:03:17 +02001269
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001270 mall_tc_entry = mlxsw_sp_port_mall_tc_entry_find(mlxsw_sp_port,
1271 cls->cookie);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001272 if (!mall_tc_entry) {
1273 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1274 return;
1275 }
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001276 list_del(&mall_tc_entry->list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001277
1278 switch (mall_tc_entry->type) {
1279 case MLXSW_SP_PORT_MALL_MIRROR:
Yotam Gigi65acb5d2017-01-09 11:25:46 +01001280 mlxsw_sp_port_del_cls_matchall_mirror(mlxsw_sp_port,
1281 &mall_tc_entry->mirror);
Yotam Gigi763b4b72016-07-21 12:03:17 +02001282 break;
1283 default:
1284 WARN_ON(1);
1285 }
1286
Yotam Gigi763b4b72016-07-21 12:03:17 +02001287 kfree(mall_tc_entry);
1288}
1289
1290static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1291 __be16 proto, struct tc_to_netdev *tc)
1292{
1293 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1294 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1295
1296 if (tc->type == TC_SETUP_MATCHALL) {
1297 switch (tc->cls_mall->command) {
1298 case TC_CLSMATCHALL_REPLACE:
1299 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1300 proto,
1301 tc->cls_mall,
1302 ingress);
1303 case TC_CLSMATCHALL_DESTROY:
1304 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1305 tc->cls_mall);
1306 return 0;
1307 default:
1308 return -EINVAL;
1309 }
1310 }
1311
1312 return -ENOTSUPP;
1313}
1314
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001315static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1316 .ndo_open = mlxsw_sp_port_open,
1317 .ndo_stop = mlxsw_sp_port_stop,
1318 .ndo_start_xmit = mlxsw_sp_port_xmit,
Yotam Gigi763b4b72016-07-21 12:03:17 +02001319 .ndo_setup_tc = mlxsw_sp_setup_tc,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +01001320 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001321 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1322 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1323 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001324 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats,
1325 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001326 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1327 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
Jiri Pirko6cf3c972016-07-05 11:27:39 +02001328 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1329 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001330 .ndo_fdb_add = switchdev_port_fdb_add,
1331 .ndo_fdb_del = switchdev_port_fdb_del,
1332 .ndo_fdb_dump = switchdev_port_fdb_dump,
1333 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1334 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1335 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
Ido Schimmel2bf9a582016-04-05 10:20:04 +02001336 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001337};
1338
1339static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1340 struct ethtool_drvinfo *drvinfo)
1341{
1342 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1343 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1344
1345 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1346 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1347 sizeof(drvinfo->version));
1348 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1349 "%d.%d.%d",
1350 mlxsw_sp->bus_info->fw_rev.major,
1351 mlxsw_sp->bus_info->fw_rev.minor,
1352 mlxsw_sp->bus_info->fw_rev.subminor);
1353 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1354 sizeof(drvinfo->bus_info));
1355}
1356
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001357static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1358 struct ethtool_pauseparam *pause)
1359{
1360 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1361
1362 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1363 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1364}
1365
1366static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1367 struct ethtool_pauseparam *pause)
1368{
1369 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1370
1371 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1372 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1373 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1374
1375 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1376 pfcc_pl);
1377}
1378
1379static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1380 struct ethtool_pauseparam *pause)
1381{
1382 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1383 bool pause_en = pause->tx_pause || pause->rx_pause;
1384 int err;
1385
Ido Schimmeld81a6bd2016-04-06 17:10:16 +02001386 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1387 netdev_err(dev, "PFC already enabled on port\n");
1388 return -EINVAL;
1389 }
1390
Ido Schimmel9f7ec052016-04-06 17:10:14 +02001391 if (pause->autoneg) {
1392 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1393 return -EINVAL;
1394 }
1395
1396 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1397 if (err) {
1398 netdev_err(dev, "Failed to configure port's headroom\n");
1399 return err;
1400 }
1401
1402 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1403 if (err) {
1404 netdev_err(dev, "Failed to set PAUSE parameters\n");
1405 goto err_port_pause_configure;
1406 }
1407
1408 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1409 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1410
1411 return 0;
1412
1413err_port_pause_configure:
1414 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1415 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1416 return err;
1417}
1418
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001419struct mlxsw_sp_port_hw_stats {
1420 char str[ETH_GSTRING_LEN];
Jiri Pirko412791d2016-10-21 16:07:19 +02001421 u64 (*getter)(const char *payload);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001422};
1423
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001424static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001425 {
1426 .str = "a_frames_transmitted_ok",
1427 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1428 },
1429 {
1430 .str = "a_frames_received_ok",
1431 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1432 },
1433 {
1434 .str = "a_frame_check_sequence_errors",
1435 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1436 },
1437 {
1438 .str = "a_alignment_errors",
1439 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1440 },
1441 {
1442 .str = "a_octets_transmitted_ok",
1443 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1444 },
1445 {
1446 .str = "a_octets_received_ok",
1447 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1448 },
1449 {
1450 .str = "a_multicast_frames_xmitted_ok",
1451 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1452 },
1453 {
1454 .str = "a_broadcast_frames_xmitted_ok",
1455 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1456 },
1457 {
1458 .str = "a_multicast_frames_received_ok",
1459 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1460 },
1461 {
1462 .str = "a_broadcast_frames_received_ok",
1463 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1464 },
1465 {
1466 .str = "a_in_range_length_errors",
1467 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1468 },
1469 {
1470 .str = "a_out_of_range_length_field",
1471 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1472 },
1473 {
1474 .str = "a_frame_too_long_errors",
1475 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1476 },
1477 {
1478 .str = "a_symbol_error_during_carrier",
1479 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1480 },
1481 {
1482 .str = "a_mac_control_frames_transmitted",
1483 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1484 },
1485 {
1486 .str = "a_mac_control_frames_received",
1487 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1488 },
1489 {
1490 .str = "a_unsupported_opcodes_received",
1491 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1492 },
1493 {
1494 .str = "a_pause_mac_ctrl_frames_received",
1495 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1496 },
1497 {
1498 .str = "a_pause_mac_ctrl_frames_xmitted",
1499 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1500 },
1501};
1502
1503#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1504
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001505static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1506 {
1507 .str = "rx_octets_prio",
1508 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1509 },
1510 {
1511 .str = "rx_frames_prio",
1512 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1513 },
1514 {
1515 .str = "tx_octets_prio",
1516 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1517 },
1518 {
1519 .str = "tx_frames_prio",
1520 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1521 },
1522 {
1523 .str = "rx_pause_prio",
1524 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1525 },
1526 {
1527 .str = "rx_pause_duration_prio",
1528 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1529 },
1530 {
1531 .str = "tx_pause_prio",
1532 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1533 },
1534 {
1535 .str = "tx_pause_duration_prio",
1536 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1537 },
1538};
1539
1540#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1541
Jiri Pirko412791d2016-10-21 16:07:19 +02001542static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(const char *ppcnt_pl)
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001543{
1544 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1545
1546 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1547}
1548
1549static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1550 {
1551 .str = "tc_transmit_queue_tc",
1552 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1553 },
1554 {
1555 .str = "tc_no_buffer_discard_uc_tc",
1556 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1557 },
1558};
1559
1560#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1561
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001562#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001563 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1564 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001565 IEEE_8021QAZ_MAX_TCS)
1566
1567static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1568{
1569 int i;
1570
1571 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1572 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1573 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1574 *p += ETH_GSTRING_LEN;
1575 }
1576}
1577
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001578static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1579{
1580 int i;
1581
1582 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1583 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1584 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1585 *p += ETH_GSTRING_LEN;
1586 }
1587}
1588
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001589static void mlxsw_sp_port_get_strings(struct net_device *dev,
1590 u32 stringset, u8 *data)
1591{
1592 u8 *p = data;
1593 int i;
1594
1595 switch (stringset) {
1596 case ETH_SS_STATS:
1597 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1598 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1599 ETH_GSTRING_LEN);
1600 p += ETH_GSTRING_LEN;
1601 }
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001602
1603 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1604 mlxsw_sp_port_get_prio_strings(&p, i);
1605
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001606 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1607 mlxsw_sp_port_get_tc_strings(&p, i);
1608
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001609 break;
1610 }
1611}
1612
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001613static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1614 enum ethtool_phys_id_state state)
1615{
1616 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1617 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1618 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1619 bool active;
1620
1621 switch (state) {
1622 case ETHTOOL_ID_ACTIVE:
1623 active = true;
1624 break;
1625 case ETHTOOL_ID_INACTIVE:
1626 active = false;
1627 break;
1628 default:
1629 return -EOPNOTSUPP;
1630 }
1631
1632 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1633 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1634}
1635
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001636static int
1637mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1638 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1639{
1640 switch (grp) {
1641 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1642 *p_hw_stats = mlxsw_sp_port_hw_stats;
1643 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1644 break;
1645 case MLXSW_REG_PPCNT_PRIO_CNT:
1646 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1647 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1648 break;
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001649 case MLXSW_REG_PPCNT_TC_CNT:
1650 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1651 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1652 break;
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001653 default:
1654 WARN_ON(1);
1655 return -ENOTSUPP;
1656 }
1657 return 0;
1658}
1659
1660static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1661 enum mlxsw_reg_ppcnt_grp grp, int prio,
1662 u64 *data, int data_index)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001663{
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001664 struct mlxsw_sp_port_hw_stats *hw_stats;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001665 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001666 int i, len;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001667 int err;
1668
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001669 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1670 if (err)
1671 return;
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02001672 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001673 for (i = 0; i < len; i++)
Colin Ian Kingfaac0ff2016-09-23 12:02:45 +01001674 data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001675}
1676
1677static void mlxsw_sp_port_get_stats(struct net_device *dev,
1678 struct ethtool_stats *stats, u64 *data)
1679{
1680 int i, data_index = 0;
1681
1682 /* IEEE 802.3 Counters */
1683 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1684 data, data_index);
1685 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1686
1687 /* Per-Priority Counters */
1688 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1689 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1690 data, data_index);
1691 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1692 }
Ido Schimmeldf4750e2016-07-19 15:35:54 +02001693
1694 /* Per-TC Counters */
1695 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1696 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1697 data, data_index);
1698 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1699 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001700}
1701
1702static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1703{
1704 switch (sset) {
1705 case ETH_SS_STATS:
Ido Schimmel7ed674b2016-07-19 15:35:53 +02001706 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001707 default:
1708 return -EOPNOTSUPP;
1709 }
1710}
1711
1712struct mlxsw_sp_port_link_mode {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001713 enum ethtool_link_mode_bit_indices mask_ethtool;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001714 u32 mask;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001715 u32 speed;
1716};
1717
1718static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1719 {
1720 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001721 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
1722 .speed = SPEED_100,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001723 },
1724 {
1725 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1726 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001727 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
1728 .speed = SPEED_1000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001729 },
1730 {
1731 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001732 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1733 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001734 },
1735 {
1736 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1737 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001738 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
1739 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001740 },
1741 {
1742 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1743 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1744 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1745 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001746 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
1747 .speed = SPEED_10000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001748 },
1749 {
1750 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001751 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
1752 .speed = SPEED_20000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001753 },
1754 {
1755 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001756 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
1757 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001758 },
1759 {
1760 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001761 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
1762 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001763 },
1764 {
1765 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001766 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
1767 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001768 },
1769 {
1770 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001771 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
1772 .speed = SPEED_40000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001773 },
1774 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001775 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
1776 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
1777 .speed = SPEED_25000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001778 },
1779 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001780 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
1781 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
1782 .speed = SPEED_25000,
1783 },
1784 {
1785 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1786 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1787 .speed = SPEED_25000,
1788 },
1789 {
1790 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1791 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
1792 .speed = SPEED_25000,
1793 },
1794 {
1795 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
1796 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
1797 .speed = SPEED_50000,
1798 },
1799 {
1800 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1801 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
1802 .speed = SPEED_50000,
1803 },
1804 {
1805 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
1806 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
1807 .speed = SPEED_50000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001808 },
1809 {
1810 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001811 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
1812 .speed = SPEED_56000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001813 },
1814 {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001815 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1816 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
1817 .speed = SPEED_56000,
1818 },
1819 {
1820 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1821 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
1822 .speed = SPEED_56000,
1823 },
1824 {
1825 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1826 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
1827 .speed = SPEED_56000,
1828 },
1829 {
1830 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
1831 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
1832 .speed = SPEED_100000,
1833 },
1834 {
1835 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
1836 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
1837 .speed = SPEED_100000,
1838 },
1839 {
1840 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
1841 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
1842 .speed = SPEED_100000,
1843 },
1844 {
1845 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1846 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
1847 .speed = SPEED_100000,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001848 },
1849};
1850
1851#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1852
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001853static void
1854mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
1855 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001856{
1857 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1858 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1859 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1860 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1861 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1862 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001863 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001864
1865 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1866 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1867 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1868 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1869 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001870 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001871}
1872
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001873static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001874{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001875 int i;
1876
1877 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1878 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001879 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1880 mode);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001881 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001882}
1883
1884static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001885 struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001886{
1887 u32 speed = SPEED_UNKNOWN;
1888 u8 duplex = DUPLEX_UNKNOWN;
1889 int i;
1890
1891 if (!carrier_ok)
1892 goto out;
1893
1894 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1895 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1896 speed = mlxsw_sp_port_link_mode[i].speed;
1897 duplex = DUPLEX_FULL;
1898 break;
1899 }
1900 }
1901out:
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001902 cmd->base.speed = speed;
1903 cmd->base.duplex = duplex;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001904}
1905
1906static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1907{
1908 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1909 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1910 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1911 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1912 return PORT_FIBRE;
1913
1914 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1915 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1916 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1917 return PORT_DA;
1918
1919 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1920 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1921 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1922 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1923 return PORT_NONE;
1924
1925 return PORT_OTHER;
1926}
1927
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001928static u32
1929mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001930{
1931 u32 ptys_proto = 0;
1932 int i;
1933
1934 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001935 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
1936 cmd->link_modes.advertising))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001937 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1938 }
1939 return ptys_proto;
1940}
1941
1942static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1943{
1944 u32 ptys_proto = 0;
1945 int i;
1946
1947 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1948 if (speed == mlxsw_sp_port_link_mode[i].speed)
1949 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1950 }
1951 return ptys_proto;
1952}
1953
Ido Schimmel18f1e702016-02-26 17:32:31 +01001954static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1955{
1956 u32 ptys_proto = 0;
1957 int i;
1958
1959 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1960 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1961 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1962 }
1963 return ptys_proto;
1964}
1965
Ido Schimmelb9d66a32016-09-12 13:26:27 +02001966static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
1967 struct ethtool_link_ksettings *cmd)
1968{
1969 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
1970 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
1971 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
1972
1973 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
1974 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
1975}
1976
1977static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
1978 struct ethtool_link_ksettings *cmd)
1979{
1980 if (!autoneg)
1981 return;
1982
1983 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
1984 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
1985}
1986
1987static void
1988mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
1989 struct ethtool_link_ksettings *cmd)
1990{
1991 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp)
1992 return;
1993
1994 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
1995 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
1996}
1997
1998static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
1999 struct ethtool_link_ksettings *cmd)
2000{
2001 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
2002 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2003 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2004 char ptys_pl[MLXSW_REG_PTYS_LEN];
2005 u8 autoneg_status;
2006 bool autoneg;
2007 int err;
2008
2009 autoneg = mlxsw_sp_port->link.autoneg;
Elad Raz401c8b42016-10-28 21:35:52 +02002010 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002011 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2012 if (err)
2013 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002014 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2015 &eth_proto_oper);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002016
2017 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2018
2019 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2020
2021 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2022 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2023 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2024
2025 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2026 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2027 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2028 cmd);
2029
2030 return 0;
2031}
2032
2033static int
2034mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2035 const struct ethtool_link_ksettings *cmd)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002036{
2037 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2038 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2039 char ptys_pl[MLXSW_REG_PTYS_LEN];
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002040 u32 eth_proto_cap, eth_proto_new;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002041 bool autoneg;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002042 int err;
2043
Elad Raz401c8b42016-10-28 21:35:52 +02002044 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002045 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002046 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002047 return err;
Elad Raz401c8b42016-10-28 21:35:52 +02002048 mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002049
2050 autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2051 eth_proto_new = autoneg ?
2052 mlxsw_sp_to_ptys_advert_link(cmd) :
2053 mlxsw_sp_to_ptys_speed(cmd->base.speed);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002054
2055 eth_proto_new = eth_proto_new & eth_proto_cap;
2056 if (!eth_proto_new) {
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002057 netdev_err(dev, "No supported speed requested\n");
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002058 return -EINVAL;
2059 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002060
Elad Raz401c8b42016-10-28 21:35:52 +02002061 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2062 eth_proto_new);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002063 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002064 if (err)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002065 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002066
Ido Schimmel6277d462016-07-15 11:14:58 +02002067 if (!netif_running(dev))
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002068 return 0;
2069
Ido Schimmel0c83f882016-09-12 13:26:23 +02002070 mlxsw_sp_port->link.autoneg = autoneg;
2071
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002072 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2073 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002074
2075 return 0;
2076}
2077
2078static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2079 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2080 .get_link = ethtool_op_get_link,
Ido Schimmel9f7ec052016-04-06 17:10:14 +02002081 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2082 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002083 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01002084 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002085 .get_ethtool_stats = mlxsw_sp_port_get_stats,
2086 .get_sset_count = mlxsw_sp_port_get_sset_count,
Ido Schimmelb9d66a32016-09-12 13:26:27 +02002087 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2088 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002089};
2090
Ido Schimmel18f1e702016-02-26 17:32:31 +01002091static int
2092mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2093{
2094 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2095 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2096 char ptys_pl[MLXSW_REG_PTYS_LEN];
2097 u32 eth_proto_admin;
2098
2099 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
Elad Raz401c8b42016-10-28 21:35:52 +02002100 mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2101 eth_proto_admin);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002102 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2103}
2104
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002105int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
2106 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
2107 bool dwrr, u8 dwrr_weight)
Ido Schimmel90183b92016-04-06 17:10:08 +02002108{
2109 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2110 char qeec_pl[MLXSW_REG_QEEC_LEN];
2111
2112 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2113 next_index);
2114 mlxsw_reg_qeec_de_set(qeec_pl, true);
2115 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
2116 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
2117 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2118}
2119
Ido Schimmelcc7cf512016-04-06 17:10:11 +02002120int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2121 enum mlxsw_reg_qeec_hr hr, u8 index,
2122 u8 next_index, u32 maxrate)
Ido Schimmel90183b92016-04-06 17:10:08 +02002123{
2124 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2125 char qeec_pl[MLXSW_REG_QEEC_LEN];
2126
2127 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
2128 next_index);
2129 mlxsw_reg_qeec_mase_set(qeec_pl, true);
2130 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
2131 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2132}
2133
Ido Schimmel8e8dfe92016-04-06 17:10:10 +02002134int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
2135 u8 switch_prio, u8 tclass)
Ido Schimmel90183b92016-04-06 17:10:08 +02002136{
2137 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2138 char qtct_pl[MLXSW_REG_QTCT_LEN];
2139
2140 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
2141 tclass);
2142 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
2143}
2144
2145static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
2146{
2147 int err, i;
2148
2149 /* Setup the elements hierarcy, so that each TC is linked to
2150 * one subgroup, which are all member in the same group.
2151 */
2152 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2153 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2154 0);
2155 if (err)
2156 return err;
2157 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2158 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2159 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2160 0, false, 0);
2161 if (err)
2162 return err;
2163 }
2164 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2165 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2166 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2167 false, 0);
2168 if (err)
2169 return err;
2170 }
2171
2172 /* Make sure the max shaper is disabled in all hierarcies that
2173 * support it.
2174 */
2175 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2176 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2177 MLXSW_REG_QEEC_MAS_DIS);
2178 if (err)
2179 return err;
2180 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2181 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2182 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2183 i, 0,
2184 MLXSW_REG_QEEC_MAS_DIS);
2185 if (err)
2186 return err;
2187 }
2188 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2189 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2190 MLXSW_REG_QEEC_HIERARCY_TC,
2191 i, i,
2192 MLXSW_REG_QEEC_MAS_DIS);
2193 if (err)
2194 return err;
2195 }
2196
2197 /* Map all priorities to traffic class 0. */
2198 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2199 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2200 if (err)
2201 return err;
2202 }
2203
2204 return 0;
2205}
2206
Ido Schimmel05978482016-08-17 16:39:30 +02002207static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2208{
2209 mlxsw_sp_port->pvid = 1;
2210
2211 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2212}
2213
2214static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2215{
2216 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2217}
2218
Jiri Pirko67963a32016-10-28 21:35:55 +02002219static int __mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2220 bool split, u8 module, u8 width, u8 lane)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002221{
2222 struct mlxsw_sp_port *mlxsw_sp_port;
2223 struct net_device *dev;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002224 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002225 int err;
2226
2227 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2228 if (!dev)
2229 return -ENOMEM;
Jiri Pirkof20a91f2016-10-27 15:13:00 +02002230 SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002231 mlxsw_sp_port = netdev_priv(dev);
2232 mlxsw_sp_port->dev = dev;
2233 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2234 mlxsw_sp_port->local_port = local_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002235 mlxsw_sp_port->split = split;
Ido Schimmeld664b412016-06-09 09:51:40 +02002236 mlxsw_sp_port->mapping.module = module;
2237 mlxsw_sp_port->mapping.width = width;
2238 mlxsw_sp_port->mapping.lane = lane;
Ido Schimmel0c83f882016-09-12 13:26:23 +02002239 mlxsw_sp_port->link.autoneg = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002240 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2241 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2242 if (!mlxsw_sp_port->active_vlans) {
2243 err = -ENOMEM;
2244 goto err_port_active_vlans_alloc;
2245 }
Elad Razfc1273a2016-01-06 13:01:11 +01002246 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2247 if (!mlxsw_sp_port->untagged_vlans) {
2248 err = -ENOMEM;
2249 goto err_port_untagged_vlans_alloc;
2250 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01002251 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Yotam Gigi763b4b72016-07-21 12:03:17 +02002252 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002253
2254 mlxsw_sp_port->pcpu_stats =
2255 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2256 if (!mlxsw_sp_port->pcpu_stats) {
2257 err = -ENOMEM;
2258 goto err_alloc_stats;
2259 }
2260
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002261 mlxsw_sp_port->hw_stats.cache =
2262 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL);
2263
2264 if (!mlxsw_sp_port->hw_stats.cache) {
2265 err = -ENOMEM;
2266 goto err_alloc_hw_stats;
2267 }
2268 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw,
2269 &update_stats_cache);
2270
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002271 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2272 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2273
Ido Schimmel3247ff22016-09-08 08:16:02 +02002274 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2275 if (err) {
2276 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2277 mlxsw_sp_port->local_port);
2278 goto err_port_swid_set;
2279 }
2280
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002281 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2282 if (err) {
2283 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2284 mlxsw_sp_port->local_port);
2285 goto err_dev_addr_init;
2286 }
2287
2288 netif_carrier_off(dev);
2289
2290 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
Yotam Gigi763b4b72016-07-21 12:03:17 +02002291 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2292 dev->hw_features |= NETIF_F_HW_TC;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002293
Jarod Wilsond894be52016-10-20 13:55:16 -04002294 dev->min_mtu = 0;
2295 dev->max_mtu = ETH_MAX_MTU;
2296
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002297 /* Each packet needs to have a Tx header (metadata) on top all other
2298 * headers.
2299 */
Yotam Gigifeb7d382016-10-04 09:46:04 +02002300 dev->needed_headroom = MLXSW_TXHDR_LEN;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002301
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002302 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2303 if (err) {
2304 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2305 mlxsw_sp_port->local_port);
2306 goto err_port_system_port_mapping_set;
2307 }
2308
Ido Schimmel18f1e702016-02-26 17:32:31 +01002309 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2310 if (err) {
2311 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2312 mlxsw_sp_port->local_port);
2313 goto err_port_speed_by_width_set;
2314 }
2315
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002316 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2317 if (err) {
2318 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2319 mlxsw_sp_port->local_port);
2320 goto err_port_mtu_set;
2321 }
2322
2323 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2324 if (err)
2325 goto err_port_admin_status_set;
2326
2327 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2328 if (err) {
2329 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2330 mlxsw_sp_port->local_port);
2331 goto err_port_buffers_init;
2332 }
2333
Ido Schimmel90183b92016-04-06 17:10:08 +02002334 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2335 if (err) {
2336 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2337 mlxsw_sp_port->local_port);
2338 goto err_port_ets_init;
2339 }
2340
Ido Schimmelf00817d2016-04-06 17:10:09 +02002341 /* ETS and buffers must be initialized before DCB. */
2342 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2343 if (err) {
2344 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2345 mlxsw_sp_port->local_port);
2346 goto err_port_dcb_init;
2347 }
2348
Ido Schimmel05978482016-08-17 16:39:30 +02002349 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2350 if (err) {
2351 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2352 mlxsw_sp_port->local_port);
2353 goto err_port_pvid_vport_create;
2354 }
2355
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002356 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
Ido Schimmel2f258442016-08-17 16:39:31 +02002357 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002358 err = register_netdev(dev);
2359 if (err) {
2360 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2361 mlxsw_sp_port->local_port);
2362 goto err_register_netdev;
2363 }
2364
Elad Razd808c7e2016-10-28 21:35:57 +02002365 mlxsw_core_port_eth_set(mlxsw_sp->core, mlxsw_sp_port->local_port,
2366 mlxsw_sp_port, dev, mlxsw_sp_port->split,
2367 module);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002368 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002369 return 0;
2370
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002371err_register_netdev:
Ido Schimmel2f258442016-08-17 16:39:31 +02002372 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002373 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002374 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2375err_port_pvid_vport_create:
Ido Schimmel4de34eb2016-08-04 17:36:22 +03002376 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002377err_port_dcb_init:
Ido Schimmel90183b92016-04-06 17:10:08 +02002378err_port_ets_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002379err_port_buffers_init:
2380err_port_admin_status_set:
2381err_port_mtu_set:
Ido Schimmel18f1e702016-02-26 17:32:31 +01002382err_port_speed_by_width_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002383err_port_system_port_mapping_set:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002384err_dev_addr_init:
Ido Schimmel3247ff22016-09-08 08:16:02 +02002385 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2386err_port_swid_set:
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002387 kfree(mlxsw_sp_port->hw_stats.cache);
2388err_alloc_hw_stats:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002389 free_percpu(mlxsw_sp_port->pcpu_stats);
2390err_alloc_stats:
Elad Razfc1273a2016-01-06 13:01:11 +01002391 kfree(mlxsw_sp_port->untagged_vlans);
2392err_port_untagged_vlans_alloc:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002393 kfree(mlxsw_sp_port->active_vlans);
2394err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002395 free_netdev(dev);
2396 return err;
2397}
2398
Jiri Pirko67963a32016-10-28 21:35:55 +02002399static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2400 bool split, u8 module, u8 width, u8 lane)
2401{
2402 int err;
2403
2404 err = mlxsw_core_port_init(mlxsw_sp->core, local_port);
2405 if (err) {
2406 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2407 local_port);
2408 return err;
2409 }
Ido Schimmel9a60c902016-12-16 19:29:03 +01002410 err = __mlxsw_sp_port_create(mlxsw_sp, local_port, split,
Jiri Pirko67963a32016-10-28 21:35:55 +02002411 module, width, lane);
2412 if (err)
2413 goto err_port_create;
2414 return 0;
2415
2416err_port_create:
2417 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2418 return err;
2419}
2420
2421static void __mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002422{
2423 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2424
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002425 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw);
Jiri Pirko67963a32016-10-28 21:35:55 +02002426 mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002427 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel2f258442016-08-17 16:39:31 +02002428 mlxsw_sp->ports[local_port] = NULL;
Ido Schimmel05832722016-08-17 16:39:35 +02002429 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
Ido Schimmel05978482016-08-17 16:39:30 +02002430 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
Ido Schimmelf00817d2016-04-06 17:10:09 +02002431 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
Ido Schimmel3e9b27b2016-02-26 17:32:28 +01002432 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2433 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
Nogah Frankelfc1bbb02016-09-16 15:05:38 +02002434 kfree(mlxsw_sp_port->hw_stats.cache);
Yotam Gigi136f1442017-01-09 11:25:47 +01002435 free_percpu(mlxsw_sp_port->pcpu_stats);
Elad Razfc1273a2016-01-06 13:01:11 +01002436 kfree(mlxsw_sp_port->untagged_vlans);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01002437 kfree(mlxsw_sp_port->active_vlans);
Ido Schimmel32d863f2016-07-02 11:00:10 +02002438 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002439 free_netdev(mlxsw_sp_port->dev);
2440}
2441
Jiri Pirko67963a32016-10-28 21:35:55 +02002442static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2443{
2444 __mlxsw_sp_port_remove(mlxsw_sp, local_port);
2445 mlxsw_core_port_fini(mlxsw_sp->core, local_port);
2446}
2447
Jiri Pirkof83e2102016-10-28 21:35:49 +02002448static bool mlxsw_sp_port_created(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2449{
2450 return mlxsw_sp->ports[local_port] != NULL;
2451}
2452
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002453static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2454{
2455 int i;
2456
2457 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002458 if (mlxsw_sp_port_created(mlxsw_sp, i))
2459 mlxsw_sp_port_remove(mlxsw_sp, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002460 kfree(mlxsw_sp->ports);
2461}
2462
2463static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2464{
Ido Schimmeld664b412016-06-09 09:51:40 +02002465 u8 module, width, lane;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002466 size_t alloc_size;
2467 int i;
2468 int err;
2469
2470 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2471 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2472 if (!mlxsw_sp->ports)
2473 return -ENOMEM;
2474
2475 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
Ido Schimmel558c2d52016-02-26 17:32:29 +01002476 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002477 &width, &lane);
Ido Schimmel558c2d52016-02-26 17:32:29 +01002478 if (err)
2479 goto err_port_module_info_get;
2480 if (!width)
2481 continue;
2482 mlxsw_sp->port_to_module[i] = module;
Jiri Pirko67963a32016-10-28 21:35:55 +02002483 err = mlxsw_sp_port_create(mlxsw_sp, i, false,
2484 module, width, lane);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002485 if (err)
2486 goto err_port_create;
2487 }
2488 return 0;
2489
2490err_port_create:
Ido Schimmel558c2d52016-02-26 17:32:29 +01002491err_port_module_info_get:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002492 for (i--; i >= 1; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002493 if (mlxsw_sp_port_created(mlxsw_sp, i))
2494 mlxsw_sp_port_remove(mlxsw_sp, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002495 kfree(mlxsw_sp->ports);
2496 return err;
2497}
2498
Ido Schimmel18f1e702016-02-26 17:32:31 +01002499static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2500{
2501 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2502
2503 return local_port - offset;
2504}
2505
Ido Schimmelbe945352016-06-09 09:51:39 +02002506static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2507 u8 module, unsigned int count)
2508{
2509 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2510 int err, i;
2511
2512 for (i = 0; i < count; i++) {
2513 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2514 width, i * width);
2515 if (err)
2516 goto err_port_module_map;
2517 }
2518
2519 for (i = 0; i < count; i++) {
2520 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2521 if (err)
2522 goto err_port_swid_set;
2523 }
2524
2525 for (i = 0; i < count; i++) {
2526 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
Ido Schimmeld664b412016-06-09 09:51:40 +02002527 module, width, i * width);
Ido Schimmelbe945352016-06-09 09:51:39 +02002528 if (err)
2529 goto err_port_create;
2530 }
2531
2532 return 0;
2533
2534err_port_create:
2535 for (i--; i >= 0; i--)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002536 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2537 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmelbe945352016-06-09 09:51:39 +02002538 i = count;
2539err_port_swid_set:
2540 for (i--; i >= 0; i--)
2541 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2542 MLXSW_PORT_SWID_DISABLED_PORT);
2543 i = count;
2544err_port_module_map:
2545 for (i--; i >= 0; i--)
2546 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2547 return err;
2548}
2549
2550static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2551 u8 base_port, unsigned int count)
2552{
2553 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2554 int i;
2555
2556 /* Split by four means we need to re-create two ports, otherwise
2557 * only one.
2558 */
2559 count = count / 2;
2560
2561 for (i = 0; i < count; i++) {
2562 local_port = base_port + i * 2;
2563 module = mlxsw_sp->port_to_module[local_port];
2564
2565 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2566 0);
2567 }
2568
2569 for (i = 0; i < count; i++)
2570 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2571
2572 for (i = 0; i < count; i++) {
2573 local_port = base_port + i * 2;
2574 module = mlxsw_sp->port_to_module[local_port];
2575
2576 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
Ido Schimmeld664b412016-06-09 09:51:40 +02002577 width, 0);
Ido Schimmelbe945352016-06-09 09:51:39 +02002578 }
2579}
2580
Jiri Pirkob2f10572016-04-08 19:11:23 +02002581static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2582 unsigned int count)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002583{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002584 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002585 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002586 u8 module, cur_width, base_port;
2587 int i;
2588 int err;
2589
2590 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2591 if (!mlxsw_sp_port) {
2592 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2593 local_port);
2594 return -EINVAL;
2595 }
2596
Ido Schimmeld664b412016-06-09 09:51:40 +02002597 module = mlxsw_sp_port->mapping.module;
2598 cur_width = mlxsw_sp_port->mapping.width;
2599
Ido Schimmel18f1e702016-02-26 17:32:31 +01002600 if (count != 2 && count != 4) {
2601 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2602 return -EINVAL;
2603 }
2604
Ido Schimmel18f1e702016-02-26 17:32:31 +01002605 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2606 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2607 return -EINVAL;
2608 }
2609
2610 /* Make sure we have enough slave (even) ports for the split. */
2611 if (count == 2) {
2612 base_port = local_port;
2613 if (mlxsw_sp->ports[base_port + 1]) {
2614 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2615 return -EINVAL;
2616 }
2617 } else {
2618 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2619 if (mlxsw_sp->ports[base_port + 1] ||
2620 mlxsw_sp->ports[base_port + 3]) {
2621 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2622 return -EINVAL;
2623 }
2624 }
2625
2626 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002627 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2628 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002629
Ido Schimmelbe945352016-06-09 09:51:39 +02002630 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2631 if (err) {
2632 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2633 goto err_port_split_create;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002634 }
2635
2636 return 0;
2637
Ido Schimmelbe945352016-06-09 09:51:39 +02002638err_port_split_create:
2639 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002640 return err;
2641}
2642
Jiri Pirkob2f10572016-04-08 19:11:23 +02002643static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
Ido Schimmel18f1e702016-02-26 17:32:31 +01002644{
Jiri Pirkob2f10572016-04-08 19:11:23 +02002645 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002646 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmeld664b412016-06-09 09:51:40 +02002647 u8 cur_width, base_port;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002648 unsigned int count;
2649 int i;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002650
2651 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2652 if (!mlxsw_sp_port) {
2653 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2654 local_port);
2655 return -EINVAL;
2656 }
2657
2658 if (!mlxsw_sp_port->split) {
2659 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2660 return -EINVAL;
2661 }
2662
Ido Schimmeld664b412016-06-09 09:51:40 +02002663 cur_width = mlxsw_sp_port->mapping.width;
Ido Schimmel18f1e702016-02-26 17:32:31 +01002664 count = cur_width == 1 ? 4 : 2;
2665
2666 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2667
2668 /* Determine which ports to remove. */
2669 if (count == 2 && local_port >= base_port + 2)
2670 base_port = base_port + 2;
2671
2672 for (i = 0; i < count; i++)
Jiri Pirkof83e2102016-10-28 21:35:49 +02002673 if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
2674 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002675
Ido Schimmelbe945352016-06-09 09:51:39 +02002676 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
Ido Schimmel18f1e702016-02-26 17:32:31 +01002677
2678 return 0;
2679}
2680
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002681static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2682 char *pude_pl, void *priv)
2683{
2684 struct mlxsw_sp *mlxsw_sp = priv;
2685 struct mlxsw_sp_port *mlxsw_sp_port;
2686 enum mlxsw_reg_pude_oper_status status;
2687 u8 local_port;
2688
2689 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2690 mlxsw_sp_port = mlxsw_sp->ports[local_port];
Ido Schimmelbbf2a472016-07-02 11:00:14 +02002691 if (!mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002692 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002693
2694 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2695 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2696 netdev_info(mlxsw_sp_port->dev, "link up\n");
2697 netif_carrier_on(mlxsw_sp_port->dev);
2698 } else {
2699 netdev_info(mlxsw_sp_port->dev, "link down\n");
2700 netif_carrier_off(mlxsw_sp_port->dev);
2701 }
2702}
2703
Nogah Frankel14eeda92016-11-25 10:33:32 +01002704static void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb,
2705 u8 local_port, void *priv)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002706{
2707 struct mlxsw_sp *mlxsw_sp = priv;
2708 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2709 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2710
2711 if (unlikely(!mlxsw_sp_port)) {
2712 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2713 local_port);
2714 return;
2715 }
2716
2717 skb->dev = mlxsw_sp_port->dev;
2718
2719 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2720 u64_stats_update_begin(&pcpu_stats->syncp);
2721 pcpu_stats->rx_packets++;
2722 pcpu_stats->rx_bytes += skb->len;
2723 u64_stats_update_end(&pcpu_stats->syncp);
2724
2725 skb->protocol = eth_type_trans(skb, skb->dev);
2726 netif_receive_skb(skb);
2727}
2728
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002729static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2730 void *priv)
2731{
2732 skb->offload_fwd_mark = 1;
Nogah Frankel14eeda92016-11-25 10:33:32 +01002733 return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
Ido Schimmel1c6c6d22016-08-25 18:42:40 +02002734}
2735
Nogah Frankel117b0da2016-11-25 10:33:44 +01002736#define MLXSW_SP_RXL_NO_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel0fb78a42016-11-25 10:33:39 +01002737 MLXSW_RXL(mlxsw_sp_rx_listener_no_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01002738 _is_ctrl, SP_##_trap_group, DISCARD)
Ido Schimmel93393b32016-08-25 18:42:38 +02002739
Nogah Frankel117b0da2016-11-25 10:33:44 +01002740#define MLXSW_SP_RXL_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
Nogah Frankel14eeda92016-11-25 10:33:32 +01002741 MLXSW_RXL(mlxsw_sp_rx_listener_mark_func, _trap_id, _action, \
Nogah Frankel117b0da2016-11-25 10:33:44 +01002742 _is_ctrl, SP_##_trap_group, DISCARD)
2743
2744#define MLXSW_SP_EVENTL(_func, _trap_id) \
2745 MLXSW_EVENTL(_func, _trap_id, SP_EVENT)
Nogah Frankel14eeda92016-11-25 10:33:32 +01002746
Nogah Frankel45449132016-11-25 10:33:35 +01002747static const struct mlxsw_listener mlxsw_sp_listener[] = {
2748 /* Events */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002749 MLXSW_SP_EVENTL(mlxsw_sp_pude_event_func, PUDE),
Nogah Frankelee4a60d2016-11-25 10:33:29 +01002750 /* L2 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002751 MLXSW_SP_RXL_NO_MARK(STP, TRAP_TO_CPU, STP, true),
2752 MLXSW_SP_RXL_NO_MARK(LACP, TRAP_TO_CPU, LACP, true),
2753 MLXSW_SP_RXL_NO_MARK(LLDP, TRAP_TO_CPU, LLDP, true),
2754 MLXSW_SP_RXL_MARK(DHCP, MIRROR_TO_CPU, DHCP, false),
2755 MLXSW_SP_RXL_MARK(IGMP_QUERY, MIRROR_TO_CPU, IGMP, false),
2756 MLXSW_SP_RXL_NO_MARK(IGMP_V1_REPORT, TRAP_TO_CPU, IGMP, false),
2757 MLXSW_SP_RXL_NO_MARK(IGMP_V2_REPORT, TRAP_TO_CPU, IGMP, false),
2758 MLXSW_SP_RXL_NO_MARK(IGMP_V2_LEAVE, TRAP_TO_CPU, IGMP, false),
2759 MLXSW_SP_RXL_NO_MARK(IGMP_V3_REPORT, TRAP_TO_CPU, IGMP, false),
2760 MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU, ARP, false),
2761 MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU, ARP, false),
Ido Schimmel93393b32016-08-25 18:42:38 +02002762 /* L3 traps */
Nogah Frankel117b0da2016-11-25 10:33:44 +01002763 MLXSW_SP_RXL_NO_MARK(MTUERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2764 MLXSW_SP_RXL_NO_MARK(TTLERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2765 MLXSW_SP_RXL_NO_MARK(LBERROR, TRAP_TO_CPU, ROUTER_EXP, false),
2766 MLXSW_SP_RXL_MARK(OSPF, TRAP_TO_CPU, OSPF, false),
2767 MLXSW_SP_RXL_NO_MARK(IP2ME, TRAP_TO_CPU, IP2ME, false),
2768 MLXSW_SP_RXL_NO_MARK(RTR_INGRESS0, TRAP_TO_CPU, REMOTE_ROUTE, false),
2769 MLXSW_SP_RXL_NO_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, ARP_MISS, false),
2770 MLXSW_SP_RXL_NO_MARK(BGP_IPV4, TRAP_TO_CPU, BGP_IPV4, false),
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002771};
2772
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002773static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core)
2774{
2775 char qpcr_pl[MLXSW_REG_QPCR_LEN];
2776 enum mlxsw_reg_qpcr_ir_units ir_units;
2777 int max_cpu_policers;
2778 bool is_bytes;
2779 u8 burst_size;
2780 u32 rate;
2781 int i, err;
2782
2783 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_CPU_POLICERS))
2784 return -EIO;
2785
2786 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
2787
2788 ir_units = MLXSW_REG_QPCR_IR_UNITS_M;
2789 for (i = 0; i < max_cpu_policers; i++) {
2790 is_bytes = false;
2791 switch (i) {
2792 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2793 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2794 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2795 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2796 rate = 128;
2797 burst_size = 7;
2798 break;
2799 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2800 rate = 16 * 1024;
2801 burst_size = 10;
2802 break;
2803 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2804 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2805 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2806 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2807 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2808 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2809 rate = 1024;
2810 burst_size = 7;
2811 break;
2812 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2813 is_bytes = true;
2814 rate = 4 * 1024;
2815 burst_size = 4;
2816 break;
2817 default:
2818 continue;
2819 }
2820
2821 mlxsw_reg_qpcr_pack(qpcr_pl, i, ir_units, is_bytes, rate,
2822 burst_size);
2823 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl);
2824 if (err)
2825 return err;
2826 }
2827
2828 return 0;
2829}
2830
Nogah Frankel579c82e2016-11-25 10:33:42 +01002831static int mlxsw_sp_trap_groups_set(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002832{
2833 char htgt_pl[MLXSW_REG_HTGT_LEN];
Nogah Frankel117b0da2016-11-25 10:33:44 +01002834 enum mlxsw_reg_htgt_trap_group i;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002835 int max_cpu_policers;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002836 int max_trap_groups;
2837 u8 priority, tc;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002838 u16 policer_id;
Nogah Frankel117b0da2016-11-25 10:33:44 +01002839 int err;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002840
2841 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_TRAP_GROUPS))
2842 return -EIO;
2843
2844 max_trap_groups = MLXSW_CORE_RES_GET(mlxsw_core, MAX_TRAP_GROUPS);
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002845 max_cpu_policers = MLXSW_CORE_RES_GET(mlxsw_core, MAX_CPU_POLICERS);
Nogah Frankel579c82e2016-11-25 10:33:42 +01002846
2847 for (i = 0; i < max_trap_groups; i++) {
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002848 policer_id = i;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002849 switch (i) {
Nogah Frankel117b0da2016-11-25 10:33:44 +01002850 case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
2851 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
2852 case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
2853 case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
2854 priority = 5;
2855 tc = 5;
2856 break;
2857 case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP_IPV4:
2858 case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
2859 priority = 4;
2860 tc = 4;
2861 break;
2862 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
2863 case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
2864 priority = 3;
2865 tc = 3;
2866 break;
2867 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
2868 priority = 2;
2869 tc = 2;
2870 break;
2871 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP_MISS:
2872 case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
2873 case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
2874 priority = 1;
2875 tc = 1;
2876 break;
2877 case MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT:
Nogah Frankel579c82e2016-11-25 10:33:42 +01002878 priority = MLXSW_REG_HTGT_DEFAULT_PRIORITY;
2879 tc = MLXSW_REG_HTGT_DEFAULT_TC;
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002880 policer_id = MLXSW_REG_HTGT_INVALID_POLICER;
Nogah Frankel579c82e2016-11-25 10:33:42 +01002881 break;
2882 default:
2883 continue;
2884 }
Nogah Frankel117b0da2016-11-25 10:33:44 +01002885
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002886 if (max_cpu_policers <= policer_id &&
2887 policer_id != MLXSW_REG_HTGT_INVALID_POLICER)
2888 return -EIO;
2889
2890 mlxsw_reg_htgt_pack(htgt_pl, i, policer_id, priority, tc);
Nogah Frankel579c82e2016-11-25 10:33:42 +01002891 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
2892 if (err)
2893 return err;
2894 }
2895
2896 return 0;
2897}
2898
2899static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2900{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002901 int i;
2902 int err;
2903
Nogah Frankel9148e7c2016-11-25 10:33:47 +01002904 err = mlxsw_sp_cpu_policers_set(mlxsw_sp->core);
2905 if (err)
2906 return err;
2907
Nogah Frankel579c82e2016-11-25 10:33:42 +01002908 err = mlxsw_sp_trap_groups_set(mlxsw_sp->core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002909 if (err)
2910 return err;
2911
Nogah Frankel45449132016-11-25 10:33:35 +01002912 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01002913 err = mlxsw_core_trap_register(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01002914 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01002915 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002916 if (err)
Nogah Frankel45449132016-11-25 10:33:35 +01002917 goto err_listener_register;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002918
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002919 }
2920 return 0;
2921
Nogah Frankel45449132016-11-25 10:33:35 +01002922err_listener_register:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002923 for (i--; i >= 0; i--) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01002924 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01002925 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01002926 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002927 }
2928 return err;
2929}
2930
2931static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2932{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002933 int i;
2934
Nogah Frankel45449132016-11-25 10:33:35 +01002935 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
Nogah Frankel14eeda92016-11-25 10:33:32 +01002936 mlxsw_core_trap_unregister(mlxsw_sp->core,
Nogah Frankel45449132016-11-25 10:33:35 +01002937 &mlxsw_sp_listener[i],
Nogah Frankel14eeda92016-11-25 10:33:32 +01002938 mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002939 }
2940}
2941
2942static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2943 enum mlxsw_reg_sfgc_type type,
2944 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2945{
2946 enum mlxsw_flood_table_type table_type;
2947 enum mlxsw_sp_flood_table flood_table;
2948 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2949
Ido Schimmel19ae6122015-12-15 16:03:39 +01002950 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002951 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002952 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002953 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01002954
2955 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2956 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2957 else
2958 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002959
2960 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2961 flood_table);
2962 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2963}
2964
2965static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2966{
2967 int type, err;
2968
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002969 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2970 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2971 continue;
2972
2973 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2974 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2975 if (err)
2976 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002977
2978 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2979 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2980 if (err)
2981 return err;
2982 }
2983
2984 return 0;
2985}
2986
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002987static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2988{
2989 char slcr_pl[MLXSW_REG_SLCR_LEN];
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02002990 int err;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002991
2992 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2993 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2994 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2995 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2996 MLXSW_REG_SLCR_LAG_HASH_SIP |
2997 MLXSW_REG_SLCR_LAG_HASH_DIP |
2998 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2999 MLXSW_REG_SLCR_LAG_HASH_DPORT |
3000 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003001 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
3002 if (err)
3003 return err;
3004
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003005 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG) ||
3006 !MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_LAG_MEMBERS))
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003007 return -EIO;
3008
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003009 mlxsw_sp->lags = kcalloc(MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG),
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003010 sizeof(struct mlxsw_sp_upper),
3011 GFP_KERNEL);
3012 if (!mlxsw_sp->lags)
3013 return -ENOMEM;
3014
3015 return 0;
3016}
3017
3018static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp)
3019{
3020 kfree(mlxsw_sp->lags);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003021}
3022
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003023static int mlxsw_sp_basic_trap_groups_set(struct mlxsw_core *mlxsw_core)
3024{
3025 char htgt_pl[MLXSW_REG_HTGT_LEN];
3026
Nogah Frankel579c82e2016-11-25 10:33:42 +01003027 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD,
3028 MLXSW_REG_HTGT_INVALID_POLICER,
3029 MLXSW_REG_HTGT_DEFAULT_PRIORITY,
3030 MLXSW_REG_HTGT_DEFAULT_TC);
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003031 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3032}
3033
Jiri Pirkob2f10572016-04-08 19:11:23 +02003034static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003035 const struct mlxsw_bus_info *mlxsw_bus_info)
3036{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003037 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003038 int err;
3039
3040 mlxsw_sp->core = mlxsw_core;
3041 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel14d39462016-06-20 23:04:15 +02003042 INIT_LIST_HEAD(&mlxsw_sp->fids);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003043 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
Elad Raz3a49b4f2016-01-10 21:06:28 +01003044 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003045
3046 err = mlxsw_sp_base_mac_get(mlxsw_sp);
3047 if (err) {
3048 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
3049 return err;
3050 }
3051
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003052 err = mlxsw_sp_traps_init(mlxsw_sp);
3053 if (err) {
Nogah Frankel45449132016-11-25 10:33:35 +01003054 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps\n");
3055 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003056 }
3057
3058 err = mlxsw_sp_flood_init(mlxsw_sp);
3059 if (err) {
3060 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
3061 goto err_flood_init;
3062 }
3063
3064 err = mlxsw_sp_buffers_init(mlxsw_sp);
3065 if (err) {
3066 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
3067 goto err_buffers_init;
3068 }
3069
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003070 err = mlxsw_sp_lag_init(mlxsw_sp);
3071 if (err) {
3072 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
3073 goto err_lag_init;
3074 }
3075
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003076 err = mlxsw_sp_switchdev_init(mlxsw_sp);
3077 if (err) {
3078 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
3079 goto err_switchdev_init;
3080 }
3081
Ido Schimmel464dce12016-07-02 11:00:15 +02003082 err = mlxsw_sp_router_init(mlxsw_sp);
3083 if (err) {
3084 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
3085 goto err_router_init;
3086 }
3087
Yotam Gigi763b4b72016-07-21 12:03:17 +02003088 err = mlxsw_sp_span_init(mlxsw_sp);
3089 if (err) {
3090 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
3091 goto err_span_init;
3092 }
3093
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003094 err = mlxsw_sp_ports_create(mlxsw_sp);
3095 if (err) {
3096 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
3097 goto err_ports_create;
3098 }
3099
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003100 return 0;
3101
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003102err_ports_create:
Yotam Gigi763b4b72016-07-21 12:03:17 +02003103 mlxsw_sp_span_fini(mlxsw_sp);
3104err_span_init:
Ido Schimmel464dce12016-07-02 11:00:15 +02003105 mlxsw_sp_router_fini(mlxsw_sp);
3106err_router_init:
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003107 mlxsw_sp_switchdev_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003108err_switchdev_init:
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003109 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003110err_lag_init:
Jiri Pirko0f433fa2016-04-14 18:19:24 +02003111 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003112err_buffers_init:
3113err_flood_init:
3114 mlxsw_sp_traps_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003115 return err;
3116}
3117
Jiri Pirkob2f10572016-04-08 19:11:23 +02003118static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003119{
Jiri Pirkob2f10572016-04-08 19:11:23 +02003120 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003121
Ido Schimmelbbf2a472016-07-02 11:00:14 +02003122 mlxsw_sp_ports_remove(mlxsw_sp);
Yotam Gigi763b4b72016-07-21 12:03:17 +02003123 mlxsw_sp_span_fini(mlxsw_sp);
Ido Schimmel464dce12016-07-02 11:00:15 +02003124 mlxsw_sp_router_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003125 mlxsw_sp_switchdev_fini(mlxsw_sp);
Nogah Frankelce0bd2b2016-09-20 11:16:50 +02003126 mlxsw_sp_lag_fini(mlxsw_sp);
Jiri Pirko5113bfd2016-05-06 22:20:59 +02003127 mlxsw_sp_buffers_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003128 mlxsw_sp_traps_fini(mlxsw_sp);
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02003129 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
Ido Schimmel14d39462016-06-20 23:04:15 +02003130 WARN_ON(!list_empty(&mlxsw_sp->fids));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003131}
3132
3133static struct mlxsw_config_profile mlxsw_sp_config_profile = {
3134 .used_max_vepa_channels = 1,
3135 .max_vepa_channels = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003136 .used_max_mid = 1,
Elad Raz53ae6282016-01-10 21:06:26 +01003137 .max_mid = MLXSW_SP_MID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003138 .used_max_pgt = 1,
3139 .max_pgt = 0,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003140 .used_flood_tables = 1,
3141 .used_flood_mode = 1,
3142 .flood_mode = 3,
3143 .max_fid_offset_flood_tables = 2,
3144 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01003145 .max_fid_flood_tables = 2,
3146 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003147 .used_max_ib_mc = 1,
3148 .max_ib_mc = 0,
3149 .used_max_pkey = 1,
3150 .max_pkey = 0,
Nogah Frankel403547d2016-09-20 11:16:52 +02003151 .used_kvd_split_data = 1,
3152 .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY,
3153 .kvd_hash_single_parts = 2,
3154 .kvd_hash_double_parts = 1,
Jiri Pirkoc6022422016-07-05 11:27:46 +02003155 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003156 .swid_config = {
3157 {
3158 .used_type = 1,
3159 .type = MLXSW_PORT_SWID_TYPE_ETH,
3160 }
3161 },
Nogah Frankel57d316b2016-07-21 12:03:09 +02003162 .resource_query_enable = 1,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003163};
3164
3165static struct mlxsw_driver mlxsw_sp_driver = {
Jiri Pirko1d20d232016-10-27 15:12:59 +02003166 .kind = mlxsw_sp_driver_name,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003167 .priv_size = sizeof(struct mlxsw_sp),
3168 .init = mlxsw_sp_init,
3169 .fini = mlxsw_sp_fini,
Nogah Frankel9d87fce2016-11-25 10:33:40 +01003170 .basic_trap_groups_set = mlxsw_sp_basic_trap_groups_set,
Jiri Pirko2d0ed392016-04-14 18:19:30 +02003171 .port_split = mlxsw_sp_port_split,
3172 .port_unsplit = mlxsw_sp_port_unsplit,
3173 .sb_pool_get = mlxsw_sp_sb_pool_get,
3174 .sb_pool_set = mlxsw_sp_sb_pool_set,
3175 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
3176 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
3177 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
3178 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
3179 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
3180 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
3181 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
3182 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
3183 .txhdr_construct = mlxsw_sp_txhdr_construct,
3184 .txhdr_len = MLXSW_TXHDR_LEN,
3185 .profile = &mlxsw_sp_config_profile,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003186};
3187
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003188static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
3189{
3190 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
3191}
3192
David Aherndd823642016-10-17 19:15:49 -07003193static int mlxsw_lower_dev_walk(struct net_device *lower_dev, void *data)
3194{
3195 struct mlxsw_sp_port **port = data;
3196 int ret = 0;
3197
3198 if (mlxsw_sp_port_dev_check(lower_dev)) {
3199 *port = netdev_priv(lower_dev);
3200 ret = 1;
3201 }
3202
3203 return ret;
3204}
3205
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003206static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
3207{
David Aherndd823642016-10-17 19:15:49 -07003208 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003209
3210 if (mlxsw_sp_port_dev_check(dev))
3211 return netdev_priv(dev);
3212
David Aherndd823642016-10-17 19:15:49 -07003213 port = NULL;
3214 netdev_walk_all_lower_dev(dev, mlxsw_lower_dev_walk, &port);
3215
3216 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003217}
3218
3219static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
3220{
3221 struct mlxsw_sp_port *mlxsw_sp_port;
3222
3223 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
3224 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
3225}
3226
3227static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
3228{
David Aherndd823642016-10-17 19:15:49 -07003229 struct mlxsw_sp_port *port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003230
3231 if (mlxsw_sp_port_dev_check(dev))
3232 return netdev_priv(dev);
3233
David Aherndd823642016-10-17 19:15:49 -07003234 port = NULL;
3235 netdev_walk_all_lower_dev_rcu(dev, mlxsw_lower_dev_walk, &port);
3236
3237 return port;
Jiri Pirko7ce856a2016-07-04 08:23:12 +02003238}
3239
3240struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
3241{
3242 struct mlxsw_sp_port *mlxsw_sp_port;
3243
3244 rcu_read_lock();
3245 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
3246 if (mlxsw_sp_port)
3247 dev_hold(mlxsw_sp_port->dev);
3248 rcu_read_unlock();
3249 return mlxsw_sp_port;
3250}
3251
3252void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
3253{
3254 dev_put(mlxsw_sp_port->dev);
3255}
3256
Ido Schimmel99724c12016-07-04 08:23:14 +02003257static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
3258 unsigned long event)
3259{
3260 switch (event) {
3261 case NETDEV_UP:
3262 if (!r)
3263 return true;
3264 r->ref_count++;
3265 return false;
3266 case NETDEV_DOWN:
3267 if (r && --r->ref_count == 0)
3268 return true;
3269 /* It is possible we already removed the RIF ourselves
3270 * if it was assigned to a netdev that is now a bridge
3271 * or LAG slave.
3272 */
3273 return false;
3274 }
3275
3276 return false;
3277}
3278
3279static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
3280{
3281 int i;
3282
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003283 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_RIFS); i++)
Ido Schimmel99724c12016-07-04 08:23:14 +02003284 if (!mlxsw_sp->rifs[i])
3285 return i;
3286
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003287 return MLXSW_SP_INVALID_RIF;
Ido Schimmel99724c12016-07-04 08:23:14 +02003288}
3289
3290static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3291 bool *p_lagged, u16 *p_system_port)
3292{
3293 u8 local_port = mlxsw_sp_vport->local_port;
3294
3295 *p_lagged = mlxsw_sp_vport->lagged;
3296 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3297}
3298
3299static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3300 struct net_device *l3_dev, u16 rif,
3301 bool create)
3302{
3303 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3304 bool lagged = mlxsw_sp_vport->lagged;
3305 char ritr_pl[MLXSW_REG_RITR_LEN];
3306 u16 system_port;
3307
3308 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3309 l3_dev->mtu, l3_dev->dev_addr);
3310
3311 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3312 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3313 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3314
3315 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3316}
3317
3318static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3319
3320static struct mlxsw_sp_fid *
3321mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3322{
3323 struct mlxsw_sp_fid *f;
3324
3325 f = kzalloc(sizeof(*f), GFP_KERNEL);
3326 if (!f)
3327 return NULL;
3328
3329 f->leave = mlxsw_sp_vport_rif_sp_leave;
3330 f->ref_count = 0;
3331 f->dev = l3_dev;
3332 f->fid = fid;
3333
3334 return f;
3335}
3336
3337static struct mlxsw_sp_rif *
3338mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3339{
3340 struct mlxsw_sp_rif *r;
3341
3342 r = kzalloc(sizeof(*r), GFP_KERNEL);
3343 if (!r)
3344 return NULL;
3345
3346 ether_addr_copy(r->addr, l3_dev->dev_addr);
3347 r->mtu = l3_dev->mtu;
3348 r->ref_count = 1;
3349 r->dev = l3_dev;
3350 r->rif = rif;
3351 r->f = f;
3352
3353 return r;
3354}
3355
3356static struct mlxsw_sp_rif *
3357mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3358 struct net_device *l3_dev)
3359{
3360 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3361 struct mlxsw_sp_fid *f;
3362 struct mlxsw_sp_rif *r;
3363 u16 fid, rif;
3364 int err;
3365
3366 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003367 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99724c12016-07-04 08:23:14 +02003368 return ERR_PTR(-ERANGE);
3369
3370 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3371 if (err)
3372 return ERR_PTR(err);
3373
3374 fid = mlxsw_sp_rif_sp_to_fid(rif);
3375 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3376 if (err)
3377 goto err_rif_fdb_op;
3378
3379 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3380 if (!f) {
3381 err = -ENOMEM;
3382 goto err_rfid_alloc;
3383 }
3384
3385 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3386 if (!r) {
3387 err = -ENOMEM;
3388 goto err_rif_alloc;
3389 }
3390
3391 f->r = r;
3392 mlxsw_sp->rifs[rif] = r;
3393
3394 return r;
3395
3396err_rif_alloc:
3397 kfree(f);
3398err_rfid_alloc:
3399 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3400err_rif_fdb_op:
3401 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3402 return ERR_PTR(err);
3403}
3404
3405static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3406 struct mlxsw_sp_rif *r)
3407{
3408 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3409 struct net_device *l3_dev = r->dev;
3410 struct mlxsw_sp_fid *f = r->f;
3411 u16 fid = f->fid;
3412 u16 rif = r->rif;
3413
3414 mlxsw_sp->rifs[rif] = NULL;
3415 f->r = NULL;
3416
3417 kfree(r);
3418
3419 kfree(f);
3420
3421 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3422
3423 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3424}
3425
3426static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3427 struct net_device *l3_dev)
3428{
3429 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3430 struct mlxsw_sp_rif *r;
3431
3432 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3433 if (!r) {
3434 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3435 if (IS_ERR(r))
3436 return PTR_ERR(r);
3437 }
3438
3439 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3440 r->f->ref_count++;
3441
3442 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3443
3444 return 0;
3445}
3446
3447static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3448{
3449 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3450
3451 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3452
3453 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3454 if (--f->ref_count == 0)
3455 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3456}
3457
3458static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3459 struct net_device *port_dev,
3460 unsigned long event, u16 vid)
3461{
3462 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3463 struct mlxsw_sp_port *mlxsw_sp_vport;
3464
3465 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3466 if (WARN_ON(!mlxsw_sp_vport))
3467 return -EINVAL;
3468
3469 switch (event) {
3470 case NETDEV_UP:
3471 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3472 case NETDEV_DOWN:
3473 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3474 break;
3475 }
3476
3477 return 0;
3478}
3479
3480static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3481 unsigned long event)
3482{
3483 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3484 return 0;
3485
3486 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3487}
3488
3489static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3490 struct net_device *lag_dev,
3491 unsigned long event, u16 vid)
3492{
3493 struct net_device *port_dev;
3494 struct list_head *iter;
3495 int err;
3496
3497 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3498 if (mlxsw_sp_port_dev_check(port_dev)) {
3499 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3500 event, vid);
3501 if (err)
3502 return err;
3503 }
3504 }
3505
3506 return 0;
3507}
3508
3509static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3510 unsigned long event)
3511{
3512 if (netif_is_bridge_port(lag_dev))
3513 return 0;
3514
3515 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3516}
3517
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003518static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3519 struct net_device *l3_dev)
3520{
3521 u16 fid;
3522
3523 if (is_vlan_dev(l3_dev))
3524 fid = vlan_dev_vlan_id(l3_dev);
3525 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3526 fid = 1;
3527 else
3528 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3529
3530 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3531}
3532
Ido Schimmelf888f582016-08-24 11:18:51 +02003533static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3534{
3535 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3536 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3537}
3538
3539static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3540{
3541 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3542}
3543
3544static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3545 bool set)
3546{
3547 enum mlxsw_flood_table_type table_type;
3548 char *sftr_pl;
3549 u16 index;
3550 int err;
3551
3552 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3553 if (!sftr_pl)
3554 return -ENOMEM;
3555
3556 table_type = mlxsw_sp_flood_table_type_get(fid);
3557 index = mlxsw_sp_flood_table_index_get(fid);
3558 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3559 1, MLXSW_PORT_ROUTER_PORT, set);
3560 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3561
3562 kfree(sftr_pl);
3563 return err;
3564}
3565
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003566static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3567{
3568 if (mlxsw_sp_fid_is_vfid(fid))
3569 return MLXSW_REG_RITR_FID_IF;
3570 else
3571 return MLXSW_REG_RITR_VLAN_IF;
3572}
3573
3574static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3575 struct net_device *l3_dev,
3576 u16 fid, u16 rif,
3577 bool create)
3578{
3579 enum mlxsw_reg_ritr_if_type rif_type;
3580 char ritr_pl[MLXSW_REG_RITR_LEN];
3581
3582 rif_type = mlxsw_sp_rif_type_get(fid);
3583 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3584 l3_dev->dev_addr);
3585 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3586
3587 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3588}
3589
3590static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3591 struct net_device *l3_dev,
3592 struct mlxsw_sp_fid *f)
3593{
3594 struct mlxsw_sp_rif *r;
3595 u16 rif;
3596 int err;
3597
3598 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
Nogah Frankel8f8a62d2016-09-20 11:16:57 +02003599 if (rif == MLXSW_SP_INVALID_RIF)
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003600 return -ERANGE;
3601
Ido Schimmelf888f582016-08-24 11:18:51 +02003602 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003603 if (err)
3604 return err;
3605
Ido Schimmelf888f582016-08-24 11:18:51 +02003606 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3607 if (err)
3608 goto err_rif_bridge_op;
3609
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003610 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3611 if (err)
3612 goto err_rif_fdb_op;
3613
3614 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3615 if (!r) {
3616 err = -ENOMEM;
3617 goto err_rif_alloc;
3618 }
3619
3620 f->r = r;
3621 mlxsw_sp->rifs[rif] = r;
3622
3623 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3624
3625 return 0;
3626
3627err_rif_alloc:
3628 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3629err_rif_fdb_op:
3630 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
Ido Schimmelf888f582016-08-24 11:18:51 +02003631err_rif_bridge_op:
3632 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003633 return err;
3634}
3635
3636void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3637 struct mlxsw_sp_rif *r)
3638{
3639 struct net_device *l3_dev = r->dev;
3640 struct mlxsw_sp_fid *f = r->f;
3641 u16 rif = r->rif;
3642
3643 mlxsw_sp->rifs[rif] = NULL;
3644 f->r = NULL;
3645
3646 kfree(r);
3647
3648 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3649
3650 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3651
Ido Schimmelf888f582016-08-24 11:18:51 +02003652 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3653
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003654 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3655}
3656
3657static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3658 struct net_device *br_dev,
3659 unsigned long event)
3660{
3661 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3662 struct mlxsw_sp_fid *f;
3663
3664 /* FID can either be an actual FID if the L3 device is the
3665 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3666 * L3 device is a VLAN-unaware bridge and we get a vFID.
3667 */
3668 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3669 if (WARN_ON(!f))
3670 return -EINVAL;
3671
3672 switch (event) {
3673 case NETDEV_UP:
3674 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3675 case NETDEV_DOWN:
3676 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3677 break;
3678 }
3679
3680 return 0;
3681}
3682
Ido Schimmel99724c12016-07-04 08:23:14 +02003683static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3684 unsigned long event)
3685{
3686 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003687 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
Ido Schimmel99724c12016-07-04 08:23:14 +02003688 u16 vid = vlan_dev_vlan_id(vlan_dev);
3689
3690 if (mlxsw_sp_port_dev_check(real_dev))
3691 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3692 vid);
3693 else if (netif_is_lag_master(real_dev))
3694 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3695 vid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003696 else if (netif_is_bridge_master(real_dev) &&
3697 mlxsw_sp->master_bridge.dev == real_dev)
3698 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3699 event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003700
3701 return 0;
3702}
3703
3704static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3705 unsigned long event, void *ptr)
3706{
3707 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3708 struct net_device *dev = ifa->ifa_dev->dev;
3709 struct mlxsw_sp *mlxsw_sp;
3710 struct mlxsw_sp_rif *r;
3711 int err = 0;
3712
3713 mlxsw_sp = mlxsw_sp_lower_get(dev);
3714 if (!mlxsw_sp)
3715 goto out;
3716
3717 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3718 if (!mlxsw_sp_rif_should_config(r, event))
3719 goto out;
3720
3721 if (mlxsw_sp_port_dev_check(dev))
3722 err = mlxsw_sp_inetaddr_port_event(dev, event);
3723 else if (netif_is_lag_master(dev))
3724 err = mlxsw_sp_inetaddr_lag_event(dev, event);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02003725 else if (netif_is_bridge_master(dev))
3726 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
Ido Schimmel99724c12016-07-04 08:23:14 +02003727 else if (is_vlan_dev(dev))
3728 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3729
3730out:
3731 return notifier_from_errno(err);
3732}
3733
Ido Schimmel6e095fd2016-07-04 08:23:13 +02003734static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3735 const char *mac, int mtu)
3736{
3737 char ritr_pl[MLXSW_REG_RITR_LEN];
3738 int err;
3739
3740 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3741 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3742 if (err)
3743 return err;
3744
3745 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3746 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3747 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3748 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3749}
3750
3751static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3752{
3753 struct mlxsw_sp *mlxsw_sp;
3754 struct mlxsw_sp_rif *r;
3755 int err;
3756
3757 mlxsw_sp = mlxsw_sp_lower_get(dev);
3758 if (!mlxsw_sp)
3759 return 0;
3760
3761 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3762 if (!r)
3763 return 0;
3764
3765 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3766 if (err)
3767 return err;
3768
3769 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3770 if (err)
3771 goto err_rif_edit;
3772
3773 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3774 if (err)
3775 goto err_rif_fdb_op;
3776
3777 ether_addr_copy(r->addr, dev->dev_addr);
3778 r->mtu = dev->mtu;
3779
3780 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3781
3782 return 0;
3783
3784err_rif_fdb_op:
3785 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3786err_rif_edit:
3787 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3788 return err;
3789}
3790
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003791static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3792 u16 fid)
3793{
3794 if (mlxsw_sp_fid_is_vfid(fid))
3795 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3796 else
3797 return test_bit(fid, lag_port->active_vlans);
3798}
3799
3800static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3801 u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003802{
3803 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003804 u8 local_port = mlxsw_sp_port->local_port;
3805 u16 lag_id = mlxsw_sp_port->lag_id;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003806 u64 max_lag_members;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003807 int i, count = 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003808
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003809 if (!mlxsw_sp_port->lagged)
3810 return true;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003811
Jiri Pirkoc1a38312016-10-21 16:07:23 +02003812 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
3813 MAX_LAG_MEMBERS);
3814 for (i = 0; i < max_lag_members; i++) {
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003815 struct mlxsw_sp_port *lag_port;
3816
3817 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3818 if (!lag_port || lag_port->local_port == local_port)
3819 continue;
3820 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3821 count++;
3822 }
3823
3824 return !count;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003825}
3826
3827static int
3828mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3829 u16 fid)
3830{
3831 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3832 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3833
3834 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3835 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3836 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3837 mlxsw_sp_port->local_port);
3838
Ido Schimmel22305372016-06-20 23:04:21 +02003839 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3840 mlxsw_sp_port->local_port, fid);
3841
Ido Schimmel039c49a2016-01-27 15:20:18 +01003842 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3843}
3844
3845static int
Ido Schimmel039c49a2016-01-27 15:20:18 +01003846mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3847 u16 fid)
3848{
3849 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3850 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3851
3852 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3853 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3854 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3855
Ido Schimmel22305372016-06-20 23:04:21 +02003856 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3857 mlxsw_sp_port->lag_id, fid);
3858
Ido Schimmel039c49a2016-01-27 15:20:18 +01003859 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3860}
3861
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003862int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
Ido Schimmel039c49a2016-01-27 15:20:18 +01003863{
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003864 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3865 return 0;
Ido Schimmel039c49a2016-01-27 15:20:18 +01003866
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003867 if (mlxsw_sp_port->lagged)
3868 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
Ido Schimmel039c49a2016-01-27 15:20:18 +01003869 fid);
3870 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003871 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
Ido Schimmel039c49a2016-01-27 15:20:18 +01003872}
3873
Ido Schimmel701b1862016-07-04 08:23:16 +02003874static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3875{
3876 struct mlxsw_sp_fid *f, *tmp;
3877
3878 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3879 if (--f->ref_count == 0)
3880 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3881 else
3882 WARN_ON_ONCE(1);
3883}
3884
Ido Schimmel7117a572016-06-20 23:04:06 +02003885static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3886 struct net_device *br_dev)
3887{
3888 return !mlxsw_sp->master_bridge.dev ||
3889 mlxsw_sp->master_bridge.dev == br_dev;
3890}
3891
3892static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3893 struct net_device *br_dev)
3894{
3895 mlxsw_sp->master_bridge.dev = br_dev;
3896 mlxsw_sp->master_bridge.ref_count++;
3897}
3898
3899static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3900{
Ido Schimmel701b1862016-07-04 08:23:16 +02003901 if (--mlxsw_sp->master_bridge.ref_count == 0) {
Ido Schimmel7117a572016-06-20 23:04:06 +02003902 mlxsw_sp->master_bridge.dev = NULL;
Ido Schimmel701b1862016-07-04 08:23:16 +02003903 /* It's possible upper VLAN devices are still holding
3904 * references to underlying FIDs. Drop the reference
3905 * and release the resources if it was the last one.
3906 * If it wasn't, then something bad happened.
3907 */
3908 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3909 }
Ido Schimmel7117a572016-06-20 23:04:06 +02003910}
3911
3912static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3913 struct net_device *br_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003914{
3915 struct net_device *dev = mlxsw_sp_port->dev;
3916 int err;
3917
3918 /* When port is not bridged untagged packets are tagged with
3919 * PVID=VID=1, thereby creating an implicit VLAN interface in
3920 * the device. Remove it and let bridge code take care of its
3921 * own VLANs.
3922 */
3923 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003924 if (err)
3925 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003926
Ido Schimmel7117a572016-06-20 23:04:06 +02003927 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3928
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003929 mlxsw_sp_port->learning = 1;
3930 mlxsw_sp_port->learning_sync = 1;
3931 mlxsw_sp_port->uc_flood = 1;
3932 mlxsw_sp_port->bridged = 1;
3933
3934 return 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003935}
3936
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02003937static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003938{
3939 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003940
Ido Schimmel28a01d22016-02-18 11:30:02 +01003941 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3942
Ido Schimmel7117a572016-06-20 23:04:06 +02003943 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3944
Ido Schimmel6c72a3d2016-01-04 10:42:26 +01003945 mlxsw_sp_port->learning = 0;
3946 mlxsw_sp_port->learning_sync = 0;
3947 mlxsw_sp_port->uc_flood = 0;
Ido Schimmel5a8f4522016-01-04 10:42:25 +01003948 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003949
3950 /* Add implicit VLAN interface in the device, so that untagged
3951 * packets will be classified to the default vFID.
3952 */
Ido Schimmel82e6db02016-06-20 23:04:04 +02003953 mlxsw_sp_port_add_vid(dev, 0, 1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003954}
3955
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003956static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02003957{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01003958 char sldr_pl[MLXSW_REG_SLDR_LEN];
3959
3960 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3961 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3962}
3963
3964static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3965{
3966 char sldr_pl[MLXSW_REG_SLDR_LEN];
3967
3968 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3969 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3970}
3971
3972static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3973 u16 lag_id, u8 port_index)
3974{
3975 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3976 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3977
3978 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3979 lag_id, port_index);
3980 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3981}
3982
3983static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3984 u16 lag_id)
3985{
3986 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3987 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3988
3989 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3990 lag_id);
3991 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3992}
3993
3994static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3995 u16 lag_id)
3996{
3997 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3998 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3999
4000 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
4001 lag_id);
4002 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4003}
4004
4005static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
4006 u16 lag_id)
4007{
4008 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4009 char slcor_pl[MLXSW_REG_SLCOR_LEN];
4010
4011 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
4012 lag_id);
4013 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
4014}
4015
4016static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4017 struct net_device *lag_dev,
4018 u16 *p_lag_id)
4019{
4020 struct mlxsw_sp_upper *lag;
4021 int free_lag_id = -1;
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004022 u64 max_lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004023 int i;
4024
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004025 max_lag = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_LAG);
4026 for (i = 0; i < max_lag; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004027 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
4028 if (lag->ref_count) {
4029 if (lag->dev == lag_dev) {
4030 *p_lag_id = i;
4031 return 0;
4032 }
4033 } else if (free_lag_id < 0) {
4034 free_lag_id = i;
4035 }
4036 }
4037 if (free_lag_id < 0)
4038 return -EBUSY;
4039 *p_lag_id = free_lag_id;
4040 return 0;
4041}
4042
4043static bool
4044mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
4045 struct net_device *lag_dev,
4046 struct netdev_lag_upper_info *lag_upper_info)
4047{
4048 u16 lag_id;
4049
4050 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
4051 return false;
4052 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
4053 return false;
4054 return true;
4055}
4056
4057static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
4058 u16 lag_id, u8 *p_port_index)
4059{
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004060 u64 max_lag_members;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004061 int i;
4062
Jiri Pirkoc1a38312016-10-21 16:07:23 +02004063 max_lag_members = MLXSW_CORE_RES_GET(mlxsw_sp->core,
4064 MAX_LAG_MEMBERS);
4065 for (i = 0; i < max_lag_members; i++) {
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004066 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
4067 *p_port_index = i;
4068 return 0;
4069 }
4070 }
4071 return -EBUSY;
4072}
4073
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004074static void
4075mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4076 u16 lag_id)
4077{
4078 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004079 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004080
4081 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4082 if (WARN_ON(!mlxsw_sp_vport))
4083 return;
4084
Ido Schimmel11943ff2016-07-02 11:00:12 +02004085 /* If vPort is assigned a RIF, then leave it since it's no
4086 * longer valid.
4087 */
4088 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4089 if (f)
4090 f->leave(mlxsw_sp_vport);
4091
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004092 mlxsw_sp_vport->lag_id = lag_id;
4093 mlxsw_sp_vport->lagged = 1;
4094}
4095
4096static void
4097mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
4098{
4099 struct mlxsw_sp_port *mlxsw_sp_vport;
Ido Schimmel11943ff2016-07-02 11:00:12 +02004100 struct mlxsw_sp_fid *f;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004101
4102 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
4103 if (WARN_ON(!mlxsw_sp_vport))
4104 return;
4105
Ido Schimmel11943ff2016-07-02 11:00:12 +02004106 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
4107 if (f)
4108 f->leave(mlxsw_sp_vport);
4109
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004110 mlxsw_sp_vport->lagged = 0;
4111}
4112
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004113static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
4114 struct net_device *lag_dev)
4115{
4116 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4117 struct mlxsw_sp_upper *lag;
4118 u16 lag_id;
4119 u8 port_index;
4120 int err;
4121
4122 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
4123 if (err)
4124 return err;
4125 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4126 if (!lag->ref_count) {
4127 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
4128 if (err)
4129 return err;
4130 lag->dev = lag_dev;
4131 }
4132
4133 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
4134 if (err)
4135 return err;
4136 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
4137 if (err)
4138 goto err_col_port_add;
4139 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
4140 if (err)
4141 goto err_col_port_enable;
4142
4143 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
4144 mlxsw_sp_port->local_port);
4145 mlxsw_sp_port->lag_id = lag_id;
4146 mlxsw_sp_port->lagged = 1;
4147 lag->ref_count++;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004148
4149 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
4150
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004151 return 0;
4152
Ido Schimmel51554db2016-05-06 22:18:39 +02004153err_col_port_enable:
4154 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004155err_col_port_add:
4156 if (!lag->ref_count)
4157 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004158 return err;
4159}
4160
Ido Schimmel82e6db02016-06-20 23:04:04 +02004161static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
4162 struct net_device *lag_dev)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004163{
4164 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004165 u16 lag_id = mlxsw_sp_port->lag_id;
Ido Schimmel1c800752016-06-20 23:04:20 +02004166 struct mlxsw_sp_upper *lag;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004167
4168 if (!mlxsw_sp_port->lagged)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004169 return;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004170 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
4171 WARN_ON(lag->ref_count == 0);
4172
Ido Schimmel82e6db02016-06-20 23:04:04 +02004173 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
4174 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004175
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004176 if (mlxsw_sp_port->bridged) {
4177 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004178 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01004179 }
4180
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004181 if (lag->ref_count == 1)
Ido Schimmel82e6db02016-06-20 23:04:04 +02004182 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004183
4184 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
4185 mlxsw_sp_port->local_port);
4186 mlxsw_sp_port->lagged = 0;
4187 lag->ref_count--;
Ido Schimmel86bf95b2016-07-02 11:00:11 +02004188
4189 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004190}
4191
Jiri Pirko74581202015-12-03 12:12:30 +01004192static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
4193 u16 lag_id)
4194{
4195 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4196 char sldr_pl[MLXSW_REG_SLDR_LEN];
4197
4198 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
4199 mlxsw_sp_port->local_port);
4200 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4201}
4202
4203static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
4204 u16 lag_id)
4205{
4206 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4207 char sldr_pl[MLXSW_REG_SLDR_LEN];
4208
4209 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
4210 mlxsw_sp_port->local_port);
4211 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
4212}
4213
4214static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
4215 bool lag_tx_enabled)
4216{
4217 if (lag_tx_enabled)
4218 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
4219 mlxsw_sp_port->lag_id);
4220 else
4221 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
4222 mlxsw_sp_port->lag_id);
4223}
4224
4225static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
4226 struct netdev_lag_lower_state_info *info)
4227{
4228 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
4229}
4230
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004231static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
4232 struct net_device *vlan_dev)
4233{
4234 struct mlxsw_sp_port *mlxsw_sp_vport;
4235 u16 vid = vlan_dev_vlan_id(vlan_dev);
4236
4237 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004238 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004239 return -EINVAL;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004240
4241 mlxsw_sp_vport->dev = vlan_dev;
4242
4243 return 0;
4244}
4245
Ido Schimmel82e6db02016-06-20 23:04:04 +02004246static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
4247 struct net_device *vlan_dev)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004248{
4249 struct mlxsw_sp_port *mlxsw_sp_vport;
4250 u16 vid = vlan_dev_vlan_id(vlan_dev);
4251
4252 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
Ido Schimmel423b9372016-06-20 23:04:03 +02004253 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel82e6db02016-06-20 23:04:04 +02004254 return;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004255
4256 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004257}
4258
Jiri Pirko74581202015-12-03 12:12:30 +01004259static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
4260 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004261{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004262 struct netdev_notifier_changeupper_info *info;
4263 struct mlxsw_sp_port *mlxsw_sp_port;
4264 struct net_device *upper_dev;
4265 struct mlxsw_sp *mlxsw_sp;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004266 int err = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004267
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004268 mlxsw_sp_port = netdev_priv(dev);
4269 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4270 info = ptr;
4271
4272 switch (event) {
4273 case NETDEV_PRECHANGEUPPER:
4274 upper_dev = info->upper_dev;
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004275 if (!is_vlan_dev(upper_dev) &&
4276 !netif_is_lag_master(upper_dev) &&
4277 !netif_is_bridge_master(upper_dev))
4278 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004279 if (!info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004280 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004281 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004282 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004283 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004284 return -EINVAL;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004285 if (netif_is_lag_master(upper_dev) &&
4286 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
4287 info->upper_info))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004288 return -EINVAL;
Ido Schimmel6ec43902016-06-20 23:04:01 +02004289 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4290 return -EINVAL;
4291 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4292 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4293 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004294 break;
4295 case NETDEV_CHANGEUPPER:
4296 upper_dev = info->upper_dev;
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004297 if (is_vlan_dev(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004298 if (info->linking)
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004299 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4300 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004301 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004302 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4303 upper_dev);
Ido Schimmel9589a7b52015-12-15 16:03:43 +01004304 } else if (netif_is_bridge_master(upper_dev)) {
Ido Schimmel7117a572016-06-20 23:04:06 +02004305 if (info->linking)
4306 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4307 upper_dev);
4308 else
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004309 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004310 } else if (netif_is_lag_master(upper_dev)) {
Ido Schimmel80bedf12016-06-20 23:03:59 +02004311 if (info->linking)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004312 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4313 upper_dev);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004314 else
Ido Schimmel82e6db02016-06-20 23:04:04 +02004315 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4316 upper_dev);
Ido Schimmel59fe9b32016-06-20 23:04:00 +02004317 } else {
4318 err = -EINVAL;
4319 WARN_ON(1);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004320 }
4321 break;
4322 }
4323
Ido Schimmel80bedf12016-06-20 23:03:59 +02004324 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004325}
4326
Jiri Pirko74581202015-12-03 12:12:30 +01004327static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4328 unsigned long event, void *ptr)
4329{
4330 struct netdev_notifier_changelowerstate_info *info;
4331 struct mlxsw_sp_port *mlxsw_sp_port;
4332 int err;
4333
4334 mlxsw_sp_port = netdev_priv(dev);
4335 info = ptr;
4336
4337 switch (event) {
4338 case NETDEV_CHANGELOWERSTATE:
4339 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4340 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4341 info->lower_state_info);
4342 if (err)
4343 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4344 }
4345 break;
4346 }
4347
Ido Schimmel80bedf12016-06-20 23:03:59 +02004348 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004349}
4350
4351static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4352 unsigned long event, void *ptr)
4353{
4354 switch (event) {
4355 case NETDEV_PRECHANGEUPPER:
4356 case NETDEV_CHANGEUPPER:
4357 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4358 case NETDEV_CHANGELOWERSTATE:
4359 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4360 }
4361
Ido Schimmel80bedf12016-06-20 23:03:59 +02004362 return 0;
Jiri Pirko74581202015-12-03 12:12:30 +01004363}
4364
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004365static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4366 unsigned long event, void *ptr)
4367{
4368 struct net_device *dev;
4369 struct list_head *iter;
4370 int ret;
4371
4372 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4373 if (mlxsw_sp_port_dev_check(dev)) {
4374 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004375 if (ret)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004376 return ret;
4377 }
4378 }
4379
Ido Schimmel80bedf12016-06-20 23:03:59 +02004380 return 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004381}
4382
Ido Schimmel701b1862016-07-04 08:23:16 +02004383static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4384 struct net_device *vlan_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004385{
Ido Schimmel701b1862016-07-04 08:23:16 +02004386 u16 fid = vlan_dev_vlan_id(vlan_dev);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004387 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004388
Ido Schimmel701b1862016-07-04 08:23:16 +02004389 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4390 if (!f) {
4391 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4392 if (IS_ERR(f))
4393 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004394 }
4395
Ido Schimmel701b1862016-07-04 08:23:16 +02004396 f->ref_count++;
4397
4398 return 0;
4399}
4400
4401static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4402 struct net_device *vlan_dev)
4403{
4404 u16 fid = vlan_dev_vlan_id(vlan_dev);
4405 struct mlxsw_sp_fid *f;
4406
4407 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004408 if (f && f->r)
4409 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel701b1862016-07-04 08:23:16 +02004410 if (f && --f->ref_count == 0)
4411 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4412}
4413
4414static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4415 unsigned long event, void *ptr)
4416{
4417 struct netdev_notifier_changeupper_info *info;
4418 struct net_device *upper_dev;
4419 struct mlxsw_sp *mlxsw_sp;
4420 int err;
4421
4422 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4423 if (!mlxsw_sp)
4424 return 0;
4425 if (br_dev != mlxsw_sp->master_bridge.dev)
4426 return 0;
4427
4428 info = ptr;
4429
4430 switch (event) {
4431 case NETDEV_CHANGEUPPER:
4432 upper_dev = info->upper_dev;
4433 if (!is_vlan_dev(upper_dev))
4434 break;
4435 if (info->linking) {
4436 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4437 upper_dev);
4438 if (err)
4439 return err;
4440 } else {
4441 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4442 }
4443 break;
4444 }
4445
4446 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004447}
4448
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004449static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004450{
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004451 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
Ido Schimmel99724c12016-07-04 08:23:14 +02004452 MLXSW_SP_VFID_MAX);
4453}
4454
4455static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
4456{
4457 char sfmr_pl[MLXSW_REG_SFMR_LEN];
4458
4459 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4460 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004461}
4462
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004463static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
Ido Schimmel1c800752016-06-20 23:04:20 +02004464
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004465static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4466 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004467{
4468 struct device *dev = mlxsw_sp->bus_info->dev;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004469 struct mlxsw_sp_fid *f;
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004470 u16 vfid, fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004471 int err;
4472
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004473 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004474 if (vfid == MLXSW_SP_VFID_MAX) {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004475 dev_err(dev, "No available vFIDs\n");
4476 return ERR_PTR(-ERANGE);
4477 }
4478
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004479 fid = mlxsw_sp_vfid_to_fid(vfid);
4480 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004481 if (err) {
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004482 dev_err(dev, "Failed to create FID=%d\n", fid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004483 return ERR_PTR(err);
4484 }
4485
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004486 f = kzalloc(sizeof(*f), GFP_KERNEL);
4487 if (!f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004488 goto err_allocate_vfid;
4489
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004490 f->leave = mlxsw_sp_vport_vfid_leave;
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004491 f->fid = fid;
4492 f->dev = br_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004493
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004494 list_add(&f->list, &mlxsw_sp->vfids.list);
4495 set_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004496
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004497 return f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004498
4499err_allocate_vfid:
Ido Schimmelc7e920b2016-06-20 23:04:09 +02004500 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004501 return ERR_PTR(-ENOMEM);
4502}
4503
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004504static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4505 struct mlxsw_sp_fid *f)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004506{
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004507 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004508 u16 fid = f->fid;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004509
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004510 clear_bit(vfid, mlxsw_sp->vfids.mapped);
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004511 list_del(&f->list);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004512
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004513 if (f->r)
4514 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004515
Ido Schimmeld0ec8752016-06-20 23:04:12 +02004516 kfree(f);
Ido Schimmel99f44bb2016-07-04 08:23:17 +02004517
4518 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004519}
4520
Ido Schimmel99724c12016-07-04 08:23:14 +02004521static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4522 bool valid)
4523{
4524 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4525 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4526
4527 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4528 vid);
4529}
4530
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004531static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4532 struct net_device *br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004533{
Ido Schimmel0355b592016-06-20 23:04:13 +02004534 struct mlxsw_sp_fid *f;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004535 int err;
4536
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004537 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004538 if (!f) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004539 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
Ido Schimmel0355b592016-06-20 23:04:13 +02004540 if (IS_ERR(f))
4541 return PTR_ERR(f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004542 }
4543
Ido Schimmel0355b592016-06-20 23:04:13 +02004544 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4545 if (err)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004546 goto err_vport_flood_set;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004547
Ido Schimmel0355b592016-06-20 23:04:13 +02004548 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4549 if (err)
4550 goto err_vport_fid_map;
Ido Schimmel6a9863a2016-02-15 13:19:54 +01004551
Ido Schimmel41b996c2016-06-20 23:04:17 +02004552 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004553 f->ref_count++;
Ido Schimmel039c49a2016-01-27 15:20:18 +01004554
Ido Schimmel22305372016-06-20 23:04:21 +02004555 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4556
Ido Schimmel0355b592016-06-20 23:04:13 +02004557 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004558
Ido Schimmel9c4d4422016-06-20 23:04:10 +02004559err_vport_fid_map:
Ido Schimmel0355b592016-06-20 23:04:13 +02004560 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4561err_vport_flood_set:
4562 if (!f->ref_count)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004563 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel0355b592016-06-20 23:04:13 +02004564 return err;
4565}
4566
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004567static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004568{
Ido Schimmel41b996c2016-06-20 23:04:17 +02004569 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004570
Ido Schimmel22305372016-06-20 23:04:21 +02004571 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4572
Ido Schimmel0355b592016-06-20 23:04:13 +02004573 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
4574
4575 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4576
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004577 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4578
Ido Schimmel41b996c2016-06-20 23:04:17 +02004579 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
Ido Schimmel0355b592016-06-20 23:04:13 +02004580 if (--f->ref_count == 0)
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004581 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004582}
4583
4584static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4585 struct net_device *br_dev)
4586{
Ido Schimmel99724c12016-07-04 08:23:14 +02004587 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004588 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4589 struct net_device *dev = mlxsw_sp_vport->dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004590 int err;
4591
Ido Schimmel99724c12016-07-04 08:23:14 +02004592 if (f && !WARN_ON(!f->leave))
4593 f->leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004594
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004595 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004596 if (err) {
Ido Schimmel0355b592016-06-20 23:04:13 +02004597 netdev_err(dev, "Failed to join vFID\n");
Ido Schimmel99724c12016-07-04 08:23:14 +02004598 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004599 }
4600
4601 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4602 if (err) {
4603 netdev_err(dev, "Failed to enable learning\n");
4604 goto err_port_vid_learning_set;
4605 }
4606
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004607 mlxsw_sp_vport->learning = 1;
4608 mlxsw_sp_vport->learning_sync = 1;
4609 mlxsw_sp_vport->uc_flood = 1;
4610 mlxsw_sp_vport->bridged = 1;
4611
4612 return 0;
4613
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004614err_port_vid_learning_set:
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004615 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004616 return err;
4617}
4618
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004619static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
Ido Schimmel0355b592016-06-20 23:04:13 +02004620{
4621 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004622
4623 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4624
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004625 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
Ido Schimmel0355b592016-06-20 23:04:13 +02004626
Ido Schimmel0355b592016-06-20 23:04:13 +02004627 mlxsw_sp_vport->learning = 0;
4628 mlxsw_sp_vport->learning_sync = 0;
4629 mlxsw_sp_vport->uc_flood = 0;
4630 mlxsw_sp_vport->bridged = 0;
4631}
4632
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004633static bool
4634mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4635 const struct net_device *br_dev)
4636{
4637 struct mlxsw_sp_port *mlxsw_sp_vport;
4638
4639 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4640 vport.list) {
Ido Schimmel3ba2ebf2016-07-04 08:23:15 +02004641 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
Ido Schimmel56918b62016-06-20 23:04:18 +02004642
4643 if (dev && dev == br_dev)
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004644 return false;
4645 }
4646
4647 return true;
4648}
4649
4650static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4651 unsigned long event, void *ptr,
4652 u16 vid)
4653{
4654 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4655 struct netdev_notifier_changeupper_info *info = ptr;
4656 struct mlxsw_sp_port *mlxsw_sp_vport;
4657 struct net_device *upper_dev;
Ido Schimmel80bedf12016-06-20 23:03:59 +02004658 int err = 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004659
4660 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4661
4662 switch (event) {
4663 case NETDEV_PRECHANGEUPPER:
4664 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004665 if (!netif_is_bridge_master(upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004666 return -EINVAL;
Ido Schimmelddbe9932016-06-20 23:04:02 +02004667 if (!info->linking)
4668 break;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004669 /* We can't have multiple VLAN interfaces configured on
4670 * the same port and being members in the same bridge.
4671 */
4672 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4673 upper_dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004674 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004675 break;
4676 case NETDEV_CHANGEUPPER:
4677 upper_dev = info->upper_dev;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004678 if (info->linking) {
Ido Schimmel423b9372016-06-20 23:04:03 +02004679 if (WARN_ON(!mlxsw_sp_vport))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004680 return -EINVAL;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004681 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4682 upper_dev);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004683 } else {
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004684 if (!mlxsw_sp_vport)
Ido Schimmel80bedf12016-06-20 23:03:59 +02004685 return 0;
Ido Schimmelfe3f6d12016-06-20 23:04:19 +02004686 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004687 }
4688 }
4689
Ido Schimmel80bedf12016-06-20 23:03:59 +02004690 return err;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004691}
4692
Ido Schimmel272c4472015-12-15 16:03:47 +01004693static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4694 unsigned long event, void *ptr,
4695 u16 vid)
4696{
4697 struct net_device *dev;
4698 struct list_head *iter;
4699 int ret;
4700
4701 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4702 if (mlxsw_sp_port_dev_check(dev)) {
4703 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4704 vid);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004705 if (ret)
Ido Schimmel272c4472015-12-15 16:03:47 +01004706 return ret;
4707 }
4708 }
4709
Ido Schimmel80bedf12016-06-20 23:03:59 +02004710 return 0;
Ido Schimmel272c4472015-12-15 16:03:47 +01004711}
4712
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004713static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4714 unsigned long event, void *ptr)
4715{
4716 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4717 u16 vid = vlan_dev_vlan_id(vlan_dev);
4718
Ido Schimmel272c4472015-12-15 16:03:47 +01004719 if (mlxsw_sp_port_dev_check(real_dev))
4720 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4721 vid);
4722 else if (netif_is_lag_master(real_dev))
4723 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4724 vid);
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004725
Ido Schimmel80bedf12016-06-20 23:03:59 +02004726 return 0;
Ido Schimmel26f0e7f2015-12-15 16:03:44 +01004727}
4728
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004729static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4730 unsigned long event, void *ptr)
4731{
4732 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004733 int err = 0;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004734
Ido Schimmel6e095fd2016-07-04 08:23:13 +02004735 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4736 err = mlxsw_sp_netdevice_router_port_event(dev);
4737 else if (mlxsw_sp_port_dev_check(dev))
Ido Schimmel80bedf12016-06-20 23:03:59 +02004738 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4739 else if (netif_is_lag_master(dev))
4740 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
Ido Schimmel701b1862016-07-04 08:23:16 +02004741 else if (netif_is_bridge_master(dev))
4742 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
Ido Schimmel80bedf12016-06-20 23:03:59 +02004743 else if (is_vlan_dev(dev))
4744 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004745
Ido Schimmel80bedf12016-06-20 23:03:59 +02004746 return notifier_from_errno(err);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01004747}
4748
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004749static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4750 .notifier_call = mlxsw_sp_netdevice_event,
4751};
4752
Ido Schimmel99724c12016-07-04 08:23:14 +02004753static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4754 .notifier_call = mlxsw_sp_inetaddr_event,
4755 .priority = 10, /* Must be called before FIB notifier block */
4756};
4757
Jiri Pirkoe7322632016-09-01 10:37:43 +02004758static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4759 .notifier_call = mlxsw_sp_router_netevent_event,
4760};
4761
Jiri Pirko1d20d232016-10-27 15:12:59 +02004762static const struct pci_device_id mlxsw_sp_pci_id_table[] = {
4763 {PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
4764 {0, },
4765};
4766
4767static struct pci_driver mlxsw_sp_pci_driver = {
4768 .name = mlxsw_sp_driver_name,
4769 .id_table = mlxsw_sp_pci_id_table,
4770};
4771
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004772static int __init mlxsw_sp_module_init(void)
4773{
4774 int err;
4775
4776 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004777 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004778 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4779
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004780 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4781 if (err)
4782 goto err_core_driver_register;
Jiri Pirko1d20d232016-10-27 15:12:59 +02004783
4784 err = mlxsw_pci_driver_register(&mlxsw_sp_pci_driver);
4785 if (err)
4786 goto err_pci_driver_register;
4787
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004788 return 0;
4789
Jiri Pirko1d20d232016-10-27 15:12:59 +02004790err_pci_driver_register:
4791 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004792err_core_driver_register:
Jiri Pirkoe7322632016-09-01 10:37:43 +02004793 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Jiri Pirkode7d6292016-09-01 10:37:42 +02004794 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004795 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4796 return err;
4797}
4798
4799static void __exit mlxsw_sp_module_exit(void)
4800{
Jiri Pirko1d20d232016-10-27 15:12:59 +02004801 mlxsw_pci_driver_unregister(&mlxsw_sp_pci_driver);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004802 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
Jiri Pirkoe7322632016-09-01 10:37:43 +02004803 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
Ido Schimmel99724c12016-07-04 08:23:14 +02004804 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02004805 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4806}
4807
4808module_init(mlxsw_sp_module_init);
4809module_exit(mlxsw_sp_module_exit);
4810
4811MODULE_LICENSE("Dual BSD/GPL");
4812MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4813MODULE_DESCRIPTION("Mellanox Spectrum driver");
Jiri Pirko1d20d232016-10-27 15:12:59 +02004814MODULE_DEVICE_TABLE(pci, mlxsw_sp_pci_id_table);