blob: 5f6dfb86e43e820808435670f13099991128d23d [file] [log] [blame]
Wolfram Sangf7070792018-08-22 00:02:17 +02001/* SPDX-License-Identifier: GPL-2.0 */
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +01002/*
Simon Hormanb21f13d2017-05-10 11:25:25 +02003 * Driver for the MMC / SD / SDIO cell found in:
4 *
5 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +01006 *
Simon Horman87317c42017-05-30 14:50:52 +02007 * Copyright (C) 2015-17 Renesas Electronics Corporation
8 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
9 * Copyright (C) 2016-17 Horms Solutions, Simon Horman
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +010010 * Copyright (C) 2007 Ian Molton
11 * Copyright (C) 2004 Ian Molton
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +010012 */
13
14#ifndef TMIO_MMC_H
15#define TMIO_MMC_H
16
Kuninori Morimoto361936e2015-01-13 04:59:14 +000017#include <linux/dmaengine.h>
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +010018#include <linux/highmem.h>
Guennadi Liakhovetskib9269fd2011-07-14 12:12:38 +020019#include <linux/mutex.h>
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +010020#include <linux/pagemap.h>
Rafael J. Wysocki6c0cbef2011-07-26 20:50:23 +020021#include <linux/scatterlist.h>
Guennadi Liakhovetskie3de2be2012-01-06 13:06:51 +010022#include <linux/spinlock.h>
Ulf Hanssonb8789ec2016-12-30 13:47:23 +010023#include <linux/interrupt.h>
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +010024
Wolfram Sangac860452016-04-26 17:55:26 +020025#define CTL_SD_CMD 0x00
26#define CTL_ARG_REG 0x04
27#define CTL_STOP_INTERNAL_ACTION 0x08
28#define CTL_XFER_BLK_COUNT 0xa
29#define CTL_RESPONSE 0x0c
Wolfram Sang184adf22016-04-27 18:51:27 +020030/* driver merges STATUS and following STATUS2 */
Wolfram Sangac860452016-04-26 17:55:26 +020031#define CTL_STATUS 0x1c
Wolfram Sang184adf22016-04-27 18:51:27 +020032/* driver merges IRQ_MASK and following IRQ_MASK2 */
Wolfram Sangac860452016-04-26 17:55:26 +020033#define CTL_IRQ_MASK 0x20
34#define CTL_SD_CARD_CLK_CTL 0x24
35#define CTL_SD_XFER_LEN 0x26
36#define CTL_SD_MEM_CARD_OPT 0x28
37#define CTL_SD_ERROR_DETAIL_STATUS 0x2c
38#define CTL_SD_DATA_PORT 0x30
39#define CTL_TRANSACTION_CTL 0x34
40#define CTL_SDIO_STATUS 0x36
41#define CTL_SDIO_IRQ_MASK 0x38
42#define CTL_DMA_ENABLE 0xd8
43#define CTL_RESET_SD 0xe0
44#define CTL_VERSION 0xe2
Masaharu Hayakawadb924bb2018-06-18 14:57:50 +020045#define CTL_SDIF_MODE 0xe6
Wolfram Sangac860452016-04-26 17:55:26 +020046
Wolfram Sang9afcbf42017-03-14 11:09:16 +010047/* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */
48#define TMIO_STOP_STP BIT(0)
49#define TMIO_STOP_SEC BIT(8)
50
Wolfram Sangd8acd162017-03-14 11:09:17 +010051/* Definitions for values the CTL_STATUS register can take */
Wolfram Sang2cafc5c2016-04-27 18:51:24 +020052#define TMIO_STAT_CMDRESPEND BIT(0)
53#define TMIO_STAT_DATAEND BIT(2)
54#define TMIO_STAT_CARD_REMOVE BIT(3)
55#define TMIO_STAT_CARD_INSERT BIT(4)
56#define TMIO_STAT_SIGSTATE BIT(5)
57#define TMIO_STAT_WRPROTECT BIT(7)
58#define TMIO_STAT_CARD_REMOVE_A BIT(8)
59#define TMIO_STAT_CARD_INSERT_A BIT(9)
60#define TMIO_STAT_SIGSTATE_A BIT(10)
61
Wolfram Sangd8acd162017-03-14 11:09:17 +010062/* These belong technically to CTL_STATUS2, but the driver merges them */
Wolfram Sang2cafc5c2016-04-27 18:51:24 +020063#define TMIO_STAT_CMD_IDX_ERR BIT(16)
64#define TMIO_STAT_CRCFAIL BIT(17)
65#define TMIO_STAT_STOPBIT_ERR BIT(18)
66#define TMIO_STAT_DATATIMEOUT BIT(19)
67#define TMIO_STAT_RXOVERFLOW BIT(20)
68#define TMIO_STAT_TXUNDERRUN BIT(21)
69#define TMIO_STAT_CMDTIMEOUT BIT(22)
Wolfram Sang83e95352016-04-27 18:51:25 +020070#define TMIO_STAT_DAT0 BIT(23) /* only known on R-Car so far */
Wolfram Sang2cafc5c2016-04-27 18:51:24 +020071#define TMIO_STAT_RXRDY BIT(24)
72#define TMIO_STAT_TXRQ BIT(25)
Wolfram Sanga21553c2016-04-27 18:51:26 +020073#define TMIO_STAT_ILL_FUNC BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */
74#define TMIO_STAT_SCLKDIVEN BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */
Wolfram Sang2cafc5c2016-04-27 18:51:24 +020075#define TMIO_STAT_CMD_BUSY BIT(30)
76#define TMIO_STAT_ILL_ACCESS BIT(31)
Wolfram Sangac860452016-04-26 17:55:26 +020077
Wolfram Sangc78e16942017-06-30 12:56:47 +020078/* Definitions for values the CTL_SD_CARD_CLK_CTL register can take */
Wolfram Sangac860452016-04-26 17:55:26 +020079#define CLK_CTL_DIV_MASK 0xff
80#define CLK_CTL_SCLKEN BIT(8)
81
Wolfram Sangc78e16942017-06-30 12:56:47 +020082/* Definitions for values the CTL_SD_MEM_CARD_OPT register can take */
Wolfram Sang0bc0b6e2016-09-19 22:57:48 +020083#define CARD_OPT_WIDTH8 BIT(13)
84#define CARD_OPT_WIDTH BIT(15)
85
Wolfram Sangd8acd162017-03-14 11:09:17 +010086/* Definitions for values the CTL_SDIO_STATUS register can take */
Simon Hormancba179a2011-03-24 09:48:36 +010087#define TMIO_SDIO_STAT_IOIRQ 0x0001
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +010088#define TMIO_SDIO_STAT_EXPUB52 0x4000
Simon Hormancba179a2011-03-24 09:48:36 +010089#define TMIO_SDIO_STAT_EXWT 0x8000
90#define TMIO_SDIO_MASK_ALL 0xc007
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +010091
Wolfram Sangee289812017-01-19 21:07:18 +010092#define TMIO_SDIO_SETBITS_MASK 0x0006
93
Wolfram Sang5af02d32017-06-30 12:56:48 +020094/* Definitions for values the CTL_DMA_ENABLE register can take */
95#define DMA_ENABLE_DMASDRW BIT(1)
96
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +010097/* Define some IRQ masks */
98/* This is the mask used at reset by the chip */
Niklas Söderlund202367c2018-11-26 18:02:47 +010099#define TMIO_MASK_INIT_RCAR2 0x8b7f031d /* Initial value for R-Car Gen2+ */
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +0100100#define TMIO_MASK_ALL 0x837f031d
101#define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
102#define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
103#define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
104 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
105#define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
106
107struct tmio_mmc_data;
Kuninori Morimoto5add2ac2015-01-13 04:59:05 +0000108struct tmio_mmc_host;
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +0100109
Simon Horman631fa732017-05-10 11:25:26 +0200110struct tmio_mmc_dma_ops {
111 void (*start)(struct tmio_mmc_host *host, struct mmc_data *data);
112 void (*enable)(struct tmio_mmc_host *host, bool enable);
113 void (*request)(struct tmio_mmc_host *host,
114 struct tmio_mmc_data *pdata);
115 void (*release)(struct tmio_mmc_host *host);
116 void (*abort)(struct tmio_mmc_host *host);
Simon Horman92d0f925e2017-06-21 16:00:28 +0200117 void (*dataend)(struct tmio_mmc_host *host);
Simon Horman631fa732017-05-10 11:25:26 +0200118};
119
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +0100120struct tmio_mmc_host {
121 void __iomem *ctl;
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +0100122 struct mmc_command *cmd;
123 struct mmc_request *mrq;
124 struct mmc_data *data;
125 struct mmc_host *mmc;
Masahiro Yamadac055fc72017-11-25 01:24:41 +0900126 struct mmc_host_ops ops;
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +0100127
128 /* Callbacks for clock / power control */
129 void (*set_pwr)(struct platform_device *host, int state);
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +0100130
131 /* pio related stuff */
132 struct scatterlist *sg_ptr;
133 struct scatterlist *sg_orig;
134 unsigned int sg_len;
135 unsigned int sg_off;
Masahiro Yamadac4ba0e42017-11-25 01:24:50 +0900136 unsigned int bus_shift;
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +0100137
138 struct platform_device *pdev;
139 struct tmio_mmc_data *pdata;
140
141 /* DMA support */
Masahiro Yamadad3dd5db2018-10-13 00:03:08 +0900142 bool dma_on;
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +0100143 struct dma_chan *chan_rx;
144 struct dma_chan *chan_tx;
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +0100145 struct tasklet_struct dma_issue;
146 struct scatterlist bounce_sg;
147 u8 *bounce_buf;
148
149 /* Track lost interrupts */
150 struct delayed_work delayed_reset_work;
Guennadi Liakhovetskib9269fd2011-07-14 12:12:38 +0200151 struct work_struct done;
152
Ulf Hanssonae12d252013-10-30 00:16:17 +0100153 /* Cache */
Simon Horman54680fe2011-08-25 10:27:25 +0900154 u32 sdcard_irq_mask;
155 u32 sdio_irq_mask;
Ulf Hanssonae12d252013-10-30 00:16:17 +0100156 unsigned int clk_cache;
Simon Horman54680fe2011-08-25 10:27:25 +0900157
Guennadi Liakhovetskib9269fd2011-07-14 12:12:38 +0200158 spinlock_t lock; /* protect host private data */
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +0100159 unsigned long last_req_ts;
Guennadi Liakhovetskib9269fd2011-07-14 12:12:38 +0200160 struct mutex ios_lock; /* protect set_ios() context */
Guennadi Liakhovetski2b1ac5c2012-02-09 22:57:08 +0100161 bool native_hotplug;
Ulf Hansson7501c432013-10-24 15:58:45 +0200162 bool sdio_irq_enabled;
Kuninori Morimotodfe9a222015-01-13 04:57:42 +0000163
Simon Horman2f873652016-11-03 15:16:01 +0100164 /* Mandatory callback */
Ben Hutchings0ea28212016-04-01 17:44:31 +0200165 int (*clk_enable)(struct tmio_mmc_host *host);
Masahiro Yamada0196c8d2018-08-23 13:44:16 +0900166 void (*set_clock)(struct tmio_mmc_host *host, unsigned int clock);
Simon Horman2f873652016-11-03 15:16:01 +0100167
168 /* Optional callbacks */
Ben Hutchings0ea28212016-04-01 17:44:31 +0200169 void (*clk_disable)(struct tmio_mmc_host *host);
Kuninori Morimoto85c02dd2015-01-13 04:58:10 +0000170 int (*multi_io_quirk)(struct mmc_card *card,
171 unsigned int direction, int blk_size);
Simon Horman2f873652016-11-03 15:16:01 +0100172 int (*write16_hook)(struct tmio_mmc_host *host, int addr);
Masahiro Yamadaacb9fce2018-10-10 12:51:31 +0900173 void (*reset)(struct tmio_mmc_host *host);
Ai Kyusee8f36b52016-11-03 15:16:02 +0100174 void (*hw_reset)(struct tmio_mmc_host *host);
Ai Kyuse4f119972016-11-03 15:16:03 +0100175 void (*prepare_tuning)(struct tmio_mmc_host *host, unsigned long tap);
176 bool (*check_scc_error)(struct tmio_mmc_host *host);
177
178 /*
179 * Mandatory callback for tuning to occur which is optional for SDR50
180 * and mandatory for SDR104.
181 */
182 unsigned int (*init_tuning)(struct tmio_mmc_host *host);
183 int (*select_tuning)(struct tmio_mmc_host *host);
184
185 /* Tuning values: 1 for success, 0 for failure */
186 DECLARE_BITMAP(taps, BITS_PER_BYTE * sizeof(long));
187 unsigned int tap_num;
Masaharu Hayakawadb924bb2018-06-18 14:57:50 +0200188 unsigned long tap_set;
189
190 void (*prepare_hs400_tuning)(struct tmio_mmc_host *host);
191 void (*hs400_downgrade)(struct tmio_mmc_host *host);
192 void (*hs400_complete)(struct tmio_mmc_host *host);
Simon Horman631fa732017-05-10 11:25:26 +0200193
194 const struct tmio_mmc_dma_ops *dma_ops;
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +0100195};
196
Masahiro Yamadab21fc292018-01-18 01:28:02 +0900197struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
198 struct tmio_mmc_data *pdata);
Kuninori Morimoto94b110a2015-01-13 04:57:22 +0000199void tmio_mmc_host_free(struct tmio_mmc_host *host);
Masahiro Yamadabc457192018-01-18 01:28:04 +0900200int tmio_mmc_host_probe(struct tmio_mmc_host *host);
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +0100201void tmio_mmc_host_remove(struct tmio_mmc_host *host);
202void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
203
204void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
205void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
Magnus Damm8e7bfdb2011-05-06 11:02:33 +0000206irqreturn_t tmio_mmc_irq(int irq, void *devid);
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +0100207
208static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
209 unsigned long *flags)
210{
211 local_irq_save(*flags);
Cong Wang482fce92011-11-27 13:27:00 +0800212 return kmap_atomic(sg_page(sg)) + sg->offset;
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +0100213}
214
215static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
216 unsigned long *flags, void *virt)
217{
Cong Wang482fce92011-11-27 13:27:00 +0800218 kunmap_atomic(virt - sg->offset);
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +0100219 local_irq_restore(*flags);
220}
221
Ulf Hansson9ade7db2014-08-25 12:03:20 +0200222#ifdef CONFIG_PM
Guennadi Liakhovetski7311bef2011-05-11 16:51:11 +0000223int tmio_mmc_host_runtime_suspend(struct device *dev);
224int tmio_mmc_host_runtime_resume(struct device *dev);
Ulf Hansson710dec92013-10-23 14:55:07 +0200225#endif
Guennadi Liakhovetski7311bef2011-05-11 16:51:11 +0000226
Simon Hormana11862d2011-06-21 08:00:09 +0900227static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
228{
Wolfram Sangd63da8c2017-12-19 14:34:03 +0100229 return ioread16(host->ctl + (addr << host->bus_shift));
Simon Hormana11862d2011-06-21 08:00:09 +0900230}
231
232static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
Simon Hormanf2218db2017-06-16 18:11:03 +0200233 u16 *buf, int count)
Simon Hormana11862d2011-06-21 08:00:09 +0900234{
Wolfram Sang0c36fc0d2017-12-18 01:00:21 +0100235 ioread16_rep(host->ctl + (addr << host->bus_shift), buf, count);
Simon Hormana11862d2011-06-21 08:00:09 +0900236}
237
Simon Hormanf2218db2017-06-16 18:11:03 +0200238static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host,
239 int addr)
Simon Hormana11862d2011-06-21 08:00:09 +0900240{
Wolfram Sangd63da8c2017-12-19 14:34:03 +0100241 return ioread16(host->ctl + (addr << host->bus_shift)) |
242 ioread16(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
Simon Hormana11862d2011-06-21 08:00:09 +0900243}
244
Chris Brandt8185e512016-09-12 10:15:06 -0400245static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr,
Simon Hormanf2218db2017-06-16 18:11:03 +0200246 u32 *buf, int count)
Chris Brandt8185e512016-09-12 10:15:06 -0400247{
Wolfram Sang0c36fc0d2017-12-18 01:00:21 +0100248 ioread32_rep(host->ctl + (addr << host->bus_shift), buf, count);
Chris Brandt8185e512016-09-12 10:15:06 -0400249}
250
Simon Hormanf2218db2017-06-16 18:11:03 +0200251static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
252 u16 val)
Simon Hormana11862d2011-06-21 08:00:09 +0900253{
Simon Horman973ed3a2011-06-21 08:00:10 +0900254 /* If there is a hook and it returns non-zero then there
255 * is an error and the write should be skipped
256 */
Kuninori Morimotodfe9a222015-01-13 04:57:42 +0000257 if (host->write16_hook && host->write16_hook(host, addr))
Simon Horman973ed3a2011-06-21 08:00:10 +0900258 return;
Wolfram Sangd63da8c2017-12-19 14:34:03 +0100259 iowrite16(val, host->ctl + (addr << host->bus_shift));
Simon Hormana11862d2011-06-21 08:00:09 +0900260}
261
262static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
Simon Hormanf2218db2017-06-16 18:11:03 +0200263 u16 *buf, int count)
Simon Hormana11862d2011-06-21 08:00:09 +0900264{
Wolfram Sang0c36fc0d2017-12-18 01:00:21 +0100265 iowrite16_rep(host->ctl + (addr << host->bus_shift), buf, count);
Simon Hormana11862d2011-06-21 08:00:09 +0900266}
267
Simon Hormanf2218db2017-06-16 18:11:03 +0200268static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host,
269 int addr, u32 val)
Simon Hormana11862d2011-06-21 08:00:09 +0900270{
Wolfram Sangd63da8c2017-12-19 14:34:03 +0100271 iowrite16(val & 0xffff, host->ctl + (addr << host->bus_shift));
272 iowrite16(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
Simon Hormana11862d2011-06-21 08:00:09 +0900273}
274
Chris Brandt8185e512016-09-12 10:15:06 -0400275static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr,
Simon Hormanf2218db2017-06-16 18:11:03 +0200276 const u32 *buf, int count)
Chris Brandt8185e512016-09-12 10:15:06 -0400277{
Wolfram Sang0c36fc0d2017-12-18 01:00:21 +0100278 iowrite32_rep(host->ctl + (addr << host->bus_shift), buf, count);
Chris Brandt8185e512016-09-12 10:15:06 -0400279}
280
Guennadi Liakhovetskib6147492011-03-23 12:42:44 +0100281#endif