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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001// SPDX-License-Identifier: GPL-2.0
Paul Burton0752f922015-05-24 16:11:47 +01002/dts-v1/;
3
4#include "jz4780.dtsi"
Paul Cercueil157c8872019-07-24 13:16:13 -04005#include <dt-bindings/clock/ingenic,tcu.h>
Harvey Hunt8fec5532017-07-07 17:12:08 +01006#include <dt-bindings/gpio/gpio.h>
H. Nikolaus Schaller130ab8812020-03-06 18:28:30 +01007#include <dt-bindings/interrupt-controller/irq.h>
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +01008#include <dt-bindings/regulator/active-semi,8865-regulator.h>
Paul Burton0752f922015-05-24 16:11:47 +01009
10/ {
11 compatible = "img,ci20", "ingenic,jz4780";
12
13 aliases {
14 serial0 = &uart0;
15 serial1 = &uart1;
16 serial3 = &uart3;
17 serial4 = &uart4;
18 };
19
20 chosen {
21 stdout-path = &uart4;
22 };
23
24 memory {
25 device_type = "memory";
26 reg = <0x0 0x10000000
27 0x30000000 0x30000000>;
28 };
Harvey Hunt8fec5532017-07-07 17:12:08 +010029
Alexandre GRIVEAUX24b0cb42019-10-01 21:09:30 +020030 leds {
31 compatible = "gpio-leds";
32
33 led0 {
34 label = "ci20:red:led0";
35 gpios = <&gpc 3 GPIO_ACTIVE_HIGH>;
36 linux,default-trigger = "none";
37 };
38
39 led1 {
40 label = "ci20:red:led1";
41 gpios = <&gpc 2 GPIO_ACTIVE_HIGH>;
42 linux,default-trigger = "nand-disk";
43 };
44
45 led2 {
46 label = "ci20:red:led2";
47 gpios = <&gpc 1 GPIO_ACTIVE_HIGH>;
48 linux,default-trigger = "cpu1";
49 };
50
51 led3 {
52 label = "ci20:red:led3";
53 gpios = <&gpc 0 GPIO_ACTIVE_HIGH>;
54 linux,default-trigger = "cpu0";
55 };
56 };
57
Harvey Hunt8fec5532017-07-07 17:12:08 +010058 eth0_power: fixedregulator@0 {
59 compatible = "regulator-fixed";
60 regulator-name = "eth0_power";
61 gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
62 enable-active-high;
63 };
Alexandre GRIVEAUX948f2702019-10-01 21:09:14 +020064
65 wlan0_power: fixedregulator@1 {
66 compatible = "regulator-fixed";
67 regulator-name = "wlan0_power";
68 gpio = <&gpb 19 GPIO_ACTIVE_LOW>;
69 enable-active-high;
70 };
Paul Burton0752f922015-05-24 16:11:47 +010071};
72
73&ext {
74 clock-frequency = <48000000>;
75};
76
Ezequiel Garcia671963b2018-03-28 18:00:55 -030077&mmc0 {
78 status = "okay";
79
80 bus-width = <4>;
81 max-frequency = <50000000>;
82
83 pinctrl-names = "default";
84 pinctrl-0 = <&pins_mmc0>;
85
86 cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>;
87};
88
89&mmc1 {
90 status = "okay";
91
92 bus-width = <4>;
93 max-frequency = <50000000>;
Alexandre GRIVEAUX948f2702019-10-01 21:09:14 +020094 non-removable;
Ezequiel Garcia671963b2018-03-28 18:00:55 -030095
96 pinctrl-names = "default";
97 pinctrl-0 = <&pins_mmc1>;
Alexandre GRIVEAUX948f2702019-10-01 21:09:14 +020098
99 brcmf: wifi@1 {
100/* reg = <4>;*/
101 compatible = "brcm,bcm4330-fmac";
102 vcc-supply = <&wlan0_power>;
103 device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>;
104 shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>;
105 };
Ezequiel Garcia671963b2018-03-28 18:00:55 -0300106};
107
Paul Burton0752f922015-05-24 16:11:47 +0100108&uart0 {
109 status = "okay";
Paul Cercueil89a61392017-05-12 18:53:02 +0200110
111 pinctrl-names = "default";
112 pinctrl-0 = <&pins_uart0>;
Paul Burton0752f922015-05-24 16:11:47 +0100113};
114
115&uart1 {
116 status = "okay";
Paul Cercueil89a61392017-05-12 18:53:02 +0200117
118 pinctrl-names = "default";
119 pinctrl-0 = <&pins_uart1>;
Paul Burton0752f922015-05-24 16:11:47 +0100120};
121
Alexandre GRIVEAUX948f2702019-10-01 21:09:14 +0200122&uart2 {
123 status = "okay";
124
125 pinctrl-names = "default";
126 pinctrl-0 = <&pins_uart2>;
127 uart-has-rtscts;
128
129 bluetooth {
130 compatible = "brcm,bcm4330-bt";
131 reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>;
132 vcc-supply = <&wlan0_power>;
133 device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>;
134 host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>;
135 shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>;
136 };
137};
138
Paul Burton0752f922015-05-24 16:11:47 +0100139&uart3 {
140 status = "okay";
Paul Cercueil89a61392017-05-12 18:53:02 +0200141
142 pinctrl-names = "default";
Zhou Yanjie1ca1c872019-01-25 02:22:15 +0800143 pinctrl-0 = <&pins_uart3>;
Paul Burton0752f922015-05-24 16:11:47 +0100144};
145
146&uart4 {
147 status = "okay";
Paul Cercueil89a61392017-05-12 18:53:02 +0200148
149 pinctrl-names = "default";
150 pinctrl-0 = <&pins_uart4>;
Paul Burton0752f922015-05-24 16:11:47 +0100151};
Alex Smith78800552015-12-03 12:02:22 +0000152
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200153&i2c0 {
154 status = "okay";
155
156 pinctrl-names = "default";
157 pinctrl-0 = <&pins_i2c0>;
158
159 clock-frequency = <400000>;
160
161 act8600: act8600@5a {
162 compatible = "active-semi,act8600";
163 reg = <0x5a>;
164 status = "okay";
165
166 regulators {
167 vddcore: SUDCDC1 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100168 regulator-name = "DCDC_REG1";
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200169 regulator-min-microvolt = <1100000>;
170 regulator-max-microvolt = <1100000>;
171 regulator-always-on;
172 };
173 vddmem: SUDCDC2 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100174 regulator-name = "DCDC_REG2";
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200175 regulator-min-microvolt = <1500000>;
176 regulator-max-microvolt = <1500000>;
177 regulator-always-on;
178 };
179 vcc_33: SUDCDC3 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100180 regulator-name = "DCDC_REG3";
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200181 regulator-min-microvolt = <3300000>;
182 regulator-max-microvolt = <3300000>;
183 regulator-always-on;
184 };
185 vcc_50: SUDCDC4 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100186 regulator-name = "SUDCDC_REG4";
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200187 regulator-min-microvolt = <5000000>;
188 regulator-max-microvolt = <5000000>;
189 regulator-always-on;
190 };
191 vcc_25: LDO_REG5 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100192 regulator-name = "LDO_REG5";
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200193 regulator-min-microvolt = <2500000>;
194 regulator-max-microvolt = <2500000>;
195 regulator-always-on;
196 };
197 wifi_io: LDO_REG6 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100198 regulator-name = "LDO_REG6";
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200199 regulator-min-microvolt = <2500000>;
200 regulator-max-microvolt = <2500000>;
201 regulator-always-on;
202 };
203 vcc_28: LDO_REG7 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100204 regulator-name = "LDO_REG7";
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200205 regulator-min-microvolt = <2800000>;
206 regulator-max-microvolt = <2800000>;
207 regulator-always-on;
208 };
209 vcc_15: LDO_REG8 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100210 regulator-name = "LDO_REG8";
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200211 regulator-min-microvolt = <1500000>;
212 regulator-max-microvolt = <1500000>;
213 regulator-always-on;
214 };
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100215 vrtc_18: LDO_REG9 {
216 regulator-name = "LDO_REG9";
217 /* Despite the datasheet stating 3.3V
218 * for REG9 and the driver expecting that,
219 * REG9 outputs 1.8V.
220 * Likely the CI20 uses a proprietary
221 * factory programmed chip variant.
222 * Since this is a simple on/off LDO the
223 * exact values do not matter.
224 */
225 regulator-min-microvolt = <3300000>;
226 regulator-max-microvolt = <3300000>;
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200227 regulator-always-on;
228 };
229 vcc_11: LDO_REG10 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100230 regulator-name = "LDO_REG10";
231 regulator-min-microvolt = <1200000>;
232 regulator-max-microvolt = <1200000>;
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200233 regulator-always-on;
234 };
235 };
236 };
237};
238
239&i2c1 {
240 status = "okay";
241
242 pinctrl-names = "default";
243 pinctrl-0 = <&pins_i2c1>;
244
245};
246
247&i2c2 {
248 status = "okay";
249
250 pinctrl-names = "default";
251 pinctrl-0 = <&pins_i2c2>;
252
253};
254
255&i2c3 {
256 status = "okay";
257
258 pinctrl-names = "default";
259 pinctrl-0 = <&pins_i2c3>;
260
261};
262
263&i2c4 {
264 status = "okay";
265
266 pinctrl-names = "default";
267 pinctrl-0 = <&pins_i2c4>;
268
269 clock-frequency = <400000>;
270
271 rtc@51 {
272 compatible = "nxp,pcf8563";
273 reg = <0x51>;
H. Nikolaus Schaller130ab8812020-03-06 18:28:30 +0100274
275 interrupt-parent = <&gpf>;
276 interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200277 };
278};
279
Alex Smith78800552015-12-03 12:02:22 +0000280&nemc {
281 status = "okay";
282
283 nandc: nand-controller@1 {
284 compatible = "ingenic,jz4780-nand";
285 reg = <1 0 0x1000000>;
286
287 #address-cells = <1>;
288 #size-cells = <0>;
289
290 ingenic,bch-controller = <&bch>;
291
292 ingenic,nemc-tAS = <10>;
293 ingenic,nemc-tAH = <5>;
294 ingenic,nemc-tBP = <10>;
295 ingenic,nemc-tAW = <15>;
296 ingenic,nemc-tSTRV = <100>;
297
Paul Cercueil89a61392017-05-12 18:53:02 +0200298 /*
299 * Only CLE/ALE are needed for the devices that are connected, rather
300 * than the full address line set.
301 */
302 pinctrl-names = "default";
303 pinctrl-0 = <&pins_nemc>;
304
Alex Smith78800552015-12-03 12:02:22 +0000305 nand@1 {
306 reg = <1>;
307
308 nand-ecc-step-size = <1024>;
309 nand-ecc-strength = <24>;
310 nand-ecc-mode = "hw";
311 nand-on-flash-bbt;
312
Paul Cercueil89a61392017-05-12 18:53:02 +0200313 pinctrl-names = "default";
314 pinctrl-0 = <&pins_nemc_cs1>;
315
Alex Smith78800552015-12-03 12:02:22 +0000316 partitions {
317 compatible = "fixed-partitions";
318 #address-cells = <2>;
319 #size-cells = <2>;
320
321 partition@0 {
322 label = "u-boot-spl";
323 reg = <0x0 0x0 0x0 0x800000>;
324 };
325
Mathieu Malaterrec7685192018-01-24 12:42:07 +0100326 partition@800000 {
Alex Smith78800552015-12-03 12:02:22 +0000327 label = "u-boot";
328 reg = <0x0 0x800000 0x0 0x200000>;
329 };
330
Mathieu Malaterrec7685192018-01-24 12:42:07 +0100331 partition@a00000 {
Alex Smith78800552015-12-03 12:02:22 +0000332 label = "u-boot-env";
333 reg = <0x0 0xa00000 0x0 0x200000>;
334 };
335
Mathieu Malaterrec7685192018-01-24 12:42:07 +0100336 partition@c00000 {
Alex Smith78800552015-12-03 12:02:22 +0000337 label = "boot";
338 reg = <0x0 0xc00000 0x0 0x4000000>;
339 };
340
Mathieu Malaterre018eab82018-01-24 12:42:08 +0100341 partition@4c00000 {
Alex Smith78800552015-12-03 12:02:22 +0000342 label = "system";
343 reg = <0x0 0x4c00000 0x1 0xfb400000>;
344 };
345 };
346 };
347 };
Harvey Hunt8fec5532017-07-07 17:12:08 +0100348
349 dm9000@6 {
350 compatible = "davicom,dm9000";
351 davicom,no-eeprom;
352
353 pinctrl-names = "default";
354 pinctrl-0 = <&pins_nemc_cs6>;
355
356 reg = <6 0 1 /* addr */
357 6 2 1>; /* data */
358
359 ingenic,nemc-tAS = <15>;
360 ingenic,nemc-tAH = <10>;
361 ingenic,nemc-tBP = <20>;
362 ingenic,nemc-tAW = <50>;
363 ingenic,nemc-tSTRV = <100>;
364
365 reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
366 vcc-supply = <&eth0_power>;
367
368 interrupt-parent = <&gpe>;
369 interrupts = <19 4>;
370 };
Alex Smith78800552015-12-03 12:02:22 +0000371};
372
373&bch {
374 status = "okay";
375};
Paul Cercueil89a61392017-05-12 18:53:02 +0200376
377&pinctrl {
378 pins_uart0: uart0 {
379 function = "uart0";
380 groups = "uart0-data";
381 bias-disable;
382 };
383
384 pins_uart1: uart1 {
385 function = "uart1";
386 groups = "uart1-data";
387 bias-disable;
388 };
389
Alexandre GRIVEAUX948f2702019-10-01 21:09:14 +0200390 pins_uart2: uart2 {
391 function = "uart2";
392 groups = "uart2-data", "uart2-hwflow";
393 bias-disable;
394 };
395
Zhou Yanjie1ca1c872019-01-25 02:22:15 +0800396 pins_uart3: uart3 {
397 function = "uart3";
398 groups = "uart3-data", "uart3-hwflow";
Paul Cercueil89a61392017-05-12 18:53:02 +0200399 bias-disable;
400 };
401
402 pins_uart4: uart4 {
403 function = "uart4";
404 groups = "uart4-data";
405 bias-disable;
406 };
407
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200408 pins_i2c0: i2c0 {
409 function = "i2c0";
410 groups = "i2c0-data";
411 bias-disable;
412 };
413
414 pins_i2c1: i2c1 {
415 function = "i2c1";
416 groups = "i2c1-data";
417 bias-disable;
418 };
419
420 pins_i2c2: i2c2 {
421 function = "i2c2";
422 groups = "i2c2-data";
423 bias-disable;
424 };
425
426 pins_i2c3: i2c3 {
427 function = "i2c3";
428 groups = "i2c3-data";
429 bias-disable;
430 };
431
432 pins_i2c4: i2c4 {
433 function = "i2c4";
434 groups = "i2c4-data-e";
435 bias-disable;
436 };
437
Paul Cercueil89a61392017-05-12 18:53:02 +0200438 pins_nemc: nemc {
439 function = "nemc";
440 groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
441 bias-disable;
442 };
443
444 pins_nemc_cs1: nemc-cs1 {
445 function = "nemc-cs1";
446 groups = "nemc-cs1";
447 bias-disable;
448 };
Harvey Hunt8fec5532017-07-07 17:12:08 +0100449
450 pins_nemc_cs6: nemc-cs6 {
451 function = "nemc-cs6";
452 groups = "nemc-cs6";
453 bias-disable;
454 };
Ezequiel Garcia671963b2018-03-28 18:00:55 -0300455
456 pins_mmc0: mmc0 {
457 function = "mmc0";
458 groups = "mmc0-1bit-e", "mmc0-4bit-e";
459 bias-disable;
460 };
461
462 pins_mmc1: mmc1 {
463 function = "mmc1";
464 groups = "mmc1-1bit-d", "mmc1-4bit-d";
465 bias-disable;
466 };
Paul Cercueil89a61392017-05-12 18:53:02 +0200467};
Paul Cercueil157c8872019-07-24 13:16:13 -0400468
469&tcu {
470 /* 3 MHz for the system timer and clocksource */
471 assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>;
472 assigned-clock-rates = <3000000>, <3000000>;
473};