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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001// SPDX-License-Identifier: GPL-2.0
Paul Burton0752f922015-05-24 16:11:47 +01002/dts-v1/;
3
4#include "jz4780.dtsi"
Paul Cercueil157c8872019-07-24 13:16:13 -04005#include <dt-bindings/clock/ingenic,tcu.h>
Harvey Hunt8fec5532017-07-07 17:12:08 +01006#include <dt-bindings/gpio/gpio.h>
Paul Burton0752f922015-05-24 16:11:47 +01007
8/ {
9 compatible = "img,ci20", "ingenic,jz4780";
10
11 aliases {
12 serial0 = &uart0;
13 serial1 = &uart1;
14 serial3 = &uart3;
15 serial4 = &uart4;
16 };
17
18 chosen {
19 stdout-path = &uart4;
20 };
21
22 memory {
23 device_type = "memory";
24 reg = <0x0 0x10000000
25 0x30000000 0x30000000>;
26 };
Harvey Hunt8fec5532017-07-07 17:12:08 +010027
28 eth0_power: fixedregulator@0 {
29 compatible = "regulator-fixed";
30 regulator-name = "eth0_power";
31 gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
32 enable-active-high;
33 };
Paul Burton0752f922015-05-24 16:11:47 +010034};
35
36&ext {
37 clock-frequency = <48000000>;
38};
39
Ezequiel Garcia671963b2018-03-28 18:00:55 -030040&mmc0 {
41 status = "okay";
42
43 bus-width = <4>;
44 max-frequency = <50000000>;
45
46 pinctrl-names = "default";
47 pinctrl-0 = <&pins_mmc0>;
48
49 cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>;
50};
51
52&mmc1 {
53 status = "okay";
54
55 bus-width = <4>;
56 max-frequency = <50000000>;
57
58 pinctrl-names = "default";
59 pinctrl-0 = <&pins_mmc1>;
60};
61
Paul Burton0752f922015-05-24 16:11:47 +010062&uart0 {
63 status = "okay";
Paul Cercueil89a61392017-05-12 18:53:02 +020064
65 pinctrl-names = "default";
66 pinctrl-0 = <&pins_uart0>;
Paul Burton0752f922015-05-24 16:11:47 +010067};
68
69&uart1 {
70 status = "okay";
Paul Cercueil89a61392017-05-12 18:53:02 +020071
72 pinctrl-names = "default";
73 pinctrl-0 = <&pins_uart1>;
Paul Burton0752f922015-05-24 16:11:47 +010074};
75
76&uart3 {
77 status = "okay";
Paul Cercueil89a61392017-05-12 18:53:02 +020078
79 pinctrl-names = "default";
Zhou Yanjie1ca1c872019-01-25 02:22:15 +080080 pinctrl-0 = <&pins_uart3>;
Paul Burton0752f922015-05-24 16:11:47 +010081};
82
83&uart4 {
84 status = "okay";
Paul Cercueil89a61392017-05-12 18:53:02 +020085
86 pinctrl-names = "default";
87 pinctrl-0 = <&pins_uart4>;
Paul Burton0752f922015-05-24 16:11:47 +010088};
Alex Smith78800552015-12-03 12:02:22 +000089
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +020090&i2c0 {
91 status = "okay";
92
93 pinctrl-names = "default";
94 pinctrl-0 = <&pins_i2c0>;
95
96 clock-frequency = <400000>;
97
98 act8600: act8600@5a {
99 compatible = "active-semi,act8600";
100 reg = <0x5a>;
101 status = "okay";
102
103 regulators {
104 vddcore: SUDCDC1 {
105 regulator-name = "VDDCORE";
106 regulator-min-microvolt = <1100000>;
107 regulator-max-microvolt = <1100000>;
108 regulator-always-on;
109 };
110 vddmem: SUDCDC2 {
111 regulator-name = "VDDMEM";
112 regulator-min-microvolt = <1500000>;
113 regulator-max-microvolt = <1500000>;
114 regulator-always-on;
115 };
116 vcc_33: SUDCDC3 {
117 regulator-name = "VCC33";
118 regulator-min-microvolt = <3300000>;
119 regulator-max-microvolt = <3300000>;
120 regulator-always-on;
121 };
122 vcc_50: SUDCDC4 {
123 regulator-name = "VCC50";
124 regulator-min-microvolt = <5000000>;
125 regulator-max-microvolt = <5000000>;
126 regulator-always-on;
127 };
128 vcc_25: LDO_REG5 {
129 regulator-name = "VCC25";
130 regulator-min-microvolt = <2500000>;
131 regulator-max-microvolt = <2500000>;
132 regulator-always-on;
133 };
134 wifi_io: LDO_REG6 {
135 regulator-name = "WIFIIO";
136 regulator-min-microvolt = <2500000>;
137 regulator-max-microvolt = <2500000>;
138 regulator-always-on;
139 };
140 vcc_28: LDO_REG7 {
141 regulator-name = "VCC28";
142 regulator-min-microvolt = <2800000>;
143 regulator-max-microvolt = <2800000>;
144 regulator-always-on;
145 };
146 vcc_15: LDO_REG8 {
147 regulator-name = "VCC15";
148 regulator-min-microvolt = <1500000>;
149 regulator-max-microvolt = <1500000>;
150 regulator-always-on;
151 };
152 vcc_18: LDO_REG9 {
153 regulator-name = "VCC18";
154 regulator-min-microvolt = <1800000>;
155 regulator-max-microvolt = <1800000>;
156 regulator-always-on;
157 };
158 vcc_11: LDO_REG10 {
159 regulator-name = "VCC11";
160 regulator-min-microvolt = <1100000>;
161 regulator-max-microvolt = <1100000>;
162 regulator-always-on;
163 };
164 };
165 };
166};
167
168&i2c1 {
169 status = "okay";
170
171 pinctrl-names = "default";
172 pinctrl-0 = <&pins_i2c1>;
173
174};
175
176&i2c2 {
177 status = "okay";
178
179 pinctrl-names = "default";
180 pinctrl-0 = <&pins_i2c2>;
181
182};
183
184&i2c3 {
185 status = "okay";
186
187 pinctrl-names = "default";
188 pinctrl-0 = <&pins_i2c3>;
189
190};
191
192&i2c4 {
193 status = "okay";
194
195 pinctrl-names = "default";
196 pinctrl-0 = <&pins_i2c4>;
197
198 clock-frequency = <400000>;
199
200 rtc@51 {
201 compatible = "nxp,pcf8563";
202 reg = <0x51>;
203 interrupts = <110>;
204 };
205};
206
Alex Smith78800552015-12-03 12:02:22 +0000207&nemc {
208 status = "okay";
209
210 nandc: nand-controller@1 {
211 compatible = "ingenic,jz4780-nand";
212 reg = <1 0 0x1000000>;
213
214 #address-cells = <1>;
215 #size-cells = <0>;
216
217 ingenic,bch-controller = <&bch>;
218
219 ingenic,nemc-tAS = <10>;
220 ingenic,nemc-tAH = <5>;
221 ingenic,nemc-tBP = <10>;
222 ingenic,nemc-tAW = <15>;
223 ingenic,nemc-tSTRV = <100>;
224
Paul Cercueil89a61392017-05-12 18:53:02 +0200225 /*
226 * Only CLE/ALE are needed for the devices that are connected, rather
227 * than the full address line set.
228 */
229 pinctrl-names = "default";
230 pinctrl-0 = <&pins_nemc>;
231
Alex Smith78800552015-12-03 12:02:22 +0000232 nand@1 {
233 reg = <1>;
234
235 nand-ecc-step-size = <1024>;
236 nand-ecc-strength = <24>;
237 nand-ecc-mode = "hw";
238 nand-on-flash-bbt;
239
Paul Cercueil89a61392017-05-12 18:53:02 +0200240 pinctrl-names = "default";
241 pinctrl-0 = <&pins_nemc_cs1>;
242
Alex Smith78800552015-12-03 12:02:22 +0000243 partitions {
244 compatible = "fixed-partitions";
245 #address-cells = <2>;
246 #size-cells = <2>;
247
248 partition@0 {
249 label = "u-boot-spl";
250 reg = <0x0 0x0 0x0 0x800000>;
251 };
252
Mathieu Malaterrec7685192018-01-24 12:42:07 +0100253 partition@800000 {
Alex Smith78800552015-12-03 12:02:22 +0000254 label = "u-boot";
255 reg = <0x0 0x800000 0x0 0x200000>;
256 };
257
Mathieu Malaterrec7685192018-01-24 12:42:07 +0100258 partition@a00000 {
Alex Smith78800552015-12-03 12:02:22 +0000259 label = "u-boot-env";
260 reg = <0x0 0xa00000 0x0 0x200000>;
261 };
262
Mathieu Malaterrec7685192018-01-24 12:42:07 +0100263 partition@c00000 {
Alex Smith78800552015-12-03 12:02:22 +0000264 label = "boot";
265 reg = <0x0 0xc00000 0x0 0x4000000>;
266 };
267
Mathieu Malaterre018eab82018-01-24 12:42:08 +0100268 partition@4c00000 {
Alex Smith78800552015-12-03 12:02:22 +0000269 label = "system";
270 reg = <0x0 0x4c00000 0x1 0xfb400000>;
271 };
272 };
273 };
274 };
Harvey Hunt8fec5532017-07-07 17:12:08 +0100275
276 dm9000@6 {
277 compatible = "davicom,dm9000";
278 davicom,no-eeprom;
279
280 pinctrl-names = "default";
281 pinctrl-0 = <&pins_nemc_cs6>;
282
283 reg = <6 0 1 /* addr */
284 6 2 1>; /* data */
285
286 ingenic,nemc-tAS = <15>;
287 ingenic,nemc-tAH = <10>;
288 ingenic,nemc-tBP = <20>;
289 ingenic,nemc-tAW = <50>;
290 ingenic,nemc-tSTRV = <100>;
291
292 reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
293 vcc-supply = <&eth0_power>;
294
295 interrupt-parent = <&gpe>;
296 interrupts = <19 4>;
297 };
Alex Smith78800552015-12-03 12:02:22 +0000298};
299
300&bch {
301 status = "okay";
302};
Paul Cercueil89a61392017-05-12 18:53:02 +0200303
304&pinctrl {
305 pins_uart0: uart0 {
306 function = "uart0";
307 groups = "uart0-data";
308 bias-disable;
309 };
310
311 pins_uart1: uart1 {
312 function = "uart1";
313 groups = "uart1-data";
314 bias-disable;
315 };
316
Zhou Yanjie1ca1c872019-01-25 02:22:15 +0800317 pins_uart3: uart3 {
318 function = "uart3";
319 groups = "uart3-data", "uart3-hwflow";
Paul Cercueil89a61392017-05-12 18:53:02 +0200320 bias-disable;
321 };
322
323 pins_uart4: uart4 {
324 function = "uart4";
325 groups = "uart4-data";
326 bias-disable;
327 };
328
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200329 pins_i2c0: i2c0 {
330 function = "i2c0";
331 groups = "i2c0-data";
332 bias-disable;
333 };
334
335 pins_i2c1: i2c1 {
336 function = "i2c1";
337 groups = "i2c1-data";
338 bias-disable;
339 };
340
341 pins_i2c2: i2c2 {
342 function = "i2c2";
343 groups = "i2c2-data";
344 bias-disable;
345 };
346
347 pins_i2c3: i2c3 {
348 function = "i2c3";
349 groups = "i2c3-data";
350 bias-disable;
351 };
352
353 pins_i2c4: i2c4 {
354 function = "i2c4";
355 groups = "i2c4-data-e";
356 bias-disable;
357 };
358
Paul Cercueil89a61392017-05-12 18:53:02 +0200359 pins_nemc: nemc {
360 function = "nemc";
361 groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
362 bias-disable;
363 };
364
365 pins_nemc_cs1: nemc-cs1 {
366 function = "nemc-cs1";
367 groups = "nemc-cs1";
368 bias-disable;
369 };
Harvey Hunt8fec5532017-07-07 17:12:08 +0100370
371 pins_nemc_cs6: nemc-cs6 {
372 function = "nemc-cs6";
373 groups = "nemc-cs6";
374 bias-disable;
375 };
Ezequiel Garcia671963b2018-03-28 18:00:55 -0300376
377 pins_mmc0: mmc0 {
378 function = "mmc0";
379 groups = "mmc0-1bit-e", "mmc0-4bit-e";
380 bias-disable;
381 };
382
383 pins_mmc1: mmc1 {
384 function = "mmc1";
385 groups = "mmc1-1bit-d", "mmc1-4bit-d";
386 bias-disable;
387 };
Paul Cercueil89a61392017-05-12 18:53:02 +0200388};
Paul Cercueil157c8872019-07-24 13:16:13 -0400389
390&tcu {
391 /* 3 MHz for the system timer and clocksource */
392 assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>;
393 assigned-clock-rates = <3000000>, <3000000>;
394};