Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Paul Burton | 0752f92 | 2015-05-24 16:11:47 +0100 | [diff] [blame] | 2 | /dts-v1/; |
| 3 | |
| 4 | #include "jz4780.dtsi" |
Paul Cercueil | 157c887 | 2019-07-24 13:16:13 -0400 | [diff] [blame] | 5 | #include <dt-bindings/clock/ingenic,tcu.h> |
Harvey Hunt | 8fec553 | 2017-07-07 17:12:08 +0100 | [diff] [blame] | 6 | #include <dt-bindings/gpio/gpio.h> |
Paul Burton | 0752f92 | 2015-05-24 16:11:47 +0100 | [diff] [blame] | 7 | |
| 8 | / { |
| 9 | compatible = "img,ci20", "ingenic,jz4780"; |
| 10 | |
| 11 | aliases { |
| 12 | serial0 = &uart0; |
| 13 | serial1 = &uart1; |
| 14 | serial3 = &uart3; |
| 15 | serial4 = &uart4; |
| 16 | }; |
| 17 | |
| 18 | chosen { |
| 19 | stdout-path = &uart4; |
| 20 | }; |
| 21 | |
| 22 | memory { |
| 23 | device_type = "memory"; |
| 24 | reg = <0x0 0x10000000 |
| 25 | 0x30000000 0x30000000>; |
| 26 | }; |
Harvey Hunt | 8fec553 | 2017-07-07 17:12:08 +0100 | [diff] [blame] | 27 | |
Alexandre GRIVEAUX | 24b0cb4 | 2019-10-01 21:09:30 +0200 | [diff] [blame^] | 28 | leds { |
| 29 | compatible = "gpio-leds"; |
| 30 | |
| 31 | led0 { |
| 32 | label = "ci20:red:led0"; |
| 33 | gpios = <&gpc 3 GPIO_ACTIVE_HIGH>; |
| 34 | linux,default-trigger = "none"; |
| 35 | }; |
| 36 | |
| 37 | led1 { |
| 38 | label = "ci20:red:led1"; |
| 39 | gpios = <&gpc 2 GPIO_ACTIVE_HIGH>; |
| 40 | linux,default-trigger = "nand-disk"; |
| 41 | }; |
| 42 | |
| 43 | led2 { |
| 44 | label = "ci20:red:led2"; |
| 45 | gpios = <&gpc 1 GPIO_ACTIVE_HIGH>; |
| 46 | linux,default-trigger = "cpu1"; |
| 47 | }; |
| 48 | |
| 49 | led3 { |
| 50 | label = "ci20:red:led3"; |
| 51 | gpios = <&gpc 0 GPIO_ACTIVE_HIGH>; |
| 52 | linux,default-trigger = "cpu0"; |
| 53 | }; |
| 54 | }; |
| 55 | |
Harvey Hunt | 8fec553 | 2017-07-07 17:12:08 +0100 | [diff] [blame] | 56 | eth0_power: fixedregulator@0 { |
| 57 | compatible = "regulator-fixed"; |
| 58 | regulator-name = "eth0_power"; |
| 59 | gpio = <&gpb 25 GPIO_ACTIVE_LOW>; |
| 60 | enable-active-high; |
| 61 | }; |
Alexandre GRIVEAUX | 948f270 | 2019-10-01 21:09:14 +0200 | [diff] [blame] | 62 | |
| 63 | wlan0_power: fixedregulator@1 { |
| 64 | compatible = "regulator-fixed"; |
| 65 | regulator-name = "wlan0_power"; |
| 66 | gpio = <&gpb 19 GPIO_ACTIVE_LOW>; |
| 67 | enable-active-high; |
| 68 | }; |
Paul Burton | 0752f92 | 2015-05-24 16:11:47 +0100 | [diff] [blame] | 69 | }; |
| 70 | |
| 71 | &ext { |
| 72 | clock-frequency = <48000000>; |
| 73 | }; |
| 74 | |
Ezequiel Garcia | 671963b | 2018-03-28 18:00:55 -0300 | [diff] [blame] | 75 | &mmc0 { |
| 76 | status = "okay"; |
| 77 | |
| 78 | bus-width = <4>; |
| 79 | max-frequency = <50000000>; |
| 80 | |
| 81 | pinctrl-names = "default"; |
| 82 | pinctrl-0 = <&pins_mmc0>; |
| 83 | |
| 84 | cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>; |
| 85 | }; |
| 86 | |
| 87 | &mmc1 { |
| 88 | status = "okay"; |
| 89 | |
| 90 | bus-width = <4>; |
| 91 | max-frequency = <50000000>; |
Alexandre GRIVEAUX | 948f270 | 2019-10-01 21:09:14 +0200 | [diff] [blame] | 92 | non-removable; |
Ezequiel Garcia | 671963b | 2018-03-28 18:00:55 -0300 | [diff] [blame] | 93 | |
| 94 | pinctrl-names = "default"; |
| 95 | pinctrl-0 = <&pins_mmc1>; |
Alexandre GRIVEAUX | 948f270 | 2019-10-01 21:09:14 +0200 | [diff] [blame] | 96 | |
| 97 | brcmf: wifi@1 { |
| 98 | /* reg = <4>;*/ |
| 99 | compatible = "brcm,bcm4330-fmac"; |
| 100 | vcc-supply = <&wlan0_power>; |
| 101 | device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>; |
| 102 | shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>; |
| 103 | }; |
Ezequiel Garcia | 671963b | 2018-03-28 18:00:55 -0300 | [diff] [blame] | 104 | }; |
| 105 | |
Paul Burton | 0752f92 | 2015-05-24 16:11:47 +0100 | [diff] [blame] | 106 | &uart0 { |
| 107 | status = "okay"; |
Paul Cercueil | 89a6139 | 2017-05-12 18:53:02 +0200 | [diff] [blame] | 108 | |
| 109 | pinctrl-names = "default"; |
| 110 | pinctrl-0 = <&pins_uart0>; |
Paul Burton | 0752f92 | 2015-05-24 16:11:47 +0100 | [diff] [blame] | 111 | }; |
| 112 | |
| 113 | &uart1 { |
| 114 | status = "okay"; |
Paul Cercueil | 89a6139 | 2017-05-12 18:53:02 +0200 | [diff] [blame] | 115 | |
| 116 | pinctrl-names = "default"; |
| 117 | pinctrl-0 = <&pins_uart1>; |
Paul Burton | 0752f92 | 2015-05-24 16:11:47 +0100 | [diff] [blame] | 118 | }; |
| 119 | |
Alexandre GRIVEAUX | 948f270 | 2019-10-01 21:09:14 +0200 | [diff] [blame] | 120 | &uart2 { |
| 121 | status = "okay"; |
| 122 | |
| 123 | pinctrl-names = "default"; |
| 124 | pinctrl-0 = <&pins_uart2>; |
| 125 | uart-has-rtscts; |
| 126 | |
| 127 | bluetooth { |
| 128 | compatible = "brcm,bcm4330-bt"; |
| 129 | reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>; |
| 130 | vcc-supply = <&wlan0_power>; |
| 131 | device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>; |
| 132 | host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>; |
| 133 | shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>; |
| 134 | }; |
| 135 | }; |
| 136 | |
Paul Burton | 0752f92 | 2015-05-24 16:11:47 +0100 | [diff] [blame] | 137 | &uart3 { |
| 138 | status = "okay"; |
Paul Cercueil | 89a6139 | 2017-05-12 18:53:02 +0200 | [diff] [blame] | 139 | |
| 140 | pinctrl-names = "default"; |
Zhou Yanjie | 1ca1c87 | 2019-01-25 02:22:15 +0800 | [diff] [blame] | 141 | pinctrl-0 = <&pins_uart3>; |
Paul Burton | 0752f92 | 2015-05-24 16:11:47 +0100 | [diff] [blame] | 142 | }; |
| 143 | |
| 144 | &uart4 { |
| 145 | status = "okay"; |
Paul Cercueil | 89a6139 | 2017-05-12 18:53:02 +0200 | [diff] [blame] | 146 | |
| 147 | pinctrl-names = "default"; |
| 148 | pinctrl-0 = <&pins_uart4>; |
Paul Burton | 0752f92 | 2015-05-24 16:11:47 +0100 | [diff] [blame] | 149 | }; |
Alex Smith | 7880055 | 2015-12-03 12:02:22 +0000 | [diff] [blame] | 150 | |
Alexandre GRIVEAUX | 73f2b94 | 2019-10-01 21:09:00 +0200 | [diff] [blame] | 151 | &i2c0 { |
| 152 | status = "okay"; |
| 153 | |
| 154 | pinctrl-names = "default"; |
| 155 | pinctrl-0 = <&pins_i2c0>; |
| 156 | |
| 157 | clock-frequency = <400000>; |
| 158 | |
| 159 | act8600: act8600@5a { |
| 160 | compatible = "active-semi,act8600"; |
| 161 | reg = <0x5a>; |
| 162 | status = "okay"; |
| 163 | |
| 164 | regulators { |
| 165 | vddcore: SUDCDC1 { |
| 166 | regulator-name = "VDDCORE"; |
| 167 | regulator-min-microvolt = <1100000>; |
| 168 | regulator-max-microvolt = <1100000>; |
| 169 | regulator-always-on; |
| 170 | }; |
| 171 | vddmem: SUDCDC2 { |
| 172 | regulator-name = "VDDMEM"; |
| 173 | regulator-min-microvolt = <1500000>; |
| 174 | regulator-max-microvolt = <1500000>; |
| 175 | regulator-always-on; |
| 176 | }; |
| 177 | vcc_33: SUDCDC3 { |
| 178 | regulator-name = "VCC33"; |
| 179 | regulator-min-microvolt = <3300000>; |
| 180 | regulator-max-microvolt = <3300000>; |
| 181 | regulator-always-on; |
| 182 | }; |
| 183 | vcc_50: SUDCDC4 { |
| 184 | regulator-name = "VCC50"; |
| 185 | regulator-min-microvolt = <5000000>; |
| 186 | regulator-max-microvolt = <5000000>; |
| 187 | regulator-always-on; |
| 188 | }; |
| 189 | vcc_25: LDO_REG5 { |
| 190 | regulator-name = "VCC25"; |
| 191 | regulator-min-microvolt = <2500000>; |
| 192 | regulator-max-microvolt = <2500000>; |
| 193 | regulator-always-on; |
| 194 | }; |
| 195 | wifi_io: LDO_REG6 { |
| 196 | regulator-name = "WIFIIO"; |
| 197 | regulator-min-microvolt = <2500000>; |
| 198 | regulator-max-microvolt = <2500000>; |
| 199 | regulator-always-on; |
| 200 | }; |
| 201 | vcc_28: LDO_REG7 { |
| 202 | regulator-name = "VCC28"; |
| 203 | regulator-min-microvolt = <2800000>; |
| 204 | regulator-max-microvolt = <2800000>; |
| 205 | regulator-always-on; |
| 206 | }; |
| 207 | vcc_15: LDO_REG8 { |
| 208 | regulator-name = "VCC15"; |
| 209 | regulator-min-microvolt = <1500000>; |
| 210 | regulator-max-microvolt = <1500000>; |
| 211 | regulator-always-on; |
| 212 | }; |
| 213 | vcc_18: LDO_REG9 { |
| 214 | regulator-name = "VCC18"; |
| 215 | regulator-min-microvolt = <1800000>; |
| 216 | regulator-max-microvolt = <1800000>; |
| 217 | regulator-always-on; |
| 218 | }; |
| 219 | vcc_11: LDO_REG10 { |
| 220 | regulator-name = "VCC11"; |
| 221 | regulator-min-microvolt = <1100000>; |
| 222 | regulator-max-microvolt = <1100000>; |
| 223 | regulator-always-on; |
| 224 | }; |
| 225 | }; |
| 226 | }; |
| 227 | }; |
| 228 | |
| 229 | &i2c1 { |
| 230 | status = "okay"; |
| 231 | |
| 232 | pinctrl-names = "default"; |
| 233 | pinctrl-0 = <&pins_i2c1>; |
| 234 | |
| 235 | }; |
| 236 | |
| 237 | &i2c2 { |
| 238 | status = "okay"; |
| 239 | |
| 240 | pinctrl-names = "default"; |
| 241 | pinctrl-0 = <&pins_i2c2>; |
| 242 | |
| 243 | }; |
| 244 | |
| 245 | &i2c3 { |
| 246 | status = "okay"; |
| 247 | |
| 248 | pinctrl-names = "default"; |
| 249 | pinctrl-0 = <&pins_i2c3>; |
| 250 | |
| 251 | }; |
| 252 | |
| 253 | &i2c4 { |
| 254 | status = "okay"; |
| 255 | |
| 256 | pinctrl-names = "default"; |
| 257 | pinctrl-0 = <&pins_i2c4>; |
| 258 | |
| 259 | clock-frequency = <400000>; |
| 260 | |
| 261 | rtc@51 { |
| 262 | compatible = "nxp,pcf8563"; |
| 263 | reg = <0x51>; |
| 264 | interrupts = <110>; |
| 265 | }; |
| 266 | }; |
| 267 | |
Alex Smith | 7880055 | 2015-12-03 12:02:22 +0000 | [diff] [blame] | 268 | &nemc { |
| 269 | status = "okay"; |
| 270 | |
| 271 | nandc: nand-controller@1 { |
| 272 | compatible = "ingenic,jz4780-nand"; |
| 273 | reg = <1 0 0x1000000>; |
| 274 | |
| 275 | #address-cells = <1>; |
| 276 | #size-cells = <0>; |
| 277 | |
| 278 | ingenic,bch-controller = <&bch>; |
| 279 | |
| 280 | ingenic,nemc-tAS = <10>; |
| 281 | ingenic,nemc-tAH = <5>; |
| 282 | ingenic,nemc-tBP = <10>; |
| 283 | ingenic,nemc-tAW = <15>; |
| 284 | ingenic,nemc-tSTRV = <100>; |
| 285 | |
Paul Cercueil | 89a6139 | 2017-05-12 18:53:02 +0200 | [diff] [blame] | 286 | /* |
| 287 | * Only CLE/ALE are needed for the devices that are connected, rather |
| 288 | * than the full address line set. |
| 289 | */ |
| 290 | pinctrl-names = "default"; |
| 291 | pinctrl-0 = <&pins_nemc>; |
| 292 | |
Alex Smith | 7880055 | 2015-12-03 12:02:22 +0000 | [diff] [blame] | 293 | nand@1 { |
| 294 | reg = <1>; |
| 295 | |
| 296 | nand-ecc-step-size = <1024>; |
| 297 | nand-ecc-strength = <24>; |
| 298 | nand-ecc-mode = "hw"; |
| 299 | nand-on-flash-bbt; |
| 300 | |
Paul Cercueil | 89a6139 | 2017-05-12 18:53:02 +0200 | [diff] [blame] | 301 | pinctrl-names = "default"; |
| 302 | pinctrl-0 = <&pins_nemc_cs1>; |
| 303 | |
Alex Smith | 7880055 | 2015-12-03 12:02:22 +0000 | [diff] [blame] | 304 | partitions { |
| 305 | compatible = "fixed-partitions"; |
| 306 | #address-cells = <2>; |
| 307 | #size-cells = <2>; |
| 308 | |
| 309 | partition@0 { |
| 310 | label = "u-boot-spl"; |
| 311 | reg = <0x0 0x0 0x0 0x800000>; |
| 312 | }; |
| 313 | |
Mathieu Malaterre | c768519 | 2018-01-24 12:42:07 +0100 | [diff] [blame] | 314 | partition@800000 { |
Alex Smith | 7880055 | 2015-12-03 12:02:22 +0000 | [diff] [blame] | 315 | label = "u-boot"; |
| 316 | reg = <0x0 0x800000 0x0 0x200000>; |
| 317 | }; |
| 318 | |
Mathieu Malaterre | c768519 | 2018-01-24 12:42:07 +0100 | [diff] [blame] | 319 | partition@a00000 { |
Alex Smith | 7880055 | 2015-12-03 12:02:22 +0000 | [diff] [blame] | 320 | label = "u-boot-env"; |
| 321 | reg = <0x0 0xa00000 0x0 0x200000>; |
| 322 | }; |
| 323 | |
Mathieu Malaterre | c768519 | 2018-01-24 12:42:07 +0100 | [diff] [blame] | 324 | partition@c00000 { |
Alex Smith | 7880055 | 2015-12-03 12:02:22 +0000 | [diff] [blame] | 325 | label = "boot"; |
| 326 | reg = <0x0 0xc00000 0x0 0x4000000>; |
| 327 | }; |
| 328 | |
Mathieu Malaterre | 018eab8 | 2018-01-24 12:42:08 +0100 | [diff] [blame] | 329 | partition@4c00000 { |
Alex Smith | 7880055 | 2015-12-03 12:02:22 +0000 | [diff] [blame] | 330 | label = "system"; |
| 331 | reg = <0x0 0x4c00000 0x1 0xfb400000>; |
| 332 | }; |
| 333 | }; |
| 334 | }; |
| 335 | }; |
Harvey Hunt | 8fec553 | 2017-07-07 17:12:08 +0100 | [diff] [blame] | 336 | |
| 337 | dm9000@6 { |
| 338 | compatible = "davicom,dm9000"; |
| 339 | davicom,no-eeprom; |
| 340 | |
| 341 | pinctrl-names = "default"; |
| 342 | pinctrl-0 = <&pins_nemc_cs6>; |
| 343 | |
| 344 | reg = <6 0 1 /* addr */ |
| 345 | 6 2 1>; /* data */ |
| 346 | |
| 347 | ingenic,nemc-tAS = <15>; |
| 348 | ingenic,nemc-tAH = <10>; |
| 349 | ingenic,nemc-tBP = <20>; |
| 350 | ingenic,nemc-tAW = <50>; |
| 351 | ingenic,nemc-tSTRV = <100>; |
| 352 | |
| 353 | reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>; |
| 354 | vcc-supply = <ð0_power>; |
| 355 | |
| 356 | interrupt-parent = <&gpe>; |
| 357 | interrupts = <19 4>; |
| 358 | }; |
Alex Smith | 7880055 | 2015-12-03 12:02:22 +0000 | [diff] [blame] | 359 | }; |
| 360 | |
| 361 | &bch { |
| 362 | status = "okay"; |
| 363 | }; |
Paul Cercueil | 89a6139 | 2017-05-12 18:53:02 +0200 | [diff] [blame] | 364 | |
| 365 | &pinctrl { |
| 366 | pins_uart0: uart0 { |
| 367 | function = "uart0"; |
| 368 | groups = "uart0-data"; |
| 369 | bias-disable; |
| 370 | }; |
| 371 | |
| 372 | pins_uart1: uart1 { |
| 373 | function = "uart1"; |
| 374 | groups = "uart1-data"; |
| 375 | bias-disable; |
| 376 | }; |
| 377 | |
Alexandre GRIVEAUX | 948f270 | 2019-10-01 21:09:14 +0200 | [diff] [blame] | 378 | pins_uart2: uart2 { |
| 379 | function = "uart2"; |
| 380 | groups = "uart2-data", "uart2-hwflow"; |
| 381 | bias-disable; |
| 382 | }; |
| 383 | |
Zhou Yanjie | 1ca1c87 | 2019-01-25 02:22:15 +0800 | [diff] [blame] | 384 | pins_uart3: uart3 { |
| 385 | function = "uart3"; |
| 386 | groups = "uart3-data", "uart3-hwflow"; |
Paul Cercueil | 89a6139 | 2017-05-12 18:53:02 +0200 | [diff] [blame] | 387 | bias-disable; |
| 388 | }; |
| 389 | |
| 390 | pins_uart4: uart4 { |
| 391 | function = "uart4"; |
| 392 | groups = "uart4-data"; |
| 393 | bias-disable; |
| 394 | }; |
| 395 | |
Alexandre GRIVEAUX | 73f2b94 | 2019-10-01 21:09:00 +0200 | [diff] [blame] | 396 | pins_i2c0: i2c0 { |
| 397 | function = "i2c0"; |
| 398 | groups = "i2c0-data"; |
| 399 | bias-disable; |
| 400 | }; |
| 401 | |
| 402 | pins_i2c1: i2c1 { |
| 403 | function = "i2c1"; |
| 404 | groups = "i2c1-data"; |
| 405 | bias-disable; |
| 406 | }; |
| 407 | |
| 408 | pins_i2c2: i2c2 { |
| 409 | function = "i2c2"; |
| 410 | groups = "i2c2-data"; |
| 411 | bias-disable; |
| 412 | }; |
| 413 | |
| 414 | pins_i2c3: i2c3 { |
| 415 | function = "i2c3"; |
| 416 | groups = "i2c3-data"; |
| 417 | bias-disable; |
| 418 | }; |
| 419 | |
| 420 | pins_i2c4: i2c4 { |
| 421 | function = "i2c4"; |
| 422 | groups = "i2c4-data-e"; |
| 423 | bias-disable; |
| 424 | }; |
| 425 | |
Paul Cercueil | 89a6139 | 2017-05-12 18:53:02 +0200 | [diff] [blame] | 426 | pins_nemc: nemc { |
| 427 | function = "nemc"; |
| 428 | groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe"; |
| 429 | bias-disable; |
| 430 | }; |
| 431 | |
| 432 | pins_nemc_cs1: nemc-cs1 { |
| 433 | function = "nemc-cs1"; |
| 434 | groups = "nemc-cs1"; |
| 435 | bias-disable; |
| 436 | }; |
Harvey Hunt | 8fec553 | 2017-07-07 17:12:08 +0100 | [diff] [blame] | 437 | |
| 438 | pins_nemc_cs6: nemc-cs6 { |
| 439 | function = "nemc-cs6"; |
| 440 | groups = "nemc-cs6"; |
| 441 | bias-disable; |
| 442 | }; |
Ezequiel Garcia | 671963b | 2018-03-28 18:00:55 -0300 | [diff] [blame] | 443 | |
| 444 | pins_mmc0: mmc0 { |
| 445 | function = "mmc0"; |
| 446 | groups = "mmc0-1bit-e", "mmc0-4bit-e"; |
| 447 | bias-disable; |
| 448 | }; |
| 449 | |
| 450 | pins_mmc1: mmc1 { |
| 451 | function = "mmc1"; |
| 452 | groups = "mmc1-1bit-d", "mmc1-4bit-d"; |
| 453 | bias-disable; |
| 454 | }; |
Paul Cercueil | 89a6139 | 2017-05-12 18:53:02 +0200 | [diff] [blame] | 455 | }; |
Paul Cercueil | 157c887 | 2019-07-24 13:16:13 -0400 | [diff] [blame] | 456 | |
| 457 | &tcu { |
| 458 | /* 3 MHz for the system timer and clocksource */ |
| 459 | assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>; |
| 460 | assigned-clock-rates = <3000000>, <3000000>; |
| 461 | }; |