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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001// SPDX-License-Identifier: GPL-2.0
Paul Burton0752f922015-05-24 16:11:47 +01002/dts-v1/;
3
4#include "jz4780.dtsi"
Paul Cercueil157c8872019-07-24 13:16:13 -04005#include <dt-bindings/clock/ingenic,tcu.h>
Harvey Hunt8fec5532017-07-07 17:12:08 +01006#include <dt-bindings/gpio/gpio.h>
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +01007#include <dt-bindings/regulator/active-semi,8865-regulator.h>
Paul Burton0752f922015-05-24 16:11:47 +01008
9/ {
10 compatible = "img,ci20", "ingenic,jz4780";
11
12 aliases {
13 serial0 = &uart0;
14 serial1 = &uart1;
15 serial3 = &uart3;
16 serial4 = &uart4;
17 };
18
19 chosen {
20 stdout-path = &uart4;
21 };
22
23 memory {
24 device_type = "memory";
25 reg = <0x0 0x10000000
26 0x30000000 0x30000000>;
27 };
Harvey Hunt8fec5532017-07-07 17:12:08 +010028
Alexandre GRIVEAUX24b0cb42019-10-01 21:09:30 +020029 leds {
30 compatible = "gpio-leds";
31
32 led0 {
33 label = "ci20:red:led0";
34 gpios = <&gpc 3 GPIO_ACTIVE_HIGH>;
35 linux,default-trigger = "none";
36 };
37
38 led1 {
39 label = "ci20:red:led1";
40 gpios = <&gpc 2 GPIO_ACTIVE_HIGH>;
41 linux,default-trigger = "nand-disk";
42 };
43
44 led2 {
45 label = "ci20:red:led2";
46 gpios = <&gpc 1 GPIO_ACTIVE_HIGH>;
47 linux,default-trigger = "cpu1";
48 };
49
50 led3 {
51 label = "ci20:red:led3";
52 gpios = <&gpc 0 GPIO_ACTIVE_HIGH>;
53 linux,default-trigger = "cpu0";
54 };
55 };
56
Harvey Hunt8fec5532017-07-07 17:12:08 +010057 eth0_power: fixedregulator@0 {
58 compatible = "regulator-fixed";
59 regulator-name = "eth0_power";
60 gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
61 enable-active-high;
62 };
Alexandre GRIVEAUX948f2702019-10-01 21:09:14 +020063
64 wlan0_power: fixedregulator@1 {
65 compatible = "regulator-fixed";
66 regulator-name = "wlan0_power";
67 gpio = <&gpb 19 GPIO_ACTIVE_LOW>;
68 enable-active-high;
69 };
Paul Burton0752f922015-05-24 16:11:47 +010070};
71
72&ext {
73 clock-frequency = <48000000>;
74};
75
Ezequiel Garcia671963b2018-03-28 18:00:55 -030076&mmc0 {
77 status = "okay";
78
79 bus-width = <4>;
80 max-frequency = <50000000>;
81
82 pinctrl-names = "default";
83 pinctrl-0 = <&pins_mmc0>;
84
85 cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>;
86};
87
88&mmc1 {
89 status = "okay";
90
91 bus-width = <4>;
92 max-frequency = <50000000>;
Alexandre GRIVEAUX948f2702019-10-01 21:09:14 +020093 non-removable;
Ezequiel Garcia671963b2018-03-28 18:00:55 -030094
95 pinctrl-names = "default";
96 pinctrl-0 = <&pins_mmc1>;
Alexandre GRIVEAUX948f2702019-10-01 21:09:14 +020097
98 brcmf: wifi@1 {
99/* reg = <4>;*/
100 compatible = "brcm,bcm4330-fmac";
101 vcc-supply = <&wlan0_power>;
102 device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>;
103 shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>;
104 };
Ezequiel Garcia671963b2018-03-28 18:00:55 -0300105};
106
Paul Burton0752f922015-05-24 16:11:47 +0100107&uart0 {
108 status = "okay";
Paul Cercueil89a61392017-05-12 18:53:02 +0200109
110 pinctrl-names = "default";
111 pinctrl-0 = <&pins_uart0>;
Paul Burton0752f922015-05-24 16:11:47 +0100112};
113
114&uart1 {
115 status = "okay";
Paul Cercueil89a61392017-05-12 18:53:02 +0200116
117 pinctrl-names = "default";
118 pinctrl-0 = <&pins_uart1>;
Paul Burton0752f922015-05-24 16:11:47 +0100119};
120
Alexandre GRIVEAUX948f2702019-10-01 21:09:14 +0200121&uart2 {
122 status = "okay";
123
124 pinctrl-names = "default";
125 pinctrl-0 = <&pins_uart2>;
126 uart-has-rtscts;
127
128 bluetooth {
129 compatible = "brcm,bcm4330-bt";
130 reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>;
131 vcc-supply = <&wlan0_power>;
132 device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>;
133 host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>;
134 shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>;
135 };
136};
137
Paul Burton0752f922015-05-24 16:11:47 +0100138&uart3 {
139 status = "okay";
Paul Cercueil89a61392017-05-12 18:53:02 +0200140
141 pinctrl-names = "default";
Zhou Yanjie1ca1c872019-01-25 02:22:15 +0800142 pinctrl-0 = <&pins_uart3>;
Paul Burton0752f922015-05-24 16:11:47 +0100143};
144
145&uart4 {
146 status = "okay";
Paul Cercueil89a61392017-05-12 18:53:02 +0200147
148 pinctrl-names = "default";
149 pinctrl-0 = <&pins_uart4>;
Paul Burton0752f922015-05-24 16:11:47 +0100150};
Alex Smith78800552015-12-03 12:02:22 +0000151
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200152&i2c0 {
153 status = "okay";
154
155 pinctrl-names = "default";
156 pinctrl-0 = <&pins_i2c0>;
157
158 clock-frequency = <400000>;
159
160 act8600: act8600@5a {
161 compatible = "active-semi,act8600";
162 reg = <0x5a>;
163 status = "okay";
164
165 regulators {
166 vddcore: SUDCDC1 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100167 regulator-name = "DCDC_REG1";
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200168 regulator-min-microvolt = <1100000>;
169 regulator-max-microvolt = <1100000>;
170 regulator-always-on;
171 };
172 vddmem: SUDCDC2 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100173 regulator-name = "DCDC_REG2";
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200174 regulator-min-microvolt = <1500000>;
175 regulator-max-microvolt = <1500000>;
176 regulator-always-on;
177 };
178 vcc_33: SUDCDC3 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100179 regulator-name = "DCDC_REG3";
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200180 regulator-min-microvolt = <3300000>;
181 regulator-max-microvolt = <3300000>;
182 regulator-always-on;
183 };
184 vcc_50: SUDCDC4 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100185 regulator-name = "SUDCDC_REG4";
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200186 regulator-min-microvolt = <5000000>;
187 regulator-max-microvolt = <5000000>;
188 regulator-always-on;
189 };
190 vcc_25: LDO_REG5 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100191 regulator-name = "LDO_REG5";
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200192 regulator-min-microvolt = <2500000>;
193 regulator-max-microvolt = <2500000>;
194 regulator-always-on;
195 };
196 wifi_io: LDO_REG6 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100197 regulator-name = "LDO_REG6";
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200198 regulator-min-microvolt = <2500000>;
199 regulator-max-microvolt = <2500000>;
200 regulator-always-on;
201 };
202 vcc_28: LDO_REG7 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100203 regulator-name = "LDO_REG7";
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200204 regulator-min-microvolt = <2800000>;
205 regulator-max-microvolt = <2800000>;
206 regulator-always-on;
207 };
208 vcc_15: LDO_REG8 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100209 regulator-name = "LDO_REG8";
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200210 regulator-min-microvolt = <1500000>;
211 regulator-max-microvolt = <1500000>;
212 regulator-always-on;
213 };
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100214 vrtc_18: LDO_REG9 {
215 regulator-name = "LDO_REG9";
216 /* Despite the datasheet stating 3.3V
217 * for REG9 and the driver expecting that,
218 * REG9 outputs 1.8V.
219 * Likely the CI20 uses a proprietary
220 * factory programmed chip variant.
221 * Since this is a simple on/off LDO the
222 * exact values do not matter.
223 */
224 regulator-min-microvolt = <3300000>;
225 regulator-max-microvolt = <3300000>;
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200226 regulator-always-on;
227 };
228 vcc_11: LDO_REG10 {
H. Nikolaus Schallere8d87a02020-03-06 18:27:58 +0100229 regulator-name = "LDO_REG10";
230 regulator-min-microvolt = <1200000>;
231 regulator-max-microvolt = <1200000>;
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200232 regulator-always-on;
233 };
234 };
235 };
236};
237
238&i2c1 {
239 status = "okay";
240
241 pinctrl-names = "default";
242 pinctrl-0 = <&pins_i2c1>;
243
244};
245
246&i2c2 {
247 status = "okay";
248
249 pinctrl-names = "default";
250 pinctrl-0 = <&pins_i2c2>;
251
252};
253
254&i2c3 {
255 status = "okay";
256
257 pinctrl-names = "default";
258 pinctrl-0 = <&pins_i2c3>;
259
260};
261
262&i2c4 {
263 status = "okay";
264
265 pinctrl-names = "default";
266 pinctrl-0 = <&pins_i2c4>;
267
268 clock-frequency = <400000>;
269
270 rtc@51 {
271 compatible = "nxp,pcf8563";
272 reg = <0x51>;
273 interrupts = <110>;
274 };
275};
276
Alex Smith78800552015-12-03 12:02:22 +0000277&nemc {
278 status = "okay";
279
280 nandc: nand-controller@1 {
281 compatible = "ingenic,jz4780-nand";
282 reg = <1 0 0x1000000>;
283
284 #address-cells = <1>;
285 #size-cells = <0>;
286
287 ingenic,bch-controller = <&bch>;
288
289 ingenic,nemc-tAS = <10>;
290 ingenic,nemc-tAH = <5>;
291 ingenic,nemc-tBP = <10>;
292 ingenic,nemc-tAW = <15>;
293 ingenic,nemc-tSTRV = <100>;
294
Paul Cercueil89a61392017-05-12 18:53:02 +0200295 /*
296 * Only CLE/ALE are needed for the devices that are connected, rather
297 * than the full address line set.
298 */
299 pinctrl-names = "default";
300 pinctrl-0 = <&pins_nemc>;
301
Alex Smith78800552015-12-03 12:02:22 +0000302 nand@1 {
303 reg = <1>;
304
305 nand-ecc-step-size = <1024>;
306 nand-ecc-strength = <24>;
307 nand-ecc-mode = "hw";
308 nand-on-flash-bbt;
309
Paul Cercueil89a61392017-05-12 18:53:02 +0200310 pinctrl-names = "default";
311 pinctrl-0 = <&pins_nemc_cs1>;
312
Alex Smith78800552015-12-03 12:02:22 +0000313 partitions {
314 compatible = "fixed-partitions";
315 #address-cells = <2>;
316 #size-cells = <2>;
317
318 partition@0 {
319 label = "u-boot-spl";
320 reg = <0x0 0x0 0x0 0x800000>;
321 };
322
Mathieu Malaterrec7685192018-01-24 12:42:07 +0100323 partition@800000 {
Alex Smith78800552015-12-03 12:02:22 +0000324 label = "u-boot";
325 reg = <0x0 0x800000 0x0 0x200000>;
326 };
327
Mathieu Malaterrec7685192018-01-24 12:42:07 +0100328 partition@a00000 {
Alex Smith78800552015-12-03 12:02:22 +0000329 label = "u-boot-env";
330 reg = <0x0 0xa00000 0x0 0x200000>;
331 };
332
Mathieu Malaterrec7685192018-01-24 12:42:07 +0100333 partition@c00000 {
Alex Smith78800552015-12-03 12:02:22 +0000334 label = "boot";
335 reg = <0x0 0xc00000 0x0 0x4000000>;
336 };
337
Mathieu Malaterre018eab82018-01-24 12:42:08 +0100338 partition@4c00000 {
Alex Smith78800552015-12-03 12:02:22 +0000339 label = "system";
340 reg = <0x0 0x4c00000 0x1 0xfb400000>;
341 };
342 };
343 };
344 };
Harvey Hunt8fec5532017-07-07 17:12:08 +0100345
346 dm9000@6 {
347 compatible = "davicom,dm9000";
348 davicom,no-eeprom;
349
350 pinctrl-names = "default";
351 pinctrl-0 = <&pins_nemc_cs6>;
352
353 reg = <6 0 1 /* addr */
354 6 2 1>; /* data */
355
356 ingenic,nemc-tAS = <15>;
357 ingenic,nemc-tAH = <10>;
358 ingenic,nemc-tBP = <20>;
359 ingenic,nemc-tAW = <50>;
360 ingenic,nemc-tSTRV = <100>;
361
362 reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
363 vcc-supply = <&eth0_power>;
364
365 interrupt-parent = <&gpe>;
366 interrupts = <19 4>;
367 };
Alex Smith78800552015-12-03 12:02:22 +0000368};
369
370&bch {
371 status = "okay";
372};
Paul Cercueil89a61392017-05-12 18:53:02 +0200373
374&pinctrl {
375 pins_uart0: uart0 {
376 function = "uart0";
377 groups = "uart0-data";
378 bias-disable;
379 };
380
381 pins_uart1: uart1 {
382 function = "uart1";
383 groups = "uart1-data";
384 bias-disable;
385 };
386
Alexandre GRIVEAUX948f2702019-10-01 21:09:14 +0200387 pins_uart2: uart2 {
388 function = "uart2";
389 groups = "uart2-data", "uart2-hwflow";
390 bias-disable;
391 };
392
Zhou Yanjie1ca1c872019-01-25 02:22:15 +0800393 pins_uart3: uart3 {
394 function = "uart3";
395 groups = "uart3-data", "uart3-hwflow";
Paul Cercueil89a61392017-05-12 18:53:02 +0200396 bias-disable;
397 };
398
399 pins_uart4: uart4 {
400 function = "uart4";
401 groups = "uart4-data";
402 bias-disable;
403 };
404
Alexandre GRIVEAUX73f2b942019-10-01 21:09:00 +0200405 pins_i2c0: i2c0 {
406 function = "i2c0";
407 groups = "i2c0-data";
408 bias-disable;
409 };
410
411 pins_i2c1: i2c1 {
412 function = "i2c1";
413 groups = "i2c1-data";
414 bias-disable;
415 };
416
417 pins_i2c2: i2c2 {
418 function = "i2c2";
419 groups = "i2c2-data";
420 bias-disable;
421 };
422
423 pins_i2c3: i2c3 {
424 function = "i2c3";
425 groups = "i2c3-data";
426 bias-disable;
427 };
428
429 pins_i2c4: i2c4 {
430 function = "i2c4";
431 groups = "i2c4-data-e";
432 bias-disable;
433 };
434
Paul Cercueil89a61392017-05-12 18:53:02 +0200435 pins_nemc: nemc {
436 function = "nemc";
437 groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
438 bias-disable;
439 };
440
441 pins_nemc_cs1: nemc-cs1 {
442 function = "nemc-cs1";
443 groups = "nemc-cs1";
444 bias-disable;
445 };
Harvey Hunt8fec5532017-07-07 17:12:08 +0100446
447 pins_nemc_cs6: nemc-cs6 {
448 function = "nemc-cs6";
449 groups = "nemc-cs6";
450 bias-disable;
451 };
Ezequiel Garcia671963b2018-03-28 18:00:55 -0300452
453 pins_mmc0: mmc0 {
454 function = "mmc0";
455 groups = "mmc0-1bit-e", "mmc0-4bit-e";
456 bias-disable;
457 };
458
459 pins_mmc1: mmc1 {
460 function = "mmc1";
461 groups = "mmc1-1bit-d", "mmc1-4bit-d";
462 bias-disable;
463 };
Paul Cercueil89a61392017-05-12 18:53:02 +0200464};
Paul Cercueil157c8872019-07-24 13:16:13 -0400465
466&tcu {
467 /* 3 MHz for the system timer and clocksource */
468 assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>;
469 assigned-clock-rates = <3000000>, <3000000>;
470};